[PATCH 0/5] Prepare GVT for display modularization

[PATCH 0/5] Prepare GVT for display modularization

[Ankit Nautiyal]

GVT currently relies on display internals through register macros and helpers
like for_each_pipe(). This tight coupling makes modularization difficult
because GVT should not access struct intel_display directly.
Add an API for GVT code to expose DISPLAY_RUNTIME_INFO()->pipe_mask.
This series introduces changes to make GVT independent of display internals
while keeping existing macros usable:

- Abstract offset calculations in display using
  INTEL_DISPLAY_DEVICE_*_OFFSET() macros.
- Add APIs for GVT to compute offsets and pipe mask via functions.
- Update GVT to use these APIs by overriding helper macros and
  for_each_pipe().

Ankit Nautiyal (5):
  drm/i915/display: Abstract pipe/trans/cursor offset calculation
  drm/i915/display: Add APIs to be used by gvt to get the register
    offsets
  drm/i915/gvt: Add header to use display offset functions in macros
  drm/i915/gvt: Change for_each_pipe to use pipe_mask API
  drm/i915/gvt/display_helpers: Cast argument to enum pipe for
    pipe-offset macro

 drivers/gpu/drm/i915/Makefile                 |  1 +
 .../drm/i915/display/intel_display_device.h   | 17 +++++++
 .../drm/i915/display/intel_display_limits.c   |  0
 .../drm/i915/display/intel_display_reg_defs.h | 15 ++----
 drivers/gpu/drm/i915/display/intel_gvt_api.c  | 40 ++++++++++++++++
 drivers/gpu/drm/i915/display/intel_gvt_api.h  | 21 +++++++++
 drivers/gpu/drm/i915/gvt/cmd_parser.c         |  2 +
 drivers/gpu/drm/i915/gvt/display.c            |  2 +
 drivers/gpu/drm/i915/gvt/display_helpers.h    | 46 +++++++++++++++++++
 drivers/gpu/drm/i915/gvt/fb_decoder.c         |  2 +
 drivers/gpu/drm/i915/gvt/handlers.c           |  2 +
 11 files changed, 137 insertions(+), 11 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
 create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h

-- 
2.45.2

[PATCH 1/5] drm/i915/display: Abstract pipe/trans/cursor offset calculation

[Ankit Nautiyal]

Introduce INTEL_DISPLAY_DEVICE_*_OFFSET() macros to compute absolute
MMIO offsets for pipe, transcoder, and cursor registers.

Update _MMIO_PIPE2/_MMIO_TRANS2/_MMIO_CURSOR2 to use these macros
for cleaner abstraction and to prepare for external API usage (e.g. GVT).

Also move DISPLAY_MMIO_BASE() to intel_display_device.h so it can be
abstracted in GVT, allowing register macros to resolve via
exported helpers rather than peeking into struct intel_display.

Suggested-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 .../gpu/drm/i915/display/intel_display_device.h | 17 +++++++++++++++++
 .../drm/i915/display/intel_display_reg_defs.h   | 15 ++++-----------
 2 files changed, 21 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 50b2e9ae2c18..05bba7a9899a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -260,6 +260,23 @@ struct intel_display_platforms {
 	 ((id) == ARLS_HOST_BRIDGE_PCI_ID3) || \
 	 ((id) == ARLS_HOST_BRIDGE_PCI_ID4))
 
+#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
+	(DISPLAY_INFO(display)->pipe_offsets[(pipe)] - \
+	 DISPLAY_INFO(display)->pipe_offsets[PIPE_A] + \
+	 DISPLAY_MMIO_BASE(display))
+
+#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
+	(DISPLAY_INFO(display)->trans_offsets[(trans)] - \
+	 DISPLAY_INFO(display)->trans_offsets[TRANSCODER_A] + \
+	 DISPLAY_MMIO_BASE(display))
+
+#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
+	(DISPLAY_INFO(display)->cursor_offsets[(pipe)] - \
+	 DISPLAY_INFO(display)->cursor_offsets[PIPE_A] + \
+	 DISPLAY_MMIO_BASE(display))
+
+#define DISPLAY_MMIO_BASE(dev_priv)	(DISPLAY_INFO(dev_priv)->mmio_offset)
+
 struct intel_display_runtime_info {
 	struct intel_display_ip_ver {
 		u16 ver;
diff --git a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
index b83ad06f2ea7..74f572d3a202 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
@@ -8,8 +8,6 @@
 
 #include "i915_reg_defs.h"
 
-#define DISPLAY_MMIO_BASE(dev_priv)	(DISPLAY_INFO(dev_priv)->mmio_offset)
-
 #define VLV_DISPLAY_BASE		0x180000
 
 /*
@@ -36,14 +34,9 @@
  * Device info offset array based helpers for groups of registers with unevenly
  * spaced base offsets.
  */
-#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(DISPLAY_INFO(display)->pipe_offsets[(pipe)] - \
-						      DISPLAY_INFO(display)->pipe_offsets[PIPE_A] + \
-						      DISPLAY_MMIO_BASE(display) + (reg))
-#define _MMIO_TRANS2(display, tran, reg)	_MMIO(DISPLAY_INFO(display)->trans_offsets[(tran)] - \
-						      DISPLAY_INFO(display)->trans_offsets[TRANSCODER_A] + \
-						      DISPLAY_MMIO_BASE(display) + (reg))
-#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(DISPLAY_INFO(display)->cursor_offsets[(pipe)] - \
-						      DISPLAY_INFO(display)->cursor_offsets[PIPE_A] + \
-						      DISPLAY_MMIO_BASE(display) + (reg))
+
+#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) + (reg))
+#define _MMIO_TRANS2(display, trans, reg)	_MMIO(INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) + (reg))
+#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) + (reg))
 
 #endif /* __INTEL_DISPLAY_REG_DEFS_H__ */
-- 
2.45.2

[PATCH 2/5] drm/i915/display: Add APIs to be used by gvt to get the register offsets

[Ankit Nautiyal]

GVT code uses macros for register offsets that require display internal
structures. This makes clean separation of display code and
modularization difficult.

Introduce APIs to abstract offset calculations:
- intel_display_device_pipe_offset()
- intel_display_device_trans_offset()
- intel_display_device_cursor_offset()
- intel_display_device_mmio_base()

These APIs return absolute base offsets for the respective register
groups, allowing GVT to compute MMIO addresses without using internal
macros or struct fields. This prepares the path to separate
display-dependent code from i915/gvt/*.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/Makefile                 |  1 +
 .../drm/i915/display/intel_display_limits.c   |  0
 drivers/gpu/drm/i915/display/intel_gvt_api.c  | 34 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_gvt_api.h  | 20 +++++++++++
 4 files changed, 55 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index f01b5d8a07c7..7974f017f263 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -360,6 +360,7 @@ i915-y += \
 	display/intel_dvo.o \
 	display/intel_encoder.o \
 	display/intel_gmbus.o \
+	display/intel_gvt_api.o \
 	display/intel_hdmi.o \
 	display/intel_lspcon.o \
 	display/intel_lt_phy.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.c b/drivers/gpu/drm/i915/display/intel_display_limits.c
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
new file mode 100644
index 000000000000..8abea318fbc2
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include <linux/types.h>
+
+#include "intel_display_core.h"
+#include "intel_display_regs.h"
+#include "intel_gvt_api.h"
+
+u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe)
+{
+	return INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe);
+}
+EXPORT_SYMBOL_GPL(intel_display_device_pipe_offset);
+
+u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans)
+{
+	return INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans);
+}
+EXPORT_SYMBOL_GPL(intel_display_device_trans_offset);
+
+u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe)
+{
+	return INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe);
+}
+EXPORT_SYMBOL_GPL(intel_display_device_cursor_offset);
+
+u32 intel_display_device_mmio_base(struct intel_display *display)
+{
+	return DISPLAY_MMIO_BASE(display);
+}
+EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
new file mode 100644
index 000000000000..e9a1122a988d
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef __INTEL_GVT_API_H__
+#define __INTEL_GVT_API_H__
+
+#include <linux/types.h>
+
+enum pipe;
+enum transcoder;
+struct intel_display;
+
+u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe);
+u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
+u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
+u32 intel_display_device_mmio_base(struct intel_display *display);
+
+#endif /* __INTEL_GVT_API_H__ */
-- 
2.45.2

[PATCH 3/5] drm/i915/gvt: Add header to use display offset functions in macros

[Ankit Nautiyal]

Introduce gvt/display_helpers.h to make DISPLAY_MMIO_BASE and
INTEL_DISPLAY_DEVICE_*_OFFSET macros call exported display functions.
This lets GVT keep using existing register macros (e.g.,
TRANSCONF(display, pipe)) while ensuring offset calculations happen
through functions instead of accessing display internals.

Include gvt/display_helpers.h after display headers to avoid
conflicts.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/gvt/cmd_parser.c      |  2 ++
 drivers/gpu/drm/i915/gvt/display.c         |  2 ++
 drivers/gpu/drm/i915/gvt/display_helpers.h | 39 ++++++++++++++++++++++
 drivers/gpu/drm/i915/gvt/fb_decoder.c      |  2 ++
 drivers/gpu/drm/i915/gvt/handlers.c        |  2 ++
 5 files changed, 47 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h

diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index df04e4ead8ea..6b5e18fca403 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -59,6 +59,8 @@
 #include "gem/i915_gem_pm.h"
 #include "gt/intel_context.h"
 
+#include "gvt/display_helpers.h"
+
 #define INVALID_OP    (~0U)
 
 #define OP_LEN_MI           9
diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index 06517d1f07a2..7a51c13b9b58 100644
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -49,6 +49,8 @@
 #include "display/intel_dpio_phy.h"
 #include "display/intel_sprite_regs.h"
 
+#include "gvt/display_helpers.h"
+
 static int get_edp_pipe(struct intel_vgpu *vgpu)
 {
 	u32 data = vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP);
diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
new file mode 100644
index 000000000000..6f68a1e8751a
--- /dev/null
+++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef __DISPLAY_HELPERS_H__
+#define __DISPLAY_HELPERS_H__
+
+#include "display/intel_gvt_api.h"
+
+enum pipe;
+enum trans;
+struct display;
+
+#ifdef DISPLAY_MMIO_BASE
+#undef DISPLAY_MMIO_BASE
+#endif
+#define DISPLAY_MMIO_BASE(display) \
+	intel_display_device_mmio_base((display))
+
+#ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
+#undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
+#endif
+#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
+	intel_display_device_pipe_offset((display), (pipe))
+
+#ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
+#undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
+#endif
+#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
+	intel_display_device_trans_offset((display), (trans))
+
+#ifdef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
+#undef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
+#endif
+#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
+	intel_display_device_cursor_offset((display), (pipe))
+
+#endif /* __DISPLAY_HELPERS_H__ */
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index a8079cfa8e1d..ee4213fa2cda 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -47,6 +47,8 @@
 #include "display/intel_sprite_regs.h"
 #include "display/skl_universal_plane_regs.h"
 
+#include "gvt/display_helpers.h"
+
 #define PRIMARY_FORMAT_NUM	16
 struct pixel_format {
 	int drm_format;	/* Pixel format in DRM definition */
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 36ea12ade849..3e58e35ea2b9 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -67,6 +67,8 @@
 #include "gt/intel_gt_regs.h"
 #include <linux/vmalloc.h>
 
+#include "gvt/display_helpers.h"
+
 /* XXX FIXME i915 has changed PP_XXX definition */
 #define PCH_PP_STATUS  _MMIO(0xc7200)
 #define PCH_PP_CONTROL _MMIO(0xc7204)
-- 
2.45.2

[PATCH 4/5] drm/i915/gvt: Change for_each_pipe to use pipe_mask API

[Ankit Nautiyal]

Add a new API to get pipe_mask from DISPLAY_RUNTIME_INFO() for GVT.
Update the for_each_pipe() macro in GVT to call this API, instead of
accessing DISPLAY_RUNTIME_INFO()->pipe_mask directly.

This keeps the macro usable in GVT without exposing display internals
and prepares for display modularization.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_gvt_api.c | 6 ++++++
 drivers/gpu/drm/i915/display/intel_gvt_api.h | 1 +
 drivers/gpu/drm/i915/gvt/display_helpers.h   | 7 +++++++
 3 files changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
index 8abea318fbc2..0b09bbf2c29a 100644
--- a/drivers/gpu/drm/i915/display/intel_gvt_api.c
+++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
@@ -32,3 +32,9 @@ u32 intel_display_device_mmio_base(struct intel_display *display)
 	return DISPLAY_MMIO_BASE(display);
 }
 EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
+
+u8 intel_display_runtime_info_pipe_mask(struct intel_display *display)
+{
+	return DISPLAY_RUNTIME_INFO(display)->pipe_mask;
+}
+EXPORT_SYMBOL_GPL(intel_display_runtime_info_pipe_mask);
diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
index e9a1122a988d..8ceda30a969b 100644
--- a/drivers/gpu/drm/i915/display/intel_gvt_api.h
+++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
@@ -16,5 +16,6 @@ u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pi
 u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
 u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
 u32 intel_display_device_mmio_base(struct intel_display *display);
+u8 intel_display_runtime_info_pipe_mask(struct intel_display *display);
 
 #endif /* __INTEL_GVT_API_H__ */
diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
index 6f68a1e8751a..d11ebb03b946 100644
--- a/drivers/gpu/drm/i915/gvt/display_helpers.h
+++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
@@ -36,4 +36,11 @@ struct display;
 #define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
 	intel_display_device_cursor_offset((display), (pipe))
 
+#ifdef for_each_pipe
+#undef for_each_pipe
+#endif
+#define for_each_pipe(display, __p) \
+	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
+		for_each_if(intel_display_runtime_info_pipe_mask((display)) & BIT(__p))
+
 #endif /* __DISPLAY_HELPERS_H__ */
-- 
2.45.2

[PATCH 5/5] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro

[Ankit Nautiyal]

TRANSCONF() expands via _MMIO_PIPE2, i.e., it uses pipe-based addressing.
In GVT, some call sites pass an enum transcoder to TRANSCONF(), which now
routes through INTEL_DISPLAY_DEVICE_PIPE_OFFSET() and ultimately calls
intel_display_device_pipe_offset(), whose parameter type is enum pipe.

This results in -Werror=enum-conversion.

To address this, cast the index to enum pipe in the GVT-side macro
override.

This works for all cases as TRANSCODER_{A,B,C,D} all have 1:1 mapping to
PIPE_{A,B,C,D} except for TRANSCODER_EDP.

There is one place which uses TRANSCONF() with TRANSCODER_EDP, which
appears to be incorrect. In any case, the cast preserves the previous
behaviour.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/gvt/display_helpers.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
index d11ebb03b946..fb75cc9f97cc 100644
--- a/drivers/gpu/drm/i915/gvt/display_helpers.h
+++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
@@ -21,8 +21,8 @@ struct display;
 #ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
 #undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
 #endif
-#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
-	intel_display_device_pipe_offset((display), (pipe))
+#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, idx) \
+	intel_display_device_pipe_offset((display), (enum pipe)(idx))
 
 #ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
 #undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
-- 
2.45.2

✗ CI.checkpatch: warning for Prepare GVT for display modularization

[Patchwork]

== Series Details ==

Series: Prepare GVT for display modularization
URL   : https://patchwork.freedesktop.org/series/159008/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
8f50e69d0ce3656564bbdf8b3e213d61470d463f
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit a7146dcf2f3f791b9a1b75f0d7412e841045c533
Author: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Date:   Mon Dec 15 16:48:41 2025 +0530

    drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro
    
    TRANSCONF() expands via _MMIO_PIPE2, i.e., it uses pipe-based addressing.
    In GVT, some call sites pass an enum transcoder to TRANSCONF(), which now
    routes through INTEL_DISPLAY_DEVICE_PIPE_OFFSET() and ultimately calls
    intel_display_device_pipe_offset(), whose parameter type is enum pipe.
    
    This results in -Werror=enum-conversion.
    
    To address this, cast the index to enum pipe in the GVT-side macro
    override.
    
    This works for all cases as TRANSCODER_{A,B,C,D} all have 1:1 mapping to
    PIPE_{A,B,C,D} except for TRANSCODER_EDP.
    
    There is one place which uses TRANSCONF() with TRANSCODER_EDP, which
    appears to be incorrect. In any case, the cast preserves the previous
    behaviour.
    
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
+ /mt/dim checkpatch 05b7c58b3367dca84d4745dfcac3b5d4ee142404 drm-intel
0f61214c74ff drm/i915/display: Abstract pipe/trans/cursor offset calculation
-:28: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#28: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:263:
+#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
+	(DISPLAY_INFO(display)->pipe_offsets[(pipe)] - \
+	 DISPLAY_INFO(display)->pipe_offsets[PIPE_A] + \
+	 DISPLAY_MMIO_BASE(display))

-:33: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#33: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:268:
+#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
+	(DISPLAY_INFO(display)->trans_offsets[(trans)] - \
+	 DISPLAY_INFO(display)->trans_offsets[TRANSCODER_A] + \
+	 DISPLAY_MMIO_BASE(display))

-:38: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#38: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:273:
+#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
+	(DISPLAY_INFO(display)->cursor_offsets[(pipe)] - \
+	 DISPLAY_INFO(display)->cursor_offsets[PIPE_A] + \
+	 DISPLAY_MMIO_BASE(display))

-:75: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#75: FILE: drivers/gpu/drm/i915/display/intel_display_reg_defs.h:38:
+#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) + (reg))

-:76: WARNING:LONG_LINE: line length of 112 exceeds 100 columns
#76: FILE: drivers/gpu/drm/i915/display/intel_display_reg_defs.h:39:
+#define _MMIO_TRANS2(display, trans, reg)	_MMIO(INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) + (reg))

-:77: WARNING:LONG_LINE: line length of 112 exceeds 100 columns
#77: FILE: drivers/gpu/drm/i915/display/intel_display_reg_defs.h:40:
+#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) + (reg))

total: 0 errors, 3 warnings, 3 checks, 49 lines checked
b5542f24bd33 drm/i915/display: Add APIs to be used by gvt to get the register offsets
-:37: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#37: 
new file mode 100644

-:85: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/i915/display/intel_gvt_api.h', please use '/*' instead
#85: FILE: drivers/gpu/drm/i915/display/intel_gvt_api.h:1:
+// SPDX-License-Identifier: MIT

-:85: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#85: FILE: drivers/gpu/drm/i915/display/intel_gvt_api.h:1:
+// SPDX-License-Identifier: MIT

total: 0 errors, 3 warnings, 0 checks, 61 lines checked
ecd1eaf3058c drm/i915/gvt: Add header to use display offset functions in macros
-:45: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#45: 
new file mode 100644

-:50: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/i915/gvt/display_helpers.h', please use '/*' instead
#50: FILE: drivers/gpu/drm/i915/gvt/display_helpers.h:1:
+// SPDX-License-Identifier: MIT

-:50: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#50: FILE: drivers/gpu/drm/i915/gvt/display_helpers.h:1:
+// SPDX-License-Identifier: MIT

total: 0 errors, 3 warnings, 0 checks, 71 lines checked
6c05fae13196 drm/i915/gvt: Change for_each_pipe to use pipe_mask API
-:51: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__p' - possible side-effects?
#51: FILE: drivers/gpu/drm/i915/gvt/display_helpers.h:42:
+#define for_each_pipe(display, __p) \
+	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
+		for_each_if(intel_display_runtime_info_pipe_mask((display)) & BIT(__p))

total: 0 errors, 0 warnings, 1 checks, 26 lines checked
a7146dcf2f3f drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro

✓ CI.KUnit: success for Prepare GVT for display modularization

[Patchwork]

== Series Details ==

Series: Prepare GVT for display modularization
URL   : https://patchwork.freedesktop.org/series/159008/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:38:31] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:38:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:39:07] Starting KUnit Kernel (1/1)...
[11:39:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:39:07] ================== guc_buf (11 subtests) ===================
[11:39:07] [PASSED] test_smallest
[11:39:07] [PASSED] test_largest
[11:39:07] [PASSED] test_granular
[11:39:07] [PASSED] test_unique
[11:39:07] [PASSED] test_overlap
[11:39:07] [PASSED] test_reusable
[11:39:07] [PASSED] test_too_big
[11:39:07] [PASSED] test_flush
[11:39:07] [PASSED] test_lookup
[11:39:07] [PASSED] test_data
[11:39:07] [PASSED] test_class
[11:39:07] ===================== [PASSED] guc_buf =====================
[11:39:07] =================== guc_dbm (7 subtests) ===================
[11:39:07] [PASSED] test_empty
[11:39:07] [PASSED] test_default
[11:39:07] ======================== test_size  ========================
[11:39:07] [PASSED] 4
[11:39:07] [PASSED] 8
[11:39:07] [PASSED] 32
[11:39:07] [PASSED] 256
[11:39:07] ==================== [PASSED] test_size ====================
[11:39:07] ======================= test_reuse  ========================
[11:39:07] [PASSED] 4
[11:39:07] [PASSED] 8
[11:39:07] [PASSED] 32
[11:39:07] [PASSED] 256
[11:39:07] =================== [PASSED] test_reuse ====================
[11:39:07] =================== test_range_overlap  ====================
[11:39:07] [PASSED] 4
[11:39:07] [PASSED] 8
[11:39:07] [PASSED] 32
[11:39:07] [PASSED] 256
[11:39:07] =============== [PASSED] test_range_overlap ================
[11:39:07] =================== test_range_compact  ====================
[11:39:07] [PASSED] 4
[11:39:07] [PASSED] 8
[11:39:07] [PASSED] 32
[11:39:07] [PASSED] 256
[11:39:07] =============== [PASSED] test_range_compact ================
[11:39:07] ==================== test_range_spare  =====================
[11:39:07] [PASSED] 4
[11:39:07] [PASSED] 8
[11:39:07] [PASSED] 32
[11:39:07] [PASSED] 256
[11:39:07] ================ [PASSED] test_range_spare =================
[11:39:07] ===================== [PASSED] guc_dbm =====================
[11:39:07] =================== guc_idm (6 subtests) ===================
[11:39:07] [PASSED] bad_init
[11:39:07] [PASSED] no_init
[11:39:07] [PASSED] init_fini
[11:39:07] [PASSED] check_used
[11:39:07] [PASSED] check_quota
[11:39:07] [PASSED] check_all
[11:39:07] ===================== [PASSED] guc_idm =====================
[11:39:07] ================== no_relay (3 subtests) ===================
[11:39:07] [PASSED] xe_drops_guc2pf_if_not_ready
[11:39:07] [PASSED] xe_drops_guc2vf_if_not_ready
[11:39:07] [PASSED] xe_rejects_send_if_not_ready
[11:39:07] ==================== [PASSED] no_relay =====================
[11:39:07] ================== pf_relay (14 subtests) ==================
[11:39:07] [PASSED] pf_rejects_guc2pf_too_short
[11:39:07] [PASSED] pf_rejects_guc2pf_too_long
[11:39:07] [PASSED] pf_rejects_guc2pf_no_payload
[11:39:07] [PASSED] pf_fails_no_payload
[11:39:07] [PASSED] pf_fails_bad_origin
[11:39:07] [PASSED] pf_fails_bad_type
[11:39:07] [PASSED] pf_txn_reports_error
[11:39:07] [PASSED] pf_txn_sends_pf2guc
[11:39:07] [PASSED] pf_sends_pf2guc
[11:39:07] [SKIPPED] pf_loopback_nop
[11:39:07] [SKIPPED] pf_loopback_echo
[11:39:07] [SKIPPED] pf_loopback_fail
[11:39:07] [SKIPPED] pf_loopback_busy
[11:39:07] [SKIPPED] pf_loopback_retry
[11:39:07] ==================== [PASSED] pf_relay =====================
[11:39:07] ================== vf_relay (3 subtests) ===================
[11:39:07] [PASSED] vf_rejects_guc2vf_too_short
[11:39:07] [PASSED] vf_rejects_guc2vf_too_long
[11:39:07] [PASSED] vf_rejects_guc2vf_no_payload
[11:39:07] ==================== [PASSED] vf_relay =====================
[11:39:07] ================ pf_gt_config (6 subtests) =================
[11:39:07] [PASSED] fair_contexts_1vf
[11:39:07] [PASSED] fair_doorbells_1vf
[11:39:07] [PASSED] fair_ggtt_1vf
[11:39:07] ====================== fair_contexts  ======================
[11:39:07] [PASSED] 1 VF
[11:39:07] [PASSED] 2 VFs
[11:39:07] [PASSED] 3 VFs
[11:39:07] [PASSED] 4 VFs
[11:39:07] [PASSED] 5 VFs
[11:39:07] [PASSED] 6 VFs
[11:39:07] [PASSED] 7 VFs
[11:39:07] [PASSED] 8 VFs
[11:39:07] [PASSED] 9 VFs
[11:39:07] [PASSED] 10 VFs
[11:39:07] [PASSED] 11 VFs
[11:39:07] [PASSED] 12 VFs
[11:39:07] [PASSED] 13 VFs
[11:39:07] [PASSED] 14 VFs
[11:39:07] [PASSED] 15 VFs
[11:39:07] [PASSED] 16 VFs
[11:39:07] [PASSED] 17 VFs
[11:39:07] [PASSED] 18 VFs
[11:39:07] [PASSED] 19 VFs
[11:39:07] [PASSED] 20 VFs
[11:39:07] [PASSED] 21 VFs
[11:39:07] [PASSED] 22 VFs
[11:39:07] [PASSED] 23 VFs
[11:39:07] [PASSED] 24 VFs
[11:39:07] [PASSED] 25 VFs
[11:39:07] [PASSED] 26 VFs
[11:39:07] [PASSED] 27 VFs
[11:39:07] [PASSED] 28 VFs
[11:39:07] [PASSED] 29 VFs
[11:39:07] [PASSED] 30 VFs
[11:39:07] [PASSED] 31 VFs
[11:39:07] [PASSED] 32 VFs
[11:39:07] [PASSED] 33 VFs
[11:39:07] [PASSED] 34 VFs
[11:39:07] [PASSED] 35 VFs
[11:39:07] [PASSED] 36 VFs
[11:39:07] [PASSED] 37 VFs
[11:39:07] [PASSED] 38 VFs
[11:39:07] [PASSED] 39 VFs
[11:39:07] [PASSED] 40 VFs
[11:39:07] [PASSED] 41 VFs
[11:39:07] [PASSED] 42 VFs
[11:39:07] [PASSED] 43 VFs
[11:39:07] [PASSED] 44 VFs
[11:39:07] [PASSED] 45 VFs
[11:39:07] [PASSED] 46 VFs
[11:39:07] [PASSED] 47 VFs
[11:39:07] [PASSED] 48 VFs
[11:39:07] [PASSED] 49 VFs
[11:39:07] [PASSED] 50 VFs
[11:39:07] [PASSED] 51 VFs
[11:39:07] [PASSED] 52 VFs
[11:39:07] [PASSED] 53 VFs
[11:39:07] [PASSED] 54 VFs
[11:39:07] [PASSED] 55 VFs
[11:39:07] [PASSED] 56 VFs
[11:39:07] [PASSED] 57 VFs
[11:39:07] [PASSED] 58 VFs
[11:39:07] [PASSED] 59 VFs
[11:39:07] [PASSED] 60 VFs
[11:39:07] [PASSED] 61 VFs
[11:39:07] [PASSED] 62 VFs
[11:39:07] [PASSED] 63 VFs
[11:39:07] ================== [PASSED] fair_contexts ==================
[11:39:07] ===================== fair_doorbells  ======================
[11:39:07] [PASSED] 1 VF
[11:39:07] [PASSED] 2 VFs
[11:39:07] [PASSED] 3 VFs
[11:39:07] [PASSED] 4 VFs
[11:39:07] [PASSED] 5 VFs
[11:39:07] [PASSED] 6 VFs
[11:39:07] [PASSED] 7 VFs
[11:39:07] [PASSED] 8 VFs
[11:39:07] [PASSED] 9 VFs
[11:39:07] [PASSED] 10 VFs
[11:39:07] [PASSED] 11 VFs
[11:39:07] [PASSED] 12 VFs
[11:39:07] [PASSED] 13 VFs
[11:39:07] [PASSED] 14 VFs
[11:39:07] [PASSED] 15 VFs
[11:39:07] [PASSED] 16 VFs
[11:39:07] [PASSED] 17 VFs
[11:39:07] [PASSED] 18 VFs
[11:39:07] [PASSED] 19 VFs
[11:39:07] [PASSED] 20 VFs
[11:39:07] [PASSED] 21 VFs
[11:39:07] [PASSED] 22 VFs
[11:39:07] [PASSED] 23 VFs
[11:39:07] [PASSED] 24 VFs
[11:39:07] [PASSED] 25 VFs
[11:39:07] [PASSED] 26 VFs
[11:39:07] [PASSED] 27 VFs
[11:39:07] [PASSED] 28 VFs
[11:39:07] [PASSED] 29 VFs
[11:39:07] [PASSED] 30 VFs
[11:39:07] [PASSED] 31 VFs
[11:39:07] [PASSED] 32 VFs
[11:39:07] [PASSED] 33 VFs
[11:39:07] [PASSED] 34 VFs
[11:39:07] [PASSED] 35 VFs
[11:39:07] [PASSED] 36 VFs
[11:39:07] [PASSED] 37 VFs
[11:39:07] [PASSED] 38 VFs
[11:39:07] [PASSED] 39 VFs
[11:39:07] [PASSED] 40 VFs
[11:39:07] [PASSED] 41 VFs
[11:39:07] [PASSED] 42 VFs
[11:39:07] [PASSED] 43 VFs
[11:39:07] [PASSED] 44 VFs
[11:39:07] [PASSED] 45 VFs
[11:39:07] [PASSED] 46 VFs
[11:39:07] [PASSED] 47 VFs
[11:39:07] [PASSED] 48 VFs
[11:39:07] [PASSED] 49 VFs
[11:39:07] [PASSED] 50 VFs
[11:39:07] [PASSED] 51 VFs
[11:39:07] [PASSED] 52 VFs
[11:39:07] [PASSED] 53 VFs
[11:39:07] [PASSED] 54 VFs
[11:39:07] [PASSED] 55 VFs
[11:39:07] [PASSED] 56 VFs
[11:39:07] [PASSED] 57 VFs
[11:39:07] [PASSED] 58 VFs
[11:39:07] [PASSED] 59 VFs
[11:39:07] [PASSED] 60 VFs
[11:39:07] [PASSED] 61 VFs
[11:39:07] [PASSED] 62 VFs
[11:39:07] [PASSED] 63 VFs
[11:39:07] ================= [PASSED] fair_doorbells ==================
[11:39:07] ======================== fair_ggtt  ========================
[11:39:07] [PASSED] 1 VF
[11:39:07] [PASSED] 2 VFs
[11:39:07] [PASSED] 3 VFs
[11:39:07] [PASSED] 4 VFs
[11:39:07] [PASSED] 5 VFs
[11:39:07] [PASSED] 6 VFs
[11:39:07] [PASSED] 7 VFs
[11:39:07] [PASSED] 8 VFs
[11:39:07] [PASSED] 9 VFs
[11:39:07] [PASSED] 10 VFs
[11:39:07] [PASSED] 11 VFs
[11:39:07] [PASSED] 12 VFs
[11:39:07] [PASSED] 13 VFs
[11:39:07] [PASSED] 14 VFs
[11:39:07] [PASSED] 15 VFs
[11:39:07] [PASSED] 16 VFs
[11:39:07] [PASSED] 17 VFs
[11:39:07] [PASSED] 18 VFs
[11:39:07] [PASSED] 19 VFs
[11:39:07] [PASSED] 20 VFs
[11:39:07] [PASSED] 21 VFs
[11:39:07] [PASSED] 22 VFs
[11:39:07] [PASSED] 23 VFs
[11:39:07] [PASSED] 24 VFs
[11:39:07] [PASSED] 25 VFs
[11:39:07] [PASSED] 26 VFs
[11:39:07] [PASSED] 27 VFs
[11:39:07] [PASSED] 28 VFs
[11:39:07] [PASSED] 29 VFs
[11:39:07] [PASSED] 30 VFs
[11:39:07] [PASSED] 31 VFs
[11:39:07] [PASSED] 32 VFs
[11:39:07] [PASSED] 33 VFs
[11:39:07] [PASSED] 34 VFs
[11:39:07] [PASSED] 35 VFs
[11:39:07] [PASSED] 36 VFs
[11:39:07] [PASSED] 37 VFs
[11:39:07] [PASSED] 38 VFs
[11:39:07] [PASSED] 39 VFs
[11:39:07] [PASSED] 40 VFs
[11:39:07] [PASSED] 41 VFs
[11:39:07] [PASSED] 42 VFs
[11:39:07] [PASSED] 43 VFs
[11:39:07] [PASSED] 44 VFs
[11:39:07] [PASSED] 45 VFs
[11:39:07] [PASSED] 46 VFs
[11:39:07] [PASSED] 47 VFs
[11:39:07] [PASSED] 48 VFs
[11:39:07] [PASSED] 49 VFs
[11:39:07] [PASSED] 50 VFs
[11:39:07] [PASSED] 51 VFs
[11:39:07] [PASSED] 52 VFs
[11:39:07] [PASSED] 53 VFs
[11:39:07] [PASSED] 54 VFs
[11:39:07] [PASSED] 55 VFs
[11:39:07] [PASSED] 56 VFs
[11:39:07] [PASSED] 57 VFs
[11:39:07] [PASSED] 58 VFs
[11:39:07] [PASSED] 59 VFs
[11:39:07] [PASSED] 60 VFs
[11:39:07] [PASSED] 61 VFs
[11:39:07] [PASSED] 62 VFs
[11:39:07] [PASSED] 63 VFs
[11:39:07] ==================== [PASSED] fair_ggtt ====================
[11:39:07] ================== [PASSED] pf_gt_config ===================
[11:39:07] ===================== lmtt (1 subtest) =====================
[11:39:07] ======================== test_ops  =========================
[11:39:07] [PASSED] 2-level
[11:39:07] [PASSED] multi-level
[11:39:07] ==================== [PASSED] test_ops =====================
[11:39:07] ====================== [PASSED] lmtt =======================
[11:39:07] ================= pf_service (11 subtests) =================
[11:39:07] [PASSED] pf_negotiate_any
[11:39:07] [PASSED] pf_negotiate_base_match
[11:39:07] [PASSED] pf_negotiate_base_newer
[11:39:07] [PASSED] pf_negotiate_base_next
[11:39:07] [SKIPPED] pf_negotiate_base_older
[11:39:07] [PASSED] pf_negotiate_base_prev
[11:39:07] [PASSED] pf_negotiate_latest_match
[11:39:07] [PASSED] pf_negotiate_latest_newer
[11:39:07] [PASSED] pf_negotiate_latest_next
[11:39:07] [SKIPPED] pf_negotiate_latest_older
[11:39:07] [SKIPPED] pf_negotiate_latest_prev
[11:39:07] =================== [PASSED] pf_service ====================
[11:39:07] ================= xe_guc_g2g (2 subtests) ==================
[11:39:07] ============== xe_live_guc_g2g_kunit_default  ==============
[11:39:07] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:39:07] ============== xe_live_guc_g2g_kunit_allmem  ===============
[11:39:07] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:39:07] =================== [SKIPPED] xe_guc_g2g ===================
[11:39:07] =================== xe_mocs (2 subtests) ===================
[11:39:07] ================ xe_live_mocs_kernel_kunit  ================
[11:39:07] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:39:07] ================ xe_live_mocs_reset_kunit  =================
[11:39:07] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:39:07] ==================== [SKIPPED] xe_mocs =====================
[11:39:07] ================= xe_migrate (2 subtests) ==================
[11:39:07] ================= xe_migrate_sanity_kunit  =================
[11:39:07] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:39:07] ================== xe_validate_ccs_kunit  ==================
[11:39:07] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:39:07] =================== [SKIPPED] xe_migrate ===================
[11:39:07] ================== xe_dma_buf (1 subtest) ==================
[11:39:07] ==================== xe_dma_buf_kunit  =====================
[11:39:07] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:39:07] =================== [SKIPPED] xe_dma_buf ===================
[11:39:07] ================= xe_bo_shrink (1 subtest) =================
[11:39:07] =================== xe_bo_shrink_kunit  ====================
[11:39:07] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:39:07] ================== [SKIPPED] xe_bo_shrink ==================
[11:39:07] ==================== xe_bo (2 subtests) ====================
[11:39:07] ================== xe_ccs_migrate_kunit  ===================
[11:39:07] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:39:07] ==================== xe_bo_evict_kunit  ====================
[11:39:07] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:39:07] ===================== [SKIPPED] xe_bo ======================
[11:39:07] ==================== args (11 subtests) ====================
[11:39:07] [PASSED] count_args_test
[11:39:07] [PASSED] call_args_example
[11:39:07] [PASSED] call_args_test
[11:39:07] [PASSED] drop_first_arg_example
[11:39:07] [PASSED] drop_first_arg_test
[11:39:07] [PASSED] first_arg_example
[11:39:07] [PASSED] first_arg_test
[11:39:07] [PASSED] last_arg_example
[11:39:07] [PASSED] last_arg_test
[11:39:07] [PASSED] pick_arg_example
[11:39:07] [PASSED] sep_comma_example
[11:39:07] ====================== [PASSED] args =======================
[11:39:07] =================== xe_pci (3 subtests) ====================
[11:39:07] ==================== check_graphics_ip  ====================
[11:39:07] [PASSED] 12.00 Xe_LP
[11:39:07] [PASSED] 12.10 Xe_LP+
[11:39:07] [PASSED] 12.55 Xe_HPG
[11:39:07] [PASSED] 12.60 Xe_HPC
[11:39:07] [PASSED] 12.70 Xe_LPG
[11:39:07] [PASSED] 12.71 Xe_LPG
[11:39:07] [PASSED] 12.74 Xe_LPG+
[11:39:07] [PASSED] 20.01 Xe2_HPG
[11:39:07] [PASSED] 20.02 Xe2_HPG
[11:39:07] [PASSED] 20.04 Xe2_LPG
[11:39:07] [PASSED] 30.00 Xe3_LPG
[11:39:07] [PASSED] 30.01 Xe3_LPG
[11:39:07] [PASSED] 30.03 Xe3_LPG
[11:39:07] [PASSED] 30.04 Xe3_LPG
[11:39:07] [PASSED] 30.05 Xe3_LPG
[11:39:07] [PASSED] 35.11 Xe3p_XPC
[11:39:07] ================ [PASSED] check_graphics_ip ================
[11:39:07] ===================== check_media_ip  ======================
[11:39:07] [PASSED] 12.00 Xe_M
[11:39:07] [PASSED] 12.55 Xe_HPM
[11:39:07] [PASSED] 13.00 Xe_LPM+
[11:39:07] [PASSED] 13.01 Xe2_HPM
[11:39:07] [PASSED] 20.00 Xe2_LPM
[11:39:07] [PASSED] 30.00 Xe3_LPM
[11:39:07] [PASSED] 30.02 Xe3_LPM
[11:39:07] [PASSED] 35.00 Xe3p_LPM
[11:39:07] [PASSED] 35.03 Xe3p_HPM
[11:39:07] ================= [PASSED] check_media_ip ==================
[11:39:07] =================== check_platform_desc  ===================
[11:39:07] [PASSED] 0x9A60 (TIGERLAKE)
[11:39:07] [PASSED] 0x9A68 (TIGERLAKE)
[11:39:07] [PASSED] 0x9A70 (TIGERLAKE)
[11:39:07] [PASSED] 0x9A40 (TIGERLAKE)
[11:39:07] [PASSED] 0x9A49 (TIGERLAKE)
[11:39:07] [PASSED] 0x9A59 (TIGERLAKE)
[11:39:07] [PASSED] 0x9A78 (TIGERLAKE)
[11:39:07] [PASSED] 0x9AC0 (TIGERLAKE)
[11:39:07] [PASSED] 0x9AC9 (TIGERLAKE)
[11:39:07] [PASSED] 0x9AD9 (TIGERLAKE)
[11:39:07] [PASSED] 0x9AF8 (TIGERLAKE)
[11:39:07] [PASSED] 0x4C80 (ROCKETLAKE)
[11:39:07] [PASSED] 0x4C8A (ROCKETLAKE)
[11:39:07] [PASSED] 0x4C8B (ROCKETLAKE)
[11:39:07] [PASSED] 0x4C8C (ROCKETLAKE)
[11:39:07] [PASSED] 0x4C90 (ROCKETLAKE)
[11:39:07] [PASSED] 0x4C9A (ROCKETLAKE)
[11:39:07] [PASSED] 0x4680 (ALDERLAKE_S)
[11:39:07] [PASSED] 0x4682 (ALDERLAKE_S)
[11:39:07] [PASSED] 0x4688 (ALDERLAKE_S)
[11:39:07] [PASSED] 0x468A (ALDERLAKE_S)
[11:39:07] [PASSED] 0x468B (ALDERLAKE_S)
[11:39:07] [PASSED] 0x4690 (ALDERLAKE_S)
[11:39:07] [PASSED] 0x4692 (ALDERLAKE_S)
[11:39:07] [PASSED] 0x4693 (ALDERLAKE_S)
[11:39:07] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46AA (ALDERLAKE_P)
[11:39:07] [PASSED] 0x462A (ALDERLAKE_P)
[11:39:07] [PASSED] 0x4626 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x4628 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[11:39:07] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:39:07] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:39:07] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:39:07] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:39:07] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:39:07] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:39:07] [PASSED] 0xA721 (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA720 (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:39:07] [PASSED] 0xA780 (ALDERLAKE_S)
[11:39:07] [PASSED] 0xA781 (ALDERLAKE_S)
[11:39:07] [PASSED] 0xA782 (ALDERLAKE_S)
[11:39:07] [PASSED] 0xA783 (ALDERLAKE_S)
[11:39:07] [PASSED] 0xA788 (ALDERLAKE_S)
[11:39:07] [PASSED] 0xA789 (ALDERLAKE_S)
[11:39:07] [PASSED] 0xA78A (ALDERLAKE_S)
[11:39:07] [PASSED] 0xA78B (ALDERLAKE_S)
[11:39:07] [PASSED] 0x4905 (DG1)
[11:39:07] [PASSED] 0x4906 (DG1)
[11:39:07] [PASSED] 0x4907 (DG1)
[11:39:07] [PASSED] 0x4908 (DG1)
[11:39:07] [PASSED] 0x4909 (DG1)
[11:39:07] [PASSED] 0x56C0 (DG2)
[11:39:07] [PASSED] 0x56C2 (DG2)
[11:39:07] [PASSED] 0x56C1 (DG2)
[11:39:07] [PASSED] 0x7D51 (METEORLAKE)
[11:39:07] [PASSED] 0x7DD1 (METEORLAKE)
[11:39:07] [PASSED] 0x7D41 (METEORLAKE)
[11:39:07] [PASSED] 0x7D67 (METEORLAKE)
[11:39:07] [PASSED] 0xB640 (METEORLAKE)
[11:39:07] [PASSED] 0x56A0 (DG2)
[11:39:07] [PASSED] 0x56A1 (DG2)
[11:39:07] [PASSED] 0x56A2 (DG2)
[11:39:07] [PASSED] 0x56BE (DG2)
[11:39:07] [PASSED] 0x56BF (DG2)
[11:39:07] [PASSED] 0x5690 (DG2)
[11:39:07] [PASSED] 0x5691 (DG2)
[11:39:07] [PASSED] 0x5692 (DG2)
[11:39:07] [PASSED] 0x56A5 (DG2)
[11:39:07] [PASSED] 0x56A6 (DG2)
[11:39:07] [PASSED] 0x56B0 (DG2)
[11:39:07] [PASSED] 0x56B1 (DG2)
[11:39:07] [PASSED] 0x56BA (DG2)
[11:39:07] [PASSED] 0x56BB (DG2)
[11:39:07] [PASSED] 0x56BC (DG2)
[11:39:07] [PASSED] 0x56BD (DG2)
[11:39:07] [PASSED] 0x5693 (DG2)
[11:39:07] [PASSED] 0x5694 (DG2)
[11:39:07] [PASSED] 0x5695 (DG2)
[11:39:07] [PASSED] 0x56A3 (DG2)
[11:39:07] [PASSED] 0x56A4 (DG2)
[11:39:07] [PASSED] 0x56B2 (DG2)
[11:39:07] [PASSED] 0x56B3 (DG2)
[11:39:07] [PASSED] 0x5696 (DG2)
[11:39:07] [PASSED] 0x5697 (DG2)
[11:39:07] [PASSED] 0xB69 (PVC)
[11:39:07] [PASSED] 0xB6E (PVC)
[11:39:07] [PASSED] 0xBD4 (PVC)
[11:39:07] [PASSED] 0xBD5 (PVC)
[11:39:07] [PASSED] 0xBD6 (PVC)
[11:39:07] [PASSED] 0xBD7 (PVC)
[11:39:07] [PASSED] 0xBD8 (PVC)
[11:39:07] [PASSED] 0xBD9 (PVC)
[11:39:07] [PASSED] 0xBDA (PVC)
[11:39:07] [PASSED] 0xBDB (PVC)
[11:39:07] [PASSED] 0xBE0 (PVC)
[11:39:07] [PASSED] 0xBE1 (PVC)
[11:39:07] [PASSED] 0xBE5 (PVC)
[11:39:07] [PASSED] 0x7D40 (METEORLAKE)
[11:39:07] [PASSED] 0x7D45 (METEORLAKE)
[11:39:07] [PASSED] 0x7D55 (METEORLAKE)
[11:39:07] [PASSED] 0x7D60 (METEORLAKE)
[11:39:07] [PASSED] 0x7DD5 (METEORLAKE)
[11:39:07] [PASSED] 0x6420 (LUNARLAKE)
[11:39:07] [PASSED] 0x64A0 (LUNARLAKE)
[11:39:07] [PASSED] 0x64B0 (LUNARLAKE)
[11:39:07] [PASSED] 0xE202 (BATTLEMAGE)
[11:39:07] [PASSED] 0xE209 (BATTLEMAGE)
[11:39:07] [PASSED] 0xE20B (BATTLEMAGE)
[11:39:07] [PASSED] 0xE20C (BATTLEMAGE)
[11:39:07] [PASSED] 0xE20D (BATTLEMAGE)
[11:39:07] [PASSED] 0xE210 (BATTLEMAGE)
[11:39:07] [PASSED] 0xE211 (BATTLEMAGE)
[11:39:07] [PASSED] 0xE212 (BATTLEMAGE)
[11:39:07] [PASSED] 0xE216 (BATTLEMAGE)
[11:39:07] [PASSED] 0xE220 (BATTLEMAGE)
[11:39:07] [PASSED] 0xE221 (BATTLEMAGE)
[11:39:07] [PASSED] 0xE222 (BATTLEMAGE)
[11:39:07] [PASSED] 0xE223 (BATTLEMAGE)
[11:39:07] [PASSED] 0xB080 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB081 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB082 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB083 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB084 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB085 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB086 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB087 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB08F (PANTHERLAKE)
[11:39:07] [PASSED] 0xB090 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:39:07] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:39:07] [PASSED] 0xFD80 (PANTHERLAKE)
[11:39:07] [PASSED] 0xFD81 (PANTHERLAKE)
[11:39:07] [PASSED] 0xD740 (NOVALAKE_S)
[11:39:07] [PASSED] 0xD741 (NOVALAKE_S)
[11:39:07] [PASSED] 0xD742 (NOVALAKE_S)
[11:39:07] [PASSED] 0xD743 (NOVALAKE_S)
[11:39:07] [PASSED] 0xD744 (NOVALAKE_S)
[11:39:07] [PASSED] 0xD745 (NOVALAKE_S)
[11:39:07] [PASSED] 0x674C (CRESCENTISLAND)
[11:39:07] =============== [PASSED] check_platform_desc ===============
[11:39:07] ===================== [PASSED] xe_pci ======================
[11:39:07] =================== xe_rtp (2 subtests) ====================
[11:39:07] =============== xe_rtp_process_to_sr_tests  ================
[11:39:07] [PASSED] coalesce-same-reg
[11:39:07] [PASSED] no-match-no-add
[11:39:07] [PASSED] match-or
[11:39:07] [PASSED] match-or-xfail
[11:39:07] [PASSED] no-match-no-add-multiple-rules
[11:39:07] [PASSED] two-regs-two-entries
[11:39:07] [PASSED] clr-one-set-other
[11:39:07] [PASSED] set-field
[11:39:07] [PASSED] conflict-duplicate
[11:39:07] [PASSED] conflict-not-disjoint
[11:39:07] [PASSED] conflict-reg-type
[11:39:07] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:39:07] ================== xe_rtp_process_tests  ===================
[11:39:07] [PASSED] active1
[11:39:07] [PASSED] active2
[11:39:07] [PASSED] active-inactive
[11:39:07] [PASSED] inactive-active
[11:39:07] [PASSED] inactive-1st_or_active-inactive
[11:39:07] [PASSED] inactive-2nd_or_active-inactive
[11:39:07] [PASSED] inactive-last_or_active-inactive
[11:39:07] [PASSED] inactive-no_or_active-inactive
[11:39:07] ============== [PASSED] xe_rtp_process_tests ===============
[11:39:07] ===================== [PASSED] xe_rtp ======================
[11:39:07] ==================== xe_wa (1 subtest) =====================
[11:39:07] ======================== xe_wa_gt  =========================
[11:39:07] [PASSED] TIGERLAKE B0
[11:39:07] [PASSED] DG1 A0
[11:39:07] [PASSED] DG1 B0
[11:39:07] [PASSED] ALDERLAKE_S A0
[11:39:07] [PASSED] ALDERLAKE_S B0
[11:39:07] [PASSED] ALDERLAKE_S C0
[11:39:07] [PASSED] ALDERLAKE_S D0
[11:39:07] [PASSED] ALDERLAKE_P A0
[11:39:07] [PASSED] ALDERLAKE_P B0
[11:39:07] [PASSED] ALDERLAKE_P C0
[11:39:07] [PASSED] ALDERLAKE_S RPLS D0
[11:39:07] [PASSED] ALDERLAKE_P RPLU E0
[11:39:07] [PASSED] DG2 G10 C0
[11:39:07] [PASSED] DG2 G11 B1
[11:39:07] [PASSED] DG2 G12 A1
[11:39:07] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:39:07] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:39:07] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:39:07] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:39:07] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:39:07] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:39:07] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:39:07] ==================== [PASSED] xe_wa_gt =====================
[11:39:07] ====================== [PASSED] xe_wa ======================
[11:39:07] ============================================================
[11:39:07] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[11:39:07] Elapsed time: 36.174s total, 4.249s configuring, 31.409s building, 0.467s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:39:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:39:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:39:34] Starting KUnit Kernel (1/1)...
[11:39:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:39:35] ============ drm_test_pick_cmdline (2 subtests) ============
[11:39:35] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:39:35] =============== drm_test_pick_cmdline_named  ===============
[11:39:35] [PASSED] NTSC
[11:39:35] [PASSED] NTSC-J
[11:39:35] [PASSED] PAL
[11:39:35] [PASSED] PAL-M
[11:39:35] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:39:35] ============== [PASSED] drm_test_pick_cmdline ==============
[11:39:35] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:39:35] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:39:35] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:39:35] =========== drm_validate_clone_mode (2 subtests) ===========
[11:39:35] ============== drm_test_check_in_clone_mode  ===============
[11:39:35] [PASSED] in_clone_mode
[11:39:35] [PASSED] not_in_clone_mode
[11:39:35] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:39:35] =============== drm_test_check_valid_clones  ===============
[11:39:35] [PASSED] not_in_clone_mode
[11:39:35] [PASSED] valid_clone
[11:39:35] [PASSED] invalid_clone
[11:39:35] =========== [PASSED] drm_test_check_valid_clones ===========
[11:39:35] ============= [PASSED] drm_validate_clone_mode =============
[11:39:35] ============= drm_validate_modeset (1 subtest) =============
[11:39:35] [PASSED] drm_test_check_connector_changed_modeset
[11:39:35] ============== [PASSED] drm_validate_modeset ===============
[11:39:35] ====== drm_test_bridge_get_current_state (2 subtests) ======
[11:39:35] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:39:35] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[11:39:35] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:39:35] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:39:35] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:39:35] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:39:35] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[11:39:35] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:39:35] ============== drm_bridge_alloc (2 subtests) ===============
[11:39:35] [PASSED] drm_test_drm_bridge_alloc_basic
[11:39:35] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:39:35] ================ [PASSED] drm_bridge_alloc =================
[11:39:35] ================== drm_buddy (8 subtests) ==================
[11:39:35] [PASSED] drm_test_buddy_alloc_limit
[11:39:35] [PASSED] drm_test_buddy_alloc_optimistic
[11:39:35] [PASSED] drm_test_buddy_alloc_pessimistic
[11:39:35] [PASSED] drm_test_buddy_alloc_pathological
[11:39:35] [PASSED] drm_test_buddy_alloc_contiguous
[11:39:35] [PASSED] drm_test_buddy_alloc_clear
[11:39:35] [PASSED] drm_test_buddy_alloc_range_bias
[11:39:35] [PASSED] drm_test_buddy_fragmentation_performance
[11:39:35] ==================== [PASSED] drm_buddy ====================
[11:39:35] ============= drm_cmdline_parser (40 subtests) =============
[11:39:35] [PASSED] drm_test_cmdline_force_d_only
[11:39:35] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:39:35] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:39:35] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:39:35] [PASSED] drm_test_cmdline_force_e_only
[11:39:35] [PASSED] drm_test_cmdline_res
[11:39:35] [PASSED] drm_test_cmdline_res_vesa
[11:39:35] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:39:35] [PASSED] drm_test_cmdline_res_rblank
[11:39:35] [PASSED] drm_test_cmdline_res_bpp
[11:39:35] [PASSED] drm_test_cmdline_res_refresh
[11:39:35] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:39:35] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:39:35] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:39:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:39:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:39:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:39:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:39:35] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:39:35] [PASSED] drm_test_cmdline_res_margins_force_on
[11:39:35] [PASSED] drm_test_cmdline_res_vesa_margins
[11:39:35] [PASSED] drm_test_cmdline_name
[11:39:35] [PASSED] drm_test_cmdline_name_bpp
[11:39:35] [PASSED] drm_test_cmdline_name_option
[11:39:35] [PASSED] drm_test_cmdline_name_bpp_option
[11:39:35] [PASSED] drm_test_cmdline_rotate_0
[11:39:35] [PASSED] drm_test_cmdline_rotate_90
[11:39:35] [PASSED] drm_test_cmdline_rotate_180
[11:39:35] [PASSED] drm_test_cmdline_rotate_270
[11:39:35] [PASSED] drm_test_cmdline_hmirror
[11:39:35] [PASSED] drm_test_cmdline_vmirror
[11:39:35] [PASSED] drm_test_cmdline_margin_options
[11:39:35] [PASSED] drm_test_cmdline_multiple_options
[11:39:35] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:39:35] [PASSED] drm_test_cmdline_extra_and_option
[11:39:35] [PASSED] drm_test_cmdline_freestanding_options
[11:39:35] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:39:35] [PASSED] drm_test_cmdline_panel_orientation
[11:39:35] ================ drm_test_cmdline_invalid  =================
[11:39:35] [PASSED] margin_only
[11:39:35] [PASSED] interlace_only
[11:39:35] [PASSED] res_missing_x
[11:39:35] [PASSED] res_missing_y
[11:39:35] [PASSED] res_bad_y
[11:39:35] [PASSED] res_missing_y_bpp
[11:39:35] [PASSED] res_bad_bpp
[11:39:35] [PASSED] res_bad_refresh
[11:39:35] [PASSED] res_bpp_refresh_force_on_off
[11:39:35] [PASSED] res_invalid_mode
[11:39:35] [PASSED] res_bpp_wrong_place_mode
[11:39:35] [PASSED] name_bpp_refresh
[11:39:35] [PASSED] name_refresh
[11:39:35] [PASSED] name_refresh_wrong_mode
[11:39:35] [PASSED] name_refresh_invalid_mode
[11:39:35] [PASSED] rotate_multiple
[11:39:35] [PASSED] rotate_invalid_val
[11:39:35] [PASSED] rotate_truncated
[11:39:35] [PASSED] invalid_option
[11:39:35] [PASSED] invalid_tv_option
[11:39:35] [PASSED] truncated_tv_option
[11:39:35] ============ [PASSED] drm_test_cmdline_invalid =============
[11:39:35] =============== drm_test_cmdline_tv_options  ===============
[11:39:35] [PASSED] NTSC
[11:39:35] [PASSED] NTSC_443
[11:39:35] [PASSED] NTSC_J
[11:39:35] [PASSED] PAL
[11:39:35] [PASSED] PAL_M
[11:39:35] [PASSED] PAL_N
[11:39:35] [PASSED] SECAM
[11:39:35] [PASSED] MONO_525
[11:39:35] [PASSED] MONO_625
[11:39:35] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:39:35] =============== [PASSED] drm_cmdline_parser ================
[11:39:35] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:39:35] [PASSED] drm_test_connector_hdmi_init_valid
[11:39:35] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:39:35] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:39:35] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:39:35] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:39:35] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:39:35] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:39:35] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:39:35] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[11:39:35] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:39:35] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:39:35] [PASSED] supported_formats=0x3 yuv420_allowed=1
[11:39:35] [PASSED] supported_formats=0x3 yuv420_allowed=0
[11:39:35] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:39:35] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:39:35] [PASSED] drm_test_connector_hdmi_init_null_product
[11:39:35] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:39:35] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:39:35] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:39:35] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:39:35] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:39:35] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:39:35] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:39:35] ========= drm_test_connector_hdmi_init_type_valid  =========
[11:39:35] [PASSED] HDMI-A
[11:39:35] [PASSED] HDMI-B
[11:39:35] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:39:35] ======== drm_test_connector_hdmi_init_type_invalid  ========
[11:39:35] [PASSED] Unknown
[11:39:35] [PASSED] VGA
[11:39:35] [PASSED] DVI-I
[11:39:35] [PASSED] DVI-D
[11:39:35] [PASSED] DVI-A
[11:39:35] [PASSED] Composite
[11:39:35] [PASSED] SVIDEO
[11:39:35] [PASSED] LVDS
[11:39:35] [PASSED] Component
[11:39:35] [PASSED] DIN
[11:39:35] [PASSED] DP
[11:39:35] [PASSED] TV
[11:39:35] [PASSED] eDP
[11:39:35] [PASSED] Virtual
[11:39:35] [PASSED] DSI
[11:39:35] [PASSED] DPI
[11:39:35] [PASSED] Writeback
[11:39:35] [PASSED] SPI
[11:39:35] [PASSED] USB
[11:39:35] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:39:35] ============ [PASSED] drmm_connector_hdmi_init =============
[11:39:35] ============= drmm_connector_init (3 subtests) =============
[11:39:35] [PASSED] drm_test_drmm_connector_init
[11:39:35] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:39:35] ========= drm_test_drmm_connector_init_type_valid  =========
[11:39:35] [PASSED] Unknown
[11:39:35] [PASSED] VGA
[11:39:35] [PASSED] DVI-I
[11:39:35] [PASSED] DVI-D
[11:39:35] [PASSED] DVI-A
[11:39:35] [PASSED] Composite
[11:39:35] [PASSED] SVIDEO
[11:39:35] [PASSED] LVDS
[11:39:35] [PASSED] Component
[11:39:35] [PASSED] DIN
[11:39:35] [PASSED] DP
[11:39:35] [PASSED] HDMI-A
[11:39:35] [PASSED] HDMI-B
[11:39:35] [PASSED] TV
[11:39:35] [PASSED] eDP
[11:39:35] [PASSED] Virtual
[11:39:35] [PASSED] DSI
[11:39:35] [PASSED] DPI
[11:39:35] [PASSED] Writeback
[11:39:35] [PASSED] SPI
[11:39:35] [PASSED] USB
[11:39:35] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:39:35] =============== [PASSED] drmm_connector_init ===============
[11:39:35] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_init
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:39:35] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[11:39:35] [PASSED] Unknown
[11:39:35] [PASSED] VGA
[11:39:35] [PASSED] DVI-I
[11:39:35] [PASSED] DVI-D
[11:39:35] [PASSED] DVI-A
[11:39:35] [PASSED] Composite
[11:39:35] [PASSED] SVIDEO
[11:39:35] [PASSED] LVDS
[11:39:35] [PASSED] Component
[11:39:35] [PASSED] DIN
[11:39:35] [PASSED] DP
[11:39:35] [PASSED] HDMI-A
[11:39:35] [PASSED] HDMI-B
[11:39:35] [PASSED] TV
[11:39:35] [PASSED] eDP
[11:39:35] [PASSED] Virtual
[11:39:35] [PASSED] DSI
[11:39:35] [PASSED] DPI
[11:39:35] [PASSED] Writeback
[11:39:35] [PASSED] SPI
[11:39:35] [PASSED] USB
[11:39:35] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:39:35] ======== drm_test_drm_connector_dynamic_init_name  =========
[11:39:35] [PASSED] Unknown
[11:39:35] [PASSED] VGA
[11:39:35] [PASSED] DVI-I
[11:39:35] [PASSED] DVI-D
[11:39:35] [PASSED] DVI-A
[11:39:35] [PASSED] Composite
[11:39:35] [PASSED] SVIDEO
[11:39:35] [PASSED] LVDS
[11:39:35] [PASSED] Component
[11:39:35] [PASSED] DIN
[11:39:35] [PASSED] DP
[11:39:35] [PASSED] HDMI-A
[11:39:35] [PASSED] HDMI-B
[11:39:35] [PASSED] TV
[11:39:35] [PASSED] eDP
[11:39:35] [PASSED] Virtual
[11:39:35] [PASSED] DSI
[11:39:35] [PASSED] DPI
[11:39:35] [PASSED] Writeback
[11:39:35] [PASSED] SPI
[11:39:35] [PASSED] USB
[11:39:35] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:39:35] =========== [PASSED] drm_connector_dynamic_init ============
[11:39:35] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:39:35] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:39:35] ======= drm_connector_dynamic_register (7 subtests) ========
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:39:35] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:39:35] ========= [PASSED] drm_connector_dynamic_register ==========
[11:39:35] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:39:35] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:39:35] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:39:35] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:39:35] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:39:35] ========== drm_test_get_tv_mode_from_name_valid  ===========
[11:39:35] [PASSED] NTSC
[11:39:35] [PASSED] NTSC-443
[11:39:35] [PASSED] NTSC-J
[11:39:35] [PASSED] PAL
[11:39:35] [PASSED] PAL-M
[11:39:35] [PASSED] PAL-N
[11:39:35] [PASSED] SECAM
[11:39:35] [PASSED] Mono
[11:39:35] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:39:35] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:39:35] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:39:35] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:39:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:39:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:39:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:39:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:39:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:39:35] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:39:35] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[11:39:35] [PASSED] VIC 96
[11:39:35] [PASSED] VIC 97
[11:39:35] [PASSED] VIC 101
[11:39:35] [PASSED] VIC 102
[11:39:35] [PASSED] VIC 106
[11:39:35] [PASSED] VIC 107
[11:39:35] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:39:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:39:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:39:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:39:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:39:35] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:39:35] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:39:35] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:39:35] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[11:39:35] [PASSED] Automatic
[11:39:35] [PASSED] Full
[11:39:35] [PASSED] Limited 16:235
[11:39:35] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:39:35] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:39:35] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:39:35] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:39:35] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[11:39:35] [PASSED] RGB
[11:39:35] [PASSED] YUV 4:2:0
[11:39:35] [PASSED] YUV 4:2:2
[11:39:35] [PASSED] YUV 4:4:4
[11:39:35] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:39:35] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:39:35] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:39:35] ============= drm_damage_helper (21 subtests) ==============
[11:39:35] [PASSED] drm_test_damage_iter_no_damage
[11:39:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:39:35] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:39:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:39:35] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:39:35] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:39:35] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:39:35] [PASSED] drm_test_damage_iter_simple_damage
[11:39:35] [PASSED] drm_test_damage_iter_single_damage
[11:39:35] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:39:35] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:39:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:39:35] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:39:35] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:39:35] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:39:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:39:35] [PASSED] drm_test_damage_iter_damage
[11:39:35] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:39:35] [PASSED] drm_test_damage_iter_damage_one_outside
[11:39:35] [PASSED] drm_test_damage_iter_damage_src_moved
[11:39:35] [PASSED] drm_test_damage_iter_damage_not_visible
[11:39:35] ================ [PASSED] drm_damage_helper ================
[11:39:35] ============== drm_dp_mst_helper (3 subtests) ==============
[11:39:35] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[11:39:35] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:39:35] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:39:35] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:39:35] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:39:35] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:39:35] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:39:35] ============== drm_test_dp_mst_calc_pbn_div  ===============
[11:39:35] [PASSED] Link rate 2000000 lane count 4
[11:39:35] [PASSED] Link rate 2000000 lane count 2
[11:39:35] [PASSED] Link rate 2000000 lane count 1
[11:39:35] [PASSED] Link rate 1350000 lane count 4
[11:39:35] [PASSED] Link rate 1350000 lane count 2
[11:39:35] [PASSED] Link rate 1350000 lane count 1
[11:39:35] [PASSED] Link rate 1000000 lane count 4
[11:39:35] [PASSED] Link rate 1000000 lane count 2
[11:39:35] [PASSED] Link rate 1000000 lane count 1
[11:39:35] [PASSED] Link rate 810000 lane count 4
[11:39:35] [PASSED] Link rate 810000 lane count 2
[11:39:35] [PASSED] Link rate 810000 lane count 1
[11:39:35] [PASSED] Link rate 540000 lane count 4
[11:39:35] [PASSED] Link rate 540000 lane count 2
[11:39:35] [PASSED] Link rate 540000 lane count 1
[11:39:35] [PASSED] Link rate 270000 lane count 4
[11:39:35] [PASSED] Link rate 270000 lane count 2
[11:39:35] [PASSED] Link rate 270000 lane count 1
[11:39:35] [PASSED] Link rate 162000 lane count 4
[11:39:35] [PASSED] Link rate 162000 lane count 2
[11:39:35] [PASSED] Link rate 162000 lane count 1
[11:39:35] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:39:35] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[11:39:35] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:39:35] [PASSED] DP_POWER_UP_PHY with port number
[11:39:35] [PASSED] DP_POWER_DOWN_PHY with port number
[11:39:35] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:39:35] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:39:35] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:39:35] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:39:35] [PASSED] DP_QUERY_PAYLOAD with port number
[11:39:35] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:39:35] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:39:35] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:39:35] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:39:35] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:39:35] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:39:35] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:39:35] [PASSED] DP_REMOTE_I2C_READ with port number
[11:39:35] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:39:35] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:39:35] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:39:35] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:39:35] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:39:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:39:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:39:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:39:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:39:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:39:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:39:35] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:39:35] ================ [PASSED] drm_dp_mst_helper ================
[11:39:35] ================== drm_exec (7 subtests) ===================
[11:39:35] [PASSED] sanitycheck
[11:39:35] [PASSED] test_lock
[11:39:35] [PASSED] test_lock_unlock
[11:39:35] [PASSED] test_duplicates
[11:39:35] [PASSED] test_prepare
[11:39:35] [PASSED] test_prepare_array
[11:39:35] [PASSED] test_multiple_loops
[11:39:35] ==================== [PASSED] drm_exec =====================
[11:39:35] =========== drm_format_helper_test (17 subtests) ===========
[11:39:35] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:39:35] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:39:35] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:39:35] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:39:35] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:39:35] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:39:35] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:39:35] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:39:35] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:39:35] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:39:35] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:39:35] ============== drm_test_fb_xrgb8888_to_mono  ===============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:39:35] ==================== drm_test_fb_swab  =====================
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ================ [PASSED] drm_test_fb_swab =================
[11:39:35] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:39:35] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[11:39:35] [PASSED] single_pixel_source_buffer
[11:39:35] [PASSED] single_pixel_clip_rectangle
[11:39:35] [PASSED] well_known_colors
[11:39:35] [PASSED] destination_pitch
[11:39:35] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:39:35] ================= drm_test_fb_clip_offset  =================
[11:39:35] [PASSED] pass through
[11:39:35] [PASSED] horizontal offset
[11:39:35] [PASSED] vertical offset
[11:39:35] [PASSED] horizontal and vertical offset
[11:39:35] [PASSED] horizontal offset (custom pitch)
[11:39:35] [PASSED] vertical offset (custom pitch)
[11:39:35] [PASSED] horizontal and vertical offset (custom pitch)
[11:39:35] ============= [PASSED] drm_test_fb_clip_offset =============
[11:39:35] =================== drm_test_fb_memcpy  ====================
[11:39:35] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:39:35] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:39:35] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:39:35] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:39:35] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:39:35] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:39:35] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:39:35] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:39:35] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:39:35] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:39:35] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:39:35] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:39:35] =============== [PASSED] drm_test_fb_memcpy ================
[11:39:35] ============= [PASSED] drm_format_helper_test ==============
[11:39:35] ================= drm_format (18 subtests) =================
[11:39:35] [PASSED] drm_test_format_block_width_invalid
[11:39:35] [PASSED] drm_test_format_block_width_one_plane
[11:39:35] [PASSED] drm_test_format_block_width_two_plane
[11:39:35] [PASSED] drm_test_format_block_width_three_plane
[11:39:35] [PASSED] drm_test_format_block_width_tiled
[11:39:35] [PASSED] drm_test_format_block_height_invalid
[11:39:35] [PASSED] drm_test_format_block_height_one_plane
[11:39:35] [PASSED] drm_test_format_block_height_two_plane
[11:39:35] [PASSED] drm_test_format_block_height_three_plane
[11:39:35] [PASSED] drm_test_format_block_height_tiled
[11:39:35] [PASSED] drm_test_format_min_pitch_invalid
[11:39:35] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:39:35] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:39:35] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:39:35] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:39:35] [PASSED] drm_test_format_min_pitch_two_plane
[11:39:35] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:39:35] [PASSED] drm_test_format_min_pitch_tiled
[11:39:35] =================== [PASSED] drm_format ====================
[11:39:35] ============== drm_framebuffer (10 subtests) ===============
[11:39:35] ========== drm_test_framebuffer_check_src_coords  ==========
[11:39:35] [PASSED] Success: source fits into fb
[11:39:35] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:39:35] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:39:35] [PASSED] Fail: overflowing fb with source width
[11:39:35] [PASSED] Fail: overflowing fb with source height
[11:39:35] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:39:35] [PASSED] drm_test_framebuffer_cleanup
[11:39:35] =============== drm_test_framebuffer_create  ===============
[11:39:35] [PASSED] ABGR8888 normal sizes
[11:39:35] [PASSED] ABGR8888 max sizes
[11:39:35] [PASSED] ABGR8888 pitch greater than min required
[11:39:35] [PASSED] ABGR8888 pitch less than min required
[11:39:35] [PASSED] ABGR8888 Invalid width
[11:39:35] [PASSED] ABGR8888 Invalid buffer handle
[11:39:35] [PASSED] No pixel format
[11:39:35] [PASSED] ABGR8888 Width 0
[11:39:35] [PASSED] ABGR8888 Height 0
[11:39:35] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:39:35] [PASSED] ABGR8888 Large buffer offset
[11:39:35] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:39:35] [PASSED] ABGR8888 Invalid flag
[11:39:35] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:39:35] [PASSED] ABGR8888 Valid buffer modifier
[11:39:35] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:39:35] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:39:35] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:39:35] [PASSED] NV12 Normal sizes
[11:39:35] [PASSED] NV12 Max sizes
[11:39:35] [PASSED] NV12 Invalid pitch
[11:39:35] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:39:35] [PASSED] NV12 different  modifier per-plane
[11:39:35] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:39:35] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:39:35] [PASSED] NV12 Modifier for inexistent plane
[11:39:35] [PASSED] NV12 Handle for inexistent plane
[11:39:35] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:39:35] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:39:35] [PASSED] YVU420 Normal sizes
[11:39:35] [PASSED] YVU420 Max sizes
[11:39:35] [PASSED] YVU420 Invalid pitch
[11:39:35] [PASSED] YVU420 Different pitches
[11:39:35] [PASSED] YVU420 Different buffer offsets/pitches
[11:39:35] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:39:35] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:39:35] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:39:35] [PASSED] YVU420 Valid modifier
[11:39:35] [PASSED] YVU420 Different modifiers per plane
[11:39:35] [PASSED] YVU420 Modifier for inexistent plane
[11:39:35] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:39:35] [PASSED] X0L2 Normal sizes
[11:39:35] [PASSED] X0L2 Max sizes
[11:39:35] [PASSED] X0L2 Invalid pitch
[11:39:35] [PASSED] X0L2 Pitch greater than minimum required
[11:39:35] [PASSED] X0L2 Handle for inexistent plane
[11:39:35] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:39:35] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:39:35] [PASSED] X0L2 Valid modifier
[11:39:35] [PASSED] X0L2 Modifier for inexistent plane
[11:39:35] =========== [PASSED] drm_test_framebuffer_create ===========
[11:39:35] [PASSED] drm_test_framebuffer_free
[11:39:35] [PASSED] drm_test_framebuffer_init
[11:39:35] [PASSED] drm_test_framebuffer_init_bad_format
[11:39:35] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:39:35] [PASSED] drm_test_framebuffer_lookup
[11:39:35] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:39:35] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:39:35] ================= [PASSED] drm_framebuffer =================
[11:39:35] ================ drm_gem_shmem (8 subtests) ================
[11:39:35] [PASSED] drm_gem_shmem_test_obj_create
[11:39:35] [PASSED] drm_gem_shmem_test_obj_create_private
[11:39:35] [PASSED] drm_gem_shmem_test_pin_pages
[11:39:35] [PASSED] drm_gem_shmem_test_vmap
[11:39:35] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:39:35] [PASSED] drm_gem_shmem_test_get_sg_table
[11:39:35] [PASSED] drm_gem_shmem_test_madvise
[11:39:35] [PASSED] drm_gem_shmem_test_purge
[11:39:35] ================== [PASSED] drm_gem_shmem ==================
[11:39:35] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[11:39:35] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:39:35] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:39:35] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:39:35] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:39:35] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:39:35] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:39:35] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[11:39:35] [PASSED] Automatic
[11:39:35] [PASSED] Full
[11:39:35] [PASSED] Limited 16:235
[11:39:35] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:39:35] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:39:35] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:39:35] [PASSED] drm_test_check_disable_connector
[11:39:35] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:39:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:39:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:39:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:39:35] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:39:35] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:39:35] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:39:35] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:39:35] [PASSED] drm_test_check_output_bpc_dvi
[11:39:35] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:39:35] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:39:35] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:39:35] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:39:35] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:39:35] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:39:35] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:39:35] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:39:35] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:39:35] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:39:35] [PASSED] drm_test_check_broadcast_rgb_value
[11:39:35] [PASSED] drm_test_check_bpc_8_value
[11:39:35] [PASSED] drm_test_check_bpc_10_value
[11:39:35] [PASSED] drm_test_check_bpc_12_value
[11:39:35] [PASSED] drm_test_check_format_value
[11:39:35] [PASSED] drm_test_check_tmds_char_value
[11:39:35] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:39:35] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[11:39:35] [PASSED] drm_test_check_mode_valid
[11:39:35] [PASSED] drm_test_check_mode_valid_reject
[11:39:35] [PASSED] drm_test_check_mode_valid_reject_rate
[11:39:35] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:39:35] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:39:35] ================= drm_managed (2 subtests) =================
[11:39:35] [PASSED] drm_test_managed_release_action
[11:39:35] [PASSED] drm_test_managed_run_action
[11:39:35] =================== [PASSED] drm_managed ===================
[11:39:35] =================== drm_mm (6 subtests) ====================
[11:39:35] [PASSED] drm_test_mm_init
[11:39:35] [PASSED] drm_test_mm_debug
[11:39:35] [PASSED] drm_test_mm_align32
[11:39:35] [PASSED] drm_test_mm_align64
[11:39:35] [PASSED] drm_test_mm_lowest
[11:39:35] [PASSED] drm_test_mm_highest
[11:39:35] ===================== [PASSED] drm_mm ======================
[11:39:35] ============= drm_modes_analog_tv (5 subtests) =============
[11:39:35] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:39:35] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:39:35] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:39:35] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:39:35] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:39:35] =============== [PASSED] drm_modes_analog_tv ===============
[11:39:35] ============== drm_plane_helper (2 subtests) ===============
[11:39:35] =============== drm_test_check_plane_state  ================
[11:39:35] [PASSED] clipping_simple
[11:39:35] [PASSED] clipping_rotate_reflect
[11:39:35] [PASSED] positioning_simple
[11:39:35] [PASSED] upscaling
[11:39:35] [PASSED] downscaling
[11:39:35] [PASSED] rounding1
[11:39:35] [PASSED] rounding2
[11:39:35] [PASSED] rounding3
[11:39:35] [PASSED] rounding4
[11:39:35] =========== [PASSED] drm_test_check_plane_state ============
[11:39:35] =========== drm_test_check_invalid_plane_state  ============
[11:39:35] [PASSED] positioning_invalid
[11:39:35] [PASSED] upscaling_invalid
[11:39:35] [PASSED] downscaling_invalid
[11:39:35] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:39:35] ================ [PASSED] drm_plane_helper =================
[11:39:35] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:39:35] ====== drm_test_connector_helper_tv_get_modes_check  =======
[11:39:35] [PASSED] None
[11:39:35] [PASSED] PAL
[11:39:35] [PASSED] NTSC
[11:39:35] [PASSED] Both, NTSC Default
[11:39:35] [PASSED] Both, PAL Default
[11:39:35] [PASSED] Both, NTSC Default, with PAL on command-line
[11:39:35] [PASSED] Both, PAL Default, with NTSC on command-line
[11:39:35] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:39:35] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:39:35] ================== drm_rect (9 subtests) ===================
[11:39:35] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:39:35] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:39:35] [PASSED] drm_test_rect_clip_scaled_clipped
[11:39:35] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:39:35] ================= drm_test_rect_intersect  =================
[11:39:35] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:39:35] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:39:35] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:39:35] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:39:35] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:39:35] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:39:35] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:39:35] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:39:35] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:39:35] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:39:35] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:39:35] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:39:35] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:39:35] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:39:35] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:39:35] ============= [PASSED] drm_test_rect_intersect =============
[11:39:35] ================ drm_test_rect_calc_hscale  ================
[11:39:35] [PASSED] normal use
[11:39:35] [PASSED] out of max range
[11:39:35] [PASSED] out of min range
[11:39:35] [PASSED] zero dst
[11:39:35] [PASSED] negative src
[11:39:35] [PASSED] negative dst
[11:39:35] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:39:35] ================ drm_test_rect_calc_vscale  ================
[11:39:35] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[11:39:35] [PASSED] out of max range
[11:39:35] [PASSED] out of min range
[11:39:35] [PASSED] zero dst
[11:39:35] [PASSED] negative src
[11:39:35] [PASSED] negative dst
[11:39:35] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:39:35] ================== drm_test_rect_rotate  ===================
[11:39:35] [PASSED] reflect-x
[11:39:35] [PASSED] reflect-y
[11:39:35] [PASSED] rotate-0
[11:39:35] [PASSED] rotate-90
[11:39:35] [PASSED] rotate-180
[11:39:35] [PASSED] rotate-270
[11:39:35] ============== [PASSED] drm_test_rect_rotate ===============
[11:39:35] ================ drm_test_rect_rotate_inv  =================
[11:39:35] [PASSED] reflect-x
[11:39:35] [PASSED] reflect-y
[11:39:35] [PASSED] rotate-0
[11:39:35] [PASSED] rotate-90
[11:39:35] [PASSED] rotate-180
[11:39:35] [PASSED] rotate-270
[11:39:35] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:39:35] ==================== [PASSED] drm_rect =====================
[11:39:35] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:39:35] ============ drm_test_sysfb_build_fourcc_list  =============
[11:39:35] [PASSED] no native formats
[11:39:35] [PASSED] XRGB8888 as native format
[11:39:35] [PASSED] remove duplicates
[11:39:35] [PASSED] convert alpha formats
[11:39:35] [PASSED] random formats
[11:39:35] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:39:35] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:39:35] ================== drm_fixp (2 subtests) ===================
[11:39:35] [PASSED] drm_test_int2fixp
[11:39:35] [PASSED] drm_test_sm2fixp
[11:39:35] ==================== [PASSED] drm_fixp =====================
[11:39:35] ============================================================
[11:39:35] Testing complete. Ran 624 tests: passed: 624
[11:39:35] Elapsed time: 27.437s total, 1.644s configuring, 25.374s building, 0.384s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:39:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:39:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:39:46] Starting KUnit Kernel (1/1)...
[11:39:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:39:46] ================= ttm_device (5 subtests) ==================
[11:39:46] [PASSED] ttm_device_init_basic
[11:39:46] [PASSED] ttm_device_init_multiple
[11:39:46] [PASSED] ttm_device_fini_basic
[11:39:46] [PASSED] ttm_device_init_no_vma_man
[11:39:46] ================== ttm_device_init_pools  ==================
[11:39:46] [PASSED] No DMA allocations, no DMA32 required
[11:39:46] [PASSED] DMA allocations, DMA32 required
[11:39:46] [PASSED] No DMA allocations, DMA32 required
[11:39:46] [PASSED] DMA allocations, no DMA32 required
[11:39:46] ============== [PASSED] ttm_device_init_pools ==============
[11:39:46] =================== [PASSED] ttm_device ====================
[11:39:46] ================== ttm_pool (8 subtests) ===================
[11:39:46] ================== ttm_pool_alloc_basic  ===================
[11:39:46] [PASSED] One page
[11:39:46] [PASSED] More than one page
[11:39:46] [PASSED] Above the allocation limit
[11:39:46] [PASSED] One page, with coherent DMA mappings enabled
[11:39:46] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:39:46] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:39:46] ============== ttm_pool_alloc_basic_dma_addr  ==============
[11:39:46] [PASSED] One page
[11:39:46] [PASSED] More than one page
[11:39:46] [PASSED] Above the allocation limit
[11:39:46] [PASSED] One page, with coherent DMA mappings enabled
[11:39:46] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:39:46] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:39:46] [PASSED] ttm_pool_alloc_order_caching_match
[11:39:46] [PASSED] ttm_pool_alloc_caching_mismatch
[11:39:46] [PASSED] ttm_pool_alloc_order_mismatch
[11:39:46] [PASSED] ttm_pool_free_dma_alloc
[11:39:46] [PASSED] ttm_pool_free_no_dma_alloc
[11:39:46] [PASSED] ttm_pool_fini_basic
[11:39:46] ==================== [PASSED] ttm_pool =====================
[11:39:46] ================ ttm_resource (8 subtests) =================
[11:39:46] ================= ttm_resource_init_basic  =================
[11:39:46] [PASSED] Init resource in TTM_PL_SYSTEM
[11:39:46] [PASSED] Init resource in TTM_PL_VRAM
[11:39:46] [PASSED] Init resource in a private placement
[11:39:46] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:39:46] ============= [PASSED] ttm_resource_init_basic =============
[11:39:46] [PASSED] ttm_resource_init_pinned
[11:39:46] [PASSED] ttm_resource_fini_basic
[11:39:46] [PASSED] ttm_resource_manager_init_basic
[11:39:46] [PASSED] ttm_resource_manager_usage_basic
[11:39:46] [PASSED] ttm_resource_manager_set_used_basic
[11:39:46] [PASSED] ttm_sys_man_alloc_basic
[11:39:46] [PASSED] ttm_sys_man_free_basic
[11:39:46] ================== [PASSED] ttm_resource ===================
[11:39:46] =================== ttm_tt (15 subtests) ===================
[11:39:46] ==================== ttm_tt_init_basic  ====================
[11:39:46] [PASSED] Page-aligned size
[11:39:46] [PASSED] Extra pages requested
[11:39:46] ================ [PASSED] ttm_tt_init_basic ================
[11:39:46] [PASSED] ttm_tt_init_misaligned
[11:39:46] [PASSED] ttm_tt_fini_basic
[11:39:46] [PASSED] ttm_tt_fini_sg
[11:39:46] [PASSED] ttm_tt_fini_shmem
[11:39:46] [PASSED] ttm_tt_create_basic
[11:39:46] [PASSED] ttm_tt_create_invalid_bo_type
[11:39:46] [PASSED] ttm_tt_create_ttm_exists
[11:39:46] [PASSED] ttm_tt_create_failed
[11:39:46] [PASSED] ttm_tt_destroy_basic
[11:39:46] [PASSED] ttm_tt_populate_null_ttm
[11:39:46] [PASSED] ttm_tt_populate_populated_ttm
[11:39:46] [PASSED] ttm_tt_unpopulate_basic
[11:39:46] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:39:46] [PASSED] ttm_tt_swapin_basic
[11:39:46] ===================== [PASSED] ttm_tt ======================
[11:39:46] =================== ttm_bo (14 subtests) ===================
[11:39:46] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[11:39:46] [PASSED] Cannot be interrupted and sleeps
[11:39:46] [PASSED] Cannot be interrupted, locks straight away
[11:39:46] [PASSED] Can be interrupted, sleeps
[11:39:46] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:39:46] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:39:46] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:39:46] [PASSED] ttm_bo_reserve_double_resv
[11:39:46] [PASSED] ttm_bo_reserve_interrupted
[11:39:46] [PASSED] ttm_bo_reserve_deadlock
[11:39:46] [PASSED] ttm_bo_unreserve_basic
[11:39:46] [PASSED] ttm_bo_unreserve_pinned
[11:39:46] [PASSED] ttm_bo_unreserve_bulk
[11:39:46] [PASSED] ttm_bo_fini_basic
[11:39:46] [PASSED] ttm_bo_fini_shared_resv
[11:39:46] [PASSED] ttm_bo_pin_basic
[11:39:46] [PASSED] ttm_bo_pin_unpin_resource
[11:39:46] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:39:46] ===================== [PASSED] ttm_bo ======================
[11:39:46] ============== ttm_bo_validate (21 subtests) ===============
[11:39:46] ============== ttm_bo_init_reserved_sys_man  ===============
[11:39:46] [PASSED] Buffer object for userspace
[11:39:46] [PASSED] Kernel buffer object
[11:39:46] [PASSED] Shared buffer object
[11:39:46] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:39:46] ============== ttm_bo_init_reserved_mock_man  ==============
[11:39:46] [PASSED] Buffer object for userspace
[11:39:46] [PASSED] Kernel buffer object
[11:39:46] [PASSED] Shared buffer object
[11:39:46] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:39:46] [PASSED] ttm_bo_init_reserved_resv
[11:39:46] ================== ttm_bo_validate_basic  ==================
[11:39:46] [PASSED] Buffer object for userspace
[11:39:46] [PASSED] Kernel buffer object
[11:39:46] [PASSED] Shared buffer object
[11:39:46] ============== [PASSED] ttm_bo_validate_basic ==============
[11:39:46] [PASSED] ttm_bo_validate_invalid_placement
[11:39:46] ============= ttm_bo_validate_same_placement  ==============
[11:39:46] [PASSED] System manager
[11:39:46] [PASSED] VRAM manager
[11:39:46] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:39:46] [PASSED] ttm_bo_validate_failed_alloc
[11:39:46] [PASSED] ttm_bo_validate_pinned
[11:39:46] [PASSED] ttm_bo_validate_busy_placement
[11:39:46] ================ ttm_bo_validate_multihop  =================
[11:39:46] [PASSED] Buffer object for userspace
[11:39:46] [PASSED] Kernel buffer object
[11:39:46] [PASSED] Shared buffer object
[11:39:46] ============ [PASSED] ttm_bo_validate_multihop =============
[11:39:46] ========== ttm_bo_validate_no_placement_signaled  ==========
[11:39:46] [PASSED] Buffer object in system domain, no page vector
[11:39:46] [PASSED] Buffer object in system domain with an existing page vector
[11:39:46] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:39:46] ======== ttm_bo_validate_no_placement_not_signaled  ========
[11:39:46] [PASSED] Buffer object for userspace
[11:39:46] [PASSED] Kernel buffer object
[11:39:46] [PASSED] Shared buffer object
[11:39:46] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:39:46] [PASSED] ttm_bo_validate_move_fence_signaled
[11:39:46] ========= ttm_bo_validate_move_fence_not_signaled  =========
[11:39:46] [PASSED] Waits for GPU
[11:39:46] [PASSED] Tries to lock straight away
[11:39:46] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:39:46] [PASSED] ttm_bo_validate_happy_evict
[11:39:46] [PASSED] ttm_bo_validate_all_pinned_evict
[11:39:46] [PASSED] ttm_bo_validate_allowed_only_evict
[11:39:46] [PASSED] ttm_bo_validate_deleted_evict
[11:39:46] [PASSED] ttm_bo_validate_busy_domain_evict
[11:39:46] [PASSED] ttm_bo_validate_evict_gutting
[11:39:46] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[11:39:46] ================= [PASSED] ttm_bo_validate =================
[11:39:46] ============================================================
[11:39:46] Testing complete. Ran 101 tests: passed: 101
[11:39:46] Elapsed time: 11.241s total, 1.641s configuring, 9.383s building, 0.188s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

Re: [PATCH 1/5] drm/i915/display: Abstract pipe/trans/cursor offset calculation

[Jani Nikula]

On Mon, 15 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Introduce INTEL_DISPLAY_DEVICE_*_OFFSET() macros to compute absolute
> MMIO offsets for pipe, transcoder, and cursor registers.
>
> Update _MMIO_PIPE2/_MMIO_TRANS2/_MMIO_CURSOR2 to use these macros
> for cleaner abstraction and to prepare for external API usage (e.g. GVT).
>
> Also move DISPLAY_MMIO_BASE() to intel_display_device.h so it can be
> abstracted in GVT, allowing register macros to resolve via
> exported helpers rather than peeking into struct intel_display.
>
> Suggested-by: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_device.h | 17 +++++++++++++++++
>  .../drm/i915/display/intel_display_reg_defs.h   | 15 ++++-----------
>  2 files changed, 21 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 50b2e9ae2c18..05bba7a9899a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -260,6 +260,23 @@ struct intel_display_platforms {
>  	 ((id) == ARLS_HOST_BRIDGE_PCI_ID3) || \
>  	 ((id) == ARLS_HOST_BRIDGE_PCI_ID4))
>  
> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
> +	(DISPLAY_INFO(display)->pipe_offsets[(pipe)] - \
> +	 DISPLAY_INFO(display)->pipe_offsets[PIPE_A] + \
> +	 DISPLAY_MMIO_BASE(display))
> +
> +#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
> +	(DISPLAY_INFO(display)->trans_offsets[(trans)] - \
> +	 DISPLAY_INFO(display)->trans_offsets[TRANSCODER_A] + \
> +	 DISPLAY_MMIO_BASE(display))
> +
> +#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
> +	(DISPLAY_INFO(display)->cursor_offsets[(pipe)] - \
> +	 DISPLAY_INFO(display)->cursor_offsets[PIPE_A] + \
> +	 DISPLAY_MMIO_BASE(display))
> +
> +#define DISPLAY_MMIO_BASE(dev_priv)	(DISPLAY_INFO(dev_priv)->mmio_offset)

Please s/dev_priv/display/ while at it.

> +
>  struct intel_display_runtime_info {
>  	struct intel_display_ip_ver {
>  		u16 ver;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
> index b83ad06f2ea7..74f572d3a202 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
> @@ -8,8 +8,6 @@
>  
>  #include "i915_reg_defs.h"
>  
> -#define DISPLAY_MMIO_BASE(dev_priv)	(DISPLAY_INFO(dev_priv)->mmio_offset)
> -
>  #define VLV_DISPLAY_BASE		0x180000
>  
>  /*
> @@ -36,14 +34,9 @@
>   * Device info offset array based helpers for groups of registers with unevenly
>   * spaced base offsets.
>   */
> -#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(DISPLAY_INFO(display)->pipe_offsets[(pipe)] - \
> -						      DISPLAY_INFO(display)->pipe_offsets[PIPE_A] + \
> -						      DISPLAY_MMIO_BASE(display) + (reg))
> -#define _MMIO_TRANS2(display, tran, reg)	_MMIO(DISPLAY_INFO(display)->trans_offsets[(tran)] - \
> -						      DISPLAY_INFO(display)->trans_offsets[TRANSCODER_A] + \
> -						      DISPLAY_MMIO_BASE(display) + (reg))
> -#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(DISPLAY_INFO(display)->cursor_offsets[(pipe)] - \
> -						      DISPLAY_INFO(display)->cursor_offsets[PIPE_A] + \
> -						      DISPLAY_MMIO_BASE(display) + (reg))
> +
> +#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) + (reg))
> +#define _MMIO_TRANS2(display, trans, reg)	_MMIO(INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) + (reg))
> +#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) + (reg))

Please wrap the macro argument usage in parenthesis, even if not
strictly needed here. IMO it's just good code hygiene, and sets the
example.

With these fixed,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


BR,
Jani.

>  
>  #endif /* __INTEL_DISPLAY_REG_DEFS_H__ */

-- 
Jani Nikula, Intel

Re: [PATCH 2/5] drm/i915/display: Add APIs to be used by gvt to get the register offsets

[Jani Nikula]

On Mon, 15 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> GVT code uses macros for register offsets that require display internal
> structures. This makes clean separation of display code and
> modularization difficult.
>
> Introduce APIs to abstract offset calculations:
> - intel_display_device_pipe_offset()
> - intel_display_device_trans_offset()
> - intel_display_device_cursor_offset()
> - intel_display_device_mmio_base()
>
> These APIs return absolute base offsets for the respective register
> groups, allowing GVT to compute MMIO addresses without using internal
> macros or struct fields. This prepares the path to separate
> display-dependent code from i915/gvt/*.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

I think we'll probably need to unify the naming for other display
exports in the future, as well as make the exports namespaced. But seems
good enough for now,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> ---
>  drivers/gpu/drm/i915/Makefile                 |  1 +
>  .../drm/i915/display/intel_display_limits.c   |  0
>  drivers/gpu/drm/i915/display/intel_gvt_api.c  | 34 +++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_gvt_api.h  | 20 +++++++++++
>  4 files changed, 55 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index f01b5d8a07c7..7974f017f263 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -360,6 +360,7 @@ i915-y += \
>  	display/intel_dvo.o \
>  	display/intel_encoder.o \
>  	display/intel_gmbus.o \
> +	display/intel_gvt_api.o \
>  	display/intel_hdmi.o \
>  	display/intel_lspcon.o \
>  	display/intel_lt_phy.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.c b/drivers/gpu/drm/i915/display/intel_display_limits.c
> new file mode 100644
> index 000000000000..e69de29bb2d1
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> new file mode 100644
> index 000000000000..8abea318fbc2
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> @@ -0,0 +1,34 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#include <linux/types.h>
> +
> +#include "intel_display_core.h"
> +#include "intel_display_regs.h"
> +#include "intel_gvt_api.h"
> +
> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe)
> +{
> +	return INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_pipe_offset);
> +
> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans)
> +{
> +	return INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_trans_offset);
> +
> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe)
> +{
> +	return INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_cursor_offset);
> +
> +u32 intel_display_device_mmio_base(struct intel_display *display)
> +{
> +	return DISPLAY_MMIO_BASE(display);
> +}
> +EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> new file mode 100644
> index 000000000000..e9a1122a988d
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> @@ -0,0 +1,20 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef __INTEL_GVT_API_H__
> +#define __INTEL_GVT_API_H__
> +
> +#include <linux/types.h>
> +
> +enum pipe;
> +enum transcoder;
> +struct intel_display;
> +
> +u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pipe);
> +u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
> +u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
> +u32 intel_display_device_mmio_base(struct intel_display *display);
> +
> +#endif /* __INTEL_GVT_API_H__ */

-- 
Jani Nikula, Intel

Re: [PATCH 3/5] drm/i915/gvt: Add header to use display offset functions in macros

[Jani Nikula]

On Mon, 15 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Introduce gvt/display_helpers.h to make DISPLAY_MMIO_BASE and
> INTEL_DISPLAY_DEVICE_*_OFFSET macros call exported display functions.
> This lets GVT keep using existing register macros (e.g.,
> TRANSCONF(display, pipe)) while ensuring offset calculations happen
> through functions instead of accessing display internals.
>
> Include gvt/display_helpers.h after display headers to avoid
> conflicts.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/cmd_parser.c      |  2 ++
>  drivers/gpu/drm/i915/gvt/display.c         |  2 ++
>  drivers/gpu/drm/i915/gvt/display_helpers.h | 39 ++++++++++++++++++++++
>  drivers/gpu/drm/i915/gvt/fb_decoder.c      |  2 ++
>  drivers/gpu/drm/i915/gvt/handlers.c        |  2 ++
>  5 files changed, 47 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h
>
> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> index df04e4ead8ea..6b5e18fca403 100644
> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> @@ -59,6 +59,8 @@
>  #include "gem/i915_gem_pm.h"
>  #include "gt/intel_context.h"
>  
> +#include "gvt/display_helpers.h"

None of these includes need the gvt/ prefix as they're in the same
subdirectory.

> +
>  #define INVALID_OP    (~0U)
>  
>  #define OP_LEN_MI           9
> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
> index 06517d1f07a2..7a51c13b9b58 100644
> --- a/drivers/gpu/drm/i915/gvt/display.c
> +++ b/drivers/gpu/drm/i915/gvt/display.c
> @@ -49,6 +49,8 @@
>  #include "display/intel_dpio_phy.h"
>  #include "display/intel_sprite_regs.h"
>  
> +#include "gvt/display_helpers.h"
> +
>  static int get_edp_pipe(struct intel_vgpu *vgpu)
>  {
>  	u32 data = vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP);
> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
> new file mode 100644
> index 000000000000..6f68a1e8751a
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
> @@ -0,0 +1,39 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef __DISPLAY_HELPERS_H__
> +#define __DISPLAY_HELPERS_H__
> +
> +#include "display/intel_gvt_api.h"
> +
> +enum pipe;
> +enum trans;
> +struct display;
> +
> +#ifdef DISPLAY_MMIO_BASE

Ideally, we shouldn't need these ifdefs. I think it's better if we can
drop any includes from gvt that would cause a conflict here, and it's
better to get the build failure.

If we can't do that in this patch already, then please drop the relevant
includes and these ifdefs at the end of the series.

BR,
Jani.

> +#undef DISPLAY_MMIO_BASE
> +#endif
> +#define DISPLAY_MMIO_BASE(display) \
> +	intel_display_device_mmio_base((display))
> +
> +#ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
> +#undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
> +#endif
> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
> +	intel_display_device_pipe_offset((display), (pipe))
> +
> +#ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
> +#undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
> +#endif
> +#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
> +	intel_display_device_trans_offset((display), (trans))
> +
> +#ifdef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
> +#undef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
> +#endif
> +#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
> +	intel_display_device_cursor_offset((display), (pipe))
> +
> +#endif /* __DISPLAY_HELPERS_H__ */
> diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
> index a8079cfa8e1d..ee4213fa2cda 100644
> --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
> +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
> @@ -47,6 +47,8 @@
>  #include "display/intel_sprite_regs.h"
>  #include "display/skl_universal_plane_regs.h"
>  
> +#include "gvt/display_helpers.h"
> +
>  #define PRIMARY_FORMAT_NUM	16
>  struct pixel_format {
>  	int drm_format;	/* Pixel format in DRM definition */
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index 36ea12ade849..3e58e35ea2b9 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -67,6 +67,8 @@
>  #include "gt/intel_gt_regs.h"
>  #include <linux/vmalloc.h>
>  
> +#include "gvt/display_helpers.h"
> +
>  /* XXX FIXME i915 has changed PP_XXX definition */
>  #define PCH_PP_STATUS  _MMIO(0xc7200)
>  #define PCH_PP_CONTROL _MMIO(0xc7204)

-- 
Jani Nikula, Intel

✗ CI.checksparse: warning for Prepare GVT for display modularization

[Patchwork]

== Series Details ==

Series: Prepare GVT for display modularization
URL   : https://patchwork.freedesktop.org/series/159008/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 05b7c58b3367dca84d4745dfcac3b5d4ee142404
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/g4x_dp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/g4x_hdmi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/hsw_ips.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/i9xx_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/i9xx_wm.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/icl_dsi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_dsi.h):
+drivers/gpu/drm/i915/display/intel_acpi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_atomic.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_audio.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_backlight.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_bios.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_bw.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_casf.c:147:21: error: too long token expansion
+drivers/gpu/drm/i915/display/intel_casf.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_color.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_color_pipeline.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_colorop.h):
+drivers/gpu/drm/i915/display/intel_combo_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_connector.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_crtc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_crt.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_crtc_state_dump.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_cursor.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_cx0_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dbuf_bw.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_debugfs.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_device.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_driver.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_irq.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_display_power.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_power_map.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_power_well.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_reset.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_display_rps.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dmc.c:131:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:134:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:137:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:140:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:143:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:146:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:149:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:153:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:154:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:157:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:160:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:163:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:166:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:170:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:174:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:178:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:182:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c:186:1: error: bad constant expression
+drivers/gpu/drm/i915/display/intel_dmc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_aux.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_hdcp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpio_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_link_training.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpll.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpll_mgr.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_mst.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpt.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dpt_common.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dp_test.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_drrs.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dsb.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dsi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_dsi.h):
+drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dsi_vbt.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_dvo.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_encoder.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fb_bo.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fbc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_fb.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fb_pin.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fdi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_fifo_underrun.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_flipq.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_frontbuffer.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_global_state.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_gmbus.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hdmi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_hotplug_irq.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_link_bw.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_load_detect.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_lspcon.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_lt_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_lvds.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_modeset_setup.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_modeset_verify.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_opregion.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_overlay.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_panel.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_pch_display.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pch_refclk.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pfit.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pipe_crc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_colorop.h):
+drivers/gpu/drm/i915/display/intel_plane_initial.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_pmdemand.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_quirks.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_sdvo.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_snps_phy.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_sprite.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_sprite_uapi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_tc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_tv.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vblank.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vdsc.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vga.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_vrr.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/intel_wm.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/skl_prefill.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/skl_scaler.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h, drivers/gpu/drm/i915/display/intel_display_trace.h):
+drivers/gpu/drm/i915/display/skl_universal_plane.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/skl_watermark.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_clock.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_dsi.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_dsi_pll.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/display/vlv_sideband.c: note: in included file (through drivers/gpu/drm/i915/display/intel_display_types.h):
+drivers/gpu/drm/i915/gt/intel_reset.c:1569:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:191:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:192:1: error: bad constant expression
+drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:193:1: error: bad constant expression
+drivers/gpu/drm/i915/i915_gpu_error.c:692:3: warning: symbol 'guc_hw_reg_state' was not declared. Should it be static?
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1931:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1932:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1933:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1998:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1999:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2000:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2020:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2021:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2022:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression
+./include/linux/pwm.h:13:1: error: bad constant expression

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

Re: [PATCH 4/5] drm/i915/gvt: Change for_each_pipe to use pipe_mask API

[Jani Nikula]

On Mon, 15 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Add a new API to get pipe_mask from DISPLAY_RUNTIME_INFO() for GVT.
> Update the for_each_pipe() macro in GVT to call this API, instead of
> accessing DISPLAY_RUNTIME_INFO()->pipe_mask directly.
>
> This keeps the macro usable in GVT without exposing display internals
> and prepares for display modularization.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_gvt_api.c | 6 ++++++
>  drivers/gpu/drm/i915/display/intel_gvt_api.h | 1 +
>  drivers/gpu/drm/i915/gvt/display_helpers.h   | 7 +++++++
>  3 files changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> index 8abea318fbc2..0b09bbf2c29a 100644
> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.c
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
> @@ -32,3 +32,9 @@ u32 intel_display_device_mmio_base(struct intel_display *display)
>  	return DISPLAY_MMIO_BASE(display);
>  }
>  EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
> +
> +u8 intel_display_runtime_info_pipe_mask(struct intel_display *display)
> +{
> +	return DISPLAY_RUNTIME_INFO(display)->pipe_mask;
> +}

I don't think gvt needs to know it's about "runtime info". Maybe make it
just intel_display_device_pipe_mask()?

Though I'm also wondering about making it even more abstracted with
something like intel_display_device_pipe_valid(), and using that for the
various other cases that check pipes in GVT. But maybe the patch at hand
is a good start.

> +EXPORT_SYMBOL_GPL(intel_display_runtime_info_pipe_mask);
> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> index e9a1122a988d..8ceda30a969b 100644
> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.h
> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
> @@ -16,5 +16,6 @@ u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pi
>  u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
>  u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
>  u32 intel_display_device_mmio_base(struct intel_display *display);
> +u8 intel_display_runtime_info_pipe_mask(struct intel_display *display);
>  
>  #endif /* __INTEL_GVT_API_H__ */
> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
> index 6f68a1e8751a..d11ebb03b946 100644
> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
> @@ -36,4 +36,11 @@ struct display;
>  #define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
>  	intel_display_device_cursor_offset((display), (pipe))
>  
> +#ifdef for_each_pipe

Ditto about ifdefs here as with previous patch.

> +#undef for_each_pipe
> +#endif
> +#define for_each_pipe(display, __p) \
> +	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
> +		for_each_if(intel_display_runtime_info_pipe_mask((display)) & BIT(__p))
> +
>  #endif /* __DISPLAY_HELPERS_H__ */

-- 
Jani Nikula, Intel

Re: [PATCH 5/5] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro

[Jani Nikula]

On Mon, 15 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> TRANSCONF() expands via _MMIO_PIPE2, i.e., it uses pipe-based addressing.
> In GVT, some call sites pass an enum transcoder to TRANSCONF(), which now
> routes through INTEL_DISPLAY_DEVICE_PIPE_OFFSET() and ultimately calls
> intel_display_device_pipe_offset(), whose parameter type is enum pipe.
>
> This results in -Werror=enum-conversion.
>
> To address this, cast the index to enum pipe in the GVT-side macro
> override.
>
> This works for all cases as TRANSCODER_{A,B,C,D} all have 1:1 mapping to
> PIPE_{A,B,C,D} except for TRANSCODER_EDP.
>
> There is one place which uses TRANSCONF() with TRANSCODER_EDP, which
> appears to be incorrect. In any case, the cast preserves the previous
> behaviour.

Maybe the question to ask is if TRANSCONF() using _MMIO_PIPE2() is
correct or not?

BR,
Jani.

>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/gvt/display_helpers.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
> index d11ebb03b946..fb75cc9f97cc 100644
> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
> @@ -21,8 +21,8 @@ struct display;
>  #ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>  #undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>  #endif
> -#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
> -	intel_display_device_pipe_offset((display), (pipe))
> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, idx) \
> +	intel_display_device_pipe_offset((display), (enum pipe)(idx))
>  
>  #ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
>  #undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET

-- 
Jani Nikula, Intel

✗ Xe.CI.BAT: failure for Prepare GVT for display modularization

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2383 bytes --]

== Series Details ==

Series: Prepare GVT for display modularization
URL   : https://patchwork.freedesktop.org/series/159008/
State : failure

== Summary ==

CI Bug Log - changes from xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4_BAT -> xe-pw-159008v1_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-159008v1_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-159008v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-159008v1_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@runner@aborted:
    - bat-ptl-1:          NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/bat-ptl-1/igt@runner@aborted.html
    - bat-ptl-2:          NOTRUN -> [FAIL][2]
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/bat-ptl-2/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in xe-pw-159008v1_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [FAIL][3] ([Intel XE#6519]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/bat-dg2-oem2/igt@xe_waitfence@engine.html

  
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519


Build changes
-------------

  * IGT: IGT_8665 -> IGT_8666
  * Linux: xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4 -> xe-pw-159008v1

  IGT_8665: 1806ab9c982ccaaa9d60cdde16bc1dc3bb250654 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8666: 8666
  xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4: c4e22b127f18ea8765c4fabc251d019dd3aa41a4
  xe-pw-159008v1: 159008v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/index.html

[-- Attachment #2: Type: text/html, Size: 3009 bytes --]

✗ Xe.CI.Full: failure for Prepare GVT for display modularization

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 52776 bytes --]

== Series Details ==

Series: Prepare GVT for display modularization
URL   : https://patchwork.freedesktop.org/series/159008/
State : failure

== Summary ==

CI Bug Log - changes from xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4_FULL -> xe-pw-159008v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-159008v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-159008v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-159008v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_big_fb@x-tiled-8bpp-rotate-180:
    - shard-lnl:          [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html

  * igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2:
    - shard-bmg:          [PASS][3] -> [ABORT][4] +4 other tests abort
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html

  
#### Warnings ####

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
    - shard-lnl:          [ABORT][5] ([Intel XE#4757]) -> [ABORT][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [SKIP][25], [PASS][26]) ([Intel XE#2457]) -> ([PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [SKIP][43], [PASS][44], [ABORT][45], [ABORT][46], [ABORT][47], [ABORT][48], [ABORT][49], [PASS][50], [PASS][51]) ([Intel XE#2457])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-8/igt@xe_module_load@load.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-8/igt@xe_module_load@load.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-8/igt@xe_module_load@load.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-1/igt@xe_module_load@load.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-1/igt@xe_module_load@load.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-3/igt@xe_module_load@load.html
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-3/igt@xe_module_load@load.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-3/igt@xe_module_load@load.html
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-1/igt@xe_module_load@load.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@xe_module_load@load.html
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-1/igt@xe_module_load@load.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-1/igt@xe_module_load@load.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@xe_module_load@load.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-5/igt@xe_module_load@load.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-5/igt@xe_module_load@load.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-5/igt@xe_module_load@load.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@xe_module_load@load.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@xe_module_load@load.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-5/igt@xe_module_load@load.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-5/igt@xe_module_load@load.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@xe_module_load@load.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@xe_module_load@load.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@xe_module_load@load.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@xe_module_load@load.html
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@xe_module_load@load.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@xe_module_load@load.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@xe_module_load@load.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@xe_module_load@load.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@xe_module_load@load.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@xe_module_load@load.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@xe_module_load@load.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@xe_module_load@load.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@xe_module_load@load.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@xe_module_load@load.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@xe_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@xe_module_load@load.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@xe_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@xe_module_load@load.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-6/igt@xe_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-6/igt@xe_module_load@load.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-6/igt@xe_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-6/igt@xe_module_load@load.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-6/igt@xe_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@xe_module_load@load.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@xe_module_load@load.html

  
Known issues
------------

  Here are the changes found in xe-pw-159008v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2327]) +1 other test skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#610])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#1124]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#1124]) +11 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#2314] / [Intel XE#2894])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#367]) +4 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#3432]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#2887]) +19 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#2652] / [Intel XE#787]) +17 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_chamelium_color@degamma:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2325])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#2252]) +13 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_chamelium_hpd@vga-hpd-for-each-pipe:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#373]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-2/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#2390])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          NOTRUN -> [FAIL][65] ([Intel XE#1178]) +1 other test fail
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#2321]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#2320]) +3 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_cursor_crc@cursor-random-32x32.html
    - shard-lnl:          NOTRUN -> [SKIP][68] ([Intel XE#1424])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
    - shard-bmg:          [PASS][69] -> [DMESG-WARN][70] ([Intel XE#5354]) +1 other test dmesg-warn
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][71] -> [FAIL][72] ([Intel XE#6715])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#2286]) +1 other test skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#1508])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#2244]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_fbcon_fbt@psr:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#776])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_fbcon_fbt@psr.html

  * igt@kms_feature_discovery@chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#2372])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@psr2:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#2374])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3:
    - shard-bmg:          [PASS][79] -> [FAIL][80] ([Intel XE#3321]) +1 other test fail
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank@ac-dp2-hdmi-a3.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][81] ([Intel XE#1421])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [PASS][82] -> [FAIL][83] ([Intel XE#301]) +1 other test fail
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [PASS][84] -> [FAIL][85] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#2293] / [Intel XE#2380])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#2293]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#2311]) +37 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][89] ([Intel XE#651])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-rte:
    - shard-lnl:          NOTRUN -> [SKIP][90] ([Intel XE#656]) +4 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@kms_frontbuffer_tracking@fbc-2p-rte.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#4141]) +17 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][92] ([Intel XE#2352])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#2313]) +39 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#346] / [Intel XE#6590])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#2927] / [Intel XE#6590])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_pipe_stress@stress-xrgb8888-ytiled:
    - shard-bmg:          NOTRUN -> [SKIP][96] ([Intel XE#4329])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][97] ([Intel XE#5020])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
    - shard-bmg:          NOTRUN -> [SKIP][98] ([Intel XE#5825]) +19 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html

  * igt@kms_pm_backlight@fade:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#870])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-lnl:          [PASS][100] -> [FAIL][101] ([Intel XE#718]) +1 other test fail
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-3/igt@kms_pm_dc@dc5-psr.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#1406] / [Intel XE#1489]) +10 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-bmg:          NOTRUN -> [SKIP][104] ([Intel XE#1406] / [Intel XE#2387])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@fbc-pr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +18 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_psr@fbc-pr-primary-page-flip.html

  * igt@kms_psr@fbc-psr2-cursor-plane-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][106] ([Intel XE#1406])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@kms_psr@fbc-psr2-cursor-plane-onoff.html

  * igt@kms_psr@fbc-psr2-cursor-plane-onoff@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][107] ([Intel XE#1406] / [Intel XE#4609])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@kms_psr@fbc-psr2-cursor-plane-onoff@edp-1.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-lnl:          [PASS][108] -> [SKIP][109] ([Intel XE#1406] / [Intel XE#4692])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@bad-pixel-format:
    - shard-bmg:          NOTRUN -> [SKIP][110] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_rotation_crc@bad-pixel-format.html

  * igt@kms_scaling_modes@scaling-mode-full:
    - shard-bmg:          NOTRUN -> [SKIP][111] ([Intel XE#2413])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_scaling_modes@scaling-mode-full.html

  * igt@kms_sharpness_filter@filter-rotations:
    - shard-bmg:          NOTRUN -> [SKIP][112] ([Intel XE#6503])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_sharpness_filter@filter-rotations.html

  * igt@kms_vrr@cmrr:
    - shard-bmg:          NOTRUN -> [SKIP][113] ([Intel XE#2168])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@kms_vrr@cmrr.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#1499]) +1 other test skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@kms_vrr@flip-suspend.html

  * igt@xe_compute@ccs-mode-basic:
    - shard-bmg:          NOTRUN -> [SKIP][115] ([Intel XE#6599]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@xe_compute@ccs-mode-basic.html
    - shard-lnl:          NOTRUN -> [SKIP][116] ([Intel XE#1447])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@xe_compute@ccs-mode-basic.html

  * igt@xe_eudebug@basic-vm-access-parameters:
    - shard-lnl:          NOTRUN -> [SKIP][117] ([Intel XE#4837])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@xe_eudebug@basic-vm-access-parameters.html

  * igt@xe_eudebug@basic-vm-access-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][118] ([Intel XE#4837]) +9 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@xe_eudebug@basic-vm-access-userptr.html

  * igt@xe_eudebug_online@pagefault-one-of-many:
    - shard-bmg:          NOTRUN -> [SKIP][119] ([Intel XE#6665])
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@xe_eudebug_online@pagefault-one-of-many.html

  * igt@xe_eudebug_online@tdctl-parameters:
    - shard-bmg:          NOTRUN -> [SKIP][120] ([Intel XE#4837] / [Intel XE#6665]) +7 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@xe_eudebug_online@tdctl-parameters.html

  * igt@xe_eudebug_sriov@deny-eudebug:
    - shard-lnl:          NOTRUN -> [SKIP][121] ([Intel XE#4518])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@xe_eudebug_sriov@deny-eudebug.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][122] ([Intel XE#2322]) +13 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate.html

  * igt@xe_exec_basic@multigpu-once-basic-defer-mmap:
    - shard-lnl:          NOTRUN -> [SKIP][123] ([Intel XE#1392]) +1 other test skip
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-basic:
    - shard-lnl:          NOTRUN -> [SKIP][124] ([Intel XE#6874]) +1 other test skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@xe_exec_multi_queue@one-queue-preempt-mode-basic.html

  * igt@xe_exec_multi_queue@two-queues-priority:
    - shard-bmg:          NOTRUN -> [SKIP][125] ([Intel XE#6874]) +32 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@xe_exec_multi_queue@two-queues-priority.html

  * igt@xe_exec_system_allocator@many-64k-mmap-huge:
    - shard-bmg:          NOTRUN -> [SKIP][126] ([Intel XE#5007])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@xe_exec_system_allocator@many-64k-mmap-huge.html

  * igt@xe_exec_system_allocator@process-many-execqueues-mmap-free-huge:
    - shard-bmg:          NOTRUN -> [SKIP][127] ([Intel XE#4943]) +34 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@xe_exec_system_allocator@process-many-execqueues-mmap-free-huge.html

  * igt@xe_exec_system_allocator@twice-large-mmap-new-huge:
    - shard-lnl:          NOTRUN -> [SKIP][128] ([Intel XE#4943])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-2/igt@xe_exec_system_allocator@twice-large-mmap-new-huge.html

  * igt@xe_media_fill@media-fill:
    - shard-bmg:          NOTRUN -> [SKIP][129] ([Intel XE#2459] / [Intel XE#2596])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@xe_media_fill@media-fill.html

  * igt@xe_mmap@pci-membarrier:
    - shard-lnl:          NOTRUN -> [SKIP][130] ([Intel XE#5100])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@xe_mmap@pci-membarrier.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][131] ([Intel XE#2284]) +2 other tests skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0:
    - shard-lnl:          [PASS][132] -> [FAIL][133] ([Intel XE#6251]) +1 other test fail
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html

  * igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
    - shard-bmg:          NOTRUN -> [SKIP][134] ([Intel XE#4733])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][135] ([Intel XE#944]) +3 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_sriov_flr@flr-each-isolation:
    - shard-bmg:          [PASS][136] -> [FAIL][137] ([Intel XE#6569])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@xe_sriov_flr@flr-each-isolation.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@xe_sriov_flr@flr-each-isolation.html

  
#### Possible fixes ####

  * igt@kms_color@ctm-signed@pipe-b-dp-2:
    - shard-bmg:          [DMESG-FAIL][138] ([Intel XE#5545]) -> [PASS][139] +1 other test pass
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@kms_color@ctm-signed@pipe-b-dp-2.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_color@ctm-signed@pipe-b-dp-2.html

  * igt@kms_color@ctm-signed@pipe-b-hdmi-a-3:
    - shard-bmg:          [CRASH][140] ([Intel XE#6875]) -> [PASS][141] +4 other tests pass
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@kms_color@ctm-signed@pipe-b-hdmi-a-3.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_color@ctm-signed@pipe-b-hdmi-a-3.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-bmg:          [ABORT][142] ([Intel XE#6740]) -> [PASS][143] +1 other test pass
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-3/igt@kms_hdr@bpc-switch-suspend.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-lnl:          [FAIL][144] ([Intel XE#718]) -> [PASS][145]
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@kms_pm_dc@dc6-psr.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_vrr@cmrr@pipe-a-edp-1:
    - shard-lnl:          [FAIL][146] ([Intel XE#4459]) -> [PASS][147] +1 other test pass
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@kms_vrr@cmrr@pipe-a-edp-1.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@kms_vrr@cmrr@pipe-a-edp-1.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][148] ([Intel XE#6321]) -> [PASS][149]
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_exec_fault_mode@twice-userptr-invalidate:
    - shard-bmg:          [SKIP][150] ([Intel XE#6703]) -> [PASS][151] +13 other tests pass
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@xe_exec_fault_mode@twice-userptr-invalidate.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@xe_exec_fault_mode@twice-userptr-invalidate.html

  * igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit:
    - shard-bmg:          [FAIL][152] ([Intel XE#6558]) -> [PASS][153] +2 other tests pass
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html

  * igt@xe_module_load@load:
    - shard-lnl:          ([PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [SKIP][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179]) ([Intel XE#378]) -> ([PASS][180], [PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [PASS][195], [PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-5/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-5/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-1/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-4/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-8/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-8/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-3/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-3/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-3/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-3/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-5/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-5/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-8/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-8/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-8/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-1/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-1/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-2/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-1/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-1/igt@xe_module_load@load.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-2/igt@xe_module_load@load.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-2/igt@xe_module_load@load.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-2/igt@xe_module_load@load.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-1/igt@xe_module_load@load.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@xe_module_load@load.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-1/igt@xe_module_load@load.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@xe_module_load@load.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@xe_module_load@load.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@xe_module_load@load.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-2/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-2/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-1/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@xe_module_load@load.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@xe_module_load@load.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-3/igt@xe_module_load@load.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@xe_module_load@load.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@xe_module_load@load.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@xe_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-1/igt@xe_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-4/igt@xe_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-5/igt@xe_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-4/igt@xe_module_load@load.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-2/igt@xe_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-2/igt@xe_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-4/igt@xe_module_load@load.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-4/igt@xe_module_load@load.html

  * igt@xe_pmu@engine-activity-accuracy-50:
    - shard-lnl:          [FAIL][205] ([Intel XE#6251]) -> [PASS][206] +2 other tests pass
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-50.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-50.html

  * igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling@numvfs-random:
    - shard-bmg:          [FAIL][207] ([Intel XE#5937]) -> [PASS][208] +1 other test pass
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-8/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling@numvfs-random.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling@numvfs-random.html

  
#### Warnings ####

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs:
    - shard-bmg:          [SKIP][209] ([Intel XE#6703]) -> [SKIP][210] ([Intel XE#2887])
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-5/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-bmg:          [SKIP][211] ([Intel XE#6703]) -> [SKIP][212] ([Intel XE#2390])
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@kms_content_protection@dp-mst-lic-type-0.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-2/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
    - shard-bmg:          [SKIP][213] ([Intel XE#6703]) -> [SKIP][214] ([Intel XE#2293] / [Intel XE#2380])
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][215] ([Intel XE#6703]) -> [SKIP][216] ([Intel XE#4141])
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-bmg:          [SKIP][217] ([Intel XE#1406] / [Intel XE#6703]) -> [SKIP][218] ([Intel XE#1406] / [Intel XE#2387])
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@kms_psr2_su@frontbuffer-xrgb8888.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority:
    - shard-bmg:          [SKIP][219] ([Intel XE#6703]) -> [SKIP][220] ([Intel XE#6874]) +1 other test skip
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-1/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority.html

  * igt@xe_exec_system_allocator@threads-many-mmap-new-huge-nomemset:
    - shard-bmg:          [SKIP][221] ([Intel XE#6703]) -> [SKIP][222] ([Intel XE#4943])
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-2/igt@xe_exec_system_allocator@threads-many-mmap-new-huge-nomemset.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-8/igt@xe_exec_system_allocator@threads-many-mmap-new-huge-nomemset.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [ABORT][223] ([Intel XE#5466] / [Intel XE#5530]) -> [ABORT][224] ([Intel XE#5466])
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4/shard-bmg-8/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/shard-bmg-3/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2372
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
  [Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4329
  [Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
  [Intel XE#4518]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4518
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4692
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4757]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4757
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5825]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5825
  [Intel XE#5937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5937
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6558]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6558
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
  [Intel XE#6590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6590
  [Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6715
  [Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6875]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6875
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_8665 -> IGT_8666
  * Linux: xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4 -> xe-pw-159008v1

  IGT_8665: 1806ab9c982ccaaa9d60cdde16bc1dc3bb250654 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8666: 8666
  xe-4239-c4e22b127f18ea8765c4fabc251d019dd3aa41a4: c4e22b127f18ea8765c4fabc251d019dd3aa41a4
  xe-pw-159008v1: 159008v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159008v1/index.html

[-- Attachment #2: Type: text/html, Size: 58304 bytes --]

Re: [PATCH 5/5] drm/i915/gvt/display_helpers: Cast argument to enum pipe for pipe-offset macro

[Nautiyal, Ankit K]

On 12/15/2025 5:33 PM, Jani Nikula wrote:
> On Mon, 15 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> TRANSCONF() expands via _MMIO_PIPE2, i.e., it uses pipe-based addressing.
>> In GVT, some call sites pass an enum transcoder to TRANSCONF(), which now
>> routes through INTEL_DISPLAY_DEVICE_PIPE_OFFSET() and ultimately calls
>> intel_display_device_pipe_offset(), whose parameter type is enum pipe.
>>
>> This results in -Werror=enum-conversion.
>>
>> To address this, cast the index to enum pipe in the GVT-side macro
>> override.
>>
>> This works for all cases as TRANSCODER_{A,B,C,D} all have 1:1 mapping to
>> PIPE_{A,B,C,D} except for TRANSCODER_EDP.
>>
>> There is one place which uses TRANSCONF() with TRANSCODER_EDP, which
>> appears to be incorrect. In any case, the cast preserves the previous
>> behaviour.
> Maybe the question to ask is if TRANSCONF() using _MMIO_PIPE2() is
> correct or not?


Yeah I was wondering that, that's the reason I separated out this patch.

Hehe .. Just wanted to make sure with others, before going down that 
rabbit hole. :D

On the serious note,the suspected transcoder EDP usage in gvt is also 
highlighted in the commit that replaced PIPECONF with TRANSCONF:


3eb08ea58e57 ("drm/i915: s/PIPECONF/TRANSCONF/")

I guess we are supposed to use TRANSCODERS A - D which map to PIPES A - D.

For other transcoders like EDP/DSI we should perhaps find their pipes 
A-D(cast them to transcoder enum) and then call TRANSCONF.


Regards,

Ankit


>
> BR,
> Jani.
>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gvt/display_helpers.h | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> index d11ebb03b946..fb75cc9f97cc 100644
>> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
>> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> @@ -21,8 +21,8 @@ struct display;
>>   #ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>>   #undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>>   #endif
>> -#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
>> -	intel_display_device_pipe_offset((display), (pipe))
>> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, idx) \
>> +	intel_display_device_pipe_offset((display), (enum pipe)(idx))
>>   
>>   #ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
>>   #undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET

Re: [PATCH 1/5] drm/i915/display: Abstract pipe/trans/cursor offset calculation

[Nautiyal, Ankit K]

On 12/15/2025 5:14 PM, Jani Nikula wrote:
> On Mon, 15 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Introduce INTEL_DISPLAY_DEVICE_*_OFFSET() macros to compute absolute
>> MMIO offsets for pipe, transcoder, and cursor registers.
>>
>> Update _MMIO_PIPE2/_MMIO_TRANS2/_MMIO_CURSOR2 to use these macros
>> for cleaner abstraction and to prepare for external API usage (e.g. GVT).
>>
>> Also move DISPLAY_MMIO_BASE() to intel_display_device.h so it can be
>> abstracted in GVT, allowing register macros to resolve via
>> exported helpers rather than peeking into struct intel_display.
>>
>> Suggested-by: Jani Nikula <jani.nikula@intel.com>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   .../gpu/drm/i915/display/intel_display_device.h | 17 +++++++++++++++++
>>   .../drm/i915/display/intel_display_reg_defs.h   | 15 ++++-----------
>>   2 files changed, 21 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index 50b2e9ae2c18..05bba7a9899a 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -260,6 +260,23 @@ struct intel_display_platforms {
>>   	 ((id) == ARLS_HOST_BRIDGE_PCI_ID3) || \
>>   	 ((id) == ARLS_HOST_BRIDGE_PCI_ID4))
>>   
>> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
>> +	(DISPLAY_INFO(display)->pipe_offsets[(pipe)] - \
>> +	 DISPLAY_INFO(display)->pipe_offsets[PIPE_A] + \
>> +	 DISPLAY_MMIO_BASE(display))
>> +
>> +#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
>> +	(DISPLAY_INFO(display)->trans_offsets[(trans)] - \
>> +	 DISPLAY_INFO(display)->trans_offsets[TRANSCODER_A] + \
>> +	 DISPLAY_MMIO_BASE(display))
>> +
>> +#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
>> +	(DISPLAY_INFO(display)->cursor_offsets[(pipe)] - \
>> +	 DISPLAY_INFO(display)->cursor_offsets[PIPE_A] + \
>> +	 DISPLAY_MMIO_BASE(display))
>> +
>> +#define DISPLAY_MMIO_BASE(dev_priv)	(DISPLAY_INFO(dev_priv)->mmio_offset)
> Please s/dev_priv/display/ while at it.

Ohh yeah. sorry missed it while blindly copying/pasting. Will change this.

>
>> +
>>   struct intel_display_runtime_info {
>>   	struct intel_display_ip_ver {
>>   		u16 ver;
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
>> index b83ad06f2ea7..74f572d3a202 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_reg_defs.h
>> @@ -8,8 +8,6 @@
>>   
>>   #include "i915_reg_defs.h"
>>   
>> -#define DISPLAY_MMIO_BASE(dev_priv)	(DISPLAY_INFO(dev_priv)->mmio_offset)
>> -
>>   #define VLV_DISPLAY_BASE		0x180000
>>   
>>   /*
>> @@ -36,14 +34,9 @@
>>    * Device info offset array based helpers for groups of registers with unevenly
>>    * spaced base offsets.
>>    */
>> -#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(DISPLAY_INFO(display)->pipe_offsets[(pipe)] - \
>> -						      DISPLAY_INFO(display)->pipe_offsets[PIPE_A] + \
>> -						      DISPLAY_MMIO_BASE(display) + (reg))
>> -#define _MMIO_TRANS2(display, tran, reg)	_MMIO(DISPLAY_INFO(display)->trans_offsets[(tran)] - \
>> -						      DISPLAY_INFO(display)->trans_offsets[TRANSCODER_A] + \
>> -						      DISPLAY_MMIO_BASE(display) + (reg))
>> -#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(DISPLAY_INFO(display)->cursor_offsets[(pipe)] - \
>> -						      DISPLAY_INFO(display)->cursor_offsets[PIPE_A] + \
>> -						      DISPLAY_MMIO_BASE(display) + (reg))
>> +
>> +#define _MMIO_PIPE2(display, pipe, reg)		_MMIO(INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) + (reg))
>> +#define _MMIO_TRANS2(display, trans, reg)	_MMIO(INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) + (reg))
>> +#define _MMIO_CURSOR2(display, pipe, reg)	_MMIO(INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) + (reg))
> Please wrap the macro argument usage in parenthesis, even if not
> strictly needed here. IMO it's just good code hygiene, and sets the
> example.

Sure.


Thanks & Regards,

Ankit

> With these fixed,
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
>
> BR,
> Jani.
>
>>   
>>   #endif /* __INTEL_DISPLAY_REG_DEFS_H__ */

Re: [PATCH 3/5] drm/i915/gvt: Add header to use display offset functions in macros

[Nautiyal, Ankit K]

On 12/15/2025 5:23 PM, Jani Nikula wrote:
> On Mon, 15 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Introduce gvt/display_helpers.h to make DISPLAY_MMIO_BASE and
>> INTEL_DISPLAY_DEVICE_*_OFFSET macros call exported display functions.
>> This lets GVT keep using existing register macros (e.g.,
>> TRANSCONF(display, pipe)) while ensuring offset calculations happen
>> through functions instead of accessing display internals.
>>
>> Include gvt/display_helpers.h after display headers to avoid
>> conflicts.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gvt/cmd_parser.c      |  2 ++
>>   drivers/gpu/drm/i915/gvt/display.c         |  2 ++
>>   drivers/gpu/drm/i915/gvt/display_helpers.h | 39 ++++++++++++++++++++++
>>   drivers/gpu/drm/i915/gvt/fb_decoder.c      |  2 ++
>>   drivers/gpu/drm/i915/gvt/handlers.c        |  2 ++
>>   5 files changed, 47 insertions(+)
>>   create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h
>>
>> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
>> index df04e4ead8ea..6b5e18fca403 100644
>> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
>> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
>> @@ -59,6 +59,8 @@
>>   #include "gem/i915_gem_pm.h"
>>   #include "gt/intel_context.h"
>>   
>> +#include "gvt/display_helpers.h"
> None of these includes need the gvt/ prefix as they're in the same
> subdirectory.
Alright, will drop the gvt/ prefix.
>
>> +
>>   #define INVALID_OP    (~0U)
>>   
>>   #define OP_LEN_MI           9
>> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
>> index 06517d1f07a2..7a51c13b9b58 100644
>> --- a/drivers/gpu/drm/i915/gvt/display.c
>> +++ b/drivers/gpu/drm/i915/gvt/display.c
>> @@ -49,6 +49,8 @@
>>   #include "display/intel_dpio_phy.h"
>>   #include "display/intel_sprite_regs.h"
>>   
>> +#include "gvt/display_helpers.h"
>> +
>>   static int get_edp_pipe(struct intel_vgpu *vgpu)
>>   {
>>   	u32 data = vgpu_vreg(vgpu, _TRANS_DDI_FUNC_CTL_EDP);
>> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> new file mode 100644
>> index 000000000000..6f68a1e8751a
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> @@ -0,0 +1,39 @@
>> +// SPDX-License-Identifier: MIT
>> +/*
>> + * Copyright © 2025 Intel Corporation
>> + */
>> +
>> +#ifndef __DISPLAY_HELPERS_H__
>> +#define __DISPLAY_HELPERS_H__
>> +
>> +#include "display/intel_gvt_api.h"
>> +
>> +enum pipe;
>> +enum trans;
>> +struct display;
>> +
>> +#ifdef DISPLAY_MMIO_BASE
> Ideally, we shouldn't need these ifdefs. I think it's better if we can
> drop any includes from gvt that would cause a conflict here, and it's
> better to get the build failure.
>
> If we can't do that in this patch already, then please drop the relevant
> includes and these ifdefs at the end of the series.

Ok, let me re-check this part.


Regards,

Ankit

>
> BR,
> Jani.
>
>> +#undef DISPLAY_MMIO_BASE
>> +#endif
>> +#define DISPLAY_MMIO_BASE(display) \
>> +	intel_display_device_mmio_base((display))
>> +
>> +#ifdef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>> +#undef INTEL_DISPLAY_DEVICE_PIPE_OFFSET
>> +#endif
>> +#define INTEL_DISPLAY_DEVICE_PIPE_OFFSET(display, pipe) \
>> +	intel_display_device_pipe_offset((display), (pipe))
>> +
>> +#ifdef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
>> +#undef INTEL_DISPLAY_DEVICE_TRANS_OFFSET
>> +#endif
>> +#define INTEL_DISPLAY_DEVICE_TRANS_OFFSET(display, trans) \
>> +	intel_display_device_trans_offset((display), (trans))
>> +
>> +#ifdef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
>> +#undef INTEL_DISPLAY_DEVICE_CURSOR_OFFSET
>> +#endif
>> +#define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
>> +	intel_display_device_cursor_offset((display), (pipe))
>> +
>> +#endif /* __DISPLAY_HELPERS_H__ */
>> diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
>> index a8079cfa8e1d..ee4213fa2cda 100644
>> --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
>> +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
>> @@ -47,6 +47,8 @@
>>   #include "display/intel_sprite_regs.h"
>>   #include "display/skl_universal_plane_regs.h"
>>   
>> +#include "gvt/display_helpers.h"
>> +
>>   #define PRIMARY_FORMAT_NUM	16
>>   struct pixel_format {
>>   	int drm_format;	/* Pixel format in DRM definition */
>> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
>> index 36ea12ade849..3e58e35ea2b9 100644
>> --- a/drivers/gpu/drm/i915/gvt/handlers.c
>> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
>> @@ -67,6 +67,8 @@
>>   #include "gt/intel_gt_regs.h"
>>   #include <linux/vmalloc.h>
>>   
>> +#include "gvt/display_helpers.h"
>> +
>>   /* XXX FIXME i915 has changed PP_XXX definition */
>>   #define PCH_PP_STATUS  _MMIO(0xc7200)
>>   #define PCH_PP_CONTROL _MMIO(0xc7204)

Re: [PATCH 4/5] drm/i915/gvt: Change for_each_pipe to use pipe_mask API

[Nautiyal, Ankit K]

On 12/15/2025 5:30 PM, Jani Nikula wrote:
> On Mon, 15 Dec 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Add a new API to get pipe_mask from DISPLAY_RUNTIME_INFO() for GVT.
>> Update the for_each_pipe() macro in GVT to call this API, instead of
>> accessing DISPLAY_RUNTIME_INFO()->pipe_mask directly.
>>
>> This keeps the macro usable in GVT without exposing display internals
>> and prepares for display modularization.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_gvt_api.c | 6 ++++++
>>   drivers/gpu/drm/i915/display/intel_gvt_api.h | 1 +
>>   drivers/gpu/drm/i915/gvt/display_helpers.h   | 7 +++++++
>>   3 files changed, 14 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.c b/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> index 8abea318fbc2..0b09bbf2c29a 100644
>> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.c
>> @@ -32,3 +32,9 @@ u32 intel_display_device_mmio_base(struct intel_display *display)
>>   	return DISPLAY_MMIO_BASE(display);
>>   }
>>   EXPORT_SYMBOL_GPL(intel_display_device_mmio_base);
>> +
>> +u8 intel_display_runtime_info_pipe_mask(struct intel_display *display)
>> +{
>> +	return DISPLAY_RUNTIME_INFO(display)->pipe_mask;
>> +}
> I don't think gvt needs to know it's about "runtime info". Maybe make it
> just intel_display_device_pipe_mask()?

Makes sense.


>
> Though I'm also wondering about making it even more abstracted with
> something like intel_display_device_pipe_valid(), and using that for the
> various other cases that check pipes in GVT. But maybe the patch at hand
> is a good start.


I agree this can be further abstracted. I can try that stuff and see how 
much change it might require.

Thanks Jani, for the suggestions and for the reviews.


Regards,

Ankit

>
>> +EXPORT_SYMBOL_GPL(intel_display_runtime_info_pipe_mask);
>> diff --git a/drivers/gpu/drm/i915/display/intel_gvt_api.h b/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> index e9a1122a988d..8ceda30a969b 100644
>> --- a/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> +++ b/drivers/gpu/drm/i915/display/intel_gvt_api.h
>> @@ -16,5 +16,6 @@ u32 intel_display_device_pipe_offset(struct intel_display *display, enum pipe pi
>>   u32 intel_display_device_trans_offset(struct intel_display *display, enum transcoder trans);
>>   u32 intel_display_device_cursor_offset(struct intel_display *display, enum pipe pipe);
>>   u32 intel_display_device_mmio_base(struct intel_display *display);
>> +u8 intel_display_runtime_info_pipe_mask(struct intel_display *display);
>>   
>>   #endif /* __INTEL_GVT_API_H__ */
>> diff --git a/drivers/gpu/drm/i915/gvt/display_helpers.h b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> index 6f68a1e8751a..d11ebb03b946 100644
>> --- a/drivers/gpu/drm/i915/gvt/display_helpers.h
>> +++ b/drivers/gpu/drm/i915/gvt/display_helpers.h
>> @@ -36,4 +36,11 @@ struct display;
>>   #define INTEL_DISPLAY_DEVICE_CURSOR_OFFSET(display, pipe) \
>>   	intel_display_device_cursor_offset((display), (pipe))
>>   
>> +#ifdef for_each_pipe
> Ditto about ifdefs here as with previous patch.
>
>> +#undef for_each_pipe
>> +#endif
>> +#define for_each_pipe(display, __p) \
>> +	for ((__p) = 0; (__p) < I915_MAX_PIPES; (__p)++) \
>> +		for_each_if(intel_display_runtime_info_pipe_mask((display)) & BIT(__p))
>> +
>>   #endif /* __DISPLAY_HELPERS_H__ */