From: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
To: Matthew Brost <matthew.brost@intel.com>
Cc: <intel-xe@lists.freedesktop.org>,
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Subject: Re: [PATCH 3/3] drm/xe: Memset g2g buffer on resume
Date: Fri, 16 Oct 2026 13:43:02 -0700 [thread overview]
Message-ID: <588f6e03-3b5f-428e-bdf9-459f74efe244@intel.com> (raw)
In-Reply-To: <atJxs5BOjChYDEaX@gsse-cloud1.jf.intel.com>
On 10/16/2026 11:49 AM, Matthew Brost wrote:
> On Thu, Oct 15, 2026 at 09:54:55AM -0700, Vinay Belgaumkar wrote:
>> KMD creates this buffer for use by GuC, it is also responsible for zeroing
>> it during resume. The buffer is marked as XE_BO_FLAG_PINNED_NORESTORE,
>> so we cannot trust its contents after a suspend cycle. This commit adds
>> xe_gt_resume_early() function for handling this and the C6 disable
>> during resume.
>>
> Fixes?
There is currently no user for the g2g buffer, so I didn't add any fixes
tag.
>
> Also I have question here: Does this mean after d3cold memory does not
> init to zero? This was an open question I had which merging
> clear-of-free as I didn't know upon d3cold exit if buddy blocks in
> cleared list would still be cleared? Any insight here would be helpful
> as I think Tejas is picking up the clear-on-free work and this would be
> good input to give him.
I don't think we can assume memory will be cleared as part of D3cold
resume. Power is cut/restored to VRAM during suspend/resume, but there
is no guarantee of bits getting cleared, I believe.
Thanks,
Vinay.
>
> Matt
>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
>> ---
>> drivers/gpu/drm/xe/xe_gt.c | 18 ++++++++++++++++++
>> drivers/gpu/drm/xe/xe_gt.h | 1 +
>> drivers/gpu/drm/xe/xe_pm.c | 4 ++--
>> 3 files changed, 21 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>> index 775c826b68b4..02f5d48b1a65 100644
>> --- a/drivers/gpu/drm/xe/xe_gt.c
>> +++ b/drivers/gpu/drm/xe/xe_gt.c
>> @@ -1069,6 +1069,24 @@ int xe_gt_sanitize_freq(struct xe_gt *gt)
>> return ret;
>> }
>>
>> +/**
>> + * xe_gt_resume_early() - Early init for GT resume
>> + * @gt: the GT object
>> + *
>> + * Handles GT related init before GT restart after a suspend cycle.
>> + */
>> +void xe_gt_resume_early(struct xe_gt *gt)
>> +{
>> + struct xe_device *xe = gt_to_xe(gt);
>> + struct xe_guc *guc = >->uc.guc;
>> +
>> + xe_gt_idle_disable_c6(gt);
>> +
>> + /* clear the g2g buffer which is marked as NORESTORE during alloc */
>> + if (guc->g2g.bo && guc->g2g.owned)
>> + xe_map_memset(xe, &guc->g2g.bo->vmap, 0, 0, xe_bo_size(guc->g2g.bo));
>> +}
>> +
>> int xe_gt_resume(struct xe_gt *gt)
>> {
>> int err;
>> diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
>> index 92d934d50244..9b69f36ebc7a 100644
>> --- a/drivers/gpu/drm/xe/xe_gt.h
>> +++ b/drivers/gpu/drm/xe/xe_gt.h
>> @@ -58,6 +58,7 @@ void xe_gt_record_user_engines(struct xe_gt *gt);
>> void xe_gt_suspend_prepare(struct xe_gt *gt);
>> int xe_gt_suspend(struct xe_gt *gt);
>> void xe_gt_shutdown(struct xe_gt *gt);
>> +void xe_gt_resume_early(struct xe_gt *gt);
>> int xe_gt_resume(struct xe_gt *gt);
>> void xe_gt_reset_async(struct xe_gt *gt);
>> int xe_gt_runtime_resume(struct xe_gt *gt);
>> diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
>> index 1f5097875bcd..89d64aa6577d 100644
>> --- a/drivers/gpu/drm/xe/xe_pm.c
>> +++ b/drivers/gpu/drm/xe/xe_pm.c
>> @@ -249,7 +249,7 @@ int xe_pm_resume(struct xe_device *xe)
>> return err;
>>
>> for_each_gt(gt, xe, id)
>> - xe_gt_idle_disable_c6(gt);
>> + xe_gt_resume_early(gt);
>>
>> xe_display_pm_resume_early(xe);
>>
>> @@ -703,7 +703,7 @@ int xe_pm_runtime_resume(struct xe_device *xe)
>> goto out;
>>
>> for_each_gt(gt, xe, id)
>> - xe_gt_idle_disable_c6(gt);
>> + xe_gt_resume_early(gt);
>>
>> xe_display_pm_resume_early(xe);
>>
>> --
>> 2.53.0
>>
next prev parent reply other threads:[~2026-10-16 20:43 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-15 16:54 [PATCH 0/3] drm/xe: Some d3cold related fixes Vinay Belgaumkar
2026-10-15 16:54 ` [PATCH 1/3] drm/xe: Toggle the D3Cold enable flag at runtime resume Vinay Belgaumkar
2026-10-16 18:23 ` [1/3] " Poosa, Karthik
2026-10-16 18:35 ` Belgaumkar, Vinay
2026-10-15 16:54 ` [PATCH 2/3] drm/xe: Access MMIO after pcode init Vinay Belgaumkar
2026-10-15 23:43 ` sashiko-bot
2026-10-15 23:52 ` Belgaumkar, Vinay
2026-10-16 18:02 ` [2/3] " Poosa, Karthik
2026-10-16 18:05 ` Belgaumkar, Vinay
2026-10-15 16:54 ` [PATCH 3/3] drm/xe: Memset g2g buffer on resume Vinay Belgaumkar
2026-10-16 18:49 ` Matthew Brost
2026-10-16 18:56 ` Matthew Brost
2026-10-16 20:43 ` Belgaumkar, Vinay [this message]
2026-10-16 0:03 ` ✓ CI.KUnit: success for drm/xe: Some d3cold related fixes Patchwork
2026-10-16 0:41 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-16 11:38 ` ✓ Xe.CI.FULL: " Patchwork
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