* [PATCH v5 0/4] drm/xe: Report GT TDR and VM rebind faults using SIGID
@ 2026-08-31 8:05 Arvind Yadav
2026-08-31 8:05 ` [PATCH v5 1/4] drm/xe/log: Add GUCSUBMIT component Arvind Yadav
` (6 more replies)
0 siblings, 7 replies; 13+ messages in thread
From: Arvind Yadav @ 2026-08-31 8:05 UTC (permalink / raw)
To: intel-xe
Cc: rodrigo.vivi, badal.nilawar, michal.wajdeczko,
himal.prasad.ghimiray, dnyaneshwar.bhadane, mallesh.koujalagi,
matthew.brost
This series is a small follow-up on top of the structured SIGID error
logging infrastructure series:
https://patchwork.freedesktop.org/series/171022/
That series adds SIGID-based error reporting and the xe_log_*() helpers.
This series converts selected GuC submit, SVM page-fault and GT reset error
paths to that logging path.
The VM rebind conversion from earlier revisions remains dropped.
v5:
- Dropped the GuC CGP protocol SIGID conversion, since malformed G2H
handler errors are already reported by the CT layer after -EPROTO.
- Added a GUCSUBMIT component mapped to XE_SIGID_GT_TDR and used it for
the GuC submit reset failure.
- Dropped "request" from the GuC submit reset failure message.
- Kept the GT patch limited to the reset failure path.
- Dropped GT PM-flow SIGID conversions for now, since the correct
component/SIGID mapping needs agreement.
- Improved the GT reset failure message to describe that full graphics
reset did not complete.
v4:
- Clarified that the GT component maps to XE_SIGID_GT_TDR and -EIO is
only the errno value.
- Split GuC CGP protocol error conversions into a separate patch.
- Added terminal SVM page-fault allocation failures as MEM_FAULT reports.
- Converted GT reset and power-flow failures to GT_TDR reports.
- Kept the VM rebind conversion dropped.
v3:
- Split GuC and VM changes into separate patches.
- Dropped GuC job-timeout warning conversions to avoid changing warning
logs into error-level SIGID reports.
v2:
- Rebased on the latest structured SIGID logging series.
- Switched from the old xe_ras_log_*() helpers to the new xe_log_*()
helpers.
Arvind Yadav (4):
drm/xe/log: Add GUCSUBMIT component
drm/xe/guc: Report reset failure using SIGID
drm/xe/svm: Report terminal page-fault failures using SIGID
drm/xe/gt: Report GT reset failure using SIGID
drivers/gpu/drm/xe/abi/xe_log_abi.h | 1 +
drivers/gpu/drm/xe/xe_gt.c | 4 ++--
drivers/gpu/drm/xe/xe_guc_submit.c | 6 ++++--
drivers/gpu/drm/xe/xe_svm.c | 13 +++++++------
4 files changed, 14 insertions(+), 10 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v5 1/4] drm/xe/log: Add GUCSUBMIT component
2026-08-31 8:05 [PATCH v5 0/4] drm/xe: Report GT TDR and VM rebind faults using SIGID Arvind Yadav
@ 2026-08-31 8:05 ` Arvind Yadav
2026-08-31 9:14 ` Michal Wajdeczko
2026-08-31 8:05 ` [PATCH v5 2/4] drm/xe/guc: Report reset failure using SIGID Arvind Yadav
` (5 subsequent siblings)
6 siblings, 1 reply; 13+ messages in thread
From: Arvind Yadav @ 2026-08-31 8:05 UTC (permalink / raw)
To: intel-xe
Cc: rodrigo.vivi, badal.nilawar, michal.wajdeczko,
himal.prasad.ghimiray, dnyaneshwar.bhadane, mallesh.koujalagi,
matthew.brost
Add a GUCSUBMIT component for structured SIGID logging.
GuC submit failures can still map to an existing SIGID, but using the
generic GT component hides the source of the report. Add GUCSUBMIT as a
separate component and map it to XE_SIGID_GT_TDR.
Cc: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Cc: Badal Nilawar <badal.nilawar@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
drivers/gpu/drm/xe/abi/xe_log_abi.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/abi/xe_log_abi.h b/drivers/gpu/drm/xe/abi/xe_log_abi.h
index d6105520173e..19976df21532 100644
--- a/drivers/gpu/drm/xe/abi/xe_log_abi.h
+++ b/drivers/gpu/drm/xe/abi/xe_log_abi.h
@@ -159,6 +159,7 @@ enum xe_log_location_bits {
define(DRIVER_FIRMWARE, 1, GUC, RUNTIME_FW, "GuC") \
define(DRIVER_FIRMWARE, 2, HUC, RUNTIME_FW, "HuC") \
define(DRIVER_FIRMWARE, 3, GSC, RUNTIME_FW, "GSC") \
+ define(DRIVER_FIRMWARE, 4, GUCSUBMIT, GT_TDR, "GuC Submit") \
define(DRIVER_FIRMWARE, 16, PCODE, DEVICE_FW, "PCode") \
define(DRIVER_FIRMWARE, 17, SYSCTRL, DEVICE_FW, "System Controller") \
--
2.43.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v5 2/4] drm/xe/guc: Report reset failure using SIGID
2026-08-31 8:05 [PATCH v5 0/4] drm/xe: Report GT TDR and VM rebind faults using SIGID Arvind Yadav
2026-08-31 8:05 ` [PATCH v5 1/4] drm/xe/log: Add GUCSUBMIT component Arvind Yadav
@ 2026-08-31 8:05 ` Arvind Yadav
2026-08-31 9:31 ` Michal Wajdeczko
2026-08-31 8:05 ` [PATCH v5 3/4] drm/xe/svm: Report terminal page-fault failures " Arvind Yadav
` (4 subsequent siblings)
6 siblings, 1 reply; 13+ messages in thread
From: Arvind Yadav @ 2026-08-31 8:05 UTC (permalink / raw)
To: intel-xe
Cc: rodrigo.vivi, badal.nilawar, michal.wajdeczko,
himal.prasad.ghimiray, dnyaneshwar.bhadane, mallesh.koujalagi,
matthew.brost
Route the GuC submit engine reset failure through the structured SIGID
logging helper.
Use the GUCSUBMIT component, which maps to XE_SIGID_GT_TDR, and pass -EIO
as the errno value.
Cc: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Cc: Badal Nilawar <badal.nilawar@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
v5:
- Added GUCSUBMIT component and mapped it to XE_SIGID_GT_TDR.
(Michal)
- Used GUCSUBMIT instead of GT for the GuC submit reset failure.
(Michal)
- Dropped "request" from the reset failure message.
(Michal)
v4:
- Clarified that the GT component maps to XE_SIGID_GT_TDR and -EIO is
only the errno value. (Sashiko)
v3:
- Split the GuC reset-request failure conversion into a separate patch.
(Michal)
- Dropped GuC job-timeout warning conversions to avoid changing warn-level
logs into error-level SIGID reports. (Michal)
- Kept only the existing error path that maps naturally to GT_TDR. (Michal)
v2:
- Rebased on the latest structured SIGID logging series.
- Switched from the old xe_ras_log_() helpers to the new xe_log_()
helpers.
- Dropped paths already covered by the base SIGID series.
drivers/gpu/drm/xe/xe_guc_submit.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 99d8c807ff05..543cf7baae96 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -34,6 +34,7 @@
#include "xe_guc_klv_helpers.h"
#include "xe_guc_submit_types.h"
#include "xe_hw_engine.h"
+#include "xe_log.h"
#include "xe_lrc.h"
#include "xe_macros.h"
#include "xe_map.h"
@@ -3494,8 +3495,9 @@ int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 le
reason = msg[2];
/* Unexpected failure of a hardware feature, log an actual error */
- xe_gt_err(gt, "GuC engine reset request failed on %d:%d because 0x%08X",
- guc_class, instance, reason);
+ xe_log_err(gt, GUCSUBMIT, -EIO,
+ "engine reset failed on %d:%d because 0x%08X\n",
+ guc_class, instance, reason);
xe_gt_reset_async(gt);
--
2.43.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v5 3/4] drm/xe/svm: Report terminal page-fault failures using SIGID
2026-08-31 8:05 [PATCH v5 0/4] drm/xe: Report GT TDR and VM rebind faults using SIGID Arvind Yadav
2026-08-31 8:05 ` [PATCH v5 1/4] drm/xe/log: Add GUCSUBMIT component Arvind Yadav
2026-08-31 8:05 ` [PATCH v5 2/4] drm/xe/guc: Report reset failure using SIGID Arvind Yadav
@ 2026-08-31 8:05 ` Arvind Yadav
2026-08-31 8:05 ` [PATCH v5 4/4] drm/xe/gt: Report GT reset failure " Arvind Yadav
` (3 subsequent siblings)
6 siblings, 0 replies; 13+ messages in thread
From: Arvind Yadav @ 2026-08-31 8:05 UTC (permalink / raw)
To: intel-xe
Cc: rodrigo.vivi, badal.nilawar, michal.wajdeczko,
himal.prasad.ghimiray, dnyaneshwar.bhadane, mallesh.koujalagi,
matthew.brost
Route terminal SVM page-fault failures through the structured SIGID logging
helper.
These errors are reported only after the retry count is exceeded, so they
represent terminal page-fault handling failures rather than transient retry
conditions.
Use the PAGEFAULT component, which maps to XE_SIGID_MEM_FAULT, and pass the
real errno value to the helper. Pass the GT object so the report carries
tile/GT location. The helper renders the errno, so remove the manual
ERR_PTR() formatting from the message text.
Cc: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Cc: Badal Nilawar <badal.nilawar@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Suggested-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
drivers/gpu/drm/xe/xe_svm.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
index 627a741293d5..349e307ca092 100644
--- a/drivers/gpu/drm/xe/xe_svm.c
+++ b/drivers/gpu/drm/xe/xe_svm.c
@@ -13,6 +13,7 @@
#include "xe_bo.h"
#include "xe_exec_queue_types.h"
#include "xe_gt_stats.h"
+#include "xe_log.h"
#include "xe_migrate.h"
#include "xe_module.h"
#include "xe_pagefault.h"
@@ -1361,9 +1362,9 @@ static int __xe_svm_handle_pagefault(struct xe_vm *vm, struct xe_vma *vma,
else
goto retry;
} else {
- drm_err(&vm->xe->drm,
- "VRAM allocation failed, retry count exceeded, asid=%u, errno=%pe\n",
- vm->usm.asid, ERR_PTR(err));
+ xe_log_err(gt, PAGEFAULT, err,
+ "VRAM allocation failed, retry count exceeded, asid=%u\n",
+ vm->usm.asid);
goto err_out;
}
}
@@ -1384,9 +1385,9 @@ static int __xe_svm_handle_pagefault(struct xe_vm *vm, struct xe_vma *vma,
range_debug(range, "PAGE FAULT - RETRY PAGES");
goto retry;
} else {
- drm_err(&vm->xe->drm,
- "Get pages failed, retry count exceeded, asid=%u, gpusvm=%p, errno=%pe\n",
- vm->usm.asid, &vm->svm.gpusvm, ERR_PTR(err));
+ xe_log_err(gt, PAGEFAULT, err,
+ "Get pages failed, retry count exceeded, asid=%u, gpusvm=%p\n",
+ vm->usm.asid, &vm->svm.gpusvm);
}
}
if (err) {
--
2.43.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v5 4/4] drm/xe/gt: Report GT reset failure using SIGID
2026-08-31 8:05 [PATCH v5 0/4] drm/xe: Report GT TDR and VM rebind faults using SIGID Arvind Yadav
` (2 preceding siblings ...)
2026-08-31 8:05 ` [PATCH v5 3/4] drm/xe/svm: Report terminal page-fault failures " Arvind Yadav
@ 2026-08-31 8:05 ` Arvind Yadav
2026-08-31 8:25 ` sashiko-bot
2026-08-31 12:36 ` ✓ CI.KUnit: success for drm/xe: Report GT TDR and VM rebind faults using SIGID (rev5) Patchwork
` (2 subsequent siblings)
6 siblings, 1 reply; 13+ messages in thread
From: Arvind Yadav @ 2026-08-31 8:05 UTC (permalink / raw)
To: intel-xe
Cc: rodrigo.vivi, badal.nilawar, michal.wajdeczko,
himal.prasad.ghimiray, dnyaneshwar.bhadane, mallesh.koujalagi,
matthew.brost
Route the GT reset failure log through the structured SIGID logging helper.
Failure to complete the full graphics reset means GT reset did not finish
as expected. Use the GT component, which maps to XE_SIGID_GT_TDR, and pass
the reset errno value to the helper.
Also update the message to describe the actual failure. The driver does not
clear GRDOM_FULL directly; the reset should complete and clear it within
the timeout.
Cc: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Cc: Badal Nilawar <badal.nilawar@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Suggested-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
---
v5:
- Kept this patch limited to the GT reset failure path. (Michal)
- Improved the GRDOM_FULL failure message to describe that full graphics
reset did not complete. (Michal)
drivers/gpu/drm/xe/xe_gt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 6805e0d3bf21..f06fc78af11c 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -824,8 +824,8 @@ static int do_gt_reset(struct xe_gt *gt)
xe_mmio_write32(>->mmio, GDRST, GRDOM_FULL);
err = xe_mmio_wait32(>->mmio, GDRST, GRDOM_FULL, 0, 5000, NULL, false);
if (err)
- xe_gt_err(gt, "failed to clear GRDOM_FULL (%pe)\n",
- ERR_PTR(err));
+ xe_log_err(gt, GT, err,
+ "full graphics reset not completed in %u ms\n", 5000);
xe_gsc_wa_14015076503(gt, false);
--
2.43.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v5 4/4] drm/xe/gt: Report GT reset failure using SIGID
2026-08-31 8:05 ` [PATCH v5 4/4] drm/xe/gt: Report GT reset failure " Arvind Yadav
@ 2026-08-31 8:25 ` sashiko-bot
0 siblings, 0 replies; 13+ messages in thread
From: sashiko-bot @ 2026-08-31 8:25 UTC (permalink / raw)
To: Arvind Yadav; +Cc: intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Incorrect time unit in GT reset failure log message (reports 5000 ms instead of 5 ms / 5000 us)
--
commit 4b084e884bdfae225e6341823adbd51d6b4fd3dd
Author: Arvind Yadav <arvind.yadav@intel.com>
drm/xe/gt: Report GT reset failure using SIGID
This commit routes the GT reset failure log through the structured SIGID
logging helper using the GT component. It also updates the error message
to describe that the full graphics reset did not complete within the timeout.
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 478e047031f4f..18a6d5a6686ca 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -830,8 +830,8 @@ static int do_gt_reset(struct xe_gt *gt)
> xe_mmio_write32(>->mmio, GDRST, GRDOM_FULL);
> err = xe_mmio_wait32(>->mmio, GDRST, GRDOM_FULL, 0, 5000, NULL, false);
> if (err)
> - xe_gt_err(gt, "failed to clear GRDOM_FULL (%pe)\n",
> - ERR_PTR(err));
> + xe_log_err(gt, GT, err,
> + "full graphics reset not completed in %u ms\n", 5000);
[Severity: Low]
Does this log message in do_gt_reset() report the wrong time unit?
The timeout parameter passed to xe_mmio_wait32() right before this is 5000
microseconds, but the new error message hardcodes "5000 ms" (5 seconds).
Reporting 5000 ms might significantly mislead anyone diagnosing GT reset
failures into believing the driver waited 1000x longer than it actually did.
Should this be updated to say "5 ms" or "5000 us" to accurately reflect the
wait time?
>
> xe_gsc_wa_14015076503(gt, false);
>
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260831080507.2364687-1-arvind.yadav@intel.com?part=4
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v5 1/4] drm/xe/log: Add GUCSUBMIT component
2026-08-31 8:05 ` [PATCH v5 1/4] drm/xe/log: Add GUCSUBMIT component Arvind Yadav
@ 2026-08-31 9:14 ` Michal Wajdeczko
2026-08-31 9:56 ` Yadav, Arvind
0 siblings, 1 reply; 13+ messages in thread
From: Michal Wajdeczko @ 2026-08-31 9:14 UTC (permalink / raw)
To: Arvind Yadav, intel-xe
Cc: rodrigo.vivi, badal.nilawar, himal.prasad.ghimiray,
dnyaneshwar.bhadane, mallesh.koujalagi, matthew.brost
On 8/31/2026 10:05 AM, Arvind Yadav wrote:
> Add a GUCSUBMIT component for structured SIGID logging.
>
> GuC submit failures can still map to an existing SIGID, but using the
> generic GT component hides the source of the report. Add GUCSUBMIT as a
> separate component and map it to XE_SIGID_GT_TDR.
>
> Cc: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> Cc: Badal Nilawar <badal.nilawar@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
> drivers/gpu/drm/xe/abi/xe_log_abi.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/xe/abi/xe_log_abi.h b/drivers/gpu/drm/xe/abi/xe_log_abi.h
> index d6105520173e..19976df21532 100644
> --- a/drivers/gpu/drm/xe/abi/xe_log_abi.h
> +++ b/drivers/gpu/drm/xe/abi/xe_log_abi.h
> @@ -159,6 +159,7 @@ enum xe_log_location_bits {
> define(DRIVER_FIRMWARE, 1, GUC, RUNTIME_FW, "GuC") \
> define(DRIVER_FIRMWARE, 2, HUC, RUNTIME_FW, "HuC") \
> define(DRIVER_FIRMWARE, 3, GSC, RUNTIME_FW, "GSC") \
> + define(DRIVER_FIRMWARE, 4, GUCSUBMIT, GT_TDR, "GuC Submit") \
hmm, the goal of the DRIVER_FIRMWARE class was to have a way to
differentiate between different firmware used by the driver, as
in SIGID space there are only two RUNTIME/DRIVER_FW categories
IMO "GuC submission" should be just a DRIVER class component,
like we have PAGEFAULT component
> define(DRIVER_FIRMWARE, 16, PCODE, DEVICE_FW, "PCode") \
> define(DRIVER_FIRMWARE, 17, SYSCTRL, DEVICE_FW, "System Controller") \
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v5 2/4] drm/xe/guc: Report reset failure using SIGID
2026-08-31 8:05 ` [PATCH v5 2/4] drm/xe/guc: Report reset failure using SIGID Arvind Yadav
@ 2026-08-31 9:31 ` Michal Wajdeczko
2026-08-31 10:51 ` Yadav, Arvind
0 siblings, 1 reply; 13+ messages in thread
From: Michal Wajdeczko @ 2026-08-31 9:31 UTC (permalink / raw)
To: Arvind Yadav, intel-xe
Cc: rodrigo.vivi, badal.nilawar, himal.prasad.ghimiray,
dnyaneshwar.bhadane, mallesh.koujalagi, matthew.brost
On 8/31/2026 10:05 AM, Arvind Yadav wrote:
> Route the GuC submit engine reset failure through the structured SIGID
> logging helper.
>
> Use the GUCSUBMIT component, which maps to XE_SIGID_GT_TDR, and pass -EIO
> as the errno value.
>
> Cc: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> Cc: Badal Nilawar <badal.nilawar@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
> ---
> v5:
> - Added GUCSUBMIT component and mapped it to XE_SIGID_GT_TDR.
> (Michal)
> - Used GUCSUBMIT instead of GT for the GuC submit reset failure.
> (Michal)
> - Dropped "request" from the reset failure message.
> (Michal)
>
> v4:
> - Clarified that the GT component maps to XE_SIGID_GT_TDR and -EIO is
> only the errno value. (Sashiko)
>
> v3:
> - Split the GuC reset-request failure conversion into a separate patch.
> (Michal)
> - Dropped GuC job-timeout warning conversions to avoid changing warn-level
> logs into error-level SIGID reports. (Michal)
> - Kept only the existing error path that maps naturally to GT_TDR. (Michal)
>
> v2:
> - Rebased on the latest structured SIGID logging series.
> - Switched from the old xe_ras_log_() helpers to the new xe_log_()
> helpers.
> - Dropped paths already covered by the base SIGID series.
>
> drivers/gpu/drm/xe/xe_guc_submit.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 99d8c807ff05..543cf7baae96 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -34,6 +34,7 @@
> #include "xe_guc_klv_helpers.h"
> #include "xe_guc_submit_types.h"
> #include "xe_hw_engine.h"
> +#include "xe_log.h"
> #include "xe_lrc.h"
> #include "xe_macros.h"
> #include "xe_map.h"
> @@ -3494,8 +3495,9 @@ int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 le
> reason = msg[2];
>
> /* Unexpected failure of a hardware feature, log an actual error */
> - xe_gt_err(gt, "GuC engine reset request failed on %d:%d because 0x%08X",
> - guc_class, instance, reason);
> + xe_log_err(gt, GUCSUBMIT, -EIO,
shouldn't we try to use different errno based on the 'reason' code?
AFAICT there are just few reasons that GuC will use here
> + "engine reset failed on %d:%d because 0x%08X\n",
> + guc_class, instance, reason);
nit: as both guc_class and instance are u8, we should print them as:
%u:%u
nit: the reason could be printed with just:
%#x
>
> xe_gt_reset_async(gt);
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v5 1/4] drm/xe/log: Add GUCSUBMIT component
2026-08-31 9:14 ` Michal Wajdeczko
@ 2026-08-31 9:56 ` Yadav, Arvind
0 siblings, 0 replies; 13+ messages in thread
From: Yadav, Arvind @ 2026-08-31 9:56 UTC (permalink / raw)
To: Michal Wajdeczko, intel-xe
Cc: rodrigo.vivi, badal.nilawar, himal.prasad.ghimiray,
dnyaneshwar.bhadane, mallesh.koujalagi, matthew.brost
On 31-08-2026 14:44, Michal Wajdeczko wrote:
>
> On 8/31/2026 10:05 AM, Arvind Yadav wrote:
>> Add a GUCSUBMIT component for structured SIGID logging.
>>
>> GuC submit failures can still map to an existing SIGID, but using the
>> generic GT component hides the source of the report. Add GUCSUBMIT as a
>> separate component and map it to XE_SIGID_GT_TDR.
>>
>> Cc: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
>> Cc: Badal Nilawar <badal.nilawar@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>> drivers/gpu/drm/xe/abi/xe_log_abi.h | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/xe/abi/xe_log_abi.h b/drivers/gpu/drm/xe/abi/xe_log_abi.h
>> index d6105520173e..19976df21532 100644
>> --- a/drivers/gpu/drm/xe/abi/xe_log_abi.h
>> +++ b/drivers/gpu/drm/xe/abi/xe_log_abi.h
>> @@ -159,6 +159,7 @@ enum xe_log_location_bits {
>> define(DRIVER_FIRMWARE, 1, GUC, RUNTIME_FW, "GuC") \
>> define(DRIVER_FIRMWARE, 2, HUC, RUNTIME_FW, "HuC") \
>> define(DRIVER_FIRMWARE, 3, GSC, RUNTIME_FW, "GSC") \
>> + define(DRIVER_FIRMWARE, 4, GUCSUBMIT, GT_TDR, "GuC Submit") \
> hmm, the goal of the DRIVER_FIRMWARE class was to have a way to
> differentiate between different firmware used by the driver, as
> in SIGID space there are only two RUNTIME/DRIVER_FW categories
>
> IMO "GuC submission" should be just a DRIVER class component,
> like we have PAGEFAULT component
Agreed, I will move GUCSUBMIT from DRIVER_FIRMWARE to DRIVER and keep it
mapped to XE_SIGID_GT_TDR. That keeps the same SIGID but makes the
component grouping correct.
Thanks
Arvind
>
>> define(DRIVER_FIRMWARE, 16, PCODE, DEVICE_FW, "PCode") \
>> define(DRIVER_FIRMWARE, 17, SYSCTRL, DEVICE_FW, "System Controller") \
>>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v5 2/4] drm/xe/guc: Report reset failure using SIGID
2026-08-31 9:31 ` Michal Wajdeczko
@ 2026-08-31 10:51 ` Yadav, Arvind
0 siblings, 0 replies; 13+ messages in thread
From: Yadav, Arvind @ 2026-08-31 10:51 UTC (permalink / raw)
To: Michal Wajdeczko, intel-xe
Cc: rodrigo.vivi, badal.nilawar, himal.prasad.ghimiray,
dnyaneshwar.bhadane, mallesh.koujalagi, matthew.brost
On 31-08-2026 15:01, Michal Wajdeczko wrote:
>
> On 8/31/2026 10:05 AM, Arvind Yadav wrote:
>> Route the GuC submit engine reset failure through the structured SIGID
>> logging helper.
>>
>> Use the GUCSUBMIT component, which maps to XE_SIGID_GT_TDR, and pass -EIO
>> as the errno value.
>>
>> Cc: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
>> Cc: Badal Nilawar <badal.nilawar@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Arvind Yadav <arvind.yadav@intel.com>
>> ---
>> v5:
>> - Added GUCSUBMIT component and mapped it to XE_SIGID_GT_TDR.
>> (Michal)
>> - Used GUCSUBMIT instead of GT for the GuC submit reset failure.
>> (Michal)
>> - Dropped "request" from the reset failure message.
>> (Michal)
>>
>> v4:
>> - Clarified that the GT component maps to XE_SIGID_GT_TDR and -EIO is
>> only the errno value. (Sashiko)
>>
>> v3:
>> - Split the GuC reset-request failure conversion into a separate patch.
>> (Michal)
>> - Dropped GuC job-timeout warning conversions to avoid changing warn-level
>> logs into error-level SIGID reports. (Michal)
>> - Kept only the existing error path that maps naturally to GT_TDR. (Michal)
>>
>> v2:
>> - Rebased on the latest structured SIGID logging series.
>> - Switched from the old xe_ras_log_() helpers to the new xe_log_()
>> helpers.
>> - Dropped paths already covered by the base SIGID series.
>>
>> drivers/gpu/drm/xe/xe_guc_submit.c | 6 ++++--
>> 1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
>> index 99d8c807ff05..543cf7baae96 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
>> @@ -34,6 +34,7 @@
>> #include "xe_guc_klv_helpers.h"
>> #include "xe_guc_submit_types.h"
>> #include "xe_hw_engine.h"
>> +#include "xe_log.h"
>> #include "xe_lrc.h"
>> #include "xe_macros.h"
>> #include "xe_map.h"
>> @@ -3494,8 +3495,9 @@ int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 le
>> reason = msg[2];
>>
>> /* Unexpected failure of a hardware feature, log an actual error */
>> - xe_gt_err(gt, "GuC engine reset request failed on %d:%d because 0x%08X",
>> - guc_class, instance, reason);
>> + xe_log_err(gt, GUCSUBMIT, -EIO,
> shouldn't we try to use different errno based on the 'reason' code?
> AFAICT there are just few reasons that GuC will use here
I used -EIO because this is a generic GuC engine reset failure, and the
GuC reason is only reported as a raw firmware value.
I would prefer not to add errno mapping as part of this SIGID conversion
patch. We can have separate patch for this.
>> + "engine reset failed on %d:%d because 0x%08X\n",
>> + guc_class, instance, reason);
> nit: as both guc_class and instance are u8, we should print them as:
>
> %u:%u
>
> nit: the reason could be printed with just:
>
> %#x
Noted, I will add this "engine reset failed on %u:%u, reason=%#x".
Thanks,
Arvind
>
>>
>> xe_gt_reset_async(gt);
>>
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for drm/xe: Report GT TDR and VM rebind faults using SIGID (rev5)
2026-08-31 8:05 [PATCH v5 0/4] drm/xe: Report GT TDR and VM rebind faults using SIGID Arvind Yadav
` (3 preceding siblings ...)
2026-08-31 8:05 ` [PATCH v5 4/4] drm/xe/gt: Report GT reset failure " Arvind Yadav
@ 2026-08-31 12:36 ` Patchwork
2026-08-31 13:20 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-31 14:32 ` ✓ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-31 12:36 UTC (permalink / raw)
To: Yadav, Arvind; +Cc: intel-xe
== Series Details ==
Series: drm/xe: Report GT TDR and VM rebind faults using SIGID (rev5)
URL : https://patchwork.freedesktop.org/series/171571/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:35:02] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:35:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:35:38] Starting KUnit Kernel (1/1)...
[12:35:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:35:39] ============= refcount_interrupt (4 subtests) ==============
[12:35:39] [PASSED] test_single_irq_change
[12:35:39] [PASSED] test_nested_irq_change
[12:35:39] [PASSED] test_multiple_irq_change
[12:35:39] [PASSED] test_irq_save
[12:35:39] =============== [PASSED] refcount_interrupt ================
[12:35:39] ================== guc_buf (11 subtests) ===================
[12:35:39] [PASSED] test_smallest
[12:35:39] [PASSED] test_largest
[12:35:39] [PASSED] test_granular
[12:35:39] [PASSED] test_unique
[12:35:39] [PASSED] test_overlap
[12:35:39] [PASSED] test_reusable
[12:35:39] [PASSED] test_too_big
[12:35:39] [PASSED] test_flush
[12:35:39] [PASSED] test_lookup
[12:35:39] [PASSED] test_data
[12:35:39] [PASSED] test_class
[12:35:39] ===================== [PASSED] guc_buf =====================
[12:35:39] =================== guc_dbm (7 subtests) ===================
[12:35:39] [PASSED] test_empty
[12:35:39] [PASSED] test_default
[12:35:39] ======================== test_size ========================
[12:35:39] [PASSED] 4
[12:35:39] [PASSED] 8
[12:35:39] [PASSED] 32
[12:35:39] [PASSED] 256
[12:35:39] ==================== [PASSED] test_size ====================
[12:35:39] ======================= test_reuse ========================
[12:35:39] [PASSED] 4
[12:35:39] [PASSED] 8
[12:35:39] [PASSED] 32
[12:35:39] [PASSED] 256
[12:35:39] =================== [PASSED] test_reuse ====================
[12:35:39] =================== test_range_overlap ====================
[12:35:39] [PASSED] 4
[12:35:39] [PASSED] 8
[12:35:39] [PASSED] 32
[12:35:39] [PASSED] 256
[12:35:39] =============== [PASSED] test_range_overlap ================
[12:35:39] =================== test_range_compact ====================
[12:35:39] [PASSED] 4
[12:35:39] [PASSED] 8
[12:35:39] [PASSED] 32
[12:35:39] [PASSED] 256
[12:35:39] =============== [PASSED] test_range_compact ================
[12:35:39] ==================== test_range_spare =====================
[12:35:39] [PASSED] 4
[12:35:39] [PASSED] 8
[12:35:39] [PASSED] 32
[12:35:39] [PASSED] 256
[12:35:39] ================ [PASSED] test_range_spare =================
[12:35:39] ===================== [PASSED] guc_dbm =====================
[12:35:39] =================== guc_idm (6 subtests) ===================
[12:35:39] [PASSED] bad_init
[12:35:39] [PASSED] no_init
[12:35:39] [PASSED] init_fini
[12:35:39] [PASSED] check_used
[12:35:39] [PASSED] check_quota
[12:35:39] [PASSED] check_all
[12:35:39] ===================== [PASSED] guc_idm =====================
[12:35:39] =============== guc_klv_helpers (9 subtests) ===============
[12:35:39] [PASSED] test_count
[12:35:39] [PASSED] test_encode_u32
[12:35:39] [PASSED] test_encode_u64
[12:35:39] [PASSED] test_encode_string
[12:35:39] [PASSED] test_encode_object_raw
[12:35:39] [PASSED] test_encode_object_klv
[12:35:39] [PASSED] test_encode_object_nested
[12:35:39] [PASSED] test_encode_object_basic
[12:35:39] [PASSED] test_print
[12:35:39] ================= [PASSED] guc_klv_helpers =================
[12:35:39] =================== xe_log (4 subtests) ====================
[12:35:39] [PASSED] demo_cper
[12:35:39] [PASSED] demo_dmesg
[12:35:39] ======================= test_dmesg ========================
[12:35:39] [PASSED] test_fatal
[12:35:39] [PASSED] test_fatal_tile
[12:35:39] [PASSED] test_fatal_gt
[12:35:39] [PASSED] test_fatal_comp
[12:35:39] [PASSED] test_fatal_comp_tile
[12:35:39] [PASSED] test_fatal_comp_gt
[12:35:39] [PASSED] test_fatal_all
[12:35:39] [PASSED] test_recoverable
[12:35:39] [PASSED] test_recoverable_tile
[12:35:39] [PASSED] test_recoverable_gt
[12:35:39] [PASSED] test_recoverable_comp
[12:35:39] [PASSED] test_recoverable_comp_tile
[12:35:39] [PASSED] test_recoverable_comp_gt
[12:35:39] [PASSED] test_recoverable_all
[12:35:39] [PASSED] test_info
[12:35:39] [PASSED] test_info_tile
[12:35:39] [PASSED] test_info_gt
[12:35:39] [PASSED] test_info_err
[12:35:39] [PASSED] test_info_comp
[12:35:39] [PASSED] test_info_comp_tile
[12:35:39] [PASSED] test_info_comp_gt
[12:35:39] [PASSED] test_info_all
[12:35:39] [PASSED] test_hw_fatal
[12:35:39] [PASSED] test_hw_recoverable
[12:35:39] [PASSED] test_hw_corrected
[12:35:39] [PASSED] test_hw_informational
[12:35:39] =================== [PASSED] test_dmesg ====================
[12:35:39] ====================== test_invalid =======================
[12:35:39] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[12:35:39] ================== [SKIPPED] test_invalid ==================
[12:35:39] ===================== [PASSED] xe_log ======================
[12:35:39] ================== no_relay (3 subtests) ===================
[12:35:39] [PASSED] xe_drops_guc2pf_if_not_ready
[12:35:39] [PASSED] xe_drops_guc2vf_if_not_ready
[12:35:39] [PASSED] xe_rejects_send_if_not_ready
[12:35:39] ==================== [PASSED] no_relay =====================
[12:35:39] ================== pf_relay (14 subtests) ==================
[12:35:39] [PASSED] pf_rejects_guc2pf_too_short
[12:35:39] [PASSED] pf_rejects_guc2pf_too_long
[12:35:39] [PASSED] pf_rejects_guc2pf_no_payload
[12:35:39] [PASSED] pf_fails_no_payload
[12:35:39] [PASSED] pf_fails_bad_origin
[12:35:39] [PASSED] pf_fails_bad_type
[12:35:39] [PASSED] pf_txn_reports_error
[12:35:39] [PASSED] pf_txn_sends_pf2guc
[12:35:39] [PASSED] pf_sends_pf2guc
[12:35:39] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:35:39] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:35:39] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:35:39] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:35:39] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:35:39] ==================== [PASSED] pf_relay =====================
[12:35:39] ================== vf_relay (3 subtests) ===================
[12:35:39] [PASSED] vf_rejects_guc2vf_too_short
[12:35:39] [PASSED] vf_rejects_guc2vf_too_long
[12:35:39] [PASSED] vf_rejects_guc2vf_no_payload
[12:35:39] ==================== [PASSED] vf_relay =====================
[12:35:39] ================ pf_gt_config (9 subtests) =================
[12:35:39] [PASSED] fair_contexts_1vf
[12:35:39] [PASSED] fair_doorbells_1vf
[12:35:39] [PASSED] fair_ggtt_1vf
[12:35:39] ====================== fair_vram_1vf ======================
[12:35:39] [PASSED] 3.50 GiB
[12:35:39] [PASSED] 11.5 GiB
[12:35:39] [PASSED] 15.5 GiB
[12:35:39] [PASSED] 31.5 GiB
[12:35:39] [PASSED] 63.5 GiB
[12:35:39] [PASSED] 1.91 GiB
[12:35:39] ================== [PASSED] fair_vram_1vf ==================
[12:35:39] ================ fair_vram_1vf_admin_only =================
[12:35:39] [PASSED] 3.50 GiB
[12:35:39] [PASSED] 11.5 GiB
[12:35:39] [PASSED] 15.5 GiB
[12:35:39] [PASSED] 31.5 GiB
[12:35:39] [PASSED] 63.5 GiB
[12:35:39] [PASSED] 1.91 GiB
[12:35:39] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:35:39] ====================== fair_contexts ======================
[12:35:39] [PASSED] 1 VF
[12:35:39] [PASSED] 2 VFs
[12:35:39] [PASSED] 3 VFs
[12:35:39] [PASSED] 4 VFs
[12:35:39] [PASSED] 5 VFs
[12:35:39] [PASSED] 6 VFs
[12:35:39] [PASSED] 7 VFs
[12:35:39] [PASSED] 8 VFs
[12:35:39] [PASSED] 9 VFs
[12:35:39] [PASSED] 10 VFs
[12:35:39] [PASSED] 11 VFs
[12:35:39] [PASSED] 12 VFs
[12:35:39] [PASSED] 13 VFs
[12:35:39] [PASSED] 14 VFs
[12:35:39] [PASSED] 15 VFs
[12:35:39] [PASSED] 16 VFs
[12:35:39] [PASSED] 17 VFs
[12:35:39] [PASSED] 18 VFs
[12:35:39] [PASSED] 19 VFs
[12:35:39] [PASSED] 20 VFs
[12:35:39] [PASSED] 21 VFs
[12:35:39] [PASSED] 22 VFs
[12:35:39] [PASSED] 23 VFs
[12:35:39] [PASSED] 24 VFs
[12:35:39] [PASSED] 25 VFs
[12:35:39] [PASSED] 26 VFs
[12:35:39] [PASSED] 27 VFs
[12:35:39] [PASSED] 28 VFs
[12:35:39] [PASSED] 29 VFs
[12:35:39] [PASSED] 30 VFs
[12:35:39] [PASSED] 31 VFs
[12:35:39] [PASSED] 32 VFs
[12:35:39] [PASSED] 33 VFs
[12:35:39] [PASSED] 34 VFs
[12:35:39] [PASSED] 35 VFs
[12:35:39] [PASSED] 36 VFs
[12:35:39] [PASSED] 37 VFs
[12:35:39] [PASSED] 38 VFs
[12:35:39] [PASSED] 39 VFs
[12:35:39] [PASSED] 40 VFs
[12:35:39] [PASSED] 41 VFs
[12:35:39] [PASSED] 42 VFs
[12:35:39] [PASSED] 43 VFs
[12:35:39] [PASSED] 44 VFs
[12:35:39] [PASSED] 45 VFs
[12:35:39] [PASSED] 46 VFs
[12:35:39] [PASSED] 47 VFs
[12:35:39] [PASSED] 48 VFs
[12:35:39] [PASSED] 49 VFs
[12:35:39] [PASSED] 50 VFs
[12:35:39] [PASSED] 51 VFs
[12:35:39] [PASSED] 52 VFs
[12:35:39] [PASSED] 53 VFs
[12:35:39] [PASSED] 54 VFs
[12:35:39] [PASSED] 55 VFs
[12:35:39] [PASSED] 56 VFs
[12:35:39] [PASSED] 57 VFs
[12:35:39] [PASSED] 58 VFs
[12:35:39] [PASSED] 59 VFs
[12:35:39] [PASSED] 60 VFs
[12:35:39] [PASSED] 61 VFs
[12:35:39] [PASSED] 62 VFs
[12:35:39] [PASSED] 63 VFs
[12:35:39] ================== [PASSED] fair_contexts ==================
[12:35:39] ===================== fair_doorbells ======================
[12:35:39] [PASSED] 1 VF
[12:35:39] [PASSED] 2 VFs
[12:35:39] [PASSED] 3 VFs
[12:35:39] [PASSED] 4 VFs
[12:35:39] [PASSED] 5 VFs
[12:35:39] [PASSED] 6 VFs
[12:35:39] [PASSED] 7 VFs
[12:35:39] [PASSED] 8 VFs
[12:35:39] [PASSED] 9 VFs
[12:35:39] [PASSED] 10 VFs
[12:35:39] [PASSED] 11 VFs
[12:35:39] [PASSED] 12 VFs
[12:35:39] [PASSED] 13 VFs
[12:35:39] [PASSED] 14 VFs
[12:35:39] [PASSED] 15 VFs
[12:35:39] [PASSED] 16 VFs
[12:35:39] [PASSED] 17 VFs
[12:35:39] [PASSED] 18 VFs
[12:35:39] [PASSED] 19 VFs
[12:35:39] [PASSED] 20 VFs
[12:35:39] [PASSED] 21 VFs
[12:35:39] [PASSED] 22 VFs
[12:35:39] [PASSED] 23 VFs
[12:35:39] [PASSED] 24 VFs
[12:35:39] [PASSED] 25 VFs
[12:35:39] [PASSED] 26 VFs
[12:35:39] [PASSED] 27 VFs
[12:35:39] [PASSED] 28 VFs
[12:35:39] [PASSED] 29 VFs
[12:35:39] [PASSED] 30 VFs
[12:35:39] [PASSED] 31 VFs
[12:35:39] [PASSED] 32 VFs
[12:35:39] [PASSED] 33 VFs
[12:35:39] [PASSED] 34 VFs
[12:35:39] [PASSED] 35 VFs
[12:35:39] [PASSED] 36 VFs
[12:35:39] [PASSED] 37 VFs
[12:35:39] [PASSED] 38 VFs
[12:35:39] [PASSED] 39 VFs
[12:35:39] [PASSED] 40 VFs
[12:35:39] [PASSED] 41 VFs
[12:35:39] [PASSED] 42 VFs
[12:35:39] [PASSED] 43 VFs
[12:35:39] [PASSED] 44 VFs
[12:35:39] [PASSED] 45 VFs
[12:35:39] [PASSED] 46 VFs
[12:35:39] [PASSED] 47 VFs
[12:35:39] [PASSED] 48 VFs
[12:35:39] [PASSED] 49 VFs
[12:35:39] [PASSED] 50 VFs
[12:35:39] [PASSED] 51 VFs
[12:35:39] [PASSED] 52 VFs
[12:35:39] [PASSED] 53 VFs
[12:35:39] [PASSED] 54 VFs
[12:35:39] [PASSED] 55 VFs
[12:35:39] [PASSED] 56 VFs
[12:35:39] [PASSED] 57 VFs
[12:35:39] [PASSED] 58 VFs
[12:35:39] [PASSED] 59 VFs
[12:35:39] [PASSED] 60 VFs
[12:35:39] [PASSED] 61 VFs
[12:35:39] [PASSED] 62 VFs
[12:35:39] [PASSED] 63 VFs
[12:35:39] ================= [PASSED] fair_doorbells ==================
[12:35:39] ======================== fair_ggtt ========================
[12:35:39] [PASSED] 1 VF
[12:35:39] [PASSED] 2 VFs
[12:35:39] [PASSED] 3 VFs
[12:35:39] [PASSED] 4 VFs
[12:35:39] [PASSED] 5 VFs
[12:35:39] [PASSED] 6 VFs
[12:35:39] [PASSED] 7 VFs
[12:35:39] [PASSED] 8 VFs
[12:35:39] [PASSED] 9 VFs
[12:35:39] [PASSED] 10 VFs
[12:35:39] [PASSED] 11 VFs
[12:35:39] [PASSED] 12 VFs
[12:35:39] [PASSED] 13 VFs
[12:35:39] [PASSED] 14 VFs
[12:35:39] [PASSED] 15 VFs
[12:35:39] [PASSED] 16 VFs
[12:35:39] [PASSED] 17 VFs
[12:35:39] [PASSED] 18 VFs
[12:35:39] [PASSED] 19 VFs
[12:35:39] [PASSED] 20 VFs
[12:35:39] [PASSED] 21 VFs
[12:35:39] [PASSED] 22 VFs
[12:35:39] [PASSED] 23 VFs
[12:35:39] [PASSED] 24 VFs
[12:35:39] [PASSED] 25 VFs
[12:35:39] [PASSED] 26 VFs
[12:35:39] [PASSED] 27 VFs
[12:35:39] [PASSED] 28 VFs
[12:35:39] [PASSED] 29 VFs
[12:35:39] [PASSED] 30 VFs
[12:35:39] [PASSED] 31 VFs
[12:35:39] [PASSED] 32 VFs
[12:35:39] [PASSED] 33 VFs
[12:35:39] [PASSED] 34 VFs
[12:35:39] [PASSED] 35 VFs
[12:35:39] [PASSED] 36 VFs
[12:35:39] [PASSED] 37 VFs
[12:35:39] [PASSED] 38 VFs
[12:35:39] [PASSED] 39 VFs
[12:35:39] [PASSED] 40 VFs
[12:35:39] [PASSED] 41 VFs
[12:35:39] [PASSED] 42 VFs
[12:35:39] [PASSED] 43 VFs
[12:35:39] [PASSED] 44 VFs
[12:35:39] [PASSED] 45 VFs
[12:35:39] [PASSED] 46 VFs
[12:35:39] [PASSED] 47 VFs
[12:35:39] [PASSED] 48 VFs
[12:35:39] [PASSED] 49 VFs
[12:35:39] [PASSED] 50 VFs
[12:35:39] [PASSED] 51 VFs
[12:35:39] [PASSED] 52 VFs
[12:35:39] [PASSED] 53 VFs
[12:35:39] [PASSED] 54 VFs
[12:35:39] [PASSED] 55 VFs
[12:35:39] [PASSED] 56 VFs
[12:35:39] [PASSED] 57 VFs
[12:35:39] [PASSED] 58 VFs
[12:35:39] [PASSED] 59 VFs
[12:35:39] [PASSED] 60 VFs
[12:35:39] [PASSED] 61 VFs
[12:35:39] [PASSED] 62 VFs
[12:35:39] [PASSED] 63 VFs
[12:35:39] ==================== [PASSED] fair_ggtt ====================
[12:35:39] ======================== fair_vram ========================
[12:35:39] [PASSED] 1 VF
[12:35:39] [PASSED] 2 VFs
[12:35:39] [PASSED] 3 VFs
[12:35:39] [PASSED] 4 VFs
[12:35:39] [PASSED] 5 VFs
[12:35:39] [PASSED] 6 VFs
[12:35:39] [PASSED] 7 VFs
[12:35:39] [PASSED] 8 VFs
[12:35:39] [PASSED] 9 VFs
[12:35:39] [PASSED] 10 VFs
[12:35:39] [PASSED] 11 VFs
[12:35:39] [PASSED] 12 VFs
[12:35:39] [PASSED] 13 VFs
[12:35:39] [PASSED] 14 VFs
[12:35:39] [PASSED] 15 VFs
[12:35:39] [PASSED] 16 VFs
[12:35:39] [PASSED] 17 VFs
[12:35:39] [PASSED] 18 VFs
[12:35:39] [PASSED] 19 VFs
[12:35:39] [PASSED] 20 VFs
[12:35:39] [PASSED] 21 VFs
[12:35:39] [PASSED] 22 VFs
[12:35:39] [PASSED] 23 VFs
[12:35:39] [PASSED] 24 VFs
[12:35:39] [PASSED] 25 VFs
[12:35:39] [PASSED] 26 VFs
[12:35:39] [PASSED] 27 VFs
[12:35:39] [PASSED] 28 VFs
[12:35:39] [PASSED] 29 VFs
[12:35:39] [PASSED] 30 VFs
[12:35:39] [PASSED] 31 VFs
[12:35:39] [PASSED] 32 VFs
[12:35:39] [PASSED] 33 VFs
[12:35:39] [PASSED] 34 VFs
[12:35:39] [PASSED] 35 VFs
[12:35:39] [PASSED] 36 VFs
[12:35:39] [PASSED] 37 VFs
[12:35:39] [PASSED] 38 VFs
[12:35:39] [PASSED] 39 VFs
[12:35:39] [PASSED] 40 VFs
[12:35:39] [PASSED] 41 VFs
[12:35:39] [PASSED] 42 VFs
[12:35:39] [PASSED] 43 VFs
[12:35:39] [PASSED] 44 VFs
[12:35:39] [PASSED] 45 VFs
[12:35:39] [PASSED] 46 VFs
[12:35:39] [PASSED] 47 VFs
[12:35:39] [PASSED] 48 VFs
[12:35:39] [PASSED] 49 VFs
[12:35:39] [PASSED] 50 VFs
[12:35:39] [PASSED] 51 VFs
[12:35:39] [PASSED] 52 VFs
[12:35:39] [PASSED] 53 VFs
[12:35:39] [PASSED] 54 VFs
[12:35:39] [PASSED] 55 VFs
[12:35:39] [PASSED] 56 VFs
[12:35:39] [PASSED] 57 VFs
[12:35:39] [PASSED] 58 VFs
[12:35:39] [PASSED] 59 VFs
[12:35:39] [PASSED] 60 VFs
[12:35:39] [PASSED] 61 VFs
[12:35:39] [PASSED] 62 VFs
[12:35:39] [PASSED] 63 VFs
[12:35:39] ==================== [PASSED] fair_vram ====================
[12:35:39] ================== [PASSED] pf_gt_config ===================
[12:35:39] ===================== lmtt (1 subtest) =====================
[12:35:39] ======================== test_ops =========================
[12:35:39] [PASSED] 2-level
[12:35:39] [PASSED] multi-level
[12:35:39] ==================== [PASSED] test_ops =====================
[12:35:39] ====================== [PASSED] lmtt =======================
[12:35:39] ================= sriov_packet (1 subtest) =================
[12:35:39] [PASSED] test_descriptor_init
[12:35:39] ================== [PASSED] sriov_packet ===================
[12:35:39] ================= pf_service (11 subtests) =================
[12:35:39] [PASSED] pf_negotiate_any
[12:35:39] [PASSED] pf_negotiate_base_match
[12:35:39] [PASSED] pf_negotiate_base_newer
[12:35:39] [PASSED] pf_negotiate_base_next
[12:35:39] [SKIPPED] pf_negotiate_base_older (no older minor)
[12:35:39] [PASSED] pf_negotiate_base_prev
[12:35:39] [PASSED] pf_negotiate_latest_match
[12:35:39] [PASSED] pf_negotiate_latest_newer
[12:35:39] [PASSED] pf_negotiate_latest_next
[12:35:39] [SKIPPED] pf_negotiate_latest_older (no older minor)
[12:35:39] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[12:35:39] =================== [PASSED] pf_service ====================
[12:35:39] ================= xe_guc_g2g (2 subtests) ==================
[12:35:39] ============== xe_live_guc_g2g_kunit_default ==============
[12:35:39] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:35:39] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:35:39] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:35:39] =================== [SKIPPED] xe_guc_g2g ===================
[12:35:39] =================== xe_mocs (2 subtests) ===================
[12:35:39] ================ xe_live_mocs_kernel_kunit ================
[12:35:39] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:35:39] ================ xe_live_mocs_reset_kunit =================
[12:35:39] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:35:39] ==================== [SKIPPED] xe_mocs =====================
[12:35:39] ================= xe_migrate (2 subtests) ==================
[12:35:39] ================= xe_migrate_sanity_kunit =================
[12:35:39] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:35:39] ================== xe_validate_ccs_kunit ==================
[12:35:39] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:35:39] =================== [SKIPPED] xe_migrate ===================
[12:35:39] ================== xe_dma_buf (1 subtest) ==================
[12:35:39] ==================== xe_dma_buf_kunit =====================
[12:35:39] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:35:39] =================== [SKIPPED] xe_dma_buf ===================
[12:35:39] ================= xe_bo_shrink (1 subtest) =================
[12:35:39] =================== xe_bo_shrink_kunit ====================
[12:35:39] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:35:39] ================== [SKIPPED] xe_bo_shrink ==================
[12:35:39] ==================== xe_bo (2 subtests) ====================
[12:35:39] ================== xe_ccs_migrate_kunit ===================
[12:35:39] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:35:39] ==================== xe_bo_evict_kunit ====================
[12:35:39] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:35:39] ===================== [SKIPPED] xe_bo ======================
[12:35:39] =================== xe_any (9 subtests) ====================
[12:35:39] [PASSED] test_to_xe
[12:35:39] [PASSED] test_to_dev
[12:35:39] [PASSED] test_to_pdev
[12:35:39] [PASSED] test_to_drm
[12:35:39] [PASSED] test_if_pdev
[12:35:39] [PASSED] test_if_xe
[12:35:39] [PASSED] test_if_tile
[12:35:39] [PASSED] test_if_gt
[12:35:39] [PASSED] test_to_id
[12:35:39] ===================== [PASSED] xe_any ======================
[12:35:39] ==================== args (13 subtests) ====================
[12:35:39] [PASSED] count_args_test
[12:35:39] [PASSED] call_args_example
[12:35:39] [PASSED] call_args_test
[12:35:39] [PASSED] drop_first_arg_example
[12:35:39] [PASSED] drop_first_arg_test
[12:35:39] [PASSED] first_arg_example
[12:35:39] [PASSED] first_arg_test
[12:35:39] [PASSED] last_arg_example
[12:35:39] [PASSED] last_arg_test
[12:35:39] [PASSED] pick_arg_example
[12:35:39] [PASSED] if_args_example
[12:35:39] [PASSED] if_args_test
[12:35:39] [PASSED] sep_comma_example
[12:35:39] ====================== [PASSED] args =======================
[12:35:39] =================== xe_pci (3 subtests) ====================
[12:35:39] ==================== check_graphics_ip ====================
[12:35:39] [PASSED] 12.00 Xe_LP
[12:35:39] [PASSED] 12.10 Xe_LP+
[12:35:39] [PASSED] 12.55 Xe_HPG
[12:35:39] [PASSED] 12.60 Xe_HPC
[12:35:39] [PASSED] 12.70 Xe_LPG
[12:35:39] [PASSED] 12.71 Xe_LPG
[12:35:39] [PASSED] 12.74 Xe_LPG+
[12:35:39] [PASSED] 20.01 Xe2_HPG
[12:35:39] [PASSED] 20.02 Xe2_HPG
[12:35:39] [PASSED] 20.04 Xe2_LPG
[12:35:39] [PASSED] 30.00 Xe3_LPG
[12:35:39] [PASSED] 30.01 Xe3_LPG
[12:35:39] [PASSED] 30.03 Xe3_LPG
[12:35:39] [PASSED] 30.04 Xe3_LPG
[12:35:39] [PASSED] 30.05 Xe3_LPG
[12:35:39] [PASSED] 35.10 Xe3p_LPG
[12:35:39] [PASSED] 35.11 Xe3p_XPC
[12:35:39] ================ [PASSED] check_graphics_ip ================
[12:35:39] ===================== check_media_ip ======================
[12:35:39] [PASSED] 12.00 Xe_M
[12:35:39] [PASSED] 12.55 Xe_HPM
[12:35:39] [PASSED] 13.00 Xe_LPM+
[12:35:39] [PASSED] 13.01 Xe2_HPM
[12:35:39] [PASSED] 20.00 Xe2_LPM
[12:35:39] [PASSED] 30.00 Xe3_LPM
[12:35:39] [PASSED] 30.02 Xe3_LPM
[12:35:39] [PASSED] 35.00 Xe3p_LPM
[12:35:39] [PASSED] 35.03 Xe3p_HPM
[12:35:39] ================= [PASSED] check_media_ip ==================
[12:35:39] =================== check_platform_desc ===================
[12:35:39] [PASSED] 0x9A60 (TIGERLAKE)
[12:35:39] [PASSED] 0x9A68 (TIGERLAKE)
[12:35:39] [PASSED] 0x9A70 (TIGERLAKE)
[12:35:39] [PASSED] 0x9A40 (TIGERLAKE)
[12:35:39] [PASSED] 0x9A49 (TIGERLAKE)
[12:35:39] [PASSED] 0x9A59 (TIGERLAKE)
[12:35:39] [PASSED] 0x9A78 (TIGERLAKE)
[12:35:39] [PASSED] 0x9AC0 (TIGERLAKE)
[12:35:39] [PASSED] 0x9AC9 (TIGERLAKE)
[12:35:39] [PASSED] 0x9AD9 (TIGERLAKE)
[12:35:39] [PASSED] 0x9AF8 (TIGERLAKE)
[12:35:39] [PASSED] 0x4C80 (ROCKETLAKE)
[12:35:39] [PASSED] 0x4C8A (ROCKETLAKE)
[12:35:39] [PASSED] 0x4C8B (ROCKETLAKE)
[12:35:39] [PASSED] 0x4C8C (ROCKETLAKE)
[12:35:39] [PASSED] 0x4C90 (ROCKETLAKE)
[12:35:39] [PASSED] 0x4C9A (ROCKETLAKE)
[12:35:39] [PASSED] 0x4680 (ALDERLAKE_S)
[12:35:39] [PASSED] 0x4682 (ALDERLAKE_S)
[12:35:39] [PASSED] 0x4688 (ALDERLAKE_S)
[12:35:39] [PASSED] 0x468A (ALDERLAKE_S)
[12:35:39] [PASSED] 0x468B (ALDERLAKE_S)
[12:35:39] [PASSED] 0x4690 (ALDERLAKE_S)
[12:35:39] [PASSED] 0x4692 (ALDERLAKE_S)
[12:35:39] [PASSED] 0x4693 (ALDERLAKE_S)
[12:35:39] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46AA (ALDERLAKE_P)
[12:35:39] [PASSED] 0x462A (ALDERLAKE_P)
[12:35:39] [PASSED] 0x4626 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x4628 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:35:39] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:35:39] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:35:39] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:35:39] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:35:39] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:35:39] [PASSED] 0xA721 (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA720 (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:35:39] [PASSED] 0xA780 (ALDERLAKE_S)
[12:35:39] [PASSED] 0xA781 (ALDERLAKE_S)
[12:35:39] [PASSED] 0xA782 (ALDERLAKE_S)
[12:35:39] [PASSED] 0xA783 (ALDERLAKE_S)
[12:35:39] [PASSED] 0xA788 (ALDERLAKE_S)
[12:35:39] [PASSED] 0xA789 (ALDERLAKE_S)
[12:35:39] [PASSED] 0xA78A (ALDERLAKE_S)
[12:35:39] [PASSED] 0xA78B (ALDERLAKE_S)
[12:35:39] [PASSED] 0x4905 (DG1)
[12:35:39] [PASSED] 0x4906 (DG1)
[12:35:39] [PASSED] 0x4907 (DG1)
[12:35:39] [PASSED] 0x4908 (DG1)
[12:35:39] [PASSED] 0x4909 (DG1)
[12:35:39] [PASSED] 0x56C0 (DG2)
[12:35:39] [PASSED] 0x56C2 (DG2)
[12:35:39] [PASSED] 0x56C1 (DG2)
[12:35:39] [PASSED] 0x7D51 (METEORLAKE)
[12:35:39] [PASSED] 0x7DD1 (METEORLAKE)
[12:35:39] [PASSED] 0x7D41 (METEORLAKE)
[12:35:39] [PASSED] 0x7D67 (METEORLAKE)
[12:35:39] [PASSED] 0xB640 (METEORLAKE)
[12:35:39] [PASSED] 0x56A0 (DG2)
[12:35:39] [PASSED] 0x56A1 (DG2)
[12:35:39] [PASSED] 0x56A2 (DG2)
[12:35:39] [PASSED] 0x56BE (DG2)
[12:35:39] [PASSED] 0x56BF (DG2)
[12:35:39] [PASSED] 0x5690 (DG2)
[12:35:39] [PASSED] 0x5691 (DG2)
[12:35:39] [PASSED] 0x5692 (DG2)
[12:35:39] [PASSED] 0x56A5 (DG2)
[12:35:39] [PASSED] 0x56A6 (DG2)
[12:35:39] [PASSED] 0x56B0 (DG2)
[12:35:39] [PASSED] 0x56B1 (DG2)
[12:35:39] [PASSED] 0x56BA (DG2)
[12:35:39] [PASSED] 0x56BB (DG2)
[12:35:39] [PASSED] 0x56BC (DG2)
[12:35:39] [PASSED] 0x56BD (DG2)
[12:35:39] [PASSED] 0x5693 (DG2)
[12:35:39] [PASSED] 0x5694 (DG2)
[12:35:39] [PASSED] 0x5695 (DG2)
[12:35:39] [PASSED] 0x56A3 (DG2)
[12:35:39] [PASSED] 0x56A4 (DG2)
[12:35:39] [PASSED] 0x56B2 (DG2)
[12:35:39] [PASSED] 0x56B3 (DG2)
[12:35:39] [PASSED] 0x5696 (DG2)
[12:35:39] [PASSED] 0x5697 (DG2)
[12:35:39] [PASSED] 0xB69 (PVC)
[12:35:39] [PASSED] 0xB6E (PVC)
[12:35:39] [PASSED] 0xBD4 (PVC)
[12:35:39] [PASSED] 0xBD5 (PVC)
[12:35:39] [PASSED] 0xBD6 (PVC)
[12:35:39] [PASSED] 0xBD7 (PVC)
[12:35:39] [PASSED] 0xBD8 (PVC)
[12:35:39] [PASSED] 0xBD9 (PVC)
[12:35:39] [PASSED] 0xBDA (PVC)
[12:35:39] [PASSED] 0xBDB (PVC)
[12:35:39] [PASSED] 0xBE0 (PVC)
[12:35:39] [PASSED] 0xBE1 (PVC)
[12:35:39] [PASSED] 0xBE5 (PVC)
[12:35:39] [PASSED] 0x7D40 (METEORLAKE)
[12:35:39] [PASSED] 0x7D45 (METEORLAKE)
[12:35:39] [PASSED] 0x7D55 (METEORLAKE)
[12:35:39] [PASSED] 0x7D60 (METEORLAKE)
[12:35:39] [PASSED] 0x7DD5 (METEORLAKE)
[12:35:39] [PASSED] 0x6420 (LUNARLAKE)
[12:35:39] [PASSED] 0x64A0 (LUNARLAKE)
[12:35:39] [PASSED] 0x64B0 (LUNARLAKE)
[12:35:39] [PASSED] 0xE202 (BATTLEMAGE)
[12:35:39] [PASSED] 0xE209 (BATTLEMAGE)
[12:35:39] [PASSED] 0xE20B (BATTLEMAGE)
[12:35:39] [PASSED] 0xE20C (BATTLEMAGE)
[12:35:39] [PASSED] 0xE20D (BATTLEMAGE)
[12:35:39] [PASSED] 0xE210 (BATTLEMAGE)
[12:35:39] [PASSED] 0xE211 (BATTLEMAGE)
[12:35:39] [PASSED] 0xE212 (BATTLEMAGE)
[12:35:39] [PASSED] 0xE216 (BATTLEMAGE)
[12:35:39] [PASSED] 0xE220 (BATTLEMAGE)
[12:35:39] [PASSED] 0xE221 (BATTLEMAGE)
[12:35:39] [PASSED] 0xE222 (BATTLEMAGE)
[12:35:39] [PASSED] 0xE223 (BATTLEMAGE)
[12:35:39] [PASSED] 0xB080 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB081 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB082 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB083 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB084 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB085 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB086 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB087 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB08F (PANTHERLAKE)
[12:35:39] [PASSED] 0xB090 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:35:39] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:35:39] [PASSED] 0xFD80 (PANTHERLAKE)
[12:35:39] [PASSED] 0xFD81 (PANTHERLAKE)
[12:35:39] [PASSED] 0xD740 (NOVALAKE_S)
[12:35:39] [PASSED] 0xD741 (NOVALAKE_S)
[12:35:39] [PASSED] 0xD742 (NOVALAKE_S)
[12:35:39] [PASSED] 0xD743 (NOVALAKE_S)
[12:35:39] [PASSED] 0xD745 (NOVALAKE_S)
[12:35:39] [PASSED] 0xD74A (NOVALAKE_S)
[12:35:39] [PASSED] 0xD74B (NOVALAKE_S)
[12:35:39] [PASSED] 0x674C (CRESCENTISLAND)
[12:35:39] [PASSED] 0x674D (CRESCENTISLAND)
[12:35:39] [PASSED] 0x674E (CRESCENTISLAND)
[12:35:39] [PASSED] 0x674F (CRESCENTISLAND)
[12:35:39] [PASSED] 0x6750 (CRESCENTISLAND)
[12:35:39] [PASSED] 0xD750 (NOVALAKE_P)
[12:35:39] [PASSED] 0xD751 (NOVALAKE_P)
[12:35:39] [PASSED] 0xD752 (NOVALAKE_P)
[12:35:39] [PASSED] 0xD753 (NOVALAKE_P)
[12:35:39] [PASSED] 0xD754 (NOVALAKE_P)
[12:35:39] [PASSED] 0xD755 (NOVALAKE_P)
[12:35:39] [PASSED] 0xD756 (NOVALAKE_P)
[12:35:39] [PASSED] 0xD757 (NOVALAKE_P)
[12:35:39] [PASSED] 0xD75F (NOVALAKE_P)
[12:35:39] =============== [PASSED] check_platform_desc ===============
[12:35:39] ===================== [PASSED] xe_pci ======================
[12:35:39] ============= xe_rtp_tables_test (5 subtests) ==============
[12:35:39] ================== xe_rtp_table_gt_test ===================
[12:35:39] [PASSED] gt_was/14011060649
[12:35:39] [PASSED] gt_was/14011059788
[12:35:39] [PASSED] gt_was/14015795083
[12:35:39] [PASSED] gt_was/16021867713
[12:35:39] [PASSED] gt_was/14019449301
[12:35:39] [PASSED] gt_was/16028005424
[12:35:39] [PASSED] gt_was/14026578760
[12:35:39] [PASSED] gt_was/1409420604
[12:35:39] [PASSED] gt_was/1408615072
[12:35:39] [PASSED] gt_was/22010523718
[12:35:39] [PASSED] gt_was/14011006942
[12:35:39] [PASSED] gt_was/14014830051
[12:35:39] [PASSED] gt_was/18018781329
[12:35:39] [PASSED] gt_was/1509235366
[12:35:39] [PASSED] gt_was/18018781329
[12:35:39] [PASSED] gt_was/16016694945
[12:35:39] [PASSED] gt_was/14018575942
[12:35:39] [PASSED] gt_was/22016670082
[12:35:39] [PASSED] gt_was/22016670082
[12:35:39] [PASSED] gt_was/14017421178
[12:35:39] [PASSED] gt_was/16025250150
[12:35:39] [PASSED] gt_was/14021871409
[12:35:39] [PASSED] gt_was/16021865536
[12:35:39] [PASSED] gt_was/14021486841
[12:35:39] [PASSED] gt_was/14025160223
[12:35:39] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[12:35:39] [PASSED] gt_was/14025635424
[12:35:39] [PASSED] gt_was/16028005424
[12:35:39] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:35:39] ================== xe_rtp_table_gt_test ===================
[12:35:39] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:35:39] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:35:39] [PASSED] gt_tunings/Tuning: L3 cache
[12:35:39] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:35:39] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:35:39] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:35:39] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:35:39] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:35:39] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:35:39] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:35:39] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:35:39] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:35:39] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:35:39] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:35:39] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:35:39] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:35:39] ================== xe_rtp_table_oob_test ==================
[12:35:39] [PASSED] oob_was/1607983814
[12:35:39] [PASSED] oob_was/16010904313
[12:35:39] [PASSED] oob_was/18022495364
[12:35:39] [PASSED] oob_was/22012773006
[12:35:39] [PASSED] oob_was/14014475959
[12:35:39] [PASSED] oob_was/22011391025
[12:35:39] [PASSED] oob_was/22012727170
[12:35:39] [PASSED] oob_was/22012727685
[12:35:39] [PASSED] oob_was/22016596838
[12:35:39] [PASSED] oob_was/18020744125
[12:35:39] [PASSED] oob_was/1409600907
[12:35:39] [PASSED] oob_was/22014953428
[12:35:39] [PASSED] oob_was/16017236439
[12:35:39] [PASSED] oob_was/14019821291
[12:35:39] [PASSED] oob_was/14015076503
[12:35:39] [PASSED] oob_was/14018913170
[12:35:39] [PASSED] oob_was/14018094691
[12:35:39] [PASSED] oob_was/18024947630
[12:35:39] [PASSED] oob_was/16022287689
[12:35:39] [PASSED] oob_was/13011645652
[12:35:39] [PASSED] oob_was/14022293748
[12:35:39] [PASSED] oob_was/22019794406
[12:35:39] [PASSED] oob_was/22019338487
[12:35:39] [PASSED] oob_was/16023588340
[12:35:39] [PASSED] oob_was/14019789679
[12:35:39] [PASSED] oob_was/14022866841
[12:35:39] [PASSED] oob_was/16021333562
[12:35:39] [PASSED] oob_was/14016712196
[12:35:39] [PASSED] oob_was/14015568240
[12:35:39] [PASSED] oob_was/18013179988
[12:35:39] [PASSED] oob_was/1508761755
[12:35:39] [PASSED] oob_was/16023105232
[12:35:39] [PASSED] oob_was/16026508708
[12:35:39] [PASSED] oob_was/14020001231
[12:35:39] [PASSED] oob_was/16023683509
[12:35:39] [PASSED] oob_was/14025515070
[12:35:39] [PASSED] oob_was/15015404425_disable
[12:35:39] [PASSED] oob_was/16026007364
[12:35:39] [PASSED] oob_was/14020316580
[12:35:39] [PASSED] oob_was/14025883347
[12:35:39] [PASSED] oob_was/16029380221
[12:35:39] [PASSED] oob_was/22022079272
[12:35:39] [PASSED] oob_was/16029897822
[12:35:39] [PASSED] oob_was/14027054324
[12:35:39] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:35:39] ================ xe_rtp_table_dev_oob_test ================
[12:35:39] [PASSED] device_oob_was/22010954014
[12:35:39] [PASSED] device_oob_was/15015404425
[12:35:39] [PASSED] device_oob_was/22019338487_display
[12:35:39] [PASSED] device_oob_was/14022085890
[12:35:39] [PASSED] device_oob_was/14026539277
[12:35:39] [PASSED] device_oob_was/14026633728
[12:35:39] [PASSED] device_oob_was/14026746987
[12:35:39] [PASSED] device_oob_was/14026779378
[12:35:39] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:35:39] ========== xe_rtp_table_missing_upper_bound_test ==========
[12:35:39] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[12:35:39] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[12:35:39] [PASSED] register_whitelist/1806527549
[12:35:39] [PASSED] register_whitelist/allow_read_ctx_timestamp
[12:35:39] [PASSED] register_whitelist/allow_read_queue_timestamp
[12:35:39] [PASSED] register_whitelist/16014440446
[12:35:39] [PASSED] register_whitelist/16017236439
[12:35:39] [PASSED] register_whitelist/16020183090
[12:35:39] [PASSED] register_whitelist/14024997852
[12:35:39] [PASSED] register_whitelist/14024997852
[12:35:39] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[12:35:39] =============== [PASSED] xe_rtp_tables_test ================
[12:35:39] =================== xe_rtp (3 subtests) ====================
[12:35:39] =================== xe_rtp_rules_tests ====================
[12:35:39] [PASSED] no
[12:35:39] [PASSED] yes
[12:35:39] [PASSED] no-and-no
[12:35:39] [PASSED] no-and-yes
[12:35:39] [PASSED] yes-and-no
[12:35:39] [PASSED] yes-and-yes
[12:35:39] [PASSED] no-or-no
[12:35:39] [PASSED] no-or-yes
[12:35:39] [PASSED] yes-or-no
[12:35:39] [PASSED] yes-or-yes
[12:35:39] [PASSED] no-yes-or-yes-no
[12:35:39] [PASSED] no-yes-or-yes-yes
[12:35:39] [PASSED] yes-yes-or-no-yes
[12:35:39] [PASSED] yes-yes-or-yes-yes
[12:35:39] [PASSED] no-no-or-yes-or-no
[12:35:39] [PASSED] or
[12:35:39] [PASSED] or-yes
[12:35:39] [PASSED] or-no
[12:35:39] [PASSED] yes-or
[12:35:39] [PASSED] no-or
[12:35:39] [PASSED] no-or-or-yes
[12:35:39] [PASSED] yes-or-or-no
[12:35:39] [PASSED] no-or-or-no
[12:35:39] [PASSED] missing-context-engine-class
[12:35:39] [PASSED] missing-context-engine-class-or-yes
[12:35:39] [PASSED] missing-context-engine-class-or-or-yes
[12:35:39] =============== [PASSED] xe_rtp_rules_tests ================
[12:35:39] =============== xe_rtp_process_to_sr_tests ================
[12:35:39] [PASSED] coalesce-same-reg
[12:35:39] [PASSED] coalesce-same-reg-literal-and-func
[12:35:39] [PASSED] no-match-no-add
[12:35:39] [PASSED] two-regs-two-entries
[12:35:39] [PASSED] clr-one-set-other
[12:35:39] [PASSED] set-field
[12:35:39] [PASSED] conflict-duplicate
[12:35:39] [PASSED] conflict-not-disjoint
[12:35:39] [PASSED] conflict-not-disjoint-literal-and-func
[12:35:39] [PASSED] conflict-reg-type
[12:35:39] [PASSED] bad-mcr-reg-forced-to-regular
[12:35:39] [PASSED] bad-regular-reg-forced-to-mcr
[12:35:39] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:35:39] ================== xe_rtp_process_tests ===================
[12:35:39] [PASSED] active1
[12:35:39] [PASSED] active2
[12:35:39] [PASSED] active-inactive
[12:35:39] [PASSED] inactive-active
[12:35:39] [PASSED] inactive-active-inactive
[12:35:39] [PASSED] inactive-inactive-inactive
[12:35:39] ============== [PASSED] xe_rtp_process_tests ===============
[12:35:39] ===================== [PASSED] xe_rtp ======================
[12:35:39] ==================== xe_wa (1 subtest) =====================
[12:35:39] ======================== xe_wa_gt =========================
[12:35:39] [PASSED] TIGERLAKE B0
[12:35:39] [PASSED] DG1 A0
[12:35:39] [PASSED] DG1 B0
[12:35:39] [PASSED] ALDERLAKE_S A0
[12:35:39] [PASSED] ALDERLAKE_S B0
[12:35:39] [PASSED] ALDERLAKE_S C0
[12:35:39] [PASSED] ALDERLAKE_S D0
[12:35:39] [PASSED] ALDERLAKE_P A0
[12:35:39] [PASSED] ALDERLAKE_P B0
[12:35:39] [PASSED] ALDERLAKE_P C0
[12:35:39] [PASSED] ALDERLAKE_S RPLS D0
[12:35:39] [PASSED] ALDERLAKE_P RPLU E0
[12:35:39] [PASSED] DG2 G10 C0
[12:35:39] [PASSED] DG2 G11 B1
[12:35:39] [PASSED] DG2 G12 A1
[12:35:39] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:35:39] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:35:39] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:35:39] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:35:39] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:35:39] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:35:39] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:35:39] ==================== [PASSED] xe_wa_gt =====================
[12:35:39] ====================== [PASSED] xe_wa ======================
[12:35:39] ============================================================
[12:35:39] Testing complete. Ran 793 tests: passed: 765, skipped: 28
[12:35:39] Elapsed time: 37.276s total, 4.478s configuring, 32.082s building, 0.695s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:35:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:35:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:36:06] Starting KUnit Kernel (1/1)...
[12:36:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:36:06] ============= refcount_interrupt (4 subtests) ==============
[12:36:06] [PASSED] test_single_irq_change
[12:36:06] [PASSED] test_nested_irq_change
[12:36:06] [PASSED] test_multiple_irq_change
[12:36:06] [PASSED] test_irq_save
[12:36:06] =============== [PASSED] refcount_interrupt ================
[12:36:06] ============ drm_test_pick_cmdline (2 subtests) ============
[12:36:06] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:36:06] =============== drm_test_pick_cmdline_named ===============
[12:36:06] [PASSED] NTSC
[12:36:06] [PASSED] NTSC-J
[12:36:06] [PASSED] PAL
[12:36:06] [PASSED] PAL-M
[12:36:06] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:36:06] ============== [PASSED] drm_test_pick_cmdline ==============
[12:36:06] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:36:06] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:36:06] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:36:06] =========== drm_validate_clone_mode (2 subtests) ===========
[12:36:06] ============== drm_test_check_in_clone_mode ===============
[12:36:06] [PASSED] in_clone_mode
[12:36:06] [PASSED] not_in_clone_mode
[12:36:06] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:36:06] =============== drm_test_check_valid_clones ===============
[12:36:06] [PASSED] not_in_clone_mode
[12:36:06] [PASSED] valid_clone
[12:36:06] [PASSED] invalid_clone
[12:36:06] =========== [PASSED] drm_test_check_valid_clones ===========
[12:36:06] ============= [PASSED] drm_validate_clone_mode =============
[12:36:06] ============= drm_validate_modeset (1 subtest) =============
[12:36:06] [PASSED] drm_test_check_connector_changed_modeset
[12:36:06] ============== [PASSED] drm_validate_modeset ===============
[12:36:06] ====== drm_test_bridge_get_current_state (1 subtest) =======
[12:36:06] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:36:06] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:36:06] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:36:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:36:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:36:06] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[12:36:06] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:36:06] ============== drm_bridge_alloc (2 subtests) ===============
[12:36:06] [PASSED] drm_test_drm_bridge_alloc_basic
[12:36:06] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:36:06] ================ [PASSED] drm_bridge_alloc =================
[12:36:06] ============= drm_bridge_bus_fmt (5 subtests) ==============
[12:36:06] [PASSED] drm_test_bridge_rgb_yuv_rgb
[12:36:06] [PASSED] drm_test_bridge_must_convert_to_yuv444
[12:36:06] [PASSED] drm_test_bridge_hdmi_auto_rgb
[12:36:06] [PASSED] drm_test_bridge_auto_first
[12:36:06] [PASSED] drm_test_bridge_rgb_yuv_no_path
[12:36:06] =============== [PASSED] drm_bridge_bus_fmt ================
[12:36:06] ============= drm_cmdline_parser (40 subtests) =============
[12:36:06] [PASSED] drm_test_cmdline_force_d_only
[12:36:06] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:36:06] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:36:06] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:36:06] [PASSED] drm_test_cmdline_force_e_only
[12:36:06] [PASSED] drm_test_cmdline_res
[12:36:06] [PASSED] drm_test_cmdline_res_vesa
[12:36:06] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:36:06] [PASSED] drm_test_cmdline_res_rblank
[12:36:06] [PASSED] drm_test_cmdline_res_bpp
[12:36:06] [PASSED] drm_test_cmdline_res_refresh
[12:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:36:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:36:06] [PASSED] drm_test_cmdline_res_margins_force_on
[12:36:06] [PASSED] drm_test_cmdline_res_vesa_margins
[12:36:06] [PASSED] drm_test_cmdline_name
[12:36:06] [PASSED] drm_test_cmdline_name_bpp
[12:36:06] [PASSED] drm_test_cmdline_name_option
[12:36:06] [PASSED] drm_test_cmdline_name_bpp_option
[12:36:06] [PASSED] drm_test_cmdline_rotate_0
[12:36:06] [PASSED] drm_test_cmdline_rotate_90
[12:36:06] [PASSED] drm_test_cmdline_rotate_180
[12:36:06] [PASSED] drm_test_cmdline_rotate_270
[12:36:06] [PASSED] drm_test_cmdline_hmirror
[12:36:06] [PASSED] drm_test_cmdline_vmirror
[12:36:06] [PASSED] drm_test_cmdline_margin_options
[12:36:06] [PASSED] drm_test_cmdline_multiple_options
[12:36:06] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:36:06] [PASSED] drm_test_cmdline_extra_and_option
[12:36:06] [PASSED] drm_test_cmdline_freestanding_options
[12:36:06] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:36:06] [PASSED] drm_test_cmdline_panel_orientation
[12:36:06] ================ drm_test_cmdline_invalid =================
[12:36:06] [PASSED] margin_only
[12:36:06] [PASSED] interlace_only
[12:36:06] [PASSED] res_missing_x
[12:36:06] [PASSED] res_missing_y
[12:36:06] [PASSED] res_bad_y
[12:36:06] [PASSED] res_missing_y_bpp
[12:36:06] [PASSED] res_bad_bpp
[12:36:06] [PASSED] res_bad_refresh
[12:36:06] [PASSED] res_bpp_refresh_force_on_off
[12:36:06] [PASSED] res_invalid_mode
[12:36:06] [PASSED] res_bpp_wrong_place_mode
[12:36:06] [PASSED] name_bpp_refresh
[12:36:06] [PASSED] name_refresh
[12:36:06] [PASSED] name_refresh_wrong_mode
[12:36:06] [PASSED] name_refresh_invalid_mode
[12:36:06] [PASSED] rotate_multiple
[12:36:06] [PASSED] rotate_invalid_val
[12:36:06] [PASSED] rotate_truncated
[12:36:06] [PASSED] invalid_option
[12:36:06] [PASSED] invalid_tv_option
[12:36:06] [PASSED] truncated_tv_option
[12:36:06] ============ [PASSED] drm_test_cmdline_invalid =============
[12:36:06] =============== drm_test_cmdline_tv_options ===============
[12:36:06] [PASSED] NTSC
[12:36:06] [PASSED] NTSC_443
[12:36:06] [PASSED] NTSC_J
[12:36:06] [PASSED] PAL
[12:36:06] [PASSED] PAL_M
[12:36:06] [PASSED] PAL_N
[12:36:06] [PASSED] SECAM
[12:36:06] [PASSED] MONO_525
[12:36:06] [PASSED] MONO_625
[12:36:06] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:36:06] =============== [PASSED] drm_cmdline_parser ================
[12:36:06] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:36:06] [PASSED] drm_test_connector_hdmi_init_valid
[12:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:36:06] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:36:06] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:36:06] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:36:06] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:36:06] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:36:06] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:36:06] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:36:06] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:36:06] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:36:06] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:36:06] [PASSED] drm_test_connector_hdmi_init_null_product
[12:36:06] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:36:06] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:36:06] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:36:06] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:36:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:36:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:36:06] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:36:06] ========= drm_test_connector_hdmi_init_type_valid =========
[12:36:06] [PASSED] HDMI-A
[12:36:06] [PASSED] HDMI-B
[12:36:06] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:36:06] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:36:06] [PASSED] Unknown
[12:36:06] [PASSED] VGA
[12:36:06] [PASSED] DVI-I
[12:36:06] [PASSED] DVI-D
[12:36:06] [PASSED] DVI-A
[12:36:06] [PASSED] Composite
[12:36:06] [PASSED] SVIDEO
[12:36:06] [PASSED] LVDS
[12:36:06] [PASSED] Component
[12:36:06] [PASSED] DIN
[12:36:06] [PASSED] DP
[12:36:06] [PASSED] TV
[12:36:06] [PASSED] eDP
[12:36:06] [PASSED] Virtual
[12:36:06] [PASSED] DSI
[12:36:06] [PASSED] DPI
[12:36:06] [PASSED] Writeback
[12:36:06] [PASSED] SPI
[12:36:06] [PASSED] USB
[12:36:06] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:36:06] ============ [PASSED] drmm_connector_hdmi_init =============
[12:36:06] ============= drmm_connector_init (3 subtests) =============
[12:36:06] [PASSED] drm_test_drmm_connector_init
[12:36:06] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:36:06] ========= drm_test_drmm_connector_init_type_valid =========
[12:36:06] [PASSED] Unknown
[12:36:06] [PASSED] VGA
[12:36:06] [PASSED] DVI-I
[12:36:06] [PASSED] DVI-D
[12:36:06] [PASSED] DVI-A
[12:36:06] [PASSED] Composite
[12:36:06] [PASSED] SVIDEO
[12:36:06] [PASSED] LVDS
[12:36:06] [PASSED] Component
[12:36:06] [PASSED] DIN
[12:36:06] [PASSED] DP
[12:36:06] [PASSED] HDMI-A
[12:36:06] [PASSED] HDMI-B
[12:36:06] [PASSED] TV
[12:36:06] [PASSED] eDP
[12:36:06] [PASSED] Virtual
[12:36:06] [PASSED] DSI
[12:36:06] [PASSED] DPI
[12:36:06] [PASSED] Writeback
[12:36:06] [PASSED] SPI
[12:36:06] [PASSED] USB
[12:36:06] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:36:06] =============== [PASSED] drmm_connector_init ===============
[12:36:06] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_init
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:36:06] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:36:06] [PASSED] Unknown
[12:36:06] [PASSED] VGA
[12:36:06] [PASSED] DVI-I
[12:36:06] [PASSED] DVI-D
[12:36:06] [PASSED] DVI-A
[12:36:06] [PASSED] Composite
[12:36:06] [PASSED] SVIDEO
[12:36:06] [PASSED] LVDS
[12:36:06] [PASSED] Component
[12:36:06] [PASSED] DIN
[12:36:06] [PASSED] DP
[12:36:06] [PASSED] HDMI-A
[12:36:06] [PASSED] HDMI-B
[12:36:06] [PASSED] TV
[12:36:06] [PASSED] eDP
[12:36:06] [PASSED] Virtual
[12:36:06] [PASSED] DSI
[12:36:06] [PASSED] DPI
[12:36:06] [PASSED] Writeback
[12:36:06] [PASSED] SPI
[12:36:06] [PASSED] USB
[12:36:06] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:36:06] ======== drm_test_drm_connector_dynamic_init_name =========
[12:36:06] [PASSED] Unknown
[12:36:06] [PASSED] VGA
[12:36:06] [PASSED] DVI-I
[12:36:06] [PASSED] DVI-D
[12:36:06] [PASSED] DVI-A
[12:36:06] [PASSED] Composite
[12:36:06] [PASSED] SVIDEO
[12:36:06] [PASSED] LVDS
[12:36:06] [PASSED] Component
[12:36:06] [PASSED] DIN
[12:36:06] [PASSED] DP
[12:36:06] [PASSED] HDMI-A
[12:36:06] [PASSED] HDMI-B
[12:36:06] [PASSED] TV
[12:36:06] [PASSED] eDP
[12:36:06] [PASSED] Virtual
[12:36:06] [PASSED] DSI
[12:36:06] [PASSED] DPI
[12:36:06] [PASSED] Writeback
[12:36:06] [PASSED] SPI
[12:36:06] [PASSED] USB
[12:36:06] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:36:06] =========== [PASSED] drm_connector_dynamic_init ============
[12:36:06] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:36:06] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:36:06] ======= drm_connector_dynamic_register (7 subtests) ========
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:36:06] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:36:06] ========= [PASSED] drm_connector_dynamic_register ==========
[12:36:06] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:36:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:36:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:36:06] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:36:06] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:36:06] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:36:06] [PASSED] NTSC
[12:36:06] [PASSED] NTSC-443
[12:36:06] [PASSED] NTSC-J
[12:36:06] [PASSED] PAL
[12:36:06] [PASSED] PAL-M
[12:36:06] [PASSED] PAL-N
[12:36:06] [PASSED] SECAM
[12:36:06] [PASSED] Mono
[12:36:06] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:36:06] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:36:06] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:36:06] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:36:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:36:06] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:36:06] [PASSED] VIC 96
[12:36:06] [PASSED] VIC 97
[12:36:06] [PASSED] VIC 101
[12:36:06] [PASSED] VIC 102
[12:36:06] [PASSED] VIC 106
[12:36:06] [PASSED] VIC 107
[12:36:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:36:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:36:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:36:06] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:36:06] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:36:06] [PASSED] Automatic
[12:36:06] [PASSED] Full
[12:36:06] [PASSED] Limited 16:235
[12:36:06] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:36:06] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:36:06] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:36:06] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:36:06] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:36:06] [PASSED] RGB
[12:36:06] [PASSED] YUV 4:2:0
[12:36:06] [PASSED] YUV 4:2:2
[12:36:06] [PASSED] YUV 4:4:4
[12:36:06] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:36:06] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:36:06] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:36:06] ============= drm_damage_helper (21 subtests) ==============
[12:36:06] [PASSED] drm_test_damage_iter_no_damage
[12:36:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:36:06] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:36:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:36:06] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:36:06] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:36:06] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:36:06] [PASSED] drm_test_damage_iter_simple_damage
[12:36:06] [PASSED] drm_test_damage_iter_single_damage
[12:36:06] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:36:06] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:36:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:36:06] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:36:06] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:36:06] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:36:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:36:06] [PASSED] drm_test_damage_iter_damage
[12:36:06] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:36:06] [PASSED] drm_test_damage_iter_damage_one_outside
[12:36:06] [PASSED] drm_test_damage_iter_damage_src_moved
[12:36:06] [PASSED] drm_test_damage_iter_damage_not_visible
[12:36:06] ================ [PASSED] drm_damage_helper ================
[12:36:06] ============== drm_dp_mst_helper (3 subtests) ==============
[12:36:06] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:36:06] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:36:06] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:36:06] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:36:06] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:36:06] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:36:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:36:06] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:36:06] [PASSED] Link rate 2000000 lane count 4
[12:36:06] [PASSED] Link rate 2000000 lane count 2
[12:36:06] [PASSED] Link rate 2000000 lane count 1
[12:36:06] [PASSED] Link rate 1350000 lane count 4
[12:36:06] [PASSED] Link rate 1350000 lane count 2
[12:36:06] [PASSED] Link rate 1350000 lane count 1
[12:36:06] [PASSED] Link rate 1000000 lane count 4
[12:36:06] [PASSED] Link rate 1000000 lane count 2
[12:36:06] [PASSED] Link rate 1000000 lane count 1
[12:36:06] [PASSED] Link rate 810000 lane count 4
[12:36:06] [PASSED] Link rate 810000 lane count 2
[12:36:06] [PASSED] Link rate 810000 lane count 1
[12:36:06] [PASSED] Link rate 540000 lane count 4
[12:36:06] [PASSED] Link rate 540000 lane count 2
[12:36:06] [PASSED] Link rate 540000 lane count 1
[12:36:06] [PASSED] Link rate 270000 lane count 4
[12:36:06] [PASSED] Link rate 270000 lane count 2
[12:36:06] [PASSED] Link rate 270000 lane count 1
[12:36:06] [PASSED] Link rate 162000 lane count 4
[12:36:06] [PASSED] Link rate 162000 lane count 2
[12:36:06] [PASSED] Link rate 162000 lane count 1
[12:36:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:36:06] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:36:06] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:36:06] [PASSED] DP_POWER_UP_PHY with port number
[12:36:06] [PASSED] DP_POWER_DOWN_PHY with port number
[12:36:06] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:36:06] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:36:06] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:36:06] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:36:06] [PASSED] DP_QUERY_PAYLOAD with port number
[12:36:06] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:36:06] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:36:06] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:36:06] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:36:06] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:36:06] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:36:06] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:36:06] [PASSED] DP_REMOTE_I2C_READ with port number
[12:36:06] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:36:06] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:36:06] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:36:06] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:36:06] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:36:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:36:06] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:36:06] ================ [PASSED] drm_dp_mst_helper ================
[12:36:06] ================== drm_exec (7 subtests) ===================
[12:36:06] [PASSED] sanitycheck
[12:36:06] [PASSED] test_lock
[12:36:06] [PASSED] test_lock_unlock
[12:36:06] [PASSED] test_duplicates
[12:36:06] [PASSED] test_prepare
[12:36:06] [PASSED] test_prepare_array
[12:36:06] [PASSED] test_multiple_loops
[12:36:06] ==================== [PASSED] drm_exec =====================
[12:36:06] =========== drm_format_helper_test (17 subtests) ===========
[12:36:06] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:36:06] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:36:06] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:36:06] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:36:06] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:36:06] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:36:06] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:36:06] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:36:06] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:36:06] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:36:06] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:36:06] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:36:06] ==================== drm_test_fb_swab =====================
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ================ [PASSED] drm_test_fb_swab =================
[12:36:06] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:36:06] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:36:06] [PASSED] single_pixel_source_buffer
[12:36:06] [PASSED] single_pixel_clip_rectangle
[12:36:06] [PASSED] well_known_colors
[12:36:06] [PASSED] destination_pitch
[12:36:06] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:36:06] ================= drm_test_fb_clip_offset =================
[12:36:06] [PASSED] pass through
[12:36:06] [PASSED] horizontal offset
[12:36:06] [PASSED] vertical offset
[12:36:06] [PASSED] horizontal and vertical offset
[12:36:06] [PASSED] horizontal offset (custom pitch)
[12:36:06] [PASSED] vertical offset (custom pitch)
[12:36:06] [PASSED] horizontal and vertical offset (custom pitch)
[12:36:06] ============= [PASSED] drm_test_fb_clip_offset =============
[12:36:06] =================== drm_test_fb_memcpy ====================
[12:36:06] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:36:06] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:36:06] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:36:06] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:36:06] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:36:06] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:36:06] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:36:06] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:36:06] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:36:06] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:36:06] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:36:06] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:36:06] =============== [PASSED] drm_test_fb_memcpy ================
[12:36:06] ============= [PASSED] drm_format_helper_test ==============
[12:36:06] ================= drm_format (18 subtests) =================
[12:36:06] [PASSED] drm_test_format_block_width_invalid
[12:36:06] [PASSED] drm_test_format_block_width_one_plane
[12:36:06] [PASSED] drm_test_format_block_width_two_plane
[12:36:06] [PASSED] drm_test_format_block_width_three_plane
[12:36:06] [PASSED] drm_test_format_block_width_tiled
[12:36:06] [PASSED] drm_test_format_block_height_invalid
[12:36:06] [PASSED] drm_test_format_block_height_one_plane
[12:36:06] [PASSED] drm_test_format_block_height_two_plane
[12:36:06] [PASSED] drm_test_format_block_height_three_plane
[12:36:06] [PASSED] drm_test_format_block_height_tiled
[12:36:06] [PASSED] drm_test_format_min_pitch_invalid
[12:36:06] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:36:06] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:36:06] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:36:06] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:36:06] [PASSED] drm_test_format_min_pitch_two_plane
[12:36:06] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:36:06] [PASSED] drm_test_format_min_pitch_tiled
[12:36:06] =================== [PASSED] drm_format ====================
[12:36:06] ============== drm_framebuffer (10 subtests) ===============
[12:36:06] ========== drm_test_framebuffer_check_src_coords ==========
[12:36:06] [PASSED] Success: source fits into fb
[12:36:06] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:36:06] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:36:06] [PASSED] Fail: overflowing fb with source width
[12:36:06] [PASSED] Fail: overflowing fb with source height
[12:36:06] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:36:06] [PASSED] drm_test_framebuffer_cleanup
[12:36:06] =============== drm_test_framebuffer_create ===============
[12:36:06] [PASSED] ABGR8888 normal sizes
[12:36:06] [PASSED] ABGR8888 max sizes
[12:36:06] [PASSED] ABGR8888 pitch greater than min required
[12:36:06] [PASSED] ABGR8888 pitch less than min required
[12:36:06] [PASSED] ABGR8888 Invalid width
[12:36:06] [PASSED] ABGR8888 Invalid buffer handle
[12:36:06] [PASSED] No pixel format
[12:36:06] [PASSED] ABGR8888 Width 0
[12:36:06] [PASSED] ABGR8888 Height 0
[12:36:06] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:36:06] [PASSED] ABGR8888 Large buffer offset
[12:36:06] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:36:06] [PASSED] ABGR8888 Invalid flag
[12:36:06] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:36:06] [PASSED] ABGR8888 Valid buffer modifier
[12:36:06] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:36:06] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:36:06] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:36:06] [PASSED] NV12 Normal sizes
[12:36:06] [PASSED] NV12 Max sizes
[12:36:06] [PASSED] NV12 Invalid pitch
[12:36:06] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:36:06] [PASSED] NV12 different modifier per-plane
[12:36:06] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:36:06] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:36:06] [PASSED] NV12 Modifier for inexistent plane
[12:36:06] [PASSED] NV12 Handle for inexistent plane
[12:36:06] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:36:06] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:36:06] [PASSED] YVU420 Normal sizes
[12:36:06] [PASSED] YVU420 Max sizes
[12:36:06] [PASSED] YVU420 Invalid pitch
[12:36:06] [PASSED] YVU420 Different pitches
[12:36:06] [PASSED] YVU420 Different buffer offsets/pitches
[12:36:06] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:36:06] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:36:06] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:36:06] [PASSED] YVU420 Valid modifier
[12:36:06] [PASSED] YVU420 Different modifiers per plane
[12:36:06] [PASSED] YVU420 Modifier for inexistent plane
[12:36:06] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:36:06] [PASSED] X0L2 Normal sizes
[12:36:06] [PASSED] X0L2 Max sizes
[12:36:06] [PASSED] X0L2 Invalid pitch
[12:36:06] [PASSED] X0L2 Pitch greater than minimum required
[12:36:06] [PASSED] X0L2 Handle for inexistent plane
[12:36:06] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:36:06] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:36:06] [PASSED] X0L2 Valid modifier
[12:36:06] [PASSED] X0L2 Modifier for inexistent plane
[12:36:06] =========== [PASSED] drm_test_framebuffer_create ===========
[12:36:06] [PASSED] drm_test_framebuffer_free
[12:36:06] [PASSED] drm_test_framebuffer_init
[12:36:06] [PASSED] drm_test_framebuffer_init_bad_format
[12:36:06] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:36:06] [PASSED] drm_test_framebuffer_lookup
[12:36:06] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:36:06] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:36:06] ================= [PASSED] drm_framebuffer =================
[12:36:06] ================ drm_gem_shmem (8 subtests) ================
[12:36:06] [PASSED] drm_gem_shmem_test_obj_create
[12:36:06] [PASSED] drm_gem_shmem_test_obj_create_private
[12:36:06] [PASSED] drm_gem_shmem_test_pin_pages
[12:36:06] [PASSED] drm_gem_shmem_test_vmap
[12:36:06] [PASSED] drm_gem_shmem_test_get_sg_table
[12:36:06] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:36:06] [PASSED] drm_gem_shmem_test_madvise
[12:36:06] [PASSED] drm_gem_shmem_test_purge
[12:36:06] ================== [PASSED] drm_gem_shmem ==================
[12:36:06] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[12:36:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:36:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:36:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:36:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:36:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:36:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:36:06] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:36:06] [PASSED] Automatic
[12:36:06] [PASSED] Full
[12:36:06] [PASSED] Limited 16:235
[12:36:06] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:36:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:36:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:36:06] [PASSED] drm_test_check_disable_connector
[12:36:06] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:36:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:36:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:36:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:36:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:36:06] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:36:06] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:36:06] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:36:06] [PASSED] drm_test_check_output_bpc_dvi
[12:36:06] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:36:06] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:36:06] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:36:06] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:36:06] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:36:06] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:36:06] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:36:06] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:36:06] ============ drm_test_check_hdmi_color_format =============
[12:36:06] [PASSED] AUTO -> RGB
[12:36:06] [PASSED] YCBCR422 -> YUV422
[12:36:06] [PASSED] YCBCR420 -> YUV420
[12:36:06] [PASSED] YCBCR444 -> YUV444
[12:36:06] [PASSED] RGB -> RGB
[12:36:06] ======== [PASSED] drm_test_check_hdmi_color_format =========
[12:36:06] ======== drm_test_check_hdmi_color_format_420_only ========
[12:36:06] [PASSED] RGB should fail
[12:36:06] [PASSED] YUV444 should fail
[12:36:06] [PASSED] YUV422 should fail
[12:36:06] [PASSED] YUV420 should work
[12:36:06] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[12:36:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:36:06] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:36:06] [PASSED] drm_test_check_broadcast_rgb_value
[12:36:06] [PASSED] drm_test_check_bpc_8_value
[12:36:06] [PASSED] drm_test_check_bpc_10_value
[12:36:06] [PASSED] drm_test_check_bpc_12_value
[12:36:06] [PASSED] drm_test_check_format_value
[12:36:06] [PASSED] drm_test_check_tmds_char_value
[12:36:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:36:06] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[12:36:06] [PASSED] drm_test_check_mode_valid
[12:36:06] [PASSED] drm_test_check_mode_valid_reject
[12:36:06] [PASSED] drm_test_check_mode_valid_reject_rate
[12:36:06] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:36:06] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[12:36:06] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[12:36:06] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[12:36:06] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:36:06] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:36:06] [PASSED] drm_test_check_infoframes
[12:36:06] [PASSED] drm_test_check_reject_avi_infoframe
[12:36:06] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:36:06] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:36:06] [PASSED] drm_test_check_reject_audio_infoframe
[12:36:06] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:36:06] ================= drm_managed (2 subtests) =================
[12:36:06] [PASSED] drm_test_managed_release_action
[12:36:06] [PASSED] drm_test_managed_run_action
[12:36:06] =================== [PASSED] drm_managed ===================
[12:36:06] =================== drm_mm (6 subtests) ====================
[12:36:06] [PASSED] drm_test_mm_init
[12:36:06] [PASSED] drm_test_mm_debug
[12:36:06] [PASSED] drm_test_mm_align32
[12:36:06] [PASSED] drm_test_mm_align64
[12:36:06] [PASSED] drm_test_mm_lowest
[12:36:06] [PASSED] drm_test_mm_highest
[12:36:06] ===================== [PASSED] drm_mm ======================
[12:36:06] ============= drm_modes_analog_tv (5 subtests) =============
[12:36:06] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:36:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:36:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:36:06] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:36:06] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:36:06] =============== [PASSED] drm_modes_analog_tv ===============
[12:36:06] ============== drm_plane_helper (2 subtests) ===============
[12:36:06] =============== drm_test_check_plane_state ================
[12:36:06] [PASSED] clipping_simple
[12:36:06] [PASSED] clipping_rotate_reflect
[12:36:06] [PASSED] positioning_simple
[12:36:06] [PASSED] upscaling
[12:36:06] [PASSED] downscaling
[12:36:06] [PASSED] rounding1
[12:36:06] [PASSED] rounding2
[12:36:06] [PASSED] rounding3
[12:36:06] [PASSED] rounding4
[12:36:06] =========== [PASSED] drm_test_check_plane_state ============
[12:36:06] =========== drm_test_check_invalid_plane_state ============
[12:36:06] [PASSED] positioning_invalid
[12:36:06] [PASSED] upscaling_invalid
[12:36:06] [PASSED] downscaling_invalid
[12:36:06] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:36:06] ================ [PASSED] drm_plane_helper =================
[12:36:06] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:36:06] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:36:06] [PASSED] None
[12:36:06] [PASSED] PAL
[12:36:06] [PASSED] NTSC
[12:36:06] [PASSED] Both, NTSC Default
[12:36:06] [PASSED] Both, PAL Default
[12:36:06] [PASSED] Both, NTSC Default, with PAL on command-line
[12:36:06] [PASSED] Both, PAL Default, with NTSC on command-line
[12:36:06] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:36:06] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:36:06] ================== drm_rect (9 subtests) ===================
[12:36:06] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:36:06] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:36:06] [PASSED] drm_test_rect_clip_scaled_clipped
[12:36:06] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:36:06] ================= drm_test_rect_intersect =================
[12:36:06] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:36:06] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:36:06] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:36:06] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:36:06] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:36:06] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:36:06] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:36:06] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:36:06] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:36:06] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:36:06] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:36:06] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:36:06] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:36:06] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:36:06] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:36:06] ============= [PASSED] drm_test_rect_intersect =============
[12:36:06] ================ drm_test_rect_calc_hscale ================
[12:36:06] [PASSED] normal use
[12:36:06] [PASSED] out of max range
[12:36:06] [PASSED] out of min range
[12:36:06] [PASSED] zero dst
[12:36:06] [PASSED] negative src
[12:36:06] [PASSED] negative dst
[12:36:06] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:36:06] ================ drm_test_rect_calc_vscale ================
[12:36:06] [PASSED] normal use
[12:36:06] [PASSED] out of max range
[12:36:06] [PASSED] out of min range
[12:36:06] [PASSED] zero dst
[12:36:06] [PASSED] negative src
[12:36:06] [PASSED] negative dst
[12:36:06] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:36:06] ================== drm_test_rect_rotate ===================
[12:36:06] [PASSED] reflect-x
[12:36:06] [PASSED] reflect-y
[12:36:06] [PASSED] rotate-0
[12:36:06] [PASSED] rotate-90
[12:36:06] [PASSED] rotate-180
[12:36:06] [PASSED] rotate-270
[12:36:06] ============== [PASSED] drm_test_rect_rotate ===============
[12:36:06] ================ drm_test_rect_rotate_inv =================
[12:36:06] [PASSED] reflect-x
[12:36:06] [PASSED] reflect-y
[12:36:06] [PASSED] rotate-0
[12:36:06] [PASSED] rotate-90
[12:36:06] [PASSED] rotate-180
[12:36:06] [PASSED] rotate-270
[12:36:06] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:36:06] ==================== [PASSED] drm_rect =====================
[12:36:06] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:36:06] ============ drm_test_sysfb_build_fourcc_list =============
[12:36:06] [PASSED] no native formats
[12:36:06] [PASSED] XRGB8888 as native format
[12:36:06] [PASSED] remove duplicates
[12:36:06] [PASSED] convert alpha formats
[12:36:06] [PASSED] random formats
[12:36:06] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:36:06] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:36:06] ================== drm_fixp (2 subtests) ===================
[12:36:06] [PASSED] drm_test_int2fixp
[12:36:06] [PASSED] drm_test_sm2fixp
[12:36:06] ==================== [PASSED] drm_fixp =====================
[12:36:06] ============================================================
[12:36:06] Testing complete. Ran 641 tests: passed: 641
[12:36:06] Elapsed time: 26.789s total, 1.869s configuring, 24.703s building, 0.193s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:36:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:36:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:36:18] Starting KUnit Kernel (1/1)...
[12:36:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:36:18] ============= refcount_interrupt (4 subtests) ==============
[12:36:18] [PASSED] test_single_irq_change
[12:36:18] [PASSED] test_nested_irq_change
[12:36:18] [PASSED] test_multiple_irq_change
[12:36:18] [PASSED] test_irq_save
[12:36:18] =============== [PASSED] refcount_interrupt ================
[12:36:18] ================= ttm_device (5 subtests) ==================
[12:36:18] [PASSED] ttm_device_init_basic
[12:36:18] [PASSED] ttm_device_init_multiple
[12:36:18] [PASSED] ttm_device_fini_basic
[12:36:18] [PASSED] ttm_device_init_no_vma_man
[12:36:18] ================== ttm_device_init_pools ==================
[12:36:18] [PASSED] No DMA allocations, no DMA32 required
[12:36:18] [PASSED] DMA allocations, DMA32 required
[12:36:18] [PASSED] No DMA allocations, DMA32 required
[12:36:18] [PASSED] DMA allocations, no DMA32 required
[12:36:18] ============== [PASSED] ttm_device_init_pools ==============
[12:36:18] =================== [PASSED] ttm_device ====================
[12:36:18] ================== ttm_pool (8 subtests) ===================
[12:36:18] ================== ttm_pool_alloc_basic ===================
[12:36:18] [PASSED] One page
[12:36:18] [PASSED] More than one page
[12:36:18] [PASSED] Above the allocation limit
[12:36:18] [PASSED] One page, with coherent DMA mappings enabled
[12:36:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:36:18] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:36:18] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:36:18] [PASSED] One page
[12:36:18] [PASSED] More than one page
[12:36:18] [PASSED] Above the allocation limit
[12:36:18] [PASSED] One page, with coherent DMA mappings enabled
[12:36:18] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:36:18] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:36:18] [PASSED] ttm_pool_alloc_order_caching_match
[12:36:18] [PASSED] ttm_pool_alloc_caching_mismatch
[12:36:18] [PASSED] ttm_pool_alloc_order_mismatch
[12:36:18] [PASSED] ttm_pool_free_dma_alloc
[12:36:18] [PASSED] ttm_pool_free_no_dma_alloc
[12:36:18] [PASSED] ttm_pool_fini_basic
[12:36:18] ==================== [PASSED] ttm_pool =====================
[12:36:18] ================ ttm_resource (8 subtests) =================
[12:36:18] ================= ttm_resource_init_basic =================
[12:36:18] [PASSED] Init resource in TTM_PL_SYSTEM
[12:36:18] [PASSED] Init resource in TTM_PL_VRAM
[12:36:18] [PASSED] Init resource in a private placement
[12:36:18] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:36:18] ============= [PASSED] ttm_resource_init_basic =============
[12:36:18] [PASSED] ttm_resource_init_pinned
[12:36:18] [PASSED] ttm_resource_fini_basic
[12:36:18] [PASSED] ttm_resource_manager_init_basic
[12:36:18] [PASSED] ttm_resource_manager_usage_basic
[12:36:18] [PASSED] ttm_resource_manager_set_used_basic
[12:36:18] [PASSED] ttm_sys_man_alloc_basic
[12:36:18] [PASSED] ttm_sys_man_free_basic
[12:36:18] ================== [PASSED] ttm_resource ===================
[12:36:18] =================== ttm_tt (15 subtests) ===================
[12:36:18] ==================== ttm_tt_init_basic ====================
[12:36:18] [PASSED] Page-aligned size
[12:36:18] [PASSED] Extra pages requested
[12:36:18] ================ [PASSED] ttm_tt_init_basic ================
[12:36:18] [PASSED] ttm_tt_init_misaligned
[12:36:18] [PASSED] ttm_tt_fini_basic
[12:36:18] [PASSED] ttm_tt_fini_sg
[12:36:18] [PASSED] ttm_tt_fini_shmem
[12:36:18] [PASSED] ttm_tt_create_basic
[12:36:18] [PASSED] ttm_tt_create_invalid_bo_type
[12:36:18] [PASSED] ttm_tt_create_ttm_exists
[12:36:18] [PASSED] ttm_tt_create_failed
[12:36:18] [PASSED] ttm_tt_destroy_basic
[12:36:18] [PASSED] ttm_tt_populate_null_ttm
[12:36:18] [PASSED] ttm_tt_populate_populated_ttm
[12:36:18] [PASSED] ttm_tt_unpopulate_basic
[12:36:18] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:36:18] [PASSED] ttm_tt_swapin_basic
[12:36:18] ===================== [PASSED] ttm_tt ======================
[12:36:18] =================== ttm_bo (14 subtests) ===================
[12:36:18] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:36:18] [PASSED] Cannot be interrupted and sleeps
[12:36:18] [PASSED] Cannot be interrupted, locks straight away
[12:36:18] [PASSED] Can be interrupted, sleeps
[12:36:18] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:36:18] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:36:18] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:36:18] [PASSED] ttm_bo_reserve_double_resv
[12:36:18] [PASSED] ttm_bo_reserve_interrupted
[12:36:18] [PASSED] ttm_bo_reserve_deadlock
[12:36:18] [PASSED] ttm_bo_unreserve_basic
[12:36:18] [PASSED] ttm_bo_unreserve_pinned
[12:36:18] [PASSED] ttm_bo_unreserve_bulk
[12:36:18] [PASSED] ttm_bo_fini_basic
[12:36:18] [PASSED] ttm_bo_fini_shared_resv
[12:36:18] [PASSED] ttm_bo_pin_basic
[12:36:18] [PASSED] ttm_bo_pin_unpin_resource
[12:36:18] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:36:18] ===================== [PASSED] ttm_bo ======================
[12:36:18] ============== ttm_bo_validate (22 subtests) ===============
[12:36:18] ============== ttm_bo_init_reserved_sys_man ===============
[12:36:18] [PASSED] Buffer object for userspace
[12:36:18] [PASSED] Kernel buffer object
[12:36:18] [PASSED] Shared buffer object
[12:36:18] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:36:18] ============== ttm_bo_init_reserved_mock_man ==============
[12:36:18] [PASSED] Buffer object for userspace
[12:36:18] [PASSED] Kernel buffer object
[12:36:18] [PASSED] Shared buffer object
[12:36:18] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:36:18] [PASSED] ttm_bo_init_reserved_resv
[12:36:18] ================== ttm_bo_validate_basic ==================
[12:36:18] [PASSED] Buffer object for userspace
[12:36:18] [PASSED] Kernel buffer object
[12:36:18] [PASSED] Shared buffer object
[12:36:18] ============== [PASSED] ttm_bo_validate_basic ==============
[12:36:18] [PASSED] ttm_bo_validate_invalid_placement
[12:36:18] ============= ttm_bo_validate_same_placement ==============
[12:36:18] [PASSED] System manager
[12:36:18] [PASSED] VRAM manager
[12:36:18] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:36:18] [PASSED] ttm_bo_validate_failed_alloc
[12:36:18] [PASSED] ttm_bo_validate_pinned
[12:36:18] [PASSED] ttm_bo_validate_busy_placement
[12:36:18] ================ ttm_bo_validate_multihop =================
[12:36:18] [PASSED] Buffer object for userspace
[12:36:18] [PASSED] Kernel buffer object
[12:36:18] [PASSED] Shared buffer object
[12:36:18] ============ [PASSED] ttm_bo_validate_multihop =============
[12:36:18] ========== ttm_bo_validate_no_placement_signaled ==========
[12:36:18] [PASSED] Buffer object in system domain, no page vector
[12:36:18] [PASSED] Buffer object in system domain with an existing page vector
[12:36:18] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:36:18] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:36:18] [PASSED] Buffer object for userspace
[12:36:18] [PASSED] Kernel buffer object
[12:36:18] [PASSED] Shared buffer object
[12:36:18] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:36:18] [PASSED] ttm_bo_validate_move_fence_signaled
[12:36:18] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:36:18] [PASSED] Waits for GPU
[12:36:18] [PASSED] Tries to lock straight away
[12:36:18] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:36:18] [PASSED] ttm_bo_validate_swapout
[12:36:18] [PASSED] ttm_bo_validate_happy_evict
[12:36:18] [PASSED] ttm_bo_validate_all_pinned_evict
[12:36:18] [PASSED] ttm_bo_validate_allowed_only_evict
[12:36:18] [PASSED] ttm_bo_validate_deleted_evict
[12:36:18] [PASSED] ttm_bo_validate_busy_domain_evict
[12:36:18] [PASSED] ttm_bo_validate_evict_gutting
[12:36:18] [PASSED] ttm_bo_validate_recrusive_evict
[12:36:18] ================= [PASSED] ttm_bo_validate =================
[12:36:18] ============================================================
[12:36:18] Testing complete. Ran 106 tests: passed: 106
[12:36:18] Elapsed time: 11.823s total, 1.834s configuring, 9.773s building, 0.184s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[12:36:18] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:36:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:36:29] Starting KUnit Kernel (1/1)...
[12:36:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:36:29] ============= refcount_interrupt (4 subtests) ==============
[12:36:29] [PASSED] test_single_irq_change
[12:36:29] [PASSED] test_nested_irq_change
[12:36:29] [PASSED] test_multiple_irq_change
[12:36:29] [PASSED] test_irq_save
[12:36:29] =============== [PASSED] refcount_interrupt ================
[12:36:29] =============== dma-buf-fence (12 subtests) ================
[12:36:29] [PASSED] test_sanitycheck
[12:36:29] [PASSED] test_signaling
[12:36:29] [PASSED] test_add_callback
[12:36:29] [PASSED] test_late_add_callback
[12:36:29] [PASSED] test_rm_callback
[12:36:29] [PASSED] test_late_rm_callback
[12:36:29] [PASSED] test_status
[12:36:29] [PASSED] test_error
[12:36:29] [PASSED] test_wait
[12:36:29] [PASSED] test_wait_timeout
[12:36:29] [PASSED] test_stub
[12:36:29] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[12:36:29] ================== [PASSED] dma-buf-fence ==================
[12:36:29] ============ dma-buf-fence-chain (11 subtests) =============
[12:36:29] [PASSED] test_sanitycheck
[12:36:29] [PASSED] test_find_seqno
[12:36:29] [PASSED] test_find_signaled
[12:36:29] [PASSED] test_find_out_of_order
[12:36:34] [PASSED] test_find_gap
[12:36:34] [PASSED] test_find_race
[12:36:34] [PASSED] test_signal_forward
[12:36:34] [PASSED] test_signal_backward
[12:36:34] [PASSED] test_wait_forward
[12:36:34] [PASSED] test_wait_backward
[12:36:34] [PASSED] test_wait_random
[12:36:34] =============== [PASSED] dma-buf-fence-chain ===============
[12:36:34] ============ dma-buf-fence-unwrap (10 subtests) ============
[12:36:34] [PASSED] test_sanitycheck
[12:36:34] [PASSED] test_unwrap_array
[12:36:34] [PASSED] test_unwrap_chain
[12:36:34] [PASSED] test_unwrap_chain_array
[12:36:34] [PASSED] test_unwrap_merge
[12:36:34] [PASSED] test_unwrap_merge_duplicate
[12:36:34] [PASSED] test_unwrap_merge_seqno
[12:36:34] [PASSED] test_unwrap_merge_order
[12:36:34] [PASSED] test_unwrap_merge_complex
[12:36:34] [PASSED] test_unwrap_merge_complex_seqno
[12:36:34] ============== [PASSED] dma-buf-fence-unwrap ===============
[12:36:34] ================ dma-buf-resv (5 subtests) =================
[12:36:34] [PASSED] test_sanitycheck
[12:36:34] ===================== test_signaling ======================
[12:36:34] [PASSED] kernel
[12:36:34] [PASSED] write
[12:36:34] [PASSED] read
[12:36:34] [PASSED] bookkeep
[12:36:34] ================= [PASSED] test_signaling ==================
[12:36:34] ====================== test_for_each ======================
[12:36:34] [PASSED] kernel
[12:36:34] [PASSED] write
[12:36:34] [PASSED] read
[12:36:34] [PASSED] bookkeep
[12:36:34] ================== [PASSED] test_for_each ==================
[12:36:34] ================= test_for_each_unlocked ==================
[12:36:34] [PASSED] kernel
[12:36:34] [PASSED] write
[12:36:34] [PASSED] read
[12:36:34] [PASSED] bookkeep
[12:36:34] ============= [PASSED] test_for_each_unlocked ==============
[12:36:34] ===================== test_get_fences =====================
[12:36:34] [PASSED] kernel
[12:36:34] [PASSED] write
[12:36:34] [PASSED] read
[12:36:34] [PASSED] bookkeep
[12:36:34] ================= [PASSED] test_get_fences =================
[12:36:34] ================== [PASSED] dma-buf-resv ===================
[12:36:34] ============================================================
[12:36:34] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[12:36:34] Elapsed time: 15.944s total, 1.829s configuring, 8.743s building, 5.351s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: Report GT TDR and VM rebind faults using SIGID (rev5)
2026-08-31 8:05 [PATCH v5 0/4] drm/xe: Report GT TDR and VM rebind faults using SIGID Arvind Yadav
` (4 preceding siblings ...)
2026-08-31 12:36 ` ✓ CI.KUnit: success for drm/xe: Report GT TDR and VM rebind faults using SIGID (rev5) Patchwork
@ 2026-08-31 13:20 ` Patchwork
2026-08-31 14:32 ` ✓ Xe.CI.FULL: " Patchwork
6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-31 13:20 UTC (permalink / raw)
To: Yadav, Arvind; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 887 bytes --]
== Series Details ==
Series: drm/xe: Report GT TDR and VM rebind faults using SIGID (rev5)
URL : https://patchwork.freedesktop.org/series/171571/
State : success
== Summary ==
CI Bug Log - changes from xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89_BAT -> xe-pw-171571v5_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 11)
------------------------------
Missing (2): bat-wcl-2 bat-bmg-2
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89 -> xe-pw-171571v5
IGT_9078: 9078
xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89: 2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89
xe-pw-171571v5: 171571v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/index.html
[-- Attachment #2: Type: text/html, Size: 1435 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.FULL: success for drm/xe: Report GT TDR and VM rebind faults using SIGID (rev5)
2026-08-31 8:05 [PATCH v5 0/4] drm/xe: Report GT TDR and VM rebind faults using SIGID Arvind Yadav
` (5 preceding siblings ...)
2026-08-31 13:20 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-08-31 14:32 ` Patchwork
6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-08-31 14:32 UTC (permalink / raw)
To: Yadav, Arvind; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 8220 bytes --]
== Series Details ==
Series: drm/xe: Report GT TDR and VM rebind faults using SIGID (rev5)
URL : https://patchwork.freedesktop.org/series/171571/
State : success
== Summary ==
CI Bug Log - changes from xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89_FULL -> xe-pw-171571v5_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-171571v5_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][1] ([Intel XE#2327])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-1/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#7178] / [Intel XE#7351])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
* igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2311])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-1/igt@kms_frontbuffer_tracking@drrshdr-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#2313])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][5] -> [SKIP][6] ([Intel XE#1503])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-1/igt@kms_hdr@invalid-hdr.html
* igt@kms_psr@pr-sprite-plane-onoff:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2234] / [Intel XE#2850])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-1/igt@kms_psr@pr-sprite-plane-onoff.html
* igt@xe_exec_multi_queue@many-execs-preempt-mode-userptr:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#8364])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-1/igt@xe_exec_multi_queue@many-execs-preempt-mode-userptr.html
#### Possible fixes ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-lnl: [FAIL][9] ([Intel XE#3718] / [Intel XE#7265]) -> [PASS][10] +1 other test pass
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89/shard-lnl-8/igt@kms_async_flips@alternate-sync-async-flip.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-lnl-1/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][11] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][12] +1 other test pass
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ad-dp2-hdmi-a3:
- shard-bmg: [FAIL][13] ([Intel XE#6266]) -> [PASS][14] +1 other test pass
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89/shard-bmg-3/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ad-dp2-hdmi-a3.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-3/igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ad-dp2-hdmi-a3.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [FAIL][15] ([Intel XE#301]) -> [PASS][16] +1 other test pass
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@a-dp2:
- shard-bmg: [FAIL][17] ([Intel XE#5408] / [Intel XE#6266]) -> [PASS][18] +1 other test pass
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89/shard-bmg-7/igt@kms_flip@plain-flip-ts-check-interruptible@a-dp2.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-8/igt@kms_flip@plain-flip-ts-check-interruptible@a-dp2.html
* igt@xe_exec_threads@threads-hang-userptr-invalidate-race:
- shard-bmg: [FAIL][19] -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89/shard-bmg-5/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-5/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html
#### Warnings ####
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][21] ([Intel XE#309] / [Intel XE#7343]) -> [SKIP][22] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89/shard-lnl-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@xe_wedged@basic-wedged:
- shard-bmg: [DMESG-WARN][23] ([Intel XE#8963]) -> [ABORT][24] ([Intel XE#8591] / [Intel XE#8963])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89/shard-bmg-7/igt@xe_wedged@basic-wedged.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/shard-bmg-5/igt@xe_wedged@basic-wedged.html
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408
[Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7265
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8591
[Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
Build changes
-------------
* Linux: xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89 -> xe-pw-171571v5
IGT_9078: 9078
xe-5661-2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89: 2ba2b8cd4220574995b91c5fe2dbf61bfaf05a89
xe-pw-171571v5: 171571v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171571v5/index.html
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-- links below jump to the message on this page --
2026-08-31 8:05 [PATCH v5 0/4] drm/xe: Report GT TDR and VM rebind faults using SIGID Arvind Yadav
2026-08-31 8:05 ` [PATCH v5 1/4] drm/xe/log: Add GUCSUBMIT component Arvind Yadav
2026-08-31 9:14 ` Michal Wajdeczko
2026-08-31 9:56 ` Yadav, Arvind
2026-08-31 8:05 ` [PATCH v5 2/4] drm/xe/guc: Report reset failure using SIGID Arvind Yadav
2026-08-31 9:31 ` Michal Wajdeczko
2026-08-31 10:51 ` Yadav, Arvind
2026-08-31 8:05 ` [PATCH v5 3/4] drm/xe/svm: Report terminal page-fault failures " Arvind Yadav
2026-08-31 8:05 ` [PATCH v5 4/4] drm/xe/gt: Report GT reset failure " Arvind Yadav
2026-08-31 8:25 ` sashiko-bot
2026-08-31 12:36 ` ✓ CI.KUnit: success for drm/xe: Report GT TDR and VM rebind faults using SIGID (rev5) Patchwork
2026-08-31 13:20 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-31 14:32 ` ✓ Xe.CI.FULL: " Patchwork
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