[PATCH 1/3] drm/i915/ltphy: Remove state verification for LT PHY fields

[PATCH 1/3] drm/i915/ltphy: Remove state verification for LT PHY fields

[Suraj Kandpal]

Remove LT PHY State verification for all VDR register fields other
than VDR0_CONFIG and VDR2_CONFIG since those are the only reliable
shadow register that hold on to its value in case there is PSR/PR
which can cause power gating internally of the PHY.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lt_phy.c | 30 +++++----------------
 1 file changed, 7 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index 939c8975fd4c..9501ac861712 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -2259,8 +2259,6 @@ void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
 	struct intel_encoder *encoder;
 	struct intel_lt_phy_pll_state pll_hw_state = {};
 	const struct intel_lt_phy_pll_state *pll_sw_state = &new_crtc_state->dpll_hw_state.ltpll;
-	int clock;
-	int i, j;
 
 	if (DISPLAY_VER(display) < 35)
 		return;
@@ -2275,33 +2273,19 @@ void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
 
 	encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
 	intel_lt_phy_pll_readout_hw_state(encoder, new_crtc_state, &pll_hw_state);
-	clock = intel_lt_phy_calc_port_clock(encoder, new_crtc_state);
 
 	dig_port = enc_to_dig_port(encoder);
 	if (intel_tc_port_in_tbt_alt_mode(dig_port))
 		return;
 
-	INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.clock != clock,
-				 "[CRTC:%d:%s] mismatch in LT PHY: Register CLOCK (expected %d, found %d)",
+	INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[0] != pll_sw_state->config[0],
+				 "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG 0: (expected 0x%04x, found 0x%04x)",
 				 crtc->base.base.id, crtc->base.name,
-				 pll_sw_state->clock, pll_hw_state.clock);
-
-	for (i = 0; i < 3; i++) {
-		INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[i] != pll_sw_state->config[i],
-					 "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG%d: (expected 0x%04x, found 0x%04x)",
-					 crtc->base.base.id, crtc->base.name, i,
-					 pll_sw_state->config[i], pll_hw_state.config[i]);
-	}
-
-	for (i = 0; i <= 12; i++) {
-		for (j = 3; j >= 0; j--)
-			INTEL_DISPLAY_STATE_WARN(display,
-						 pll_hw_state.data[i][j] !=
-						 pll_sw_state->data[i][j],
-						 "[CRTC:%d:%s] mismatch in LT PHY PLL DATA[%d][%d]: (expected 0x%04x, found 0x%04x)",
-						 crtc->base.base.id, crtc->base.name, i, j,
-						 pll_sw_state->data[i][j], pll_hw_state.data[i][j]);
-	}
+				 pll_sw_state->config[0], pll_hw_state.config[0]);
+	INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[2] != pll_sw_state->config[2],
+				 "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG 2: (expected 0x%04x, found 0x%04x)",
+				 crtc->base.base.id, crtc->base.name,
+				 pll_sw_state->config[2], pll_hw_state.config[2]);
 }
 
 void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
-- 
2.34.1

[PATCH 2/3] drm/i915/ltphy: Compare only certain fields in state verify function

[Suraj Kandpal]

Verify only the config[0,2] fields in the LT PHY state since these
are the only reliable values we can get back when we read the VDR
registers. The reason being that the state does not persist for other
VDR registers when power gating comes into picture.
Though not ideal this change does not hit us badly in perspective of how
we use the compare function to decide if fastset is required or if we
wrote the state correctly. VDR0_CONFIG and VDR1_CONFIG hold the values
that indicate the PLL operating mode and link rate which is usually
what we need to check if something has changed or not.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lt_phy.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index 9501ac861712..cc85818c2b7e 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -2207,13 +2207,18 @@ bool
 intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a,
 				  const struct intel_lt_phy_pll_state *b)
 {
-	if (memcmp(&a->config, &b->config, sizeof(a->config)) != 0)
-		return false;
-
-	if (memcmp(&a->data, &b->data, sizeof(a->data)) != 0)
-		return false;
+	/*
+	 * With LT PHY values other than VDR0_CONFIG and VDR2_CONFIG are
+	 * unreliable and cannot always be read back since internally
+	 * the after power gating values are not restored back to the
+	 * shadow VDR registers, hence we do not compare the whole state
+	 * just the two VDR registers.
+	 */
+	if (a->config[0] == b->config[0] &&
+	    a->config[2] == b->config[2])
+		return true;
 
-	return true;
+	return false;
 }
 
 void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
-- 
2.34.1

Re: [PATCH 2/3] drm/i915/ltphy: Compare only certain fields in state verify function

[Nautiyal, Ankit K]

On 12/31/2025 10:53 AM, Suraj Kandpal wrote:
> Verify only the config[0,2] fields in the LT PHY state since these
> are the only reliable values we can get back when we read the VDR
> registers. The reason being that the state does not persist for other
> VDR registers when power gating comes into picture.
> Though not ideal this change does not hit us badly in perspective of how
> we use the compare function to decide if fastset is required or if we
> wrote the state correctly. VDR0_CONFIG and VDR1_CONFIG hold the values
> that indicate the PLL operating mode and link rate which is usually
> what we need to check if something has changed or not.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_lt_phy.c | 17 +++++++++++------
>   1 file changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> index 9501ac861712..cc85818c2b7e 100644
> --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> @@ -2207,13 +2207,18 @@ bool
>   intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a,
>   				  const struct intel_lt_phy_pll_state *b)
>   {
> -	if (memcmp(&a->config, &b->config, sizeof(a->config)) != 0)
> -		return false;
> -
> -	if (memcmp(&a->data, &b->data, sizeof(a->data)) != 0)
> -		return false;
> +	/*
> +	 * With LT PHY values other than VDR0_CONFIG and VDR2_CONFIG are
> +	 * unreliable and cannot always be read back since internally
> +	 * the after power gating values are not restored back to the
> +	 * shadow VDR registers, hence we do not compare the whole state
> +	 * just the two VDR registers.

This can be broken down into simpler sentences.

With above fixed:


Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> +	 */
> +	if (a->config[0] == b->config[0] &&
> +	    a->config[2] == b->config[2])
> +		return true;
>   
> -	return true;
> +	return false;
>   }
>   
>   void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,

[PATCH 3/3] drm/i915/ltphy: Provide protection against unsupported modes

[Suraj Kandpal]

We need to make sure we return some port clock in case we have
unsupported LT PHY modes or if we were not able to read the LT PHY state
for whatever reason and the mode ends up being 0.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lt_phy.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index cc85818c2b7e..54d1c68cf83a 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -31,6 +31,7 @@
 #define INTEL_LT_PHY_BOTH_LANES		(INTEL_LT_PHY_LANE1 |\
 					 INTEL_LT_PHY_LANE0)
 #define MODE_DP				3
+#define MODE_HDMI_20			4
 #define Q32_TO_INT(x)	((x) >> 32)
 #define Q32_TO_FRAC(x)	((x) & 0xFFFFFFFF)
 #define DCO_MIN_FREQ_MHZ	11850
@@ -1751,6 +1752,7 @@ int
 intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
 			     const struct intel_crtc_state *crtc_state)
 {
+	struct intel_display *display = to_intel_display(encoder);
 	int clk;
 	const struct intel_lt_phy_pll_state *lt_state =
 		&crtc_state->dpll_hw_state.ltpll;
@@ -1768,8 +1770,11 @@ intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
 		rate = REG_FIELD_GET8(LT_PHY_VDR_RATE_ENCODING_MASK,
 				      lt_state->config[0]);
 		clk = intel_lt_phy_get_dp_clock(rate);
-	} else {
+	} else if (mode == MODE_HDMI_20) {
 		clk = intel_lt_phy_calc_hdmi_port_clock(crtc_state);
+	} else {
+		drm_WARN_ON(display->drm, "Unsupported LT PHY Mode!\n");
+		clk = xe3plpd_lt_hdmi_252.clock;
 	}
 
 	return clk;
-- 
2.34.1

Re: [PATCH 3/3] drm/i915/ltphy: Provide protection against unsupported modes

[Nautiyal, Ankit K]

On 12/31/2025 10:53 AM, Suraj Kandpal wrote:
> We need to make sure we return some port clock in case we have
> unsupported LT PHY modes or if we were not able to read the LT PHY state
> for whatever reason and the mode ends up being 0.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_lt_phy.c | 7 ++++++-
>   1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> index cc85818c2b7e..54d1c68cf83a 100644
> --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> @@ -31,6 +31,7 @@
>   #define INTEL_LT_PHY_BOTH_LANES		(INTEL_LT_PHY_LANE1 |\
>   					 INTEL_LT_PHY_LANE0)
>   #define MODE_DP				3
> +#define MODE_HDMI_20			4
>   #define Q32_TO_INT(x)	((x) >> 32)
>   #define Q32_TO_FRAC(x)	((x) & 0xFFFFFFFF)
>   #define DCO_MIN_FREQ_MHZ	11850
> @@ -1751,6 +1752,7 @@ int
>   intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
>   			     const struct intel_crtc_state *crtc_state)
>   {
> +	struct intel_display *display = to_intel_display(encoder);
>   	int clk;
>   	const struct intel_lt_phy_pll_state *lt_state =
>   		&crtc_state->dpll_hw_state.ltpll;
> @@ -1768,8 +1770,11 @@ intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
>   		rate = REG_FIELD_GET8(LT_PHY_VDR_RATE_ENCODING_MASK,
>   				      lt_state->config[0]);
>   		clk = intel_lt_phy_get_dp_clock(rate);
> -	} else {
> +	} else if (mode == MODE_HDMI_20) {
>   		clk = intel_lt_phy_calc_hdmi_port_clock(crtc_state);
> +	} else {
> +		drm_WARN_ON(display->drm, "Unsupported LT PHY Mode!\n");
> +		clk = xe3plpd_lt_hdmi_252.clock;
>   	}
>   
>   	return clk;

✓ CI.KUnit: success for series starting with [1/3] drm/i915/ltphy: Remove state verification for LT PHY fields

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915/ltphy: Remove state verification for LT PHY fields
URL   : https://patchwork.freedesktop.org/series/159564/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[05:29:01] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:29:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:29:36] Starting KUnit Kernel (1/1)...
[05:29:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:29:36] ================== guc_buf (11 subtests) ===================
[05:29:36] [PASSED] test_smallest
[05:29:36] [PASSED] test_largest
[05:29:36] [PASSED] test_granular
[05:29:36] [PASSED] test_unique
[05:29:36] [PASSED] test_overlap
[05:29:36] [PASSED] test_reusable
[05:29:36] [PASSED] test_too_big
[05:29:36] [PASSED] test_flush
[05:29:36] [PASSED] test_lookup
[05:29:36] [PASSED] test_data
[05:29:36] [PASSED] test_class
[05:29:36] ===================== [PASSED] guc_buf =====================
[05:29:36] =================== guc_dbm (7 subtests) ===================
[05:29:36] [PASSED] test_empty
[05:29:36] [PASSED] test_default
[05:29:36] ======================== test_size  ========================
[05:29:36] [PASSED] 4
[05:29:36] [PASSED] 8
[05:29:36] [PASSED] 32
[05:29:36] [PASSED] 256
[05:29:36] ==================== [PASSED] test_size ====================
[05:29:36] ======================= test_reuse  ========================
[05:29:36] [PASSED] 4
[05:29:36] [PASSED] 8
[05:29:36] [PASSED] 32
[05:29:36] [PASSED] 256
[05:29:36] =================== [PASSED] test_reuse ====================
[05:29:36] =================== test_range_overlap  ====================
[05:29:36] [PASSED] 4
[05:29:36] [PASSED] 8
[05:29:36] [PASSED] 32
[05:29:36] [PASSED] 256
[05:29:36] =============== [PASSED] test_range_overlap ================
[05:29:36] =================== test_range_compact  ====================
[05:29:36] [PASSED] 4
[05:29:36] [PASSED] 8
[05:29:36] [PASSED] 32
[05:29:36] [PASSED] 256
[05:29:36] =============== [PASSED] test_range_compact ================
[05:29:36] ==================== test_range_spare  =====================
[05:29:36] [PASSED] 4
[05:29:36] [PASSED] 8
[05:29:36] [PASSED] 32
[05:29:36] [PASSED] 256
[05:29:36] ================ [PASSED] test_range_spare =================
[05:29:36] ===================== [PASSED] guc_dbm =====================
[05:29:36] =================== guc_idm (6 subtests) ===================
[05:29:36] [PASSED] bad_init
[05:29:36] [PASSED] no_init
[05:29:36] [PASSED] init_fini
[05:29:36] [PASSED] check_used
[05:29:36] [PASSED] check_quota
[05:29:36] [PASSED] check_all
[05:29:36] ===================== [PASSED] guc_idm =====================
[05:29:36] ================== no_relay (3 subtests) ===================
[05:29:36] [PASSED] xe_drops_guc2pf_if_not_ready
[05:29:36] [PASSED] xe_drops_guc2vf_if_not_ready
[05:29:36] [PASSED] xe_rejects_send_if_not_ready
[05:29:36] ==================== [PASSED] no_relay =====================
[05:29:36] ================== pf_relay (14 subtests) ==================
[05:29:36] [PASSED] pf_rejects_guc2pf_too_short
[05:29:36] [PASSED] pf_rejects_guc2pf_too_long
[05:29:36] [PASSED] pf_rejects_guc2pf_no_payload
[05:29:36] [PASSED] pf_fails_no_payload
[05:29:36] [PASSED] pf_fails_bad_origin
[05:29:36] [PASSED] pf_fails_bad_type
[05:29:36] [PASSED] pf_txn_reports_error
[05:29:36] [PASSED] pf_txn_sends_pf2guc
[05:29:36] [PASSED] pf_sends_pf2guc
[05:29:36] [SKIPPED] pf_loopback_nop
[05:29:36] [SKIPPED] pf_loopback_echo
[05:29:36] [SKIPPED] pf_loopback_fail
[05:29:36] [SKIPPED] pf_loopback_busy
[05:29:36] [SKIPPED] pf_loopback_retry
[05:29:36] ==================== [PASSED] pf_relay =====================
[05:29:36] ================== vf_relay (3 subtests) ===================
[05:29:36] [PASSED] vf_rejects_guc2vf_too_short
[05:29:36] [PASSED] vf_rejects_guc2vf_too_long
[05:29:36] [PASSED] vf_rejects_guc2vf_no_payload
[05:29:36] ==================== [PASSED] vf_relay =====================
[05:29:36] ================ pf_gt_config (6 subtests) =================
[05:29:36] [PASSED] fair_contexts_1vf
[05:29:36] [PASSED] fair_doorbells_1vf
[05:29:36] [PASSED] fair_ggtt_1vf
[05:29:36] ====================== fair_contexts  ======================
[05:29:36] [PASSED] 1 VF
[05:29:36] [PASSED] 2 VFs
[05:29:36] [PASSED] 3 VFs
[05:29:36] [PASSED] 4 VFs
[05:29:36] [PASSED] 5 VFs
[05:29:36] [PASSED] 6 VFs
[05:29:36] [PASSED] 7 VFs
[05:29:36] [PASSED] 8 VFs
[05:29:36] [PASSED] 9 VFs
[05:29:36] [PASSED] 10 VFs
[05:29:36] [PASSED] 11 VFs
[05:29:36] [PASSED] 12 VFs
[05:29:36] [PASSED] 13 VFs
[05:29:36] [PASSED] 14 VFs
[05:29:36] [PASSED] 15 VFs
[05:29:36] [PASSED] 16 VFs
[05:29:36] [PASSED] 17 VFs
[05:29:36] [PASSED] 18 VFs
[05:29:36] [PASSED] 19 VFs
[05:29:36] [PASSED] 20 VFs
[05:29:36] [PASSED] 21 VFs
[05:29:36] [PASSED] 22 VFs
[05:29:36] [PASSED] 23 VFs
[05:29:36] [PASSED] 24 VFs
[05:29:36] [PASSED] 25 VFs
[05:29:36] [PASSED] 26 VFs
[05:29:36] [PASSED] 27 VFs
[05:29:36] [PASSED] 28 VFs
[05:29:36] [PASSED] 29 VFs
[05:29:36] [PASSED] 30 VFs
[05:29:36] [PASSED] 31 VFs
[05:29:36] [PASSED] 32 VFs
[05:29:36] [PASSED] 33 VFs
[05:29:36] [PASSED] 34 VFs
[05:29:36] [PASSED] 35 VFs
[05:29:36] [PASSED] 36 VFs
[05:29:36] [PASSED] 37 VFs
[05:29:36] [PASSED] 38 VFs
[05:29:36] [PASSED] 39 VFs
[05:29:36] [PASSED] 40 VFs
[05:29:36] [PASSED] 41 VFs
[05:29:36] [PASSED] 42 VFs
[05:29:36] [PASSED] 43 VFs
[05:29:36] [PASSED] 44 VFs
[05:29:36] [PASSED] 45 VFs
[05:29:36] [PASSED] 46 VFs
[05:29:36] [PASSED] 47 VFs
[05:29:36] [PASSED] 48 VFs
[05:29:36] [PASSED] 49 VFs
[05:29:36] [PASSED] 50 VFs
[05:29:36] [PASSED] 51 VFs
[05:29:36] [PASSED] 52 VFs
[05:29:36] [PASSED] 53 VFs
[05:29:36] [PASSED] 54 VFs
[05:29:36] [PASSED] 55 VFs
[05:29:36] [PASSED] 56 VFs
[05:29:36] [PASSED] 57 VFs
[05:29:36] [PASSED] 58 VFs
[05:29:36] [PASSED] 59 VFs
[05:29:36] [PASSED] 60 VFs
[05:29:36] [PASSED] 61 VFs
[05:29:36] [PASSED] 62 VFs
[05:29:36] [PASSED] 63 VFs
[05:29:36] ================== [PASSED] fair_contexts ==================
[05:29:36] ===================== fair_doorbells  ======================
[05:29:36] [PASSED] 1 VF
[05:29:36] [PASSED] 2 VFs
[05:29:36] [PASSED] 3 VFs
[05:29:36] [PASSED] 4 VFs
[05:29:36] [PASSED] 5 VFs
[05:29:36] [PASSED] 6 VFs
[05:29:36] [PASSED] 7 VFs
[05:29:36] [PASSED] 8 VFs
[05:29:36] [PASSED] 9 VFs
[05:29:36] [PASSED] 10 VFs
[05:29:36] [PASSED] 11 VFs
[05:29:36] [PASSED] 12 VFs
[05:29:36] [PASSED] 13 VFs
[05:29:36] [PASSED] 14 VFs
[05:29:36] [PASSED] 15 VFs
[05:29:36] [PASSED] 16 VFs
[05:29:36] [PASSED] 17 VFs
[05:29:36] [PASSED] 18 VFs
[05:29:36] [PASSED] 19 VFs
[05:29:36] [PASSED] 20 VFs
[05:29:36] [PASSED] 21 VFs
[05:29:36] [PASSED] 22 VFs
[05:29:36] [PASSED] 23 VFs
[05:29:36] [PASSED] 24 VFs
[05:29:36] [PASSED] 25 VFs
[05:29:36] [PASSED] 26 VFs
[05:29:36] [PASSED] 27 VFs
[05:29:36] [PASSED] 28 VFs
[05:29:36] [PASSED] 29 VFs
[05:29:36] [PASSED] 30 VFs
[05:29:36] [PASSED] 31 VFs
[05:29:36] [PASSED] 32 VFs
[05:29:36] [PASSED] 33 VFs
[05:29:36] [PASSED] 34 VFs
[05:29:36] [PASSED] 35 VFs
[05:29:36] [PASSED] 36 VFs
[05:29:36] [PASSED] 37 VFs
[05:29:36] [PASSED] 38 VFs
[05:29:36] [PASSED] 39 VFs
[05:29:36] [PASSED] 40 VFs
[05:29:36] [PASSED] 41 VFs
[05:29:36] [PASSED] 42 VFs
[05:29:36] [PASSED] 43 VFs
[05:29:36] [PASSED] 44 VFs
[05:29:36] [PASSED] 45 VFs
[05:29:36] [PASSED] 46 VFs
[05:29:36] [PASSED] 47 VFs
[05:29:36] [PASSED] 48 VFs
[05:29:36] [PASSED] 49 VFs
[05:29:36] [PASSED] 50 VFs
[05:29:36] [PASSED] 51 VFs
[05:29:36] [PASSED] 52 VFs
[05:29:36] [PASSED] 53 VFs
[05:29:36] [PASSED] 54 VFs
[05:29:36] [PASSED] 55 VFs
[05:29:36] [PASSED] 56 VFs
[05:29:36] [PASSED] 57 VFs
[05:29:36] [PASSED] 58 VFs
[05:29:36] [PASSED] 59 VFs
[05:29:36] [PASSED] 60 VFs
[05:29:36] [PASSED] 61 VFs
[05:29:36] [PASSED] 62 VFs
[05:29:36] [PASSED] 63 VFs
[05:29:36] ================= [PASSED] fair_doorbells ==================
[05:29:36] ======================== fair_ggtt  ========================
[05:29:36] [PASSED] 1 VF
[05:29:36] [PASSED] 2 VFs
[05:29:36] [PASSED] 3 VFs
[05:29:36] [PASSED] 4 VFs
[05:29:36] [PASSED] 5 VFs
[05:29:36] [PASSED] 6 VFs
[05:29:36] [PASSED] 7 VFs
[05:29:36] [PASSED] 8 VFs
[05:29:36] [PASSED] 9 VFs
[05:29:36] [PASSED] 10 VFs
[05:29:36] [PASSED] 11 VFs
[05:29:36] [PASSED] 12 VFs
[05:29:36] [PASSED] 13 VFs
[05:29:36] [PASSED] 14 VFs
[05:29:36] [PASSED] 15 VFs
[05:29:36] [PASSED] 16 VFs
[05:29:36] [PASSED] 17 VFs
[05:29:36] [PASSED] 18 VFs
[05:29:36] [PASSED] 19 VFs
[05:29:36] [PASSED] 20 VFs
[05:29:36] [PASSED] 21 VFs
[05:29:36] [PASSED] 22 VFs
[05:29:36] [PASSED] 23 VFs
[05:29:36] [PASSED] 24 VFs
[05:29:36] [PASSED] 25 VFs
[05:29:36] [PASSED] 26 VFs
[05:29:36] [PASSED] 27 VFs
[05:29:36] [PASSED] 28 VFs
[05:29:36] [PASSED] 29 VFs
[05:29:36] [PASSED] 30 VFs
[05:29:36] [PASSED] 31 VFs
[05:29:36] [PASSED] 32 VFs
[05:29:36] [PASSED] 33 VFs
[05:29:36] [PASSED] 34 VFs
[05:29:36] [PASSED] 35 VFs
[05:29:36] [PASSED] 36 VFs
[05:29:36] [PASSED] 37 VFs
[05:29:36] [PASSED] 38 VFs
[05:29:36] [PASSED] 39 VFs
[05:29:36] [PASSED] 40 VFs
[05:29:36] [PASSED] 41 VFs
[05:29:36] [PASSED] 42 VFs
[05:29:36] [PASSED] 43 VFs
[05:29:36] [PASSED] 44 VFs
[05:29:36] [PASSED] 45 VFs
[05:29:36] [PASSED] 46 VFs
[05:29:36] [PASSED] 47 VFs
[05:29:36] [PASSED] 48 VFs
[05:29:36] [PASSED] 49 VFs
[05:29:36] [PASSED] 50 VFs
[05:29:36] [PASSED] 51 VFs
[05:29:36] [PASSED] 52 VFs
[05:29:36] [PASSED] 53 VFs
[05:29:36] [PASSED] 54 VFs
[05:29:36] [PASSED] 55 VFs
[05:29:36] [PASSED] 56 VFs
[05:29:36] [PASSED] 57 VFs
[05:29:36] [PASSED] 58 VFs
[05:29:36] [PASSED] 59 VFs
[05:29:36] [PASSED] 60 VFs
[05:29:36] [PASSED] 61 VFs
[05:29:36] [PASSED] 62 VFs
[05:29:36] [PASSED] 63 VFs
[05:29:36] ==================== [PASSED] fair_ggtt ====================
[05:29:36] ================== [PASSED] pf_gt_config ===================
[05:29:36] ===================== lmtt (1 subtest) =====================
[05:29:36] ======================== test_ops  =========================
[05:29:36] [PASSED] 2-level
[05:29:36] [PASSED] multi-level
[05:29:36] ==================== [PASSED] test_ops =====================
[05:29:36] ====================== [PASSED] lmtt =======================
[05:29:36] ================= pf_service (11 subtests) =================
[05:29:36] [PASSED] pf_negotiate_any
[05:29:36] [PASSED] pf_negotiate_base_match
[05:29:36] [PASSED] pf_negotiate_base_newer
[05:29:36] [PASSED] pf_negotiate_base_next
[05:29:36] [SKIPPED] pf_negotiate_base_older
[05:29:36] [PASSED] pf_negotiate_base_prev
[05:29:36] [PASSED] pf_negotiate_latest_match
[05:29:36] [PASSED] pf_negotiate_latest_newer
[05:29:36] [PASSED] pf_negotiate_latest_next
[05:29:36] [SKIPPED] pf_negotiate_latest_older
[05:29:36] [SKIPPED] pf_negotiate_latest_prev
[05:29:36] =================== [PASSED] pf_service ====================
[05:29:36] ================= xe_guc_g2g (2 subtests) ==================
[05:29:36] ============== xe_live_guc_g2g_kunit_default  ==============
[05:29:36] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[05:29:36] ============== xe_live_guc_g2g_kunit_allmem  ===============
[05:29:36] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[05:29:36] =================== [SKIPPED] xe_guc_g2g ===================
[05:29:36] =================== xe_mocs (2 subtests) ===================
[05:29:36] ================ xe_live_mocs_kernel_kunit  ================
[05:29:36] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[05:29:36] ================ xe_live_mocs_reset_kunit  =================
[05:29:36] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[05:29:36] ==================== [SKIPPED] xe_mocs =====================
[05:29:36] ================= xe_migrate (2 subtests) ==================
[05:29:36] ================= xe_migrate_sanity_kunit  =================
[05:29:36] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[05:29:36] ================== xe_validate_ccs_kunit  ==================
[05:29:36] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[05:29:36] =================== [SKIPPED] xe_migrate ===================
[05:29:36] ================== xe_dma_buf (1 subtest) ==================
[05:29:36] ==================== xe_dma_buf_kunit  =====================
[05:29:36] ================ [SKIPPED] xe_dma_buf_kunit ================
[05:29:36] =================== [SKIPPED] xe_dma_buf ===================
[05:29:36] ================= xe_bo_shrink (1 subtest) =================
[05:29:36] =================== xe_bo_shrink_kunit  ====================
[05:29:36] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[05:29:36] ================== [SKIPPED] xe_bo_shrink ==================
[05:29:36] ==================== xe_bo (2 subtests) ====================
[05:29:36] ================== xe_ccs_migrate_kunit  ===================
[05:29:36] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[05:29:36] ==================== xe_bo_evict_kunit  ====================
[05:29:36] =============== [SKIPPED] xe_bo_evict_kunit ================
[05:29:36] ===================== [SKIPPED] xe_bo ======================
[05:29:36] ==================== args (13 subtests) ====================
[05:29:36] [PASSED] count_args_test
[05:29:36] [PASSED] call_args_example
[05:29:36] [PASSED] call_args_test
[05:29:36] [PASSED] drop_first_arg_example
[05:29:36] [PASSED] drop_first_arg_test
[05:29:36] [PASSED] first_arg_example
[05:29:36] [PASSED] first_arg_test
[05:29:36] [PASSED] last_arg_example
[05:29:36] [PASSED] last_arg_test
[05:29:36] [PASSED] pick_arg_example
[05:29:36] [PASSED] if_args_example
[05:29:36] [PASSED] if_args_test
[05:29:36] [PASSED] sep_comma_example
[05:29:36] ====================== [PASSED] args =======================
[05:29:36] =================== xe_pci (3 subtests) ====================
[05:29:36] ==================== check_graphics_ip  ====================
[05:29:36] [PASSED] 12.00 Xe_LP
[05:29:36] [PASSED] 12.10 Xe_LP+
[05:29:36] [PASSED] 12.55 Xe_HPG
[05:29:36] [PASSED] 12.60 Xe_HPC
[05:29:36] [PASSED] 12.70 Xe_LPG
[05:29:36] [PASSED] 12.71 Xe_LPG
[05:29:36] [PASSED] 12.74 Xe_LPG+
[05:29:36] [PASSED] 20.01 Xe2_HPG
[05:29:36] [PASSED] 20.02 Xe2_HPG
[05:29:36] [PASSED] 20.04 Xe2_LPG
[05:29:36] [PASSED] 30.00 Xe3_LPG
[05:29:36] [PASSED] 30.01 Xe3_LPG
[05:29:36] [PASSED] 30.03 Xe3_LPG
[05:29:36] [PASSED] 30.04 Xe3_LPG
[05:29:36] [PASSED] 30.05 Xe3_LPG
[05:29:36] [PASSED] 35.11 Xe3p_XPC
[05:29:36] ================ [PASSED] check_graphics_ip ================
[05:29:36] ===================== check_media_ip  ======================
[05:29:36] [PASSED] 12.00 Xe_M
[05:29:36] [PASSED] 12.55 Xe_HPM
[05:29:36] [PASSED] 13.00 Xe_LPM+
[05:29:36] [PASSED] 13.01 Xe2_HPM
[05:29:36] [PASSED] 20.00 Xe2_LPM
[05:29:36] [PASSED] 30.00 Xe3_LPM
[05:29:36] [PASSED] 30.02 Xe3_LPM
[05:29:36] [PASSED] 35.00 Xe3p_LPM
[05:29:36] [PASSED] 35.03 Xe3p_HPM
[05:29:36] ================= [PASSED] check_media_ip ==================
[05:29:36] =================== check_platform_desc  ===================
[05:29:36] [PASSED] 0x9A60 (TIGERLAKE)
[05:29:36] [PASSED] 0x9A68 (TIGERLAKE)
[05:29:36] [PASSED] 0x9A70 (TIGERLAKE)
[05:29:36] [PASSED] 0x9A40 (TIGERLAKE)
[05:29:36] [PASSED] 0x9A49 (TIGERLAKE)
[05:29:36] [PASSED] 0x9A59 (TIGERLAKE)
[05:29:36] [PASSED] 0x9A78 (TIGERLAKE)
[05:29:36] [PASSED] 0x9AC0 (TIGERLAKE)
[05:29:36] [PASSED] 0x9AC9 (TIGERLAKE)
[05:29:36] [PASSED] 0x9AD9 (TIGERLAKE)
[05:29:36] [PASSED] 0x9AF8 (TIGERLAKE)
[05:29:36] [PASSED] 0x4C80 (ROCKETLAKE)
[05:29:36] [PASSED] 0x4C8A (ROCKETLAKE)
[05:29:36] [PASSED] 0x4C8B (ROCKETLAKE)
[05:29:36] [PASSED] 0x4C8C (ROCKETLAKE)
[05:29:36] [PASSED] 0x4C90 (ROCKETLAKE)
[05:29:36] [PASSED] 0x4C9A (ROCKETLAKE)
[05:29:36] [PASSED] 0x4680 (ALDERLAKE_S)
[05:29:36] [PASSED] 0x4682 (ALDERLAKE_S)
[05:29:36] [PASSED] 0x4688 (ALDERLAKE_S)
[05:29:36] [PASSED] 0x468A (ALDERLAKE_S)
[05:29:36] [PASSED] 0x468B (ALDERLAKE_S)
[05:29:36] [PASSED] 0x4690 (ALDERLAKE_S)
[05:29:36] [PASSED] 0x4692 (ALDERLAKE_S)
[05:29:36] [PASSED] 0x4693 (ALDERLAKE_S)
[05:29:36] [PASSED] 0x46A0 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46A1 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46A2 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46A3 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46A6 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46A8 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46AA (ALDERLAKE_P)
[05:29:36] [PASSED] 0x462A (ALDERLAKE_P)
[05:29:36] [PASSED] 0x4626 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[05:29:36] [PASSED] 0x46B0 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46B1 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46B2 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46B3 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46C0 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46C1 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46C2 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46C3 (ALDERLAKE_P)
[05:29:36] [PASSED] 0x46D0 (ALDERLAKE_N)
[05:29:36] [PASSED] 0x46D1 (ALDERLAKE_N)
[05:29:36] [PASSED] 0x46D2 (ALDERLAKE_N)
[05:29:36] [PASSED] 0x46D3 (ALDERLAKE_N)
[05:29:36] [PASSED] 0x46D4 (ALDERLAKE_N)
[05:29:36] [PASSED] 0xA721 (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA7A1 (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA7A9 (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA7AC (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA7AD (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA720 (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA7A0 (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA7A8 (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA7AA (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA7AB (ALDERLAKE_P)
[05:29:36] [PASSED] 0xA780 (ALDERLAKE_S)
[05:29:36] [PASSED] 0xA781 (ALDERLAKE_S)
[05:29:36] [PASSED] 0xA782 (ALDERLAKE_S)
[05:29:36] [PASSED] 0xA783 (ALDERLAKE_S)
[05:29:36] [PASSED] 0xA788 (ALDERLAKE_S)
[05:29:36] [PASSED] 0xA789 (ALDERLAKE_S)
[05:29:36] [PASSED] 0xA78A (ALDERLAKE_S)
[05:29:36] [PASSED] 0xA78B (ALDERLAKE_S)
[05:29:36] [PASSED] 0x4905 (DG1)
[05:29:36] [PASSED] 0x4906 (DG1)
[05:29:36] [PASSED] 0x4907 (DG1)
[05:29:36] [PASSED] 0x4908 (DG1)
[05:29:36] [PASSED] 0x4909 (DG1)
[05:29:36] [PASSED] 0x56C0 (DG2)
[05:29:36] [PASSED] 0x56C2 (DG2)
[05:29:36] [PASSED] 0x56C1 (DG2)
[05:29:36] [PASSED] 0x7D51 (METEORLAKE)
[05:29:36] [PASSED] 0x7DD1 (METEORLAKE)
[05:29:36] [PASSED] 0x7D41 (METEORLAKE)
[05:29:36] [PASSED] 0x7D67 (METEORLAKE)
[05:29:36] [PASSED] 0xB640 (METEORLAKE)
[05:29:36] [PASSED] 0x56A0 (DG2)
[05:29:36] [PASSED] 0x56A1 (DG2)
[05:29:36] [PASSED] 0x56A2 (DG2)
[05:29:36] [PASSED] 0x56BE (DG2)
[05:29:36] [PASSED] 0x56BF (DG2)
[05:29:36] [PASSED] 0x5690 (DG2)
[05:29:36] [PASSED] 0x5691 (DG2)
[05:29:36] [PASSED] 0x5692 (DG2)
[05:29:36] [PASSED] 0x56A5 (DG2)
[05:29:36] [PASSED] 0x56A6 (DG2)
[05:29:36] [PASSED] 0x56B0 (DG2)
[05:29:36] [PASSED] 0x56B1 (DG2)
[05:29:36] [PASSED] 0x56BA (DG2)
[05:29:36] [PASSED] 0x56BB (DG2)
[05:29:36] [PASSED] 0x56BC (DG2)
[05:29:36] [PASSED] 0x56BD (DG2)
[05:29:36] [PASSED] 0x5693 (DG2)
[05:29:36] [PASSED] 0x5694 (DG2)
[05:29:36] [PASSED] 0x5695 (DG2)
[05:29:36] [PASSED] 0x56A3 (DG2)
[05:29:36] [PASSED] 0x56A4 (DG2)
[05:29:36] [PASSED] 0x56B2 (DG2)
[05:29:36] [PASSED] 0x56B3 (DG2)
[05:29:36] [PASSED] 0x5696 (DG2)
[05:29:36] [PASSED] 0x5697 (DG2)
[05:29:36] [PASSED] 0xB69 (PVC)
[05:29:36] [PASSED] 0xB6E (PVC)
[05:29:36] [PASSED] 0xBD4 (PVC)
[05:29:36] [PASSED] 0xBD5 (PVC)
[05:29:36] [PASSED] 0xBD6 (PVC)
[05:29:36] [PASSED] 0xBD7 (PVC)
[05:29:36] [PASSED] 0xBD8 (PVC)
[05:29:36] [PASSED] 0xBD9 (PVC)
[05:29:36] [PASSED] 0xBDA (PVC)
[05:29:36] [PASSED] 0xBDB (PVC)
[05:29:36] [PASSED] 0xBE0 (PVC)
[05:29:36] [PASSED] 0xBE1 (PVC)
[05:29:36] [PASSED] 0xBE5 (PVC)
[05:29:36] [PASSED] 0x7D40 (METEORLAKE)
[05:29:36] [PASSED] 0x7D45 (METEORLAKE)
[05:29:36] [PASSED] 0x7D55 (METEORLAKE)
[05:29:36] [PASSED] 0x7D60 (METEORLAKE)
[05:29:36] [PASSED] 0x7DD5 (METEORLAKE)
[05:29:36] [PASSED] 0x6420 (LUNARLAKE)
[05:29:36] [PASSED] 0x64A0 (LUNARLAKE)
[05:29:36] [PASSED] 0x64B0 (LUNARLAKE)
[05:29:36] [PASSED] 0xE202 (BATTLEMAGE)
[05:29:36] [PASSED] 0xE209 (BATTLEMAGE)
[05:29:36] [PASSED] 0xE20B (BATTLEMAGE)
[05:29:36] [PASSED] 0xE20C (BATTLEMAGE)
[05:29:36] [PASSED] 0xE20D (BATTLEMAGE)
[05:29:36] [PASSED] 0xE210 (BATTLEMAGE)
[05:29:36] [PASSED] 0xE211 (BATTLEMAGE)
[05:29:36] [PASSED] 0xE212 (BATTLEMAGE)
[05:29:36] [PASSED] 0xE216 (BATTLEMAGE)
[05:29:36] [PASSED] 0xE220 (BATTLEMAGE)
[05:29:36] [PASSED] 0xE221 (BATTLEMAGE)
[05:29:36] [PASSED] 0xE222 (BATTLEMAGE)
[05:29:36] [PASSED] 0xE223 (BATTLEMAGE)
[05:29:36] [PASSED] 0xB080 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB081 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB082 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB083 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB084 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB085 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB086 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB087 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB08F (PANTHERLAKE)
[05:29:36] [PASSED] 0xB090 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB0A0 (PANTHERLAKE)
[05:29:36] [PASSED] 0xB0B0 (PANTHERLAKE)
[05:29:36] [PASSED] 0xFD80 (PANTHERLAKE)
[05:29:36] [PASSED] 0xFD81 (PANTHERLAKE)
[05:29:36] [PASSED] 0xD740 (NOVALAKE_S)
[05:29:36] [PASSED] 0xD741 (NOVALAKE_S)
[05:29:36] [PASSED] 0xD742 (NOVALAKE_S)
[05:29:36] [PASSED] 0xD743 (NOVALAKE_S)
[05:29:36] [PASSED] 0xD744 (NOVALAKE_S)
[05:29:36] [PASSED] 0xD745 (NOVALAKE_S)
[05:29:36] [PASSED] 0x674C (CRESCENTISLAND)
[05:29:36] =============== [PASSED] check_platform_desc ===============
[05:29:36] ===================== [PASSED] xe_pci ======================
[05:29:36] =================== xe_rtp (2 subtests) ====================
[05:29:36] =============== xe_rtp_process_to_sr_tests  ================
[05:29:36] [PASSED] coalesce-same-reg
[05:29:36] [PASSED] no-match-no-add
[05:29:36] [PASSED] match-or
[05:29:36] [PASSED] match-or-xfail
[05:29:36] [PASSED] no-match-no-add-multiple-rules
[05:29:36] [PASSED] two-regs-two-entries
[05:29:36] [PASSED] clr-one-set-other
[05:29:36] [PASSED] set-field
[05:29:36] [PASSED] conflict-duplicate
[05:29:36] [PASSED] conflict-not-disjoint
[05:29:36] [PASSED] conflict-reg-type
[05:29:36] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[05:29:36] ================== xe_rtp_process_tests  ===================
[05:29:36] [PASSED] active1
[05:29:36] [PASSED] active2
[05:29:36] [PASSED] active-inactive
[05:29:36] [PASSED] inactive-active
[05:29:36] [PASSED] inactive-1st_or_active-inactive
[05:29:36] [PASSED] inactive-2nd_or_active-inactive
[05:29:36] [PASSED] inactive-last_or_active-inactive
[05:29:36] [PASSED] inactive-no_or_active-inactive
[05:29:36] ============== [PASSED] xe_rtp_process_tests ===============
[05:29:36] ===================== [PASSED] xe_rtp ======================
[05:29:36] ==================== xe_wa (1 subtest) =====================
[05:29:36] ======================== xe_wa_gt  =========================
[05:29:36] [PASSED] TIGERLAKE B0
[05:29:36] [PASSED] DG1 A0
[05:29:36] [PASSED] DG1 B0
[05:29:36] [PASSED] ALDERLAKE_S A0
[05:29:36] [PASSED] ALDERLAKE_S B0
[05:29:36] [PASSED] ALDERLAKE_S C0
[05:29:36] [PASSED] ALDERLAKE_S D0
[05:29:36] [PASSED] ALDERLAKE_P A0
[05:29:36] [PASSED] ALDERLAKE_P B0
[05:29:36] [PASSED] ALDERLAKE_P C0
[05:29:36] [PASSED] ALDERLAKE_S RPLS D0
[05:29:36] [PASSED] ALDERLAKE_P RPLU E0
[05:29:36] [PASSED] DG2 G10 C0
[05:29:36] [PASSED] DG2 G11 B1
[05:29:36] [PASSED] DG2 G12 A1
[05:29:36] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:29:36] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[05:29:36] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[05:29:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[05:29:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[05:29:36] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[05:29:36] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[05:29:36] ==================== [PASSED] xe_wa_gt =====================
[05:29:36] ====================== [PASSED] xe_wa ======================
[05:29:36] ============================================================
[05:29:36] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[05:29:37] Elapsed time: 35.968s total, 4.106s configuring, 31.345s building, 0.464s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[05:29:37] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:29:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:30:04] Starting KUnit Kernel (1/1)...
[05:30:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:30:04] ============ drm_test_pick_cmdline (2 subtests) ============
[05:30:04] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[05:30:04] =============== drm_test_pick_cmdline_named  ===============
[05:30:04] [PASSED] NTSC
[05:30:04] [PASSED] NTSC-J
[05:30:04] [PASSED] PAL
[05:30:04] [PASSED] PAL-M
[05:30:04] =========== [PASSED] drm_test_pick_cmdline_named ===========
[05:30:04] ============== [PASSED] drm_test_pick_cmdline ==============
[05:30:04] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[05:30:04] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[05:30:04] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[05:30:04] =========== drm_validate_clone_mode (2 subtests) ===========
[05:30:04] ============== drm_test_check_in_clone_mode  ===============
[05:30:04] [PASSED] in_clone_mode
[05:30:04] [PASSED] not_in_clone_mode
[05:30:04] ========== [PASSED] drm_test_check_in_clone_mode ===========
[05:30:04] =============== drm_test_check_valid_clones  ===============
[05:30:04] [PASSED] not_in_clone_mode
[05:30:04] [PASSED] valid_clone
[05:30:04] [PASSED] invalid_clone
[05:30:04] =========== [PASSED] drm_test_check_valid_clones ===========
[05:30:04] ============= [PASSED] drm_validate_clone_mode =============
[05:30:04] ============= drm_validate_modeset (1 subtest) =============
[05:30:04] [PASSED] drm_test_check_connector_changed_modeset
[05:30:04] ============== [PASSED] drm_validate_modeset ===============
[05:30:04] ====== drm_test_bridge_get_current_state (2 subtests) ======
[05:30:04] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[05:30:04] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[05:30:04] ======== [PASSED] drm_test_bridge_get_current_state ========
[05:30:04] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[05:30:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[05:30:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[05:30:04] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[05:30:04] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[05:30:04] ============== drm_bridge_alloc (2 subtests) ===============
[05:30:04] [PASSED] drm_test_drm_bridge_alloc_basic
[05:30:04] [PASSED] drm_test_drm_bridge_alloc_get_put
[05:30:04] ================ [PASSED] drm_bridge_alloc =================
[05:30:04] ================== drm_buddy (8 subtests) ==================
[05:30:04] [PASSED] drm_test_buddy_alloc_limit
[05:30:04] [PASSED] drm_test_buddy_alloc_optimistic
[05:30:04] [PASSED] drm_test_buddy_alloc_pessimistic
[05:30:04] [PASSED] drm_test_buddy_alloc_pathological
[05:30:04] [PASSED] drm_test_buddy_alloc_contiguous
[05:30:04] [PASSED] drm_test_buddy_alloc_clear
[05:30:04] [PASSED] drm_test_buddy_alloc_range_bias
[05:30:04] [PASSED] drm_test_buddy_fragmentation_performance
[05:30:04] ==================== [PASSED] drm_buddy ====================
[05:30:04] ============= drm_cmdline_parser (40 subtests) =============
[05:30:04] [PASSED] drm_test_cmdline_force_d_only
[05:30:04] [PASSED] drm_test_cmdline_force_D_only_dvi
[05:30:04] [PASSED] drm_test_cmdline_force_D_only_hdmi
[05:30:04] [PASSED] drm_test_cmdline_force_D_only_not_digital
[05:30:04] [PASSED] drm_test_cmdline_force_e_only
[05:30:04] [PASSED] drm_test_cmdline_res
[05:30:04] [PASSED] drm_test_cmdline_res_vesa
[05:30:04] [PASSED] drm_test_cmdline_res_vesa_rblank
[05:30:04] [PASSED] drm_test_cmdline_res_rblank
[05:30:04] [PASSED] drm_test_cmdline_res_bpp
[05:30:04] [PASSED] drm_test_cmdline_res_refresh
[05:30:04] [PASSED] drm_test_cmdline_res_bpp_refresh
[05:30:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[05:30:04] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[05:30:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[05:30:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[05:30:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[05:30:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[05:30:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[05:30:04] [PASSED] drm_test_cmdline_res_margins_force_on
[05:30:04] [PASSED] drm_test_cmdline_res_vesa_margins
[05:30:04] [PASSED] drm_test_cmdline_name
[05:30:04] [PASSED] drm_test_cmdline_name_bpp
[05:30:04] [PASSED] drm_test_cmdline_name_option
[05:30:04] [PASSED] drm_test_cmdline_name_bpp_option
[05:30:04] [PASSED] drm_test_cmdline_rotate_0
[05:30:04] [PASSED] drm_test_cmdline_rotate_90
[05:30:04] [PASSED] drm_test_cmdline_rotate_180
[05:30:04] [PASSED] drm_test_cmdline_rotate_270
[05:30:04] [PASSED] drm_test_cmdline_hmirror
[05:30:04] [PASSED] drm_test_cmdline_vmirror
[05:30:04] [PASSED] drm_test_cmdline_margin_options
[05:30:04] [PASSED] drm_test_cmdline_multiple_options
[05:30:04] [PASSED] drm_test_cmdline_bpp_extra_and_option
[05:30:04] [PASSED] drm_test_cmdline_extra_and_option
[05:30:04] [PASSED] drm_test_cmdline_freestanding_options
[05:30:04] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[05:30:04] [PASSED] drm_test_cmdline_panel_orientation
[05:30:04] ================ drm_test_cmdline_invalid  =================
[05:30:04] [PASSED] margin_only
[05:30:04] [PASSED] interlace_only
[05:30:04] [PASSED] res_missing_x
[05:30:04] [PASSED] res_missing_y
[05:30:04] [PASSED] res_bad_y
[05:30:04] [PASSED] res_missing_y_bpp
[05:30:04] [PASSED] res_bad_bpp
[05:30:04] [PASSED] res_bad_refresh
[05:30:04] [PASSED] res_bpp_refresh_force_on_off
[05:30:04] [PASSED] res_invalid_mode
[05:30:04] [PASSED] res_bpp_wrong_place_mode
[05:30:04] [PASSED] name_bpp_refresh
[05:30:04] [PASSED] name_refresh
[05:30:04] [PASSED] name_refresh_wrong_mode
[05:30:04] [PASSED] name_refresh_invalid_mode
[05:30:04] [PASSED] rotate_multiple
[05:30:04] [PASSED] rotate_invalid_val
[05:30:04] [PASSED] rotate_truncated
[05:30:04] [PASSED] invalid_option
[05:30:04] [PASSED] invalid_tv_option
[05:30:04] [PASSED] truncated_tv_option
[05:30:04] ============ [PASSED] drm_test_cmdline_invalid =============
[05:30:04] =============== drm_test_cmdline_tv_options  ===============
[05:30:04] [PASSED] NTSC
[05:30:04] [PASSED] NTSC_443
[05:30:04] [PASSED] NTSC_J
[05:30:04] [PASSED] PAL
[05:30:04] [PASSED] PAL_M
[05:30:04] [PASSED] PAL_N
[05:30:04] [PASSED] SECAM
[05:30:04] [PASSED] MONO_525
[05:30:04] [PASSED] MONO_625
[05:30:04] =========== [PASSED] drm_test_cmdline_tv_options ===========
[05:30:04] =============== [PASSED] drm_cmdline_parser ================
[05:30:04] ========== drmm_connector_hdmi_init (20 subtests) ==========
[05:30:04] [PASSED] drm_test_connector_hdmi_init_valid
[05:30:04] [PASSED] drm_test_connector_hdmi_init_bpc_8
[05:30:04] [PASSED] drm_test_connector_hdmi_init_bpc_10
[05:30:04] [PASSED] drm_test_connector_hdmi_init_bpc_12
[05:30:04] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[05:30:04] [PASSED] drm_test_connector_hdmi_init_bpc_null
[05:30:04] [PASSED] drm_test_connector_hdmi_init_formats_empty
[05:30:04] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[05:30:04] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[05:30:04] [PASSED] supported_formats=0x9 yuv420_allowed=1
[05:30:04] [PASSED] supported_formats=0x9 yuv420_allowed=0
[05:30:04] [PASSED] supported_formats=0x3 yuv420_allowed=1
[05:30:04] [PASSED] supported_formats=0x3 yuv420_allowed=0
[05:30:04] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[05:30:04] [PASSED] drm_test_connector_hdmi_init_null_ddc
[05:30:04] [PASSED] drm_test_connector_hdmi_init_null_product
[05:30:04] [PASSED] drm_test_connector_hdmi_init_null_vendor
[05:30:04] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[05:30:04] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[05:30:04] [PASSED] drm_test_connector_hdmi_init_product_valid
[05:30:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[05:30:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[05:30:04] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[05:30:04] ========= drm_test_connector_hdmi_init_type_valid  =========
[05:30:04] [PASSED] HDMI-A
[05:30:04] [PASSED] HDMI-B
[05:30:04] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[05:30:04] ======== drm_test_connector_hdmi_init_type_invalid  ========
[05:30:04] [PASSED] Unknown
[05:30:04] [PASSED] VGA
[05:30:04] [PASSED] DVI-I
[05:30:04] [PASSED] DVI-D
[05:30:04] [PASSED] DVI-A
[05:30:04] [PASSED] Composite
[05:30:04] [PASSED] SVIDEO
[05:30:04] [PASSED] LVDS
[05:30:04] [PASSED] Component
[05:30:04] [PASSED] DIN
[05:30:04] [PASSED] DP
[05:30:04] [PASSED] TV
[05:30:04] [PASSED] eDP
[05:30:04] [PASSED] Virtual
[05:30:04] [PASSED] DSI
[05:30:04] [PASSED] DPI
[05:30:04] [PASSED] Writeback
[05:30:04] [PASSED] SPI
[05:30:04] [PASSED] USB
[05:30:04] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[05:30:04] ============ [PASSED] drmm_connector_hdmi_init =============
[05:30:04] ============= drmm_connector_init (3 subtests) =============
[05:30:04] [PASSED] drm_test_drmm_connector_init
[05:30:04] [PASSED] drm_test_drmm_connector_init_null_ddc
[05:30:04] ========= drm_test_drmm_connector_init_type_valid  =========
[05:30:04] [PASSED] Unknown
[05:30:04] [PASSED] VGA
[05:30:04] [PASSED] DVI-I
[05:30:04] [PASSED] DVI-D
[05:30:04] [PASSED] DVI-A
[05:30:04] [PASSED] Composite
[05:30:04] [PASSED] SVIDEO
[05:30:04] [PASSED] LVDS
[05:30:04] [PASSED] Component
[05:30:04] [PASSED] DIN
[05:30:04] [PASSED] DP
[05:30:04] [PASSED] HDMI-A
[05:30:04] [PASSED] HDMI-B
[05:30:04] [PASSED] TV
[05:30:04] [PASSED] eDP
[05:30:04] [PASSED] Virtual
[05:30:04] [PASSED] DSI
[05:30:04] [PASSED] DPI
[05:30:04] [PASSED] Writeback
[05:30:04] [PASSED] SPI
[05:30:04] [PASSED] USB
[05:30:04] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[05:30:04] =============== [PASSED] drmm_connector_init ===============
[05:30:04] ========= drm_connector_dynamic_init (6 subtests) ==========
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_init
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_init_properties
[05:30:04] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[05:30:04] [PASSED] Unknown
[05:30:04] [PASSED] VGA
[05:30:04] [PASSED] DVI-I
[05:30:04] [PASSED] DVI-D
[05:30:04] [PASSED] DVI-A
[05:30:04] [PASSED] Composite
[05:30:04] [PASSED] SVIDEO
[05:30:04] [PASSED] LVDS
[05:30:04] [PASSED] Component
[05:30:04] [PASSED] DIN
[05:30:04] [PASSED] DP
[05:30:04] [PASSED] HDMI-A
[05:30:04] [PASSED] HDMI-B
[05:30:04] [PASSED] TV
[05:30:04] [PASSED] eDP
[05:30:04] [PASSED] Virtual
[05:30:04] [PASSED] DSI
[05:30:04] [PASSED] DPI
[05:30:04] [PASSED] Writeback
[05:30:04] [PASSED] SPI
[05:30:04] [PASSED] USB
[05:30:04] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[05:30:04] ======== drm_test_drm_connector_dynamic_init_name  =========
[05:30:04] [PASSED] Unknown
[05:30:04] [PASSED] VGA
[05:30:04] [PASSED] DVI-I
[05:30:04] [PASSED] DVI-D
[05:30:04] [PASSED] DVI-A
[05:30:04] [PASSED] Composite
[05:30:04] [PASSED] SVIDEO
[05:30:04] [PASSED] LVDS
[05:30:04] [PASSED] Component
[05:30:04] [PASSED] DIN
[05:30:04] [PASSED] DP
[05:30:04] [PASSED] HDMI-A
[05:30:04] [PASSED] HDMI-B
[05:30:04] [PASSED] TV
[05:30:04] [PASSED] eDP
[05:30:04] [PASSED] Virtual
[05:30:04] [PASSED] DSI
[05:30:04] [PASSED] DPI
[05:30:04] [PASSED] Writeback
[05:30:04] [PASSED] SPI
[05:30:04] [PASSED] USB
[05:30:04] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[05:30:04] =========== [PASSED] drm_connector_dynamic_init ============
[05:30:04] ==== drm_connector_dynamic_register_early (4 subtests) =====
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[05:30:04] ====== [PASSED] drm_connector_dynamic_register_early =======
[05:30:04] ======= drm_connector_dynamic_register (7 subtests) ========
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[05:30:04] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[05:30:04] ========= [PASSED] drm_connector_dynamic_register ==========
[05:30:04] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[05:30:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[05:30:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[05:30:04] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[05:30:04] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[05:30:04] ========== drm_test_get_tv_mode_from_name_valid  ===========
[05:30:04] [PASSED] NTSC
[05:30:04] [PASSED] NTSC-443
[05:30:04] [PASSED] NTSC-J
[05:30:04] [PASSED] PAL
[05:30:04] [PASSED] PAL-M
[05:30:04] [PASSED] PAL-N
[05:30:04] [PASSED] SECAM
[05:30:04] [PASSED] Mono
[05:30:04] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[05:30:04] [PASSED] drm_test_get_tv_mode_from_name_truncated
[05:30:04] ============ [PASSED] drm_get_tv_mode_from_name ============
[05:30:04] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[05:30:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[05:30:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[05:30:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[05:30:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[05:30:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[05:30:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[05:30:04] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[05:30:04] [PASSED] VIC 96
[05:30:04] [PASSED] VIC 97
[05:30:04] [PASSED] VIC 101
[05:30:04] [PASSED] VIC 102
[05:30:04] [PASSED] VIC 106
[05:30:04] [PASSED] VIC 107
[05:30:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[05:30:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[05:30:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[05:30:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[05:30:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[05:30:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[05:30:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[05:30:04] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[05:30:04] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[05:30:04] [PASSED] Automatic
[05:30:04] [PASSED] Full
[05:30:04] [PASSED] Limited 16:235
[05:30:04] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[05:30:04] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[05:30:04] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[05:30:04] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[05:30:04] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[05:30:04] [PASSED] RGB
[05:30:04] [PASSED] YUV 4:2:0
[05:30:04] [PASSED] YUV 4:2:2
[05:30:04] [PASSED] YUV 4:4:4
[05:30:04] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[05:30:04] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[05:30:04] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[05:30:04] ============= drm_damage_helper (21 subtests) ==============
[05:30:04] [PASSED] drm_test_damage_iter_no_damage
[05:30:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[05:30:04] [PASSED] drm_test_damage_iter_no_damage_src_moved
[05:30:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[05:30:04] [PASSED] drm_test_damage_iter_no_damage_not_visible
[05:30:04] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[05:30:04] [PASSED] drm_test_damage_iter_no_damage_no_fb
[05:30:04] [PASSED] drm_test_damage_iter_simple_damage
[05:30:04] [PASSED] drm_test_damage_iter_single_damage
[05:30:04] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[05:30:04] [PASSED] drm_test_damage_iter_single_damage_outside_src
[05:30:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[05:30:04] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[05:30:04] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[05:30:04] [PASSED] drm_test_damage_iter_single_damage_src_moved
[05:30:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[05:30:04] [PASSED] drm_test_damage_iter_damage
[05:30:04] [PASSED] drm_test_damage_iter_damage_one_intersect
[05:30:04] [PASSED] drm_test_damage_iter_damage_one_outside
[05:30:04] [PASSED] drm_test_damage_iter_damage_src_moved
[05:30:04] [PASSED] drm_test_damage_iter_damage_not_visible
[05:30:04] ================ [PASSED] drm_damage_helper ================
[05:30:04] ============== drm_dp_mst_helper (3 subtests) ==============
[05:30:04] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[05:30:04] [PASSED] Clock 154000 BPP 30 DSC disabled
[05:30:04] [PASSED] Clock 234000 BPP 30 DSC disabled
[05:30:04] [PASSED] Clock 297000 BPP 24 DSC disabled
[05:30:04] [PASSED] Clock 332880 BPP 24 DSC enabled
[05:30:04] [PASSED] Clock 324540 BPP 24 DSC enabled
[05:30:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[05:30:04] ============== drm_test_dp_mst_calc_pbn_div  ===============
[05:30:04] [PASSED] Link rate 2000000 lane count 4
[05:30:04] [PASSED] Link rate 2000000 lane count 2
[05:30:04] [PASSED] Link rate 2000000 lane count 1
[05:30:04] [PASSED] Link rate 1350000 lane count 4
[05:30:04] [PASSED] Link rate 1350000 lane count 2
[05:30:04] [PASSED] Link rate 1350000 lane count 1
[05:30:04] [PASSED] Link rate 1000000 lane count 4
[05:30:04] [PASSED] Link rate 1000000 lane count 2
[05:30:04] [PASSED] Link rate 1000000 lane count 1
[05:30:04] [PASSED] Link rate 810000 lane count 4
[05:30:04] [PASSED] Link rate 810000 lane count 2
[05:30:04] [PASSED] Link rate 810000 lane count 1
[05:30:04] [PASSED] Link rate 540000 lane count 4
[05:30:04] [PASSED] Link rate 540000 lane count 2
[05:30:04] [PASSED] Link rate 540000 lane count 1
[05:30:04] [PASSED] Link rate 270000 lane count 4
[05:30:04] [PASSED] Link rate 270000 lane count 2
[05:30:04] [PASSED] Link rate 270000 lane count 1
[05:30:04] [PASSED] Link rate 162000 lane count 4
[05:30:04] [PASSED] Link rate 162000 lane count 2
[05:30:04] [PASSED] Link rate 162000 lane count 1
[05:30:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[05:30:04] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[05:30:04] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[05:30:04] [PASSED] DP_POWER_UP_PHY with port number
[05:30:04] [PASSED] DP_POWER_DOWN_PHY with port number
[05:30:04] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[05:30:04] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[05:30:04] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[05:30:04] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[05:30:04] [PASSED] DP_QUERY_PAYLOAD with port number
[05:30:04] [PASSED] DP_QUERY_PAYLOAD with VCPI
[05:30:04] [PASSED] DP_REMOTE_DPCD_READ with port number
[05:30:04] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[05:30:04] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[05:30:04] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[05:30:04] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[05:30:04] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[05:30:04] [PASSED] DP_REMOTE_I2C_READ with port number
[05:30:04] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[05:30:04] [PASSED] DP_REMOTE_I2C_READ with transactions array
[05:30:04] [PASSED] DP_REMOTE_I2C_WRITE with port number
[05:30:04] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[05:30:04] [PASSED] DP_REMOTE_I2C_WRITE with data array
[05:30:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[05:30:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[05:30:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[05:30:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[05:30:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[05:30:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[05:30:04] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[05:30:04] ================ [PASSED] drm_dp_mst_helper ================
[05:30:04] ================== drm_exec (7 subtests) ===================
[05:30:04] [PASSED] sanitycheck
[05:30:04] [PASSED] test_lock
[05:30:04] [PASSED] test_lock_unlock
[05:30:04] [PASSED] test_duplicates
[05:30:04] [PASSED] test_prepare
[05:30:04] [PASSED] test_prepare_array
[05:30:04] [PASSED] test_multiple_loops
[05:30:04] ==================== [PASSED] drm_exec =====================
[05:30:04] =========== drm_format_helper_test (17 subtests) ===========
[05:30:04] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[05:30:04] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[05:30:04] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[05:30:04] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[05:30:04] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[05:30:04] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[05:30:04] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[05:30:04] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[05:30:04] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[05:30:04] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[05:30:04] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[05:30:04] ============== drm_test_fb_xrgb8888_to_mono  ===============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[05:30:04] ==================== drm_test_fb_swab  =====================
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ================ [PASSED] drm_test_fb_swab =================
[05:30:04] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[05:30:04] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[05:30:04] [PASSED] single_pixel_source_buffer
[05:30:04] [PASSED] single_pixel_clip_rectangle
[05:30:04] [PASSED] well_known_colors
[05:30:04] [PASSED] destination_pitch
[05:30:04] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[05:30:04] ================= drm_test_fb_clip_offset  =================
[05:30:04] [PASSED] pass through
[05:30:04] [PASSED] horizontal offset
[05:30:04] [PASSED] vertical offset
[05:30:04] [PASSED] horizontal and vertical offset
[05:30:04] [PASSED] horizontal offset (custom pitch)
[05:30:04] [PASSED] vertical offset (custom pitch)
[05:30:04] [PASSED] horizontal and vertical offset (custom pitch)
[05:30:04] ============= [PASSED] drm_test_fb_clip_offset =============
[05:30:04] =================== drm_test_fb_memcpy  ====================
[05:30:04] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[05:30:04] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[05:30:04] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[05:30:04] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[05:30:04] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[05:30:04] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[05:30:04] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[05:30:04] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[05:30:04] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[05:30:04] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[05:30:04] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[05:30:04] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[05:30:04] =============== [PASSED] drm_test_fb_memcpy ================
[05:30:04] ============= [PASSED] drm_format_helper_test ==============
[05:30:04] ================= drm_format (18 subtests) =================
[05:30:04] [PASSED] drm_test_format_block_width_invalid
[05:30:04] [PASSED] drm_test_format_block_width_one_plane
[05:30:04] [PASSED] drm_test_format_block_width_two_plane
[05:30:04] [PASSED] drm_test_format_block_width_three_plane
[05:30:04] [PASSED] drm_test_format_block_width_tiled
[05:30:04] [PASSED] drm_test_format_block_height_invalid
[05:30:04] [PASSED] drm_test_format_block_height_one_plane
[05:30:04] [PASSED] drm_test_format_block_height_two_plane
[05:30:04] [PASSED] drm_test_format_block_height_three_plane
[05:30:04] [PASSED] drm_test_format_block_height_tiled
[05:30:04] [PASSED] drm_test_format_min_pitch_invalid
[05:30:04] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[05:30:04] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[05:30:04] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[05:30:04] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[05:30:04] [PASSED] drm_test_format_min_pitch_two_plane
[05:30:04] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[05:30:04] [PASSED] drm_test_format_min_pitch_tiled
[05:30:04] =================== [PASSED] drm_format ====================
[05:30:04] ============== drm_framebuffer (10 subtests) ===============
[05:30:04] ========== drm_test_framebuffer_check_src_coords  ==========
[05:30:04] [PASSED] Success: source fits into fb
[05:30:04] [PASSED] Fail: overflowing fb with x-axis coordinate
[05:30:04] [PASSED] Fail: overflowing fb with y-axis coordinate
[05:30:04] [PASSED] Fail: overflowing fb with source width
[05:30:04] [PASSED] Fail: overflowing fb with source height
[05:30:04] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[05:30:04] [PASSED] drm_test_framebuffer_cleanup
[05:30:04] =============== drm_test_framebuffer_create  ===============
[05:30:04] [PASSED] ABGR8888 normal sizes
[05:30:04] [PASSED] ABGR8888 max sizes
[05:30:04] [PASSED] ABGR8888 pitch greater than min required
[05:30:04] [PASSED] ABGR8888 pitch less than min required
[05:30:04] [PASSED] ABGR8888 Invalid width
[05:30:04] [PASSED] ABGR8888 Invalid buffer handle
[05:30:04] [PASSED] No pixel format
[05:30:04] [PASSED] ABGR8888 Width 0
[05:30:04] [PASSED] ABGR8888 Height 0
[05:30:04] [PASSED] ABGR8888 Out of bound height * pitch combination
[05:30:04] [PASSED] ABGR8888 Large buffer offset
[05:30:04] [PASSED] ABGR8888 Buffer offset for inexistent plane
[05:30:04] [PASSED] ABGR8888 Invalid flag
[05:30:04] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[05:30:04] [PASSED] ABGR8888 Valid buffer modifier
[05:30:04] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[05:30:04] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[05:30:04] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[05:30:04] [PASSED] NV12 Normal sizes
[05:30:04] [PASSED] NV12 Max sizes
[05:30:04] [PASSED] NV12 Invalid pitch
[05:30:04] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[05:30:04] [PASSED] NV12 different  modifier per-plane
[05:30:04] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[05:30:04] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[05:30:04] [PASSED] NV12 Modifier for inexistent plane
[05:30:04] [PASSED] NV12 Handle for inexistent plane
[05:30:04] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[05:30:04] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[05:30:04] [PASSED] YVU420 Normal sizes
[05:30:04] [PASSED] YVU420 Max sizes
[05:30:04] [PASSED] YVU420 Invalid pitch
[05:30:04] [PASSED] YVU420 Different pitches
[05:30:04] [PASSED] YVU420 Different buffer offsets/pitches
[05:30:04] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[05:30:04] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[05:30:04] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[05:30:04] [PASSED] YVU420 Valid modifier
[05:30:04] [PASSED] YVU420 Different modifiers per plane
[05:30:04] [PASSED] YVU420 Modifier for inexistent plane
[05:30:04] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[05:30:04] [PASSED] X0L2 Normal sizes
[05:30:04] [PASSED] X0L2 Max sizes
[05:30:04] [PASSED] X0L2 Invalid pitch
[05:30:04] [PASSED] X0L2 Pitch greater than minimum required
[05:30:04] [PASSED] X0L2 Handle for inexistent plane
[05:30:04] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[05:30:04] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[05:30:04] [PASSED] X0L2 Valid modifier
[05:30:04] [PASSED] X0L2 Modifier for inexistent plane
[05:30:04] =========== [PASSED] drm_test_framebuffer_create ===========
[05:30:04] [PASSED] drm_test_framebuffer_free
[05:30:04] [PASSED] drm_test_framebuffer_init
[05:30:04] [PASSED] drm_test_framebuffer_init_bad_format
[05:30:04] [PASSED] drm_test_framebuffer_init_dev_mismatch
[05:30:04] [PASSED] drm_test_framebuffer_lookup
[05:30:04] [PASSED] drm_test_framebuffer_lookup_inexistent
[05:30:04] [PASSED] drm_test_framebuffer_modifiers_not_supported
[05:30:04] ================= [PASSED] drm_framebuffer =================
[05:30:04] ================ drm_gem_shmem (8 subtests) ================
[05:30:04] [PASSED] drm_gem_shmem_test_obj_create
[05:30:04] [PASSED] drm_gem_shmem_test_obj_create_private
[05:30:04] [PASSED] drm_gem_shmem_test_pin_pages
[05:30:04] [PASSED] drm_gem_shmem_test_vmap
[05:30:04] [PASSED] drm_gem_shmem_test_get_sg_table
[05:30:04] [PASSED] drm_gem_shmem_test_get_pages_sgt
[05:30:04] [PASSED] drm_gem_shmem_test_madvise
[05:30:04] [PASSED] drm_gem_shmem_test_purge
[05:30:04] ================== [PASSED] drm_gem_shmem ==================
[05:30:04] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[05:30:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[05:30:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[05:30:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[05:30:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[05:30:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[05:30:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[05:30:04] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[05:30:04] [PASSED] Automatic
[05:30:04] [PASSED] Full
[05:30:04] [PASSED] Limited 16:235
[05:30:04] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[05:30:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[05:30:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[05:30:04] [PASSED] drm_test_check_disable_connector
[05:30:04] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[05:30:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[05:30:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[05:30:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[05:30:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[05:30:04] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[05:30:04] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[05:30:04] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[05:30:04] [PASSED] drm_test_check_output_bpc_dvi
[05:30:04] [PASSED] drm_test_check_output_bpc_format_vic_1
[05:30:04] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[05:30:04] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[05:30:04] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[05:30:04] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[05:30:04] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[05:30:04] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[05:30:04] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[05:30:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[05:30:04] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[05:30:04] [PASSED] drm_test_check_broadcast_rgb_value
[05:30:04] [PASSED] drm_test_check_bpc_8_value
[05:30:04] [PASSED] drm_test_check_bpc_10_value
[05:30:04] [PASSED] drm_test_check_bpc_12_value
[05:30:04] [PASSED] drm_test_check_format_value
[05:30:04] [PASSED] drm_test_check_tmds_char_value
[05:30:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[05:30:04] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[05:30:04] [PASSED] drm_test_check_mode_valid
[05:30:04] [PASSED] drm_test_check_mode_valid_reject
[05:30:04] [PASSED] drm_test_check_mode_valid_reject_rate
[05:30:04] [PASSED] drm_test_check_mode_valid_reject_max_clock
[05:30:04] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[05:30:04] ================= drm_managed (2 subtests) =================
[05:30:04] [PASSED] drm_test_managed_release_action
[05:30:04] [PASSED] drm_test_managed_run_action
[05:30:04] =================== [PASSED] drm_managed ===================
[05:30:04] =================== drm_mm (6 subtests) ====================
[05:30:04] [PASSED] drm_test_mm_init
[05:30:04] [PASSED] drm_test_mm_debug
[05:30:04] [PASSED] drm_test_mm_align32
[05:30:04] [PASSED] drm_test_mm_align64
[05:30:04] [PASSED] drm_test_mm_lowest
[05:30:04] [PASSED] drm_test_mm_highest
[05:30:04] ===================== [PASSED] drm_mm ======================
[05:30:04] ============= drm_modes_analog_tv (5 subtests) =============
[05:30:04] [PASSED] drm_test_modes_analog_tv_mono_576i
[05:30:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[05:30:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[05:30:04] [PASSED] drm_test_modes_analog_tv_pal_576i
[05:30:04] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[05:30:04] =============== [PASSED] drm_modes_analog_tv ===============
[05:30:04] ============== drm_plane_helper (2 subtests) ===============
[05:30:04] =============== drm_test_check_plane_state  ================
[05:30:04] [PASSED] clipping_simple
[05:30:04] [PASSED] clipping_rotate_reflect
[05:30:04] [PASSED] positioning_simple
[05:30:04] [PASSED] upscaling
[05:30:04] [PASSED] downscaling
[05:30:04] [PASSED] rounding1
[05:30:04] [PASSED] rounding2
[05:30:04] [PASSED] rounding3
[05:30:04] [PASSED] rounding4
[05:30:04] =========== [PASSED] drm_test_check_plane_state ============
[05:30:04] =========== drm_test_check_invalid_plane_state  ============
[05:30:04] [PASSED] positioning_invalid
[05:30:04] [PASSED] upscaling_invalid
[05:30:04] [PASSED] downscaling_invalid
[05:30:04] ======= [PASSED] drm_test_check_invalid_plane_state ========
[05:30:04] ================ [PASSED] drm_plane_helper =================
[05:30:04] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[05:30:04] ====== drm_test_connector_helper_tv_get_modes_check  =======
[05:30:04] [PASSED] None
[05:30:04] [PASSED] PAL
[05:30:04] [PASSED] NTSC
[05:30:04] [PASSED] Both, NTSC Default
[05:30:04] [PASSED] Both, PAL Default
[05:30:04] [PASSED] Both, NTSC Default, with PAL on command-line
[05:30:04] [PASSED] Both, PAL Default, with NTSC on command-line
[05:30:04] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[05:30:04] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[05:30:04] ================== drm_rect (9 subtests) ===================
[05:30:04] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[05:30:04] [PASSED] drm_test_rect_clip_scaled_not_clipped
[05:30:04] [PASSED] drm_test_rect_clip_scaled_clipped
[05:30:04] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[05:30:04] ================= drm_test_rect_intersect  =================
[05:30:04] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[05:30:04] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[05:30:04] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[05:30:04] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[05:30:04] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[05:30:04] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[05:30:04] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[05:30:04] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[05:30:04] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[05:30:04] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[05:30:04] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[05:30:04] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[05:30:04] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[05:30:04] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[05:30:04] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[05:30:04] ============= [PASSED] drm_test_rect_intersect =============
[05:30:04] ================ drm_test_rect_calc_hscale  ================
[05:30:04] [PASSED] normal use
[05:30:04] [PASSED] out of max range
[05:30:04] [PASSED] out of min range
[05:30:04] [PASSED] zero dst
[05:30:04] [PASSED] negative src
[05:30:04] [PASSED] negative dst
[05:30:04] ============ [PASSED] drm_test_rect_calc_hscale ============
[05:30:04] ================ drm_test_rect_calc_vscale  ================
[05:30:04] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[05:30:04] [PASSED] out of max range
[05:30:04] [PASSED] out of min range
[05:30:04] [PASSED] zero dst
[05:30:04] [PASSED] negative src
[05:30:04] [PASSED] negative dst
[05:30:04] ============ [PASSED] drm_test_rect_calc_vscale ============
[05:30:04] ================== drm_test_rect_rotate  ===================
[05:30:04] [PASSED] reflect-x
[05:30:04] [PASSED] reflect-y
[05:30:04] [PASSED] rotate-0
[05:30:04] [PASSED] rotate-90
[05:30:04] [PASSED] rotate-180
[05:30:04] [PASSED] rotate-270
[05:30:04] ============== [PASSED] drm_test_rect_rotate ===============
[05:30:04] ================ drm_test_rect_rotate_inv  =================
[05:30:04] [PASSED] reflect-x
[05:30:04] [PASSED] reflect-y
[05:30:04] [PASSED] rotate-0
[05:30:04] [PASSED] rotate-90
[05:30:04] [PASSED] rotate-180
[05:30:04] [PASSED] rotate-270
[05:30:04] ============ [PASSED] drm_test_rect_rotate_inv =============
[05:30:04] ==================== [PASSED] drm_rect =====================
[05:30:04] ============ drm_sysfb_modeset_test (1 subtest) ============
[05:30:04] ============ drm_test_sysfb_build_fourcc_list  =============
[05:30:04] [PASSED] no native formats
[05:30:04] [PASSED] XRGB8888 as native format
[05:30:04] [PASSED] remove duplicates
[05:30:04] [PASSED] convert alpha formats
[05:30:04] [PASSED] random formats
[05:30:04] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[05:30:04] ============= [PASSED] drm_sysfb_modeset_test ==============
[05:30:04] ================== drm_fixp (2 subtests) ===================
[05:30:04] [PASSED] drm_test_int2fixp
[05:30:04] [PASSED] drm_test_sm2fixp
[05:30:04] ==================== [PASSED] drm_fixp =====================
[05:30:04] ============================================================
[05:30:04] Testing complete. Ran 624 tests: passed: 624
[05:30:04] Elapsed time: 27.287s total, 1.675s configuring, 25.193s building, 0.380s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[05:30:04] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[05:30:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[05:30:15] Starting KUnit Kernel (1/1)...
[05:30:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[05:30:15] ================= ttm_device (5 subtests) ==================
[05:30:15] [PASSED] ttm_device_init_basic
[05:30:15] [PASSED] ttm_device_init_multiple
[05:30:15] [PASSED] ttm_device_fini_basic
[05:30:15] [PASSED] ttm_device_init_no_vma_man
[05:30:15] ================== ttm_device_init_pools  ==================
[05:30:15] [PASSED] No DMA allocations, no DMA32 required
[05:30:15] [PASSED] DMA allocations, DMA32 required
[05:30:15] [PASSED] No DMA allocations, DMA32 required
[05:30:15] [PASSED] DMA allocations, no DMA32 required
[05:30:15] ============== [PASSED] ttm_device_init_pools ==============
[05:30:15] =================== [PASSED] ttm_device ====================
[05:30:15] ================== ttm_pool (8 subtests) ===================
[05:30:15] ================== ttm_pool_alloc_basic  ===================
[05:30:15] [PASSED] One page
[05:30:15] [PASSED] More than one page
[05:30:15] [PASSED] Above the allocation limit
[05:30:15] [PASSED] One page, with coherent DMA mappings enabled
[05:30:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:30:15] ============== [PASSED] ttm_pool_alloc_basic ===============
[05:30:15] ============== ttm_pool_alloc_basic_dma_addr  ==============
[05:30:15] [PASSED] One page
[05:30:15] [PASSED] More than one page
[05:30:15] [PASSED] Above the allocation limit
[05:30:15] [PASSED] One page, with coherent DMA mappings enabled
[05:30:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[05:30:15] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[05:30:15] [PASSED] ttm_pool_alloc_order_caching_match
[05:30:15] [PASSED] ttm_pool_alloc_caching_mismatch
[05:30:15] [PASSED] ttm_pool_alloc_order_mismatch
[05:30:15] [PASSED] ttm_pool_free_dma_alloc
[05:30:15] [PASSED] ttm_pool_free_no_dma_alloc
[05:30:15] [PASSED] ttm_pool_fini_basic
[05:30:15] ==================== [PASSED] ttm_pool =====================
[05:30:15] ================ ttm_resource (8 subtests) =================
[05:30:15] ================= ttm_resource_init_basic  =================
[05:30:15] [PASSED] Init resource in TTM_PL_SYSTEM
[05:30:15] [PASSED] Init resource in TTM_PL_VRAM
[05:30:15] [PASSED] Init resource in a private placement
[05:30:15] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[05:30:15] ============= [PASSED] ttm_resource_init_basic =============
[05:30:15] [PASSED] ttm_resource_init_pinned
[05:30:15] [PASSED] ttm_resource_fini_basic
[05:30:15] [PASSED] ttm_resource_manager_init_basic
[05:30:15] [PASSED] ttm_resource_manager_usage_basic
[05:30:15] [PASSED] ttm_resource_manager_set_used_basic
[05:30:15] [PASSED] ttm_sys_man_alloc_basic
[05:30:15] [PASSED] ttm_sys_man_free_basic
[05:30:15] ================== [PASSED] ttm_resource ===================
[05:30:15] =================== ttm_tt (15 subtests) ===================
[05:30:15] ==================== ttm_tt_init_basic  ====================
[05:30:15] [PASSED] Page-aligned size
[05:30:15] [PASSED] Extra pages requested
[05:30:15] ================ [PASSED] ttm_tt_init_basic ================
[05:30:15] [PASSED] ttm_tt_init_misaligned
[05:30:15] [PASSED] ttm_tt_fini_basic
[05:30:15] [PASSED] ttm_tt_fini_sg
[05:30:15] [PASSED] ttm_tt_fini_shmem
[05:30:15] [PASSED] ttm_tt_create_basic
[05:30:15] [PASSED] ttm_tt_create_invalid_bo_type
[05:30:15] [PASSED] ttm_tt_create_ttm_exists
[05:30:15] [PASSED] ttm_tt_create_failed
[05:30:15] [PASSED] ttm_tt_destroy_basic
[05:30:15] [PASSED] ttm_tt_populate_null_ttm
[05:30:15] [PASSED] ttm_tt_populate_populated_ttm
[05:30:15] [PASSED] ttm_tt_unpopulate_basic
[05:30:15] [PASSED] ttm_tt_unpopulate_empty_ttm
[05:30:15] [PASSED] ttm_tt_swapin_basic
[05:30:15] ===================== [PASSED] ttm_tt ======================
[05:30:15] =================== ttm_bo (14 subtests) ===================
[05:30:15] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[05:30:15] [PASSED] Cannot be interrupted and sleeps
[05:30:15] [PASSED] Cannot be interrupted, locks straight away
[05:30:15] [PASSED] Can be interrupted, sleeps
[05:30:15] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[05:30:15] [PASSED] ttm_bo_reserve_locked_no_sleep
[05:30:15] [PASSED] ttm_bo_reserve_no_wait_ticket
[05:30:15] [PASSED] ttm_bo_reserve_double_resv
[05:30:15] [PASSED] ttm_bo_reserve_interrupted
[05:30:15] [PASSED] ttm_bo_reserve_deadlock
[05:30:15] [PASSED] ttm_bo_unreserve_basic
[05:30:15] [PASSED] ttm_bo_unreserve_pinned
[05:30:15] [PASSED] ttm_bo_unreserve_bulk
[05:30:15] [PASSED] ttm_bo_fini_basic
[05:30:15] [PASSED] ttm_bo_fini_shared_resv
[05:30:15] [PASSED] ttm_bo_pin_basic
[05:30:15] [PASSED] ttm_bo_pin_unpin_resource
[05:30:15] [PASSED] ttm_bo_multiple_pin_one_unpin
[05:30:15] ===================== [PASSED] ttm_bo ======================
[05:30:15] ============== ttm_bo_validate (21 subtests) ===============
[05:30:15] ============== ttm_bo_init_reserved_sys_man  ===============
[05:30:15] [PASSED] Buffer object for userspace
[05:30:15] [PASSED] Kernel buffer object
[05:30:15] [PASSED] Shared buffer object
[05:30:15] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[05:30:15] ============== ttm_bo_init_reserved_mock_man  ==============
[05:30:15] [PASSED] Buffer object for userspace
[05:30:15] [PASSED] Kernel buffer object
[05:30:15] [PASSED] Shared buffer object
[05:30:15] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[05:30:15] [PASSED] ttm_bo_init_reserved_resv
[05:30:15] ================== ttm_bo_validate_basic  ==================
[05:30:15] [PASSED] Buffer object for userspace
[05:30:15] [PASSED] Kernel buffer object
[05:30:15] [PASSED] Shared buffer object
[05:30:15] ============== [PASSED] ttm_bo_validate_basic ==============
[05:30:15] [PASSED] ttm_bo_validate_invalid_placement
[05:30:15] ============= ttm_bo_validate_same_placement  ==============
[05:30:15] [PASSED] System manager
[05:30:15] [PASSED] VRAM manager
[05:30:15] ========= [PASSED] ttm_bo_validate_same_placement ==========
[05:30:15] [PASSED] ttm_bo_validate_failed_alloc
[05:30:15] [PASSED] ttm_bo_validate_pinned
[05:30:15] [PASSED] ttm_bo_validate_busy_placement
[05:30:15] ================ ttm_bo_validate_multihop  =================
[05:30:15] [PASSED] Buffer object for userspace
[05:30:15] [PASSED] Kernel buffer object
[05:30:15] [PASSED] Shared buffer object
[05:30:15] ============ [PASSED] ttm_bo_validate_multihop =============
[05:30:15] ========== ttm_bo_validate_no_placement_signaled  ==========
[05:30:15] [PASSED] Buffer object in system domain, no page vector
[05:30:15] [PASSED] Buffer object in system domain with an existing page vector
[05:30:15] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[05:30:15] ======== ttm_bo_validate_no_placement_not_signaled  ========
[05:30:15] [PASSED] Buffer object for userspace
[05:30:15] [PASSED] Kernel buffer object
[05:30:15] [PASSED] Shared buffer object
[05:30:15] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[05:30:15] [PASSED] ttm_bo_validate_move_fence_signaled
[05:30:15] ========= ttm_bo_validate_move_fence_not_signaled  =========
[05:30:15] [PASSED] Waits for GPU
[05:30:15] [PASSED] Tries to lock straight away
[05:30:15] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[05:30:15] [PASSED] ttm_bo_validate_happy_evict
[05:30:15] [PASSED] ttm_bo_validate_all_pinned_evict
[05:30:15] [PASSED] ttm_bo_validate_allowed_only_evict
[05:30:15] [PASSED] ttm_bo_validate_deleted_evict
[05:30:15] [PASSED] ttm_bo_validate_busy_domain_evict
[05:30:15] [PASSED] ttm_bo_validate_evict_gutting
[05:30:15] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[05:30:15] ================= [PASSED] ttm_bo_validate =================
[05:30:15] ============================================================
[05:30:15] Testing complete. Ran 101 tests: passed: 101
[05:30:15] Elapsed time: 11.303s total, 1.588s configuring, 9.449s building, 0.224s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for series starting with [1/3] drm/i915/ltphy: Remove state verification for LT PHY fields

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1991 bytes --]

== Series Details ==

Series: series starting with [1/3] drm/i915/ltphy: Remove state verification for LT PHY fields
URL   : https://patchwork.freedesktop.org/series/159564/
State : success

== Summary ==

CI Bug Log - changes from xe-4317-73f2233b9ba9be17e8918635183ff618277417ec_BAT -> xe-pw-159564v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-159564v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [PASS][1] -> [FAIL][2] ([Intel XE#6519])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4317-73f2233b9ba9be17e8918635183ff618277417ec/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/bat-dg2-oem2/igt@xe_waitfence@engine.html

  
#### Possible fixes ####

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [FAIL][3] ([Intel XE#6520]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4317-73f2233b9ba9be17e8918635183ff618277417ec/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520


Build changes
-------------

  * Linux: xe-4317-73f2233b9ba9be17e8918635183ff618277417ec -> xe-pw-159564v1

  IGT_8681: c49f35440873244aa86e778007ed2dcbe5bf0ecb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4317-73f2233b9ba9be17e8918635183ff618277417ec: 73f2233b9ba9be17e8918635183ff618277417ec
  xe-pw-159564v1: 159564v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/index.html

[-- Attachment #2: Type: text/html, Size: 2578 bytes --]

✓ Xe.CI.Full: success for series starting with [1/3] drm/i915/ltphy: Remove state verification for LT PHY fields

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 21369 bytes --]

== Series Details ==

Series: series starting with [1/3] drm/i915/ltphy: Remove state verification for LT PHY fields
URL   : https://patchwork.freedesktop.org/series/159564/
State : success

== Summary ==

CI Bug Log - changes from xe-4317-73f2233b9ba9be17e8918635183ff618277417ec_FULL -> xe-pw-159564v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-159564v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2233])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][2] ([Intel XE#2327]) +1 other test skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#1124]) +12 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#610])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-2-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#367]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#3432])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2887]) +12 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2325]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_edid@dp-edid-resolution-list:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2252]) +12 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_chamelium_edid@dp-edid-resolution-list.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          NOTRUN -> [FAIL][11] ([Intel XE#1178]) +1 other test fail
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-10/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2341]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@kms_content_protection@lic-type-1.html

  * igt@kms_cursor_crc@cursor-offscreen-128x42:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2320]) +4 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-128x42.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2321])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2286])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dsc@dsc-with-bpc-formats:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2244]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_dsc@dsc-with-bpc-formats.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#4422])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_feature_discovery@psr1:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2374])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2293]) +3 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2380]) +1 other test skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2311]) +29 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#4141]) +9 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2352]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2313]) +27 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-bmg:          [PASS][26] -> [ABORT][27] ([Intel XE#6740]) +1 other test abort
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4317-73f2233b9ba9be17e8918635183ff618277417ec/shard-bmg-2/igt@kms_hdr@invalid-metadata-sizes.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-9/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#6901])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2925])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_panel_fitting@atomic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2486])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_panel_fitting@atomic-fastset.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#5021])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#6886]) +4 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html

  * igt@kms_pm_backlight@fade:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#870])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-10/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2391])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#2499])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#1406] / [Intel XE#1489]) +6 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#1406] / [Intel XE#2387])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +12 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_psr@fbc-psr-dpms.html

  * igt@kms_psr@psr2-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#1406] / [Intel XE#2234])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-10/igt@kms_psr@psr2-primary-render.html

  * igt@kms_rotation_crc@bad-pixel-format:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_rotation_crc@bad-pixel-format.html

  * igt@kms_sharpness_filter@filter-basic:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#6503]) +2 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_sharpness_filter@filter-basic.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#2509])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#1499])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@xe_eudebug@vma-ufence:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#4837]) +7 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@xe_eudebug@vma-ufence.html

  * igt@xe_eudebug_online@pagefault-write:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#4837] / [Intel XE#6665]) +5 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@xe_eudebug_online@pagefault-write.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2322]) +8 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue.html

  * igt@xe_exec_multi_queue@two-queues-basic-smem:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#6874]) +27 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@xe_exec_multi_queue@two-queues-basic-smem.html

  * igt@xe_exec_system_allocator@many-64k-mmap-free-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#5007]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@xe_exec_system_allocator@many-64k-mmap-free-huge-nomemset.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
    - shard-lnl:          [PASS][49] -> [FAIL][50] ([Intel XE#5625])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4317-73f2233b9ba9be17e8918635183ff618277417ec/shard-lnl-8/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-lnl-7/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html

  * igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-new-huge:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#4943]) +27 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-new-huge.html

  * igt@xe_pat@pat-index-xelpg:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2236])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-10/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_pm@d3cold-mmap-vram:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#2284])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@xe_pm@d3cold-mmap-vram.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#4733]) +2 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_query@multigpu-query-topology-l3-bank-mask:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#944]) +2 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@xe_query@multigpu-query-topology-l3-bank-mask.html

  * igt@xe_sriov_vram@vf-access-after-resize-up:
    - shard-bmg:          NOTRUN -> [FAIL][56] ([Intel XE#5937])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-1/igt@xe_sriov_vram@vf-access-after-resize-up.html

  
#### Possible fixes ####

  * igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2:
    - shard-bmg:          [ABORT][57] ([Intel XE#6740]) -> [PASS][58] +3 other tests pass
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4317-73f2233b9ba9be17e8918635183ff618277417ec/shard-bmg-9/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-2/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][59] ([Intel XE#6321]) -> [PASS][60] +1 other test pass
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4317-73f2233b9ba9be17e8918635183ff618277417ec/shard-bmg-8/igt@xe_evict@evict-mixed-many-threads-small.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-10/igt@xe_evict@evict-mixed-many-threads-small.html

  
#### Warnings ####

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][61] ([Intel XE#2426]) -> [FAIL][62] ([Intel XE#1729])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4317-73f2233b9ba9be17e8918635183ff618277417ec/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#5937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5937
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4317-73f2233b9ba9be17e8918635183ff618277417ec -> xe-pw-159564v1

  IGT_8681: c49f35440873244aa86e778007ed2dcbe5bf0ecb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4317-73f2233b9ba9be17e8918635183ff618277417ec: 73f2233b9ba9be17e8918635183ff618277417ec
  xe-pw-159564v1: 159564v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159564v1/index.html

[-- Attachment #2: Type: text/html, Size: 23730 bytes --]

Re: [PATCH 1/3] drm/i915/ltphy: Remove state verification for LT PHY fields

[Nautiyal, Ankit K]

On 12/31/2025 10:53 AM, Suraj Kandpal wrote:
> Remove LT PHY State verification for all VDR register fields other
> than VDR0_CONFIG and VDR2_CONFIG since those are the only reliable

Nit pick:

I think shorter sentence will be easier to comprehend. Let the sentence 
end after VDR2_CONFIG:

`than VDR0_CONFIG and VDR2_CONFIG. VDR0_CONFIG and VDR2_CONFIG are the 
only reliable`

> shadow register that hold on to its value in case there is PSR/PR

Nit pick:

shadow registers that hold on to their values even with the PSR/PR features


> which can cause power gating internally of the PHY.

Hmm.. it seems that there are few things implicit in the message.

I guess it would be easier if we mention the current practice first, 
followed by the problem faced with the current practice.

After that the solution of only comparing the VDR{0,2}_CONFIG can be 
explained.

but that is my personal opinion.

>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>


With the commit message improved:

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_lt_phy.c | 30 +++++----------------
>   1 file changed, 7 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> index 939c8975fd4c..9501ac861712 100644
> --- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
> @@ -2259,8 +2259,6 @@ void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
>   	struct intel_encoder *encoder;
>   	struct intel_lt_phy_pll_state pll_hw_state = {};
>   	const struct intel_lt_phy_pll_state *pll_sw_state = &new_crtc_state->dpll_hw_state.ltpll;
> -	int clock;
> -	int i, j;
>   
>   	if (DISPLAY_VER(display) < 35)
>   		return;
> @@ -2275,33 +2273,19 @@ void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
>   
>   	encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
>   	intel_lt_phy_pll_readout_hw_state(encoder, new_crtc_state, &pll_hw_state);
> -	clock = intel_lt_phy_calc_port_clock(encoder, new_crtc_state);
>   
>   	dig_port = enc_to_dig_port(encoder);
>   	if (intel_tc_port_in_tbt_alt_mode(dig_port))
>   		return;
>   
> -	INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.clock != clock,
> -				 "[CRTC:%d:%s] mismatch in LT PHY: Register CLOCK (expected %d, found %d)",
> +	INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[0] != pll_sw_state->config[0],
> +				 "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG 0: (expected 0x%04x, found 0x%04x)",
>   				 crtc->base.base.id, crtc->base.name,
> -				 pll_sw_state->clock, pll_hw_state.clock);
> -
> -	for (i = 0; i < 3; i++) {
> -		INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[i] != pll_sw_state->config[i],
> -					 "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG%d: (expected 0x%04x, found 0x%04x)",
> -					 crtc->base.base.id, crtc->base.name, i,
> -					 pll_sw_state->config[i], pll_hw_state.config[i]);
> -	}
> -
> -	for (i = 0; i <= 12; i++) {
> -		for (j = 3; j >= 0; j--)
> -			INTEL_DISPLAY_STATE_WARN(display,
> -						 pll_hw_state.data[i][j] !=
> -						 pll_sw_state->data[i][j],
> -						 "[CRTC:%d:%s] mismatch in LT PHY PLL DATA[%d][%d]: (expected 0x%04x, found 0x%04x)",
> -						 crtc->base.base.id, crtc->base.name, i, j,
> -						 pll_sw_state->data[i][j], pll_hw_state.data[i][j]);
> -	}
> +				 pll_sw_state->config[0], pll_hw_state.config[0]);
> +	INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[2] != pll_sw_state->config[2],
> +				 "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG 2: (expected 0x%04x, found 0x%04x)",
> +				 crtc->base.base.id, crtc->base.name,
> +				 pll_sw_state->config[2], pll_hw_state.config[2]);
>   }
>   
>   void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,

[PATCH v2 1/3] drm/i915/ltphy: Remove state verification for LT PHY fields

[Suraj Kandpal]

Currently we do state verification for all VDR Registers.
Remove LT PHY State verification for all VDR register fields other
than VDR0_CONFIG and VDR2_CONFIG. The reason being that VDR0_CONFIG
and VDR2_CONFIG are the only reliable shadow register which hold onto
their values over the course of power gatings which happen internally
due to features like PSR/PR.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lt_phy.c | 30 +++++----------------
 1 file changed, 7 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index 939c8975fd4c..9501ac861712 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -2259,8 +2259,6 @@ void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
 	struct intel_encoder *encoder;
 	struct intel_lt_phy_pll_state pll_hw_state = {};
 	const struct intel_lt_phy_pll_state *pll_sw_state = &new_crtc_state->dpll_hw_state.ltpll;
-	int clock;
-	int i, j;
 
 	if (DISPLAY_VER(display) < 35)
 		return;
@@ -2275,33 +2273,19 @@ void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state,
 
 	encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
 	intel_lt_phy_pll_readout_hw_state(encoder, new_crtc_state, &pll_hw_state);
-	clock = intel_lt_phy_calc_port_clock(encoder, new_crtc_state);
 
 	dig_port = enc_to_dig_port(encoder);
 	if (intel_tc_port_in_tbt_alt_mode(dig_port))
 		return;
 
-	INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.clock != clock,
-				 "[CRTC:%d:%s] mismatch in LT PHY: Register CLOCK (expected %d, found %d)",
+	INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[0] != pll_sw_state->config[0],
+				 "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG 0: (expected 0x%04x, found 0x%04x)",
 				 crtc->base.base.id, crtc->base.name,
-				 pll_sw_state->clock, pll_hw_state.clock);
-
-	for (i = 0; i < 3; i++) {
-		INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[i] != pll_sw_state->config[i],
-					 "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG%d: (expected 0x%04x, found 0x%04x)",
-					 crtc->base.base.id, crtc->base.name, i,
-					 pll_sw_state->config[i], pll_hw_state.config[i]);
-	}
-
-	for (i = 0; i <= 12; i++) {
-		for (j = 3; j >= 0; j--)
-			INTEL_DISPLAY_STATE_WARN(display,
-						 pll_hw_state.data[i][j] !=
-						 pll_sw_state->data[i][j],
-						 "[CRTC:%d:%s] mismatch in LT PHY PLL DATA[%d][%d]: (expected 0x%04x, found 0x%04x)",
-						 crtc->base.base.id, crtc->base.name, i, j,
-						 pll_sw_state->data[i][j], pll_hw_state.data[i][j]);
-	}
+				 pll_sw_state->config[0], pll_hw_state.config[0]);
+	INTEL_DISPLAY_STATE_WARN(display, pll_hw_state.config[2] != pll_sw_state->config[2],
+				 "[CRTC:%d:%s] mismatch in LT PHY PLL CONFIG 2: (expected 0x%04x, found 0x%04x)",
+				 crtc->base.base.id, crtc->base.name,
+				 pll_sw_state->config[2], pll_hw_state.config[2]);
 }
 
 void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
-- 
2.34.1

[PATCH v2 2/3] drm/i915/ltphy: Compare only certain fields in state verify function

[Suraj Kandpal]

Verify only the config[0,2] fields in the LT PHY state since these
are the only reliable values we can get back when we read the VDR
registers. The reason being that the state does not persist for other
VDR registers when power gating comes into picture.
Though not ideal this change does not hit us badly in perspective of how
we use the compare function to decide if fastset is required or if we
wrote the state correctly. VDR0_CONFIG and VDR1_CONFIG hold the values
that indicate the PLL operating mode and link rate which is usually
what we need to check if something has changed or not.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lt_phy.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index 9501ac861712..9addb7661b6b 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -2207,13 +2207,18 @@ bool
 intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a,
 				  const struct intel_lt_phy_pll_state *b)
 {
-	if (memcmp(&a->config, &b->config, sizeof(a->config)) != 0)
-		return false;
-
-	if (memcmp(&a->data, &b->data, sizeof(a->data)) != 0)
-		return false;
+	/*
+	 * With LT PHY values other than VDR0_CONFIG and VDR2_CONFIG are
+	 * unreliable. They cannot always be read back since internally
+	 * after power gating values are not restored back to the
+	 * shadow VDR registers. Thus we do not compare the whole state
+	 * just the two VDR registers.
+	 */
+	if (a->config[0] == b->config[0] &&
+	    a->config[2] == b->config[2])
+		return true;
 
-	return true;
+	return false;
 }
 
 void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder,
-- 
2.34.1

[PATCH v2 3/3] drm/i915/ltphy: Provide protection against unsupported modes

[Suraj Kandpal]

We need to make sure we return some port clock in case we have
unsupported LT PHY modes or if we were not able to read the LT PHY state
for whatever reason and the mode ends up being 0.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_lt_phy.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index 9addb7661b6b..6cdae03ee172 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -31,6 +31,7 @@
 #define INTEL_LT_PHY_BOTH_LANES		(INTEL_LT_PHY_LANE1 |\
 					 INTEL_LT_PHY_LANE0)
 #define MODE_DP				3
+#define MODE_HDMI_20			4
 #define Q32_TO_INT(x)	((x) >> 32)
 #define Q32_TO_FRAC(x)	((x) & 0xFFFFFFFF)
 #define DCO_MIN_FREQ_MHZ	11850
@@ -1751,6 +1752,7 @@ int
 intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
 			     const struct intel_crtc_state *crtc_state)
 {
+	struct intel_display *display = to_intel_display(encoder);
 	int clk;
 	const struct intel_lt_phy_pll_state *lt_state =
 		&crtc_state->dpll_hw_state.ltpll;
@@ -1768,8 +1770,11 @@ intel_lt_phy_calc_port_clock(struct intel_encoder *encoder,
 		rate = REG_FIELD_GET8(LT_PHY_VDR_RATE_ENCODING_MASK,
 				      lt_state->config[0]);
 		clk = intel_lt_phy_get_dp_clock(rate);
-	} else {
+	} else if (mode == MODE_HDMI_20) {
 		clk = intel_lt_phy_calc_hdmi_port_clock(crtc_state);
+	} else {
+		drm_WARN_ON(display->drm, "Unsupported LT PHY Mode!\n");
+		clk = xe3plpd_lt_hdmi_252.clock;
 	}
 
 	return clk;
-- 
2.34.1