[PATCH v5 0/5] Introduce cold reset recovery method

[PATCH v5 0/5] Introduce cold reset recovery method

[Mallesh Koujalagi]

This series builds on top of Introduce Xe Uncorrectable Error Handling[1]
and adds support for handling errors that require a complete
device power cycle (cold reset) to recover.

Certain error conditions leave the device in a persistent hardware
error state that cannot be cleared through existing recovery mechanisms
such as driver reload or PCIe reset. In these cases, functionality can
only be restored by performing a cold reset.

To support this, the series introduces a new DRM wedging recovery
method, DRM_WEDGE_RECOVERY_COLD_RESET (BIT(4)). When a device is wedged
with this method, the DRM core notifies userspace via a uevent that a cold
reset is required. This allows userspace to take appropriate action to
power-cycle the device.

Example uevent received:
  SUBSYSTEM=drm
  WEDGED=cold-reset
  DEVPATH=/devices/.../drm/card0

Detailed description in commit message.

[1] https://patchwork.freedesktop.org/series/160482/
This patch series introduces a call to punit_error_handler() from
within handle_soc_internal_errors() when PUNIT errors detected.

v2:
- Add use case: Handling errors from power management unit,
  which requires a complete power cycle to
  recover. (Christian)
- Add several instead of number to avoid update. (Jani)

v3:
- Update any scenario that requires cold-reset. (Riana)
- Update document with generic scenario. (Riana)
- Consistent with terminology. (Raag)
- Remove already covered information.
- Use PUNIT instead of PMU. (Riana)
- Use consistent wordingi.
- Remove log. (Raag)

v4:
- Rename cold reset to power cyclce. (Raag)
- Update doc. (Raag/Riana)
- Change commit message. (Raag)
- Make function static. (Raag)

v5:
- Make it consistent with consumer expectations. (Raag)
- Update commit message.
- Remove unbind.
- Simplify cold-reset script.
- Remove kdoc for static function.
- Remove xe_ prefix for static function.

Cc: André Almeida <andrealmeid@igalia.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: David Airlie <airlied@gmail.com>
Cc: Simona Vetter <simona.vetter@ffwll.ch>
Cc: Maxime Ripard <mripard@kernel.org>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Thomas Zimmermann <tzimmermann@suse.de>

Mallesh Koujalagi (4):
  drm: Add DRM_WEDGE_RECOVERY_COLD_RESET recovery method
  drm/doc: Document DRM_WEDGE_RECOVERY_COLD_RESET recovery method
  drm/xe: Handle PUNIT errors by requesting cold-reset recovery
  drm/xe: Suppress Surprise Link Down on non-hotplug device

Riana Tauro (1):
  Introduce Xe Uncorrectable Error Handling

 Documentation/gpu/drm-uapi.rst                |  64 +-
 drivers/gpu/drm/drm_drv.c                     |   2 +
 drivers/gpu/drm/xe/Makefile                   |   1 +
 drivers/gpu/drm/xe/xe_device.c                |  19 +-
 drivers/gpu/drm/xe/xe_device.h                |  15 +
 drivers/gpu/drm/xe/xe_device_types.h          |   6 +
 drivers/gpu/drm/xe/xe_gt.c                    |  14 +-
 drivers/gpu/drm/xe/xe_guc_submit.c            |   9 +-
 drivers/gpu/drm/xe/xe_pci.c                   |  10 +
 drivers/gpu/drm/xe/xe_pci_error.c             | 138 +++++
 drivers/gpu/drm/xe/xe_ras.c                   | 552 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h                   |   5 +-
 drivers/gpu/drm/xe/xe_ras_types.h             | 215 +++++++
 drivers/gpu/drm/xe/xe_survivability_mode.c    |  13 +-
 drivers/gpu/drm/xe/xe_sysctrl_event.c         |   2 +-
 drivers/gpu/drm/xe/xe_sysctrl_event_types.h   |   2 +-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  11 +
 include/drm/drm_device.h                      |   1 +
 18 files changed, 1058 insertions(+), 21 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c

-- 
2.34.1

[PATCH v5 1/5] Introduce Xe Uncorrectable Error Handling

[Mallesh Koujalagi]

From: Riana Tauro <riana.tauro@intel.com>

DO NOT REVIEW. COMPILATION ONLY
This patch is from https://patchwork.freedesktop.org/series/160482/
Added only for Compilation.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/Makefile                   |   1 +
 drivers/gpu/drm/xe/xe_device.c                |  19 +-
 drivers/gpu/drm/xe/xe_device.h                |  15 +
 drivers/gpu/drm/xe/xe_device_types.h          |   6 +
 drivers/gpu/drm/xe/xe_gt.c                    |  14 +-
 drivers/gpu/drm/xe/xe_guc_submit.c            |   9 +-
 drivers/gpu/drm/xe/xe_pci.c                   |  10 +
 drivers/gpu/drm/xe/xe_pci_error.c             | 138 +++++
 drivers/gpu/drm/xe/xe_ras.c                   | 493 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h                   |   5 +-
 drivers/gpu/drm/xe/xe_ras_types.h             | 215 ++++++++
 drivers/gpu/drm/xe/xe_survivability_mode.c    |  13 +-
 drivers/gpu/drm/xe/xe_sysctrl_event.c         |   2 +-
 drivers/gpu/drm/xe/xe_sysctrl_event_types.h   |   2 +-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  11 +
 15 files changed, 933 insertions(+), 20 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 09661f079d03..091872771e98 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -101,6 +101,7 @@ xe-y += xe_bb.o \
 	xe_page_reclaim.o \
 	xe_pat.o \
 	xe_pci.o \
+	xe_pci_error.o \
 	xe_pci_rebar.o \
 	xe_pcode.o \
 	xe_pm.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 4b45b617a039..041af7ffc8bb 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -62,6 +62,7 @@
 #include "xe_psmi.h"
 #include "xe_pxp.h"
 #include "xe_query.h"
+#include "xe_ras.h"
 #include "xe_shrinker.h"
 #include "xe_soc_remapper.h"
 #include "xe_survivability_mode.h"
@@ -962,6 +963,16 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		return err;
 
+	err = xe_soc_remapper_init(xe);
+	if (err)
+		return err;
+
+	err = xe_sysctrl_init(xe);
+	if (err)
+		return err;
+
+	xe_ras_init(xe);
+
 	/*
 	 * Now that GT is initialized (TTM in particular),
 	 * we can try to init display, and inherit the initial fb.
@@ -1002,10 +1013,6 @@ int xe_device_probe(struct xe_device *xe)
 
 	xe_nvm_init(xe);
 
-	err = xe_soc_remapper_init(xe);
-	if (err)
-		return err;
-
 	err = xe_heci_gsc_init(xe);
 	if (err)
 		return err;
@@ -1044,10 +1051,6 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		goto err_unregister_display;
 
-	err = xe_sysctrl_init(xe);
-	if (err)
-		goto err_unregister_display;
-
 	err = xe_device_sysfs_init(xe);
 	if (err)
 		goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 355d69dc8f54..765e90f4220f 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -181,6 +181,21 @@ static inline bool xe_device_has_mert(const struct xe_device *xe)
 	return xe->info.has_mert;
 }
 
+static inline bool xe_device_is_in_reset(struct xe_device *xe)
+{
+	return atomic_read(&xe->in_reset);
+}
+
+static inline void xe_device_set_in_reset(struct xe_device *xe)
+{
+	atomic_set(&xe->in_reset, 1);
+}
+
+static inline void xe_device_clear_in_reset(struct xe_device *xe)
+{
+	atomic_set(&xe->in_reset, 0);
+}
+
 u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
 
 void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 32dd2ffbc796..f64e1a149cee 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -483,6 +483,9 @@ struct xe_device {
 	/** @needs_flr_on_fini: requests function-reset on fini */
 	bool needs_flr_on_fini;
 
+	/** @in_reset: Indicates if device is in reset */
+	atomic_t in_reset;
+
 	/** @wedged: Struct to control Wedged States and mode */
 	struct {
 		/** @wedged.flag: Xe device faced a critical error and is now blocked. */
@@ -495,6 +498,9 @@ struct xe_device {
 		bool inconsistent_reset;
 	} wedged;
 
+	/** @devres_group_id: id for devres group */
+	void *devres_group_id;
+
 	/** @bo_device: Struct to control async free of BOs */
 	struct xe_bo_dev {
 		/** @bo_device.async_free: Free worker */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index cdc678d1ae1f..7b547cf7de52 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -917,6 +917,9 @@ static void gt_reset_worker(struct work_struct *w)
 	if (xe_device_wedged(gt_to_xe(gt)))
 		goto err_pm_put;
 
+	if (xe_device_is_in_reset(gt_to_xe(gt)))
+		goto err_pm_put;
+
 	/* We only support GT resets with GuC submission */
 	if (!xe_device_uc_enabled(gt_to_xe(gt)))
 		goto err_pm_put;
@@ -977,18 +980,23 @@ static void gt_reset_worker(struct work_struct *w)
 
 void xe_gt_reset_async(struct xe_gt *gt)
 {
-	xe_gt_info(gt, "trying reset from %ps\n", __builtin_return_address(0));
+	struct xe_device *xe = gt_to_xe(gt);
+
+	if (xe_device_is_in_reset(xe))
+		return;
 
 	/* Don't do a reset while one is already in flight */
 	if (!xe_fault_inject_gt_reset() && xe_uc_reset_prepare(&gt->uc))
 		return;
 
+	xe_gt_info(gt, "trying reset from %ps\n", __builtin_return_address(0));
+
 	xe_gt_info(gt, "reset queued\n");
 
 	/* Pair with put in gt_reset_worker() if work is enqueued */
-	xe_pm_runtime_get_noresume(gt_to_xe(gt));
+	xe_pm_runtime_get_noresume(xe);
 	if (!queue_work(gt->ordered_wq, &gt->reset.worker))
-		xe_pm_runtime_put(gt_to_xe(gt));
+		xe_pm_runtime_put(xe);
 }
 
 void xe_gt_suspend_prepare(struct xe_gt *gt)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 4171eff4e8ad..5e6d77e44cd4 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1514,7 +1514,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 	 * If devcoredump not captured and GuC capture for the job is not ready
 	 * do manual capture first and decide later if we need to use it
 	 */
-	if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
+	if (!xe_device_is_in_reset(xe) && !exec_queue_killed(q) && !xe->devcoredump.captured &&
 	    !xe_guc_capture_get_matching_and_lock(q)) {
 		/* take force wake before engine register manual capture */
 		CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
@@ -1536,8 +1536,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 	set_exec_queue_banned(q);
 
 	/* Kick job / queue off hardware */
-	if (!wedged && (exec_queue_enabled(primary) ||
-			exec_queue_pending_disable(primary))) {
+	if (!xe_device_is_in_reset(xe) && !wedged &&
+	    (exec_queue_enabled(primary) || exec_queue_pending_disable(primary))) {
 		int ret;
 
 		if (exec_queue_reset(primary))
@@ -1605,7 +1605,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 
 	trace_xe_sched_job_timedout(job);
 
-	if (!exec_queue_killed(q))
+	/* Do not access device if in reset */
+	if (!xe_device_is_in_reset(xe) && !exec_queue_killed(q))
 		xe_devcoredump(q, job,
 			       "Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx",
 			       xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 2ab6d2f483fb..232a156e653a 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1061,6 +1061,7 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	const struct xe_device_desc *desc = (const void *)ent->driver_data;
 	const struct xe_subplatform_desc *subplatform_desc;
 	struct xe_device *xe;
+	void *devres_id;
 	int err;
 
 	xe_configfs_check_device(pdev);
@@ -1086,6 +1087,10 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (xe_display_driver_probe_defer(pdev))
 		return -EPROBE_DEFER;
 
+	devres_id = devres_open_group(&pdev->dev, NULL, GFP_KERNEL);
+	if (!devres_id)
+		return -ENOMEM;
+
 	err = pcim_enable_device(pdev);
 	if (err)
 		return err;
@@ -1094,6 +1099,8 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (IS_ERR(xe))
 		return PTR_ERR(xe);
 
+	xe->devres_group_id = devres_id;
+
 	pci_set_drvdata(pdev, &xe->drm);
 
 	xe_pm_assert_unbounded_bridge(xe);
@@ -1329,6 +1336,8 @@ static const struct dev_pm_ops xe_pm_ops = {
 };
 #endif
 
+extern const struct pci_error_handlers xe_pci_error_handlers;
+
 static struct pci_driver xe_pci_driver = {
 	.name = DRIVER_NAME,
 	.id_table = pciidlist,
@@ -1336,6 +1345,7 @@ static struct pci_driver xe_pci_driver = {
 	.remove = xe_pci_remove,
 	.shutdown = xe_pci_shutdown,
 	.sriov_configure = xe_pci_sriov_configure,
+	.err_handler = &xe_pci_error_handlers,
 #ifdef CONFIG_PM_SLEEP
 	.driver.pm = &xe_pm_ops,
 #endif
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
new file mode 100644
index 000000000000..8d62bcbcbbb6
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+#include <linux/pci.h>
+
+#include <drm/drm_drv.h>
+
+#include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_pci.h"
+#include "xe_ras.h"
+#include "xe_survivability_mode.h"
+#include "xe_uc.h"
+
+static pci_ers_result_t ras_action_to_pci_result(enum xe_ras_recovery_action action)
+{
+	switch (action) {
+	case XE_RAS_RECOVERY_ACTION_RECOVERED:
+		return PCI_ERS_RESULT_RECOVERED;
+	case XE_RAS_RECOVERY_ACTION_RESET:
+		return PCI_ERS_RESULT_NEED_RESET;
+	case XE_RAS_RECOVERY_ACTION_DISCONNECT:
+		return PCI_ERS_RESULT_DISCONNECT;
+	default:
+		return PCI_ERS_RESULT_DISCONNECT;
+	}
+}
+
+static void xe_pci_error_handling(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	struct xe_gt *gt;
+	u8 id;
+
+	/*
+	 * Wedge the device to prevent userspace access but don't send the event yet.
+	 * Runtime PM ref is taken by PCI core for the duration of error handling.
+	 */
+	xe_device_set_in_reset(xe);
+	atomic_set(&xe->wedged.flag, 1);
+
+	for_each_gt(gt, xe, id)
+		xe_gt_declare_wedged(gt);
+
+	pci_disable_device(pdev);
+}
+
+static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	dev_err(&pdev->dev, "Xe Pci error recovery: error detected state %d\n", state);
+
+	if (state == pci_channel_io_perm_failure)
+		return PCI_ERS_RESULT_DISCONNECT;
+
+	/* If the device is already wedged or in survivability mode, do not attempt recovery */
+	if (xe_survivability_mode_is_boot_enabled(xe) || xe_device_wedged(xe))
+		return PCI_ERS_RESULT_DISCONNECT;
+
+	switch (state) {
+	case pci_channel_io_normal:
+		return PCI_ERS_RESULT_CAN_RECOVER;
+	case pci_channel_io_frozen:
+		xe_pci_error_handling(pdev);
+		return PCI_ERS_RESULT_NEED_RESET;
+	default:
+		dev_err(&pdev->dev, "Unknown state %d\n", state);
+		return PCI_ERS_RESULT_NEED_RESET;
+	}
+}
+
+static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	enum xe_ras_recovery_action action;
+
+	dev_err(&pdev->dev, "Xe Pci error recovery: MMIO enabled\n");
+
+	action = xe_ras_process_errors(xe);
+
+	return ras_action_to_pci_result(action);
+}
+
+static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
+{
+	const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	dev_err(&pdev->dev, "Xe Pci error recovery: Slot reset\n");
+
+	pci_restore_state(pdev);
+
+	if (pci_enable_device(pdev)) {
+		dev_err(&pdev->dev,
+			"Cannot re-enable PCI device after reset\n");
+		return PCI_ERS_RESULT_DISCONNECT;
+	}
+
+	/*
+	 * Secondary Bus Reset causes all VRAM state to be lost along with
+	 * hardware state. As an initial step, re-probe the device to
+	 * re-initialize the driver and hardware.
+	 * TODO: optimize by re-initializing only the hardware state and re-creating
+	 * kernel BOs.
+	 */
+	xe_device_clear_in_reset(xe);
+	pdev->driver->remove(pdev);
+	devres_release_group(&pdev->dev, xe->devres_group_id);
+
+	if (pdev->driver->probe(pdev, ent))
+		return PCI_ERS_RESULT_DISCONNECT;
+
+	xe = pdev_to_xe_device(pdev);
+
+	/* Wedge the device to prevent I/O operations till the resume callback */
+	atomic_set(&xe->wedged.flag, 1);
+
+	return PCI_ERS_RESULT_RECOVERED;
+}
+
+static void xe_pci_error_resume(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	dev_info(&pdev->dev, "Xe Pci error recovery: Recovered\n");
+
+	/* Resume I/O operations */
+	atomic_set(&xe->wedged.flag, 0);
+}
+
+const struct pci_error_handlers xe_pci_error_handlers = {
+	.error_detected	= xe_pci_error_detected,
+	.mmio_enabled	= xe_pci_error_mmio_enabled,
+	.slot_reset	= xe_pci_error_slot_reset,
+	.resume		= xe_pci_error_resume,
+};
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 4cb16b419b0c..d79f8a6589ac 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -3,12 +3,18 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include "xe_bo.h"
 #include "xe_device.h"
 #include "xe_printk.h"
 #include "xe_ras.h"
 #include "xe_ras_types.h"
 #include "xe_sysctrl.h"
 #include "xe_sysctrl_event_types.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+#define CORE_COMPUTE_UNCORR_TYPE	GENMASK(26, 25)
+#define  GLOBAL_UNCORR_ERROR		2
 
 /* Severity of detected errors  */
 enum xe_ras_severity {
@@ -31,12 +37,25 @@ enum xe_ras_component {
 	XE_RAS_COMP_MAX
 };
 
+static const int ras_status_to_errno_map[] = {
+	[XE_RAS_STATUS_SUCCESS]			= 0,
+	[XE_RAS_STATUS_INVALID_PARAM]		= -EINVAL,
+	[XE_RAS_STATUS_OP_NOT_SUPPORTED]	= -EOPNOTSUPP,
+	[XE_RAS_STATUS_TIMEOUT]			= -ETIMEDOUT,
+	[XE_RAS_STATUS_HARDWARE_FAILURE]	= -EIO,
+	[XE_RAS_STATUS_INSUFFICIENT_RESOURCES]	= -ENAVAIL,
+	[XE_RAS_STATUS_UNKNOWN_ERROR]		= -ENODATA
+};
+
+static_assert(ARRAY_SIZE(ras_status_to_errno_map) == XE_RAS_STATUS_UNKNOWN_ERROR + 1);
+
 static const char *const xe_ras_severities[] = {
 	[XE_RAS_SEV_NOT_SUPPORTED]		= "Not Supported",
 	[XE_RAS_SEV_CORRECTABLE]		= "Correctable Error",
 	[XE_RAS_SEV_UNCORRECTABLE]		= "Uncorrectable Error",
 	[XE_RAS_SEV_INFORMATIONAL]		= "Informational Error",
 };
+
 static_assert(ARRAY_SIZE(xe_ras_severities) == XE_RAS_SEV_MAX);
 
 static const char *const xe_ras_components[] = {
@@ -48,6 +67,7 @@ static const char *const xe_ras_components[] = {
 	[XE_RAS_COMP_FABRIC]			= "Fabric",
 	[XE_RAS_COMP_SOC_INTERNAL]		= "SoC Internal",
 };
+
 static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMP_MAX);
 
 static inline const char *sev_to_str(u8 severity)
@@ -66,6 +86,296 @@ static inline const char *comp_to_str(u8 component)
 	return xe_ras_components[component];
 }
 
+static int ras_status_to_errno(enum xe_ras_response_status status)
+{
+	if (status > XE_RAS_STATUS_UNKNOWN_ERROR)
+		status = XE_RAS_STATUS_UNKNOWN_ERROR;
+
+	return ras_status_to_errno_map[status];
+}
+
+static void prepare_ras_command(struct xe_sysctrl_mailbox_command *command,
+				u32 cmd_mask, void *request, size_t request_len,
+				void *response, size_t response_len)
+{
+	struct xe_sysctrl_app_msg_hdr hdr = {0};
+
+	hdr.data = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |
+		   FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask);
+
+	command->header = hdr;
+	command->data_in = request;
+	command->data_in_len = request_len;
+	command->data_out = response;
+	command->data_out_len = response_len;
+}
+
+static int send_page_offline(struct xe_device *xe, enum xe_ras_page_action action, u64 page_address)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_page_offline_request request = {0};
+	struct xe_ras_page_offline_response response = {0};
+	size_t rlen;
+	int ret;
+
+	if (!xe->info.has_sysctrl)
+		return 0;
+
+	if (action >= XE_RAS_PAGE_ACTION_MAX) {
+		xe_err(xe, "[RAS]: Invalid page offline action %d\n", action);
+		return -EINVAL;
+	}
+
+	request.page_address = page_address;
+	request.action = action;
+
+	prepare_ras_command(&command, XE_SYSCTRL_CMD_PAGE_OFFLINE, &request,
+			    sizeof(request), &response, sizeof(response));
+
+	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+	if (ret) {
+		xe_err(xe, "sysctrl: failed to send page offline command %d\n", ret);
+		return ret;
+	}
+
+	if (rlen != sizeof(response)) {
+		xe_err(xe, "sysctrl: unexpected page offline response length %zu (expected %zu)\n",
+		       rlen, sizeof(response));
+		return -EINVAL;
+	}
+
+	ret = ras_status_to_errno(response.status);
+	if (ret)
+		xe_err(xe, "sysctrl: page offline command failed with status %d\n",
+		       response.status);
+
+	return ret;
+}
+
+static int handle_page_offline(struct xe_device *xe, u64 page_address, bool send_offline_cmd)
+{
+	enum xe_ras_page_action action;
+	int ret;
+
+	if (!IS_ALIGNED(page_address, XE_PAGE_SIZE)) {
+		xe_err(xe, "sysctrl: Unaligned page address: 0x%llx\n", page_address);
+		return -EINVAL;
+	}
+
+	/*
+	 * TODO: Call function to handle address fault
+	 * ret = xe_ttm_vram_handle_addr_fault(xe, page_address);
+	 */
+
+	/*
+	 * Handle return code from address fault handling function:
+	 *  0: Address is valid and can be offlined
+	 * -EIO: Address belongs to a critical BO that cannot be offlined
+	 * -ENXIO: Invalid address
+	 * -EOPNOTSUPP: Address is valid and can be offlined but user policy is not to offline
+	 *
+	 * For any other non-zero error code, skip offlining.
+	 */
+
+	switch (ret) {
+	case 0:
+		action = XE_RAS_PAGE_ACTION_OFFLINE;
+		break;
+	/* User policy set to decline page offlining */
+	case -EOPNOTSUPP:
+		action = XE_RAS_PAGE_ACTION_DECLINE;
+		break;
+	case -EIO:
+		xe_err(xe, "[RAS]: Page address belongs to critical BO: 0x%llx\n",
+		       page_address);
+		return ret;
+	default:
+		xe_err(xe, "[RAS]: Failed to handle address fault 0x%llx: %d\n",
+		       page_address, ret);
+		return 0;
+	}
+
+	if (send_offline_cmd) {
+		ret = send_page_offline(xe, action, page_address);
+		if (ret)
+			xe_err(xe, "sysctrl: Failed to offline page for address 0x%llx: %d\n",
+			       page_address, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_device *xe,
+							      struct xe_ras_error_array *arr)
+{
+	struct xe_ras_compute_error *error_info = (struct xe_ras_compute_error *)arr->error_details;
+	u8 uncorr_type;
+
+	uncorr_type = FIELD_GET(CORE_COMPUTE_UNCORR_TYPE, error_info->error_log_header);
+
+	/* Request a reset if error is global */
+	if (uncorr_type == GLOBAL_UNCORR_ERROR)
+		return XE_RAS_RECOVERY_ACTION_RESET;
+
+	/* Local errors are recovered using an engine reset by GuC */
+	return XE_RAS_RECOVERY_ACTION_RECOVERED;
+}
+
+static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *xe,
+							      struct xe_ras_error_array *arr)
+{
+	struct xe_ras_soc_error *error_info = (struct xe_ras_soc_error *)arr->error_details;
+	struct xe_ras_soc_error_source *source = &error_info->error_source;
+	struct xe_ras_error_class *error_class = &arr->error_class;
+	u8 tile_id = error_class->product.unit.tile;
+	struct xe_tile *tile;
+
+	if (tile_id >= xe->info.tile_count) {
+		xe_err(xe, "sysctrl: SOC internal error reported from invalid tile %u\n", tile_id);
+		return XE_RAS_RECOVERY_ACTION_RESET;
+	}
+
+	tile = &xe->tiles[tile_id];
+
+	if (source->csc) {
+		struct xe_ras_csc_error *csc_error =
+			(struct xe_ras_csc_error *)error_info->additional_details;
+
+		/*
+		 * CSC uncorrectable errors are classified as hardware errors and firmware errors.
+		 * CSC firmware errors are critical errors that can be recovered only by firmware
+		 * update via SPI driver. On a CSC firmware error, PCODE enables FDO mode and sets
+		 * the bit in the capability register. On receiving this error, the driver enables
+		 * runtime survivability mode which notifies userspace that a firmware update
+		 * is required.
+		 */
+		if (csc_error->hec_uncorr_fw_err_dw0) {
+			xe_err(xe, "[RAS]: CSC %s detected: 0x%x\n",
+			       sev_to_str(error_class->common.severity),
+			       csc_error->hec_uncorr_fw_err_dw0);
+			schedule_work(&tile->csc_hw_error_work);
+			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+		}
+	} else if (source->ieh) {
+		struct xe_ras_ieh_error *ieh_error =
+			(struct xe_ras_ieh_error *)error_info->additional_details;
+
+		if (ieh_error->global_error_status & XE_RAS_SOC_IEH_PUNIT) {
+			xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
+			       sev_to_str(error_class->common.severity),
+			       ieh_error->global_error_status);
+			/* TODO: Add PUNIT error handling */
+			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+		}
+	}
+
+	/* For other SOC internal errors, request a reset as recovery mechanism */
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
+static enum xe_ras_recovery_action handle_device_memory_errors(struct xe_device *xe,
+							       struct xe_ras_error_array *arr)
+{
+	struct xe_ras_memory_error *error_info = (struct xe_ras_memory_error *)arr->error_details;
+	int ret;
+
+	if (error_info->category & XE_RAS_MEMORY_ECC) {
+		xe_err(xe, "[RAS]: double-bit ECC error detected at sw address 0x%llx\n",
+		       error_info->sw_address);
+		ret = handle_page_offline(xe, error_info->sw_address, true);
+		if (!ret)
+			return XE_RAS_RECOVERY_ACTION_RECOVERED;
+	}
+
+	/* Request a reset for other device memory errors and if page offlining failed */
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
+static void get_queued_pages(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_page_offline_queue response = {0};
+	u32 count = 0;
+	size_t rlen;
+	int ret, i;
+
+	/* Supported only on platforms with system controller */
+	if (!xe->info.has_sysctrl)
+		return;
+
+	prepare_ras_command(&command, XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE, NULL, 0,
+			    &response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "sysctrl: failed to get page offline queue %d\n", ret);
+			return;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "sysctrl: unexpected page offline queue response length %zu (expected %zu)\n",
+			       rlen, sizeof(response));
+			return;
+		}
+
+		for (i = 0; i < response.pages_returned && i < XE_RAS_NUM_PAGES; i++)
+			handle_page_offline(xe, response.page_addresses[i], true);
+
+		count += response.pages_returned;
+		if (count > response.total_pages) {
+			xe_err(xe, "sysctrl: Pages returned from queue exceed total pages %u, returned %u\n",
+			       response.total_pages, count);
+			return;
+		}
+	} while (response.additional_data);
+}
+
+static void get_offlined_list(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_page_offline_list response = {0};
+	u32 count = 0;
+	size_t rlen;
+	int ret, i;
+
+	/* Supported only on platforms with system controller */
+	if (!xe->info.has_sysctrl)
+		return;
+
+	prepare_ras_command(&command, XE_SYSCTRL_CMD_GET_OFFLINE_LIST, NULL, 0,
+			    &response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "sysctrl: failed to get page offline list %d\n", ret);
+			return;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "sysctrl: unexpected page offline list response length %zu (expected %zu)\n",
+			       rlen, sizeof(response));
+			return;
+		}
+
+		for (i = 0; i < response.pages_returned && i < XE_RAS_NUM_PAGES; i++)
+			handle_page_offline(xe, response.page_addresses[i], false);
+
+		count += response.pages_returned;
+		if (count > response.total_pages) {
+			xe_err(xe, "sysctrl: Pages returned from list exceed total pages %u, returned %u\n",
+			       response.total_pages, count);
+			return;
+		}
+	} while (response.additional_data);
+}
+
 void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 				      struct xe_sysctrl_event_response *response)
 {
@@ -91,3 +401,186 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 			comp_to_str(component), sev_to_str(severity));
 	}
 }
+
+/**
+ * xe_ras_process_errors() - Process and contain hardware errors
+ * @xe: xe device instance
+ *
+ * Get error details from system controller and return recovery
+ * method. Called only from PCI error handling.
+ *
+ * Returns: recovery action to be taken
+ */
+enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_get_soc_error response;
+	enum xe_ras_recovery_action final_action;
+	u32 count = XE_SYSCTRL_FLOOD;
+	size_t rlen;
+	int ret;
+
+	if (!xe->info.has_sysctrl)
+		return XE_RAS_RECOVERY_ACTION_RESET;
+
+	/* Default action */
+	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
+
+	prepare_ras_command(&command, XE_SYSCTRL_CMD_GET_SOC_ERROR, NULL, 0,
+			    &response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "sysctrl: failed to get soc error %d\n", ret);
+			goto err;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "sysctrl: unexpected get soc error response length %zu (expected %zu)\n",
+			       rlen, sizeof(response));
+			goto err;
+		}
+
+		/* Report if number of errors exceeds the maximum errors supported */
+		if (response.num_errors > XE_RAS_NUM_ERROR_ARR)
+			xe_err(xe, "sysctrl: number of errors received %d out of bound (%d)\n",
+			       response.num_errors, XE_RAS_NUM_ERROR_ARR);
+
+		for (int i = 0; i < response.num_errors && i < XE_RAS_NUM_ERROR_ARR; i++) {
+			struct xe_ras_error_array *arr = &response.error_arr[i];
+			enum xe_ras_recovery_action action;
+			struct xe_ras_error_class error_class;
+			u8 component, severity;
+
+			error_class = arr->error_class;
+			component = error_class.common.component;
+			severity = error_class.common.severity;
+
+			xe_err(xe, "[RAS]: %s %s detected\n", comp_to_str(component),
+			       sev_to_str(severity));
+
+			switch (component) {
+			case XE_RAS_COMP_CORE_COMPUTE:
+				action = handle_core_compute_errors(xe, arr);
+				break;
+			case XE_RAS_COMP_SOC_INTERNAL:
+				action = handle_soc_internal_errors(xe, arr);
+				break;
+			case XE_RAS_COMP_DEVICE_MEMORY:
+				action = handle_device_memory_errors(xe, arr);
+				break;
+			default:
+				/* For any other component, reset */
+				action = XE_RAS_RECOVERY_ACTION_RESET;
+				break;
+			}
+
+			/* Process and log all errors and then trigger highest recovery action */
+			if (action > final_action)
+				final_action = action;
+		}
+
+		/* Treat flooding as an system controller error */
+		if (!--count) {
+			xe_err(xe, "[RAS]: sysctrl: get soc error response flooding\n");
+			return XE_RAS_RECOVERY_ACTION_RESET;
+		}
+
+	} while (response.additional_errors);
+
+	return final_action;
+
+err:
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
+#ifdef CONFIG_PCIEAER
+static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
+{
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	struct pci_dev *vsp, *usp;
+	u32 aer_uncorr_mask, aer_uncorr_sev, aer_uncorr_status;
+	u16 aer_cap;
+
+	/*
+	 * Device Hierarchy:
+	 *
+	 * Upstream Switch Port (USP)--> Virtual Switch Port (VSP)--> SGunit (GPU endpoint)
+	 */
+	vsp = pci_upstream_bridge(pdev);
+	if (!vsp)
+		return;
+
+	usp = pci_upstream_bridge(vsp);
+	if (!usp)
+		return;
+
+	aer_cap = usp->aer_cap;
+
+	if (!aer_cap) {
+		dev_info(&usp->dev, "USP doesn't support AER capability\n");
+		return;
+	}
+
+	/*
+	 * Clear any stale Uncorrectable Internal Error Status event in Uncorrectable Error
+	 * Status Register.
+	 */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &aer_uncorr_status);
+	if (aer_uncorr_status & PCI_ERR_UNC_INTN)
+		pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, PCI_ERR_UNC_INTN);
+
+	/*
+	 * All errors are steered to USP which is a PCIe AER Compliant device.
+	 * Downgrade all the errors to non-fatal to prevent PCIe bus driver
+	 * from triggering a Secondary Bus Reset (SBR). This allows error
+	 * detection, containment and recovery in the driver.
+	 *
+	 * The Uncorrectable Error Severity Register has the 'Uncorrectable
+	 * Internal Error Severity' set to fatal by default. Set this to
+	 * non-fatal and unmask the error.
+	 */
+
+	/* Initialize Uncorrectable Error Severity Register */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, &aer_uncorr_sev);
+	aer_uncorr_sev &= ~PCI_ERR_UNC_INTN;
+	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, aer_uncorr_sev);
+
+	/* Initialize Uncorrectable Error Mask Register */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, &aer_uncorr_mask);
+	aer_uncorr_mask &= ~PCI_ERR_UNC_INTN;
+	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, aer_uncorr_mask);
+
+	pci_save_state(usp);
+	dev_dbg(&usp->dev, "Uncorrectable Internal Errors downgraded and unmasked\n");
+}
+#endif
+
+/**
+ * xe_ras_init - Initialize Xe RAS
+ * @xe: xe device instance
+ *
+ * Initialize Xe RAS
+ */
+void xe_ras_init(struct xe_device *xe)
+{
+	if (!xe->info.has_sysctrl || IS_SRIOV_VF(xe))
+		return;
+
+#ifdef CONFIG_PCIEAER
+	aer_unmask_and_downgrade_internal_error(xe);
+#endif
+
+	get_queued_pages(xe);
+	get_offlined_list(xe);
+
+	/*
+	 * On init, process and log any errors detected by firmware before driver load.
+	 * Critical errors such as Punit, CSC are reported through PCode init failure,
+	 * causing the driver to enter survivability mode.
+	 */
+	xe_ras_process_errors(xe);
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index ea90593b62dc..cdaad3114dae 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -6,10 +6,13 @@
 #ifndef _XE_RAS_H_
 #define _XE_RAS_H_
 
+#include "xe_ras_types.h"
+
 struct xe_device;
 struct xe_sysctrl_event_response;
 
 void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 				      struct xe_sysctrl_event_response *response);
-
+void xe_ras_init(struct xe_device *xe);
+enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 4e63c67f806a..3ec64b4f5a17 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -8,7 +8,63 @@
 
 #include <linux/types.h>
 
+#define XE_RAS_NUM_ERROR_ARR			3
 #define XE_RAS_NUM_COUNTERS			16
+#define XE_RAS_SOC_IEH_PUNIT			BIT(1)
+#define XE_RAS_MEMORY_ECC			BIT(1)
+#define XE_RAS_NUM_PAGES			25
+
+/**
+ * enum xe_ras_recovery_action - RAS recovery actions
+ *
+ * @XE_RAS_RECOVERY_ACTION_RECOVERED: Error recovered
+ * @XE_RAS_RECOVERY_ACTION_RESET: Requires reset
+ * @XE_RAS_RECOVERY_ACTION_DISCONNECT: Requires disconnect
+ * @XE_RAS_RECOVERY_ACTION_MAX: Max action value
+ *
+ * This enum defines the possible recovery actions that can be taken in response
+ * to RAS errors.
+ */
+enum xe_ras_recovery_action {
+	XE_RAS_RECOVERY_ACTION_RECOVERED = 0,
+	XE_RAS_RECOVERY_ACTION_RESET,
+	XE_RAS_RECOVERY_ACTION_DISCONNECT,
+	XE_RAS_RECOVERY_ACTION_MAX
+};
+
+/**
+ * enum xe_ras_page_action - Page offline actions for page offline request
+ *
+ * @XE_RAS_PAGE_ACTION_OFFLINE: Instruct firmware to remove page from queue
+ * @XE_RAS_PAGE_ACTION_DECLINE: Instruct firmware to mark page as not offline
+ * @XE_RAS_PAGE_ACTION_MAX: Max value for validation
+ */
+enum xe_ras_page_action {
+	XE_RAS_PAGE_ACTION_OFFLINE,
+	XE_RAS_PAGE_ACTION_DECLINE,
+	XE_RAS_PAGE_ACTION_MAX
+};
+
+/**
+ * enum xe_ras_response_status - RAS response status codes
+ *
+ * @XE_RAS_STATUS_SUCCESS: Operation successful
+ * @XE_RAS_STATUS_INVALID_PARAM: Invalid parameter
+ * @XE_RAS_STATUS_OP_NOT_SUPPORTED: Operation not supported
+ * @XE_RAS_STATUS_TIMEOUT: Operation timed out
+ * @XE_RAS_STATUS_HARDWARE_FAILURE: Hardware failure
+ * @XE_RAS_STATUS_INSUFFICIENT_RESOURCES: Insufficient resources
+ * @XE_RAS_STATUS_UNKNOWN_ERROR: Unknown error
+ */
+enum xe_ras_response_status {
+	XE_RAS_STATUS_SUCCESS = 0,
+	XE_RAS_STATUS_INVALID_PARAM,
+	XE_RAS_STATUS_OP_NOT_SUPPORTED,
+	XE_RAS_STATUS_TIMEOUT,
+	XE_RAS_STATUS_HARDWARE_FAILURE,
+	XE_RAS_STATUS_INSUFFICIENT_RESOURCES,
+	XE_RAS_STATUS_UNKNOWN_ERROR
+};
 
 /**
  * struct xe_ras_error_common - Error fields that are common across all products
@@ -70,4 +126,163 @@ struct xe_ras_threshold_crossed {
 	struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
 } __packed;
 
+/**
+ * struct xe_ras_error_array - Details of the error types
+ */
+struct xe_ras_error_array {
+	/** @counter_value: Counter value of the returned error */
+	u32 counter_value;
+	/** @error_class: Error class */
+	struct xe_ras_error_class error_class;
+	/** @timestamp: Timestamp */
+	u64 timestamp;
+	/** @error_details: Error details specific to the class */
+	u32 error_details[XE_RAS_NUM_COUNTERS];
+} __packed;
+
+/**
+ * struct xe_ras_get_soc_error - Response from get soc error command
+ */
+struct xe_ras_get_soc_error {
+	/** @num_errors: Number of errors reported in this response */
+	u8 num_errors;
+	/** @additional_errors: Indicates if the errors are pending */
+	u8 additional_errors;
+	/** @error_arr: Array of up to 3 errors */
+	struct xe_ras_error_array error_arr[XE_RAS_NUM_ERROR_ARR];
+} __packed;
+
+/**
+ * struct xe_ras_compute_error - Error details of Core Compute error
+ */
+struct xe_ras_compute_error {
+	/** @error_log_header: Error Source and type */
+	u32 error_log_header;
+	/** @reserved: Reserved */
+	u32 reserved[15];
+} __packed;
+
+/**
+ * struct xe_ras_soc_error_source - Source of SoC error
+ */
+struct xe_ras_soc_error_source {
+	/** @csc: CSC */
+	u32 csc:1;
+	/** @ieh: IEH (Integrated Error Handler) */
+	u32 ieh:1;
+	/** @reserved: Reserved for future use */
+	u32 reserved:30;
+} __packed;
+
+/**
+ * struct xe_ras_soc_error - Error details of SoC internal error
+ */
+struct xe_ras_soc_error {
+	/** @error_source: Error source */
+	struct xe_ras_soc_error_source error_source;
+	/** @additional_details: Additional details */
+	u32 additional_details[15];
+} __packed;
+
+/**
+ * struct xe_ras_csc_error - CSC error details
+ */
+struct xe_ras_csc_error {
+	/** @hec_uncorr_err_status: CSC hardware error status */
+	u32 hec_uncorr_err_status;
+	/** @hec_uncorr_fw_err_dw0: CSC firmware error */
+	u32 hec_uncorr_fw_err_dw0;
+} __packed;
+
+/**
+ * struct xe_ras_ieh_error - SoC IEH (Integrated Error Handler) error details
+ */
+struct xe_ras_ieh_error {
+	/** @ieh_instance: IEH instance */
+	u32 ieh_instance:2;
+	/** @reserved: Reserved for future use */
+	u32 reserved:30;
+	/** @global_error_status: Global error status */
+	u32 global_error_status;
+	/** @local_error_status: Local error status */
+	u32 local_error_status;
+	/** @gerr_mask: Global error mask */
+	u32 gerr_mask;
+	/** @additional_info: Additional information */
+	u32 additional_info[10];
+} __packed;
+
+/**
+ * struct xe_ras_memory_error - Device memory error details
+ */
+struct xe_ras_memory_error {
+	/** @category: Device memory error category */
+	u8 category;
+	/** @reserved: Reserved for future use */
+	u8 reserved[7];
+	/** @hardware_address: Hardware physical address details */
+	u64 hardware_address;
+	/** @sw_address: Software address where error occurred */
+	u64 sw_address;
+	/** @reserved2: Reserved for future use */
+	u32 reserved2[10];
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_list - Response from get offline list command
+ */
+struct xe_ras_page_offline_list {
+	/** @max_entries: Total no of pages that can be stored in flash */
+	u32 max_entries;
+	/** @total_pages: Total number of permanently offlined pages */
+	u32 total_pages;
+	/** @pages_returned: Number of pages returned in this response */
+	u32 pages_returned;
+	/** @page_addresses: Array of permanently offlined page addresses (4KB aligned) */
+	u64 page_addresses[XE_RAS_NUM_PAGES];
+	/** @additional_data: Indicates if more data is available */
+	u8 additional_data;
+	/** @reserved: Reserved for future use */
+	u8 reserved[3];
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_queue - Response from get offline queue command
+ */
+struct xe_ras_page_offline_queue {
+	/** @total_pages: Total number of queued pages */
+	u32 total_pages;
+	/** @pages_returned: Number of pages returned in this response */
+	u32 pages_returned;
+	/** @page_addresses: Array of page addresses (4KB aligned) */
+	u64 page_addresses[XE_RAS_NUM_PAGES];
+	/** @additional_data: Indicates if more data is available */
+	u8 additional_data;
+	/** @reserved: Reserved for future use */
+	u8 reserved[3];
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_request - Request for page offline command
+ *
+ * This structure provides the request format to offline/decline a page
+ */
+struct xe_ras_page_offline_request {
+	/** @page_address: Page address (4KB aligned) */
+	u64 page_address;
+	/** @action: Action to be performed, see &enum xe_ras_page_action */
+	u32 action;
+	/** @reserved: Reserved for future use */
+	u32 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_response - Response from page offline command
+ */
+struct xe_ras_page_offline_response {
+	/** @status: Status of the page offline request, see &enum xe_ras_response_status */
+	u32 status;
+	/** @reserved: Reserved for future use */
+	u32 reserved;
+} __packed;
 #endif
diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index 427afd144f3a..4c506027fa94 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -54,7 +54,6 @@
  *	# cat /sys/bus/pci/devices/<device>/survivability_mode
  *	  Boot
  *
- *
  * Any additional debug information if present will be visible under the directory
  * ``survivability_info``::
  *
@@ -98,6 +97,15 @@
  *	# cat /sys/bus/pci/devices/<device>/survivability_mode
  *	  Runtime
  *
+ * On some CSC firmware errors, PCODE sets FDO mode and the only recovery possible is through
+ * firmware flash using SPI driver. Userspace can check if FDO mode is set by checking the below
+ * sysfs entry.
+ *
+ * .. code-block:: shell
+ *
+ *	# cat /sys/bus/pci/devices/<device>/survivability_info/fdo_mode
+ *	  enabled
+ *
  * When such errors occur, userspace is notified with the drm device wedged uevent and runtime
  * survivability mode. User can then initiate a firmware flash using userspace tools like fwupd
  * to restore device to normal operation.
@@ -296,7 +304,8 @@ static int create_survivability_sysfs(struct pci_dev *pdev)
 	if (ret)
 		return ret;
 
-	if (check_boot_failure(xe)) {
+	/* Survivability info is not required if enabled via configfs */
+	if (!xe_configfs_get_survivability_mode(pdev)) {
 		ret = devm_device_add_group(dev, &survivability_info_group);
 		if (ret)
 			return ret;
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event.c b/drivers/gpu/drm/xe/xe_sysctrl_event.c
index b4d17329af6c..faf6ba89ce98 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_event.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl_event.c
@@ -16,7 +16,7 @@ static void get_pending_event(struct xe_sysctrl *sc, struct xe_sysctrl_mailbox_c
 {
 	struct xe_sysctrl_event_response *response = command->data_out;
 	struct xe_device *xe = sc_to_xe(sc);
-	u32 count = XE_SYSCTRL_EVENT_FLOOD;
+	u32 count = XE_SYSCTRL_FLOOD;
 	size_t len;
 	int ret;
 
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
index c16c66b9fa7f..d236e22fe9dd 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
@@ -11,7 +11,7 @@
 #define XE_SYSCTRL_EVENT_DATA_LEN		59
 
 /* Modify as needed */
-#define XE_SYSCTRL_EVENT_FLOOD			16
+#define XE_SYSCTRL_FLOOD			16
 
 /**
  * enum xe_sysctrl_event - Events reported by System Controller
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 84d7c647e743..12ffd011ee8e 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -22,10 +22,18 @@ enum xe_sysctrl_group {
 /**
  * enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group
  *
+ * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Retrieve basic error information
  * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
+ * @XE_SYSCTRL_CMD_PAGE_OFFLINE: Instruct firmware to offline/decline a page
+ * @XE_SYSCTRL_CMD_GET_OFFLINE_LIST: Retrieve list of all offlined pages from flash
+ * @XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE: Retrieve list of offlined queued pages from firmware
  */
 enum xe_sysctrl_gfsp_cmd {
+	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
 	XE_SYSCTRL_CMD_GET_PENDING_EVENT	= 0x07,
+	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08,
+	XE_SYSCTRL_CMD_GET_OFFLINE_LIST		= 0x09,
+	XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE	= 0x0A,
 };
 
 /**
@@ -48,6 +56,9 @@ struct xe_sysctrl_mailbox_command {
 	size_t data_out_len;
 };
 
+/* Modify as needed */
+#define XE_SYSCTRL_FLOOD			16
+
 #define XE_SYSCTRL_MB_FRAME_SIZE	16
 #define XE_SYSCTRL_MB_MAX_FRAMES	64
 #define XE_SYSCTRL_MB_MAX_MESSAGE_SIZE	\
-- 
2.34.1

[PATCH v5 2/5] drm: Add DRM_WEDGE_RECOVERY_COLD_RESET recovery method

[Mallesh Koujalagi]

Introduce DRM_WEDGE_RECOVERY_COLD_RESET (BIT(4)) recovery method to handle
scenarios requiring device power cycle.

This method addresses cases where other recovery mechanisms
(driver reload, PCIe reset, etc.) are insufficient to restore device
functionality. When set, it indicates to userspace that only device power
cycle can recover the device from its current error state. The cold reset
method serves as a last resort when all other recovery options have been
exhausted.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v3:
- Update any scenario that requires cold-reset. (Riana)

v4:
- Rename cold reset to power cyclce. (Raag)

v5:
- Make it consistent with consumer expectations. (Raag)
---
 drivers/gpu/drm/drm_drv.c | 2 ++
 include/drm/drm_device.h  | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 985c283cf59f..8c0236e2e6a6 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -535,6 +535,8 @@ static const char *drm_get_wedge_recovery(unsigned int opt)
 		return "bus-reset";
 	case DRM_WEDGE_RECOVERY_VENDOR:
 		return "vendor-specific";
+	case DRM_WEDGE_RECOVERY_COLD_RESET:
+		return "cold-reset";
 	default:
 		return NULL;
 	}
diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
index bc78fb77cc27..d41f26f4dd45 100644
--- a/include/drm/drm_device.h
+++ b/include/drm/drm_device.h
@@ -37,6 +37,7 @@ struct pci_controller;
 #define DRM_WEDGE_RECOVERY_REBIND	BIT(1)	/* unbind + bind driver */
 #define DRM_WEDGE_RECOVERY_BUS_RESET	BIT(2)	/* unbind + reset bus device + bind */
 #define DRM_WEDGE_RECOVERY_VENDOR	BIT(3)	/* vendor specific recovery method */
+#define DRM_WEDGE_RECOVERY_COLD_RESET	BIT(4)	/* remove device + slot power cycle + rescan */
 
 /**
  * struct drm_wedge_task_info - information about the guilty task of a wedge dev
-- 
2.34.1

Re: [PATCH v5 2/5] drm: Add DRM_WEDGE_RECOVERY_COLD_RESET recovery method

[Raag Jadav]

On Tue, May 12, 2026 at 06:56:17PM +0530, Mallesh Koujalagi wrote:
> Introduce DRM_WEDGE_RECOVERY_COLD_RESET (BIT(4)) recovery method to handle
> scenarios requiring device power cycle.
> 
> This method addresses cases where other recovery mechanisms
> (driver reload, PCIe reset, etc.) are insufficient to restore device
> functionality. When set, it indicates to userspace that only device power
> cycle can recover the device from its current error state. The cold reset
> method serves as a last resort when all other recovery options have been
> exhausted.
> 
> Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>

Reviewed-by: Raag Jadav <raag.jadav@intel.com>

Re: [PATCH v5 2/5] drm: Add DRM_WEDGE_RECOVERY_COLD_RESET recovery method

[Tauro, Riana]

On 5/12/2026 6:56 PM, Mallesh Koujalagi wrote:
> Introduce DRM_WEDGE_RECOVERY_COLD_RESET (BIT(4)) recovery method to handle
> scenarios requiring device power cycle.
>
> This method addresses cases where other recovery mechanisms
> (driver reload, PCIe reset, etc.) are insufficient to restore device
> functionality. When set, it indicates to userspace that only device power
> cycle can recover the device from its current error state. The cold reset
> method serves as a last resort when all other recovery options have been
> exhausted.

The last statement is not necessary.  This could mean that all recovery 
options must
be tried before attempting cold reset.

Thanks
Riana

>
> Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v3:
> - Update any scenario that requires cold-reset. (Riana)
>
> v4:
> - Rename cold reset to power cyclce. (Raag)
>
> v5:
> - Make it consistent with consumer expectations. (Raag)
> ---
>   drivers/gpu/drm/drm_drv.c | 2 ++
>   include/drm/drm_device.h  | 1 +
>   2 files changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> index 985c283cf59f..8c0236e2e6a6 100644
> --- a/drivers/gpu/drm/drm_drv.c
> +++ b/drivers/gpu/drm/drm_drv.c
> @@ -535,6 +535,8 @@ static const char *drm_get_wedge_recovery(unsigned int opt)
>   		return "bus-reset";
>   	case DRM_WEDGE_RECOVERY_VENDOR:
>   		return "vendor-specific";
> +	case DRM_WEDGE_RECOVERY_COLD_RESET:
> +		return "cold-reset";
>   	default:
>   		return NULL;
>   	}
> diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
> index bc78fb77cc27..d41f26f4dd45 100644
> --- a/include/drm/drm_device.h
> +++ b/include/drm/drm_device.h
> @@ -37,6 +37,7 @@ struct pci_controller;
>   #define DRM_WEDGE_RECOVERY_REBIND	BIT(1)	/* unbind + bind driver */
>   #define DRM_WEDGE_RECOVERY_BUS_RESET	BIT(2)	/* unbind + reset bus device + bind */
>   #define DRM_WEDGE_RECOVERY_VENDOR	BIT(3)	/* vendor specific recovery method */
> +#define DRM_WEDGE_RECOVERY_COLD_RESET	BIT(4)	/* remove device + slot power cycle + rescan */
>   
>   /**
>    * struct drm_wedge_task_info - information about the guilty task of a wedge dev

[PATCH v5 3/5] drm/doc: Document DRM_WEDGE_RECOVERY_COLD_RESET recovery method

[Mallesh Koujalagi]

When ``WEDGED=cold-reset`` is sent, it indicates that the device has
encountered an error condition that cannot be resolved through other
recovery methods such as driver rebind or bus reset, and requires a
complete device power cycle to restore functionality.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2:
- Add several instead of number to avoid update. (Jani)

v3:
- Update document with generic scenario. (Riana)
- Consistent with terminology. (Raag)
- Remove already covered information.

v4:
- Update doc. (Raag/Riana)
- Change commit message.

v5:
- Update commit message. (Raag)
- Remove unbind.
- Simplify cold-reset script.
---
 Documentation/gpu/drm-uapi.rst | 64 +++++++++++++++++++++++++++++++++-
 1 file changed, 63 insertions(+), 1 deletion(-)

diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst
index 32206ce62931..809386f16521 100644
--- a/Documentation/gpu/drm-uapi.rst
+++ b/Documentation/gpu/drm-uapi.rst
@@ -422,7 +422,7 @@ needed.
 Recovery
 --------
 
-Current implementation defines four recovery methods, out of which, drivers
+Current implementation defines several recovery methods, out of which, drivers
 can use any one, multiple or none. Method(s) of choice will be sent in the
 uevent environment as ``WEDGED=<method1>[,..,<methodN>]`` in order of less to
 more side-effects. See the section `Vendor Specific Recovery`_
@@ -439,6 +439,7 @@ following expectations.
     rebind          unbind + bind driver
     bus-reset       unbind + bus reset/re-enumeration + bind
     vendor-specific vendor specific recovery method
+    cold-reset      remove device + slot power cycle + rescan
     unknown         consumer policy
     =============== ========================================
 
@@ -451,6 +452,17 @@ debug purpose in order to root cause the hang. This is useful because the first
 hang is usually the most critical one which can result in consequential hangs
 or complete wedging.
 
+Cold Reset Recovery
+-------------------
+
+When ``WEDGED=cold-reset`` is sent, it indicates that the device has
+encountered an error condition that cannot be resolved through other
+recovery methods such as driver rebind or bus reset, and requires a complete
+device power cycle to restore functionality.
+
+This method is used by devices that are plugged directly into the PCIe slot
+which supports removing the power.
+
 Vendor Specific Recovery
 ------------------------
 
@@ -528,6 +540,56 @@ Recovery script::
     echo -n $DEVICE > $DRIVER/unbind
     echo -n $DEVICE > $DRIVER/bind
 
+Example - cold-reset
+--------------------
+
+Udev rule::
+
+    SUBSYSTEM=="drm", ENV{WEDGED}=="cold-reset", DEVPATH=="*/drm/card[0-9]",
+    RUN+="/path/to/cold-reset.sh $env{DEVPATH}"
+
+Recovery script::
+
+    #!/bin/sh
+
+    [ -z "$1" ] && echo "Usage: $0 <device-path>" && exit 1
+
+    # Get device
+    DEVPATH=$(readlink -f /sys/$1/device 2>/dev/null || readlink -f /sys/$1)
+    DEVICE=$(basename $DEVPATH)
+
+    echo "Cold reset: $DEVICE"
+
+    # Try slot power reset first
+    SLOT=""
+    for addr_file in /sys/bus/pci/slots/*/address; do
+	    [ -f "$addr_file" ] || break
+	    addr=$(cat "$addr_file" 2>/dev/null)
+	    [ -n "$addr" ] || continue
+	    case "$DEVICE" in
+		    "$addr"*) SLOT=$(basename "$(dirname "$addr_file")"); break ;;
+	    esac
+    done
+
+    if [ -n "$SLOT" ]; then
+	echo "Using slot $SLOT"
+
+	# Remove device
+	echo 1 > /sys/bus/pci/devices/$DEVICE/remove
+
+	# Power cycle slot
+	echo 0 > /sys/bus/pci/slots/$SLOT/power
+	sleep 2
+	echo 1 > /sys/bus/pci/slots/$SLOT/power
+	sleep 1
+
+	# Rescan
+	echo 1 > /sys/bus/pci/rescan
+	echo "Done!"
+    else
+	echo "No slot found"
+    fi
+
 Customization
 -------------
 
-- 
2.34.1

Re: [PATCH v5 3/5] drm/doc: Document DRM_WEDGE_RECOVERY_COLD_RESET recovery method

[Raag Jadav]

On Tue, May 12, 2026 at 06:56:18PM +0530, Mallesh Koujalagi wrote:
> When ``WEDGED=cold-reset`` is sent, it indicates that the device has
> encountered an error condition that cannot be resolved through other
> recovery methods such as driver rebind or bus reset, and requires a
> complete device power cycle to restore functionality.
> 
> Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v2:
> - Add several instead of number to avoid update. (Jani)
> 
> v3:
> - Update document with generic scenario. (Riana)
> - Consistent with terminology. (Raag)
> - Remove already covered information.
> 
> v4:
> - Update doc. (Raag/Riana)
> - Change commit message.
> 
> v5:
> - Update commit message. (Raag)
> - Remove unbind.
> - Simplify cold-reset script.
> ---
>  Documentation/gpu/drm-uapi.rst | 64 +++++++++++++++++++++++++++++++++-
>  1 file changed, 63 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst
> index 32206ce62931..809386f16521 100644
> --- a/Documentation/gpu/drm-uapi.rst
> +++ b/Documentation/gpu/drm-uapi.rst
> @@ -422,7 +422,7 @@ needed.
>  Recovery
>  --------
>  
> -Current implementation defines four recovery methods, out of which, drivers
> +Current implementation defines several recovery methods, out of which, drivers
>  can use any one, multiple or none. Method(s) of choice will be sent in the
>  uevent environment as ``WEDGED=<method1>[,..,<methodN>]`` in order of less to
>  more side-effects. See the section `Vendor Specific Recovery`_
> @@ -439,6 +439,7 @@ following expectations.
>      rebind          unbind + bind driver
>      bus-reset       unbind + bus reset/re-enumeration + bind
>      vendor-specific vendor specific recovery method
> +    cold-reset      remove device + slot power cycle + rescan
>      unknown         consumer policy
>      =============== ========================================
>  
> @@ -451,6 +452,17 @@ debug purpose in order to root cause the hang. This is useful because the first
>  hang is usually the most critical one which can result in consequential hangs
>  or complete wedging.
>  
> +Cold Reset Recovery
> +-------------------
> +
> +When ``WEDGED=cold-reset`` is sent, it indicates that the device has
> +encountered an error condition that cannot be resolved through other
> +recovery methods such as driver rebind or bus reset, and requires a complete
> +device power cycle to restore functionality.
> +
> +This method is used by devices that are plugged directly into the PCIe slot
> +which supports removing the power.

This looks good to me.

>  Vendor Specific Recovery
>  ------------------------
>  
> @@ -528,6 +540,56 @@ Recovery script::
>      echo -n $DEVICE > $DRIVER/unbind
>      echo -n $DEVICE > $DRIVER/bind
>  
> +Example - cold-reset
> +--------------------
> +
> +Udev rule::
> +
> +    SUBSYSTEM=="drm", ENV{WEDGED}=="cold-reset", DEVPATH=="*/drm/card[0-9]",
> +    RUN+="/path/to/cold-reset.sh $env{DEVPATH}"
> +
> +Recovery script::
> +
> +    #!/bin/sh
> +
> +    [ -z "$1" ] && echo "Usage: $0 <device-path>" && exit 1
> +
> +    # Get device
> +    DEVPATH=$(readlink -f /sys/$1/device 2>/dev/null || readlink -f /sys/$1)
> +    DEVICE=$(basename $DEVPATH)
> +
> +    echo "Cold reset: $DEVICE"
> +
> +    # Try slot power reset first
> +    SLOT=""
> +    for addr_file in /sys/bus/pci/slots/*/address; do

This looks like we're peeking into every slot present on the machine which
is not very optimal. Can't we just follow device hierarchy in DEVPATH to
look for the slot that is relevant for us?

> +	    [ -f "$addr_file" ] || break
> +	    addr=$(cat "$addr_file" 2>/dev/null)
> +	    [ -n "$addr" ] || continue
> +	    case "$DEVICE" in
> +		    "$addr"*) SLOT=$(basename "$(dirname "$addr_file")"); break ;;
> +	    esac
> +    done
> +
> +    if [ -n "$SLOT" ]; then
> +	echo "Using slot $SLOT"
> +
> +	# Remove device
> +	echo 1 > /sys/bus/pci/devices/$DEVICE/remove
> +
> +	# Power cycle slot
> +	echo 0 > /sys/bus/pci/slots/$SLOT/power
> +	sleep 2

Is this tested on actual machine? Is there an explanation for the amount
of sleep needed that serves all cases generically?

> +	echo 1 > /sys/bus/pci/slots/$SLOT/power
> +	sleep 1

Ditto.

Raag

> +	# Rescan
> +	echo 1 > /sys/bus/pci/rescan
> +	echo "Done!"
> +    else
> +	echo "No slot found"
> +    fi
> +
>  Customization
>  -------------
>  
> -- 
> 2.34.1
> 

[PATCH v5 4/5] drm/xe: Handle PUNIT errors by requesting cold-reset recovery

[Mallesh Koujalagi]

When PUNIT (power management unit) errors are detected that persist across
warm resets, mark the device as wedged with DRM_WEDGE_RECOVERY_COLD_RESET
and notify userspace that a complete device power cycle is required to
restore normal operation.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v3:
- Use PUNIT instead of PMU. (Riana)
- Use consistent wordingi.
- Remove log. (Raag)

v4:
- Make function static. (Raag)

v5:
- Remove kdoc for static function. (Raag)
- Remove xe_ prefix for static function.
---
 drivers/gpu/drm/xe/xe_ras.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index d79f8a6589ac..604470565bf3 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -4,6 +4,8 @@
  */
 
 #include "xe_bo.h"
+#include "xe_assert.h"
+#include "xe_device_types.h"
 #include "xe_device.h"
 #include "xe_printk.h"
 #include "xe_ras.h"
@@ -222,6 +224,12 @@ static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_device *
 	return XE_RAS_RECOVERY_ACTION_RECOVERED;
 }
 
+static void punit_error_handler(struct xe_device *xe)
+{
+	xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_COLD_RESET);
+	xe_device_declare_wedged(xe);
+}
+
 static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *xe,
 							      struct xe_ras_error_array *arr)
 {
@@ -265,7 +273,7 @@ static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *
 			xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
 			       sev_to_str(error_class->common.severity),
 			       ieh_error->global_error_status);
-			/* TODO: Add PUNIT error handling */
+			punit_error_handler(xe);
 			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
 		}
 	}
-- 
2.34.1

Re: [PATCH v5 4/5] drm/xe: Handle PUNIT errors by requesting cold-reset recovery

[Raag Jadav]

On Tue, May 12, 2026 at 06:56:19PM +0530, Mallesh Koujalagi wrote:
> When PUNIT (power management unit) errors are detected that persist across
> warm resets, mark the device as wedged with DRM_WEDGE_RECOVERY_COLD_RESET
> and notify userspace that a complete device power cycle is required to
> restore normal operation.
> 
> Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>

Reviewed-by: Raag Jadav <raag.jadav@intel.com>

[PATCH v5 5/5] drm/xe: Suppress Surprise Link Down on non-hotplug device

[Mallesh Koujalagi]

If the slot is not hotplug capable, pcie_suppress_surprise_link_down()
masks the Surprise Link Down bit (PCI_ERR_UNC_SURPDN) in the USP's AER
Uncorrectable Error Mask register before punit_error_handler()
triggers the cold reset.

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/xe_ras.c | 51 +++++++++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 604470565bf3..67b4f25370c9 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -224,8 +224,59 @@ static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_device *
 	return XE_RAS_RECOVERY_ACTION_RECOVERED;
 }
 
+#ifdef CONFIG_PCIEAER
+static bool pcie_slot_is_hotplug_capable(struct pci_dev *usp)
+{
+	struct pci_dev *root_port = pci_upstream_bridge(usp);
+	u32 sltcap;
+
+	if (!root_port)
+		return false;
+
+	if (pcie_capability_read_dword(root_port, PCI_EXP_SLTCAP, &sltcap))
+		return false;
+
+	return (sltcap & (PCI_EXP_SLTCAP_HPC | PCI_EXP_SLTCAP_PCP)) ==
+		(PCI_EXP_SLTCAP_HPC | PCI_EXP_SLTCAP_PCP);
+}
+
+static void pcie_suppress_surprise_link_down(struct pci_dev *usp)
+{
+	u32 aer_uncorr_mask;
+	u16 aer_cap;
+
+	aer_cap = usp->aer_cap;
+	if (!aer_cap)
+		return;
+
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, &aer_uncorr_mask);
+	aer_uncorr_mask |= PCI_ERR_UNC_SURPDN;
+	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, aer_uncorr_mask);
+	dev_dbg(&usp->dev, "Non-hotplug slot: Surprise Link Down masked for cold reset\n");
+}
+#endif /* CONFIG_PCIEAER */
+
 static void punit_error_handler(struct xe_device *xe)
 {
+#ifdef CONFIG_PCIEAER
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	struct pci_dev *vsp, *usp;
+
+	/*
+	 * Device Hierarchy:
+	 *
+	 * Root Port --> Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit
+	 *
+	 * Cold reset power-cycles the slot, dropping the PCIe link. On a non-hotplug
+	 * slot this triggers a spurious Surprise Link Down AER event on the USP.
+	 * Suppress it if the slot is not hotplug capable.
+	 */
+	vsp = pci_upstream_bridge(pdev);
+	usp = vsp ? pci_upstream_bridge(vsp) : NULL;
+
+	if (usp && !pcie_slot_is_hotplug_capable(usp))
+		pcie_suppress_surprise_link_down(usp);
+#endif
 	xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_COLD_RESET);
 	xe_device_declare_wedged(xe);
 }
-- 
2.34.1

Re: [PATCH v5 5/5] drm/xe: Suppress Surprise Link Down on non-hotplug device

[Raag Jadav]

On Tue, May 12, 2026 at 06:56:20PM +0530, Mallesh Koujalagi wrote:
> If the slot is not hotplug capable, pcie_suppress_surprise_link_down()
> masks the Surprise Link Down bit (PCI_ERR_UNC_SURPDN) in the USP's AER
> Uncorrectable Error Mask register before punit_error_handler()
> triggers the cold reset.

Can you please elaborate on the "why" part? Is this something Intel
specific?

> Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_ras.c | 51 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 51 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 604470565bf3..67b4f25370c9 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -224,8 +224,59 @@ static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_device *
>  	return XE_RAS_RECOVERY_ACTION_RECOVERED;
>  }
>  
> +#ifdef CONFIG_PCIEAER
> +static bool pcie_slot_is_hotplug_capable(struct pci_dev *usp)

Shouldn't all of it be part of xe_pci_error.c?

> +{
> +	struct pci_dev *root_port = pci_upstream_bridge(usp);
> +	u32 sltcap;
> +
> +	if (!root_port)
> +		return false;
> +
> +	if (pcie_capability_read_dword(root_port, PCI_EXP_SLTCAP, &sltcap))
> +		return false;
> +
> +	return (sltcap & (PCI_EXP_SLTCAP_HPC | PCI_EXP_SLTCAP_PCP)) ==
> +		(PCI_EXP_SLTCAP_HPC | PCI_EXP_SLTCAP_PCP);
> +}
> +
> +static void pcie_suppress_surprise_link_down(struct pci_dev *usp)
> +{
> +	u32 aer_uncorr_mask;
> +	u16 aer_cap;
> +
> +	aer_cap = usp->aer_cap;
> +	if (!aer_cap)
> +		return;
> +
> +	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, &aer_uncorr_mask);
> +	aer_uncorr_mask |= PCI_ERR_UNC_SURPDN;
> +	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, aer_uncorr_mask);
> +	dev_dbg(&usp->dev, "Non-hotplug slot: Surprise Link Down masked for cold reset\n");

So is it required for all devices that want to use cold-reset method
generically? If yes, shouldn't this be part of recovery script or atleast
documented somewhere?

Raag

> +}
> +#endif /* CONFIG_PCIEAER */
> +
>  static void punit_error_handler(struct xe_device *xe)
>  {
> +#ifdef CONFIG_PCIEAER
> +	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +	struct pci_dev *vsp, *usp;
> +
> +	/*
> +	 * Device Hierarchy:
> +	 *
> +	 * Root Port --> Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit
> +	 *
> +	 * Cold reset power-cycles the slot, dropping the PCIe link. On a non-hotplug
> +	 * slot this triggers a spurious Surprise Link Down AER event on the USP.
> +	 * Suppress it if the slot is not hotplug capable.
> +	 */
> +	vsp = pci_upstream_bridge(pdev);
> +	usp = vsp ? pci_upstream_bridge(vsp) : NULL;
> +
> +	if (usp && !pcie_slot_is_hotplug_capable(usp))
> +		pcie_suppress_surprise_link_down(usp);
> +#endif
>  	xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_COLD_RESET);
>  	xe_device_declare_wedged(xe);
>  }
> -- 
> 2.34.1
> 

Re: [PATCH v5 5/5] drm/xe: Suppress Surprise Link Down on non-hotplug device

[Tauro, Riana]

On 5/12/2026 6:56 PM, Mallesh Koujalagi wrote:
> If the slot is not hotplug capable, pcie_suppress_surprise_link_down()
> masks the Surprise Link Down bit (PCI_ERR_UNC_SURPDN) in the USP's AER
> Uncorrectable Error Mask register before punit_error_handler()
> triggers the cold reset.
Provide more details on why. Avoid function names and macros unless 
necessary.
Make it more human readable.

>
> Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_ras.c | 51 +++++++++++++++++++++++++++++++++++++
>   1 file changed, 51 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 604470565bf3..67b4f25370c9 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -224,8 +224,59 @@ static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_device *
>   	return XE_RAS_RECOVERY_ACTION_RECOVERED;
>   }
>   
> +#ifdef CONFIG_PCIEAER
> +static bool pcie_slot_is_hotplug_capable(struct pci_dev *usp)
> +{
> +	struct pci_dev *root_port = pci_upstream_bridge(usp);
> +	u32 sltcap;
> +
> +	if (!root_port)
> +		return false;
 From the PCIe spec

"If this register is implemented but the Slot Implemented bit is Clear, 
the field behavior of this entire register is undefined."

Please check the slot implemented bit (8) in  PCI Express Capabilities 
Register before reading the slot capability register.

> +
> +	if (pcie_capability_read_dword(root_port, PCI_EXP_SLTCAP, &sltcap))
> +		return false;
> +
> +	return (sltcap & (PCI_EXP_SLTCAP_HPC | PCI_EXP_SLTCAP_PCP)) ==
> +		(PCI_EXP_SLTCAP_HPC | PCI_EXP_SLTCAP_PCP);

Do we need to check power controller here? Isn't hotpluggable denoted by
PCI_EXP_SLTCAP_HPC ?

> +}
> +
> +static void pcie_suppress_surprise_link_down(struct pci_dev *usp)
> +{
> +	u32 aer_uncorr_mask;
> +	u16 aer_cap;
> +
> +	aer_cap = usp->aer_cap;
> +	if (!aer_cap)
> +		return;
add debug log
> +
> +	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, &aer_uncorr_mask);
> +	aer_uncorr_mask |= PCI_ERR_UNC_SURPDN;
> +	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, aer_uncorr_mask);

save config space?

Thanks
Riana

> +	dev_dbg(&usp->dev, "Non-hotplug slot: Surprise Link Down masked for cold reset\n");
> +}
> +#endif /* CONFIG_PCIEAER */
> +
>   static void punit_error_handler(struct xe_device *xe)
>   {
> +#ifdef CONFIG_PCIEAER
> +	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +	struct pci_dev *vsp, *usp;
> +
> +	/*
> +	 * Device Hierarchy:
> +	 *
> +	 * Root Port --> Upstream Switch Port (USP) --> Virtual Switch Port (VSP) --> SGunit
> +	 *
> +	 * Cold reset power-cycles the slot, dropping the PCIe link. On a non-hotplug
> +	 * slot this triggers a spurious Surprise Link Down AER event on the USP.
> +	 * Suppress it if the slot is not hotplug capable.
> +	 */
> +	vsp = pci_upstream_bridge(pdev);
> +	usp = vsp ? pci_upstream_bridge(vsp) : NULL;
> +
> +	if (usp && !pcie_slot_is_hotplug_capable(usp))
> +		pcie_suppress_surprise_link_down(usp);
> +#endif
>   	xe_device_set_wedged_method(xe, DRM_WEDGE_RECOVERY_COLD_RESET);
>   	xe_device_declare_wedged(xe);
>   }

✗ CI.checkpatch: warning for Introduce cold reset recovery method (rev4)

[Patchwork]

== Series Details ==

Series: Introduce cold reset recovery method (rev4)
URL   : https://patchwork.freedesktop.org/series/163428/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit a79d5bd93252dadcce27348c33a788bc65101732
Author: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Date:   Tue May 12 18:56:20 2026 +0530

    drm/xe: Suppress Surprise Link Down on non-hotplug device
    
    If the slot is not hotplug capable, pcie_suppress_surprise_link_down()
    masks the Surprise Link Down bit (PCI_ERR_UNC_SURPDN) in the USP's AER
    Uncorrectable Error Mask register before punit_error_handler()
    triggers the cold reset.
    
    Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
+ /mt/dim checkpatch 161329a551bb5ebd34524b781cd7fb3d84b994be drm-intel
a5017d918bd9 Introduce Xe Uncorrectable Error Handling
-:251: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#251: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 1175 lines checked
da3ec0ffd6c7 drm: Add DRM_WEDGE_RECOVERY_COLD_RESET recovery method
6dabe53ee46a drm/doc: Document DRM_WEDGE_RECOVERY_COLD_RESET recovery method
e3fceda65961 drm/xe: Handle PUNIT errors by requesting cold-reset recovery
a79d5bd93252 drm/xe: Suppress Surprise Link Down on non-hotplug device

✓ CI.KUnit: success for Introduce cold reset recovery method (rev4)

[Patchwork]

== Series Details ==

Series: Introduce cold reset recovery method (rev4)
URL   : https://patchwork.freedesktop.org/series/163428/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:01:50] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:01:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:02:25] Starting KUnit Kernel (1/1)...
[20:02:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:02:25] ================== guc_buf (11 subtests) ===================
[20:02:25] [PASSED] test_smallest
[20:02:25] [PASSED] test_largest
[20:02:25] [PASSED] test_granular
[20:02:25] [PASSED] test_unique
[20:02:25] [PASSED] test_overlap
[20:02:25] [PASSED] test_reusable
[20:02:25] [PASSED] test_too_big
[20:02:25] [PASSED] test_flush
[20:02:25] [PASSED] test_lookup
[20:02:25] [PASSED] test_data
[20:02:25] [PASSED] test_class
[20:02:25] ===================== [PASSED] guc_buf =====================
[20:02:25] =================== guc_dbm (7 subtests) ===================
[20:02:25] [PASSED] test_empty
[20:02:25] [PASSED] test_default
[20:02:25] ======================== test_size  ========================
[20:02:25] [PASSED] 4
[20:02:25] [PASSED] 8
[20:02:25] [PASSED] 32
[20:02:25] [PASSED] 256
[20:02:25] ==================== [PASSED] test_size ====================
[20:02:25] ======================= test_reuse  ========================
[20:02:25] [PASSED] 4
[20:02:25] [PASSED] 8
[20:02:25] [PASSED] 32
[20:02:25] [PASSED] 256
[20:02:25] =================== [PASSED] test_reuse ====================
[20:02:25] =================== test_range_overlap  ====================
[20:02:25] [PASSED] 4
[20:02:25] [PASSED] 8
[20:02:25] [PASSED] 32
[20:02:25] [PASSED] 256
[20:02:25] =============== [PASSED] test_range_overlap ================
[20:02:25] =================== test_range_compact  ====================
[20:02:25] [PASSED] 4
[20:02:25] [PASSED] 8
[20:02:25] [PASSED] 32
[20:02:25] [PASSED] 256
[20:02:25] =============== [PASSED] test_range_compact ================
[20:02:25] ==================== test_range_spare  =====================
[20:02:25] [PASSED] 4
[20:02:25] [PASSED] 8
[20:02:25] [PASSED] 32
[20:02:25] [PASSED] 256
[20:02:25] ================ [PASSED] test_range_spare =================
[20:02:25] ===================== [PASSED] guc_dbm =====================
[20:02:25] =================== guc_idm (6 subtests) ===================
[20:02:25] [PASSED] bad_init
[20:02:25] [PASSED] no_init
[20:02:25] [PASSED] init_fini
[20:02:25] [PASSED] check_used
[20:02:25] [PASSED] check_quota
[20:02:25] [PASSED] check_all
[20:02:25] ===================== [PASSED] guc_idm =====================
[20:02:25] ================== no_relay (3 subtests) ===================
[20:02:25] [PASSED] xe_drops_guc2pf_if_not_ready
[20:02:25] [PASSED] xe_drops_guc2vf_if_not_ready
[20:02:25] [PASSED] xe_rejects_send_if_not_ready
[20:02:25] ==================== [PASSED] no_relay =====================
[20:02:25] ================== pf_relay (14 subtests) ==================
[20:02:25] [PASSED] pf_rejects_guc2pf_too_short
[20:02:25] [PASSED] pf_rejects_guc2pf_too_long
[20:02:25] [PASSED] pf_rejects_guc2pf_no_payload
[20:02:25] [PASSED] pf_fails_no_payload
[20:02:25] [PASSED] pf_fails_bad_origin
[20:02:25] [PASSED] pf_fails_bad_type
[20:02:25] [PASSED] pf_txn_reports_error
[20:02:25] [PASSED] pf_txn_sends_pf2guc
[20:02:25] [PASSED] pf_sends_pf2guc
[20:02:25] [SKIPPED] pf_loopback_nop
[20:02:25] [SKIPPED] pf_loopback_echo
[20:02:25] [SKIPPED] pf_loopback_fail
[20:02:25] [SKIPPED] pf_loopback_busy
[20:02:25] [SKIPPED] pf_loopback_retry
[20:02:25] ==================== [PASSED] pf_relay =====================
[20:02:25] ================== vf_relay (3 subtests) ===================
[20:02:25] [PASSED] vf_rejects_guc2vf_too_short
[20:02:25] [PASSED] vf_rejects_guc2vf_too_long
[20:02:25] [PASSED] vf_rejects_guc2vf_no_payload
[20:02:25] ==================== [PASSED] vf_relay =====================
[20:02:25] ================ pf_gt_config (9 subtests) =================
[20:02:25] [PASSED] fair_contexts_1vf
[20:02:25] [PASSED] fair_doorbells_1vf
[20:02:25] [PASSED] fair_ggtt_1vf
[20:02:25] ====================== fair_vram_1vf  ======================
[20:02:25] [PASSED] 3.50 GiB
[20:02:25] [PASSED] 11.5 GiB
[20:02:25] [PASSED] 15.5 GiB
[20:02:25] [PASSED] 31.5 GiB
[20:02:25] [PASSED] 63.5 GiB
[20:02:25] [PASSED] 1.91 GiB
[20:02:25] ================== [PASSED] fair_vram_1vf ==================
[20:02:25] ================ fair_vram_1vf_admin_only  =================
[20:02:25] [PASSED] 3.50 GiB
[20:02:25] [PASSED] 11.5 GiB
[20:02:25] [PASSED] 15.5 GiB
[20:02:25] [PASSED] 31.5 GiB
[20:02:25] [PASSED] 63.5 GiB
[20:02:25] [PASSED] 1.91 GiB
[20:02:25] ============ [PASSED] fair_vram_1vf_admin_only =============
[20:02:25] ====================== fair_contexts  ======================
[20:02:25] [PASSED] 1 VF
[20:02:25] [PASSED] 2 VFs
[20:02:25] [PASSED] 3 VFs
[20:02:25] [PASSED] 4 VFs
[20:02:25] [PASSED] 5 VFs
[20:02:25] [PASSED] 6 VFs
[20:02:25] [PASSED] 7 VFs
[20:02:25] [PASSED] 8 VFs
[20:02:25] [PASSED] 9 VFs
[20:02:25] [PASSED] 10 VFs
[20:02:25] [PASSED] 11 VFs
[20:02:25] [PASSED] 12 VFs
[20:02:25] [PASSED] 13 VFs
[20:02:25] [PASSED] 14 VFs
[20:02:25] [PASSED] 15 VFs
[20:02:25] [PASSED] 16 VFs
[20:02:25] [PASSED] 17 VFs
[20:02:25] [PASSED] 18 VFs
[20:02:25] [PASSED] 19 VFs
[20:02:25] [PASSED] 20 VFs
[20:02:26] [PASSED] 21 VFs
[20:02:26] [PASSED] 22 VFs
[20:02:26] [PASSED] 23 VFs
[20:02:26] [PASSED] 24 VFs
[20:02:26] [PASSED] 25 VFs
[20:02:26] [PASSED] 26 VFs
[20:02:26] [PASSED] 27 VFs
[20:02:26] [PASSED] 28 VFs
[20:02:26] [PASSED] 29 VFs
[20:02:26] [PASSED] 30 VFs
[20:02:26] [PASSED] 31 VFs
[20:02:26] [PASSED] 32 VFs
[20:02:26] [PASSED] 33 VFs
[20:02:26] [PASSED] 34 VFs
[20:02:26] [PASSED] 35 VFs
[20:02:26] [PASSED] 36 VFs
[20:02:26] [PASSED] 37 VFs
[20:02:26] [PASSED] 38 VFs
[20:02:26] [PASSED] 39 VFs
[20:02:26] [PASSED] 40 VFs
[20:02:26] [PASSED] 41 VFs
[20:02:26] [PASSED] 42 VFs
[20:02:26] [PASSED] 43 VFs
[20:02:26] [PASSED] 44 VFs
[20:02:26] [PASSED] 45 VFs
[20:02:26] [PASSED] 46 VFs
[20:02:26] [PASSED] 47 VFs
[20:02:26] [PASSED] 48 VFs
[20:02:26] [PASSED] 49 VFs
[20:02:26] [PASSED] 50 VFs
[20:02:26] [PASSED] 51 VFs
[20:02:26] [PASSED] 52 VFs
[20:02:26] [PASSED] 53 VFs
[20:02:26] [PASSED] 54 VFs
[20:02:26] [PASSED] 55 VFs
[20:02:26] [PASSED] 56 VFs
[20:02:26] [PASSED] 57 VFs
[20:02:26] [PASSED] 58 VFs
[20:02:26] [PASSED] 59 VFs
[20:02:26] [PASSED] 60 VFs
[20:02:26] [PASSED] 61 VFs
[20:02:26] [PASSED] 62 VFs
[20:02:26] [PASSED] 63 VFs
[20:02:26] ================== [PASSED] fair_contexts ==================
[20:02:26] ===================== fair_doorbells  ======================
[20:02:26] [PASSED] 1 VF
[20:02:26] [PASSED] 2 VFs
[20:02:26] [PASSED] 3 VFs
[20:02:26] [PASSED] 4 VFs
[20:02:26] [PASSED] 5 VFs
[20:02:26] [PASSED] 6 VFs
[20:02:26] [PASSED] 7 VFs
[20:02:26] [PASSED] 8 VFs
[20:02:26] [PASSED] 9 VFs
[20:02:26] [PASSED] 10 VFs
[20:02:26] [PASSED] 11 VFs
[20:02:26] [PASSED] 12 VFs
[20:02:26] [PASSED] 13 VFs
[20:02:26] [PASSED] 14 VFs
[20:02:26] [PASSED] 15 VFs
[20:02:26] [PASSED] 16 VFs
[20:02:26] [PASSED] 17 VFs
[20:02:26] [PASSED] 18 VFs
[20:02:26] [PASSED] 19 VFs
[20:02:26] [PASSED] 20 VFs
[20:02:26] [PASSED] 21 VFs
[20:02:26] [PASSED] 22 VFs
[20:02:26] [PASSED] 23 VFs
[20:02:26] [PASSED] 24 VFs
[20:02:26] [PASSED] 25 VFs
[20:02:26] [PASSED] 26 VFs
[20:02:26] [PASSED] 27 VFs
[20:02:26] [PASSED] 28 VFs
[20:02:26] [PASSED] 29 VFs
[20:02:26] [PASSED] 30 VFs
[20:02:26] [PASSED] 31 VFs
[20:02:26] [PASSED] 32 VFs
[20:02:26] [PASSED] 33 VFs
[20:02:26] [PASSED] 34 VFs
[20:02:26] [PASSED] 35 VFs
[20:02:26] [PASSED] 36 VFs
[20:02:26] [PASSED] 37 VFs
[20:02:26] [PASSED] 38 VFs
[20:02:26] [PASSED] 39 VFs
[20:02:26] [PASSED] 40 VFs
[20:02:26] [PASSED] 41 VFs
[20:02:26] [PASSED] 42 VFs
[20:02:26] [PASSED] 43 VFs
[20:02:26] [PASSED] 44 VFs
[20:02:26] [PASSED] 45 VFs
[20:02:26] [PASSED] 46 VFs
[20:02:26] [PASSED] 47 VFs
[20:02:26] [PASSED] 48 VFs
[20:02:26] [PASSED] 49 VFs
[20:02:26] [PASSED] 50 VFs
[20:02:26] [PASSED] 51 VFs
[20:02:26] [PASSED] 52 VFs
[20:02:26] [PASSED] 53 VFs
[20:02:26] [PASSED] 54 VFs
[20:02:26] [PASSED] 55 VFs
[20:02:26] [PASSED] 56 VFs
[20:02:26] [PASSED] 57 VFs
[20:02:26] [PASSED] 58 VFs
[20:02:26] [PASSED] 59 VFs
[20:02:26] [PASSED] 60 VFs
[20:02:26] [PASSED] 61 VFs
[20:02:26] [PASSED] 62 VFs
[20:02:26] [PASSED] 63 VFs
[20:02:26] ================= [PASSED] fair_doorbells ==================
[20:02:26] ======================== fair_ggtt  ========================
[20:02:26] [PASSED] 1 VF
[20:02:26] [PASSED] 2 VFs
[20:02:26] [PASSED] 3 VFs
[20:02:26] [PASSED] 4 VFs
[20:02:26] [PASSED] 5 VFs
[20:02:26] [PASSED] 6 VFs
[20:02:26] [PASSED] 7 VFs
[20:02:26] [PASSED] 8 VFs
[20:02:26] [PASSED] 9 VFs
[20:02:26] [PASSED] 10 VFs
[20:02:26] [PASSED] 11 VFs
[20:02:26] [PASSED] 12 VFs
[20:02:26] [PASSED] 13 VFs
[20:02:26] [PASSED] 14 VFs
[20:02:26] [PASSED] 15 VFs
[20:02:26] [PASSED] 16 VFs
[20:02:26] [PASSED] 17 VFs
[20:02:26] [PASSED] 18 VFs
[20:02:26] [PASSED] 19 VFs
[20:02:26] [PASSED] 20 VFs
[20:02:26] [PASSED] 21 VFs
[20:02:26] [PASSED] 22 VFs
[20:02:26] [PASSED] 23 VFs
[20:02:26] [PASSED] 24 VFs
[20:02:26] [PASSED] 25 VFs
[20:02:26] [PASSED] 26 VFs
[20:02:26] [PASSED] 27 VFs
[20:02:26] [PASSED] 28 VFs
[20:02:26] [PASSED] 29 VFs
[20:02:26] [PASSED] 30 VFs
[20:02:26] [PASSED] 31 VFs
[20:02:26] [PASSED] 32 VFs
[20:02:26] [PASSED] 33 VFs
[20:02:26] [PASSED] 34 VFs
[20:02:26] [PASSED] 35 VFs
[20:02:26] [PASSED] 36 VFs
[20:02:26] [PASSED] 37 VFs
[20:02:26] [PASSED] 38 VFs
[20:02:26] [PASSED] 39 VFs
[20:02:26] [PASSED] 40 VFs
[20:02:26] [PASSED] 41 VFs
[20:02:26] [PASSED] 42 VFs
[20:02:26] [PASSED] 43 VFs
[20:02:26] [PASSED] 44 VFs
[20:02:26] [PASSED] 45 VFs
[20:02:26] [PASSED] 46 VFs
[20:02:26] [PASSED] 47 VFs
[20:02:26] [PASSED] 48 VFs
[20:02:26] [PASSED] 49 VFs
[20:02:26] [PASSED] 50 VFs
[20:02:26] [PASSED] 51 VFs
[20:02:26] [PASSED] 52 VFs
[20:02:26] [PASSED] 53 VFs
[20:02:26] [PASSED] 54 VFs
[20:02:26] [PASSED] 55 VFs
[20:02:26] [PASSED] 56 VFs
[20:02:26] [PASSED] 57 VFs
[20:02:26] [PASSED] 58 VFs
[20:02:26] [PASSED] 59 VFs
[20:02:26] [PASSED] 60 VFs
[20:02:26] [PASSED] 61 VFs
[20:02:26] [PASSED] 62 VFs
[20:02:26] [PASSED] 63 VFs
[20:02:26] ==================== [PASSED] fair_ggtt ====================
[20:02:26] ======================== fair_vram  ========================
[20:02:26] [PASSED] 1 VF
[20:02:26] [PASSED] 2 VFs
[20:02:26] [PASSED] 3 VFs
[20:02:26] [PASSED] 4 VFs
[20:02:26] [PASSED] 5 VFs
[20:02:26] [PASSED] 6 VFs
[20:02:26] [PASSED] 7 VFs
[20:02:26] [PASSED] 8 VFs
[20:02:26] [PASSED] 9 VFs
[20:02:26] [PASSED] 10 VFs
[20:02:26] [PASSED] 11 VFs
[20:02:26] [PASSED] 12 VFs
[20:02:26] [PASSED] 13 VFs
[20:02:26] [PASSED] 14 VFs
[20:02:26] [PASSED] 15 VFs
[20:02:26] [PASSED] 16 VFs
[20:02:26] [PASSED] 17 VFs
[20:02:26] [PASSED] 18 VFs
[20:02:26] [PASSED] 19 VFs
[20:02:26] [PASSED] 20 VFs
[20:02:26] [PASSED] 21 VFs
[20:02:26] [PASSED] 22 VFs
[20:02:26] [PASSED] 23 VFs
[20:02:26] [PASSED] 24 VFs
[20:02:26] [PASSED] 25 VFs
[20:02:26] [PASSED] 26 VFs
[20:02:26] [PASSED] 27 VFs
[20:02:26] [PASSED] 28 VFs
[20:02:26] [PASSED] 29 VFs
[20:02:26] [PASSED] 30 VFs
[20:02:26] [PASSED] 31 VFs
[20:02:26] [PASSED] 32 VFs
[20:02:26] [PASSED] 33 VFs
[20:02:26] [PASSED] 34 VFs
[20:02:26] [PASSED] 35 VFs
[20:02:26] [PASSED] 36 VFs
[20:02:26] [PASSED] 37 VFs
[20:02:26] [PASSED] 38 VFs
[20:02:26] [PASSED] 39 VFs
[20:02:26] [PASSED] 40 VFs
[20:02:26] [PASSED] 41 VFs
[20:02:26] [PASSED] 42 VFs
[20:02:26] [PASSED] 43 VFs
[20:02:26] [PASSED] 44 VFs
[20:02:26] [PASSED] 45 VFs
[20:02:26] [PASSED] 46 VFs
[20:02:26] [PASSED] 47 VFs
[20:02:26] [PASSED] 48 VFs
[20:02:26] [PASSED] 49 VFs
[20:02:26] [PASSED] 50 VFs
[20:02:26] [PASSED] 51 VFs
[20:02:26] [PASSED] 52 VFs
[20:02:26] [PASSED] 53 VFs
[20:02:26] [PASSED] 54 VFs
[20:02:26] [PASSED] 55 VFs
[20:02:26] [PASSED] 56 VFs
[20:02:26] [PASSED] 57 VFs
[20:02:26] [PASSED] 58 VFs
[20:02:26] [PASSED] 59 VFs
[20:02:26] [PASSED] 60 VFs
[20:02:26] [PASSED] 61 VFs
[20:02:26] [PASSED] 62 VFs
[20:02:26] [PASSED] 63 VFs
[20:02:26] ==================== [PASSED] fair_vram ====================
[20:02:26] ================== [PASSED] pf_gt_config ===================
[20:02:26] ===================== lmtt (1 subtest) =====================
[20:02:26] ======================== test_ops  =========================
[20:02:26] [PASSED] 2-level
[20:02:26] [PASSED] multi-level
[20:02:26] ==================== [PASSED] test_ops =====================
[20:02:26] ====================== [PASSED] lmtt =======================
[20:02:26] ================= pf_service (11 subtests) =================
[20:02:26] [PASSED] pf_negotiate_any
[20:02:26] [PASSED] pf_negotiate_base_match
[20:02:26] [PASSED] pf_negotiate_base_newer
[20:02:26] [PASSED] pf_negotiate_base_next
[20:02:26] [SKIPPED] pf_negotiate_base_older
[20:02:26] [PASSED] pf_negotiate_base_prev
[20:02:26] [PASSED] pf_negotiate_latest_match
[20:02:26] [PASSED] pf_negotiate_latest_newer
[20:02:26] [PASSED] pf_negotiate_latest_next
[20:02:26] [SKIPPED] pf_negotiate_latest_older
[20:02:26] [SKIPPED] pf_negotiate_latest_prev
[20:02:26] =================== [PASSED] pf_service ====================
[20:02:26] ================= xe_guc_g2g (2 subtests) ==================
[20:02:26] ============== xe_live_guc_g2g_kunit_default  ==============
[20:02:26] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[20:02:26] ============== xe_live_guc_g2g_kunit_allmem  ===============
[20:02:26] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[20:02:26] =================== [SKIPPED] xe_guc_g2g ===================
[20:02:26] =================== xe_mocs (2 subtests) ===================
[20:02:26] ================ xe_live_mocs_kernel_kunit  ================
[20:02:26] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:02:26] ================ xe_live_mocs_reset_kunit  =================
[20:02:26] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:02:26] ==================== [SKIPPED] xe_mocs =====================
[20:02:26] ================= xe_migrate (2 subtests) ==================
[20:02:26] ================= xe_migrate_sanity_kunit  =================
[20:02:26] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:02:26] ================== xe_validate_ccs_kunit  ==================
[20:02:26] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:02:26] =================== [SKIPPED] xe_migrate ===================
[20:02:26] ================== xe_dma_buf (1 subtest) ==================
[20:02:26] ==================== xe_dma_buf_kunit  =====================
[20:02:26] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:02:26] =================== [SKIPPED] xe_dma_buf ===================
[20:02:26] ================= xe_bo_shrink (1 subtest) =================
[20:02:26] =================== xe_bo_shrink_kunit  ====================
[20:02:26] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:02:26] ================== [SKIPPED] xe_bo_shrink ==================
[20:02:26] ==================== xe_bo (2 subtests) ====================
[20:02:26] ================== xe_ccs_migrate_kunit  ===================
[20:02:26] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:02:26] ==================== xe_bo_evict_kunit  ====================
[20:02:26] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:02:26] ===================== [SKIPPED] xe_bo ======================
[20:02:26] ==================== args (13 subtests) ====================
[20:02:26] [PASSED] count_args_test
[20:02:26] [PASSED] call_args_example
[20:02:26] [PASSED] call_args_test
[20:02:26] [PASSED] drop_first_arg_example
[20:02:26] [PASSED] drop_first_arg_test
[20:02:26] [PASSED] first_arg_example
[20:02:26] [PASSED] first_arg_test
[20:02:26] [PASSED] last_arg_example
[20:02:26] [PASSED] last_arg_test
[20:02:26] [PASSED] pick_arg_example
[20:02:26] [PASSED] if_args_example
[20:02:26] [PASSED] if_args_test
[20:02:26] [PASSED] sep_comma_example
[20:02:26] ====================== [PASSED] args =======================
[20:02:26] =================== xe_pci (3 subtests) ====================
[20:02:26] ==================== check_graphics_ip  ====================
[20:02:26] [PASSED] 12.00 Xe_LP
[20:02:26] [PASSED] 12.10 Xe_LP+
[20:02:26] [PASSED] 12.55 Xe_HPG
[20:02:26] [PASSED] 12.60 Xe_HPC
[20:02:26] [PASSED] 12.70 Xe_LPG
[20:02:26] [PASSED] 12.71 Xe_LPG
[20:02:26] [PASSED] 12.74 Xe_LPG+
[20:02:26] [PASSED] 20.01 Xe2_HPG
[20:02:26] [PASSED] 20.02 Xe2_HPG
[20:02:26] [PASSED] 20.04 Xe2_LPG
[20:02:26] [PASSED] 30.00 Xe3_LPG
[20:02:26] [PASSED] 30.01 Xe3_LPG
[20:02:26] [PASSED] 30.03 Xe3_LPG
[20:02:26] [PASSED] 30.04 Xe3_LPG
[20:02:26] [PASSED] 30.05 Xe3_LPG
[20:02:26] [PASSED] 35.10 Xe3p_LPG
[20:02:26] [PASSED] 35.11 Xe3p_XPC
[20:02:26] ================ [PASSED] check_graphics_ip ================
[20:02:26] ===================== check_media_ip  ======================
[20:02:26] [PASSED] 12.00 Xe_M
[20:02:26] [PASSED] 12.55 Xe_HPM
[20:02:26] [PASSED] 13.00 Xe_LPM+
[20:02:26] [PASSED] 13.01 Xe2_HPM
[20:02:26] [PASSED] 20.00 Xe2_LPM
[20:02:26] [PASSED] 30.00 Xe3_LPM
[20:02:26] [PASSED] 30.02 Xe3_LPM
[20:02:26] [PASSED] 35.00 Xe3p_LPM
[20:02:26] [PASSED] 35.03 Xe3p_HPM
[20:02:26] ================= [PASSED] check_media_ip ==================
[20:02:26] =================== check_platform_desc  ===================
[20:02:26] [PASSED] 0x9A60 (TIGERLAKE)
[20:02:26] [PASSED] 0x9A68 (TIGERLAKE)
[20:02:26] [PASSED] 0x9A70 (TIGERLAKE)
[20:02:26] [PASSED] 0x9A40 (TIGERLAKE)
[20:02:26] [PASSED] 0x9A49 (TIGERLAKE)
[20:02:26] [PASSED] 0x9A59 (TIGERLAKE)
[20:02:26] [PASSED] 0x9A78 (TIGERLAKE)
[20:02:26] [PASSED] 0x9AC0 (TIGERLAKE)
[20:02:26] [PASSED] 0x9AC9 (TIGERLAKE)
[20:02:26] [PASSED] 0x9AD9 (TIGERLAKE)
[20:02:26] [PASSED] 0x9AF8 (TIGERLAKE)
[20:02:26] [PASSED] 0x4C80 (ROCKETLAKE)
[20:02:26] [PASSED] 0x4C8A (ROCKETLAKE)
[20:02:26] [PASSED] 0x4C8B (ROCKETLAKE)
[20:02:26] [PASSED] 0x4C8C (ROCKETLAKE)
[20:02:26] [PASSED] 0x4C90 (ROCKETLAKE)
[20:02:26] [PASSED] 0x4C9A (ROCKETLAKE)
[20:02:26] [PASSED] 0x4680 (ALDERLAKE_S)
[20:02:26] [PASSED] 0x4682 (ALDERLAKE_S)
[20:02:26] [PASSED] 0x4688 (ALDERLAKE_S)
[20:02:26] [PASSED] 0x468A (ALDERLAKE_S)
[20:02:26] [PASSED] 0x468B (ALDERLAKE_S)
[20:02:26] [PASSED] 0x4690 (ALDERLAKE_S)
[20:02:26] [PASSED] 0x4692 (ALDERLAKE_S)
[20:02:26] [PASSED] 0x4693 (ALDERLAKE_S)
[20:02:26] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46AA (ALDERLAKE_P)
[20:02:26] [PASSED] 0x462A (ALDERLAKE_P)
[20:02:26] [PASSED] 0x4626 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x4628 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46B0 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:02:26] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:02:26] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:02:26] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:02:26] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:02:26] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:02:26] [PASSED] 0xA721 (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA720 (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:02:26] [PASSED] 0xA780 (ALDERLAKE_S)
[20:02:26] [PASSED] 0xA781 (ALDERLAKE_S)
[20:02:26] [PASSED] 0xA782 (ALDERLAKE_S)
[20:02:26] [PASSED] 0xA783 (ALDERLAKE_S)
[20:02:26] [PASSED] 0xA788 (ALDERLAKE_S)
[20:02:26] [PASSED] 0xA789 (ALDERLAKE_S)
[20:02:26] [PASSED] 0xA78A (ALDERLAKE_S)
[20:02:26] [PASSED] 0xA78B (ALDERLAKE_S)
[20:02:26] [PASSED] 0x4905 (DG1)
[20:02:26] [PASSED] 0x4906 (DG1)
[20:02:26] [PASSED] 0x4907 (DG1)
[20:02:26] [PASSED] 0x4908 (DG1)
[20:02:26] [PASSED] 0x4909 (DG1)
[20:02:26] [PASSED] 0x56C0 (DG2)
[20:02:26] [PASSED] 0x56C2 (DG2)
[20:02:26] [PASSED] 0x56C1 (DG2)
[20:02:26] [PASSED] 0x7D51 (METEORLAKE)
[20:02:26] [PASSED] 0x7DD1 (METEORLAKE)
[20:02:26] [PASSED] 0x7D41 (METEORLAKE)
[20:02:26] [PASSED] 0x7D67 (METEORLAKE)
[20:02:26] [PASSED] 0xB640 (METEORLAKE)
[20:02:26] [PASSED] 0x56A0 (DG2)
[20:02:26] [PASSED] 0x56A1 (DG2)
[20:02:26] [PASSED] 0x56A2 (DG2)
[20:02:26] [PASSED] 0x56BE (DG2)
[20:02:26] [PASSED] 0x56BF (DG2)
[20:02:26] [PASSED] 0x5690 (DG2)
[20:02:26] [PASSED] 0x5691 (DG2)
[20:02:26] [PASSED] 0x5692 (DG2)
[20:02:26] [PASSED] 0x56A5 (DG2)
[20:02:26] [PASSED] 0x56A6 (DG2)
[20:02:26] [PASSED] 0x56B0 (DG2)
[20:02:26] [PASSED] 0x56B1 (DG2)
[20:02:26] [PASSED] 0x56BA (DG2)
[20:02:26] [PASSED] 0x56BB (DG2)
[20:02:26] [PASSED] 0x56BC (DG2)
[20:02:26] [PASSED] 0x56BD (DG2)
[20:02:26] [PASSED] 0x5693 (DG2)
[20:02:26] [PASSED] 0x5694 (DG2)
[20:02:26] [PASSED] 0x5695 (DG2)
[20:02:26] [PASSED] 0x56A3 (DG2)
[20:02:26] [PASSED] 0x56A4 (DG2)
[20:02:26] [PASSED] 0x56B2 (DG2)
[20:02:26] [PASSED] 0x56B3 (DG2)
[20:02:26] [PASSED] 0x5696 (DG2)
[20:02:26] [PASSED] 0x5697 (DG2)
[20:02:26] [PASSED] 0xB69 (PVC)
[20:02:26] [PASSED] 0xB6E (PVC)
[20:02:26] [PASSED] 0xBD4 (PVC)
[20:02:26] [PASSED] 0xBD5 (PVC)
[20:02:26] [PASSED] 0xBD6 (PVC)
[20:02:26] [PASSED] 0xBD7 (PVC)
[20:02:26] [PASSED] 0xBD8 (PVC)
[20:02:26] [PASSED] 0xBD9 (PVC)
[20:02:26] [PASSED] 0xBDA (PVC)
[20:02:26] [PASSED] 0xBDB (PVC)
[20:02:26] [PASSED] 0xBE0 (PVC)
[20:02:26] [PASSED] 0xBE1 (PVC)
[20:02:26] [PASSED] 0xBE5 (PVC)
[20:02:26] [PASSED] 0x7D40 (METEORLAKE)
[20:02:26] [PASSED] 0x7D45 (METEORLAKE)
[20:02:26] [PASSED] 0x7D55 (METEORLAKE)
[20:02:26] [PASSED] 0x7D60 (METEORLAKE)
[20:02:26] [PASSED] 0x7DD5 (METEORLAKE)
[20:02:26] [PASSED] 0x6420 (LUNARLAKE)
[20:02:26] [PASSED] 0x64A0 (LUNARLAKE)
[20:02:26] [PASSED] 0x64B0 (LUNARLAKE)
[20:02:26] [PASSED] 0xE202 (BATTLEMAGE)
[20:02:26] [PASSED] 0xE209 (BATTLEMAGE)
[20:02:26] [PASSED] 0xE20B (BATTLEMAGE)
[20:02:26] [PASSED] 0xE20C (BATTLEMAGE)
[20:02:26] [PASSED] 0xE20D (BATTLEMAGE)
[20:02:26] [PASSED] 0xE210 (BATTLEMAGE)
[20:02:26] [PASSED] 0xE211 (BATTLEMAGE)
[20:02:26] [PASSED] 0xE212 (BATTLEMAGE)
[20:02:26] [PASSED] 0xE216 (BATTLEMAGE)
[20:02:26] [PASSED] 0xE220 (BATTLEMAGE)
[20:02:26] [PASSED] 0xE221 (BATTLEMAGE)
[20:02:26] [PASSED] 0xE222 (BATTLEMAGE)
[20:02:26] [PASSED] 0xE223 (BATTLEMAGE)
[20:02:26] [PASSED] 0xB080 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB081 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB082 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB083 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB084 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB085 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB086 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB087 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB08F (PANTHERLAKE)
[20:02:26] [PASSED] 0xB090 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:02:26] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:02:26] [PASSED] 0xFD80 (PANTHERLAKE)
[20:02:26] [PASSED] 0xFD81 (PANTHERLAKE)
[20:02:26] [PASSED] 0xD740 (NOVALAKE_S)
[20:02:26] [PASSED] 0xD741 (NOVALAKE_S)
[20:02:26] [PASSED] 0xD742 (NOVALAKE_S)
[20:02:26] [PASSED] 0xD743 (NOVALAKE_S)
[20:02:26] [PASSED] 0xD744 (NOVALAKE_S)
[20:02:26] [PASSED] 0xD745 (NOVALAKE_S)
[20:02:26] [PASSED] 0x674C (CRESCENTISLAND)
[20:02:26] [PASSED] 0x674D (CRESCENTISLAND)
[20:02:26] [PASSED] 0x674E (CRESCENTISLAND)
[20:02:26] [PASSED] 0x674F (CRESCENTISLAND)
[20:02:26] [PASSED] 0x6750 (CRESCENTISLAND)
[20:02:26] [PASSED] 0xD750 (NOVALAKE_P)
[20:02:26] [PASSED] 0xD751 (NOVALAKE_P)
[20:02:26] [PASSED] 0xD752 (NOVALAKE_P)
[20:02:26] [PASSED] 0xD753 (NOVALAKE_P)
[20:02:26] [PASSED] 0xD754 (NOVALAKE_P)
[20:02:26] [PASSED] 0xD755 (NOVALAKE_P)
[20:02:26] [PASSED] 0xD756 (NOVALAKE_P)
[20:02:26] [PASSED] 0xD757 (NOVALAKE_P)
[20:02:26] [PASSED] 0xD75F (NOVALAKE_P)
[20:02:26] =============== [PASSED] check_platform_desc ===============
[20:02:26] ===================== [PASSED] xe_pci ======================
[20:02:26] =================== xe_rtp (2 subtests) ====================
[20:02:26] =============== xe_rtp_process_to_sr_tests  ================
[20:02:26] [PASSED] coalesce-same-reg
[20:02:26] [PASSED] no-match-no-add
[20:02:26] [PASSED] match-or
[20:02:26] [PASSED] match-or-xfail
[20:02:26] [PASSED] no-match-no-add-multiple-rules
[20:02:26] [PASSED] two-regs-two-entries
[20:02:26] [PASSED] clr-one-set-other
[20:02:26] [PASSED] set-field
[20:02:26] [PASSED] conflict-duplicate
[20:02:26] [PASSED] conflict-not-disjoint
[20:02:26] [PASSED] conflict-reg-type
[20:02:26] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:02:26] ================== xe_rtp_process_tests  ===================
[20:02:26] [PASSED] active1
[20:02:26] [PASSED] active2
[20:02:26] [PASSED] active-inactive
[20:02:26] [PASSED] inactive-active
[20:02:26] [PASSED] inactive-1st_or_active-inactive
[20:02:26] [PASSED] inactive-2nd_or_active-inactive
[20:02:26] [PASSED] inactive-last_or_active-inactive
[20:02:26] [PASSED] inactive-no_or_active-inactive
[20:02:26] ============== [PASSED] xe_rtp_process_tests ===============
[20:02:26] ===================== [PASSED] xe_rtp ======================
[20:02:26] ==================== xe_wa (1 subtest) =====================
[20:02:26] ======================== xe_wa_gt  =========================
[20:02:26] [PASSED] TIGERLAKE B0
[20:02:26] [PASSED] DG1 A0
[20:02:26] [PASSED] DG1 B0
[20:02:26] [PASSED] ALDERLAKE_S A0
[20:02:26] [PASSED] ALDERLAKE_S B0
[20:02:26] [PASSED] ALDERLAKE_S C0
[20:02:26] [PASSED] ALDERLAKE_S D0
[20:02:26] [PASSED] ALDERLAKE_P A0
[20:02:26] [PASSED] ALDERLAKE_P B0
[20:02:26] [PASSED] ALDERLAKE_P C0
[20:02:26] [PASSED] ALDERLAKE_S RPLS D0
[20:02:26] [PASSED] ALDERLAKE_P RPLU E0
[20:02:26] [PASSED] DG2 G10 C0
[20:02:26] [PASSED] DG2 G11 B1
[20:02:26] [PASSED] DG2 G12 A1
[20:02:26] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:02:26] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:02:26] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[20:02:26] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[20:02:26] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[20:02:26] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[20:02:26] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[20:02:26] ==================== [PASSED] xe_wa_gt =====================
[20:02:26] ====================== [PASSED] xe_wa ======================
[20:02:26] ============================================================
[20:02:26] Testing complete. Ran 601 tests: passed: 583, skipped: 18
[20:02:26] Elapsed time: 36.259s total, 4.305s configuring, 31.338s building, 0.605s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:02:26] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:02:28] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:02:52] Starting KUnit Kernel (1/1)...
[20:02:52] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:02:52] ============ drm_test_pick_cmdline (2 subtests) ============
[20:02:52] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[20:02:52] =============== drm_test_pick_cmdline_named  ===============
[20:02:52] [PASSED] NTSC
[20:02:52] [PASSED] NTSC-J
[20:02:52] [PASSED] PAL
[20:02:52] [PASSED] PAL-M
[20:02:52] =========== [PASSED] drm_test_pick_cmdline_named ===========
[20:02:52] ============== [PASSED] drm_test_pick_cmdline ==============
[20:02:52] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:02:52] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:02:52] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:02:52] =========== drm_validate_clone_mode (2 subtests) ===========
[20:02:52] ============== drm_test_check_in_clone_mode  ===============
[20:02:52] [PASSED] in_clone_mode
[20:02:52] [PASSED] not_in_clone_mode
[20:02:52] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:02:52] =============== drm_test_check_valid_clones  ===============
[20:02:52] [PASSED] not_in_clone_mode
[20:02:52] [PASSED] valid_clone
[20:02:52] [PASSED] invalid_clone
[20:02:52] =========== [PASSED] drm_test_check_valid_clones ===========
[20:02:52] ============= [PASSED] drm_validate_clone_mode =============
[20:02:52] ============= drm_validate_modeset (1 subtest) =============
[20:02:52] [PASSED] drm_test_check_connector_changed_modeset
[20:02:52] ============== [PASSED] drm_validate_modeset ===============
[20:02:52] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:02:52] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:02:52] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:02:52] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:02:52] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:02:52] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:02:52] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:02:52] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:02:52] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:02:52] ============== drm_bridge_alloc (2 subtests) ===============
[20:02:52] [PASSED] drm_test_drm_bridge_alloc_basic
[20:02:52] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:02:52] ================ [PASSED] drm_bridge_alloc =================
[20:02:52] ============= drm_cmdline_parser (40 subtests) =============
[20:02:52] [PASSED] drm_test_cmdline_force_d_only
[20:02:52] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:02:52] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:02:52] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:02:52] [PASSED] drm_test_cmdline_force_e_only
[20:02:52] [PASSED] drm_test_cmdline_res
[20:02:52] [PASSED] drm_test_cmdline_res_vesa
[20:02:52] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:02:52] [PASSED] drm_test_cmdline_res_rblank
[20:02:52] [PASSED] drm_test_cmdline_res_bpp
[20:02:52] [PASSED] drm_test_cmdline_res_refresh
[20:02:52] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:02:52] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:02:52] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:02:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:02:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:02:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:02:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:02:52] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:02:52] [PASSED] drm_test_cmdline_res_margins_force_on
[20:02:52] [PASSED] drm_test_cmdline_res_vesa_margins
[20:02:52] [PASSED] drm_test_cmdline_name
[20:02:52] [PASSED] drm_test_cmdline_name_bpp
[20:02:52] [PASSED] drm_test_cmdline_name_option
[20:02:52] [PASSED] drm_test_cmdline_name_bpp_option
[20:02:52] [PASSED] drm_test_cmdline_rotate_0
[20:02:52] [PASSED] drm_test_cmdline_rotate_90
[20:02:52] [PASSED] drm_test_cmdline_rotate_180
[20:02:52] [PASSED] drm_test_cmdline_rotate_270
[20:02:52] [PASSED] drm_test_cmdline_hmirror
[20:02:52] [PASSED] drm_test_cmdline_vmirror
[20:02:52] [PASSED] drm_test_cmdline_margin_options
[20:02:52] [PASSED] drm_test_cmdline_multiple_options
[20:02:52] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:02:52] [PASSED] drm_test_cmdline_extra_and_option
[20:02:52] [PASSED] drm_test_cmdline_freestanding_options
[20:02:52] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:02:52] [PASSED] drm_test_cmdline_panel_orientation
[20:02:52] ================ drm_test_cmdline_invalid  =================
[20:02:52] [PASSED] margin_only
[20:02:52] [PASSED] interlace_only
[20:02:52] [PASSED] res_missing_x
[20:02:52] [PASSED] res_missing_y
[20:02:52] [PASSED] res_bad_y
[20:02:52] [PASSED] res_missing_y_bpp
[20:02:52] [PASSED] res_bad_bpp
[20:02:52] [PASSED] res_bad_refresh
[20:02:52] [PASSED] res_bpp_refresh_force_on_off
[20:02:52] [PASSED] res_invalid_mode
[20:02:52] [PASSED] res_bpp_wrong_place_mode
[20:02:52] [PASSED] name_bpp_refresh
[20:02:52] [PASSED] name_refresh
[20:02:52] [PASSED] name_refresh_wrong_mode
[20:02:52] [PASSED] name_refresh_invalid_mode
[20:02:52] [PASSED] rotate_multiple
[20:02:52] [PASSED] rotate_invalid_val
[20:02:52] [PASSED] rotate_truncated
[20:02:52] [PASSED] invalid_option
[20:02:52] [PASSED] invalid_tv_option
[20:02:52] [PASSED] truncated_tv_option
[20:02:52] ============ [PASSED] drm_test_cmdline_invalid =============
[20:02:52] =============== drm_test_cmdline_tv_options  ===============
[20:02:52] [PASSED] NTSC
[20:02:52] [PASSED] NTSC_443
[20:02:52] [PASSED] NTSC_J
[20:02:52] [PASSED] PAL
[20:02:52] [PASSED] PAL_M
[20:02:52] [PASSED] PAL_N
[20:02:52] [PASSED] SECAM
[20:02:52] [PASSED] MONO_525
[20:02:52] [PASSED] MONO_625
[20:02:52] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:02:52] =============== [PASSED] drm_cmdline_parser ================
[20:02:52] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:02:52] [PASSED] drm_test_connector_hdmi_init_valid
[20:02:52] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:02:52] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:02:52] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:02:52] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:02:52] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:02:52] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:02:52] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:02:52] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[20:02:52] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:02:52] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:02:52] [PASSED] supported_formats=0x5 yuv420_allowed=1
[20:02:52] [PASSED] supported_formats=0x5 yuv420_allowed=0
[20:02:52] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:02:52] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:02:52] [PASSED] drm_test_connector_hdmi_init_null_product
[20:02:52] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:02:52] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:02:52] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:02:52] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:02:52] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:02:52] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:02:52] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:02:52] ========= drm_test_connector_hdmi_init_type_valid  =========
[20:02:52] [PASSED] HDMI-A
[20:02:52] [PASSED] HDMI-B
[20:02:52] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:02:52] ======== drm_test_connector_hdmi_init_type_invalid  ========
[20:02:52] [PASSED] Unknown
[20:02:52] [PASSED] VGA
[20:02:52] [PASSED] DVI-I
[20:02:52] [PASSED] DVI-D
[20:02:52] [PASSED] DVI-A
[20:02:52] [PASSED] Composite
[20:02:52] [PASSED] SVIDEO
[20:02:52] [PASSED] LVDS
[20:02:52] [PASSED] Component
[20:02:52] [PASSED] DIN
[20:02:52] [PASSED] DP
[20:02:52] [PASSED] TV
[20:02:52] [PASSED] eDP
[20:02:52] [PASSED] Virtual
[20:02:52] [PASSED] DSI
[20:02:52] [PASSED] DPI
[20:02:52] [PASSED] Writeback
[20:02:52] [PASSED] SPI
[20:02:52] [PASSED] USB
[20:02:52] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:02:52] ============ [PASSED] drmm_connector_hdmi_init =============
[20:02:52] ============= drmm_connector_init (3 subtests) =============
[20:02:52] [PASSED] drm_test_drmm_connector_init
[20:02:52] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:02:52] ========= drm_test_drmm_connector_init_type_valid  =========
[20:02:52] [PASSED] Unknown
[20:02:52] [PASSED] VGA
[20:02:52] [PASSED] DVI-I
[20:02:52] [PASSED] DVI-D
[20:02:52] [PASSED] DVI-A
[20:02:52] [PASSED] Composite
[20:02:52] [PASSED] SVIDEO
[20:02:52] [PASSED] LVDS
[20:02:52] [PASSED] Component
[20:02:52] [PASSED] DIN
[20:02:52] [PASSED] DP
[20:02:52] [PASSED] HDMI-A
[20:02:52] [PASSED] HDMI-B
[20:02:52] [PASSED] TV
[20:02:52] [PASSED] eDP
[20:02:52] [PASSED] Virtual
[20:02:52] [PASSED] DSI
[20:02:52] [PASSED] DPI
[20:02:52] [PASSED] Writeback
[20:02:52] [PASSED] SPI
[20:02:52] [PASSED] USB
[20:02:52] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:02:52] =============== [PASSED] drmm_connector_init ===============
[20:02:52] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_init
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:02:52] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[20:02:52] [PASSED] Unknown
[20:02:52] [PASSED] VGA
[20:02:52] [PASSED] DVI-I
[20:02:52] [PASSED] DVI-D
[20:02:52] [PASSED] DVI-A
[20:02:52] [PASSED] Composite
[20:02:52] [PASSED] SVIDEO
[20:02:52] [PASSED] LVDS
[20:02:52] [PASSED] Component
[20:02:52] [PASSED] DIN
[20:02:52] [PASSED] DP
[20:02:52] [PASSED] HDMI-A
[20:02:52] [PASSED] HDMI-B
[20:02:52] [PASSED] TV
[20:02:52] [PASSED] eDP
[20:02:52] [PASSED] Virtual
[20:02:52] [PASSED] DSI
[20:02:52] [PASSED] DPI
[20:02:52] [PASSED] Writeback
[20:02:52] [PASSED] SPI
[20:02:52] [PASSED] USB
[20:02:52] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:02:52] ======== drm_test_drm_connector_dynamic_init_name  =========
[20:02:52] [PASSED] Unknown
[20:02:52] [PASSED] VGA
[20:02:52] [PASSED] DVI-I
[20:02:52] [PASSED] DVI-D
[20:02:52] [PASSED] DVI-A
[20:02:52] [PASSED] Composite
[20:02:52] [PASSED] SVIDEO
[20:02:52] [PASSED] LVDS
[20:02:52] [PASSED] Component
[20:02:52] [PASSED] DIN
[20:02:52] [PASSED] DP
[20:02:52] [PASSED] HDMI-A
[20:02:52] [PASSED] HDMI-B
[20:02:52] [PASSED] TV
[20:02:52] [PASSED] eDP
[20:02:52] [PASSED] Virtual
[20:02:52] [PASSED] DSI
[20:02:52] [PASSED] DPI
[20:02:52] [PASSED] Writeback
[20:02:52] [PASSED] SPI
[20:02:52] [PASSED] USB
[20:02:52] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:02:52] =========== [PASSED] drm_connector_dynamic_init ============
[20:02:52] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:02:52] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:02:52] ======= drm_connector_dynamic_register (7 subtests) ========
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:02:52] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:02:52] ========= [PASSED] drm_connector_dynamic_register ==========
[20:02:52] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:02:52] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:02:52] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:02:52] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:02:52] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:02:52] ========== drm_test_get_tv_mode_from_name_valid  ===========
[20:02:52] [PASSED] NTSC
[20:02:52] [PASSED] NTSC-443
[20:02:52] [PASSED] NTSC-J
[20:02:52] [PASSED] PAL
[20:02:52] [PASSED] PAL-M
[20:02:52] [PASSED] PAL-N
[20:02:52] [PASSED] SECAM
[20:02:52] [PASSED] Mono
[20:02:52] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:02:52] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:02:52] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:02:52] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:02:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:02:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:02:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:02:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:02:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:02:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:02:52] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[20:02:52] [PASSED] VIC 96
[20:02:52] [PASSED] VIC 97
[20:02:52] [PASSED] VIC 101
[20:02:52] [PASSED] VIC 102
[20:02:52] [PASSED] VIC 106
[20:02:52] [PASSED] VIC 107
[20:02:52] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:02:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:02:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:02:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:02:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:02:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:02:52] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:02:52] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:02:52] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[20:02:52] [PASSED] Automatic
[20:02:52] [PASSED] Full
[20:02:52] [PASSED] Limited 16:235
[20:02:52] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:02:52] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:02:52] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:02:52] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:02:52] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[20:02:52] [PASSED] RGB
[20:02:52] [PASSED] YUV 4:2:0
[20:02:52] [PASSED] YUV 4:2:2
[20:02:52] [PASSED] YUV 4:4:4
[20:02:52] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:02:52] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:02:52] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:02:52] ============= drm_damage_helper (21 subtests) ==============
[20:02:52] [PASSED] drm_test_damage_iter_no_damage
[20:02:52] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:02:52] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:02:52] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:02:52] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:02:52] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:02:52] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:02:52] [PASSED] drm_test_damage_iter_simple_damage
[20:02:52] [PASSED] drm_test_damage_iter_single_damage
[20:02:52] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:02:52] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:02:52] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:02:52] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:02:52] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:02:52] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:02:52] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:02:52] [PASSED] drm_test_damage_iter_damage
[20:02:52] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:02:52] [PASSED] drm_test_damage_iter_damage_one_outside
[20:02:52] [PASSED] drm_test_damage_iter_damage_src_moved
[20:02:52] [PASSED] drm_test_damage_iter_damage_not_visible
[20:02:52] ================ [PASSED] drm_damage_helper ================
[20:02:52] ============== drm_dp_mst_helper (3 subtests) ==============
[20:02:52] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[20:02:52] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:02:52] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:02:52] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:02:52] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:02:52] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:02:52] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:02:52] ============== drm_test_dp_mst_calc_pbn_div  ===============
[20:02:52] [PASSED] Link rate 2000000 lane count 4
[20:02:52] [PASSED] Link rate 2000000 lane count 2
[20:02:52] [PASSED] Link rate 2000000 lane count 1
[20:02:52] [PASSED] Link rate 1350000 lane count 4
[20:02:52] [PASSED] Link rate 1350000 lane count 2
[20:02:52] [PASSED] Link rate 1350000 lane count 1
[20:02:52] [PASSED] Link rate 1000000 lane count 4
[20:02:52] [PASSED] Link rate 1000000 lane count 2
[20:02:52] [PASSED] Link rate 1000000 lane count 1
[20:02:52] [PASSED] Link rate 810000 lane count 4
[20:02:52] [PASSED] Link rate 810000 lane count 2
[20:02:52] [PASSED] Link rate 810000 lane count 1
[20:02:52] [PASSED] Link rate 540000 lane count 4
[20:02:52] [PASSED] Link rate 540000 lane count 2
[20:02:52] [PASSED] Link rate 540000 lane count 1
[20:02:52] [PASSED] Link rate 270000 lane count 4
[20:02:52] [PASSED] Link rate 270000 lane count 2
[20:02:52] [PASSED] Link rate 270000 lane count 1
[20:02:52] [PASSED] Link rate 162000 lane count 4
[20:02:52] [PASSED] Link rate 162000 lane count 2
[20:02:52] [PASSED] Link rate 162000 lane count 1
[20:02:52] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:02:52] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[20:02:52] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:02:52] [PASSED] DP_POWER_UP_PHY with port number
[20:02:52] [PASSED] DP_POWER_DOWN_PHY with port number
[20:02:52] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:02:52] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:02:52] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:02:52] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:02:52] [PASSED] DP_QUERY_PAYLOAD with port number
[20:02:52] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:02:52] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:02:52] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:02:52] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:02:52] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:02:52] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:02:52] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:02:52] [PASSED] DP_REMOTE_I2C_READ with port number
[20:02:52] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:02:52] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:02:52] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:02:52] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:02:52] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:02:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:02:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:02:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:02:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:02:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:02:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:02:52] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:02:52] ================ [PASSED] drm_dp_mst_helper ================
[20:02:52] ================== drm_exec (7 subtests) ===================
[20:02:52] [PASSED] sanitycheck
[20:02:52] [PASSED] test_lock
[20:02:52] [PASSED] test_lock_unlock
[20:02:52] [PASSED] test_duplicates
[20:02:52] [PASSED] test_prepare
[20:02:52] [PASSED] test_prepare_array
[20:02:52] [PASSED] test_multiple_loops
[20:02:52] ==================== [PASSED] drm_exec =====================
[20:02:52] =========== drm_format_helper_test (17 subtests) ===========
[20:02:52] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:02:52] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:02:52] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:02:52] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:02:52] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:02:52] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:02:52] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:02:52] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:02:52] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:02:52] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:02:52] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:02:52] ============== drm_test_fb_xrgb8888_to_mono  ===============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:02:52] ==================== drm_test_fb_swab  =====================
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ================ [PASSED] drm_test_fb_swab =================
[20:02:52] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:02:52] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[20:02:52] [PASSED] single_pixel_source_buffer
[20:02:52] [PASSED] single_pixel_clip_rectangle
[20:02:52] [PASSED] well_known_colors
[20:02:52] [PASSED] destination_pitch
[20:02:52] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:02:52] ================= drm_test_fb_clip_offset  =================
[20:02:52] [PASSED] pass through
[20:02:52] [PASSED] horizontal offset
[20:02:52] [PASSED] vertical offset
[20:02:52] [PASSED] horizontal and vertical offset
[20:02:52] [PASSED] horizontal offset (custom pitch)
[20:02:52] [PASSED] vertical offset (custom pitch)
[20:02:52] [PASSED] horizontal and vertical offset (custom pitch)
[20:02:52] ============= [PASSED] drm_test_fb_clip_offset =============
[20:02:52] =================== drm_test_fb_memcpy  ====================
[20:02:52] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:02:52] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:02:52] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:02:52] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:02:52] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:02:52] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:02:52] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:02:52] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:02:52] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:02:52] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:02:52] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:02:52] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:02:52] =============== [PASSED] drm_test_fb_memcpy ================
[20:02:52] ============= [PASSED] drm_format_helper_test ==============
[20:02:52] ================= drm_format (18 subtests) =================
[20:02:52] [PASSED] drm_test_format_block_width_invalid
[20:02:52] [PASSED] drm_test_format_block_width_one_plane
[20:02:52] [PASSED] drm_test_format_block_width_two_plane
[20:02:52] [PASSED] drm_test_format_block_width_three_plane
[20:02:52] [PASSED] drm_test_format_block_width_tiled
[20:02:52] [PASSED] drm_test_format_block_height_invalid
[20:02:52] [PASSED] drm_test_format_block_height_one_plane
[20:02:52] [PASSED] drm_test_format_block_height_two_plane
[20:02:52] [PASSED] drm_test_format_block_height_three_plane
[20:02:52] [PASSED] drm_test_format_block_height_tiled
[20:02:52] [PASSED] drm_test_format_min_pitch_invalid
[20:02:52] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:02:52] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:02:52] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:02:52] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:02:52] [PASSED] drm_test_format_min_pitch_two_plane
[20:02:52] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:02:52] [PASSED] drm_test_format_min_pitch_tiled
[20:02:52] =================== [PASSED] drm_format ====================
[20:02:52] ============== drm_framebuffer (10 subtests) ===============
[20:02:52] ========== drm_test_framebuffer_check_src_coords  ==========
[20:02:52] [PASSED] Success: source fits into fb
[20:02:52] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:02:52] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:02:52] [PASSED] Fail: overflowing fb with source width
[20:02:52] [PASSED] Fail: overflowing fb with source height
[20:02:52] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:02:52] [PASSED] drm_test_framebuffer_cleanup
[20:02:52] =============== drm_test_framebuffer_create  ===============
[20:02:52] [PASSED] ABGR8888 normal sizes
[20:02:52] [PASSED] ABGR8888 max sizes
[20:02:52] [PASSED] ABGR8888 pitch greater than min required
[20:02:52] [PASSED] ABGR8888 pitch less than min required
[20:02:52] [PASSED] ABGR8888 Invalid width
[20:02:52] [PASSED] ABGR8888 Invalid buffer handle
[20:02:52] [PASSED] No pixel format
[20:02:52] [PASSED] ABGR8888 Width 0
[20:02:52] [PASSED] ABGR8888 Height 0
[20:02:52] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:02:52] [PASSED] ABGR8888 Large buffer offset
[20:02:52] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:02:52] [PASSED] ABGR8888 Invalid flag
[20:02:52] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:02:52] [PASSED] ABGR8888 Valid buffer modifier
[20:02:52] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:02:52] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:02:52] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:02:52] [PASSED] NV12 Normal sizes
[20:02:52] [PASSED] NV12 Max sizes
[20:02:52] [PASSED] NV12 Invalid pitch
[20:02:52] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:02:52] [PASSED] NV12 different  modifier per-plane
[20:02:52] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:02:52] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:02:52] [PASSED] NV12 Modifier for inexistent plane
[20:02:52] [PASSED] NV12 Handle for inexistent plane
[20:02:52] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:02:52] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:02:52] [PASSED] YVU420 Normal sizes
[20:02:52] [PASSED] YVU420 Max sizes
[20:02:52] [PASSED] YVU420 Invalid pitch
[20:02:52] [PASSED] YVU420 Different pitches
[20:02:52] [PASSED] YVU420 Different buffer offsets/pitches
[20:02:52] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:02:52] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:02:52] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:02:52] [PASSED] YVU420 Valid modifier
[20:02:52] [PASSED] YVU420 Different modifiers per plane
[20:02:52] [PASSED] YVU420 Modifier for inexistent plane
[20:02:52] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:02:52] [PASSED] X0L2 Normal sizes
[20:02:52] [PASSED] X0L2 Max sizes
[20:02:52] [PASSED] X0L2 Invalid pitch
[20:02:52] [PASSED] X0L2 Pitch greater than minimum required
[20:02:52] [PASSED] X0L2 Handle for inexistent plane
[20:02:52] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:02:52] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:02:52] [PASSED] X0L2 Valid modifier
[20:02:52] [PASSED] X0L2 Modifier for inexistent plane
[20:02:52] =========== [PASSED] drm_test_framebuffer_create ===========
[20:02:52] [PASSED] drm_test_framebuffer_free
[20:02:52] [PASSED] drm_test_framebuffer_init
[20:02:52] [PASSED] drm_test_framebuffer_init_bad_format
[20:02:52] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:02:52] [PASSED] drm_test_framebuffer_lookup
[20:02:52] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:02:52] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:02:52] ================= [PASSED] drm_framebuffer =================
[20:02:52] ================ drm_gem_shmem (8 subtests) ================
[20:02:52] [PASSED] drm_gem_shmem_test_obj_create
[20:02:52] [PASSED] drm_gem_shmem_test_obj_create_private
[20:02:52] [PASSED] drm_gem_shmem_test_pin_pages
[20:02:52] [PASSED] drm_gem_shmem_test_vmap
[20:02:52] [PASSED] drm_gem_shmem_test_get_sg_table
[20:02:52] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:02:52] [PASSED] drm_gem_shmem_test_madvise
[20:02:52] [PASSED] drm_gem_shmem_test_purge
[20:02:52] ================== [PASSED] drm_gem_shmem ==================
[20:02:52] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:02:52] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:02:52] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:02:52] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:02:52] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:02:52] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:02:52] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:02:52] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[20:02:52] [PASSED] Automatic
[20:02:52] [PASSED] Full
[20:02:52] [PASSED] Limited 16:235
[20:02:52] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:02:52] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:02:52] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:02:52] [PASSED] drm_test_check_disable_connector
[20:02:52] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:02:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:02:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:02:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:02:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:02:52] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:02:52] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:02:52] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:02:52] [PASSED] drm_test_check_output_bpc_dvi
[20:02:52] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:02:52] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:02:52] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:02:52] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:02:52] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:02:52] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:02:52] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:02:52] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:02:52] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:02:52] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:02:52] [PASSED] drm_test_check_broadcast_rgb_value
[20:02:52] [PASSED] drm_test_check_bpc_8_value
[20:02:52] [PASSED] drm_test_check_bpc_10_value
[20:02:52] [PASSED] drm_test_check_bpc_12_value
[20:02:52] [PASSED] drm_test_check_format_value
[20:02:52] [PASSED] drm_test_check_tmds_char_value
[20:02:52] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:02:52] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:02:52] [PASSED] drm_test_check_mode_valid
[20:02:52] [PASSED] drm_test_check_mode_valid_reject
[20:02:52] [PASSED] drm_test_check_mode_valid_reject_rate
[20:02:52] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:02:52] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:02:52] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[20:02:52] [PASSED] drm_test_check_infoframes
[20:02:52] [PASSED] drm_test_check_reject_avi_infoframe
[20:02:52] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[20:02:52] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[20:02:52] [PASSED] drm_test_check_reject_audio_infoframe
[20:02:52] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[20:02:52] ================= drm_managed (2 subtests) =================
[20:02:52] [PASSED] drm_test_managed_release_action
[20:02:52] [PASSED] drm_test_managed_run_action
[20:02:52] =================== [PASSED] drm_managed ===================
[20:02:52] =================== drm_mm (6 subtests) ====================
[20:02:52] [PASSED] drm_test_mm_init
[20:02:52] [PASSED] drm_test_mm_debug
[20:02:52] [PASSED] drm_test_mm_align32
[20:02:52] [PASSED] drm_test_mm_align64
[20:02:52] [PASSED] drm_test_mm_lowest
[20:02:52] [PASSED] drm_test_mm_highest
[20:02:52] ===================== [PASSED] drm_mm ======================
[20:02:52] ============= drm_modes_analog_tv (5 subtests) =============
[20:02:52] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:02:52] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:02:52] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:02:52] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:02:52] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:02:52] =============== [PASSED] drm_modes_analog_tv ===============
[20:02:52] ============== drm_plane_helper (2 subtests) ===============
[20:02:52] =============== drm_test_check_plane_state  ================
[20:02:52] [PASSED] clipping_simple
[20:02:52] [PASSED] clipping_rotate_reflect
[20:02:52] [PASSED] positioning_simple
[20:02:52] [PASSED] upscaling
[20:02:52] [PASSED] downscaling
[20:02:52] [PASSED] rounding1
[20:02:52] [PASSED] rounding2
[20:02:52] [PASSED] rounding3
[20:02:52] [PASSED] rounding4
[20:02:52] =========== [PASSED] drm_test_check_plane_state ============
[20:02:52] =========== drm_test_check_invalid_plane_state  ============
[20:02:52] [PASSED] positioning_invalid
[20:02:52] [PASSED] upscaling_invalid
[20:02:52] [PASSED] downscaling_invalid
[20:02:52] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:02:52] ================ [PASSED] drm_plane_helper =================
[20:02:52] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:02:52] ====== drm_test_connector_helper_tv_get_modes_check  =======
[20:02:52] [PASSED] None
[20:02:52] [PASSED] PAL
[20:02:52] [PASSED] NTSC
[20:02:52] [PASSED] Both, NTSC Default
[20:02:52] [PASSED] Both, PAL Default
[20:02:52] [PASSED] Both, NTSC Default, with PAL on command-line
[20:02:52] [PASSED] Both, PAL Default, with NTSC on command-line
[20:02:52] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:02:52] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:02:52] ================== drm_rect (9 subtests) ===================
[20:02:52] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:02:52] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:02:52] [PASSED] drm_test_rect_clip_scaled_clipped
[20:02:52] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:02:52] ================= drm_test_rect_intersect  =================
[20:02:52] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:02:52] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:02:52] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:02:52] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:02:52] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:02:52] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:02:52] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:02:52] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:02:52] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:02:52] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:02:52] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:02:52] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:02:52] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:02:52] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:02:52] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:02:52] ============= [PASSED] drm_test_rect_intersect =============
[20:02:52] ================ drm_test_rect_calc_hscale  ================
[20:02:52] [PASSED] normal use
[20:02:52] [PASSED] out of max range
[20:02:52] [PASSED] out of min range
[20:02:52] [PASSED] zero dst
[20:02:52] [PASSED] negative src
[20:02:52] [PASSED] negative dst
[20:02:52] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:02:52] ================ drm_test_rect_calc_vscale  ================
[20:02:52] [PASSED] normal use
[20:02:52] [PASSED] out of max range
[20:02:52] [PASSED] out of min range
[20:02:52] [PASSED] zero dst
[20:02:52] [PASSED] negative src
[20:02:52] [PASSED] negative dst
[20:02:52] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:02:52] ================== drm_test_rect_rotate  ===================
[20:02:52] [PASSED] reflect-x
[20:02:52] [PASSED] reflect-y
[20:02:52] [PASSED] rotate-0
[20:02:52] [PASSED] rotate-90
[20:02:52] [PASSED] rotate-180
[20:02:52] [PASSED] rotate-270
[20:02:52] ============== [PASSED] drm_test_rect_rotate ===============
[20:02:52] ================ drm_test_rect_rotate_inv  =================
[20:02:52] [PASSED] reflect-x
[20:02:52] [PASSED] reflect-y
[20:02:52] [PASSED] rotate-0
[20:02:52] [PASSED] rotate-90
[20:02:52] [PASSED] rotate-180
[20:02:52] [PASSED] rotate-270
[20:02:52] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:02:52] ==================== [PASSED] drm_rect =====================
[20:02:52] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:02:52] ============ drm_test_sysfb_build_fourcc_list  =============
[20:02:52] [PASSED] no native formats
[20:02:52] [PASSED] XRGB8888 as native format
[20:02:52] [PASSED] remove duplicates
[20:02:52] [PASSED] convert alpha formats
[20:02:52] [PASSED] random formats
[20:02:52] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:02:52] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:02:52] ================== drm_fixp (2 subtests) ===================
[20:02:52] [PASSED] drm_test_int2fixp
[20:02:52] [PASSED] drm_test_sm2fixp
[20:02:52] ==================== [PASSED] drm_fixp =====================
[20:02:52] ============================================================
[20:02:52] Testing complete. Ran 621 tests: passed: 621
[20:02:52] Elapsed time: 26.131s total, 1.768s configuring, 24.196s building, 0.165s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:02:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:02:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:03:03] Starting KUnit Kernel (1/1)...
[20:03:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:03:03] ================= ttm_device (5 subtests) ==================
[20:03:03] [PASSED] ttm_device_init_basic
[20:03:03] [PASSED] ttm_device_init_multiple
[20:03:03] [PASSED] ttm_device_fini_basic
[20:03:03] [PASSED] ttm_device_init_no_vma_man
[20:03:03] ================== ttm_device_init_pools  ==================
[20:03:03] [PASSED] No DMA allocations, no DMA32 required
[20:03:03] [PASSED] DMA allocations, DMA32 required
[20:03:03] [PASSED] No DMA allocations, DMA32 required
[20:03:03] [PASSED] DMA allocations, no DMA32 required
[20:03:03] ============== [PASSED] ttm_device_init_pools ==============
[20:03:03] =================== [PASSED] ttm_device ====================
[20:03:03] ================== ttm_pool (8 subtests) ===================
[20:03:03] ================== ttm_pool_alloc_basic  ===================
[20:03:03] [PASSED] One page
[20:03:03] [PASSED] More than one page
[20:03:03] [PASSED] Above the allocation limit
[20:03:03] [PASSED] One page, with coherent DMA mappings enabled
[20:03:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:03:03] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:03:03] ============== ttm_pool_alloc_basic_dma_addr  ==============
[20:03:03] [PASSED] One page
[20:03:03] [PASSED] More than one page
[20:03:03] [PASSED] Above the allocation limit
[20:03:03] [PASSED] One page, with coherent DMA mappings enabled
[20:03:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:03:03] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:03:03] [PASSED] ttm_pool_alloc_order_caching_match
[20:03:03] [PASSED] ttm_pool_alloc_caching_mismatch
[20:03:03] [PASSED] ttm_pool_alloc_order_mismatch
[20:03:03] [PASSED] ttm_pool_free_dma_alloc
[20:03:03] [PASSED] ttm_pool_free_no_dma_alloc
[20:03:03] [PASSED] ttm_pool_fini_basic
[20:03:03] ==================== [PASSED] ttm_pool =====================
[20:03:03] ================ ttm_resource (8 subtests) =================
[20:03:03] ================= ttm_resource_init_basic  =================
[20:03:03] [PASSED] Init resource in TTM_PL_SYSTEM
[20:03:03] [PASSED] Init resource in TTM_PL_VRAM
[20:03:03] [PASSED] Init resource in a private placement
[20:03:03] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:03:03] ============= [PASSED] ttm_resource_init_basic =============
[20:03:03] [PASSED] ttm_resource_init_pinned
[20:03:03] [PASSED] ttm_resource_fini_basic
[20:03:03] [PASSED] ttm_resource_manager_init_basic
[20:03:03] [PASSED] ttm_resource_manager_usage_basic
[20:03:03] [PASSED] ttm_resource_manager_set_used_basic
[20:03:03] [PASSED] ttm_sys_man_alloc_basic
[20:03:03] [PASSED] ttm_sys_man_free_basic
[20:03:03] ================== [PASSED] ttm_resource ===================
[20:03:03] =================== ttm_tt (15 subtests) ===================
[20:03:03] ==================== ttm_tt_init_basic  ====================
[20:03:03] [PASSED] Page-aligned size
[20:03:03] [PASSED] Extra pages requested
[20:03:03] ================ [PASSED] ttm_tt_init_basic ================
[20:03:03] [PASSED] ttm_tt_init_misaligned
[20:03:03] [PASSED] ttm_tt_fini_basic
[20:03:03] [PASSED] ttm_tt_fini_sg
[20:03:03] [PASSED] ttm_tt_fini_shmem
[20:03:03] [PASSED] ttm_tt_create_basic
[20:03:03] [PASSED] ttm_tt_create_invalid_bo_type
[20:03:03] [PASSED] ttm_tt_create_ttm_exists
[20:03:03] [PASSED] ttm_tt_create_failed
[20:03:03] [PASSED] ttm_tt_destroy_basic
[20:03:03] [PASSED] ttm_tt_populate_null_ttm
[20:03:03] [PASSED] ttm_tt_populate_populated_ttm
[20:03:03] [PASSED] ttm_tt_unpopulate_basic
[20:03:03] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:03:03] [PASSED] ttm_tt_swapin_basic
[20:03:03] ===================== [PASSED] ttm_tt ======================
[20:03:03] =================== ttm_bo (14 subtests) ===================
[20:03:03] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[20:03:03] [PASSED] Cannot be interrupted and sleeps
[20:03:03] [PASSED] Cannot be interrupted, locks straight away
[20:03:03] [PASSED] Can be interrupted, sleeps
[20:03:03] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:03:03] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:03:03] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:03:04] [PASSED] ttm_bo_reserve_double_resv
[20:03:04] [PASSED] ttm_bo_reserve_interrupted
[20:03:04] [PASSED] ttm_bo_reserve_deadlock
[20:03:04] [PASSED] ttm_bo_unreserve_basic
[20:03:04] [PASSED] ttm_bo_unreserve_pinned
[20:03:04] [PASSED] ttm_bo_unreserve_bulk
[20:03:04] [PASSED] ttm_bo_fini_basic
[20:03:04] [PASSED] ttm_bo_fini_shared_resv
[20:03:04] [PASSED] ttm_bo_pin_basic
[20:03:04] [PASSED] ttm_bo_pin_unpin_resource
[20:03:04] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:03:04] ===================== [PASSED] ttm_bo ======================
[20:03:04] ============== ttm_bo_validate (22 subtests) ===============
[20:03:04] ============== ttm_bo_init_reserved_sys_man  ===============
[20:03:04] [PASSED] Buffer object for userspace
[20:03:04] [PASSED] Kernel buffer object
[20:03:04] [PASSED] Shared buffer object
[20:03:04] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:03:04] ============== ttm_bo_init_reserved_mock_man  ==============
[20:03:04] [PASSED] Buffer object for userspace
[20:03:04] [PASSED] Kernel buffer object
[20:03:04] [PASSED] Shared buffer object
[20:03:04] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:03:04] [PASSED] ttm_bo_init_reserved_resv
[20:03:04] ================== ttm_bo_validate_basic  ==================
[20:03:04] [PASSED] Buffer object for userspace
[20:03:04] [PASSED] Kernel buffer object
[20:03:04] [PASSED] Shared buffer object
[20:03:04] ============== [PASSED] ttm_bo_validate_basic ==============
[20:03:04] [PASSED] ttm_bo_validate_invalid_placement
[20:03:04] ============= ttm_bo_validate_same_placement  ==============
[20:03:04] [PASSED] System manager
[20:03:04] [PASSED] VRAM manager
[20:03:04] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:03:04] [PASSED] ttm_bo_validate_failed_alloc
[20:03:04] [PASSED] ttm_bo_validate_pinned
[20:03:04] [PASSED] ttm_bo_validate_busy_placement
[20:03:04] ================ ttm_bo_validate_multihop  =================
[20:03:04] [PASSED] Buffer object for userspace
[20:03:04] [PASSED] Kernel buffer object
[20:03:04] [PASSED] Shared buffer object
[20:03:04] ============ [PASSED] ttm_bo_validate_multihop =============
[20:03:04] ========== ttm_bo_validate_no_placement_signaled  ==========
[20:03:04] [PASSED] Buffer object in system domain, no page vector
[20:03:04] [PASSED] Buffer object in system domain with an existing page vector
[20:03:04] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:03:04] ======== ttm_bo_validate_no_placement_not_signaled  ========
[20:03:04] [PASSED] Buffer object for userspace
[20:03:04] [PASSED] Kernel buffer object
[20:03:04] [PASSED] Shared buffer object
[20:03:04] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:03:04] [PASSED] ttm_bo_validate_move_fence_signaled
[20:03:04] ========= ttm_bo_validate_move_fence_not_signaled  =========
[20:03:04] [PASSED] Waits for GPU
[20:03:04] [PASSED] Tries to lock straight away
[20:03:04] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:03:04] [PASSED] ttm_bo_validate_swapout
[20:03:04] [PASSED] ttm_bo_validate_happy_evict
[20:03:04] [PASSED] ttm_bo_validate_all_pinned_evict
[20:03:04] [PASSED] ttm_bo_validate_allowed_only_evict
[20:03:04] [PASSED] ttm_bo_validate_deleted_evict
[20:03:04] [PASSED] ttm_bo_validate_busy_domain_evict
[20:03:04] [PASSED] ttm_bo_validate_evict_gutting
[20:03:04] [PASSED] ttm_bo_validate_recrusive_evict
[20:03:04] ================= [PASSED] ttm_bo_validate =================
[20:03:04] ============================================================
[20:03:04] Testing complete. Ran 102 tests: passed: 102
[20:03:04] Elapsed time: 11.498s total, 1.738s configuring, 9.494s building, 0.216s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introduce cold reset recovery method (rev4)

[Patchwork]

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== Series Details ==

Series: Introduce cold reset recovery method (rev4)
URL   : https://patchwork.freedesktop.org/series/163428/
State : success

== Summary ==

CI Bug Log - changes from xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86_BAT -> xe-pw-163428v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86 -> xe-pw-163428v4

  IGT_8907: 6b305d78c65768c09cc7c0e902273bf409bbd218 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86: 9cb559e83f7f3c02c8c6566d3446cd37ecc56e86
  xe-pw-163428v4: 163428v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/index.html

[-- Attachment #2: Type: text/html, Size: 1505 bytes --]

✗ Xe.CI.FULL: failure for Introduce cold reset recovery method (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 42528 bytes --]

== Series Details ==

Series: Introduce cold reset recovery method (rev4)
URL   : https://patchwork.freedesktop.org/series/163428/
State : failure

== Summary ==

CI Bug Log - changes from xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86_FULL -> xe-pw-163428v4_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-163428v4_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-163428v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-163428v4_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-bmg:          [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-none.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@xe_oa@non-zero-reason-all@oag-0:
    - shard-bmg:          NOTRUN -> [ABORT][3] +1 other test abort
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@xe_oa@non-zero-reason-all@oag-0.html

  
Known issues
------------

  Here are the changes found in xe-pw-163428v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [PASS][4] -> [FAIL][5] ([Intel XE#3718] / [Intel XE#6078])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-8/igt@kms_async_flips@alternate-sync-async-flip.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2:
    - shard-bmg:          [PASS][6] -> [FAIL][7] ([Intel XE#6078])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-8/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2327]) +1 other test skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#1124]) +4 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#7679])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-target-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#367])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_bw@linear-tiling-3-displays-target-2560x1440p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#3432])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2887]) +5 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2252]) +2 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][15] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +2 other tests fail
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2321] / [Intel XE#7355])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2320])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#2286] / [Intel XE#6035])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2244])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [PASS][20] -> [FAIL][21] ([Intel XE#301]) +1 other test fail
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2311]) +25 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7061] / [Intel XE#7356])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#4141]) +7 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#7061]) +2 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2313]) +20 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#7915])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [PASS][29] -> [SKIP][30] ([Intel XE#7915])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-5/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb2101010.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7283]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html

  * igt@kms_plane_multiple@2x-tiling-none@pipe-c-hdmi-a-3-pipe-a-dp-2:
    - shard-bmg:          [PASS][32] -> [ABORT][33] ([Intel XE#5545] / [Intel XE#7814])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-none@pipe-c-hdmi-a-3-pipe-a-dp-2.html
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-none@pipe-c-hdmi-a-3-pipe-a-dp-2.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-bmg:          [PASS][34] -> [INCOMPLETE][35] ([Intel XE#6819])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-x.html
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_multiple@2x-tiling-x@pipe-c-dp-2-pipe-a-hdmi-a-3:
    - shard-bmg:          [PASS][36] -> [DMESG-FAIL][37] ([Intel XE#1727] / [Intel XE#6819])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-x@pipe-c-dp-2-pipe-a-hdmi-a-3.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-x@pipe-c-dp-2-pipe-a-hdmi-a-3.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#5021] / [Intel XE#7377])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#5020] / [Intel XE#7348])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_pm_backlight@fade:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#7376] / [Intel XE#870]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@kms_pm_backlight@fade.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#7794])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#1489]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr@psr-basic:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_psr@psr-basic.html

  * igt@kms_sharpness_filter@invalid-plane-with-filter:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#6503]) +2 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@kms_sharpness_filter@invalid-plane-with-filter.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          NOTRUN -> [FAIL][45] ([Intel XE#1729] / [Intel XE#7424])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#1499])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_vrr@flip-suspend.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2504] / [Intel XE#7319] / [Intel XE#7350])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#7136]) +4 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@xe_exec_fault_mode@many-execqueues-multi-queue-imm.html

  * igt@xe_exec_multi_queue@two-queues-close-fd:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#6874]) +13 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@xe_exec_multi_queue@two-queues-close-fd.html

  * igt@xe_exec_reset@cm-multi-queue-close-fd:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#7866])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@xe_exec_reset@cm-multi-queue-close-fd.html

  * igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#7636]) +6 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-basic:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#7138]) +4 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html

  * igt@xe_media_fill@media-fill:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2459] / [Intel XE#2596] / [Intel XE#7321] / [Intel XE#7453])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@xe_media_fill@media-fill.html

  * igt@xe_mmap@small-bar:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#586] / [Intel XE#7323] / [Intel XE#7384])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@xe_mmap@small-bar.html

  * igt@xe_multigpu_svm@mgpu-pagefault-basic:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#6964]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@xe_multigpu_svm@mgpu-pagefault-basic.html

  * igt@xe_page_reclaim@prl-invalidate-full:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#7793]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@xe_page_reclaim@prl-invalidate-full.html

  * igt@xe_pm@d3cold-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#5694] / [Intel XE#7370])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pxp@pxp-termination-key-update-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#4733] / [Intel XE#7417])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html

  * igt@xe_query@multigpu-query-invalid-extension:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#944])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-2/igt@xe_query@multigpu-query-invalid-extension.html

  
#### Possible fixes ####

  * igt@fbdev@eof:
    - shard-bmg:          [FAIL][61] -> [PASS][62] +2 other tests pass
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@fbdev@eof.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@fbdev@eof.html

  * igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
    - shard-bmg:          [SKIP][63] ([Intel XE#6703] / [Intel XE#7935]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html

  * igt@kms_flip@2x-flip-vs-panning@bc-dp2-hdmi-a3:
    - shard-bmg:          [DMESG-FAIL][65] ([Intel XE#5545]) -> [PASS][66] +1 other test pass
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_flip@2x-flip-vs-panning@bc-dp2-hdmi-a3.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_flip@2x-flip-vs-panning@bc-dp2-hdmi-a3.html

  * igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [INCOMPLETE][67] -> [PASS][68] +1 other test pass
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-9/igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-10/igt@kms_hdr@bpc-switch-suspend@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][69] ([Intel XE#1503]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-10/igt@kms_hdr@invalid-hdr.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-7/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [SKIP][71] ([Intel XE#7922]) -> [PASS][72] +1 other test pass
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-10/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-7/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@kms_setmode@basic@pipe-c-hdmi-a-3:
    - shard-bmg:          [FAIL][73] ([Intel XE#6361]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-5/igt@kms_setmode@basic@pipe-c-hdmi-a-3.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-1/igt@kms_setmode@basic@pipe-c-hdmi-a-3.html

  * igt@kms_vrr@max-min:
    - shard-lnl:          [FAIL][75] ([Intel XE#4227]) -> [PASS][76] +1 other test pass
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-lnl-2/igt@kms_vrr@max-min.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-lnl-5/igt@kms_vrr@max-min.html

  * igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout:
    - shard-bmg:          [SKIP][77] ([Intel XE#6703]) -> [PASS][78] +161 other tests pass
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html

  
#### Warnings ####

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-bmg:          [SKIP][79] ([Intel XE#6703]) -> [SKIP][80] ([Intel XE#2327])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_big_fb@linear-32bpp-rotate-90.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-bmg:          [SKIP][81] ([Intel XE#6703]) -> [SKIP][82] ([Intel XE#1124]) +2 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_bw@linear-tiling-3-displays-target-3840x2160p:
    - shard-bmg:          [SKIP][83] ([Intel XE#6703]) -> [SKIP][84] ([Intel XE#367])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_bw@linear-tiling-3-displays-target-3840x2160p.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_bw@linear-tiling-3-displays-target-3840x2160p.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          [SKIP][85] ([Intel XE#6703]) -> [SKIP][86] ([Intel XE#2887]) +2 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
    - shard-bmg:          [SKIP][87] ([Intel XE#6703]) -> [SKIP][88] ([Intel XE#3432])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_chamelium_audio@hdmi-audio-edid:
    - shard-bmg:          [SKIP][89] ([Intel XE#6703]) -> [SKIP][90] ([Intel XE#2252]) +2 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_chamelium_audio@hdmi-audio-edid.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_chamelium_audio@hdmi-audio-edid.html

  * igt@kms_content_protection@legacy-hdcp14:
    - shard-bmg:          [SKIP][91] ([Intel XE#6703]) -> [FAIL][92] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_content_protection@legacy-hdcp14.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_content_protection@legacy-hdcp14.html

  * igt@kms_cursor_crc@cursor-offscreen-64x21:
    - shard-bmg:          [SKIP][93] ([Intel XE#6703]) -> [SKIP][94] ([Intel XE#2320])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-64x21.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_cursor_crc@cursor-offscreen-64x21.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-bmg:          [SKIP][95] ([Intel XE#6703]) -> [SKIP][96] ([Intel XE#2321] / [Intel XE#7355])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-bmg:          [SKIP][97] ([Intel XE#6703]) -> [SKIP][98] ([Intel XE#4354] / [Intel XE#5882])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_dp_link_training@non-uhbr-mst.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dsc@dsc-basic:
    - shard-bmg:          [SKIP][99] ([Intel XE#6703]) -> [SKIP][100] ([Intel XE#2244])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_dsc@dsc-basic.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_dsc@dsc-basic.html

  * igt@kms_feature_discovery@psr2:
    - shard-bmg:          [SKIP][101] ([Intel XE#6703]) -> [SKIP][102] ([Intel XE#2374] / [Intel XE#6128])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_feature_discovery@psr2.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_feature_discovery@psr2.html

  * igt@kms_frontbuffer_tracking@drrshdr-slowdraw:
    - shard-bmg:          [SKIP][103] ([Intel XE#6703]) -> [SKIP][104] ([Intel XE#2311]) +13 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_frontbuffer_tracking@drrshdr-slowdraw.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_frontbuffer_tracking@drrshdr-slowdraw.html

  * igt@kms_frontbuffer_tracking@fbc-2p-rte:
    - shard-bmg:          [SKIP][105] ([Intel XE#6703]) -> [SKIP][106] ([Intel XE#4141]) +2 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-rte.html

  * igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-render:
    - shard-bmg:          [SKIP][107] ([Intel XE#6703]) -> [SKIP][108] ([Intel XE#7061] / [Intel XE#7356])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-render.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-suspend:
    - shard-bmg:          [SKIP][109] ([Intel XE#6557] / [Intel XE#6703]) -> [SKIP][110] ([Intel XE#2311])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][111] ([Intel XE#6703]) -> [SKIP][112] ([Intel XE#2313]) +15 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][113] ([Intel XE#3544] / [Intel XE#7915] / [Intel XE#7916]) -> [SKIP][114] ([Intel XE#3544] / [Intel XE#7916])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [SKIP][115] ([Intel XE#7915]) -> [SKIP][116] ([Intel XE#7916]) +1 other test skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-3/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-9/igt@kms_hdr@brightness-with-hdr@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-bmg:          [SKIP][117] ([Intel XE#6703]) -> [SKIP][118] ([Intel XE#4298] / [Intel XE#5873])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_joiner@basic-max-non-joiner.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
    - shard-bmg:          [SKIP][119] ([Intel XE#6703]) -> [SKIP][120] ([Intel XE#7283]) +1 other test skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-bmg:          [SKIP][121] ([Intel XE#6703]) -> [SKIP][122] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
    - shard-bmg:          [SKIP][123] ([Intel XE#6703]) -> [SKIP][124] ([Intel XE#1489]) +1 other test skip
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr@pr-suspend:
    - shard-bmg:          [SKIP][125] ([Intel XE#6703]) -> [SKIP][126] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_psr@pr-suspend.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_psr@pr-suspend.html

  * igt@kms_sharpness_filter@filter-formats:
    - shard-bmg:          [SKIP][127] ([Intel XE#6703]) -> [SKIP][128] ([Intel XE#6503])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@kms_sharpness_filter@filter-formats.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@kms_sharpness_filter@filter-formats.html

  * igt@xe_eudebug@vma-ufence:
    - shard-bmg:          [SKIP][129] ([Intel XE#6703]) -> [SKIP][130] ([Intel XE#7636]) +3 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@xe_eudebug@vma-ufence.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@xe_eudebug@vma-ufence.html

  * igt@xe_evict@evict-small-multi-queue-cm:
    - shard-bmg:          [SKIP][131] ([Intel XE#6703]) -> [SKIP][132] ([Intel XE#7140])
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@xe_evict@evict-small-multi-queue-cm.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@xe_evict@evict-small-multi-queue-cm.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr:
    - shard-bmg:          [SKIP][133] ([Intel XE#6703]) -> [SKIP][134] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr.html

  * igt@xe_exec_fault_mode@many-multi-queue-invalid-fault:
    - shard-bmg:          [SKIP][135] ([Intel XE#6703]) -> [SKIP][136] ([Intel XE#7136]) +1 other test skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@xe_exec_fault_mode@many-multi-queue-invalid-fault.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@xe_exec_fault_mode@many-multi-queue-invalid-fault.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority-smem:
    - shard-bmg:          [SKIP][137] ([Intel XE#6703]) -> [SKIP][138] ([Intel XE#6874]) +6 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority-smem.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority-smem.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic:
    - shard-bmg:          [SKIP][139] ([Intel XE#6703]) -> [SKIP][140] ([Intel XE#7138]) +1 other test skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-basic.html

  * igt@xe_pat@pat-index-xelpg:
    - shard-bmg:          [SKIP][141] ([Intel XE#6703]) -> [SKIP][142] ([Intel XE#2236] / [Intel XE#7590])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@xe_pat@pat-index-xelpg.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_pm@d3cold-mmap-vram:
    - shard-bmg:          [SKIP][143] ([Intel XE#6703]) -> [SKIP][144] ([Intel XE#2284] / [Intel XE#7370])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86/shard-bmg-2/igt@xe_pm@d3cold-mmap-vram.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/shard-bmg-8/igt@xe_pm@d3cold-mmap-vram.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
  [Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
  [Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
  [Intel XE#5873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5873
  [Intel XE#5882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5882
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
  [Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6819
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7319]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7319
  [Intel XE#7321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7321
  [Intel XE#7323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7323
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7350
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7384]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7384
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7453
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7794
  [Intel XE#7814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7814
  [Intel XE#7866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7866
  [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
  [Intel XE#7916]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7916
  [Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
  [Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86 -> xe-pw-163428v4

  IGT_8907: 6b305d78c65768c09cc7c0e902273bf409bbd218 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5050-9cb559e83f7f3c02c8c6566d3446cd37ecc56e86: 9cb559e83f7f3c02c8c6566d3446cd37ecc56e86
  xe-pw-163428v4: 163428v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163428v4/index.html

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