[PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Arun R Murthy]

struct drm_crtc_state {
         /**
          * @async_flip:
          *
          * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the legacy
          * PAGE_FLIP IOCTL. It's not wired up for the atomic IOCTL
itself yet.
          */
         bool async_flip;

In the existing code the flag async_flip was intended for the legacy
PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
As per the hardware feature is concerned, async flip is a plane feature
and is to be treated per plane basis and not per pipe basis.
For a given hardware pipe, among the multiple hardware planes, one can
go with sync flip and other 2/3 can go with async flip.
Tearing affect will be noticed with this and if any policy should be
taken care by the user space. KMD not to include any policy
as to allow async on only one plane for a given pipe as all policy done
in user and KMD exposes what is supported by the hardware.

There would be a bunch of changes to correct this in the atomic path.
Add a new async_flip plane property to allow user enable async flip on
the required plane.
Any restriction checks for async_flip will be taken in atomic_check()
and not in the atomic_ioctl().
Let the preset code reside as is even in the atomic patch until all the
existing drivers and user space implementations move to plane property
for async flips.
Changes include removal of the checks we have in atomic path so as to
reject any changes(different plane, pipe, connector) along with async
flip. This would be replaced with checks so as to reject any change in
that particular plane where async is enabled(reject any change in
pipe/connector as that would have impact on this plane)

With the above changes, the challenge that we have presently so as to
enable async flip on overlays which is handled seperately with if
condition in drm_atomic_uapi.c can be moved to driver specific
atomic_check code.

This series depicts the changes in the drm core and upon getting
feedback on this, driver specific changes for theis will be done in the
next revision on the same series.

Please let us know your opinion on this.

Note: The series is partially tested with the IGT so as to ensure the
existing implementation is not broken. Full feature testing is pending,
just opening the series as RFC so as to get comments so that I can
incorporate them.

Thanks and Regards,
Arun R Murthy
-------------

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
Arun R Murthy (7):
      drm/atomic/plane: Add plane property for async flip
      drm/atomic/plane: create async flip property for plane
      drm/atomic: Re-route the async flip based on the flag
      drm/atomic: Move the plane property check for async flip to atomic_check
      drm/atomic: Allow planes with NULL fb along with async flip
      drm/atomic: flip_done signal for planes
      drm/i915/irq: Enable flip_done for each plane on async flip

 drivers/gpu/drm/drm_atomic.c                       | 122 ++++++++++++++++++++-
 drivers/gpu/drm/drm_atomic_helper.c                |   2 +
 drivers/gpu/drm/drm_atomic_uapi.c                  |  74 +++----------
 drivers/gpu/drm/drm_plane.c                        |  33 ++++++
 drivers/gpu/drm/i915/display/intel_display_irq.c   |  98 ++++++++++++++---
 drivers/gpu/drm/i915/display/skl_universal_plane.c |   2 +-
 include/drm/drm_plane.h                            |  19 ++++
 7 files changed, 277 insertions(+), 73 deletions(-)
---
base-commit: b3845fe8af5ec5c1d4b26e40ac6b4c7370e5fa35
change-id: 20251010-async-feb09912440b

Best regards,
-- 
Arun R Murthy <arun.r.murthy@intel.com>

[PATCH [RFC] v3 1/7] drm/atomic/plane: Add plane property for async flip

[Arun R Murthy]

Add a new property for enabling/disabling async flip on a plane for
atomic path. Certain vendors have support for async flip on more than
one plane and with the present implementation using the flag, async flip
can be enabled on only one plane.
Adding a plane property for async flip enables driver to allow async
flip on multiple planes in atomic path.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 drivers/gpu/drm/drm_atomic_uapi.c |  4 ++++
 drivers/gpu/drm/drm_plane.c       | 31 +++++++++++++++++++++++++++++++
 include/drm/drm_plane.h           | 12 ++++++++++++
 3 files changed, 47 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 7320db4b8489f10e24ed772094c77e2172951633..4a2da81abd713127d5157e84f2cae2f8b34a4dd6 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -593,6 +593,8 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
 		return ret;
 	} else if (property == plane->scaling_filter_property) {
 		state->scaling_filter = val;
+	} else if (property == plane->async_flip_property) {
+		state->async_flip = val;
 	} else if (plane->funcs->atomic_set_property) {
 		return plane->funcs->atomic_set_property(plane, state,
 				property, val);
@@ -672,6 +674,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
 			state->fb_damage_clips->base.id : 0;
 	} else if (property == plane->scaling_filter_property) {
 		*val = state->scaling_filter;
+	} else if (property == plane->async_flip_property) {
+		*val = state->async_flip;
 	} else if (plane->funcs->atomic_get_property) {
 		return plane->funcs->atomic_get_property(plane, state, property, val);
 	} else if (property == plane->hotspot_x_property) {
diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index bed2562bf911b27ab81957f332b2a3cd5f847e43..ca51c87267662c11cee5f28276b2b941e1a87973 100644
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -1879,3 +1879,34 @@ int drm_plane_create_color_pipeline_property(struct drm_plane *plane,
 	return 0;
 }
 EXPORT_SYMBOL(drm_plane_create_color_pipeline_property);
+
+/**
+ * drm_plane_create_async_flip_property - create asynchronous flip property
+ *
+ * @plane: drm plane
+ *
+ * Create a property to enable/disable asynchronous flip on the plane.
+ *
+ * RETURNS:
+ * Zero for success or -errno
+ */
+int drm_plane_create_async_flip_property(struct drm_plane *plane)
+{
+	struct drm_property *prop;
+
+	prop = drm_property_create_bool(plane->dev, DRM_MODE_PROP_IMMUTABLE,
+					"async_flip");
+
+	if (!prop)
+		return -ENOMEM;
+
+	drm_object_attach_property(&plane->base, prop, false);
+
+	plane->async_flip_property = prop;
+
+	if (plane->state)
+		plane->state->async_flip = false;
+
+	return 0;
+}
+EXPORT_SYMBOL(drm_plane_create_async_flip_property);
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 703ef4d1bbbcf084c43aa5e127d28691878061c4..ed8342c9a6258ee97ad930092a48ac3a34e62fc9 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -268,6 +268,12 @@ struct drm_plane_state {
 	 * flow.
 	 */
 	bool color_mgmt_changed : 1;
+
+	/**
+	 * @async_flip: Indicate that the present plane is asynchronous flip
+	 * mode.
+	 */
+	bool async_flip;
 };
 
 static inline struct drm_rect
@@ -815,6 +821,11 @@ struct drm_plane {
 	 */
 	struct drm_property *hotspot_y_property;
 
+	/**
+	 * @async_flip_property: property to set asynchronous flip on the plane
+	 */
+	struct drm_property *async_flip_property;
+
 	/**
 	 * @kmsg_panic: Used to register a panic notifier for this plane
 	 */
@@ -1021,6 +1032,7 @@ int drm_plane_create_scaling_filter_property(struct drm_plane *plane,
 int drm_plane_add_size_hints_property(struct drm_plane *plane,
 				      const struct drm_plane_size_hint *hints,
 				      int num_hints);
+int drm_plane_create_async_flip_property(struct drm_plane *plane);
 
 int drm_plane_create_color_pipeline_property(struct drm_plane *plane,
 					     const struct drm_prop_enum_list *pipelines,

-- 
2.25.1

[PATCH [RFC] v3 2/7] drm/atomic/plane: create async flip property for plane

[Arun R Murthy]

For the planes supporting async flip create the plane property for
enabling async flip.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 drivers/gpu/drm/drm_plane.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index ca51c87267662c11cee5f28276b2b941e1a87973..dd457cf37e0977298e026b014414c59764432032 100644
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -498,6 +498,8 @@ static int __drm_universal_plane_init(struct drm_device *dev,
 						   blob->base.id);
 	}
 
+	if (dev->mode_config.async_page_flip)
+		drm_plane_create_async_flip_property(plane);
 
 	return 0;
 }

-- 
2.25.1

[PATCH [RFC] v3 3/7] drm/atomic: Re-route the async flip based on the flag

[Arun R Murthy]

At present the async flip is being done by the flag
DRM_MODE_PAGE_FLIP_ASYNC. New plane property is being added for async
flip on per plane basis. Allow existing users using the flag
DRM_MODE_PAGE_FLIP_ASYNC to do async flip and internally set the
plane_state flags for async flip.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 drivers/gpu/drm/drm_atomic_uapi.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 4a2da81abd713127d5157e84f2cae2f8b34a4dd6..eb4d7146f1f92eec58aba99ce6f5b678c0959b66 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -1190,6 +1190,7 @@ int drm_atomic_set_property(struct drm_atomic_state *state,
 		ret = drm_atomic_connector_set_property(connector,
 				connector_state, file_priv,
 				prop, prop_value);
+
 		break;
 	}
 	case DRM_MODE_OBJECT_CRTC: {
@@ -1256,6 +1257,10 @@ int drm_atomic_set_property(struct drm_atomic_state *state,
 				plane_state, file_priv,
 				prop, prop_value);
 
+		/* Hack to make the legacy DRM_MODE_PAGE_FLIP_ASYNC work with atomic_ioctl() */
+		if (async_flip && prop == config->prop_fb_id)
+			plane_state->async_flip = true;
+
 		break;
 	}
 	case DRM_MODE_OBJECT_COLOROP: {
@@ -1591,6 +1596,12 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
 			return -EINVAL;
 		}
 
+		/*
+		 * Legacy way of handling async flip using the flag
+		 * DRM_MODE_PAGE_FLIP_ASYNC is still supported using the local
+		 * flag async_flip. Once the UMD moves to the plane property
+		 * for async flip this should be removed.
+		 */
 		async_flip = true;
 	}
 

-- 
2.25.1

[PATCH [RFC] v3 4/7] drm/atomic: Move the plane property check for async flip to atomic_check

[Arun R Murthy]

For async flip on aplane there should be no property change except the
fb id. This check was done in the set_property. Move this check to
atomic_check(). This will work for both plane property async_flip and
the legacy DRM_MODE_PAGE_FLIP_ASYNC flag.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 drivers/gpu/drm/drm_atomic.c      | 120 +++++++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/drm_atomic_uapi.c |  57 ------------------
 2 files changed, 118 insertions(+), 59 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 52738b80ddbeb124896f6124df5628e2ac27faa4..fc938ea467e239edd6be77b7467c45ac8c8379fd 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -31,6 +31,7 @@
 
 #include <drm/drm_atomic.h>
 #include <drm/drm_atomic_uapi.h>
+#include <drm/drm_atomic_helper.h>
 #include <drm/drm_blend.h>
 #include <drm/drm_bridge.h>
 #include <drm/drm_debugfs.h>
@@ -397,10 +398,27 @@ drm_atomic_get_crtc_state(struct drm_atomic_state *state,
 }
 EXPORT_SYMBOL(drm_atomic_get_crtc_state);
 
+static int drm_atomic_crtc_async_check(const struct drm_crtc_state *old_crtc_state,
+				       const struct drm_crtc_state *new_crtc_state)
+{
+	struct drm_crtc *crtc = new_crtc_state->crtc;
+
+	if (!new_crtc_state->async_flip)
+		return 0;
+
+	if (drm_atomic_crtc_needs_modeset(new_crtc_state)) {
+		drm_dbg_kms(crtc->dev, "[CRTC:%d:%s] modeset required\n",
+			    crtc->base.id, crtc->name);
+		return -EINVAL;
+	}
+	return 0;
+}
+
 static int drm_atomic_crtc_check(const struct drm_crtc_state *old_crtc_state,
 				 const struct drm_crtc_state *new_crtc_state)
 {
 	struct drm_crtc *crtc = new_crtc_state->crtc;
+	int ret = 0;
 
 	/* NOTE: we explicitly don't enforce constraints such as primary
 	 * layer covering entire screen, since that is something we want
@@ -455,7 +473,9 @@ static int drm_atomic_crtc_check(const struct drm_crtc_state *old_crtc_state,
 		return -EINVAL;
 	}
 
-	return 0;
+	ret = drm_atomic_crtc_async_check(old_crtc_state, new_crtc_state);
+
+	return ret;
 }
 
 static void drm_atomic_crtc_print_state(struct drm_printer *p,
@@ -691,6 +711,96 @@ plane_switching_crtc(const struct drm_plane_state *old_plane_state,
 	return true;
 }
 
+static int drm_atomic_plane_async_check(const struct drm_plane_state *old_plane_state,
+					const struct drm_plane_state *new_plane_state)
+{
+	struct drm_plane *plane = new_plane_state->plane;
+	struct drm_crtc *crtc = new_plane_state->crtc;
+	struct drm_crtc_state *new_crtc_state = crtc->state;
+
+	if (!new_plane_state->async_flip)
+		return 0;
+
+	/*
+	 * If its the first async flip then certain properties like modifier/pixel can
+	 * change and will be considered as a sync flip itself
+	 */
+	if (!old_plane_state->async_flip)
+		return 0;
+
+	/* For async flip on a plane there should be no change apart from fb id */
+	if (new_crtc_state->active) {
+		drm_dbg_kms(plane->dev, "[CRTC:%d:%s] not active\n",
+			    crtc->base.id, crtc->name);
+		return -EINVAL;
+	}
+
+	if (old_plane_state->fb->modifier != new_plane_state->fb->modifier) {
+		drm_dbg_kms(plane->dev,
+			    "[PLANE:%d:%s] Modifier cannot be changed in async flip\n",
+			    plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	if (old_plane_state->fb->format != new_plane_state->fb->format) {
+		drm_dbg_kms(plane->dev,
+			    "[PLANE:%d:%s] Pixel format cannot be changed in async flip\n",
+			    plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	if (old_plane_state->rotation != new_plane_state->rotation) {
+		drm_dbg_kms(plane->dev,
+			    "[PLANE:%d:%s] Rotation cannot be changed in async flip\n",
+			    plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	if (!drm_rect_equals(&old_plane_state->src, &new_plane_state->src) ||
+	    !drm_rect_equals(&old_plane_state->dst, &new_plane_state->dst)) {
+		drm_dbg_kms(plane->dev,
+			    "[PLANE:%d:%s] Size/co-ordinates cannot be changed in async flip\n",
+			    plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	if (old_plane_state->alpha != new_plane_state->alpha) {
+		drm_dbg_kms(plane->dev,
+			    "[PLANES:%d:%s] Alpha value cannot be changed in async flip\n",
+			    plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	if (old_plane_state->pixel_blend_mode != new_plane_state->pixel_blend_mode) {
+		drm_dbg_kms(plane->dev,
+			    "[PLANE:%d:%s] Pixel blend mode cannot be changed in async flip\n",
+			    plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	if (old_plane_state->color_encoding != new_plane_state->color_encoding) {
+		drm_dbg_kms(plane->dev,
+			    "[PLANE:%d:%s] Color encoding cannot be changed in async flip\n",
+			    plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	if (old_plane_state->color_range != new_plane_state->color_range) {
+		drm_dbg_kms(plane->dev,
+			    "[PLANE:%d:%s] Color range cannot be changed in async flip\n",
+			    plane->base.id, plane->name);
+		return -EINVAL;
+	}
+	if (old_plane_state->scaling_filter != new_plane_state->scaling_filter) {
+		drm_dbg_kms(plane->dev,
+			    "[PLANE:%d:%s] Scaling filter cannot be changed in async flip\n",
+			    plane->base.id, plane->name);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
 /**
  * drm_atomic_plane_check - check plane state
  * @old_plane_state: old plane state to check
@@ -707,9 +817,11 @@ static int drm_atomic_plane_check(const struct drm_plane_state *old_plane_state,
 	struct drm_plane *plane = new_plane_state->plane;
 	struct drm_crtc *crtc = new_plane_state->crtc;
 	const struct drm_framebuffer *fb = new_plane_state->fb;
+	const struct drm_plane_helper_funcs *helper_private = plane->helper_private;
 	unsigned int fb_width, fb_height;
 	struct drm_mode_rect *clips;
 	uint32_t num_clips;
+	int ret = 0;
 
 	/* either *both* CRTC and FB must be set, or neither */
 	if (crtc && !fb) {
@@ -809,7 +921,11 @@ static int drm_atomic_plane_check(const struct drm_plane_state *old_plane_state,
 		return -EINVAL;
 	}
 
-	return 0;
+	drm_atomic_plane_async_check(old_plane_state, new_plane_state);
+	if (helper_private && helper_private->atomic_async_check)
+		ret = helper_private->atomic_async_check(plane, new_plane_state->state,	true);
+
+	return ret;
 }
 
 static void drm_atomic_colorop_print_state(struct drm_printer *p,
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index eb4d7146f1f92eec58aba99ce6f5b678c0959b66..7b8e3b6ca3a5a93d3afbb923f20dacbd21cfc08b 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -28,7 +28,6 @@
  */
 
 #include <drm/drm_atomic.h>
-#include <drm/drm_atomic_helper.h>
 #include <drm/drm_atomic_uapi.h>
 #include <drm/drm_framebuffer.h>
 #include <drm/drm_print.h>
@@ -1142,19 +1141,6 @@ int drm_atomic_connector_commit_dpms(struct drm_atomic_state *state,
 	return ret;
 }
 
-static int drm_atomic_check_prop_changes(int ret, uint64_t old_val, uint64_t prop_value,
-					 struct drm_property *prop)
-{
-	if (ret != 0 || old_val != prop_value) {
-		drm_dbg_atomic(prop->dev,
-			       "[PROP:%d:%s] No prop can be changed during async flip\n",
-			       prop->base.id, prop->name);
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
 int drm_atomic_set_property(struct drm_atomic_state *state,
 			    struct drm_file *file_priv,
 			    struct drm_mode_object *obj,
@@ -1163,7 +1149,6 @@ int drm_atomic_set_property(struct drm_atomic_state *state,
 			    bool async_flip)
 {
 	struct drm_mode_object *ref;
-	u64 old_val;
 	int ret;
 
 	if (!drm_property_change_valid_get(prop, prop_value, &ref))
@@ -1180,13 +1165,6 @@ int drm_atomic_set_property(struct drm_atomic_state *state,
 			break;
 		}
 
-		if (async_flip) {
-			ret = drm_atomic_connector_get_property(connector, connector_state,
-								prop, &old_val);
-			ret = drm_atomic_check_prop_changes(ret, old_val, prop_value, prop);
-			break;
-		}
-
 		ret = drm_atomic_connector_set_property(connector,
 				connector_state, file_priv,
 				prop, prop_value);
@@ -1203,13 +1181,6 @@ int drm_atomic_set_property(struct drm_atomic_state *state,
 			break;
 		}
 
-		if (async_flip) {
-			ret = drm_atomic_crtc_get_property(crtc, crtc_state,
-							   prop, &old_val);
-			ret = drm_atomic_check_prop_changes(ret, old_val, prop_value, prop);
-			break;
-		}
-
 		ret = drm_atomic_crtc_set_property(crtc,
 				crtc_state, prop, prop_value);
 		break;
@@ -1218,7 +1189,6 @@ int drm_atomic_set_property(struct drm_atomic_state *state,
 		struct drm_plane *plane = obj_to_plane(obj);
 		struct drm_plane_state *plane_state;
 		struct drm_mode_config *config = &plane->dev->mode_config;
-		const struct drm_plane_helper_funcs *plane_funcs = plane->helper_private;
 
 		plane_state = drm_atomic_get_plane_state(state, plane);
 		if (IS_ERR(plane_state)) {
@@ -1226,33 +1196,6 @@ int drm_atomic_set_property(struct drm_atomic_state *state,
 			break;
 		}
 
-		if (async_flip) {
-			/* no-op changes are always allowed */
-			ret = drm_atomic_plane_get_property(plane, plane_state,
-							    prop, &old_val);
-			ret = drm_atomic_check_prop_changes(ret, old_val, prop_value, prop);
-
-			/* fail everything that isn't no-op or a pure flip */
-			if (ret && prop != config->prop_fb_id &&
-			    prop != config->prop_in_fence_fd &&
-			    prop != config->prop_fb_damage_clips) {
-				break;
-			}
-
-			if (ret && plane->type != DRM_PLANE_TYPE_PRIMARY) {
-				/* ask the driver if this non-primary plane is supported */
-				if (plane_funcs && plane_funcs->atomic_async_check)
-					ret = plane_funcs->atomic_async_check(plane, state, true);
-
-				if (ret) {
-					drm_dbg_atomic(prop->dev,
-						       "[PLANE:%d:%s] does not support async flips\n",
-						       obj->id, plane->name);
-					break;
-				}
-			}
-		}
-
 		ret = drm_atomic_plane_set_property(plane,
 				plane_state, file_priv,
 				prop, prop_value);

-- 
2.25.1

[PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Arun R Murthy]

Along with async flip if there is a request to disable a sync plane by
providing a NULL fb allow them.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 drivers/gpu/drm/drm_atomic.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index fc938ea467e239edd6be77b7467c45ac8c8379fd..f0718a26e441ec1c9e118503936cb597211835e9 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -718,7 +718,9 @@ static int drm_atomic_plane_async_check(const struct drm_plane_state *old_plane_
 	struct drm_crtc *crtc = new_plane_state->crtc;
 	struct drm_crtc_state *new_crtc_state = crtc->state;
 
-	if (!new_plane_state->async_flip)
+	if (new_crtc_state->async_flip && new_plane_state->fb == 0)
+		return 0;
+	else if (!new_plane_state->async_flip && !new_crtc_state->async_flip)
 		return 0;
 
 	/*

-- 
2.25.1

Re: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Michel Dänzer]

On 1/8/26 10:43, Arun R Murthy wrote:
> Along with async flip if there is a request to disable a sync plane by
> providing a NULL fb allow them.

That could result in async changes to other planes taking effect in an earlier refresh cycle than the sync plane being disabled, couldn't it? In which case the commit arguably wouldn't actually be "atomic".


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast

RE: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Murthy, Arun R]

> -----Original Message-----
> From: Michel Dänzer <michel.daenzer@mailbox.org>
> Sent: Friday, January 9, 2026 3:14 PM
> To: Murthy, Arun R <arun.r.murthy@intel.com>; Maarten Lankhorst
> <maarten.lankhorst@linux.intel.com>; Maxime Ripard <mripard@kernel.org>;
> Thomas Zimmermann <tzimmermann@suse.de>; David Airlie
> <airlied@gmail.com>; Simona Vetter <simona@ffwll.ch>; Jani Nikula
> <jani.nikula@linux.intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Joonas
> Lahtinen <joonas.lahtinen@linux.intel.com>; Tvrtko Ursulin
> <tursulin@ursulin.net>; xaver.hugl@kde.org; andrealmeid@igalia.com; Kumar,
> Naveen1 <naveen1.kumar@intel.com>; Syrjala, Ville <ville.syrjala@intel.com>;
> Dmitry Baryshkov <lumag@kernel.org>
> Cc: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; intel-
> xe@lists.freedesktop.org
> Subject: Re: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along
> with async flip
> 
> On 1/8/26 10:43, Arun R Murthy wrote:
> > Along with async flip if there is a request to disable a sync plane by
> > providing a NULL fb allow them.
> 
> That could result in async changes to other planes taking effect in an earlier
> refresh cycle than the sync plane being disabled, couldn't it? In which case the
> commit arguably wouldn't actually be "atomic".
> 
This is the request from the community to allow disabling of a sync plane in an async flip atomic ioctl.
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834

Thanks and Regards,
Arun R Murthy
-------------------

Re: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Michel Dänzer]

On 1/9/26 12:08, Murthy, Arun R wrote:
>> From: Michel Dänzer <michel.daenzer@mailbox.org>
>> On 1/8/26 10:43, Arun R Murthy wrote:
>>> Along with async flip if there is a request to disable a sync plane by
>>> providing a NULL fb allow them.
>>
>> That could result in async changes to other planes taking effect in an earlier
>> refresh cycle than the sync plane being disabled, couldn't it? In which case the
>> commit arguably wouldn't actually be "atomic".
>>
> This is the request from the community to allow disabling of a sync plane in an async flip atomic ioctl.
> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834

Can't see any such request there. I suspect there might be a misunderstanding.


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast

Re: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Murthy, Arun R]

On 09-01-2026 16:53, Michel Dänzer wrote:
> On 1/9/26 12:08, Murthy, Arun R wrote:
>>> From: Michel Dänzer <michel.daenzer@mailbox.org>
>>> On 1/8/26 10:43, Arun R Murthy wrote:
>>>> Along with async flip if there is a request to disable a sync plane by
>>>> providing a NULL fb allow them.
>>> That could result in async changes to other planes taking effect in an earlier
>>> refresh cycle than the sync plane being disabled, couldn't it? In which case the
>>> commit arguably wouldn't actually be "atomic".
>>>
>> This is the request from the community to allow disabling of a sync plane in an async flip atomic ioctl.
>> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834
> Can't see any such request there. I suspect there might be a misunderstanding.

Here cursor is a sync flip.
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2855843

Thanks and Regards,
Arun R Murthy
--------------------

Re: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Michel Dänzer]

On 1/12/26 09:26, Murthy, Arun R wrote:
> On 09-01-2026 16:53, Michel Dänzer wrote:
>> On 1/9/26 12:08, Murthy, Arun R wrote:
>>>> From: Michel Dänzer <michel.daenzer@mailbox.org>
>>>> On 1/8/26 10:43, Arun R Murthy wrote:
>>>>> Along with async flip if there is a request to disable a sync plane by
>>>>> providing a NULL fb allow them.
>>>> That could result in async changes to other planes taking effect in an earlier
>>>> refresh cycle than the sync plane being disabled, couldn't it? In which case the
>>>> commit arguably wouldn't actually be "atomic".
>>>>
>>> This is the request from the community to allow disabling of a sync plane in an async flip atomic ioctl.
>>> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834
>> Can't see any such request there. I suspect there might be a misunderstanding.
> 
> Here cursor is a sync flip.
> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2855843

Not sure what you mean.

The cursor plane is disabled in KWin's atomic commits with DRM_MODE_PAGE_FLIP_ASYNC, so it's irrelevant for them.

In the comment following the one you referenced, Xaver (one of the main KWin developers) agreed that KWin not setting DRM_MODE_PAGE_FLIP_ASYNC in the commit which disables the cursor plane is fine.

I see no request for being able to mix sync & async plane updates in a single commit.


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast

Re: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Murthy, Arun R]

On 12-01-2026 16:54, Michel Dänzer wrote:
> On 1/12/26 09:26, Murthy, Arun R wrote:
>> On 09-01-2026 16:53, Michel Dänzer wrote:
>>> On 1/9/26 12:08, Murthy, Arun R wrote:
>>>>> From: Michel Dänzer <michel.daenzer@mailbox.org>
>>>>> On 1/8/26 10:43, Arun R Murthy wrote:
>>>>>> Along with async flip if there is a request to disable a sync plane by
>>>>>> providing a NULL fb allow them.
>>>>> That could result in async changes to other planes taking effect in an earlier
>>>>> refresh cycle than the sync plane being disabled, couldn't it? In which case the
>>>>> commit arguably wouldn't actually be "atomic".
>>>>>
>>>> This is the request from the community to allow disabling of a sync plane in an async flip atomic ioctl.
>>>> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834
>>> Can't see any such request there. I suspect there might be a misunderstanding.
>> Here cursor is a sync flip.
>> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2855843
> Not sure what you mean.
>
> The cursor plane is disabled in KWin's atomic commits with DRM_MODE_PAGE_FLIP_ASYNC, so it's irrelevant for them.
>
> In the comment following the one you referenced, Xaver (one of the main KWin developers) agreed that KWin not setting DRM_MODE_PAGE_FLIP_ASYNC in the commit which disables the cursor plane is fine.
>
> I see no request for being able to mix sync & async plane updates in a single commit.
>
Sorry maybe I might be creating more confusion or my words are not 
giving clarity.

Let me try to put it in simple words.
The 
comment(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2857640) 
from Xaver says that disabling of cursor plane along with a sync flip 
should work.
Uma in the 
comment(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2863599) 
has acknowledged the changes.

Thanks and Regards,
Arun R Murthy
--------------------

Re: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Michel Dänzer]

On 1/12/26 16:20, Murthy, Arun R wrote:
> 
> On 12-01-2026 16:54, Michel Dänzer wrote:
>> On 1/12/26 09:26, Murthy, Arun R wrote:
>>> On 09-01-2026 16:53, Michel Dänzer wrote:
>>>> On 1/9/26 12:08, Murthy, Arun R wrote:
>>>>>> From: Michel Dänzer <michel.daenzer@mailbox.org>
>>>>>> On 1/8/26 10:43, Arun R Murthy wrote:
>>>>>>> Along with async flip if there is a request to disable a sync plane by
>>>>>>> providing a NULL fb allow them.
>>>>>> That could result in async changes to other planes taking effect in an earlier
>>>>>> refresh cycle than the sync plane being disabled, couldn't it? In which case the
>>>>>> commit arguably wouldn't actually be "atomic".
>>>>>>
>>>>> This is the request from the community to allow disabling of a sync plane in an async flip atomic ioctl.
>>>>> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834
>>>> Can't see any such request there. I suspect there might be a misunderstanding.
>>> Here cursor is a sync flip.
>>> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2855843
>> Not sure what you mean.
>>
>> The cursor plane is disabled in KWin's atomic commits with DRM_MODE_PAGE_FLIP_ASYNC, so it's irrelevant for them.
>>
>> In the comment following the one you referenced, Xaver (one of the main KWin developers) agreed that KWin not setting DRM_MODE_PAGE_FLIP_ASYNC in the commit which disables the cursor plane is fine.
>>
>> I see no request for being able to mix sync & async plane updates in a single commit.
>>
> Sorry maybe I might be creating more confusion or my words are not giving clarity.
> 
> Let me try to put it in simple words.
> The comment(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2857640) from Xaver says that disabling of cursor plane along with a sync flip should work.

Honestly can't see how that comment could be interpreted that way.

Maybe Xaver can clarify.


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast

Re: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Xaver Hugl]

> > I see no request for being able to mix sync & async plane updates in a single commit.
> >
> Sorry maybe I might be creating more confusion or my words are not
> giving clarity.
>
> Let me try to put it in simple words.
> The
> comment(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2857640)
> from Xaver says that disabling of cursor plane along with a sync flip
> should work.
> Uma in the
> comment(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2863599)
> has acknowledged the changes.
That's about a plane that was previously already disabled by a
non-async atomic commit. The issue is about the async commit failing
in a sequence like this:
- disable cursor plane in sync commit
- disable cursor plane in async commit + flip on the primary plane

I would *in general* like to be able to use the cursor plane while
doing async flips on the primary one, but I think doing that requires
more discussion on the high level API design first.

- Xaver

Re: [PATCH [RFC] v3 5/7] drm/atomic: Allow planes with NULL fb along with async flip

[Murthy, Arun R]

[-- Attachment #1: Type: text/plain, Size: 1256 bytes --]

On 12-01-2026 21:33, Xaver Hugl wrote:
>>> I see no request for being able to mix sync & async plane updates in a single commit.
>>>
>> Sorry maybe I might be creating more confusion or my words are not
>> giving clarity.
>>
>> Let me try to put it in simple words.
>> The
>> comment(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2857640)
>> from Xaver says that disabling of cursor plane along with a sync flip
>> should work.
>> Uma in the
>> comment(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2863599)
>> has acknowledged the changes.
> That's about a plane that was previously already disabled by a
> non-async atomic commit. The issue is about the async commit failing
> in a sequence like this:
> - disable cursor plane in sync commit
> - disable cursor plane in async commit + flip on the primary plane
>
> I would *in general* like to be able to use the cursor plane while
> doing async flips on the primary one, but I think doing that requires
> more discussion on the high level API design first.
>
Few discussion around this in the v2 version of this series.

*https://lore.kernel.org/dri-devel/16c6c70f-0b89-4a41-8e3c-835a9ce296d5@intel.com/*

Thanks and Regards,
Arun R Murthy
--------------------

[-- Attachment #2: Type: text/html, Size: 2182 bytes --]

[PATCH [RFC] v3 6/7] drm/atomic: flip_done signal for planes

[Arun R Murthy]

For multiple async flips in a single atomic_commit initialize a
flip_done completion in plane_state and the respective drivers should
signal the plane_state ->flip_done upon getting the flip_done on that
particular plane.
This logic of waiting for the plane_state->flip_done is done after
getting the flip_done interrupt and before sending the event to user.
Ideally the plane_state->flip_done should be signaled by then and as a
fallback mechanism the drm will do a fake complete for the timeouts.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 drivers/gpu/drm/drm_atomic_helper.c | 2 ++
 drivers/gpu/drm/drm_atomic_uapi.c   | 4 +++-
 include/drm/drm_plane.h             | 7 +++++++
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index cc1f0c102414f1e387a187b7f9d5beb162db2eb2..0e7d98df8eccf91b3b01e7a93526ccc4eb7f0dcc 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -2433,6 +2433,8 @@ static void release_crtc_commit(struct completion *completion)
 
 static void init_commit(struct drm_crtc_commit *commit, struct drm_crtc *crtc)
 {
+	struct drm_plane *plane;
+
 	init_completion(&commit->flip_done);
 	init_completion(&commit->hw_done);
 	init_completion(&commit->cleanup_done);
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 7b8e3b6ca3a5a93d3afbb923f20dacbd21cfc08b..c672b95d359abda622064b6d748c9cb2cea36c3f 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -1201,8 +1201,10 @@ int drm_atomic_set_property(struct drm_atomic_state *state,
 				prop, prop_value);
 
 		/* Hack to make the legacy DRM_MODE_PAGE_FLIP_ASYNC work with atomic_ioctl() */
-		if (async_flip && prop == config->prop_fb_id)
+		if (async_flip && prop == config->prop_fb_id) {
 			plane_state->async_flip = true;
+			init_completion(&plane_state->flip_done);
+		}
 
 		break;
 	}
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index ed8342c9a6258ee97ad930092a48ac3a34e62fc9..6671b4f738703c8720c204b3dbaa726eaeca387d 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -274,6 +274,12 @@ struct drm_plane_state {
 	 * mode.
 	 */
 	bool async_flip;
+
+	/**
+	 * @flip_done: Used to track the flip completion for each plane in
+	 * case of asynchronous flips only.
+	 */
+	struct completion flip_done;
 };
 
 static inline struct drm_rect
@@ -830,6 +836,7 @@ struct drm_plane {
 	 * @kmsg_panic: Used to register a panic notifier for this plane
 	 */
 	struct kmsg_dumper kmsg_panic;
+
 };
 
 #define obj_to_plane(x) container_of(x, struct drm_plane, base)

-- 
2.25.1

[PATCH [RFC] v3 7/7] drm/i915/irq: Enable flip_done for each plane on async flip

[Arun R Murthy]

On asynchronous flip, enable flip done for all the planes on which the
async flip is given by the user. After the last flip_done by the plane
in the atomic_commit send the uevent to the user.

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_irq.c   | 98 +++++++++++++++++++---
 drivers/gpu/drm/i915/display/skl_universal_plane.c |  2 +-
 2 files changed, 86 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 9adeebb376b189ef72a97e0206e0c24b0f4e7117..4d2e1de27d2003db90fe2408c67e3e56e1d9bfcd 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -142,6 +142,44 @@ static void intel_pipe_fault_irq_handler(struct intel_display *display,
 		  crtc->base.base.id, crtc->base.name, fault_errors);
 }
 
+struct plane_flip_done {
+	u32 flip_done;
+	enum plane_id plane_id;
+};
+static const struct plane_flip_done gen8_plane_flip_done[] = {
+	{ .flip_done = GEN9_PIPE_PLANE1_FLIP_DONE, .plane_id = PLANE_1 },
+	{ .flip_done = GEN9_PIPE_PLANE2_FLIP_DONE, .plane_id = PLANE_2 },
+	{ .flip_done = GEN9_PIPE_PLANE3_FLIP_DONE, .plane_id = PLANE_3 },
+	{ .flip_done = GEN9_PIPE_PLANE4_FLIP_DONE, .plane_id = PLANE_4 },
+	{ .flip_done = GEN11_PIPE_PLANE5_FLIP_DONE, .plane_id = PLANE_5 },
+	{ .flip_done = GEN11_PIPE_PLANE6_FLIP_DONE, .plane_id = PLANE_6 },
+	{ .flip_done = GEN11_PIPE_PLANE7_FLIP_DONE, .plane_id = PLANE_7 },
+	{}
+};
+
+static void intel_plane_flip_done_handler(struct intel_display *display,
+					  const struct plane_flip_done *fd,
+					  enum pipe pipe, u32 de_iir)
+{
+	struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
+	struct intel_crtc_state *crtc_state =
+		to_intel_crtc_state(crtc->base.state);
+	struct drm_plane *plane;
+	struct drm_plane_state *plane_state;
+	const struct plane_flip_done *flipdone;
+
+	if (!crtc->base.state->async_flip)
+		return;
+
+	drm_for_each_plane_mask(plane, display->drm,
+				crtc_state->uapi.plane_mask) {
+		plane_state = plane->state;
+		flipdone = &fd[to_intel_plane(plane)->id];
+		if (de_iir & flipdone->flip_done)
+			complete(&plane_state->flip_done);
+	}
+}
+
 static void
 intel_handle_vblank(struct intel_display *display, enum pipe pipe)
 {
@@ -460,12 +498,27 @@ display_pipe_crc_irq_handler(struct intel_display *display,
 #endif
 
 static void flip_done_handler(struct intel_display *display,
-			      enum pipe pipe)
+			      enum pipe pipe, u32 de_iir)
 {
 	struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
+	struct intel_crtc_state *crtc_state =
+		to_intel_crtc_state(crtc->base.state);
+	struct drm_plane *plane;
+	struct drm_plane_state *plane_state;
 
 	spin_lock(&display->drm->event_lock);
 
+	if (crtc->base.state->async_flip) {
+		drm_for_each_plane_mask(plane, display->drm,
+					crtc_state->uapi.plane_mask) {
+			plane_state = plane->state;
+
+			/* There are some pending flip done in this pipe */
+			if (!completion_done(&plane_state->flip_done))
+				return;
+		}
+	}
+
 	if (crtc->flip_done_event) {
 		trace_intel_crtc_flip_done(crtc);
 		drm_crtc_send_vblank_event(&crtc->base, crtc->flip_done_event);
@@ -657,7 +710,7 @@ void valleyview_pipestat_irq_handler(struct intel_display *display,
 			intel_handle_vblank(display, pipe);
 
 		if (pipe_stats[pipe] & PLANE_FLIP_DONE_INT_STATUS_VLV)
-			flip_done_handler(display, pipe);
+			flip_done_handler(display, pipe, pipe_stats[pipe]);
 
 		if (pipe_stats[pipe] & PIPE_CRC_DONE_INTERRUPT_STATUS)
 			i9xx_pipe_crc_irq_handler(display, pipe);
@@ -916,7 +969,7 @@ static void _ilk_display_irq_handler(struct intel_display *display, u32 de_iir)
 			intel_handle_vblank(display, pipe);
 
 		if (de_iir & DE_PLANE_FLIP_DONE(pipe))
-			flip_done_handler(display, pipe);
+			flip_done_handler(display, pipe, de_iir);
 
 		if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
 			intel_cpu_fifo_underrun_irq_handler(display, pipe);
@@ -977,7 +1030,7 @@ static void _ivb_display_irq_handler(struct intel_display *display, u32 de_iir)
 			intel_handle_vblank(display, pipe);
 
 		if (de_iir & DE_PLANE_FLIP_DONE_IVB(pipe))
-			flip_done_handler(display, pipe);
+			flip_done_handler(display, pipe, de_iir);
 	}
 
 	/* check event from PCH */
@@ -1368,12 +1421,26 @@ static void gen11_dsi_te_interrupt_handler(struct intel_display *display,
 	intel_de_rmw(display, DSI_INTR_IDENT_REG(port), 0, 0);
 }
 
-static u32 gen8_de_pipe_flip_done_mask(struct intel_display *display)
+static u32 gen8_de_pipe_flip_done_mask(struct intel_display *display,
+				       enum pipe pipe)
 {
-	if (DISPLAY_VER(display) >= 9)
-		return GEN9_PIPE_PLANE1_FLIP_DONE;
+	if (DISPLAY_VER(display) >= 11)
+		return (GEN9_PIPE_PLANE1_FLIP_DONE |
+			GEN9_PIPE_PLANE2_FLIP_DONE |
+			GEN9_PIPE_PLANE3_FLIP_DONE |
+			GEN9_PIPE_PLANE4_FLIP_DONE |
+			GEN11_PIPE_PLANE5_FLIP_DONE |
+			GEN11_PIPE_PLANE6_FLIP_DONE |
+			GEN11_PIPE_PLANE7_FLIP_DONE);
+	else if (DISPLAY_VER(display) >= 9)
+		return (GEN9_PIPE_PLANE1_FLIP_DONE |
+			GEN9_PIPE_PLANE2_FLIP_DONE |
+			GEN9_PIPE_PLANE3_FLIP_DONE |
+			GEN9_PIPE_PLANE4_FLIP_DONE);
 	else
 		return GEN8_PIPE_PRIMARY_FLIP_DONE;
+
+	return 0;
 }
 
 static void gen8_read_and_ack_pch_irqs(struct intel_display *display, u32 *pch_iir, u32 *pica_iir)
@@ -1504,8 +1571,12 @@ void gen8_de_irq_handler(struct intel_display *display, u32 master_ctl)
 		if (iir & GEN8_PIPE_VBLANK)
 			intel_handle_vblank(display, pipe);
 
-		if (iir & gen8_de_pipe_flip_done_mask(display))
-			flip_done_handler(display, pipe);
+		if (iir & gen8_de_pipe_flip_done_mask(display, pipe)) {
+			intel_plane_flip_done_handler(display,
+						      gen8_plane_flip_done,
+						      pipe, iir);
+			flip_done_handler(display, pipe, iir);
+		}
 
 		if (HAS_DSB(display)) {
 			if (iir & GEN12_DSB_INT(INTEL_DSB_0))
@@ -2167,8 +2238,7 @@ void gen11_display_irq_reset(struct intel_display *display)
 void gen8_irq_power_well_post_enable(struct intel_display *display,
 				     u8 pipe_mask)
 {
-	u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
-		gen8_de_pipe_flip_done_mask(display);
+	u32 extra_ier = GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN;
 	enum pipe pipe;
 
 	spin_lock_irq(&display->irq.lock);
@@ -2178,10 +2248,12 @@ void gen8_irq_power_well_post_enable(struct intel_display *display,
 		return;
 	}
 
-	for_each_pipe_masked(display, pipe, pipe_mask)
+	for_each_pipe_masked(display, pipe, pipe_mask) {
+		extra_ier |= gen8_de_pipe_flip_done_mask(display, pipe);
 		irq_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
 			 display->irq.de_pipe_imr_mask[pipe],
 			 ~display->irq.de_pipe_imr_mask[pipe] | extra_ier);
+	}
 
 	spin_unlock_irq(&display->irq.lock);
 }
@@ -2364,7 +2436,7 @@ void gen8_de_irq_postinstall(struct intel_display *display)
 
 	de_pipe_enables = de_pipe_masked |
 		GEN8_PIPE_VBLANK | GEN8_PIPE_FIFO_UNDERRUN |
-		gen8_de_pipe_flip_done_mask(display);
+		gen8_de_pipe_flip_done_mask(display, pipe);
 
 	de_port_enables = de_port_masked;
 	if (display->platform.geminilake || display->platform.broxton)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index b3d41705448a28ae7abf7b31775d09db832cb9d6..ac35a7083f31da8f0b0a36dd13554fb24166b429 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2927,7 +2927,7 @@ skl_universal_plane_create(struct intel_display *display,
 	plane->get_hw_state = skl_plane_get_hw_state;
 	plane->check_plane = skl_plane_check;
 
-	if (HAS_ASYNC_FLIPS(display) && plane_id == PLANE_1) {
+	if (HAS_ASYNC_FLIPS(display)) {
 		plane->need_async_flip_toggle_wa = IS_DISPLAY_VER(display, 9, 10);
 		plane->async_flip = skl_plane_async_flip;
 		plane->enable_flip_done = skl_plane_enable_flip_done;

-- 
2.25.1

✓ CI.KUnit: success for v3 7/7] drm/i915/irq: Enable flip_done for each plane on async flip

[Patchwork]

== Series Details ==

Series: v3 7/7] drm/i915/irq: Enable flip_done for each plane on async flip
URL   : https://patchwork.freedesktop.org/series/159791/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:52:08] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:52:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:52:44] Starting KUnit Kernel (1/1)...
[09:52:44] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:52:44] ================== guc_buf (11 subtests) ===================
[09:52:44] [PASSED] test_smallest
[09:52:44] [PASSED] test_largest
[09:52:44] [PASSED] test_granular
[09:52:44] [PASSED] test_unique
[09:52:44] [PASSED] test_overlap
[09:52:44] [PASSED] test_reusable
[09:52:44] [PASSED] test_too_big
[09:52:44] [PASSED] test_flush
[09:52:44] [PASSED] test_lookup
[09:52:44] [PASSED] test_data
[09:52:44] [PASSED] test_class
[09:52:44] ===================== [PASSED] guc_buf =====================
[09:52:44] =================== guc_dbm (7 subtests) ===================
[09:52:44] [PASSED] test_empty
[09:52:44] [PASSED] test_default
[09:52:44] ======================== test_size  ========================
[09:52:44] [PASSED] 4
[09:52:44] [PASSED] 8
[09:52:44] [PASSED] 32
[09:52:44] [PASSED] 256
[09:52:44] ==================== [PASSED] test_size ====================
[09:52:44] ======================= test_reuse  ========================
[09:52:44] [PASSED] 4
[09:52:44] [PASSED] 8
[09:52:44] [PASSED] 32
[09:52:44] [PASSED] 256
[09:52:44] =================== [PASSED] test_reuse ====================
[09:52:44] =================== test_range_overlap  ====================
[09:52:44] [PASSED] 4
[09:52:44] [PASSED] 8
[09:52:44] [PASSED] 32
[09:52:44] [PASSED] 256
[09:52:44] =============== [PASSED] test_range_overlap ================
[09:52:44] =================== test_range_compact  ====================
[09:52:44] [PASSED] 4
[09:52:44] [PASSED] 8
[09:52:44] [PASSED] 32
[09:52:44] [PASSED] 256
[09:52:44] =============== [PASSED] test_range_compact ================
[09:52:44] ==================== test_range_spare  =====================
[09:52:44] [PASSED] 4
[09:52:44] [PASSED] 8
[09:52:44] [PASSED] 32
[09:52:44] [PASSED] 256
[09:52:44] ================ [PASSED] test_range_spare =================
[09:52:44] ===================== [PASSED] guc_dbm =====================
[09:52:44] =================== guc_idm (6 subtests) ===================
[09:52:44] [PASSED] bad_init
[09:52:44] [PASSED] no_init
[09:52:44] [PASSED] init_fini
[09:52:44] [PASSED] check_used
[09:52:44] [PASSED] check_quota
[09:52:44] [PASSED] check_all
[09:52:44] ===================== [PASSED] guc_idm =====================
[09:52:44] ================== no_relay (3 subtests) ===================
[09:52:44] [PASSED] xe_drops_guc2pf_if_not_ready
[09:52:44] [PASSED] xe_drops_guc2vf_if_not_ready
[09:52:44] [PASSED] xe_rejects_send_if_not_ready
[09:52:44] ==================== [PASSED] no_relay =====================
[09:52:44] ================== pf_relay (14 subtests) ==================
[09:52:44] [PASSED] pf_rejects_guc2pf_too_short
[09:52:44] [PASSED] pf_rejects_guc2pf_too_long
[09:52:44] [PASSED] pf_rejects_guc2pf_no_payload
[09:52:44] [PASSED] pf_fails_no_payload
[09:52:44] [PASSED] pf_fails_bad_origin
[09:52:44] [PASSED] pf_fails_bad_type
[09:52:44] [PASSED] pf_txn_reports_error
[09:52:44] [PASSED] pf_txn_sends_pf2guc
[09:52:44] [PASSED] pf_sends_pf2guc
[09:52:44] [SKIPPED] pf_loopback_nop
[09:52:44] [SKIPPED] pf_loopback_echo
[09:52:44] [SKIPPED] pf_loopback_fail
[09:52:44] [SKIPPED] pf_loopback_busy
[09:52:44] [SKIPPED] pf_loopback_retry
[09:52:44] ==================== [PASSED] pf_relay =====================
[09:52:44] ================== vf_relay (3 subtests) ===================
[09:52:44] [PASSED] vf_rejects_guc2vf_too_short
[09:52:44] [PASSED] vf_rejects_guc2vf_too_long
[09:52:44] [PASSED] vf_rejects_guc2vf_no_payload
[09:52:44] ==================== [PASSED] vf_relay =====================
[09:52:44] ================ pf_gt_config (6 subtests) =================
[09:52:44] [PASSED] fair_contexts_1vf
[09:52:44] [PASSED] fair_doorbells_1vf
[09:52:44] [PASSED] fair_ggtt_1vf
[09:52:44] ====================== fair_contexts  ======================
[09:52:44] [PASSED] 1 VF
[09:52:44] [PASSED] 2 VFs
[09:52:44] [PASSED] 3 VFs
[09:52:44] [PASSED] 4 VFs
[09:52:44] [PASSED] 5 VFs
[09:52:44] [PASSED] 6 VFs
[09:52:44] [PASSED] 7 VFs
[09:52:44] [PASSED] 8 VFs
[09:52:44] [PASSED] 9 VFs
[09:52:44] [PASSED] 10 VFs
[09:52:44] [PASSED] 11 VFs
[09:52:44] [PASSED] 12 VFs
[09:52:44] [PASSED] 13 VFs
[09:52:44] [PASSED] 14 VFs
[09:52:44] [PASSED] 15 VFs
[09:52:44] [PASSED] 16 VFs
[09:52:44] [PASSED] 17 VFs
[09:52:44] [PASSED] 18 VFs
[09:52:44] [PASSED] 19 VFs
[09:52:44] [PASSED] 20 VFs
[09:52:44] [PASSED] 21 VFs
[09:52:44] [PASSED] 22 VFs
[09:52:44] [PASSED] 23 VFs
[09:52:44] [PASSED] 24 VFs
[09:52:44] [PASSED] 25 VFs
[09:52:44] [PASSED] 26 VFs
[09:52:44] [PASSED] 27 VFs
[09:52:44] [PASSED] 28 VFs
[09:52:44] [PASSED] 29 VFs
[09:52:44] [PASSED] 30 VFs
[09:52:44] [PASSED] 31 VFs
[09:52:44] [PASSED] 32 VFs
[09:52:44] [PASSED] 33 VFs
[09:52:44] [PASSED] 34 VFs
[09:52:44] [PASSED] 35 VFs
[09:52:44] [PASSED] 36 VFs
[09:52:44] [PASSED] 37 VFs
[09:52:44] [PASSED] 38 VFs
[09:52:44] [PASSED] 39 VFs
[09:52:44] [PASSED] 40 VFs
[09:52:44] [PASSED] 41 VFs
[09:52:44] [PASSED] 42 VFs
[09:52:44] [PASSED] 43 VFs
[09:52:44] [PASSED] 44 VFs
[09:52:44] [PASSED] 45 VFs
[09:52:44] [PASSED] 46 VFs
[09:52:44] [PASSED] 47 VFs
[09:52:44] [PASSED] 48 VFs
[09:52:44] [PASSED] 49 VFs
[09:52:44] [PASSED] 50 VFs
[09:52:44] [PASSED] 51 VFs
[09:52:44] [PASSED] 52 VFs
[09:52:44] [PASSED] 53 VFs
[09:52:44] [PASSED] 54 VFs
[09:52:44] [PASSED] 55 VFs
[09:52:44] [PASSED] 56 VFs
[09:52:44] [PASSED] 57 VFs
[09:52:44] [PASSED] 58 VFs
[09:52:44] [PASSED] 59 VFs
[09:52:44] [PASSED] 60 VFs
[09:52:44] [PASSED] 61 VFs
[09:52:44] [PASSED] 62 VFs
[09:52:44] [PASSED] 63 VFs
[09:52:44] ================== [PASSED] fair_contexts ==================
[09:52:44] ===================== fair_doorbells  ======================
[09:52:44] [PASSED] 1 VF
[09:52:44] [PASSED] 2 VFs
[09:52:44] [PASSED] 3 VFs
[09:52:44] [PASSED] 4 VFs
[09:52:44] [PASSED] 5 VFs
[09:52:44] [PASSED] 6 VFs
[09:52:44] [PASSED] 7 VFs
[09:52:44] [PASSED] 8 VFs
[09:52:44] [PASSED] 9 VFs
[09:52:44] [PASSED] 10 VFs
[09:52:44] [PASSED] 11 VFs
[09:52:44] [PASSED] 12 VFs
[09:52:44] [PASSED] 13 VFs
[09:52:44] [PASSED] 14 VFs
[09:52:44] [PASSED] 15 VFs
[09:52:44] [PASSED] 16 VFs
[09:52:44] [PASSED] 17 VFs
[09:52:44] [PASSED] 18 VFs
[09:52:44] [PASSED] 19 VFs
[09:52:44] [PASSED] 20 VFs
[09:52:44] [PASSED] 21 VFs
[09:52:44] [PASSED] 22 VFs
[09:52:44] [PASSED] 23 VFs
[09:52:44] [PASSED] 24 VFs
[09:52:44] [PASSED] 25 VFs
[09:52:44] [PASSED] 26 VFs
[09:52:44] [PASSED] 27 VFs
[09:52:44] [PASSED] 28 VFs
[09:52:44] [PASSED] 29 VFs
[09:52:44] [PASSED] 30 VFs
[09:52:44] [PASSED] 31 VFs
[09:52:44] [PASSED] 32 VFs
[09:52:44] [PASSED] 33 VFs
[09:52:44] [PASSED] 34 VFs
[09:52:44] [PASSED] 35 VFs
[09:52:44] [PASSED] 36 VFs
[09:52:44] [PASSED] 37 VFs
[09:52:44] [PASSED] 38 VFs
[09:52:44] [PASSED] 39 VFs
[09:52:44] [PASSED] 40 VFs
[09:52:44] [PASSED] 41 VFs
[09:52:44] [PASSED] 42 VFs
[09:52:44] [PASSED] 43 VFs
[09:52:44] [PASSED] 44 VFs
[09:52:44] [PASSED] 45 VFs
[09:52:44] [PASSED] 46 VFs
[09:52:44] [PASSED] 47 VFs
[09:52:44] [PASSED] 48 VFs
[09:52:44] [PASSED] 49 VFs
[09:52:44] [PASSED] 50 VFs
[09:52:44] [PASSED] 51 VFs
[09:52:44] [PASSED] 52 VFs
[09:52:44] [PASSED] 53 VFs
[09:52:44] [PASSED] 54 VFs
[09:52:44] [PASSED] 55 VFs
[09:52:44] [PASSED] 56 VFs
[09:52:44] [PASSED] 57 VFs
[09:52:44] [PASSED] 58 VFs
[09:52:44] [PASSED] 59 VFs
[09:52:44] [PASSED] 60 VFs
[09:52:44] [PASSED] 61 VFs
[09:52:44] [PASSED] 62 VFs
[09:52:44] [PASSED] 63 VFs
[09:52:44] ================= [PASSED] fair_doorbells ==================
[09:52:44] ======================== fair_ggtt  ========================
[09:52:44] [PASSED] 1 VF
[09:52:44] [PASSED] 2 VFs
[09:52:44] [PASSED] 3 VFs
[09:52:44] [PASSED] 4 VFs
[09:52:44] [PASSED] 5 VFs
[09:52:44] [PASSED] 6 VFs
[09:52:44] [PASSED] 7 VFs
[09:52:44] [PASSED] 8 VFs
[09:52:44] [PASSED] 9 VFs
[09:52:44] [PASSED] 10 VFs
[09:52:44] [PASSED] 11 VFs
[09:52:44] [PASSED] 12 VFs
[09:52:44] [PASSED] 13 VFs
[09:52:44] [PASSED] 14 VFs
[09:52:44] [PASSED] 15 VFs
[09:52:44] [PASSED] 16 VFs
[09:52:44] [PASSED] 17 VFs
[09:52:44] [PASSED] 18 VFs
[09:52:44] [PASSED] 19 VFs
[09:52:44] [PASSED] 20 VFs
[09:52:44] [PASSED] 21 VFs
[09:52:44] [PASSED] 22 VFs
[09:52:44] [PASSED] 23 VFs
[09:52:44] [PASSED] 24 VFs
[09:52:44] [PASSED] 25 VFs
[09:52:44] [PASSED] 26 VFs
[09:52:44] [PASSED] 27 VFs
[09:52:44] [PASSED] 28 VFs
[09:52:44] [PASSED] 29 VFs
[09:52:44] [PASSED] 30 VFs
[09:52:44] [PASSED] 31 VFs
[09:52:44] [PASSED] 32 VFs
[09:52:44] [PASSED] 33 VFs
[09:52:44] [PASSED] 34 VFs
[09:52:44] [PASSED] 35 VFs
[09:52:44] [PASSED] 36 VFs
[09:52:44] [PASSED] 37 VFs
[09:52:44] [PASSED] 38 VFs
[09:52:44] [PASSED] 39 VFs
[09:52:44] [PASSED] 40 VFs
[09:52:44] [PASSED] 41 VFs
[09:52:44] [PASSED] 42 VFs
[09:52:44] [PASSED] 43 VFs
[09:52:44] [PASSED] 44 VFs
[09:52:44] [PASSED] 45 VFs
[09:52:44] [PASSED] 46 VFs
[09:52:44] [PASSED] 47 VFs
[09:52:44] [PASSED] 48 VFs
[09:52:44] [PASSED] 49 VFs
[09:52:44] [PASSED] 50 VFs
[09:52:44] [PASSED] 51 VFs
[09:52:44] [PASSED] 52 VFs
[09:52:44] [PASSED] 53 VFs
[09:52:44] [PASSED] 54 VFs
[09:52:44] [PASSED] 55 VFs
[09:52:44] [PASSED] 56 VFs
[09:52:44] [PASSED] 57 VFs
[09:52:44] [PASSED] 58 VFs
[09:52:44] [PASSED] 59 VFs
[09:52:44] [PASSED] 60 VFs
[09:52:44] [PASSED] 61 VFs
[09:52:44] [PASSED] 62 VFs
[09:52:44] [PASSED] 63 VFs
[09:52:44] ==================== [PASSED] fair_ggtt ====================
[09:52:44] ================== [PASSED] pf_gt_config ===================
[09:52:44] ===================== lmtt (1 subtest) =====================
[09:52:44] ======================== test_ops  =========================
[09:52:44] [PASSED] 2-level
[09:52:44] [PASSED] multi-level
[09:52:44] ==================== [PASSED] test_ops =====================
[09:52:44] ====================== [PASSED] lmtt =======================
[09:52:44] ================= pf_service (11 subtests) =================
[09:52:44] [PASSED] pf_negotiate_any
[09:52:44] [PASSED] pf_negotiate_base_match
[09:52:44] [PASSED] pf_negotiate_base_newer
[09:52:44] [PASSED] pf_negotiate_base_next
[09:52:44] [SKIPPED] pf_negotiate_base_older
[09:52:44] [PASSED] pf_negotiate_base_prev
[09:52:44] [PASSED] pf_negotiate_latest_match
[09:52:44] [PASSED] pf_negotiate_latest_newer
[09:52:44] [PASSED] pf_negotiate_latest_next
[09:52:44] [SKIPPED] pf_negotiate_latest_older
[09:52:44] [SKIPPED] pf_negotiate_latest_prev
[09:52:44] =================== [PASSED] pf_service ====================
[09:52:44] ================= xe_guc_g2g (2 subtests) ==================
[09:52:44] ============== xe_live_guc_g2g_kunit_default  ==============
[09:52:44] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:52:44] ============== xe_live_guc_g2g_kunit_allmem  ===============
[09:52:44] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:52:44] =================== [SKIPPED] xe_guc_g2g ===================
[09:52:44] =================== xe_mocs (2 subtests) ===================
[09:52:44] ================ xe_live_mocs_kernel_kunit  ================
[09:52:44] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:52:44] ================ xe_live_mocs_reset_kunit  =================
[09:52:44] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:52:44] ==================== [SKIPPED] xe_mocs =====================
[09:52:44] ================= xe_migrate (2 subtests) ==================
[09:52:44] ================= xe_migrate_sanity_kunit  =================
[09:52:44] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:52:44] ================== xe_validate_ccs_kunit  ==================
[09:52:44] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:52:44] =================== [SKIPPED] xe_migrate ===================
[09:52:44] ================== xe_dma_buf (1 subtest) ==================
[09:52:44] ==================== xe_dma_buf_kunit  =====================
[09:52:44] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:52:44] =================== [SKIPPED] xe_dma_buf ===================
[09:52:44] ================= xe_bo_shrink (1 subtest) =================
[09:52:44] =================== xe_bo_shrink_kunit  ====================
[09:52:44] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:52:44] ================== [SKIPPED] xe_bo_shrink ==================
[09:52:44] ==================== xe_bo (2 subtests) ====================
[09:52:44] ================== xe_ccs_migrate_kunit  ===================
[09:52:44] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:52:44] ==================== xe_bo_evict_kunit  ====================
[09:52:44] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:52:44] ===================== [SKIPPED] xe_bo ======================
[09:52:44] ==================== args (13 subtests) ====================
[09:52:44] [PASSED] count_args_test
[09:52:44] [PASSED] call_args_example
[09:52:44] [PASSED] call_args_test
[09:52:44] [PASSED] drop_first_arg_example
[09:52:44] [PASSED] drop_first_arg_test
[09:52:44] [PASSED] first_arg_example
[09:52:44] [PASSED] first_arg_test
[09:52:44] [PASSED] last_arg_example
[09:52:44] [PASSED] last_arg_test
[09:52:44] [PASSED] pick_arg_example
[09:52:44] [PASSED] if_args_example
[09:52:44] [PASSED] if_args_test
[09:52:44] [PASSED] sep_comma_example
[09:52:44] ====================== [PASSED] args =======================
[09:52:44] =================== xe_pci (3 subtests) ====================
[09:52:44] ==================== check_graphics_ip  ====================
[09:52:44] [PASSED] 12.00 Xe_LP
[09:52:44] [PASSED] 12.10 Xe_LP+
[09:52:44] [PASSED] 12.55 Xe_HPG
[09:52:44] [PASSED] 12.60 Xe_HPC
[09:52:44] [PASSED] 12.70 Xe_LPG
[09:52:44] [PASSED] 12.71 Xe_LPG
[09:52:44] [PASSED] 12.74 Xe_LPG+
[09:52:44] [PASSED] 20.01 Xe2_HPG
[09:52:44] [PASSED] 20.02 Xe2_HPG
[09:52:44] [PASSED] 20.04 Xe2_LPG
[09:52:44] [PASSED] 30.00 Xe3_LPG
[09:52:44] [PASSED] 30.01 Xe3_LPG
[09:52:44] [PASSED] 30.03 Xe3_LPG
[09:52:44] [PASSED] 30.04 Xe3_LPG
[09:52:44] [PASSED] 30.05 Xe3_LPG
[09:52:44] [PASSED] 35.11 Xe3p_XPC
[09:52:44] ================ [PASSED] check_graphics_ip ================
[09:52:44] ===================== check_media_ip  ======================
[09:52:44] [PASSED] 12.00 Xe_M
[09:52:44] [PASSED] 12.55 Xe_HPM
[09:52:44] [PASSED] 13.00 Xe_LPM+
[09:52:44] [PASSED] 13.01 Xe2_HPM
[09:52:44] [PASSED] 20.00 Xe2_LPM
[09:52:44] [PASSED] 30.00 Xe3_LPM
[09:52:44] [PASSED] 30.02 Xe3_LPM
[09:52:44] [PASSED] 35.00 Xe3p_LPM
[09:52:44] [PASSED] 35.03 Xe3p_HPM
[09:52:44] ================= [PASSED] check_media_ip ==================
[09:52:44] =================== check_platform_desc  ===================
[09:52:44] [PASSED] 0x9A60 (TIGERLAKE)
[09:52:44] [PASSED] 0x9A68 (TIGERLAKE)
[09:52:44] [PASSED] 0x9A70 (TIGERLAKE)
[09:52:44] [PASSED] 0x9A40 (TIGERLAKE)
[09:52:44] [PASSED] 0x9A49 (TIGERLAKE)
[09:52:44] [PASSED] 0x9A59 (TIGERLAKE)
[09:52:44] [PASSED] 0x9A78 (TIGERLAKE)
[09:52:44] [PASSED] 0x9AC0 (TIGERLAKE)
[09:52:44] [PASSED] 0x9AC9 (TIGERLAKE)
[09:52:44] [PASSED] 0x9AD9 (TIGERLAKE)
[09:52:44] [PASSED] 0x9AF8 (TIGERLAKE)
[09:52:44] [PASSED] 0x4C80 (ROCKETLAKE)
[09:52:44] [PASSED] 0x4C8A (ROCKETLAKE)
[09:52:44] [PASSED] 0x4C8B (ROCKETLAKE)
[09:52:44] [PASSED] 0x4C8C (ROCKETLAKE)
[09:52:44] [PASSED] 0x4C90 (ROCKETLAKE)
[09:52:44] [PASSED] 0x4C9A (ROCKETLAKE)
[09:52:44] [PASSED] 0x4680 (ALDERLAKE_S)
[09:52:44] [PASSED] 0x4682 (ALDERLAKE_S)
[09:52:44] [PASSED] 0x4688 (ALDERLAKE_S)
[09:52:44] [PASSED] 0x468A (ALDERLAKE_S)
[09:52:44] [PASSED] 0x468B (ALDERLAKE_S)
[09:52:44] [PASSED] 0x4690 (ALDERLAKE_S)
[09:52:44] [PASSED] 0x4692 (ALDERLAKE_S)
[09:52:44] [PASSED] 0x4693 (ALDERLAKE_S)
[09:52:44] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46AA (ALDERLAKE_P)
[09:52:44] [PASSED] 0x462A (ALDERLAKE_P)
[09:52:44] [PASSED] 0x4626 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[09:52:44] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:52:44] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:52:44] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:52:44] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:52:44] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:52:44] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:52:44] [PASSED] 0xA721 (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA720 (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:52:44] [PASSED] 0xA780 (ALDERLAKE_S)
[09:52:44] [PASSED] 0xA781 (ALDERLAKE_S)
[09:52:44] [PASSED] 0xA782 (ALDERLAKE_S)
[09:52:44] [PASSED] 0xA783 (ALDERLAKE_S)
[09:52:44] [PASSED] 0xA788 (ALDERLAKE_S)
[09:52:44] [PASSED] 0xA789 (ALDERLAKE_S)
[09:52:44] [PASSED] 0xA78A (ALDERLAKE_S)
[09:52:44] [PASSED] 0xA78B (ALDERLAKE_S)
[09:52:44] [PASSED] 0x4905 (DG1)
[09:52:44] [PASSED] 0x4906 (DG1)
[09:52:44] [PASSED] 0x4907 (DG1)
[09:52:44] [PASSED] 0x4908 (DG1)
[09:52:44] [PASSED] 0x4909 (DG1)
[09:52:44] [PASSED] 0x56C0 (DG2)
[09:52:44] [PASSED] 0x56C2 (DG2)
[09:52:44] [PASSED] 0x56C1 (DG2)
[09:52:44] [PASSED] 0x7D51 (METEORLAKE)
[09:52:44] [PASSED] 0x7DD1 (METEORLAKE)
[09:52:44] [PASSED] 0x7D41 (METEORLAKE)
[09:52:44] [PASSED] 0x7D67 (METEORLAKE)
[09:52:44] [PASSED] 0xB640 (METEORLAKE)
[09:52:44] [PASSED] 0x56A0 (DG2)
[09:52:44] [PASSED] 0x56A1 (DG2)
[09:52:44] [PASSED] 0x56A2 (DG2)
[09:52:44] [PASSED] 0x56BE (DG2)
[09:52:44] [PASSED] 0x56BF (DG2)
[09:52:44] [PASSED] 0x5690 (DG2)
[09:52:44] [PASSED] 0x5691 (DG2)
[09:52:44] [PASSED] 0x5692 (DG2)
[09:52:44] [PASSED] 0x56A5 (DG2)
[09:52:44] [PASSED] 0x56A6 (DG2)
[09:52:44] [PASSED] 0x56B0 (DG2)
[09:52:44] [PASSED] 0x56B1 (DG2)
[09:52:44] [PASSED] 0x56BA (DG2)
[09:52:44] [PASSED] 0x56BB (DG2)
[09:52:44] [PASSED] 0x56BC (DG2)
[09:52:44] [PASSED] 0x56BD (DG2)
[09:52:44] [PASSED] 0x5693 (DG2)
[09:52:44] [PASSED] 0x5694 (DG2)
[09:52:44] [PASSED] 0x5695 (DG2)
[09:52:44] [PASSED] 0x56A3 (DG2)
[09:52:44] [PASSED] 0x56A4 (DG2)
[09:52:44] [PASSED] 0x56B2 (DG2)
[09:52:44] [PASSED] 0x56B3 (DG2)
[09:52:44] [PASSED] 0x5696 (DG2)
[09:52:44] [PASSED] 0x5697 (DG2)
[09:52:44] [PASSED] 0xB69 (PVC)
[09:52:44] [PASSED] 0xB6E (PVC)
[09:52:44] [PASSED] 0xBD4 (PVC)
[09:52:44] [PASSED] 0xBD5 (PVC)
[09:52:44] [PASSED] 0xBD6 (PVC)
[09:52:44] [PASSED] 0xBD7 (PVC)
[09:52:44] [PASSED] 0xBD8 (PVC)
[09:52:44] [PASSED] 0xBD9 (PVC)
[09:52:44] [PASSED] 0xBDA (PVC)
[09:52:44] [PASSED] 0xBDB (PVC)
[09:52:44] [PASSED] 0xBE0 (PVC)
[09:52:44] [PASSED] 0xBE1 (PVC)
[09:52:44] [PASSED] 0xBE5 (PVC)
[09:52:44] [PASSED] 0x7D40 (METEORLAKE)
[09:52:44] [PASSED] 0x7D45 (METEORLAKE)
[09:52:44] [PASSED] 0x7D55 (METEORLAKE)
[09:52:44] [PASSED] 0x7D60 (METEORLAKE)
[09:52:44] [PASSED] 0x7DD5 (METEORLAKE)
[09:52:44] [PASSED] 0x6420 (LUNARLAKE)
[09:52:44] [PASSED] 0x64A0 (LUNARLAKE)
[09:52:44] [PASSED] 0x64B0 (LUNARLAKE)
[09:52:44] [PASSED] 0xE202 (BATTLEMAGE)
[09:52:44] [PASSED] 0xE209 (BATTLEMAGE)
[09:52:44] [PASSED] 0xE20B (BATTLEMAGE)
[09:52:44] [PASSED] 0xE20C (BATTLEMAGE)
[09:52:44] [PASSED] 0xE20D (BATTLEMAGE)
[09:52:44] [PASSED] 0xE210 (BATTLEMAGE)
[09:52:44] [PASSED] 0xE211 (BATTLEMAGE)
[09:52:44] [PASSED] 0xE212 (BATTLEMAGE)
[09:52:44] [PASSED] 0xE216 (BATTLEMAGE)
[09:52:44] [PASSED] 0xE220 (BATTLEMAGE)
[09:52:44] [PASSED] 0xE221 (BATTLEMAGE)
[09:52:44] [PASSED] 0xE222 (BATTLEMAGE)
[09:52:44] [PASSED] 0xE223 (BATTLEMAGE)
[09:52:44] [PASSED] 0xB080 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB081 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB082 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB083 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB084 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB085 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB086 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB087 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB08F (PANTHERLAKE)
[09:52:44] [PASSED] 0xB090 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:52:44] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:52:44] [PASSED] 0xFD80 (PANTHERLAKE)
[09:52:44] [PASSED] 0xFD81 (PANTHERLAKE)
[09:52:44] [PASSED] 0xD740 (NOVALAKE_S)
[09:52:44] [PASSED] 0xD741 (NOVALAKE_S)
[09:52:44] [PASSED] 0xD742 (NOVALAKE_S)
[09:52:44] [PASSED] 0xD743 (NOVALAKE_S)
[09:52:44] [PASSED] 0xD744 (NOVALAKE_S)
[09:52:44] [PASSED] 0xD745 (NOVALAKE_S)
[09:52:44] [PASSED] 0x674C (CRESCENTISLAND)
[09:52:44] =============== [PASSED] check_platform_desc ===============
[09:52:44] ===================== [PASSED] xe_pci ======================
[09:52:44] =================== xe_rtp (2 subtests) ====================
[09:52:44] =============== xe_rtp_process_to_sr_tests  ================
[09:52:44] [PASSED] coalesce-same-reg
[09:52:44] [PASSED] no-match-no-add
[09:52:44] [PASSED] match-or
[09:52:44] [PASSED] match-or-xfail
[09:52:44] [PASSED] no-match-no-add-multiple-rules
[09:52:44] [PASSED] two-regs-two-entries
[09:52:44] [PASSED] clr-one-set-other
[09:52:44] [PASSED] set-field
[09:52:44] [PASSED] conflict-duplicate
[09:52:44] [PASSED] conflict-not-disjoint
[09:52:44] [PASSED] conflict-reg-type
[09:52:44] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:52:44] ================== xe_rtp_process_tests  ===================
[09:52:44] [PASSED] active1
[09:52:44] [PASSED] active2
[09:52:44] [PASSED] active-inactive
[09:52:44] [PASSED] inactive-active
[09:52:44] [PASSED] inactive-1st_or_active-inactive
[09:52:44] [PASSED] inactive-2nd_or_active-inactive
[09:52:44] [PASSED] inactive-last_or_active-inactive
[09:52:44] [PASSED] inactive-no_or_active-inactive
[09:52:44] ============== [PASSED] xe_rtp_process_tests ===============
[09:52:44] ===================== [PASSED] xe_rtp ======================
[09:52:44] ==================== xe_wa (1 subtest) =====================
[09:52:44] ======================== xe_wa_gt  =========================
[09:52:44] [PASSED] TIGERLAKE B0
[09:52:44] [PASSED] DG1 A0
[09:52:44] [PASSED] DG1 B0
[09:52:44] [PASSED] ALDERLAKE_S A0
[09:52:44] [PASSED] ALDERLAKE_S B0
[09:52:44] [PASSED] ALDERLAKE_S C0
[09:52:44] [PASSED] ALDERLAKE_S D0
[09:52:44] [PASSED] ALDERLAKE_P A0
[09:52:44] [PASSED] ALDERLAKE_P B0
[09:52:44] [PASSED] ALDERLAKE_P C0
[09:52:44] [PASSED] ALDERLAKE_S RPLS D0
[09:52:44] [PASSED] ALDERLAKE_P RPLU E0
[09:52:44] [PASSED] DG2 G10 C0
[09:52:44] [PASSED] DG2 G11 B1
[09:52:44] [PASSED] DG2 G12 A1
[09:52:44] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:52:44] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:52:44] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:52:44] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:52:44] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:52:44] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:52:44] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:52:44] ==================== [PASSED] xe_wa_gt =====================
[09:52:44] ====================== [PASSED] xe_wa ======================
[09:52:44] ============================================================
[09:52:44] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[09:52:44] Elapsed time: 36.196s total, 4.231s configuring, 31.448s building, 0.466s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:52:44] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:52:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:53:12] Starting KUnit Kernel (1/1)...
[09:53:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:53:12] ============ drm_test_pick_cmdline (2 subtests) ============
[09:53:12] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:53:12] =============== drm_test_pick_cmdline_named  ===============
[09:53:12] [PASSED] NTSC
[09:53:12] [PASSED] NTSC-J
[09:53:12] [PASSED] PAL
[09:53:12] [PASSED] PAL-M
[09:53:12] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:53:12] ============== [PASSED] drm_test_pick_cmdline ==============
[09:53:12] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:53:12] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:53:12] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:53:12] =========== drm_validate_clone_mode (2 subtests) ===========
[09:53:12] ============== drm_test_check_in_clone_mode  ===============
[09:53:12] [PASSED] in_clone_mode
[09:53:12] [PASSED] not_in_clone_mode
[09:53:12] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:53:12] =============== drm_test_check_valid_clones  ===============
[09:53:12] [PASSED] not_in_clone_mode
[09:53:12] [PASSED] valid_clone
[09:53:12] [PASSED] invalid_clone
[09:53:12] =========== [PASSED] drm_test_check_valid_clones ===========
[09:53:12] ============= [PASSED] drm_validate_clone_mode =============
[09:53:12] ============= drm_validate_modeset (1 subtest) =============
[09:53:12] [PASSED] drm_test_check_connector_changed_modeset
[09:53:12] ============== [PASSED] drm_validate_modeset ===============
[09:53:12] ====== drm_test_bridge_get_current_state (2 subtests) ======
[09:53:12] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:53:12] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[09:53:12] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:53:12] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[09:53:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:53:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:53:12] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[09:53:12] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:53:12] ============== drm_bridge_alloc (2 subtests) ===============
[09:53:12] [PASSED] drm_test_drm_bridge_alloc_basic
[09:53:12] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:53:12] ================ [PASSED] drm_bridge_alloc =================
[09:53:12] ================== drm_buddy (8 subtests) ==================
[09:53:12] [PASSED] drm_test_buddy_alloc_limit
[09:53:12] [PASSED] drm_test_buddy_alloc_optimistic
[09:53:12] [PASSED] drm_test_buddy_alloc_pessimistic
[09:53:12] [PASSED] drm_test_buddy_alloc_pathological
[09:53:12] [PASSED] drm_test_buddy_alloc_contiguous
[09:53:12] [PASSED] drm_test_buddy_alloc_clear
[09:53:12] [PASSED] drm_test_buddy_alloc_range_bias
[09:53:12] [PASSED] drm_test_buddy_fragmentation_performance
[09:53:12] ==================== [PASSED] drm_buddy ====================
[09:53:12] ============= drm_cmdline_parser (40 subtests) =============
[09:53:12] [PASSED] drm_test_cmdline_force_d_only
[09:53:12] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:53:12] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:53:12] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:53:12] [PASSED] drm_test_cmdline_force_e_only
[09:53:12] [PASSED] drm_test_cmdline_res
[09:53:12] [PASSED] drm_test_cmdline_res_vesa
[09:53:12] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:53:12] [PASSED] drm_test_cmdline_res_rblank
[09:53:12] [PASSED] drm_test_cmdline_res_bpp
[09:53:12] [PASSED] drm_test_cmdline_res_refresh
[09:53:12] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:53:12] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:53:12] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:53:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:53:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:53:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:53:12] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:53:12] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:53:12] [PASSED] drm_test_cmdline_res_margins_force_on
[09:53:12] [PASSED] drm_test_cmdline_res_vesa_margins
[09:53:12] [PASSED] drm_test_cmdline_name
[09:53:12] [PASSED] drm_test_cmdline_name_bpp
[09:53:12] [PASSED] drm_test_cmdline_name_option
[09:53:12] [PASSED] drm_test_cmdline_name_bpp_option
[09:53:12] [PASSED] drm_test_cmdline_rotate_0
[09:53:12] [PASSED] drm_test_cmdline_rotate_90
[09:53:12] [PASSED] drm_test_cmdline_rotate_180
[09:53:12] [PASSED] drm_test_cmdline_rotate_270
[09:53:12] [PASSED] drm_test_cmdline_hmirror
[09:53:12] [PASSED] drm_test_cmdline_vmirror
[09:53:12] [PASSED] drm_test_cmdline_margin_options
[09:53:12] [PASSED] drm_test_cmdline_multiple_options
[09:53:12] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:53:12] [PASSED] drm_test_cmdline_extra_and_option
[09:53:12] [PASSED] drm_test_cmdline_freestanding_options
[09:53:12] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:53:12] [PASSED] drm_test_cmdline_panel_orientation
[09:53:12] ================ drm_test_cmdline_invalid  =================
[09:53:12] [PASSED] margin_only
[09:53:12] [PASSED] interlace_only
[09:53:12] [PASSED] res_missing_x
[09:53:12] [PASSED] res_missing_y
[09:53:12] [PASSED] res_bad_y
[09:53:12] [PASSED] res_missing_y_bpp
[09:53:12] [PASSED] res_bad_bpp
[09:53:12] [PASSED] res_bad_refresh
[09:53:12] [PASSED] res_bpp_refresh_force_on_off
[09:53:12] [PASSED] res_invalid_mode
[09:53:12] [PASSED] res_bpp_wrong_place_mode
[09:53:12] [PASSED] name_bpp_refresh
[09:53:12] [PASSED] name_refresh
[09:53:12] [PASSED] name_refresh_wrong_mode
[09:53:12] [PASSED] name_refresh_invalid_mode
[09:53:12] [PASSED] rotate_multiple
[09:53:12] [PASSED] rotate_invalid_val
[09:53:12] [PASSED] rotate_truncated
[09:53:12] [PASSED] invalid_option
[09:53:12] [PASSED] invalid_tv_option
[09:53:12] [PASSED] truncated_tv_option
[09:53:12] ============ [PASSED] drm_test_cmdline_invalid =============
[09:53:12] =============== drm_test_cmdline_tv_options  ===============
[09:53:12] [PASSED] NTSC
[09:53:12] [PASSED] NTSC_443
[09:53:12] [PASSED] NTSC_J
[09:53:12] [PASSED] PAL
[09:53:12] [PASSED] PAL_M
[09:53:12] [PASSED] PAL_N
[09:53:12] [PASSED] SECAM
[09:53:12] [PASSED] MONO_525
[09:53:12] [PASSED] MONO_625
[09:53:12] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:53:12] =============== [PASSED] drm_cmdline_parser ================
[09:53:12] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:53:12] [PASSED] drm_test_connector_hdmi_init_valid
[09:53:12] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:53:12] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:53:12] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:53:12] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:53:12] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:53:12] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:53:12] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:53:12] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[09:53:12] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:53:12] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:53:12] [PASSED] supported_formats=0x3 yuv420_allowed=1
[09:53:12] [PASSED] supported_formats=0x3 yuv420_allowed=0
[09:53:12] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:53:12] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:53:12] [PASSED] drm_test_connector_hdmi_init_null_product
[09:53:12] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:53:12] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:53:12] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:53:12] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:53:12] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:53:12] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:53:12] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:53:12] ========= drm_test_connector_hdmi_init_type_valid  =========
[09:53:12] [PASSED] HDMI-A
[09:53:12] [PASSED] HDMI-B
[09:53:12] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:53:12] ======== drm_test_connector_hdmi_init_type_invalid  ========
[09:53:12] [PASSED] Unknown
[09:53:12] [PASSED] VGA
[09:53:12] [PASSED] DVI-I
[09:53:12] [PASSED] DVI-D
[09:53:12] [PASSED] DVI-A
[09:53:12] [PASSED] Composite
[09:53:12] [PASSED] SVIDEO
[09:53:12] [PASSED] LVDS
[09:53:12] [PASSED] Component
[09:53:12] [PASSED] DIN
[09:53:12] [PASSED] DP
[09:53:12] [PASSED] TV
[09:53:12] [PASSED] eDP
[09:53:12] [PASSED] Virtual
[09:53:12] [PASSED] DSI
[09:53:12] [PASSED] DPI
[09:53:12] [PASSED] Writeback
[09:53:12] [PASSED] SPI
[09:53:12] [PASSED] USB
[09:53:12] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:53:12] ============ [PASSED] drmm_connector_hdmi_init =============
[09:53:12] ============= drmm_connector_init (3 subtests) =============
[09:53:12] [PASSED] drm_test_drmm_connector_init
[09:53:12] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:53:12] ========= drm_test_drmm_connector_init_type_valid  =========
[09:53:12] [PASSED] Unknown
[09:53:12] [PASSED] VGA
[09:53:12] [PASSED] DVI-I
[09:53:12] [PASSED] DVI-D
[09:53:12] [PASSED] DVI-A
[09:53:12] [PASSED] Composite
[09:53:12] [PASSED] SVIDEO
[09:53:12] [PASSED] LVDS
[09:53:12] [PASSED] Component
[09:53:12] [PASSED] DIN
[09:53:12] [PASSED] DP
[09:53:12] [PASSED] HDMI-A
[09:53:12] [PASSED] HDMI-B
[09:53:12] [PASSED] TV
[09:53:12] [PASSED] eDP
[09:53:12] [PASSED] Virtual
[09:53:12] [PASSED] DSI
[09:53:12] [PASSED] DPI
[09:53:12] [PASSED] Writeback
[09:53:12] [PASSED] SPI
[09:53:12] [PASSED] USB
[09:53:12] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:53:12] =============== [PASSED] drmm_connector_init ===============
[09:53:12] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_init
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:53:12] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[09:53:12] [PASSED] Unknown
[09:53:12] [PASSED] VGA
[09:53:12] [PASSED] DVI-I
[09:53:12] [PASSED] DVI-D
[09:53:12] [PASSED] DVI-A
[09:53:12] [PASSED] Composite
[09:53:12] [PASSED] SVIDEO
[09:53:12] [PASSED] LVDS
[09:53:12] [PASSED] Component
[09:53:12] [PASSED] DIN
[09:53:12] [PASSED] DP
[09:53:12] [PASSED] HDMI-A
[09:53:12] [PASSED] HDMI-B
[09:53:12] [PASSED] TV
[09:53:12] [PASSED] eDP
[09:53:12] [PASSED] Virtual
[09:53:12] [PASSED] DSI
[09:53:12] [PASSED] DPI
[09:53:12] [PASSED] Writeback
[09:53:12] [PASSED] SPI
[09:53:12] [PASSED] USB
[09:53:12] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:53:12] ======== drm_test_drm_connector_dynamic_init_name  =========
[09:53:12] [PASSED] Unknown
[09:53:12] [PASSED] VGA
[09:53:12] [PASSED] DVI-I
[09:53:12] [PASSED] DVI-D
[09:53:12] [PASSED] DVI-A
[09:53:12] [PASSED] Composite
[09:53:12] [PASSED] SVIDEO
[09:53:12] [PASSED] LVDS
[09:53:12] [PASSED] Component
[09:53:12] [PASSED] DIN
[09:53:12] [PASSED] DP
[09:53:12] [PASSED] HDMI-A
[09:53:12] [PASSED] HDMI-B
[09:53:12] [PASSED] TV
[09:53:12] [PASSED] eDP
[09:53:12] [PASSED] Virtual
[09:53:12] [PASSED] DSI
[09:53:12] [PASSED] DPI
[09:53:12] [PASSED] Writeback
[09:53:12] [PASSED] SPI
[09:53:12] [PASSED] USB
[09:53:12] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:53:12] =========== [PASSED] drm_connector_dynamic_init ============
[09:53:12] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:53:12] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:53:12] ======= drm_connector_dynamic_register (7 subtests) ========
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:53:12] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:53:12] ========= [PASSED] drm_connector_dynamic_register ==========
[09:53:12] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:53:12] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:53:12] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:53:12] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:53:12] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:53:12] ========== drm_test_get_tv_mode_from_name_valid  ===========
[09:53:12] [PASSED] NTSC
[09:53:12] [PASSED] NTSC-443
[09:53:12] [PASSED] NTSC-J
[09:53:12] [PASSED] PAL
[09:53:12] [PASSED] PAL-M
[09:53:12] [PASSED] PAL-N
[09:53:12] [PASSED] SECAM
[09:53:12] [PASSED] Mono
[09:53:12] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:53:12] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:53:12] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:53:12] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:53:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:53:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:53:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:53:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:53:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:53:12] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:53:12] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[09:53:12] [PASSED] VIC 96
[09:53:12] [PASSED] VIC 97
[09:53:12] [PASSED] VIC 101
[09:53:12] [PASSED] VIC 102
[09:53:12] [PASSED] VIC 106
[09:53:12] [PASSED] VIC 107
[09:53:12] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:53:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:53:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:53:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:53:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:53:12] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:53:12] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:53:12] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:53:12] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[09:53:12] [PASSED] Automatic
[09:53:12] [PASSED] Full
[09:53:12] [PASSED] Limited 16:235
[09:53:12] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:53:12] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:53:12] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:53:12] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:53:12] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[09:53:12] [PASSED] RGB
[09:53:12] [PASSED] YUV 4:2:0
[09:53:12] [PASSED] YUV 4:2:2
[09:53:12] [PASSED] YUV 4:4:4
[09:53:12] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:53:12] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:53:12] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:53:12] ============= drm_damage_helper (21 subtests) ==============
[09:53:12] [PASSED] drm_test_damage_iter_no_damage
[09:53:12] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:53:12] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:53:12] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:53:12] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:53:12] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:53:12] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:53:12] [PASSED] drm_test_damage_iter_simple_damage
[09:53:12] [PASSED] drm_test_damage_iter_single_damage
[09:53:12] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:53:12] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:53:12] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:53:12] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:53:12] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:53:12] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:53:12] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:53:12] [PASSED] drm_test_damage_iter_damage
[09:53:12] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:53:12] [PASSED] drm_test_damage_iter_damage_one_outside
[09:53:12] [PASSED] drm_test_damage_iter_damage_src_moved
[09:53:12] [PASSED] drm_test_damage_iter_damage_not_visible
[09:53:12] ================ [PASSED] drm_damage_helper ================
[09:53:12] ============== drm_dp_mst_helper (3 subtests) ==============
[09:53:12] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[09:53:12] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:53:12] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:53:12] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:53:12] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:53:12] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:53:12] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:53:12] ============== drm_test_dp_mst_calc_pbn_div  ===============
[09:53:12] [PASSED] Link rate 2000000 lane count 4
[09:53:12] [PASSED] Link rate 2000000 lane count 2
[09:53:12] [PASSED] Link rate 2000000 lane count 1
[09:53:12] [PASSED] Link rate 1350000 lane count 4
[09:53:12] [PASSED] Link rate 1350000 lane count 2
[09:53:12] [PASSED] Link rate 1350000 lane count 1
[09:53:12] [PASSED] Link rate 1000000 lane count 4
[09:53:12] [PASSED] Link rate 1000000 lane count 2
[09:53:12] [PASSED] Link rate 1000000 lane count 1
[09:53:12] [PASSED] Link rate 810000 lane count 4
[09:53:12] [PASSED] Link rate 810000 lane count 2
[09:53:12] [PASSED] Link rate 810000 lane count 1
[09:53:12] [PASSED] Link rate 540000 lane count 4
[09:53:12] [PASSED] Link rate 540000 lane count 2
[09:53:12] [PASSED] Link rate 540000 lane count 1
[09:53:12] [PASSED] Link rate 270000 lane count 4
[09:53:12] [PASSED] Link rate 270000 lane count 2
[09:53:12] [PASSED] Link rate 270000 lane count 1
[09:53:12] [PASSED] Link rate 162000 lane count 4
[09:53:12] [PASSED] Link rate 162000 lane count 2
[09:53:12] [PASSED] Link rate 162000 lane count 1
[09:53:12] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:53:12] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[09:53:12] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:53:12] [PASSED] DP_POWER_UP_PHY with port number
[09:53:12] [PASSED] DP_POWER_DOWN_PHY with port number
[09:53:12] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:53:12] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:53:12] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:53:12] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:53:12] [PASSED] DP_QUERY_PAYLOAD with port number
[09:53:12] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:53:12] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:53:12] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:53:12] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:53:12] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:53:12] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:53:12] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:53:12] [PASSED] DP_REMOTE_I2C_READ with port number
[09:53:12] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:53:12] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:53:12] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:53:12] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:53:12] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:53:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:53:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:53:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:53:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:53:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:53:12] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:53:12] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:53:12] ================ [PASSED] drm_dp_mst_helper ================
[09:53:12] ================== drm_exec (7 subtests) ===================
[09:53:12] [PASSED] sanitycheck
[09:53:12] [PASSED] test_lock
[09:53:12] [PASSED] test_lock_unlock
[09:53:12] [PASSED] test_duplicates
[09:53:12] [PASSED] test_prepare
[09:53:12] [PASSED] test_prepare_array
[09:53:12] [PASSED] test_multiple_loops
[09:53:12] ==================== [PASSED] drm_exec =====================
[09:53:12] =========== drm_format_helper_test (17 subtests) ===========
[09:53:12] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:53:12] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:53:12] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:53:12] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:53:12] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:53:12] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:53:12] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:53:12] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:53:12] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:53:12] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:53:12] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:53:12] ============== drm_test_fb_xrgb8888_to_mono  ===============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:53:12] ==================== drm_test_fb_swab  =====================
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ================ [PASSED] drm_test_fb_swab =================
[09:53:12] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:53:12] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[09:53:12] [PASSED] single_pixel_source_buffer
[09:53:12] [PASSED] single_pixel_clip_rectangle
[09:53:12] [PASSED] well_known_colors
[09:53:12] [PASSED] destination_pitch
[09:53:12] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:53:12] ================= drm_test_fb_clip_offset  =================
[09:53:12] [PASSED] pass through
[09:53:12] [PASSED] horizontal offset
[09:53:12] [PASSED] vertical offset
[09:53:12] [PASSED] horizontal and vertical offset
[09:53:12] [PASSED] horizontal offset (custom pitch)
[09:53:12] [PASSED] vertical offset (custom pitch)
[09:53:12] [PASSED] horizontal and vertical offset (custom pitch)
[09:53:12] ============= [PASSED] drm_test_fb_clip_offset =============
[09:53:12] =================== drm_test_fb_memcpy  ====================
[09:53:12] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:53:12] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:53:12] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:53:12] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:53:12] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:53:12] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:53:12] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:53:12] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:53:12] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:53:12] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:53:12] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:53:12] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:53:12] =============== [PASSED] drm_test_fb_memcpy ================
[09:53:12] ============= [PASSED] drm_format_helper_test ==============
[09:53:12] ================= drm_format (18 subtests) =================
[09:53:12] [PASSED] drm_test_format_block_width_invalid
[09:53:12] [PASSED] drm_test_format_block_width_one_plane
[09:53:12] [PASSED] drm_test_format_block_width_two_plane
[09:53:12] [PASSED] drm_test_format_block_width_three_plane
[09:53:12] [PASSED] drm_test_format_block_width_tiled
[09:53:12] [PASSED] drm_test_format_block_height_invalid
[09:53:12] [PASSED] drm_test_format_block_height_one_plane
[09:53:12] [PASSED] drm_test_format_block_height_two_plane
[09:53:12] [PASSED] drm_test_format_block_height_three_plane
[09:53:12] [PASSED] drm_test_format_block_height_tiled
[09:53:12] [PASSED] drm_test_format_min_pitch_invalid
[09:53:12] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:53:12] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:53:12] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:53:12] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:53:12] [PASSED] drm_test_format_min_pitch_two_plane
[09:53:12] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:53:12] [PASSED] drm_test_format_min_pitch_tiled
[09:53:12] =================== [PASSED] drm_format ====================
[09:53:12] ============== drm_framebuffer (10 subtests) ===============
[09:53:12] ========== drm_test_framebuffer_check_src_coords  ==========
[09:53:12] [PASSED] Success: source fits into fb
[09:53:12] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:53:12] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:53:12] [PASSED] Fail: overflowing fb with source width
[09:53:12] [PASSED] Fail: overflowing fb with source height
[09:53:12] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:53:12] [PASSED] drm_test_framebuffer_cleanup
[09:53:12] =============== drm_test_framebuffer_create  ===============
[09:53:12] [PASSED] ABGR8888 normal sizes
[09:53:12] [PASSED] ABGR8888 max sizes
[09:53:12] [PASSED] ABGR8888 pitch greater than min required
[09:53:12] [PASSED] ABGR8888 pitch less than min required
[09:53:12] [PASSED] ABGR8888 Invalid width
[09:53:12] [PASSED] ABGR8888 Invalid buffer handle
[09:53:12] [PASSED] No pixel format
[09:53:12] [PASSED] ABGR8888 Width 0
[09:53:12] [PASSED] ABGR8888 Height 0
[09:53:12] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:53:12] [PASSED] ABGR8888 Large buffer offset
[09:53:12] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:53:12] [PASSED] ABGR8888 Invalid flag
[09:53:12] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:53:12] [PASSED] ABGR8888 Valid buffer modifier
[09:53:12] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:53:12] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:53:12] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:53:12] [PASSED] NV12 Normal sizes
[09:53:12] [PASSED] NV12 Max sizes
[09:53:12] [PASSED] NV12 Invalid pitch
[09:53:12] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:53:12] [PASSED] NV12 different  modifier per-plane
[09:53:12] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:53:12] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:53:12] [PASSED] NV12 Modifier for inexistent plane
[09:53:12] [PASSED] NV12 Handle for inexistent plane
[09:53:12] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:53:12] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:53:12] [PASSED] YVU420 Normal sizes
[09:53:12] [PASSED] YVU420 Max sizes
[09:53:12] [PASSED] YVU420 Invalid pitch
[09:53:12] [PASSED] YVU420 Different pitches
[09:53:12] [PASSED] YVU420 Different buffer offsets/pitches
[09:53:12] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:53:12] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:53:12] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:53:12] [PASSED] YVU420 Valid modifier
[09:53:12] [PASSED] YVU420 Different modifiers per plane
[09:53:12] [PASSED] YVU420 Modifier for inexistent plane
[09:53:12] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:53:12] [PASSED] X0L2 Normal sizes
[09:53:12] [PASSED] X0L2 Max sizes
[09:53:12] [PASSED] X0L2 Invalid pitch
[09:53:12] [PASSED] X0L2 Pitch greater than minimum required
[09:53:12] [PASSED] X0L2 Handle for inexistent plane
[09:53:12] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:53:12] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:53:12] [PASSED] X0L2 Valid modifier
[09:53:12] [PASSED] X0L2 Modifier for inexistent plane
[09:53:12] =========== [PASSED] drm_test_framebuffer_create ===========
[09:53:12] [PASSED] drm_test_framebuffer_free
[09:53:12] [PASSED] drm_test_framebuffer_init
[09:53:12] [PASSED] drm_test_framebuffer_init_bad_format
[09:53:12] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:53:12] [PASSED] drm_test_framebuffer_lookup
[09:53:12] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:53:12] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:53:12] ================= [PASSED] drm_framebuffer =================
[09:53:12] ================ drm_gem_shmem (8 subtests) ================
[09:53:12] [PASSED] drm_gem_shmem_test_obj_create
[09:53:12] [PASSED] drm_gem_shmem_test_obj_create_private
[09:53:12] [PASSED] drm_gem_shmem_test_pin_pages
[09:53:12] [PASSED] drm_gem_shmem_test_vmap
[09:53:12] [PASSED] drm_gem_shmem_test_get_sg_table
[09:53:12] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:53:12] [PASSED] drm_gem_shmem_test_madvise
[09:53:12] [PASSED] drm_gem_shmem_test_purge
[09:53:12] ================== [PASSED] drm_gem_shmem ==================
[09:53:12] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[09:53:12] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:53:12] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:53:12] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:53:12] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:53:12] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:53:12] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:53:12] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[09:53:12] [PASSED] Automatic
[09:53:12] [PASSED] Full
[09:53:12] [PASSED] Limited 16:235
[09:53:12] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:53:12] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:53:12] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:53:12] [PASSED] drm_test_check_disable_connector
[09:53:12] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:53:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:53:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:53:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:53:12] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:53:12] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:53:12] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:53:12] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:53:12] [PASSED] drm_test_check_output_bpc_dvi
[09:53:12] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:53:12] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:53:12] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:53:12] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:53:12] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:53:12] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:53:12] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:53:12] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:53:12] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:53:12] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:53:12] [PASSED] drm_test_check_broadcast_rgb_value
[09:53:12] [PASSED] drm_test_check_bpc_8_value
[09:53:12] [PASSED] drm_test_check_bpc_10_value
[09:53:12] [PASSED] drm_test_check_bpc_12_value
[09:53:12] [PASSED] drm_test_check_format_value
[09:53:12] [PASSED] drm_test_check_tmds_char_value
[09:53:12] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:53:12] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[09:53:12] [PASSED] drm_test_check_mode_valid
[09:53:12] [PASSED] drm_test_check_mode_valid_reject
[09:53:12] [PASSED] drm_test_check_mode_valid_reject_rate
[09:53:12] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:53:12] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:53:12] ================= drm_managed (2 subtests) =================
[09:53:12] [PASSED] drm_test_managed_release_action
[09:53:12] [PASSED] drm_test_managed_run_action
[09:53:12] =================== [PASSED] drm_managed ===================
[09:53:12] =================== drm_mm (6 subtests) ====================
[09:53:12] [PASSED] drm_test_mm_init
[09:53:12] [PASSED] drm_test_mm_debug
[09:53:12] [PASSED] drm_test_mm_align32
[09:53:12] [PASSED] drm_test_mm_align64
[09:53:12] [PASSED] drm_test_mm_lowest
[09:53:12] [PASSED] drm_test_mm_highest
[09:53:12] ===================== [PASSED] drm_mm ======================
[09:53:12] ============= drm_modes_analog_tv (5 subtests) =============
[09:53:12] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:53:12] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:53:12] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:53:12] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:53:12] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:53:12] =============== [PASSED] drm_modes_analog_tv ===============
[09:53:12] ============== drm_plane_helper (2 subtests) ===============
[09:53:12] =============== drm_test_check_plane_state  ================
[09:53:12] [PASSED] clipping_simple
[09:53:12] [PASSED] clipping_rotate_reflect
[09:53:12] [PASSED] positioning_simple
[09:53:12] [PASSED] upscaling
[09:53:12] [PASSED] downscaling
[09:53:12] [PASSED] rounding1
[09:53:12] [PASSED] rounding2
[09:53:12] [PASSED] rounding3
[09:53:12] [PASSED] rounding4
[09:53:12] =========== [PASSED] drm_test_check_plane_state ============
[09:53:12] =========== drm_test_check_invalid_plane_state  ============
[09:53:12] [PASSED] positioning_invalid
[09:53:12] [PASSED] upscaling_invalid
[09:53:12] [PASSED] downscaling_invalid
[09:53:12] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:53:12] ================ [PASSED] drm_plane_helper =================
[09:53:12] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:53:12] ====== drm_test_connector_helper_tv_get_modes_check  =======
[09:53:12] [PASSED] None
[09:53:12] [PASSED] PAL
[09:53:12] [PASSED] NTSC
[09:53:12] [PASSED] Both, NTSC Default
[09:53:12] [PASSED] Both, PAL Default
[09:53:12] [PASSED] Both, NTSC Default, with PAL on command-line
[09:53:12] [PASSED] Both, PAL Default, with NTSC on command-line
[09:53:12] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:53:12] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:53:12] ================== drm_rect (9 subtests) ===================
[09:53:12] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:53:12] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:53:12] [PASSED] drm_test_rect_clip_scaled_clipped
[09:53:12] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:53:12] ================= drm_test_rect_intersect  =================
[09:53:12] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:53:12] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:53:12] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:53:12] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:53:12] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:53:12] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:53:12] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:53:12] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:53:12] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:53:12] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:53:12] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:53:12] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:53:12] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:53:12] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:53:12] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:53:12] ============= [PASSED] drm_test_rect_intersect =============
[09:53:12] ================ drm_test_rect_calc_hscale  ================
[09:53:12] [PASSED] normal use
[09:53:12] [PASSED] out of max range
[09:53:12] [PASSED] out of min range
[09:53:12] [PASSED] zero dst
[09:53:12] [PASSED] negative src
[09:53:12] [PASSED] negative dst
[09:53:12] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:53:12] ================ drm_test_rect_calc_vscale  ================
[09:53:12] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[09:53:12] [PASSED] out of max range
[09:53:12] [PASSED] out of min range
[09:53:12] [PASSED] zero dst
[09:53:12] [PASSED] negative src
[09:53:12] [PASSED] negative dst
[09:53:12] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:53:12] ================== drm_test_rect_rotate  ===================
[09:53:12] [PASSED] reflect-x
[09:53:12] [PASSED] reflect-y
[09:53:12] [PASSED] rotate-0
[09:53:12] [PASSED] rotate-90
[09:53:12] [PASSED] rotate-180
[09:53:12] [PASSED] rotate-270
[09:53:12] ============== [PASSED] drm_test_rect_rotate ===============
[09:53:12] ================ drm_test_rect_rotate_inv  =================
[09:53:12] [PASSED] reflect-x
[09:53:12] [PASSED] reflect-y
[09:53:12] [PASSED] rotate-0
[09:53:12] [PASSED] rotate-90
[09:53:12] [PASSED] rotate-180
[09:53:12] [PASSED] rotate-270
[09:53:12] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:53:12] ==================== [PASSED] drm_rect =====================
[09:53:12] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:53:12] ============ drm_test_sysfb_build_fourcc_list  =============
[09:53:12] [PASSED] no native formats
[09:53:12] [PASSED] XRGB8888 as native format
[09:53:12] [PASSED] remove duplicates
[09:53:12] [PASSED] convert alpha formats
[09:53:12] [PASSED] random formats
[09:53:12] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:53:12] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:53:12] ================== drm_fixp (2 subtests) ===================
[09:53:12] [PASSED] drm_test_int2fixp
[09:53:12] [PASSED] drm_test_sm2fixp
[09:53:12] ==================== [PASSED] drm_fixp =====================
[09:53:12] ============================================================
[09:53:12] Testing complete. Ran 624 tests: passed: 624
[09:53:12] Elapsed time: 27.651s total, 1.659s configuring, 25.571s building, 0.383s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:53:12] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:53:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:53:23] Starting KUnit Kernel (1/1)...
[09:53:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:53:23] ================= ttm_device (5 subtests) ==================
[09:53:23] [PASSED] ttm_device_init_basic
[09:53:23] [PASSED] ttm_device_init_multiple
[09:53:23] [PASSED] ttm_device_fini_basic
[09:53:23] [PASSED] ttm_device_init_no_vma_man
[09:53:23] ================== ttm_device_init_pools  ==================
[09:53:23] [PASSED] No DMA allocations, no DMA32 required
[09:53:23] [PASSED] DMA allocations, DMA32 required
[09:53:23] [PASSED] No DMA allocations, DMA32 required
[09:53:23] [PASSED] DMA allocations, no DMA32 required
[09:53:23] ============== [PASSED] ttm_device_init_pools ==============
[09:53:23] =================== [PASSED] ttm_device ====================
[09:53:23] ================== ttm_pool (8 subtests) ===================
[09:53:23] ================== ttm_pool_alloc_basic  ===================
[09:53:23] [PASSED] One page
[09:53:23] [PASSED] More than one page
[09:53:23] [PASSED] Above the allocation limit
[09:53:23] [PASSED] One page, with coherent DMA mappings enabled
[09:53:23] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:53:23] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:53:23] ============== ttm_pool_alloc_basic_dma_addr  ==============
[09:53:23] [PASSED] One page
[09:53:23] [PASSED] More than one page
[09:53:23] [PASSED] Above the allocation limit
[09:53:23] [PASSED] One page, with coherent DMA mappings enabled
[09:53:23] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:53:23] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:53:23] [PASSED] ttm_pool_alloc_order_caching_match
[09:53:23] [PASSED] ttm_pool_alloc_caching_mismatch
[09:53:23] [PASSED] ttm_pool_alloc_order_mismatch
[09:53:23] [PASSED] ttm_pool_free_dma_alloc
[09:53:23] [PASSED] ttm_pool_free_no_dma_alloc
[09:53:23] [PASSED] ttm_pool_fini_basic
[09:53:23] ==================== [PASSED] ttm_pool =====================
[09:53:23] ================ ttm_resource (8 subtests) =================
[09:53:23] ================= ttm_resource_init_basic  =================
[09:53:23] [PASSED] Init resource in TTM_PL_SYSTEM
[09:53:23] [PASSED] Init resource in TTM_PL_VRAM
[09:53:23] [PASSED] Init resource in a private placement
[09:53:23] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:53:23] ============= [PASSED] ttm_resource_init_basic =============
[09:53:23] [PASSED] ttm_resource_init_pinned
[09:53:23] [PASSED] ttm_resource_fini_basic
[09:53:23] [PASSED] ttm_resource_manager_init_basic
[09:53:23] [PASSED] ttm_resource_manager_usage_basic
[09:53:23] [PASSED] ttm_resource_manager_set_used_basic
[09:53:23] [PASSED] ttm_sys_man_alloc_basic
[09:53:23] [PASSED] ttm_sys_man_free_basic
[09:53:23] ================== [PASSED] ttm_resource ===================
[09:53:23] =================== ttm_tt (15 subtests) ===================
[09:53:23] ==================== ttm_tt_init_basic  ====================
[09:53:23] [PASSED] Page-aligned size
[09:53:23] [PASSED] Extra pages requested
[09:53:23] ================ [PASSED] ttm_tt_init_basic ================
[09:53:23] [PASSED] ttm_tt_init_misaligned
[09:53:23] [PASSED] ttm_tt_fini_basic
[09:53:23] [PASSED] ttm_tt_fini_sg
[09:53:23] [PASSED] ttm_tt_fini_shmem
[09:53:23] [PASSED] ttm_tt_create_basic
[09:53:23] [PASSED] ttm_tt_create_invalid_bo_type
[09:53:23] [PASSED] ttm_tt_create_ttm_exists
[09:53:23] [PASSED] ttm_tt_create_failed
[09:53:23] [PASSED] ttm_tt_destroy_basic
[09:53:23] [PASSED] ttm_tt_populate_null_ttm
[09:53:23] [PASSED] ttm_tt_populate_populated_ttm
[09:53:23] [PASSED] ttm_tt_unpopulate_basic
[09:53:23] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:53:23] [PASSED] ttm_tt_swapin_basic
[09:53:23] ===================== [PASSED] ttm_tt ======================
[09:53:23] =================== ttm_bo (14 subtests) ===================
[09:53:23] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[09:53:23] [PASSED] Cannot be interrupted and sleeps
[09:53:23] [PASSED] Cannot be interrupted, locks straight away
[09:53:23] [PASSED] Can be interrupted, sleeps
[09:53:23] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:53:23] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:53:23] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:53:23] [PASSED] ttm_bo_reserve_double_resv
[09:53:23] [PASSED] ttm_bo_reserve_interrupted
[09:53:23] [PASSED] ttm_bo_reserve_deadlock
[09:53:23] [PASSED] ttm_bo_unreserve_basic
[09:53:23] [PASSED] ttm_bo_unreserve_pinned
[09:53:23] [PASSED] ttm_bo_unreserve_bulk
[09:53:23] [PASSED] ttm_bo_fini_basic
[09:53:23] [PASSED] ttm_bo_fini_shared_resv
[09:53:23] [PASSED] ttm_bo_pin_basic
[09:53:23] [PASSED] ttm_bo_pin_unpin_resource
[09:53:23] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:53:23] ===================== [PASSED] ttm_bo ======================
[09:53:23] ============== ttm_bo_validate (21 subtests) ===============
[09:53:23] ============== ttm_bo_init_reserved_sys_man  ===============
[09:53:23] [PASSED] Buffer object for userspace
[09:53:23] [PASSED] Kernel buffer object
[09:53:23] [PASSED] Shared buffer object
[09:53:23] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:53:23] ============== ttm_bo_init_reserved_mock_man  ==============
[09:53:23] [PASSED] Buffer object for userspace
[09:53:23] [PASSED] Kernel buffer object
[09:53:23] [PASSED] Shared buffer object
[09:53:23] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:53:23] [PASSED] ttm_bo_init_reserved_resv
[09:53:23] ================== ttm_bo_validate_basic  ==================
[09:53:23] [PASSED] Buffer object for userspace
[09:53:23] [PASSED] Kernel buffer object
[09:53:23] [PASSED] Shared buffer object
[09:53:23] ============== [PASSED] ttm_bo_validate_basic ==============
[09:53:23] [PASSED] ttm_bo_validate_invalid_placement
[09:53:23] ============= ttm_bo_validate_same_placement  ==============
[09:53:23] [PASSED] System manager
[09:53:23] [PASSED] VRAM manager
[09:53:23] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:53:23] [PASSED] ttm_bo_validate_failed_alloc
[09:53:23] [PASSED] ttm_bo_validate_pinned
[09:53:23] [PASSED] ttm_bo_validate_busy_placement
[09:53:23] ================ ttm_bo_validate_multihop  =================
[09:53:23] [PASSED] Buffer object for userspace
[09:53:23] [PASSED] Kernel buffer object
[09:53:23] [PASSED] Shared buffer object
[09:53:23] ============ [PASSED] ttm_bo_validate_multihop =============
[09:53:23] ========== ttm_bo_validate_no_placement_signaled  ==========
[09:53:23] [PASSED] Buffer object in system domain, no page vector
[09:53:23] [PASSED] Buffer object in system domain with an existing page vector
[09:53:23] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:53:23] ======== ttm_bo_validate_no_placement_not_signaled  ========
[09:53:23] [PASSED] Buffer object for userspace
[09:53:23] [PASSED] Kernel buffer object
[09:53:23] [PASSED] Shared buffer object
[09:53:23] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:53:23] [PASSED] ttm_bo_validate_move_fence_signaled
[09:53:23] ========= ttm_bo_validate_move_fence_not_signaled  =========
[09:53:23] [PASSED] Waits for GPU
[09:53:23] [PASSED] Tries to lock straight away
[09:53:23] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:53:23] [PASSED] ttm_bo_validate_happy_evict
[09:53:23] [PASSED] ttm_bo_validate_all_pinned_evict
[09:53:23] [PASSED] ttm_bo_validate_allowed_only_evict
[09:53:23] [PASSED] ttm_bo_validate_deleted_evict
[09:53:23] [PASSED] ttm_bo_validate_busy_domain_evict
[09:53:23] [PASSED] ttm_bo_validate_evict_gutting
[09:53:23] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[09:53:23] ================= [PASSED] ttm_bo_validate =================
[09:53:23] ============================================================
[09:53:23] Testing complete. Ran 101 tests: passed: 101
[09:53:23] Elapsed time: 11.258s total, 1.652s configuring, 9.389s building, 0.181s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for v3 7/7] drm/i915/irq: Enable flip_done for each plane on async flip

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3252 bytes --]

== Series Details ==

Series: v3 7/7] drm/i915/irq: Enable flip_done for each plane on async flip
URL   : https://patchwork.freedesktop.org/series/159791/
State : success

== Summary ==

CI Bug Log - changes from xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077_BAT -> xe-pw-159791v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 12)
------------------------------

  Additional (1): bat-bmg-1 

Known issues
------------

  Here are the changes found in xe-pw-159791v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-bmg-1:          NOTRUN -> [SKIP][1] ([Intel XE#2233])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/bat-bmg-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_dsc@dsc-basic:
    - bat-bmg-1:          NOTRUN -> [SKIP][2] ([Intel XE#2244])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/bat-bmg-1/igt@kms_dsc@dsc-basic.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - bat-bmg-1:          NOTRUN -> [SKIP][3] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/bat-bmg-1/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - bat-bmg-1:          NOTRUN -> [SKIP][4] ([Intel XE#2229])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/bat-bmg-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-bmg-1:          NOTRUN -> [SKIP][5] ([Intel XE#1420])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/bat-bmg-1/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - bat-bmg-1:          NOTRUN -> [SKIP][6] ([Intel XE#2245])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/bat-bmg-1/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-bmg-1:          NOTRUN -> [SKIP][7] ([Intel XE#2236])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/bat-bmg-1/igt@xe_pat@pat-index-xelpg.html

  
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850


Build changes
-------------

  * Linux: xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077 -> xe-pw-159791v1

  IGT_8692: 8692
  xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077: 580c8957e96b7372e82590d1b1e6c2842c245077
  xe-pw-159791v1: 159791v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/index.html

[-- Attachment #2: Type: text/html, Size: 3955 bytes --]

✓ Xe.CI.Full: success for v3 7/7] drm/i915/irq: Enable flip_done for each plane on async flip

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 22953 bytes --]

== Series Details ==

Series: v3 7/7] drm/i915/irq: Enable flip_done for each plane on async flip
URL   : https://patchwork.freedesktop.org/series/159791/
State : success

== Summary ==

CI Bug Log - changes from xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077_FULL -> xe-pw-159791v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-159791v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@linear-32bpp-rotate-0:
    - shard-bmg:          [PASS][1] -> [ABORT][2] ([Intel XE#5545])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077/shard-bmg-1/igt@kms_big_fb@linear-32bpp-rotate-0.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_big_fb@linear-32bpp-rotate-0.html

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2327]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#1124]) +9 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#2314] / [Intel XE#2894])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#367])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html

  * igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2887]) +10 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#3432]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2325]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2252]) +7 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2390])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][13] ([Intel XE#3304]) +1 other test fail
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html

  * igt@kms_content_protection@uevent-hdcp14:
    - shard-bmg:          NOTRUN -> [FAIL][14] ([Intel XE#6707]) +1 other test fail
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_content_protection@uevent-hdcp14.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2321]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-64x21:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2320]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_cursor_crc@cursor-sliding-64x21.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2286])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#1508])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dsc@dsc-with-formats:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2244])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_dsc@dsc-with-formats.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#4422])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html

  * igt@kms_fbcon_fbt@fbc:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#4156])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_fbcon_fbt@fbc.html

  * igt@kms_feature_discovery@psr2:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2374])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [PASS][23] -> [FAIL][24] ([Intel XE#301])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2380]) +1 other test skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2293]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2311]) +24 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#4141]) +12 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2313]) +26 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html

  * igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2:
    - shard-bmg:          [PASS][31] -> [ABORT][32] ([Intel XE#6740]) +1 other test abort
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077/shard-bmg-10/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-3/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-2.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#3544])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#6911])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#2501])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2393])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#5020])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#6886]) +4 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2391])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2505])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#1406] / [Intel XE#1489]) +5 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#1406] / [Intel XE#2387])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@psr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +11 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_psr@psr-suspend.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2330])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_sharpness_filter@invalid-filter-with-scaling-mode:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#6503])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html

  * igt@kms_vrr@flip-basic-fastset:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#1499])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_vrr@flip-basic-fastset.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [PASS][47] -> [FAIL][48] ([Intel XE#2142]) +1 other test fail
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077/shard-lnl-7/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-lnl-2/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@testdisplay:
    - shard-bmg:          NOTRUN -> [ABORT][49] ([Intel XE#6740] / [Intel XE#6976])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-1/igt@testdisplay.html

  * igt@xe_eudebug@vm-bind-clear:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#4837]) +9 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@xe_eudebug@vm-bind-clear.html

  * igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#4837] / [Intel XE#6665]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2322]) +6 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#6874]) +25 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority.html

  * igt@xe_exec_system_allocator@many-64k-mmap-huge:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#5007])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@xe_exec_system_allocator@many-64k-mmap-huge.html

  * igt@xe_exec_system_allocator@once-mmap-free-huge:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#4943]) +13 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@xe_exec_system_allocator@once-mmap-free-huge.html

  * igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#6281])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html

  * igt@xe_multigpu_svm@mgpu-pagefault-conflict:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#6964]) +3 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-10/igt@xe_multigpu_svm@mgpu-pagefault-conflict.html

  * igt@xe_pm@d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#2284])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@xe_pm@d3cold-basic-exec.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#4733])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-2/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-invalid-extension:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#944]) +2 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@xe_query@multigpu-query-invalid-extension.html

  
#### Possible fixes ####

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [FAIL][61] ([Intel XE#4633]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-9/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [FAIL][63] ([Intel XE#301]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_hdr@static-toggle-dpms@pipe-a-dp-2:
    - shard-bmg:          [ABORT][65] ([Intel XE#6740]) -> [PASS][66] +1 other test pass
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077/shard-bmg-9/igt@kms_hdr@static-toggle-dpms@pipe-a-dp-2.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-1/igt@kms_hdr@static-toggle-dpms@pipe-a-dp-2.html

  * igt@kms_rotation_crc@multiplane-rotation:
    - shard-bmg:          [FAIL][67] ([Intel XE#6946]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077/shard-bmg-2/igt@kms_rotation_crc@multiplane-rotation.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-3/igt@kms_rotation_crc@multiplane-rotation.html

  * igt@kms_vblank@query-busy-hang:
    - shard-bmg:          [ABORT][69] ([Intel XE#5545]) -> [PASS][70] +1 other test pass
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077/shard-bmg-2/igt@kms_vblank@query-busy-hang.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/shard-bmg-3/igt@kms_vblank@query-busy-hang.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
  [Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6946]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6946
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6976]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6976
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077 -> xe-pw-159791v1

  IGT_8692: 8692
  xe-4345-580c8957e96b7372e82590d1b1e6c2842c245077: 580c8957e96b7372e82590d1b1e6c2842c245077
  xe-pw-159791v1: 159791v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-159791v1/index.html

[-- Attachment #2: Type: text/html, Size: 25483 bytes --]

Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Michel Dänzer]

On 1/8/26 10:43, Arun R Murthy wrote:
> struct drm_crtc_state {
>          /**
>           * @async_flip:
>           *
>           * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the legacy
>           * PAGE_FLIP IOCTL. It's not wired up for the atomic IOCTL
> itself yet.
>           */
>          bool async_flip;
> 
> In the existing code the flag async_flip was intended for the legacy
> PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
> As per the hardware feature is concerned, async flip is a plane feature
> and is to be treated per plane basis and not per pipe basis.
> For a given hardware pipe, among the multiple hardware planes, one can
> go with sync flip and other 2/3 can go with async flip.

FWIW, this kind of mix'n'match doesn't seem useful with current UAPI, since no new commit can be made for the async plane(s) before the previous commit for the sync plane(s) has completed, so the async plane(s) can't actually have higher update rate than the sync one(s).


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast

RE: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Murthy, Arun R]

> -----Original Message-----
> From: Michel Dänzer <michel.daenzer@mailbox.org>
> Sent: Friday, January 9, 2026 3:13 PM
> To: Murthy, Arun R <arun.r.murthy@intel.com>; Maarten Lankhorst
> <maarten.lankhorst@linux.intel.com>; Maxime Ripard <mripard@kernel.org>;
> Thomas Zimmermann <tzimmermann@suse.de>; David Airlie
> <airlied@gmail.com>; Simona Vetter <simona@ffwll.ch>; Jani Nikula
> <jani.nikula@linux.intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Joonas
> Lahtinen <joonas.lahtinen@linux.intel.com>; Tvrtko Ursulin
> <tursulin@ursulin.net>; xaver.hugl@kde.org; andrealmeid@igalia.com; Kumar,
> Naveen1 <naveen1.kumar@intel.com>; Syrjala, Ville <ville.syrjala@intel.com>;
> Dmitry Baryshkov <lumag@kernel.org>
> Cc: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; intel-
> xe@lists.freedesktop.org
> Subject: Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections
> 
> On 1/8/26 10:43, Arun R Murthy wrote:
> > struct drm_crtc_state {
> >          /**
> >           * @async_flip:
> >           *
> >           * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the legacy
> >           * PAGE_FLIP IOCTL. It's not wired up for the atomic IOCTL
> > itself yet.
> >           */
> >          bool async_flip;
> >
> > In the existing code the flag async_flip was intended for the legacy
> > PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
> > As per the hardware feature is concerned, async flip is a plane
> > feature and is to be treated per plane basis and not per pipe basis.
> > For a given hardware pipe, among the multiple hardware planes, one can
> > go with sync flip and other 2/3 can go with async flip.
> 
> FWIW, this kind of mix'n'match doesn't seem useful with current UAPI, since no
> new commit can be made for the async plane(s) before the previous commit for
> the sync plane(s) has completed, so the async plane(s) can't actually have
> higher update rate than the sync one(s).
That’s right, such mix and match flips will still consume vblank time for flipping.
This series doesn’t solve that, but rather accommodate multiple plane async flips in an atomic ioctl and allowing disabling of a sync plane which is already enabled. There has been a long discussion in the gitlab(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834) on this.

Thanks and Regards,
Arun R Murthy
-------------------

Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Michel Dänzer]

On 1/9/26 12:07, Murthy, Arun R wrote:
>> From: Michel Dänzer <michel.daenzer@mailbox.org>
>> On 1/8/26 10:43, Arun R Murthy wrote:
>>> struct drm_crtc_state {
>>>          /**
>>>           * @async_flip:
>>>           *
>>>           * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the legacy
>>>           * PAGE_FLIP IOCTL. It's not wired up for the atomic IOCTL
>>> itself yet.
>>>           */
>>>          bool async_flip;
>>>
>>> In the existing code the flag async_flip was intended for the legacy
>>> PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
>>> As per the hardware feature is concerned, async flip is a plane
>>> feature and is to be treated per plane basis and not per pipe basis.
>>> For a given hardware pipe, among the multiple hardware planes, one can
>>> go with sync flip and other 2/3 can go with async flip.
>>
>> FWIW, this kind of mix'n'match doesn't seem useful with current UAPI, since no
>> new commit can be made for the async plane(s) before the previous commit for
>> the sync plane(s) has completed, so the async plane(s) can't actually have
>> higher update rate than the sync one(s).
> That’s right, such mix and match flips will still consume vblank time for flipping.

Does a plane property really make sense for this then?


> This series doesn’t solve that, but rather accommodate multiple plane async flips in an atomic ioctl and allowing disabling of a sync plane which is already enabled. There has been a long discussion in the gitlab(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834) on this.

AFAICT that's a false-positive rejection of commits which don't actually change cursor plane state.


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast

Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Murthy, Arun R]

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On 09-01-2026 16:52, Michel Dänzer wrote:
> On 1/9/26 12:07, Murthy, Arun R wrote:
>>> From: Michel Dänzer<michel.daenzer@mailbox.org>
>>> On 1/8/26 10:43, Arun R Murthy wrote:
>>>> struct drm_crtc_state {
>>>>           /**
>>>>            * @async_flip:
>>>>            *
>>>>            * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the legacy
>>>>            * PAGE_FLIP IOCTL. It's not wired up for the atomic IOCTL
>>>> itself yet.
>>>>            */
>>>>           bool async_flip;
>>>>
>>>> In the existing code the flag async_flip was intended for the legacy
>>>> PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
>>>> As per the hardware feature is concerned, async flip is a plane
>>>> feature and is to be treated per plane basis and not per pipe basis.
>>>> For a given hardware pipe, among the multiple hardware planes, one can
>>>> go with sync flip and other 2/3 can go with async flip.
>>> FWIW, this kind of mix'n'match doesn't seem useful with current UAPI, since no
>>> new commit can be made for the async plane(s) before the previous commit for
>>> the sync plane(s) has completed, so the async plane(s) can't actually have
>>> higher update rate than the sync one(s).
>> That’s right, such mix and match flips will still consume vblank time for flipping.
> Does a plane property really make sense for this then?

As per the hardware this async flip is per plane basis and not per crtc. 
Looking into the corrections in the display driver, the flag that we are 
using async_flip which is defined in drm_crtc_state has been commented 
saying this is to be used with legacy page_flip ioctl.
When support for async was added in atomic_ioctl, approach was taken so 
as to get it working with minimal changes.
Not that I am trying to clean up this. Recently AMD added async support 
on overlays as well for which  few other hacks were added. The checks 
that we do for async flip were all done in place of copy the 
objs/properties, but it actually is supposed to be done in the 
check_only() part of the drm core code. This was the limitation with the 
existing implementation.
As per hardware the async flip is associated with the plane, hence 
changing it to a plane property. Have taken precautions to not break the 
existing workflow.

This change will make the driver more clean for async flips and will 
give path for enabling more hardware features pertaining to async flip 
supported by the hardware.


>
>> This series doesn’t solve that, but rather accommodate multiple plane async flips in an atomic ioctl and allowing disabling of a sync plane which is already enabled. There has been a long discussion in the gitlab(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834) on this.
> AFAICT that's a false-positive rejection of commits which don't actually change cursor plane state.

https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2855843

Thanks and Regards,
Arun R Murthy
--------------------

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Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Michel Dänzer]

On 1/12/26 09:23, Murthy, Arun R wrote:
> On 09-01-2026 16:52, Michel Dänzer wrote:
>> On 1/9/26 12:07, Murthy, Arun R wrote:
>>>> From: Michel Dänzer <michel.daenzer@mailbox.org>
>>>> On 1/8/26 10:43, Arun R Murthy wrote:
>>>>> struct drm_crtc_state {
>>>>>          /**
>>>>>           * @async_flip:
>>>>>           *
>>>>>           * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the legacy
>>>>>           * PAGE_FLIP IOCTL. It's not wired up for the atomic IOCTL
>>>>> itself yet.
>>>>>           */
>>>>>          bool async_flip;
>>>>>
>>>>> In the existing code the flag async_flip was intended for the legacy
>>>>> PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
>>>>> As per the hardware feature is concerned, async flip is a plane
>>>>> feature and is to be treated per plane basis and not per pipe basis.
>>>>> For a given hardware pipe, among the multiple hardware planes, one can
>>>>> go with sync flip and other 2/3 can go with async flip.
>>>> FWIW, this kind of mix'n'match doesn't seem useful with current UAPI, since no
>>>> new commit can be made for the async plane(s) before the previous commit for
>>>> the sync plane(s) has completed, so the async plane(s) can't actually have
>>>> higher update rate than the sync one(s).
>>> That’s right, such mix and match flips will still consume vblank time for flipping.
>> Does a plane property really make sense for this then?
> 
> As per the hardware this async flip is per plane basis and not per crtc.

That's not really relevant.


> Not that I am trying to clean up this. Recently AMD added async support on overlays as well for which  few other hacks were added. The checks that we do for async flip were all done in place of copy the objs/properties, but it actually is supposed to be done in the check_only() part of the drm core code. This was the limitation with the existing implementation.

Those implementation details can be changed without changing UAPI.


> As per hardware the async flip is associated with the plane, hence changing it to a plane property.

A plane property would only really be needed for mixing async & sync plane updates in a single commit. Since that's currently not usefully possible due to other restrictions of the UAPI, the DRM_MODE_PAGE_FLIP_ASYNC flag which affects the commit as a whole is fine at this point.


>>> This series doesn’t solve that, but rather accommodate multiple plane async flips in an atomic ioctl and allowing disabling of a sync plane which is already enabled. There has been a long discussion in the gitlab(https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834) on this.
>> AFAICT that's a false-positive rejection of commits which don't actually change cursor plane state.
> 
> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13834#note_2855843

Not sure what you're trying to say here / how that comment contradicts what I wrote.


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast

Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Murthy, Arun R]

[-- Attachment #1: Type: text/plain, Size: 2559 bytes --]

On 12-01-2026 17:04, Michel Dänzer wrote:
> On 1/12/26 09:23, Murthy, Arun R wrote:
>> On 09-01-2026 16:52, Michel Dänzer wrote:
>>> On 1/9/26 12:07, Murthy, Arun R wrote:
>>>>> From: Michel Dänzer<michel.daenzer@mailbox.org>
>>>>> On 1/8/26 10:43, Arun R Murthy wrote:
>>>>>> struct drm_crtc_state {
>>>>>>           /**
>>>>>>            * @async_flip:
>>>>>>            *
>>>>>>            * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the legacy
>>>>>>            * PAGE_FLIP IOCTL. It's not wired up for the atomic IOCTL
>>>>>> itself yet.
>>>>>>            */
>>>>>>           bool async_flip;
>>>>>>
>>>>>> In the existing code the flag async_flip was intended for the legacy
>>>>>> PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
>>>>>> As per the hardware feature is concerned, async flip is a plane
>>>>>> feature and is to be treated per plane basis and not per pipe basis.
>>>>>> For a given hardware pipe, among the multiple hardware planes, one can
>>>>>> go with sync flip and other 2/3 can go with async flip.
>>>>> FWIW, this kind of mix'n'match doesn't seem useful with current UAPI, since no
>>>>> new commit can be made for the async plane(s) before the previous commit for
>>>>> the sync plane(s) has completed, so the async plane(s) can't actually have
>>>>> higher update rate than the sync one(s).
>>>> That’s right, such mix and match flips will still consume vblank time for flipping.
>>> Does a plane property really make sense for this then?
>> As per the hardware this async flip is per plane basis and not per crtc.
> That's not really relevant.
>
>
>> Not that I am trying to clean up this. Recently AMD added async support on overlays as well for which  few other hacks were added. The checks that we do for async flip were all done in place of copy the objs/properties, but it actually is supposed to be done in the check_only() part of the drm core code. This was the limitation with the existing implementation.
> Those implementation details can be changed without changing UAPI.
>
The existing approach ends up adding more and more hacks upon addition 
of async feature enhancement in the driver.
One such example is the recent patches from AMD for adding async flip 
support on overlays which adds more and more hacks in the property/obj 
handling code.
This was just an initiative to clean up the async feature and handle 
async flip in a well designed way.

I will leave it to the maintainers and other reviewers to comment over here!

Thanks and Regards,
Arun R Murthy
--------------------

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RE: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Murthy, Arun R]

> On 1/12/26 09:23, Murthy, Arun R wrote:
> > On 09-01-2026 16:52, Michel Dänzer wrote:
> >> On 1/9/26 12:07, Murthy, Arun R wrote:
> >>>> From: Michel Dänzer <michel.daenzer@mailbox.org> On 1/8/26 10:43,
> >>>> Arun R Murthy wrote:
> >>>>> struct drm_crtc_state {
> >>>>>          /**
> >>>>>           * @async_flip:
> >>>>>           *
> >>>>>           * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the
> legacy
> >>>>>           * PAGE_FLIP IOCTL. It's not wired up for the atomic
> >>>>> IOCTL itself yet.
> >>>>>           */
> >>>>>          bool async_flip;
> >>>>>
> >>>>> In the existing code the flag async_flip was intended for the
> >>>>> legacy PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
> >>>>> As per the hardware feature is concerned, async flip is a plane
> >>>>> feature and is to be treated per plane basis and not per pipe basis.
> >>>>> For a given hardware pipe, among the multiple hardware planes, one
> >>>>> can go with sync flip and other 2/3 can go with async flip.
> >>>> FWIW, this kind of mix'n'match doesn't seem useful with current
> >>>> UAPI, since no new commit can be made for the async plane(s) before
> >>>> the previous commit for the sync plane(s) has completed, so the
> >>>> async plane(s) can't actually have higher update rate than the sync one(s).
> >>> That’s right, such mix and match flips will still consume vblank time for
> flipping.
> >> Does a plane property really make sense for this then?
> >
> > As per the hardware this async flip is per plane basis and not per crtc.
> 
> That's not really relevant.
> 
> 
> > Not that I am trying to clean up this. Recently AMD added async support on
> overlays as well for which  few other hacks were added. The checks that we do
> for async flip were all done in place of copy the objs/properties, but it actually is
> supposed to be done in the check_only() part of the drm core code. This was
> the limitation with the existing implementation.
> 
> Those implementation details can be changed without changing UAPI.
> 
> 
> > As per hardware the async flip is associated with the plane, hence changing it
> to a plane property.
> 
> A plane property would only really be needed for mixing async & sync plane
> updates in a single commit. Since that's currently not usefully possible due to
> other restrictions of the UAPI, the DRM_MODE_PAGE_FLIP_ASYNC flag which
> affects the commit as a whole is fine at this point.
> 
Sorry for getting back late on this, took some time to collaborate all the feedbacks.

We can depict the below 3 scenarios based on the discussions so far.
1. KMD can allow a mix of sync and async only if there is a disable plane req on sync and no plane update on sync flips along with async flips(maybe on multiple planes).  KMD will send the flipdone after sync plane disable is done. (Basically flipdone will send at vblank)
2. With multiple plane async flips, KMD send one flip done after completion of the last plane async flip. (async flag per plane may not be required in this case, async flag per crtc is considered)
3. With multiple plane async flips, KMD send flip done per plane basis to the user. (async flag per plane from user)
4. With supporting a mix of sync and async flips, should KMD allow them and send one flipdone for async flips and one flipdone for sync flips.

Out of these scenarios we feel 1 and 2 would be more realistic and hence we have added support of these two in this series.

We dont see any major use case with scenario 3 and 4 hence not considered in this series.

This series also includes the cleanup of async path in the KMD. For the userspace it still doesn’t have any impact but opens a window by adding new plane property for async flip which is not mandatory.
Even with the existing DRM_MODE_PAGE_FLIP_ASYNC flag passed in the atomic_ioctl will still work as expected.
Felt its better to make the correction on how a async flip req is send from the user in atomic_ioctl by adding new plane property.
Adding plane level async flag in atomic_plane_state is done so as to support scenario 1 mentioned above.

Thanks for all you feedback!

Thanks and Regards,
Arun R Murthy
--------------------

Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Michel Dänzer]

On 2/11/26 06:48, Murthy, Arun R wrote:
>> On 1/12/26 09:23, Murthy, Arun R wrote:
>>> On 09-01-2026 16:52, Michel Dänzer wrote:
>>>> On 1/9/26 12:07, Murthy, Arun R wrote:
>>>>>> From: Michel Dänzer <michel.daenzer@mailbox.org> On 1/8/26 10:43,
>>>>>> Arun R Murthy wrote:
>>>>>>> struct drm_crtc_state {
>>>>>>>          /**
>>>>>>>           * @async_flip:
>>>>>>>           *
>>>>>>>           * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the
>> legacy
>>>>>>>           * PAGE_FLIP IOCTL. It's not wired up for the atomic
>>>>>>> IOCTL itself yet.
>>>>>>>           */
>>>>>>>          bool async_flip;
>>>>>>>
>>>>>>> In the existing code the flag async_flip was intended for the
>>>>>>> legacy PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
>>>>>>> As per the hardware feature is concerned, async flip is a plane
>>>>>>> feature and is to be treated per plane basis and not per pipe basis.
>>>>>>> For a given hardware pipe, among the multiple hardware planes, one
>>>>>>> can go with sync flip and other 2/3 can go with async flip.
>>>>>> FWIW, this kind of mix'n'match doesn't seem useful with current
>>>>>> UAPI, since no new commit can be made for the async plane(s) before
>>>>>> the previous commit for the sync plane(s) has completed, so the
>>>>>> async plane(s) can't actually have higher update rate than the sync one(s).
>>>>> That’s right, such mix and match flips will still consume vblank time for
>> flipping.
>>>> Does a plane property really make sense for this then?
>>>
>>> As per the hardware this async flip is per plane basis and not per crtc.
>>
>> That's not really relevant.
>>
>>
>>> Not that I am trying to clean up this. Recently AMD added async support on
>> overlays as well for which  few other hacks were added. The checks that we do
>> for async flip were all done in place of copy the objs/properties, but it actually is
>> supposed to be done in the check_only() part of the drm core code. This was
>> the limitation with the existing implementation.
>>
>> Those implementation details can be changed without changing UAPI.
>>
>>
>>> As per hardware the async flip is associated with the plane, hence changing it
>> to a plane property.
>>
>> A plane property would only really be needed for mixing async & sync plane
>> updates in a single commit. Since that's currently not usefully possible due to
>> other restrictions of the UAPI, the DRM_MODE_PAGE_FLIP_ASYNC flag which
>> affects the commit as a whole is fine at this point.
>>
> Sorry for getting back late on this, took some time to collaborate all the feedbacks.
> 
> We can depict the below 3 scenarios based on the discussions so far.
> 1. KMD can allow a mix of sync and async only if there is a disable plane req on sync and no plane update on sync flips along with async flips(maybe on multiple planes).  KMD will send the flipdone after sync plane disable is done. (Basically flipdone will send at vblank)

What would be the point of allowing that? The compositor can't do the next commit before the sync plane has turned off anyway, so it can just as well do that in a sync commit and the async plane updates in separate commits later.


> 3. With multiple plane async flips, KMD send flip done per plane basis to the user. (async flag per plane from user)
> 4. With supporting a mix of sync and async flips, should KMD allow them and send one flipdone for async flips and one flipdone for sync flips.

Again not sure what would be the point of 3 or 4, since the compositor can't do the next commit before all planes have updated anyway.


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast

Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Murthy, Arun R]

On 11-02-2026 14:27, Michel Dänzer wrote:
> On 2/11/26 06:48, Murthy, Arun R wrote:
>>> On 1/12/26 09:23, Murthy, Arun R wrote:
>>>> On 09-01-2026 16:52, Michel Dänzer wrote:
>>>>> On 1/9/26 12:07, Murthy, Arun R wrote:
>>>>>>> From: Michel Dänzer <michel.daenzer@mailbox.org> On 1/8/26 10:43,
>>>>>>> Arun R Murthy wrote:
>>>>>>>> struct drm_crtc_state {
>>>>>>>>           /**
>>>>>>>>            * @async_flip:
>>>>>>>>            *
>>>>>>>>            * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the
>>> legacy
>>>>>>>>            * PAGE_FLIP IOCTL. It's not wired up for the atomic
>>>>>>>> IOCTL itself yet.
>>>>>>>>            */
>>>>>>>>           bool async_flip;
>>>>>>>>
>>>>>>>> In the existing code the flag async_flip was intended for the
>>>>>>>> legacy PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
>>>>>>>> As per the hardware feature is concerned, async flip is a plane
>>>>>>>> feature and is to be treated per plane basis and not per pipe basis.
>>>>>>>> For a given hardware pipe, among the multiple hardware planes, one
>>>>>>>> can go with sync flip and other 2/3 can go with async flip.
>>>>>>> FWIW, this kind of mix'n'match doesn't seem useful with current
>>>>>>> UAPI, since no new commit can be made for the async plane(s) before
>>>>>>> the previous commit for the sync plane(s) has completed, so the
>>>>>>> async plane(s) can't actually have higher update rate than the sync one(s).
>>>>>> That’s right, such mix and match flips will still consume vblank time for
>>> flipping.
>>>>> Does a plane property really make sense for this then?
>>>> As per the hardware this async flip is per plane basis and not per crtc.
>>> That's not really relevant.
>>>
>>>
>>>> Not that I am trying to clean up this. Recently AMD added async support on
>>> overlays as well for which  few other hacks were added. The checks that we do
>>> for async flip were all done in place of copy the objs/properties, but it actually is
>>> supposed to be done in the check_only() part of the drm core code. This was
>>> the limitation with the existing implementation.
>>>
>>> Those implementation details can be changed without changing UAPI.
>>>
>>>
>>>> As per hardware the async flip is associated with the plane, hence changing it
>>> to a plane property.
>>>
>>> A plane property would only really be needed for mixing async & sync plane
>>> updates in a single commit. Since that's currently not usefully possible due to
>>> other restrictions of the UAPI, the DRM_MODE_PAGE_FLIP_ASYNC flag which
>>> affects the commit as a whole is fine at this point.
>>>
>> Sorry for getting back late on this, took some time to collaborate all the feedbacks.
>>
>> We can depict the below 3 scenarios based on the discussions so far.
>> 1. KMD can allow a mix of sync and async only if there is a disable plane req on sync and no plane update on sync flips along with async flips(maybe on multiple planes).  KMD will send the flipdone after sync plane disable is done. (Basically flipdone will send at vblank)
> What would be the point of allowing that? The compositor can't do the next commit before the sync plane has turned off anyway, so it can just as well do that in a sync commit and the async plane updates in separate commits later.
For an async flip to start, the 1st async flip will consume almost a 
vblank time, so if compositor does a sync flip on a plane along with 
sync flip to disable the plane, the next async flip will still consume a 
vblank time. If KMD allows disabling of a sync plane with async flip 
then we can overcome this.
>
>> 3. With multiple plane async flips, KMD send flip done per plane basis to the user. (async flag per plane from user)
>> 4. With supporting a mix of sync and async flips, should KMD allow them and send one flipdone for async flips and one flipdone for sync flips.
> Again not sure what would be the point of 3 or 4, since the compositor can't do the next commit before all planes have updated anyway.
Upon compositor getting a flipdone on the async flip, the buffers will 
be unpinned and this can be used by the compositor for rendering or for 
preparing the next flip.
This patch series anyway doesnt support either of 3 or 4, just trying to 
understand if there is a use case from the compositor for this.

Thanks and Regards,
Arun R Murthy
-------------------

Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Michel Dänzer]

On 2/11/26 14:38, Murthy, Arun R wrote:
> On 11-02-2026 14:27, Michel Dänzer wrote:
>> On 2/11/26 06:48, Murthy, Arun R wrote:
>>>> On 1/12/26 09:23, Murthy, Arun R wrote:
>>>>> On 09-01-2026 16:52, Michel Dänzer wrote:
>>>>>> On 1/9/26 12:07, Murthy, Arun R wrote:
>>>>>>>> From: Michel Dänzer <michel.daenzer@mailbox.org> On 1/8/26 10:43,
>>>>>>>> Arun R Murthy wrote:
>>>>>>>>> struct drm_crtc_state {
>>>>>>>>>           /**
>>>>>>>>>            * @async_flip:
>>>>>>>>>            *
>>>>>>>>>            * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the
>>>> legacy
>>>>>>>>>            * PAGE_FLIP IOCTL. It's not wired up for the atomic
>>>>>>>>> IOCTL itself yet.
>>>>>>>>>            */
>>>>>>>>>           bool async_flip;
>>>>>>>>>
>>>>>>>>> In the existing code the flag async_flip was intended for the
>>>>>>>>> legacy PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
>>>>>>>>> As per the hardware feature is concerned, async flip is a plane
>>>>>>>>> feature and is to be treated per plane basis and not per pipe basis.
>>>>>>>>> For a given hardware pipe, among the multiple hardware planes, one
>>>>>>>>> can go with sync flip and other 2/3 can go with async flip.
>>>>>>>> FWIW, this kind of mix'n'match doesn't seem useful with current
>>>>>>>> UAPI, since no new commit can be made for the async plane(s) before
>>>>>>>> the previous commit for the sync plane(s) has completed, so the
>>>>>>>> async plane(s) can't actually have higher update rate than the sync one(s).
>>>>>>> That’s right, such mix and match flips will still consume vblank time for
>>>> flipping.
>>>>>> Does a plane property really make sense for this then?
>>>>> As per the hardware this async flip is per plane basis and not per crtc.
>>>> That's not really relevant.
>>>>
>>>>
>>>>> Not that I am trying to clean up this. Recently AMD added async support on
>>>> overlays as well for which  few other hacks were added. The checks that we do
>>>> for async flip were all done in place of copy the objs/properties, but it actually is
>>>> supposed to be done in the check_only() part of the drm core code. This was
>>>> the limitation with the existing implementation.
>>>>
>>>> Those implementation details can be changed without changing UAPI.
>>>>
>>>>
>>>>> As per hardware the async flip is associated with the plane, hence changing it
>>>> to a plane property.
>>>>
>>>> A plane property would only really be needed for mixing async & sync plane
>>>> updates in a single commit. Since that's currently not usefully possible due to
>>>> other restrictions of the UAPI, the DRM_MODE_PAGE_FLIP_ASYNC flag which
>>>> affects the commit as a whole is fine at this point.
>>>>
>>> Sorry for getting back late on this, took some time to collaborate all the feedbacks.
>>>
>>> We can depict the below 3 scenarios based on the discussions so far.
>>> 1. KMD can allow a mix of sync and async only if there is a disable plane req on sync and no plane update on sync flips along with async flips(maybe on multiple planes).  KMD will send the flipdone after sync plane disable is done. (Basically flipdone will send at vblank)
>> What would be the point of allowing that? The compositor can't do the next commit before the sync plane has turned off anyway, so it can just as well do that in a sync commit and the async plane updates in separate commits later.
> For an async flip to start, the 1st async flip will consume almost a vblank time, so if compositor does a sync flip on a plane along with sync flip to disable the plane, the next async flip will still consume a vblank time. If KMD allows disabling of a sync plane with async flip then we can overcome this.

The HW limitation you describe makes frequent switching between sync & async flips infeasible anyway, so it's doubtful that an additional sync flip before async flips would really make a difference in practice.

So this would essentially complicate the UAPI to avoid a vendor-specific issue, for dubious benefit.


>>> 3. With multiple plane async flips, KMD send flip done per plane basis to the user. (async flag per plane from user)
>>> 4. With supporting a mix of sync and async flips, should KMD allow them and send one flipdone for async flips and one flipdone for sync flips.
>> Again not sure what would be the point of 3 or 4, since the compositor can't do the next commit before all planes have updated anyway.
> Upon compositor getting a flipdone on the async flip, the buffers will be unpinned and this can be used by the compositor for rendering or for preparing the next flip.

I have a hard time seeing that make any practical difference.


-- 
Earthling Michel Dänzer       \        GNOME / Xwayland / Mesa developer
https://redhat.com             \               Libre software enthusiast

Re: [PATCH RFC v3 0/7] Async Flip in Atomic ioctl corrections

[Murthy, Arun R]

On 11-02-2026 19:21, Michel Dänzer wrote:
> On 2/11/26 14:38, Murthy, Arun R wrote:
>> On 11-02-2026 14:27, Michel Dänzer wrote:
>>> On 2/11/26 06:48, Murthy, Arun R wrote:
>>>>> On 1/12/26 09:23, Murthy, Arun R wrote:
>>>>>> On 09-01-2026 16:52, Michel Dänzer wrote:
>>>>>>> On 1/9/26 12:07, Murthy, Arun R wrote:
>>>>>>>>> From: Michel Dänzer <michel.daenzer@mailbox.org> On 1/8/26 10:43,
>>>>>>>>> Arun R Murthy wrote:
>>>>>>>>>> struct drm_crtc_state {
>>>>>>>>>>            /**
>>>>>>>>>>             * @async_flip:
>>>>>>>>>>             *
>>>>>>>>>>             * This is set when DRM_MODE_PAGE_FLIP_ASYNC is set in the
>>>>> legacy
>>>>>>>>>>             * PAGE_FLIP IOCTL. It's not wired up for the atomic
>>>>>>>>>> IOCTL itself yet.
>>>>>>>>>>             */
>>>>>>>>>>            bool async_flip;
>>>>>>>>>>
>>>>>>>>>> In the existing code the flag async_flip was intended for the
>>>>>>>>>> legacy PAGE_FLIP IOCTL. But the same is being used for atomic IOCTL.
>>>>>>>>>> As per the hardware feature is concerned, async flip is a plane
>>>>>>>>>> feature and is to be treated per plane basis and not per pipe basis.
>>>>>>>>>> For a given hardware pipe, among the multiple hardware planes, one
>>>>>>>>>> can go with sync flip and other 2/3 can go with async flip.
>>>>>>>>> FWIW, this kind of mix'n'match doesn't seem useful with current
>>>>>>>>> UAPI, since no new commit can be made for the async plane(s) before
>>>>>>>>> the previous commit for the sync plane(s) has completed, so the
>>>>>>>>> async plane(s) can't actually have higher update rate than the sync one(s).
>>>>>>>> That’s right, such mix and match flips will still consume vblank time for
>>>>> flipping.
>>>>>>> Does a plane property really make sense for this then?
>>>>>> As per the hardware this async flip is per plane basis and not per crtc.
>>>>> That's not really relevant.
>>>>>
>>>>>
>>>>>> Not that I am trying to clean up this. Recently AMD added async support on
>>>>> overlays as well for which  few other hacks were added. The checks that we do
>>>>> for async flip were all done in place of copy the objs/properties, but it actually is
>>>>> supposed to be done in the check_only() part of the drm core code. This was
>>>>> the limitation with the existing implementation.
>>>>>
>>>>> Those implementation details can be changed without changing UAPI.
>>>>>
>>>>>
>>>>>> As per hardware the async flip is associated with the plane, hence changing it
>>>>> to a plane property.
>>>>>
>>>>> A plane property would only really be needed for mixing async & sync plane
>>>>> updates in a single commit. Since that's currently not usefully possible due to
>>>>> other restrictions of the UAPI, the DRM_MODE_PAGE_FLIP_ASYNC flag which
>>>>> affects the commit as a whole is fine at this point.
>>>>>
>>>> Sorry for getting back late on this, took some time to collaborate all the feedbacks.
>>>>
>>>> We can depict the below 3 scenarios based on the discussions so far.
>>>> 1. KMD can allow a mix of sync and async only if there is a disable plane req on sync and no plane update on sync flips along with async flips(maybe on multiple planes).  KMD will send the flipdone after sync plane disable is done. (Basically flipdone will send at vblank)
>>> What would be the point of allowing that? The compositor can't do the next commit before the sync plane has turned off anyway, so it can just as well do that in a sync commit and the async plane updates in separate commits later.
>> For an async flip to start, the 1st async flip will consume almost a vblank time, so if compositor does a sync flip on a plane along with sync flip to disable the plane, the next async flip will still consume a vblank time. If KMD allows disabling of a sync plane with async flip then we can overcome this.
> The HW limitation you describe makes frequent switching between sync & async flips infeasible anyway, so it's doubtful that an additional sync flip before async flips would really make a difference in practice.
>
> So this would essentially complicate the UAPI to avoid a vendor-specific issue, for dubious benefit.

KMD doesnt convert the 1st async flip to a sync flip, its just the time 
for flipdone on the 1st async can be upto a vblank time. If from 
compositor there is no such case to accommodate a plane disable on sync 
flip along with a async flip then will drop it from this series and will 
only keep the cleanup and adding of a new plane property for async flip.


Thanks and Regards,
Arun R Murthy
--------------------