* [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes
@ 2026-08-03 21:49 Michał Grzelak
2026-08-03 21:49 ` [PATCH v2 1/4] drm/i915/display: fix SKL_DSSM register macros Michał Grzelak
` (10 more replies)
0 siblings, 11 replies; 15+ messages in thread
From: Michał Grzelak @ 2026-08-03 21:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Next version of [1].
BR,
Michał
[1] https://lore.kernel.org/intel-gfx/20260727222125.2459634-1-michal.grzelak@intel.com/
---
Changelog:
v1->v2
- s/REG_GENMASK/REG_FIELD_PREP/ (Jani)
- use either runtime info flag or display version check (Jani)
- don't initialize runtime info flag to 0 (Jani)
Michał Grzelak (4):
drm/i915/display: fix SKL_DSSM register macros
drm/i915/3dlut: disable 3D LUT for pre-GLK
drm/i915/3dlut: log 3D LUT's status
drm/i915/3dlut: disable 3D LUT if unsupported
drivers/gpu/drm/i915/display/intel_color.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_device.c | 10 ++++++++++
drivers/gpu/drm/i915/display/intel_display_device.h | 2 ++
drivers/gpu/drm/i915/display/intel_display_regs.h | 9 +++++----
4 files changed, 20 insertions(+), 4 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2 1/4] drm/i915/display: fix SKL_DSSM register macros
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
@ 2026-08-03 21:49 ` Michał Grzelak
2026-08-04 8:01 ` Jani Nikula
2026-08-03 21:49 ` [PATCH v2 2/4] drm/i915/3dlut: disable 3D LUT for pre-GLK Michał Grzelak
` (9 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Michał Grzelak @ 2026-08-03 21:49 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Jani Nikula, Michał Grzelak
Indent SKL_DSSM register macros. Define mask and register values with
REG_GENMASK() and REG_FIELD_PREP() instead of bit shifts.
v1->v2
- s/REG_GENMASK/REG_FIELD_PREP/ (Jani)
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_regs.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 0f5018482497..740331ead20a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1779,10 +1779,10 @@
#define XE2LPD_DE_CAP_SCALER_SINGLE 1
#define SKL_DSSM _MMIO(0x51004)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK (7 << 29)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz (0 << 29)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz (1 << 29)
-#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz (2 << 29)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK REG_GENMASK(31, 29)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz REG_FIELD_PREP(ICL_DSSM_CDCLK_PLL_REFCLK_MASK, 0)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz REG_FIELD_PREP(ICL_DSSM_CDCLK_PLL_REFCLK_MASK, 1)
+#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz REG_FIELD_PREP(ICL_DSSM_CDCLK_PLL_REFCLK_MASK, 2)
/*GEN11 chicken */
#define _PIPEA_CHICKEN 0x70038
--
2.45.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 2/4] drm/i915/3dlut: disable 3D LUT for pre-GLK
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
2026-08-03 21:49 ` [PATCH v2 1/4] drm/i915/display: fix SKL_DSSM register macros Michał Grzelak
@ 2026-08-03 21:49 ` Michał Grzelak
2026-08-04 14:39 ` Borah, Chaitanya Kumar
2026-08-03 21:49 ` [PATCH v2 3/4] drm/i915/3dlut: log 3D LUT's status Michał Grzelak
` (8 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Michał Grzelak @ 2026-08-03 21:49 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: Jani Nikula, Michał Grzelak, Chaitanya Kumar Borah, stable
GLK+ hardware supports 3D LUT. Disable the feature for pre-GLK
platforms.
Add .has_3dlut field into struct intel_display_runtime_info. Use the
field to store whether 3D LUT is enabled. Initialize the field to 1 on
GLK+.
Add macro for checking 3D LUT's support. Use it while checking whether
CRTC has 3D LUT enabled.
v1->v2
- use either runtime info flag or display version check (Jani)
- don't initialize runtime info flag to 0 (Jani)
Bspec: 15585
Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Cc: <stable@vger.kernel.org>
Fixes: 65db7a1f9cf7 ("drm/i915/color: Add 3D LUT to color pipeline")
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_device.c | 5 +++++
drivers/gpu/drm/i915/display/intel_display_device.h | 2 ++
3 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 87ced9f6ff40..ffdefb51a264 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4258,6 +4258,9 @@ intel_color_load_plane_luts(struct intel_dsb *dsb,
bool
intel_color_crtc_has_3dlut(struct intel_display *display, enum pipe pipe)
{
+ if (!HAS_3DLUT(display))
+ return false;
+
if (DISPLAY_VER(display) >= 12)
return pipe == PIPE_A || pipe == PIPE_B;
else
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index f17fc2c68472..4c09f35644ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -864,6 +864,7 @@ static const struct platform_desc glk_desc = {
GLK_COLORS,
.__runtime_defaults.ip.ver = 10,
+ .__runtime_defaults.has_3dlut = 1,
},
STEP_INFO(glk_steppings),
};
@@ -899,6 +900,7 @@ static const struct platform_desc glk_desc = {
ICL_COLORS, \
\
.__runtime_defaults.ip.ver = 11, \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.has_hdcp = 1, \
@@ -990,6 +992,7 @@ static const struct platform_desc ehl_desc = {
ICL_COLORS, \
\
.__runtime_defaults.ip.ver = 12, \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.has_hdcp = 1, \
@@ -1156,6 +1159,7 @@ static const struct platform_desc adl_s_desc = {
TGL_CURSOR_OFFSETS, \
\
.__runtime_defaults.ip.ver = 13, \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A), \
@@ -1335,6 +1339,7 @@ static const struct platform_desc dg2_desc = {
BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_D), \
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A) | BIT(INTEL_FBC_B), \
+ .__runtime_defaults.has_3dlut = 1, \
.__runtime_defaults.has_dmc = 1, \
.__runtime_defaults.has_dsc = 1, \
.__runtime_defaults.has_hdcp = 1, \
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 7121e7cd9512..5300c6ab99e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -147,6 +147,7 @@ struct intel_display_platforms {
#define HAS_128B_Y_TILING(__display) (!(__display)->platform.i915g && !(__display)->platform.i915gm)
#define HAS_2PPC(__display) (DISPLAY_VER(__display) >= 10)
+#define HAS_3DLUT(__display) (DISPLAY_RUNTIME_INFO(__display)->has_3dlut)
#define HAS_4TILE(__display) ((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
#define HAS_ASYNC_FLIPS(__display) (DISPLAY_VER(__display) >= 5)
#define HAS_AS_SDP(__display) (DISPLAY_VER(__display) >= 13)
@@ -304,6 +305,7 @@ struct intel_display_runtime_info {
u8 fbc_mask;
+ bool has_3dlut;
bool has_hdcp;
bool has_dmc;
bool has_dsc;
--
2.45.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 3/4] drm/i915/3dlut: log 3D LUT's status
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
2026-08-03 21:49 ` [PATCH v2 1/4] drm/i915/display: fix SKL_DSSM register macros Michał Grzelak
2026-08-03 21:49 ` [PATCH v2 2/4] drm/i915/3dlut: disable 3D LUT for pre-GLK Michał Grzelak
@ 2026-08-03 21:49 ` Michał Grzelak
2026-08-03 21:49 ` [PATCH v2 4/4] drm/i915/3dlut: disable 3D LUT if unsupported Michał Grzelak
` (7 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Michał Grzelak @ 2026-08-03 21:49 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: Jani Nikula, Michał Grzelak, Chaitanya Kumar Borah
Print .has_3dlut runtime info flag in intel_display_device_info_print().
Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 4c09f35644ba..a2bea5ac59cf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -2001,6 +2001,7 @@ void intel_display_device_info_print(const struct intel_display_device_info *inf
DEV_INFO_DISPLAY_FOR_EACH_FLAG(PRINT_FLAG);
#undef PRINT_FLAG
+ drm_printf(p, "has_3dlut: %s\n", str_yes_no(runtime->has_3dlut));
drm_printf(p, "has_hdcp: %s\n", str_yes_no(runtime->has_hdcp));
drm_printf(p, "has_dmc: %s\n", str_yes_no(runtime->has_dmc));
drm_printf(p, "has_dsc: %s\n", str_yes_no(runtime->has_dsc));
--
2.45.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v2 4/4] drm/i915/3dlut: disable 3D LUT if unsupported
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
` (2 preceding siblings ...)
2026-08-03 21:49 ` [PATCH v2 3/4] drm/i915/3dlut: log 3D LUT's status Michał Grzelak
@ 2026-08-03 21:49 ` Michał Grzelak
2026-08-04 14:39 ` Borah, Chaitanya Kumar
2026-08-03 22:00 ` ✓ CI.KUnit: success for SKL_DSSM / DE_CAP fixes Patchwork
` (6 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Michał Grzelak @ 2026-08-03 21:49 UTC (permalink / raw)
To: intel-gfx, intel-xe
Cc: Jani Nikula, Michał Grzelak, Chaitanya Kumar Borah, stable
XE2LPD_DE_CAP_3DLUT_MASK is defined but never used.
Check DE_CAP with the mask whether 3D LUT is disabled for LNL+. Reset
has_3dlut if that is the case.
Bspec: 71161
Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Cc: <stable@vger.kernel.org>
Fixes: 6d181a288e64 ("drm/i915/xe2lpd: update the dsc feature capability")
Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_regs.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index a2bea5ac59cf..d4e52e627b34 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1940,6 +1940,10 @@ static void __intel_display_device_info_runtime_init(struct intel_display *displ
if (DISPLAY_VER(display) >= 20) {
u32 cap = intel_de_read(display, XE2LPD_DE_CAP);
+ if (REG_FIELD_GET(XE2LPD_DE_CAP_3DLUT_MASK, cap) ==
+ XE2LPD_DE_CAP_3DLUT_REMOVED)
+ display_runtime->has_3dlut = 0;
+
if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) ==
XE2LPD_DE_CAP_DSC_REMOVED)
display_runtime->has_dsc = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 740331ead20a..78b9e6008828 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -1773,6 +1773,7 @@
#define XE2LPD_DE_CAP _MMIO(0x41100)
#define XE2LPD_DE_CAP_3DLUT_MASK REG_GENMASK(31, 30)
+#define XE2LPD_DE_CAP_3DLUT_REMOVED 1
#define XE2LPD_DE_CAP_DSC_MASK REG_GENMASK(29, 28)
#define XE2LPD_DE_CAP_DSC_REMOVED 1
#define XE2LPD_DE_CAP_SCALER_MASK REG_GENMASK(27, 26)
--
2.45.2
^ permalink raw reply related [flat|nested] 15+ messages in thread
* ✓ CI.KUnit: success for SKL_DSSM / DE_CAP fixes
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
` (3 preceding siblings ...)
2026-08-03 21:49 ` [PATCH v2 4/4] drm/i915/3dlut: disable 3D LUT if unsupported Michał Grzelak
@ 2026-08-03 22:00 ` Patchwork
2026-08-04 1:19 ` ✓ Xe.CI.FULL: " Patchwork
` (5 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-08-03 22:00 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
== Series Details ==
Series: SKL_DSSM / DE_CAP fixes
URL : https://patchwork.freedesktop.org/series/171533/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:58:49] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:58:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:59:25] Starting KUnit Kernel (1/1)...
[21:59:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:59:25] ================== guc_buf (11 subtests) ===================
[21:59:25] [PASSED] test_smallest
[21:59:25] [PASSED] test_largest
[21:59:25] [PASSED] test_granular
[21:59:25] [PASSED] test_unique
[21:59:25] [PASSED] test_overlap
[21:59:25] [PASSED] test_reusable
[21:59:25] [PASSED] test_too_big
[21:59:25] [PASSED] test_flush
[21:59:25] [PASSED] test_lookup
[21:59:25] [PASSED] test_data
[21:59:25] [PASSED] test_class
[21:59:25] ===================== [PASSED] guc_buf =====================
[21:59:25] =================== guc_dbm (7 subtests) ===================
[21:59:25] [PASSED] test_empty
[21:59:25] [PASSED] test_default
[21:59:25] ======================== test_size ========================
[21:59:25] [PASSED] 4
[21:59:25] [PASSED] 8
[21:59:25] [PASSED] 32
[21:59:25] [PASSED] 256
[21:59:25] ==================== [PASSED] test_size ====================
[21:59:25] ======================= test_reuse ========================
[21:59:25] [PASSED] 4
[21:59:25] [PASSED] 8
[21:59:25] [PASSED] 32
[21:59:25] [PASSED] 256
[21:59:25] =================== [PASSED] test_reuse ====================
[21:59:25] =================== test_range_overlap ====================
[21:59:25] [PASSED] 4
[21:59:25] [PASSED] 8
[21:59:25] [PASSED] 32
[21:59:25] [PASSED] 256
[21:59:25] =============== [PASSED] test_range_overlap ================
[21:59:25] =================== test_range_compact ====================
[21:59:25] [PASSED] 4
[21:59:25] [PASSED] 8
[21:59:25] [PASSED] 32
[21:59:25] [PASSED] 256
[21:59:25] =============== [PASSED] test_range_compact ================
[21:59:25] ==================== test_range_spare =====================
[21:59:25] [PASSED] 4
[21:59:25] [PASSED] 8
[21:59:25] [PASSED] 32
[21:59:25] [PASSED] 256
[21:59:25] ================ [PASSED] test_range_spare =================
[21:59:25] ===================== [PASSED] guc_dbm =====================
[21:59:25] =================== guc_idm (6 subtests) ===================
[21:59:25] [PASSED] bad_init
[21:59:25] [PASSED] no_init
[21:59:25] [PASSED] init_fini
[21:59:25] [PASSED] check_used
[21:59:25] [PASSED] check_quota
[21:59:25] [PASSED] check_all
[21:59:25] ===================== [PASSED] guc_idm =====================
[21:59:25] =============== guc_klv_helpers (9 subtests) ===============
[21:59:25] [PASSED] test_count
[21:59:25] [PASSED] test_encode_u32
[21:59:25] [PASSED] test_encode_u64
[21:59:25] [PASSED] test_encode_string
[21:59:25] [PASSED] test_encode_object_raw
[21:59:25] [PASSED] test_encode_object_klv
[21:59:25] [PASSED] test_encode_object_nested
[21:59:25] [PASSED] test_encode_object_basic
[21:59:25] [PASSED] test_print
[21:59:25] ================= [PASSED] guc_klv_helpers =================
[21:59:25] ================== no_relay (3 subtests) ===================
[21:59:25] [PASSED] xe_drops_guc2pf_if_not_ready
[21:59:25] [PASSED] xe_drops_guc2vf_if_not_ready
[21:59:25] [PASSED] xe_rejects_send_if_not_ready
[21:59:25] ==================== [PASSED] no_relay =====================
[21:59:25] ================== pf_relay (14 subtests) ==================
[21:59:25] [PASSED] pf_rejects_guc2pf_too_short
[21:59:25] [PASSED] pf_rejects_guc2pf_too_long
[21:59:25] [PASSED] pf_rejects_guc2pf_no_payload
[21:59:25] [PASSED] pf_fails_no_payload
[21:59:25] [PASSED] pf_fails_bad_origin
[21:59:25] [PASSED] pf_fails_bad_type
[21:59:25] [PASSED] pf_txn_reports_error
[21:59:25] [PASSED] pf_txn_sends_pf2guc
[21:59:25] [PASSED] pf_sends_pf2guc
[21:59:25] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:59:25] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:59:25] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:59:25] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:59:25] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[21:59:25] ==================== [PASSED] pf_relay =====================
[21:59:25] ================== vf_relay (3 subtests) ===================
[21:59:25] [PASSED] vf_rejects_guc2vf_too_short
[21:59:25] [PASSED] vf_rejects_guc2vf_too_long
[21:59:25] [PASSED] vf_rejects_guc2vf_no_payload
[21:59:25] ==================== [PASSED] vf_relay =====================
[21:59:25] ================ pf_gt_config (9 subtests) =================
[21:59:25] [PASSED] fair_contexts_1vf
[21:59:25] [PASSED] fair_doorbells_1vf
[21:59:25] [PASSED] fair_ggtt_1vf
[21:59:25] ====================== fair_vram_1vf ======================
[21:59:25] [PASSED] 3.50 GiB
[21:59:25] [PASSED] 11.5 GiB
[21:59:25] [PASSED] 15.5 GiB
[21:59:25] [PASSED] 31.5 GiB
[21:59:25] [PASSED] 63.5 GiB
[21:59:25] [PASSED] 1.91 GiB
[21:59:25] ================== [PASSED] fair_vram_1vf ==================
[21:59:25] ================ fair_vram_1vf_admin_only =================
[21:59:25] [PASSED] 3.50 GiB
[21:59:25] [PASSED] 11.5 GiB
[21:59:25] [PASSED] 15.5 GiB
[21:59:25] [PASSED] 31.5 GiB
[21:59:25] [PASSED] 63.5 GiB
[21:59:25] [PASSED] 1.91 GiB
[21:59:25] ============ [PASSED] fair_vram_1vf_admin_only =============
[21:59:25] ====================== fair_contexts ======================
[21:59:25] [PASSED] 1 VF
[21:59:25] [PASSED] 2 VFs
[21:59:25] [PASSED] 3 VFs
[21:59:25] [PASSED] 4 VFs
[21:59:25] [PASSED] 5 VFs
[21:59:25] [PASSED] 6 VFs
[21:59:25] [PASSED] 7 VFs
[21:59:25] [PASSED] 8 VFs
[21:59:25] [PASSED] 9 VFs
[21:59:25] [PASSED] 10 VFs
[21:59:25] [PASSED] 11 VFs
[21:59:25] [PASSED] 12 VFs
[21:59:25] [PASSED] 13 VFs
[21:59:25] [PASSED] 14 VFs
[21:59:25] [PASSED] 15 VFs
[21:59:25] [PASSED] 16 VFs
[21:59:25] [PASSED] 17 VFs
[21:59:25] [PASSED] 18 VFs
[21:59:25] [PASSED] 19 VFs
[21:59:25] [PASSED] 20 VFs
[21:59:25] [PASSED] 21 VFs
[21:59:25] [PASSED] 22 VFs
[21:59:25] [PASSED] 23 VFs
[21:59:25] [PASSED] 24 VFs
[21:59:25] [PASSED] 25 VFs
[21:59:25] [PASSED] 26 VFs
[21:59:25] [PASSED] 27 VFs
[21:59:25] [PASSED] 28 VFs
[21:59:25] [PASSED] 29 VFs
[21:59:25] [PASSED] 30 VFs
[21:59:25] [PASSED] 31 VFs
[21:59:25] [PASSED] 32 VFs
[21:59:25] [PASSED] 33 VFs
[21:59:25] [PASSED] 34 VFs
[21:59:25] [PASSED] 35 VFs
[21:59:25] [PASSED] 36 VFs
[21:59:25] [PASSED] 37 VFs
[21:59:25] [PASSED] 38 VFs
[21:59:25] [PASSED] 39 VFs
[21:59:25] [PASSED] 40 VFs
[21:59:25] [PASSED] 41 VFs
[21:59:25] [PASSED] 42 VFs
[21:59:25] [PASSED] 43 VFs
[21:59:25] [PASSED] 44 VFs
[21:59:25] [PASSED] 45 VFs
[21:59:25] [PASSED] 46 VFs
[21:59:25] [PASSED] 47 VFs
[21:59:25] [PASSED] 48 VFs
[21:59:25] [PASSED] 49 VFs
[21:59:25] [PASSED] 50 VFs
[21:59:25] [PASSED] 51 VFs
[21:59:25] [PASSED] 52 VFs
[21:59:25] [PASSED] 53 VFs
[21:59:25] [PASSED] 54 VFs
[21:59:25] [PASSED] 55 VFs
[21:59:25] [PASSED] 56 VFs
[21:59:25] [PASSED] 57 VFs
[21:59:25] [PASSED] 58 VFs
[21:59:25] [PASSED] 59 VFs
[21:59:25] [PASSED] 60 VFs
[21:59:25] [PASSED] 61 VFs
[21:59:25] [PASSED] 62 VFs
[21:59:25] [PASSED] 63 VFs
[21:59:25] ================== [PASSED] fair_contexts ==================
[21:59:25] ===================== fair_doorbells ======================
[21:59:25] [PASSED] 1 VF
[21:59:25] [PASSED] 2 VFs
[21:59:25] [PASSED] 3 VFs
[21:59:25] [PASSED] 4 VFs
[21:59:25] [PASSED] 5 VFs
[21:59:25] [PASSED] 6 VFs
[21:59:25] [PASSED] 7 VFs
[21:59:25] [PASSED] 8 VFs
[21:59:25] [PASSED] 9 VFs
[21:59:25] [PASSED] 10 VFs
[21:59:25] [PASSED] 11 VFs
[21:59:25] [PASSED] 12 VFs
[21:59:25] [PASSED] 13 VFs
[21:59:25] [PASSED] 14 VFs
[21:59:25] [PASSED] 15 VFs
[21:59:25] [PASSED] 16 VFs
[21:59:25] [PASSED] 17 VFs
[21:59:25] [PASSED] 18 VFs
[21:59:25] [PASSED] 19 VFs
[21:59:25] [PASSED] 20 VFs
[21:59:25] [PASSED] 21 VFs
[21:59:25] [PASSED] 22 VFs
[21:59:25] [PASSED] 23 VFs
[21:59:25] [PASSED] 24 VFs
[21:59:25] [PASSED] 25 VFs
[21:59:25] [PASSED] 26 VFs
[21:59:25] [PASSED] 27 VFs
[21:59:25] [PASSED] 28 VFs
[21:59:25] [PASSED] 29 VFs
[21:59:25] [PASSED] 30 VFs
[21:59:25] [PASSED] 31 VFs
[21:59:25] [PASSED] 32 VFs
[21:59:25] [PASSED] 33 VFs
[21:59:25] [PASSED] 34 VFs
[21:59:25] [PASSED] 35 VFs
[21:59:25] [PASSED] 36 VFs
[21:59:25] [PASSED] 37 VFs
[21:59:25] [PASSED] 38 VFs
[21:59:25] [PASSED] 39 VFs
[21:59:25] [PASSED] 40 VFs
[21:59:25] [PASSED] 41 VFs
[21:59:25] [PASSED] 42 VFs
[21:59:25] [PASSED] 43 VFs
[21:59:25] [PASSED] 44 VFs
[21:59:25] [PASSED] 45 VFs
[21:59:25] [PASSED] 46 VFs
[21:59:25] [PASSED] 47 VFs
[21:59:25] [PASSED] 48 VFs
[21:59:25] [PASSED] 49 VFs
[21:59:25] [PASSED] 50 VFs
[21:59:25] [PASSED] 51 VFs
[21:59:25] [PASSED] 52 VFs
[21:59:25] [PASSED] 53 VFs
[21:59:25] [PASSED] 54 VFs
[21:59:25] [PASSED] 55 VFs
[21:59:25] [PASSED] 56 VFs
[21:59:25] [PASSED] 57 VFs
[21:59:25] [PASSED] 58 VFs
[21:59:25] [PASSED] 59 VFs
[21:59:25] [PASSED] 60 VFs
[21:59:25] [PASSED] 61 VFs
[21:59:25] [PASSED] 62 VFs
[21:59:25] [PASSED] 63 VFs
[21:59:25] ================= [PASSED] fair_doorbells ==================
[21:59:25] ======================== fair_ggtt ========================
[21:59:25] [PASSED] 1 VF
[21:59:25] [PASSED] 2 VFs
[21:59:25] [PASSED] 3 VFs
[21:59:25] [PASSED] 4 VFs
[21:59:25] [PASSED] 5 VFs
[21:59:25] [PASSED] 6 VFs
[21:59:25] [PASSED] 7 VFs
[21:59:25] [PASSED] 8 VFs
[21:59:25] [PASSED] 9 VFs
[21:59:25] [PASSED] 10 VFs
[21:59:25] [PASSED] 11 VFs
[21:59:25] [PASSED] 12 VFs
[21:59:25] [PASSED] 13 VFs
[21:59:25] [PASSED] 14 VFs
[21:59:25] [PASSED] 15 VFs
[21:59:25] [PASSED] 16 VFs
[21:59:25] [PASSED] 17 VFs
[21:59:25] [PASSED] 18 VFs
[21:59:25] [PASSED] 19 VFs
[21:59:25] [PASSED] 20 VFs
[21:59:25] [PASSED] 21 VFs
[21:59:25] [PASSED] 22 VFs
[21:59:25] [PASSED] 23 VFs
[21:59:25] [PASSED] 24 VFs
[21:59:25] [PASSED] 25 VFs
[21:59:25] [PASSED] 26 VFs
[21:59:25] [PASSED] 27 VFs
[21:59:25] [PASSED] 28 VFs
[21:59:25] [PASSED] 29 VFs
[21:59:25] [PASSED] 30 VFs
[21:59:25] [PASSED] 31 VFs
[21:59:25] [PASSED] 32 VFs
[21:59:25] [PASSED] 33 VFs
[21:59:25] [PASSED] 34 VFs
[21:59:25] [PASSED] 35 VFs
[21:59:25] [PASSED] 36 VFs
[21:59:25] [PASSED] 37 VFs
[21:59:25] [PASSED] 38 VFs
[21:59:25] [PASSED] 39 VFs
[21:59:25] [PASSED] 40 VFs
[21:59:25] [PASSED] 41 VFs
[21:59:25] [PASSED] 42 VFs
[21:59:25] [PASSED] 43 VFs
[21:59:25] [PASSED] 44 VFs
[21:59:25] [PASSED] 45 VFs
[21:59:25] [PASSED] 46 VFs
[21:59:25] [PASSED] 47 VFs
[21:59:25] [PASSED] 48 VFs
[21:59:25] [PASSED] 49 VFs
[21:59:25] [PASSED] 50 VFs
[21:59:25] [PASSED] 51 VFs
[21:59:25] [PASSED] 52 VFs
[21:59:25] [PASSED] 53 VFs
[21:59:25] [PASSED] 54 VFs
[21:59:25] [PASSED] 55 VFs
[21:59:25] [PASSED] 56 VFs
[21:59:25] [PASSED] 57 VFs
[21:59:25] [PASSED] 58 VFs
[21:59:25] [PASSED] 59 VFs
[21:59:25] [PASSED] 60 VFs
[21:59:25] [PASSED] 61 VFs
[21:59:25] [PASSED] 62 VFs
[21:59:25] [PASSED] 63 VFs
[21:59:25] ==================== [PASSED] fair_ggtt ====================
[21:59:25] ======================== fair_vram ========================
[21:59:25] [PASSED] 1 VF
[21:59:25] [PASSED] 2 VFs
[21:59:25] [PASSED] 3 VFs
[21:59:25] [PASSED] 4 VFs
[21:59:25] [PASSED] 5 VFs
[21:59:25] [PASSED] 6 VFs
[21:59:25] [PASSED] 7 VFs
[21:59:25] [PASSED] 8 VFs
[21:59:25] [PASSED] 9 VFs
[21:59:25] [PASSED] 10 VFs
[21:59:25] [PASSED] 11 VFs
[21:59:25] [PASSED] 12 VFs
[21:59:25] [PASSED] 13 VFs
[21:59:25] [PASSED] 14 VFs
[21:59:25] [PASSED] 15 VFs
[21:59:25] [PASSED] 16 VFs
[21:59:25] [PASSED] 17 VFs
[21:59:25] [PASSED] 18 VFs
[21:59:25] [PASSED] 19 VFs
[21:59:25] [PASSED] 20 VFs
[21:59:25] [PASSED] 21 VFs
[21:59:25] [PASSED] 22 VFs
[21:59:25] [PASSED] 23 VFs
[21:59:25] [PASSED] 24 VFs
[21:59:25] [PASSED] 25 VFs
[21:59:25] [PASSED] 26 VFs
[21:59:25] [PASSED] 27 VFs
[21:59:25] [PASSED] 28 VFs
[21:59:25] [PASSED] 29 VFs
[21:59:25] [PASSED] 30 VFs
[21:59:25] [PASSED] 31 VFs
[21:59:25] [PASSED] 32 VFs
[21:59:25] [PASSED] 33 VFs
[21:59:25] [PASSED] 34 VFs
[21:59:25] [PASSED] 35 VFs
[21:59:25] [PASSED] 36 VFs
[21:59:25] [PASSED] 37 VFs
[21:59:25] [PASSED] 38 VFs
[21:59:25] [PASSED] 39 VFs
[21:59:25] [PASSED] 40 VFs
[21:59:25] [PASSED] 41 VFs
[21:59:25] [PASSED] 42 VFs
[21:59:25] [PASSED] 43 VFs
[21:59:25] [PASSED] 44 VFs
[21:59:25] [PASSED] 45 VFs
[21:59:25] [PASSED] 46 VFs
[21:59:25] [PASSED] 47 VFs
[21:59:25] [PASSED] 48 VFs
[21:59:25] [PASSED] 49 VFs
[21:59:25] [PASSED] 50 VFs
[21:59:25] [PASSED] 51 VFs
[21:59:25] [PASSED] 52 VFs
[21:59:25] [PASSED] 53 VFs
[21:59:25] [PASSED] 54 VFs
[21:59:25] [PASSED] 55 VFs
[21:59:25] [PASSED] 56 VFs
[21:59:25] [PASSED] 57 VFs
[21:59:25] [PASSED] 58 VFs
[21:59:25] [PASSED] 59 VFs
[21:59:25] [PASSED] 60 VFs
[21:59:25] [PASSED] 61 VFs
[21:59:25] [PASSED] 62 VFs
[21:59:25] [PASSED] 63 VFs
[21:59:25] ==================== [PASSED] fair_vram ====================
[21:59:25] ================== [PASSED] pf_gt_config ===================
[21:59:25] ===================== lmtt (1 subtest) =====================
[21:59:25] ======================== test_ops =========================
[21:59:25] [PASSED] 2-level
[21:59:25] [PASSED] multi-level
[21:59:25] ==================== [PASSED] test_ops =====================
[21:59:25] ====================== [PASSED] lmtt =======================
[21:59:25] ================= sriov_packet (1 subtest) =================
[21:59:25] [PASSED] test_descriptor_init
[21:59:25] ================== [PASSED] sriov_packet ===================
[21:59:25] ================= pf_service (11 subtests) =================
[21:59:25] [PASSED] pf_negotiate_any
[21:59:25] [PASSED] pf_negotiate_base_match
[21:59:25] [PASSED] pf_negotiate_base_newer
[21:59:25] [PASSED] pf_negotiate_base_next
[21:59:25] [SKIPPED] pf_negotiate_base_older (no older minor)
[21:59:25] [PASSED] pf_negotiate_base_prev
[21:59:25] [PASSED] pf_negotiate_latest_match
[21:59:25] [PASSED] pf_negotiate_latest_newer
[21:59:25] [PASSED] pf_negotiate_latest_next
[21:59:25] [SKIPPED] pf_negotiate_latest_older (no older minor)
[21:59:25] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[21:59:25] =================== [PASSED] pf_service ====================
[21:59:25] ================= xe_guc_g2g (2 subtests) ==================
[21:59:25] ============== xe_live_guc_g2g_kunit_default ==============
[21:59:25] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[21:59:25] ============== xe_live_guc_g2g_kunit_allmem ===============
[21:59:25] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[21:59:25] =================== [SKIPPED] xe_guc_g2g ===================
[21:59:25] =================== xe_mocs (2 subtests) ===================
[21:59:25] ================ xe_live_mocs_kernel_kunit ================
[21:59:25] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:59:25] ================ xe_live_mocs_reset_kunit =================
[21:59:25] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:59:25] ==================== [SKIPPED] xe_mocs =====================
[21:59:25] ================= xe_migrate (2 subtests) ==================
[21:59:25] ================= xe_migrate_sanity_kunit =================
[21:59:25] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:59:25] ================== xe_validate_ccs_kunit ==================
[21:59:25] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:59:25] =================== [SKIPPED] xe_migrate ===================
[21:59:25] ================== xe_dma_buf (1 subtest) ==================
[21:59:25] ==================== xe_dma_buf_kunit =====================
[21:59:25] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:59:25] =================== [SKIPPED] xe_dma_buf ===================
[21:59:25] ================= xe_bo_shrink (1 subtest) =================
[21:59:25] =================== xe_bo_shrink_kunit ====================
[21:59:25] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[21:59:25] ================== [SKIPPED] xe_bo_shrink ==================
[21:59:25] ==================== xe_bo (2 subtests) ====================
[21:59:25] ================== xe_ccs_migrate_kunit ===================
[21:59:25] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:59:25] ==================== xe_bo_evict_kunit ====================
[21:59:25] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:59:25] ===================== [SKIPPED] xe_bo ======================
[21:59:25] ==================== args (13 subtests) ====================
[21:59:25] [PASSED] count_args_test
[21:59:25] [PASSED] call_args_example
[21:59:25] [PASSED] call_args_test
[21:59:25] [PASSED] drop_first_arg_example
[21:59:25] [PASSED] drop_first_arg_test
[21:59:25] [PASSED] first_arg_example
[21:59:25] [PASSED] first_arg_test
[21:59:25] [PASSED] last_arg_example
[21:59:25] [PASSED] last_arg_test
[21:59:25] [PASSED] pick_arg_example
[21:59:25] [PASSED] if_args_example
[21:59:25] [PASSED] if_args_test
[21:59:25] [PASSED] sep_comma_example
[21:59:25] ====================== [PASSED] args =======================
[21:59:25] =================== xe_pci (3 subtests) ====================
[21:59:25] ==================== check_graphics_ip ====================
[21:59:25] [PASSED] 12.00 Xe_LP
[21:59:25] [PASSED] 12.10 Xe_LP+
[21:59:25] [PASSED] 12.55 Xe_HPG
[21:59:25] [PASSED] 12.60 Xe_HPC
[21:59:25] [PASSED] 12.70 Xe_LPG
[21:59:25] [PASSED] 12.71 Xe_LPG
[21:59:25] [PASSED] 12.74 Xe_LPG+
[21:59:25] [PASSED] 20.01 Xe2_HPG
[21:59:25] [PASSED] 20.02 Xe2_HPG
[21:59:25] [PASSED] 20.04 Xe2_LPG
[21:59:25] [PASSED] 30.00 Xe3_LPG
[21:59:25] [PASSED] 30.01 Xe3_LPG
[21:59:25] [PASSED] 30.03 Xe3_LPG
[21:59:25] [PASSED] 30.04 Xe3_LPG
[21:59:25] [PASSED] 30.05 Xe3_LPG
[21:59:25] [PASSED] 35.10 Xe3p_LPG
[21:59:25] [PASSED] 35.11 Xe3p_XPC
[21:59:25] ================ [PASSED] check_graphics_ip ================
[21:59:25] ===================== check_media_ip ======================
[21:59:25] [PASSED] 12.00 Xe_M
[21:59:25] [PASSED] 12.55 Xe_HPM
[21:59:25] [PASSED] 13.00 Xe_LPM+
[21:59:25] [PASSED] 13.01 Xe2_HPM
[21:59:25] [PASSED] 20.00 Xe2_LPM
[21:59:25] [PASSED] 30.00 Xe3_LPM
[21:59:25] [PASSED] 30.02 Xe3_LPM
[21:59:25] [PASSED] 35.00 Xe3p_LPM
[21:59:25] [PASSED] 35.03 Xe3p_HPM
[21:59:25] ================= [PASSED] check_media_ip ==================
[21:59:25] =================== check_platform_desc ===================
[21:59:25] [PASSED] 0x9A60 (TIGERLAKE)
[21:59:25] [PASSED] 0x9A68 (TIGERLAKE)
[21:59:25] [PASSED] 0x9A70 (TIGERLAKE)
[21:59:25] [PASSED] 0x9A40 (TIGERLAKE)
[21:59:25] [PASSED] 0x9A49 (TIGERLAKE)
[21:59:25] [PASSED] 0x9A59 (TIGERLAKE)
[21:59:25] [PASSED] 0x9A78 (TIGERLAKE)
[21:59:25] [PASSED] 0x9AC0 (TIGERLAKE)
[21:59:25] [PASSED] 0x9AC9 (TIGERLAKE)
[21:59:25] [PASSED] 0x9AD9 (TIGERLAKE)
[21:59:25] [PASSED] 0x9AF8 (TIGERLAKE)
[21:59:25] [PASSED] 0x4C80 (ROCKETLAKE)
[21:59:25] [PASSED] 0x4C8A (ROCKETLAKE)
[21:59:25] [PASSED] 0x4C8B (ROCKETLAKE)
[21:59:25] [PASSED] 0x4C8C (ROCKETLAKE)
[21:59:25] [PASSED] 0x4C90 (ROCKETLAKE)
[21:59:25] [PASSED] 0x4C9A (ROCKETLAKE)
[21:59:25] [PASSED] 0x4680 (ALDERLAKE_S)
[21:59:25] [PASSED] 0x4682 (ALDERLAKE_S)
[21:59:25] [PASSED] 0x4688 (ALDERLAKE_S)
[21:59:25] [PASSED] 0x468A (ALDERLAKE_S)
[21:59:25] [PASSED] 0x468B (ALDERLAKE_S)
[21:59:25] [PASSED] 0x4690 (ALDERLAKE_S)
[21:59:25] [PASSED] 0x4692 (ALDERLAKE_S)
[21:59:25] [PASSED] 0x4693 (ALDERLAKE_S)
[21:59:25] [PASSED] 0x46A0 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46A1 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46A2 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46A3 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46A6 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46A8 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46AA (ALDERLAKE_P)
[21:59:25] [PASSED] 0x462A (ALDERLAKE_P)
[21:59:25] [PASSED] 0x4626 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x4628 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46B0 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46B1 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46B2 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46B3 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46C0 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46C1 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46C2 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46C3 (ALDERLAKE_P)
[21:59:25] [PASSED] 0x46D0 (ALDERLAKE_N)
[21:59:25] [PASSED] 0x46D1 (ALDERLAKE_N)
[21:59:25] [PASSED] 0x46D2 (ALDERLAKE_N)
[21:59:25] [PASSED] 0x46D3 (ALDERLAKE_N)
[21:59:25] [PASSED] 0x46D4 (ALDERLAKE_N)
[21:59:25] [PASSED] 0xA721 (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA7A1 (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA7A9 (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA7AC (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA7AD (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA720 (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA7A0 (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA7A8 (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA7AA (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA7AB (ALDERLAKE_P)
[21:59:25] [PASSED] 0xA780 (ALDERLAKE_S)
[21:59:25] [PASSED] 0xA781 (ALDERLAKE_S)
[21:59:25] [PASSED] 0xA782 (ALDERLAKE_S)
[21:59:25] [PASSED] 0xA783 (ALDERLAKE_S)
[21:59:25] [PASSED] 0xA788 (ALDERLAKE_S)
[21:59:25] [PASSED] 0xA789 (ALDERLAKE_S)
[21:59:25] [PASSED] 0xA78A (ALDERLAKE_S)
[21:59:25] [PASSED] 0xA78B (ALDERLAKE_S)
[21:59:25] [PASSED] 0x4905 (DG1)
[21:59:25] [PASSED] 0x4906 (DG1)
[21:59:25] [PASSED] 0x4907 (DG1)
[21:59:25] [PASSED] 0x4908 (DG1)
[21:59:25] [PASSED] 0x4909 (DG1)
[21:59:25] [PASSED] 0x56C0 (DG2)
[21:59:25] [PASSED] 0x56C2 (DG2)
[21:59:25] [PASSED] 0x56C1 (DG2)
[21:59:25] [PASSED] 0x7D51 (METEORLAKE)
[21:59:25] [PASSED] 0x7DD1 (METEORLAKE)
[21:59:25] [PASSED] 0x7D41 (METEORLAKE)
[21:59:25] [PASSED] 0x7D67 (METEORLAKE)
[21:59:25] [PASSED] 0xB640 (METEORLAKE)
[21:59:25] [PASSED] 0x56A0 (DG2)
[21:59:25] [PASSED] 0x56A1 (DG2)
[21:59:25] [PASSED] 0x56A2 (DG2)
[21:59:25] [PASSED] 0x56BE (DG2)
[21:59:25] [PASSED] 0x56BF (DG2)
[21:59:25] [PASSED] 0x5690 (DG2)
[21:59:25] [PASSED] 0x5691 (DG2)
[21:59:25] [PASSED] 0x5692 (DG2)
[21:59:25] [PASSED] 0x56A5 (DG2)
[21:59:25] [PASSED] 0x56A6 (DG2)
[21:59:25] [PASSED] 0x56B0 (DG2)
[21:59:25] [PASSED] 0x56B1 (DG2)
[21:59:25] [PASSED] 0x56BA (DG2)
[21:59:25] [PASSED] 0x56BB (DG2)
[21:59:25] [PASSED] 0x56BC (DG2)
[21:59:25] [PASSED] 0x56BD (DG2)
[21:59:25] [PASSED] 0x5693 (DG2)
[21:59:25] [PASSED] 0x5694 (DG2)
[21:59:25] [PASSED] 0x5695 (DG2)
[21:59:25] [PASSED] 0x56A3 (DG2)
[21:59:25] [PASSED] 0x56A4 (DG2)
[21:59:25] [PASSED] 0x56B2 (DG2)
[21:59:25] [PASSED] 0x56B3 (DG2)
[21:59:25] [PASSED] 0x5696 (DG2)
[21:59:25] [PASSED] 0x5697 (DG2)
[21:59:25] [PASSED] 0xB69 (PVC)
[21:59:25] [PASSED] 0xB6E (PVC)
[21:59:25] [PASSED] 0xBD4 (PVC)
[21:59:25] [PASSED] 0xBD5 (PVC)
[21:59:25] [PASSED] 0xBD6 (PVC)
[21:59:25] [PASSED] 0xBD7 (PVC)
[21:59:25] [PASSED] 0xBD8 (PVC)
[21:59:25] [PASSED] 0xBD9 (PVC)
[21:59:25] [PASSED] 0xBDA (PVC)
[21:59:25] [PASSED] 0xBDB (PVC)
[21:59:25] [PASSED] 0xBE0 (PVC)
[21:59:25] [PASSED] 0xBE1 (PVC)
[21:59:25] [PASSED] 0xBE5 (PVC)
[21:59:25] [PASSED] 0x7D40 (METEORLAKE)
[21:59:25] [PASSED] 0x7D45 (METEORLAKE)
[21:59:25] [PASSED] 0x7D55 (METEORLAKE)
[21:59:25] [PASSED] 0x7D60 (METEORLAKE)
[21:59:25] [PASSED] 0x7DD5 (METEORLAKE)
[21:59:25] [PASSED] 0x6420 (LUNARLAKE)
[21:59:25] [PASSED] 0x64A0 (LUNARLAKE)
[21:59:25] [PASSED] 0x64B0 (LUNARLAKE)
[21:59:25] [PASSED] 0xE202 (BATTLEMAGE)
[21:59:25] [PASSED] 0xE209 (BATTLEMAGE)
[21:59:25] [PASSED] 0xE20B (BATTLEMAGE)
[21:59:25] [PASSED] 0xE20C (BATTLEMAGE)
[21:59:25] [PASSED] 0xE20D (BATTLEMAGE)
[21:59:25] [PASSED] 0xE210 (BATTLEMAGE)
[21:59:25] [PASSED] 0xE211 (BATTLEMAGE)
[21:59:25] [PASSED] 0xE212 (BATTLEMAGE)
[21:59:25] [PASSED] 0xE216 (BATTLEMAGE)
[21:59:25] [PASSED] 0xE220 (BATTLEMAGE)
[21:59:25] [PASSED] 0xE221 (BATTLEMAGE)
[21:59:25] [PASSED] 0xE222 (BATTLEMAGE)
[21:59:25] [PASSED] 0xE223 (BATTLEMAGE)
[21:59:25] [PASSED] 0xB080 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB081 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB082 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB083 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB084 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB085 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB086 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB087 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB08F (PANTHERLAKE)
[21:59:25] [PASSED] 0xB090 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB0A0 (PANTHERLAKE)
[21:59:25] [PASSED] 0xB0B0 (PANTHERLAKE)
[21:59:25] [PASSED] 0xFD80 (PANTHERLAKE)
[21:59:25] [PASSED] 0xFD81 (PANTHERLAKE)
[21:59:25] [PASSED] 0xD740 (NOVALAKE_S)
[21:59:25] [PASSED] 0xD741 (NOVALAKE_S)
[21:59:25] [PASSED] 0xD742 (NOVALAKE_S)
[21:59:25] [PASSED] 0xD743 (NOVALAKE_S)
[21:59:25] [PASSED] 0xD745 (NOVALAKE_S)
[21:59:25] [PASSED] 0xD74A (NOVALAKE_S)
[21:59:25] [PASSED] 0xD74B (NOVALAKE_S)
[21:59:25] [PASSED] 0x674C (CRESCENTISLAND)
[21:59:25] [PASSED] 0x674D (CRESCENTISLAND)
[21:59:25] [PASSED] 0x674E (CRESCENTISLAND)
[21:59:25] [PASSED] 0x674F (CRESCENTISLAND)
[21:59:25] [PASSED] 0x6750 (CRESCENTISLAND)
[21:59:25] [PASSED] 0xD750 (NOVALAKE_P)
[21:59:25] [PASSED] 0xD751 (NOVALAKE_P)
[21:59:25] [PASSED] 0xD752 (NOVALAKE_P)
[21:59:25] [PASSED] 0xD753 (NOVALAKE_P)
[21:59:25] [PASSED] 0xD754 (NOVALAKE_P)
[21:59:25] [PASSED] 0xD755 (NOVALAKE_P)
[21:59:25] [PASSED] 0xD756 (NOVALAKE_P)
[21:59:25] [PASSED] 0xD757 (NOVALAKE_P)
[21:59:25] [PASSED] 0xD75F (NOVALAKE_P)
[21:59:25] =============== [PASSED] check_platform_desc ===============
[21:59:25] ===================== [PASSED] xe_pci ======================
[21:59:25] ============= xe_rtp_tables_test (5 subtests) ==============
[21:59:25] ================== xe_rtp_table_gt_test ===================
[21:59:25] [PASSED] gt_was/14011060649
[21:59:25] [PASSED] gt_was/14011059788
[21:59:25] [PASSED] gt_was/14015795083
[21:59:25] [PASSED] gt_was/16021867713
[21:59:25] [PASSED] gt_was/14019449301
[21:59:25] [PASSED] gt_was/16028005424
[21:59:25] [PASSED] gt_was/14026578760
[21:59:25] [PASSED] gt_was/1409420604
[21:59:25] [PASSED] gt_was/1408615072
[21:59:25] [PASSED] gt_was/22010523718
[21:59:25] [PASSED] gt_was/14011006942
[21:59:25] [PASSED] gt_was/14014830051
[21:59:25] [PASSED] gt_was/18018781329
[21:59:25] [PASSED] gt_was/1509235366
[21:59:25] [PASSED] gt_was/18018781329
[21:59:25] [PASSED] gt_was/16016694945
[21:59:25] [PASSED] gt_was/14018575942
[21:59:25] [PASSED] gt_was/22016670082
[21:59:25] [PASSED] gt_was/22016670082
[21:59:25] [PASSED] gt_was/14017421178
[21:59:25] [PASSED] gt_was/16025250150
[21:59:25] [PASSED] gt_was/14021871409
[21:59:25] [PASSED] gt_was/16021865536
[21:59:25] [PASSED] gt_was/14021486841
[21:59:25] [PASSED] gt_was/14025160223
[21:59:25] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[21:59:25] [PASSED] gt_was/14025635424
[21:59:25] [PASSED] gt_was/16028005424
[21:59:25] ============== [PASSED] xe_rtp_table_gt_test ===============
[21:59:25] ================== xe_rtp_table_gt_test ===================
[21:59:25] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[21:59:25] [PASSED] gt_tunings/Tuning: 32B Access Enable
[21:59:25] [PASSED] gt_tunings/Tuning: L3 cache
[21:59:25] [PASSED] gt_tunings/Tuning: L3 cache - media
[21:59:25] [PASSED] gt_tunings/Tuning: Compression Overfetch
[21:59:25] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[21:59:25] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[21:59:25] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[21:59:25] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[21:59:25] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[21:59:25] [PASSED] gt_tunings/Tuning: Stateless compression control
[21:59:25] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[21:59:25] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[21:59:25] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[21:59:25] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[21:59:25] ============== [PASSED] xe_rtp_table_gt_test ===============
[21:59:25] ================== xe_rtp_table_oob_test ==================
[21:59:25] [PASSED] oob_was/1607983814
[21:59:25] [PASSED] oob_was/16010904313
[21:59:25] [PASSED] oob_was/18022495364
[21:59:25] [PASSED] oob_was/22012773006
[21:59:25] [PASSED] oob_was/14014475959
[21:59:25] [PASSED] oob_was/22011391025
[21:59:25] [PASSED] oob_was/22012727170
[21:59:25] [PASSED] oob_was/22012727685
[21:59:25] [PASSED] oob_was/22016596838
[21:59:25] [PASSED] oob_was/18020744125
[21:59:25] [PASSED] oob_was/1409600907
[21:59:25] [PASSED] oob_was/22014953428
[21:59:25] [PASSED] oob_was/16017236439
[21:59:25] [PASSED] oob_was/14019821291
[21:59:25] [PASSED] oob_was/14015076503
[21:59:25] [PASSED] oob_was/14018913170
[21:59:25] [PASSED] oob_was/14018094691
[21:59:25] [PASSED] oob_was/18024947630
[21:59:25] [PASSED] oob_was/16022287689
[21:59:25] [PASSED] oob_was/13011645652
[21:59:25] [PASSED] oob_was/14022293748
[21:59:25] [PASSED] oob_was/22019794406
[21:59:25] [PASSED] oob_was/22019338487
[21:59:25] [PASSED] oob_was/16023588340
[21:59:25] [PASSED] oob_was/14019789679
[21:59:25] [PASSED] oob_was/14022866841
[21:59:25] [PASSED] oob_was/16021333562
[21:59:25] [PASSED] oob_was/14016712196
[21:59:25] [PASSED] oob_was/14015568240
[21:59:25] [PASSED] oob_was/18013179988
[21:59:25] [PASSED] oob_was/1508761755
[21:59:25] [PASSED] oob_was/16023105232
[21:59:25] [PASSED] oob_was/16026508708
[21:59:25] [PASSED] oob_was/14020001231
[21:59:25] [PASSED] oob_was/16023683509
[21:59:25] [PASSED] oob_was/14025515070
[21:59:25] [PASSED] oob_was/15015404425_disable
[21:59:25] [PASSED] oob_was/16026007364
[21:59:25] [PASSED] oob_was/14020316580
[21:59:25] [PASSED] oob_was/14025883347
[21:59:25] [PASSED] oob_was/16029380221
[21:59:25] [PASSED] oob_was/22022079272
[21:59:25] [PASSED] oob_was/16029897822
[21:59:25] [PASSED] oob_was/14027054324
[21:59:25] ============== [PASSED] xe_rtp_table_oob_test ==============
[21:59:25] ================ xe_rtp_table_dev_oob_test ================
[21:59:25] [PASSED] device_oob_was/22010954014
[21:59:25] [PASSED] device_oob_was/15015404425
[21:59:25] [PASSED] device_oob_was/22019338487_display
[21:59:25] [PASSED] device_oob_was/14022085890
[21:59:25] [PASSED] device_oob_was/14026539277
[21:59:25] [PASSED] device_oob_was/14026633728
[21:59:25] [PASSED] device_oob_was/14026746987
[21:59:25] [PASSED] device_oob_was/14026779378
[21:59:25] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[21:59:25] ========== xe_rtp_table_missing_upper_bound_test ==========
[21:59:25] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[21:59:25] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[21:59:25] [PASSED] register_whitelist/1806527549
[21:59:25] [PASSED] register_whitelist/allow_read_ctx_timestamp
[21:59:25] [PASSED] register_whitelist/allow_read_queue_timestamp
[21:59:25] [PASSED] register_whitelist/16014440446
[21:59:25] [PASSED] register_whitelist/16017236439
[21:59:25] [PASSED] register_whitelist/16020183090
[21:59:25] [PASSED] register_whitelist/14024997852
[21:59:25] [PASSED] register_whitelist/14024997852
[21:59:25] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[21:59:25] =============== [PASSED] xe_rtp_tables_test ================
[21:59:25] =================== xe_rtp (3 subtests) ====================
[21:59:25] =================== xe_rtp_rules_tests ====================
[21:59:25] [PASSED] no
[21:59:25] [PASSED] yes
[21:59:25] [PASSED] no-and-no
[21:59:25] [PASSED] no-and-yes
[21:59:25] [PASSED] yes-and-no
[21:59:25] [PASSED] yes-and-yes
[21:59:25] [PASSED] no-or-no
[21:59:25] [PASSED] no-or-yes
[21:59:25] [PASSED] yes-or-no
[21:59:25] [PASSED] yes-or-yes
[21:59:25] [PASSED] no-yes-or-yes-no
[21:59:25] [PASSED] no-yes-or-yes-yes
[21:59:25] [PASSED] yes-yes-or-no-yes
[21:59:25] [PASSED] yes-yes-or-yes-yes
[21:59:25] [PASSED] no-no-or-yes-or-no
[21:59:25] [PASSED] or
[21:59:25] [PASSED] or-yes
[21:59:25] [PASSED] or-no
[21:59:25] [PASSED] yes-or
[21:59:25] [PASSED] no-or
[21:59:25] [PASSED] no-or-or-yes
[21:59:25] [PASSED] yes-or-or-no
[21:59:25] [PASSED] no-or-or-no
[21:59:25] [PASSED] missing-context-engine-class
[21:59:25] [PASSED] missing-context-engine-class-or-yes
[21:59:25] [PASSED] missing-context-engine-class-or-or-yes
[21:59:25] =============== [PASSED] xe_rtp_rules_tests ================
[21:59:25] =============== xe_rtp_process_to_sr_tests ================
[21:59:25] [PASSED] coalesce-same-reg
[21:59:25] [PASSED] coalesce-same-reg-literal-and-func
[21:59:25] [PASSED] no-match-no-add
[21:59:25] [PASSED] two-regs-two-entries
[21:59:25] [PASSED] clr-one-set-other
[21:59:25] [PASSED] set-field
[21:59:25] [PASSED] conflict-duplicate
[21:59:25] [PASSED] conflict-not-disjoint
[21:59:25] [PASSED] conflict-not-disjoint-literal-and-func
[21:59:25] [PASSED] conflict-reg-type
[21:59:25] [PASSED] bad-mcr-reg-forced-to-regular
[21:59:25] [PASSED] bad-regular-reg-forced-to-mcr
[21:59:25] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:59:25] ================== xe_rtp_process_tests ===================
[21:59:25] [PASSED] active1
[21:59:25] [PASSED] active2
[21:59:25] [PASSED] active-inactive
[21:59:25] [PASSED] inactive-active
[21:59:25] [PASSED] inactive-active-inactive
[21:59:25] [PASSED] inactive-inactive-inactive
[21:59:25] ============== [PASSED] xe_rtp_process_tests ===============
[21:59:25] ===================== [PASSED] xe_rtp ======================
[21:59:25] ==================== xe_wa (1 subtest) =====================
[21:59:25] ======================== xe_wa_gt =========================
[21:59:25] [PASSED] TIGERLAKE B0
[21:59:25] [PASSED] DG1 A0
[21:59:25] [PASSED] DG1 B0
[21:59:25] [PASSED] ALDERLAKE_S A0
[21:59:25] [PASSED] ALDERLAKE_S B0
[21:59:25] [PASSED] ALDERLAKE_S C0
[21:59:25] [PASSED] ALDERLAKE_S D0
[21:59:25] [PASSED] ALDERLAKE_P A0
[21:59:25] [PASSED] ALDERLAKE_P B0
[21:59:25] [PASSED] ALDERLAKE_P C0
[21:59:25] [PASSED] ALDERLAKE_S RPLS D0
[21:59:25] [PASSED] ALDERLAKE_P RPLU E0
[21:59:25] [PASSED] DG2 G10 C0
[21:59:25] [PASSED] DG2 G11 B1
[21:59:25] [PASSED] DG2 G12 A1
[21:59:25] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:59:25] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:59:25] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[21:59:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[21:59:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[21:59:25] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[21:59:25] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[21:59:25] ==================== [PASSED] xe_wa_gt =====================
[21:59:25] ====================== [PASSED] xe_wa ======================
[21:59:25] ============================================================
[21:59:25] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[21:59:25] Elapsed time: 36.858s total, 4.439s configuring, 31.753s building, 0.636s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:59:26] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:59:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:59:52] Starting KUnit Kernel (1/1)...
[21:59:52] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:59:52] ============ drm_test_pick_cmdline (2 subtests) ============
[21:59:52] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[21:59:52] =============== drm_test_pick_cmdline_named ===============
[21:59:52] [PASSED] NTSC
[21:59:52] [PASSED] NTSC-J
[21:59:52] [PASSED] PAL
[21:59:52] [PASSED] PAL-M
[21:59:52] =========== [PASSED] drm_test_pick_cmdline_named ===========
[21:59:52] ============== [PASSED] drm_test_pick_cmdline ==============
[21:59:52] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[21:59:52] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[21:59:52] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[21:59:52] =========== drm_validate_clone_mode (2 subtests) ===========
[21:59:52] ============== drm_test_check_in_clone_mode ===============
[21:59:52] [PASSED] in_clone_mode
[21:59:52] [PASSED] not_in_clone_mode
[21:59:52] ========== [PASSED] drm_test_check_in_clone_mode ===========
[21:59:52] =============== drm_test_check_valid_clones ===============
[21:59:52] [PASSED] not_in_clone_mode
[21:59:52] [PASSED] valid_clone
[21:59:52] [PASSED] invalid_clone
[21:59:52] =========== [PASSED] drm_test_check_valid_clones ===========
[21:59:52] ============= [PASSED] drm_validate_clone_mode =============
[21:59:52] ============= drm_validate_modeset (1 subtest) =============
[21:59:52] [PASSED] drm_test_check_connector_changed_modeset
[21:59:52] ============== [PASSED] drm_validate_modeset ===============
[21:59:52] ====== drm_test_bridge_get_current_state (1 subtest) =======
[21:59:52] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[21:59:52] ======== [PASSED] drm_test_bridge_get_current_state ========
[21:59:52] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[21:59:52] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[21:59:52] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[21:59:52] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[21:59:52] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[21:59:52] ============== drm_bridge_alloc (2 subtests) ===============
[21:59:52] [PASSED] drm_test_drm_bridge_alloc_basic
[21:59:52] [PASSED] drm_test_drm_bridge_alloc_get_put
[21:59:52] ================ [PASSED] drm_bridge_alloc =================
[21:59:52] ============= drm_bridge_bus_fmt (5 subtests) ==============
[21:59:52] [PASSED] drm_test_bridge_rgb_yuv_rgb
[21:59:52] [PASSED] drm_test_bridge_must_convert_to_yuv444
[21:59:52] [PASSED] drm_test_bridge_hdmi_auto_rgb
[21:59:52] [PASSED] drm_test_bridge_auto_first
[21:59:52] [PASSED] drm_test_bridge_rgb_yuv_no_path
[21:59:52] =============== [PASSED] drm_bridge_bus_fmt ================
[21:59:52] ============= drm_cmdline_parser (40 subtests) =============
[21:59:52] [PASSED] drm_test_cmdline_force_d_only
[21:59:52] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:59:52] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:59:52] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:59:52] [PASSED] drm_test_cmdline_force_e_only
[21:59:52] [PASSED] drm_test_cmdline_res
[21:59:52] [PASSED] drm_test_cmdline_res_vesa
[21:59:52] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:59:52] [PASSED] drm_test_cmdline_res_rblank
[21:59:52] [PASSED] drm_test_cmdline_res_bpp
[21:59:52] [PASSED] drm_test_cmdline_res_refresh
[21:59:52] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:59:52] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:59:52] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:59:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:59:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:59:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:59:52] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:59:52] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:59:52] [PASSED] drm_test_cmdline_res_margins_force_on
[21:59:52] [PASSED] drm_test_cmdline_res_vesa_margins
[21:59:52] [PASSED] drm_test_cmdline_name
[21:59:52] [PASSED] drm_test_cmdline_name_bpp
[21:59:52] [PASSED] drm_test_cmdline_name_option
[21:59:52] [PASSED] drm_test_cmdline_name_bpp_option
[21:59:52] [PASSED] drm_test_cmdline_rotate_0
[21:59:52] [PASSED] drm_test_cmdline_rotate_90
[21:59:52] [PASSED] drm_test_cmdline_rotate_180
[21:59:52] [PASSED] drm_test_cmdline_rotate_270
[21:59:52] [PASSED] drm_test_cmdline_hmirror
[21:59:52] [PASSED] drm_test_cmdline_vmirror
[21:59:52] [PASSED] drm_test_cmdline_margin_options
[21:59:52] [PASSED] drm_test_cmdline_multiple_options
[21:59:52] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:59:52] [PASSED] drm_test_cmdline_extra_and_option
[21:59:52] [PASSED] drm_test_cmdline_freestanding_options
[21:59:52] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:59:52] [PASSED] drm_test_cmdline_panel_orientation
[21:59:52] ================ drm_test_cmdline_invalid =================
[21:59:52] [PASSED] margin_only
[21:59:52] [PASSED] interlace_only
[21:59:52] [PASSED] res_missing_x
[21:59:52] [PASSED] res_missing_y
[21:59:52] [PASSED] res_bad_y
[21:59:52] [PASSED] res_missing_y_bpp
[21:59:52] [PASSED] res_bad_bpp
[21:59:52] [PASSED] res_bad_refresh
[21:59:52] [PASSED] res_bpp_refresh_force_on_off
[21:59:52] [PASSED] res_invalid_mode
[21:59:52] [PASSED] res_bpp_wrong_place_mode
[21:59:52] [PASSED] name_bpp_refresh
[21:59:52] [PASSED] name_refresh
[21:59:52] [PASSED] name_refresh_wrong_mode
[21:59:52] [PASSED] name_refresh_invalid_mode
[21:59:52] [PASSED] rotate_multiple
[21:59:52] [PASSED] rotate_invalid_val
[21:59:52] [PASSED] rotate_truncated
[21:59:52] [PASSED] invalid_option
[21:59:52] [PASSED] invalid_tv_option
[21:59:52] [PASSED] truncated_tv_option
[21:59:52] ============ [PASSED] drm_test_cmdline_invalid =============
[21:59:52] =============== drm_test_cmdline_tv_options ===============
[21:59:52] [PASSED] NTSC
[21:59:52] [PASSED] NTSC_443
[21:59:52] [PASSED] NTSC_J
[21:59:52] [PASSED] PAL
[21:59:52] [PASSED] PAL_M
[21:59:52] [PASSED] PAL_N
[21:59:52] [PASSED] SECAM
[21:59:52] [PASSED] MONO_525
[21:59:52] [PASSED] MONO_625
[21:59:52] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:59:52] =============== [PASSED] drm_cmdline_parser ================
[21:59:52] ========== drmm_connector_hdmi_init (20 subtests) ==========
[21:59:52] [PASSED] drm_test_connector_hdmi_init_valid
[21:59:52] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:59:52] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:59:52] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:59:52] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:59:52] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:59:52] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:59:52] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:59:52] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:59:52] [PASSED] supported_formats=0x9 yuv420_allowed=1
[21:59:52] [PASSED] supported_formats=0x9 yuv420_allowed=0
[21:59:52] [PASSED] supported_formats=0x5 yuv420_allowed=1
[21:59:52] [PASSED] supported_formats=0x5 yuv420_allowed=0
[21:59:52] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:59:52] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:59:52] [PASSED] drm_test_connector_hdmi_init_null_product
[21:59:52] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:59:52] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:59:52] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:59:52] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:59:52] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:59:52] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:59:52] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:59:52] ========= drm_test_connector_hdmi_init_type_valid =========
[21:59:52] [PASSED] HDMI-A
[21:59:52] [PASSED] HDMI-B
[21:59:52] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:59:52] ======== drm_test_connector_hdmi_init_type_invalid ========
[21:59:52] [PASSED] Unknown
[21:59:52] [PASSED] VGA
[21:59:52] [PASSED] DVI-I
[21:59:52] [PASSED] DVI-D
[21:59:52] [PASSED] DVI-A
[21:59:52] [PASSED] Composite
[21:59:52] [PASSED] SVIDEO
[21:59:52] [PASSED] LVDS
[21:59:52] [PASSED] Component
[21:59:52] [PASSED] DIN
[21:59:52] [PASSED] DP
[21:59:52] [PASSED] TV
[21:59:52] [PASSED] eDP
[21:59:52] [PASSED] Virtual
[21:59:52] [PASSED] DSI
[21:59:52] [PASSED] DPI
[21:59:52] [PASSED] Writeback
[21:59:52] [PASSED] SPI
[21:59:52] [PASSED] USB
[21:59:52] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:59:52] ============ [PASSED] drmm_connector_hdmi_init =============
[21:59:52] ============= drmm_connector_init (3 subtests) =============
[21:59:52] [PASSED] drm_test_drmm_connector_init
[21:59:52] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:59:52] ========= drm_test_drmm_connector_init_type_valid =========
[21:59:52] [PASSED] Unknown
[21:59:52] [PASSED] VGA
[21:59:52] [PASSED] DVI-I
[21:59:52] [PASSED] DVI-D
[21:59:52] [PASSED] DVI-A
[21:59:52] [PASSED] Composite
[21:59:52] [PASSED] SVIDEO
[21:59:52] [PASSED] LVDS
[21:59:52] [PASSED] Component
[21:59:52] [PASSED] DIN
[21:59:52] [PASSED] DP
[21:59:52] [PASSED] HDMI-A
[21:59:52] [PASSED] HDMI-B
[21:59:52] [PASSED] TV
[21:59:52] [PASSED] eDP
[21:59:52] [PASSED] Virtual
[21:59:52] [PASSED] DSI
[21:59:52] [PASSED] DPI
[21:59:52] [PASSED] Writeback
[21:59:52] [PASSED] SPI
[21:59:52] [PASSED] USB
[21:59:52] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:59:52] =============== [PASSED] drmm_connector_init ===============
[21:59:52] ========= drm_connector_dynamic_init (6 subtests) ==========
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_init
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_init_properties
[21:59:52] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[21:59:52] [PASSED] Unknown
[21:59:52] [PASSED] VGA
[21:59:52] [PASSED] DVI-I
[21:59:52] [PASSED] DVI-D
[21:59:52] [PASSED] DVI-A
[21:59:52] [PASSED] Composite
[21:59:52] [PASSED] SVIDEO
[21:59:52] [PASSED] LVDS
[21:59:52] [PASSED] Component
[21:59:52] [PASSED] DIN
[21:59:52] [PASSED] DP
[21:59:52] [PASSED] HDMI-A
[21:59:52] [PASSED] HDMI-B
[21:59:52] [PASSED] TV
[21:59:52] [PASSED] eDP
[21:59:52] [PASSED] Virtual
[21:59:52] [PASSED] DSI
[21:59:52] [PASSED] DPI
[21:59:52] [PASSED] Writeback
[21:59:52] [PASSED] SPI
[21:59:52] [PASSED] USB
[21:59:52] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[21:59:52] ======== drm_test_drm_connector_dynamic_init_name =========
[21:59:52] [PASSED] Unknown
[21:59:52] [PASSED] VGA
[21:59:52] [PASSED] DVI-I
[21:59:52] [PASSED] DVI-D
[21:59:52] [PASSED] DVI-A
[21:59:52] [PASSED] Composite
[21:59:52] [PASSED] SVIDEO
[21:59:52] [PASSED] LVDS
[21:59:52] [PASSED] Component
[21:59:52] [PASSED] DIN
[21:59:52] [PASSED] DP
[21:59:52] [PASSED] HDMI-A
[21:59:52] [PASSED] HDMI-B
[21:59:52] [PASSED] TV
[21:59:52] [PASSED] eDP
[21:59:52] [PASSED] Virtual
[21:59:52] [PASSED] DSI
[21:59:52] [PASSED] DPI
[21:59:52] [PASSED] Writeback
[21:59:52] [PASSED] SPI
[21:59:52] [PASSED] USB
[21:59:52] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[21:59:52] =========== [PASSED] drm_connector_dynamic_init ============
[21:59:52] ==== drm_connector_dynamic_register_early (4 subtests) =====
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[21:59:52] ====== [PASSED] drm_connector_dynamic_register_early =======
[21:59:52] ======= drm_connector_dynamic_register (7 subtests) ========
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[21:59:52] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[21:59:52] ========= [PASSED] drm_connector_dynamic_register ==========
[21:59:52] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:59:52] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:59:52] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:59:52] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:59:52] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:59:52] ========== drm_test_get_tv_mode_from_name_valid ===========
[21:59:52] [PASSED] NTSC
[21:59:52] [PASSED] NTSC-443
[21:59:52] [PASSED] NTSC-J
[21:59:52] [PASSED] PAL
[21:59:52] [PASSED] PAL-M
[21:59:52] [PASSED] PAL-N
[21:59:52] [PASSED] SECAM
[21:59:52] [PASSED] Mono
[21:59:52] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:59:52] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:59:52] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:59:52] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:59:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:59:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:59:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:59:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:59:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:59:52] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:59:52] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[21:59:52] [PASSED] VIC 96
[21:59:52] [PASSED] VIC 97
[21:59:52] [PASSED] VIC 101
[21:59:52] [PASSED] VIC 102
[21:59:52] [PASSED] VIC 106
[21:59:52] [PASSED] VIC 107
[21:59:52] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:59:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:59:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:59:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:59:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:59:52] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:59:52] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:59:52] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:59:52] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[21:59:52] [PASSED] Automatic
[21:59:52] [PASSED] Full
[21:59:52] [PASSED] Limited 16:235
[21:59:52] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:59:52] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:59:52] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:59:52] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:59:52] === drm_test_drm_hdmi_connector_get_output_format_name ====
[21:59:52] [PASSED] RGB
[21:59:52] [PASSED] YUV 4:2:0
[21:59:52] [PASSED] YUV 4:2:2
[21:59:52] [PASSED] YUV 4:4:4
[21:59:52] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:59:52] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:59:52] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:59:52] ============= drm_damage_helper (21 subtests) ==============
[21:59:52] [PASSED] drm_test_damage_iter_no_damage
[21:59:52] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:59:52] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:59:52] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:59:52] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:59:52] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:59:52] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:59:52] [PASSED] drm_test_damage_iter_simple_damage
[21:59:52] [PASSED] drm_test_damage_iter_single_damage
[21:59:52] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:59:52] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:59:52] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:59:52] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:59:52] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:59:52] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:59:52] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:59:52] [PASSED] drm_test_damage_iter_damage
[21:59:52] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:59:52] [PASSED] drm_test_damage_iter_damage_one_outside
[21:59:52] [PASSED] drm_test_damage_iter_damage_src_moved
[21:59:52] [PASSED] drm_test_damage_iter_damage_not_visible
[21:59:52] ================ [PASSED] drm_damage_helper ================
[21:59:52] ============== drm_dp_mst_helper (3 subtests) ==============
[21:59:52] ============== drm_test_dp_mst_calc_pbn_mode ==============
[21:59:52] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:59:52] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:59:52] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:59:52] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:59:52] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:59:52] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:59:52] ============== drm_test_dp_mst_calc_pbn_div ===============
[21:59:52] [PASSED] Link rate 2000000 lane count 4
[21:59:52] [PASSED] Link rate 2000000 lane count 2
[21:59:52] [PASSED] Link rate 2000000 lane count 1
[21:59:52] [PASSED] Link rate 1350000 lane count 4
[21:59:52] [PASSED] Link rate 1350000 lane count 2
[21:59:52] [PASSED] Link rate 1350000 lane count 1
[21:59:52] [PASSED] Link rate 1000000 lane count 4
[21:59:52] [PASSED] Link rate 1000000 lane count 2
[21:59:52] [PASSED] Link rate 1000000 lane count 1
[21:59:52] [PASSED] Link rate 810000 lane count 4
[21:59:52] [PASSED] Link rate 810000 lane count 2
[21:59:52] [PASSED] Link rate 810000 lane count 1
[21:59:52] [PASSED] Link rate 540000 lane count 4
[21:59:52] [PASSED] Link rate 540000 lane count 2
[21:59:52] [PASSED] Link rate 540000 lane count 1
[21:59:52] [PASSED] Link rate 270000 lane count 4
[21:59:52] [PASSED] Link rate 270000 lane count 2
[21:59:52] [PASSED] Link rate 270000 lane count 1
[21:59:52] [PASSED] Link rate 162000 lane count 4
[21:59:52] [PASSED] Link rate 162000 lane count 2
[21:59:52] [PASSED] Link rate 162000 lane count 1
[21:59:52] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:59:52] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[21:59:52] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:59:52] [PASSED] DP_POWER_UP_PHY with port number
[21:59:52] [PASSED] DP_POWER_DOWN_PHY with port number
[21:59:52] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:59:52] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:59:52] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:59:52] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:59:52] [PASSED] DP_QUERY_PAYLOAD with port number
[21:59:52] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:59:52] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:59:52] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:59:52] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:59:52] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:59:52] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:59:52] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:59:52] [PASSED] DP_REMOTE_I2C_READ with port number
[21:59:52] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:59:52] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:59:52] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:59:52] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:59:52] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:59:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:59:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:59:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:59:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:59:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:59:52] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:59:52] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:59:52] ================ [PASSED] drm_dp_mst_helper ================
[21:59:52] ================== drm_exec (7 subtests) ===================
[21:59:52] [PASSED] sanitycheck
[21:59:52] [PASSED] test_lock
[21:59:52] [PASSED] test_lock_unlock
[21:59:52] [PASSED] test_duplicates
[21:59:52] [PASSED] test_prepare
[21:59:52] [PASSED] test_prepare_array
[21:59:52] [PASSED] test_multiple_loops
[21:59:52] ==================== [PASSED] drm_exec =====================
[21:59:52] =========== drm_format_helper_test (17 subtests) ===========
[21:59:52] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:59:52] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:59:52] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:59:52] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:59:52] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:59:52] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:59:52] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:59:52] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[21:59:52] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:59:52] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:59:52] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:59:52] ============== drm_test_fb_xrgb8888_to_mono ===============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:59:52] ==================== drm_test_fb_swab =====================
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ================ [PASSED] drm_test_fb_swab =================
[21:59:52] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:59:52] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[21:59:52] [PASSED] single_pixel_source_buffer
[21:59:52] [PASSED] single_pixel_clip_rectangle
[21:59:52] [PASSED] well_known_colors
[21:59:52] [PASSED] destination_pitch
[21:59:52] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:59:52] ================= drm_test_fb_clip_offset =================
[21:59:52] [PASSED] pass through
[21:59:52] [PASSED] horizontal offset
[21:59:52] [PASSED] vertical offset
[21:59:52] [PASSED] horizontal and vertical offset
[21:59:52] [PASSED] horizontal offset (custom pitch)
[21:59:52] [PASSED] vertical offset (custom pitch)
[21:59:52] [PASSED] horizontal and vertical offset (custom pitch)
[21:59:52] ============= [PASSED] drm_test_fb_clip_offset =============
[21:59:52] =================== drm_test_fb_memcpy ====================
[21:59:52] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:59:52] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:59:52] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:59:52] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:59:52] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:59:52] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:59:52] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:59:52] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:59:52] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:59:52] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:59:52] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:59:52] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:59:52] =============== [PASSED] drm_test_fb_memcpy ================
[21:59:52] ============= [PASSED] drm_format_helper_test ==============
[21:59:52] ================= drm_format (18 subtests) =================
[21:59:52] [PASSED] drm_test_format_block_width_invalid
[21:59:52] [PASSED] drm_test_format_block_width_one_plane
[21:59:52] [PASSED] drm_test_format_block_width_two_plane
[21:59:52] [PASSED] drm_test_format_block_width_three_plane
[21:59:52] [PASSED] drm_test_format_block_width_tiled
[21:59:52] [PASSED] drm_test_format_block_height_invalid
[21:59:52] [PASSED] drm_test_format_block_height_one_plane
[21:59:52] [PASSED] drm_test_format_block_height_two_plane
[21:59:52] [PASSED] drm_test_format_block_height_three_plane
[21:59:52] [PASSED] drm_test_format_block_height_tiled
[21:59:52] [PASSED] drm_test_format_min_pitch_invalid
[21:59:52] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:59:52] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:59:52] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:59:52] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:59:52] [PASSED] drm_test_format_min_pitch_two_plane
[21:59:52] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:59:52] [PASSED] drm_test_format_min_pitch_tiled
[21:59:52] =================== [PASSED] drm_format ====================
[21:59:52] ============== drm_framebuffer (10 subtests) ===============
[21:59:52] ========== drm_test_framebuffer_check_src_coords ==========
[21:59:52] [PASSED] Success: source fits into fb
[21:59:52] [PASSED] Fail: overflowing fb with x-axis coordinate
[21:59:52] [PASSED] Fail: overflowing fb with y-axis coordinate
[21:59:52] [PASSED] Fail: overflowing fb with source width
[21:59:52] [PASSED] Fail: overflowing fb with source height
[21:59:52] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[21:59:52] [PASSED] drm_test_framebuffer_cleanup
[21:59:52] =============== drm_test_framebuffer_create ===============
[21:59:52] [PASSED] ABGR8888 normal sizes
[21:59:52] [PASSED] ABGR8888 max sizes
[21:59:52] [PASSED] ABGR8888 pitch greater than min required
[21:59:52] [PASSED] ABGR8888 pitch less than min required
[21:59:52] [PASSED] ABGR8888 Invalid width
[21:59:52] [PASSED] ABGR8888 Invalid buffer handle
[21:59:52] [PASSED] No pixel format
[21:59:52] [PASSED] ABGR8888 Width 0
[21:59:52] [PASSED] ABGR8888 Height 0
[21:59:52] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:59:52] [PASSED] ABGR8888 Large buffer offset
[21:59:52] [PASSED] ABGR8888 Buffer offset for inexistent plane
[21:59:52] [PASSED] ABGR8888 Invalid flag
[21:59:52] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:59:52] [PASSED] ABGR8888 Valid buffer modifier
[21:59:52] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:59:52] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:59:52] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:59:52] [PASSED] NV12 Normal sizes
[21:59:52] [PASSED] NV12 Max sizes
[21:59:52] [PASSED] NV12 Invalid pitch
[21:59:52] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:59:52] [PASSED] NV12 different modifier per-plane
[21:59:52] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:59:52] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:59:52] [PASSED] NV12 Modifier for inexistent plane
[21:59:52] [PASSED] NV12 Handle for inexistent plane
[21:59:52] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:59:52] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:59:52] [PASSED] YVU420 Normal sizes
[21:59:52] [PASSED] YVU420 Max sizes
[21:59:52] [PASSED] YVU420 Invalid pitch
[21:59:52] [PASSED] YVU420 Different pitches
[21:59:52] [PASSED] YVU420 Different buffer offsets/pitches
[21:59:52] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:59:52] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:59:52] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:59:52] [PASSED] YVU420 Valid modifier
[21:59:52] [PASSED] YVU420 Different modifiers per plane
[21:59:52] [PASSED] YVU420 Modifier for inexistent plane
[21:59:52] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[21:59:52] [PASSED] X0L2 Normal sizes
[21:59:52] [PASSED] X0L2 Max sizes
[21:59:52] [PASSED] X0L2 Invalid pitch
[21:59:52] [PASSED] X0L2 Pitch greater than minimum required
[21:59:52] [PASSED] X0L2 Handle for inexistent plane
[21:59:52] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:59:52] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:59:52] [PASSED] X0L2 Valid modifier
[21:59:52] [PASSED] X0L2 Modifier for inexistent plane
[21:59:52] =========== [PASSED] drm_test_framebuffer_create ===========
[21:59:52] [PASSED] drm_test_framebuffer_free
[21:59:52] [PASSED] drm_test_framebuffer_init
[21:59:52] [PASSED] drm_test_framebuffer_init_bad_format
[21:59:52] [PASSED] drm_test_framebuffer_init_dev_mismatch
[21:59:52] [PASSED] drm_test_framebuffer_lookup
[21:59:52] [PASSED] drm_test_framebuffer_lookup_inexistent
[21:59:52] [PASSED] drm_test_framebuffer_modifiers_not_supported
[21:59:52] ================= [PASSED] drm_framebuffer =================
[21:59:52] ================ drm_gem_shmem (8 subtests) ================
[21:59:52] [PASSED] drm_gem_shmem_test_obj_create
[21:59:52] [PASSED] drm_gem_shmem_test_obj_create_private
[21:59:52] [PASSED] drm_gem_shmem_test_pin_pages
[21:59:52] [PASSED] drm_gem_shmem_test_vmap
[21:59:52] [PASSED] drm_gem_shmem_test_get_sg_table
[21:59:52] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:59:52] [PASSED] drm_gem_shmem_test_madvise
[21:59:52] [PASSED] drm_gem_shmem_test_purge
[21:59:52] ================== [PASSED] drm_gem_shmem ==================
[21:59:52] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[21:59:52] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:59:52] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:59:52] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:59:52] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:59:52] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:59:52] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:59:52] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[21:59:52] [PASSED] Automatic
[21:59:52] [PASSED] Full
[21:59:52] [PASSED] Limited 16:235
[21:59:52] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[21:59:52] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:59:52] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:59:52] [PASSED] drm_test_check_disable_connector
[21:59:52] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:59:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[21:59:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[21:59:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[21:59:52] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[21:59:52] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[21:59:52] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:59:52] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:59:52] [PASSED] drm_test_check_output_bpc_dvi
[21:59:52] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:59:52] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:59:52] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:59:52] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:59:52] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:59:52] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:59:52] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:59:52] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:59:52] ============ drm_test_check_hdmi_color_format =============
[21:59:52] [PASSED] AUTO -> RGB
[21:59:52] [PASSED] YCBCR422 -> YUV422
[21:59:52] [PASSED] YCBCR420 -> YUV420
[21:59:52] [PASSED] YCBCR444 -> YUV444
[21:59:52] [PASSED] RGB -> RGB
[21:59:52] ======== [PASSED] drm_test_check_hdmi_color_format =========
[21:59:52] ======== drm_test_check_hdmi_color_format_420_only ========
[21:59:52] [PASSED] RGB should fail
[21:59:52] [PASSED] YUV444 should fail
[21:59:52] [PASSED] YUV422 should fail
[21:59:52] [PASSED] YUV420 should work
[21:59:52] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[21:59:52] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:59:52] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:59:52] [PASSED] drm_test_check_broadcast_rgb_value
[21:59:52] [PASSED] drm_test_check_bpc_8_value
[21:59:52] [PASSED] drm_test_check_bpc_10_value
[21:59:52] [PASSED] drm_test_check_bpc_12_value
[21:59:52] [PASSED] drm_test_check_format_value
[21:59:52] [PASSED] drm_test_check_tmds_char_value
[21:59:52] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:59:52] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[21:59:52] [PASSED] drm_test_check_mode_valid
[21:59:52] [PASSED] drm_test_check_mode_valid_reject
[21:59:52] [PASSED] drm_test_check_mode_valid_reject_rate
[21:59:52] [PASSED] drm_test_check_mode_valid_reject_max_clock
[21:59:52] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[21:59:52] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[21:59:52] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[21:59:52] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[21:59:52] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[21:59:52] [PASSED] drm_test_check_infoframes
[21:59:52] [PASSED] drm_test_check_reject_avi_infoframe
[21:59:52] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[21:59:52] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[21:59:52] [PASSED] drm_test_check_reject_audio_infoframe
[21:59:52] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[21:59:52] ================= drm_managed (2 subtests) =================
[21:59:52] [PASSED] drm_test_managed_release_action
[21:59:52] [PASSED] drm_test_managed_run_action
[21:59:52] =================== [PASSED] drm_managed ===================
[21:59:52] =================== drm_mm (6 subtests) ====================
[21:59:52] [PASSED] drm_test_mm_init
[21:59:52] [PASSED] drm_test_mm_debug
[21:59:52] [PASSED] drm_test_mm_align32
[21:59:52] [PASSED] drm_test_mm_align64
[21:59:52] [PASSED] drm_test_mm_lowest
[21:59:52] [PASSED] drm_test_mm_highest
[21:59:52] ===================== [PASSED] drm_mm ======================
[21:59:52] ============= drm_modes_analog_tv (5 subtests) =============
[21:59:52] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:59:52] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:59:52] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:59:52] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:59:52] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:59:52] =============== [PASSED] drm_modes_analog_tv ===============
[21:59:52] ============== drm_plane_helper (2 subtests) ===============
[21:59:52] =============== drm_test_check_plane_state ================
[21:59:52] [PASSED] clipping_simple
[21:59:52] [PASSED] clipping_rotate_reflect
[21:59:52] [PASSED] positioning_simple
[21:59:52] [PASSED] upscaling
[21:59:52] [PASSED] downscaling
[21:59:52] [PASSED] rounding1
[21:59:52] [PASSED] rounding2
[21:59:52] [PASSED] rounding3
[21:59:52] [PASSED] rounding4
[21:59:52] =========== [PASSED] drm_test_check_plane_state ============
[21:59:52] =========== drm_test_check_invalid_plane_state ============
[21:59:52] [PASSED] positioning_invalid
[21:59:52] [PASSED] upscaling_invalid
[21:59:52] [PASSED] downscaling_invalid
[21:59:52] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:59:52] ================ [PASSED] drm_plane_helper =================
[21:59:52] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:59:52] ====== drm_test_connector_helper_tv_get_modes_check =======
[21:59:52] [PASSED] None
[21:59:52] [PASSED] PAL
[21:59:52] [PASSED] NTSC
[21:59:52] [PASSED] Both, NTSC Default
[21:59:52] [PASSED] Both, PAL Default
[21:59:52] [PASSED] Both, NTSC Default, with PAL on command-line
[21:59:52] [PASSED] Both, PAL Default, with NTSC on command-line
[21:59:52] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:59:52] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:59:52] ================== drm_rect (9 subtests) ===================
[21:59:52] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:59:52] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:59:52] [PASSED] drm_test_rect_clip_scaled_clipped
[21:59:52] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:59:52] ================= drm_test_rect_intersect =================
[21:59:52] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:59:52] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:59:52] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:59:52] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:59:52] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:59:52] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:59:52] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:59:52] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:59:52] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:59:52] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:59:52] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:59:52] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:59:52] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:59:52] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:59:52] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:59:52] ============= [PASSED] drm_test_rect_intersect =============
[21:59:52] ================ drm_test_rect_calc_hscale ================
[21:59:52] [PASSED] normal use
[21:59:52] [PASSED] out of max range
[21:59:52] [PASSED] out of min range
[21:59:52] [PASSED] zero dst
[21:59:52] [PASSED] negative src
[21:59:52] [PASSED] negative dst
[21:59:52] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:59:52] ================ drm_test_rect_calc_vscale ================
[21:59:52] [PASSED] normal use
[21:59:52] [PASSED] out of max range
[21:59:52] [PASSED] out of min range
[21:59:52] [PASSED] zero dst
[21:59:52] [PASSED] negative src
[21:59:52] [PASSED] negative dst
[21:59:52] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:59:52] ================== drm_test_rect_rotate ===================
[21:59:52] [PASSED] reflect-x
[21:59:52] [PASSED] reflect-y
[21:59:52] [PASSED] rotate-0
[21:59:52] [PASSED] rotate-90
[21:59:52] [PASSED] rotate-180
[21:59:52] [PASSED] rotate-270
[21:59:52] ============== [PASSED] drm_test_rect_rotate ===============
[21:59:52] ================ drm_test_rect_rotate_inv =================
[21:59:52] [PASSED] reflect-x
[21:59:52] [PASSED] reflect-y
[21:59:52] [PASSED] rotate-0
[21:59:52] [PASSED] rotate-90
[21:59:52] [PASSED] rotate-180
[21:59:52] [PASSED] rotate-270
[21:59:52] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:59:52] ==================== [PASSED] drm_rect =====================
[21:59:52] ============ drm_sysfb_modeset_test (1 subtest) ============
[21:59:52] ============ drm_test_sysfb_build_fourcc_list =============
[21:59:52] [PASSED] no native formats
[21:59:52] [PASSED] XRGB8888 as native format
[21:59:52] [PASSED] remove duplicates
[21:59:52] [PASSED] convert alpha formats
[21:59:52] [PASSED] random formats
[21:59:52] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[21:59:52] ============= [PASSED] drm_sysfb_modeset_test ==============
[21:59:52] ================== drm_fixp (2 subtests) ===================
[21:59:52] [PASSED] drm_test_int2fixp
[21:59:52] [PASSED] drm_test_sm2fixp
[21:59:52] ==================== [PASSED] drm_fixp =====================
[21:59:52] ============================================================
[21:59:52] Testing complete. Ran 637 tests: passed: 637
[21:59:52] Elapsed time: 26.846s total, 1.809s configuring, 24.872s building, 0.136s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:59:53] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:59:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:00:04] Starting KUnit Kernel (1/1)...
[22:00:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:00:04] ================= ttm_device (5 subtests) ==================
[22:00:04] [PASSED] ttm_device_init_basic
[22:00:04] [PASSED] ttm_device_init_multiple
[22:00:04] [PASSED] ttm_device_fini_basic
[22:00:04] [PASSED] ttm_device_init_no_vma_man
[22:00:04] ================== ttm_device_init_pools ==================
[22:00:04] [PASSED] No DMA allocations, no DMA32 required
[22:00:04] [PASSED] DMA allocations, DMA32 required
[22:00:04] [PASSED] No DMA allocations, DMA32 required
[22:00:04] [PASSED] DMA allocations, no DMA32 required
[22:00:04] ============== [PASSED] ttm_device_init_pools ==============
[22:00:04] =================== [PASSED] ttm_device ====================
[22:00:04] ================== ttm_pool (8 subtests) ===================
[22:00:04] ================== ttm_pool_alloc_basic ===================
[22:00:04] [PASSED] One page
[22:00:04] [PASSED] More than one page
[22:00:04] [PASSED] Above the allocation limit
[22:00:04] [PASSED] One page, with coherent DMA mappings enabled
[22:00:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:00:04] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:00:04] ============== ttm_pool_alloc_basic_dma_addr ==============
[22:00:04] [PASSED] One page
[22:00:04] [PASSED] More than one page
[22:00:04] [PASSED] Above the allocation limit
[22:00:04] [PASSED] One page, with coherent DMA mappings enabled
[22:00:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:00:04] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:00:04] [PASSED] ttm_pool_alloc_order_caching_match
[22:00:04] [PASSED] ttm_pool_alloc_caching_mismatch
[22:00:04] [PASSED] ttm_pool_alloc_order_mismatch
[22:00:04] [PASSED] ttm_pool_free_dma_alloc
[22:00:04] [PASSED] ttm_pool_free_no_dma_alloc
[22:00:04] [PASSED] ttm_pool_fini_basic
[22:00:04] ==================== [PASSED] ttm_pool =====================
[22:00:04] ================ ttm_resource (8 subtests) =================
[22:00:04] ================= ttm_resource_init_basic =================
[22:00:04] [PASSED] Init resource in TTM_PL_SYSTEM
[22:00:04] [PASSED] Init resource in TTM_PL_VRAM
[22:00:04] [PASSED] Init resource in a private placement
[22:00:04] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:00:04] ============= [PASSED] ttm_resource_init_basic =============
[22:00:04] [PASSED] ttm_resource_init_pinned
[22:00:04] [PASSED] ttm_resource_fini_basic
[22:00:04] [PASSED] ttm_resource_manager_init_basic
[22:00:04] [PASSED] ttm_resource_manager_usage_basic
[22:00:04] [PASSED] ttm_resource_manager_set_used_basic
[22:00:04] [PASSED] ttm_sys_man_alloc_basic
[22:00:04] [PASSED] ttm_sys_man_free_basic
[22:00:04] ================== [PASSED] ttm_resource ===================
[22:00:04] =================== ttm_tt (15 subtests) ===================
[22:00:04] ==================== ttm_tt_init_basic ====================
[22:00:04] [PASSED] Page-aligned size
[22:00:04] [PASSED] Extra pages requested
[22:00:04] ================ [PASSED] ttm_tt_init_basic ================
[22:00:04] [PASSED] ttm_tt_init_misaligned
[22:00:04] [PASSED] ttm_tt_fini_basic
[22:00:04] [PASSED] ttm_tt_fini_sg
[22:00:04] [PASSED] ttm_tt_fini_shmem
[22:00:04] [PASSED] ttm_tt_create_basic
[22:00:04] [PASSED] ttm_tt_create_invalid_bo_type
[22:00:04] [PASSED] ttm_tt_create_ttm_exists
[22:00:04] [PASSED] ttm_tt_create_failed
[22:00:04] [PASSED] ttm_tt_destroy_basic
[22:00:04] [PASSED] ttm_tt_populate_null_ttm
[22:00:04] [PASSED] ttm_tt_populate_populated_ttm
[22:00:04] [PASSED] ttm_tt_unpopulate_basic
[22:00:04] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:00:04] [PASSED] ttm_tt_swapin_basic
[22:00:04] ===================== [PASSED] ttm_tt ======================
[22:00:04] =================== ttm_bo (14 subtests) ===================
[22:00:04] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[22:00:04] [PASSED] Cannot be interrupted and sleeps
[22:00:04] [PASSED] Cannot be interrupted, locks straight away
[22:00:04] [PASSED] Can be interrupted, sleeps
[22:00:04] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:00:04] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:00:04] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:00:04] [PASSED] ttm_bo_reserve_double_resv
[22:00:04] [PASSED] ttm_bo_reserve_interrupted
[22:00:04] [PASSED] ttm_bo_reserve_deadlock
[22:00:04] [PASSED] ttm_bo_unreserve_basic
[22:00:04] [PASSED] ttm_bo_unreserve_pinned
[22:00:04] [PASSED] ttm_bo_unreserve_bulk
[22:00:04] [PASSED] ttm_bo_fini_basic
[22:00:04] [PASSED] ttm_bo_fini_shared_resv
[22:00:04] [PASSED] ttm_bo_pin_basic
[22:00:04] [PASSED] ttm_bo_pin_unpin_resource
[22:00:04] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:00:04] ===================== [PASSED] ttm_bo ======================
[22:00:04] ============== ttm_bo_validate (22 subtests) ===============
[22:00:04] ============== ttm_bo_init_reserved_sys_man ===============
[22:00:04] [PASSED] Buffer object for userspace
[22:00:04] [PASSED] Kernel buffer object
[22:00:04] [PASSED] Shared buffer object
[22:00:04] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:00:04] ============== ttm_bo_init_reserved_mock_man ==============
[22:00:04] [PASSED] Buffer object for userspace
[22:00:04] [PASSED] Kernel buffer object
[22:00:04] [PASSED] Shared buffer object
[22:00:04] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:00:04] [PASSED] ttm_bo_init_reserved_resv
[22:00:04] ================== ttm_bo_validate_basic ==================
[22:00:04] [PASSED] Buffer object for userspace
[22:00:04] [PASSED] Kernel buffer object
[22:00:04] [PASSED] Shared buffer object
[22:00:04] ============== [PASSED] ttm_bo_validate_basic ==============
[22:00:04] [PASSED] ttm_bo_validate_invalid_placement
[22:00:04] ============= ttm_bo_validate_same_placement ==============
[22:00:04] [PASSED] System manager
[22:00:04] [PASSED] VRAM manager
[22:00:04] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:00:04] [PASSED] ttm_bo_validate_failed_alloc
[22:00:04] [PASSED] ttm_bo_validate_pinned
[22:00:04] [PASSED] ttm_bo_validate_busy_placement
[22:00:04] ================ ttm_bo_validate_multihop =================
[22:00:04] [PASSED] Buffer object for userspace
[22:00:04] [PASSED] Kernel buffer object
[22:00:04] [PASSED] Shared buffer object
[22:00:04] ============ [PASSED] ttm_bo_validate_multihop =============
[22:00:04] ========== ttm_bo_validate_no_placement_signaled ==========
[22:00:04] [PASSED] Buffer object in system domain, no page vector
[22:00:04] [PASSED] Buffer object in system domain with an existing page vector
[22:00:04] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:00:04] ======== ttm_bo_validate_no_placement_not_signaled ========
[22:00:04] [PASSED] Buffer object for userspace
[22:00:04] [PASSED] Kernel buffer object
[22:00:04] [PASSED] Shared buffer object
[22:00:04] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:00:04] [PASSED] ttm_bo_validate_move_fence_signaled
[22:00:04] ========= ttm_bo_validate_move_fence_not_signaled =========
[22:00:04] [PASSED] Waits for GPU
[22:00:04] [PASSED] Tries to lock straight away
[22:00:04] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:00:04] [PASSED] ttm_bo_validate_swapout
[22:00:04] [PASSED] ttm_bo_validate_happy_evict
[22:00:04] [PASSED] ttm_bo_validate_all_pinned_evict
[22:00:04] [PASSED] ttm_bo_validate_allowed_only_evict
[22:00:04] [PASSED] ttm_bo_validate_deleted_evict
[22:00:04] [PASSED] ttm_bo_validate_busy_domain_evict
[22:00:04] [PASSED] ttm_bo_validate_evict_gutting
[22:00:04] [PASSED] ttm_bo_validate_recrusive_evict
[22:00:04] ================= [PASSED] ttm_bo_validate =================
[22:00:04] ============================================================
[22:00:04] Testing complete. Ran 102 tests: passed: 102
[22:00:04] Elapsed time: 11.856s total, 1.826s configuring, 9.815s building, 0.183s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Xe.CI.FULL: success for SKL_DSSM / DE_CAP fixes
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
` (4 preceding siblings ...)
2026-08-03 22:00 ` ✓ CI.KUnit: success for SKL_DSSM / DE_CAP fixes Patchwork
@ 2026-08-04 1:19 ` Patchwork
2026-08-04 12:42 ` ✓ CI.KUnit: " Patchwork
` (4 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-08-04 1:19 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 846 bytes --]
== Series Details ==
Series: SKL_DSSM / DE_CAP fixes
URL : https://patchwork.freedesktop.org/series/171533/
State : success
== Summary ==
CI Bug Log - changes from xe-5523-9a93ab75c5956f84bedf22b5bb3385ab9add0d12_FULL -> xe-pw-171533v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (0 -> 0)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5523-9a93ab75c5956f84bedf22b5bb3385ab9add0d12 -> xe-pw-171533v1
IGT_9036: 9036
xe-5523-9a93ab75c5956f84bedf22b5bb3385ab9add0d12: 9a93ab75c5956f84bedf22b5bb3385ab9add0d12
xe-pw-171533v1: 171533v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v1/index.html
[-- Attachment #2: Type: text/html, Size: 1394 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 1/4] drm/i915/display: fix SKL_DSSM register macros
2026-08-03 21:49 ` [PATCH v2 1/4] drm/i915/display: fix SKL_DSSM register macros Michał Grzelak
@ 2026-08-04 8:01 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2026-08-04 8:01 UTC (permalink / raw)
To: Michał Grzelak, intel-gfx, intel-xe; +Cc: Michał Grzelak
On Mon, 03 Aug 2026, Michał Grzelak <michal.grzelak@intel.com> wrote:
> Indent SKL_DSSM register macros. Define mask and register values with
> REG_GENMASK() and REG_FIELD_PREP() instead of bit shifts.
Nitpick, in subject, "fix" is misleading. This is just cleanup without
functional changes.
No need to resend for this.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
> v1->v2
> - s/REG_GENMASK/REG_FIELD_PREP/ (Jani)
>
> Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_regs.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 0f5018482497..740331ead20a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -1779,10 +1779,10 @@
> #define XE2LPD_DE_CAP_SCALER_SINGLE 1
>
> #define SKL_DSSM _MMIO(0x51004)
> -#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK (7 << 29)
> -#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz (0 << 29)
> -#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz (1 << 29)
> -#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz (2 << 29)
> +#define ICL_DSSM_CDCLK_PLL_REFCLK_MASK REG_GENMASK(31, 29)
> +#define ICL_DSSM_CDCLK_PLL_REFCLK_24MHz REG_FIELD_PREP(ICL_DSSM_CDCLK_PLL_REFCLK_MASK, 0)
> +#define ICL_DSSM_CDCLK_PLL_REFCLK_19_2MHz REG_FIELD_PREP(ICL_DSSM_CDCLK_PLL_REFCLK_MASK, 1)
> +#define ICL_DSSM_CDCLK_PLL_REFCLK_38_4MHz REG_FIELD_PREP(ICL_DSSM_CDCLK_PLL_REFCLK_MASK, 2)
>
> /*GEN11 chicken */
> #define _PIPEA_CHICKEN 0x70038
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ CI.KUnit: success for SKL_DSSM / DE_CAP fixes
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
` (5 preceding siblings ...)
2026-08-04 1:19 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-08-04 12:42 ` Patchwork
2026-08-05 6:00 ` ✗ Xe.CI.BAT: failure " Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-08-04 12:42 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
== Series Details ==
Series: SKL_DSSM / DE_CAP fixes
URL : https://patchwork.freedesktop.org/series/171533/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:40:57] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:41:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:41:33] Starting KUnit Kernel (1/1)...
[12:41:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:41:33] ================== guc_buf (11 subtests) ===================
[12:41:33] [PASSED] test_smallest
[12:41:33] [PASSED] test_largest
[12:41:33] [PASSED] test_granular
[12:41:33] [PASSED] test_unique
[12:41:33] [PASSED] test_overlap
[12:41:33] [PASSED] test_reusable
[12:41:33] [PASSED] test_too_big
[12:41:33] [PASSED] test_flush
[12:41:33] [PASSED] test_lookup
[12:41:33] [PASSED] test_data
[12:41:33] [PASSED] test_class
[12:41:33] ===================== [PASSED] guc_buf =====================
[12:41:33] =================== guc_dbm (7 subtests) ===================
[12:41:33] [PASSED] test_empty
[12:41:33] [PASSED] test_default
[12:41:33] ======================== test_size ========================
[12:41:33] [PASSED] 4
[12:41:33] [PASSED] 8
[12:41:33] [PASSED] 32
[12:41:33] [PASSED] 256
[12:41:33] ==================== [PASSED] test_size ====================
[12:41:33] ======================= test_reuse ========================
[12:41:33] [PASSED] 4
[12:41:33] [PASSED] 8
[12:41:33] [PASSED] 32
[12:41:33] [PASSED] 256
[12:41:33] =================== [PASSED] test_reuse ====================
[12:41:33] =================== test_range_overlap ====================
[12:41:33] [PASSED] 4
[12:41:33] [PASSED] 8
[12:41:33] [PASSED] 32
[12:41:33] [PASSED] 256
[12:41:33] =============== [PASSED] test_range_overlap ================
[12:41:33] =================== test_range_compact ====================
[12:41:33] [PASSED] 4
[12:41:33] [PASSED] 8
[12:41:33] [PASSED] 32
[12:41:33] [PASSED] 256
[12:41:33] =============== [PASSED] test_range_compact ================
[12:41:33] ==================== test_range_spare =====================
[12:41:33] [PASSED] 4
[12:41:33] [PASSED] 8
[12:41:33] [PASSED] 32
[12:41:33] [PASSED] 256
[12:41:33] ================ [PASSED] test_range_spare =================
[12:41:33] ===================== [PASSED] guc_dbm =====================
[12:41:33] =================== guc_idm (6 subtests) ===================
[12:41:33] [PASSED] bad_init
[12:41:33] [PASSED] no_init
[12:41:33] [PASSED] init_fini
[12:41:33] [PASSED] check_used
[12:41:33] [PASSED] check_quota
[12:41:33] [PASSED] check_all
[12:41:33] ===================== [PASSED] guc_idm =====================
[12:41:33] =============== guc_klv_helpers (9 subtests) ===============
[12:41:33] [PASSED] test_count
[12:41:33] [PASSED] test_encode_u32
[12:41:33] [PASSED] test_encode_u64
[12:41:33] [PASSED] test_encode_string
[12:41:33] [PASSED] test_encode_object_raw
[12:41:33] [PASSED] test_encode_object_klv
[12:41:33] [PASSED] test_encode_object_nested
[12:41:33] [PASSED] test_encode_object_basic
[12:41:33] [PASSED] test_print
[12:41:33] ================= [PASSED] guc_klv_helpers =================
[12:41:33] ================== no_relay (3 subtests) ===================
[12:41:33] [PASSED] xe_drops_guc2pf_if_not_ready
[12:41:33] [PASSED] xe_drops_guc2vf_if_not_ready
[12:41:33] [PASSED] xe_rejects_send_if_not_ready
[12:41:33] ==================== [PASSED] no_relay =====================
[12:41:33] ================== pf_relay (14 subtests) ==================
[12:41:33] [PASSED] pf_rejects_guc2pf_too_short
[12:41:33] [PASSED] pf_rejects_guc2pf_too_long
[12:41:33] [PASSED] pf_rejects_guc2pf_no_payload
[12:41:33] [PASSED] pf_fails_no_payload
[12:41:33] [PASSED] pf_fails_bad_origin
[12:41:33] [PASSED] pf_fails_bad_type
[12:41:33] [PASSED] pf_txn_reports_error
[12:41:33] [PASSED] pf_txn_sends_pf2guc
[12:41:33] [PASSED] pf_sends_pf2guc
[12:41:33] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:33] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:33] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:33] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:33] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:41:33] ==================== [PASSED] pf_relay =====================
[12:41:33] ================== vf_relay (3 subtests) ===================
[12:41:33] [PASSED] vf_rejects_guc2vf_too_short
[12:41:33] [PASSED] vf_rejects_guc2vf_too_long
[12:41:33] [PASSED] vf_rejects_guc2vf_no_payload
[12:41:33] ==================== [PASSED] vf_relay =====================
[12:41:33] ================ pf_gt_config (9 subtests) =================
[12:41:33] [PASSED] fair_contexts_1vf
[12:41:33] [PASSED] fair_doorbells_1vf
[12:41:33] [PASSED] fair_ggtt_1vf
[12:41:33] ====================== fair_vram_1vf ======================
[12:41:33] [PASSED] 3.50 GiB
[12:41:33] [PASSED] 11.5 GiB
[12:41:33] [PASSED] 15.5 GiB
[12:41:33] [PASSED] 31.5 GiB
[12:41:33] [PASSED] 63.5 GiB
[12:41:33] [PASSED] 1.91 GiB
[12:41:33] ================== [PASSED] fair_vram_1vf ==================
[12:41:33] ================ fair_vram_1vf_admin_only =================
[12:41:33] [PASSED] 3.50 GiB
[12:41:33] [PASSED] 11.5 GiB
[12:41:33] [PASSED] 15.5 GiB
[12:41:33] [PASSED] 31.5 GiB
[12:41:33] [PASSED] 63.5 GiB
[12:41:33] [PASSED] 1.91 GiB
[12:41:33] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:41:33] ====================== fair_contexts ======================
[12:41:33] [PASSED] 1 VF
[12:41:33] [PASSED] 2 VFs
[12:41:33] [PASSED] 3 VFs
[12:41:33] [PASSED] 4 VFs
[12:41:33] [PASSED] 5 VFs
[12:41:33] [PASSED] 6 VFs
[12:41:33] [PASSED] 7 VFs
[12:41:33] [PASSED] 8 VFs
[12:41:33] [PASSED] 9 VFs
[12:41:33] [PASSED] 10 VFs
[12:41:33] [PASSED] 11 VFs
[12:41:33] [PASSED] 12 VFs
[12:41:33] [PASSED] 13 VFs
[12:41:33] [PASSED] 14 VFs
[12:41:33] [PASSED] 15 VFs
[12:41:33] [PASSED] 16 VFs
[12:41:33] [PASSED] 17 VFs
[12:41:33] [PASSED] 18 VFs
[12:41:33] [PASSED] 19 VFs
[12:41:33] [PASSED] 20 VFs
[12:41:33] [PASSED] 21 VFs
[12:41:33] [PASSED] 22 VFs
[12:41:33] [PASSED] 23 VFs
[12:41:33] [PASSED] 24 VFs
[12:41:33] [PASSED] 25 VFs
[12:41:33] [PASSED] 26 VFs
[12:41:33] [PASSED] 27 VFs
[12:41:33] [PASSED] 28 VFs
[12:41:33] [PASSED] 29 VFs
[12:41:33] [PASSED] 30 VFs
[12:41:33] [PASSED] 31 VFs
[12:41:33] [PASSED] 32 VFs
[12:41:33] [PASSED] 33 VFs
[12:41:33] [PASSED] 34 VFs
[12:41:33] [PASSED] 35 VFs
[12:41:33] [PASSED] 36 VFs
[12:41:33] [PASSED] 37 VFs
[12:41:33] [PASSED] 38 VFs
[12:41:33] [PASSED] 39 VFs
[12:41:33] [PASSED] 40 VFs
[12:41:33] [PASSED] 41 VFs
[12:41:33] [PASSED] 42 VFs
[12:41:33] [PASSED] 43 VFs
[12:41:33] [PASSED] 44 VFs
[12:41:33] [PASSED] 45 VFs
[12:41:33] [PASSED] 46 VFs
[12:41:33] [PASSED] 47 VFs
[12:41:33] [PASSED] 48 VFs
[12:41:33] [PASSED] 49 VFs
[12:41:33] [PASSED] 50 VFs
[12:41:33] [PASSED] 51 VFs
[12:41:33] [PASSED] 52 VFs
[12:41:33] [PASSED] 53 VFs
[12:41:33] [PASSED] 54 VFs
[12:41:33] [PASSED] 55 VFs
[12:41:33] [PASSED] 56 VFs
[12:41:33] [PASSED] 57 VFs
[12:41:33] [PASSED] 58 VFs
[12:41:33] [PASSED] 59 VFs
[12:41:33] [PASSED] 60 VFs
[12:41:33] [PASSED] 61 VFs
[12:41:33] [PASSED] 62 VFs
[12:41:33] [PASSED] 63 VFs
[12:41:33] ================== [PASSED] fair_contexts ==================
[12:41:33] ===================== fair_doorbells ======================
[12:41:33] [PASSED] 1 VF
[12:41:33] [PASSED] 2 VFs
[12:41:33] [PASSED] 3 VFs
[12:41:33] [PASSED] 4 VFs
[12:41:33] [PASSED] 5 VFs
[12:41:33] [PASSED] 6 VFs
[12:41:33] [PASSED] 7 VFs
[12:41:33] [PASSED] 8 VFs
[12:41:33] [PASSED] 9 VFs
[12:41:33] [PASSED] 10 VFs
[12:41:33] [PASSED] 11 VFs
[12:41:33] [PASSED] 12 VFs
[12:41:33] [PASSED] 13 VFs
[12:41:33] [PASSED] 14 VFs
[12:41:33] [PASSED] 15 VFs
[12:41:33] [PASSED] 16 VFs
[12:41:33] [PASSED] 17 VFs
[12:41:33] [PASSED] 18 VFs
[12:41:33] [PASSED] 19 VFs
[12:41:33] [PASSED] 20 VFs
[12:41:33] [PASSED] 21 VFs
[12:41:33] [PASSED] 22 VFs
[12:41:33] [PASSED] 23 VFs
[12:41:33] [PASSED] 24 VFs
[12:41:33] [PASSED] 25 VFs
[12:41:33] [PASSED] 26 VFs
[12:41:33] [PASSED] 27 VFs
[12:41:33] [PASSED] 28 VFs
[12:41:33] [PASSED] 29 VFs
[12:41:33] [PASSED] 30 VFs
[12:41:33] [PASSED] 31 VFs
[12:41:33] [PASSED] 32 VFs
[12:41:33] [PASSED] 33 VFs
[12:41:33] [PASSED] 34 VFs
[12:41:33] [PASSED] 35 VFs
[12:41:33] [PASSED] 36 VFs
[12:41:33] [PASSED] 37 VFs
[12:41:33] [PASSED] 38 VFs
[12:41:33] [PASSED] 39 VFs
[12:41:33] [PASSED] 40 VFs
[12:41:33] [PASSED] 41 VFs
[12:41:33] [PASSED] 42 VFs
[12:41:33] [PASSED] 43 VFs
[12:41:33] [PASSED] 44 VFs
[12:41:33] [PASSED] 45 VFs
[12:41:33] [PASSED] 46 VFs
[12:41:33] [PASSED] 47 VFs
[12:41:33] [PASSED] 48 VFs
[12:41:33] [PASSED] 49 VFs
[12:41:33] [PASSED] 50 VFs
[12:41:33] [PASSED] 51 VFs
[12:41:33] [PASSED] 52 VFs
[12:41:33] [PASSED] 53 VFs
[12:41:33] [PASSED] 54 VFs
[12:41:33] [PASSED] 55 VFs
[12:41:33] [PASSED] 56 VFs
[12:41:33] [PASSED] 57 VFs
[12:41:33] [PASSED] 58 VFs
[12:41:33] [PASSED] 59 VFs
[12:41:33] [PASSED] 60 VFs
[12:41:33] [PASSED] 61 VFs
[12:41:34] [PASSED] 62 VFs
[12:41:34] [PASSED] 63 VFs
[12:41:34] ================= [PASSED] fair_doorbells ==================
[12:41:34] ======================== fair_ggtt ========================
[12:41:34] [PASSED] 1 VF
[12:41:34] [PASSED] 2 VFs
[12:41:34] [PASSED] 3 VFs
[12:41:34] [PASSED] 4 VFs
[12:41:34] [PASSED] 5 VFs
[12:41:34] [PASSED] 6 VFs
[12:41:34] [PASSED] 7 VFs
[12:41:34] [PASSED] 8 VFs
[12:41:34] [PASSED] 9 VFs
[12:41:34] [PASSED] 10 VFs
[12:41:34] [PASSED] 11 VFs
[12:41:34] [PASSED] 12 VFs
[12:41:34] [PASSED] 13 VFs
[12:41:34] [PASSED] 14 VFs
[12:41:34] [PASSED] 15 VFs
[12:41:34] [PASSED] 16 VFs
[12:41:34] [PASSED] 17 VFs
[12:41:34] [PASSED] 18 VFs
[12:41:34] [PASSED] 19 VFs
[12:41:34] [PASSED] 20 VFs
[12:41:34] [PASSED] 21 VFs
[12:41:34] [PASSED] 22 VFs
[12:41:34] [PASSED] 23 VFs
[12:41:34] [PASSED] 24 VFs
[12:41:34] [PASSED] 25 VFs
[12:41:34] [PASSED] 26 VFs
[12:41:34] [PASSED] 27 VFs
[12:41:34] [PASSED] 28 VFs
[12:41:34] [PASSED] 29 VFs
[12:41:34] [PASSED] 30 VFs
[12:41:34] [PASSED] 31 VFs
[12:41:34] [PASSED] 32 VFs
[12:41:34] [PASSED] 33 VFs
[12:41:34] [PASSED] 34 VFs
[12:41:34] [PASSED] 35 VFs
[12:41:34] [PASSED] 36 VFs
[12:41:34] [PASSED] 37 VFs
[12:41:34] [PASSED] 38 VFs
[12:41:34] [PASSED] 39 VFs
[12:41:34] [PASSED] 40 VFs
[12:41:34] [PASSED] 41 VFs
[12:41:34] [PASSED] 42 VFs
[12:41:34] [PASSED] 43 VFs
[12:41:34] [PASSED] 44 VFs
[12:41:34] [PASSED] 45 VFs
[12:41:34] [PASSED] 46 VFs
[12:41:34] [PASSED] 47 VFs
[12:41:34] [PASSED] 48 VFs
[12:41:34] [PASSED] 49 VFs
[12:41:34] [PASSED] 50 VFs
[12:41:34] [PASSED] 51 VFs
[12:41:34] [PASSED] 52 VFs
[12:41:34] [PASSED] 53 VFs
[12:41:34] [PASSED] 54 VFs
[12:41:34] [PASSED] 55 VFs
[12:41:34] [PASSED] 56 VFs
[12:41:34] [PASSED] 57 VFs
[12:41:34] [PASSED] 58 VFs
[12:41:34] [PASSED] 59 VFs
[12:41:34] [PASSED] 60 VFs
[12:41:34] [PASSED] 61 VFs
[12:41:34] [PASSED] 62 VFs
[12:41:34] [PASSED] 63 VFs
[12:41:34] ==================== [PASSED] fair_ggtt ====================
[12:41:34] ======================== fair_vram ========================
[12:41:34] [PASSED] 1 VF
[12:41:34] [PASSED] 2 VFs
[12:41:34] [PASSED] 3 VFs
[12:41:34] [PASSED] 4 VFs
[12:41:34] [PASSED] 5 VFs
[12:41:34] [PASSED] 6 VFs
[12:41:34] [PASSED] 7 VFs
[12:41:34] [PASSED] 8 VFs
[12:41:34] [PASSED] 9 VFs
[12:41:34] [PASSED] 10 VFs
[12:41:34] [PASSED] 11 VFs
[12:41:34] [PASSED] 12 VFs
[12:41:34] [PASSED] 13 VFs
[12:41:34] [PASSED] 14 VFs
[12:41:34] [PASSED] 15 VFs
[12:41:34] [PASSED] 16 VFs
[12:41:34] [PASSED] 17 VFs
[12:41:34] [PASSED] 18 VFs
[12:41:34] [PASSED] 19 VFs
[12:41:34] [PASSED] 20 VFs
[12:41:34] [PASSED] 21 VFs
[12:41:34] [PASSED] 22 VFs
[12:41:34] [PASSED] 23 VFs
[12:41:34] [PASSED] 24 VFs
[12:41:34] [PASSED] 25 VFs
[12:41:34] [PASSED] 26 VFs
[12:41:34] [PASSED] 27 VFs
[12:41:34] [PASSED] 28 VFs
[12:41:34] [PASSED] 29 VFs
[12:41:34] [PASSED] 30 VFs
[12:41:34] [PASSED] 31 VFs
[12:41:34] [PASSED] 32 VFs
[12:41:34] [PASSED] 33 VFs
[12:41:34] [PASSED] 34 VFs
[12:41:34] [PASSED] 35 VFs
[12:41:34] [PASSED] 36 VFs
[12:41:34] [PASSED] 37 VFs
[12:41:34] [PASSED] 38 VFs
[12:41:34] [PASSED] 39 VFs
[12:41:34] [PASSED] 40 VFs
[12:41:34] [PASSED] 41 VFs
[12:41:34] [PASSED] 42 VFs
[12:41:34] [PASSED] 43 VFs
[12:41:34] [PASSED] 44 VFs
[12:41:34] [PASSED] 45 VFs
[12:41:34] [PASSED] 46 VFs
[12:41:34] [PASSED] 47 VFs
[12:41:34] [PASSED] 48 VFs
[12:41:34] [PASSED] 49 VFs
[12:41:34] [PASSED] 50 VFs
[12:41:34] [PASSED] 51 VFs
[12:41:34] [PASSED] 52 VFs
[12:41:34] [PASSED] 53 VFs
[12:41:34] [PASSED] 54 VFs
[12:41:34] [PASSED] 55 VFs
[12:41:34] [PASSED] 56 VFs
[12:41:34] [PASSED] 57 VFs
[12:41:34] [PASSED] 58 VFs
[12:41:34] [PASSED] 59 VFs
[12:41:34] [PASSED] 60 VFs
[12:41:34] [PASSED] 61 VFs
[12:41:34] [PASSED] 62 VFs
[12:41:34] [PASSED] 63 VFs
[12:41:34] ==================== [PASSED] fair_vram ====================
[12:41:34] ================== [PASSED] pf_gt_config ===================
[12:41:34] ===================== lmtt (1 subtest) =====================
[12:41:34] ======================== test_ops =========================
[12:41:34] [PASSED] 2-level
[12:41:34] [PASSED] multi-level
[12:41:34] ==================== [PASSED] test_ops =====================
[12:41:34] ====================== [PASSED] lmtt =======================
[12:41:34] ================= sriov_packet (1 subtest) =================
[12:41:34] [PASSED] test_descriptor_init
[12:41:34] ================== [PASSED] sriov_packet ===================
[12:41:34] ================= pf_service (11 subtests) =================
[12:41:34] [PASSED] pf_negotiate_any
[12:41:34] [PASSED] pf_negotiate_base_match
[12:41:34] [PASSED] pf_negotiate_base_newer
[12:41:34] [PASSED] pf_negotiate_base_next
[12:41:34] [SKIPPED] pf_negotiate_base_older (no older minor)
[12:41:34] [PASSED] pf_negotiate_base_prev
[12:41:34] [PASSED] pf_negotiate_latest_match
[12:41:34] [PASSED] pf_negotiate_latest_newer
[12:41:34] [PASSED] pf_negotiate_latest_next
[12:41:34] [SKIPPED] pf_negotiate_latest_older (no older minor)
[12:41:34] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[12:41:34] =================== [PASSED] pf_service ====================
[12:41:34] ================= xe_guc_g2g (2 subtests) ==================
[12:41:34] ============== xe_live_guc_g2g_kunit_default ==============
[12:41:34] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:41:34] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:41:34] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:41:34] =================== [SKIPPED] xe_guc_g2g ===================
[12:41:34] =================== xe_mocs (2 subtests) ===================
[12:41:34] ================ xe_live_mocs_kernel_kunit ================
[12:41:34] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:41:34] ================ xe_live_mocs_reset_kunit =================
[12:41:34] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:41:34] ==================== [SKIPPED] xe_mocs =====================
[12:41:34] ================= xe_migrate (2 subtests) ==================
[12:41:34] ================= xe_migrate_sanity_kunit =================
[12:41:34] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:41:34] ================== xe_validate_ccs_kunit ==================
[12:41:34] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:41:34] =================== [SKIPPED] xe_migrate ===================
[12:41:34] ================== xe_dma_buf (1 subtest) ==================
[12:41:34] ==================== xe_dma_buf_kunit =====================
[12:41:34] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:41:34] =================== [SKIPPED] xe_dma_buf ===================
[12:41:34] ================= xe_bo_shrink (1 subtest) =================
[12:41:34] =================== xe_bo_shrink_kunit ====================
[12:41:34] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:41:34] ================== [SKIPPED] xe_bo_shrink ==================
[12:41:34] ==================== xe_bo (2 subtests) ====================
[12:41:34] ================== xe_ccs_migrate_kunit ===================
[12:41:34] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:41:34] ==================== xe_bo_evict_kunit ====================
[12:41:34] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:41:34] ===================== [SKIPPED] xe_bo ======================
[12:41:34] ==================== args (13 subtests) ====================
[12:41:34] [PASSED] count_args_test
[12:41:34] [PASSED] call_args_example
[12:41:34] [PASSED] call_args_test
[12:41:34] [PASSED] drop_first_arg_example
[12:41:34] [PASSED] drop_first_arg_test
[12:41:34] [PASSED] first_arg_example
[12:41:34] [PASSED] first_arg_test
[12:41:34] [PASSED] last_arg_example
[12:41:34] [PASSED] last_arg_test
[12:41:34] [PASSED] pick_arg_example
[12:41:34] [PASSED] if_args_example
[12:41:34] [PASSED] if_args_test
[12:41:34] [PASSED] sep_comma_example
[12:41:34] ====================== [PASSED] args =======================
[12:41:34] =================== xe_pci (3 subtests) ====================
[12:41:34] ==================== check_graphics_ip ====================
[12:41:34] [PASSED] 12.00 Xe_LP
[12:41:34] [PASSED] 12.10 Xe_LP+
[12:41:34] [PASSED] 12.55 Xe_HPG
[12:41:34] [PASSED] 12.60 Xe_HPC
[12:41:34] [PASSED] 12.70 Xe_LPG
[12:41:34] [PASSED] 12.71 Xe_LPG
[12:41:34] [PASSED] 12.74 Xe_LPG+
[12:41:34] [PASSED] 20.01 Xe2_HPG
[12:41:34] [PASSED] 20.02 Xe2_HPG
[12:41:34] [PASSED] 20.04 Xe2_LPG
[12:41:34] [PASSED] 30.00 Xe3_LPG
[12:41:34] [PASSED] 30.01 Xe3_LPG
[12:41:34] [PASSED] 30.03 Xe3_LPG
[12:41:34] [PASSED] 30.04 Xe3_LPG
[12:41:34] [PASSED] 30.05 Xe3_LPG
[12:41:34] [PASSED] 35.10 Xe3p_LPG
[12:41:34] [PASSED] 35.11 Xe3p_XPC
[12:41:34] ================ [PASSED] check_graphics_ip ================
[12:41:34] ===================== check_media_ip ======================
[12:41:34] [PASSED] 12.00 Xe_M
[12:41:34] [PASSED] 12.55 Xe_HPM
[12:41:34] [PASSED] 13.00 Xe_LPM+
[12:41:34] [PASSED] 13.01 Xe2_HPM
[12:41:34] [PASSED] 20.00 Xe2_LPM
[12:41:34] [PASSED] 30.00 Xe3_LPM
[12:41:34] [PASSED] 30.02 Xe3_LPM
[12:41:34] [PASSED] 35.00 Xe3p_LPM
[12:41:34] [PASSED] 35.03 Xe3p_HPM
[12:41:34] ================= [PASSED] check_media_ip ==================
[12:41:34] =================== check_platform_desc ===================
[12:41:34] [PASSED] 0x9A60 (TIGERLAKE)
[12:41:34] [PASSED] 0x9A68 (TIGERLAKE)
[12:41:34] [PASSED] 0x9A70 (TIGERLAKE)
[12:41:34] [PASSED] 0x9A40 (TIGERLAKE)
[12:41:34] [PASSED] 0x9A49 (TIGERLAKE)
[12:41:34] [PASSED] 0x9A59 (TIGERLAKE)
[12:41:34] [PASSED] 0x9A78 (TIGERLAKE)
[12:41:34] [PASSED] 0x9AC0 (TIGERLAKE)
[12:41:34] [PASSED] 0x9AC9 (TIGERLAKE)
[12:41:34] [PASSED] 0x9AD9 (TIGERLAKE)
[12:41:34] [PASSED] 0x9AF8 (TIGERLAKE)
[12:41:34] [PASSED] 0x4C80 (ROCKETLAKE)
[12:41:34] [PASSED] 0x4C8A (ROCKETLAKE)
[12:41:34] [PASSED] 0x4C8B (ROCKETLAKE)
[12:41:34] [PASSED] 0x4C8C (ROCKETLAKE)
[12:41:34] [PASSED] 0x4C90 (ROCKETLAKE)
[12:41:34] [PASSED] 0x4C9A (ROCKETLAKE)
[12:41:34] [PASSED] 0x4680 (ALDERLAKE_S)
[12:41:34] [PASSED] 0x4682 (ALDERLAKE_S)
[12:41:34] [PASSED] 0x4688 (ALDERLAKE_S)
[12:41:34] [PASSED] 0x468A (ALDERLAKE_S)
[12:41:34] [PASSED] 0x468B (ALDERLAKE_S)
[12:41:34] [PASSED] 0x4690 (ALDERLAKE_S)
[12:41:34] [PASSED] 0x4692 (ALDERLAKE_S)
[12:41:34] [PASSED] 0x4693 (ALDERLAKE_S)
[12:41:34] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46AA (ALDERLAKE_P)
[12:41:34] [PASSED] 0x462A (ALDERLAKE_P)
[12:41:34] [PASSED] 0x4626 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x4628 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:41:34] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:41:34] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:41:34] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:41:34] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:41:34] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:41:34] [PASSED] 0xA721 (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA720 (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:41:34] [PASSED] 0xA780 (ALDERLAKE_S)
[12:41:34] [PASSED] 0xA781 (ALDERLAKE_S)
[12:41:34] [PASSED] 0xA782 (ALDERLAKE_S)
[12:41:34] [PASSED] 0xA783 (ALDERLAKE_S)
[12:41:34] [PASSED] 0xA788 (ALDERLAKE_S)
[12:41:34] [PASSED] 0xA789 (ALDERLAKE_S)
[12:41:34] [PASSED] 0xA78A (ALDERLAKE_S)
[12:41:34] [PASSED] 0xA78B (ALDERLAKE_S)
[12:41:34] [PASSED] 0x4905 (DG1)
[12:41:34] [PASSED] 0x4906 (DG1)
[12:41:34] [PASSED] 0x4907 (DG1)
[12:41:34] [PASSED] 0x4908 (DG1)
[12:41:34] [PASSED] 0x4909 (DG1)
[12:41:34] [PASSED] 0x56C0 (DG2)
[12:41:34] [PASSED] 0x56C2 (DG2)
[12:41:34] [PASSED] 0x56C1 (DG2)
[12:41:34] [PASSED] 0x7D51 (METEORLAKE)
[12:41:34] [PASSED] 0x7DD1 (METEORLAKE)
[12:41:34] [PASSED] 0x7D41 (METEORLAKE)
[12:41:34] [PASSED] 0x7D67 (METEORLAKE)
[12:41:34] [PASSED] 0xB640 (METEORLAKE)
[12:41:34] [PASSED] 0x56A0 (DG2)
[12:41:34] [PASSED] 0x56A1 (DG2)
[12:41:34] [PASSED] 0x56A2 (DG2)
[12:41:34] [PASSED] 0x56BE (DG2)
[12:41:34] [PASSED] 0x56BF (DG2)
[12:41:34] [PASSED] 0x5690 (DG2)
[12:41:34] [PASSED] 0x5691 (DG2)
[12:41:34] [PASSED] 0x5692 (DG2)
[12:41:34] [PASSED] 0x56A5 (DG2)
[12:41:34] [PASSED] 0x56A6 (DG2)
[12:41:34] [PASSED] 0x56B0 (DG2)
[12:41:34] [PASSED] 0x56B1 (DG2)
[12:41:34] [PASSED] 0x56BA (DG2)
[12:41:34] [PASSED] 0x56BB (DG2)
[12:41:34] [PASSED] 0x56BC (DG2)
[12:41:34] [PASSED] 0x56BD (DG2)
[12:41:34] [PASSED] 0x5693 (DG2)
[12:41:34] [PASSED] 0x5694 (DG2)
[12:41:34] [PASSED] 0x5695 (DG2)
[12:41:34] [PASSED] 0x56A3 (DG2)
[12:41:34] [PASSED] 0x56A4 (DG2)
[12:41:34] [PASSED] 0x56B2 (DG2)
[12:41:34] [PASSED] 0x56B3 (DG2)
[12:41:34] [PASSED] 0x5696 (DG2)
[12:41:34] [PASSED] 0x5697 (DG2)
[12:41:34] [PASSED] 0xB69 (PVC)
[12:41:34] [PASSED] 0xB6E (PVC)
[12:41:34] [PASSED] 0xBD4 (PVC)
[12:41:34] [PASSED] 0xBD5 (PVC)
[12:41:34] [PASSED] 0xBD6 (PVC)
[12:41:34] [PASSED] 0xBD7 (PVC)
[12:41:34] [PASSED] 0xBD8 (PVC)
[12:41:34] [PASSED] 0xBD9 (PVC)
[12:41:34] [PASSED] 0xBDA (PVC)
[12:41:34] [PASSED] 0xBDB (PVC)
[12:41:34] [PASSED] 0xBE0 (PVC)
[12:41:34] [PASSED] 0xBE1 (PVC)
[12:41:34] [PASSED] 0xBE5 (PVC)
[12:41:34] [PASSED] 0x7D40 (METEORLAKE)
[12:41:34] [PASSED] 0x7D45 (METEORLAKE)
[12:41:34] [PASSED] 0x7D55 (METEORLAKE)
[12:41:34] [PASSED] 0x7D60 (METEORLAKE)
[12:41:34] [PASSED] 0x7DD5 (METEORLAKE)
[12:41:34] [PASSED] 0x6420 (LUNARLAKE)
[12:41:34] [PASSED] 0x64A0 (LUNARLAKE)
[12:41:34] [PASSED] 0x64B0 (LUNARLAKE)
[12:41:34] [PASSED] 0xE202 (BATTLEMAGE)
[12:41:34] [PASSED] 0xE209 (BATTLEMAGE)
[12:41:34] [PASSED] 0xE20B (BATTLEMAGE)
[12:41:34] [PASSED] 0xE20C (BATTLEMAGE)
[12:41:34] [PASSED] 0xE20D (BATTLEMAGE)
[12:41:34] [PASSED] 0xE210 (BATTLEMAGE)
[12:41:34] [PASSED] 0xE211 (BATTLEMAGE)
[12:41:34] [PASSED] 0xE212 (BATTLEMAGE)
[12:41:34] [PASSED] 0xE216 (BATTLEMAGE)
[12:41:34] [PASSED] 0xE220 (BATTLEMAGE)
[12:41:34] [PASSED] 0xE221 (BATTLEMAGE)
[12:41:34] [PASSED] 0xE222 (BATTLEMAGE)
[12:41:34] [PASSED] 0xE223 (BATTLEMAGE)
[12:41:34] [PASSED] 0xB080 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB081 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB082 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB083 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB084 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB085 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB086 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB087 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB08F (PANTHERLAKE)
[12:41:34] [PASSED] 0xB090 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:41:34] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:41:34] [PASSED] 0xFD80 (PANTHERLAKE)
[12:41:34] [PASSED] 0xFD81 (PANTHERLAKE)
[12:41:34] [PASSED] 0xD740 (NOVALAKE_S)
[12:41:34] [PASSED] 0xD741 (NOVALAKE_S)
[12:41:34] [PASSED] 0xD742 (NOVALAKE_S)
[12:41:34] [PASSED] 0xD743 (NOVALAKE_S)
[12:41:34] [PASSED] 0xD745 (NOVALAKE_S)
[12:41:34] [PASSED] 0xD74A (NOVALAKE_S)
[12:41:34] [PASSED] 0xD74B (NOVALAKE_S)
[12:41:34] [PASSED] 0x674C (CRESCENTISLAND)
[12:41:34] [PASSED] 0x674D (CRESCENTISLAND)
[12:41:34] [PASSED] 0x674E (CRESCENTISLAND)
[12:41:34] [PASSED] 0x674F (CRESCENTISLAND)
[12:41:34] [PASSED] 0x6750 (CRESCENTISLAND)
[12:41:34] [PASSED] 0xD750 (NOVALAKE_P)
[12:41:34] [PASSED] 0xD751 (NOVALAKE_P)
[12:41:34] [PASSED] 0xD752 (NOVALAKE_P)
[12:41:34] [PASSED] 0xD753 (NOVALAKE_P)
[12:41:34] [PASSED] 0xD754 (NOVALAKE_P)
[12:41:34] [PASSED] 0xD755 (NOVALAKE_P)
[12:41:34] [PASSED] 0xD756 (NOVALAKE_P)
[12:41:34] [PASSED] 0xD757 (NOVALAKE_P)
[12:41:34] [PASSED] 0xD75F (NOVALAKE_P)
[12:41:34] =============== [PASSED] check_platform_desc ===============
[12:41:34] ===================== [PASSED] xe_pci ======================
[12:41:34] ============= xe_rtp_tables_test (5 subtests) ==============
[12:41:34] ================== xe_rtp_table_gt_test ===================
[12:41:34] [PASSED] gt_was/14011060649
[12:41:34] [PASSED] gt_was/14011059788
[12:41:34] [PASSED] gt_was/14015795083
[12:41:34] [PASSED] gt_was/16021867713
[12:41:34] [PASSED] gt_was/14019449301
[12:41:34] [PASSED] gt_was/16028005424
[12:41:34] [PASSED] gt_was/14026578760
[12:41:34] [PASSED] gt_was/1409420604
[12:41:34] [PASSED] gt_was/1408615072
[12:41:34] [PASSED] gt_was/22010523718
[12:41:34] [PASSED] gt_was/14011006942
[12:41:34] [PASSED] gt_was/14014830051
[12:41:34] [PASSED] gt_was/18018781329
[12:41:34] [PASSED] gt_was/1509235366
[12:41:34] [PASSED] gt_was/18018781329
[12:41:34] [PASSED] gt_was/16016694945
[12:41:34] [PASSED] gt_was/14018575942
[12:41:34] [PASSED] gt_was/22016670082
[12:41:34] [PASSED] gt_was/22016670082
[12:41:34] [PASSED] gt_was/14017421178
[12:41:34] [PASSED] gt_was/16025250150
[12:41:34] [PASSED] gt_was/14021871409
[12:41:34] [PASSED] gt_was/16021865536
[12:41:34] [PASSED] gt_was/14021486841
[12:41:34] [PASSED] gt_was/14025160223
[12:41:34] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[12:41:34] [PASSED] gt_was/14025635424
[12:41:34] [PASSED] gt_was/16028005424
[12:41:34] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:41:34] ================== xe_rtp_table_gt_test ===================
[12:41:34] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:41:34] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:41:34] [PASSED] gt_tunings/Tuning: L3 cache
[12:41:34] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:41:34] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:41:34] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:41:34] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:41:34] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:41:34] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:41:34] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:41:34] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:41:34] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:41:34] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:41:34] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:41:34] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:41:34] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:41:34] ================== xe_rtp_table_oob_test ==================
[12:41:34] [PASSED] oob_was/1607983814
[12:41:34] [PASSED] oob_was/16010904313
[12:41:34] [PASSED] oob_was/18022495364
[12:41:34] [PASSED] oob_was/22012773006
[12:41:34] [PASSED] oob_was/14014475959
[12:41:34] [PASSED] oob_was/22011391025
[12:41:34] [PASSED] oob_was/22012727170
[12:41:34] [PASSED] oob_was/22012727685
[12:41:34] [PASSED] oob_was/22016596838
[12:41:34] [PASSED] oob_was/18020744125
[12:41:34] [PASSED] oob_was/1409600907
[12:41:34] [PASSED] oob_was/22014953428
[12:41:34] [PASSED] oob_was/16017236439
[12:41:34] [PASSED] oob_was/14019821291
[12:41:34] [PASSED] oob_was/14015076503
[12:41:34] [PASSED] oob_was/14018913170
[12:41:34] [PASSED] oob_was/14018094691
[12:41:34] [PASSED] oob_was/18024947630
[12:41:34] [PASSED] oob_was/16022287689
[12:41:34] [PASSED] oob_was/13011645652
[12:41:34] [PASSED] oob_was/14022293748
[12:41:34] [PASSED] oob_was/22019794406
[12:41:34] [PASSED] oob_was/22019338487
[12:41:34] [PASSED] oob_was/16023588340
[12:41:34] [PASSED] oob_was/14019789679
[12:41:34] [PASSED] oob_was/14022866841
[12:41:34] [PASSED] oob_was/16021333562
[12:41:34] [PASSED] oob_was/14016712196
[12:41:34] [PASSED] oob_was/14015568240
[12:41:34] [PASSED] oob_was/18013179988
[12:41:34] [PASSED] oob_was/1508761755
[12:41:34] [PASSED] oob_was/16023105232
[12:41:34] [PASSED] oob_was/16026508708
[12:41:34] [PASSED] oob_was/14020001231
[12:41:34] [PASSED] oob_was/16023683509
[12:41:34] [PASSED] oob_was/14025515070
[12:41:34] [PASSED] oob_was/15015404425_disable
[12:41:34] [PASSED] oob_was/16026007364
[12:41:34] [PASSED] oob_was/14020316580
[12:41:34] [PASSED] oob_was/14025883347
[12:41:34] [PASSED] oob_was/16029380221
[12:41:34] [PASSED] oob_was/22022079272
[12:41:34] [PASSED] oob_was/16029897822
[12:41:34] [PASSED] oob_was/14027054324
[12:41:34] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:41:34] ================ xe_rtp_table_dev_oob_test ================
[12:41:34] [PASSED] device_oob_was/22010954014
[12:41:34] [PASSED] device_oob_was/15015404425
[12:41:34] [PASSED] device_oob_was/22019338487_display
[12:41:34] [PASSED] device_oob_was/14022085890
[12:41:34] [PASSED] device_oob_was/14026539277
[12:41:34] [PASSED] device_oob_was/14026633728
[12:41:34] [PASSED] device_oob_was/14026746987
[12:41:34] [PASSED] device_oob_was/14026779378
[12:41:34] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:41:34] ========== xe_rtp_table_missing_upper_bound_test ==========
[12:41:34] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[12:41:34] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[12:41:34] [PASSED] register_whitelist/1806527549
[12:41:34] [PASSED] register_whitelist/allow_read_ctx_timestamp
[12:41:34] [PASSED] register_whitelist/allow_read_queue_timestamp
[12:41:34] [PASSED] register_whitelist/16014440446
[12:41:34] [PASSED] register_whitelist/16017236439
[12:41:34] [PASSED] register_whitelist/16020183090
[12:41:34] [PASSED] register_whitelist/14024997852
[12:41:34] [PASSED] register_whitelist/14024997852
[12:41:34] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[12:41:34] =============== [PASSED] xe_rtp_tables_test ================
[12:41:34] =================== xe_rtp (3 subtests) ====================
[12:41:34] =================== xe_rtp_rules_tests ====================
[12:41:34] [PASSED] no
[12:41:34] [PASSED] yes
[12:41:34] [PASSED] no-and-no
[12:41:34] [PASSED] no-and-yes
[12:41:34] [PASSED] yes-and-no
[12:41:34] [PASSED] yes-and-yes
[12:41:34] [PASSED] no-or-no
[12:41:34] [PASSED] no-or-yes
[12:41:34] [PASSED] yes-or-no
[12:41:34] [PASSED] yes-or-yes
[12:41:34] [PASSED] no-yes-or-yes-no
[12:41:34] [PASSED] no-yes-or-yes-yes
[12:41:34] [PASSED] yes-yes-or-no-yes
[12:41:34] [PASSED] yes-yes-or-yes-yes
[12:41:34] [PASSED] no-no-or-yes-or-no
[12:41:34] [PASSED] or
[12:41:34] [PASSED] or-yes
[12:41:34] [PASSED] or-no
[12:41:34] [PASSED] yes-or
[12:41:34] [PASSED] no-or
[12:41:34] [PASSED] no-or-or-yes
[12:41:34] [PASSED] yes-or-or-no
[12:41:34] [PASSED] no-or-or-no
[12:41:34] [PASSED] missing-context-engine-class
[12:41:34] [PASSED] missing-context-engine-class-or-yes
[12:41:34] [PASSED] missing-context-engine-class-or-or-yes
[12:41:34] =============== [PASSED] xe_rtp_rules_tests ================
[12:41:34] =============== xe_rtp_process_to_sr_tests ================
[12:41:34] [PASSED] coalesce-same-reg
[12:41:34] [PASSED] coalesce-same-reg-literal-and-func
[12:41:34] [PASSED] no-match-no-add
[12:41:34] [PASSED] two-regs-two-entries
[12:41:34] [PASSED] clr-one-set-other
[12:41:34] [PASSED] set-field
[12:41:34] [PASSED] conflict-duplicate
[12:41:34] [PASSED] conflict-not-disjoint
[12:41:34] [PASSED] conflict-not-disjoint-literal-and-func
[12:41:34] [PASSED] conflict-reg-type
[12:41:34] [PASSED] bad-mcr-reg-forced-to-regular
[12:41:34] [PASSED] bad-regular-reg-forced-to-mcr
[12:41:34] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:41:34] ================== xe_rtp_process_tests ===================
[12:41:34] [PASSED] active1
[12:41:34] [PASSED] active2
[12:41:34] [PASSED] active-inactive
[12:41:34] [PASSED] inactive-active
[12:41:34] [PASSED] inactive-active-inactive
[12:41:34] [PASSED] inactive-inactive-inactive
[12:41:34] ============== [PASSED] xe_rtp_process_tests ===============
[12:41:34] ===================== [PASSED] xe_rtp ======================
[12:41:34] ==================== xe_wa (1 subtest) =====================
[12:41:34] ======================== xe_wa_gt =========================
[12:41:34] [PASSED] TIGERLAKE B0
[12:41:34] [PASSED] DG1 A0
[12:41:34] [PASSED] DG1 B0
[12:41:34] [PASSED] ALDERLAKE_S A0
[12:41:34] [PASSED] ALDERLAKE_S B0
[12:41:34] [PASSED] ALDERLAKE_S C0
[12:41:34] [PASSED] ALDERLAKE_S D0
[12:41:34] [PASSED] ALDERLAKE_P A0
[12:41:34] [PASSED] ALDERLAKE_P B0
[12:41:34] [PASSED] ALDERLAKE_P C0
[12:41:34] [PASSED] ALDERLAKE_S RPLS D0
[12:41:34] [PASSED] ALDERLAKE_P RPLU E0
[12:41:34] [PASSED] DG2 G10 C0
[12:41:34] [PASSED] DG2 G11 B1
[12:41:34] [PASSED] DG2 G12 A1
[12:41:34] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:41:34] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:41:34] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:41:34] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:41:34] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:41:34] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:41:34] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:41:34] ==================== [PASSED] xe_wa_gt =====================
[12:41:34] ====================== [PASSED] xe_wa ======================
[12:41:34] ============================================================
[12:41:34] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[12:41:34] Elapsed time: 36.858s total, 4.382s configuring, 31.811s building, 0.638s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:41:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:41:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:00] Starting KUnit Kernel (1/1)...
[12:42:00] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:00] ============ drm_test_pick_cmdline (2 subtests) ============
[12:42:00] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:42:00] =============== drm_test_pick_cmdline_named ===============
[12:42:00] [PASSED] NTSC
[12:42:00] [PASSED] NTSC-J
[12:42:00] [PASSED] PAL
[12:42:00] [PASSED] PAL-M
[12:42:00] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:42:00] ============== [PASSED] drm_test_pick_cmdline ==============
[12:42:00] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:42:00] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:42:00] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:42:00] =========== drm_validate_clone_mode (2 subtests) ===========
[12:42:00] ============== drm_test_check_in_clone_mode ===============
[12:42:00] [PASSED] in_clone_mode
[12:42:00] [PASSED] not_in_clone_mode
[12:42:00] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:42:00] =============== drm_test_check_valid_clones ===============
[12:42:00] [PASSED] not_in_clone_mode
[12:42:00] [PASSED] valid_clone
[12:42:00] [PASSED] invalid_clone
[12:42:00] =========== [PASSED] drm_test_check_valid_clones ===========
[12:42:00] ============= [PASSED] drm_validate_clone_mode =============
[12:42:00] ============= drm_validate_modeset (1 subtest) =============
[12:42:00] [PASSED] drm_test_check_connector_changed_modeset
[12:42:00] ============== [PASSED] drm_validate_modeset ===============
[12:42:00] ====== drm_test_bridge_get_current_state (1 subtest) =======
[12:42:00] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:42:00] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:42:00] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:42:00] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:42:00] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:42:00] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[12:42:00] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:42:00] ============== drm_bridge_alloc (2 subtests) ===============
[12:42:00] [PASSED] drm_test_drm_bridge_alloc_basic
[12:42:00] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:42:00] ================ [PASSED] drm_bridge_alloc =================
[12:42:00] ============= drm_bridge_bus_fmt (5 subtests) ==============
[12:42:00] [PASSED] drm_test_bridge_rgb_yuv_rgb
[12:42:00] [PASSED] drm_test_bridge_must_convert_to_yuv444
[12:42:00] [PASSED] drm_test_bridge_hdmi_auto_rgb
[12:42:00] [PASSED] drm_test_bridge_auto_first
[12:42:00] [PASSED] drm_test_bridge_rgb_yuv_no_path
[12:42:00] =============== [PASSED] drm_bridge_bus_fmt ================
[12:42:00] ============= drm_cmdline_parser (40 subtests) =============
[12:42:00] [PASSED] drm_test_cmdline_force_d_only
[12:42:00] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:42:00] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:42:00] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:42:00] [PASSED] drm_test_cmdline_force_e_only
[12:42:00] [PASSED] drm_test_cmdline_res
[12:42:00] [PASSED] drm_test_cmdline_res_vesa
[12:42:00] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:42:00] [PASSED] drm_test_cmdline_res_rblank
[12:42:00] [PASSED] drm_test_cmdline_res_bpp
[12:42:00] [PASSED] drm_test_cmdline_res_refresh
[12:42:00] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:42:00] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:42:00] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:42:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:42:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:42:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:42:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:42:00] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:42:00] [PASSED] drm_test_cmdline_res_margins_force_on
[12:42:00] [PASSED] drm_test_cmdline_res_vesa_margins
[12:42:00] [PASSED] drm_test_cmdline_name
[12:42:00] [PASSED] drm_test_cmdline_name_bpp
[12:42:00] [PASSED] drm_test_cmdline_name_option
[12:42:00] [PASSED] drm_test_cmdline_name_bpp_option
[12:42:00] [PASSED] drm_test_cmdline_rotate_0
[12:42:00] [PASSED] drm_test_cmdline_rotate_90
[12:42:00] [PASSED] drm_test_cmdline_rotate_180
[12:42:00] [PASSED] drm_test_cmdline_rotate_270
[12:42:00] [PASSED] drm_test_cmdline_hmirror
[12:42:00] [PASSED] drm_test_cmdline_vmirror
[12:42:00] [PASSED] drm_test_cmdline_margin_options
[12:42:00] [PASSED] drm_test_cmdline_multiple_options
[12:42:00] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:42:00] [PASSED] drm_test_cmdline_extra_and_option
[12:42:00] [PASSED] drm_test_cmdline_freestanding_options
[12:42:00] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:42:00] [PASSED] drm_test_cmdline_panel_orientation
[12:42:00] ================ drm_test_cmdline_invalid =================
[12:42:00] [PASSED] margin_only
[12:42:00] [PASSED] interlace_only
[12:42:00] [PASSED] res_missing_x
[12:42:00] [PASSED] res_missing_y
[12:42:00] [PASSED] res_bad_y
[12:42:00] [PASSED] res_missing_y_bpp
[12:42:00] [PASSED] res_bad_bpp
[12:42:00] [PASSED] res_bad_refresh
[12:42:00] [PASSED] res_bpp_refresh_force_on_off
[12:42:00] [PASSED] res_invalid_mode
[12:42:00] [PASSED] res_bpp_wrong_place_mode
[12:42:00] [PASSED] name_bpp_refresh
[12:42:00] [PASSED] name_refresh
[12:42:00] [PASSED] name_refresh_wrong_mode
[12:42:00] [PASSED] name_refresh_invalid_mode
[12:42:00] [PASSED] rotate_multiple
[12:42:00] [PASSED] rotate_invalid_val
[12:42:00] [PASSED] rotate_truncated
[12:42:00] [PASSED] invalid_option
[12:42:00] [PASSED] invalid_tv_option
[12:42:00] [PASSED] truncated_tv_option
[12:42:00] ============ [PASSED] drm_test_cmdline_invalid =============
[12:42:00] =============== drm_test_cmdline_tv_options ===============
[12:42:00] [PASSED] NTSC
[12:42:00] [PASSED] NTSC_443
[12:42:00] [PASSED] NTSC_J
[12:42:00] [PASSED] PAL
[12:42:00] [PASSED] PAL_M
[12:42:00] [PASSED] PAL_N
[12:42:00] [PASSED] SECAM
[12:42:00] [PASSED] MONO_525
[12:42:00] [PASSED] MONO_625
[12:42:00] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:42:00] =============== [PASSED] drm_cmdline_parser ================
[12:42:00] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:42:00] [PASSED] drm_test_connector_hdmi_init_valid
[12:42:00] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:42:00] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:42:00] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:42:00] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:42:00] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:42:00] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:42:00] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:42:00] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:42:00] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:42:00] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:42:00] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:42:00] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:42:00] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:42:00] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:42:00] [PASSED] drm_test_connector_hdmi_init_null_product
[12:42:00] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:42:00] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:42:00] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:42:00] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:42:00] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:42:00] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:42:00] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:42:00] ========= drm_test_connector_hdmi_init_type_valid =========
[12:42:00] [PASSED] HDMI-A
[12:42:00] [PASSED] HDMI-B
[12:42:00] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:42:00] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:42:00] [PASSED] Unknown
[12:42:00] [PASSED] VGA
[12:42:00] [PASSED] DVI-I
[12:42:00] [PASSED] DVI-D
[12:42:00] [PASSED] DVI-A
[12:42:00] [PASSED] Composite
[12:42:00] [PASSED] SVIDEO
[12:42:00] [PASSED] LVDS
[12:42:00] [PASSED] Component
[12:42:00] [PASSED] DIN
[12:42:00] [PASSED] DP
[12:42:00] [PASSED] TV
[12:42:00] [PASSED] eDP
[12:42:00] [PASSED] Virtual
[12:42:00] [PASSED] DSI
[12:42:00] [PASSED] DPI
[12:42:00] [PASSED] Writeback
[12:42:00] [PASSED] SPI
[12:42:00] [PASSED] USB
[12:42:00] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:42:00] ============ [PASSED] drmm_connector_hdmi_init =============
[12:42:00] ============= drmm_connector_init (3 subtests) =============
[12:42:00] [PASSED] drm_test_drmm_connector_init
[12:42:00] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:42:00] ========= drm_test_drmm_connector_init_type_valid =========
[12:42:00] [PASSED] Unknown
[12:42:00] [PASSED] VGA
[12:42:00] [PASSED] DVI-I
[12:42:00] [PASSED] DVI-D
[12:42:00] [PASSED] DVI-A
[12:42:00] [PASSED] Composite
[12:42:00] [PASSED] SVIDEO
[12:42:00] [PASSED] LVDS
[12:42:00] [PASSED] Component
[12:42:00] [PASSED] DIN
[12:42:00] [PASSED] DP
[12:42:00] [PASSED] HDMI-A
[12:42:00] [PASSED] HDMI-B
[12:42:00] [PASSED] TV
[12:42:00] [PASSED] eDP
[12:42:00] [PASSED] Virtual
[12:42:00] [PASSED] DSI
[12:42:00] [PASSED] DPI
[12:42:00] [PASSED] Writeback
[12:42:00] [PASSED] SPI
[12:42:00] [PASSED] USB
[12:42:00] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:42:00] =============== [PASSED] drmm_connector_init ===============
[12:42:00] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_init
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:42:00] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:42:00] [PASSED] Unknown
[12:42:00] [PASSED] VGA
[12:42:00] [PASSED] DVI-I
[12:42:00] [PASSED] DVI-D
[12:42:00] [PASSED] DVI-A
[12:42:00] [PASSED] Composite
[12:42:00] [PASSED] SVIDEO
[12:42:00] [PASSED] LVDS
[12:42:00] [PASSED] Component
[12:42:00] [PASSED] DIN
[12:42:00] [PASSED] DP
[12:42:00] [PASSED] HDMI-A
[12:42:00] [PASSED] HDMI-B
[12:42:00] [PASSED] TV
[12:42:00] [PASSED] eDP
[12:42:00] [PASSED] Virtual
[12:42:00] [PASSED] DSI
[12:42:00] [PASSED] DPI
[12:42:00] [PASSED] Writeback
[12:42:00] [PASSED] SPI
[12:42:00] [PASSED] USB
[12:42:00] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:42:00] ======== drm_test_drm_connector_dynamic_init_name =========
[12:42:00] [PASSED] Unknown
[12:42:00] [PASSED] VGA
[12:42:00] [PASSED] DVI-I
[12:42:00] [PASSED] DVI-D
[12:42:00] [PASSED] DVI-A
[12:42:00] [PASSED] Composite
[12:42:00] [PASSED] SVIDEO
[12:42:00] [PASSED] LVDS
[12:42:00] [PASSED] Component
[12:42:00] [PASSED] DIN
[12:42:00] [PASSED] DP
[12:42:00] [PASSED] HDMI-A
[12:42:00] [PASSED] HDMI-B
[12:42:00] [PASSED] TV
[12:42:00] [PASSED] eDP
[12:42:00] [PASSED] Virtual
[12:42:00] [PASSED] DSI
[12:42:00] [PASSED] DPI
[12:42:00] [PASSED] Writeback
[12:42:00] [PASSED] SPI
[12:42:00] [PASSED] USB
[12:42:00] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:42:00] =========== [PASSED] drm_connector_dynamic_init ============
[12:42:00] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:42:00] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:42:00] ======= drm_connector_dynamic_register (7 subtests) ========
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:42:00] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:42:00] ========= [PASSED] drm_connector_dynamic_register ==========
[12:42:00] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:42:00] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:42:00] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:42:00] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:42:00] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:42:00] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:42:00] [PASSED] NTSC
[12:42:00] [PASSED] NTSC-443
[12:42:00] [PASSED] NTSC-J
[12:42:00] [PASSED] PAL
[12:42:00] [PASSED] PAL-M
[12:42:00] [PASSED] PAL-N
[12:42:00] [PASSED] SECAM
[12:42:00] [PASSED] Mono
[12:42:00] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:42:00] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:42:00] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:42:00] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:42:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:42:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:42:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:42:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:42:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:42:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:42:00] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:42:00] [PASSED] VIC 96
[12:42:00] [PASSED] VIC 97
[12:42:00] [PASSED] VIC 101
[12:42:00] [PASSED] VIC 102
[12:42:00] [PASSED] VIC 106
[12:42:00] [PASSED] VIC 107
[12:42:00] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:42:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:42:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:42:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:42:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:42:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:42:00] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:42:00] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:42:00] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:42:00] [PASSED] Automatic
[12:42:00] [PASSED] Full
[12:42:00] [PASSED] Limited 16:235
[12:42:00] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:42:00] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:42:00] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:42:00] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:42:00] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:42:00] [PASSED] RGB
[12:42:00] [PASSED] YUV 4:2:0
[12:42:00] [PASSED] YUV 4:2:2
[12:42:00] [PASSED] YUV 4:4:4
[12:42:00] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:42:00] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:42:00] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:42:00] ============= drm_damage_helper (21 subtests) ==============
[12:42:00] [PASSED] drm_test_damage_iter_no_damage
[12:42:00] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:42:00] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:42:00] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:42:00] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:42:00] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:42:00] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:42:00] [PASSED] drm_test_damage_iter_simple_damage
[12:42:00] [PASSED] drm_test_damage_iter_single_damage
[12:42:00] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:42:00] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:42:00] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:42:00] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:42:00] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:42:00] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:42:00] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:42:00] [PASSED] drm_test_damage_iter_damage
[12:42:00] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:42:00] [PASSED] drm_test_damage_iter_damage_one_outside
[12:42:00] [PASSED] drm_test_damage_iter_damage_src_moved
[12:42:00] [PASSED] drm_test_damage_iter_damage_not_visible
[12:42:00] ================ [PASSED] drm_damage_helper ================
[12:42:00] ============== drm_dp_mst_helper (3 subtests) ==============
[12:42:00] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:42:00] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:42:00] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:42:00] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:42:00] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:42:00] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:42:00] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:42:00] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:42:00] [PASSED] Link rate 2000000 lane count 4
[12:42:00] [PASSED] Link rate 2000000 lane count 2
[12:42:00] [PASSED] Link rate 2000000 lane count 1
[12:42:00] [PASSED] Link rate 1350000 lane count 4
[12:42:00] [PASSED] Link rate 1350000 lane count 2
[12:42:00] [PASSED] Link rate 1350000 lane count 1
[12:42:00] [PASSED] Link rate 1000000 lane count 4
[12:42:00] [PASSED] Link rate 1000000 lane count 2
[12:42:00] [PASSED] Link rate 1000000 lane count 1
[12:42:00] [PASSED] Link rate 810000 lane count 4
[12:42:00] [PASSED] Link rate 810000 lane count 2
[12:42:00] [PASSED] Link rate 810000 lane count 1
[12:42:00] [PASSED] Link rate 540000 lane count 4
[12:42:00] [PASSED] Link rate 540000 lane count 2
[12:42:00] [PASSED] Link rate 540000 lane count 1
[12:42:00] [PASSED] Link rate 270000 lane count 4
[12:42:00] [PASSED] Link rate 270000 lane count 2
[12:42:00] [PASSED] Link rate 270000 lane count 1
[12:42:00] [PASSED] Link rate 162000 lane count 4
[12:42:00] [PASSED] Link rate 162000 lane count 2
[12:42:00] [PASSED] Link rate 162000 lane count 1
[12:42:00] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:42:00] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:42:00] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:42:00] [PASSED] DP_POWER_UP_PHY with port number
[12:42:00] [PASSED] DP_POWER_DOWN_PHY with port number
[12:42:00] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:42:00] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:42:00] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:42:00] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:42:00] [PASSED] DP_QUERY_PAYLOAD with port number
[12:42:00] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:42:00] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:42:00] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:42:00] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:42:00] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:42:00] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:42:00] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:42:00] [PASSED] DP_REMOTE_I2C_READ with port number
[12:42:00] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:42:00] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:42:00] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:42:00] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:42:00] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:42:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:42:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:42:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:42:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:42:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:42:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:42:00] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:42:00] ================ [PASSED] drm_dp_mst_helper ================
[12:42:00] ================== drm_exec (7 subtests) ===================
[12:42:00] [PASSED] sanitycheck
[12:42:00] [PASSED] test_lock
[12:42:00] [PASSED] test_lock_unlock
[12:42:00] [PASSED] test_duplicates
[12:42:00] [PASSED] test_prepare
[12:42:00] [PASSED] test_prepare_array
[12:42:00] [PASSED] test_multiple_loops
[12:42:00] ==================== [PASSED] drm_exec =====================
[12:42:00] =========== drm_format_helper_test (17 subtests) ===========
[12:42:00] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:42:00] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:42:00] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:42:00] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:42:00] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:42:00] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:42:00] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:42:00] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:42:00] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:42:00] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:42:00] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:42:00] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:42:00] ==================== drm_test_fb_swab =====================
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ================ [PASSED] drm_test_fb_swab =================
[12:42:00] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:42:00] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:42:00] [PASSED] single_pixel_source_buffer
[12:42:00] [PASSED] single_pixel_clip_rectangle
[12:42:00] [PASSED] well_known_colors
[12:42:00] [PASSED] destination_pitch
[12:42:00] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:42:00] ================= drm_test_fb_clip_offset =================
[12:42:00] [PASSED] pass through
[12:42:00] [PASSED] horizontal offset
[12:42:00] [PASSED] vertical offset
[12:42:00] [PASSED] horizontal and vertical offset
[12:42:00] [PASSED] horizontal offset (custom pitch)
[12:42:00] [PASSED] vertical offset (custom pitch)
[12:42:00] [PASSED] horizontal and vertical offset (custom pitch)
[12:42:00] ============= [PASSED] drm_test_fb_clip_offset =============
[12:42:00] =================== drm_test_fb_memcpy ====================
[12:42:00] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:42:00] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:42:00] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:42:00] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:42:00] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:42:00] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:42:00] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:42:00] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:42:00] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:42:00] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:42:00] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:42:00] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:42:00] =============== [PASSED] drm_test_fb_memcpy ================
[12:42:00] ============= [PASSED] drm_format_helper_test ==============
[12:42:00] ================= drm_format (18 subtests) =================
[12:42:00] [PASSED] drm_test_format_block_width_invalid
[12:42:00] [PASSED] drm_test_format_block_width_one_plane
[12:42:00] [PASSED] drm_test_format_block_width_two_plane
[12:42:00] [PASSED] drm_test_format_block_width_three_plane
[12:42:00] [PASSED] drm_test_format_block_width_tiled
[12:42:00] [PASSED] drm_test_format_block_height_invalid
[12:42:00] [PASSED] drm_test_format_block_height_one_plane
[12:42:00] [PASSED] drm_test_format_block_height_two_plane
[12:42:00] [PASSED] drm_test_format_block_height_three_plane
[12:42:00] [PASSED] drm_test_format_block_height_tiled
[12:42:00] [PASSED] drm_test_format_min_pitch_invalid
[12:42:00] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:42:00] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:42:00] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:42:00] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:42:00] [PASSED] drm_test_format_min_pitch_two_plane
[12:42:00] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:42:00] [PASSED] drm_test_format_min_pitch_tiled
[12:42:00] =================== [PASSED] drm_format ====================
[12:42:00] ============== drm_framebuffer (10 subtests) ===============
[12:42:00] ========== drm_test_framebuffer_check_src_coords ==========
[12:42:00] [PASSED] Success: source fits into fb
[12:42:00] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:42:00] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:42:00] [PASSED] Fail: overflowing fb with source width
[12:42:00] [PASSED] Fail: overflowing fb with source height
[12:42:00] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:42:00] [PASSED] drm_test_framebuffer_cleanup
[12:42:00] =============== drm_test_framebuffer_create ===============
[12:42:00] [PASSED] ABGR8888 normal sizes
[12:42:00] [PASSED] ABGR8888 max sizes
[12:42:00] [PASSED] ABGR8888 pitch greater than min required
[12:42:00] [PASSED] ABGR8888 pitch less than min required
[12:42:00] [PASSED] ABGR8888 Invalid width
[12:42:00] [PASSED] ABGR8888 Invalid buffer handle
[12:42:00] [PASSED] No pixel format
[12:42:00] [PASSED] ABGR8888 Width 0
[12:42:00] [PASSED] ABGR8888 Height 0
[12:42:00] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:42:00] [PASSED] ABGR8888 Large buffer offset
[12:42:00] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:42:00] [PASSED] ABGR8888 Invalid flag
[12:42:00] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:42:00] [PASSED] ABGR8888 Valid buffer modifier
[12:42:00] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:42:00] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:42:00] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:42:00] [PASSED] NV12 Normal sizes
[12:42:00] [PASSED] NV12 Max sizes
[12:42:00] [PASSED] NV12 Invalid pitch
[12:42:00] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:42:00] [PASSED] NV12 different modifier per-plane
[12:42:00] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:42:00] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:42:00] [PASSED] NV12 Modifier for inexistent plane
[12:42:00] [PASSED] NV12 Handle for inexistent plane
[12:42:00] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:42:00] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:42:00] [PASSED] YVU420 Normal sizes
[12:42:00] [PASSED] YVU420 Max sizes
[12:42:00] [PASSED] YVU420 Invalid pitch
[12:42:00] [PASSED] YVU420 Different pitches
[12:42:00] [PASSED] YVU420 Different buffer offsets/pitches
[12:42:00] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:42:00] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:42:00] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:42:00] [PASSED] YVU420 Valid modifier
[12:42:00] [PASSED] YVU420 Different modifiers per plane
[12:42:00] [PASSED] YVU420 Modifier for inexistent plane
[12:42:00] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:42:00] [PASSED] X0L2 Normal sizes
[12:42:00] [PASSED] X0L2 Max sizes
[12:42:00] [PASSED] X0L2 Invalid pitch
[12:42:00] [PASSED] X0L2 Pitch greater than minimum required
[12:42:00] [PASSED] X0L2 Handle for inexistent plane
[12:42:00] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:42:00] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:42:00] [PASSED] X0L2 Valid modifier
[12:42:00] [PASSED] X0L2 Modifier for inexistent plane
[12:42:00] =========== [PASSED] drm_test_framebuffer_create ===========
[12:42:00] [PASSED] drm_test_framebuffer_free
[12:42:00] [PASSED] drm_test_framebuffer_init
[12:42:00] [PASSED] drm_test_framebuffer_init_bad_format
[12:42:00] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:42:00] [PASSED] drm_test_framebuffer_lookup
[12:42:00] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:42:00] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:42:00] ================= [PASSED] drm_framebuffer =================
[12:42:00] ================ drm_gem_shmem (8 subtests) ================
[12:42:00] [PASSED] drm_gem_shmem_test_obj_create
[12:42:00] [PASSED] drm_gem_shmem_test_obj_create_private
[12:42:00] [PASSED] drm_gem_shmem_test_pin_pages
[12:42:00] [PASSED] drm_gem_shmem_test_vmap
[12:42:00] [PASSED] drm_gem_shmem_test_get_sg_table
[12:42:00] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:42:00] [PASSED] drm_gem_shmem_test_madvise
[12:42:00] [PASSED] drm_gem_shmem_test_purge
[12:42:00] ================== [PASSED] drm_gem_shmem ==================
[12:42:00] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[12:42:00] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:42:00] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:42:00] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:42:00] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:42:00] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:42:00] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:42:00] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:42:00] [PASSED] Automatic
[12:42:00] [PASSED] Full
[12:42:00] [PASSED] Limited 16:235
[12:42:00] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:42:00] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:42:00] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:42:00] [PASSED] drm_test_check_disable_connector
[12:42:00] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:42:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:42:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:42:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:42:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:42:00] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:42:00] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:42:00] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:42:00] [PASSED] drm_test_check_output_bpc_dvi
[12:42:00] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:42:00] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:42:00] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:42:00] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:42:00] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:42:00] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:42:00] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:42:00] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:42:00] ============ drm_test_check_hdmi_color_format =============
[12:42:00] [PASSED] AUTO -> RGB
[12:42:00] [PASSED] YCBCR422 -> YUV422
[12:42:00] [PASSED] YCBCR420 -> YUV420
[12:42:00] [PASSED] YCBCR444 -> YUV444
[12:42:00] [PASSED] RGB -> RGB
[12:42:00] ======== [PASSED] drm_test_check_hdmi_color_format =========
[12:42:00] ======== drm_test_check_hdmi_color_format_420_only ========
[12:42:00] [PASSED] RGB should fail
[12:42:00] [PASSED] YUV444 should fail
[12:42:00] [PASSED] YUV422 should fail
[12:42:00] [PASSED] YUV420 should work
[12:42:00] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[12:42:00] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:42:00] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:42:00] [PASSED] drm_test_check_broadcast_rgb_value
[12:42:00] [PASSED] drm_test_check_bpc_8_value
[12:42:00] [PASSED] drm_test_check_bpc_10_value
[12:42:00] [PASSED] drm_test_check_bpc_12_value
[12:42:00] [PASSED] drm_test_check_format_value
[12:42:00] [PASSED] drm_test_check_tmds_char_value
[12:42:00] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:42:00] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[12:42:00] [PASSED] drm_test_check_mode_valid
[12:42:00] [PASSED] drm_test_check_mode_valid_reject
[12:42:00] [PASSED] drm_test_check_mode_valid_reject_rate
[12:42:00] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:42:00] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[12:42:00] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[12:42:00] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[12:42:00] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:42:00] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:42:00] [PASSED] drm_test_check_infoframes
[12:42:00] [PASSED] drm_test_check_reject_avi_infoframe
[12:42:00] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:42:00] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:42:00] [PASSED] drm_test_check_reject_audio_infoframe
[12:42:00] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:42:00] ================= drm_managed (2 subtests) =================
[12:42:00] [PASSED] drm_test_managed_release_action
[12:42:00] [PASSED] drm_test_managed_run_action
[12:42:00] =================== [PASSED] drm_managed ===================
[12:42:00] =================== drm_mm (6 subtests) ====================
[12:42:00] [PASSED] drm_test_mm_init
[12:42:00] [PASSED] drm_test_mm_debug
[12:42:00] [PASSED] drm_test_mm_align32
[12:42:00] [PASSED] drm_test_mm_align64
[12:42:00] [PASSED] drm_test_mm_lowest
[12:42:00] [PASSED] drm_test_mm_highest
[12:42:00] ===================== [PASSED] drm_mm ======================
[12:42:00] ============= drm_modes_analog_tv (5 subtests) =============
[12:42:00] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:42:00] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:42:00] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:42:00] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:42:00] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:42:00] =============== [PASSED] drm_modes_analog_tv ===============
[12:42:00] ============== drm_plane_helper (2 subtests) ===============
[12:42:00] =============== drm_test_check_plane_state ================
[12:42:00] [PASSED] clipping_simple
[12:42:00] [PASSED] clipping_rotate_reflect
[12:42:00] [PASSED] positioning_simple
[12:42:00] [PASSED] upscaling
[12:42:00] [PASSED] downscaling
[12:42:00] [PASSED] rounding1
[12:42:00] [PASSED] rounding2
[12:42:00] [PASSED] rounding3
[12:42:00] [PASSED] rounding4
[12:42:00] =========== [PASSED] drm_test_check_plane_state ============
[12:42:00] =========== drm_test_check_invalid_plane_state ============
[12:42:00] [PASSED] positioning_invalid
[12:42:00] [PASSED] upscaling_invalid
[12:42:00] [PASSED] downscaling_invalid
[12:42:00] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:42:00] ================ [PASSED] drm_plane_helper =================
[12:42:00] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:42:00] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:42:00] [PASSED] None
[12:42:00] [PASSED] PAL
[12:42:00] [PASSED] NTSC
[12:42:00] [PASSED] Both, NTSC Default
[12:42:00] [PASSED] Both, PAL Default
[12:42:00] [PASSED] Both, NTSC Default, with PAL on command-line
[12:42:00] [PASSED] Both, PAL Default, with NTSC on command-line
[12:42:00] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:42:00] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:42:00] ================== drm_rect (9 subtests) ===================
[12:42:00] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:42:00] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:42:00] [PASSED] drm_test_rect_clip_scaled_clipped
[12:42:00] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:42:00] ================= drm_test_rect_intersect =================
[12:42:00] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:42:00] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:42:00] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:42:00] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:42:00] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:42:00] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:42:00] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:42:00] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:42:00] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:42:00] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:42:00] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:42:00] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:42:00] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:42:00] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:42:00] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:42:00] ============= [PASSED] drm_test_rect_intersect =============
[12:42:00] ================ drm_test_rect_calc_hscale ================
[12:42:00] [PASSED] normal use
[12:42:00] [PASSED] out of max range
[12:42:00] [PASSED] out of min range
[12:42:00] [PASSED] zero dst
[12:42:00] [PASSED] negative src
[12:42:00] [PASSED] negative dst
[12:42:00] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:42:00] ================ drm_test_rect_calc_vscale ================
[12:42:00] [PASSED] normal use
[12:42:00] [PASSED] out of max range
[12:42:00] [PASSED] out of min range
[12:42:00] [PASSED] zero dst
[12:42:00] [PASSED] negative src
[12:42:00] [PASSED] negative dst
[12:42:00] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:42:00] ================== drm_test_rect_rotate ===================
[12:42:00] [PASSED] reflect-x
[12:42:00] [PASSED] reflect-y
[12:42:00] [PASSED] rotate-0
[12:42:00] [PASSED] rotate-90
[12:42:00] [PASSED] rotate-180
[12:42:00] [PASSED] rotate-270
[12:42:00] ============== [PASSED] drm_test_rect_rotate ===============
[12:42:00] ================ drm_test_rect_rotate_inv =================
[12:42:00] [PASSED] reflect-x
[12:42:00] [PASSED] reflect-y
[12:42:00] [PASSED] rotate-0
[12:42:00] [PASSED] rotate-90
[12:42:00] [PASSED] rotate-180
[12:42:00] [PASSED] rotate-270
[12:42:00] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:42:00] ==================== [PASSED] drm_rect =====================
[12:42:00] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:42:00] ============ drm_test_sysfb_build_fourcc_list =============
[12:42:00] [PASSED] no native formats
[12:42:00] [PASSED] XRGB8888 as native format
[12:42:00] [PASSED] remove duplicates
[12:42:00] [PASSED] convert alpha formats
[12:42:00] [PASSED] random formats
[12:42:00] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:42:00] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:42:00] ================== drm_fixp (2 subtests) ===================
[12:42:00] [PASSED] drm_test_int2fixp
[12:42:00] [PASSED] drm_test_sm2fixp
[12:42:00] ==================== [PASSED] drm_fixp =====================
[12:42:00] ============================================================
[12:42:00] Testing complete. Ran 637 tests: passed: 637
[12:42:00] Elapsed time: 26.610s total, 1.802s configuring, 24.591s building, 0.193s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:42:01] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:42:02] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:42:12] Starting KUnit Kernel (1/1)...
[12:42:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:42:12] ================= ttm_device (5 subtests) ==================
[12:42:12] [PASSED] ttm_device_init_basic
[12:42:12] [PASSED] ttm_device_init_multiple
[12:42:12] [PASSED] ttm_device_fini_basic
[12:42:12] [PASSED] ttm_device_init_no_vma_man
[12:42:12] ================== ttm_device_init_pools ==================
[12:42:12] [PASSED] No DMA allocations, no DMA32 required
[12:42:12] [PASSED] DMA allocations, DMA32 required
[12:42:12] [PASSED] No DMA allocations, DMA32 required
[12:42:12] [PASSED] DMA allocations, no DMA32 required
[12:42:12] ============== [PASSED] ttm_device_init_pools ==============
[12:42:12] =================== [PASSED] ttm_device ====================
[12:42:12] ================== ttm_pool (8 subtests) ===================
[12:42:12] ================== ttm_pool_alloc_basic ===================
[12:42:12] [PASSED] One page
[12:42:12] [PASSED] More than one page
[12:42:12] [PASSED] Above the allocation limit
[12:42:12] [PASSED] One page, with coherent DMA mappings enabled
[12:42:12] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:42:12] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:42:12] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:42:12] [PASSED] One page
[12:42:12] [PASSED] More than one page
[12:42:12] [PASSED] Above the allocation limit
[12:42:12] [PASSED] One page, with coherent DMA mappings enabled
[12:42:12] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:42:12] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:42:12] [PASSED] ttm_pool_alloc_order_caching_match
[12:42:12] [PASSED] ttm_pool_alloc_caching_mismatch
[12:42:12] [PASSED] ttm_pool_alloc_order_mismatch
[12:42:12] [PASSED] ttm_pool_free_dma_alloc
[12:42:12] [PASSED] ttm_pool_free_no_dma_alloc
[12:42:12] [PASSED] ttm_pool_fini_basic
[12:42:12] ==================== [PASSED] ttm_pool =====================
[12:42:12] ================ ttm_resource (8 subtests) =================
[12:42:12] ================= ttm_resource_init_basic =================
[12:42:12] [PASSED] Init resource in TTM_PL_SYSTEM
[12:42:12] [PASSED] Init resource in TTM_PL_VRAM
[12:42:12] [PASSED] Init resource in a private placement
[12:42:12] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:42:12] ============= [PASSED] ttm_resource_init_basic =============
[12:42:12] [PASSED] ttm_resource_init_pinned
[12:42:12] [PASSED] ttm_resource_fini_basic
[12:42:12] [PASSED] ttm_resource_manager_init_basic
[12:42:12] [PASSED] ttm_resource_manager_usage_basic
[12:42:12] [PASSED] ttm_resource_manager_set_used_basic
[12:42:12] [PASSED] ttm_sys_man_alloc_basic
[12:42:12] [PASSED] ttm_sys_man_free_basic
[12:42:12] ================== [PASSED] ttm_resource ===================
[12:42:12] =================== ttm_tt (15 subtests) ===================
[12:42:12] ==================== ttm_tt_init_basic ====================
[12:42:12] [PASSED] Page-aligned size
[12:42:12] [PASSED] Extra pages requested
[12:42:12] ================ [PASSED] ttm_tt_init_basic ================
[12:42:12] [PASSED] ttm_tt_init_misaligned
[12:42:12] [PASSED] ttm_tt_fini_basic
[12:42:12] [PASSED] ttm_tt_fini_sg
[12:42:12] [PASSED] ttm_tt_fini_shmem
[12:42:12] [PASSED] ttm_tt_create_basic
[12:42:12] [PASSED] ttm_tt_create_invalid_bo_type
[12:42:12] [PASSED] ttm_tt_create_ttm_exists
[12:42:12] [PASSED] ttm_tt_create_failed
[12:42:12] [PASSED] ttm_tt_destroy_basic
[12:42:12] [PASSED] ttm_tt_populate_null_ttm
[12:42:12] [PASSED] ttm_tt_populate_populated_ttm
[12:42:12] [PASSED] ttm_tt_unpopulate_basic
[12:42:12] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:42:12] [PASSED] ttm_tt_swapin_basic
[12:42:12] ===================== [PASSED] ttm_tt ======================
[12:42:12] =================== ttm_bo (14 subtests) ===================
[12:42:12] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:42:12] [PASSED] Cannot be interrupted and sleeps
[12:42:12] [PASSED] Cannot be interrupted, locks straight away
[12:42:12] [PASSED] Can be interrupted, sleeps
[12:42:12] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:42:12] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:42:12] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:42:12] [PASSED] ttm_bo_reserve_double_resv
[12:42:12] [PASSED] ttm_bo_reserve_interrupted
[12:42:12] [PASSED] ttm_bo_reserve_deadlock
[12:42:12] [PASSED] ttm_bo_unreserve_basic
[12:42:12] [PASSED] ttm_bo_unreserve_pinned
[12:42:12] [PASSED] ttm_bo_unreserve_bulk
[12:42:12] [PASSED] ttm_bo_fini_basic
[12:42:12] [PASSED] ttm_bo_fini_shared_resv
[12:42:12] [PASSED] ttm_bo_pin_basic
[12:42:12] [PASSED] ttm_bo_pin_unpin_resource
[12:42:12] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:42:12] ===================== [PASSED] ttm_bo ======================
[12:42:12] ============== ttm_bo_validate (22 subtests) ===============
[12:42:12] ============== ttm_bo_init_reserved_sys_man ===============
[12:42:12] [PASSED] Buffer object for userspace
[12:42:12] [PASSED] Kernel buffer object
[12:42:12] [PASSED] Shared buffer object
[12:42:12] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:42:12] ============== ttm_bo_init_reserved_mock_man ==============
[12:42:12] [PASSED] Buffer object for userspace
[12:42:12] [PASSED] Kernel buffer object
[12:42:12] [PASSED] Shared buffer object
[12:42:12] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:42:12] [PASSED] ttm_bo_init_reserved_resv
[12:42:12] ================== ttm_bo_validate_basic ==================
[12:42:12] [PASSED] Buffer object for userspace
[12:42:12] [PASSED] Kernel buffer object
[12:42:12] [PASSED] Shared buffer object
[12:42:12] ============== [PASSED] ttm_bo_validate_basic ==============
[12:42:12] [PASSED] ttm_bo_validate_invalid_placement
[12:42:12] ============= ttm_bo_validate_same_placement ==============
[12:42:12] [PASSED] System manager
[12:42:12] [PASSED] VRAM manager
[12:42:12] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:42:12] [PASSED] ttm_bo_validate_failed_alloc
[12:42:12] [PASSED] ttm_bo_validate_pinned
[12:42:12] [PASSED] ttm_bo_validate_busy_placement
[12:42:12] ================ ttm_bo_validate_multihop =================
[12:42:12] [PASSED] Buffer object for userspace
[12:42:12] [PASSED] Kernel buffer object
[12:42:12] [PASSED] Shared buffer object
[12:42:12] ============ [PASSED] ttm_bo_validate_multihop =============
[12:42:12] ========== ttm_bo_validate_no_placement_signaled ==========
[12:42:12] [PASSED] Buffer object in system domain, no page vector
[12:42:12] [PASSED] Buffer object in system domain with an existing page vector
[12:42:12] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:42:12] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:42:12] [PASSED] Buffer object for userspace
[12:42:12] [PASSED] Kernel buffer object
[12:42:12] [PASSED] Shared buffer object
[12:42:12] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:42:12] [PASSED] ttm_bo_validate_move_fence_signaled
[12:42:12] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:42:12] [PASSED] Waits for GPU
[12:42:12] [PASSED] Tries to lock straight away
[12:42:12] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:42:12] [PASSED] ttm_bo_validate_swapout
[12:42:12] [PASSED] ttm_bo_validate_happy_evict
[12:42:12] [PASSED] ttm_bo_validate_all_pinned_evict
[12:42:12] [PASSED] ttm_bo_validate_allowed_only_evict
[12:42:12] [PASSED] ttm_bo_validate_deleted_evict
[12:42:12] [PASSED] ttm_bo_validate_busy_domain_evict
[12:42:12] [PASSED] ttm_bo_validate_evict_gutting
[12:42:12] [PASSED] ttm_bo_validate_recrusive_evict
[12:42:12] ================= [PASSED] ttm_bo_validate =================
[12:42:12] ============================================================
[12:42:12] Testing complete. Ran 102 tests: passed: 102
[12:42:13] Elapsed time: 11.898s total, 1.774s configuring, 9.858s building, 0.227s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 2/4] drm/i915/3dlut: disable 3D LUT for pre-GLK
2026-08-03 21:49 ` [PATCH v2 2/4] drm/i915/3dlut: disable 3D LUT for pre-GLK Michał Grzelak
@ 2026-08-04 14:39 ` Borah, Chaitanya Kumar
0 siblings, 0 replies; 15+ messages in thread
From: Borah, Chaitanya Kumar @ 2026-08-04 14:39 UTC (permalink / raw)
To: Michał Grzelak, intel-gfx, intel-xe; +Cc: Jani Nikula, stable
On 8/4/2026 3:19 AM, Michał Grzelak wrote:
> GLK+ hardware supports 3D LUT. Disable the feature for pre-GLK
> platforms.
>
> Add .has_3dlut field into struct intel_display_runtime_info. Use the
> field to store whether 3D LUT is enabled. Initialize the field to 1 on
> GLK+.
>
> Add macro for checking 3D LUT's support. Use it while checking whether
> CRTC has 3D LUT enabled.
>
> v1->v2
> - use either runtime info flag or display version check (Jani)
> - don't initialize runtime info flag to 0 (Jani)
>
> Bspec: 15585
> Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Cc: <stable@vger.kernel.org>
> Fixes: 65db7a1f9cf7 ("drm/i915/color: Add 3D LUT to color pipeline")
I am not sure if you need the fixes tag for this patch because 3D LUT is
already gated on DISPLAY_VER(display) >= 12. More on it on Patch 3.
> Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_device.c | 5 +++++
> drivers/gpu/drm/i915/display/intel_display_device.h | 2 ++
> 3 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 87ced9f6ff40..ffdefb51a264 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -4258,6 +4258,9 @@ intel_color_load_plane_luts(struct intel_dsb *dsb,
> bool
> intel_color_crtc_has_3dlut(struct intel_display *display, enum pipe pipe)
> {
> + if (!HAS_3DLUT(display))
> + return false;
> +
> if (DISPLAY_VER(display) >= 12)
> return pipe == PIPE_A || pipe == PIPE_B;
> else
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index f17fc2c68472..4c09f35644ba 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -864,6 +864,7 @@ static const struct platform_desc glk_desc = {
> GLK_COLORS,
>
> .__runtime_defaults.ip.ver = 10,
> + .__runtime_defaults.has_3dlut = 1,
> },
> STEP_INFO(glk_steppings),
> };
> @@ -899,6 +900,7 @@ static const struct platform_desc glk_desc = {
> ICL_COLORS, \
> \
> .__runtime_defaults.ip.ver = 11, \
> + .__runtime_defaults.has_3dlut = 1, \
> .__runtime_defaults.has_dmc = 1, \
> .__runtime_defaults.has_dsc = 1, \
> .__runtime_defaults.has_hdcp = 1, \
> @@ -990,6 +992,7 @@ static const struct platform_desc ehl_desc = {
> ICL_COLORS, \
> \
> .__runtime_defaults.ip.ver = 12, \
> + .__runtime_defaults.has_3dlut = 1, \
> .__runtime_defaults.has_dmc = 1, \
> .__runtime_defaults.has_dsc = 1, \
> .__runtime_defaults.has_hdcp = 1, \
> @@ -1156,6 +1159,7 @@ static const struct platform_desc adl_s_desc = {
> TGL_CURSOR_OFFSETS, \
> \
> .__runtime_defaults.ip.ver = 13, \
> + .__runtime_defaults.has_3dlut = 1, \
> .__runtime_defaults.has_dmc = 1, \
> .__runtime_defaults.has_dsc = 1, \
> .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A), \
> @@ -1335,6 +1339,7 @@ static const struct platform_desc dg2_desc = {
> BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
> BIT(TRANSCODER_C) | BIT(TRANSCODER_D), \
> .__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A) | BIT(INTEL_FBC_B), \
> + .__runtime_defaults.has_3dlut = 1, \
> .__runtime_defaults.has_dmc = 1, \
> .__runtime_defaults.has_dsc = 1, \
> .__runtime_defaults.has_hdcp = 1, \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 7121e7cd9512..5300c6ab99e7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -147,6 +147,7 @@ struct intel_display_platforms {
>
> #define HAS_128B_Y_TILING(__display) (!(__display)->platform.i915g && !(__display)->platform.i915gm)
> #define HAS_2PPC(__display) (DISPLAY_VER(__display) >= 10)
> +#define HAS_3DLUT(__display) (DISPLAY_RUNTIME_INFO(__display)->has_3dlut)
> #define HAS_4TILE(__display) ((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
> #define HAS_ASYNC_FLIPS(__display) (DISPLAY_VER(__display) >= 5)
> #define HAS_AS_SDP(__display) (DISPLAY_VER(__display) >= 13)
> @@ -304,6 +305,7 @@ struct intel_display_runtime_info {
>
> u8 fbc_mask;
>
> + bool has_3dlut;
> bool has_hdcp;
> bool has_dmc;
> bool has_dsc;
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2 4/4] drm/i915/3dlut: disable 3D LUT if unsupported
2026-08-03 21:49 ` [PATCH v2 4/4] drm/i915/3dlut: disable 3D LUT if unsupported Michał Grzelak
@ 2026-08-04 14:39 ` Borah, Chaitanya Kumar
0 siblings, 0 replies; 15+ messages in thread
From: Borah, Chaitanya Kumar @ 2026-08-04 14:39 UTC (permalink / raw)
To: Michał Grzelak, intel-gfx, intel-xe; +Cc: Jani Nikula, stable
On 8/4/2026 3:19 AM, Michał Grzelak wrote:
> XE2LPD_DE_CAP_3DLUT_MASK is defined but never used.
>
> Check DE_CAP with the mask whether 3D LUT is disabled for LNL+. Reset
> has_3dlut if that is the case.
>
> Bspec: 71161
> Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Cc: <stable@vger.kernel.org>
> Fixes: 6d181a288e64 ("drm/i915/xe2lpd: update the dsc feature capability")
For this one you can actually add the Fixes tag with 65db7a1f9cf7
("drm/i915/color: Add 3D LUT to color pipeline"), because this would
make sense for NVL+ platforms where the CAP bit is used.
As for stable branches, you would need all the patches that adds the
infrastructure for has_3dlut to land together. Not sure what is the best
way to do it.
Other than that, changes makes sense.
> Signed-off-by: Michał Grzelak <michal.grzelak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_device.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_regs.h | 1 +
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index a2bea5ac59cf..d4e52e627b34 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1940,6 +1940,10 @@ static void __intel_display_device_info_runtime_init(struct intel_display *displ
> if (DISPLAY_VER(display) >= 20) {
> u32 cap = intel_de_read(display, XE2LPD_DE_CAP);
>
> + if (REG_FIELD_GET(XE2LPD_DE_CAP_3DLUT_MASK, cap) ==
> + XE2LPD_DE_CAP_3DLUT_REMOVED)
> + display_runtime->has_3dlut = 0;
> +
> if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) ==
> XE2LPD_DE_CAP_DSC_REMOVED)
> display_runtime->has_dsc = 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 740331ead20a..78b9e6008828 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -1773,6 +1773,7 @@
>
> #define XE2LPD_DE_CAP _MMIO(0x41100)
> #define XE2LPD_DE_CAP_3DLUT_MASK REG_GENMASK(31, 30)
> +#define XE2LPD_DE_CAP_3DLUT_REMOVED 1
> #define XE2LPD_DE_CAP_DSC_MASK REG_GENMASK(29, 28)
> #define XE2LPD_DE_CAP_DSC_REMOVED 1
> #define XE2LPD_DE_CAP_SCALER_MASK REG_GENMASK(27, 26)
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Xe.CI.BAT: failure for SKL_DSSM / DE_CAP fixes
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
` (6 preceding siblings ...)
2026-08-04 12:42 ` ✓ CI.KUnit: " Patchwork
@ 2026-08-05 6:00 ` Patchwork
2026-08-05 9:15 ` ✓ CI.KUnit: success for SKL_DSSM / DE_CAP fixes (rev2) Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-08-05 6:00 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 353 bytes --]
== Series Details ==
Series: SKL_DSSM / DE_CAP fixes
URL : https://patchwork.freedesktop.org/series/171533/
State : failure
== Summary ==
ERROR: The runconfig 'xe-5523-9a93ab75c5956f84bedf22b5bb3385ab9add0d12_BAT' does not exist in the database
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v1/index.html
[-- Attachment #2: Type: text/html, Size: 918 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ CI.KUnit: success for SKL_DSSM / DE_CAP fixes (rev2)
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
` (7 preceding siblings ...)
2026-08-05 6:00 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2026-08-05 9:15 ` Patchwork
2026-08-05 10:22 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-05 18:43 ` ✗ Xe.CI.FULL: failure " Patchwork
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-08-05 9:15 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
== Series Details ==
Series: SKL_DSSM / DE_CAP fixes (rev2)
URL : https://patchwork.freedesktop.org/series/171533/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:14:29] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:14:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:15:06] Starting KUnit Kernel (1/1)...
[09:15:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:15:06] ================== guc_buf (11 subtests) ===================
[09:15:06] [PASSED] test_smallest
[09:15:06] [PASSED] test_largest
[09:15:06] [PASSED] test_granular
[09:15:06] [PASSED] test_unique
[09:15:06] [PASSED] test_overlap
[09:15:06] [PASSED] test_reusable
[09:15:06] [PASSED] test_too_big
[09:15:06] [PASSED] test_flush
[09:15:06] [PASSED] test_lookup
[09:15:06] [PASSED] test_data
[09:15:06] [PASSED] test_class
[09:15:06] ===================== [PASSED] guc_buf =====================
[09:15:06] =================== guc_dbm (7 subtests) ===================
[09:15:06] [PASSED] test_empty
[09:15:06] [PASSED] test_default
[09:15:06] ======================== test_size ========================
[09:15:06] [PASSED] 4
[09:15:06] [PASSED] 8
[09:15:06] [PASSED] 32
[09:15:06] [PASSED] 256
[09:15:06] ==================== [PASSED] test_size ====================
[09:15:06] ======================= test_reuse ========================
[09:15:06] [PASSED] 4
[09:15:06] [PASSED] 8
[09:15:06] [PASSED] 32
[09:15:06] [PASSED] 256
[09:15:06] =================== [PASSED] test_reuse ====================
[09:15:06] =================== test_range_overlap ====================
[09:15:06] [PASSED] 4
[09:15:06] [PASSED] 8
[09:15:06] [PASSED] 32
[09:15:06] [PASSED] 256
[09:15:06] =============== [PASSED] test_range_overlap ================
[09:15:06] =================== test_range_compact ====================
[09:15:06] [PASSED] 4
[09:15:06] [PASSED] 8
[09:15:06] [PASSED] 32
[09:15:06] [PASSED] 256
[09:15:06] =============== [PASSED] test_range_compact ================
[09:15:06] ==================== test_range_spare =====================
[09:15:06] [PASSED] 4
[09:15:06] [PASSED] 8
[09:15:06] [PASSED] 32
[09:15:06] [PASSED] 256
[09:15:06] ================ [PASSED] test_range_spare =================
[09:15:06] ===================== [PASSED] guc_dbm =====================
[09:15:06] =================== guc_idm (6 subtests) ===================
[09:15:06] [PASSED] bad_init
[09:15:06] [PASSED] no_init
[09:15:06] [PASSED] init_fini
[09:15:06] [PASSED] check_used
[09:15:06] [PASSED] check_quota
[09:15:06] [PASSED] check_all
[09:15:06] ===================== [PASSED] guc_idm =====================
[09:15:06] =============== guc_klv_helpers (9 subtests) ===============
[09:15:06] [PASSED] test_count
[09:15:06] [PASSED] test_encode_u32
[09:15:06] [PASSED] test_encode_u64
[09:15:06] [PASSED] test_encode_string
[09:15:06] [PASSED] test_encode_object_raw
[09:15:06] [PASSED] test_encode_object_klv
[09:15:06] [PASSED] test_encode_object_nested
[09:15:06] [PASSED] test_encode_object_basic
[09:15:06] [PASSED] test_print
[09:15:06] ================= [PASSED] guc_klv_helpers =================
[09:15:06] ================== no_relay (3 subtests) ===================
[09:15:06] [PASSED] xe_drops_guc2pf_if_not_ready
[09:15:06] [PASSED] xe_drops_guc2vf_if_not_ready
[09:15:06] [PASSED] xe_rejects_send_if_not_ready
[09:15:06] ==================== [PASSED] no_relay =====================
[09:15:06] ================== pf_relay (14 subtests) ==================
[09:15:06] [PASSED] pf_rejects_guc2pf_too_short
[09:15:06] [PASSED] pf_rejects_guc2pf_too_long
[09:15:06] [PASSED] pf_rejects_guc2pf_no_payload
[09:15:06] [PASSED] pf_fails_no_payload
[09:15:06] [PASSED] pf_fails_bad_origin
[09:15:06] [PASSED] pf_fails_bad_type
[09:15:06] [PASSED] pf_txn_reports_error
[09:15:06] [PASSED] pf_txn_sends_pf2guc
[09:15:06] [PASSED] pf_sends_pf2guc
[09:15:06] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:15:06] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:15:06] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:15:06] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:15:06] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[09:15:06] ==================== [PASSED] pf_relay =====================
[09:15:06] ================== vf_relay (3 subtests) ===================
[09:15:06] [PASSED] vf_rejects_guc2vf_too_short
[09:15:06] [PASSED] vf_rejects_guc2vf_too_long
[09:15:06] [PASSED] vf_rejects_guc2vf_no_payload
[09:15:06] ==================== [PASSED] vf_relay =====================
[09:15:06] ================ pf_gt_config (9 subtests) =================
[09:15:06] [PASSED] fair_contexts_1vf
[09:15:06] [PASSED] fair_doorbells_1vf
[09:15:06] [PASSED] fair_ggtt_1vf
[09:15:06] ====================== fair_vram_1vf ======================
[09:15:06] [PASSED] 3.50 GiB
[09:15:06] [PASSED] 11.5 GiB
[09:15:06] [PASSED] 15.5 GiB
[09:15:06] [PASSED] 31.5 GiB
[09:15:06] [PASSED] 63.5 GiB
[09:15:06] [PASSED] 1.91 GiB
[09:15:06] ================== [PASSED] fair_vram_1vf ==================
[09:15:06] ================ fair_vram_1vf_admin_only =================
[09:15:06] [PASSED] 3.50 GiB
[09:15:06] [PASSED] 11.5 GiB
[09:15:06] [PASSED] 15.5 GiB
[09:15:06] [PASSED] 31.5 GiB
[09:15:06] [PASSED] 63.5 GiB
[09:15:06] [PASSED] 1.91 GiB
[09:15:06] ============ [PASSED] fair_vram_1vf_admin_only =============
[09:15:06] ====================== fair_contexts ======================
[09:15:06] [PASSED] 1 VF
[09:15:06] [PASSED] 2 VFs
[09:15:06] [PASSED] 3 VFs
[09:15:06] [PASSED] 4 VFs
[09:15:06] [PASSED] 5 VFs
[09:15:06] [PASSED] 6 VFs
[09:15:06] [PASSED] 7 VFs
[09:15:06] [PASSED] 8 VFs
[09:15:06] [PASSED] 9 VFs
[09:15:06] [PASSED] 10 VFs
[09:15:06] [PASSED] 11 VFs
[09:15:06] [PASSED] 12 VFs
[09:15:06] [PASSED] 13 VFs
[09:15:06] [PASSED] 14 VFs
[09:15:06] [PASSED] 15 VFs
[09:15:06] [PASSED] 16 VFs
[09:15:06] [PASSED] 17 VFs
[09:15:06] [PASSED] 18 VFs
[09:15:06] [PASSED] 19 VFs
[09:15:06] [PASSED] 20 VFs
[09:15:06] [PASSED] 21 VFs
[09:15:06] [PASSED] 22 VFs
[09:15:06] [PASSED] 23 VFs
[09:15:06] [PASSED] 24 VFs
[09:15:06] [PASSED] 25 VFs
[09:15:06] [PASSED] 26 VFs
[09:15:06] [PASSED] 27 VFs
[09:15:06] [PASSED] 28 VFs
[09:15:06] [PASSED] 29 VFs
[09:15:06] [PASSED] 30 VFs
[09:15:06] [PASSED] 31 VFs
[09:15:06] [PASSED] 32 VFs
[09:15:06] [PASSED] 33 VFs
[09:15:06] [PASSED] 34 VFs
[09:15:06] [PASSED] 35 VFs
[09:15:06] [PASSED] 36 VFs
[09:15:06] [PASSED] 37 VFs
[09:15:06] [PASSED] 38 VFs
[09:15:06] [PASSED] 39 VFs
[09:15:06] [PASSED] 40 VFs
[09:15:06] [PASSED] 41 VFs
[09:15:06] [PASSED] 42 VFs
[09:15:06] [PASSED] 43 VFs
[09:15:06] [PASSED] 44 VFs
[09:15:06] [PASSED] 45 VFs
[09:15:06] [PASSED] 46 VFs
[09:15:06] [PASSED] 47 VFs
[09:15:06] [PASSED] 48 VFs
[09:15:06] [PASSED] 49 VFs
[09:15:06] [PASSED] 50 VFs
[09:15:06] [PASSED] 51 VFs
[09:15:06] [PASSED] 52 VFs
[09:15:06] [PASSED] 53 VFs
[09:15:06] [PASSED] 54 VFs
[09:15:06] [PASSED] 55 VFs
[09:15:06] [PASSED] 56 VFs
[09:15:06] [PASSED] 57 VFs
[09:15:06] [PASSED] 58 VFs
[09:15:06] [PASSED] 59 VFs
[09:15:06] [PASSED] 60 VFs
[09:15:06] [PASSED] 61 VFs
[09:15:06] [PASSED] 62 VFs
[09:15:06] [PASSED] 63 VFs
[09:15:06] ================== [PASSED] fair_contexts ==================
[09:15:06] ===================== fair_doorbells ======================
[09:15:06] [PASSED] 1 VF
[09:15:06] [PASSED] 2 VFs
[09:15:06] [PASSED] 3 VFs
[09:15:06] [PASSED] 4 VFs
[09:15:06] [PASSED] 5 VFs
[09:15:06] [PASSED] 6 VFs
[09:15:06] [PASSED] 7 VFs
[09:15:06] [PASSED] 8 VFs
[09:15:06] [PASSED] 9 VFs
[09:15:06] [PASSED] 10 VFs
[09:15:06] [PASSED] 11 VFs
[09:15:06] [PASSED] 12 VFs
[09:15:06] [PASSED] 13 VFs
[09:15:06] [PASSED] 14 VFs
[09:15:06] [PASSED] 15 VFs
[09:15:06] [PASSED] 16 VFs
[09:15:06] [PASSED] 17 VFs
[09:15:06] [PASSED] 18 VFs
[09:15:06] [PASSED] 19 VFs
[09:15:06] [PASSED] 20 VFs
[09:15:06] [PASSED] 21 VFs
[09:15:06] [PASSED] 22 VFs
[09:15:06] [PASSED] 23 VFs
[09:15:06] [PASSED] 24 VFs
[09:15:06] [PASSED] 25 VFs
[09:15:06] [PASSED] 26 VFs
[09:15:06] [PASSED] 27 VFs
[09:15:06] [PASSED] 28 VFs
[09:15:06] [PASSED] 29 VFs
[09:15:06] [PASSED] 30 VFs
[09:15:06] [PASSED] 31 VFs
[09:15:06] [PASSED] 32 VFs
[09:15:06] [PASSED] 33 VFs
[09:15:06] [PASSED] 34 VFs
[09:15:06] [PASSED] 35 VFs
[09:15:06] [PASSED] 36 VFs
[09:15:06] [PASSED] 37 VFs
[09:15:06] [PASSED] 38 VFs
[09:15:06] [PASSED] 39 VFs
[09:15:06] [PASSED] 40 VFs
[09:15:06] [PASSED] 41 VFs
[09:15:06] [PASSED] 42 VFs
[09:15:06] [PASSED] 43 VFs
[09:15:06] [PASSED] 44 VFs
[09:15:06] [PASSED] 45 VFs
[09:15:06] [PASSED] 46 VFs
[09:15:06] [PASSED] 47 VFs
[09:15:06] [PASSED] 48 VFs
[09:15:06] [PASSED] 49 VFs
[09:15:06] [PASSED] 50 VFs
[09:15:06] [PASSED] 51 VFs
[09:15:06] [PASSED] 52 VFs
[09:15:06] [PASSED] 53 VFs
[09:15:06] [PASSED] 54 VFs
[09:15:06] [PASSED] 55 VFs
[09:15:06] [PASSED] 56 VFs
[09:15:06] [PASSED] 57 VFs
[09:15:06] [PASSED] 58 VFs
[09:15:06] [PASSED] 59 VFs
[09:15:06] [PASSED] 60 VFs
[09:15:06] [PASSED] 61 VFs
[09:15:06] [PASSED] 62 VFs
[09:15:06] [PASSED] 63 VFs
[09:15:06] ================= [PASSED] fair_doorbells ==================
[09:15:06] ======================== fair_ggtt ========================
[09:15:06] [PASSED] 1 VF
[09:15:06] [PASSED] 2 VFs
[09:15:06] [PASSED] 3 VFs
[09:15:06] [PASSED] 4 VFs
[09:15:06] [PASSED] 5 VFs
[09:15:06] [PASSED] 6 VFs
[09:15:06] [PASSED] 7 VFs
[09:15:06] [PASSED] 8 VFs
[09:15:06] [PASSED] 9 VFs
[09:15:06] [PASSED] 10 VFs
[09:15:06] [PASSED] 11 VFs
[09:15:06] [PASSED] 12 VFs
[09:15:06] [PASSED] 13 VFs
[09:15:06] [PASSED] 14 VFs
[09:15:06] [PASSED] 15 VFs
[09:15:06] [PASSED] 16 VFs
[09:15:06] [PASSED] 17 VFs
[09:15:06] [PASSED] 18 VFs
[09:15:06] [PASSED] 19 VFs
[09:15:06] [PASSED] 20 VFs
[09:15:06] [PASSED] 21 VFs
[09:15:06] [PASSED] 22 VFs
[09:15:06] [PASSED] 23 VFs
[09:15:06] [PASSED] 24 VFs
[09:15:06] [PASSED] 25 VFs
[09:15:06] [PASSED] 26 VFs
[09:15:06] [PASSED] 27 VFs
[09:15:06] [PASSED] 28 VFs
[09:15:06] [PASSED] 29 VFs
[09:15:06] [PASSED] 30 VFs
[09:15:06] [PASSED] 31 VFs
[09:15:06] [PASSED] 32 VFs
[09:15:06] [PASSED] 33 VFs
[09:15:06] [PASSED] 34 VFs
[09:15:06] [PASSED] 35 VFs
[09:15:06] [PASSED] 36 VFs
[09:15:06] [PASSED] 37 VFs
[09:15:06] [PASSED] 38 VFs
[09:15:06] [PASSED] 39 VFs
[09:15:06] [PASSED] 40 VFs
[09:15:06] [PASSED] 41 VFs
[09:15:06] [PASSED] 42 VFs
[09:15:06] [PASSED] 43 VFs
[09:15:06] [PASSED] 44 VFs
[09:15:06] [PASSED] 45 VFs
[09:15:06] [PASSED] 46 VFs
[09:15:06] [PASSED] 47 VFs
[09:15:06] [PASSED] 48 VFs
[09:15:06] [PASSED] 49 VFs
[09:15:06] [PASSED] 50 VFs
[09:15:06] [PASSED] 51 VFs
[09:15:06] [PASSED] 52 VFs
[09:15:06] [PASSED] 53 VFs
[09:15:06] [PASSED] 54 VFs
[09:15:06] [PASSED] 55 VFs
[09:15:06] [PASSED] 56 VFs
[09:15:06] [PASSED] 57 VFs
[09:15:06] [PASSED] 58 VFs
[09:15:06] [PASSED] 59 VFs
[09:15:06] [PASSED] 60 VFs
[09:15:06] [PASSED] 61 VFs
[09:15:06] [PASSED] 62 VFs
[09:15:06] [PASSED] 63 VFs
[09:15:06] ==================== [PASSED] fair_ggtt ====================
[09:15:06] ======================== fair_vram ========================
[09:15:06] [PASSED] 1 VF
[09:15:06] [PASSED] 2 VFs
[09:15:06] [PASSED] 3 VFs
[09:15:06] [PASSED] 4 VFs
[09:15:06] [PASSED] 5 VFs
[09:15:06] [PASSED] 6 VFs
[09:15:06] [PASSED] 7 VFs
[09:15:06] [PASSED] 8 VFs
[09:15:06] [PASSED] 9 VFs
[09:15:06] [PASSED] 10 VFs
[09:15:06] [PASSED] 11 VFs
[09:15:06] [PASSED] 12 VFs
[09:15:06] [PASSED] 13 VFs
[09:15:06] [PASSED] 14 VFs
[09:15:06] [PASSED] 15 VFs
[09:15:06] [PASSED] 16 VFs
[09:15:06] [PASSED] 17 VFs
[09:15:06] [PASSED] 18 VFs
[09:15:06] [PASSED] 19 VFs
[09:15:06] [PASSED] 20 VFs
[09:15:06] [PASSED] 21 VFs
[09:15:06] [PASSED] 22 VFs
[09:15:06] [PASSED] 23 VFs
[09:15:06] [PASSED] 24 VFs
[09:15:06] [PASSED] 25 VFs
[09:15:06] [PASSED] 26 VFs
[09:15:06] [PASSED] 27 VFs
[09:15:06] [PASSED] 28 VFs
[09:15:06] [PASSED] 29 VFs
[09:15:06] [PASSED] 30 VFs
[09:15:06] [PASSED] 31 VFs
[09:15:06] [PASSED] 32 VFs
[09:15:06] [PASSED] 33 VFs
[09:15:06] [PASSED] 34 VFs
[09:15:06] [PASSED] 35 VFs
[09:15:06] [PASSED] 36 VFs
[09:15:06] [PASSED] 37 VFs
[09:15:06] [PASSED] 38 VFs
[09:15:06] [PASSED] 39 VFs
[09:15:06] [PASSED] 40 VFs
[09:15:06] [PASSED] 41 VFs
[09:15:06] [PASSED] 42 VFs
[09:15:06] [PASSED] 43 VFs
[09:15:06] [PASSED] 44 VFs
[09:15:06] [PASSED] 45 VFs
[09:15:06] [PASSED] 46 VFs
[09:15:06] [PASSED] 47 VFs
[09:15:06] [PASSED] 48 VFs
[09:15:06] [PASSED] 49 VFs
[09:15:06] [PASSED] 50 VFs
[09:15:06] [PASSED] 51 VFs
[09:15:06] [PASSED] 52 VFs
[09:15:06] [PASSED] 53 VFs
[09:15:06] [PASSED] 54 VFs
[09:15:06] [PASSED] 55 VFs
[09:15:06] [PASSED] 56 VFs
[09:15:06] [PASSED] 57 VFs
[09:15:06] [PASSED] 58 VFs
[09:15:06] [PASSED] 59 VFs
[09:15:06] [PASSED] 60 VFs
[09:15:06] [PASSED] 61 VFs
[09:15:06] [PASSED] 62 VFs
[09:15:06] [PASSED] 63 VFs
[09:15:06] ==================== [PASSED] fair_vram ====================
[09:15:06] ================== [PASSED] pf_gt_config ===================
[09:15:06] ===================== lmtt (1 subtest) =====================
[09:15:06] ======================== test_ops =========================
[09:15:06] [PASSED] 2-level
[09:15:06] [PASSED] multi-level
[09:15:06] ==================== [PASSED] test_ops =====================
[09:15:06] ====================== [PASSED] lmtt =======================
[09:15:06] ================= sriov_packet (1 subtest) =================
[09:15:06] [PASSED] test_descriptor_init
[09:15:06] ================== [PASSED] sriov_packet ===================
[09:15:06] ================= pf_service (11 subtests) =================
[09:15:06] [PASSED] pf_negotiate_any
[09:15:06] [PASSED] pf_negotiate_base_match
[09:15:06] [PASSED] pf_negotiate_base_newer
[09:15:06] [PASSED] pf_negotiate_base_next
[09:15:06] [SKIPPED] pf_negotiate_base_older (no older minor)
[09:15:06] [PASSED] pf_negotiate_base_prev
[09:15:06] [PASSED] pf_negotiate_latest_match
[09:15:06] [PASSED] pf_negotiate_latest_newer
[09:15:06] [PASSED] pf_negotiate_latest_next
[09:15:06] [SKIPPED] pf_negotiate_latest_older (no older minor)
[09:15:06] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[09:15:06] =================== [PASSED] pf_service ====================
[09:15:06] ================= xe_guc_g2g (2 subtests) ==================
[09:15:06] ============== xe_live_guc_g2g_kunit_default ==============
[09:15:06] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:15:06] ============== xe_live_guc_g2g_kunit_allmem ===============
[09:15:06] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:15:06] =================== [SKIPPED] xe_guc_g2g ===================
[09:15:06] =================== xe_mocs (2 subtests) ===================
[09:15:06] ================ xe_live_mocs_kernel_kunit ================
[09:15:06] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:15:06] ================ xe_live_mocs_reset_kunit =================
[09:15:06] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:15:06] ==================== [SKIPPED] xe_mocs =====================
[09:15:06] ================= xe_migrate (2 subtests) ==================
[09:15:06] ================= xe_migrate_sanity_kunit =================
[09:15:06] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:15:06] ================== xe_validate_ccs_kunit ==================
[09:15:06] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:15:06] =================== [SKIPPED] xe_migrate ===================
[09:15:06] ================== xe_dma_buf (1 subtest) ==================
[09:15:06] ==================== xe_dma_buf_kunit =====================
[09:15:06] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:15:06] =================== [SKIPPED] xe_dma_buf ===================
[09:15:06] ================= xe_bo_shrink (1 subtest) =================
[09:15:06] =================== xe_bo_shrink_kunit ====================
[09:15:06] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:15:06] ================== [SKIPPED] xe_bo_shrink ==================
[09:15:06] ==================== xe_bo (2 subtests) ====================
[09:15:06] ================== xe_ccs_migrate_kunit ===================
[09:15:06] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:15:06] ==================== xe_bo_evict_kunit ====================
[09:15:06] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:15:06] ===================== [SKIPPED] xe_bo ======================
[09:15:06] ==================== args (13 subtests) ====================
[09:15:06] [PASSED] count_args_test
[09:15:06] [PASSED] call_args_example
[09:15:06] [PASSED] call_args_test
[09:15:06] [PASSED] drop_first_arg_example
[09:15:06] [PASSED] drop_first_arg_test
[09:15:06] [PASSED] first_arg_example
[09:15:06] [PASSED] first_arg_test
[09:15:06] [PASSED] last_arg_example
[09:15:06] [PASSED] last_arg_test
[09:15:06] [PASSED] pick_arg_example
[09:15:06] [PASSED] if_args_example
[09:15:06] [PASSED] if_args_test
[09:15:06] [PASSED] sep_comma_example
[09:15:06] ====================== [PASSED] args =======================
[09:15:06] =================== xe_pci (3 subtests) ====================
[09:15:06] ==================== check_graphics_ip ====================
[09:15:06] [PASSED] 12.00 Xe_LP
[09:15:06] [PASSED] 12.10 Xe_LP+
[09:15:06] [PASSED] 12.55 Xe_HPG
[09:15:06] [PASSED] 12.60 Xe_HPC
[09:15:06] [PASSED] 12.70 Xe_LPG
[09:15:06] [PASSED] 12.71 Xe_LPG
[09:15:06] [PASSED] 12.74 Xe_LPG+
[09:15:06] [PASSED] 20.01 Xe2_HPG
[09:15:06] [PASSED] 20.02 Xe2_HPG
[09:15:06] [PASSED] 20.04 Xe2_LPG
[09:15:06] [PASSED] 30.00 Xe3_LPG
[09:15:06] [PASSED] 30.01 Xe3_LPG
[09:15:06] [PASSED] 30.03 Xe3_LPG
[09:15:06] [PASSED] 30.04 Xe3_LPG
[09:15:06] [PASSED] 30.05 Xe3_LPG
[09:15:06] [PASSED] 35.10 Xe3p_LPG
[09:15:06] [PASSED] 35.11 Xe3p_XPC
[09:15:06] ================ [PASSED] check_graphics_ip ================
[09:15:06] ===================== check_media_ip ======================
[09:15:06] [PASSED] 12.00 Xe_M
[09:15:06] [PASSED] 12.55 Xe_HPM
[09:15:06] [PASSED] 13.00 Xe_LPM+
[09:15:06] [PASSED] 13.01 Xe2_HPM
[09:15:06] [PASSED] 20.00 Xe2_LPM
[09:15:06] [PASSED] 30.00 Xe3_LPM
[09:15:06] [PASSED] 30.02 Xe3_LPM
[09:15:06] [PASSED] 35.00 Xe3p_LPM
[09:15:06] [PASSED] 35.03 Xe3p_HPM
[09:15:06] ================= [PASSED] check_media_ip ==================
[09:15:06] =================== check_platform_desc ===================
[09:15:06] [PASSED] 0x9A60 (TIGERLAKE)
[09:15:06] [PASSED] 0x9A68 (TIGERLAKE)
[09:15:06] [PASSED] 0x9A70 (TIGERLAKE)
[09:15:06] [PASSED] 0x9A40 (TIGERLAKE)
[09:15:06] [PASSED] 0x9A49 (TIGERLAKE)
[09:15:06] [PASSED] 0x9A59 (TIGERLAKE)
[09:15:06] [PASSED] 0x9A78 (TIGERLAKE)
[09:15:06] [PASSED] 0x9AC0 (TIGERLAKE)
[09:15:06] [PASSED] 0x9AC9 (TIGERLAKE)
[09:15:06] [PASSED] 0x9AD9 (TIGERLAKE)
[09:15:06] [PASSED] 0x9AF8 (TIGERLAKE)
[09:15:06] [PASSED] 0x4C80 (ROCKETLAKE)
[09:15:06] [PASSED] 0x4C8A (ROCKETLAKE)
[09:15:06] [PASSED] 0x4C8B (ROCKETLAKE)
[09:15:06] [PASSED] 0x4C8C (ROCKETLAKE)
[09:15:06] [PASSED] 0x4C90 (ROCKETLAKE)
[09:15:06] [PASSED] 0x4C9A (ROCKETLAKE)
[09:15:06] [PASSED] 0x4680 (ALDERLAKE_S)
[09:15:06] [PASSED] 0x4682 (ALDERLAKE_S)
[09:15:06] [PASSED] 0x4688 (ALDERLAKE_S)
[09:15:06] [PASSED] 0x468A (ALDERLAKE_S)
[09:15:06] [PASSED] 0x468B (ALDERLAKE_S)
[09:15:06] [PASSED] 0x4690 (ALDERLAKE_S)
[09:15:06] [PASSED] 0x4692 (ALDERLAKE_S)
[09:15:06] [PASSED] 0x4693 (ALDERLAKE_S)
[09:15:06] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46AA (ALDERLAKE_P)
[09:15:06] [PASSED] 0x462A (ALDERLAKE_P)
[09:15:06] [PASSED] 0x4626 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x4628 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:15:06] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:15:06] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:15:06] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:15:06] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:15:06] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:15:06] [PASSED] 0xA721 (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA720 (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:15:06] [PASSED] 0xA780 (ALDERLAKE_S)
[09:15:06] [PASSED] 0xA781 (ALDERLAKE_S)
[09:15:06] [PASSED] 0xA782 (ALDERLAKE_S)
[09:15:06] [PASSED] 0xA783 (ALDERLAKE_S)
[09:15:06] [PASSED] 0xA788 (ALDERLAKE_S)
[09:15:06] [PASSED] 0xA789 (ALDERLAKE_S)
[09:15:06] [PASSED] 0xA78A (ALDERLAKE_S)
[09:15:06] [PASSED] 0xA78B (ALDERLAKE_S)
[09:15:06] [PASSED] 0x4905 (DG1)
[09:15:06] [PASSED] 0x4906 (DG1)
[09:15:06] [PASSED] 0x4907 (DG1)
[09:15:06] [PASSED] 0x4908 (DG1)
[09:15:06] [PASSED] 0x4909 (DG1)
[09:15:06] [PASSED] 0x56C0 (DG2)
[09:15:06] [PASSED] 0x56C2 (DG2)
[09:15:06] [PASSED] 0x56C1 (DG2)
[09:15:06] [PASSED] 0x7D51 (METEORLAKE)
[09:15:06] [PASSED] 0x7DD1 (METEORLAKE)
[09:15:06] [PASSED] 0x7D41 (METEORLAKE)
[09:15:06] [PASSED] 0x7D67 (METEORLAKE)
[09:15:06] [PASSED] 0xB640 (METEORLAKE)
[09:15:06] [PASSED] 0x56A0 (DG2)
[09:15:06] [PASSED] 0x56A1 (DG2)
[09:15:06] [PASSED] 0x56A2 (DG2)
[09:15:06] [PASSED] 0x56BE (DG2)
[09:15:06] [PASSED] 0x56BF (DG2)
[09:15:06] [PASSED] 0x5690 (DG2)
[09:15:06] [PASSED] 0x5691 (DG2)
[09:15:06] [PASSED] 0x5692 (DG2)
[09:15:06] [PASSED] 0x56A5 (DG2)
[09:15:06] [PASSED] 0x56A6 (DG2)
[09:15:06] [PASSED] 0x56B0 (DG2)
[09:15:06] [PASSED] 0x56B1 (DG2)
[09:15:06] [PASSED] 0x56BA (DG2)
[09:15:06] [PASSED] 0x56BB (DG2)
[09:15:06] [PASSED] 0x56BC (DG2)
[09:15:06] [PASSED] 0x56BD (DG2)
[09:15:06] [PASSED] 0x5693 (DG2)
[09:15:06] [PASSED] 0x5694 (DG2)
[09:15:06] [PASSED] 0x5695 (DG2)
[09:15:06] [PASSED] 0x56A3 (DG2)
[09:15:06] [PASSED] 0x56A4 (DG2)
[09:15:06] [PASSED] 0x56B2 (DG2)
[09:15:06] [PASSED] 0x56B3 (DG2)
[09:15:06] [PASSED] 0x5696 (DG2)
[09:15:06] [PASSED] 0x5697 (DG2)
[09:15:06] [PASSED] 0xB69 (PVC)
[09:15:06] [PASSED] 0xB6E (PVC)
[09:15:06] [PASSED] 0xBD4 (PVC)
[09:15:06] [PASSED] 0xBD5 (PVC)
[09:15:06] [PASSED] 0xBD6 (PVC)
[09:15:06] [PASSED] 0xBD7 (PVC)
[09:15:06] [PASSED] 0xBD8 (PVC)
[09:15:06] [PASSED] 0xBD9 (PVC)
[09:15:06] [PASSED] 0xBDA (PVC)
[09:15:06] [PASSED] 0xBDB (PVC)
[09:15:06] [PASSED] 0xBE0 (PVC)
[09:15:06] [PASSED] 0xBE1 (PVC)
[09:15:06] [PASSED] 0xBE5 (PVC)
[09:15:06] [PASSED] 0x7D40 (METEORLAKE)
[09:15:06] [PASSED] 0x7D45 (METEORLAKE)
[09:15:06] [PASSED] 0x7D55 (METEORLAKE)
[09:15:06] [PASSED] 0x7D60 (METEORLAKE)
[09:15:06] [PASSED] 0x7DD5 (METEORLAKE)
[09:15:06] [PASSED] 0x6420 (LUNARLAKE)
[09:15:06] [PASSED] 0x64A0 (LUNARLAKE)
[09:15:06] [PASSED] 0x64B0 (LUNARLAKE)
[09:15:06] [PASSED] 0xE202 (BATTLEMAGE)
[09:15:06] [PASSED] 0xE209 (BATTLEMAGE)
[09:15:06] [PASSED] 0xE20B (BATTLEMAGE)
[09:15:06] [PASSED] 0xE20C (BATTLEMAGE)
[09:15:06] [PASSED] 0xE20D (BATTLEMAGE)
[09:15:06] [PASSED] 0xE210 (BATTLEMAGE)
[09:15:06] [PASSED] 0xE211 (BATTLEMAGE)
[09:15:06] [PASSED] 0xE212 (BATTLEMAGE)
[09:15:06] [PASSED] 0xE216 (BATTLEMAGE)
[09:15:06] [PASSED] 0xE220 (BATTLEMAGE)
[09:15:06] [PASSED] 0xE221 (BATTLEMAGE)
[09:15:06] [PASSED] 0xE222 (BATTLEMAGE)
[09:15:06] [PASSED] 0xE223 (BATTLEMAGE)
[09:15:06] [PASSED] 0xB080 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB081 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB082 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB083 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB084 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB085 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB086 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB087 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB08F (PANTHERLAKE)
[09:15:06] [PASSED] 0xB090 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:15:06] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:15:06] [PASSED] 0xFD80 (PANTHERLAKE)
[09:15:06] [PASSED] 0xFD81 (PANTHERLAKE)
[09:15:06] [PASSED] 0xD740 (NOVALAKE_S)
[09:15:06] [PASSED] 0xD741 (NOVALAKE_S)
[09:15:06] [PASSED] 0xD742 (NOVALAKE_S)
[09:15:06] [PASSED] 0xD743 (NOVALAKE_S)
[09:15:06] [PASSED] 0xD745 (NOVALAKE_S)
[09:15:06] [PASSED] 0xD74A (NOVALAKE_S)
[09:15:06] [PASSED] 0xD74B (NOVALAKE_S)
[09:15:06] [PASSED] 0x674C (CRESCENTISLAND)
[09:15:06] [PASSED] 0x674D (CRESCENTISLAND)
[09:15:06] [PASSED] 0x674E (CRESCENTISLAND)
[09:15:06] [PASSED] 0x674F (CRESCENTISLAND)
[09:15:06] [PASSED] 0x6750 (CRESCENTISLAND)
[09:15:06] [PASSED] 0xD750 (NOVALAKE_P)
[09:15:06] [PASSED] 0xD751 (NOVALAKE_P)
[09:15:06] [PASSED] 0xD752 (NOVALAKE_P)
[09:15:06] [PASSED] 0xD753 (NOVALAKE_P)
[09:15:06] [PASSED] 0xD754 (NOVALAKE_P)
[09:15:06] [PASSED] 0xD755 (NOVALAKE_P)
[09:15:06] [PASSED] 0xD756 (NOVALAKE_P)
[09:15:06] [PASSED] 0xD757 (NOVALAKE_P)
[09:15:06] [PASSED] 0xD75F (NOVALAKE_P)
[09:15:06] =============== [PASSED] check_platform_desc ===============
[09:15:06] ===================== [PASSED] xe_pci ======================
[09:15:06] ============= xe_rtp_tables_test (5 subtests) ==============
[09:15:06] ================== xe_rtp_table_gt_test ===================
[09:15:06] [PASSED] gt_was/14011060649
[09:15:06] [PASSED] gt_was/14011059788
[09:15:06] [PASSED] gt_was/14015795083
[09:15:06] [PASSED] gt_was/16021867713
[09:15:06] [PASSED] gt_was/14019449301
[09:15:06] [PASSED] gt_was/16028005424
[09:15:06] [PASSED] gt_was/14026578760
[09:15:06] [PASSED] gt_was/1409420604
[09:15:06] [PASSED] gt_was/1408615072
[09:15:06] [PASSED] gt_was/22010523718
[09:15:06] [PASSED] gt_was/14011006942
[09:15:06] [PASSED] gt_was/14014830051
[09:15:06] [PASSED] gt_was/18018781329
[09:15:06] [PASSED] gt_was/1509235366
[09:15:06] [PASSED] gt_was/18018781329
[09:15:06] [PASSED] gt_was/16016694945
[09:15:06] [PASSED] gt_was/14018575942
[09:15:06] [PASSED] gt_was/22016670082
[09:15:06] [PASSED] gt_was/22016670082
[09:15:06] [PASSED] gt_was/14017421178
[09:15:06] [PASSED] gt_was/16025250150
[09:15:06] [PASSED] gt_was/14021871409
[09:15:06] [PASSED] gt_was/16021865536
[09:15:06] [PASSED] gt_was/14021486841
[09:15:06] [PASSED] gt_was/14025160223
[09:15:06] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[09:15:06] [PASSED] gt_was/14025635424
[09:15:06] [PASSED] gt_was/16028005424
[09:15:06] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:15:06] ================== xe_rtp_table_gt_test ===================
[09:15:06] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[09:15:06] [PASSED] gt_tunings/Tuning: 32B Access Enable
[09:15:06] [PASSED] gt_tunings/Tuning: L3 cache
[09:15:06] [PASSED] gt_tunings/Tuning: L3 cache - media
[09:15:06] [PASSED] gt_tunings/Tuning: Compression Overfetch
[09:15:06] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[09:15:06] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[09:15:06] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[09:15:06] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[09:15:06] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[09:15:06] [PASSED] gt_tunings/Tuning: Stateless compression control
[09:15:06] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[09:15:06] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[09:15:06] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[09:15:06] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[09:15:06] ============== [PASSED] xe_rtp_table_gt_test ===============
[09:15:06] ================== xe_rtp_table_oob_test ==================
[09:15:06] [PASSED] oob_was/1607983814
[09:15:06] [PASSED] oob_was/16010904313
[09:15:06] [PASSED] oob_was/18022495364
[09:15:06] [PASSED] oob_was/22012773006
[09:15:06] [PASSED] oob_was/14014475959
[09:15:06] [PASSED] oob_was/22011391025
[09:15:06] [PASSED] oob_was/22012727170
[09:15:06] [PASSED] oob_was/22012727685
[09:15:06] [PASSED] oob_was/22016596838
[09:15:06] [PASSED] oob_was/18020744125
[09:15:06] [PASSED] oob_was/1409600907
[09:15:06] [PASSED] oob_was/22014953428
[09:15:06] [PASSED] oob_was/16017236439
[09:15:06] [PASSED] oob_was/14019821291
[09:15:06] [PASSED] oob_was/14015076503
[09:15:06] [PASSED] oob_was/14018913170
[09:15:06] [PASSED] oob_was/14018094691
[09:15:06] [PASSED] oob_was/18024947630
[09:15:06] [PASSED] oob_was/16022287689
[09:15:06] [PASSED] oob_was/13011645652
[09:15:06] [PASSED] oob_was/14022293748
[09:15:06] [PASSED] oob_was/22019794406
[09:15:06] [PASSED] oob_was/22019338487
[09:15:06] [PASSED] oob_was/16023588340
[09:15:06] [PASSED] oob_was/14019789679
[09:15:06] [PASSED] oob_was/14022866841
[09:15:06] [PASSED] oob_was/16021333562
[09:15:06] [PASSED] oob_was/14016712196
[09:15:06] [PASSED] oob_was/14015568240
[09:15:06] [PASSED] oob_was/18013179988
[09:15:06] [PASSED] oob_was/1508761755
[09:15:06] [PASSED] oob_was/16023105232
[09:15:06] [PASSED] oob_was/16026508708
[09:15:06] [PASSED] oob_was/14020001231
[09:15:06] [PASSED] oob_was/16023683509
[09:15:06] [PASSED] oob_was/14025515070
[09:15:06] [PASSED] oob_was/15015404425_disable
[09:15:06] [PASSED] oob_was/16026007364
[09:15:06] [PASSED] oob_was/14020316580
[09:15:06] [PASSED] oob_was/14025883347
[09:15:06] [PASSED] oob_was/16029380221
[09:15:06] [PASSED] oob_was/22022079272
[09:15:06] [PASSED] oob_was/16029897822
[09:15:06] [PASSED] oob_was/14027054324
[09:15:06] ============== [PASSED] xe_rtp_table_oob_test ==============
[09:15:06] ================ xe_rtp_table_dev_oob_test ================
[09:15:06] [PASSED] device_oob_was/22010954014
[09:15:06] [PASSED] device_oob_was/15015404425
[09:15:06] [PASSED] device_oob_was/22019338487_display
[09:15:06] [PASSED] device_oob_was/14022085890
[09:15:06] [PASSED] device_oob_was/14026539277
[09:15:06] [PASSED] device_oob_was/14026633728
[09:15:06] [PASSED] device_oob_was/14026746987
[09:15:06] [PASSED] device_oob_was/14026779378
[09:15:06] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[09:15:06] ========== xe_rtp_table_missing_upper_bound_test ==========
[09:15:06] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[09:15:06] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[09:15:06] [PASSED] register_whitelist/1806527549
[09:15:06] [PASSED] register_whitelist/allow_read_ctx_timestamp
[09:15:06] [PASSED] register_whitelist/allow_read_queue_timestamp
[09:15:06] [PASSED] register_whitelist/16014440446
[09:15:06] [PASSED] register_whitelist/16017236439
[09:15:06] [PASSED] register_whitelist/16020183090
[09:15:06] [PASSED] register_whitelist/14024997852
[09:15:06] [PASSED] register_whitelist/14024997852
[09:15:06] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[09:15:06] =============== [PASSED] xe_rtp_tables_test ================
[09:15:06] =================== xe_rtp (3 subtests) ====================
[09:15:06] =================== xe_rtp_rules_tests ====================
[09:15:06] [PASSED] no
[09:15:06] [PASSED] yes
[09:15:06] [PASSED] no-and-no
[09:15:06] [PASSED] no-and-yes
[09:15:06] [PASSED] yes-and-no
[09:15:06] [PASSED] yes-and-yes
[09:15:06] [PASSED] no-or-no
[09:15:06] [PASSED] no-or-yes
[09:15:06] [PASSED] yes-or-no
[09:15:06] [PASSED] yes-or-yes
[09:15:06] [PASSED] no-yes-or-yes-no
[09:15:06] [PASSED] no-yes-or-yes-yes
[09:15:06] [PASSED] yes-yes-or-no-yes
[09:15:06] [PASSED] yes-yes-or-yes-yes
[09:15:06] [PASSED] no-no-or-yes-or-no
[09:15:06] [PASSED] or
[09:15:06] [PASSED] or-yes
[09:15:06] [PASSED] or-no
[09:15:06] [PASSED] yes-or
[09:15:06] [PASSED] no-or
[09:15:06] [PASSED] no-or-or-yes
[09:15:06] [PASSED] yes-or-or-no
[09:15:06] [PASSED] no-or-or-no
[09:15:06] [PASSED] missing-context-engine-class
[09:15:06] [PASSED] missing-context-engine-class-or-yes
[09:15:06] [PASSED] missing-context-engine-class-or-or-yes
[09:15:06] =============== [PASSED] xe_rtp_rules_tests ================
[09:15:06] =============== xe_rtp_process_to_sr_tests ================
[09:15:06] [PASSED] coalesce-same-reg
[09:15:06] [PASSED] coalesce-same-reg-literal-and-func
[09:15:06] [PASSED] no-match-no-add
[09:15:06] [PASSED] two-regs-two-entries
[09:15:06] [PASSED] clr-one-set-other
[09:15:06] [PASSED] set-field
[09:15:06] [PASSED] conflict-duplicate
[09:15:06] [PASSED] conflict-not-disjoint
[09:15:06] [PASSED] conflict-not-disjoint-literal-and-func
[09:15:06] [PASSED] conflict-reg-type
[09:15:06] [PASSED] bad-mcr-reg-forced-to-regular
[09:15:06] [PASSED] bad-regular-reg-forced-to-mcr
[09:15:06] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:15:06] ================== xe_rtp_process_tests ===================
[09:15:06] [PASSED] active1
[09:15:06] [PASSED] active2
[09:15:06] [PASSED] active-inactive
[09:15:06] [PASSED] inactive-active
[09:15:06] [PASSED] inactive-active-inactive
[09:15:06] [PASSED] inactive-inactive-inactive
[09:15:06] ============== [PASSED] xe_rtp_process_tests ===============
[09:15:06] ===================== [PASSED] xe_rtp ======================
[09:15:06] ==================== xe_wa (1 subtest) =====================
[09:15:06] ======================== xe_wa_gt =========================
[09:15:06] [PASSED] TIGERLAKE B0
[09:15:06] [PASSED] DG1 A0
[09:15:06] [PASSED] DG1 B0
[09:15:06] [PASSED] ALDERLAKE_S A0
[09:15:06] [PASSED] ALDERLAKE_S B0
[09:15:06] [PASSED] ALDERLAKE_S C0
[09:15:06] [PASSED] ALDERLAKE_S D0
[09:15:06] [PASSED] ALDERLAKE_P A0
[09:15:06] [PASSED] ALDERLAKE_P B0
[09:15:06] [PASSED] ALDERLAKE_P C0
[09:15:06] [PASSED] ALDERLAKE_S RPLS D0
[09:15:06] [PASSED] ALDERLAKE_P RPLU E0
[09:15:06] [PASSED] DG2 G10 C0
[09:15:06] [PASSED] DG2 G11 B1
[09:15:06] [PASSED] DG2 G12 A1
[09:15:06] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:15:06] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:15:06] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:15:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:15:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:15:06] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:15:06] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:15:06] ==================== [PASSED] xe_wa_gt =====================
[09:15:06] ====================== [PASSED] xe_wa ======================
[09:15:06] ============================================================
[09:15:06] Testing complete. Ran 742 tests: passed: 724, skipped: 18
[09:15:06] Elapsed time: 36.871s total, 4.405s configuring, 31.801s building, 0.642s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:15:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:15:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:15:33] Starting KUnit Kernel (1/1)...
[09:15:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:15:33] ============ drm_test_pick_cmdline (2 subtests) ============
[09:15:33] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:15:33] =============== drm_test_pick_cmdline_named ===============
[09:15:33] [PASSED] NTSC
[09:15:33] [PASSED] NTSC-J
[09:15:33] [PASSED] PAL
[09:15:33] [PASSED] PAL-M
[09:15:33] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:15:33] ============== [PASSED] drm_test_pick_cmdline ==============
[09:15:33] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:15:33] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:15:33] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:15:33] =========== drm_validate_clone_mode (2 subtests) ===========
[09:15:33] ============== drm_test_check_in_clone_mode ===============
[09:15:33] [PASSED] in_clone_mode
[09:15:33] [PASSED] not_in_clone_mode
[09:15:33] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:15:33] =============== drm_test_check_valid_clones ===============
[09:15:33] [PASSED] not_in_clone_mode
[09:15:33] [PASSED] valid_clone
[09:15:33] [PASSED] invalid_clone
[09:15:33] =========== [PASSED] drm_test_check_valid_clones ===========
[09:15:33] ============= [PASSED] drm_validate_clone_mode =============
[09:15:33] ============= drm_validate_modeset (1 subtest) =============
[09:15:33] [PASSED] drm_test_check_connector_changed_modeset
[09:15:33] ============== [PASSED] drm_validate_modeset ===============
[09:15:33] ====== drm_test_bridge_get_current_state (1 subtest) =======
[09:15:33] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:15:33] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:15:33] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[09:15:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:15:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:15:33] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[09:15:33] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:15:33] ============== drm_bridge_alloc (2 subtests) ===============
[09:15:33] [PASSED] drm_test_drm_bridge_alloc_basic
[09:15:33] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:15:33] ================ [PASSED] drm_bridge_alloc =================
[09:15:33] ============= drm_bridge_bus_fmt (5 subtests) ==============
[09:15:33] [PASSED] drm_test_bridge_rgb_yuv_rgb
[09:15:33] [PASSED] drm_test_bridge_must_convert_to_yuv444
[09:15:33] [PASSED] drm_test_bridge_hdmi_auto_rgb
[09:15:33] [PASSED] drm_test_bridge_auto_first
[09:15:33] [PASSED] drm_test_bridge_rgb_yuv_no_path
[09:15:33] =============== [PASSED] drm_bridge_bus_fmt ================
[09:15:33] ============= drm_cmdline_parser (40 subtests) =============
[09:15:33] [PASSED] drm_test_cmdline_force_d_only
[09:15:33] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:15:33] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:15:33] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:15:33] [PASSED] drm_test_cmdline_force_e_only
[09:15:33] [PASSED] drm_test_cmdline_res
[09:15:33] [PASSED] drm_test_cmdline_res_vesa
[09:15:33] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:15:33] [PASSED] drm_test_cmdline_res_rblank
[09:15:33] [PASSED] drm_test_cmdline_res_bpp
[09:15:33] [PASSED] drm_test_cmdline_res_refresh
[09:15:33] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:15:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:15:33] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:15:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:15:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:15:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:15:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:15:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:15:33] [PASSED] drm_test_cmdline_res_margins_force_on
[09:15:33] [PASSED] drm_test_cmdline_res_vesa_margins
[09:15:33] [PASSED] drm_test_cmdline_name
[09:15:33] [PASSED] drm_test_cmdline_name_bpp
[09:15:33] [PASSED] drm_test_cmdline_name_option
[09:15:33] [PASSED] drm_test_cmdline_name_bpp_option
[09:15:33] [PASSED] drm_test_cmdline_rotate_0
[09:15:33] [PASSED] drm_test_cmdline_rotate_90
[09:15:33] [PASSED] drm_test_cmdline_rotate_180
[09:15:33] [PASSED] drm_test_cmdline_rotate_270
[09:15:33] [PASSED] drm_test_cmdline_hmirror
[09:15:33] [PASSED] drm_test_cmdline_vmirror
[09:15:33] [PASSED] drm_test_cmdline_margin_options
[09:15:33] [PASSED] drm_test_cmdline_multiple_options
[09:15:33] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:15:33] [PASSED] drm_test_cmdline_extra_and_option
[09:15:33] [PASSED] drm_test_cmdline_freestanding_options
[09:15:33] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:15:33] [PASSED] drm_test_cmdline_panel_orientation
[09:15:33] ================ drm_test_cmdline_invalid =================
[09:15:33] [PASSED] margin_only
[09:15:33] [PASSED] interlace_only
[09:15:33] [PASSED] res_missing_x
[09:15:33] [PASSED] res_missing_y
[09:15:33] [PASSED] res_bad_y
[09:15:33] [PASSED] res_missing_y_bpp
[09:15:33] [PASSED] res_bad_bpp
[09:15:33] [PASSED] res_bad_refresh
[09:15:33] [PASSED] res_bpp_refresh_force_on_off
[09:15:33] [PASSED] res_invalid_mode
[09:15:33] [PASSED] res_bpp_wrong_place_mode
[09:15:33] [PASSED] name_bpp_refresh
[09:15:33] [PASSED] name_refresh
[09:15:33] [PASSED] name_refresh_wrong_mode
[09:15:33] [PASSED] name_refresh_invalid_mode
[09:15:33] [PASSED] rotate_multiple
[09:15:33] [PASSED] rotate_invalid_val
[09:15:33] [PASSED] rotate_truncated
[09:15:33] [PASSED] invalid_option
[09:15:33] [PASSED] invalid_tv_option
[09:15:33] [PASSED] truncated_tv_option
[09:15:33] ============ [PASSED] drm_test_cmdline_invalid =============
[09:15:33] =============== drm_test_cmdline_tv_options ===============
[09:15:33] [PASSED] NTSC
[09:15:33] [PASSED] NTSC_443
[09:15:33] [PASSED] NTSC_J
[09:15:33] [PASSED] PAL
[09:15:33] [PASSED] PAL_M
[09:15:33] [PASSED] PAL_N
[09:15:33] [PASSED] SECAM
[09:15:33] [PASSED] MONO_525
[09:15:33] [PASSED] MONO_625
[09:15:33] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:15:33] =============== [PASSED] drm_cmdline_parser ================
[09:15:33] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:15:33] [PASSED] drm_test_connector_hdmi_init_valid
[09:15:33] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:15:33] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:15:33] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:15:33] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:15:33] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:15:33] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:15:33] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:15:33] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:15:33] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:15:33] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:15:33] [PASSED] supported_formats=0x5 yuv420_allowed=1
[09:15:33] [PASSED] supported_formats=0x5 yuv420_allowed=0
[09:15:33] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:15:33] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:15:33] [PASSED] drm_test_connector_hdmi_init_null_product
[09:15:33] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:15:33] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:15:33] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:15:33] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:15:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:15:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:15:33] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:15:33] ========= drm_test_connector_hdmi_init_type_valid =========
[09:15:33] [PASSED] HDMI-A
[09:15:33] [PASSED] HDMI-B
[09:15:33] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:15:33] ======== drm_test_connector_hdmi_init_type_invalid ========
[09:15:33] [PASSED] Unknown
[09:15:33] [PASSED] VGA
[09:15:33] [PASSED] DVI-I
[09:15:33] [PASSED] DVI-D
[09:15:33] [PASSED] DVI-A
[09:15:33] [PASSED] Composite
[09:15:33] [PASSED] SVIDEO
[09:15:33] [PASSED] LVDS
[09:15:33] [PASSED] Component
[09:15:33] [PASSED] DIN
[09:15:33] [PASSED] DP
[09:15:33] [PASSED] TV
[09:15:33] [PASSED] eDP
[09:15:33] [PASSED] Virtual
[09:15:33] [PASSED] DSI
[09:15:33] [PASSED] DPI
[09:15:33] [PASSED] Writeback
[09:15:33] [PASSED] SPI
[09:15:33] [PASSED] USB
[09:15:33] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:15:33] ============ [PASSED] drmm_connector_hdmi_init =============
[09:15:33] ============= drmm_connector_init (3 subtests) =============
[09:15:33] [PASSED] drm_test_drmm_connector_init
[09:15:33] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:15:33] ========= drm_test_drmm_connector_init_type_valid =========
[09:15:33] [PASSED] Unknown
[09:15:33] [PASSED] VGA
[09:15:33] [PASSED] DVI-I
[09:15:33] [PASSED] DVI-D
[09:15:33] [PASSED] DVI-A
[09:15:33] [PASSED] Composite
[09:15:33] [PASSED] SVIDEO
[09:15:33] [PASSED] LVDS
[09:15:33] [PASSED] Component
[09:15:33] [PASSED] DIN
[09:15:33] [PASSED] DP
[09:15:33] [PASSED] HDMI-A
[09:15:33] [PASSED] HDMI-B
[09:15:33] [PASSED] TV
[09:15:33] [PASSED] eDP
[09:15:33] [PASSED] Virtual
[09:15:33] [PASSED] DSI
[09:15:33] [PASSED] DPI
[09:15:33] [PASSED] Writeback
[09:15:33] [PASSED] SPI
[09:15:33] [PASSED] USB
[09:15:33] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:15:33] =============== [PASSED] drmm_connector_init ===============
[09:15:33] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_init
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:15:33] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[09:15:33] [PASSED] Unknown
[09:15:33] [PASSED] VGA
[09:15:33] [PASSED] DVI-I
[09:15:33] [PASSED] DVI-D
[09:15:33] [PASSED] DVI-A
[09:15:33] [PASSED] Composite
[09:15:33] [PASSED] SVIDEO
[09:15:33] [PASSED] LVDS
[09:15:33] [PASSED] Component
[09:15:33] [PASSED] DIN
[09:15:33] [PASSED] DP
[09:15:33] [PASSED] HDMI-A
[09:15:33] [PASSED] HDMI-B
[09:15:33] [PASSED] TV
[09:15:33] [PASSED] eDP
[09:15:33] [PASSED] Virtual
[09:15:33] [PASSED] DSI
[09:15:33] [PASSED] DPI
[09:15:33] [PASSED] Writeback
[09:15:33] [PASSED] SPI
[09:15:33] [PASSED] USB
[09:15:33] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:15:33] ======== drm_test_drm_connector_dynamic_init_name =========
[09:15:33] [PASSED] Unknown
[09:15:33] [PASSED] VGA
[09:15:33] [PASSED] DVI-I
[09:15:33] [PASSED] DVI-D
[09:15:33] [PASSED] DVI-A
[09:15:33] [PASSED] Composite
[09:15:33] [PASSED] SVIDEO
[09:15:33] [PASSED] LVDS
[09:15:33] [PASSED] Component
[09:15:33] [PASSED] DIN
[09:15:33] [PASSED] DP
[09:15:33] [PASSED] HDMI-A
[09:15:33] [PASSED] HDMI-B
[09:15:33] [PASSED] TV
[09:15:33] [PASSED] eDP
[09:15:33] [PASSED] Virtual
[09:15:33] [PASSED] DSI
[09:15:33] [PASSED] DPI
[09:15:33] [PASSED] Writeback
[09:15:33] [PASSED] SPI
[09:15:33] [PASSED] USB
[09:15:33] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:15:33] =========== [PASSED] drm_connector_dynamic_init ============
[09:15:33] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:15:33] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:15:33] ======= drm_connector_dynamic_register (7 subtests) ========
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:15:33] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:15:33] ========= [PASSED] drm_connector_dynamic_register ==========
[09:15:33] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:15:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:15:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:15:33] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:15:33] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:15:33] ========== drm_test_get_tv_mode_from_name_valid ===========
[09:15:33] [PASSED] NTSC
[09:15:33] [PASSED] NTSC-443
[09:15:33] [PASSED] NTSC-J
[09:15:33] [PASSED] PAL
[09:15:33] [PASSED] PAL-M
[09:15:33] [PASSED] PAL-N
[09:15:33] [PASSED] SECAM
[09:15:33] [PASSED] Mono
[09:15:33] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:15:33] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:15:33] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:15:33] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:15:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:15:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:15:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:15:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:15:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:15:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:15:33] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[09:15:33] [PASSED] VIC 96
[09:15:33] [PASSED] VIC 97
[09:15:33] [PASSED] VIC 101
[09:15:33] [PASSED] VIC 102
[09:15:33] [PASSED] VIC 106
[09:15:33] [PASSED] VIC 107
[09:15:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:15:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:15:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:15:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:15:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:15:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:15:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:15:33] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:15:33] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[09:15:33] [PASSED] Automatic
[09:15:33] [PASSED] Full
[09:15:33] [PASSED] Limited 16:235
[09:15:33] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:15:33] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:15:33] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:15:33] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:15:33] === drm_test_drm_hdmi_connector_get_output_format_name ====
[09:15:33] [PASSED] RGB
[09:15:33] [PASSED] YUV 4:2:0
[09:15:33] [PASSED] YUV 4:2:2
[09:15:33] [PASSED] YUV 4:4:4
[09:15:33] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:15:33] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:15:33] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:15:33] ============= drm_damage_helper (21 subtests) ==============
[09:15:33] [PASSED] drm_test_damage_iter_no_damage
[09:15:33] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:15:33] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:15:33] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:15:33] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:15:33] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:15:33] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:15:33] [PASSED] drm_test_damage_iter_simple_damage
[09:15:33] [PASSED] drm_test_damage_iter_single_damage
[09:15:33] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:15:33] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:15:33] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:15:33] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:15:33] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:15:33] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:15:33] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:15:33] [PASSED] drm_test_damage_iter_damage
[09:15:33] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:15:33] [PASSED] drm_test_damage_iter_damage_one_outside
[09:15:33] [PASSED] drm_test_damage_iter_damage_src_moved
[09:15:33] [PASSED] drm_test_damage_iter_damage_not_visible
[09:15:33] ================ [PASSED] drm_damage_helper ================
[09:15:33] ============== drm_dp_mst_helper (3 subtests) ==============
[09:15:33] ============== drm_test_dp_mst_calc_pbn_mode ==============
[09:15:33] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:15:33] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:15:33] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:15:33] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:15:33] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:15:33] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:15:33] ============== drm_test_dp_mst_calc_pbn_div ===============
[09:15:33] [PASSED] Link rate 2000000 lane count 4
[09:15:33] [PASSED] Link rate 2000000 lane count 2
[09:15:33] [PASSED] Link rate 2000000 lane count 1
[09:15:33] [PASSED] Link rate 1350000 lane count 4
[09:15:33] [PASSED] Link rate 1350000 lane count 2
[09:15:33] [PASSED] Link rate 1350000 lane count 1
[09:15:33] [PASSED] Link rate 1000000 lane count 4
[09:15:33] [PASSED] Link rate 1000000 lane count 2
[09:15:33] [PASSED] Link rate 1000000 lane count 1
[09:15:33] [PASSED] Link rate 810000 lane count 4
[09:15:33] [PASSED] Link rate 810000 lane count 2
[09:15:33] [PASSED] Link rate 810000 lane count 1
[09:15:33] [PASSED] Link rate 540000 lane count 4
[09:15:33] [PASSED] Link rate 540000 lane count 2
[09:15:33] [PASSED] Link rate 540000 lane count 1
[09:15:33] [PASSED] Link rate 270000 lane count 4
[09:15:33] [PASSED] Link rate 270000 lane count 2
[09:15:33] [PASSED] Link rate 270000 lane count 1
[09:15:33] [PASSED] Link rate 162000 lane count 4
[09:15:33] [PASSED] Link rate 162000 lane count 2
[09:15:33] [PASSED] Link rate 162000 lane count 1
[09:15:33] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:15:33] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[09:15:33] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:15:33] [PASSED] DP_POWER_UP_PHY with port number
[09:15:33] [PASSED] DP_POWER_DOWN_PHY with port number
[09:15:33] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:15:33] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:15:33] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:15:33] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:15:33] [PASSED] DP_QUERY_PAYLOAD with port number
[09:15:33] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:15:33] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:15:33] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:15:33] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:15:33] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:15:33] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:15:33] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:15:33] [PASSED] DP_REMOTE_I2C_READ with port number
[09:15:33] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:15:33] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:15:33] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:15:33] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:15:33] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:15:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:15:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:15:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:15:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:15:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:15:33] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:15:33] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:15:33] ================ [PASSED] drm_dp_mst_helper ================
[09:15:33] ================== drm_exec (7 subtests) ===================
[09:15:33] [PASSED] sanitycheck
[09:15:33] [PASSED] test_lock
[09:15:33] [PASSED] test_lock_unlock
[09:15:33] [PASSED] test_duplicates
[09:15:33] [PASSED] test_prepare
[09:15:33] [PASSED] test_prepare_array
[09:15:33] [PASSED] test_multiple_loops
[09:15:33] ==================== [PASSED] drm_exec =====================
[09:15:33] =========== drm_format_helper_test (17 subtests) ===========
[09:15:33] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:15:33] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:15:33] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:15:33] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:15:33] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:15:33] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:15:33] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:15:33] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:15:33] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:15:33] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:15:33] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:15:33] ============== drm_test_fb_xrgb8888_to_mono ===============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:15:33] ==================== drm_test_fb_swab =====================
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ================ [PASSED] drm_test_fb_swab =================
[09:15:33] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:15:33] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[09:15:33] [PASSED] single_pixel_source_buffer
[09:15:33] [PASSED] single_pixel_clip_rectangle
[09:15:33] [PASSED] well_known_colors
[09:15:33] [PASSED] destination_pitch
[09:15:33] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:15:33] ================= drm_test_fb_clip_offset =================
[09:15:33] [PASSED] pass through
[09:15:33] [PASSED] horizontal offset
[09:15:33] [PASSED] vertical offset
[09:15:33] [PASSED] horizontal and vertical offset
[09:15:33] [PASSED] horizontal offset (custom pitch)
[09:15:33] [PASSED] vertical offset (custom pitch)
[09:15:33] [PASSED] horizontal and vertical offset (custom pitch)
[09:15:33] ============= [PASSED] drm_test_fb_clip_offset =============
[09:15:33] =================== drm_test_fb_memcpy ====================
[09:15:33] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:15:33] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:15:33] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:15:33] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:15:33] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:15:33] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:15:33] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:15:33] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:15:33] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:15:33] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:15:33] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:15:33] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:15:33] =============== [PASSED] drm_test_fb_memcpy ================
[09:15:33] ============= [PASSED] drm_format_helper_test ==============
[09:15:33] ================= drm_format (18 subtests) =================
[09:15:33] [PASSED] drm_test_format_block_width_invalid
[09:15:33] [PASSED] drm_test_format_block_width_one_plane
[09:15:33] [PASSED] drm_test_format_block_width_two_plane
[09:15:33] [PASSED] drm_test_format_block_width_three_plane
[09:15:33] [PASSED] drm_test_format_block_width_tiled
[09:15:33] [PASSED] drm_test_format_block_height_invalid
[09:15:33] [PASSED] drm_test_format_block_height_one_plane
[09:15:33] [PASSED] drm_test_format_block_height_two_plane
[09:15:33] [PASSED] drm_test_format_block_height_three_plane
[09:15:33] [PASSED] drm_test_format_block_height_tiled
[09:15:33] [PASSED] drm_test_format_min_pitch_invalid
[09:15:33] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:15:33] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:15:33] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:15:33] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:15:33] [PASSED] drm_test_format_min_pitch_two_plane
[09:15:33] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:15:33] [PASSED] drm_test_format_min_pitch_tiled
[09:15:33] =================== [PASSED] drm_format ====================
[09:15:33] ============== drm_framebuffer (10 subtests) ===============
[09:15:33] ========== drm_test_framebuffer_check_src_coords ==========
[09:15:33] [PASSED] Success: source fits into fb
[09:15:33] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:15:33] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:15:33] [PASSED] Fail: overflowing fb with source width
[09:15:33] [PASSED] Fail: overflowing fb with source height
[09:15:33] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:15:33] [PASSED] drm_test_framebuffer_cleanup
[09:15:33] =============== drm_test_framebuffer_create ===============
[09:15:33] [PASSED] ABGR8888 normal sizes
[09:15:33] [PASSED] ABGR8888 max sizes
[09:15:33] [PASSED] ABGR8888 pitch greater than min required
[09:15:33] [PASSED] ABGR8888 pitch less than min required
[09:15:33] [PASSED] ABGR8888 Invalid width
[09:15:33] [PASSED] ABGR8888 Invalid buffer handle
[09:15:33] [PASSED] No pixel format
[09:15:33] [PASSED] ABGR8888 Width 0
[09:15:33] [PASSED] ABGR8888 Height 0
[09:15:33] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:15:33] [PASSED] ABGR8888 Large buffer offset
[09:15:33] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:15:33] [PASSED] ABGR8888 Invalid flag
[09:15:33] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:15:33] [PASSED] ABGR8888 Valid buffer modifier
[09:15:33] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:15:33] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:15:33] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:15:33] [PASSED] NV12 Normal sizes
[09:15:33] [PASSED] NV12 Max sizes
[09:15:33] [PASSED] NV12 Invalid pitch
[09:15:33] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:15:33] [PASSED] NV12 different modifier per-plane
[09:15:33] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:15:33] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:15:33] [PASSED] NV12 Modifier for inexistent plane
[09:15:33] [PASSED] NV12 Handle for inexistent plane
[09:15:33] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:15:33] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:15:33] [PASSED] YVU420 Normal sizes
[09:15:33] [PASSED] YVU420 Max sizes
[09:15:33] [PASSED] YVU420 Invalid pitch
[09:15:33] [PASSED] YVU420 Different pitches
[09:15:33] [PASSED] YVU420 Different buffer offsets/pitches
[09:15:33] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:15:33] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:15:33] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:15:33] [PASSED] YVU420 Valid modifier
[09:15:33] [PASSED] YVU420 Different modifiers per plane
[09:15:33] [PASSED] YVU420 Modifier for inexistent plane
[09:15:33] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:15:33] [PASSED] X0L2 Normal sizes
[09:15:33] [PASSED] X0L2 Max sizes
[09:15:33] [PASSED] X0L2 Invalid pitch
[09:15:33] [PASSED] X0L2 Pitch greater than minimum required
[09:15:33] [PASSED] X0L2 Handle for inexistent plane
[09:15:33] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:15:33] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:15:33] [PASSED] X0L2 Valid modifier
[09:15:33] [PASSED] X0L2 Modifier for inexistent plane
[09:15:33] =========== [PASSED] drm_test_framebuffer_create ===========
[09:15:33] [PASSED] drm_test_framebuffer_free
[09:15:33] [PASSED] drm_test_framebuffer_init
[09:15:33] [PASSED] drm_test_framebuffer_init_bad_format
[09:15:33] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:15:33] [PASSED] drm_test_framebuffer_lookup
[09:15:33] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:15:33] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:15:33] ================= [PASSED] drm_framebuffer =================
[09:15:33] ================ drm_gem_shmem (8 subtests) ================
[09:15:33] [PASSED] drm_gem_shmem_test_obj_create
[09:15:33] [PASSED] drm_gem_shmem_test_obj_create_private
[09:15:33] [PASSED] drm_gem_shmem_test_pin_pages
[09:15:33] [PASSED] drm_gem_shmem_test_vmap
[09:15:33] [PASSED] drm_gem_shmem_test_get_sg_table
[09:15:33] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:15:33] [PASSED] drm_gem_shmem_test_madvise
[09:15:33] [PASSED] drm_gem_shmem_test_purge
[09:15:33] ================== [PASSED] drm_gem_shmem ==================
[09:15:33] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[09:15:33] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:15:33] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:15:33] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:15:33] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:15:33] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:15:33] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:15:33] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[09:15:33] [PASSED] Automatic
[09:15:33] [PASSED] Full
[09:15:33] [PASSED] Limited 16:235
[09:15:33] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:15:33] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:15:33] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:15:33] [PASSED] drm_test_check_disable_connector
[09:15:33] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:15:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:15:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:15:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:15:33] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:15:33] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:15:33] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:15:33] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:15:33] [PASSED] drm_test_check_output_bpc_dvi
[09:15:33] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:15:33] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:15:33] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:15:33] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:15:33] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:15:33] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:15:33] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:15:33] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:15:33] ============ drm_test_check_hdmi_color_format =============
[09:15:33] [PASSED] AUTO -> RGB
[09:15:33] [PASSED] YCBCR422 -> YUV422
[09:15:33] [PASSED] YCBCR420 -> YUV420
[09:15:33] [PASSED] YCBCR444 -> YUV444
[09:15:33] [PASSED] RGB -> RGB
[09:15:33] ======== [PASSED] drm_test_check_hdmi_color_format =========
[09:15:33] ======== drm_test_check_hdmi_color_format_420_only ========
[09:15:33] [PASSED] RGB should fail
[09:15:33] [PASSED] YUV444 should fail
[09:15:33] [PASSED] YUV422 should fail
[09:15:33] [PASSED] YUV420 should work
[09:15:33] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[09:15:33] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:15:33] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:15:33] [PASSED] drm_test_check_broadcast_rgb_value
[09:15:33] [PASSED] drm_test_check_bpc_8_value
[09:15:33] [PASSED] drm_test_check_bpc_10_value
[09:15:33] [PASSED] drm_test_check_bpc_12_value
[09:15:33] [PASSED] drm_test_check_format_value
[09:15:33] [PASSED] drm_test_check_tmds_char_value
[09:15:33] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:15:33] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[09:15:33] [PASSED] drm_test_check_mode_valid
[09:15:33] [PASSED] drm_test_check_mode_valid_reject
[09:15:33] [PASSED] drm_test_check_mode_valid_reject_rate
[09:15:33] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:15:33] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[09:15:33] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[09:15:33] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[09:15:33] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:15:33] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[09:15:33] [PASSED] drm_test_check_infoframes
[09:15:33] [PASSED] drm_test_check_reject_avi_infoframe
[09:15:33] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[09:15:33] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[09:15:33] [PASSED] drm_test_check_reject_audio_infoframe
[09:15:33] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[09:15:33] ================= drm_managed (2 subtests) =================
[09:15:33] [PASSED] drm_test_managed_release_action
[09:15:33] [PASSED] drm_test_managed_run_action
[09:15:33] =================== [PASSED] drm_managed ===================
[09:15:33] =================== drm_mm (6 subtests) ====================
[09:15:33] [PASSED] drm_test_mm_init
[09:15:33] [PASSED] drm_test_mm_debug
[09:15:33] [PASSED] drm_test_mm_align32
[09:15:33] [PASSED] drm_test_mm_align64
[09:15:33] [PASSED] drm_test_mm_lowest
[09:15:33] [PASSED] drm_test_mm_highest
[09:15:33] ===================== [PASSED] drm_mm ======================
[09:15:33] ============= drm_modes_analog_tv (5 subtests) =============
[09:15:33] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:15:33] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:15:33] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:15:33] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:15:33] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:15:33] =============== [PASSED] drm_modes_analog_tv ===============
[09:15:33] ============== drm_plane_helper (2 subtests) ===============
[09:15:33] =============== drm_test_check_plane_state ================
[09:15:33] [PASSED] clipping_simple
[09:15:33] [PASSED] clipping_rotate_reflect
[09:15:33] [PASSED] positioning_simple
[09:15:33] [PASSED] upscaling
[09:15:33] [PASSED] downscaling
[09:15:33] [PASSED] rounding1
[09:15:33] [PASSED] rounding2
[09:15:33] [PASSED] rounding3
[09:15:33] [PASSED] rounding4
[09:15:33] =========== [PASSED] drm_test_check_plane_state ============
[09:15:33] =========== drm_test_check_invalid_plane_state ============
[09:15:33] [PASSED] positioning_invalid
[09:15:33] [PASSED] upscaling_invalid
[09:15:33] [PASSED] downscaling_invalid
[09:15:33] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:15:33] ================ [PASSED] drm_plane_helper =================
[09:15:33] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:15:33] ====== drm_test_connector_helper_tv_get_modes_check =======
[09:15:33] [PASSED] None
[09:15:33] [PASSED] PAL
[09:15:33] [PASSED] NTSC
[09:15:33] [PASSED] Both, NTSC Default
[09:15:33] [PASSED] Both, PAL Default
[09:15:33] [PASSED] Both, NTSC Default, with PAL on command-line
[09:15:33] [PASSED] Both, PAL Default, with NTSC on command-line
[09:15:33] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:15:33] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:15:33] ================== drm_rect (9 subtests) ===================
[09:15:33] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:15:33] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:15:33] [PASSED] drm_test_rect_clip_scaled_clipped
[09:15:33] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:15:33] ================= drm_test_rect_intersect =================
[09:15:33] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:15:33] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:15:33] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:15:33] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:15:33] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:15:33] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:15:33] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:15:33] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:15:33] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:15:33] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:15:33] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:15:33] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:15:33] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:15:33] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:15:33] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:15:33] ============= [PASSED] drm_test_rect_intersect =============
[09:15:33] ================ drm_test_rect_calc_hscale ================
[09:15:33] [PASSED] normal use
[09:15:33] [PASSED] out of max range
[09:15:33] [PASSED] out of min range
[09:15:33] [PASSED] zero dst
[09:15:33] [PASSED] negative src
[09:15:33] [PASSED] negative dst
[09:15:33] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:15:33] ================ drm_test_rect_calc_vscale ================
[09:15:33] [PASSED] normal use
[09:15:33] [PASSED] out of max range
[09:15:33] [PASSED] out of min range
[09:15:33] [PASSED] zero dst
[09:15:33] [PASSED] negative src
[09:15:33] [PASSED] negative dst
[09:15:33] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:15:33] ================== drm_test_rect_rotate ===================
[09:15:33] [PASSED] reflect-x
[09:15:33] [PASSED] reflect-y
[09:15:33] [PASSED] rotate-0
[09:15:33] [PASSED] rotate-90
[09:15:33] [PASSED] rotate-180
[09:15:33] [PASSED] rotate-270
[09:15:33] ============== [PASSED] drm_test_rect_rotate ===============
[09:15:33] ================ drm_test_rect_rotate_inv =================
[09:15:33] [PASSED] reflect-x
[09:15:33] [PASSED] reflect-y
[09:15:33] [PASSED] rotate-0
[09:15:33] [PASSED] rotate-90
[09:15:33] [PASSED] rotate-180
[09:15:33] [PASSED] rotate-270
[09:15:33] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:15:33] ==================== [PASSED] drm_rect =====================
[09:15:33] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:15:33] ============ drm_test_sysfb_build_fourcc_list =============
[09:15:33] [PASSED] no native formats
[09:15:33] [PASSED] XRGB8888 as native format
[09:15:33] [PASSED] remove duplicates
[09:15:33] [PASSED] convert alpha formats
[09:15:33] [PASSED] random formats
[09:15:33] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:15:33] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:15:33] ================== drm_fixp (2 subtests) ===================
[09:15:33] [PASSED] drm_test_int2fixp
[09:15:33] [PASSED] drm_test_sm2fixp
[09:15:33] ==================== [PASSED] drm_fixp =====================
[09:15:33] ============================================================
[09:15:33] Testing complete. Ran 637 tests: passed: 637
[09:15:33] Elapsed time: 26.830s total, 1.801s configuring, 24.861s building, 0.144s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:15:33] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:15:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[09:15:45] Starting KUnit Kernel (1/1)...
[09:15:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:15:45] ================= ttm_device (5 subtests) ==================
[09:15:45] [PASSED] ttm_device_init_basic
[09:15:45] [PASSED] ttm_device_init_multiple
[09:15:45] [PASSED] ttm_device_fini_basic
[09:15:45] [PASSED] ttm_device_init_no_vma_man
[09:15:45] ================== ttm_device_init_pools ==================
[09:15:45] [PASSED] No DMA allocations, no DMA32 required
[09:15:45] [PASSED] DMA allocations, DMA32 required
[09:15:45] [PASSED] No DMA allocations, DMA32 required
[09:15:45] [PASSED] DMA allocations, no DMA32 required
[09:15:45] ============== [PASSED] ttm_device_init_pools ==============
[09:15:45] =================== [PASSED] ttm_device ====================
[09:15:45] ================== ttm_pool (8 subtests) ===================
[09:15:45] ================== ttm_pool_alloc_basic ===================
[09:15:45] [PASSED] One page
[09:15:45] [PASSED] More than one page
[09:15:45] [PASSED] Above the allocation limit
[09:15:45] [PASSED] One page, with coherent DMA mappings enabled
[09:15:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:15:45] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:15:45] ============== ttm_pool_alloc_basic_dma_addr ==============
[09:15:45] [PASSED] One page
[09:15:45] [PASSED] More than one page
[09:15:45] [PASSED] Above the allocation limit
[09:15:45] [PASSED] One page, with coherent DMA mappings enabled
[09:15:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:15:45] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:15:45] [PASSED] ttm_pool_alloc_order_caching_match
[09:15:45] [PASSED] ttm_pool_alloc_caching_mismatch
[09:15:45] [PASSED] ttm_pool_alloc_order_mismatch
[09:15:45] [PASSED] ttm_pool_free_dma_alloc
[09:15:45] [PASSED] ttm_pool_free_no_dma_alloc
[09:15:45] [PASSED] ttm_pool_fini_basic
[09:15:45] ==================== [PASSED] ttm_pool =====================
[09:15:45] ================ ttm_resource (8 subtests) =================
[09:15:45] ================= ttm_resource_init_basic =================
[09:15:45] [PASSED] Init resource in TTM_PL_SYSTEM
[09:15:45] [PASSED] Init resource in TTM_PL_VRAM
[09:15:45] [PASSED] Init resource in a private placement
[09:15:45] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:15:45] ============= [PASSED] ttm_resource_init_basic =============
[09:15:45] [PASSED] ttm_resource_init_pinned
[09:15:45] [PASSED] ttm_resource_fini_basic
[09:15:45] [PASSED] ttm_resource_manager_init_basic
[09:15:45] [PASSED] ttm_resource_manager_usage_basic
[09:15:45] [PASSED] ttm_resource_manager_set_used_basic
[09:15:45] [PASSED] ttm_sys_man_alloc_basic
[09:15:45] [PASSED] ttm_sys_man_free_basic
[09:15:45] ================== [PASSED] ttm_resource ===================
[09:15:45] =================== ttm_tt (15 subtests) ===================
[09:15:45] ==================== ttm_tt_init_basic ====================
[09:15:45] [PASSED] Page-aligned size
[09:15:45] [PASSED] Extra pages requested
[09:15:45] ================ [PASSED] ttm_tt_init_basic ================
[09:15:45] [PASSED] ttm_tt_init_misaligned
[09:15:45] [PASSED] ttm_tt_fini_basic
[09:15:45] [PASSED] ttm_tt_fini_sg
[09:15:45] [PASSED] ttm_tt_fini_shmem
[09:15:45] [PASSED] ttm_tt_create_basic
[09:15:45] [PASSED] ttm_tt_create_invalid_bo_type
[09:15:45] [PASSED] ttm_tt_create_ttm_exists
[09:15:45] [PASSED] ttm_tt_create_failed
[09:15:45] [PASSED] ttm_tt_destroy_basic
[09:15:45] [PASSED] ttm_tt_populate_null_ttm
[09:15:45] [PASSED] ttm_tt_populate_populated_ttm
[09:15:45] [PASSED] ttm_tt_unpopulate_basic
[09:15:45] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:15:45] [PASSED] ttm_tt_swapin_basic
[09:15:45] ===================== [PASSED] ttm_tt ======================
[09:15:45] =================== ttm_bo (14 subtests) ===================
[09:15:45] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[09:15:45] [PASSED] Cannot be interrupted and sleeps
[09:15:45] [PASSED] Cannot be interrupted, locks straight away
[09:15:45] [PASSED] Can be interrupted, sleeps
[09:15:45] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:15:45] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:15:45] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:15:45] [PASSED] ttm_bo_reserve_double_resv
[09:15:45] [PASSED] ttm_bo_reserve_interrupted
[09:15:45] [PASSED] ttm_bo_reserve_deadlock
[09:15:45] [PASSED] ttm_bo_unreserve_basic
[09:15:45] [PASSED] ttm_bo_unreserve_pinned
[09:15:45] [PASSED] ttm_bo_unreserve_bulk
[09:15:45] [PASSED] ttm_bo_fini_basic
[09:15:45] [PASSED] ttm_bo_fini_shared_resv
[09:15:45] [PASSED] ttm_bo_pin_basic
[09:15:45] [PASSED] ttm_bo_pin_unpin_resource
[09:15:45] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:15:45] ===================== [PASSED] ttm_bo ======================
[09:15:45] ============== ttm_bo_validate (22 subtests) ===============
[09:15:45] ============== ttm_bo_init_reserved_sys_man ===============
[09:15:45] [PASSED] Buffer object for userspace
[09:15:45] [PASSED] Kernel buffer object
[09:15:45] [PASSED] Shared buffer object
[09:15:45] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:15:45] ============== ttm_bo_init_reserved_mock_man ==============
[09:15:45] [PASSED] Buffer object for userspace
[09:15:45] [PASSED] Kernel buffer object
[09:15:45] [PASSED] Shared buffer object
[09:15:45] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:15:45] [PASSED] ttm_bo_init_reserved_resv
[09:15:45] ================== ttm_bo_validate_basic ==================
[09:15:45] [PASSED] Buffer object for userspace
[09:15:45] [PASSED] Kernel buffer object
[09:15:45] [PASSED] Shared buffer object
[09:15:45] ============== [PASSED] ttm_bo_validate_basic ==============
[09:15:45] [PASSED] ttm_bo_validate_invalid_placement
[09:15:45] ============= ttm_bo_validate_same_placement ==============
[09:15:45] [PASSED] System manager
[09:15:45] [PASSED] VRAM manager
[09:15:45] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:15:45] [PASSED] ttm_bo_validate_failed_alloc
[09:15:45] [PASSED] ttm_bo_validate_pinned
[09:15:45] [PASSED] ttm_bo_validate_busy_placement
[09:15:45] ================ ttm_bo_validate_multihop =================
[09:15:45] [PASSED] Buffer object for userspace
[09:15:45] [PASSED] Kernel buffer object
[09:15:45] [PASSED] Shared buffer object
[09:15:45] ============ [PASSED] ttm_bo_validate_multihop =============
[09:15:45] ========== ttm_bo_validate_no_placement_signaled ==========
[09:15:45] [PASSED] Buffer object in system domain, no page vector
[09:15:45] [PASSED] Buffer object in system domain with an existing page vector
[09:15:45] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:15:45] ======== ttm_bo_validate_no_placement_not_signaled ========
[09:15:45] [PASSED] Buffer object for userspace
[09:15:45] [PASSED] Kernel buffer object
[09:15:45] [PASSED] Shared buffer object
[09:15:45] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:15:45] [PASSED] ttm_bo_validate_move_fence_signaled
[09:15:45] ========= ttm_bo_validate_move_fence_not_signaled =========
[09:15:45] [PASSED] Waits for GPU
[09:15:45] [PASSED] Tries to lock straight away
[09:15:45] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:15:45] [PASSED] ttm_bo_validate_swapout
[09:15:45] [PASSED] ttm_bo_validate_happy_evict
[09:15:45] [PASSED] ttm_bo_validate_all_pinned_evict
[09:15:45] [PASSED] ttm_bo_validate_allowed_only_evict
[09:15:45] [PASSED] ttm_bo_validate_deleted_evict
[09:15:45] [PASSED] ttm_bo_validate_busy_domain_evict
[09:15:45] [PASSED] ttm_bo_validate_evict_gutting
[09:15:45] [PASSED] ttm_bo_validate_recrusive_evict
[09:15:45] ================= [PASSED] ttm_bo_validate =================
[09:15:45] ============================================================
[09:15:45] Testing complete. Ran 102 tests: passed: 102
[09:15:45] Elapsed time: 11.887s total, 1.811s configuring, 9.862s building, 0.182s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Xe.CI.BAT: success for SKL_DSSM / DE_CAP fixes (rev2)
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
` (8 preceding siblings ...)
2026-08-05 9:15 ` ✓ CI.KUnit: success for SKL_DSSM / DE_CAP fixes (rev2) Patchwork
@ 2026-08-05 10:22 ` Patchwork
2026-08-05 18:43 ` ✗ Xe.CI.FULL: failure " Patchwork
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-08-05 10:22 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 3599 bytes --]
== Series Details ==
Series: SKL_DSSM / DE_CAP fixes (rev2)
URL : https://patchwork.freedesktop.org/series/171533/
State : success
== Summary ==
CI Bug Log - changes from xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22_BAT -> xe-pw-171533v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 14)
------------------------------
Additional (1): bat-bmg-1
Missing (1): bat-bmg-2
Known issues
------------
Here are the changes found in xe-pw-171533v2_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-bmg-1: NOTRUN -> [SKIP][1] ([Intel XE#2233])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/bat-bmg-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-bmg-1: NOTRUN -> [SKIP][2] ([Intel XE#8265])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/bat-bmg-1/igt@kms_dsc@dsc-basic.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-bmg-1: NOTRUN -> [SKIP][3] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/bat-bmg-1/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@xe_exec_multi_queue@exec-sanity:
- bat-bmg-1: NOTRUN -> [SKIP][4] ([Intel XE#8364]) +13 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/bat-bmg-1/igt@xe_exec_multi_queue@exec-sanity.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-1: NOTRUN -> [SKIP][5] ([Intel XE#2229])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/bat-bmg-1/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_pat@pat-index-xehpc:
- bat-bmg-1: NOTRUN -> [SKIP][6] ([Intel XE#1420] / [Intel XE#7590])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/bat-bmg-1/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- bat-bmg-1: NOTRUN -> [SKIP][7] ([Intel XE#2245] / [Intel XE#7590])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/bat-bmg-1/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- bat-bmg-1: NOTRUN -> [SKIP][8] ([Intel XE#2236] / [Intel XE#7590])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/bat-bmg-1/igt@xe_pat@pat-index-xelpg.html
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
Build changes
-------------
* Linux: xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22 -> xe-pw-171533v2
IGT_9038: 9038
xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22: ae224fc6fb21a5ff9481d608839e03f1f2c13b22
xe-pw-171533v2: 171533v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/index.html
[-- Attachment #2: Type: text/html, Size: 4470 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Xe.CI.FULL: failure for SKL_DSSM / DE_CAP fixes (rev2)
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
` (9 preceding siblings ...)
2026-08-05 10:22 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-08-05 18:43 ` Patchwork
10 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2026-08-05 18:43 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 17597 bytes --]
== Series Details ==
Series: SKL_DSSM / DE_CAP fixes (rev2)
URL : https://patchwork.freedesktop.org/series/171533/
State : failure
== Summary ==
CI Bug Log - changes from xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22_FULL -> xe-pw-171533v2_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-171533v2_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-171533v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-171533v2_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads:
- shard-lnl: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-lnl-1/igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-lnl-7/igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads.html
Known issues
------------
Here are the changes found in xe-pw-171533v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [PASS][3] -> [FAIL][4] ([Intel XE#3718] / [Intel XE#6078])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-b-dp-2:
- shard-bmg: [PASS][5] -> [FAIL][6] ([Intel XE#6078])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-dp-2.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip@pipe-b-dp-2.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#1124]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_bw@linear-tiling-2-displays-target-2160x1440p:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#367])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_bw@linear-tiling-2-displays-target-2160x1440p.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#3432])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2887]) +2 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#7358])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4.html
* igt@kms_chamelium_frames@hdmi-cmp-planar-formats:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2252]) +1 other test skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html
* igt@kms_content_protection@content-type-change:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#7642])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@uevent:
- shard-bmg: NOTRUN -> [FAIL][14] ([Intel XE#6707] / [Intel XE#7439]) +1 other test fail
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-onscreen-128x42:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2320])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_cursor_crc@cursor-onscreen-128x42.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#4354] / [Intel XE#5870])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#8265])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_dsc@dsc-with-output-formats-with-bpc-bigjoiner.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#7178] / [Intel XE#7351])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#7179])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_flip_scaled_crc@flip-p016-linear-to-p016-linear-reflect-x.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#4141]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-fullscreen:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2311]) +12 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-shrfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2313]) +11 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#7061]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-mmap-wc.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#6901])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#7283]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#1489]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr@fbc-pr-cursor-plane-onoff:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
* igt@xe_exec_basic@multigpu-no-exec-rebind:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@xe_exec_basic@multigpu-no-exec-rebind.html
* igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-imm:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#8374]) +3 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-imm.html
* igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#8364]) +3 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@xe_exec_multi_queue@many-execs-preempt-mode-dyn-priority.html
* igt@xe_exec_reset@long-spin-reuse-many-preempt-gt1-threads:
- shard-bmg: [PASS][32] -> [FAIL][33] ([Intel XE#7850])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-bmg-9/igt@xe_exec_reset@long-spin-reuse-many-preempt-gt1-threads.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-8/igt@xe_exec_reset@long-spin-reuse-many-preempt-gt1-threads.html
* igt@xe_exec_system_allocator@threads-many-stride-mmap-free-madvise:
- shard-bmg: [PASS][34] -> [INCOMPLETE][35] ([Intel XE#8159])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-bmg-3/igt@xe_exec_system_allocator@threads-many-stride-mmap-free-madvise.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-4/igt@xe_exec_system_allocator@threads-many-stride-mmap-free-madvise.html
* igt@xe_exec_threads@threads-multi-queue-fd-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#8378]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@xe_exec_threads@threads-multi-queue-fd-userptr-rebind.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init:
- shard-bmg: [PASS][37] -> [ABORT][38] ([Intel XE#8007]) +3 other tests abort
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-bmg-10/igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init.html
* igt@xe_page_reclaim@random:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#7793])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@xe_page_reclaim@random.html
* igt@xe_pm@d3cold-mocs:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#2284] / [Intel XE#7370])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@xe_pm@d3cold-mocs.html
* igt@xe_query@multigpu-query-invalid-cs-cycles:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#944])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@xe_query@multigpu-query-invalid-cs-cycles.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [FAIL][42] ([Intel XE#301]) -> [PASS][43] +1 other test pass
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@xe_exec_reset@long-spin-many-preempt-threads:
- shard-bmg: [FAIL][44] ([Intel XE#7956]) -> [PASS][45] +1 other test pass
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-bmg-9/igt@xe_exec_reset@long-spin-many-preempt-threads.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-1/igt@xe_exec_reset@long-spin-many-preempt-threads.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_device_probe_early:
- shard-bmg: [ABORT][46] ([Intel XE#8007]) -> [PASS][47]
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_device_probe_early.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_device_probe_early.html
#### Warnings ####
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][48] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][49] ([Intel XE#309] / [Intel XE#7343])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#5870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5870
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
[Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7850
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#7956]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7956
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8159]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8159
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22 -> xe-pw-171533v2
IGT_9038: 9038
xe-5544-ae224fc6fb21a5ff9481d608839e03f1f2c13b22: ae224fc6fb21a5ff9481d608839e03f1f2c13b22
xe-pw-171533v2: 171533v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-171533v2/index.html
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^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2026-08-05 18:43 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-08-03 21:49 [PATCH v2 0/4] SKL_DSSM / DE_CAP fixes Michał Grzelak
2026-08-03 21:49 ` [PATCH v2 1/4] drm/i915/display: fix SKL_DSSM register macros Michał Grzelak
2026-08-04 8:01 ` Jani Nikula
2026-08-03 21:49 ` [PATCH v2 2/4] drm/i915/3dlut: disable 3D LUT for pre-GLK Michał Grzelak
2026-08-04 14:39 ` Borah, Chaitanya Kumar
2026-08-03 21:49 ` [PATCH v2 3/4] drm/i915/3dlut: log 3D LUT's status Michał Grzelak
2026-08-03 21:49 ` [PATCH v2 4/4] drm/i915/3dlut: disable 3D LUT if unsupported Michał Grzelak
2026-08-04 14:39 ` Borah, Chaitanya Kumar
2026-08-03 22:00 ` ✓ CI.KUnit: success for SKL_DSSM / DE_CAP fixes Patchwork
2026-08-04 1:19 ` ✓ Xe.CI.FULL: " Patchwork
2026-08-04 12:42 ` ✓ CI.KUnit: " Patchwork
2026-08-05 6:00 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-08-05 9:15 ` ✓ CI.KUnit: success for SKL_DSSM / DE_CAP fixes (rev2) Patchwork
2026-08-05 10:22 ` ✓ Xe.CI.BAT: " Patchwork
2026-08-05 18:43 ` ✗ Xe.CI.FULL: failure " Patchwork
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