Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v2 0/7] Extra enabling patches for NVL-P
@ 2026-03-06 17:28 Gustavo Sousa
  2026-03-06 17:28 ` [PATCH v2 1/7] drm/xe: Modify stepping info directly in xe_step_*_get() Gustavo Sousa
                   ` (9 more replies)
  0 siblings, 10 replies; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-06 17:28 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

This series contains some extra enabling patches for NVL-P.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
Changes in v2:
- Minor update in patch "drm/xe/nvlp: Implement Wa_14026539277" to skip
  the workaround if on a SRIOV VF.
- Link to v1: https://patch.msgid.link/20260305-extra-nvl-p-enabling-patches-v1-0-5020d5289dea@intel.com

---
Gustavo Sousa (7):
      drm/xe: Modify stepping info directly in xe_step_*_get()
      drm/xe: Drop unused IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP()
      drm/xe/nvlp: Read platform-level stepping info
      drm/xe/rtp: Add support for matching platform-level stepping
      drm/xe/nvlp: Implement Wa_14026539277
      drm/xe/xe3p: Drop Wa_16028780921
      drm/xe: Translate C-state "reset value" into RC6

 drivers/gpu/drm/xe/regs/xe_gt_regs.h |  8 ++--
 drivers/gpu/drm/xe/xe_device_types.h | 10 -----
 drivers/gpu/drm/xe/xe_gt.c           | 27 +++++++++++++
 drivers/gpu/drm/xe/xe_guc_pc.c       |  8 ++++
 drivers/gpu/drm/xe/xe_pci.c          |  8 ++--
 drivers/gpu/drm/xe/xe_rtp.c          |  7 ++++
 drivers/gpu/drm/xe/xe_rtp.h          | 20 ++++++++++
 drivers/gpu/drm/xe/xe_rtp_types.h    |  1 +
 drivers/gpu/drm/xe/xe_step.c         | 74 +++++++++++++++++++++++++-----------
 drivers/gpu/drm/xe/xe_step.h         | 10 +++--
 drivers/gpu/drm/xe/xe_step_types.h   |  1 +
 drivers/gpu/drm/xe/xe_wa.c           |  4 --
 drivers/gpu/drm/xe/xe_wa_oob.rules   |  2 +
 13 files changed, 133 insertions(+), 47 deletions(-)
---
base-commit: e4b36c44f536abdf724e6a17700a47ce1631699f
change-id: 20260304-extra-nvl-p-enabling-patches-49ea48e204f5

Best regards,
--  
Gustavo Sousa <gustavo.sousa@intel.com>


^ permalink raw reply	[flat|nested] 16+ messages in thread

* [PATCH v2 1/7] drm/xe: Modify stepping info directly in xe_step_*_get()
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
@ 2026-03-06 17:28 ` Gustavo Sousa
  2026-03-06 17:28 ` [PATCH v2 2/7] drm/xe: Drop unused IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP() Gustavo Sousa
                   ` (8 subsequent siblings)
  9 siblings, 0 replies; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-06 17:28 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

In an upcoming change, we will add a member to struct xe_step_info to
represent the platform-level stepping.  As such, we should stop assigning
the value returned by functions xe_step_pre_gmdid_get() and
xe_step_gmdid_get() directly to xe->info.step.

Since there are no other users for those functions, let's simply update
them to modify xe->info.step directly.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c  |  6 ++---
 drivers/gpu/drm/xe/xe_step.c | 52 +++++++++++++++++++++++++-------------------
 drivers/gpu/drm/xe/xe_step.h |  8 +++----
 3 files changed, 36 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 29f976e66848..72d4131e9775 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -914,7 +914,7 @@ static int xe_info_init(struct xe_device *xe,
 	if (desc->pre_gmdid_graphics_ip) {
 		graphics_ip = desc->pre_gmdid_graphics_ip;
 		media_ip = desc->pre_gmdid_media_ip;
-		xe->info.step = xe_step_pre_gmdid_get(xe);
+		xe_step_pre_gmdid_get(xe);
 	} else {
 		xe_assert(xe, !desc->pre_gmdid_media_ip);
 		ret = handle_gmdid(xe, &graphics_ip, &media_ip,
@@ -922,9 +922,7 @@ static int xe_info_init(struct xe_device *xe,
 		if (ret)
 			return ret;
 
-		xe->info.step = xe_step_gmdid_get(xe,
-						  graphics_gmdid_revid,
-						  media_gmdid_revid);
+		xe_step_gmdid_get(xe, graphics_gmdid_revid, media_gmdid_revid);
 	}
 
 	/*
diff --git a/drivers/gpu/drm/xe/xe_step.c b/drivers/gpu/drm/xe/xe_step.c
index 2860986f82f7..064b604b5b94 100644
--- a/drivers/gpu/drm/xe/xe_step.c
+++ b/drivers/gpu/drm/xe/xe_step.c
@@ -115,15 +115,17 @@ __diag_pop();
  * Convert the PCI revid into proper IP steppings.  This should only be
  * used on platforms that do not have GMD_ID support.
  */
-struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe)
+void xe_step_pre_gmdid_get(struct xe_device *xe)
 {
 	const struct xe_step_info *revids = NULL;
-	struct xe_step_info step = {};
 	u16 revid = xe->info.revid;
 	int size = 0;
 	const int *basedie_info = NULL;
 	int basedie_size = 0;
 	int baseid = 0;
+	u8 graphics = STEP_NONE;
+	u8 media = STEP_NONE;
+	u8 basedie = STEP_NONE;
 
 	if (xe->info.platform == XE_PVC) {
 		baseid = FIELD_GET(GENMASK(5, 3), xe->info.revid);
@@ -166,10 +168,12 @@ struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe)
 
 	/* Not using the stepping scheme for the platform yet. */
 	if (!revids)
-		return step;
+		goto done;
 
 	if (revid < size && revids[revid].graphics != STEP_NONE) {
-		step = revids[revid];
+		graphics = revids[revid].graphics;
+		media = revids[revid].media;
+		basedie = revids[revid].basedie;
 	} else {
 		drm_warn(&xe->drm, "Unknown revid 0x%02x\n", revid);
 
@@ -187,25 +191,30 @@ struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe)
 		if (revid < size) {
 			drm_dbg(&xe->drm, "Using steppings for revid 0x%02x\n",
 				revid);
-			step = revids[revid];
+			graphics = revids[revid].graphics;
+			media = revids[revid].media;
+			basedie = revids[revid].basedie;
 		} else {
 			drm_dbg(&xe->drm, "Using future steppings\n");
-			step.graphics = STEP_FUTURE;
+			graphics = STEP_FUTURE;
 		}
 	}
 
-	drm_WARN_ON(&xe->drm, step.graphics == STEP_NONE);
+	drm_WARN_ON(&xe->drm, graphics == STEP_NONE);
 
 	if (basedie_info && basedie_size) {
 		if (baseid < basedie_size && basedie_info[baseid] != STEP_NONE) {
-			step.basedie = basedie_info[baseid];
+			basedie = basedie_info[baseid];
 		} else {
 			drm_warn(&xe->drm, "Unknown baseid 0x%02x\n", baseid);
-			step.basedie = STEP_FUTURE;
+			basedie = STEP_FUTURE;
 		}
 	}
 
-	return step;
+done:
+	xe->info.step.graphics = graphics;
+	xe->info.step.media = media;
+	xe->info.step.basedie = basedie;
 }
 
 /**
@@ -220,28 +229,27 @@ struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe)
  * all platforms:  major steppings (A0, B0, etc.) are 4 apart, with minor
  * steppings (A1, A2, etc.) taking the values in between.
  */
-struct xe_step_info xe_step_gmdid_get(struct xe_device *xe,
-				      u32 graphics_gmdid_revid,
-				      u32 media_gmdid_revid)
+void xe_step_gmdid_get(struct xe_device *xe,
+		       u32 graphics_gmdid_revid,
+		       u32 media_gmdid_revid)
 {
-	struct xe_step_info step = {
-		.graphics = STEP_A0 + graphics_gmdid_revid,
-		.media = STEP_A0 + media_gmdid_revid,
-	};
+	u8 graphics = STEP_A0 + graphics_gmdid_revid;
+	u8 media = STEP_A0 + media_gmdid_revid;
 
-	if (step.graphics >= STEP_FUTURE) {
-		step.graphics = STEP_FUTURE;
+	if (graphics >= STEP_FUTURE) {
+		graphics = STEP_FUTURE;
 		drm_dbg(&xe->drm, "Graphics GMD_ID revid value %d treated as future stepping\n",
 			graphics_gmdid_revid);
 	}
 
-	if (step.media >= STEP_FUTURE) {
-		step.media = STEP_FUTURE;
+	if (media >= STEP_FUTURE) {
+		media = STEP_FUTURE;
 		drm_dbg(&xe->drm, "Media GMD_ID revid value %d treated as future stepping\n",
 			media_gmdid_revid);
 	}
 
-	return step;
+	xe->info.step.graphics = graphics;
+	xe->info.step.media = media;
 }
 
 #define STEP_NAME_CASE(name)	\
diff --git a/drivers/gpu/drm/xe/xe_step.h b/drivers/gpu/drm/xe/xe_step.h
index 686cb59200c2..6febb7fac476 100644
--- a/drivers/gpu/drm/xe/xe_step.h
+++ b/drivers/gpu/drm/xe/xe_step.h
@@ -12,10 +12,10 @@
 
 struct xe_device;
 
-struct xe_step_info xe_step_pre_gmdid_get(struct xe_device *xe);
-struct xe_step_info xe_step_gmdid_get(struct xe_device *xe,
-				      u32 graphics_gmdid_revid,
-				      u32 media_gmdid_revid);
+void xe_step_pre_gmdid_get(struct xe_device *xe);
+void xe_step_gmdid_get(struct xe_device *xe,
+		       u32 graphics_gmdid_revid,
+		       u32 media_gmdid_revid);
 static inline u32 xe_step_to_gmdid(enum xe_step step) { return step - STEP_A0; }
 
 const char *xe_step_name(enum xe_step step);

-- 
2.52.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 2/7] drm/xe: Drop unused IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP()
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
  2026-03-06 17:28 ` [PATCH v2 1/7] drm/xe: Modify stepping info directly in xe_step_*_get() Gustavo Sousa
@ 2026-03-06 17:28 ` Gustavo Sousa
  2026-03-06 17:28 ` [PATCH v2 3/7] drm/xe/nvlp: Read platform-level stepping info Gustavo Sousa
                   ` (7 subsequent siblings)
  9 siblings, 0 replies; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-06 17:28 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

The macros IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP() are unused since
commit 87c299fa3a97 ("drm/xe/guc: Port Wa_14014475959 to xe_wa and fix
it") and commit 63bbd800ff01 ("drm/xe/guc: Port
Wa_22012727170/Wa_22012727685 to xe_wa"), respectively, and we can drop
them now.  Furthermore, in upcoming changes we will add logic to read
platform-level step information from PCI RevID and keeping those macros
around would potentially cause confusion.

v2:
  - Cite commits that made the macros unused. (Matt)

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_device_types.h | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index e9032014923d..85451cef3c25 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -81,16 +81,6 @@ enum xe_wedged_mode {
 
 #define XE_MAX_ASID	(BIT(20))
 
-#define IS_PLATFORM_STEP(_xe, _platform, min_step, max_step)	\
-	((_xe)->info.platform == (_platform) &&			\
-	 (_xe)->info.step.graphics >= (min_step) &&		\
-	 (_xe)->info.step.graphics < (max_step))
-#define IS_SUBPLATFORM_STEP(_xe, _platform, sub, min_step, max_step)	\
-	((_xe)->info.platform == (_platform) &&				\
-	 (_xe)->info.subplatform == (sub) &&				\
-	 (_xe)->info.step.graphics >= (min_step) &&			\
-	 (_xe)->info.step.graphics < (max_step))
-
 /**
  * struct xe_device - Top level struct of Xe device
  */

-- 
2.52.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 3/7] drm/xe/nvlp: Read platform-level stepping info
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
  2026-03-06 17:28 ` [PATCH v2 1/7] drm/xe: Modify stepping info directly in xe_step_*_get() Gustavo Sousa
  2026-03-06 17:28 ` [PATCH v2 2/7] drm/xe: Drop unused IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP() Gustavo Sousa
@ 2026-03-06 17:28 ` Gustavo Sousa
  2026-03-06 17:28 ` [PATCH v2 4/7] drm/xe/rtp: Add support for matching platform-level stepping Gustavo Sousa
                   ` (6 subsequent siblings)
  9 siblings, 0 replies; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-06 17:28 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

There will be a NVL-P workaround for which we will need to know the
platform-level stepping information in order to decide whether to apply
it or not.

While NVL-P has a nice mapping between the PCI revid and our symbolic
stepping enumeration, not all platforms are like that: (i) Some
platforms will have a single PCI revid used for a set platform level
steppings (ii) and some might even require specific mappings.

To make things simpler, let's include stepping information in the device
info only on demand, for those platforms where it is needed for
workaround checks.

Bspec: 74201
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c        |  2 ++
 drivers/gpu/drm/xe/xe_step.c       | 22 ++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_step.h       |  2 ++
 drivers/gpu/drm/xe/xe_step_types.h |  1 +
 4 files changed, 27 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 72d4131e9775..b9000b5d3ca7 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -904,6 +904,8 @@ static int xe_info_init(struct xe_device *xe,
 	int ret;
 	u8 id;
 
+	xe_step_platform_get(xe);
+
 	/*
 	 * If this platform supports GMD_ID, we'll detect the proper IP
 	 * descriptor to use from hardware registers.
diff --git a/drivers/gpu/drm/xe/xe_step.c b/drivers/gpu/drm/xe/xe_step.c
index 064b604b5b94..d0f888c31831 100644
--- a/drivers/gpu/drm/xe/xe_step.c
+++ b/drivers/gpu/drm/xe/xe_step.c
@@ -108,6 +108,28 @@ static const int pvc_basedie_subids[] = {
 
 __diag_pop();
 
+/**
+ * xe_step_platform_get - Determine platform-level stepping from PCI revid
+ * @xe: Xe device
+ *
+ * Convert the PCI revid into a platform-level stepping value and store that
+ * in the device info.
+ */
+void xe_step_platform_get(struct xe_device *xe)
+{
+	/*
+	 * Not all platforms map PCI revid directly into our symbolic stepping
+	 * enumeration. Some platforms will have a single PCI revid used for a
+	 * range platform level steppings and some might even require specific
+	 * mappings. So prefer to err on the side of caution and include only
+	 * the platforms from which we need the stepping info for workaround
+	 * checks.
+	 */
+
+	if (xe->info.platform == XE_NOVALAKE_P)
+		xe->info.step.platform = STEP_A0 + xe->info.revid;
+}
+
 /**
  * xe_step_pre_gmdid_get - Determine IP steppings from PCI revid
  * @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_step.h b/drivers/gpu/drm/xe/xe_step.h
index 6febb7fac476..41f1c95c46e5 100644
--- a/drivers/gpu/drm/xe/xe_step.h
+++ b/drivers/gpu/drm/xe/xe_step.h
@@ -12,6 +12,8 @@
 
 struct xe_device;
 
+void xe_step_platform_get(struct xe_device *xe);
+
 void xe_step_pre_gmdid_get(struct xe_device *xe);
 void xe_step_gmdid_get(struct xe_device *xe,
 		       u32 graphics_gmdid_revid,
diff --git a/drivers/gpu/drm/xe/xe_step_types.h b/drivers/gpu/drm/xe/xe_step_types.h
index d978cc2512f2..43ca73850739 100644
--- a/drivers/gpu/drm/xe/xe_step_types.h
+++ b/drivers/gpu/drm/xe/xe_step_types.h
@@ -9,6 +9,7 @@
 #include <linux/types.h>
 
 struct xe_step_info {
+	u8 platform;
 	u8 graphics;
 	u8 media;
 	u8 basedie;

-- 
2.52.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 4/7] drm/xe/rtp: Add support for matching platform-level stepping
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
                   ` (2 preceding siblings ...)
  2026-03-06 17:28 ` [PATCH v2 3/7] drm/xe/nvlp: Read platform-level stepping info Gustavo Sousa
@ 2026-03-06 17:28 ` Gustavo Sousa
  2026-03-06 17:28 ` [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277 Gustavo Sousa
                   ` (5 subsequent siblings)
  9 siblings, 0 replies; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-06 17:28 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

Add support for matching platform-level stepping, which will be used for
an upcoming NVL-P workaround.

As support for reading platform-level stepping information is added only
as needed in the driver, add a warning when the rule finds a STEP_NONE
value, which is an indication that the driver is missing such a support.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/xe_rtp.c       |  7 +++++++
 drivers/gpu/drm/xe/xe_rtp.h       | 20 ++++++++++++++++++++
 drivers/gpu/drm/xe/xe_rtp_types.h |  1 +
 3 files changed, 28 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_rtp.c b/drivers/gpu/drm/xe/xe_rtp.c
index 7bfdc6795ce6..991f218f1cc3 100644
--- a/drivers/gpu/drm/xe/xe_rtp.c
+++ b/drivers/gpu/drm/xe/xe_rtp.c
@@ -55,6 +55,13 @@ static bool rule_matches(const struct xe_device *xe,
 			match = xe->info.platform == r->platform &&
 				xe->info.subplatform == r->subplatform;
 			break;
+		case XE_RTP_MATCH_PLATFORM_STEP:
+			if (drm_WARN_ON(&xe->drm, xe->info.step.platform == STEP_NONE))
+				return false;
+
+			match = xe->info.step.platform >= r->step_start &&
+				xe->info.step.platform < r->step_end;
+			break;
 		case XE_RTP_MATCH_GRAPHICS_VERSION:
 			if (drm_WARN_ON(&xe->drm, !gt))
 				return false;
diff --git a/drivers/gpu/drm/xe/xe_rtp.h b/drivers/gpu/drm/xe/xe_rtp.h
index be4195264286..7d6daa7eb1e4 100644
--- a/drivers/gpu/drm/xe/xe_rtp.h
+++ b/drivers/gpu/drm/xe/xe_rtp.h
@@ -35,6 +35,10 @@ struct xe_reg_sr;
 	{ .match_type = XE_RTP_MATCH_SUBPLATFORM,				\
 	  .platform = plat__, .subplatform = sub__ }
 
+#define _XE_RTP_RULE_PLATFORM_STEP(start__, end__)				\
+	{ .match_type = XE_RTP_MATCH_PLATFORM_STEP,				\
+	  .step_start = start__, .step_end = end__ }
+
 #define _XE_RTP_RULE_GRAPHICS_STEP(start__, end__)				\
 	{ .match_type = XE_RTP_MATCH_GRAPHICS_STEP,				\
 	  .step_start = start__, .step_end = end__ }
@@ -66,6 +70,22 @@ struct xe_reg_sr;
 #define XE_RTP_RULE_SUBPLATFORM(plat_, sub_)					\
 	_XE_RTP_RULE_SUBPLATFORM(XE_##plat_, XE_SUBPLATFORM_##plat_##_##sub_)
 
+/**
+ * XE_RTP_RULE_PLATFORM_STEP - Create rule matching platform-level stepping
+ * @start_: First stepping matching the rule
+ * @end_: First stepping that does not match the rule
+ *
+ * Note that the range matching this rule is [ @start_, @end_ ), i.e. inclusive
+ * on the left, exclusive on the right.
+ *
+ * You need to make sure that proper support for reading platform-level stepping
+ * information is present for the target platform before using this rule.
+ *
+ * Refer to XE_RTP_RULES() for expected usage.
+ */
+#define XE_RTP_RULE_PLATFORM_STEP(start_, end_)					\
+	_XE_RTP_RULE_PLATFORM_STEP(STEP_##start_, STEP_##end_)
+
 /**
  * XE_RTP_RULE_GRAPHICS_STEP - Create rule matching graphics stepping
  * @start_: First stepping matching the rule
diff --git a/drivers/gpu/drm/xe/xe_rtp_types.h b/drivers/gpu/drm/xe/xe_rtp_types.h
index 6ba7f226c227..166251615be1 100644
--- a/drivers/gpu/drm/xe/xe_rtp_types.h
+++ b/drivers/gpu/drm/xe/xe_rtp_types.h
@@ -41,6 +41,7 @@ struct xe_rtp_action {
 enum {
 	XE_RTP_MATCH_PLATFORM,
 	XE_RTP_MATCH_SUBPLATFORM,
+	XE_RTP_MATCH_PLATFORM_STEP,
 	XE_RTP_MATCH_GRAPHICS_VERSION,
 	XE_RTP_MATCH_GRAPHICS_VERSION_RANGE,
 	XE_RTP_MATCH_GRAPHICS_VERSION_ANY_GT,

-- 
2.52.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
                   ` (3 preceding siblings ...)
  2026-03-06 17:28 ` [PATCH v2 4/7] drm/xe/rtp: Add support for matching platform-level stepping Gustavo Sousa
@ 2026-03-06 17:28 ` Gustavo Sousa
  2026-03-06 18:39   ` Matt Roper
  2026-03-06 17:28 ` [PATCH v2 6/7] drm/xe/xe3p: Drop Wa_16028780921 Gustavo Sousa
                   ` (4 subsequent siblings)
  9 siblings, 1 reply; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-06 17:28 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

Implement the KMD part of Wa_14026539277, which applies to NVL-P A0.
The KMD implementation is just one component of the workaround, which
also depends on Pcode to implement its part in order to be complete.

v2:
  - Add FUNC(xe_rtp_match_not_sriov_vf) to skip applying the workaround
    to SRIOV VFs. (Matt)

Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h |  4 ++++
 drivers/gpu/drm/xe/xe_gt.c           | 27 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_wa_oob.rules   |  2 ++
 3 files changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 66ddad767ad4..a83cafbe03fd 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -452,6 +452,10 @@
 
 #define XEHPC_L3CLOS_MASK(i)			XE_REG_MCR(0xb194 + (i) * 8)
 
+#define L2COMPUTESIDECTRL			XE_REG_MCR(0xb1c0)
+#define   CECTRL				REG_GENMASK(2, 1)
+#define   CECTRL_CENODATA_ALWAYS		REG_FIELD_PREP(CECTRL, 0x0)
+
 #define XE2_GLOBAL_INVAL			XE_REG(0xb404)
 
 #define XE2LPM_L3SQCREG2			XE_REG_MCR(0xb604)
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index b455af1e6072..3c8692f9b8cf 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -450,6 +450,25 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
 	return err;
 }
 
+static void xe_gt_wa_14026539277(struct xe_gt *gt)
+{
+	u32 val;
+
+	if (!XE_GT_WA(gt, 14026539277))
+		return;
+
+	/*
+	 * L2COMPUTESIDECTRL has a specific offset for media and the GSI offset
+	 * does not apply.
+	 */
+	xe_gt_assert(gt, xe_gt_is_main_type(gt));
+
+	val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL);
+	val &= ~CECTRL;
+	val |= CECTRL_CENODATA_ALWAYS;
+	xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val);
+}
+
 int xe_gt_init_early(struct xe_gt *gt)
 {
 	int err;
@@ -575,6 +594,14 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
 	 */
 	gt->info.gmdid = xe_mmio_read32(&gt->mmio, GMD_ID);
 
+	/*
+	 * Wa_14026539277 can't be implemented as a regular GT workaround (i.e.
+	 * as an entry in gt_was[]) because we would get the hardware already in
+	 * a bad state by the time it would be applied.  Hence, we implement it
+	 * as an OOB workaround and apply it early to prevent that.
+	 */
+	xe_gt_wa_14026539277(gt);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index 80b54b195f20..03a0bf0aeb6e 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -58,3 +58,5 @@
 
 14025883347	MEDIA_VERSION_RANGE(1301, 3503)
 		GRAPHICS_VERSION_RANGE(2004, 3005)
+
+14026539277	PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0), GRAPHICS_VERSION(3510), FUNC(xe_rtp_match_not_sriov_vf)

-- 
2.52.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 6/7] drm/xe/xe3p: Drop Wa_16028780921
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
                   ` (4 preceding siblings ...)
  2026-03-06 17:28 ` [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277 Gustavo Sousa
@ 2026-03-06 17:28 ` Gustavo Sousa
  2026-03-06 17:28 ` [PATCH v2 7/7] drm/xe: Translate C-state "reset value" into RC6 Gustavo Sousa
                   ` (3 subsequent siblings)
  9 siblings, 0 replies; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-06 17:28 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

Wa_16028780921 involves writing to a register that is locked by firmware
prior to driver loading and doesn't have any effect if implemented by
the KMD.  Since the implementation of the workaround actually belongs
the firmware, just drop the ineffective implementation by the KMD.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 ---
 drivers/gpu/drm/xe/xe_wa.c           | 4 ----
 2 files changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index a83cafbe03fd..f49a28f4a330 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -218,9 +218,6 @@
 
 #define GSCPSMI_BASE				XE_REG(0x880c)
 
-#define CCCHKNREG2				XE_REG_MCR(0x881c)
-#define   LOCALITYDIS				REG_BIT(7)
-
 #define CCCHKNREG1				XE_REG_MCR(0x8828)
 #define   L3CMPCTRL				REG_BIT(23)
 #define   ENCOMPPERFFIX				REG_BIT(18)
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 183c5c86c35a..38881b1aaeb1 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -287,10 +287,6 @@ static const struct xe_rtp_entry_sr gt_was[] = {
 	  XE_RTP_ACTIONS(SET(MMIOATSREQLIMIT_GAM_WALK_3D,
 			     DIS_ATS_WRONLY_PG))
 	},
-	{ XE_RTP_NAME("16028780921"),
-	  XE_RTP_RULES(GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0)),
-	  XE_RTP_ACTIONS(SET(CCCHKNREG2, LOCALITYDIS))
-	},
 	{ XE_RTP_NAME("14026144927"),
 	  XE_RTP_RULES(GRAPHICS_VERSION(3510), GRAPHICS_STEP(A0, B0)),
 	  XE_RTP_ACTIONS(SET(L3SQCREG2, L3_SQ_DISABLE_COAMA_2WAY_COH |

-- 
2.52.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH v2 7/7] drm/xe: Translate C-state "reset value" into RC6
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
                   ` (5 preceding siblings ...)
  2026-03-06 17:28 ` [PATCH v2 6/7] drm/xe/xe3p: Drop Wa_16028780921 Gustavo Sousa
@ 2026-03-06 17:28 ` Gustavo Sousa
  2026-03-07  3:18 ` ✓ CI.KUnit: success for Extra enabling patches for NVL-P (rev2) Patchwork
                   ` (2 subsequent siblings)
  9 siblings, 0 replies; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-06 17:28 UTC (permalink / raw)
  To: intel-xe; +Cc: Gustavo Sousa, Matt Roper

There are higher level sleep states that will cause RC6 state readout to
come back with an "in-reset" value. That is the case with NVL-P. As
those states are only possible if the GT is already in C6, let's just
translate the "reset value" into C6 when doing the readout.

Bspec: 67651
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
 drivers/gpu/drm/xe/xe_guc_pc.c       | 8 ++++++++
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index f49a28f4a330..1cc8c7c2d379 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -20,6 +20,7 @@
 #define MTL_MIRROR_TARGET_WP1				XE_REG(0xc60)
 #define   MTL_CAGF_MASK					REG_GENMASK(8, 0)
 #define   MTL_CC_MASK					REG_GENMASK(12, 9)
+#define   MTL_CRST					0xf
 
 /* RPM unit config (Gen8+) */
 #define RPM_CONFIG0					XE_REG(0xd00)
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index 21fe73ab4583..bb8c4e793492 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -756,6 +756,14 @@ enum xe_gt_idle_state xe_guc_pc_c_status(struct xe_guc_pc *pc)
 	if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270) {
 		reg = xe_mmio_read32(&gt->mmio, MTL_MIRROR_TARGET_WP1);
 		gt_c_state = REG_FIELD_GET(MTL_CC_MASK, reg);
+
+		/*
+		 * There are higher level sleep states that will cause this
+		 * field to read out as its reset state, and those are only
+		 * possible after the GT is already in C6.
+		 */
+		if (gt_c_state == MTL_CRST)
+			gt_c_state = GT_C6;
 	} else {
 		reg = xe_mmio_read32(&gt->mmio, GT_CORE_STATUS);
 		gt_c_state = REG_FIELD_GET(RCN_MASK, reg);

-- 
2.52.0


^ permalink raw reply related	[flat|nested] 16+ messages in thread

* Re: [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277
  2026-03-06 17:28 ` [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277 Gustavo Sousa
@ 2026-03-06 18:39   ` Matt Roper
  2026-03-06 19:01     ` Gustavo Sousa
  0 siblings, 1 reply; 16+ messages in thread
From: Matt Roper @ 2026-03-06 18:39 UTC (permalink / raw)
  To: Gustavo Sousa; +Cc: intel-xe

On Fri, Mar 06, 2026 at 02:28:25PM -0300, Gustavo Sousa wrote:
> Implement the KMD part of Wa_14026539277, which applies to NVL-P A0.
> The KMD implementation is just one component of the workaround, which
> also depends on Pcode to implement its part in order to be complete.
> 
> v2:
>   - Add FUNC(xe_rtp_match_not_sriov_vf) to skip applying the workaround
>     to SRIOV VFs. (Matt)
> 
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_gt_regs.h |  4 ++++
>  drivers/gpu/drm/xe/xe_gt.c           | 27 +++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_wa_oob.rules   |  2 ++
>  3 files changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 66ddad767ad4..a83cafbe03fd 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -452,6 +452,10 @@
>  
>  #define XEHPC_L3CLOS_MASK(i)			XE_REG_MCR(0xb194 + (i) * 8)
>  
> +#define L2COMPUTESIDECTRL			XE_REG_MCR(0xb1c0)
> +#define   CECTRL				REG_GENMASK(2, 1)
> +#define   CECTRL_CENODATA_ALWAYS		REG_FIELD_PREP(CECTRL, 0x0)
> +
>  #define XE2_GLOBAL_INVAL			XE_REG(0xb404)
>  
>  #define XE2LPM_L3SQCREG2			XE_REG_MCR(0xb604)
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index b455af1e6072..3c8692f9b8cf 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -450,6 +450,25 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
>  	return err;
>  }
>  
> +static void xe_gt_wa_14026539277(struct xe_gt *gt)
> +{
> +	u32 val;
> +
> +	if (!XE_GT_WA(gt, 14026539277))
> +		return;
> +
> +	/*
> +	 * L2COMPUTESIDECTRL has a specific offset for media and the GSI offset
> +	 * does not apply.
> +	 */
> +	xe_gt_assert(gt, xe_gt_is_main_type(gt));
> +
> +	val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL);
> +	val &= ~CECTRL;
> +	val |= CECTRL_CENODATA_ALWAYS;
> +	xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val);
> +}
> +
>  int xe_gt_init_early(struct xe_gt *gt)
>  {
>  	int err;
> @@ -575,6 +594,14 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
>  	 */
>  	gt->info.gmdid = xe_mmio_read32(&gt->mmio, GMD_ID);
>  
> +	/*
> +	 * Wa_14026539277 can't be implemented as a regular GT workaround (i.e.
> +	 * as an entry in gt_was[]) because we would get the hardware already in
> +	 * a bad state by the time it would be applied.  Hence, we implement it
> +	 * as an OOB workaround and apply it early to prevent that.
> +	 */
> +	xe_gt_wa_14026539277(gt);
> +
>  	return 0;
>  }
>  
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index 80b54b195f20..03a0bf0aeb6e 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -58,3 +58,5 @@
>  
>  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
>  		GRAPHICS_VERSION_RANGE(2004, 3005)
> +
> +14026539277	PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0), GRAPHICS_VERSION(3510), FUNC(xe_rtp_match_not_sriov_vf)

I don't think it's right that we have both platform matches and IP
matches here; that's not something that should usually happen because
the workaround is either tied to the platform (NVL) or tied to the IP
(Xe3p_LPG).  For device workarounds, the handling in our graphics
workaround database can be a bit confusing since what we're looking at
is really just a proxy/placeholder ticket for something that was filed
in a different database originally.  Due to how the databases work, they
have to slap some IP release on the proxy ticket, but in this case we
don't need to add a match for those to our driver rules; just the
platform information is sufficient.

That would also mean that this should probably be an XE_DEVICE_WA()
rather than an XE_GT_WA() and the workaround function we're adding here
should be renamed.


Matt

> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277
  2026-03-06 18:39   ` Matt Roper
@ 2026-03-06 19:01     ` Gustavo Sousa
  2026-03-06 19:09       ` Matt Roper
  0 siblings, 1 reply; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-06 19:01 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-xe

Matt Roper <matthew.d.roper@intel.com> writes:

> On Fri, Mar 06, 2026 at 02:28:25PM -0300, Gustavo Sousa wrote:
>> Implement the KMD part of Wa_14026539277, which applies to NVL-P A0.
>> The KMD implementation is just one component of the workaround, which
>> also depends on Pcode to implement its part in order to be complete.
>> 
>> v2:
>>   - Add FUNC(xe_rtp_match_not_sriov_vf) to skip applying the workaround
>>     to SRIOV VFs. (Matt)
>> 
>> Cc: Matt Roper <matthew.d.roper@intel.com>
>> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> ---
>>  drivers/gpu/drm/xe/regs/xe_gt_regs.h |  4 ++++
>>  drivers/gpu/drm/xe/xe_gt.c           | 27 +++++++++++++++++++++++++++
>>  drivers/gpu/drm/xe/xe_wa_oob.rules   |  2 ++
>>  3 files changed, 33 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> index 66ddad767ad4..a83cafbe03fd 100644
>> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> @@ -452,6 +452,10 @@
>>  
>>  #define XEHPC_L3CLOS_MASK(i)			XE_REG_MCR(0xb194 + (i) * 8)
>>  
>> +#define L2COMPUTESIDECTRL			XE_REG_MCR(0xb1c0)
>> +#define   CECTRL				REG_GENMASK(2, 1)
>> +#define   CECTRL_CENODATA_ALWAYS		REG_FIELD_PREP(CECTRL, 0x0)
>> +
>>  #define XE2_GLOBAL_INVAL			XE_REG(0xb404)
>>  
>>  #define XE2LPM_L3SQCREG2			XE_REG_MCR(0xb604)
>> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>> index b455af1e6072..3c8692f9b8cf 100644
>> --- a/drivers/gpu/drm/xe/xe_gt.c
>> +++ b/drivers/gpu/drm/xe/xe_gt.c
>> @@ -450,6 +450,25 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
>>  	return err;
>>  }
>>  
>> +static void xe_gt_wa_14026539277(struct xe_gt *gt)
>> +{
>> +	u32 val;
>> +
>> +	if (!XE_GT_WA(gt, 14026539277))
>> +		return;
>> +
>> +	/*
>> +	 * L2COMPUTESIDECTRL has a specific offset for media and the GSI offset
>> +	 * does not apply.
>> +	 */
>> +	xe_gt_assert(gt, xe_gt_is_main_type(gt));
>> +
>> +	val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL);
>> +	val &= ~CECTRL;
>> +	val |= CECTRL_CENODATA_ALWAYS;
>> +	xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val);
>> +}
>> +
>>  int xe_gt_init_early(struct xe_gt *gt)
>>  {
>>  	int err;
>> @@ -575,6 +594,14 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
>>  	 */
>>  	gt->info.gmdid = xe_mmio_read32(&gt->mmio, GMD_ID);
>>  
>> +	/*
>> +	 * Wa_14026539277 can't be implemented as a regular GT workaround (i.e.
>> +	 * as an entry in gt_was[]) because we would get the hardware already in
>> +	 * a bad state by the time it would be applied.  Hence, we implement it
>> +	 * as an OOB workaround and apply it early to prevent that.
>> +	 */
>> +	xe_gt_wa_14026539277(gt);
>> +
>>  	return 0;
>>  }
>>  
>> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
>> index 80b54b195f20..03a0bf0aeb6e 100644
>> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
>> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
>> @@ -58,3 +58,5 @@
>>  
>>  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
>>  		GRAPHICS_VERSION_RANGE(2004, 3005)
>> +
>> +14026539277	PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0), GRAPHICS_VERSION(3510), FUNC(xe_rtp_match_not_sriov_vf)
>
> I don't think it's right that we have both platform matches and IP
> matches here; that's not something that should usually happen because
> the workaround is either tied to the platform (NVL) or tied to the IP
> (Xe3p_LPG).  For device workarounds, the handling in our graphics
> workaround database can be a bit confusing since what we're looking at
> is really just a proxy/placeholder ticket for something that was filed
> in a different database originally.  Due to how the databases work, they
> have to slap some IP release on the proxy ticket, but in this case we
> don't need to add a match for those to our driver rules; just the
> platform information is sufficient.
>
> That would also mean that this should probably be an XE_DEVICE_WA()
> rather than an XE_GT_WA() and the workaround function we're adding here
> should be renamed.

Hm... But are we meant to apply the programming to the media GT as well?
I thought the issue for this workaround was observed only on the primary
GT.

So, should we make this a device workaround and add then make sure that
we apply it only on the primary GT in the function that implements it?

We will probably need to rework device OOB workarounds in
order to make this change, because stepping information is not ready by
the time device OOB workarounds are matched (i.e. when
xe_wa_process_device_oob() is called before we read the stepping
information into the device info).

--
Gustavo Sousa

>
>
> Matt
>
>> 
>> -- 
>> 2.52.0
>> 
>
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277
  2026-03-06 19:01     ` Gustavo Sousa
@ 2026-03-06 19:09       ` Matt Roper
  2026-03-09 13:25         ` Gustavo Sousa
  0 siblings, 1 reply; 16+ messages in thread
From: Matt Roper @ 2026-03-06 19:09 UTC (permalink / raw)
  To: Gustavo Sousa; +Cc: intel-xe

On Fri, Mar 06, 2026 at 04:01:05PM -0300, Gustavo Sousa wrote:
> Matt Roper <matthew.d.roper@intel.com> writes:
> 
> > On Fri, Mar 06, 2026 at 02:28:25PM -0300, Gustavo Sousa wrote:
> >> Implement the KMD part of Wa_14026539277, which applies to NVL-P A0.
> >> The KMD implementation is just one component of the workaround, which
> >> also depends on Pcode to implement its part in order to be complete.
> >> 
> >> v2:
> >>   - Add FUNC(xe_rtp_match_not_sriov_vf) to skip applying the workaround
> >>     to SRIOV VFs. (Matt)
> >> 
> >> Cc: Matt Roper <matthew.d.roper@intel.com>
> >> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
> >> ---
> >>  drivers/gpu/drm/xe/regs/xe_gt_regs.h |  4 ++++
> >>  drivers/gpu/drm/xe/xe_gt.c           | 27 +++++++++++++++++++++++++++
> >>  drivers/gpu/drm/xe/xe_wa_oob.rules   |  2 ++
> >>  3 files changed, 33 insertions(+)
> >> 
> >> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> >> index 66ddad767ad4..a83cafbe03fd 100644
> >> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> >> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> >> @@ -452,6 +452,10 @@
> >>  
> >>  #define XEHPC_L3CLOS_MASK(i)			XE_REG_MCR(0xb194 + (i) * 8)
> >>  
> >> +#define L2COMPUTESIDECTRL			XE_REG_MCR(0xb1c0)
> >> +#define   CECTRL				REG_GENMASK(2, 1)
> >> +#define   CECTRL_CENODATA_ALWAYS		REG_FIELD_PREP(CECTRL, 0x0)
> >> +
> >>  #define XE2_GLOBAL_INVAL			XE_REG(0xb404)
> >>  
> >>  #define XE2LPM_L3SQCREG2			XE_REG_MCR(0xb604)
> >> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> >> index b455af1e6072..3c8692f9b8cf 100644
> >> --- a/drivers/gpu/drm/xe/xe_gt.c
> >> +++ b/drivers/gpu/drm/xe/xe_gt.c
> >> @@ -450,6 +450,25 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
> >>  	return err;
> >>  }
> >>  
> >> +static void xe_gt_wa_14026539277(struct xe_gt *gt)
> >> +{
> >> +	u32 val;
> >> +
> >> +	if (!XE_GT_WA(gt, 14026539277))
> >> +		return;
> >> +
> >> +	/*
> >> +	 * L2COMPUTESIDECTRL has a specific offset for media and the GSI offset
> >> +	 * does not apply.
> >> +	 */
> >> +	xe_gt_assert(gt, xe_gt_is_main_type(gt));
> >> +
> >> +	val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL);
> >> +	val &= ~CECTRL;
> >> +	val |= CECTRL_CENODATA_ALWAYS;
> >> +	xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val);
> >> +}
> >> +
> >>  int xe_gt_init_early(struct xe_gt *gt)
> >>  {
> >>  	int err;
> >> @@ -575,6 +594,14 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
> >>  	 */
> >>  	gt->info.gmdid = xe_mmio_read32(&gt->mmio, GMD_ID);
> >>  
> >> +	/*
> >> +	 * Wa_14026539277 can't be implemented as a regular GT workaround (i.e.
> >> +	 * as an entry in gt_was[]) because we would get the hardware already in
> >> +	 * a bad state by the time it would be applied.  Hence, we implement it
> >> +	 * as an OOB workaround and apply it early to prevent that.
> >> +	 */
> >> +	xe_gt_wa_14026539277(gt);
> >> +
> >>  	return 0;
> >>  }
> >>  
> >> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> >> index 80b54b195f20..03a0bf0aeb6e 100644
> >> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> >> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> >> @@ -58,3 +58,5 @@
> >>  
> >>  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
> >>  		GRAPHICS_VERSION_RANGE(2004, 3005)
> >> +
> >> +14026539277	PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0), GRAPHICS_VERSION(3510), FUNC(xe_rtp_match_not_sriov_vf)
> >
> > I don't think it's right that we have both platform matches and IP
> > matches here; that's not something that should usually happen because
> > the workaround is either tied to the platform (NVL) or tied to the IP
> > (Xe3p_LPG).  For device workarounds, the handling in our graphics
> > workaround database can be a bit confusing since what we're looking at
> > is really just a proxy/placeholder ticket for something that was filed
> > in a different database originally.  Due to how the databases work, they
> > have to slap some IP release on the proxy ticket, but in this case we
> > don't need to add a match for those to our driver rules; just the
> > platform information is sufficient.
> >
> > That would also mean that this should probably be an XE_DEVICE_WA()
> > rather than an XE_GT_WA() and the workaround function we're adding here
> > should be renamed.
> 
> Hm... But are we meant to apply the programming to the media GT as well?
> I thought the issue for this workaround was observed only on the primary
> GT.
> 

Device workarounds operate on the xe_device rather than on any xe_gt.
So if a device workaround asks you to do something with with GTs, you
need to extract the relevant GTs from the device.  Novalake is
single-tile, so in this case we'd do something like

     struct xe_gt *gt = xe_device_get_root_tile(xe)->primary_gt;

to grab the primary GT if that's what we're supposed to be working with.

> So, should we make this a device workaround and add then make sure that
> we apply it only on the primary GT in the function that implements it?
> 
> We will probably need to rework device OOB workarounds in
> order to make this change, because stepping information is not ready by
> the time device OOB workarounds are matched (i.e. when
> xe_wa_process_device_oob() is called before we read the stepping
> information into the device info).

I guess we should just move the device stepping determination earlier.
Figuring out the platform stepping only requires information from the
PCI config space so it should be possible to do before anything else in
the driver (i.e., we don't even need the MMIO BARs mapped yet to be able
to determine the platform stepping --- and in theory there could be
device workarounds that need to be taken into account during the very
earliest parts of driver initialization).


Matt

> 
> --
> Gustavo Sousa
> 
> >
> >
> > Matt
> >
> >> 
> >> -- 
> >> 2.52.0
> >> 
> >
> > -- 
> > Matt Roper
> > Graphics Software Engineer
> > Linux GPU Platform Enablement
> > Intel Corporation

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

^ permalink raw reply	[flat|nested] 16+ messages in thread

* ✓ CI.KUnit: success for Extra enabling patches for NVL-P (rev2)
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
                   ` (6 preceding siblings ...)
  2026-03-06 17:28 ` [PATCH v2 7/7] drm/xe: Translate C-state "reset value" into RC6 Gustavo Sousa
@ 2026-03-07  3:18 ` Patchwork
  2026-03-07  4:44 ` ✓ Xe.CI.BAT: " Patchwork
  2026-03-08  7:59 ` ✓ Xe.CI.FULL: " Patchwork
  9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2026-03-07  3:18 UTC (permalink / raw)
  To: Gustavo Sousa; +Cc: intel-xe

== Series Details ==

Series: Extra enabling patches for NVL-P (rev2)
URL   : https://patchwork.freedesktop.org/series/162666/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[03:17:37] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:17:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:18:11] Starting KUnit Kernel (1/1)...
[03:18:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:18:12] ================== guc_buf (11 subtests) ===================
[03:18:12] [PASSED] test_smallest
[03:18:12] [PASSED] test_largest
[03:18:12] [PASSED] test_granular
[03:18:12] [PASSED] test_unique
[03:18:12] [PASSED] test_overlap
[03:18:12] [PASSED] test_reusable
[03:18:12] [PASSED] test_too_big
[03:18:12] [PASSED] test_flush
[03:18:12] [PASSED] test_lookup
[03:18:12] [PASSED] test_data
[03:18:12] [PASSED] test_class
[03:18:12] ===================== [PASSED] guc_buf =====================
[03:18:12] =================== guc_dbm (7 subtests) ===================
[03:18:12] [PASSED] test_empty
[03:18:12] [PASSED] test_default
[03:18:12] ======================== test_size  ========================
[03:18:12] [PASSED] 4
[03:18:12] [PASSED] 8
[03:18:12] [PASSED] 32
[03:18:12] [PASSED] 256
[03:18:12] ==================== [PASSED] test_size ====================
[03:18:12] ======================= test_reuse  ========================
[03:18:12] [PASSED] 4
[03:18:12] [PASSED] 8
[03:18:12] [PASSED] 32
[03:18:12] [PASSED] 256
[03:18:12] =================== [PASSED] test_reuse ====================
[03:18:12] =================== test_range_overlap  ====================
[03:18:12] [PASSED] 4
[03:18:12] [PASSED] 8
[03:18:12] [PASSED] 32
[03:18:12] [PASSED] 256
[03:18:12] =============== [PASSED] test_range_overlap ================
[03:18:12] =================== test_range_compact  ====================
[03:18:12] [PASSED] 4
[03:18:12] [PASSED] 8
[03:18:12] [PASSED] 32
[03:18:12] [PASSED] 256
[03:18:12] =============== [PASSED] test_range_compact ================
[03:18:12] ==================== test_range_spare  =====================
[03:18:12] [PASSED] 4
[03:18:12] [PASSED] 8
[03:18:12] [PASSED] 32
[03:18:12] [PASSED] 256
[03:18:12] ================ [PASSED] test_range_spare =================
[03:18:12] ===================== [PASSED] guc_dbm =====================
[03:18:12] =================== guc_idm (6 subtests) ===================
[03:18:12] [PASSED] bad_init
[03:18:12] [PASSED] no_init
[03:18:12] [PASSED] init_fini
[03:18:12] [PASSED] check_used
[03:18:12] [PASSED] check_quota
[03:18:12] [PASSED] check_all
[03:18:12] ===================== [PASSED] guc_idm =====================
[03:18:12] ================== no_relay (3 subtests) ===================
[03:18:12] [PASSED] xe_drops_guc2pf_if_not_ready
[03:18:12] [PASSED] xe_drops_guc2vf_if_not_ready
[03:18:12] [PASSED] xe_rejects_send_if_not_ready
[03:18:12] ==================== [PASSED] no_relay =====================
[03:18:12] ================== pf_relay (14 subtests) ==================
[03:18:12] [PASSED] pf_rejects_guc2pf_too_short
[03:18:12] [PASSED] pf_rejects_guc2pf_too_long
[03:18:12] [PASSED] pf_rejects_guc2pf_no_payload
[03:18:12] [PASSED] pf_fails_no_payload
[03:18:12] [PASSED] pf_fails_bad_origin
[03:18:12] [PASSED] pf_fails_bad_type
[03:18:12] [PASSED] pf_txn_reports_error
[03:18:12] [PASSED] pf_txn_sends_pf2guc
[03:18:12] [PASSED] pf_sends_pf2guc
[03:18:12] [SKIPPED] pf_loopback_nop
[03:18:12] [SKIPPED] pf_loopback_echo
[03:18:12] [SKIPPED] pf_loopback_fail
[03:18:12] [SKIPPED] pf_loopback_busy
[03:18:12] [SKIPPED] pf_loopback_retry
[03:18:12] ==================== [PASSED] pf_relay =====================
[03:18:12] ================== vf_relay (3 subtests) ===================
[03:18:12] [PASSED] vf_rejects_guc2vf_too_short
[03:18:12] [PASSED] vf_rejects_guc2vf_too_long
[03:18:12] [PASSED] vf_rejects_guc2vf_no_payload
[03:18:12] ==================== [PASSED] vf_relay =====================
[03:18:12] ================ pf_gt_config (9 subtests) =================
[03:18:12] [PASSED] fair_contexts_1vf
[03:18:12] [PASSED] fair_doorbells_1vf
[03:18:12] [PASSED] fair_ggtt_1vf
[03:18:12] ====================== fair_vram_1vf  ======================
[03:18:12] [PASSED] 3.50 GiB
[03:18:12] [PASSED] 11.5 GiB
[03:18:12] [PASSED] 15.5 GiB
[03:18:12] [PASSED] 31.5 GiB
[03:18:12] [PASSED] 63.5 GiB
[03:18:12] [PASSED] 1.91 GiB
[03:18:12] ================== [PASSED] fair_vram_1vf ==================
[03:18:12] ================ fair_vram_1vf_admin_only  =================
[03:18:12] [PASSED] 3.50 GiB
[03:18:12] [PASSED] 11.5 GiB
[03:18:12] [PASSED] 15.5 GiB
[03:18:12] [PASSED] 31.5 GiB
[03:18:12] [PASSED] 63.5 GiB
[03:18:12] [PASSED] 1.91 GiB
[03:18:12] ============ [PASSED] fair_vram_1vf_admin_only =============
[03:18:12] ====================== fair_contexts  ======================
[03:18:12] [PASSED] 1 VF
[03:18:12] [PASSED] 2 VFs
[03:18:12] [PASSED] 3 VFs
[03:18:12] [PASSED] 4 VFs
[03:18:12] [PASSED] 5 VFs
[03:18:12] [PASSED] 6 VFs
[03:18:12] [PASSED] 7 VFs
[03:18:12] [PASSED] 8 VFs
[03:18:12] [PASSED] 9 VFs
[03:18:12] [PASSED] 10 VFs
[03:18:12] [PASSED] 11 VFs
[03:18:12] [PASSED] 12 VFs
[03:18:12] [PASSED] 13 VFs
[03:18:12] [PASSED] 14 VFs
[03:18:12] [PASSED] 15 VFs
[03:18:12] [PASSED] 16 VFs
[03:18:12] [PASSED] 17 VFs
[03:18:12] [PASSED] 18 VFs
[03:18:12] [PASSED] 19 VFs
[03:18:12] [PASSED] 20 VFs
[03:18:12] [PASSED] 21 VFs
[03:18:12] [PASSED] 22 VFs
[03:18:12] [PASSED] 23 VFs
[03:18:12] [PASSED] 24 VFs
[03:18:12] [PASSED] 25 VFs
[03:18:12] [PASSED] 26 VFs
[03:18:12] [PASSED] 27 VFs
[03:18:12] [PASSED] 28 VFs
[03:18:12] [PASSED] 29 VFs
[03:18:12] [PASSED] 30 VFs
[03:18:12] [PASSED] 31 VFs
[03:18:12] [PASSED] 32 VFs
[03:18:12] [PASSED] 33 VFs
[03:18:12] [PASSED] 34 VFs
[03:18:12] [PASSED] 35 VFs
[03:18:12] [PASSED] 36 VFs
[03:18:12] [PASSED] 37 VFs
[03:18:12] [PASSED] 38 VFs
[03:18:12] [PASSED] 39 VFs
[03:18:12] [PASSED] 40 VFs
[03:18:12] [PASSED] 41 VFs
[03:18:12] [PASSED] 42 VFs
[03:18:12] [PASSED] 43 VFs
[03:18:12] [PASSED] 44 VFs
[03:18:12] [PASSED] 45 VFs
[03:18:12] [PASSED] 46 VFs
[03:18:12] [PASSED] 47 VFs
[03:18:12] [PASSED] 48 VFs
[03:18:12] [PASSED] 49 VFs
[03:18:12] [PASSED] 50 VFs
[03:18:12] [PASSED] 51 VFs
[03:18:12] [PASSED] 52 VFs
[03:18:12] [PASSED] 53 VFs
[03:18:12] [PASSED] 54 VFs
[03:18:12] [PASSED] 55 VFs
[03:18:12] [PASSED] 56 VFs
[03:18:12] [PASSED] 57 VFs
[03:18:12] [PASSED] 58 VFs
[03:18:12] [PASSED] 59 VFs
[03:18:12] [PASSED] 60 VFs
[03:18:12] [PASSED] 61 VFs
[03:18:12] [PASSED] 62 VFs
[03:18:12] [PASSED] 63 VFs
[03:18:12] ================== [PASSED] fair_contexts ==================
[03:18:12] ===================== fair_doorbells  ======================
[03:18:12] [PASSED] 1 VF
[03:18:12] [PASSED] 2 VFs
[03:18:12] [PASSED] 3 VFs
[03:18:12] [PASSED] 4 VFs
[03:18:12] [PASSED] 5 VFs
[03:18:12] [PASSED] 6 VFs
[03:18:12] [PASSED] 7 VFs
[03:18:12] [PASSED] 8 VFs
[03:18:12] [PASSED] 9 VFs
[03:18:12] [PASSED] 10 VFs
[03:18:12] [PASSED] 11 VFs
[03:18:12] [PASSED] 12 VFs
[03:18:12] [PASSED] 13 VFs
[03:18:12] [PASSED] 14 VFs
[03:18:12] [PASSED] 15 VFs
[03:18:12] [PASSED] 16 VFs
[03:18:12] [PASSED] 17 VFs
[03:18:12] [PASSED] 18 VFs
[03:18:12] [PASSED] 19 VFs
[03:18:12] [PASSED] 20 VFs
[03:18:12] [PASSED] 21 VFs
[03:18:12] [PASSED] 22 VFs
[03:18:12] [PASSED] 23 VFs
[03:18:12] [PASSED] 24 VFs
[03:18:12] [PASSED] 25 VFs
[03:18:12] [PASSED] 26 VFs
[03:18:12] [PASSED] 27 VFs
[03:18:12] [PASSED] 28 VFs
[03:18:12] [PASSED] 29 VFs
[03:18:12] [PASSED] 30 VFs
[03:18:12] [PASSED] 31 VFs
[03:18:12] [PASSED] 32 VFs
[03:18:12] [PASSED] 33 VFs
[03:18:12] [PASSED] 34 VFs
[03:18:12] [PASSED] 35 VFs
[03:18:12] [PASSED] 36 VFs
[03:18:12] [PASSED] 37 VFs
[03:18:12] [PASSED] 38 VFs
[03:18:12] [PASSED] 39 VFs
[03:18:12] [PASSED] 40 VFs
[03:18:12] [PASSED] 41 VFs
[03:18:12] [PASSED] 42 VFs
[03:18:12] [PASSED] 43 VFs
[03:18:12] [PASSED] 44 VFs
[03:18:12] [PASSED] 45 VFs
[03:18:12] [PASSED] 46 VFs
[03:18:12] [PASSED] 47 VFs
[03:18:12] [PASSED] 48 VFs
[03:18:12] [PASSED] 49 VFs
[03:18:12] [PASSED] 50 VFs
[03:18:12] [PASSED] 51 VFs
[03:18:12] [PASSED] 52 VFs
[03:18:12] [PASSED] 53 VFs
[03:18:12] [PASSED] 54 VFs
[03:18:12] [PASSED] 55 VFs
[03:18:12] [PASSED] 56 VFs
[03:18:12] [PASSED] 57 VFs
[03:18:12] [PASSED] 58 VFs
[03:18:12] [PASSED] 59 VFs
[03:18:12] [PASSED] 60 VFs
[03:18:12] [PASSED] 61 VFs
[03:18:12] [PASSED] 62 VFs
[03:18:12] [PASSED] 63 VFs
[03:18:12] ================= [PASSED] fair_doorbells ==================
[03:18:12] ======================== fair_ggtt  ========================
[03:18:12] [PASSED] 1 VF
[03:18:12] [PASSED] 2 VFs
[03:18:12] [PASSED] 3 VFs
[03:18:12] [PASSED] 4 VFs
[03:18:12] [PASSED] 5 VFs
[03:18:12] [PASSED] 6 VFs
[03:18:12] [PASSED] 7 VFs
[03:18:12] [PASSED] 8 VFs
[03:18:12] [PASSED] 9 VFs
[03:18:12] [PASSED] 10 VFs
[03:18:12] [PASSED] 11 VFs
[03:18:12] [PASSED] 12 VFs
[03:18:12] [PASSED] 13 VFs
[03:18:12] [PASSED] 14 VFs
[03:18:12] [PASSED] 15 VFs
[03:18:12] [PASSED] 16 VFs
[03:18:12] [PASSED] 17 VFs
[03:18:12] [PASSED] 18 VFs
[03:18:12] [PASSED] 19 VFs
[03:18:12] [PASSED] 20 VFs
[03:18:12] [PASSED] 21 VFs
[03:18:12] [PASSED] 22 VFs
[03:18:12] [PASSED] 23 VFs
[03:18:12] [PASSED] 24 VFs
[03:18:12] [PASSED] 25 VFs
[03:18:12] [PASSED] 26 VFs
[03:18:12] [PASSED] 27 VFs
[03:18:12] [PASSED] 28 VFs
[03:18:12] [PASSED] 29 VFs
[03:18:12] [PASSED] 30 VFs
[03:18:12] [PASSED] 31 VFs
[03:18:12] [PASSED] 32 VFs
[03:18:12] [PASSED] 33 VFs
[03:18:12] [PASSED] 34 VFs
[03:18:12] [PASSED] 35 VFs
[03:18:12] [PASSED] 36 VFs
[03:18:12] [PASSED] 37 VFs
[03:18:12] [PASSED] 38 VFs
[03:18:12] [PASSED] 39 VFs
[03:18:12] [PASSED] 40 VFs
[03:18:12] [PASSED] 41 VFs
[03:18:12] [PASSED] 42 VFs
[03:18:12] [PASSED] 43 VFs
[03:18:12] [PASSED] 44 VFs
[03:18:12] [PASSED] 45 VFs
[03:18:12] [PASSED] 46 VFs
[03:18:12] [PASSED] 47 VFs
[03:18:12] [PASSED] 48 VFs
[03:18:12] [PASSED] 49 VFs
[03:18:12] [PASSED] 50 VFs
[03:18:12] [PASSED] 51 VFs
[03:18:12] [PASSED] 52 VFs
[03:18:12] [PASSED] 53 VFs
[03:18:12] [PASSED] 54 VFs
[03:18:12] [PASSED] 55 VFs
[03:18:12] [PASSED] 56 VFs
[03:18:12] [PASSED] 57 VFs
[03:18:12] [PASSED] 58 VFs
[03:18:12] [PASSED] 59 VFs
[03:18:12] [PASSED] 60 VFs
[03:18:12] [PASSED] 61 VFs
[03:18:12] [PASSED] 62 VFs
[03:18:12] [PASSED] 63 VFs
[03:18:12] ==================== [PASSED] fair_ggtt ====================
[03:18:12] ======================== fair_vram  ========================
[03:18:12] [PASSED] 1 VF
[03:18:12] [PASSED] 2 VFs
[03:18:12] [PASSED] 3 VFs
[03:18:12] [PASSED] 4 VFs
[03:18:12] [PASSED] 5 VFs
[03:18:12] [PASSED] 6 VFs
[03:18:12] [PASSED] 7 VFs
[03:18:12] [PASSED] 8 VFs
[03:18:12] [PASSED] 9 VFs
[03:18:12] [PASSED] 10 VFs
[03:18:12] [PASSED] 11 VFs
[03:18:12] [PASSED] 12 VFs
[03:18:12] [PASSED] 13 VFs
[03:18:12] [PASSED] 14 VFs
[03:18:12] [PASSED] 15 VFs
[03:18:12] [PASSED] 16 VFs
[03:18:12] [PASSED] 17 VFs
[03:18:12] [PASSED] 18 VFs
[03:18:12] [PASSED] 19 VFs
[03:18:12] [PASSED] 20 VFs
[03:18:12] [PASSED] 21 VFs
[03:18:12] [PASSED] 22 VFs
[03:18:12] [PASSED] 23 VFs
[03:18:12] [PASSED] 24 VFs
[03:18:12] [PASSED] 25 VFs
[03:18:12] [PASSED] 26 VFs
[03:18:12] [PASSED] 27 VFs
[03:18:12] [PASSED] 28 VFs
[03:18:12] [PASSED] 29 VFs
[03:18:12] [PASSED] 30 VFs
[03:18:12] [PASSED] 31 VFs
[03:18:12] [PASSED] 32 VFs
[03:18:12] [PASSED] 33 VFs
[03:18:12] [PASSED] 34 VFs
[03:18:12] [PASSED] 35 VFs
[03:18:12] [PASSED] 36 VFs
[03:18:12] [PASSED] 37 VFs
[03:18:12] [PASSED] 38 VFs
[03:18:12] [PASSED] 39 VFs
[03:18:12] [PASSED] 40 VFs
[03:18:12] [PASSED] 41 VFs
[03:18:12] [PASSED] 42 VFs
[03:18:12] [PASSED] 43 VFs
[03:18:12] [PASSED] 44 VFs
[03:18:12] [PASSED] 45 VFs
[03:18:12] [PASSED] 46 VFs
[03:18:12] [PASSED] 47 VFs
[03:18:12] [PASSED] 48 VFs
[03:18:12] [PASSED] 49 VFs
[03:18:12] [PASSED] 50 VFs
[03:18:12] [PASSED] 51 VFs
[03:18:12] [PASSED] 52 VFs
[03:18:12] [PASSED] 53 VFs
[03:18:12] [PASSED] 54 VFs
[03:18:12] [PASSED] 55 VFs
[03:18:12] [PASSED] 56 VFs
[03:18:12] [PASSED] 57 VFs
[03:18:12] [PASSED] 58 VFs
[03:18:12] [PASSED] 59 VFs
[03:18:12] [PASSED] 60 VFs
[03:18:12] [PASSED] 61 VFs
[03:18:12] [PASSED] 62 VFs
[03:18:12] [PASSED] 63 VFs
[03:18:12] ==================== [PASSED] fair_vram ====================
[03:18:12] ================== [PASSED] pf_gt_config ===================
[03:18:12] ===================== lmtt (1 subtest) =====================
[03:18:12] ======================== test_ops  =========================
[03:18:12] [PASSED] 2-level
[03:18:12] [PASSED] multi-level
[03:18:12] ==================== [PASSED] test_ops =====================
[03:18:12] ====================== [PASSED] lmtt =======================
[03:18:12] ================= pf_service (11 subtests) =================
[03:18:12] [PASSED] pf_negotiate_any
[03:18:12] [PASSED] pf_negotiate_base_match
[03:18:12] [PASSED] pf_negotiate_base_newer
[03:18:12] [PASSED] pf_negotiate_base_next
[03:18:12] [SKIPPED] pf_negotiate_base_older
[03:18:12] [PASSED] pf_negotiate_base_prev
[03:18:12] [PASSED] pf_negotiate_latest_match
[03:18:12] [PASSED] pf_negotiate_latest_newer
[03:18:12] [PASSED] pf_negotiate_latest_next
[03:18:12] [SKIPPED] pf_negotiate_latest_older
[03:18:12] [SKIPPED] pf_negotiate_latest_prev
[03:18:12] =================== [PASSED] pf_service ====================
[03:18:12] ================= xe_guc_g2g (2 subtests) ==================
[03:18:12] ============== xe_live_guc_g2g_kunit_default  ==============
[03:18:12] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[03:18:12] ============== xe_live_guc_g2g_kunit_allmem  ===============
[03:18:12] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[03:18:12] =================== [SKIPPED] xe_guc_g2g ===================
[03:18:12] =================== xe_mocs (2 subtests) ===================
[03:18:12] ================ xe_live_mocs_kernel_kunit  ================
[03:18:12] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[03:18:12] ================ xe_live_mocs_reset_kunit  =================
[03:18:12] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[03:18:12] ==================== [SKIPPED] xe_mocs =====================
[03:18:12] ================= xe_migrate (2 subtests) ==================
[03:18:12] ================= xe_migrate_sanity_kunit  =================
[03:18:12] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[03:18:12] ================== xe_validate_ccs_kunit  ==================
[03:18:12] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[03:18:12] =================== [SKIPPED] xe_migrate ===================
[03:18:12] ================== xe_dma_buf (1 subtest) ==================
[03:18:12] ==================== xe_dma_buf_kunit  =====================
[03:18:12] ================ [SKIPPED] xe_dma_buf_kunit ================
[03:18:12] =================== [SKIPPED] xe_dma_buf ===================
[03:18:12] ================= xe_bo_shrink (1 subtest) =================
[03:18:12] =================== xe_bo_shrink_kunit  ====================
[03:18:12] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[03:18:12] ================== [SKIPPED] xe_bo_shrink ==================
[03:18:12] ==================== xe_bo (2 subtests) ====================
[03:18:12] ================== xe_ccs_migrate_kunit  ===================
[03:18:12] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[03:18:12] ==================== xe_bo_evict_kunit  ====================
[03:18:12] =============== [SKIPPED] xe_bo_evict_kunit ================
[03:18:12] ===================== [SKIPPED] xe_bo ======================
[03:18:12] ==================== args (13 subtests) ====================
[03:18:12] [PASSED] count_args_test
[03:18:12] [PASSED] call_args_example
[03:18:12] [PASSED] call_args_test
[03:18:12] [PASSED] drop_first_arg_example
[03:18:12] [PASSED] drop_first_arg_test
[03:18:12] [PASSED] first_arg_example
[03:18:12] [PASSED] first_arg_test
[03:18:12] [PASSED] last_arg_example
[03:18:12] [PASSED] last_arg_test
[03:18:12] [PASSED] pick_arg_example
[03:18:12] [PASSED] if_args_example
[03:18:12] [PASSED] if_args_test
[03:18:12] [PASSED] sep_comma_example
[03:18:12] ====================== [PASSED] args =======================
[03:18:12] =================== xe_pci (3 subtests) ====================
[03:18:12] ==================== check_graphics_ip  ====================
[03:18:12] [PASSED] 12.00 Xe_LP
[03:18:12] [PASSED] 12.10 Xe_LP+
[03:18:12] [PASSED] 12.55 Xe_HPG
[03:18:12] [PASSED] 12.60 Xe_HPC
[03:18:12] [PASSED] 12.70 Xe_LPG
[03:18:12] [PASSED] 12.71 Xe_LPG
[03:18:12] [PASSED] 12.74 Xe_LPG+
[03:18:12] [PASSED] 20.01 Xe2_HPG
[03:18:12] [PASSED] 20.02 Xe2_HPG
[03:18:12] [PASSED] 20.04 Xe2_LPG
[03:18:12] [PASSED] 30.00 Xe3_LPG
[03:18:12] [PASSED] 30.01 Xe3_LPG
[03:18:12] [PASSED] 30.03 Xe3_LPG
[03:18:12] [PASSED] 30.04 Xe3_LPG
[03:18:12] [PASSED] 30.05 Xe3_LPG
[03:18:12] [PASSED] 35.10 Xe3p_LPG
[03:18:12] [PASSED] 35.11 Xe3p_XPC
[03:18:12] ================ [PASSED] check_graphics_ip ================
[03:18:12] ===================== check_media_ip  ======================
[03:18:12] [PASSED] 12.00 Xe_M
[03:18:12] [PASSED] 12.55 Xe_HPM
[03:18:12] [PASSED] 13.00 Xe_LPM+
[03:18:12] [PASSED] 13.01 Xe2_HPM
[03:18:12] [PASSED] 20.00 Xe2_LPM
[03:18:12] [PASSED] 30.00 Xe3_LPM
[03:18:12] [PASSED] 30.02 Xe3_LPM
[03:18:12] [PASSED] 35.00 Xe3p_LPM
[03:18:12] [PASSED] 35.03 Xe3p_HPM
[03:18:12] ================= [PASSED] check_media_ip ==================
[03:18:12] =================== check_platform_desc  ===================
[03:18:12] [PASSED] 0x9A60 (TIGERLAKE)
[03:18:12] [PASSED] 0x9A68 (TIGERLAKE)
[03:18:12] [PASSED] 0x9A70 (TIGERLAKE)
[03:18:12] [PASSED] 0x9A40 (TIGERLAKE)
[03:18:12] [PASSED] 0x9A49 (TIGERLAKE)
[03:18:12] [PASSED] 0x9A59 (TIGERLAKE)
[03:18:12] [PASSED] 0x9A78 (TIGERLAKE)
[03:18:12] [PASSED] 0x9AC0 (TIGERLAKE)
[03:18:12] [PASSED] 0x9AC9 (TIGERLAKE)
[03:18:12] [PASSED] 0x9AD9 (TIGERLAKE)
[03:18:12] [PASSED] 0x9AF8 (TIGERLAKE)
[03:18:12] [PASSED] 0x4C80 (ROCKETLAKE)
[03:18:12] [PASSED] 0x4C8A (ROCKETLAKE)
[03:18:12] [PASSED] 0x4C8B (ROCKETLAKE)
[03:18:12] [PASSED] 0x4C8C (ROCKETLAKE)
[03:18:12] [PASSED] 0x4C90 (ROCKETLAKE)
[03:18:12] [PASSED] 0x4C9A (ROCKETLAKE)
[03:18:12] [PASSED] 0x4680 (ALDERLAKE_S)
[03:18:12] [PASSED] 0x4682 (ALDERLAKE_S)
[03:18:12] [PASSED] 0x4688 (ALDERLAKE_S)
[03:18:12] [PASSED] 0x468A (ALDERLAKE_S)
[03:18:12] [PASSED] 0x468B (ALDERLAKE_S)
[03:18:12] [PASSED] 0x4690 (ALDERLAKE_S)
[03:18:12] [PASSED] 0x4692 (ALDERLAKE_S)
[03:18:12] [PASSED] 0x4693 (ALDERLAKE_S)
[03:18:12] [PASSED] 0x46A0 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46A1 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46A2 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46A3 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46A6 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46A8 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46AA (ALDERLAKE_P)
[03:18:12] [PASSED] 0x462A (ALDERLAKE_P)
[03:18:12] [PASSED] 0x4626 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x4628 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46B0 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46B1 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46B2 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46B3 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46C0 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46C1 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46C2 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46C3 (ALDERLAKE_P)
[03:18:12] [PASSED] 0x46D0 (ALDERLAKE_N)
[03:18:12] [PASSED] 0x46D1 (ALDERLAKE_N)
[03:18:12] [PASSED] 0x46D2 (ALDERLAKE_N)
[03:18:12] [PASSED] 0x46D3 (ALDERLAKE_N)
[03:18:12] [PASSED] 0x46D4 (ALDERLAKE_N)
[03:18:12] [PASSED] 0xA721 (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA7A1 (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA7A9 (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA7AC (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA7AD (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA720 (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA7A0 (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA7A8 (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA7AA (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA7AB (ALDERLAKE_P)
[03:18:12] [PASSED] 0xA780 (ALDERLAKE_S)
[03:18:12] [PASSED] 0xA781 (ALDERLAKE_S)
[03:18:12] [PASSED] 0xA782 (ALDERLAKE_S)
[03:18:12] [PASSED] 0xA783 (ALDERLAKE_S)
[03:18:12] [PASSED] 0xA788 (ALDERLAKE_S)
[03:18:12] [PASSED] 0xA789 (ALDERLAKE_S)
[03:18:12] [PASSED] 0xA78A (ALDERLAKE_S)
[03:18:12] [PASSED] 0xA78B (ALDERLAKE_S)
[03:18:12] [PASSED] 0x4905 (DG1)
[03:18:12] [PASSED] 0x4906 (DG1)
[03:18:12] [PASSED] 0x4907 (DG1)
[03:18:12] [PASSED] 0x4908 (DG1)
[03:18:12] [PASSED] 0x4909 (DG1)
[03:18:12] [PASSED] 0x56C0 (DG2)
[03:18:12] [PASSED] 0x56C2 (DG2)
[03:18:12] [PASSED] 0x56C1 (DG2)
[03:18:12] [PASSED] 0x7D51 (METEORLAKE)
[03:18:12] [PASSED] 0x7DD1 (METEORLAKE)
[03:18:12] [PASSED] 0x7D41 (METEORLAKE)
[03:18:12] [PASSED] 0x7D67 (METEORLAKE)
[03:18:12] [PASSED] 0xB640 (METEORLAKE)
[03:18:12] [PASSED] 0x56A0 (DG2)
[03:18:12] [PASSED] 0x56A1 (DG2)
[03:18:12] [PASSED] 0x56A2 (DG2)
[03:18:12] [PASSED] 0x56BE (DG2)
[03:18:12] [PASSED] 0x56BF (DG2)
[03:18:12] [PASSED] 0x5690 (DG2)
[03:18:12] [PASSED] 0x5691 (DG2)
[03:18:12] [PASSED] 0x5692 (DG2)
[03:18:12] [PASSED] 0x56A5 (DG2)
[03:18:12] [PASSED] 0x56A6 (DG2)
[03:18:12] [PASSED] 0x56B0 (DG2)
[03:18:12] [PASSED] 0x56B1 (DG2)
[03:18:12] [PASSED] 0x56BA (DG2)
[03:18:12] [PASSED] 0x56BB (DG2)
[03:18:12] [PASSED] 0x56BC (DG2)
[03:18:12] [PASSED] 0x56BD (DG2)
[03:18:12] [PASSED] 0x5693 (DG2)
[03:18:12] [PASSED] 0x5694 (DG2)
[03:18:12] [PASSED] 0x5695 (DG2)
[03:18:12] [PASSED] 0x56A3 (DG2)
[03:18:12] [PASSED] 0x56A4 (DG2)
[03:18:12] [PASSED] 0x56B2 (DG2)
[03:18:12] [PASSED] 0x56B3 (DG2)
[03:18:12] [PASSED] 0x5696 (DG2)
[03:18:12] [PASSED] 0x5697 (DG2)
[03:18:12] [PASSED] 0xB69 (PVC)
[03:18:12] [PASSED] 0xB6E (PVC)
[03:18:12] [PASSED] 0xBD4 (PVC)
[03:18:12] [PASSED] 0xBD5 (PVC)
[03:18:12] [PASSED] 0xBD6 (PVC)
[03:18:12] [PASSED] 0xBD7 (PVC)
[03:18:12] [PASSED] 0xBD8 (PVC)
[03:18:12] [PASSED] 0xBD9 (PVC)
[03:18:12] [PASSED] 0xBDA (PVC)
[03:18:12] [PASSED] 0xBDB (PVC)
[03:18:12] [PASSED] 0xBE0 (PVC)
[03:18:12] [PASSED] 0xBE1 (PVC)
[03:18:12] [PASSED] 0xBE5 (PVC)
[03:18:12] [PASSED] 0x7D40 (METEORLAKE)
[03:18:12] [PASSED] 0x7D45 (METEORLAKE)
[03:18:12] [PASSED] 0x7D55 (METEORLAKE)
[03:18:12] [PASSED] 0x7D60 (METEORLAKE)
[03:18:12] [PASSED] 0x7DD5 (METEORLAKE)
[03:18:12] [PASSED] 0x6420 (LUNARLAKE)
[03:18:12] [PASSED] 0x64A0 (LUNARLAKE)
[03:18:12] [PASSED] 0x64B0 (LUNARLAKE)
[03:18:12] [PASSED] 0xE202 (BATTLEMAGE)
[03:18:12] [PASSED] 0xE209 (BATTLEMAGE)
[03:18:12] [PASSED] 0xE20B (BATTLEMAGE)
[03:18:12] [PASSED] 0xE20C (BATTLEMAGE)
[03:18:12] [PASSED] 0xE20D (BATTLEMAGE)
[03:18:12] [PASSED] 0xE210 (BATTLEMAGE)
[03:18:12] [PASSED] 0xE211 (BATTLEMAGE)
[03:18:12] [PASSED] 0xE212 (BATTLEMAGE)
[03:18:12] [PASSED] 0xE216 (BATTLEMAGE)
[03:18:12] [PASSED] 0xE220 (BATTLEMAGE)
[03:18:12] [PASSED] 0xE221 (BATTLEMAGE)
[03:18:12] [PASSED] 0xE222 (BATTLEMAGE)
[03:18:12] [PASSED] 0xE223 (BATTLEMAGE)
[03:18:12] [PASSED] 0xB080 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB081 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB082 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB083 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB084 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB085 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB086 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB087 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB08F (PANTHERLAKE)
[03:18:12] [PASSED] 0xB090 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB0A0 (PANTHERLAKE)
[03:18:12] [PASSED] 0xB0B0 (PANTHERLAKE)
[03:18:12] [PASSED] 0xFD80 (PANTHERLAKE)
[03:18:12] [PASSED] 0xFD81 (PANTHERLAKE)
[03:18:12] [PASSED] 0xD740 (NOVALAKE_S)
[03:18:12] [PASSED] 0xD741 (NOVALAKE_S)
[03:18:12] [PASSED] 0xD742 (NOVALAKE_S)
[03:18:12] [PASSED] 0xD743 (NOVALAKE_S)
[03:18:12] [PASSED] 0xD744 (NOVALAKE_S)
[03:18:12] [PASSED] 0xD745 (NOVALAKE_S)
[03:18:12] [PASSED] 0x674C (CRESCENTISLAND)
[03:18:12] [PASSED] 0xD750 (NOVALAKE_P)
[03:18:12] [PASSED] 0xD751 (NOVALAKE_P)
[03:18:12] [PASSED] 0xD752 (NOVALAKE_P)
[03:18:12] [PASSED] 0xD753 (NOVALAKE_P)
[03:18:12] [PASSED] 0xD754 (NOVALAKE_P)
[03:18:12] [PASSED] 0xD755 (NOVALAKE_P)
[03:18:12] [PASSED] 0xD756 (NOVALAKE_P)
[03:18:12] [PASSED] 0xD757 (NOVALAKE_P)
[03:18:12] [PASSED] 0xD75F (NOVALAKE_P)
[03:18:12] =============== [PASSED] check_platform_desc ===============
[03:18:12] ===================== [PASSED] xe_pci ======================
[03:18:12] =================== xe_rtp (2 subtests) ====================
[03:18:12] =============== xe_rtp_process_to_sr_tests  ================
[03:18:12] [PASSED] coalesce-same-reg
[03:18:12] [PASSED] no-match-no-add
[03:18:12] [PASSED] match-or
[03:18:12] [PASSED] match-or-xfail
[03:18:12] [PASSED] no-match-no-add-multiple-rules
[03:18:12] [PASSED] two-regs-two-entries
[03:18:12] [PASSED] clr-one-set-other
[03:18:12] [PASSED] set-field
[03:18:12] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[03:18:12] [PASSED] conflict-not-disjoint
[03:18:12] [PASSED] conflict-reg-type
[03:18:12] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[03:18:12] ================== xe_rtp_process_tests  ===================
[03:18:12] [PASSED] active1
[03:18:12] [PASSED] active2
[03:18:12] [PASSED] active-inactive
[03:18:12] [PASSED] inactive-active
[03:18:12] [PASSED] inactive-1st_or_active-inactive
[03:18:12] [PASSED] inactive-2nd_or_active-inactive
[03:18:12] [PASSED] inactive-last_or_active-inactive
[03:18:12] [PASSED] inactive-no_or_active-inactive
[03:18:12] ============== [PASSED] xe_rtp_process_tests ===============
[03:18:12] ===================== [PASSED] xe_rtp ======================
[03:18:12] ==================== xe_wa (1 subtest) =====================
[03:18:12] ======================== xe_wa_gt  =========================
[03:18:12] [PASSED] TIGERLAKE B0
[03:18:12] [PASSED] DG1 A0
[03:18:12] [PASSED] DG1 B0
[03:18:12] [PASSED] ALDERLAKE_S A0
[03:18:12] [PASSED] ALDERLAKE_S B0
[03:18:12] [PASSED] ALDERLAKE_S C0
[03:18:12] [PASSED] ALDERLAKE_S D0
[03:18:12] [PASSED] ALDERLAKE_P A0
[03:18:12] [PASSED] ALDERLAKE_P B0
[03:18:12] [PASSED] ALDERLAKE_P C0
[03:18:12] [PASSED] ALDERLAKE_S RPLS D0
[03:18:12] [PASSED] ALDERLAKE_P RPLU E0
[03:18:12] [PASSED] DG2 G10 C0
[03:18:12] [PASSED] DG2 G11 B1
[03:18:12] [PASSED] DG2 G12 A1
[03:18:12] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[03:18:12] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[03:18:12] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[03:18:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[03:18:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[03:18:12] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[03:18:12] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[03:18:12] ==================== [PASSED] xe_wa_gt =====================
[03:18:12] ====================== [PASSED] xe_wa ======================
[03:18:12] ============================================================
[03:18:12] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[03:18:12] Elapsed time: 35.312s total, 4.224s configuring, 30.421s building, 0.621s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[03:18:12] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:18:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:18:38] Starting KUnit Kernel (1/1)...
[03:18:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:18:38] ============ drm_test_pick_cmdline (2 subtests) ============
[03:18:38] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[03:18:38] =============== drm_test_pick_cmdline_named  ===============
[03:18:38] [PASSED] NTSC
[03:18:38] [PASSED] NTSC-J
[03:18:38] [PASSED] PAL
[03:18:38] [PASSED] PAL-M
[03:18:38] =========== [PASSED] drm_test_pick_cmdline_named ===========
[03:18:38] ============== [PASSED] drm_test_pick_cmdline ==============
[03:18:38] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[03:18:38] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[03:18:38] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[03:18:38] =========== drm_validate_clone_mode (2 subtests) ===========
[03:18:38] ============== drm_test_check_in_clone_mode  ===============
[03:18:38] [PASSED] in_clone_mode
[03:18:38] [PASSED] not_in_clone_mode
[03:18:38] ========== [PASSED] drm_test_check_in_clone_mode ===========
[03:18:38] =============== drm_test_check_valid_clones  ===============
[03:18:38] [PASSED] not_in_clone_mode
[03:18:38] [PASSED] valid_clone
[03:18:38] [PASSED] invalid_clone
[03:18:38] =========== [PASSED] drm_test_check_valid_clones ===========
[03:18:38] ============= [PASSED] drm_validate_clone_mode =============
[03:18:38] ============= drm_validate_modeset (1 subtest) =============
[03:18:38] [PASSED] drm_test_check_connector_changed_modeset
[03:18:38] ============== [PASSED] drm_validate_modeset ===============
[03:18:38] ====== drm_test_bridge_get_current_state (2 subtests) ======
[03:18:38] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[03:18:38] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[03:18:38] ======== [PASSED] drm_test_bridge_get_current_state ========
[03:18:38] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[03:18:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[03:18:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[03:18:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[03:18:38] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[03:18:38] ============== drm_bridge_alloc (2 subtests) ===============
[03:18:38] [PASSED] drm_test_drm_bridge_alloc_basic
[03:18:38] [PASSED] drm_test_drm_bridge_alloc_get_put
[03:18:38] ================ [PASSED] drm_bridge_alloc =================
[03:18:38] ============= drm_cmdline_parser (40 subtests) =============
[03:18:38] [PASSED] drm_test_cmdline_force_d_only
[03:18:38] [PASSED] drm_test_cmdline_force_D_only_dvi
[03:18:38] [PASSED] drm_test_cmdline_force_D_only_hdmi
[03:18:38] [PASSED] drm_test_cmdline_force_D_only_not_digital
[03:18:38] [PASSED] drm_test_cmdline_force_e_only
[03:18:38] [PASSED] drm_test_cmdline_res
[03:18:38] [PASSED] drm_test_cmdline_res_vesa
[03:18:38] [PASSED] drm_test_cmdline_res_vesa_rblank
[03:18:38] [PASSED] drm_test_cmdline_res_rblank
[03:18:38] [PASSED] drm_test_cmdline_res_bpp
[03:18:38] [PASSED] drm_test_cmdline_res_refresh
[03:18:38] [PASSED] drm_test_cmdline_res_bpp_refresh
[03:18:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[03:18:38] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[03:18:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[03:18:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[03:18:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[03:18:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[03:18:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[03:18:38] [PASSED] drm_test_cmdline_res_margins_force_on
[03:18:38] [PASSED] drm_test_cmdline_res_vesa_margins
[03:18:38] [PASSED] drm_test_cmdline_name
[03:18:38] [PASSED] drm_test_cmdline_name_bpp
[03:18:38] [PASSED] drm_test_cmdline_name_option
[03:18:38] [PASSED] drm_test_cmdline_name_bpp_option
[03:18:38] [PASSED] drm_test_cmdline_rotate_0
[03:18:38] [PASSED] drm_test_cmdline_rotate_90
[03:18:38] [PASSED] drm_test_cmdline_rotate_180
[03:18:38] [PASSED] drm_test_cmdline_rotate_270
[03:18:38] [PASSED] drm_test_cmdline_hmirror
[03:18:38] [PASSED] drm_test_cmdline_vmirror
[03:18:38] [PASSED] drm_test_cmdline_margin_options
[03:18:38] [PASSED] drm_test_cmdline_multiple_options
[03:18:38] [PASSED] drm_test_cmdline_bpp_extra_and_option
[03:18:38] [PASSED] drm_test_cmdline_extra_and_option
[03:18:38] [PASSED] drm_test_cmdline_freestanding_options
[03:18:38] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[03:18:38] [PASSED] drm_test_cmdline_panel_orientation
[03:18:38] ================ drm_test_cmdline_invalid  =================
[03:18:38] [PASSED] margin_only
[03:18:38] [PASSED] interlace_only
[03:18:38] [PASSED] res_missing_x
[03:18:38] [PASSED] res_missing_y
[03:18:38] [PASSED] res_bad_y
[03:18:38] [PASSED] res_missing_y_bpp
[03:18:38] [PASSED] res_bad_bpp
[03:18:38] [PASSED] res_bad_refresh
[03:18:38] [PASSED] res_bpp_refresh_force_on_off
[03:18:38] [PASSED] res_invalid_mode
[03:18:38] [PASSED] res_bpp_wrong_place_mode
[03:18:38] [PASSED] name_bpp_refresh
[03:18:38] [PASSED] name_refresh
[03:18:38] [PASSED] name_refresh_wrong_mode
[03:18:38] [PASSED] name_refresh_invalid_mode
[03:18:38] [PASSED] rotate_multiple
[03:18:38] [PASSED] rotate_invalid_val
[03:18:38] [PASSED] rotate_truncated
[03:18:38] [PASSED] invalid_option
[03:18:38] [PASSED] invalid_tv_option
[03:18:38] [PASSED] truncated_tv_option
[03:18:38] ============ [PASSED] drm_test_cmdline_invalid =============
[03:18:38] =============== drm_test_cmdline_tv_options  ===============
[03:18:38] [PASSED] NTSC
[03:18:38] [PASSED] NTSC_443
[03:18:38] [PASSED] NTSC_J
[03:18:38] [PASSED] PAL
[03:18:38] [PASSED] PAL_M
[03:18:38] [PASSED] PAL_N
[03:18:38] [PASSED] SECAM
[03:18:38] [PASSED] MONO_525
[03:18:38] [PASSED] MONO_625
[03:18:38] =========== [PASSED] drm_test_cmdline_tv_options ===========
[03:18:38] =============== [PASSED] drm_cmdline_parser ================
[03:18:38] ========== drmm_connector_hdmi_init (20 subtests) ==========
[03:18:38] [PASSED] drm_test_connector_hdmi_init_valid
[03:18:38] [PASSED] drm_test_connector_hdmi_init_bpc_8
[03:18:38] [PASSED] drm_test_connector_hdmi_init_bpc_10
[03:18:38] [PASSED] drm_test_connector_hdmi_init_bpc_12
[03:18:38] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[03:18:38] [PASSED] drm_test_connector_hdmi_init_bpc_null
[03:18:38] [PASSED] drm_test_connector_hdmi_init_formats_empty
[03:18:38] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[03:18:38] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[03:18:38] [PASSED] supported_formats=0x9 yuv420_allowed=1
[03:18:38] [PASSED] supported_formats=0x9 yuv420_allowed=0
[03:18:38] [PASSED] supported_formats=0x3 yuv420_allowed=1
[03:18:38] [PASSED] supported_formats=0x3 yuv420_allowed=0
[03:18:38] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[03:18:38] [PASSED] drm_test_connector_hdmi_init_null_ddc
[03:18:38] [PASSED] drm_test_connector_hdmi_init_null_product
[03:18:38] [PASSED] drm_test_connector_hdmi_init_null_vendor
[03:18:38] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[03:18:38] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[03:18:38] [PASSED] drm_test_connector_hdmi_init_product_valid
[03:18:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[03:18:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[03:18:38] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[03:18:38] ========= drm_test_connector_hdmi_init_type_valid  =========
[03:18:38] [PASSED] HDMI-A
[03:18:38] [PASSED] HDMI-B
[03:18:38] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[03:18:38] ======== drm_test_connector_hdmi_init_type_invalid  ========
[03:18:38] [PASSED] Unknown
[03:18:38] [PASSED] VGA
[03:18:38] [PASSED] DVI-I
[03:18:38] [PASSED] DVI-D
[03:18:38] [PASSED] DVI-A
[03:18:38] [PASSED] Composite
[03:18:38] [PASSED] SVIDEO
[03:18:38] [PASSED] LVDS
[03:18:38] [PASSED] Component
[03:18:38] [PASSED] DIN
[03:18:38] [PASSED] DP
[03:18:38] [PASSED] TV
[03:18:38] [PASSED] eDP
[03:18:38] [PASSED] Virtual
[03:18:38] [PASSED] DSI
[03:18:38] [PASSED] DPI
[03:18:38] [PASSED] Writeback
[03:18:38] [PASSED] SPI
[03:18:38] [PASSED] USB
[03:18:38] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[03:18:38] ============ [PASSED] drmm_connector_hdmi_init =============
[03:18:38] ============= drmm_connector_init (3 subtests) =============
[03:18:38] [PASSED] drm_test_drmm_connector_init
[03:18:38] [PASSED] drm_test_drmm_connector_init_null_ddc
[03:18:38] ========= drm_test_drmm_connector_init_type_valid  =========
[03:18:38] [PASSED] Unknown
[03:18:38] [PASSED] VGA
[03:18:38] [PASSED] DVI-I
[03:18:38] [PASSED] DVI-D
[03:18:38] [PASSED] DVI-A
[03:18:38] [PASSED] Composite
[03:18:38] [PASSED] SVIDEO
[03:18:38] [PASSED] LVDS
[03:18:38] [PASSED] Component
[03:18:38] [PASSED] DIN
[03:18:38] [PASSED] DP
[03:18:38] [PASSED] HDMI-A
[03:18:38] [PASSED] HDMI-B
[03:18:38] [PASSED] TV
[03:18:38] [PASSED] eDP
[03:18:38] [PASSED] Virtual
[03:18:38] [PASSED] DSI
[03:18:38] [PASSED] DPI
[03:18:38] [PASSED] Writeback
[03:18:38] [PASSED] SPI
[03:18:38] [PASSED] USB
[03:18:38] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[03:18:38] =============== [PASSED] drmm_connector_init ===============
[03:18:38] ========= drm_connector_dynamic_init (6 subtests) ==========
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_init
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_init_properties
[03:18:38] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[03:18:38] [PASSED] Unknown
[03:18:38] [PASSED] VGA
[03:18:38] [PASSED] DVI-I
[03:18:38] [PASSED] DVI-D
[03:18:38] [PASSED] DVI-A
[03:18:38] [PASSED] Composite
[03:18:38] [PASSED] SVIDEO
[03:18:38] [PASSED] LVDS
[03:18:38] [PASSED] Component
[03:18:38] [PASSED] DIN
[03:18:38] [PASSED] DP
[03:18:38] [PASSED] HDMI-A
[03:18:38] [PASSED] HDMI-B
[03:18:38] [PASSED] TV
[03:18:38] [PASSED] eDP
[03:18:38] [PASSED] Virtual
[03:18:38] [PASSED] DSI
[03:18:38] [PASSED] DPI
[03:18:38] [PASSED] Writeback
[03:18:38] [PASSED] SPI
[03:18:38] [PASSED] USB
[03:18:38] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[03:18:38] ======== drm_test_drm_connector_dynamic_init_name  =========
[03:18:38] [PASSED] Unknown
[03:18:38] [PASSED] VGA
[03:18:38] [PASSED] DVI-I
[03:18:38] [PASSED] DVI-D
[03:18:38] [PASSED] DVI-A
[03:18:38] [PASSED] Composite
[03:18:38] [PASSED] SVIDEO
[03:18:38] [PASSED] LVDS
[03:18:38] [PASSED] Component
[03:18:38] [PASSED] DIN
[03:18:38] [PASSED] DP
[03:18:38] [PASSED] HDMI-A
[03:18:38] [PASSED] HDMI-B
[03:18:38] [PASSED] TV
[03:18:38] [PASSED] eDP
[03:18:38] [PASSED] Virtual
[03:18:38] [PASSED] DSI
[03:18:38] [PASSED] DPI
[03:18:38] [PASSED] Writeback
[03:18:38] [PASSED] SPI
[03:18:38] [PASSED] USB
[03:18:38] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[03:18:38] =========== [PASSED] drm_connector_dynamic_init ============
[03:18:38] ==== drm_connector_dynamic_register_early (4 subtests) =====
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[03:18:38] ====== [PASSED] drm_connector_dynamic_register_early =======
[03:18:38] ======= drm_connector_dynamic_register (7 subtests) ========
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[03:18:38] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[03:18:38] ========= [PASSED] drm_connector_dynamic_register ==========
[03:18:38] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[03:18:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[03:18:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[03:18:38] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[03:18:38] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[03:18:38] ========== drm_test_get_tv_mode_from_name_valid  ===========
[03:18:38] [PASSED] NTSC
[03:18:38] [PASSED] NTSC-443
[03:18:38] [PASSED] NTSC-J
[03:18:38] [PASSED] PAL
[03:18:38] [PASSED] PAL-M
[03:18:38] [PASSED] PAL-N
[03:18:38] [PASSED] SECAM
[03:18:38] [PASSED] Mono
[03:18:38] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[03:18:38] [PASSED] drm_test_get_tv_mode_from_name_truncated
[03:18:38] ============ [PASSED] drm_get_tv_mode_from_name ============
[03:18:38] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[03:18:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[03:18:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[03:18:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[03:18:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[03:18:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[03:18:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[03:18:38] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[03:18:38] [PASSED] VIC 96
[03:18:38] [PASSED] VIC 97
[03:18:38] [PASSED] VIC 101
[03:18:38] [PASSED] VIC 102
[03:18:38] [PASSED] VIC 106
[03:18:38] [PASSED] VIC 107
[03:18:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[03:18:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[03:18:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[03:18:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[03:18:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[03:18:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[03:18:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[03:18:38] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[03:18:38] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[03:18:38] [PASSED] Automatic
[03:18:38] [PASSED] Full
[03:18:38] [PASSED] Limited 16:235
[03:18:38] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[03:18:38] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[03:18:38] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[03:18:38] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[03:18:38] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[03:18:38] [PASSED] RGB
[03:18:38] [PASSED] YUV 4:2:0
[03:18:38] [PASSED] YUV 4:2:2
[03:18:38] [PASSED] YUV 4:4:4
[03:18:38] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[03:18:38] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[03:18:38] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[03:18:38] ============= drm_damage_helper (21 subtests) ==============
[03:18:38] [PASSED] drm_test_damage_iter_no_damage
[03:18:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[03:18:38] [PASSED] drm_test_damage_iter_no_damage_src_moved
[03:18:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[03:18:38] [PASSED] drm_test_damage_iter_no_damage_not_visible
[03:18:38] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[03:18:38] [PASSED] drm_test_damage_iter_no_damage_no_fb
[03:18:38] [PASSED] drm_test_damage_iter_simple_damage
[03:18:38] [PASSED] drm_test_damage_iter_single_damage
[03:18:38] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[03:18:38] [PASSED] drm_test_damage_iter_single_damage_outside_src
[03:18:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[03:18:38] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[03:18:38] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[03:18:38] [PASSED] drm_test_damage_iter_single_damage_src_moved
[03:18:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[03:18:38] [PASSED] drm_test_damage_iter_damage
[03:18:38] [PASSED] drm_test_damage_iter_damage_one_intersect
[03:18:38] [PASSED] drm_test_damage_iter_damage_one_outside
[03:18:38] [PASSED] drm_test_damage_iter_damage_src_moved
[03:18:38] [PASSED] drm_test_damage_iter_damage_not_visible
[03:18:38] ================ [PASSED] drm_damage_helper ================
[03:18:38] ============== drm_dp_mst_helper (3 subtests) ==============
[03:18:38] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[03:18:38] [PASSED] Clock 154000 BPP 30 DSC disabled
[03:18:38] [PASSED] Clock 234000 BPP 30 DSC disabled
[03:18:38] [PASSED] Clock 297000 BPP 24 DSC disabled
[03:18:38] [PASSED] Clock 332880 BPP 24 DSC enabled
[03:18:38] [PASSED] Clock 324540 BPP 24 DSC enabled
[03:18:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[03:18:38] ============== drm_test_dp_mst_calc_pbn_div  ===============
[03:18:38] [PASSED] Link rate 2000000 lane count 4
[03:18:38] [PASSED] Link rate 2000000 lane count 2
[03:18:38] [PASSED] Link rate 2000000 lane count 1
[03:18:38] [PASSED] Link rate 1350000 lane count 4
[03:18:38] [PASSED] Link rate 1350000 lane count 2
[03:18:38] [PASSED] Link rate 1350000 lane count 1
[03:18:38] [PASSED] Link rate 1000000 lane count 4
[03:18:38] [PASSED] Link rate 1000000 lane count 2
[03:18:38] [PASSED] Link rate 1000000 lane count 1
[03:18:38] [PASSED] Link rate 810000 lane count 4
[03:18:38] [PASSED] Link rate 810000 lane count 2
[03:18:38] [PASSED] Link rate 810000 lane count 1
[03:18:38] [PASSED] Link rate 540000 lane count 4
[03:18:38] [PASSED] Link rate 540000 lane count 2
[03:18:38] [PASSED] Link rate 540000 lane count 1
[03:18:38] [PASSED] Link rate 270000 lane count 4
[03:18:38] [PASSED] Link rate 270000 lane count 2
[03:18:38] [PASSED] Link rate 270000 lane count 1
[03:18:38] [PASSED] Link rate 162000 lane count 4
[03:18:38] [PASSED] Link rate 162000 lane count 2
[03:18:38] [PASSED] Link rate 162000 lane count 1
[03:18:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[03:18:38] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[03:18:38] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[03:18:38] [PASSED] DP_POWER_UP_PHY with port number
[03:18:38] [PASSED] DP_POWER_DOWN_PHY with port number
[03:18:38] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[03:18:38] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[03:18:38] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[03:18:38] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[03:18:38] [PASSED] DP_QUERY_PAYLOAD with port number
[03:18:38] [PASSED] DP_QUERY_PAYLOAD with VCPI
[03:18:38] [PASSED] DP_REMOTE_DPCD_READ with port number
[03:18:38] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[03:18:38] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[03:18:38] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[03:18:38] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[03:18:38] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[03:18:38] [PASSED] DP_REMOTE_I2C_READ with port number
[03:18:38] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[03:18:38] [PASSED] DP_REMOTE_I2C_READ with transactions array
[03:18:38] [PASSED] DP_REMOTE_I2C_WRITE with port number
[03:18:38] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[03:18:38] [PASSED] DP_REMOTE_I2C_WRITE with data array
[03:18:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[03:18:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[03:18:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[03:18:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[03:18:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[03:18:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[03:18:38] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[03:18:38] ================ [PASSED] drm_dp_mst_helper ================
[03:18:38] ================== drm_exec (7 subtests) ===================
[03:18:38] [PASSED] sanitycheck
[03:18:38] [PASSED] test_lock
[03:18:38] [PASSED] test_lock_unlock
[03:18:38] [PASSED] test_duplicates
[03:18:38] [PASSED] test_prepare
[03:18:38] [PASSED] test_prepare_array
[03:18:38] [PASSED] test_multiple_loops
[03:18:38] ==================== [PASSED] drm_exec =====================
[03:18:38] =========== drm_format_helper_test (17 subtests) ===========
[03:18:38] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[03:18:38] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[03:18:38] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[03:18:38] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[03:18:38] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[03:18:38] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[03:18:38] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[03:18:38] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[03:18:38] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[03:18:38] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[03:18:38] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[03:18:38] ============== drm_test_fb_xrgb8888_to_mono  ===============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[03:18:38] ==================== drm_test_fb_swab  =====================
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ================ [PASSED] drm_test_fb_swab =================
[03:18:38] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[03:18:38] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[03:18:38] [PASSED] single_pixel_source_buffer
[03:18:38] [PASSED] single_pixel_clip_rectangle
[03:18:38] [PASSED] well_known_colors
[03:18:38] [PASSED] destination_pitch
[03:18:38] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[03:18:38] ================= drm_test_fb_clip_offset  =================
[03:18:38] [PASSED] pass through
[03:18:38] [PASSED] horizontal offset
[03:18:38] [PASSED] vertical offset
[03:18:38] [PASSED] horizontal and vertical offset
[03:18:38] [PASSED] horizontal offset (custom pitch)
[03:18:38] [PASSED] vertical offset (custom pitch)
[03:18:38] [PASSED] horizontal and vertical offset (custom pitch)
[03:18:38] ============= [PASSED] drm_test_fb_clip_offset =============
[03:18:38] =================== drm_test_fb_memcpy  ====================
[03:18:38] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[03:18:38] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[03:18:38] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[03:18:38] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[03:18:38] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[03:18:38] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[03:18:38] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[03:18:38] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[03:18:38] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[03:18:38] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[03:18:38] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[03:18:38] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[03:18:38] =============== [PASSED] drm_test_fb_memcpy ================
[03:18:38] ============= [PASSED] drm_format_helper_test ==============
[03:18:38] ================= drm_format (18 subtests) =================
[03:18:38] [PASSED] drm_test_format_block_width_invalid
[03:18:38] [PASSED] drm_test_format_block_width_one_plane
[03:18:38] [PASSED] drm_test_format_block_width_two_plane
[03:18:38] [PASSED] drm_test_format_block_width_three_plane
[03:18:38] [PASSED] drm_test_format_block_width_tiled
[03:18:38] [PASSED] drm_test_format_block_height_invalid
[03:18:38] [PASSED] drm_test_format_block_height_one_plane
[03:18:38] [PASSED] drm_test_format_block_height_two_plane
[03:18:38] [PASSED] drm_test_format_block_height_three_plane
[03:18:38] [PASSED] drm_test_format_block_height_tiled
[03:18:38] [PASSED] drm_test_format_min_pitch_invalid
[03:18:38] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[03:18:38] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[03:18:38] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[03:18:38] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[03:18:38] [PASSED] drm_test_format_min_pitch_two_plane
[03:18:38] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[03:18:38] [PASSED] drm_test_format_min_pitch_tiled
[03:18:38] =================== [PASSED] drm_format ====================
[03:18:38] ============== drm_framebuffer (10 subtests) ===============
[03:18:38] ========== drm_test_framebuffer_check_src_coords  ==========
[03:18:38] [PASSED] Success: source fits into fb
[03:18:38] [PASSED] Fail: overflowing fb with x-axis coordinate
[03:18:38] [PASSED] Fail: overflowing fb with y-axis coordinate
[03:18:38] [PASSED] Fail: overflowing fb with source width
[03:18:38] [PASSED] Fail: overflowing fb with source height
[03:18:38] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[03:18:38] [PASSED] drm_test_framebuffer_cleanup
[03:18:38] =============== drm_test_framebuffer_create  ===============
[03:18:38] [PASSED] ABGR8888 normal sizes
[03:18:38] [PASSED] ABGR8888 max sizes
[03:18:38] [PASSED] ABGR8888 pitch greater than min required
[03:18:38] [PASSED] ABGR8888 pitch less than min required
[03:18:38] [PASSED] ABGR8888 Invalid width
[03:18:38] [PASSED] ABGR8888 Invalid buffer handle
[03:18:38] [PASSED] No pixel format
[03:18:38] [PASSED] ABGR8888 Width 0
[03:18:38] [PASSED] ABGR8888 Height 0
[03:18:38] [PASSED] ABGR8888 Out of bound height * pitch combination
[03:18:38] [PASSED] ABGR8888 Large buffer offset
[03:18:38] [PASSED] ABGR8888 Buffer offset for inexistent plane
[03:18:38] [PASSED] ABGR8888 Invalid flag
[03:18:38] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[03:18:38] [PASSED] ABGR8888 Valid buffer modifier
[03:18:38] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[03:18:38] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[03:18:38] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[03:18:38] [PASSED] NV12 Normal sizes
[03:18:38] [PASSED] NV12 Max sizes
[03:18:38] [PASSED] NV12 Invalid pitch
[03:18:38] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[03:18:38] [PASSED] NV12 different  modifier per-plane
[03:18:38] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[03:18:38] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[03:18:38] [PASSED] NV12 Modifier for inexistent plane
[03:18:38] [PASSED] NV12 Handle for inexistent plane
[03:18:38] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[03:18:38] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[03:18:38] [PASSED] YVU420 Normal sizes
[03:18:38] [PASSED] YVU420 Max sizes
[03:18:38] [PASSED] YVU420 Invalid pitch
[03:18:38] [PASSED] YVU420 Different pitches
[03:18:38] [PASSED] YVU420 Different buffer offsets/pitches
[03:18:38] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[03:18:38] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[03:18:38] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[03:18:38] [PASSED] YVU420 Valid modifier
[03:18:38] [PASSED] YVU420 Different modifiers per plane
[03:18:38] [PASSED] YVU420 Modifier for inexistent plane
[03:18:38] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[03:18:38] [PASSED] X0L2 Normal sizes
[03:18:38] [PASSED] X0L2 Max sizes
[03:18:38] [PASSED] X0L2 Invalid pitch
[03:18:38] [PASSED] X0L2 Pitch greater than minimum required
[03:18:38] [PASSED] X0L2 Handle for inexistent plane
[03:18:38] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[03:18:38] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[03:18:38] [PASSED] X0L2 Valid modifier
[03:18:38] [PASSED] X0L2 Modifier for inexistent plane
[03:18:38] =========== [PASSED] drm_test_framebuffer_create ===========
[03:18:38] [PASSED] drm_test_framebuffer_free
[03:18:38] [PASSED] drm_test_framebuffer_init
[03:18:38] [PASSED] drm_test_framebuffer_init_bad_format
[03:18:38] [PASSED] drm_test_framebuffer_init_dev_mismatch
[03:18:38] [PASSED] drm_test_framebuffer_lookup
[03:18:38] [PASSED] drm_test_framebuffer_lookup_inexistent
[03:18:38] [PASSED] drm_test_framebuffer_modifiers_not_supported
[03:18:38] ================= [PASSED] drm_framebuffer =================
[03:18:38] ================ drm_gem_shmem (8 subtests) ================
[03:18:38] [PASSED] drm_gem_shmem_test_obj_create
[03:18:38] [PASSED] drm_gem_shmem_test_obj_create_private
[03:18:38] [PASSED] drm_gem_shmem_test_pin_pages
[03:18:38] [PASSED] drm_gem_shmem_test_vmap
[03:18:38] [PASSED] drm_gem_shmem_test_get_sg_table
[03:18:38] [PASSED] drm_gem_shmem_test_get_pages_sgt
[03:18:38] [PASSED] drm_gem_shmem_test_madvise
[03:18:38] [PASSED] drm_gem_shmem_test_purge
[03:18:38] ================== [PASSED] drm_gem_shmem ==================
[03:18:38] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[03:18:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[03:18:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[03:18:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[03:18:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[03:18:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[03:18:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[03:18:38] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[03:18:38] [PASSED] Automatic
[03:18:38] [PASSED] Full
[03:18:38] [PASSED] Limited 16:235
[03:18:38] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[03:18:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[03:18:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[03:18:38] [PASSED] drm_test_check_disable_connector
[03:18:38] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[03:18:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[03:18:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[03:18:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[03:18:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[03:18:38] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[03:18:38] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[03:18:38] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[03:18:38] [PASSED] drm_test_check_output_bpc_dvi
[03:18:38] [PASSED] drm_test_check_output_bpc_format_vic_1
[03:18:38] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[03:18:38] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[03:18:38] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[03:18:38] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[03:18:38] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[03:18:38] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[03:18:38] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[03:18:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[03:18:38] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[03:18:38] [PASSED] drm_test_check_broadcast_rgb_value
[03:18:38] [PASSED] drm_test_check_bpc_8_value
[03:18:38] [PASSED] drm_test_check_bpc_10_value
[03:18:38] [PASSED] drm_test_check_bpc_12_value
[03:18:38] [PASSED] drm_test_check_format_value
[03:18:38] [PASSED] drm_test_check_tmds_char_value
[03:18:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[03:18:38] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[03:18:38] [PASSED] drm_test_check_mode_valid
[03:18:38] [PASSED] drm_test_check_mode_valid_reject
[03:18:38] [PASSED] drm_test_check_mode_valid_reject_rate
[03:18:38] [PASSED] drm_test_check_mode_valid_reject_max_clock
[03:18:38] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[03:18:38] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[03:18:38] [PASSED] drm_test_check_infoframes
[03:18:38] [PASSED] drm_test_check_reject_avi_infoframe
[03:18:38] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[03:18:38] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[03:18:38] [PASSED] drm_test_check_reject_audio_infoframe
[03:18:38] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[03:18:38] ================= drm_managed (2 subtests) =================
[03:18:38] [PASSED] drm_test_managed_release_action
[03:18:38] [PASSED] drm_test_managed_run_action
[03:18:38] =================== [PASSED] drm_managed ===================
[03:18:38] =================== drm_mm (6 subtests) ====================
[03:18:38] [PASSED] drm_test_mm_init
[03:18:38] [PASSED] drm_test_mm_debug
[03:18:38] [PASSED] drm_test_mm_align32
[03:18:38] [PASSED] drm_test_mm_align64
[03:18:38] [PASSED] drm_test_mm_lowest
[03:18:38] [PASSED] drm_test_mm_highest
[03:18:38] ===================== [PASSED] drm_mm ======================
[03:18:38] ============= drm_modes_analog_tv (5 subtests) =============
[03:18:38] [PASSED] drm_test_modes_analog_tv_mono_576i
[03:18:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[03:18:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[03:18:38] [PASSED] drm_test_modes_analog_tv_pal_576i
[03:18:38] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[03:18:38] =============== [PASSED] drm_modes_analog_tv ===============
[03:18:38] ============== drm_plane_helper (2 subtests) ===============
[03:18:38] =============== drm_test_check_plane_state  ================
[03:18:38] [PASSED] clipping_simple
[03:18:38] [PASSED] clipping_rotate_reflect
[03:18:38] [PASSED] positioning_simple
[03:18:38] [PASSED] upscaling
[03:18:38] [PASSED] downscaling
[03:18:38] [PASSED] rounding1
[03:18:38] [PASSED] rounding2
[03:18:38] [PASSED] rounding3
[03:18:38] [PASSED] rounding4
[03:18:38] =========== [PASSED] drm_test_check_plane_state ============
[03:18:38] =========== drm_test_check_invalid_plane_state  ============
[03:18:38] [PASSED] positioning_invalid
[03:18:38] [PASSED] upscaling_invalid
[03:18:38] [PASSED] downscaling_invalid
[03:18:38] ======= [PASSED] drm_test_check_invalid_plane_state ========
[03:18:38] ================ [PASSED] drm_plane_helper =================
[03:18:38] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[03:18:38] ====== drm_test_connector_helper_tv_get_modes_check  =======
[03:18:38] [PASSED] None
[03:18:38] [PASSED] PAL
[03:18:38] [PASSED] NTSC
[03:18:38] [PASSED] Both, NTSC Default
[03:18:38] [PASSED] Both, PAL Default
[03:18:38] [PASSED] Both, NTSC Default, with PAL on command-line
[03:18:38] [PASSED] Both, PAL Default, with NTSC on command-line
[03:18:38] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[03:18:38] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[03:18:38] ================== drm_rect (9 subtests) ===================
[03:18:38] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[03:18:38] [PASSED] drm_test_rect_clip_scaled_not_clipped
[03:18:38] [PASSED] drm_test_rect_clip_scaled_clipped
[03:18:38] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[03:18:38] ================= drm_test_rect_intersect  =================
[03:18:38] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[03:18:38] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[03:18:38] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[03:18:38] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[03:18:38] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[03:18:38] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[03:18:38] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[03:18:38] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[03:18:38] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[03:18:38] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[03:18:38] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[03:18:38] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[03:18:38] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[03:18:38] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[03:18:38] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[03:18:38] ============= [PASSED] drm_test_rect_intersect =============
[03:18:38] ================ drm_test_rect_calc_hscale  ================
[03:18:38] [PASSED] normal use
[03:18:38] [PASSED] out of max range
[03:18:38] [PASSED] out of min range
[03:18:38] [PASSED] zero dst
[03:18:38] [PASSED] negative src
[03:18:38] [PASSED] negative dst
[03:18:38] ============ [PASSED] drm_test_rect_calc_hscale ============
[03:18:38] ================ drm_test_rect_calc_vscale  ================
[03:18:38] [PASSED] normal use
[03:18:38] [PASSED] out of max range
[03:18:38] [PASSED] out of min range
[03:18:38] [PASSED] zero dst
[03:18:38] [PASSED] negative src
[03:18:38] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[03:18:38] ============ [PASSED] drm_test_rect_calc_vscale ============
[03:18:38] ================== drm_test_rect_rotate  ===================
[03:18:38] [PASSED] reflect-x
[03:18:38] [PASSED] reflect-y
[03:18:38] [PASSED] rotate-0
[03:18:38] [PASSED] rotate-90
[03:18:38] [PASSED] rotate-180
[03:18:38] [PASSED] rotate-270
[03:18:38] ============== [PASSED] drm_test_rect_rotate ===============
[03:18:38] ================ drm_test_rect_rotate_inv  =================
[03:18:38] [PASSED] reflect-x
[03:18:38] [PASSED] reflect-y
[03:18:38] [PASSED] rotate-0
[03:18:38] [PASSED] rotate-90
[03:18:38] [PASSED] rotate-180
[03:18:38] [PASSED] rotate-270
[03:18:38] ============ [PASSED] drm_test_rect_rotate_inv =============
[03:18:38] ==================== [PASSED] drm_rect =====================
[03:18:38] ============ drm_sysfb_modeset_test (1 subtest) ============
[03:18:38] ============ drm_test_sysfb_build_fourcc_list  =============
[03:18:38] [PASSED] no native formats
[03:18:38] [PASSED] XRGB8888 as native format
[03:18:38] [PASSED] remove duplicates
[03:18:38] [PASSED] convert alpha formats
[03:18:38] [PASSED] random formats
[03:18:38] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[03:18:38] ============= [PASSED] drm_sysfb_modeset_test ==============
[03:18:38] ================== drm_fixp (2 subtests) ===================
[03:18:38] [PASSED] drm_test_int2fixp
[03:18:38] [PASSED] drm_test_sm2fixp
[03:18:38] ==================== [PASSED] drm_fixp =====================
[03:18:38] ============================================================
[03:18:38] Testing complete. Ran 621 tests: passed: 621
[03:18:38] Elapsed time: 26.037s total, 1.719s configuring, 24.148s building, 0.137s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[03:18:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:18:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:18:50] Starting KUnit Kernel (1/1)...
[03:18:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:18:50] ================= ttm_device (5 subtests) ==================
[03:18:50] [PASSED] ttm_device_init_basic
[03:18:50] [PASSED] ttm_device_init_multiple
[03:18:50] [PASSED] ttm_device_fini_basic
[03:18:50] [PASSED] ttm_device_init_no_vma_man
[03:18:50] ================== ttm_device_init_pools  ==================
[03:18:50] [PASSED] No DMA allocations, no DMA32 required
[03:18:50] [PASSED] DMA allocations, DMA32 required
[03:18:50] [PASSED] No DMA allocations, DMA32 required
[03:18:50] [PASSED] DMA allocations, no DMA32 required
[03:18:50] ============== [PASSED] ttm_device_init_pools ==============
[03:18:50] =================== [PASSED] ttm_device ====================
[03:18:50] ================== ttm_pool (8 subtests) ===================
[03:18:50] ================== ttm_pool_alloc_basic  ===================
[03:18:50] [PASSED] One page
[03:18:50] [PASSED] More than one page
[03:18:50] [PASSED] Above the allocation limit
[03:18:50] [PASSED] One page, with coherent DMA mappings enabled
[03:18:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:18:50] ============== [PASSED] ttm_pool_alloc_basic ===============
[03:18:50] ============== ttm_pool_alloc_basic_dma_addr  ==============
[03:18:50] [PASSED] One page
[03:18:50] [PASSED] More than one page
[03:18:50] [PASSED] Above the allocation limit
[03:18:50] [PASSED] One page, with coherent DMA mappings enabled
[03:18:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:18:50] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[03:18:50] [PASSED] ttm_pool_alloc_order_caching_match
[03:18:50] [PASSED] ttm_pool_alloc_caching_mismatch
[03:18:50] [PASSED] ttm_pool_alloc_order_mismatch
[03:18:50] [PASSED] ttm_pool_free_dma_alloc
[03:18:50] [PASSED] ttm_pool_free_no_dma_alloc
[03:18:50] [PASSED] ttm_pool_fini_basic
[03:18:50] ==================== [PASSED] ttm_pool =====================
[03:18:50] ================ ttm_resource (8 subtests) =================
[03:18:50] ================= ttm_resource_init_basic  =================
[03:18:50] [PASSED] Init resource in TTM_PL_SYSTEM
[03:18:50] [PASSED] Init resource in TTM_PL_VRAM
[03:18:50] [PASSED] Init resource in a private placement
[03:18:50] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[03:18:50] ============= [PASSED] ttm_resource_init_basic =============
[03:18:50] [PASSED] ttm_resource_init_pinned
[03:18:50] [PASSED] ttm_resource_fini_basic
[03:18:50] [PASSED] ttm_resource_manager_init_basic
[03:18:50] [PASSED] ttm_resource_manager_usage_basic
[03:18:50] [PASSED] ttm_resource_manager_set_used_basic
[03:18:50] [PASSED] ttm_sys_man_alloc_basic
[03:18:50] [PASSED] ttm_sys_man_free_basic
[03:18:50] ================== [PASSED] ttm_resource ===================
[03:18:50] =================== ttm_tt (15 subtests) ===================
[03:18:50] ==================== ttm_tt_init_basic  ====================
[03:18:50] [PASSED] Page-aligned size
[03:18:50] [PASSED] Extra pages requested
[03:18:50] ================ [PASSED] ttm_tt_init_basic ================
[03:18:50] [PASSED] ttm_tt_init_misaligned
[03:18:50] [PASSED] ttm_tt_fini_basic
[03:18:50] [PASSED] ttm_tt_fini_sg
[03:18:50] [PASSED] ttm_tt_fini_shmem
[03:18:50] [PASSED] ttm_tt_create_basic
[03:18:50] [PASSED] ttm_tt_create_invalid_bo_type
[03:18:50] [PASSED] ttm_tt_create_ttm_exists
[03:18:50] [PASSED] ttm_tt_create_failed
[03:18:50] [PASSED] ttm_tt_destroy_basic
[03:18:50] [PASSED] ttm_tt_populate_null_ttm
[03:18:50] [PASSED] ttm_tt_populate_populated_ttm
[03:18:50] [PASSED] ttm_tt_unpopulate_basic
[03:18:50] [PASSED] ttm_tt_unpopulate_empty_ttm
[03:18:50] [PASSED] ttm_tt_swapin_basic
[03:18:50] ===================== [PASSED] ttm_tt ======================
[03:18:50] =================== ttm_bo (14 subtests) ===================
[03:18:50] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[03:18:50] [PASSED] Cannot be interrupted and sleeps
[03:18:50] [PASSED] Cannot be interrupted, locks straight away
[03:18:50] [PASSED] Can be interrupted, sleeps
[03:18:50] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[03:18:50] [PASSED] ttm_bo_reserve_locked_no_sleep
[03:18:50] [PASSED] ttm_bo_reserve_no_wait_ticket
[03:18:50] [PASSED] ttm_bo_reserve_double_resv
[03:18:50] [PASSED] ttm_bo_reserve_interrupted
[03:18:50] [PASSED] ttm_bo_reserve_deadlock
[03:18:50] [PASSED] ttm_bo_unreserve_basic
[03:18:50] [PASSED] ttm_bo_unreserve_pinned
[03:18:50] [PASSED] ttm_bo_unreserve_bulk
[03:18:50] [PASSED] ttm_bo_fini_basic
[03:18:50] [PASSED] ttm_bo_fini_shared_resv
[03:18:50] [PASSED] ttm_bo_pin_basic
[03:18:50] [PASSED] ttm_bo_pin_unpin_resource
[03:18:50] [PASSED] ttm_bo_multiple_pin_one_unpin
[03:18:50] ===================== [PASSED] ttm_bo ======================
[03:18:50] ============== ttm_bo_validate (21 subtests) ===============
[03:18:50] ============== ttm_bo_init_reserved_sys_man  ===============
[03:18:50] [PASSED] Buffer object for userspace
[03:18:50] [PASSED] Kernel buffer object
[03:18:50] [PASSED] Shared buffer object
[03:18:50] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[03:18:50] ============== ttm_bo_init_reserved_mock_man  ==============
[03:18:50] [PASSED] Buffer object for userspace
[03:18:50] [PASSED] Kernel buffer object
[03:18:50] [PASSED] Shared buffer object
[03:18:50] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[03:18:50] [PASSED] ttm_bo_init_reserved_resv
[03:18:50] ================== ttm_bo_validate_basic  ==================
[03:18:50] [PASSED] Buffer object for userspace
[03:18:50] [PASSED] Kernel buffer object
[03:18:50] [PASSED] Shared buffer object
[03:18:50] ============== [PASSED] ttm_bo_validate_basic ==============
[03:18:50] [PASSED] ttm_bo_validate_invalid_placement
[03:18:50] ============= ttm_bo_validate_same_placement  ==============
[03:18:50] [PASSED] System manager
[03:18:50] [PASSED] VRAM manager
[03:18:50] ========= [PASSED] ttm_bo_validate_same_placement ==========
[03:18:50] [PASSED] ttm_bo_validate_failed_alloc
[03:18:50] [PASSED] ttm_bo_validate_pinned
[03:18:50] [PASSED] ttm_bo_validate_busy_placement
[03:18:50] ================ ttm_bo_validate_multihop  =================
[03:18:50] [PASSED] Buffer object for userspace
[03:18:50] [PASSED] Kernel buffer object
[03:18:50] [PASSED] Shared buffer object
[03:18:50] ============ [PASSED] ttm_bo_validate_multihop =============
[03:18:50] ========== ttm_bo_validate_no_placement_signaled  ==========
[03:18:50] [PASSED] Buffer object in system domain, no page vector
[03:18:50] [PASSED] Buffer object in system domain with an existing page vector
[03:18:50] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[03:18:50] ======== ttm_bo_validate_no_placement_not_signaled  ========
[03:18:50] [PASSED] Buffer object for userspace
[03:18:50] [PASSED] Kernel buffer object
[03:18:50] [PASSED] Shared buffer object
[03:18:50] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[03:18:50] [PASSED] ttm_bo_validate_move_fence_signaled
[03:18:50] ========= ttm_bo_validate_move_fence_not_signaled  =========
[03:18:50] [PASSED] Waits for GPU
[03:18:50] [PASSED] Tries to lock straight away
[03:18:50] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[03:18:50] [PASSED] ttm_bo_validate_happy_evict
[03:18:50] [PASSED] ttm_bo_validate_all_pinned_evict
[03:18:50] [PASSED] ttm_bo_validate_allowed_only_evict
[03:18:50] [PASSED] ttm_bo_validate_deleted_evict
[03:18:50] [PASSED] ttm_bo_validate_busy_domain_evict
[03:18:50] [PASSED] ttm_bo_validate_evict_gutting
[03:18:50] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[03:18:50] ================= [PASSED] ttm_bo_validate =================
[03:18:50] ============================================================
[03:18:50] Testing complete. Ran 101 tests: passed: 101
[03:18:50] Elapsed time: 11.484s total, 1.693s configuring, 9.575s building, 0.180s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 16+ messages in thread

* ✓ Xe.CI.BAT: success for Extra enabling patches for NVL-P (rev2)
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
                   ` (7 preceding siblings ...)
  2026-03-07  3:18 ` ✓ CI.KUnit: success for Extra enabling patches for NVL-P (rev2) Patchwork
@ 2026-03-07  4:44 ` Patchwork
  2026-03-08  7:59 ` ✓ Xe.CI.FULL: " Patchwork
  9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2026-03-07  4:44 UTC (permalink / raw)
  To: Gustavo Sousa; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 12151 bytes --]

== Series Details ==

Series: Extra enabling patches for NVL-P (rev2)
URL   : https://patchwork.freedesktop.org/series/162666/
State : success

== Summary ==

CI Bug Log - changes from xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a_BAT -> xe-pw-162666v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 12)
------------------------------

  Additional (3): bat-wcl-1 bat-dg2-oem2 bat-atsm-2 
  Missing    (2): bat-bmg-2 bat-bmg-3 

Known issues
------------

  Here are the changes found in xe-pw-162666v2_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@info:
    - bat-atsm-2:         NOTRUN -> [SKIP][1] ([Intel XE#2134]) +4 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@fbdev@info.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-wcl-1:          NOTRUN -> [SKIP][2] ([Intel XE#7245])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-wcl-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
    - bat-dg2-oem2:       NOTRUN -> [SKIP][3] ([Intel XE#623])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@invalid-set-prop-any:
    - bat-atsm-2:         NOTRUN -> [SKIP][4] ([i915#6077]) +30 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@kms_addfb_basic@invalid-set-prop-any.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
    - bat-atsm-2:         NOTRUN -> [SKIP][5] ([Intel XE#1024] / [Intel XE#782] / [Intel XE#947]) +5 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html

  * igt@kms_dsc@dsc-basic:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][6] ([Intel XE#2244] / [Intel XE#455])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@kms_dsc@dsc-basic.html
    - bat-atsm-2:         NOTRUN -> [SKIP][7] ([Intel XE#1024] / [Intel XE#784] / [Intel XE#947])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@kms_dsc@dsc-basic.html
    - bat-wcl-1:          NOTRUN -> [SKIP][8] ([Intel XE#7244])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-wcl-1/igt@kms_dsc@dsc-basic.html

  * igt@kms_frontbuffer_tracking@basic:
    - bat-atsm-2:         NOTRUN -> [SKIP][9] ([Intel XE#1024] / [Intel XE#783] / [Intel XE#947])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_hdmi_inject@inject-audio:
    - bat-atsm-2:         NOTRUN -> [SKIP][10] ([Intel XE#540]) +3 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_pipe_crc_basic@nonblocking-crc:
    - bat-atsm-2:         NOTRUN -> [SKIP][11] ([Intel XE#829] / [i915#1836]) +6 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@kms_pipe_crc_basic@nonblocking-crc.html

  * igt@kms_prop_blob@basic:
    - bat-atsm-2:         NOTRUN -> [SKIP][12] ([Intel XE#780])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@kms_prop_blob@basic.html

  * igt@kms_psr@psr-cursor-plane-move:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][13] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@kms_psr@psr-cursor-plane-move.html

  * igt@kms_psr@psr-primary-page-flip:
    - bat-atsm-2:         NOTRUN -> [SKIP][14] ([Intel XE#1024] / [Intel XE#947]) +6 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@kms_psr@psr-primary-page-flip.html

  * igt@sriov_basic@enable-vfs-autoprobe-off:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][15] ([Intel XE#1091] / [Intel XE#2849]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@sriov_basic@enable-vfs-autoprobe-off.html

  * igt@xe_evict@evict-small-external-cm:
    - bat-wcl-1:          NOTRUN -> [SKIP][16] ([Intel XE#7238]) +11 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-wcl-1/igt@xe_evict@evict-small-external-cm.html

  * igt@xe_exec_balancer@twice-virtual-rebind:
    - bat-wcl-1:          NOTRUN -> [SKIP][17] ([Intel XE#7482]) +17 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-wcl-1/igt@xe_exec_balancer@twice-virtual-rebind.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-userptr:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][18] ([Intel XE#288]) +32 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr.html

  * igt@xe_exec_fault_mode@twice-userptr-invalidate-imm:
    - bat-atsm-2:         NOTRUN -> [SKIP][19] ([Intel XE#288]) +32 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@xe_exec_fault_mode@twice-userptr-invalidate-imm.html

  * igt@xe_huc_copy@huc_copy:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][20] ([Intel XE#255])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@xe_huc_copy@huc_copy.html
    - bat-atsm-2:         NOTRUN -> [SKIP][21] ([Intel XE#255])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@xe_huc_copy@huc_copy.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][22] ([Intel XE#2229])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
    - bat-atsm-2:         NOTRUN -> [SKIP][23] ([Intel XE#2229])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
    - bat-wcl-1:          NOTRUN -> [SKIP][24] ([Intel XE#7239]) +2 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-wcl-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_mmap@vram:
    - bat-wcl-1:          NOTRUN -> [SKIP][25] ([Intel XE#7243])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-wcl-1/igt@xe_mmap@vram.html

  * igt@xe_pat@pat-index-xe2:
    - bat-atsm-2:         NOTRUN -> [SKIP][26] ([Intel XE#977])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@xe_pat@pat-index-xe2.html
    - bat-dg2-oem2:       NOTRUN -> [SKIP][27] ([Intel XE#977])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xehpc:
    - bat-wcl-1:          NOTRUN -> [SKIP][28] ([Intel XE#7247])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-wcl-1/igt@xe_pat@pat-index-xehpc.html
    - bat-dg2-oem2:       NOTRUN -> [SKIP][29] ([Intel XE#2838] / [Intel XE#979])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@xe_pat@pat-index-xehpc.html
    - bat-atsm-2:         NOTRUN -> [SKIP][30] ([Intel XE#2838] / [Intel XE#979])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pat@pat-index-xelp:
    - bat-wcl-1:          NOTRUN -> [SKIP][31] ([Intel XE#7242])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-wcl-1/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - bat-wcl-1:          NOTRUN -> [SKIP][32] ([Intel XE#7248])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-wcl-1/igt@xe_pat@pat-index-xelpg.html
    - bat-dg2-oem2:       NOTRUN -> [SKIP][33] ([Intel XE#979])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@xe_pat@pat-index-xelpg.html
    - bat-atsm-2:         NOTRUN -> [SKIP][34] ([Intel XE#979])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-atsm-2/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - bat-dg2-oem2:       NOTRUN -> [SKIP][35] ([Intel XE#3342])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@xe_sriov_flr@flr-vf1-clear.html

  * igt@xe_waitfence@abstime:
    - bat-dg2-oem2:       NOTRUN -> [TIMEOUT][36] ([Intel XE#6506])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@xe_waitfence@abstime.html

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       NOTRUN -> [FAIL][37] ([Intel XE#6520])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#1024]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1024
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/540
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
  [Intel XE#7238]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7238
  [Intel XE#7239]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7239
  [Intel XE#7242]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7242
  [Intel XE#7243]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7243
  [Intel XE#7244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7244
  [Intel XE#7245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7245
  [Intel XE#7247]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7247
  [Intel XE#7248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7248
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/780
  [Intel XE#782]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/782
  [Intel XE#783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/783
  [Intel XE#784]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/784
  [Intel XE#829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/829
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/947
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
  [i915#1836]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1836
  [i915#6077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6077


Build changes
-------------

  * IGT: IGT_8783 -> IGT_8784
  * Linux: xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a -> xe-pw-162666v2

  IGT_8783: b5051dc2e867005c758c707312aa9cf9d1dc3291 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8784: c7d12b3499ef1698373f246748e68c05ada0579e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a: fce8d7fb2107068c269b868d51aba5f9cf85998a
  xe-pw-162666v2: 162666v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/index.html

[-- Attachment #2: Type: text/html, Size: 14274 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

* ✓ Xe.CI.FULL: success for Extra enabling patches for NVL-P (rev2)
  2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
                   ` (8 preceding siblings ...)
  2026-03-07  4:44 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-03-08  7:59 ` Patchwork
  9 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2026-03-08  7:59 UTC (permalink / raw)
  To: Gustavo Sousa; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 28849 bytes --]

== Series Details ==

Series: Extra enabling patches for NVL-P (rev2)
URL   : https://patchwork.freedesktop.org/series/162666/
State : success

== Summary ==

CI Bug Log - changes from xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a_FULL -> xe-pw-162666v2_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-162666v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@unbind-rebind:
    - shard-bmg:          [PASS][1] -> [ABORT][2] ([Intel XE#7249])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-7/igt@core_hotunplug@unbind-rebind.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-1/igt@core_hotunplug@unbind-rebind.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][3] ([Intel XE#1407])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-7/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#2327]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-1/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-270:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#1124])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-7/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +2 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-7/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html

  * igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2314] / [Intel XE#2894] / [Intel XE#7373])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-2/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#1512] / [Intel XE#7392])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-3/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#367] / [Intel XE#7354]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-5/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2887]) +3 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-7/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs.html

  * igt@kms_chamelium_color@ctm-0-25:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2325] / [Intel XE#7358]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-4/igt@kms_chamelium_color@ctm-0-25.html

  * igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2252])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-6/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-2:
    - shard-lnl:          NOTRUN -> [FAIL][13] ([Intel XE#7305]) +9 other tests fail
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-7/igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-c-plane-2.html

  * igt@kms_cursor_crc@cursor-sliding-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2320])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-2/igt@kms_cursor_crc@cursor-sliding-256x85.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#309] / [Intel XE#7343])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-7/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#323] / [Intel XE#6035])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2286] / [Intel XE#6035])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#4331] / [Intel XE#7227])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-4/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2244])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-9/igt@kms_dsc@dsc-with-output-formats.html
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#2244])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-8/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_fbcon_fbt@psr:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#6126] / [Intel XE#776])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-8/igt@kms_fbcon_fbt@psr.html

  * igt@kms_flip@plain-flip-interruptible:
    - shard-bmg:          [PASS][22] -> [ABORT][23] ([Intel XE#5545] / [Intel XE#6652]) +1 other test abort
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-6/igt@kms_flip@plain-flip-interruptible.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-2/igt@kms_flip@plain-flip-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7178] / [Intel XE#7351])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#7178] / [Intel XE#7351])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2311]) +13 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#6312] / [Intel XE#651])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#4141]) +3 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#6312])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#656]) +3 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2313]) +4 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][32] ([Intel XE#1450] / [Intel XE#7394]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-6/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html

  * igt@kms_invalid_mode@clock-too-high@pipe-c-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#1450] / [Intel XE#2568] / [Intel XE#7394]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-6/igt@kms_invalid_mode@clock-too-high@pipe-c-edp-1.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#7283])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-8/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7283]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-7/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-lnl:          NOTRUN -> [SKIP][36] ([Intel XE#4596] / [Intel XE#5854])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-4/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#5021] / [Intel XE#7377])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-7/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format@pipe-c.html

  * igt@kms_pm_dc@dc5-dpms:
    - shard-lnl:          [PASS][39] -> [FAIL][40] ([Intel XE#7340] / [Intel XE#7504])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-lnl-7/igt@kms_pm_dc@dc5-dpms.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-1/igt@kms_pm_dc@dc5-dpms.html

  * igt@kms_pm_rpm@package-g7:
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#6813])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-1/igt@kms_pm_rpm@package-g7.html
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#6814] / [Intel XE#7428])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-1/igt@kms_pm_rpm@package-g7.html

  * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#1489]) +3 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-10/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr@fbc-psr-cursor-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-3/igt@kms_psr@fbc-psr-cursor-plane-move.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-lnl:          [PASS][45] -> [SKIP][46] ([Intel XE#4692] / [Intel XE#7508])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-lnl-4/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-1/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) +1 other test skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-3/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@xe_eudebug_online@pagefault-read-stress:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#6665] / [Intel XE#6681])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-1/igt@xe_eudebug_online@pagefault-read-stress.html

  * igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#4837] / [Intel XE#6665]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-5/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html

  * igt@xe_evict@evict-large-multi-vm:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#6540] / [Intel XE#688])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-6/igt@xe_evict@evict-large-multi-vm.html

  * igt@xe_exec_balancer@no-exec-virtual-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#7482]) +1 other test skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-3/igt@xe_exec_balancer@no-exec-virtual-userptr.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2322] / [Intel XE#7372]) +3 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-7/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#1392])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-2/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#7136]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-7/igt@xe_exec_fault_mode@many-execqueues-multi-queue-rebind-prefetch.html

  * igt@xe_exec_fault_mode@twice-multi-queue-rebind-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#7136]) +2 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-6/igt@xe_exec_fault_mode@twice-multi-queue-rebind-prefetch.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#6874]) +7 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-10/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-userptr.html

  * igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority-smem:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#6874]) +2 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-5/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-priority-smem.html

  * igt@xe_exec_sip_eudebug@breakpoint-waitsip:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#4837]) +1 other test skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-3/igt@xe_exec_sip_eudebug@breakpoint-waitsip.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
    - shard-lnl:          [PASS][59] -> [FAIL][60] ([Intel XE#5625])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-lnl-6/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-basic:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#7138]) +2 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-cm-fd-basic.html

  * igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][62] ([Intel XE#7138])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-4/igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#6964]) +1 other test skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-9/igt@xe_multigpu_svm@mgpu-atomic-op-prefetch.html

  * igt@xe_multigpu_svm@mgpu-pagefault-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#6964])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-2/igt@xe_multigpu_svm@mgpu-pagefault-prefetch.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#579] / [Intel XE#7329] / [Intel XE#7456])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-7/igt@xe_pm@vram-d3cold-threshold.html

  
#### Possible fixes ####

  * igt@kms_flip@dpms-vs-vblank-race-interruptible@a-dp2:
    - shard-bmg:          [FAIL][66] ([Intel XE#3098]) -> [PASS][67] +1 other test pass
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-1/igt@kms_flip@dpms-vs-vblank-race-interruptible@a-dp2.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-7/igt@kms_flip@dpms-vs-vblank-race-interruptible@a-dp2.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-bmg:          [FAIL][68] ([Intel XE#7545]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [FAIL][70] ([Intel XE#301]) -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a3:
    - shard-bmg:          [FAIL][72] -> [PASS][73]
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a3.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a3.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][74] ([Intel XE#1503]) -> [PASS][75]
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-9/igt@kms_hdr@invalid-hdr.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-3/igt@kms_hdr@invalid-hdr.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][76] ([Intel XE#6321]) -> [PASS][77]
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_oa@mmio-triggered-reports-read:
    - shard-lnl:          [FAIL][78] ([Intel XE#7522]) -> [PASS][79] +7 other tests pass
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-lnl-3/igt@xe_oa@mmio-triggered-reports-read.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-7/igt@xe_oa@mmio-triggered-reports-read.html
    - shard-bmg:          [FAIL][80] ([Intel XE#7522] / [Intel XE#7555]) -> [PASS][81]
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-4/igt@xe_oa@mmio-triggered-reports-read.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-9/igt@xe_oa@mmio-triggered-reports-read.html

  * igt@xe_oa@mmio-triggered-reports-read@oag-0:
    - shard-lnl:          [FAIL][82] ([Intel XE#7555]) -> [PASS][83] +1 other test pass
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-lnl-3/igt@xe_oa@mmio-triggered-reports-read@oag-0.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-lnl-7/igt@xe_oa@mmio-triggered-reports-read@oag-0.html
    - shard-bmg:          [FAIL][84] ([Intel XE#7555]) -> [PASS][85]
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-4/igt@xe_oa@mmio-triggered-reports-read@oag-0.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-9/igt@xe_oa@mmio-triggered-reports-read@oag-0.html

  * igt@xe_oa@mmio-triggered-reports-read@sag-1:
    - shard-bmg:          [FAIL][86] ([Intel XE#7522]) -> [PASS][87] +4 other tests pass
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a/shard-bmg-4/igt@xe_oa@mmio-triggered-reports-read@sag-1.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/shard-bmg-9/igt@xe_oa@mmio-triggered-reports-read@sag-1.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1450
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2568
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4692
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6126
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
  [Intel XE#6681]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6681
  [Intel XE#6813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6813
  [Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
  [Intel XE#7249]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7249
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7305]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7305
  [Intel XE#7329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7329
  [Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7373
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7392
  [Intel XE#7394]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7394
  [Intel XE#7428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7428
  [Intel XE#7456]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7456
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7504
  [Intel XE#7508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7508
  [Intel XE#7522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7522
  [Intel XE#7545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7545
  [Intel XE#7555]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7555
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776


Build changes
-------------

  * IGT: IGT_8783 -> IGT_8784
  * Linux: xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a -> xe-pw-162666v2

  IGT_8783: b5051dc2e867005c758c707312aa9cf9d1dc3291 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8784: c7d12b3499ef1698373f246748e68c05ada0579e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4675-fce8d7fb2107068c269b868d51aba5f9cf85998a: fce8d7fb2107068c269b868d51aba5f9cf85998a
  xe-pw-162666v2: 162666v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162666v2/index.html

[-- Attachment #2: Type: text/html, Size: 32043 bytes --]

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277
  2026-03-06 19:09       ` Matt Roper
@ 2026-03-09 13:25         ` Gustavo Sousa
  2026-03-09 13:54           ` Gustavo Sousa
  0 siblings, 1 reply; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-09 13:25 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-xe

Matt Roper <matthew.d.roper@intel.com> writes:

> On Fri, Mar 06, 2026 at 04:01:05PM -0300, Gustavo Sousa wrote:
>> Matt Roper <matthew.d.roper@intel.com> writes:
>> 
>> > On Fri, Mar 06, 2026 at 02:28:25PM -0300, Gustavo Sousa wrote:
>> >> Implement the KMD part of Wa_14026539277, which applies to NVL-P A0.
>> >> The KMD implementation is just one component of the workaround, which
>> >> also depends on Pcode to implement its part in order to be complete.
>> >> 
>> >> v2:
>> >>   - Add FUNC(xe_rtp_match_not_sriov_vf) to skip applying the workaround
>> >>     to SRIOV VFs. (Matt)
>> >> 
>> >> Cc: Matt Roper <matthew.d.roper@intel.com>
>> >> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>> >> ---
>> >>  drivers/gpu/drm/xe/regs/xe_gt_regs.h |  4 ++++
>> >>  drivers/gpu/drm/xe/xe_gt.c           | 27 +++++++++++++++++++++++++++
>> >>  drivers/gpu/drm/xe/xe_wa_oob.rules   |  2 ++
>> >>  3 files changed, 33 insertions(+)
>> >> 
>> >> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> >> index 66ddad767ad4..a83cafbe03fd 100644
>> >> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> >> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> >> @@ -452,6 +452,10 @@
>> >>  
>> >>  #define XEHPC_L3CLOS_MASK(i)			XE_REG_MCR(0xb194 + (i) * 8)
>> >>  
>> >> +#define L2COMPUTESIDECTRL			XE_REG_MCR(0xb1c0)
>> >> +#define   CECTRL				REG_GENMASK(2, 1)
>> >> +#define   CECTRL_CENODATA_ALWAYS		REG_FIELD_PREP(CECTRL, 0x0)
>> >> +
>> >>  #define XE2_GLOBAL_INVAL			XE_REG(0xb404)
>> >>  
>> >>  #define XE2LPM_L3SQCREG2			XE_REG_MCR(0xb604)
>> >> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>> >> index b455af1e6072..3c8692f9b8cf 100644
>> >> --- a/drivers/gpu/drm/xe/xe_gt.c
>> >> +++ b/drivers/gpu/drm/xe/xe_gt.c
>> >> @@ -450,6 +450,25 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
>> >>  	return err;
>> >>  }
>> >>  
>> >> +static void xe_gt_wa_14026539277(struct xe_gt *gt)
>> >> +{
>> >> +	u32 val;
>> >> +
>> >> +	if (!XE_GT_WA(gt, 14026539277))
>> >> +		return;
>> >> +
>> >> +	/*
>> >> +	 * L2COMPUTESIDECTRL has a specific offset for media and the GSI offset
>> >> +	 * does not apply.
>> >> +	 */
>> >> +	xe_gt_assert(gt, xe_gt_is_main_type(gt));
>> >> +
>> >> +	val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL);
>> >> +	val &= ~CECTRL;
>> >> +	val |= CECTRL_CENODATA_ALWAYS;
>> >> +	xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val);
>> >> +}
>> >> +
>> >>  int xe_gt_init_early(struct xe_gt *gt)
>> >>  {
>> >>  	int err;
>> >> @@ -575,6 +594,14 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
>> >>  	 */
>> >>  	gt->info.gmdid = xe_mmio_read32(&gt->mmio, GMD_ID);
>> >>  
>> >> +	/*
>> >> +	 * Wa_14026539277 can't be implemented as a regular GT workaround (i.e.
>> >> +	 * as an entry in gt_was[]) because we would get the hardware already in
>> >> +	 * a bad state by the time it would be applied.  Hence, we implement it
>> >> +	 * as an OOB workaround and apply it early to prevent that.
>> >> +	 */
>> >> +	xe_gt_wa_14026539277(gt);
>> >> +
>> >>  	return 0;
>> >>  }
>> >>  
>> >> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
>> >> index 80b54b195f20..03a0bf0aeb6e 100644
>> >> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
>> >> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
>> >> @@ -58,3 +58,5 @@
>> >>  
>> >>  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
>> >>  		GRAPHICS_VERSION_RANGE(2004, 3005)
>> >> +
>> >> +14026539277	PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0), GRAPHICS_VERSION(3510), FUNC(xe_rtp_match_not_sriov_vf)
>> >
>> > I don't think it's right that we have both platform matches and IP
>> > matches here; that's not something that should usually happen because
>> > the workaround is either tied to the platform (NVL) or tied to the IP
>> > (Xe3p_LPG).  For device workarounds, the handling in our graphics
>> > workaround database can be a bit confusing since what we're looking at
>> > is really just a proxy/placeholder ticket for something that was filed
>> > in a different database originally.  Due to how the databases work, they
>> > have to slap some IP release on the proxy ticket, but in this case we
>> > don't need to add a match for those to our driver rules; just the
>> > platform information is sufficient.
>> >
>> > That would also mean that this should probably be an XE_DEVICE_WA()
>> > rather than an XE_GT_WA() and the workaround function we're adding here
>> > should be renamed.
>> 
>> Hm... But are we meant to apply the programming to the media GT as well?
>> I thought the issue for this workaround was observed only on the primary
>> GT.
>> 
>
> Device workarounds operate on the xe_device rather than on any xe_gt.
> So if a device workaround asks you to do something with with GTs, you
> need to extract the relevant GTs from the device.  Novalake is
> single-tile, so in this case we'd do something like
>
>      struct xe_gt *gt = xe_device_get_root_tile(xe)->primary_gt;
>
> to grab the primary GT if that's what we're supposed to be working
> with.

Or simply loop over GTs and only apply to primary GTs? I prefer this
because it abstracts away the assumption of a single tile/primary GT
(even though we know this applies only to NVL-P and is unlikely to be
needed in other platforms).

>
>> So, should we make this a device workaround and add then make sure that
>> we apply it only on the primary GT in the function that implements it?
>> 
>> We will probably need to rework device OOB workarounds in
>> order to make this change, because stepping information is not ready by
>> the time device OOB workarounds are matched (i.e. when
>> xe_wa_process_device_oob() is called before we read the stepping
>> information into the device info).
>
> I guess we should just move the device stepping determination earlier.
> Figuring out the platform stepping only requires information from the
> PCI config space so it should be possible to do before anything else in
> the driver (i.e., we don't even need the MMIO BARs mapped yet to be able
> to determine the platform stepping --- and in theory there could be
> device workarounds that need to be taken into account during the very
> earliest parts of driver initialization).

Yep, sounds good.

I'm also going to need to make sure that xe_wa_process_device_oob() is
called after xe_sriov_probe_early(), because of
FUNC(xe_rtp_match_not_sriov_vf).

I'm wondering if it would be a good idea to have OOB workarounds being
checked lazily because of these ordering issues.  Not sure though, since
it would require more storage if we want to continue caching the results
in the bitmask (it would need an extra bitmask to check if it was alreay
evaluated); and also it adds some level of unpredictability, since there
would not be specific point where we would know workarounds are all
checked.

Another option is making sure we raise warnings for anything that is not
yet "ready" to be checked by the time a workaround check is done.  It
appears xe_device_sriov_mode() already contains an assert that would
cover that (although we could also have one specific for
xe_rtp_match_not_sriov_vf, to be safe), but I don't think the other
match functions contain that yet.

I think I like this last one better.

--
Gustavo Sousa

>
>
> Matt
>
>> 
>> --
>> Gustavo Sousa
>> 
>> >
>> >
>> > Matt
>> >
>> >> 
>> >> -- 
>> >> 2.52.0
>> >> 
>> >
>> > -- 
>> > Matt Roper
>> > Graphics Software Engineer
>> > Linux GPU Platform Enablement
>> > Intel Corporation
>
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277
  2026-03-09 13:25         ` Gustavo Sousa
@ 2026-03-09 13:54           ` Gustavo Sousa
  0 siblings, 0 replies; 16+ messages in thread
From: Gustavo Sousa @ 2026-03-09 13:54 UTC (permalink / raw)
  To: Matt Roper; +Cc: intel-xe

Gustavo Sousa <gustavo.sousa@intel.com> writes:

> Matt Roper <matthew.d.roper@intel.com> writes:
>
>> On Fri, Mar 06, 2026 at 04:01:05PM -0300, Gustavo Sousa wrote:
>>> Matt Roper <matthew.d.roper@intel.com> writes:
>>> 
>>> > On Fri, Mar 06, 2026 at 02:28:25PM -0300, Gustavo Sousa wrote:
>>> >> Implement the KMD part of Wa_14026539277, which applies to NVL-P A0.
>>> >> The KMD implementation is just one component of the workaround, which
>>> >> also depends on Pcode to implement its part in order to be complete.
>>> >> 
>>> >> v2:
>>> >>   - Add FUNC(xe_rtp_match_not_sriov_vf) to skip applying the workaround
>>> >>     to SRIOV VFs. (Matt)
>>> >> 
>>> >> Cc: Matt Roper <matthew.d.roper@intel.com>
>>> >> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
>>> >> ---
>>> >>  drivers/gpu/drm/xe/regs/xe_gt_regs.h |  4 ++++
>>> >>  drivers/gpu/drm/xe/xe_gt.c           | 27 +++++++++++++++++++++++++++
>>> >>  drivers/gpu/drm/xe/xe_wa_oob.rules   |  2 ++
>>> >>  3 files changed, 33 insertions(+)
>>> >> 
>>> >> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>>> >> index 66ddad767ad4..a83cafbe03fd 100644
>>> >> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>>> >> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>>> >> @@ -452,6 +452,10 @@
>>> >>  
>>> >>  #define XEHPC_L3CLOS_MASK(i)			XE_REG_MCR(0xb194 + (i) * 8)
>>> >>  
>>> >> +#define L2COMPUTESIDECTRL			XE_REG_MCR(0xb1c0)
>>> >> +#define   CECTRL				REG_GENMASK(2, 1)
>>> >> +#define   CECTRL_CENODATA_ALWAYS		REG_FIELD_PREP(CECTRL, 0x0)
>>> >> +
>>> >>  #define XE2_GLOBAL_INVAL			XE_REG(0xb404)
>>> >>  
>>> >>  #define XE2LPM_L3SQCREG2			XE_REG_MCR(0xb604)
>>> >> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
>>> >> index b455af1e6072..3c8692f9b8cf 100644
>>> >> --- a/drivers/gpu/drm/xe/xe_gt.c
>>> >> +++ b/drivers/gpu/drm/xe/xe_gt.c
>>> >> @@ -450,6 +450,25 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
>>> >>  	return err;
>>> >>  }
>>> >>  
>>> >> +static void xe_gt_wa_14026539277(struct xe_gt *gt)
>>> >> +{
>>> >> +	u32 val;
>>> >> +
>>> >> +	if (!XE_GT_WA(gt, 14026539277))
>>> >> +		return;
>>> >> +
>>> >> +	/*
>>> >> +	 * L2COMPUTESIDECTRL has a specific offset for media and the GSI offset
>>> >> +	 * does not apply.
>>> >> +	 */
>>> >> +	xe_gt_assert(gt, xe_gt_is_main_type(gt));
>>> >> +
>>> >> +	val = xe_gt_mcr_unicast_read_any(gt, L2COMPUTESIDECTRL);
>>> >> +	val &= ~CECTRL;
>>> >> +	val |= CECTRL_CENODATA_ALWAYS;
>>> >> +	xe_gt_mcr_multicast_write(gt, L2COMPUTESIDECTRL, val);
>>> >> +}
>>> >> +
>>> >>  int xe_gt_init_early(struct xe_gt *gt)
>>> >>  {
>>> >>  	int err;
>>> >> @@ -575,6 +594,14 @@ static int gt_init_with_gt_forcewake(struct xe_gt *gt)
>>> >>  	 */
>>> >>  	gt->info.gmdid = xe_mmio_read32(&gt->mmio, GMD_ID);
>>> >>  
>>> >> +	/*
>>> >> +	 * Wa_14026539277 can't be implemented as a regular GT workaround (i.e.
>>> >> +	 * as an entry in gt_was[]) because we would get the hardware already in
>>> >> +	 * a bad state by the time it would be applied.  Hence, we implement it
>>> >> +	 * as an OOB workaround and apply it early to prevent that.
>>> >> +	 */
>>> >> +	xe_gt_wa_14026539277(gt);
>>> >> +
>>> >>  	return 0;
>>> >>  }
>>> >>  
>>> >> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
>>> >> index 80b54b195f20..03a0bf0aeb6e 100644
>>> >> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
>>> >> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
>>> >> @@ -58,3 +58,5 @@
>>> >>  
>>> >>  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
>>> >>  		GRAPHICS_VERSION_RANGE(2004, 3005)
>>> >> +
>>> >> +14026539277	PLATFORM(NOVALAKE_P), PLATFORM_STEP(A0, B0), GRAPHICS_VERSION(3510), FUNC(xe_rtp_match_not_sriov_vf)
>>> >
>>> > I don't think it's right that we have both platform matches and IP
>>> > matches here; that's not something that should usually happen because
>>> > the workaround is either tied to the platform (NVL) or tied to the IP
>>> > (Xe3p_LPG).  For device workarounds, the handling in our graphics
>>> > workaround database can be a bit confusing since what we're looking at
>>> > is really just a proxy/placeholder ticket for something that was filed
>>> > in a different database originally.  Due to how the databases work, they
>>> > have to slap some IP release on the proxy ticket, but in this case we
>>> > don't need to add a match for those to our driver rules; just the
>>> > platform information is sufficient.
>>> >
>>> > That would also mean that this should probably be an XE_DEVICE_WA()
>>> > rather than an XE_GT_WA() and the workaround function we're adding here
>>> > should be renamed.
>>> 
>>> Hm... But are we meant to apply the programming to the media GT as well?
>>> I thought the issue for this workaround was observed only on the primary
>>> GT.
>>> 
>>
>> Device workarounds operate on the xe_device rather than on any xe_gt.
>> So if a device workaround asks you to do something with with GTs, you
>> need to extract the relevant GTs from the device.  Novalake is
>> single-tile, so in this case we'd do something like
>>
>>      struct xe_gt *gt = xe_device_get_root_tile(xe)->primary_gt;
>>
>> to grab the primary GT if that's what we're supposed to be working
>> with.
>
> Or simply loop over GTs and only apply to primary GTs? I prefer this
> because it abstracts away the assumption of a single tile/primary GT
> (even though we know this applies only to NVL-P and is unlikely to be
> needed in other platforms).

Hm... I'm thinking about simply keeping the same function (renamed) and
call site in xe_gt.c, replacing the check with XE_DEVICE_WA() and
applying only if it is the primary GT.  The reason for that is that we
need to apply this workaround early, and I am not sure we have a good
place to apply it on xe_device.c code.

We had issues when applying it as a regular gt_was[] entry, and we would
probably run into the same kind of issues if doing it afterxe_gt_init().

--
Gustavo Sousa

>
>>
>>> So, should we make this a device workaround and add then make sure that
>>> we apply it only on the primary GT in the function that implements it?
>>> 
>>> We will probably need to rework device OOB workarounds in
>>> order to make this change, because stepping information is not ready by
>>> the time device OOB workarounds are matched (i.e. when
>>> xe_wa_process_device_oob() is called before we read the stepping
>>> information into the device info).
>>
>> I guess we should just move the device stepping determination earlier.
>> Figuring out the platform stepping only requires information from the
>> PCI config space so it should be possible to do before anything else in
>> the driver (i.e., we don't even need the MMIO BARs mapped yet to be able
>> to determine the platform stepping --- and in theory there could be
>> device workarounds that need to be taken into account during the very
>> earliest parts of driver initialization).
>
> Yep, sounds good.
>
> I'm also going to need to make sure that xe_wa_process_device_oob() is
> called after xe_sriov_probe_early(), because of
> FUNC(xe_rtp_match_not_sriov_vf).
>
> I'm wondering if it would be a good idea to have OOB workarounds being
> checked lazily because of these ordering issues.  Not sure though, since
> it would require more storage if we want to continue caching the results
> in the bitmask (it would need an extra bitmask to check if it was alreay
> evaluated); and also it adds some level of unpredictability, since there
> would not be specific point where we would know workarounds are all
> checked.
>
> Another option is making sure we raise warnings for anything that is not
> yet "ready" to be checked by the time a workaround check is done.  It
> appears xe_device_sriov_mode() already contains an assert that would
> cover that (although we could also have one specific for
> xe_rtp_match_not_sriov_vf, to be safe), but I don't think the other
> match functions contain that yet.
>
> I think I like this last one better.
>
> --
> Gustavo Sousa
>
>>
>>
>> Matt
>>
>>> 
>>> --
>>> Gustavo Sousa
>>> 
>>> >
>>> >
>>> > Matt
>>> >
>>> >> 
>>> >> -- 
>>> >> 2.52.0
>>> >> 
>>> >
>>> > -- 
>>> > Matt Roper
>>> > Graphics Software Engineer
>>> > Linux GPU Platform Enablement
>>> > Intel Corporation
>>
>> -- 
>> Matt Roper
>> Graphics Software Engineer
>> Linux GPU Platform Enablement
>> Intel Corporation

^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2026-03-09 13:54 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-03-06 17:28 [PATCH v2 0/7] Extra enabling patches for NVL-P Gustavo Sousa
2026-03-06 17:28 ` [PATCH v2 1/7] drm/xe: Modify stepping info directly in xe_step_*_get() Gustavo Sousa
2026-03-06 17:28 ` [PATCH v2 2/7] drm/xe: Drop unused IS_PLATFORM_STEP() and IS_SUBPLATFORM_STEP() Gustavo Sousa
2026-03-06 17:28 ` [PATCH v2 3/7] drm/xe/nvlp: Read platform-level stepping info Gustavo Sousa
2026-03-06 17:28 ` [PATCH v2 4/7] drm/xe/rtp: Add support for matching platform-level stepping Gustavo Sousa
2026-03-06 17:28 ` [PATCH v2 5/7] drm/xe/nvlp: Implement Wa_14026539277 Gustavo Sousa
2026-03-06 18:39   ` Matt Roper
2026-03-06 19:01     ` Gustavo Sousa
2026-03-06 19:09       ` Matt Roper
2026-03-09 13:25         ` Gustavo Sousa
2026-03-09 13:54           ` Gustavo Sousa
2026-03-06 17:28 ` [PATCH v2 6/7] drm/xe/xe3p: Drop Wa_16028780921 Gustavo Sousa
2026-03-06 17:28 ` [PATCH v2 7/7] drm/xe: Translate C-state "reset value" into RC6 Gustavo Sousa
2026-03-07  3:18 ` ✓ CI.KUnit: success for Extra enabling patches for NVL-P (rev2) Patchwork
2026-03-07  4:44 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-08  7:59 ` ✓ Xe.CI.FULL: " Patchwork

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox