* [PATCH 01/11] drm/i915: Decouple i915_gem_dumb_create() from the display a bit
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-02-04 11:15 ` Jani Nikula
2025-01-24 16:30 ` [PATCH 02/11] drm/i915: Decouple intel_fb_bo.h interfaces from driver specific types Ville Syrjala
` (18 subsequent siblings)
19 siblings, 1 reply; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pass the device argument as drm_device to intel_plane_fb_max_stride()
to decouple i915_gem_dumb_create() vs. the display code a bit.
xe currently doesn't even call this, but it probably should...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 6 ++++--
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_fb.c | 4 ++--
drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +-
4 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7d68d652c1bc..157863428b52 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -713,13 +713,15 @@ void intel_add_fb_offsets(int *x, int *y,
*y += state->view.color_plane[color_plane].y;
}
-u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
+u32 intel_plane_fb_max_stride(struct drm_device *dev,
u32 pixel_format, u64 modifier)
{
+ struct intel_display *display = to_intel_display(dev);
+ struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc *crtc;
struct intel_plane *plane;
- if (!HAS_DISPLAY(dev_priv))
+ if (!HAS_DISPLAY(display))
return 0;
/*
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 49a246feb1ae..b9ed0deb3f69 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -421,7 +421,7 @@ void intel_link_compute_m_n(u16 bpp, int nlanes,
int pixel_clock, int link_clock,
int bw_overhead,
struct intel_link_m_n *m_n);
-u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
+u32 intel_plane_fb_max_stride(struct drm_device *dev,
u32 pixel_format, u64 modifier);
enum drm_mode_status
intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 9f7f1b9f3275..3121371635bb 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -1847,7 +1847,7 @@ u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
*/
if (DISPLAY_VER(dev_priv) < 4 || intel_fb_is_ccs_modifier(modifier) ||
intel_fb_modifier_uses_dpt(dev_priv, modifier))
- return intel_plane_fb_max_stride(dev_priv, pixel_format, modifier);
+ return intel_plane_fb_max_stride(&dev_priv->drm, pixel_format, modifier);
else if (DISPLAY_VER(dev_priv) >= 7)
return 256 * 1024;
else
@@ -1861,7 +1861,7 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
unsigned int tile_width;
if (is_surface_linear(fb, color_plane)) {
- unsigned int max_stride = intel_plane_fb_max_stride(dev_priv,
+ unsigned int max_stride = intel_plane_fb_max_stride(&dev_priv->drm,
fb->format->format,
fb->modifier);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index 19156ba4b9ef..c3e6a325872d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -193,7 +193,7 @@ i915_gem_dumb_create(struct drm_file *file,
args->pitch = ALIGN(args->width * cpp, 64);
/* align stride to page size so that we can remap */
- if (args->pitch > intel_plane_fb_max_stride(to_i915(dev), format,
+ if (args->pitch > intel_plane_fb_max_stride(dev, format,
DRM_FORMAT_MOD_LINEAR))
args->pitch = ALIGN(args->pitch, 4096);
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* Re: [PATCH 01/11] drm/i915: Decouple i915_gem_dumb_create() from the display a bit
2025-01-24 16:30 ` [PATCH 01/11] drm/i915: Decouple i915_gem_dumb_create() from the display a bit Ville Syrjala
@ 2025-02-04 11:15 ` Jani Nikula
0 siblings, 0 replies; 23+ messages in thread
From: Jani Nikula @ 2025-02-04 11:15 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe
On Fri, 24 Jan 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Pass the device argument as drm_device to intel_plane_fb_max_stride()
> to decouple i915_gem_dumb_create() vs. the display code a bit.
>
> xe currently doesn't even call this, but it probably should...
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 6 ++++--
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/display/intel_fb.c | 4 ++--
> drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +-
> 4 files changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 7d68d652c1bc..157863428b52 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -713,13 +713,15 @@ void intel_add_fb_offsets(int *x, int *y,
> *y += state->view.color_plane[color_plane].y;
> }
>
> -u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
> +u32 intel_plane_fb_max_stride(struct drm_device *dev,
Purely subjective, but I've mostly been using struct drm_device *drm
where that's still needed.
BR,
Jani.
> u32 pixel_format, u64 modifier)
> {
> + struct intel_display *display = to_intel_display(dev);
> + struct drm_i915_private *dev_priv = to_i915(dev);
> struct intel_crtc *crtc;
> struct intel_plane *plane;
>
> - if (!HAS_DISPLAY(dev_priv))
> + if (!HAS_DISPLAY(display))
> return 0;
>
> /*
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 49a246feb1ae..b9ed0deb3f69 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -421,7 +421,7 @@ void intel_link_compute_m_n(u16 bpp, int nlanes,
> int pixel_clock, int link_clock,
> int bw_overhead,
> struct intel_link_m_n *m_n);
> -u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
> +u32 intel_plane_fb_max_stride(struct drm_device *dev,
> u32 pixel_format, u64 modifier);
> enum drm_mode_status
> intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index 9f7f1b9f3275..3121371635bb 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -1847,7 +1847,7 @@ u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
> */
> if (DISPLAY_VER(dev_priv) < 4 || intel_fb_is_ccs_modifier(modifier) ||
> intel_fb_modifier_uses_dpt(dev_priv, modifier))
> - return intel_plane_fb_max_stride(dev_priv, pixel_format, modifier);
> + return intel_plane_fb_max_stride(&dev_priv->drm, pixel_format, modifier);
> else if (DISPLAY_VER(dev_priv) >= 7)
> return 256 * 1024;
> else
> @@ -1861,7 +1861,7 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
> unsigned int tile_width;
>
> if (is_surface_linear(fb, color_plane)) {
> - unsigned int max_stride = intel_plane_fb_max_stride(dev_priv,
> + unsigned int max_stride = intel_plane_fb_max_stride(&dev_priv->drm,
> fb->format->format,
> fb->modifier);
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c
> index 19156ba4b9ef..c3e6a325872d 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
> @@ -193,7 +193,7 @@ i915_gem_dumb_create(struct drm_file *file,
> args->pitch = ALIGN(args->width * cpp, 64);
>
> /* align stride to page size so that we can remap */
> - if (args->pitch > intel_plane_fb_max_stride(to_i915(dev), format,
> + if (args->pitch > intel_plane_fb_max_stride(dev, format,
> DRM_FORMAT_MOD_LINEAR))
> args->pitch = ALIGN(args->pitch, 4096);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 02/11] drm/i915: Decouple intel_fb_bo.h interfaces from driver specific types
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
2025-01-24 16:30 ` [PATCH 01/11] drm/i915: Decouple i915_gem_dumb_create() from the display a bit Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-24 16:30 ` [PATCH 03/11] drm/i915: Convert intel_crtc.c to struct intel_display Ville Syrjala
` (17 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make the intel_fb_bo.h interfaces operated purely in base
drm_ types so that each driver (i915 and xe) doesn't have to
know about each other, or the display stuff.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 5 ++---
drivers/gpu/drm/i915/display/intel_fb_bo.c | 5 +++--
drivers/gpu/drm/i915/display/intel_fb_bo.h | 8 ++++----
drivers/gpu/drm/xe/display/intel_fb_bo.c | 7 ++++---
4 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 3121371635bb..f8944eaa9995 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -2078,7 +2078,7 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
int ret = -EINVAL;
int i;
- ret = intel_fb_bo_framebuffer_init(intel_fb, obj, mode_cmd);
+ ret = intel_fb_bo_framebuffer_init(fb, obj, mode_cmd);
if (ret)
return ret;
@@ -2194,9 +2194,8 @@ intel_user_framebuffer_create(struct drm_device *dev,
struct drm_framebuffer *fb;
struct drm_gem_object *obj;
struct drm_mode_fb_cmd2 mode_cmd = *user_mode_cmd;
- struct drm_i915_private *i915 = to_i915(dev);
- obj = intel_fb_bo_lookup_valid_bo(i915, filp, &mode_cmd);
+ obj = intel_fb_bo_lookup_valid_bo(dev, filp, &mode_cmd);
if (IS_ERR(obj))
return ERR_CAST(obj);
diff --git a/drivers/gpu/drm/i915/display/intel_fb_bo.c b/drivers/gpu/drm/i915/display/intel_fb_bo.c
index 810ca6ff8640..56f029962261 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_bo.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_bo.c
@@ -16,7 +16,7 @@ void intel_fb_bo_framebuffer_fini(struct drm_gem_object *obj)
/* Nothing to do for i915 */
}
-int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
+int intel_fb_bo_framebuffer_init(struct drm_framebuffer *fb,
struct drm_gem_object *_obj,
struct drm_mode_fb_cmd2 *mode_cmd)
{
@@ -76,10 +76,11 @@ int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
}
struct drm_gem_object *
-intel_fb_bo_lookup_valid_bo(struct drm_i915_private *i915,
+intel_fb_bo_lookup_valid_bo(struct drm_device *dev,
struct drm_file *filp,
const struct drm_mode_fb_cmd2 *mode_cmd)
{
+ struct drm_i915_private *i915 = to_i915(dev);
struct drm_i915_gem_object *obj;
obj = i915_gem_object_lookup(filp, mode_cmd->handles[0]);
diff --git a/drivers/gpu/drm/i915/display/intel_fb_bo.h b/drivers/gpu/drm/i915/display/intel_fb_bo.h
index e71acd1bcb24..1357ecad5a0a 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_bo.h
+++ b/drivers/gpu/drm/i915/display/intel_fb_bo.h
@@ -6,20 +6,20 @@
#ifndef __INTEL_FB_BO_H__
#define __INTEL_FB_BO_H__
+struct drm_device;
struct drm_file;
+struct drm_framebuffer;
struct drm_gem_object;
-struct drm_i915_private;
struct drm_mode_fb_cmd2;
-struct intel_framebuffer;
void intel_fb_bo_framebuffer_fini(struct drm_gem_object *obj);
-int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
+int intel_fb_bo_framebuffer_init(struct drm_framebuffer *fb,
struct drm_gem_object *obj,
struct drm_mode_fb_cmd2 *mode_cmd);
struct drm_gem_object *
-intel_fb_bo_lookup_valid_bo(struct drm_i915_private *i915,
+intel_fb_bo_lookup_valid_bo(struct drm_device *dev,
struct drm_file *filp,
const struct drm_mode_fb_cmd2 *user_mode_cmd);
diff --git a/drivers/gpu/drm/xe/display/intel_fb_bo.c b/drivers/gpu/drm/xe/display/intel_fb_bo.c
index 4d209ebc26c2..c97f61569b89 100644
--- a/drivers/gpu/drm/xe/display/intel_fb_bo.c
+++ b/drivers/gpu/drm/xe/display/intel_fb_bo.c
@@ -24,7 +24,7 @@ void intel_fb_bo_framebuffer_fini(struct drm_gem_object *obj)
xe_bo_put(bo);
}
-int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
+int intel_fb_bo_framebuffer_init(struct drm_framebuffer *fb,
struct drm_gem_object *obj,
struct drm_mode_fb_cmd2 *mode_cmd)
{
@@ -68,10 +68,11 @@ int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
return ret;
}
-struct drm_gem_object *intel_fb_bo_lookup_valid_bo(struct drm_i915_private *i915,
+struct drm_gem_object *intel_fb_bo_lookup_valid_bo(struct drm_device *dev,
struct drm_file *filp,
const struct drm_mode_fb_cmd2 *mode_cmd)
{
+ struct xe_device *xe = to_xe_device(dev);
struct xe_bo *bo;
struct drm_gem_object *gem = drm_gem_object_lookup(filp, mode_cmd->handles[0]);
@@ -80,7 +81,7 @@ struct drm_gem_object *intel_fb_bo_lookup_valid_bo(struct drm_i915_private *i915
bo = gem_to_xe_bo(gem);
/* Require vram placement or dma-buf import */
- if (IS_DGFX(i915) &&
+ if (IS_DGFX(xe) &&
!xe_bo_can_migrate(bo, XE_PL_VRAM0) &&
bo->ttm.type != ttm_bo_type_sg) {
drm_gem_object_put(gem);
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 03/11] drm/i915: Convert intel_crtc.c to struct intel_display
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
2025-01-24 16:30 ` [PATCH 01/11] drm/i915: Decouple i915_gem_dumb_create() from the display a bit Ville Syrjala
2025-01-24 16:30 ` [PATCH 02/11] drm/i915: Decouple intel_fb_bo.h interfaces from driver specific types Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-24 16:30 ` [PATCH 04/11] drm/i915: Convert intel_fb.c " Ville Syrjala
` (16 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
struct intel_display will replace struct drm_i915_private as
the main thing for display code. Convert intel_crtc.c code to
use it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 4 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 3 +-
drivers/gpu/drm/i915/display/intel_audio.c | 3 +-
drivers/gpu/drm/i915/display/intel_crtc.c | 55 ++++++++++---------
drivers/gpu/drm/i915/display/intel_crtc.h | 7 +--
drivers/gpu/drm/i915/display/intel_display.c | 3 +-
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 3 +-
8 files changed, 41 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 56353377466c..434de337814c 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -224,7 +224,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
* 2. Program DP PLL enable
*/
if (IS_IRONLAKE(dev_priv))
- intel_wait_for_vblank_if_active(dev_priv, !crtc->pipe);
+ intel_wait_for_vblank_if_active(display, !crtc->pipe);
intel_dp->DP |= DP_PLL_ENABLE;
@@ -471,7 +471,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
intel_de_write(display, intel_dp->output_reg, intel_dp->DP);
intel_de_posting_read(display, intel_dp->output_reg);
- intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
+ intel_wait_for_vblank_if_active(display, PIPE_A);
intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
}
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 98e6a931042f..3aaa7f9e9210 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -384,6 +384,7 @@ static void intel_disable_hdmi(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_device *dev = encoder->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
@@ -426,7 +427,7 @@ static void intel_disable_hdmi(struct intel_atomic_state *state,
intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
- intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
+ intel_wait_for_vblank_if_active(display, PIPE_A);
intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
}
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index 113d763e6ef3..f145f83346ca 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -954,13 +954,12 @@ static int glk_force_audio_cdclk_commit(struct intel_atomic_state *state,
static void glk_force_audio_cdclk(struct intel_display *display,
bool enable)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct drm_modeset_acquire_ctx ctx;
struct drm_atomic_state *state;
struct intel_crtc *crtc;
int ret;
- crtc = intel_first_crtc(i915);
+ crtc = intel_first_crtc(display);
if (!crtc)
return;
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index e69b28779ac5..87e4a7a91f23 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -45,9 +45,9 @@ static void assert_vblank_disabled(struct drm_crtc *crtc)
drm_crtc_vblank_put(crtc);
}
-struct intel_crtc *intel_first_crtc(struct drm_i915_private *i915)
+struct intel_crtc *intel_first_crtc(struct intel_display *display)
{
- return to_intel_crtc(drm_crtc_from_index(&i915->drm, 0));
+ return to_intel_crtc(drm_crtc_from_index(display->drm, 0));
}
struct intel_crtc *intel_crtc_for_pipe(struct intel_display *display,
@@ -68,10 +68,9 @@ void intel_crtc_wait_for_next_vblank(struct intel_crtc *crtc)
drm_crtc_wait_one_vblank(&crtc->base);
}
-void intel_wait_for_vblank_if_active(struct drm_i915_private *i915,
+void intel_wait_for_vblank_if_active(struct intel_display *display,
enum pipe pipe)
{
- struct intel_display *display = &i915->display;
struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
if (crtc->active)
@@ -93,7 +92,7 @@ u32 intel_crtc_get_vblank_counter(struct intel_crtc *crtc)
u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
/*
* From Gen 11, in case of dsi cmd mode, frame counter wouldn't
@@ -109,13 +108,13 @@ u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state)
* On i965gm the hardware frame counter reads
* zero when the TV encoder is enabled :(
*/
- if (IS_I965GM(dev_priv) &&
+ if (display->platform.i965gm &&
(crtc_state->output_types & BIT(INTEL_OUTPUT_TVOUT)))
return 0;
- if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
+ if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
return 0xffffffff; /* full 32 bit counter */
- else if (DISPLAY_VER(dev_priv) >= 3)
+ else if (DISPLAY_VER(display) >= 3)
return 0xffffff; /* only 24 bits of frame count */
else
return 0; /* Gen2 doesn't have a hardware frame counter */
@@ -142,8 +141,8 @@ void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state)
void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct intel_display *display = to_intel_display(crtc);
/*
* Should really happen exactly when we disable the pipe
@@ -304,8 +303,9 @@ static const struct drm_crtc_funcs i8xx_crtc_funcs = {
.get_vblank_timestamp = intel_crtc_get_vblank_timestamp,
};
-int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
+int intel_crtc_init(struct intel_display *display, enum pipe pipe)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_plane *primary, *cursor;
const struct drm_crtc_funcs *funcs;
struct intel_crtc *crtc;
@@ -316,9 +316,9 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
return PTR_ERR(crtc);
crtc->pipe = pipe;
- crtc->num_scalers = DISPLAY_RUNTIME_INFO(dev_priv)->num_scalers[pipe];
+ crtc->num_scalers = DISPLAY_RUNTIME_INFO(display)->num_scalers[pipe];
- if (DISPLAY_VER(dev_priv) >= 9)
+ if (DISPLAY_VER(display) >= 9)
primary = skl_universal_plane_create(dev_priv, pipe, PLANE_1);
else
primary = intel_primary_plane_create(dev_priv, pipe);
@@ -351,32 +351,34 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
}
crtc->plane_ids_mask |= BIT(cursor->id);
- if (HAS_GMCH(dev_priv)) {
- if (IS_CHERRYVIEW(dev_priv) ||
- IS_VALLEYVIEW(dev_priv) || IS_G4X(dev_priv))
+ if (HAS_GMCH(display)) {
+ if (display->platform.cherryview ||
+ display->platform.valleyview ||
+ display->platform.g4x)
funcs = &g4x_crtc_funcs;
- else if (DISPLAY_VER(dev_priv) == 4)
+ else if (DISPLAY_VER(display) == 4)
funcs = &i965_crtc_funcs;
- else if (IS_I945GM(dev_priv) || IS_I915GM(dev_priv))
+ else if (display->platform.i945gm ||
+ display->platform.i915gm)
funcs = &i915gm_crtc_funcs;
- else if (DISPLAY_VER(dev_priv) == 3)
+ else if (DISPLAY_VER(display) == 3)
funcs = &i915_crtc_funcs;
else
funcs = &i8xx_crtc_funcs;
} else {
- if (DISPLAY_VER(dev_priv) >= 8)
+ if (DISPLAY_VER(display) >= 8)
funcs = &bdw_crtc_funcs;
else
funcs = &ilk_crtc_funcs;
}
- ret = drm_crtc_init_with_planes(&dev_priv->drm, &crtc->base,
+ ret = drm_crtc_init_with_planes(display->drm, &crtc->base,
&primary->base, &cursor->base,
funcs, "pipe %c", pipe_name(pipe));
if (ret)
goto fail;
- if (DISPLAY_VER(dev_priv) >= 11)
+ if (DISPLAY_VER(display) >= 11)
drm_crtc_create_scaling_filter_property(&crtc->base,
BIT(DRM_SCALING_FILTER_DEFAULT) |
BIT(DRM_SCALING_FILTER_NEAREST_NEIGHBOR));
@@ -387,7 +389,7 @@ int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
cpu_latency_qos_add_request(&crtc->vblank_pm_qos, PM_QOS_DEFAULT_VALUE);
- drm_WARN_ON(&dev_priv->drm, drm_crtc_index(&crtc->base) != crtc->pipe);
+ drm_WARN_ON(display->drm, drm_crtc_index(&crtc->base) != crtc->pipe);
return 0;
@@ -512,7 +514,7 @@ int intel_scanlines_to_usecs(const struct drm_display_mode *adjusted_mode,
void intel_pipe_update_start(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
struct intel_crtc_state *new_crtc_state =
@@ -546,7 +548,7 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
intel_vblank_evade_init(old_crtc_state, new_crtc_state, &evade);
- if (drm_WARN_ON(&dev_priv->drm, drm_crtc_vblank_get(&crtc->base)))
+ if (drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base)))
goto irq_disable;
/*
@@ -649,13 +651,14 @@ void intel_crtc_prepare_vblank_event(struct intel_crtc_state *crtc_state,
void intel_pipe_update_end(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(state);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
enum pipe pipe = crtc->pipe;
int scanline_end = intel_get_crtc_scanline(crtc);
u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc);
ktime_t end_vbl_time = ktime_get();
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
if (new_crtc_state->do_async_flip)
goto out;
@@ -666,7 +669,7 @@ void intel_pipe_update_end(struct intel_atomic_state *state,
* Incase of mipi dsi command mode, we need to set frame update
* request for every commit.
*/
- if (DISPLAY_VER(dev_priv) >= 11 &&
+ if (DISPLAY_VER(display) >= 11 &&
intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI))
icl_dsi_frame_update(new_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.h b/drivers/gpu/drm/i915/display/intel_crtc.h
index de54ae1deedf..8c14ff8b391e 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.h
+++ b/drivers/gpu/drm/i915/display/intel_crtc.h
@@ -13,7 +13,6 @@ enum pipe;
struct drm_device;
struct drm_display_mode;
struct drm_file;
-struct drm_i915_private;
struct drm_pending_vblank_event;
struct intel_atomic_state;
struct intel_crtc;
@@ -38,7 +37,7 @@ void intel_crtc_arm_vblank_event(struct intel_crtc_state *crtc_state);
void intel_crtc_prepare_vblank_event(struct intel_crtc_state *crtc_state,
struct drm_pending_vblank_event **event);
u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state);
-int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe);
+int intel_crtc_init(struct intel_display *display, enum pipe pipe);
int intel_crtc_get_pipe_from_crtc_id_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv);
struct intel_crtc_state *intel_crtc_state_alloc(struct intel_crtc *crtc);
@@ -52,10 +51,10 @@ void intel_pipe_update_start(struct intel_atomic_state *state,
void intel_pipe_update_end(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_wait_for_vblank_workers(struct intel_atomic_state *state);
-struct intel_crtc *intel_first_crtc(struct drm_i915_private *i915);
+struct intel_crtc *intel_first_crtc(struct intel_display *display);
struct intel_crtc *intel_crtc_for_pipe(struct intel_display *display,
enum pipe pipe);
-void intel_wait_for_vblank_if_active(struct drm_i915_private *i915,
+void intel_wait_for_vblank_if_active(struct intel_display *display,
enum pipe pipe);
void intel_crtc_wait_for_next_vblank(struct intel_crtc *crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 157863428b52..51e87ef3e4e4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -717,7 +717,6 @@ u32 intel_plane_fb_max_stride(struct drm_device *dev,
u32 pixel_format, u64 modifier)
{
struct intel_display *display = to_intel_display(dev);
- struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc *crtc;
struct intel_plane *plane;
@@ -729,7 +728,7 @@ u32 intel_plane_fb_max_stride(struct drm_device *dev,
* the highest stride limits of them all,
* if in case pipe A is disabled, use the first pipe from pipe_mask.
*/
- crtc = intel_first_crtc(dev_priv);
+ crtc = intel_first_crtc(display);
if (!crtc)
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 73ea0e906014..f1db87182de6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -444,7 +444,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display)
INTEL_NUM_PIPES(display) > 1 ? "s" : "");
for_each_pipe(display, pipe) {
- ret = intel_crtc_init(i915, pipe);
+ ret = intel_crtc_init(display, pipe);
if (ret)
goto err_mode_config;
}
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index ca8aeb17c909..6ebd099d8861 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1838,6 +1838,7 @@ static void intel_disable_sdvo(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
@@ -1873,7 +1874,7 @@ static void intel_disable_sdvo(struct intel_atomic_state *state,
temp &= ~SDVO_ENABLE;
intel_sdvo_write_sdvox(intel_sdvo, temp);
- intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
+ intel_wait_for_vblank_if_active(display, PIPE_A);
intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
}
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 04/11] drm/i915: Convert intel_fb.c to struct intel_display
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (2 preceding siblings ...)
2025-01-24 16:30 ` [PATCH 03/11] drm/i915: Convert intel_crtc.c to struct intel_display Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-24 16:30 ` [PATCH 05/11] drm/i915: Convert intel_display_power_{get, put}*() to intel_display Ville Syrjala
` (15 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
struct intel_display will replace struct drm_i915_private as
the main thing for display code. Convert the fb code to
use it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 3 +-
drivers/gpu/drm/i915/display/intel_cursor.c | 3 +-
drivers/gpu/drm/i915/display/intel_fb.c | 244 +++++++++---------
drivers/gpu/drm/i915/display/intel_fb.h | 11 +-
drivers/gpu/drm/i915/display/intel_fb_bo.c | 13 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 2 +-
.../drm/i915/display/skl_universal_plane.c | 5 +-
7 files changed, 146 insertions(+), 135 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index ed171fbf8720..949014802e52 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -854,6 +854,7 @@ static const struct drm_plane_funcs i8xx_plane_funcs = {
struct intel_plane *
intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
{
+ struct intel_display *display = &dev_priv->display;
struct intel_plane *plane;
const struct drm_plane_funcs *plane_funcs;
unsigned int supported_rotations;
@@ -982,7 +983,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
}
}
- modifiers = intel_fb_plane_get_modifiers(dev_priv, INTEL_PLANE_CAP_TILING_X);
+ modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_TILING_X);
if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 48c3d212f690..819e61b26b7d 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -984,6 +984,7 @@ struct intel_plane *
intel_cursor_plane_create(struct drm_i915_private *dev_priv,
enum pipe pipe)
{
+ struct intel_display *display = &dev_priv->display;
struct intel_plane *cursor;
int ret, zpos;
u64 *modifiers;
@@ -1026,7 +1027,7 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
cursor->cursor.size = ~0;
- modifiers = intel_fb_plane_get_modifiers(dev_priv, INTEL_PLANE_CAP_NONE);
+ modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_NONE);
ret = drm_universal_plane_init(&dev_priv->drm, &cursor->base,
0, &intel_cursor_plane_funcs,
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index f8944eaa9995..faaa849112c8 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -20,7 +20,7 @@
#include "intel_fb_bo.h"
#include "intel_frontbuffer.h"
-#define check_array_bounds(i915, a, i) drm_WARN_ON(&(i915)->drm, (i) >= ARRAY_SIZE(a))
+#define check_array_bounds(display, a, i) drm_WARN_ON((display)->drm, (i) >= ARRAY_SIZE(a))
/*
* From the Sky Lake PRM:
@@ -539,11 +539,13 @@ static bool check_modifier_display_ver_range(const struct intel_modifier_desc *m
display_ver_from <= md->display_ver.until;
}
-static bool plane_has_modifier(struct drm_i915_private *i915,
+static bool plane_has_modifier(struct intel_display *display,
u8 plane_caps,
const struct intel_modifier_desc *md)
{
- if (!IS_DISPLAY_VER(i915, md->display_ver.from, md->display_ver.until))
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
+ if (!IS_DISPLAY_VER(display, md->display_ver.from, md->display_ver.until))
return false;
if (!plane_caps_contain_all(plane_caps, md->plane_caps))
@@ -570,14 +572,14 @@ static bool plane_has_modifier(struct drm_i915_private *i915,
/**
* intel_fb_plane_get_modifiers: Get the modifiers for the given platform and plane capabilities
- * @i915: i915 device instance
+ * @display: display instance
* @plane_caps: capabilities for the plane the modifiers are queried for
*
* Returns:
- * Returns the list of modifiers allowed by the @i915 platform and @plane_caps.
+ * Returns the list of modifiers allowed by the @display platform and @plane_caps.
* The caller must free the returned buffer.
*/
-u64 *intel_fb_plane_get_modifiers(struct drm_i915_private *i915,
+u64 *intel_fb_plane_get_modifiers(struct intel_display *display,
u8 plane_caps)
{
u64 *list, *p;
@@ -585,17 +587,17 @@ u64 *intel_fb_plane_get_modifiers(struct drm_i915_private *i915,
int i;
for (i = 0; i < ARRAY_SIZE(intel_modifiers); i++) {
- if (plane_has_modifier(i915, plane_caps, &intel_modifiers[i]))
+ if (plane_has_modifier(display, plane_caps, &intel_modifiers[i]))
count++;
}
list = kmalloc_array(count, sizeof(*list), GFP_KERNEL);
- if (drm_WARN_ON(&i915->drm, !list))
+ if (drm_WARN_ON(display->drm, !list))
return NULL;
p = list;
for (i = 0; i < ARRAY_SIZE(intel_modifiers); i++) {
- if (plane_has_modifier(i915, plane_caps, &intel_modifiers[i]))
+ if (plane_has_modifier(display, plane_caps, &intel_modifiers[i]))
*p++ = intel_modifiers[i].modifier;
}
*p++ = DRM_FORMAT_MOD_INVALID;
@@ -751,33 +753,34 @@ static unsigned int gen12_ccs_aux_stride(struct intel_framebuffer *fb, int ccs_p
int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane)
{
const struct intel_modifier_desc *md = lookup_modifier(fb->modifier);
- struct drm_i915_private *i915 = to_i915(fb->dev);
+ struct intel_display *display = to_intel_display(fb->dev);
if (md->ccs.packed_aux_planes | md->ccs.planar_aux_planes)
return main_to_ccs_plane(fb, main_plane);
- else if (DISPLAY_VER(i915) < 11 &&
+ else if (DISPLAY_VER(display) < 11 &&
format_is_yuv_semiplanar(md, fb->format))
return 1;
else
return 0;
}
-unsigned int intel_tile_size(const struct drm_i915_private *i915)
+unsigned int intel_tile_size(struct intel_display *display)
{
- return DISPLAY_VER(i915) == 2 ? 2048 : 4096;
+ return DISPLAY_VER(display) == 2 ? 2048 : 4096;
}
unsigned int
intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
{
- struct drm_i915_private *dev_priv = to_i915(fb->dev);
+ struct intel_display *display = to_intel_display(fb->dev);
+ struct drm_i915_private *i915 = to_i915(display->drm);
unsigned int cpp = fb->format->cpp[color_plane];
switch (fb->modifier) {
case DRM_FORMAT_MOD_LINEAR:
- return intel_tile_size(dev_priv);
+ return intel_tile_size(display);
case I915_FORMAT_MOD_X_TILED:
- if (DISPLAY_VER(dev_priv) == 2)
+ if (DISPLAY_VER(display) == 2)
return 128;
else
return 512;
@@ -807,7 +810,7 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
return 64;
fallthrough;
case I915_FORMAT_MOD_Y_TILED:
- if (DISPLAY_VER(dev_priv) == 2 || HAS_128_BYTE_Y_TILING(dev_priv))
+ if (DISPLAY_VER(display) == 2 || HAS_128_BYTE_Y_TILING(i915))
return 128;
else
return 512;
@@ -838,7 +841,9 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane)
unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane)
{
- return intel_tile_size(to_i915(fb->dev)) /
+ struct intel_display *display = to_intel_display(fb->dev);
+
+ return intel_tile_size(display) /
intel_tile_width_bytes(fb, color_plane);
}
@@ -890,15 +895,17 @@ intel_fb_align_height(const struct drm_framebuffer *fb,
return ALIGN(height, tile_height);
}
-bool intel_fb_modifier_uses_dpt(struct drm_i915_private *i915, u64 modifier)
+bool intel_fb_modifier_uses_dpt(struct intel_display *display, u64 modifier)
{
- return HAS_DPT(i915) && modifier != DRM_FORMAT_MOD_LINEAR;
+ return HAS_DPT(display) && modifier != DRM_FORMAT_MOD_LINEAR;
}
bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)
{
- return to_i915(fb->dev)->display.params.enable_dpt &&
- intel_fb_modifier_uses_dpt(to_i915(fb->dev), fb->modifier);
+ struct intel_display *display = to_intel_display(fb->dev);
+
+ return display->params.enable_dpt &&
+ intel_fb_modifier_uses_dpt(display, fb->modifier);
}
void intel_fb_plane_get_subsampling(int *hsub, int *vsub,
@@ -1007,16 +1014,16 @@ static u32 intel_adjust_aligned_offset(int *x, int *y,
unsigned int pitch,
u32 old_offset, u32 new_offset)
{
- struct drm_i915_private *i915 = to_i915(fb->dev);
+ struct intel_display *display = to_intel_display(fb->dev);
unsigned int cpp = fb->format->cpp[color_plane];
- drm_WARN_ON(&i915->drm, new_offset > old_offset);
+ drm_WARN_ON(display->drm, new_offset > old_offset);
if (!is_surface_linear(fb, color_plane)) {
unsigned int tile_size, tile_width, tile_height;
unsigned int pitch_tiles;
- tile_size = intel_tile_size(i915);
+ tile_size = intel_tile_size(display);
intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
if (drm_rotation_90_or_270(rotation)) {
@@ -1066,7 +1073,7 @@ u32 intel_plane_adjust_aligned_offset(int *x, int *y,
* used. This is why the user has to pass in the pitch since it
* is specified in the rotated orientation.
*/
-static u32 intel_compute_aligned_offset(struct drm_i915_private *i915,
+static u32 intel_compute_aligned_offset(struct intel_display *display,
int *x, int *y,
const struct drm_framebuffer *fb,
int color_plane,
@@ -1081,7 +1088,7 @@ static u32 intel_compute_aligned_offset(struct drm_i915_private *i915,
unsigned int tile_size, tile_width, tile_height;
unsigned int tile_rows, tiles, pitch_tiles;
- tile_size = intel_tile_size(i915);
+ tile_size = intel_tile_size(display);
intel_tile_dims(fb, color_plane, &tile_width, &tile_height);
if (drm_rotation_90_or_270(rotation)) {
@@ -1125,14 +1132,14 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
const struct intel_plane_state *state,
int color_plane)
{
+ struct intel_display *display = to_intel_display(state);
struct intel_plane *plane = to_intel_plane(state->uapi.plane);
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = state->hw.fb;
unsigned int rotation = state->hw.rotation;
unsigned int pitch = state->view.color_plane[color_plane].mapping_stride;
unsigned int alignment = plane->min_alignment(plane, fb, color_plane);
- return intel_compute_aligned_offset(i915, x, y, fb, color_plane,
+ return intel_compute_aligned_offset(display, x, y, fb, color_plane,
pitch, rotation, alignment);
}
@@ -1141,16 +1148,16 @@ static int intel_fb_offset_to_xy(int *x, int *y,
const struct drm_framebuffer *fb,
int color_plane)
{
- struct drm_i915_private *i915 = to_i915(fb->dev);
+ struct intel_display *display = to_intel_display(fb->dev);
unsigned int height, alignment, unused;
if (fb->modifier != DRM_FORMAT_MOD_LINEAR)
- alignment = intel_tile_size(i915);
+ alignment = intel_tile_size(display);
else
alignment = 0;
if (alignment != 0 && fb->offsets[color_plane] % alignment) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Misaligned offset 0x%08x for color plane %d\n",
fb->offsets[color_plane], color_plane);
return -EINVAL;
@@ -1162,7 +1169,7 @@ static int intel_fb_offset_to_xy(int *x, int *y,
/* Catch potential overflows early */
if (check_add_overflow(mul_u32_u32(height, fb->pitches[color_plane]),
fb->offsets[color_plane], &unused)) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Bad offset 0x%08x or pitch %d for color plane %d\n",
fb->offsets[color_plane], fb->pitches[color_plane],
color_plane);
@@ -1182,7 +1189,7 @@ static int intel_fb_offset_to_xy(int *x, int *y,
static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane, int x, int y)
{
- struct drm_i915_private *i915 = to_i915(fb->dev);
+ struct intel_display *display = to_intel_display(fb->dev);
const struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
int main_plane;
int hsub, vsub;
@@ -1216,13 +1223,12 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
* x/y offsets must match between CCS and the main surface.
*/
if (main_x != ccs_x || main_y != ccs_y) {
- drm_dbg_kms(&i915->drm,
- "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
- main_x, main_y,
- ccs_x, ccs_y,
- intel_fb->normal_view.color_plane[main_plane].x,
- intel_fb->normal_view.color_plane[main_plane].y,
- x, y);
+ drm_dbg_kms(display->drm,
+ "Bad CCS x/y (main %d,%d ccs %d,%d) full (main %d,%d ccs %d,%d)\n",
+ main_x, main_y, ccs_x, ccs_y,
+ intel_fb->normal_view.color_plane[main_plane].x,
+ intel_fb->normal_view.color_plane[main_plane].y,
+ x, y);
return -EINVAL;
}
@@ -1231,8 +1237,8 @@ static int intel_fb_check_ccs_xy(const struct drm_framebuffer *fb, int ccs_plane
static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int i;
@@ -1246,7 +1252,7 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
* Would also need to deal with the fence POT alignment
* and gen2 2KiB GTT tile size.
*/
- if (DISPLAY_VER(i915) < 4)
+ if (DISPLAY_VER(display) < 4)
return false;
/*
@@ -1258,7 +1264,7 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
/* Linear needs a page aligned stride for remapping */
if (fb->modifier == DRM_FORMAT_MOD_LINEAR) {
- unsigned int alignment = intel_tile_size(i915) - 1;
+ unsigned int alignment = intel_tile_size(display) - 1;
for (i = 0; i < fb->format->num_planes; i++) {
if (fb->pitches[i] & alignment)
@@ -1271,9 +1277,9 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
{
- struct drm_i915_private *i915 = to_i915(fb->base.dev);
+ struct intel_display *display = to_intel_display(fb->base.dev);
- return (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14) &&
+ return (display->platform.alderlake_p || DISPLAY_VER(display) >= 14) &&
intel_fb_uses_dpt(&fb->base);
}
@@ -1318,12 +1324,13 @@ static bool intel_plane_needs_remap(const struct intel_plane_state *plane_state)
static int convert_plane_offset_to_xy(const struct intel_framebuffer *fb, int color_plane,
int plane_width, int *x, int *y)
{
+ struct intel_display *display = to_intel_display(fb->base.dev);
struct drm_gem_object *obj = intel_fb_bo(&fb->base);
int ret;
ret = intel_fb_offset_to_xy(x, y, &fb->base, color_plane);
if (ret) {
- drm_dbg_kms(fb->base.dev,
+ drm_dbg_kms(display->drm,
"bad fb plane %d offset: 0x%x\n",
color_plane, fb->base.offsets[color_plane]);
return ret;
@@ -1344,7 +1351,7 @@ static int convert_plane_offset_to_xy(const struct intel_framebuffer *fb, int co
*/
if (color_plane == 0 && intel_bo_is_tiled(obj) &&
(*x + plane_width) * fb->base.format->cpp[color_plane] > fb->base.pitches[color_plane]) {
- drm_dbg_kms(fb->base.dev,
+ drm_dbg_kms(display->drm,
"bad fb plane %d offset: 0x%x\n",
color_plane, fb->base.offsets[color_plane]);
return -EINVAL;
@@ -1355,11 +1362,11 @@ static int convert_plane_offset_to_xy(const struct intel_framebuffer *fb, int co
static u32 calc_plane_aligned_offset(const struct intel_framebuffer *fb, int color_plane, int *x, int *y)
{
- struct drm_i915_private *i915 = to_i915(fb->base.dev);
- unsigned int tile_size = intel_tile_size(i915);
+ struct intel_display *display = to_intel_display(fb->base.dev);
+ unsigned int tile_size = intel_tile_size(display);
u32 offset;
- offset = intel_compute_aligned_offset(i915, x, y, &fb->base, color_plane,
+ offset = intel_compute_aligned_offset(display, x, y, &fb->base, color_plane,
fb->base.pitches[color_plane],
DRM_MODE_ROTATE_0,
tile_size);
@@ -1410,10 +1417,10 @@ plane_view_scanout_stride(const struct intel_framebuffer *fb, int color_plane,
unsigned int tile_width,
unsigned int src_stride_tiles, unsigned int dst_stride_tiles)
{
- struct drm_i915_private *i915 = to_i915(fb->base.dev);
+ struct intel_display *display = to_intel_display(fb->base.dev);
unsigned int stride_tiles;
- if ((IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14) &&
+ if ((display->platform.alderlake_p || DISPLAY_VER(display) >= 14) &&
src_stride_tiles < dst_stride_tiles)
stride_tiles = src_stride_tiles;
else
@@ -1443,23 +1450,23 @@ plane_view_linear_tiles(const struct intel_framebuffer *fb, int color_plane,
const struct fb_plane_view_dims *dims,
int x, int y)
{
- struct drm_i915_private *i915 = to_i915(fb->base.dev);
+ struct intel_display *display = to_intel_display(fb->base.dev);
unsigned int size;
size = (y + dims->height) * fb->base.pitches[color_plane] +
x * fb->base.format->cpp[color_plane];
- return DIV_ROUND_UP(size, intel_tile_size(i915));
+ return DIV_ROUND_UP(size, intel_tile_size(display));
}
#define assign_chk_ovf(i915, var, val) ({ \
- drm_WARN_ON(&(i915)->drm, overflows_type(val, var)); \
+ drm_WARN_ON((i915)->drm, overflows_type(val, var)); \
(var) = (val); \
})
-#define assign_bfld_chk_ovf(i915, var, val) ({ \
+#define assign_bfld_chk_ovf(display, var, val) ({ \
(var) = (val); \
- drm_WARN_ON(&(i915)->drm, (var) != (val)); \
+ drm_WARN_ON((display)->drm, (var) != (val)); \
(var); \
})
@@ -1468,38 +1475,38 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
u32 obj_offset, u32 gtt_offset, int x, int y,
struct intel_fb_view *view)
{
- struct drm_i915_private *i915 = to_i915(fb->base.dev);
+ struct intel_display *display = to_intel_display(fb->base.dev);
struct intel_remapped_plane_info *remap_info = &view->gtt.remapped.plane[color_plane];
struct i915_color_plane_view *color_plane_info = &view->color_plane[color_plane];
unsigned int tile_width = dims->tile_width;
unsigned int tile_height = dims->tile_height;
- unsigned int tile_size = intel_tile_size(i915);
+ unsigned int tile_size = intel_tile_size(display);
struct drm_rect r;
u32 size = 0;
- assign_bfld_chk_ovf(i915, remap_info->offset, obj_offset);
+ assign_bfld_chk_ovf(display, remap_info->offset, obj_offset);
if (intel_fb_is_gen12_ccs_aux_plane(&fb->base, color_plane)) {
remap_info->linear = 1;
- assign_chk_ovf(i915, remap_info->size,
+ assign_chk_ovf(display, remap_info->size,
plane_view_linear_tiles(fb, color_plane, dims, x, y));
} else {
remap_info->linear = 0;
- assign_chk_ovf(i915, remap_info->src_stride,
+ assign_chk_ovf(display, remap_info->src_stride,
plane_view_src_stride_tiles(fb, color_plane, dims));
- assign_chk_ovf(i915, remap_info->width,
+ assign_chk_ovf(display, remap_info->width,
plane_view_width_tiles(fb, color_plane, dims, x));
- assign_chk_ovf(i915, remap_info->height,
+ assign_chk_ovf(display, remap_info->height,
plane_view_height_tiles(fb, color_plane, dims, y));
}
if (view->gtt.type == I915_GTT_VIEW_ROTATED) {
- drm_WARN_ON(&i915->drm, remap_info->linear);
- check_array_bounds(i915, view->gtt.rotated.plane, color_plane);
+ drm_WARN_ON(display->drm, remap_info->linear);
+ check_array_bounds(display, view->gtt.rotated.plane, color_plane);
- assign_chk_ovf(i915, remap_info->dst_stride,
+ assign_chk_ovf(display, remap_info->dst_stride,
plane_view_dst_stride_tiles(fb, color_plane, remap_info->height));
/* rotate the x/y offsets to match the GTT view */
@@ -1520,9 +1527,9 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
/* rotate the tile dimensions to match the GTT view */
swap(tile_width, tile_height);
} else {
- drm_WARN_ON(&i915->drm, view->gtt.type != I915_GTT_VIEW_REMAPPED);
+ drm_WARN_ON(display->drm, view->gtt.type != I915_GTT_VIEW_REMAPPED);
- check_array_bounds(i915, view->gtt.remapped.plane, color_plane);
+ check_array_bounds(display, view->gtt.remapped.plane, color_plane);
if (view->gtt.remapped.plane_alignment) {
u32 aligned_offset = ALIGN(gtt_offset,
@@ -1556,7 +1563,7 @@ static u32 calc_plane_remap_info(const struct intel_framebuffer *fb, int color_p
dst_stride = plane_view_dst_stride_tiles(fb, color_plane, dst_stride);
- assign_chk_ovf(i915, remap_info->dst_stride, dst_stride);
+ assign_chk_ovf(display, remap_info->dst_stride, dst_stride);
color_plane_info->mapping_stride = dst_stride *
tile_width *
fb->base.format->cpp[color_plane];
@@ -1614,20 +1621,23 @@ calc_plane_normal_size(const struct intel_framebuffer *fb, int color_plane,
return tiles;
}
-static void intel_fb_view_init(struct drm_i915_private *i915, struct intel_fb_view *view,
+static void intel_fb_view_init(struct intel_display *display,
+ struct intel_fb_view *view,
enum i915_gtt_view_type view_type)
{
memset(view, 0, sizeof(*view));
view->gtt.type = view_type;
if (view_type == I915_GTT_VIEW_REMAPPED &&
- (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14))
+ (display->platform.alderlake_p || DISPLAY_VER(display) >= 14))
view->gtt.remapped.plane_alignment = SZ_2M / PAGE_SIZE;
}
bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb)
{
- if (DISPLAY_VER(to_i915(fb->base.dev)) >= 13)
+ struct intel_display *display = to_intel_display(fb->base.dev);
+
+ if (DISPLAY_VER(display) >= 13)
return false;
return fb->base.modifier == I915_FORMAT_MOD_Y_TILED ||
@@ -1636,11 +1646,11 @@ bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb)
static unsigned int intel_fb_min_alignment(const struct drm_framebuffer *fb)
{
- struct drm_i915_private *i915 = to_i915(fb->dev);
+ struct intel_display *display = to_intel_display(fb->dev);
struct intel_plane *plane;
unsigned int min_alignment = 0;
- for_each_intel_plane(&i915->drm, plane) {
+ for_each_intel_plane(display->drm, plane) {
unsigned int plane_min_alignment;
if (!drm_plane_has_format(&plane->base, fb->format->format, fb->modifier))
@@ -1648,7 +1658,7 @@ static unsigned int intel_fb_min_alignment(const struct drm_framebuffer *fb)
plane_min_alignment = plane->min_alignment(plane, fb, 0);
- drm_WARN_ON(&i915->drm, plane_min_alignment &&
+ drm_WARN_ON(display->drm, plane_min_alignment &&
!is_power_of_2(plane_min_alignment));
if (intel_plane_needs_physical(plane))
@@ -1660,25 +1670,25 @@ static unsigned int intel_fb_min_alignment(const struct drm_framebuffer *fb)
return min_alignment;
}
-int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *fb)
+int intel_fill_fb_info(struct intel_display *display, struct intel_framebuffer *fb)
{
struct drm_gem_object *obj = intel_fb_bo(&fb->base);
u32 gtt_offset_rotated = 0;
u32 gtt_offset_remapped = 0;
unsigned int max_size = 0;
int i, num_planes = fb->base.format->num_planes;
- unsigned int tile_size = intel_tile_size(i915);
+ unsigned int tile_size = intel_tile_size(display);
- intel_fb_view_init(i915, &fb->normal_view, I915_GTT_VIEW_NORMAL);
+ intel_fb_view_init(display, &fb->normal_view, I915_GTT_VIEW_NORMAL);
- drm_WARN_ON(&i915->drm,
+ drm_WARN_ON(display->drm,
intel_fb_supports_90_270_rotation(fb) &&
intel_fb_needs_pot_stride_remap(fb));
if (intel_fb_supports_90_270_rotation(fb))
- intel_fb_view_init(i915, &fb->rotated_view, I915_GTT_VIEW_ROTATED);
+ intel_fb_view_init(display, &fb->rotated_view, I915_GTT_VIEW_ROTATED);
if (intel_fb_needs_pot_stride_remap(fb))
- intel_fb_view_init(i915, &fb->remapped_view, I915_GTT_VIEW_REMAPPED);
+ intel_fb_view_init(display, &fb->remapped_view, I915_GTT_VIEW_REMAPPED);
for (i = 0; i < num_planes; i++) {
struct fb_plane_view_dims view_dims;
@@ -1697,14 +1707,14 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *
unsigned int end;
if (!IS_ALIGNED(fb->base.offsets[i], 64)) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"fb misaligned clear color plane %d offset (0x%x)\n",
i, fb->base.offsets[i]);
return -EINVAL;
}
if (check_add_overflow(fb->base.offsets[i], 64, &end)) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"fb bad clear color plane %d offset (0x%x)\n",
i, fb->base.offsets[i]);
return -EINVAL;
@@ -1750,7 +1760,7 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *
}
if (mul_u32_u32(max_size, tile_size) > obj->size) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"fb too big for bo (need %llu bytes, have %zu bytes)\n",
mul_u32_u32(max_size, tile_size), obj->size);
return -EINVAL;
@@ -1763,8 +1773,7 @@ int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *
static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
{
- struct drm_i915_private *i915 =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
unsigned int rotation = plane_state->hw.rotation;
@@ -1773,7 +1782,7 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
unsigned int src_w, src_h;
u32 gtt_offset = 0;
- intel_fb_view_init(i915, &plane_state->view,
+ intel_fb_view_init(display, &plane_state->view,
drm_rotation_90_or_270(rotation) ? I915_GTT_VIEW_ROTATED :
I915_GTT_VIEW_REMAPPED);
@@ -1782,7 +1791,7 @@ static void intel_plane_remap_gtt(struct intel_plane_state *plane_state)
src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
- drm_WARN_ON(&i915->drm, intel_fb_is_ccs_modifier(fb->modifier));
+ drm_WARN_ON(display->drm, intel_fb_is_ccs_modifier(fb->modifier));
/* Make src coordinates relative to the viewport */
drm_rect_translate(&plane_state->uapi.src,
@@ -1836,7 +1845,7 @@ void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotatio
}
static
-u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
+u32 intel_fb_max_stride(struct intel_display *display,
u32 pixel_format, u64 modifier)
{
/*
@@ -1845,10 +1854,10 @@ u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
*
* The new CCS hash mode makes remapping impossible
*/
- if (DISPLAY_VER(dev_priv) < 4 || intel_fb_is_ccs_modifier(modifier) ||
- intel_fb_modifier_uses_dpt(dev_priv, modifier))
- return intel_plane_fb_max_stride(&dev_priv->drm, pixel_format, modifier);
- else if (DISPLAY_VER(dev_priv) >= 7)
+ if (DISPLAY_VER(display) < 4 || intel_fb_is_ccs_modifier(modifier) ||
+ intel_fb_modifier_uses_dpt(display, modifier))
+ return intel_plane_fb_max_stride(display->drm, pixel_format, modifier);
+ else if (DISPLAY_VER(display) >= 7)
return 256 * 1024;
else
return 128 * 1024;
@@ -1857,11 +1866,11 @@ u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
static unsigned int
intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
{
- struct drm_i915_private *dev_priv = to_i915(fb->dev);
+ struct intel_display *display = to_intel_display(fb->dev);
unsigned int tile_width;
if (is_surface_linear(fb, color_plane)) {
- unsigned int max_stride = intel_plane_fb_max_stride(&dev_priv->drm,
+ unsigned int max_stride = intel_plane_fb_max_stride(display->drm,
fb->format->format,
fb->modifier);
@@ -1871,7 +1880,7 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
*/
if (fb->pitches[color_plane] > max_stride &&
!intel_fb_is_ccs_modifier(fb->modifier))
- return intel_tile_size(dev_priv);
+ return intel_tile_size(display);
else
return 64;
}
@@ -1882,7 +1891,7 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
* On TGL the surface stride must be 4 tile aligned, mapped by
* one 64 byte cacheline on the CCS AUX surface.
*/
- if (DISPLAY_VER(dev_priv) >= 12)
+ if (DISPLAY_VER(display) >= 12)
tile_width *= 4;
/*
* Display WA #0531: skl,bxt,kbl,glk
@@ -1893,7 +1902,7 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
* require the entire fb to accommodate that to avoid
* potential runtime errors at plane configuration time.
*/
- else if ((DISPLAY_VER(dev_priv) == 9 || IS_GEMINILAKE(dev_priv)) &&
+ else if ((DISPLAY_VER(display) == 9 || display->platform.geminilake) &&
color_plane == 0 && fb->width > 3840)
tile_width *= 4;
}
@@ -1902,6 +1911,7 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
@@ -1923,7 +1933,7 @@ static int intel_plane_check_stride(const struct intel_plane_state *plane_state)
fb->modifier, rotation);
if (stride > max_stride) {
- drm_dbg_kms(plane->base.dev,
+ drm_dbg_kms(display->drm,
"[FB:%d] stride (%d) exceeds [PLANE:%d:%s] max stride (%d)\n",
fb->base.id, stride,
plane->base.base.id, plane->base.name, max_stride);
@@ -2072,7 +2082,7 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
struct drm_gem_object *obj,
struct drm_mode_fb_cmd2 *mode_cmd)
{
- struct drm_i915_private *dev_priv = to_i915(obj->dev);
+ struct intel_display *display = to_intel_display(obj->dev);
struct drm_framebuffer *fb = &intel_fb->base;
u32 max_stride;
int ret = -EINVAL;
@@ -2089,19 +2099,19 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
}
ret = -EINVAL;
- if (!drm_any_plane_has_format(&dev_priv->drm,
+ if (!drm_any_plane_has_format(display->drm,
mode_cmd->pixel_format,
mode_cmd->modifier[0])) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"unsupported pixel format %p4cc / modifier 0x%llx\n",
&mode_cmd->pixel_format, mode_cmd->modifier[0]);
goto err_frontbuffer_put;
}
- max_stride = intel_fb_max_stride(dev_priv, mode_cmd->pixel_format,
+ max_stride = intel_fb_max_stride(display, mode_cmd->pixel_format,
mode_cmd->modifier[0]);
if (mode_cmd->pitches[0] > max_stride) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"%s pitch (%u) must be at most %d\n",
mode_cmd->modifier[0] != DRM_FORMAT_MOD_LINEAR ?
"tiled" : "linear",
@@ -2111,26 +2121,25 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
/* FIXME need to adjust LINOFF/TILEOFF accordingly. */
if (mode_cmd->offsets[0] != 0) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"plane 0 offset (0x%08x) must be 0\n",
mode_cmd->offsets[0]);
goto err_frontbuffer_put;
}
- drm_helper_mode_fill_fb_struct(&dev_priv->drm, fb, mode_cmd);
+ drm_helper_mode_fill_fb_struct(display->drm, fb, mode_cmd);
for (i = 0; i < fb->format->num_planes; i++) {
unsigned int stride_alignment;
if (mode_cmd->handles[i] != mode_cmd->handles[0]) {
- drm_dbg_kms(&dev_priv->drm, "bad plane %d handle\n",
- i);
+ drm_dbg_kms(display->drm, "bad plane %d handle\n", i);
goto err_frontbuffer_put;
}
stride_alignment = intel_fb_stride_alignment(fb, i);
if (fb->pitches[i] & (stride_alignment - 1)) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"plane %d pitch (%d) must be at least %u byte aligned\n",
i, fb->pitches[i], stride_alignment);
goto err_frontbuffer_put;
@@ -2140,10 +2149,9 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
unsigned int ccs_aux_stride = gen12_ccs_aux_stride(intel_fb, i);
if (fb->pitches[i] != ccs_aux_stride) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"ccs aux plane %d pitch (%d) must be %d\n",
- i,
- fb->pitches[i], ccs_aux_stride);
+ i, fb->pitches[i], ccs_aux_stride);
goto err_frontbuffer_put;
}
}
@@ -2151,7 +2159,7 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
fb->obj[i] = obj;
}
- ret = intel_fill_fb_info(dev_priv, intel_fb);
+ ret = intel_fill_fb_info(display, intel_fb);
if (ret)
goto err_frontbuffer_put;
@@ -2160,7 +2168,7 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
vm = intel_dpt_create(intel_fb);
if (IS_ERR(vm)) {
- drm_dbg_kms(&dev_priv->drm, "failed to create DPT\n");
+ drm_dbg_kms(display->drm, "failed to create DPT\n");
ret = PTR_ERR(vm);
goto err_frontbuffer_put;
}
@@ -2168,9 +2176,9 @@ int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
intel_fb->dpt_vm = vm;
}
- ret = drm_framebuffer_init(&dev_priv->drm, fb, &intel_fb_funcs);
+ ret = drm_framebuffer_init(display->drm, fb, &intel_fb_funcs);
if (ret) {
- drm_err(&dev_priv->drm, "framebuffer init failed %d\n", ret);
+ drm_err(display->drm, "framebuffer init failed %d\n", ret);
goto err_free_dpt;
}
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index d78993e5eb62..56cd8250570f 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -13,9 +13,8 @@ struct drm_device;
struct drm_file;
struct drm_framebuffer;
struct drm_gem_object;
-struct drm_i915_gem_object;
-struct drm_i915_private;
struct drm_mode_fb_cmd2;
+struct intel_display;
struct intel_fb_view;
struct intel_framebuffer;
struct intel_plane;
@@ -41,7 +40,7 @@ bool intel_fb_is_tile4_modifier(u64 modifier);
bool intel_fb_is_ccs_aux_plane(const struct drm_framebuffer *fb, int color_plane);
int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb);
-u64 *intel_fb_plane_get_modifiers(struct drm_i915_private *i915,
+u64 *intel_fb_plane_get_modifiers(struct intel_display *display,
u8 plane_caps);
bool intel_fb_plane_supports_modifier(struct intel_plane *plane, u64 modifier);
@@ -58,7 +57,7 @@ int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane);
int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane);
int skl_main_to_aux_plane(const struct drm_framebuffer *fb, int main_plane);
-unsigned int intel_tile_size(const struct drm_i915_private *i915);
+unsigned int intel_tile_size(struct intel_display *display);
unsigned int intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane);
unsigned int intel_tile_height(const struct drm_framebuffer *fb, int color_plane);
unsigned int intel_tile_row_size(const struct drm_framebuffer *fb, int color_plane);
@@ -80,7 +79,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb);
bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb);
-int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *fb);
+int intel_fill_fb_info(struct intel_display *display, struct intel_framebuffer *fb);
void intel_fb_fill_view(const struct intel_framebuffer *fb, unsigned int rotation,
struct intel_fb_view *view);
int intel_plane_compute_gtt(struct intel_plane_state *plane_state);
@@ -96,7 +95,7 @@ intel_user_framebuffer_create(struct drm_device *dev,
struct drm_file *filp,
const struct drm_mode_fb_cmd2 *user_mode_cmd);
-bool intel_fb_modifier_uses_dpt(struct drm_i915_private *i915, u64 modifier);
+bool intel_fb_modifier_uses_dpt(struct intel_display *display, u64 modifier);
bool intel_fb_uses_dpt(const struct drm_framebuffer *fb);
unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier);
diff --git a/drivers/gpu/drm/i915/display/intel_fb_bo.c b/drivers/gpu/drm/i915/display/intel_fb_bo.c
index 56f029962261..39d488d17630 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_bo.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_bo.c
@@ -8,6 +8,7 @@
#include "gem/i915_gem_object.h"
#include "i915_drv.h"
+#include "intel_display_types.h"
#include "intel_fb.h"
#include "intel_fb_bo.h"
@@ -21,7 +22,7 @@ int intel_fb_bo_framebuffer_init(struct drm_framebuffer *fb,
struct drm_mode_fb_cmd2 *mode_cmd)
{
struct drm_i915_gem_object *obj = to_intel_bo(_obj);
- struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct intel_display *display = to_intel_display(obj->base.dev);
unsigned int tiling, stride;
i915_gem_object_lock(obj, NULL);
@@ -36,7 +37,7 @@ int intel_fb_bo_framebuffer_init(struct drm_framebuffer *fb,
*/
if (tiling != I915_TILING_NONE &&
tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"tiling_mode doesn't match fb modifier\n");
return -EINVAL;
}
@@ -44,7 +45,7 @@ int intel_fb_bo_framebuffer_init(struct drm_framebuffer *fb,
if (tiling == I915_TILING_X) {
mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED;
} else if (tiling == I915_TILING_Y) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"No Y tiling for legacy addfb\n");
return -EINVAL;
}
@@ -54,9 +55,9 @@ int intel_fb_bo_framebuffer_init(struct drm_framebuffer *fb,
* gen2/3 display engine uses the fence if present,
* so the tiling mode must match the fb modifier exactly.
*/
- if (DISPLAY_VER(i915) < 4 &&
+ if (DISPLAY_VER(display) < 4 &&
tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"tiling_mode must match fb modifier exactly on gen2/3\n");
return -EINVAL;
}
@@ -66,7 +67,7 @@ int intel_fb_bo_framebuffer_init(struct drm_framebuffer *fb,
* the fb pitch and fence stride match.
*/
if (tiling != I915_TILING_NONE && mode_cmd->pitches[0] != stride) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"pitch (%d) must match tiling stride (%d)\n",
mode_cmd->pitches[0], stride);
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 13996d7059ad..7b3b7be7d5b8 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -1670,7 +1670,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
plane->id = PLANE_SPRITE0 + sprite;
plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);
- modifiers = intel_fb_plane_get_modifiers(dev_priv, INTEL_PLANE_CAP_TILING_X);
+ modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_TILING_X);
ret = drm_universal_plane_init(display->drm, &plane->base,
0, plane_funcs,
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 301ad3a22c4c..91eba560c0ab 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2697,6 +2697,7 @@ struct intel_plane *
skl_universal_plane_create(struct drm_i915_private *dev_priv,
enum pipe pipe, enum plane_id plane_id)
{
+ struct intel_display *display = &dev_priv->display;
const struct drm_plane_funcs *plane_funcs;
struct intel_plane *plane;
enum drm_plane_type plane_type;
@@ -2813,7 +2814,7 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
INTEL_PLANE_CAP_CCS_RC_CC |
INTEL_PLANE_CAP_CCS_MC);
- modifiers = intel_fb_plane_get_modifiers(dev_priv, caps);
+ modifiers = intel_fb_plane_get_modifiers(display, caps);
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
0, plane_funcs,
@@ -2990,7 +2991,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
}
if (!dev_priv->display.params.enable_dpt &&
- intel_fb_modifier_uses_dpt(dev_priv, fb->modifier)) {
+ intel_fb_modifier_uses_dpt(display, fb->modifier)) {
drm_dbg_kms(&dev_priv->drm, "DPT disabled, skipping initial FB\n");
goto error;
}
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 05/11] drm/i915: Convert intel_display_power_{get, put}*() to intel_display
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (3 preceding siblings ...)
2025-01-24 16:30 ` [PATCH 04/11] drm/i915: Convert intel_fb.c " Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-24 16:30 ` [PATCH 06/11] drm/i915: Convert i9xx_plane.c to struct intel_display Ville Syrjala
` (14 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Pass intel_display to the display power stuff. These are spread
all over the place so tend to hinder clean conversions of whole
files.
TODO: The gt part/unpark power domain shenanigans need some
kind of more abstract interface...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 5 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 5 +-
drivers/gpu/drm/i915/display/i9xx_plane.c | 5 +-
drivers/gpu/drm/i915/display/icl_dsi.c | 11 +--
drivers/gpu/drm/i915/display/intel_audio.c | 6 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 8 +-
drivers/gpu/drm/i915/display/intel_crt.c | 16 ++--
drivers/gpu/drm/i915/display/intel_cursor.c | 10 ++-
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 13 ++-
drivers/gpu/drm/i915/display/intel_ddi.c | 63 ++++++++------
drivers/gpu/drm/i915/display/intel_display.c | 53 +++++++-----
.../drm/i915/display/intel_display_debugfs.c | 5 +-
.../gpu/drm/i915/display/intel_display_irq.c | 10 +--
.../drm/i915/display/intel_display_power.c | 85 +++++++++----------
.../drm/i915/display/intel_display_power.h | 54 ++++++------
drivers/gpu/drm/i915/display/intel_dmc.c | 7 +-
drivers/gpu/drm/i915/display/intel_dp.c | 7 +-
drivers/gpu/drm/i915/display/intel_dp_aux.c | 5 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 55 +++++++-----
drivers/gpu/drm/i915/display/intel_gmbus.c | 10 +--
drivers/gpu/drm/i915/display/intel_hdmi.c | 10 +--
drivers/gpu/drm/i915/display/intel_hotplug.c | 5 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 5 +-
.../drm/i915/display/intel_modeset_setup.c | 6 +-
drivers/gpu/drm/i915/display/intel_pipe_crc.c | 5 +-
drivers/gpu/drm/i915/display/intel_pps.c | 18 ++--
drivers/gpu/drm/i915/display/intel_sprite.c | 17 ++--
drivers/gpu/drm/i915/display/intel_tc.c | 78 +++++++++--------
drivers/gpu/drm/i915/display/intel_vdsc.c | 5 +-
drivers/gpu/drm/i915/display/intel_vga.c | 5 +-
.../drm/i915/display/skl_universal_plane.c | 5 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 5 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 4 +-
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 6 +-
34 files changed, 311 insertions(+), 296 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 434de337814c..7eb5b4915f2c 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -305,12 +305,13 @@ bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
enum pipe *pipe)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
intel_wakeref_t wakeref;
bool ret;
- wakeref = intel_display_power_get_if_enabled(dev_priv,
+ wakeref = intel_display_power_get_if_enabled(display,
encoder->power_domain);
if (!wakeref)
return false;
@@ -318,7 +319,7 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
ret = g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
encoder->port, pipe);
- intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 3aaa7f9e9210..7f13cf9b1a2e 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -66,19 +66,20 @@ static void intel_hdmi_prepare(struct intel_encoder *encoder,
static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
enum pipe *pipe)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
intel_wakeref_t wakeref;
bool ret;
- wakeref = intel_display_power_get_if_enabled(dev_priv,
+ wakeref = intel_display_power_get_if_enabled(display,
encoder->power_domain);
if (!wakeref)
return false;
ret = intel_sdvo_port_enabled(dev_priv, intel_hdmi->hdmi_reg, pipe);
- intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 949014802e52..3876b50d2324 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -681,6 +681,7 @@ static bool i9xx_plane_can_async_flip(u64 modifier)
static bool i9xx_plane_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
+ struct intel_display *display = to_intel_display(plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
@@ -694,7 +695,7 @@ static bool i9xx_plane_get_hw_state(struct intel_plane *plane,
* display power wells.
*/
power_domain = POWER_DOMAIN_PIPE(plane->pipe);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return false;
@@ -707,7 +708,7 @@ static bool i9xx_plane_get_hw_state(struct intel_plane *plane,
else
*pipe = REG_FIELD_GET(DISP_PIPE_SEL_MASK, val);
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index ee1c3fb500a7..0f2a19690c18 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -387,13 +387,12 @@ static void gen11_dsi_program_esc_clk_div(struct intel_encoder *encoder,
static void get_dsi_io_power_domains(struct intel_dsi *intel_dsi)
{
struct intel_display *display = to_intel_display(&intel_dsi->base);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
enum port port;
for_each_dsi_port(port, intel_dsi->ports) {
drm_WARN_ON(display->drm, intel_dsi->io_wakeref[port]);
intel_dsi->io_wakeref[port] =
- intel_display_power_get(dev_priv,
+ intel_display_power_get(display,
port == PORT_A ?
POWER_DOMAIN_PORT_DDI_IO_A :
POWER_DOMAIN_PORT_DDI_IO_B);
@@ -1385,7 +1384,6 @@ static void gen11_dsi_disable_port(struct intel_encoder *encoder)
static void gen11_dsi_disable_io_power(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum port port;
@@ -1393,7 +1391,7 @@ static void gen11_dsi_disable_io_power(struct intel_encoder *encoder)
intel_wakeref_t wakeref;
wakeref = fetch_and_zero(&intel_dsi->io_wakeref[port]);
- intel_display_power_put(dev_priv,
+ intel_display_power_put(display,
port == PORT_A ?
POWER_DOMAIN_PORT_DDI_IO_A :
POWER_DOMAIN_PORT_DDI_IO_B,
@@ -1697,7 +1695,6 @@ static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum transcoder dsi_trans;
intel_wakeref_t wakeref;
@@ -1705,7 +1702,7 @@ static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
bool ret = false;
u32 tmp;
- wakeref = intel_display_power_get_if_enabled(dev_priv,
+ wakeref = intel_display_power_get_if_enabled(display,
encoder->power_domain);
if (!wakeref)
return false;
@@ -1736,7 +1733,7 @@ static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
ret = tmp & TRANSCONF_ENABLE;
}
out:
- intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index f145f83346ca..aaba438ab41e 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -1037,13 +1037,12 @@ int intel_audio_min_cdclk(const struct intel_crtc_state *crtc_state)
static unsigned long intel_audio_component_get_power(struct device *kdev)
{
struct intel_display *display = to_intel_display(kdev);
- struct drm_i915_private *i915 = to_i915(display->drm);
intel_wakeref_t wakeref;
/* Catch potential impedance mismatches before they occur! */
BUILD_BUG_ON(sizeof(intel_wakeref_t) > sizeof(unsigned long));
- wakeref = intel_display_power_get(i915, POWER_DOMAIN_AUDIO_PLAYBACK);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_AUDIO_PLAYBACK);
if (display->audio.power_refcount++ == 0) {
if (DISPLAY_VER(display) >= 9) {
@@ -1070,7 +1069,6 @@ static void intel_audio_component_put_power(struct device *kdev,
unsigned long cookie)
{
struct intel_display *display = to_intel_display(kdev);
- struct drm_i915_private *i915 = to_i915(display->drm);
intel_wakeref_t wakeref = (intel_wakeref_t)cookie;
/* Stop forcing CDCLK to 2*BCLK if no need for audio to be powered. */
@@ -1078,7 +1076,7 @@ static void intel_audio_component_put_power(struct device *kdev,
if (display->platform.geminilake)
glk_force_audio_cdclk(display, false);
- intel_display_power_put(i915, POWER_DOMAIN_AUDIO_PLAYBACK, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_AUDIO_PLAYBACK, wakeref);
}
static void intel_audio_component_codec_wake_override(struct device *kdev,
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index b520231833b7..435241cddca4 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -658,7 +658,7 @@ static void vlv_set_cdclk(struct intel_display *display,
* a system suspend. So grab the display core domain, which covers
* the HW blocks needed for the following programming.
*/
- wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_DISPLAY_CORE);
vlv_iosf_sb_get(dev_priv,
BIT(VLV_IOSF_SB_CCK) |
@@ -718,7 +718,7 @@ static void vlv_set_cdclk(struct intel_display *display,
vlv_program_pfi_credits(display);
- intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
}
static void chv_set_cdclk(struct intel_display *display,
@@ -747,7 +747,7 @@ static void chv_set_cdclk(struct intel_display *display,
* a system suspend. So grab the display core domain, which covers
* the HW blocks needed for the following programming.
*/
- wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_DISPLAY_CORE);
vlv_punit_get(dev_priv);
val = vlv_punit_read(dev_priv, PUNIT_REG_DSPSSPM);
@@ -767,7 +767,7 @@ static void chv_set_cdclk(struct intel_display *display,
vlv_program_pfi_credits(display);
- intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
}
static int bdw_calc_cdclk(int min_cdclk)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index b5367e059ee3..aa46c14ce225 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -108,19 +108,18 @@ static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_crt *crt = intel_encoder_to_crt(encoder);
intel_wakeref_t wakeref;
bool ret;
- wakeref = intel_display_power_get_if_enabled(dev_priv,
+ wakeref = intel_display_power_get_if_enabled(display,
encoder->power_domain);
if (!wakeref)
return false;
ret = intel_crt_port_enabled(display, crt->adpa_reg, pipe);
- intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
return ret;
}
@@ -858,7 +857,6 @@ intel_crt_detect(struct drm_connector *connector,
bool force)
{
struct intel_display *display = to_intel_display(connector->dev);
- struct drm_i915_private *dev_priv = to_i915(connector->dev);
struct intel_crt *crt = intel_attached_crt(to_intel_connector(connector));
struct intel_encoder *encoder = &crt->base;
struct drm_atomic_state *state;
@@ -876,7 +874,7 @@ intel_crt_detect(struct drm_connector *connector,
return connector->status;
if (display->params.load_detect_test) {
- wakeref = intel_display_power_get(dev_priv, encoder->power_domain);
+ wakeref = intel_display_power_get(display, encoder->power_domain);
goto load_detect;
}
@@ -884,7 +882,7 @@ intel_crt_detect(struct drm_connector *connector,
if (dmi_check_system(intel_spurious_crt_detect))
return connector_status_disconnected;
- wakeref = intel_display_power_get(dev_priv, encoder->power_domain);
+ wakeref = intel_display_power_get(display, encoder->power_domain);
if (I915_HAS_HOTPLUG(display)) {
/* We can not rely on the HPD pin always being correctly wired
@@ -941,7 +939,7 @@ intel_crt_detect(struct drm_connector *connector,
}
out:
- intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
return status;
}
@@ -959,7 +957,7 @@ static int intel_crt_get_modes(struct drm_connector *connector)
if (!intel_display_driver_check_access(display))
return drm_edid_connector_add_modes(connector);
- wakeref = intel_display_power_get(dev_priv, encoder->power_domain);
+ wakeref = intel_display_power_get(display, encoder->power_domain);
ret = intel_crt_ddc_get_modes(connector, connector->ddc);
if (ret || !IS_G4X(dev_priv))
@@ -970,7 +968,7 @@ static int intel_crt_get_modes(struct drm_connector *connector)
ret = intel_crt_ddc_get_modes(connector, ddc);
out:
- intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 819e61b26b7d..fe6cfd9eee06 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -326,13 +326,14 @@ static void i845_cursor_disable_arm(struct intel_dsb *dsb,
static bool i845_cursor_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
+ struct intel_display *display = to_intel_display(plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
bool ret;
power_domain = POWER_DOMAIN_PIPE(PIPE_A);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return false;
@@ -340,7 +341,7 @@ static bool i845_cursor_get_hw_state(struct intel_plane *plane,
*pipe = PIPE_A;
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
@@ -728,6 +729,7 @@ static void i9xx_cursor_disable_arm(struct intel_dsb *dsb,
static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
+ struct intel_display *display = to_intel_display(plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
@@ -740,7 +742,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
* display power wells.
*/
power_domain = POWER_DOMAIN_PIPE(plane->pipe);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return false;
@@ -753,7 +755,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
else
*pipe = REG_FIELD_GET(MCURSOR_PIPE_SEL_MASK, val);
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 48b0b9755b2b..a2c32842fa60 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -73,10 +73,9 @@ static u8 intel_cx0_get_owned_lane_mask(struct intel_encoder *encoder)
static void
assert_dc_off(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
bool enabled;
- enabled = intel_display_power_is_enabled(i915, POWER_DOMAIN_DC_OFF);
+ enabled = intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF);
drm_WARN_ON(display->drm, !enabled);
}
@@ -103,12 +102,12 @@ static void intel_cx0_program_msgbus_timer(struct intel_encoder *encoder)
*/
static intel_wakeref_t intel_cx0_phy_transaction_begin(struct intel_encoder *encoder)
{
- intel_wakeref_t wakeref;
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ intel_wakeref_t wakeref;
intel_psr_pause(intel_dp);
- wakeref = intel_display_power_get(i915, POWER_DOMAIN_DC_OFF);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_DC_OFF);
intel_cx0_program_msgbus_timer(encoder);
return wakeref;
@@ -116,11 +115,11 @@ static intel_wakeref_t intel_cx0_phy_transaction_begin(struct intel_encoder *enc
static void intel_cx0_phy_transaction_end(struct intel_encoder *encoder, intel_wakeref_t wakeref)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
intel_psr_resume(intel_dp);
- intel_display_power_put(i915, POWER_DOMAIN_DC_OFF, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DC_OFF, wakeref);
}
static void intel_clear_response_ready_flag(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index dc319f37b1be..d7b9b271ca53 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -705,19 +705,20 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
enum transcoder cpu_transcoder,
bool enable, u32 hdcp_mask)
{
+ struct intel_display *display = to_intel_display(intel_encoder);
struct drm_device *dev = intel_encoder->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
intel_wakeref_t wakeref;
int ret = 0;
- wakeref = intel_display_power_get_if_enabled(dev_priv,
+ wakeref = intel_display_power_get_if_enabled(display,
intel_encoder->power_domain);
if (drm_WARN_ON(dev, !wakeref))
return -ENXIO;
intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder),
hdcp_mask, enable ? hdcp_mask : 0);
- intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
+ intel_display_power_put(display, intel_encoder->power_domain, wakeref);
return ret;
}
@@ -734,7 +735,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
u32 ddi_mode;
bool ret;
- wakeref = intel_display_power_get_if_enabled(dev_priv,
+ wakeref = intel_display_power_get_if_enabled(display,
encoder->power_domain);
if (!wakeref)
return false;
@@ -775,7 +776,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
}
out:
- intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
return ret;
}
@@ -794,7 +795,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
*pipe_mask = 0;
*is_dp_mst = false;
- wakeref = intel_display_power_get_if_enabled(dev_priv,
+ wakeref = intel_display_power_get_if_enabled(display,
encoder->power_domain);
if (!wakeref)
return;
@@ -831,7 +832,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
u32 port_mask, ddi_select, ddi_mode;
intel_wakeref_t trans_wakeref;
- trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
+ trans_wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_TRANSCODER(cpu_transcoder));
if (!trans_wakeref)
continue;
@@ -846,7 +847,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
tmp = intel_de_read(dev_priv,
TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
- intel_display_power_put(dev_priv, POWER_DOMAIN_TRANSCODER(cpu_transcoder),
+ intel_display_power_put(display, POWER_DOMAIN_TRANSCODER(cpu_transcoder),
trans_wakeref);
if ((tmp & port_mask) != ddi_select)
@@ -911,7 +912,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
encoder->base.base.id, encoder->base.name, tmp);
}
- intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
}
bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
@@ -963,23 +964,23 @@ static void
main_link_aux_power_domain_get(struct intel_digital_port *dig_port,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct intel_display *display = to_intel_display(dig_port);
enum intel_display_power_domain domain =
intel_ddi_main_link_aux_domain(dig_port, crtc_state);
- drm_WARN_ON(&i915->drm, dig_port->aux_wakeref);
+ drm_WARN_ON(display->drm, dig_port->aux_wakeref);
if (domain == POWER_DOMAIN_INVALID)
return;
- dig_port->aux_wakeref = intel_display_power_get(i915, domain);
+ dig_port->aux_wakeref = intel_display_power_get(display, domain);
}
static void
main_link_aux_power_domain_put(struct intel_digital_port *dig_port,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct intel_display *display = to_intel_display(dig_port);
enum intel_display_power_domain domain =
intel_ddi_main_link_aux_domain(dig_port, crtc_state);
intel_wakeref_t wf;
@@ -988,13 +989,13 @@ main_link_aux_power_domain_put(struct intel_digital_port *dig_port,
if (!wf)
return;
- intel_display_power_put(i915, domain, wf);
+ intel_display_power_put(display, domain, wf);
}
static void intel_ddi_get_power_domains(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_digital_port *dig_port;
/*
@@ -1002,15 +1003,15 @@ static void intel_ddi_get_power_domains(struct intel_encoder *encoder,
* happen since fake-MST encoders don't set their get_power_domains()
* hook.
*/
- if (drm_WARN_ON(&dev_priv->drm,
+ if (drm_WARN_ON(display->drm,
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST)))
return;
dig_port = enc_to_dig_port(encoder);
if (!intel_tc_port_in_tbt_alt_mode(dig_port)) {
- drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
- dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
+ drm_WARN_ON(display->drm, dig_port->ddi_io_wakeref);
+ dig_port->ddi_io_wakeref = intel_display_power_get(display,
dig_port->ddi_io_power_domain);
}
@@ -2721,6 +2722,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
@@ -2767,7 +2769,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
/* 5. If IO power is controlled through PWR_WELL_CTL, Enable IO Power */
if (!intel_tc_port_in_tbt_alt_mode(dig_port)) {
drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
- dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
+ dig_port->ddi_io_wakeref = intel_display_power_get(display,
dig_port->ddi_io_power_domain);
}
@@ -2868,6 +2870,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
enum port port = encoder->port;
@@ -2896,7 +2899,7 @@ static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
if (!intel_tc_port_in_tbt_alt_mode(dig_port)) {
drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
- dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
+ dig_port->ddi_io_wakeref = intel_display_power_get(display,
dig_port->ddi_io_power_domain);
}
@@ -2963,6 +2966,7 @@ static void intel_ddi_pre_enable_hdmi(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -2971,7 +2975,7 @@ static void intel_ddi_pre_enable_hdmi(struct intel_atomic_state *state,
intel_ddi_enable_clock(encoder, crtc_state);
drm_WARN_ON(&dev_priv->drm, dig_port->ddi_io_wakeref);
- dig_port->ddi_io_wakeref = intel_display_power_get(dev_priv,
+ dig_port->ddi_io_wakeref = intel_display_power_get(display,
dig_port->ddi_io_power_domain);
icl_program_mg_dp_mode(dig_port, crtc_state);
@@ -3130,6 +3134,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
struct intel_dp *intel_dp = &dig_port->dp;
@@ -3181,7 +3186,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
wakeref = fetch_and_zero(&dig_port->ddi_io_wakeref);
if (wakeref)
- intel_display_power_put(dev_priv,
+ intel_display_power_put(display,
dig_port->ddi_io_power_domain,
wakeref);
@@ -3198,6 +3203,7 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
struct intel_hdmi *intel_hdmi = &dig_port->hdmi;
@@ -3216,7 +3222,7 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,
wakeref = fetch_and_zero(&dig_port->ddi_io_wakeref);
if (wakeref)
- intel_display_power_put(dev_priv,
+ intel_display_power_put(display,
dig_port->ddi_io_power_domain,
wakeref);
@@ -3893,10 +3899,12 @@ static void intel_ddi_set_idle_link_train(struct intel_dp *intel_dp,
static bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv,
enum transcoder cpu_transcoder)
{
+ struct intel_display *display = &dev_priv->display;
+
if (cpu_transcoder == TRANSCODER_EDP)
return false;
- if (!intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_AUDIO_MMIO))
+ if (!intel_display_power_is_enabled(display, POWER_DOMAIN_AUDIO_MMIO))
return false;
return intel_de_read(dev_priv, HSW_AUD_PIN_ELD_CP_VLD) &
@@ -3972,6 +3980,7 @@ static enum transcoder bdw_transcoder_master_readout(struct drm_i915_private *de
static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
u32 transcoders = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
BIT(TRANSCODER_C) | BIT(TRANSCODER_D);
@@ -3985,7 +3994,7 @@ static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
intel_wakeref_t trans_wakeref;
power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
- trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
+ trans_wakeref = intel_display_power_get_if_enabled(display,
power_domain);
if (!trans_wakeref)
@@ -3995,7 +4004,7 @@ static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
crtc_state->cpu_transcoder)
crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);
- intel_display_power_put(dev_priv, power_domain, trans_wakeref);
+ intel_display_power_put(display, power_domain, trans_wakeref);
}
drm_WARN_ON(&dev_priv->drm,
@@ -4610,13 +4619,13 @@ static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
{
- struct drm_i915_private *i915 = to_i915(encoder->dev);
+ struct intel_display *display = to_intel_display(encoder->dev);
struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
intel_dp_encoder_flush_work(encoder);
if (intel_encoder_is_tc(&dig_port->base))
intel_tc_port_cleanup(dig_port);
- intel_display_power_flush_work(i915);
+ intel_display_power_flush_work(display);
drm_encoder_cleanup(encoder);
kfree(dig_port->hdcp_port_data.streams);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 51e87ef3e4e4..466997946e71 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -432,13 +432,13 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
state = true;
power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (wakeref) {
u32 val = intel_de_read(dev_priv,
TRANSCONF(dev_priv, cpu_transcoder));
cur_state = !!(val & TRANSCONF_ENABLE);
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
} else {
cur_state = false;
}
@@ -2160,8 +2160,8 @@ static void get_crtc_power_domains(struct intel_crtc_state *crtc_state,
void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state,
struct intel_power_domain_mask *old_domains)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum intel_display_power_domain domain;
struct intel_power_domain_mask domains, new_domains;
@@ -2177,7 +2177,7 @@ void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state,
POWER_DOMAIN_NUM);
for_each_power_domain(domain, &new_domains)
- intel_display_power_get_in_set(dev_priv,
+ intel_display_power_get_in_set(display,
&crtc->enabled_power_domains,
domain);
}
@@ -2185,7 +2185,9 @@ void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state,
void intel_modeset_put_crtc_power_domains(struct intel_crtc *crtc,
struct intel_power_domain_mask *domains)
{
- intel_display_power_put_mask_in_set(to_i915(crtc->base.dev),
+ struct intel_display *display = to_intel_display(crtc);
+
+ intel_display_power_put_mask_in_set(display,
&crtc->enabled_power_domains,
domains);
}
@@ -3221,6 +3223,7 @@ bdw_get_pipe_misc_output_format(struct intel_crtc *crtc)
static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
@@ -3228,7 +3231,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
bool ret;
power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return false;
@@ -3322,7 +3325,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
ret = true;
out:
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
@@ -3603,6 +3606,7 @@ static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state)
static bool ilk_get_pipe_config(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
enum intel_display_power_domain power_domain;
@@ -3611,7 +3615,7 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
bool ret;
power_domain = POWER_DOMAIN_PIPE(crtc->pipe);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return false;
@@ -3676,7 +3680,7 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
ret = true;
out:
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
@@ -3698,13 +3702,14 @@ static u8 joiner_pipes(struct drm_i915_private *i915)
static bool transcoder_ddi_func_is_enabled(struct drm_i915_private *dev_priv,
enum transcoder cpu_transcoder)
{
+ struct intel_display *display = &dev_priv->display;
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
u32 tmp = 0;
power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
- with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
+ with_intel_display_power_if_enabled(display, power_domain, wakeref)
tmp = intel_de_read(dev_priv,
TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
@@ -3730,7 +3735,7 @@ static void enabled_uncompressed_joiner_pipes(struct intel_display *display,
intel_wakeref_t wakeref;
power_domain = POWER_DOMAIN_PIPE(pipe);
- with_intel_display_power_if_enabled(i915, power_domain, wakeref) {
+ with_intel_display_power_if_enabled(display, power_domain, wakeref) {
u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));
if (tmp & UNCOMPRESSED_JOINER_PRIMARY)
@@ -3760,7 +3765,7 @@ static void enabled_bigjoiner_pipes(struct intel_display *display,
intel_wakeref_t wakeref;
power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);
- with_intel_display_power_if_enabled(i915, power_domain, wakeref) {
+ with_intel_display_power_if_enabled(display, power_domain, wakeref) {
u32 tmp = intel_de_read(display, ICL_PIPE_DSS_CTL1(pipe));
if (!(tmp & BIG_JOINER_ENABLE))
@@ -3831,7 +3836,7 @@ static void enabled_ultrajoiner_pipes(struct drm_i915_private *i915,
intel_wakeref_t wakeref;
power_domain = intel_dsc_power_domain(crtc, (enum transcoder)pipe);
- with_intel_display_power_if_enabled(i915, power_domain, wakeref) {
+ with_intel_display_power_if_enabled(display, power_domain, wakeref) {
u32 tmp = intel_de_read(i915, ICL_PIPE_DSS_CTL1(pipe));
if (!(tmp & ULTRA_JOINER_ENABLE))
@@ -3977,6 +3982,7 @@ static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv);
@@ -3996,7 +4002,7 @@ static u8 hsw_enabled_transcoders(struct intel_crtc *crtc)
u32 tmp = 0;
power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
- with_intel_display_power_if_enabled(dev_priv, power_domain, wakeref)
+ with_intel_display_power_if_enabled(display, power_domain, wakeref)
tmp = intel_de_read(dev_priv,
TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder));
@@ -4081,6 +4087,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config,
struct intel_display_power_domain_set *power_domain_set)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
unsigned long enabled_transcoders;
@@ -4099,7 +4106,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
*/
pipe_config->cpu_transcoder = ffs(enabled_transcoders) - 1;
- if (!intel_display_power_get_in_set_if_enabled(dev_priv, power_domain_set,
+ if (!intel_display_power_get_in_set_if_enabled(display, power_domain_set,
POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder)))
return false;
@@ -4133,7 +4140,7 @@ static bool bxt_get_dsi_transcoder_state(struct intel_crtc *crtc,
else
cpu_transcoder = TRANSCODER_DSI_C;
- if (!intel_display_power_get_in_set_if_enabled(dev_priv, power_domain_set,
+ if (!intel_display_power_get_in_set_if_enabled(display, power_domain_set,
POWER_DOMAIN_TRANSCODER(cpu_transcoder)))
continue;
@@ -4186,7 +4193,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
bool active;
u32 tmp;
- if (!intel_display_power_get_in_set_if_enabled(dev_priv, &crtc->hw_readout_power_domains,
+ if (!intel_display_power_get_in_set_if_enabled(display, &crtc->hw_readout_power_domains,
POWER_DOMAIN_PIPE(crtc->pipe)))
return false;
@@ -4238,7 +4245,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
pipe_config->ips_linetime =
REG_FIELD_GET(HSW_IPS_LINETIME_MASK, tmp);
- if (intel_display_power_get_in_set_if_enabled(dev_priv, &crtc->hw_readout_power_domains,
+ if (intel_display_power_get_in_set_if_enabled(display, &crtc->hw_readout_power_domains,
POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe))) {
if (DISPLAY_VER(dev_priv) >= 9)
skl_scaler_get_config(pipe_config);
@@ -4267,7 +4274,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
}
out:
- intel_display_power_put_all_in_set(dev_priv, &crtc->hw_readout_power_domains);
+ intel_display_power_put_all_in_set(display, &crtc->hw_readout_power_domains);
return active;
}
@@ -7198,6 +7205,7 @@ static void intel_enable_crtc(struct intel_atomic_state *state,
static void intel_pre_update_crtc(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(state);
struct drm_i915_private *i915 = to_i915(state->base.dev);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
@@ -7232,7 +7240,7 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
intel_fbc_update(state, crtc);
- drm_WARN_ON(&i915->drm, !intel_display_power_is_enabled(i915, POWER_DOMAIN_DC_OFF));
+ drm_WARN_ON(display->drm, !intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF));
if (!modeset &&
intel_crtc_needs_color_update(new_crtc_state) &&
@@ -7753,6 +7761,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
static void intel_atomic_commit_tail(struct intel_atomic_state *state)
{
+ struct intel_display *display = to_intel_display(state);
struct drm_device *dev = state->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_crtc_state *new_crtc_state, *old_crtc_state;
@@ -7804,7 +7813,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
* the CSC latched register values with the readout (see
* skl_read_csc() and skl_color_commit_noarm()).
*/
- wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DC_OFF);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_DC_OFF);
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
@@ -7962,7 +7971,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
* Delay re-enabling DC states by 17 ms to avoid the off->on->off
* toggling overhead at and above 60 FPS.
*/
- intel_display_power_put_async_delay(dev_priv, POWER_DOMAIN_DC_OFF, wakeref, 17);
+ intel_display_power_put_async_delay(display, POWER_DOMAIN_DC_OFF, wakeref, 17);
intel_runtime_pm_put(&dev_priv->runtime_pm, state->wakeref);
/*
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 926f09c35084..feecabd81274 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -86,10 +86,11 @@ static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
static int i915_sr_status(struct seq_file *m, void *unused)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_display *display = &dev_priv->display;
intel_wakeref_t wakeref;
bool sr_enabled = false;
- wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT);
if (DISPLAY_VER(dev_priv) >= 9)
/* no global SR status; inspect per-plane WM */;
@@ -105,7 +106,7 @@ static int i915_sr_status(struct seq_file *m, void *unused)
else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
- intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index d9734fcd0d45..0f68b0a34ca9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1617,7 +1617,7 @@ void gen8_display_irq_reset(struct drm_i915_private *dev_priv)
intel_de_write(display, EDP_PSR_IIR, 0xffffffff);
for_each_pipe(dev_priv, pipe)
- if (intel_display_power_is_enabled(dev_priv,
+ if (intel_display_power_is_enabled(display,
POWER_DOMAIN_PIPE(pipe)))
intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
@@ -1644,7 +1644,7 @@ void gen11_display_irq_reset(struct drm_i915_private *dev_priv)
enum intel_display_power_domain domain;
domain = POWER_DOMAIN_TRANSCODER(trans);
- if (!intel_display_power_is_enabled(dev_priv, domain))
+ if (!intel_display_power_is_enabled(display, domain))
continue;
intel_de_write(display,
@@ -1660,7 +1660,7 @@ void gen11_display_irq_reset(struct drm_i915_private *dev_priv)
}
for_each_pipe(dev_priv, pipe)
- if (intel_display_power_is_enabled(dev_priv,
+ if (intel_display_power_is_enabled(display,
POWER_DOMAIN_PIPE(pipe)))
intel_display_irq_regs_reset(display, GEN8_DE_PIPE_IRQ_REGS(pipe));
@@ -1887,7 +1887,7 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
enum intel_display_power_domain domain;
domain = POWER_DOMAIN_TRANSCODER(trans);
- if (!intel_display_power_is_enabled(dev_priv, domain))
+ if (!intel_display_power_is_enabled(display, domain))
continue;
intel_display_irq_regs_assert_irr_is_zero(display,
@@ -1900,7 +1900,7 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
for_each_pipe(dev_priv, pipe) {
dev_priv->display.irq.de_irq_mask[pipe] = ~de_pipe_masked;
- if (intel_display_power_is_enabled(dev_priv,
+ if (intel_display_power_is_enabled(display,
POWER_DOMAIN_PIPE(pipe)))
intel_display_irq_regs_init(display, GEN8_DE_PIPE_IRQ_REGS(pipe),
dev_priv->display.irq.de_irq_mask[pipe],
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 14ae60749f02..cfc5c0b4f907 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -224,7 +224,7 @@ static bool __intel_display_power_is_enabled(struct intel_display *display,
/**
* intel_display_power_is_enabled - check for a power domain
- * @dev_priv: i915 device instance
+ * @display: display device instance
* @domain: power domain to check
*
* This function can be used to check the hw power domain state. It is mostly
@@ -239,10 +239,9 @@ static bool __intel_display_power_is_enabled(struct intel_display *display,
* Returns:
* True when the power domain is enabled, false otherwise.
*/
-bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
+bool intel_display_power_is_enabled(struct intel_display *display,
enum intel_display_power_domain domain)
{
- struct intel_display *display = &dev_priv->display;
struct i915_power_domains *power_domains = &display->power.domains;
bool ret;
@@ -500,7 +499,7 @@ __intel_display_power_get_domain(struct intel_display *display,
/**
* intel_display_power_get - grab a power domain reference
- * @dev_priv: i915 device instance
+ * @display: display device instance
* @domain: power domain to reference
*
* This function grabs a power domain reference for @domain and ensures that the
@@ -510,10 +509,10 @@ __intel_display_power_get_domain(struct intel_display *display,
* Any power domain reference obtained by this function must have a symmetric
* call to intel_display_power_put() to release the reference again.
*/
-intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
+intel_wakeref_t intel_display_power_get(struct intel_display *display,
enum intel_display_power_domain domain)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
intel_wakeref_t wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
@@ -526,7 +525,7 @@ intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
/**
* intel_display_power_get_if_enabled - grab a reference for an enabled display power domain
- * @dev_priv: i915 device instance
+ * @display: display device instance
* @domain: power domain to reference
*
* This function grabs a power domain reference for @domain and ensures that the
@@ -537,10 +536,10 @@ intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
* call to intel_display_power_put() to release the reference again.
*/
intel_wakeref_t
-intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
+intel_display_power_get_if_enabled(struct intel_display *display,
enum intel_display_power_domain domain)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
intel_wakeref_t wakeref;
bool is_enabled;
@@ -696,7 +695,7 @@ intel_display_power_put_async_work(struct work_struct *work)
/**
* __intel_display_power_put_async - release a power domain reference asynchronously
- * @i915: i915 device instance
+ * @display: display device instance
* @domain: power domain to reference
* @wakeref: wakeref acquired for the reference that is being released
* @delay_ms: delay of powering down the power domain
@@ -707,12 +706,12 @@ intel_display_power_put_async_work(struct work_struct *work)
* The power down is delayed by @delay_ms if this is >= 0, or by a default
* 100 ms otherwise.
*/
-void __intel_display_power_put_async(struct drm_i915_private *i915,
+void __intel_display_power_put_async(struct intel_display *display,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref,
int delay_ms)
{
- struct intel_display *display = &i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
struct intel_runtime_pm *rpm = &i915->runtime_pm;
intel_wakeref_t work_wakeref = intel_runtime_pm_get_raw(rpm);
@@ -754,7 +753,7 @@ void __intel_display_power_put_async(struct drm_i915_private *i915,
/**
* intel_display_power_flush_work - flushes the async display power disabling work
- * @i915: i915 device instance
+ * @display: display device instance
*
* Flushes any pending work that was scheduled by a preceding
* intel_display_power_put_async() call, completing the disabling of the
@@ -764,9 +763,9 @@ void __intel_display_power_put_async(struct drm_i915_private *i915,
* function returns; to ensure that the work handler isn't running use
* intel_display_power_flush_work_sync() instead.
*/
-void intel_display_power_flush_work(struct drm_i915_private *i915)
+void intel_display_power_flush_work(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
struct intel_power_domain_mask async_put_mask;
intel_wakeref_t work_wakeref;
@@ -800,10 +799,9 @@ void intel_display_power_flush_work(struct drm_i915_private *i915)
static void
intel_display_power_flush_work_sync(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
- intel_display_power_flush_work(i915);
+ intel_display_power_flush_work(display);
cancel_async_put_work(power_domains, true);
verify_async_put_domains_state(power_domains);
@@ -814,7 +812,7 @@ intel_display_power_flush_work_sync(struct intel_display *display)
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
/**
* intel_display_power_put - release a power domain reference
- * @dev_priv: i915 device instance
+ * @display: display device instance
* @domain: power domain to reference
* @wakeref: wakeref acquired for the reference that is being released
*
@@ -822,11 +820,11 @@ intel_display_power_flush_work_sync(struct intel_display *display)
* intel_display_power_get() and might power down the corresponding hardware
* block right away if this is the last reference.
*/
-void intel_display_power_put(struct drm_i915_private *dev_priv,
+void intel_display_power_put(struct intel_display *display,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
__intel_display_power_put(display, domain);
intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
@@ -834,7 +832,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
#else
/**
* intel_display_power_put_unchecked - release an unchecked power domain reference
- * @dev_priv: i915 device instance
+ * @display: display device instance
* @domain: power domain to reference
*
* This function drops the power domain reference obtained by
@@ -845,10 +843,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
* tracking when the corresponding debug kconfig option is disabled, should not
* be used otherwise.
*/
-void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
+void intel_display_power_put_unchecked(struct intel_display *display,
enum intel_display_power_domain domain)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
__intel_display_power_put(display, domain);
intel_runtime_pm_put_unchecked(&dev_priv->runtime_pm);
@@ -856,16 +854,15 @@ void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
#endif
void
-intel_display_power_get_in_set(struct drm_i915_private *i915,
+intel_display_power_get_in_set(struct intel_display *display,
struct intel_display_power_domain_set *power_domain_set,
enum intel_display_power_domain domain)
{
- struct intel_display *display = &i915->display;
intel_wakeref_t __maybe_unused wf;
drm_WARN_ON(display->drm, test_bit(domain, power_domain_set->mask.bits));
- wf = intel_display_power_get(i915, domain);
+ wf = intel_display_power_get(display, domain);
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
power_domain_set->wakerefs[domain] = wf;
#endif
@@ -873,16 +870,15 @@ intel_display_power_get_in_set(struct drm_i915_private *i915,
}
bool
-intel_display_power_get_in_set_if_enabled(struct drm_i915_private *i915,
+intel_display_power_get_in_set_if_enabled(struct intel_display *display,
struct intel_display_power_domain_set *power_domain_set,
enum intel_display_power_domain domain)
{
- struct intel_display *display = &i915->display;
intel_wakeref_t wf;
drm_WARN_ON(display->drm, test_bit(domain, power_domain_set->mask.bits));
- wf = intel_display_power_get_if_enabled(i915, domain);
+ wf = intel_display_power_get_if_enabled(display, domain);
if (!wf)
return false;
@@ -895,11 +891,10 @@ intel_display_power_get_in_set_if_enabled(struct drm_i915_private *i915,
}
void
-intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
+intel_display_power_put_mask_in_set(struct intel_display *display,
struct intel_display_power_domain_set *power_domain_set,
struct intel_power_domain_mask *mask)
{
- struct intel_display *display = &i915->display;
enum intel_display_power_domain domain;
drm_WARN_ON(display->drm,
@@ -911,7 +906,7 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
wf = fetch_and_zero(&power_domain_set->wakerefs[domain]);
#endif
- intel_display_power_put(i915, domain, wf);
+ intel_display_power_put(display, domain, wf);
clear_bit(domain, power_domain_set->mask.bits);
}
}
@@ -999,7 +994,7 @@ static u32 get_allowed_dc_mask(struct intel_display *display, int enable_dc)
* intel_power_domains_init - initializes the power domain structures
* @display: display device instance
*
- * Initializes the power domain structures for @dev_priv depending upon the
+ * Initializes the power domain structures for @display depending upon the
* supported platform.
*/
int intel_power_domains_init(struct intel_display *display)
@@ -1963,12 +1958,12 @@ void intel_power_domains_init_hw(struct intel_display *display, bool resume)
*/
drm_WARN_ON(display->drm, power_domains->init_wakeref);
power_domains->init_wakeref =
- intel_display_power_get(i915, POWER_DOMAIN_INIT);
+ intel_display_power_get(display, POWER_DOMAIN_INIT);
/* Disable power support if the user asked so. */
if (!display->params.disable_power_well) {
drm_WARN_ON(display->drm, power_domains->disable_wakeref);
- display->power.domains.disable_wakeref = intel_display_power_get(i915,
+ display->power.domains.disable_wakeref = intel_display_power_get(display,
POWER_DOMAIN_INIT);
}
intel_power_domains_sync_hw(display);
@@ -1995,7 +1990,7 @@ void intel_power_domains_driver_remove(struct intel_display *display)
/* Remove the refcount we took to keep power well support disabled. */
if (!display->params.disable_power_well)
- intel_display_power_put(i915, POWER_DOMAIN_INIT,
+ intel_display_power_put(display, POWER_DOMAIN_INIT,
fetch_and_zero(&display->power.domains.disable_wakeref));
intel_display_power_flush_work_sync(display);
@@ -2051,11 +2046,10 @@ void intel_power_domains_sanitize_state(struct intel_display *display)
*/
void intel_power_domains_enable(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
intel_wakeref_t wakeref __maybe_unused =
fetch_and_zero(&display->power.domains.init_wakeref);
- intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
intel_power_domains_verify_state(display);
}
@@ -2068,12 +2062,11 @@ void intel_power_domains_enable(struct intel_display *display)
*/
void intel_power_domains_disable(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
drm_WARN_ON(display->drm, power_domains->init_wakeref);
power_domains->init_wakeref =
- intel_display_power_get(i915, POWER_DOMAIN_INIT);
+ intel_display_power_get(display, POWER_DOMAIN_INIT);
intel_power_domains_verify_state(display);
}
@@ -2091,12 +2084,11 @@ void intel_power_domains_disable(struct intel_display *display)
*/
void intel_power_domains_suspend(struct intel_display *display, bool s2idle)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
intel_wakeref_t wakeref __maybe_unused =
fetch_and_zero(&power_domains->init_wakeref);
- intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
/*
* In case of suspend-to-idle (aka S0ix) on a DMC platform without DC9
@@ -2107,7 +2099,7 @@ void intel_power_domains_suspend(struct intel_display *display, bool s2idle)
*/
if (!(power_domains->allowed_dc_mask & DC_STATE_EN_DC9) && s2idle &&
intel_dmc_has_payload(display)) {
- intel_display_power_flush_work(i915);
+ intel_display_power_flush_work(display);
intel_power_domains_verify_state(display);
return;
}
@@ -2117,10 +2109,10 @@ void intel_power_domains_suspend(struct intel_display *display, bool s2idle)
* power wells if power domains must be deinitialized for suspend.
*/
if (!display->params.disable_power_well)
- intel_display_power_put(i915, POWER_DOMAIN_INIT,
+ intel_display_power_put(display, POWER_DOMAIN_INIT,
fetch_and_zero(&display->power.domains.disable_wakeref));
- intel_display_power_flush_work(i915);
+ intel_display_power_flush_work(display);
intel_power_domains_verify_state(display);
if (DISPLAY_VER(display) >= 11)
@@ -2145,7 +2137,6 @@ void intel_power_domains_suspend(struct intel_display *display, bool s2idle)
*/
void intel_power_domains_resume(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
if (power_domains->display_core_suspended) {
@@ -2154,7 +2145,7 @@ void intel_power_domains_resume(struct intel_display *display)
} else {
drm_WARN_ON(display->drm, power_domains->init_wakeref);
power_domains->init_wakeref =
- intel_display_power_get(i915, POWER_DOMAIN_INIT);
+ intel_display_power_get(display, POWER_DOMAIN_INIT);
}
intel_power_domains_verify_state(display);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 7b294eec4431..b5d67b6c73cf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -184,88 +184,88 @@ void intel_display_power_resume(struct intel_display *display);
void intel_display_power_set_target_dc_state(struct intel_display *display,
u32 state);
-bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
+bool intel_display_power_is_enabled(struct intel_display *display,
enum intel_display_power_domain domain);
-intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,
+intel_wakeref_t intel_display_power_get(struct intel_display *display,
enum intel_display_power_domain domain);
intel_wakeref_t
-intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv,
+intel_display_power_get_if_enabled(struct intel_display *display,
enum intel_display_power_domain domain);
-void __intel_display_power_put_async(struct drm_i915_private *i915,
+void __intel_display_power_put_async(struct intel_display *display,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref,
int delay_ms);
-void intel_display_power_flush_work(struct drm_i915_private *i915);
+void intel_display_power_flush_work(struct intel_display *display);
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM)
-void intel_display_power_put(struct drm_i915_private *dev_priv,
+void intel_display_power_put(struct intel_display *display,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref);
static inline void
-intel_display_power_put_async(struct drm_i915_private *i915,
+intel_display_power_put_async(struct intel_display *display,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref)
{
- __intel_display_power_put_async(i915, domain, wakeref, -1);
+ __intel_display_power_put_async(display, domain, wakeref, -1);
}
static inline void
-intel_display_power_put_async_delay(struct drm_i915_private *i915,
+intel_display_power_put_async_delay(struct intel_display *display,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref,
int delay_ms)
{
- __intel_display_power_put_async(i915, domain, wakeref, delay_ms);
+ __intel_display_power_put_async(display, domain, wakeref, delay_ms);
}
#else
void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain);
static inline void
-intel_display_power_put(struct drm_i915_private *i915,
+intel_display_power_put(struct intel_display *display,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref)
{
- intel_display_power_put_unchecked(i915, domain);
+ intel_display_power_put_unchecked(display, domain);
}
static inline void
-intel_display_power_put_async(struct drm_i915_private *i915,
+intel_display_power_put_async(struct intel_display *display,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref)
{
- __intel_display_power_put_async(i915, domain, INTEL_WAKEREF_DEF, -1);
+ __intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, -1);
}
static inline void
-intel_display_power_put_async_delay(struct drm_i915_private *i915,
+intel_display_power_put_async_delay(struct intel_display *display,
enum intel_display_power_domain domain,
intel_wakeref_t wakeref,
int delay_ms)
{
- __intel_display_power_put_async(i915, domain, INTEL_WAKEREF_DEF, delay_ms);
+ __intel_display_power_put_async(display, domain, INTEL_WAKEREF_DEF, delay_ms);
}
#endif
void
-intel_display_power_get_in_set(struct drm_i915_private *i915,
+intel_display_power_get_in_set(struct intel_display *display,
struct intel_display_power_domain_set *power_domain_set,
enum intel_display_power_domain domain);
bool
-intel_display_power_get_in_set_if_enabled(struct drm_i915_private *i915,
+intel_display_power_get_in_set_if_enabled(struct intel_display *display,
struct intel_display_power_domain_set *power_domain_set,
enum intel_display_power_domain domain);
void
-intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
+intel_display_power_put_mask_in_set(struct intel_display *display,
struct intel_display_power_domain_set *power_domain_set,
struct intel_power_domain_mask *mask);
static inline void
-intel_display_power_put_all_in_set(struct drm_i915_private *i915,
+intel_display_power_put_all_in_set(struct intel_display *display,
struct intel_display_power_domain_set *power_domain_set)
{
- intel_display_power_put_mask_in_set(i915, power_domain_set, &power_domain_set->mask);
+ intel_display_power_put_mask_in_set(display, power_domain_set, &power_domain_set->mask);
}
void intel_display_power_debug(struct drm_i915_private *i915, struct seq_file *m);
@@ -296,12 +296,12 @@ enum dbuf_slice {
void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,
u8 req_slices);
-#define with_intel_display_power(i915, domain, wf) \
- for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
- intel_display_power_put_async((i915), (domain), (wf)), (wf) = NULL)
+#define with_intel_display_power(display, domain, wf) \
+ for ((wf) = intel_display_power_get((display), (domain)); (wf); \
+ intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
-#define with_intel_display_power_if_enabled(i915, domain, wf) \
- for ((wf) = intel_display_power_get_if_enabled((i915), (domain)); (wf); \
- intel_display_power_put_async((i915), (domain), (wf)), (wf) = NULL)
+#define with_intel_display_power_if_enabled(display, domain, wf) \
+ for ((wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
+ intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
#endif /* __INTEL_DISPLAY_POWER_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 221d3abda791..fa6944e55d95 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -992,19 +992,16 @@ static int parse_dmc_fw(struct intel_dmc *dmc, const struct firmware *fw)
static void intel_dmc_runtime_pm_get(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
drm_WARN_ON(display->drm, display->dmc.wakeref);
- display->dmc.wakeref = intel_display_power_get(i915, POWER_DOMAIN_INIT);
+ display->dmc.wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT);
}
static void intel_dmc_runtime_pm_put(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
intel_wakeref_t wakeref __maybe_unused =
fetch_and_zero(&display->dmc.wakeref);
- intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
}
static const char *dmc_fallback_path(struct intel_display *display)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a286e5e31c4d..161ebfb7094f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5481,13 +5481,13 @@ void intel_digital_port_unlock(struct intel_encoder *encoder)
*/
bool intel_digital_port_connected_locked(struct intel_encoder *encoder)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
bool is_glitch_free = intel_tc_port_handles_hpd_glitches(dig_port);
bool is_connected = false;
intel_wakeref_t wakeref;
- with_intel_display_power(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
+ with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
unsigned long wait_expires = jiffies + msecs_to_jiffies_timeout(4);
do {
@@ -6536,7 +6536,6 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
struct intel_dp *intel_dp = &dig_port->dp;
struct intel_encoder *encoder = &dig_port->base;
struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
enum port port = encoder->port;
int type;
@@ -6636,7 +6635,7 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
return true;
fail:
- intel_display_power_flush_work(dev_priv);
+ intel_display_power_flush_work(display);
drm_connector_cleanup(&connector->base);
return false;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 40c697476b72..ec27bbd70bcf 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -243,7 +243,6 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
struct intel_display *display = to_intel_display(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct intel_encoder *encoder = &dig_port->base;
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
i915_reg_t ch_ctl, ch_data[5];
u32 aux_clock_divider;
enum intel_display_power_domain aux_domain;
@@ -272,7 +271,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
aux_domain = intel_aux_power_domain(dig_port);
- aux_wakeref = intel_display_power_get(i915, aux_domain);
+ aux_wakeref = intel_display_power_get(display, aux_domain);
pps_wakeref = intel_pps_lock(intel_dp);
/*
@@ -432,7 +431,7 @@ intel_dp_aux_xfer(struct intel_dp *intel_dp,
intel_pps_vdd_off_unlocked(intel_dp, false);
intel_pps_unlock(intel_dp, pps_wakeref);
- intel_display_power_put_async(i915, aux_domain, aux_wakeref);
+ intel_display_power_put_async(display, aux_domain, aux_wakeref);
out_unlock:
intel_digital_port_unlock(encoder);
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index b8fa04d3cd5c..cb2ef317d219 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -228,8 +228,10 @@ intel_tc_pll_enable_reg(struct drm_i915_private *i915,
static void _intel_enable_shared_dpll(struct drm_i915_private *i915,
struct intel_shared_dpll *pll)
{
+ struct intel_display *display = &i915->display;
+
if (pll->info->power_domain)
- pll->wakeref = intel_display_power_get(i915, pll->info->power_domain);
+ pll->wakeref = intel_display_power_get(display, pll->info->power_domain);
pll->info->funcs->enable(i915, pll, &pll->state.hw_state);
pll->on = true;
@@ -238,11 +240,13 @@ static void _intel_enable_shared_dpll(struct drm_i915_private *i915,
static void _intel_disable_shared_dpll(struct drm_i915_private *i915,
struct intel_shared_dpll *pll)
{
+ struct intel_display *display = &i915->display;
+
pll->info->funcs->disable(i915, pll);
pll->on = false;
if (pll->info->power_domain)
- intel_display_power_put(i915, pll->info->power_domain, pll->wakeref);
+ intel_display_power_put(display, pll->info->power_domain, pll->wakeref);
}
/**
@@ -525,12 +529,13 @@ static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *i915,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
+ struct intel_display *display = &i915->display;
struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
const enum intel_dpll_id id = pll->info->id;
intel_wakeref_t wakeref;
u32 val;
- wakeref = intel_display_power_get_if_enabled(i915,
+ wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -540,7 +545,7 @@ static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *i915,
hw_state->fp0 = intel_de_read(i915, PCH_FP0(id));
hw_state->fp1 = intel_de_read(i915, PCH_FP1(id));
- intel_display_power_put(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return val & DPLL_VCO_ENABLE;
}
@@ -747,12 +752,13 @@ static bool hsw_ddi_wrpll_get_hw_state(struct drm_i915_private *i915,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
+ struct intel_display *display = &i915->display;
struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
const enum intel_dpll_id id = pll->info->id;
intel_wakeref_t wakeref;
u32 val;
- wakeref = intel_display_power_get_if_enabled(i915,
+ wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -760,7 +766,7 @@ static bool hsw_ddi_wrpll_get_hw_state(struct drm_i915_private *i915,
val = intel_de_read(i915, WRPLL_CTL(id));
hw_state->wrpll = val;
- intel_display_power_put(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return val & WRPLL_PLL_ENABLE;
}
@@ -769,11 +775,12 @@ static bool hsw_ddi_spll_get_hw_state(struct drm_i915_private *i915,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
+ struct intel_display *display = &i915->display;
struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
intel_wakeref_t wakeref;
u32 val;
- wakeref = intel_display_power_get_if_enabled(i915,
+ wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -781,7 +788,7 @@ static bool hsw_ddi_spll_get_hw_state(struct drm_i915_private *i915,
val = intel_de_read(i915, SPLL_CTL);
hw_state->spll = val;
- intel_display_power_put(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return val & SPLL_PLL_ENABLE;
}
@@ -1425,6 +1432,7 @@ static bool skl_ddi_pll_get_hw_state(struct drm_i915_private *i915,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
+ struct intel_display *display = &i915->display;
struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
const struct skl_dpll_regs *regs = skl_dpll_regs;
const enum intel_dpll_id id = pll->info->id;
@@ -1432,7 +1440,7 @@ static bool skl_ddi_pll_get_hw_state(struct drm_i915_private *i915,
bool ret;
u32 val;
- wakeref = intel_display_power_get_if_enabled(i915,
+ wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -1454,7 +1462,7 @@ static bool skl_ddi_pll_get_hw_state(struct drm_i915_private *i915,
ret = true;
out:
- intel_display_power_put(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return ret;
}
@@ -1463,6 +1471,7 @@ static bool skl_ddi_dpll0_get_hw_state(struct drm_i915_private *i915,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
+ struct intel_display *display = &i915->display;
struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
const struct skl_dpll_regs *regs = skl_dpll_regs;
const enum intel_dpll_id id = pll->info->id;
@@ -1470,7 +1479,7 @@ static bool skl_ddi_dpll0_get_hw_state(struct drm_i915_private *i915,
u32 val;
bool ret;
- wakeref = intel_display_power_get_if_enabled(i915,
+ wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -1488,7 +1497,7 @@ static bool skl_ddi_dpll0_get_hw_state(struct drm_i915_private *i915,
ret = true;
out:
- intel_display_power_put(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return ret;
}
@@ -2172,7 +2181,7 @@ static bool bxt_ddi_pll_get_hw_state(struct drm_i915_private *i915,
bxt_port_to_phy_channel(display, port, &phy, &ch);
- wakeref = intel_display_power_get_if_enabled(i915,
+ wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -2234,7 +2243,7 @@ static bool bxt_ddi_pll_get_hw_state(struct drm_i915_private *i915,
ret = true;
out:
- intel_display_power_put(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return ret;
}
@@ -3541,6 +3550,7 @@ static bool mg_pll_get_hw_state(struct drm_i915_private *i915,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
+ struct intel_display *display = &i915->display;
struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
const enum intel_dpll_id id = pll->info->id;
enum tc_port tc_port = icl_pll_id_to_tc_port(id);
@@ -3550,7 +3560,7 @@ static bool mg_pll_get_hw_state(struct drm_i915_private *i915,
i915_reg_t enable_reg = intel_tc_pll_enable_reg(i915, pll);
- wakeref = intel_display_power_get_if_enabled(i915,
+ wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -3600,7 +3610,7 @@ static bool mg_pll_get_hw_state(struct drm_i915_private *i915,
ret = true;
out:
- intel_display_power_put(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return ret;
}
@@ -3608,6 +3618,7 @@ static bool dkl_pll_get_hw_state(struct drm_i915_private *i915,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
+ struct intel_display *display = &i915->display;
struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
const enum intel_dpll_id id = pll->info->id;
enum tc_port tc_port = icl_pll_id_to_tc_port(id);
@@ -3615,7 +3626,7 @@ static bool dkl_pll_get_hw_state(struct drm_i915_private *i915,
bool ret = false;
u32 val;
- wakeref = intel_display_power_get_if_enabled(i915,
+ wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -3672,7 +3683,7 @@ static bool dkl_pll_get_hw_state(struct drm_i915_private *i915,
ret = true;
out:
- intel_display_power_put(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return ret;
}
@@ -3681,13 +3692,14 @@ static bool icl_pll_get_hw_state(struct drm_i915_private *i915,
struct intel_dpll_hw_state *dpll_hw_state,
i915_reg_t enable_reg)
{
+ struct intel_display *display = &i915->display;
struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
const enum intel_dpll_id id = pll->info->id;
intel_wakeref_t wakeref;
bool ret = false;
u32 val;
- wakeref = intel_display_power_get_if_enabled(i915,
+ wakeref = intel_display_power_get_if_enabled(display,
POWER_DOMAIN_DISPLAY_CORE);
if (!wakeref)
return false;
@@ -3733,7 +3745,7 @@ static bool icl_pll_get_hw_state(struct drm_i915_private *i915,
ret = true;
out:
- intel_display_power_put(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return ret;
}
@@ -4508,12 +4520,13 @@ bool intel_dpll_get_hw_state(struct drm_i915_private *i915,
static void readout_dpll_hw_state(struct drm_i915_private *i915,
struct intel_shared_dpll *pll)
{
+ struct intel_display *display = &i915->display;
struct intel_crtc *crtc;
pll->on = intel_dpll_get_hw_state(i915, pll, &pll->state.hw_state);
if (pll->on && pll->info->power_domain)
- pll->wakeref = intel_display_power_get(i915, pll->info->power_domain);
+ pll->wakeref = intel_display_power_get(display, pll->info->power_domain);
pll->state.pipe_mask = 0;
for_each_intel_crtc(&i915->drm, crtc) {
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index 807cf606e7a8..abf457e68ee9 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -761,11 +761,10 @@ gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
{
struct intel_gmbus *bus = to_intel_gmbus(adapter);
struct intel_display *display = bus->display;
- struct drm_i915_private *i915 = to_i915(display->drm);
intel_wakeref_t wakeref;
int ret;
- wakeref = intel_display_power_get(i915, POWER_DOMAIN_GMBUS);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_GMBUS);
if (bus->force_bit) {
ret = i2c_bit_algo.master_xfer(adapter, msgs, num);
@@ -777,7 +776,7 @@ gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
bus->force_bit |= GMBUS_FORCE_BIT_RETRY;
}
- intel_display_power_put(i915, POWER_DOMAIN_GMBUS, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_GMBUS, wakeref);
return ret;
}
@@ -786,7 +785,6 @@ int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
{
struct intel_gmbus *bus = to_intel_gmbus(adapter);
struct intel_display *display = bus->display;
- struct drm_i915_private *i915 = to_i915(display->drm);
u8 cmd = DRM_HDCP_DDC_AKSV;
u8 buf[DRM_HDCP_KSV_LEN] = {};
struct i2c_msg msgs[] = {
@@ -806,7 +804,7 @@ int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
intel_wakeref_t wakeref;
int ret;
- wakeref = intel_display_power_get(i915, POWER_DOMAIN_GMBUS);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_GMBUS);
mutex_lock(&display->gmbus.mutex);
/*
@@ -817,7 +815,7 @@ int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
ret = do_gmbus_xfer(adapter, msgs, ARRAY_SIZE(msgs), GMBUS_AKSV_SELECT);
mutex_unlock(&display->gmbus.mutex);
- intel_display_power_put(i915, POWER_DOMAIN_GMBUS, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_GMBUS, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 3b51238022f4..015110fc57a2 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2491,14 +2491,13 @@ static bool
intel_hdmi_set_edid(struct drm_connector *connector)
{
struct intel_display *display = to_intel_display(connector->dev);
- struct drm_i915_private *dev_priv = to_i915(connector->dev);
struct intel_hdmi *intel_hdmi = intel_attached_hdmi(to_intel_connector(connector));
struct i2c_adapter *ddc = connector->ddc;
intel_wakeref_t wakeref;
const struct drm_edid *drm_edid;
bool connected = false;
- wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_GMBUS);
drm_edid = drm_edid_read_ddc(connector, ddc);
@@ -2521,7 +2520,7 @@ intel_hdmi_set_edid(struct drm_connector *connector)
connected = true;
}
- intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_GMBUS, wakeref);
cec_notifier_set_phys_addr(intel_hdmi->cec_notifier,
connector->display_info.source_physical_address);
@@ -2534,7 +2533,6 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)
{
struct intel_display *display = to_intel_display(connector->dev);
enum drm_connector_status status = connector_status_disconnected;
- struct drm_i915_private *dev_priv = to_i915(connector->dev);
struct intel_hdmi *intel_hdmi = intel_attached_hdmi(to_intel_connector(connector));
struct intel_encoder *encoder = &hdmi_to_dig_port(intel_hdmi)->base;
intel_wakeref_t wakeref;
@@ -2548,7 +2546,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)
if (!intel_display_driver_check_access(display))
return connector->status;
- wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_GMBUS);
if (DISPLAY_VER(display) >= 11 &&
!intel_digital_port_connected(encoder))
@@ -2560,7 +2558,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool force)
status = connector_status_connected;
out:
- intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_GMBUS, wakeref);
if (status != connector_status_connected)
cec_notifier_phys_addr_invalidate(intel_hdmi->cec_notifier);
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index c0d48f651dab..d2e0002c5dc3 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -732,6 +732,7 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
struct drm_i915_private *dev_priv =
container_of(work, struct drm_i915_private,
display.hotplug.poll_init_work);
+ struct intel_display *display = &dev_priv->display;
struct drm_connector_list_iter conn_iter;
struct intel_connector *connector;
intel_wakeref_t wakeref;
@@ -747,7 +748,7 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
* and so risk an endless loop of this same sequence.
*/
if (!enabled) {
- wakeref = intel_display_power_get(dev_priv,
+ wakeref = intel_display_power_get(display,
POWER_DOMAIN_DISPLAY_CORE);
drm_WARN_ON(&dev_priv->drm,
READ_ONCE(dev_priv->display.hotplug.poll_enabled));
@@ -789,7 +790,7 @@ static void i915_hpd_poll_init_work(struct work_struct *work)
if (!enabled) {
i915_hpd_poll_detect_connectors(dev_priv);
- intel_display_power_put(dev_priv,
+ intel_display_power_put(display,
POWER_DOMAIN_DISPLAY_CORE,
wakeref);
}
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 4b0dce169d4e..e86b3a86db82 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -102,18 +102,19 @@ bool intel_lvds_port_enabled(struct drm_i915_private *i915,
static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
enum pipe *pipe)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
intel_wakeref_t wakeref;
bool ret;
- wakeref = intel_display_power_get_if_enabled(i915, encoder->power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, encoder->power_domain);
if (!wakeref)
return false;
ret = intel_lvds_port_enabled(i915, lvds_encoder->reg, pipe);
- intel_display_power_put(i915, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 9a2bea19f17b..bbde70b35712 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -176,7 +176,7 @@ static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc)
intel_fbc_disable(crtc);
intel_update_watermarks(i915);
- intel_display_power_put_all_in_set(i915, &crtc->enabled_power_domains);
+ intel_display_power_put_all_in_set(display, &crtc->enabled_power_domains);
cdclk_state->min_cdclk[pipe] = 0;
cdclk_state->min_voltage_level[pipe] = 0;
@@ -968,7 +968,7 @@ void intel_modeset_setup_hw_state(struct drm_i915_private *i915,
struct intel_crtc *crtc;
intel_wakeref_t wakeref;
- wakeref = intel_display_power_get(i915, POWER_DOMAIN_INIT);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT);
intel_early_display_was(i915);
intel_modeset_readout_hw_state(i915);
@@ -1025,7 +1025,7 @@ void intel_modeset_setup_hw_state(struct drm_i915_private *i915,
intel_modeset_put_crtc_power_domains(crtc, &put_domains);
}
- intel_display_power_put(i915, POWER_DOMAIN_INIT, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
intel_power_domains_sanitize_state(display);
}
diff --git a/drivers/gpu/drm/i915/display/intel_pipe_crc.c b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
index 90efc6f64e52..10e26c3db946 100644
--- a/drivers/gpu/drm/i915/display/intel_pipe_crc.c
+++ b/drivers/gpu/drm/i915/display/intel_pipe_crc.c
@@ -582,6 +582,7 @@ int intel_crtc_verify_crc_source(struct drm_crtc *crtc, const char *source_name,
int intel_crtc_set_crc_source(struct drm_crtc *_crtc, const char *source_name)
{
struct intel_crtc *crtc = to_intel_crtc(_crtc);
+ struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_pipe_crc *pipe_crc = &crtc->pipe_crc;
enum intel_display_power_domain power_domain;
@@ -598,7 +599,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *_crtc, const char *source_name)
}
power_domain = POWER_DOMAIN_PIPE(pipe);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref) {
drm_dbg_kms(&dev_priv->drm,
"Trying to capture CRC while pipe is off\n");
@@ -628,7 +629,7 @@ int intel_crtc_set_crc_source(struct drm_crtc *_crtc, const char *source_name)
if (!enable)
intel_crtc_crc_setup_workarounds(crtc, false);
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index c0f65749a3f6..ef6effaf82e0 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -65,13 +65,12 @@ static const char *pps_name(struct intel_dp *intel_dp)
intel_wakeref_t intel_pps_lock(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
intel_wakeref_t wakeref;
/*
* See vlv_pps_reset_all() why we need a power domain reference here.
*/
- wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
+ wakeref = intel_display_power_get(display, POWER_DOMAIN_DISPLAY_CORE);
mutex_lock(&display->pps.mutex);
return wakeref;
@@ -81,10 +80,9 @@ intel_wakeref_t intel_pps_unlock(struct intel_dp *intel_dp,
intel_wakeref_t wakeref)
{
struct intel_display *display = to_intel_display(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
mutex_unlock(&display->pps.mutex);
- intel_display_power_put(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_DISPLAY_CORE, wakeref);
return NULL;
}
@@ -741,7 +739,6 @@ static u32 ilk_get_pp_control(struct intel_dp *intel_dp)
bool intel_pps_vdd_on_unlocked(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
u32 pp;
i915_reg_t pp_stat_reg, pp_ctrl_reg;
@@ -759,7 +756,7 @@ bool intel_pps_vdd_on_unlocked(struct intel_dp *intel_dp)
return need_to_disable;
drm_WARN_ON(display->drm, intel_dp->pps.vdd_wakeref);
- intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,
+ intel_dp->pps.vdd_wakeref = intel_display_power_get(display,
intel_aux_power_domain(dig_port));
pp_stat_reg = _pp_stat_reg(intel_dp);
@@ -825,7 +822,6 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp)
static void intel_pps_vdd_off_sync_unlocked(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
u32 pp;
i915_reg_t pp_stat_reg, pp_ctrl_reg;
@@ -863,7 +859,7 @@ static void intel_pps_vdd_off_sync_unlocked(struct intel_dp *intel_dp)
intel_dp_invalidate_source_oui(intel_dp);
}
- intel_display_power_put(dev_priv,
+ intel_display_power_put(display,
intel_aux_power_domain(dig_port),
fetch_and_zero(&intel_dp->pps.vdd_wakeref));
}
@@ -1036,7 +1032,6 @@ void intel_pps_on(struct intel_dp *intel_dp)
void intel_pps_off_unlocked(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
u32 pp;
i915_reg_t pp_ctrl_reg;
@@ -1074,7 +1069,7 @@ void intel_pps_off_unlocked(struct intel_dp *intel_dp)
intel_dp_invalidate_source_oui(intel_dp);
/* We got a reference when we enabled the VDD. */
- intel_display_power_put(dev_priv,
+ intel_display_power_put(display,
intel_aux_power_domain(dig_port),
fetch_and_zero(&intel_dp->pps.vdd_wakeref));
}
@@ -1338,7 +1333,6 @@ void vlv_pps_port_disable(struct intel_encoder *encoder,
static void pps_vdd_init(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
lockdep_assert_held(&display->pps.mutex);
@@ -1357,7 +1351,7 @@ static void pps_vdd_init(struct intel_dp *intel_dp)
dig_port->base.base.base.id, dig_port->base.base.name,
pps_name(intel_dp));
drm_WARN_ON(display->drm, intel_dp->pps.vdd_wakeref);
- intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,
+ intel_dp->pps.vdd_wakeref = intel_display_power_get(display,
intel_aux_power_domain(dig_port));
}
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 7b3b7be7d5b8..abb54d7c9608 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -452,15 +452,14 @@ static bool
vlv_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum intel_display_power_domain power_domain;
enum plane_id plane_id = plane->id;
intel_wakeref_t wakeref;
bool ret;
power_domain = POWER_DOMAIN_PIPE(plane->pipe);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return false;
@@ -468,7 +467,7 @@ vlv_sprite_get_hw_state(struct intel_plane *plane,
*pipe = plane->pipe;
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
@@ -884,13 +883,12 @@ ivb_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
bool ret;
power_domain = POWER_DOMAIN_PIPE(plane->pipe);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return false;
@@ -898,7 +896,7 @@ ivb_sprite_get_hw_state(struct intel_plane *plane,
*pipe = plane->pipe;
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
@@ -1217,13 +1215,12 @@ g4x_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
bool ret;
power_domain = POWER_DOMAIN_PIPE(plane->pipe);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return false;
@@ -1231,7 +1228,7 @@ g4x_sprite_get_hw_state(struct intel_plane *plane,
*pipe = plane->pipe;
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 13811244c82b..e9e9ee5d345a 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -187,11 +187,11 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
static intel_wakeref_t
__tc_cold_block(struct intel_tc_port *tc, enum intel_display_power_domain *domain)
{
- struct drm_i915_private *i915 = tc_to_i915(tc);
+ struct intel_display *display = to_intel_display(tc->dig_port);
*domain = tc_phy_cold_off_domain(tc);
- return intel_display_power_get(i915, *domain);
+ return intel_display_power_get(display, *domain);
}
static intel_wakeref_t
@@ -211,9 +211,9 @@ static void
__tc_cold_unblock(struct intel_tc_port *tc, enum intel_display_power_domain domain,
intel_wakeref_t wakeref)
{
- struct drm_i915_private *i915 = tc_to_i915(tc);
+ struct intel_display *display = to_intel_display(tc->dig_port);
- intel_display_power_put(i915, domain, wakeref);
+ intel_display_power_put(display, domain, wakeref);
}
static void
@@ -230,21 +230,21 @@ tc_cold_unblock(struct intel_tc_port *tc, intel_wakeref_t wakeref)
static void
assert_display_core_power_enabled(struct intel_tc_port *tc)
{
- struct drm_i915_private *i915 = tc_to_i915(tc);
+ struct intel_display *display = to_intel_display(tc->dig_port);
- drm_WARN_ON(&i915->drm,
- !intel_display_power_is_enabled(i915, POWER_DOMAIN_DISPLAY_CORE));
+ drm_WARN_ON(display->drm,
+ !intel_display_power_is_enabled(display, POWER_DOMAIN_DISPLAY_CORE));
}
static void
assert_tc_cold_blocked(struct intel_tc_port *tc)
{
- struct drm_i915_private *i915 = tc_to_i915(tc);
+ struct intel_display *display = to_intel_display(tc->dig_port);
bool enabled;
- enabled = intel_display_power_is_enabled(i915,
+ enabled = intel_display_power_is_enabled(display,
tc_phy_cold_off_domain(tc));
- drm_WARN_ON(&i915->drm, !enabled);
+ drm_WARN_ON(display->drm, !enabled);
}
static enum intel_display_power_domain
@@ -258,10 +258,10 @@ tc_port_power_domain(struct intel_tc_port *tc)
static void
assert_tc_port_power_enabled(struct intel_tc_port *tc)
{
- struct drm_i915_private *i915 = tc_to_i915(tc);
+ struct intel_display *display = to_intel_display(tc->dig_port);
- drm_WARN_ON(&i915->drm,
- !intel_display_power_is_enabled(i915, tc_port_power_domain(tc)));
+ drm_WARN_ON(display->drm,
+ !intel_display_power_is_enabled(display, tc_port_power_domain(tc)));
}
static u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
@@ -296,12 +296,13 @@ u32 intel_tc_port_get_pin_assignment_mask(struct intel_digital_port *dig_port)
static int lnl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
{
+ struct intel_display *display = to_intel_display(dig_port);
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
enum tc_port tc_port = intel_encoder_to_tc(&dig_port->base);
intel_wakeref_t wakeref;
u32 val, pin_assignment;
- with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref)
+ with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
val = intel_de_read(i915, TCSS_DDI_STATUS(tc_port));
pin_assignment =
@@ -321,11 +322,11 @@ static int lnl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
static int mtl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct intel_display *display = to_intel_display(dig_port);
intel_wakeref_t wakeref;
u32 pin_mask;
- with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref)
+ with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
pin_mask = intel_tc_port_get_pin_assignment_mask(dig_port);
switch (pin_mask) {
@@ -342,11 +343,11 @@ static int mtl_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
static int intel_tc_port_get_max_lane_count(struct intel_digital_port *dig_port)
{
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct intel_display *display = to_intel_display(dig_port);
intel_wakeref_t wakeref;
u32 lane_mask = 0;
- with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref)
+ with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref)
lane_mask = intel_tc_port_get_lane_mask(dig_port);
switch (lane_mask) {
@@ -488,6 +489,7 @@ icl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
{
+ struct intel_display *display = to_intel_display(tc->dig_port);
struct drm_i915_private *i915 = tc_to_i915(tc);
struct intel_digital_port *dig_port = tc->dig_port;
u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
@@ -496,7 +498,7 @@ static u32 icl_tc_phy_hpd_live_status(struct intel_tc_port *tc)
u32 pch_isr;
u32 mask = 0;
- with_intel_display_power(i915, tc_phy_cold_off_domain(tc), wakeref) {
+ with_intel_display_power(display, tc_phy_cold_off_domain(tc), wakeref) {
fia_isr = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia));
pch_isr = intel_de_read(i915, SDEISR);
}
@@ -730,11 +732,12 @@ tgl_tc_phy_cold_off_domain(struct intel_tc_port *tc)
static void tgl_tc_phy_init(struct intel_tc_port *tc)
{
+ struct intel_display *display = to_intel_display(tc->dig_port);
struct drm_i915_private *i915 = tc_to_i915(tc);
intel_wakeref_t wakeref;
u32 val;
- with_intel_display_power(i915, tc_phy_cold_off_domain(tc), wakeref)
+ with_intel_display_power(display, tc_phy_cold_off_domain(tc), wakeref)
val = intel_de_read(i915, PORT_TX_DFLEXDPSP(FIA1));
drm_WARN_ON(&i915->drm, val == 0xffffffff);
@@ -771,6 +774,7 @@ adlp_tc_phy_cold_off_domain(struct intel_tc_port *tc)
static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
{
+ struct intel_display *display = to_intel_display(tc->dig_port);
struct drm_i915_private *i915 = tc_to_i915(tc);
struct intel_digital_port *dig_port = tc->dig_port;
enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
@@ -781,7 +785,7 @@ static u32 adlp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
u32 pch_isr;
u32 mask = 0;
- with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
+ with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
cpu_isr = intel_de_read(i915, GEN11_DE_HPD_ISR);
pch_isr = intel_de_read(i915, SDEISR);
}
@@ -851,22 +855,23 @@ static bool adlp_tc_phy_is_owned(struct intel_tc_port *tc)
static void adlp_tc_phy_get_hw_state(struct intel_tc_port *tc)
{
- struct drm_i915_private *i915 = tc_to_i915(tc);
+ struct intel_display *display = to_intel_display(tc->dig_port);
enum intel_display_power_domain port_power_domain =
tc_port_power_domain(tc);
intel_wakeref_t port_wakeref;
- port_wakeref = intel_display_power_get(i915, port_power_domain);
+ port_wakeref = intel_display_power_get(display, port_power_domain);
tc->mode = tc_phy_get_current_mode(tc);
if (tc->mode != TC_PORT_DISCONNECTED)
tc->lock_wakeref = tc_cold_block(tc);
- intel_display_power_put(i915, port_power_domain, port_wakeref);
+ intel_display_power_put(display, port_power_domain, port_wakeref);
}
static bool adlp_tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
{
+ struct intel_display *display = to_intel_display(tc->dig_port);
struct drm_i915_private *i915 = tc_to_i915(tc);
enum intel_display_power_domain port_power_domain =
tc_port_power_domain(tc);
@@ -877,7 +882,7 @@ static bool adlp_tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
return true;
}
- port_wakeref = intel_display_power_get(i915, port_power_domain);
+ port_wakeref = intel_display_power_get(display, port_power_domain);
if (!adlp_tc_phy_take_ownership(tc, true) &&
!drm_WARN_ON(&i915->drm, tc->mode == TC_PORT_LEGACY)) {
@@ -898,7 +903,7 @@ static bool adlp_tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
if (!tc_phy_verify_legacy_or_dp_alt_mode(tc, required_lanes))
goto out_unblock_tc_cold;
- intel_display_power_put(i915, port_power_domain, port_wakeref);
+ intel_display_power_put(display, port_power_domain, port_wakeref);
return true;
@@ -907,19 +912,19 @@ static bool adlp_tc_phy_connect(struct intel_tc_port *tc, int required_lanes)
out_release_phy:
adlp_tc_phy_take_ownership(tc, false);
out_put_port_power:
- intel_display_power_put(i915, port_power_domain, port_wakeref);
+ intel_display_power_put(display, port_power_domain, port_wakeref);
return false;
}
static void adlp_tc_phy_disconnect(struct intel_tc_port *tc)
{
- struct drm_i915_private *i915 = tc_to_i915(tc);
+ struct intel_display *display = to_intel_display(tc->dig_port);
enum intel_display_power_domain port_power_domain =
tc_port_power_domain(tc);
intel_wakeref_t port_wakeref;
- port_wakeref = intel_display_power_get(i915, port_power_domain);
+ port_wakeref = intel_display_power_get(display, port_power_domain);
tc_cold_unblock(tc, fetch_and_zero(&tc->lock_wakeref));
@@ -934,7 +939,7 @@ static void adlp_tc_phy_disconnect(struct intel_tc_port *tc)
MISSING_CASE(tc->mode);
}
- intel_display_power_put(i915, port_power_domain, port_wakeref);
+ intel_display_power_put(display, port_power_domain, port_wakeref);
}
static void adlp_tc_phy_init(struct intel_tc_port *tc)
@@ -959,6 +964,7 @@ static const struct intel_tc_phy_ops adlp_tc_phy_ops = {
*/
static u32 xelpdp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
{
+ struct intel_display *display = to_intel_display(tc->dig_port);
struct drm_i915_private *i915 = tc_to_i915(tc);
struct intel_digital_port *dig_port = tc->dig_port;
enum hpd_pin hpd_pin = dig_port->base.hpd_pin;
@@ -969,7 +975,7 @@ static u32 xelpdp_tc_phy_hpd_live_status(struct intel_tc_port *tc)
u32 pch_isr;
u32 mask = 0;
- with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
+ with_intel_display_power(display, POWER_DOMAIN_DISPLAY_CORE, wakeref) {
pica_isr = intel_de_read(i915, PICAINTERRUPT_ISR);
pch_isr = intel_de_read(i915, SDEISR);
}
@@ -1436,25 +1442,25 @@ static void tc_phy_init(struct intel_tc_port *tc)
static void intel_tc_port_reset_mode(struct intel_tc_port *tc,
int required_lanes, bool force_disconnect)
{
- struct drm_i915_private *i915 = tc_to_i915(tc);
+ struct intel_display *display = to_intel_display(tc->dig_port);
struct intel_digital_port *dig_port = tc->dig_port;
enum tc_port_mode old_tc_mode = tc->mode;
- intel_display_power_flush_work(i915);
+ intel_display_power_flush_work(display);
if (!intel_tc_cold_requires_aux_pw(dig_port)) {
enum intel_display_power_domain aux_domain;
bool aux_powered;
aux_domain = intel_aux_power_domain(dig_port);
- aux_powered = intel_display_power_is_enabled(i915, aux_domain);
- drm_WARN_ON(&i915->drm, aux_powered);
+ aux_powered = intel_display_power_is_enabled(display, aux_domain);
+ drm_WARN_ON(display->drm, aux_powered);
}
tc_phy_disconnect(tc);
if (!force_disconnect)
tc_phy_connect(tc, required_lanes);
- drm_dbg_kms(&i915->drm, "Port %s: TC port mode reset (%s -> %s)\n",
+ drm_dbg_kms(display->drm, "Port %s: TC port mode reset (%s -> %s)\n",
tc->port_name,
tc_port_mode_name(old_tc_mode),
tc_port_mode_name(tc->mode));
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 932435a7f88d..6e7151346382 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -962,6 +962,7 @@ static void intel_dsc_get_pps_config(struct intel_crtc_state *crtc_state)
void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
@@ -974,7 +975,7 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
power_domain = intel_dsc_power_domain(crtc, cpu_transcoder);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return;
@@ -994,7 +995,7 @@ void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
intel_dsc_get_pps_config(crtc_state);
out:
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
}
static void intel_vdsc_dump_state(struct drm_printer *p, int indent,
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index fd18dd07ae49..684b5d1bc87c 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -59,7 +59,6 @@ void intel_vga_redisable_power_on(struct intel_display *display)
void intel_vga_redisable(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
intel_wakeref_t wakeref;
/*
@@ -71,13 +70,13 @@ void intel_vga_redisable(struct intel_display *display)
* follow the "don't touch the power well if we don't need it" policy
* the rest of the driver uses.
*/
- wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA);
+ wakeref = intel_display_power_get_if_enabled(display, POWER_DOMAIN_VGA);
if (!wakeref)
return;
intel_vga_redisable_power_on(display);
- intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref);
+ intel_display_power_put(display, POWER_DOMAIN_VGA, wakeref);
}
void intel_vga_reset_io_mem(struct intel_display *display)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 91eba560c0ab..24dbad253443 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -922,6 +922,7 @@ static bool
skl_plane_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
+ struct intel_display *display = to_intel_display(plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
enum plane_id plane_id = plane->id;
@@ -929,7 +930,7 @@ skl_plane_get_hw_state(struct intel_plane *plane,
bool ret;
power_domain = POWER_DOMAIN_PIPE(plane->pipe);
- wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return false;
@@ -937,7 +938,7 @@ skl_plane_get_hw_state(struct intel_plane *plane,
*pipe = plane->pipe;
- intel_display_power_put(dev_priv, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 45fe4aaeb450..1c4510d520e8 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -836,6 +836,7 @@ static void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
struct skl_ddb_entry *ddb_y,
u16 *min_ddb, u16 *interim_ddb)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
enum intel_display_power_domain power_domain;
enum pipe pipe = crtc->pipe;
@@ -843,7 +844,7 @@ static void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
enum plane_id plane_id;
power_domain = POWER_DOMAIN_PIPE(pipe);
- wakeref = intel_display_power_get_if_enabled(i915, power_domain);
+ wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (!wakeref)
return;
@@ -855,7 +856,7 @@ static void skl_pipe_ddb_get_hw_state(struct intel_crtc *crtc,
&min_ddb[plane_id],
&interim_ddb[plane_id]);
- intel_display_power_put(i915, power_domain, wakeref);
+ intel_display_power_put(display, power_domain, wakeref);
}
struct dbuf_slice_conf_entry {
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 14973e9cb899..f6be1cd5d270 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -947,7 +947,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
drm_dbg_kms(display->drm, "\n");
- wakeref = intel_display_power_get_if_enabled(dev_priv,
+ wakeref = intel_display_power_get_if_enabled(display,
encoder->power_domain);
if (!wakeref)
return false;
@@ -1007,7 +1007,7 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
}
out_put_power:
- intel_display_power_put(dev_priv, encoder->power_domain, wakeref);
+ intel_display_power_put(display, encoder->power_domain, wakeref);
return active;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index c08fdb65cc69..175fa2db0551 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -70,6 +70,7 @@ static int __gt_unpark(struct intel_wakeref *wf)
{
struct intel_gt *gt = container_of(wf, typeof(*gt), wakeref);
struct drm_i915_private *i915 = gt->i915;
+ struct intel_display *display = &i915->display;
GT_TRACE(gt, "\n");
@@ -84,7 +85,7 @@ static int __gt_unpark(struct intel_wakeref *wf)
* Work around it by grabbing a GT IRQ power domain whilst there is any
* GT activity, preventing any DC state transitions.
*/
- gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
+ gt->awake = intel_display_power_get(display, POWER_DOMAIN_GT_IRQ);
GEM_BUG_ON(!gt->awake);
intel_rc6_unpark(>->rc6);
@@ -103,6 +104,7 @@ static int __gt_park(struct intel_wakeref *wf)
struct intel_gt *gt = container_of(wf, typeof(*gt), wakeref);
intel_wakeref_t wakeref = fetch_and_zero(>->awake);
struct drm_i915_private *i915 = gt->i915;
+ struct intel_display *display = &i915->display;
GT_TRACE(gt, "\n");
@@ -120,7 +122,7 @@ static int __gt_park(struct intel_wakeref *wf)
/* Defer dropping the display power well for 100ms, it's slow! */
GEM_BUG_ON(!wakeref);
- intel_display_power_put_async(i915, POWER_DOMAIN_GT_IRQ, wakeref);
+ intel_display_power_put_async(display, POWER_DOMAIN_GT_IRQ, wakeref);
return 0;
}
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 06/11] drm/i915: Convert i9xx_plane.c to struct intel_display
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (4 preceding siblings ...)
2025-01-24 16:30 ` [PATCH 05/11] drm/i915: Convert intel_display_power_{get, put}*() to intel_display Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-24 16:30 ` [PATCH 07/11] drm/i915: Finish intel_sprite.c struct intel_display conversion Ville Syrjala
` (13 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
struct intel_display will replace struct drm_i915_private as
the main thing for display code. Convert the pre-skl primary plane
code to use it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 240 +++++++++++-----------
drivers/gpu/drm/i915/display/i9xx_plane.h | 6 +-
drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
3 files changed, 122 insertions(+), 126 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 3876b50d2324..c7064e650b5e 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -109,42 +109,42 @@ static bool i965_plane_format_mod_supported(struct drm_plane *_plane,
}
}
-static bool i9xx_plane_has_fbc(struct drm_i915_private *dev_priv,
+static bool i9xx_plane_has_fbc(struct intel_display *display,
enum i9xx_plane_id i9xx_plane)
{
- if (!HAS_FBC(dev_priv))
+ if (!HAS_FBC(display))
return false;
- if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
+ if (display->platform.broadwell || display->platform.haswell)
return i9xx_plane == PLANE_A; /* tied to pipe A */
- else if (IS_IVYBRIDGE(dev_priv))
+ else if (display->platform.ivybridge)
return i9xx_plane == PLANE_A || i9xx_plane == PLANE_B ||
i9xx_plane == PLANE_C;
- else if (DISPLAY_VER(dev_priv) >= 4)
+ else if (DISPLAY_VER(display) >= 4)
return i9xx_plane == PLANE_A || i9xx_plane == PLANE_B;
else
return i9xx_plane == PLANE_A;
}
-static struct intel_fbc *i9xx_plane_fbc(struct drm_i915_private *dev_priv,
+static struct intel_fbc *i9xx_plane_fbc(struct intel_display *display,
enum i9xx_plane_id i9xx_plane)
{
- if (i9xx_plane_has_fbc(dev_priv, i9xx_plane))
- return dev_priv->display.fbc[INTEL_FBC_A];
+ if (i9xx_plane_has_fbc(display, i9xx_plane))
+ return display->fbc[INTEL_FBC_A];
else
return NULL;
}
static bool i9xx_plane_has_windowing(struct intel_plane *plane)
{
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
- if (IS_CHERRYVIEW(dev_priv))
+ if (display->platform.cherryview)
return i9xx_plane == PLANE_B;
- else if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
+ else if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
return false;
- else if (DISPLAY_VER(dev_priv) == 4)
+ else if (DISPLAY_VER(display) == 4)
return i9xx_plane == PLANE_C;
else
return i9xx_plane == PLANE_B ||
@@ -154,16 +154,15 @@ static bool i9xx_plane_has_windowing(struct intel_plane *plane)
static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
u32 dspcntr;
dspcntr = DISP_ENABLE;
- if (IS_G4X(dev_priv) || IS_IRONLAKE(dev_priv) ||
- IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv))
+ if (display->platform.g4x || display->platform.ironlake ||
+ display->platform.sandybridge || display->platform.ivybridge)
dspcntr |= DISP_TRICKLE_FEED_DISABLE;
switch (fb->format->format) {
@@ -211,7 +210,7 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
return 0;
}
- if (DISPLAY_VER(dev_priv) >= 4 &&
+ if (DISPLAY_VER(display) >= 4 &&
fb->modifier == I915_FORMAT_MOD_X_TILED)
dspcntr |= DISP_TILED;
@@ -226,8 +225,8 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int src_x, src_y, src_w;
u32 offset;
@@ -245,12 +244,12 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
src_y = plane_state->uapi.src.y1 >> 16;
/* Undocumented hardware limit on i965/g4x/vlv/chv */
- if (HAS_GMCH(dev_priv) && fb->format->cpp[0] == 8 && src_w > 2048)
+ if (HAS_GMCH(display) && fb->format->cpp[0] == 8 && src_w > 2048)
return -EINVAL;
intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);
- if (DISPLAY_VER(dev_priv) >= 4)
+ if (DISPLAY_VER(display) >= 4)
offset = intel_plane_compute_aligned_offset(&src_x, &src_y,
plane_state, 0);
else
@@ -267,13 +266,13 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
* Linear surfaces seem to work just fine, even on hsw/bdw
* despite them not using the linear offset anymore.
*/
- if (DISPLAY_VER(dev_priv) >= 4 && fb->modifier == I915_FORMAT_MOD_X_TILED) {
+ if (DISPLAY_VER(display) >= 4 && fb->modifier == I915_FORMAT_MOD_X_TILED) {
unsigned int alignment = plane->min_alignment(plane, fb, 0);
int cpp = fb->format->cpp[0];
while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].mapping_stride) {
if (offset == 0) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Unable to find suitable display surface offset due to X-tiling\n");
return -EINVAL;
}
@@ -291,7 +290,7 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
src_x << 16, src_y << 16);
/* HSW/BDW do this automagically in hardware */
- if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) {
+ if (!display->platform.haswell && !display->platform.broadwell) {
unsigned int rotation = plane_state->hw.rotation;
int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
@@ -304,11 +303,11 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
}
}
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
- drm_WARN_ON(&dev_priv->drm, src_x > 8191 || src_y > 4095);
- } else if (DISPLAY_VER(dev_priv) >= 4 &&
+ if (display->platform.haswell || display->platform.broadwell) {
+ drm_WARN_ON(display->drm, src_x > 8191 || src_y > 4095);
+ } else if (DISPLAY_VER(display) >= 4 &&
fb->modifier == I915_FORMAT_MOD_X_TILED) {
- drm_WARN_ON(&dev_priv->drm, src_x > 4095 || src_y > 4095);
+ drm_WARN_ON(display->drm, src_x > 4095 || src_y > 4095);
}
plane_state->view.color_plane[0].offset = offset;
@@ -354,8 +353,8 @@ i9xx_plane_check(struct intel_crtc_state *crtc_state,
static u32 i9xx_plane_ctl_crtc(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
u32 dspcntr = 0;
if (crtc_state->gamma_enable)
@@ -364,7 +363,7 @@ static u32 i9xx_plane_ctl_crtc(const struct intel_crtc_state *crtc_state)
if (crtc_state->csc_enable)
dspcntr |= DISP_PIPE_CSC_ENABLE;
- if (DISPLAY_VER(dev_priv) < 5)
+ if (DISPLAY_VER(display) < 5)
dspcntr |= DISP_PIPE_SEL(crtc->pipe);
return dspcntr;
@@ -422,13 +421,13 @@ static void i9xx_plane_update_noarm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
- intel_de_write_fw(dev_priv, DSPSTRIDE(dev_priv, i9xx_plane),
+ intel_de_write_fw(display, DSPSTRIDE(display, i9xx_plane),
plane_state->view.color_plane[0].mapping_stride);
- if (DISPLAY_VER(dev_priv) < 4) {
+ if (DISPLAY_VER(display) < 4) {
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
int crtc_w = drm_rect_width(&plane_state->uapi.dst);
@@ -439,9 +438,9 @@ static void i9xx_plane_update_noarm(struct intel_dsb *dsb,
* generator but let's assume we still need to
* program whatever is there.
*/
- intel_de_write_fw(dev_priv, DSPPOS(dev_priv, i9xx_plane),
+ intel_de_write_fw(display, DSPPOS(display, i9xx_plane),
DISP_POS_Y(crtc_y) | DISP_POS_X(crtc_x));
- intel_de_write_fw(dev_priv, DSPSIZE(dev_priv, i9xx_plane),
+ intel_de_write_fw(display, DSPSIZE(display, i9xx_plane),
DISP_HEIGHT(crtc_h - 1) | DISP_WIDTH(crtc_w - 1));
}
}
@@ -451,7 +450,7 @@ static void i9xx_plane_update_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
int x = plane_state->view.color_plane[0].x;
int y = plane_state->view.color_plane[0].y;
@@ -466,32 +465,32 @@ static void i9xx_plane_update_arm(struct intel_dsb *dsb,
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
- if (DISPLAY_VER(dev_priv) >= 4)
+ if (DISPLAY_VER(display) >= 4)
dspaddr_offset = plane_state->view.color_plane[0].offset;
else
dspaddr_offset = linear_offset;
- if (IS_CHERRYVIEW(dev_priv) && i9xx_plane == PLANE_B) {
+ if (display->platform.cherryview && i9xx_plane == PLANE_B) {
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
int crtc_w = drm_rect_width(&plane_state->uapi.dst);
int crtc_h = drm_rect_height(&plane_state->uapi.dst);
- intel_de_write_fw(dev_priv, PRIMPOS(dev_priv, i9xx_plane),
+ intel_de_write_fw(display, PRIMPOS(display, i9xx_plane),
PRIM_POS_Y(crtc_y) | PRIM_POS_X(crtc_x));
- intel_de_write_fw(dev_priv, PRIMSIZE(dev_priv, i9xx_plane),
+ intel_de_write_fw(display, PRIMSIZE(display, i9xx_plane),
PRIM_HEIGHT(crtc_h - 1) | PRIM_WIDTH(crtc_w - 1));
- intel_de_write_fw(dev_priv,
- PRIMCNSTALPHA(dev_priv, i9xx_plane), 0);
+ intel_de_write_fw(display,
+ PRIMCNSTALPHA(display, i9xx_plane), 0);
}
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
- intel_de_write_fw(dev_priv, DSPOFFSET(dev_priv, i9xx_plane),
+ if (display->platform.haswell || display->platform.broadwell) {
+ intel_de_write_fw(display, DSPOFFSET(display, i9xx_plane),
DISP_OFFSET_Y(y) | DISP_OFFSET_X(x));
- } else if (DISPLAY_VER(dev_priv) >= 4) {
- intel_de_write_fw(dev_priv, DSPLINOFF(dev_priv, i9xx_plane),
+ } else if (DISPLAY_VER(display) >= 4) {
+ intel_de_write_fw(display, DSPLINOFF(display, i9xx_plane),
linear_offset);
- intel_de_write_fw(dev_priv, DSPTILEOFF(dev_priv, i9xx_plane),
+ intel_de_write_fw(display, DSPTILEOFF(display, i9xx_plane),
DISP_OFFSET_Y(y) | DISP_OFFSET_X(x));
}
@@ -500,13 +499,13 @@ static void i9xx_plane_update_arm(struct intel_dsb *dsb,
* disabled. Try to make the plane enable atomic by writing
* the control register just before the surface register.
*/
- intel_de_write_fw(dev_priv, DSPCNTR(dev_priv, i9xx_plane), dspcntr);
+ intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
- if (DISPLAY_VER(dev_priv) >= 4)
- intel_de_write_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane),
+ if (DISPLAY_VER(display) >= 4)
+ intel_de_write_fw(display, DSPSURF(display, i9xx_plane),
intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
else
- intel_de_write_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane),
+ intel_de_write_fw(display, DSPADDR(display, i9xx_plane),
intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
}
@@ -529,7 +528,7 @@ static void i9xx_plane_disable_arm(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
u32 dspcntr;
@@ -545,12 +544,12 @@ static void i9xx_plane_disable_arm(struct intel_dsb *dsb,
*/
dspcntr = i9xx_plane_ctl_crtc(crtc_state);
- intel_de_write_fw(dev_priv, DSPCNTR(dev_priv, i9xx_plane), dspcntr);
+ intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
- if (DISPLAY_VER(dev_priv) >= 4)
- intel_de_write_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane), 0);
+ if (DISPLAY_VER(display) >= 4)
+ intel_de_write_fw(display, DSPSURF(display, i9xx_plane), 0);
else
- intel_de_write_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane), 0);
+ intel_de_write_fw(display, DSPADDR(display, i9xx_plane), 0);
}
static void
@@ -560,7 +559,7 @@ g4x_primary_async_flip(struct intel_dsb *dsb,
const struct intel_plane_state *plane_state,
bool async_flip)
{
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
u32 dspcntr = plane_state->ctl | i9xx_plane_ctl_crtc(crtc_state);
u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
@@ -568,9 +567,9 @@ g4x_primary_async_flip(struct intel_dsb *dsb,
if (async_flip)
dspcntr |= DISP_ASYNC_FLIP;
- intel_de_write_fw(dev_priv, DSPCNTR(dev_priv, i9xx_plane), dspcntr);
+ intel_de_write_fw(display, DSPCNTR(display, i9xx_plane), dspcntr);
- intel_de_write_fw(dev_priv, DSPSURF(dev_priv, i9xx_plane),
+ intel_de_write_fw(display, DSPSURF(display, i9xx_plane),
intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
}
@@ -581,11 +580,11 @@ vlv_primary_async_flip(struct intel_dsb *dsb,
const struct intel_plane_state *plane_state,
bool async_flip)
{
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
- intel_de_write_fw(dev_priv, DSPADDR_VLV(dev_priv, i9xx_plane),
+ intel_de_write_fw(display, DSPADDR_VLV(display, i9xx_plane),
intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
}
@@ -682,7 +681,6 @@ static bool i9xx_plane_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
intel_wakeref_t wakeref;
@@ -699,11 +697,11 @@ static bool i9xx_plane_get_hw_state(struct intel_plane *plane,
if (!wakeref)
return false;
- val = intel_de_read(dev_priv, DSPCNTR(dev_priv, i9xx_plane));
+ val = intel_de_read(display, DSPCNTR(display, i9xx_plane));
ret = val & DISP_ENABLE;
- if (DISPLAY_VER(dev_priv) >= 5)
+ if (DISPLAY_VER(display) >= 5)
*pipe = plane->pipe;
else
*pipe = REG_FIELD_GET(DISP_PIPE_SEL_MASK, val);
@@ -853,9 +851,8 @@ static const struct drm_plane_funcs i8xx_plane_funcs = {
};
struct intel_plane *
-intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
+intel_primary_plane_create(struct intel_display *display, enum pipe pipe)
{
- struct intel_display *display = &dev_priv->display;
struct intel_plane *plane;
const struct drm_plane_funcs *plane_funcs;
unsigned int supported_rotations;
@@ -873,20 +870,20 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
* On gen2/3 only plane A can do FBC, but the panel fitter and LVDS
* port is hooked to pipe B. Hence we want plane A feeding pipe B.
*/
- if (HAS_FBC(dev_priv) && DISPLAY_VER(dev_priv) < 4 &&
- INTEL_NUM_PIPES(dev_priv) == 2)
+ if (HAS_FBC(display) && DISPLAY_VER(display) < 4 &&
+ INTEL_NUM_PIPES(display) == 2)
plane->i9xx_plane = (enum i9xx_plane_id) !pipe;
else
plane->i9xx_plane = (enum i9xx_plane_id) pipe;
plane->id = PLANE_PRIMARY;
plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane->id);
- intel_fbc_add_plane(i9xx_plane_fbc(dev_priv, plane->i9xx_plane), plane);
+ intel_fbc_add_plane(i9xx_plane_fbc(display, plane->i9xx_plane), plane);
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.valleyview || display->platform.cherryview) {
formats = vlv_primary_formats;
num_formats = ARRAY_SIZE(vlv_primary_formats);
- } else if (DISPLAY_VER(dev_priv) >= 4) {
+ } else if (DISPLAY_VER(display) >= 4) {
/*
* WaFP16GammaEnabling:ivb
* "Workaround : When using the 64-bit format, the plane
@@ -900,7 +897,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
* planes, so we choose not to expose fp16 on IVB primary
* planes. HSW primary planes no longer have this problem.
*/
- if (IS_IVYBRIDGE(dev_priv)) {
+ if (display->platform.ivybridge) {
formats = ivb_primary_formats;
num_formats = ARRAY_SIZE(ivb_primary_formats);
} else {
@@ -912,44 +909,44 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
num_formats = ARRAY_SIZE(i8xx_primary_formats);
}
- if (DISPLAY_VER(dev_priv) >= 4)
+ if (DISPLAY_VER(display) >= 4)
plane_funcs = &i965_plane_funcs;
else
plane_funcs = &i8xx_plane_funcs;
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ if (display->platform.valleyview || display->platform.cherryview)
plane->min_cdclk = vlv_plane_min_cdclk;
- else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
+ else if (display->platform.broadwell || display->platform.haswell)
plane->min_cdclk = hsw_plane_min_cdclk;
- else if (IS_IVYBRIDGE(dev_priv))
+ else if (display->platform.ivybridge)
plane->min_cdclk = ivb_plane_min_cdclk;
else
plane->min_cdclk = i9xx_plane_min_cdclk;
- if (HAS_GMCH(dev_priv)) {
- if (DISPLAY_VER(dev_priv) >= 4)
+ if (HAS_GMCH(display)) {
+ if (DISPLAY_VER(display) >= 4)
plane->max_stride = i965_plane_max_stride;
- else if (DISPLAY_VER(dev_priv) == 3)
+ else if (DISPLAY_VER(display) == 3)
plane->max_stride = i915_plane_max_stride;
else
plane->max_stride = i8xx_plane_max_stride;
} else {
- if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
+ if (display->platform.broadwell || display->platform.haswell)
plane->max_stride = hsw_primary_max_stride;
else
plane->max_stride = ilk_primary_max_stride;
}
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ if (display->platform.valleyview || display->platform.cherryview)
plane->min_alignment = vlv_plane_min_alignment;
- else if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
+ else if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
plane->min_alignment = g4x_primary_min_alignment;
- else if (DISPLAY_VER(dev_priv) == 4)
+ else if (DISPLAY_VER(display) == 4)
plane->min_alignment = i965_plane_min_alignment;
else
plane->min_alignment = i9xx_plane_min_alignment;
- if (IS_I830(dev_priv) || IS_I845G(dev_priv)) {
+ if (display->platform.i830 || display->platform.i845g) {
plane->update_arm = i830_plane_update_arm;
} else {
plane->update_noarm = i9xx_plane_update_noarm;
@@ -959,24 +956,24 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
plane->get_hw_state = i9xx_plane_get_hw_state;
plane->check_plane = i9xx_plane_check;
- if (HAS_ASYNC_FLIPS(dev_priv)) {
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ if (HAS_ASYNC_FLIPS(display)) {
+ if (display->platform.valleyview || display->platform.cherryview) {
plane->async_flip = vlv_primary_async_flip;
plane->enable_flip_done = vlv_primary_enable_flip_done;
plane->disable_flip_done = vlv_primary_disable_flip_done;
plane->can_async_flip = i9xx_plane_can_async_flip;
- } else if (IS_BROADWELL(dev_priv)) {
+ } else if (display->platform.broadwell) {
plane->need_async_flip_toggle_wa = true;
plane->async_flip = g4x_primary_async_flip;
plane->enable_flip_done = bdw_primary_enable_flip_done;
plane->disable_flip_done = bdw_primary_disable_flip_done;
plane->can_async_flip = i9xx_plane_can_async_flip;
- } else if (DISPLAY_VER(dev_priv) >= 7) {
+ } else if (DISPLAY_VER(display) >= 7) {
plane->async_flip = g4x_primary_async_flip;
plane->enable_flip_done = ivb_primary_enable_flip_done;
plane->disable_flip_done = ivb_primary_disable_flip_done;
plane->can_async_flip = i9xx_plane_can_async_flip;
- } else if (DISPLAY_VER(dev_priv) >= 5) {
+ } else if (DISPLAY_VER(display) >= 5) {
plane->async_flip = g4x_primary_async_flip;
plane->enable_flip_done = ilk_primary_enable_flip_done;
plane->disable_flip_done = ilk_primary_disable_flip_done;
@@ -986,15 +983,15 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_TILING_X);
- if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
- ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
+ if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
+ ret = drm_universal_plane_init(display->drm, &plane->base,
0, plane_funcs,
formats, num_formats,
modifiers,
DRM_PLANE_TYPE_PRIMARY,
"primary %c", pipe_name(pipe));
else
- ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
+ ret = drm_universal_plane_init(display->drm, &plane->base,
0, plane_funcs,
formats, num_formats,
modifiers,
@@ -1007,18 +1004,18 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
if (ret)
goto fail;
- if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
+ if (display->platform.cherryview && pipe == PIPE_B) {
supported_rotations =
DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180 |
DRM_MODE_REFLECT_X;
- } else if (DISPLAY_VER(dev_priv) >= 4) {
+ } else if (DISPLAY_VER(display) >= 4) {
supported_rotations =
DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180;
} else {
supported_rotations = DRM_MODE_ROTATE_0;
}
- if (DISPLAY_VER(dev_priv) >= 4)
+ if (DISPLAY_VER(display) >= 4)
drm_plane_create_rotation_property(&plane->base,
DRM_MODE_ROTATE_0,
supported_rotations);
@@ -1073,8 +1070,7 @@ void
i9xx_get_initial_plane_config(struct intel_crtc *crtc,
struct intel_initial_plane_config *plane_config)
{
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(crtc);
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
enum pipe pipe;
@@ -1087,21 +1083,21 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
if (!plane->get_hw_state(plane, &pipe))
return;
- drm_WARN_ON(dev, pipe != crtc->pipe);
+ drm_WARN_ON(display->drm, pipe != crtc->pipe);
intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL);
if (!intel_fb) {
- drm_dbg_kms(&dev_priv->drm, "failed to alloc fb\n");
+ drm_dbg_kms(display->drm, "failed to alloc fb\n");
return;
}
fb = &intel_fb->base;
- fb->dev = dev;
+ fb->dev = display->drm;
- val = intel_de_read(dev_priv, DSPCNTR(dev_priv, i9xx_plane));
+ val = intel_de_read(display, DSPCNTR(display, i9xx_plane));
- if (DISPLAY_VER(dev_priv) >= 4) {
+ if (DISPLAY_VER(display) >= 4) {
if (val & DISP_TILED) {
plane_config->tiling = I915_TILING_X;
fb->modifier = I915_FORMAT_MOD_X_TILED;
@@ -1111,46 +1107,46 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
plane_config->rotation = DRM_MODE_ROTATE_180;
}
- if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B &&
- val & DISP_MIRROR)
+ if (display->platform.cherryview &&
+ pipe == PIPE_B && val & DISP_MIRROR)
plane_config->rotation |= DRM_MODE_REFLECT_X;
pixel_format = val & DISP_FORMAT_MASK;
fourcc = i9xx_format_to_fourcc(pixel_format);
fb->format = drm_format_info(fourcc);
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
- offset = intel_de_read(dev_priv,
- DSPOFFSET(dev_priv, i9xx_plane));
- base = intel_de_read(dev_priv, DSPSURF(dev_priv, i9xx_plane)) & DISP_ADDR_MASK;
- } else if (DISPLAY_VER(dev_priv) >= 4) {
+ if (display->platform.haswell || display->platform.broadwell) {
+ offset = intel_de_read(display,
+ DSPOFFSET(display, i9xx_plane));
+ base = intel_de_read(display, DSPSURF(display, i9xx_plane)) & DISP_ADDR_MASK;
+ } else if (DISPLAY_VER(display) >= 4) {
if (plane_config->tiling)
- offset = intel_de_read(dev_priv,
- DSPTILEOFF(dev_priv, i9xx_plane));
+ offset = intel_de_read(display,
+ DSPTILEOFF(display, i9xx_plane));
else
- offset = intel_de_read(dev_priv,
- DSPLINOFF(dev_priv, i9xx_plane));
- base = intel_de_read(dev_priv, DSPSURF(dev_priv, i9xx_plane)) & DISP_ADDR_MASK;
+ offset = intel_de_read(display,
+ DSPLINOFF(display, i9xx_plane));
+ base = intel_de_read(display, DSPSURF(display, i9xx_plane)) & DISP_ADDR_MASK;
} else {
offset = 0;
- base = intel_de_read(dev_priv, DSPADDR(dev_priv, i9xx_plane));
+ base = intel_de_read(display, DSPADDR(display, i9xx_plane));
}
plane_config->base = base;
- drm_WARN_ON(&dev_priv->drm, offset != 0);
+ drm_WARN_ON(display->drm, offset != 0);
- val = intel_de_read(dev_priv, PIPESRC(dev_priv, pipe));
+ val = intel_de_read(display, PIPESRC(display, pipe));
fb->width = REG_FIELD_GET(PIPESRC_WIDTH_MASK, val) + 1;
fb->height = REG_FIELD_GET(PIPESRC_HEIGHT_MASK, val) + 1;
- val = intel_de_read(dev_priv, DSPSTRIDE(dev_priv, i9xx_plane));
+ val = intel_de_read(display, DSPSTRIDE(display, i9xx_plane));
fb->pitches[0] = val & 0xffffffc0;
aligned_height = intel_fb_align_height(fb, 0, fb->height);
plane_config->size = fb->pitches[0] * aligned_height;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
crtc->base.name, plane->base.name, fb->width, fb->height,
fb->format->cpp[0] * 8, base, fb->pitches[0],
@@ -1162,7 +1158,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
bool i9xx_fixup_initial_plane_config(struct intel_crtc *crtc,
const struct intel_initial_plane_config *plane_config)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
const struct intel_plane_state *plane_state =
to_intel_plane_state(plane->base.state);
@@ -1181,10 +1177,10 @@ bool i9xx_fixup_initial_plane_config(struct intel_crtc *crtc,
if (plane_config->base == base)
return false;
- if (DISPLAY_VER(dev_priv) >= 4)
- intel_de_write(dev_priv, DSPSURF(dev_priv, i9xx_plane), base);
+ if (DISPLAY_VER(display) >= 4)
+ intel_de_write(display, DSPSURF(display, i9xx_plane), base);
else
- intel_de_write(dev_priv, DSPADDR(dev_priv, i9xx_plane), base);
+ intel_de_write(display, DSPADDR(display, i9xx_plane), base);
return true;
}
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.h b/drivers/gpu/drm/i915/display/i9xx_plane.h
index 457f4bccf106..d90546d60855 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.h
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.h
@@ -10,8 +10,8 @@
enum pipe;
struct drm_framebuffer;
-struct drm_i915_private;
struct intel_crtc;
+struct intel_display;
struct intel_initial_plane_config;
struct intel_plane;
struct intel_plane_state;
@@ -26,7 +26,7 @@ unsigned int vlv_plane_min_alignment(struct intel_plane *plane,
int i9xx_check_plane_surface(struct intel_plane_state *plane_state);
struct intel_plane *
-intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe);
+intel_primary_plane_create(struct intel_display *display, enum pipe pipe);
void i9xx_get_initial_plane_config(struct intel_crtc *crtc,
struct intel_initial_plane_config *plane_config);
@@ -44,7 +44,7 @@ static inline int i9xx_check_plane_surface(struct intel_plane_state *plane_state
return 0;
}
static inline struct intel_plane *
-intel_primary_plane_create(struct drm_i915_private *dev_priv, int pipe)
+intel_primary_plane_create(struct intel_display *display, int pipe)
{
return NULL;
}
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 87e4a7a91f23..d17a08dfa0d6 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -321,7 +321,7 @@ int intel_crtc_init(struct intel_display *display, enum pipe pipe)
if (DISPLAY_VER(display) >= 9)
primary = skl_universal_plane_create(dev_priv, pipe, PLANE_1);
else
- primary = intel_primary_plane_create(dev_priv, pipe);
+ primary = intel_primary_plane_create(display, pipe);
if (IS_ERR(primary)) {
ret = PTR_ERR(primary);
goto fail;
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 07/11] drm/i915: Finish intel_sprite.c struct intel_display conversion
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (5 preceding siblings ...)
2025-01-24 16:30 ` [PATCH 06/11] drm/i915: Convert i9xx_plane.c to struct intel_display Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-24 16:30 ` [PATCH 08/11] drm/i915: Convert intel_cursor.c to struct intel_display Ville Syrjala
` (12 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
intel_sprite.c was partially converted to struct intel_display.
Finish the job now that we can deal with the platform checks
as well.
And while at it we also move the 'display' variable declaration
to be the first thing in most functions, consistency. We can
actually do that now since intel_display() accepts the intel_plane
and intel_plane_state types.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 91 +++++++++------------
drivers/gpu/drm/i915/display/intel_sprite.h | 6 +-
3 files changed, 43 insertions(+), 56 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index d17a08dfa0d6..33df07ae67f7 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -336,7 +336,7 @@ int intel_crtc_init(struct intel_display *display, enum pipe pipe)
if (DISPLAY_VER(dev_priv) >= 9)
plane = skl_universal_plane_create(dev_priv, pipe, PLANE_2 + sprite);
else
- plane = intel_sprite_plane_create(dev_priv, pipe, sprite);
+ plane = intel_sprite_plane_create(display, pipe, sprite);
if (IS_ERR(plane)) {
ret = PTR_ERR(plane);
goto fail;
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index abb54d7c9608..04743c9d89f9 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -66,8 +66,8 @@ static void i9xx_plane_linear_gamma(u16 gamma[8])
static void
chv_sprite_update_csc(const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct intel_display *display = to_intel_display(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
enum plane_id plane_id = plane->id;
/*
@@ -138,8 +138,8 @@ chv_sprite_update_csc(const struct intel_plane_state *plane_state)
static void
vlv_sprite_update_clrc(const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct intel_display *display = to_intel_display(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
@@ -341,8 +341,8 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
static void vlv_sprite_update_gamma(const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct intel_display *display = to_intel_display(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
@@ -368,7 +368,7 @@ vlv_sprite_update_noarm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
int crtc_x = plane_state->uapi.dst.x1;
@@ -390,8 +390,7 @@ vlv_sprite_update_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
@@ -404,7 +403,7 @@ vlv_sprite_update_arm(struct intel_dsb *dsb,
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
- if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B)
+ if (display->platform.cherryview && pipe == PIPE_B)
chv_sprite_update_csc(plane_state);
if (key->flags) {
@@ -440,7 +439,7 @@ vlv_sprite_disable_arm(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
@@ -645,19 +644,17 @@ static u32 ivb_sprite_ctl_crtc(const struct intel_crtc_state *crtc_state)
static bool ivb_need_sprite_gamma(const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
return fb->format->cpp[0] == 8 &&
- (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv));
+ (display->platform.ivybridge || display->platform.haswell);
}
static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
@@ -665,7 +662,7 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
sprctl = SPRITE_ENABLE;
- if (IS_IVYBRIDGE(dev_priv))
+ if (display->platform.ivybridge)
sprctl |= SPRITE_TRICKLE_FEED_DISABLE;
switch (fb->format->format) {
@@ -754,8 +751,8 @@ static void ivb_sprite_linear_gamma(const struct intel_plane_state *plane_state,
static void ivb_sprite_update_gamma(const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct intel_display *display = to_intel_display(plane->base.dev);
enum pipe pipe = plane->pipe;
u16 gamma[18];
int i;
@@ -787,8 +784,7 @@ ivb_sprite_update_noarm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
@@ -809,7 +805,7 @@ ivb_sprite_update_noarm(struct intel_dsb *dsb,
SPRITE_POS_Y(crtc_y) | SPRITE_POS_X(crtc_x));
intel_de_write_fw(display, SPRSIZE(pipe),
SPRITE_HEIGHT(crtc_h - 1) | SPRITE_WIDTH(crtc_w - 1));
- if (IS_IVYBRIDGE(dev_priv))
+ if (display->platform.ivybridge)
intel_de_write_fw(display, SPRSCALE(pipe), sprscale);
}
@@ -819,8 +815,7 @@ ivb_sprite_update_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
u32 sprsurf_offset = plane_state->view.color_plane[0].offset;
@@ -841,7 +836,7 @@ ivb_sprite_update_arm(struct intel_dsb *dsb,
/* HSW consolidates SPRTILEOFF and SPRLINOFF into a single SPROFFSET
* register */
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
+ if (display->platform.haswell || display->platform.broadwell) {
intel_de_write_fw(display, SPROFFSET(pipe),
SPRITE_OFFSET_Y(y) | SPRITE_OFFSET_X(x));
} else {
@@ -867,13 +862,12 @@ ivb_sprite_disable_arm(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
intel_de_write_fw(display, SPRCTL(pipe), 0);
/* Disable the scaler */
- if (IS_IVYBRIDGE(dev_priv))
+ if (display->platform.ivybridge)
intel_de_write_fw(display, SPRSCALE(pipe), 0);
intel_de_write_fw(display, SPRSURF(pipe), 0);
}
@@ -882,7 +876,7 @@ static bool
ivb_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
bool ret;
@@ -997,8 +991,7 @@ static u32 g4x_sprite_ctl_crtc(const struct intel_crtc_state *crtc_state)
static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
@@ -1006,7 +999,7 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
dvscntr = DVS_ENABLE;
- if (IS_SANDYBRIDGE(dev_priv))
+ if (display->platform.sandybridge)
dvscntr |= DVS_TRICKLE_FEED_DISABLE;
switch (fb->format->format) {
@@ -1067,8 +1060,8 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
static void g4x_sprite_update_gamma(const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct intel_display *display = to_intel_display(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
enum pipe pipe = plane->pipe;
u16 gamma[8];
@@ -1097,8 +1090,8 @@ static void ilk_sprite_linear_gamma(u16 gamma[17])
static void ilk_sprite_update_gamma(const struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct intel_display *display = to_intel_display(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
enum pipe pipe = plane->pipe;
u16 gamma[17];
@@ -1127,7 +1120,7 @@ g4x_sprite_update_noarm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
@@ -1157,8 +1150,7 @@ g4x_sprite_update_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
u32 dvssurf_offset = plane_state->view.color_plane[0].offset;
@@ -1190,7 +1182,7 @@ g4x_sprite_update_arm(struct intel_dsb *dsb,
intel_de_write_fw(display, DVSSURF(pipe),
intel_plane_ggtt_offset(plane_state) + dvssurf_offset);
- if (IS_G4X(dev_priv))
+ if (display->platform.g4x)
g4x_sprite_update_gamma(plane_state);
else
ilk_sprite_update_gamma(plane_state);
@@ -1201,7 +1193,7 @@ g4x_sprite_disable_arm(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
intel_de_write_fw(display, DVSCNTR(pipe), 0);
@@ -1214,7 +1206,7 @@ static bool
g4x_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
bool ret;
@@ -1254,7 +1246,7 @@ static int
g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
const struct drm_rect *src = &plane_state->uapi.src;
const struct drm_rect *dst = &plane_state->uapi.dst;
@@ -1320,9 +1312,7 @@ static int
g4x_sprite_check(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(crtc_state);
- struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane_state);
int min_scale = DRM_PLANE_NO_SCALING;
int max_scale = DRM_PLANE_NO_SCALING;
int ret;
@@ -1331,7 +1321,7 @@ g4x_sprite_check(struct intel_crtc_state *crtc_state,
if (DISPLAY_VER(display) < 7) {
min_scale = 1;
max_scale = 16 << 16;
- } else if (IS_IVYBRIDGE(dev_priv)) {
+ } else if (display->platform.ivybridge) {
min_scale = 1;
max_scale = 2 << 16;
}
@@ -1367,13 +1357,11 @@ g4x_sprite_check(struct intel_crtc_state *crtc_state,
int chv_plane_check_rotation(const struct intel_plane_state *plane_state)
{
- struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane_state);
unsigned int rotation = plane_state->hw.rotation;
/* CHV ignores the mirror bit when the rotate bit is set :( */
- if (IS_CHERRYVIEW(dev_priv) &&
+ if (display->platform.cherryview &&
rotation & DRM_MODE_ROTATE_180 &&
rotation & DRM_MODE_REFLECT_X) {
drm_dbg_kms(display->drm,
@@ -1575,10 +1563,9 @@ static const struct drm_plane_funcs vlv_sprite_funcs = {
};
struct intel_plane *
-intel_sprite_plane_create(struct drm_i915_private *dev_priv,
+intel_sprite_plane_create(struct intel_display *display,
enum pipe pipe, int sprite)
{
- struct intel_display *display = &dev_priv->display;
struct intel_plane *plane;
const struct drm_plane_funcs *plane_funcs;
unsigned int supported_rotations;
@@ -1591,7 +1578,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
if (IS_ERR(plane))
return plane;
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.valleyview || display->platform.cherryview) {
plane->update_noarm = vlv_sprite_update_noarm;
plane->update_arm = vlv_sprite_update_arm;
plane->disable_arm = vlv_sprite_disable_arm;
@@ -1601,7 +1588,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
plane->min_alignment = vlv_plane_min_alignment;
plane->min_cdclk = vlv_plane_min_cdclk;
- if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
+ if (display->platform.cherryview && pipe == PIPE_B) {
formats = chv_pipe_b_sprite_formats;
num_formats = ARRAY_SIZE(chv_pipe_b_sprite_formats);
} else {
@@ -1617,7 +1604,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
plane->get_hw_state = ivb_sprite_get_hw_state;
plane->check_plane = g4x_sprite_check;
- if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
+ if (display->platform.broadwell || display->platform.haswell) {
plane->max_stride = hsw_sprite_max_stride;
plane->min_cdclk = hsw_plane_min_cdclk;
} else {
@@ -1641,7 +1628,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
plane->min_alignment = g4x_sprite_min_alignment;
plane->min_cdclk = g4x_sprite_min_cdclk;
- if (IS_SANDYBRIDGE(dev_priv)) {
+ if (display->platform.sandybridge) {
formats = snb_sprite_formats;
num_formats = ARRAY_SIZE(snb_sprite_formats);
@@ -1654,7 +1641,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
}
}
- if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
+ if (display->platform.cherryview && pipe == PIPE_B) {
supported_rotations =
DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180 |
DRM_MODE_REFLECT_X;
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.h b/drivers/gpu/drm/i915/display/intel_sprite.h
index 531079979c05..c33a2808da8c 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.h
+++ b/drivers/gpu/drm/i915/display/intel_sprite.h
@@ -8,13 +8,13 @@
#include <linux/types.h>
-struct drm_i915_private;
struct intel_crtc_state;
+struct intel_display;
struct intel_plane_state;
enum pipe;
#ifdef I915
-struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
+struct intel_plane *intel_sprite_plane_create(struct intel_display *display,
enum pipe pipe, int plane);
int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);
int chv_plane_check_rotation(const struct intel_plane_state *plane_state);
@@ -26,7 +26,7 @@ int hsw_plane_min_cdclk(const struct intel_crtc_state *crtc_state,
int vlv_plane_min_cdclk(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state);
#else
-static inline struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
+static inline struct intel_plane *intel_sprite_plane_create(struct intel_display *display,
int pipe, int plane)
{
return NULL;
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 08/11] drm/i915: Convert intel_cursor.c to struct intel_display
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (6 preceding siblings ...)
2025-01-24 16:30 ` [PATCH 07/11] drm/i915: Finish intel_sprite.c struct intel_display conversion Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-24 16:30 ` [PATCH 09/11] drm/i915: Convert skl_univeral_plane.c " Ville Syrjala
` (11 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
struct intel_display will replace struct drm_i915_private as
the main thing for display code. Convert the cursor code to
use it.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
drivers/gpu/drm/i915/display/intel_cursor.c | 136 +++++++++-----------
drivers/gpu/drm/i915/display/intel_cursor.h | 4 +-
3 files changed, 66 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 33df07ae67f7..d0b3a99a76c3 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -344,7 +344,7 @@ int intel_crtc_init(struct intel_display *display, enum pipe pipe)
crtc->plane_ids_mask |= BIT(plane->id);
}
- cursor = intel_cursor_plane_create(dev_priv, pipe);
+ cursor = intel_cursor_plane_create(display, pipe);
if (IS_ERR(cursor)) {
ret = PTR_ERR(cursor);
goto fail;
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index fe6cfd9eee06..5dd0545b6b3d 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -35,11 +35,10 @@ static const u32 intel_cursor_formats[] = {
static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
u32 base;
- if (DISPLAY_INFO(dev_priv)->cursor_needs_physical)
+ if (DISPLAY_INFO(display)->cursor_needs_physical)
base = plane_state->phys_dma_addr;
else
base = intel_plane_ggtt_offset(plane_state);
@@ -92,8 +91,7 @@ static bool intel_cursor_size_ok(const struct intel_plane_state *plane_state)
static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
unsigned int rotation = plane_state->hw.rotation;
int src_x, src_y;
u32 offset;
@@ -114,7 +112,7 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
plane_state, 0);
if (src_x != 0 || src_y != 0) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Arbitrary cursor panning not supported\n");
return -EINVAL;
}
@@ -127,7 +125,7 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
src_x << 16, src_y << 16);
/* ILK+ do this automagically in hardware */
- if (HAS_GMCH(dev_priv) && rotation & DRM_MODE_ROTATE_180) {
+ if (HAS_GMCH(display) && rotation & DRM_MODE_ROTATE_180) {
const struct drm_framebuffer *fb = plane_state->hw.fb;
int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
@@ -145,14 +143,14 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
static int intel_check_cursor(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
- struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
const struct drm_rect src = plane_state->uapi.src;
const struct drm_rect dst = plane_state->uapi.dst;
int ret;
if (fb && fb->modifier != DRM_FORMAT_MOD_LINEAR) {
- drm_dbg_kms(&i915->drm, "cursor cannot be tiled\n");
+ drm_dbg_kms(display->drm, "cursor cannot be tiled\n");
return -EINVAL;
}
@@ -233,8 +231,8 @@ static bool i845_cursor_size_ok(const struct intel_plane_state *plane_state)
static int i845_check_cursor(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
- struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
int ret;
ret = intel_check_cursor(crtc_state, plane_state);
@@ -247,14 +245,14 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
/* Check for which cursor types we support */
if (!i845_cursor_size_ok(plane_state)) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Cursor dimension %dx%d not supported\n",
drm_rect_width(&plane_state->uapi.dst),
drm_rect_height(&plane_state->uapi.dst));
return -EINVAL;
}
- drm_WARN_ON(&i915->drm, plane_state->uapi.visible &&
+ drm_WARN_ON(display->drm, plane_state->uapi.visible &&
plane_state->view.color_plane[0].mapping_stride != fb->pitches[0]);
switch (fb->pitches[0]) {
@@ -264,7 +262,7 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
case 2048:
break;
default:
- drm_dbg_kms(&i915->drm, "Invalid cursor stride (%u)\n",
+ drm_dbg_kms(display->drm, "Invalid cursor stride (%u)\n",
fb->pitches[0]);
return -EINVAL;
}
@@ -280,7 +278,7 @@ static void i845_cursor_update_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
u32 cntl = 0, base = 0, pos = 0, size = 0;
if (plane_state && plane_state->uapi.visible) {
@@ -302,17 +300,17 @@ static void i845_cursor_update_arm(struct intel_dsb *dsb,
if (plane->cursor.base != base ||
plane->cursor.size != size ||
plane->cursor.cntl != cntl) {
- intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);
- intel_de_write_fw(dev_priv, CURBASE(dev_priv, PIPE_A), base);
- intel_de_write_fw(dev_priv, CURSIZE(dev_priv, PIPE_A), size);
- intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
- intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);
+ intel_de_write_fw(display, CURCNTR(display, PIPE_A), 0);
+ intel_de_write_fw(display, CURBASE(display, PIPE_A), base);
+ intel_de_write_fw(display, CURSIZE(display, PIPE_A), size);
+ intel_de_write_fw(display, CURPOS(display, PIPE_A), pos);
+ intel_de_write_fw(display, CURCNTR(display, PIPE_A), cntl);
plane->cursor.base = base;
plane->cursor.size = size;
plane->cursor.cntl = cntl;
} else {
- intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
+ intel_de_write_fw(display, CURPOS(display, PIPE_A), pos);
}
}
@@ -327,7 +325,6 @@ static bool i845_cursor_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
bool ret;
@@ -337,7 +334,7 @@ static bool i845_cursor_get_hw_state(struct intel_plane *plane,
if (!wakeref)
return false;
- ret = intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_A)) & CURSOR_ENABLE;
+ ret = intel_de_read(display, CURCNTR(display, PIPE_A)) & CURSOR_ENABLE;
*pipe = PIPE_A;
@@ -378,11 +375,11 @@ static unsigned int i9xx_cursor_min_alignment(struct intel_plane *plane,
static u32 i9xx_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
u32 cntl = 0;
- if (DISPLAY_VER(dev_priv) >= 11)
+ if (DISPLAY_VER(display) >= 11)
return cntl;
if (crtc_state->gamma_enable)
@@ -391,7 +388,7 @@ static u32 i9xx_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state)
if (crtc_state->csc_enable)
cntl |= MCURSOR_PIPE_CSC_ENABLE;
- if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
+ if (DISPLAY_VER(display) < 5 && !display->platform.g4x)
cntl |= MCURSOR_PIPE_SEL(crtc->pipe);
return cntl;
@@ -400,11 +397,10 @@ static u32 i9xx_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state)
static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
u32 cntl = 0;
- if (IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv))
+ if (display->platform.sandybridge || display->platform.ivybridge)
cntl |= MCURSOR_TRICKLE_FEED_DISABLE;
switch (drm_rect_width(&plane_state->uapi.dst)) {
@@ -426,7 +422,7 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
cntl |= MCURSOR_ROTATE_180;
/* Wa_22012358565:adl-p */
- if (DISPLAY_VER(dev_priv) == 13)
+ if (DISPLAY_VER(display) == 13)
cntl |= MCURSOR_ARB_SLOTS(1);
return cntl;
@@ -434,8 +430,7 @@ static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
static bool i9xx_cursor_size_ok(const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
int width = drm_rect_width(&plane_state->uapi.dst);
int height = drm_rect_height(&plane_state->uapi.dst);
@@ -458,7 +453,7 @@ static bool i9xx_cursor_size_ok(const struct intel_plane_state *plane_state)
* cursor is not rotated. Everything else requires square
* cursors.
*/
- if (HAS_CUR_FBC(dev_priv) &&
+ if (HAS_CUR_FBC(display) &&
plane_state->hw.rotation & DRM_MODE_ROTATE_0) {
if (height < 8 || height > width)
return false;
@@ -473,8 +468,8 @@ static bool i9xx_cursor_size_ok(const struct intel_plane_state *plane_state)
static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
enum pipe pipe = plane->pipe;
int ret;
@@ -489,19 +484,19 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
/* Check for which cursor types we support */
if (!i9xx_cursor_size_ok(plane_state)) {
- drm_dbg(&dev_priv->drm,
+ drm_dbg(display->drm,
"Cursor dimension %dx%d not supported\n",
drm_rect_width(&plane_state->uapi.dst),
drm_rect_height(&plane_state->uapi.dst));
return -EINVAL;
}
- drm_WARN_ON(&dev_priv->drm, plane_state->uapi.visible &&
+ drm_WARN_ON(display->drm, plane_state->uapi.visible &&
plane_state->view.color_plane[0].mapping_stride != fb->pitches[0]);
if (fb->pitches[0] !=
drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Invalid cursor stride (%u) (cursor width %d)\n",
fb->pitches[0],
drm_rect_width(&plane_state->uapi.dst));
@@ -518,9 +513,9 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
* display power well must be turned off and on again.
* Refuse the put the cursor into that compromised position.
*/
- if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_C &&
+ if (display->platform.cherryview && pipe == PIPE_C &&
plane_state->uapi.visible && plane_state->uapi.dst.x1 < 0) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"CHV cursor C not allowed to straddle the left screen edge\n");
return -EINVAL;
}
@@ -534,7 +529,7 @@ static void i9xx_cursor_disable_sel_fetch_arm(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
if (!crtc_state->enable_psr2_sel_fetch)
@@ -548,8 +543,7 @@ static void wa_16021440873(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
u32 ctl = plane_state->ctl;
int et_y_position = drm_rect_height(&crtc_state->pipe_src) + 1;
enum pipe pipe = plane->pipe;
@@ -559,7 +553,7 @@ static void wa_16021440873(struct intel_dsb *dsb,
intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), ctl);
- intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(dev_priv, pipe),
+ intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe),
CURSOR_POS_Y(et_y_position));
}
@@ -568,8 +562,7 @@ static void i9xx_cursor_update_sel_fetch_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
if (!crtc_state->enable_psr2_sel_fetch)
@@ -580,7 +573,7 @@ static void i9xx_cursor_update_sel_fetch_arm(struct intel_dsb *dsb,
u32 val = intel_cursor_position(crtc_state, plane_state,
true);
- intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(dev_priv, pipe), val);
+ intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe), val);
}
intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), plane_state->ctl);
@@ -654,8 +647,7 @@ static void i9xx_cursor_update_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
u32 cntl = 0, base = 0, pos = 0, fbc_ctl = 0;
@@ -693,7 +685,7 @@ static void i9xx_cursor_update_arm(struct intel_dsb *dsb,
* the CURCNTR write arms the update.
*/
- if (DISPLAY_VER(dev_priv) >= 9)
+ if (DISPLAY_VER(display) >= 9)
skl_write_cursor_wm(dsb, plane, crtc_state);
if (plane_state)
@@ -704,18 +696,18 @@ static void i9xx_cursor_update_arm(struct intel_dsb *dsb,
if (plane->cursor.base != base ||
plane->cursor.size != fbc_ctl ||
plane->cursor.cntl != cntl) {
- if (HAS_CUR_FBC(dev_priv))
- intel_de_write_dsb(display, dsb, CUR_FBC_CTL(dev_priv, pipe), fbc_ctl);
- intel_de_write_dsb(display, dsb, CURCNTR(dev_priv, pipe), cntl);
- intel_de_write_dsb(display, dsb, CURPOS(dev_priv, pipe), pos);
- intel_de_write_dsb(display, dsb, CURBASE(dev_priv, pipe), base);
+ if (HAS_CUR_FBC(display))
+ intel_de_write_dsb(display, dsb, CUR_FBC_CTL(display, pipe), fbc_ctl);
+ intel_de_write_dsb(display, dsb, CURCNTR(display, pipe), cntl);
+ intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);
+ intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);
plane->cursor.base = base;
plane->cursor.size = fbc_ctl;
plane->cursor.cntl = cntl;
} else {
- intel_de_write_dsb(display, dsb, CURPOS(dev_priv, pipe), pos);
- intel_de_write_dsb(display, dsb, CURBASE(dev_priv, pipe), base);
+ intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);
+ intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);
}
}
@@ -730,7 +722,6 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
bool ret;
@@ -746,11 +737,11 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
if (!wakeref)
return false;
- val = intel_de_read(dev_priv, CURCNTR(dev_priv, plane->pipe));
+ val = intel_de_read(display, CURCNTR(display, plane->pipe));
ret = val & MCURSOR_MODE_MASK;
- if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
+ if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
*pipe = plane->pipe;
else
*pipe = REG_FIELD_GET(MCURSOR_PIPE_SEL_MASK, val);
@@ -792,7 +783,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
{
struct intel_plane *plane = to_intel_plane(_plane);
struct intel_crtc *crtc = to_intel_crtc(_crtc);
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
struct intel_plane_state *old_plane_state =
to_intel_plane_state(plane->base.state);
struct intel_plane_state *new_plane_state;
@@ -896,7 +887,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
intel_psr_lock(crtc_state);
- if (!drm_WARN_ON(&i915->drm, drm_crtc_vblank_get(&crtc->base))) {
+ if (!drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base))) {
/*
* TODO: maybe check if we're still in PSR
* and skip the vblank evasion entirely?
@@ -962,8 +953,8 @@ static const struct drm_plane_funcs intel_cursor_plane_funcs = {
static void intel_cursor_add_size_hints_property(struct intel_plane *plane)
{
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
- const struct drm_mode_config *config = &i915->drm.mode_config;
+ struct intel_display *display = to_intel_display(plane);
+ const struct drm_mode_config *config = &display->drm->mode_config;
struct drm_plane_size_hint hints[4];
int size, max_size, num_hints = 0;
@@ -971,7 +962,7 @@ static void intel_cursor_add_size_hints_property(struct intel_plane *plane)
/* for simplicity only enumerate the supported square+POT sizes */
for (size = 64; size <= max_size; size *= 2) {
- if (drm_WARN_ON(&i915->drm, num_hints >= ARRAY_SIZE(hints)))
+ if (drm_WARN_ON(display->drm, num_hints >= ARRAY_SIZE(hints)))
break;
hints[num_hints].width = size;
@@ -983,10 +974,9 @@ static void intel_cursor_add_size_hints_property(struct intel_plane *plane)
}
struct intel_plane *
-intel_cursor_plane_create(struct drm_i915_private *dev_priv,
+intel_cursor_plane_create(struct intel_display *display,
enum pipe pipe)
{
- struct intel_display *display = &dev_priv->display;
struct intel_plane *cursor;
int ret, zpos;
u64 *modifiers;
@@ -1000,7 +990,7 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
cursor->id = PLANE_CURSOR;
cursor->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, cursor->id);
- if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) {
+ if (display->platform.i845g || display->platform.i865g) {
cursor->max_stride = i845_cursor_max_stride;
cursor->min_alignment = i845_cursor_min_alignment;
cursor->update_arm = i845_cursor_update_arm;
@@ -1010,9 +1000,9 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
} else {
cursor->max_stride = i9xx_cursor_max_stride;
- if (IS_I830(dev_priv))
+ if (display->platform.i830)
cursor->min_alignment = i830_cursor_min_alignment;
- else if (IS_I85X(dev_priv))
+ else if (display->platform.i85x)
cursor->min_alignment = i85x_cursor_min_alignment;
else
cursor->min_alignment = i9xx_cursor_min_alignment;
@@ -1026,12 +1016,12 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
cursor->cursor.base = ~0;
cursor->cursor.cntl = ~0;
- if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
+ if (display->platform.i845g || display->platform.i865g || HAS_CUR_FBC(display))
cursor->cursor.size = ~0;
modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_NONE);
- ret = drm_universal_plane_init(&dev_priv->drm, &cursor->base,
+ ret = drm_universal_plane_init(display->drm, &cursor->base,
0, &intel_cursor_plane_funcs,
intel_cursor_formats,
ARRAY_SIZE(intel_cursor_formats),
@@ -1044,7 +1034,7 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
if (ret)
goto fail;
- if (DISPLAY_VER(dev_priv) >= 4)
+ if (DISPLAY_VER(display) >= 4)
drm_plane_create_rotation_property(&cursor->base,
DRM_MODE_ROTATE_0,
DRM_MODE_ROTATE_0 |
@@ -1052,10 +1042,10 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
intel_cursor_add_size_hints_property(cursor);
- zpos = DISPLAY_RUNTIME_INFO(dev_priv)->num_sprites[pipe] + 1;
+ zpos = DISPLAY_RUNTIME_INFO(display)->num_sprites[pipe] + 1;
drm_plane_create_zpos_immutable_property(&cursor->base, zpos);
- if (DISPLAY_VER(dev_priv) >= 12)
+ if (DISPLAY_VER(display) >= 12)
drm_plane_enable_fb_damage_clips(&cursor->base);
intel_plane_helper_add(cursor);
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.h b/drivers/gpu/drm/i915/display/intel_cursor.h
index e2d9ec710a86..65a9e7eb88c2 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.h
+++ b/drivers/gpu/drm/i915/display/intel_cursor.h
@@ -7,12 +7,12 @@
#define _INTEL_CURSOR_H_
enum pipe;
-struct drm_i915_private;
+struct intel_display;
struct intel_plane;
struct kthread_work;
struct intel_plane *
-intel_cursor_plane_create(struct drm_i915_private *dev_priv,
+intel_cursor_plane_create(struct intel_display *display,
enum pipe pipe);
void intel_cursor_unpin_work(struct kthread_work *base);
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 09/11] drm/i915: Convert skl_univeral_plane.c to struct intel_display
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (7 preceding siblings ...)
2025-01-24 16:30 ` [PATCH 08/11] drm/i915: Convert intel_cursor.c to struct intel_display Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-24 16:30 ` [PATCH 10/11] drm/i915: Use DRM_RECT_FMT & co. for plane debugs Ville Syrjala
` (10 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
struct intel_display will replace struct drm_i915_private as
the main thing for display code. Convert the skl+ universal plane
code to use it.
Note that we still have two straggles in the form on
HAS_FLAT_CCS() and the pxp stuff.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_crtc.c | 4 +-
drivers/gpu/drm/i915/display/intel_display.c | 5 +-
drivers/gpu/drm/i915/display/skl_scaler.c | 13 +-
.../drm/i915/display/skl_universal_plane.c | 358 +++++++++---------
.../drm/i915/display/skl_universal_plane.h | 8 +-
5 files changed, 188 insertions(+), 200 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index d0b3a99a76c3..987cb4a162ed 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -319,7 +319,7 @@ int intel_crtc_init(struct intel_display *display, enum pipe pipe)
crtc->num_scalers = DISPLAY_RUNTIME_INFO(display)->num_scalers[pipe];
if (DISPLAY_VER(display) >= 9)
- primary = skl_universal_plane_create(dev_priv, pipe, PLANE_1);
+ primary = skl_universal_plane_create(display, pipe, PLANE_1);
else
primary = intel_primary_plane_create(display, pipe);
if (IS_ERR(primary)) {
@@ -334,7 +334,7 @@ int intel_crtc_init(struct intel_display *display, enum pipe pipe)
struct intel_plane *plane;
if (DISPLAY_VER(dev_priv) >= 9)
- plane = skl_universal_plane_create(dev_priv, pipe, PLANE_2 + sprite);
+ plane = skl_universal_plane_create(display, pipe, PLANE_2 + sprite);
else
plane = intel_sprite_plane_create(display, pipe, sprite);
if (IS_ERR(plane)) {
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 466997946e71..d4a6e9f78d8b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4438,6 +4438,7 @@ static int icl_add_linked_planes(struct intel_atomic_state *state)
static int icl_check_nv12_planes(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(state);
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
@@ -4479,7 +4480,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state,
continue;
for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, linked) {
- if (!icl_is_nv12_y_plane(dev_priv, linked->id))
+ if (!icl_is_nv12_y_plane(display, linked->id))
continue;
if (crtc_state->active_planes & BIT(linked->id))
@@ -4524,7 +4525,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state,
linked_state->uapi.src = plane_state->uapi.src;
linked_state->uapi.dst = plane_state->uapi.dst;
- if (icl_is_hdr_plane(dev_priv, plane->id)) {
+ if (icl_is_hdr_plane(display, plane->id)) {
if (linked->id == PLANE_7)
plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL;
else if (linked->id == PLANE_6)
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index c8bf6fd92ce8..3d24fa773094 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -279,14 +279,14 @@ int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
struct drm_framebuffer *fb = plane_state->hw.fb;
bool force_detach = !fb || !plane_state->uapi.visible;
bool need_scaler = false;
/* Pre-gen11 and SDR planes always need a scaler for planar formats. */
- if (!icl_is_hdr_plane(dev_priv, plane->id) &&
+ if (!icl_is_hdr_plane(display, plane->id) &&
fb && intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
need_scaler = true;
@@ -364,9 +364,7 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state,
int *scaler_id)
{
struct intel_display *display = to_intel_display(crtc);
- struct intel_crtc_scaler_state *scaler_state =
- &crtc_state->scaler_state;
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
u32 mode;
int hscale = 0;
int vscale = 0;
@@ -386,7 +384,7 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state,
if (DISPLAY_VER(display) == 9) {
mode = SKL_PS_SCALER_MODE_NV12;
- } else if (icl_is_hdr_plane(dev_priv, plane->id)) {
+ } else if (icl_is_hdr_plane(display, plane->id)) {
/*
* On gen11+'s HDR planes we only use the scaler for
* scaling. They have a dedicated chroma upsampler, so
@@ -782,7 +780,6 @@ skl_program_plane_scaler(struct intel_plane *plane,
const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
enum pipe pipe = plane->pipe;
int scaler_id = plane_state->scaler_id;
@@ -806,7 +803,7 @@ skl_program_plane_scaler(struct intel_plane *plane,
/* TODO: handle sub-pixel coordinates */
if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
- !icl_is_hdr_plane(dev_priv, plane->id)) {
+ !icl_is_hdr_plane(display, plane->id)) {
y_hphase = skl_scaler_calc_phase(1, hscale, false);
y_vphase = skl_scaler_calc_phase(1, vscale, false);
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 24dbad253443..9c29cb26bf7c 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -237,21 +237,19 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
}
}
-static u8 icl_nv12_y_plane_mask(struct drm_i915_private *i915)
+static u8 icl_nv12_y_plane_mask(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
-
if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
return BIT(PLANE_4) | BIT(PLANE_5);
else
return BIT(PLANE_6) | BIT(PLANE_7);
}
-bool icl_is_nv12_y_plane(struct drm_i915_private *dev_priv,
+bool icl_is_nv12_y_plane(struct intel_display *display,
enum plane_id plane_id)
{
- return DISPLAY_VER(dev_priv) >= 11 &&
- icl_nv12_y_plane_mask(dev_priv) & BIT(plane_id);
+ return DISPLAY_VER(display) >= 11 &&
+ icl_nv12_y_plane_mask(display) & BIT(plane_id);
}
u8 icl_hdr_plane_mask(void)
@@ -259,9 +257,9 @@ u8 icl_hdr_plane_mask(void)
return BIT(PLANE_1) | BIT(PLANE_2) | BIT(PLANE_3);
}
-bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id)
+bool icl_is_hdr_plane(struct intel_display *display, enum plane_id plane_id)
{
- return DISPLAY_VER(dev_priv) >= 11 &&
+ return DISPLAY_VER(display) >= 11 &&
icl_hdr_plane_mask() & BIT(plane_id);
}
@@ -593,7 +591,7 @@ static u32 tgl_plane_min_alignment(struct intel_plane *plane,
const struct drm_framebuffer *fb,
int color_plane)
{
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
/* PLANE_SURF GGTT -> DPT alignment */
int mult = intel_fb_uses_dpt(fb) ? 512 : 1;
@@ -606,7 +604,7 @@ static u32 tgl_plane_min_alignment(struct intel_plane *plane,
* flips unless we align to 16k at least.
* Figure out what's going on here...
*/
- if (IS_ALDERLAKE_P(i915) &&
+ if (display->platform.alderlake_p &&
intel_plane_can_async_flip(plane, fb->modifier))
return mult * 16 * 1024;
@@ -684,7 +682,7 @@ icl_program_input_csc(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
@@ -829,7 +827,7 @@ static void skl_write_plane_wm(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
@@ -875,7 +873,7 @@ skl_plane_disable_arm(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
@@ -889,7 +887,7 @@ static void icl_plane_disable_sel_fetch_arm(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
if (!crtc_state->enable_psr2_sel_fetch)
@@ -903,12 +901,11 @@ icl_plane_disable_arm(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
- if (icl_is_hdr_plane(dev_priv, plane_id))
+ if (icl_is_hdr_plane(display, plane_id))
intel_de_write_dsb(display, dsb, PLANE_CUS_CTL(pipe, plane_id), 0);
skl_write_plane_wm(dsb, plane, crtc_state);
@@ -923,7 +920,6 @@ skl_plane_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum intel_display_power_domain power_domain;
enum plane_id plane_id = plane->id;
intel_wakeref_t wakeref;
@@ -934,7 +930,7 @@ skl_plane_get_hw_state(struct intel_plane *plane,
if (!wakeref)
return false;
- ret = intel_de_read(dev_priv, PLANE_CTL(plane->pipe, plane_id)) & PLANE_CTL_ENABLE;
+ ret = intel_de_read(display, PLANE_CTL(plane->pipe, plane_id)) & PLANE_CTL_ENABLE;
*pipe = plane->pipe;
@@ -1155,10 +1151,10 @@ static u32 adlp_plane_ctl_arb_slots(const struct intel_plane_state *plane_state)
static u32 skl_plane_ctl_crtc(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
u32 plane_ctl = 0;
- if (DISPLAY_VER(dev_priv) >= 10)
+ if (DISPLAY_VER(display) >= 10)
return plane_ctl;
if (crtc_state->gamma_enable)
@@ -1173,8 +1169,7 @@ static u32 skl_plane_ctl_crtc(const struct intel_crtc_state *crtc_state)
static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
@@ -1182,7 +1177,7 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
plane_ctl = PLANE_CTL_ENABLE;
- if (DISPLAY_VER(dev_priv) < 10) {
+ if (DISPLAY_VER(display) < 10) {
plane_ctl |= skl_plane_ctl_alpha(plane_state);
plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE;
@@ -1197,7 +1192,7 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
plane_ctl |= skl_plane_ctl_tiling(fb->modifier);
plane_ctl |= skl_plane_ctl_rotate(rotation & DRM_MODE_ROTATE_MASK);
- if (DISPLAY_VER(dev_priv) >= 11)
+ if (DISPLAY_VER(display) >= 11)
plane_ctl |= icl_plane_ctl_flip(rotation &
DRM_MODE_REFLECT_MASK);
@@ -1207,7 +1202,7 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
plane_ctl |= PLANE_CTL_KEY_ENABLE_SOURCE;
/* Wa_22012358565:adl-p */
- if (DISPLAY_VER(dev_priv) == 13)
+ if (DISPLAY_VER(display) == 13)
plane_ctl |= adlp_plane_ctl_arb_slots(plane_state);
return plane_ctl;
@@ -1215,10 +1210,10 @@ static u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
u32 plane_color_ctl = 0;
- if (DISPLAY_VER(dev_priv) >= 11)
+ if (DISPLAY_VER(display) >= 11)
return plane_color_ctl;
if (crtc_state->gamma_enable)
@@ -1233,8 +1228,7 @@ static u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state)
static u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
u32 plane_color_ctl = 0;
@@ -1242,7 +1236,7 @@ static u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
- if (fb->format->is_yuv && !icl_is_hdr_plane(dev_priv, plane->id)) {
+ if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {
switch (plane_state->hw.color_encoding) {
case DRM_COLOR_YCBCR_BT709:
plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
@@ -1272,7 +1266,7 @@ static u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
static u32 skl_surf_address(const struct intel_plane_state *plane_state,
int color_plane)
{
- struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
u32 offset = plane_state->view.color_plane[color_plane].offset;
@@ -1281,12 +1275,12 @@ static u32 skl_surf_address(const struct intel_plane_state *plane_state,
* The DPT object contains only one vma, so the VMA's offset
* within the DPT is always 0.
*/
- drm_WARN_ON(&i915->drm, plane_state->dpt_vma &&
+ drm_WARN_ON(display->drm, plane_state->dpt_vma &&
intel_dpt_offset(plane_state->dpt_vma));
- drm_WARN_ON(&i915->drm, offset & 0x1fffff);
+ drm_WARN_ON(display->drm, offset & 0x1fffff);
return offset >> 9;
} else {
- drm_WARN_ON(&i915->drm, offset & 0xfff);
+ drm_WARN_ON(display->drm, offset & 0xfff);
return offset;
}
}
@@ -1308,7 +1302,7 @@ static u32 skl_plane_surf(const struct intel_plane_state *plane_state,
u32 skl_plane_aux_dist(const struct intel_plane_state *plane_state,
int color_plane)
{
- struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int aux_plane = skl_main_to_aux_plane(fb, color_plane);
u32 aux_dist;
@@ -1319,7 +1313,7 @@ u32 skl_plane_aux_dist(const struct intel_plane_state *plane_state,
aux_dist = skl_surf_address(plane_state, aux_plane) -
skl_surf_address(plane_state, color_plane);
- if (DISPLAY_VER(i915) < 12)
+ if (DISPLAY_VER(display) < 12)
aux_dist |= PLANE_AUX_STRIDE(skl_plane_stride(plane_state, aux_plane));
return aux_dist;
@@ -1357,7 +1351,7 @@ static void icl_plane_csc_load_black(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
@@ -1394,7 +1388,7 @@ skl_plane_update_noarm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
u32 stride = skl_plane_stride(plane_state, 0);
@@ -1425,8 +1419,7 @@ skl_plane_update_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
u32 x = plane_state->view.color_plane[0].x;
@@ -1441,7 +1434,7 @@ skl_plane_update_arm(struct intel_dsb *dsb,
crtc_state->async_flip_planes & BIT(plane->id))
plane_ctl |= PLANE_CTL_ASYNC_FLIP;
- if (DISPLAY_VER(dev_priv) >= 10)
+ if (DISPLAY_VER(display) >= 10)
plane_color_ctl = plane_state->color_ctl |
glk_plane_color_ctl_crtc(crtc_state);
@@ -1462,7 +1455,7 @@ skl_plane_update_arm(struct intel_dsb *dsb,
PLANE_OFFSET_Y(plane_state->view.color_plane[1].y) |
PLANE_OFFSET_X(plane_state->view.color_plane[1].x));
- if (DISPLAY_VER(dev_priv) >= 10)
+ if (DISPLAY_VER(display) >= 10)
intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),
plane_color_ctl);
@@ -1493,7 +1486,7 @@ static void icl_plane_update_sel_fetch_noarm(struct intel_dsb *dsb,
const struct intel_plane_state *plane_state,
int color_plane)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
const struct drm_rect *clip;
u32 val;
@@ -1539,8 +1532,7 @@ icl_plane_update_noarm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
int color_plane = icl_plane_color_plane(plane_state);
@@ -1588,18 +1580,18 @@ icl_plane_update_noarm(struct intel_dsb *dsb,
}
/* FLAT CCS doesn't need to program AUX_DIST */
- if (!HAS_FLAT_CCS(dev_priv) && DISPLAY_VER(dev_priv) < 20)
+ if (!HAS_FLAT_CCS(to_i915(display->drm)) && DISPLAY_VER(display) < 20)
intel_de_write_dsb(display, dsb, PLANE_AUX_DIST(pipe, plane_id),
skl_plane_aux_dist(plane_state, color_plane));
- if (icl_is_hdr_plane(dev_priv, plane_id))
+ if (icl_is_hdr_plane(display, plane_id))
intel_de_write_dsb(display, dsb, PLANE_CUS_CTL(pipe, plane_id),
plane_state->cus_ctl);
intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),
plane_color_ctl);
- if (fb->format->is_yuv && icl_is_hdr_plane(dev_priv, plane_id))
+ if (fb->format->is_yuv && icl_is_hdr_plane(display, plane_id))
icl_program_input_csc(dsb, plane, plane_state);
skl_write_plane_wm(dsb, plane, crtc_state);
@@ -1619,7 +1611,7 @@ static void icl_plane_update_sel_fetch_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum pipe pipe = plane->pipe;
if (!crtc_state->enable_psr2_sel_fetch)
@@ -1638,7 +1630,7 @@ icl_plane_update_arm(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
int color_plane = icl_plane_color_plane(plane_state);
@@ -1677,7 +1669,7 @@ skl_plane_async_flip(struct intel_dsb *dsb,
const struct intel_plane_state *plane_state,
bool async_flip)
{
- struct intel_display *display = to_intel_display(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
u32 plane_ctl = plane_state->ctl, plane_surf;
@@ -1713,8 +1705,7 @@ static bool intel_format_is_p01x(u32 format)
static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
@@ -1723,7 +1714,7 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
if (rotation & ~(DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180) &&
intel_fb_is_ccs_modifier(fb->modifier)) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"RC support only with 0/180 degree rotation (%x)\n",
rotation);
return -EINVAL;
@@ -1731,7 +1722,7 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
if (rotation & DRM_MODE_REFLECT_X &&
fb->modifier == DRM_FORMAT_MOD_LINEAR) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"horizontal flip is not supported with linear surface formats\n");
return -EINVAL;
}
@@ -1741,15 +1732,15 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
*/
if (rotation & DRM_MODE_REFLECT_X &&
intel_fb_is_tile4_modifier(fb->modifier) &&
- DISPLAY_VER(dev_priv) >= 20) {
- drm_dbg_kms(&dev_priv->drm,
+ DISPLAY_VER(display) >= 20) {
+ drm_dbg_kms(display->drm,
"horizontal flip is not supported with tile4 surface formats\n");
return -EINVAL;
}
if (drm_rotation_90_or_270(rotation)) {
if (!intel_fb_supports_90_270_rotation(to_intel_framebuffer(fb))) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Y/Yf tiling required for 90/270!\n");
return -EINVAL;
}
@@ -1760,7 +1751,7 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
*/
switch (fb->format->format) {
case DRM_FORMAT_RGB565:
- if (DISPLAY_VER(dev_priv) >= 11)
+ if (DISPLAY_VER(display) >= 11)
break;
fallthrough;
case DRM_FORMAT_C8:
@@ -1773,7 +1764,7 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_Y216:
case DRM_FORMAT_XVYU12_16161616:
case DRM_FORMAT_XVYU16161616:
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Unsupported pixel format %p4cc for 90/270!\n",
&fb->format->format);
return -EINVAL;
@@ -1787,16 +1778,16 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE &&
fb->modifier != DRM_FORMAT_MOD_LINEAR &&
fb->modifier != I915_FORMAT_MOD_X_TILED) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Y/Yf tiling not supported in IF-ID mode\n");
return -EINVAL;
}
/* Wa_1606054188:tgl,adl-s */
- if ((IS_ALDERLAKE_S(dev_priv) || IS_TIGERLAKE(dev_priv)) &&
+ if ((display->platform.alderlake_s || display->platform.tigerlake) &&
plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
intel_format_is_p01x(fb->format->format)) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Source color keying not supported with P01x formats\n");
return -EINVAL;
}
@@ -1807,8 +1798,7 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
static int skl_plane_check_dst_coordinates(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *dev_priv =
- to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
int crtc_x = plane_state->uapi.dst.x1;
int crtc_w = drm_rect_width(&plane_state->uapi.dst);
int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
@@ -1822,9 +1812,9 @@ static int skl_plane_check_dst_coordinates(const struct intel_crtc_state *crtc_s
* than the cursor ending less than 4 pixels from the left edge of the
* screen may cause FIFO underflow and display corruption.
*/
- if (DISPLAY_VER(dev_priv) == 10 &&
+ if (DISPLAY_VER(display) == 10 &&
(crtc_x + crtc_w < 4 || crtc_x > pipe_src_w - 4)) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"requested plane X %s position %d invalid (valid range %d-%d)\n",
crtc_x + crtc_w < 4 ? "end" : "start",
crtc_x + crtc_w < 4 ? crtc_x + crtc_w : crtc_x,
@@ -1837,7 +1827,7 @@ static int skl_plane_check_dst_coordinates(const struct intel_crtc_state *crtc_s
static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_state)
{
- struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+ struct intel_display *display = to_intel_display(plane_state);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
@@ -1847,14 +1837,14 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s
src_w & 3 &&
(rotation == DRM_MODE_ROTATE_270 ||
rotation == (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90))) {
- drm_dbg_kms(&i915->drm, "src width must be multiple of 4 for rotated planar YUV\n");
+ drm_dbg_kms(display->drm, "src width must be multiple of 4 for rotated planar YUV\n");
return -EINVAL;
}
return 0;
}
-static int skl_plane_max_scale(struct drm_i915_private *dev_priv,
+static int skl_plane_max_scale(struct intel_display *display,
const struct drm_framebuffer *fb)
{
/*
@@ -1863,7 +1853,7 @@ static int skl_plane_max_scale(struct drm_i915_private *dev_priv,
* the best case.
* FIXME need to properly check this later.
*/
- if (DISPLAY_VER(dev_priv) >= 10 ||
+ if (DISPLAY_VER(display) >= 10 ||
!intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
return 0x30000 - 1;
else
@@ -1952,8 +1942,8 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state,
int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
int *x, int *y, u32 *offset)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int aux_plane = skl_main_to_aux_plane(fb, 0);
u32 aux_offset = plane_state->view.color_plane[aux_plane].offset;
@@ -1962,7 +1952,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
intel_add_fb_offsets(x, y, plane_state, 0);
*offset = intel_plane_compute_aligned_offset(x, y, plane_state, 0);
- if (drm_WARN_ON(&dev_priv->drm, alignment && !is_power_of_2(alignment)))
+ if (drm_WARN_ON(display->drm, alignment && !is_power_of_2(alignment)))
return -EINVAL;
/*
@@ -1986,7 +1976,7 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
while ((*x + w) * cpp > plane_state->view.color_plane[0].mapping_stride) {
if (*offset == 0) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Unable to find suitable display surface offset due to X-tiling\n");
return -EINVAL;
}
@@ -2002,8 +1992,8 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
static int skl_check_main_surface(struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
int x = plane_state->uapi.src.x1 >> 16;
@@ -2019,7 +2009,7 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
int ret;
if (w > max_width || w < min_width || h > max_height || h < 1) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"requested Y/RGB source size %dx%d outside limits (min: %dx1 max: %dx%d)\n",
w, h, min_width, max_width, max_height);
return -EINVAL;
@@ -2046,16 +2036,16 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
if (x != plane_state->view.color_plane[aux_plane].x ||
y != plane_state->view.color_plane[aux_plane].y) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Unable to find suitable display surface offset due to CCS\n");
return -EINVAL;
}
}
- if (DISPLAY_VER(dev_priv) >= 13)
- drm_WARN_ON(&dev_priv->drm, x > 65535 || y > 65535);
+ if (DISPLAY_VER(display) >= 13)
+ drm_WARN_ON(display->drm, x > 65535 || y > 65535);
else
- drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
+ drm_WARN_ON(display->drm, x > 8191 || y > 8191);
plane_state->view.color_plane[0].offset = offset;
plane_state->view.color_plane[0].x = x;
@@ -2073,8 +2063,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
int uv_plane = 1;
@@ -2090,7 +2080,7 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
/* FIXME not quite sure how/if these apply to the chroma plane */
if (w > max_width || h > max_height) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"CbCr source size %dx%d too big (limit %dx%d)\n",
w, h, max_width, max_height);
return -EINVAL;
@@ -2124,16 +2114,16 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
if (x != plane_state->view.color_plane[ccs_plane].x ||
y != plane_state->view.color_plane[ccs_plane].y) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Unable to find suitable display surface offset due to CCS\n");
return -EINVAL;
}
}
- if (DISPLAY_VER(i915) >= 13)
- drm_WARN_ON(&i915->drm, x > 65535 || y > 65535);
+ if (DISPLAY_VER(display) >= 13)
+ drm_WARN_ON(display->drm, x > 65535 || y > 65535);
else
- drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
+ drm_WARN_ON(display->drm, x > 8191 || y > 8191);
plane_state->view.color_plane[uv_plane].offset = offset;
plane_state->view.color_plane[uv_plane].x = x;
@@ -2219,9 +2209,13 @@ static int skl_check_plane_surface(struct intel_plane_state *plane_state)
static bool skl_fb_scalable(const struct drm_framebuffer *fb)
{
+ struct intel_display *display;
+
if (!fb)
return false;
+ display = to_intel_display(fb->dev);
+
switch (fb->format->format) {
case DRM_FORMAT_C8:
return false;
@@ -2229,7 +2223,7 @@ static bool skl_fb_scalable(const struct drm_framebuffer *fb)
case DRM_FORMAT_ARGB16161616F:
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_ABGR16161616F:
- return DISPLAY_VER(to_i915(fb->dev)) >= 11;
+ return DISPLAY_VER(display) >= 11;
default:
return true;
}
@@ -2237,12 +2231,12 @@ static bool skl_fb_scalable(const struct drm_framebuffer *fb)
static void check_protection(struct intel_plane_state *plane_state)
{
- struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *i915 = to_i915(plane->base.dev);
+ struct intel_display *display = to_intel_display(plane_state);
+ struct drm_i915_private *i915 = to_i915(display->drm);
const struct drm_framebuffer *fb = plane_state->hw.fb;
struct drm_gem_object *obj = intel_fb_bo(fb);
- if (DISPLAY_VER(i915) < 11)
+ if (DISPLAY_VER(display) < 11)
return;
plane_state->decrypt = intel_pxp_key_check(i915->pxp, obj, false) == 0;
@@ -2253,8 +2247,8 @@ static void check_protection(struct intel_plane_state *plane_state)
static int skl_plane_check(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
+ struct intel_display *display = to_intel_display(plane_state);
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
- struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int min_scale = DRM_PLANE_NO_SCALING;
int max_scale = DRM_PLANE_NO_SCALING;
@@ -2267,7 +2261,7 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state,
/* use scaler when colorkey is not required */
if (!plane_state->ckey.flags && skl_fb_scalable(fb)) {
min_scale = 1;
- max_scale = skl_plane_max_scale(dev_priv, fb);
+ max_scale = skl_plane_max_scale(display, fb);
}
ret = intel_atomic_plane_check_clipping(plane_state, crtc_state,
@@ -2302,12 +2296,12 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state,
plane_state->ctl = skl_plane_ctl(crtc_state, plane_state);
- if (DISPLAY_VER(dev_priv) >= 10)
+ if (DISPLAY_VER(display) >= 10)
plane_state->color_ctl = glk_plane_color_ctl(crtc_state,
plane_state);
if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
- icl_is_hdr_plane(dev_priv, plane->id))
+ icl_is_hdr_plane(display, plane->id))
/* Enable and use MPEG-2 chroma siting */
plane_state->cus_ctl = PLANE_CUS_ENABLE |
PLANE_CUS_HPHASE_0 |
@@ -2323,37 +2317,37 @@ static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe pipe)
return pipe - PIPE_A + INTEL_FBC_A;
}
-static bool skl_plane_has_fbc(struct drm_i915_private *i915,
+static bool skl_plane_has_fbc(struct intel_display *display,
enum intel_fbc_id fbc_id, enum plane_id plane_id)
{
- if ((DISPLAY_RUNTIME_INFO(i915)->fbc_mask & BIT(fbc_id)) == 0)
+ if ((DISPLAY_RUNTIME_INFO(display)->fbc_mask & BIT(fbc_id)) == 0)
return false;
- if (DISPLAY_VER(i915) >= 20)
- return icl_is_hdr_plane(i915, plane_id);
+ if (DISPLAY_VER(display) >= 20)
+ return icl_is_hdr_plane(display, plane_id);
else
return plane_id == PLANE_1;
}
-static struct intel_fbc *skl_plane_fbc(struct drm_i915_private *dev_priv,
+static struct intel_fbc *skl_plane_fbc(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id)
{
enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(pipe);
- if (skl_plane_has_fbc(dev_priv, fbc_id, plane_id))
- return dev_priv->display.fbc[fbc_id];
+ if (skl_plane_has_fbc(display, fbc_id, plane_id))
+ return display->fbc[fbc_id];
else
return NULL;
}
-static bool skl_plane_has_planar(struct drm_i915_private *dev_priv,
+static bool skl_plane_has_planar(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id)
{
/* Display WA #0870: skl, bxt */
- if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
+ if (display->platform.skylake || display->platform.broxton)
return false;
- if (DISPLAY_VER(dev_priv) == 9 && pipe == PIPE_C)
+ if (DISPLAY_VER(display) == 9 && pipe == PIPE_C)
return false;
if (plane_id != PLANE_1 && plane_id != PLANE_2)
@@ -2362,11 +2356,11 @@ static bool skl_plane_has_planar(struct drm_i915_private *dev_priv,
return true;
}
-static const u32 *skl_get_plane_formats(struct drm_i915_private *dev_priv,
+static const u32 *skl_get_plane_formats(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id,
int *num_formats)
{
- if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
+ if (skl_plane_has_planar(display, pipe, plane_id)) {
*num_formats = ARRAY_SIZE(skl_planar_formats);
return skl_planar_formats;
} else {
@@ -2375,11 +2369,11 @@ static const u32 *skl_get_plane_formats(struct drm_i915_private *dev_priv,
}
}
-static const u32 *glk_get_plane_formats(struct drm_i915_private *dev_priv,
+static const u32 *glk_get_plane_formats(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id,
int *num_formats)
{
- if (skl_plane_has_planar(dev_priv, pipe, plane_id)) {
+ if (skl_plane_has_planar(display, pipe, plane_id)) {
*num_formats = ARRAY_SIZE(glk_planar_formats);
return glk_planar_formats;
} else {
@@ -2388,14 +2382,14 @@ static const u32 *glk_get_plane_formats(struct drm_i915_private *dev_priv,
}
}
-static const u32 *icl_get_plane_formats(struct drm_i915_private *dev_priv,
+static const u32 *icl_get_plane_formats(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id,
int *num_formats)
{
- if (icl_is_hdr_plane(dev_priv, plane_id)) {
+ if (icl_is_hdr_plane(display, plane_id)) {
*num_formats = ARRAY_SIZE(icl_hdr_plane_formats);
return icl_hdr_plane_formats;
- } else if (icl_is_nv12_y_plane(dev_priv, plane_id)) {
+ } else if (icl_is_nv12_y_plane(display, plane_id)) {
*num_formats = ARRAY_SIZE(icl_sdr_y_plane_formats);
return icl_sdr_y_plane_formats;
} else {
@@ -2613,46 +2607,46 @@ skl_plane_disable_flip_done(struct intel_plane *plane)
spin_unlock_irq(&i915->irq_lock);
}
-static bool skl_plane_has_rc_ccs(struct drm_i915_private *i915,
+static bool skl_plane_has_rc_ccs(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id)
{
return pipe != PIPE_C &&
(plane_id == PLANE_1 || plane_id == PLANE_2);
}
-static u8 skl_plane_caps(struct drm_i915_private *i915,
+static u8 skl_plane_caps(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id)
{
u8 caps = INTEL_PLANE_CAP_TILING_X |
INTEL_PLANE_CAP_TILING_Y |
INTEL_PLANE_CAP_TILING_Yf;
- if (skl_plane_has_rc_ccs(i915, pipe, plane_id))
+ if (skl_plane_has_rc_ccs(display, pipe, plane_id))
caps |= INTEL_PLANE_CAP_CCS_RC;
return caps;
}
-static bool glk_plane_has_rc_ccs(struct drm_i915_private *i915,
+static bool glk_plane_has_rc_ccs(struct intel_display *display,
enum pipe pipe)
{
return pipe != PIPE_C;
}
-static u8 glk_plane_caps(struct drm_i915_private *i915,
+static u8 glk_plane_caps(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id)
{
u8 caps = INTEL_PLANE_CAP_TILING_X |
INTEL_PLANE_CAP_TILING_Y |
INTEL_PLANE_CAP_TILING_Yf;
- if (glk_plane_has_rc_ccs(i915, pipe))
+ if (glk_plane_has_rc_ccs(display, pipe))
caps |= INTEL_PLANE_CAP_CCS_RC;
return caps;
}
-static u8 icl_plane_caps(struct drm_i915_private *i915,
+static u8 icl_plane_caps(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id)
{
return INTEL_PLANE_CAP_TILING_X |
@@ -2661,21 +2655,20 @@ static u8 icl_plane_caps(struct drm_i915_private *i915,
INTEL_PLANE_CAP_CCS_RC;
}
-static bool tgl_plane_has_mc_ccs(struct drm_i915_private *i915,
+static bool tgl_plane_has_mc_ccs(struct intel_display *display,
enum plane_id plane_id)
{
/* Wa_14010477008 */
- if (IS_DG1(i915) || IS_ROCKETLAKE(i915) ||
- (IS_TIGERLAKE(i915) && IS_DISPLAY_STEP(i915, STEP_A0, STEP_D0)))
+ if (display->platform.dg1 || display->platform.rocketlake ||
+ (display->platform.tigerlake && IS_DISPLAY_STEP(display, STEP_A0, STEP_D0)))
return false;
return plane_id < PLANE_6;
}
-static u8 tgl_plane_caps(struct drm_i915_private *i915,
+static u8 tgl_plane_caps(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id)
{
- struct intel_display *display = &i915->display;
u8 caps = INTEL_PLANE_CAP_TILING_X |
INTEL_PLANE_CAP_CCS_RC |
INTEL_PLANE_CAP_CCS_RC_CC;
@@ -2685,7 +2678,7 @@ static u8 tgl_plane_caps(struct drm_i915_private *i915,
else
caps |= INTEL_PLANE_CAP_TILING_Y;
- if (tgl_plane_has_mc_ccs(i915, plane_id))
+ if (tgl_plane_has_mc_ccs(display, plane_id))
caps |= INTEL_PLANE_CAP_CCS_MC;
if (DISPLAY_VER(display) >= 14 && display->platform.dgfx)
@@ -2695,10 +2688,9 @@ static u8 tgl_plane_caps(struct drm_i915_private *i915,
}
struct intel_plane *
-skl_universal_plane_create(struct drm_i915_private *dev_priv,
+skl_universal_plane_create(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id)
{
- struct intel_display *display = &dev_priv->display;
const struct drm_plane_funcs *plane_funcs;
struct intel_plane *plane;
enum drm_plane_type plane_type;
@@ -2718,21 +2710,21 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
plane->id = plane_id;
plane->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, plane_id);
- intel_fbc_add_plane(skl_plane_fbc(dev_priv, pipe, plane_id), plane);
+ intel_fbc_add_plane(skl_plane_fbc(display, pipe, plane_id), plane);
- if (DISPLAY_VER(dev_priv) >= 30) {
+ if (DISPLAY_VER(display) >= 30) {
plane->max_width = xe3_plane_max_width;
plane->max_height = icl_plane_max_height;
plane->min_cdclk = icl_plane_min_cdclk;
- } else if (DISPLAY_VER(dev_priv) >= 11) {
+ } else if (DISPLAY_VER(display) >= 11) {
plane->min_width = icl_plane_min_width;
- if (icl_is_hdr_plane(dev_priv, plane_id))
+ if (icl_is_hdr_plane(display, plane_id))
plane->max_width = icl_hdr_plane_max_width;
else
plane->max_width = icl_sdr_plane_max_width;
plane->max_height = icl_plane_max_height;
plane->min_cdclk = icl_plane_min_cdclk;
- } else if (DISPLAY_VER(dev_priv) >= 10) {
+ } else if (DISPLAY_VER(display) >= 10) {
plane->max_width = glk_plane_max_width;
plane->max_height = skl_plane_max_height;
plane->min_cdclk = glk_plane_min_cdclk;
@@ -2742,17 +2734,17 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
plane->min_cdclk = skl_plane_min_cdclk;
}
- if (DISPLAY_VER(dev_priv) >= 13)
+ if (DISPLAY_VER(display) >= 13)
plane->max_stride = adl_plane_max_stride;
else
plane->max_stride = skl_plane_max_stride;
- if (DISPLAY_VER(dev_priv) >= 12)
+ if (DISPLAY_VER(display) >= 12)
plane->min_alignment = tgl_plane_min_alignment;
else
plane->min_alignment = skl_plane_min_alignment;
- if (DISPLAY_VER(dev_priv) >= 11) {
+ if (DISPLAY_VER(display) >= 11) {
plane->update_noarm = icl_plane_update_noarm;
plane->update_arm = icl_plane_update_arm;
plane->disable_arm = icl_plane_disable_arm;
@@ -2764,33 +2756,33 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
plane->get_hw_state = skl_plane_get_hw_state;
plane->check_plane = skl_plane_check;
- if (HAS_ASYNC_FLIPS(dev_priv) && plane_id == PLANE_1) {
- plane->need_async_flip_toggle_wa = IS_DISPLAY_VER(dev_priv, 9, 10);
+ if (HAS_ASYNC_FLIPS(display) && plane_id == PLANE_1) {
+ plane->need_async_flip_toggle_wa = IS_DISPLAY_VER(display, 9, 10);
plane->async_flip = skl_plane_async_flip;
plane->enable_flip_done = skl_plane_enable_flip_done;
plane->disable_flip_done = skl_plane_disable_flip_done;
- if (DISPLAY_VER(dev_priv) >= 12)
+ if (DISPLAY_VER(display) >= 12)
plane->can_async_flip = tgl_plane_can_async_flip;
- else if (DISPLAY_VER(dev_priv) == 11)
+ else if (DISPLAY_VER(display) == 11)
plane->can_async_flip = icl_plane_can_async_flip;
else
plane->can_async_flip = skl_plane_can_async_flip;
}
- if (DISPLAY_VER(dev_priv) >= 11)
- formats = icl_get_plane_formats(dev_priv, pipe,
+ if (DISPLAY_VER(display) >= 11)
+ formats = icl_get_plane_formats(display, pipe,
plane_id, &num_formats);
- else if (DISPLAY_VER(dev_priv) >= 10)
- formats = glk_get_plane_formats(dev_priv, pipe,
+ else if (DISPLAY_VER(display) >= 10)
+ formats = glk_get_plane_formats(display, pipe,
plane_id, &num_formats);
else
- formats = skl_get_plane_formats(dev_priv, pipe,
+ formats = skl_get_plane_formats(display, pipe,
plane_id, &num_formats);
- if (DISPLAY_VER(dev_priv) >= 12)
+ if (DISPLAY_VER(display) >= 12)
plane_funcs = &tgl_plane_funcs;
- else if (DISPLAY_VER(dev_priv) == 11)
+ else if (DISPLAY_VER(display) == 11)
plane_funcs = &icl_plane_funcs;
else
plane_funcs = &skl_plane_funcs;
@@ -2800,24 +2792,24 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
else
plane_type = DRM_PLANE_TYPE_OVERLAY;
- if (DISPLAY_VER(dev_priv) >= 12)
- caps = tgl_plane_caps(dev_priv, pipe, plane_id);
- else if (DISPLAY_VER(dev_priv) == 11)
- caps = icl_plane_caps(dev_priv, pipe, plane_id);
- else if (DISPLAY_VER(dev_priv) == 10)
- caps = glk_plane_caps(dev_priv, pipe, plane_id);
+ if (DISPLAY_VER(display) >= 12)
+ caps = tgl_plane_caps(display, pipe, plane_id);
+ else if (DISPLAY_VER(display) == 11)
+ caps = icl_plane_caps(display, pipe, plane_id);
+ else if (DISPLAY_VER(display) == 10)
+ caps = glk_plane_caps(display, pipe, plane_id);
else
- caps = skl_plane_caps(dev_priv, pipe, plane_id);
+ caps = skl_plane_caps(display, pipe, plane_id);
/* FIXME: xe has problems with AUX */
- if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(dev_priv))
+ if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(to_i915(display->drm)))
caps &= ~(INTEL_PLANE_CAP_CCS_RC |
INTEL_PLANE_CAP_CCS_RC_CC |
INTEL_PLANE_CAP_CCS_MC);
modifiers = intel_fb_plane_get_modifiers(display, caps);
- ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
+ ret = drm_universal_plane_init(display->drm, &plane->base,
0, plane_funcs,
formats, num_formats, modifiers,
plane_type,
@@ -2829,14 +2821,14 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
if (ret)
goto fail;
- if (DISPLAY_VER(dev_priv) >= 13)
+ if (DISPLAY_VER(display) >= 13)
supported_rotations = DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180;
else
supported_rotations =
DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270;
- if (DISPLAY_VER(dev_priv) >= 11)
+ if (DISPLAY_VER(display) >= 11)
supported_rotations |= DRM_MODE_REFLECT_X;
drm_plane_create_rotation_property(&plane->base,
@@ -2845,7 +2837,7 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
supported_csc = BIT(DRM_COLOR_YCBCR_BT601) | BIT(DRM_COLOR_YCBCR_BT709);
- if (DISPLAY_VER(dev_priv) >= 10)
+ if (DISPLAY_VER(display) >= 10)
supported_csc |= BIT(DRM_COLOR_YCBCR_BT2020);
drm_plane_create_color_properties(&plane->base,
@@ -2863,10 +2855,10 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
drm_plane_create_zpos_immutable_property(&plane->base, plane_id);
- if (DISPLAY_VER(dev_priv) >= 12)
+ if (DISPLAY_VER(display) >= 12)
drm_plane_enable_fb_damage_clips(&plane->base);
- if (DISPLAY_VER(dev_priv) >= 11)
+ if (DISPLAY_VER(display) >= 11)
drm_plane_create_scaling_filter_property(&plane->base,
BIT(DRM_SCALING_FILTER_DEFAULT) |
BIT(DRM_SCALING_FILTER_NEAREST_NEIGHBOR));
@@ -2887,8 +2879,6 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
{
struct intel_display *display = to_intel_display(crtc);
struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);
- struct drm_device *dev = crtc->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
enum plane_id plane_id = plane->id;
enum pipe pipe;
@@ -2902,35 +2892,35 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
if (!plane->get_hw_state(plane, &pipe))
return;
- drm_WARN_ON(dev, pipe != crtc->pipe);
+ drm_WARN_ON(display->drm, pipe != crtc->pipe);
if (crtc_state->joiner_pipes) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Unsupported joiner configuration for initial FB\n");
return;
}
intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL);
if (!intel_fb) {
- drm_dbg_kms(&dev_priv->drm, "failed to alloc fb\n");
+ drm_dbg_kms(display->drm, "failed to alloc fb\n");
return;
}
fb = &intel_fb->base;
- fb->dev = dev;
+ fb->dev = display->drm;
- val = intel_de_read(dev_priv, PLANE_CTL(pipe, plane_id));
+ val = intel_de_read(display, PLANE_CTL(pipe, plane_id));
- if (DISPLAY_VER(dev_priv) >= 11)
+ if (DISPLAY_VER(display) >= 11)
pixel_format = val & PLANE_CTL_FORMAT_MASK_ICL;
else
pixel_format = val & PLANE_CTL_FORMAT_MASK_SKL;
- if (DISPLAY_VER(dev_priv) >= 10) {
+ if (DISPLAY_VER(display) >= 10) {
u32 color_ctl;
- color_ctl = intel_de_read(dev_priv, PLANE_COLOR_CTL(pipe, plane_id));
+ color_ctl = intel_de_read(display, PLANE_COLOR_CTL(pipe, plane_id));
alpha = REG_FIELD_GET(PLANE_COLOR_ALPHA_MASK, color_ctl);
} else {
alpha = REG_FIELD_GET(PLANE_CTL_ALPHA_MASK, val);
@@ -2952,14 +2942,14 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
case PLANE_CTL_TILED_Y:
plane_config->tiling = I915_TILING_Y;
if (val & PLANE_CTL_RENDER_DECOMPRESSION_ENABLE)
- if (DISPLAY_VER(dev_priv) >= 14)
+ if (DISPLAY_VER(display) >= 14)
fb->modifier = I915_FORMAT_MOD_4_TILED_MTL_RC_CCS;
- else if (DISPLAY_VER(dev_priv) >= 12)
+ else if (DISPLAY_VER(display) >= 12)
fb->modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
else
fb->modifier = I915_FORMAT_MOD_Y_TILED_CCS;
else if (val & PLANE_CTL_MEDIA_DECOMPRESSION_ENABLE)
- if (DISPLAY_VER(dev_priv) >= 14)
+ if (DISPLAY_VER(display) >= 14)
fb->modifier = I915_FORMAT_MOD_4_TILED_MTL_MC_CCS;
else
fb->modifier = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
@@ -2991,9 +2981,9 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
goto error;
}
- if (!dev_priv->display.params.enable_dpt &&
+ if (!display->params.enable_dpt &&
intel_fb_modifier_uses_dpt(display, fb->modifier)) {
- drm_dbg_kms(&dev_priv->drm, "DPT disabled, skipping initial FB\n");
+ drm_dbg_kms(display->drm, "DPT disabled, skipping initial FB\n");
goto error;
}
@@ -3016,24 +3006,24 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
break;
}
- if (DISPLAY_VER(dev_priv) >= 11 && val & PLANE_CTL_FLIP_HORIZONTAL)
+ if (DISPLAY_VER(display) >= 11 && val & PLANE_CTL_FLIP_HORIZONTAL)
plane_config->rotation |= DRM_MODE_REFLECT_X;
/* 90/270 degree rotation would require extra work */
if (drm_rotation_90_or_270(plane_config->rotation))
goto error;
- base = intel_de_read(dev_priv, PLANE_SURF(pipe, plane_id)) & PLANE_SURF_ADDR_MASK;
+ base = intel_de_read(display, PLANE_SURF(pipe, plane_id)) & PLANE_SURF_ADDR_MASK;
plane_config->base = base;
- offset = intel_de_read(dev_priv, PLANE_OFFSET(pipe, plane_id));
- drm_WARN_ON(&dev_priv->drm, offset != 0);
+ offset = intel_de_read(display, PLANE_OFFSET(pipe, plane_id));
+ drm_WARN_ON(display->drm, offset != 0);
- val = intel_de_read(dev_priv, PLANE_SIZE(pipe, plane_id));
+ val = intel_de_read(display, PLANE_SIZE(pipe, plane_id));
fb->height = REG_FIELD_GET(PLANE_HEIGHT_MASK, val) + 1;
fb->width = REG_FIELD_GET(PLANE_WIDTH_MASK, val) + 1;
- val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
+ val = intel_de_read(display, PLANE_STRIDE(pipe, plane_id));
stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
fb->pitches[0] = REG_FIELD_GET(PLANE_STRIDE__MASK, val) * stride_mult;
@@ -3042,7 +3032,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
plane_config->size = fb->pitches[0] * aligned_height;
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
crtc->base.name, plane->base.name, fb->width, fb->height,
fb->format->cpp[0] * 8, base, fb->pitches[0],
@@ -3058,7 +3048,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
bool skl_fixup_initial_plane_config(struct intel_crtc *crtc,
const struct intel_initial_plane_config *plane_config)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
struct intel_plane *plane = to_intel_plane(crtc->base.primary);
const struct intel_plane_state *plane_state =
to_intel_plane_state(plane->base.state);
@@ -3078,7 +3068,7 @@ bool skl_fixup_initial_plane_config(struct intel_crtc *crtc,
if (plane_config->base == base)
return false;
- intel_de_write(i915, PLANE_SURF(pipe, plane_id), base);
+ intel_de_write(display, PLANE_SURF(pipe, plane_id), base);
return true;
}
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.h b/drivers/gpu/drm/i915/display/skl_universal_plane.h
index 18b41d13f0bd..0ce240e9ca5a 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.h
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.h
@@ -8,8 +8,8 @@
#include <linux/types.h>
-struct drm_i915_private;
struct intel_crtc;
+struct intel_display;
struct intel_initial_plane_config;
struct intel_plane_state;
struct skl_ddb_entry;
@@ -19,7 +19,7 @@ enum pipe;
enum plane_id;
struct intel_plane *
-skl_universal_plane_create(struct drm_i915_private *dev_priv,
+skl_universal_plane_create(struct intel_display *display,
enum pipe pipe, enum plane_id plane_id);
void skl_get_initial_plane_config(struct intel_crtc *crtc,
@@ -32,10 +32,10 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha);
int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
int *x, int *y, u32 *offset);
-bool icl_is_nv12_y_plane(struct drm_i915_private *dev_priv,
+bool icl_is_nv12_y_plane(struct intel_display *display,
enum plane_id plane_id);
u8 icl_hdr_plane_mask(void);
-bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id);
+bool icl_is_hdr_plane(struct intel_display *display, enum plane_id plane_id);
u32 skl_plane_aux_dist(const struct intel_plane_state *plane_state,
int color_plane);
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 10/11] drm/i915: Use DRM_RECT_FMT & co. for plane debugs
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (8 preceding siblings ...)
2025-01-24 16:30 ` [PATCH 09/11] drm/i915: Convert skl_univeral_plane.c " Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-24 16:30 ` [PATCH 11/11] drm/i915: Pimp " Ville Syrjala
` (9 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Switch the plane debugs to use DRM_RECT_FMT & co. instead
of drm_rect_debug_print() so that the debugs go on the same line.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index c558143f4f82..f5ea6712dacf 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -944,9 +944,9 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
hscale = drm_rect_calc_hscale(src, dst, min_scale, max_scale);
vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale);
if (hscale < 0 || vscale < 0) {
- drm_dbg_kms(&i915->drm, "Invalid scaling of plane\n");
- drm_rect_debug_print("src: ", src, true);
- drm_rect_debug_print("dst: ", dst, false);
+ drm_dbg_kms(&i915->drm,
+ "Invalid scaling of plane " DRM_RECT_FP_FMT " -> " DRM_RECT_FMT "\n",
+ DRM_RECT_FP_ARG(src), DRM_RECT_ARG(dst));
return -ERANGE;
}
@@ -960,9 +960,8 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
if (!can_position && plane_state->uapi.visible &&
!drm_rect_equals(dst, clip)) {
- drm_dbg_kms(&i915->drm, "Plane must cover entire CRTC\n");
- drm_rect_debug_print("dst: ", dst, false);
- drm_rect_debug_print("clip: ", clip, false);
+ drm_dbg_kms(&i915->drm, "Plane (" DRM_RECT_FMT ") must cover entire CRTC (" DRM_RECT_FMT ")\n",
+ DRM_RECT_ARG(dst), DRM_RECT_ARG(clip));
return -EINVAL;
}
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* [PATCH 11/11] drm/i915: Pimp plane debugs
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (9 preceding siblings ...)
2025-01-24 16:30 ` [PATCH 10/11] drm/i915: Use DRM_RECT_FMT & co. for plane debugs Ville Syrjala
@ 2025-01-24 16:30 ` Ville Syrjala
2025-01-28 7:04 ` Borah, Chaitanya Kumar
2025-01-24 16:39 ` ✓ CI.Patch_applied: success for drm/i915: intel_display conversions and some debug improvements Patchwork
` (8 subsequent siblings)
19 siblings, 1 reply; 23+ messages in thread
From: Ville Syrjala @ 2025-01-24 16:30 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Include the standard "[PLANE:%d:s]" stuff in all plane debugs
(or rather all I was able to find), to provide better information
on which plane we're actually talking about.
There are a few spots where we care about the CRTC as well, so
include that where appropriate.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 18 ++++--
.../gpu/drm/i915/display/intel_atomic_plane.c | 17 ++++--
drivers/gpu/drm/i915/display/intel_cursor.c | 33 ++++++----
drivers/gpu/drm/i915/display/intel_display.c | 9 +--
.../drm/i915/display/skl_universal_plane.c | 60 ++++++++++++-------
5 files changed, 90 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index c7064e650b5e..4893e25beb1a 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -244,8 +244,12 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
src_y = plane_state->uapi.src.y1 >> 16;
/* Undocumented hardware limit on i965/g4x/vlv/chv */
- if (HAS_GMCH(display) && fb->format->cpp[0] == 8 && src_w > 2048)
+ if (HAS_GMCH(display) && fb->format->cpp[0] == 8 && src_w > 2048) {
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] plane too wide (%d) for 64bpp\n",
+ plane->base.base.id, plane->base.name, src_w);
return -EINVAL;
+ }
intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);
@@ -273,7 +277,8 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
while ((src_x + src_w) * cpp > plane_state->view.color_plane[0].mapping_stride) {
if (offset == 0) {
drm_dbg_kms(display->drm,
- "Unable to find suitable display surface offset due to X-tiling\n");
+ "[PLANE:%d:%s] unable to find suitable display surface offset due to X-tiling\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -1147,10 +1152,11 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
plane_config->size = fb->pitches[0] * aligned_height;
drm_dbg_kms(display->drm,
- "%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
- crtc->base.name, plane->base.name, fb->width, fb->height,
- fb->format->cpp[0] * 8, base, fb->pitches[0],
- plane_config->size);
+ "[CRTC:%d:%s][PLANE:%d:%s] with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
+ crtc->base.base.id, crtc->base.name,
+ plane->base.base.id, plane->base.name,
+ fb->width, fb->height, fb->format->cpp[0] * 8,
+ base, fb->pitches[0], plane_config->size);
plane_config->fb = intel_fb;
}
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index f5ea6712dacf..46adab1d862c 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -926,6 +926,7 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
bool can_position)
{
struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
struct drm_framebuffer *fb = plane_state->hw.fb;
struct drm_rect *src = &plane_state->uapi.src;
struct drm_rect *dst = &plane_state->uapi.dst;
@@ -945,7 +946,8 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale);
if (hscale < 0 || vscale < 0) {
drm_dbg_kms(&i915->drm,
- "Invalid scaling of plane " DRM_RECT_FP_FMT " -> " DRM_RECT_FMT "\n",
+ "[PLANE:%d:%s] invalid scaling "DRM_RECT_FP_FMT " -> " DRM_RECT_FMT "\n",
+ plane->base.base.id, plane->base.name,
DRM_RECT_FP_ARG(src), DRM_RECT_ARG(dst));
return -ERANGE;
}
@@ -960,7 +962,9 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
if (!can_position && plane_state->uapi.visible &&
!drm_rect_equals(dst, clip)) {
- drm_dbg_kms(&i915->drm, "Plane (" DRM_RECT_FMT ") must cover entire CRTC (" DRM_RECT_FMT ")\n",
+ drm_dbg_kms(&i915->drm,
+ "[PLANE:%d:%s] plane (" DRM_RECT_FMT ") must cover entire CRTC (" DRM_RECT_FMT ")\n",
+ plane->base.base.id, plane->base.name,
DRM_RECT_ARG(dst), DRM_RECT_ARG(clip));
return -EINVAL;
}
@@ -974,6 +978,7 @@ int intel_atomic_plane_check_clipping(struct intel_plane_state *plane_state,
int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
{
struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
struct drm_rect *src = &plane_state->uapi.src;
u32 src_x, src_y, src_w, src_h, hsub, vsub;
@@ -1029,13 +1034,17 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
hsub = vsub = max(hsub, vsub);
if (src_x % hsub || src_w % hsub) {
- drm_dbg_kms(&i915->drm, "src x/w (%u, %u) must be a multiple of %u (rotated: %s)\n",
+ drm_dbg_kms(&i915->drm,
+ "[PLANE:%d:%s] src x/w (%u, %u) must be a multiple of %u (rotated: %s)\n",
+ plane->base.base.id, plane->base.name,
src_x, src_w, hsub, str_yes_no(rotated));
return -EINVAL;
}
if (src_y % vsub || src_h % vsub) {
- drm_dbg_kms(&i915->drm, "src y/h (%u, %u) must be a multiple of %u (rotated: %s)\n",
+ drm_dbg_kms(&i915->drm,
+ "[PLANE:%d:%s] src y/h (%u, %u) must be a multiple of %u (rotated: %s)\n",
+ plane->base.base.id, plane->base.name,
src_y, src_h, vsub, str_yes_no(rotated));
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 5dd0545b6b3d..e66116b17c3c 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -92,6 +92,7 @@ static bool intel_cursor_size_ok(const struct intel_plane_state *plane_state)
static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
unsigned int rotation = plane_state->hw.rotation;
int src_x, src_y;
u32 offset;
@@ -113,7 +114,8 @@ static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
if (src_x != 0 || src_y != 0) {
drm_dbg_kms(display->drm,
- "Arbitrary cursor panning not supported\n");
+ "[PLANE:%d:%s] arbitrary cursor panning not supported\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -144,13 +146,15 @@ static int intel_check_cursor(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
const struct drm_rect src = plane_state->uapi.src;
const struct drm_rect dst = plane_state->uapi.dst;
int ret;
if (fb && fb->modifier != DRM_FORMAT_MOD_LINEAR) {
- drm_dbg_kms(display->drm, "cursor cannot be tiled\n");
+ drm_dbg_kms(display->drm, "[PLANE:%d:%s] cursor cannot be tiled\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -232,6 +236,7 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
int ret;
@@ -246,7 +251,8 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
/* Check for which cursor types we support */
if (!i845_cursor_size_ok(plane_state)) {
drm_dbg_kms(display->drm,
- "Cursor dimension %dx%d not supported\n",
+ "[PLANE:%d:%s] cursor dimension %dx%d not supported\n",
+ plane->base.base.id, plane->base.name,
drm_rect_width(&plane_state->uapi.dst),
drm_rect_height(&plane_state->uapi.dst));
return -EINVAL;
@@ -262,7 +268,8 @@ static int i845_check_cursor(struct intel_crtc_state *crtc_state,
case 2048:
break;
default:
- drm_dbg_kms(display->drm, "Invalid cursor stride (%u)\n",
+ drm_dbg_kms(display->drm, "[PLANE:%d:%s] invalid cursor stride (%u)\n",
+ plane->base.base.id, plane->base.name,
fb->pitches[0]);
return -EINVAL;
}
@@ -484,10 +491,11 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
/* Check for which cursor types we support */
if (!i9xx_cursor_size_ok(plane_state)) {
- drm_dbg(display->drm,
- "Cursor dimension %dx%d not supported\n",
- drm_rect_width(&plane_state->uapi.dst),
- drm_rect_height(&plane_state->uapi.dst));
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] cursor dimension %dx%d not supported\n",
+ plane->base.base.id, plane->base.name,
+ drm_rect_width(&plane_state->uapi.dst),
+ drm_rect_height(&plane_state->uapi.dst));
return -EINVAL;
}
@@ -497,9 +505,9 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
if (fb->pitches[0] !=
drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {
drm_dbg_kms(display->drm,
- "Invalid cursor stride (%u) (cursor width %d)\n",
- fb->pitches[0],
- drm_rect_width(&plane_state->uapi.dst));
+ "[PLANE:%d:%s] invalid cursor stride (%u) (cursor width %d)\n",
+ plane->base.base.id, plane->base.name,
+ fb->pitches[0], drm_rect_width(&plane_state->uapi.dst));
return -EINVAL;
}
@@ -516,7 +524,8 @@ static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
if (display->platform.cherryview && pipe == PIPE_C &&
plane_state->uapi.visible && plane_state->uapi.dst.x1 < 0) {
drm_dbg_kms(display->drm,
- "CHV cursor C not allowed to straddle the left screen edge\n");
+ "[PLANE:%d:%s] cursor not allowed to straddle the left screen edge\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d4a6e9f78d8b..2f02591f9cd2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4495,9 +4495,9 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state,
if (!linked_state) {
drm_dbg_kms(&dev_priv->drm,
- "Need %d free Y planes for planar YUV\n",
+ "[CRTC:%d:%s] need %d free Y planes for planar YUV\n",
+ crtc->base.base.id, crtc->base.name,
hweight8(crtc_state->nv12_planes));
-
return -EINVAL;
}
@@ -4512,8 +4512,9 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state,
crtc_state->data_rate_y[plane->id];
crtc_state->rel_data_rate[linked->id] =
crtc_state->rel_data_rate_y[plane->id];
- drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for %s\n",
- linked->base.name, plane->base.name);
+ drm_dbg_kms(&dev_priv->drm, "UV plane [PLANE:%d:%s] using [PLANE:%d:%s] as Y plane\n",
+ plane->base.base.id, plane->base.name,
+ linked->base.base.id, linked->base.name);
/* Copy parameters to slave plane */
linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 9c29cb26bf7c..484dae147385 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1706,6 +1706,7 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
@@ -1715,15 +1716,16 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
if (rotation & ~(DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180) &&
intel_fb_is_ccs_modifier(fb->modifier)) {
drm_dbg_kms(display->drm,
- "RC support only with 0/180 degree rotation (%x)\n",
- rotation);
+ "[PLANE:%d:%s] RC support only with 0/180 degree rotation (%x)\n",
+ plane->base.base.id, plane->base.name, rotation);
return -EINVAL;
}
if (rotation & DRM_MODE_REFLECT_X &&
fb->modifier == DRM_FORMAT_MOD_LINEAR) {
drm_dbg_kms(display->drm,
- "horizontal flip is not supported with linear surface formats\n");
+ "[PLANE:%d:%s] horizontal flip is not supported with linear surface formats\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -1734,14 +1736,16 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
intel_fb_is_tile4_modifier(fb->modifier) &&
DISPLAY_VER(display) >= 20) {
drm_dbg_kms(display->drm,
- "horizontal flip is not supported with tile4 surface formats\n");
+ "[PLANE:%d:%s] horizontal flip is not supported with tile4 surface formats\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
if (drm_rotation_90_or_270(rotation)) {
if (!intel_fb_supports_90_270_rotation(to_intel_framebuffer(fb))) {
drm_dbg_kms(display->drm,
- "Y/Yf tiling required for 90/270!\n");
+ "[PLANE:%d:%s] Y/Yf tiling required for 90/270!\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -1765,8 +1769,8 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XVYU12_16161616:
case DRM_FORMAT_XVYU16161616:
drm_dbg_kms(display->drm,
- "Unsupported pixel format %p4cc for 90/270!\n",
- &fb->format->format);
+ "[PLANE:%d:%s] unsupported pixel format %p4cc for 90/270!\n",
+ plane->base.base.id, plane->base.name, &fb->format->format);
return -EINVAL;
default:
break;
@@ -1779,7 +1783,8 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
fb->modifier != DRM_FORMAT_MOD_LINEAR &&
fb->modifier != I915_FORMAT_MOD_X_TILED) {
drm_dbg_kms(display->drm,
- "Y/Yf tiling not supported in IF-ID mode\n");
+ "[PLANE:%d:%s] Y/Yf tiling not supported in IF-ID mode\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -1788,7 +1793,8 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
intel_format_is_p01x(fb->format->format)) {
drm_dbg_kms(display->drm,
- "Source color keying not supported with P01x formats\n");
+ "[PLANE:%d:%s] source color keying not supported with P01x formats\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -1799,6 +1805,7 @@ static int skl_plane_check_dst_coordinates(const struct intel_crtc_state *crtc_s
const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
int crtc_x = plane_state->uapi.dst.x1;
int crtc_w = drm_rect_width(&plane_state->uapi.dst);
int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
@@ -1815,7 +1822,8 @@ static int skl_plane_check_dst_coordinates(const struct intel_crtc_state *crtc_s
if (DISPLAY_VER(display) == 10 &&
(crtc_x + crtc_w < 4 || crtc_x > pipe_src_w - 4)) {
drm_dbg_kms(display->drm,
- "requested plane X %s position %d invalid (valid range %d-%d)\n",
+ "[PLANE:%d:%s] requested plane X %s position %d invalid (valid range %d-%d)\n",
+ plane->base.base.id, plane->base.name,
crtc_x + crtc_w < 4 ? "end" : "start",
crtc_x + crtc_w < 4 ? crtc_x + crtc_w : crtc_x,
4, pipe_src_w - 4);
@@ -1828,6 +1836,7 @@ static int skl_plane_check_dst_coordinates(const struct intel_crtc_state *crtc_s
static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_state)
{
struct intel_display *display = to_intel_display(plane_state);
+ struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int rotation = plane_state->hw.rotation;
int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
@@ -1837,7 +1846,9 @@ static int skl_plane_check_nv12_rotation(const struct intel_plane_state *plane_s
src_w & 3 &&
(rotation == DRM_MODE_ROTATE_270 ||
rotation == (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90))) {
- drm_dbg_kms(display->drm, "src width must be multiple of 4 for rotated planar YUV\n");
+ drm_dbg_kms(display->drm,
+ "[PLANE:%d:%s] src width must be multiple of 4 for rotated planar YUV\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -1977,7 +1988,8 @@ int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state,
while ((*x + w) * cpp > plane_state->view.color_plane[0].mapping_stride) {
if (*offset == 0) {
drm_dbg_kms(display->drm,
- "Unable to find suitable display surface offset due to X-tiling\n");
+ "[PLANE:%d:%s] unable to find suitable display surface offset due to X-tiling\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
@@ -2010,7 +2022,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
if (w > max_width || w < min_width || h > max_height || h < 1) {
drm_dbg_kms(display->drm,
- "requested Y/RGB source size %dx%d outside limits (min: %dx1 max: %dx%d)\n",
+ "[PLANE:%d:%s] requested Y/RGB source size %dx%d outside limits (min: %dx1 max: %dx%d)\n",
+ plane->base.base.id, plane->base.name,
w, h, min_width, max_width, max_height);
return -EINVAL;
}
@@ -2037,7 +2050,8 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
if (x != plane_state->view.color_plane[aux_plane].x ||
y != plane_state->view.color_plane[aux_plane].y) {
drm_dbg_kms(display->drm,
- "Unable to find suitable display surface offset due to CCS\n");
+ "[PLANE:%d:%s] unable to find suitable display surface offset due to CCS\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
}
@@ -2081,7 +2095,8 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
/* FIXME not quite sure how/if these apply to the chroma plane */
if (w > max_width || h > max_height) {
drm_dbg_kms(display->drm,
- "CbCr source size %dx%d too big (limit %dx%d)\n",
+ "[PLANE:%d:%s] CbCr source size %dx%d too big (limit %dx%d)\n",
+ plane->base.base.id, plane->base.name,
w, h, max_width, max_height);
return -EINVAL;
}
@@ -2115,7 +2130,8 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
if (x != plane_state->view.color_plane[ccs_plane].x ||
y != plane_state->view.color_plane[ccs_plane].y) {
drm_dbg_kms(display->drm,
- "Unable to find suitable display surface offset due to CCS\n");
+ "[PLANE:%d:%s] unable to find suitable display surface offset due to CCS\n",
+ plane->base.base.id, plane->base.name);
return -EINVAL;
}
}
@@ -2896,7 +2912,8 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
if (crtc_state->joiner_pipes) {
drm_dbg_kms(display->drm,
- "Unsupported joiner configuration for initial FB\n");
+ "[CRTC:%d:%s] Unsupported joiner configuration for initial FB\n",
+ crtc->base.base.id, crtc->base.name);
return;
}
@@ -3033,10 +3050,11 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
plane_config->size = fb->pitches[0] * aligned_height;
drm_dbg_kms(display->drm,
- "%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
- crtc->base.name, plane->base.name, fb->width, fb->height,
- fb->format->cpp[0] * 8, base, fb->pitches[0],
- plane_config->size);
+ "[CRTC:%d:%s][PLANE:%d:%s] with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
+ crtc->base.base.id, crtc->base.name,
+ plane->base.base.id, plane->base.name,
+ fb->width, fb->height, fb->format->cpp[0] * 8,
+ base, fb->pitches[0], plane_config->size);
plane_config->fb = intel_fb;
return;
--
2.45.3
^ permalink raw reply related [flat|nested] 23+ messages in thread* RE: [PATCH 11/11] drm/i915: Pimp plane debugs
2025-01-24 16:30 ` [PATCH 11/11] drm/i915: Pimp " Ville Syrjala
@ 2025-01-28 7:04 ` Borah, Chaitanya Kumar
0 siblings, 0 replies; 23+ messages in thread
From: Borah, Chaitanya Kumar @ 2025-01-28 7:04 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Friday, January 24, 2025 10:01 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 11/11] drm/i915: Pimp plane debugs
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Include the standard "[PLANE:%d:s]" stuff in all plane debugs (or rather all I
> was able to find), to provide better information on which plane we're actually
> talking about.
>
> There are a few spots where we care about the CRTC as well, so include that
> where appropriate.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
LGTM
Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_plane.c | 18 ++++--
> .../gpu/drm/i915/display/intel_atomic_plane.c | 17 ++++--
> drivers/gpu/drm/i915/display/intel_cursor.c | 33 ++++++----
> drivers/gpu/drm/i915/display/intel_display.c | 9 +--
> .../drm/i915/display/skl_universal_plane.c | 60 ++++++++++++-------
> 5 files changed, 90 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c
> b/drivers/gpu/drm/i915/display/i9xx_plane.c
> index c7064e650b5e..4893e25beb1a 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> @@ -244,8 +244,12 @@ int i9xx_check_plane_surface(struct
> intel_plane_state *plane_state)
> src_y = plane_state->uapi.src.y1 >> 16;
>
> /* Undocumented hardware limit on i965/g4x/vlv/chv */
> - if (HAS_GMCH(display) && fb->format->cpp[0] == 8 && src_w > 2048)
> + if (HAS_GMCH(display) && fb->format->cpp[0] == 8 && src_w > 2048)
> {
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] plane too wide (%d) for 64bpp\n",
> + plane->base.base.id, plane->base.name, src_w);
> return -EINVAL;
> + }
>
> intel_add_fb_offsets(&src_x, &src_y, plane_state, 0);
>
> @@ -273,7 +277,8 @@ int i9xx_check_plane_surface(struct intel_plane_state
> *plane_state)
> while ((src_x + src_w) * cpp > plane_state-
> >view.color_plane[0].mapping_stride) {
> if (offset == 0) {
> drm_dbg_kms(display->drm,
> - "Unable to find suitable display
> surface offset due to X-tiling\n");
> + "[PLANE:%d:%s] unable to find
> suitable display surface offset due to X-tiling\n",
> + plane->base.base.id, plane-
> >base.name);
> return -EINVAL;
> }
>
> @@ -1147,10 +1152,11 @@ i9xx_get_initial_plane_config(struct intel_crtc
> *crtc,
> plane_config->size = fb->pitches[0] * aligned_height;
>
> drm_dbg_kms(display->drm,
> - "%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size
> 0x%x\n",
> - crtc->base.name, plane->base.name, fb->width, fb->height,
> - fb->format->cpp[0] * 8, base, fb->pitches[0],
> - plane_config->size);
> + "[CRTC:%d:%s][PLANE:%d:%s] with fb: size=%dx%d@%d,
> offset=%x, pitch %d, size 0x%x\n",
> + crtc->base.base.id, crtc->base.name,
> + plane->base.base.id, plane->base.name,
> + fb->width, fb->height, fb->format->cpp[0] * 8,
> + base, fb->pitches[0], plane_config->size);
>
> plane_config->fb = intel_fb;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index f5ea6712dacf..46adab1d862c 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -926,6 +926,7 @@ int intel_atomic_plane_check_clipping(struct
> intel_plane_state *plane_state,
> bool can_position)
> {
> struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane-
> >dev);
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> struct drm_framebuffer *fb = plane_state->hw.fb;
> struct drm_rect *src = &plane_state->uapi.src;
> struct drm_rect *dst = &plane_state->uapi.dst; @@ -945,7 +946,8
> @@ int intel_atomic_plane_check_clipping(struct intel_plane_state
> *plane_state,
> vscale = drm_rect_calc_vscale(src, dst, min_scale, max_scale);
> if (hscale < 0 || vscale < 0) {
> drm_dbg_kms(&i915->drm,
> - "Invalid scaling of plane " DRM_RECT_FP_FMT " -> "
> DRM_RECT_FMT "\n",
> + "[PLANE:%d:%s] invalid scaling
> "DRM_RECT_FP_FMT " -> " DRM_RECT_FMT "\n",
> + plane->base.base.id, plane->base.name,
> DRM_RECT_FP_ARG(src), DRM_RECT_ARG(dst));
> return -ERANGE;
> }
> @@ -960,7 +962,9 @@ int intel_atomic_plane_check_clipping(struct
> intel_plane_state *plane_state,
>
> if (!can_position && plane_state->uapi.visible &&
> !drm_rect_equals(dst, clip)) {
> - drm_dbg_kms(&i915->drm, "Plane (" DRM_RECT_FMT ")
> must cover entire CRTC (" DRM_RECT_FMT ")\n",
> + drm_dbg_kms(&i915->drm,
> + "[PLANE:%d:%s] plane (" DRM_RECT_FMT ") must
> cover entire CRTC (" DRM_RECT_FMT ")\n",
> + plane->base.base.id, plane->base.name,
> DRM_RECT_ARG(dst), DRM_RECT_ARG(clip));
> return -EINVAL;
> }
> @@ -974,6 +978,7 @@ int intel_atomic_plane_check_clipping(struct
> intel_plane_state *plane_state, int intel_plane_check_src_coordinates(struct
> intel_plane_state *plane_state) {
> struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane-
> >dev);
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> struct drm_rect *src = &plane_state->uapi.src;
> u32 src_x, src_y, src_w, src_h, hsub, vsub; @@ -1029,13 +1034,17
> @@ int intel_plane_check_src_coordinates(struct intel_plane_state
> *plane_state)
> hsub = vsub = max(hsub, vsub);
>
> if (src_x % hsub || src_w % hsub) {
> - drm_dbg_kms(&i915->drm, "src x/w (%u, %u) must be a
> multiple of %u (rotated: %s)\n",
> + drm_dbg_kms(&i915->drm,
> + "[PLANE:%d:%s] src x/w (%u, %u) must be a
> multiple of %u (rotated: %s)\n",
> + plane->base.base.id, plane->base.name,
> src_x, src_w, hsub, str_yes_no(rotated));
> return -EINVAL;
> }
>
> if (src_y % vsub || src_h % vsub) {
> - drm_dbg_kms(&i915->drm, "src y/h (%u, %u) must be a
> multiple of %u (rotated: %s)\n",
> + drm_dbg_kms(&i915->drm,
> + "[PLANE:%d:%s] src y/h (%u, %u) must be a
> multiple of %u (rotated: %s)\n",
> + plane->base.base.id, plane->base.name,
> src_y, src_h, vsub, str_yes_no(rotated));
> return -EINVAL;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
> b/drivers/gpu/drm/i915/display/intel_cursor.c
> index 5dd0545b6b3d..e66116b17c3c 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -92,6 +92,7 @@ static bool intel_cursor_size_ok(const struct
> intel_plane_state *plane_state) static int intel_cursor_check_surface(struct
> intel_plane_state *plane_state) {
> struct intel_display *display = to_intel_display(plane_state);
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> unsigned int rotation = plane_state->hw.rotation;
> int src_x, src_y;
> u32 offset;
> @@ -113,7 +114,8 @@ static int intel_cursor_check_surface(struct
> intel_plane_state *plane_state)
>
> if (src_x != 0 || src_y != 0) {
> drm_dbg_kms(display->drm,
> - "Arbitrary cursor panning not supported\n");
> + "[PLANE:%d:%s] arbitrary cursor panning not
> supported\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
>
> @@ -144,13 +146,15 @@ static int intel_check_cursor(struct intel_crtc_state
> *crtc_state,
> struct intel_plane_state *plane_state) {
> struct intel_display *display = to_intel_display(plane_state);
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> const struct drm_rect src = plane_state->uapi.src;
> const struct drm_rect dst = plane_state->uapi.dst;
> int ret;
>
> if (fb && fb->modifier != DRM_FORMAT_MOD_LINEAR) {
> - drm_dbg_kms(display->drm, "cursor cannot be tiled\n");
> + drm_dbg_kms(display->drm, "[PLANE:%d:%s] cursor cannot
> be tiled\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
>
> @@ -232,6 +236,7 @@ static int i845_check_cursor(struct intel_crtc_state
> *crtc_state,
> struct intel_plane_state *plane_state) {
> struct intel_display *display = to_intel_display(plane_state);
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> int ret;
>
> @@ -246,7 +251,8 @@ static int i845_check_cursor(struct intel_crtc_state
> *crtc_state,
> /* Check for which cursor types we support */
> if (!i845_cursor_size_ok(plane_state)) {
> drm_dbg_kms(display->drm,
> - "Cursor dimension %dx%d not supported\n",
> + "[PLANE:%d:%s] cursor dimension %dx%d not
> supported\n",
> + plane->base.base.id, plane->base.name,
> drm_rect_width(&plane_state->uapi.dst),
> drm_rect_height(&plane_state->uapi.dst));
> return -EINVAL;
> @@ -262,7 +268,8 @@ static int i845_check_cursor(struct intel_crtc_state
> *crtc_state,
> case 2048:
> break;
> default:
> - drm_dbg_kms(display->drm, "Invalid cursor stride (%u)\n",
> + drm_dbg_kms(display->drm, "[PLANE:%d:%s] invalid cursor
> stride (%u)\n",
> + plane->base.base.id, plane->base.name,
> fb->pitches[0]);
> return -EINVAL;
> }
> @@ -484,10 +491,11 @@ static int i9xx_check_cursor(struct intel_crtc_state
> *crtc_state,
>
> /* Check for which cursor types we support */
> if (!i9xx_cursor_size_ok(plane_state)) {
> - drm_dbg(display->drm,
> - "Cursor dimension %dx%d not supported\n",
> - drm_rect_width(&plane_state->uapi.dst),
> - drm_rect_height(&plane_state->uapi.dst));
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] cursor dimension %dx%d not
> supported\n",
> + plane->base.base.id, plane->base.name,
> + drm_rect_width(&plane_state->uapi.dst),
> + drm_rect_height(&plane_state->uapi.dst));
> return -EINVAL;
> }
>
> @@ -497,9 +505,9 @@ static int i9xx_check_cursor(struct intel_crtc_state
> *crtc_state,
> if (fb->pitches[0] !=
> drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {
> drm_dbg_kms(display->drm,
> - "Invalid cursor stride (%u) (cursor width %d)\n",
> - fb->pitches[0],
> - drm_rect_width(&plane_state->uapi.dst));
> + "[PLANE:%d:%s] invalid cursor stride (%u) (cursor
> width %d)\n",
> + plane->base.base.id, plane->base.name,
> + fb->pitches[0], drm_rect_width(&plane_state-
> >uapi.dst));
> return -EINVAL;
> }
>
> @@ -516,7 +524,8 @@ static int i9xx_check_cursor(struct intel_crtc_state
> *crtc_state,
> if (display->platform.cherryview && pipe == PIPE_C &&
> plane_state->uapi.visible && plane_state->uapi.dst.x1 < 0) {
> drm_dbg_kms(display->drm,
> - "CHV cursor C not allowed to straddle the left screen
> edge\n");
> + "[PLANE:%d:%s] cursor not allowed to straddle the
> left screen edge\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index d4a6e9f78d8b..2f02591f9cd2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4495,9 +4495,9 @@ static int icl_check_nv12_planes(struct
> intel_atomic_state *state,
>
> if (!linked_state) {
> drm_dbg_kms(&dev_priv->drm,
> - "Need %d free Y planes for planar YUV\n",
> + "[CRTC:%d:%s] need %d free Y planes for
> planar YUV\n",
> + crtc->base.base.id, crtc->base.name,
> hweight8(crtc_state->nv12_planes));
> -
> return -EINVAL;
> }
>
> @@ -4512,8 +4512,9 @@ static int icl_check_nv12_planes(struct
> intel_atomic_state *state,
> crtc_state->data_rate_y[plane->id];
> crtc_state->rel_data_rate[linked->id] =
> crtc_state->rel_data_rate_y[plane->id];
> - drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for
> %s\n",
> - linked->base.name, plane->base.name);
> + drm_dbg_kms(&dev_priv->drm, "UV plane [PLANE:%d:%s]
> using [PLANE:%d:%s] as Y plane\n",
> + plane->base.base.id, plane->base.name,
> + linked->base.base.id, linked->base.name);
>
> /* Copy parameters to slave plane */
> linked_state->ctl = plane_state->ctl |
> PLANE_CTL_YUV420_Y_PLANE; diff --git
> a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 9c29cb26bf7c..484dae147385 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1706,6 +1706,7 @@ static int skl_plane_check_fb(const struct
> intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state) {
> struct intel_display *display = to_intel_display(plane_state);
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> unsigned int rotation = plane_state->hw.rotation;
>
> @@ -1715,15 +1716,16 @@ static int skl_plane_check_fb(const struct
> intel_crtc_state *crtc_state,
> if (rotation & ~(DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_180)
> &&
> intel_fb_is_ccs_modifier(fb->modifier)) {
> drm_dbg_kms(display->drm,
> - "RC support only with 0/180 degree rotation
> (%x)\n",
> - rotation);
> + "[PLANE:%d:%s] RC support only with 0/180 degree
> rotation (%x)\n",
> + plane->base.base.id, plane->base.name, rotation);
> return -EINVAL;
> }
>
> if (rotation & DRM_MODE_REFLECT_X &&
> fb->modifier == DRM_FORMAT_MOD_LINEAR) {
> drm_dbg_kms(display->drm,
> - "horizontal flip is not supported with linear surface
> formats\n");
> + "[PLANE:%d:%s] horizontal flip is not supported
> with linear surface formats\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
>
> @@ -1734,14 +1736,16 @@ static int skl_plane_check_fb(const struct
> intel_crtc_state *crtc_state,
> intel_fb_is_tile4_modifier(fb->modifier) &&
> DISPLAY_VER(display) >= 20) {
> drm_dbg_kms(display->drm,
> - "horizontal flip is not supported with tile4 surface
> formats\n");
> + "[PLANE:%d:%s] horizontal flip is not supported
> with tile4 surface formats\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
>
> if (drm_rotation_90_or_270(rotation)) {
> if
> (!intel_fb_supports_90_270_rotation(to_intel_framebuffer(fb))) {
> drm_dbg_kms(display->drm,
> - "Y/Yf tiling required for 90/270!\n");
> + "[PLANE:%d:%s] Y/Yf tiling required for
> 90/270!\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
>
> @@ -1765,8 +1769,8 @@ static int skl_plane_check_fb(const struct
> intel_crtc_state *crtc_state,
> case DRM_FORMAT_XVYU12_16161616:
> case DRM_FORMAT_XVYU16161616:
> drm_dbg_kms(display->drm,
> - "Unsupported pixel format %p4cc for
> 90/270!\n",
> - &fb->format->format);
> + "[PLANE:%d:%s] unsupported pixel format
> %p4cc for 90/270!\n",
> + plane->base.base.id, plane->base.name,
> &fb->format->format);
> return -EINVAL;
> default:
> break;
> @@ -1779,7 +1783,8 @@ static int skl_plane_check_fb(const struct
> intel_crtc_state *crtc_state,
> fb->modifier != DRM_FORMAT_MOD_LINEAR &&
> fb->modifier != I915_FORMAT_MOD_X_TILED) {
> drm_dbg_kms(display->drm,
> - "Y/Yf tiling not supported in IF-ID mode\n");
> + "[PLANE:%d:%s] Y/Yf tiling not supported in IF-ID
> mode\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
>
> @@ -1788,7 +1793,8 @@ static int skl_plane_check_fb(const struct
> intel_crtc_state *crtc_state,
> plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
> intel_format_is_p01x(fb->format->format)) {
> drm_dbg_kms(display->drm,
> - "Source color keying not supported with P01x
> formats\n");
> + "[PLANE:%d:%s] source color keying not supported
> with P01x formats\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
>
> @@ -1799,6 +1805,7 @@ static int skl_plane_check_dst_coordinates(const
> struct intel_crtc_state *crtc_s
> const struct intel_plane_state
> *plane_state) {
> struct intel_display *display = to_intel_display(plane_state);
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_w = drm_rect_width(&plane_state->uapi.dst);
> int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
> @@ -1815,7 +1822,8 @@ static int skl_plane_check_dst_coordinates(const
> struct intel_crtc_state *crtc_s
> if (DISPLAY_VER(display) == 10 &&
> (crtc_x + crtc_w < 4 || crtc_x > pipe_src_w - 4)) {
> drm_dbg_kms(display->drm,
> - "requested plane X %s position %d invalid (valid
> range %d-%d)\n",
> + "[PLANE:%d:%s] requested plane X %s position %d
> invalid (valid range %d-%d)\n",
> + plane->base.base.id, plane->base.name,
> crtc_x + crtc_w < 4 ? "end" : "start",
> crtc_x + crtc_w < 4 ? crtc_x + crtc_w : crtc_x,
> 4, pipe_src_w - 4);
> @@ -1828,6 +1836,7 @@ static int skl_plane_check_dst_coordinates(const
> struct intel_crtc_state *crtc_s static int skl_plane_check_nv12_rotation(const
> struct intel_plane_state *plane_state) {
> struct intel_display *display = to_intel_display(plane_state);
> + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> unsigned int rotation = plane_state->hw.rotation;
> int src_w = drm_rect_width(&plane_state->uapi.src) >> 16; @@ -
> 1837,7 +1846,9 @@ static int skl_plane_check_nv12_rotation(const struct
> intel_plane_state *plane_s
> src_w & 3 &&
> (rotation == DRM_MODE_ROTATE_270 ||
> rotation == (DRM_MODE_REFLECT_X | DRM_MODE_ROTATE_90)))
> {
> - drm_dbg_kms(display->drm, "src width must be multiple of 4
> for rotated planar YUV\n");
> + drm_dbg_kms(display->drm,
> + "[PLANE:%d:%s] src width must be multiple of 4 for
> rotated planar YUV\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
>
> @@ -1977,7 +1988,8 @@ int skl_calc_main_surface_offset(const struct
> intel_plane_state *plane_state,
> while ((*x + w) * cpp > plane_state-
> >view.color_plane[0].mapping_stride) {
> if (*offset == 0) {
> drm_dbg_kms(display->drm,
> - "Unable to find suitable display
> surface offset due to X-tiling\n");
> + "[PLANE:%d:%s] unable to find
> suitable display surface offset due to X-tiling\n",
> + plane->base.base.id, plane-
> >base.name);
> return -EINVAL;
> }
>
> @@ -2010,7 +2022,8 @@ static int skl_check_main_surface(struct
> intel_plane_state *plane_state)
>
> if (w > max_width || w < min_width || h > max_height || h < 1) {
> drm_dbg_kms(display->drm,
> - "requested Y/RGB source size %dx%d outside limits
> (min: %dx1 max: %dx%d)\n",
> + "[PLANE:%d:%s] requested Y/RGB source size
> %dx%d outside limits (min: %dx1 max: %dx%d)\n",
> + plane->base.base.id, plane->base.name,
> w, h, min_width, max_width, max_height);
> return -EINVAL;
> }
> @@ -2037,7 +2050,8 @@ static int skl_check_main_surface(struct
> intel_plane_state *plane_state)
> if (x != plane_state->view.color_plane[aux_plane].x ||
> y != plane_state->view.color_plane[aux_plane].y) {
> drm_dbg_kms(display->drm,
> - "Unable to find suitable display surface
> offset due to CCS\n");
> + "[PLANE:%d:%s] unable to find suitable
> display surface offset due to CCS\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
> }
> @@ -2081,7 +2095,8 @@ static int skl_check_nv12_aux_surface(struct
> intel_plane_state *plane_state)
> /* FIXME not quite sure how/if these apply to the chroma plane */
> if (w > max_width || h > max_height) {
> drm_dbg_kms(display->drm,
> - "CbCr source size %dx%d too big (limit %dx%d)\n",
> + "[PLANE:%d:%s] CbCr source size %dx%d too big
> (limit %dx%d)\n",
> + plane->base.base.id, plane->base.name,
> w, h, max_width, max_height);
> return -EINVAL;
> }
> @@ -2115,7 +2130,8 @@ static int skl_check_nv12_aux_surface(struct
> intel_plane_state *plane_state)
> if (x != plane_state->view.color_plane[ccs_plane].x ||
> y != plane_state->view.color_plane[ccs_plane].y) {
> drm_dbg_kms(display->drm,
> - "Unable to find suitable display surface
> offset due to CCS\n");
> + "[PLANE:%d:%s] unable to find suitable
> display surface offset due to CCS\n",
> + plane->base.base.id, plane->base.name);
> return -EINVAL;
> }
> }
> @@ -2896,7 +2912,8 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
>
> if (crtc_state->joiner_pipes) {
> drm_dbg_kms(display->drm,
> - "Unsupported joiner configuration for initial FB\n");
> + "[CRTC:%d:%s] Unsupported joiner configuration
> for initial FB\n",
> + crtc->base.base.id, crtc->base.name);
> return;
> }
>
> @@ -3033,10 +3050,11 @@ skl_get_initial_plane_config(struct intel_crtc
> *crtc,
> plane_config->size = fb->pitches[0] * aligned_height;
>
> drm_dbg_kms(display->drm,
> - "%s/%s with fb: size=%dx%d@%d, offset=%x, pitch %d, size
> 0x%x\n",
> - crtc->base.name, plane->base.name, fb->width, fb->height,
> - fb->format->cpp[0] * 8, base, fb->pitches[0],
> - plane_config->size);
> + "[CRTC:%d:%s][PLANE:%d:%s] with fb: size=%dx%d@%d,
> offset=%x, pitch %d, size 0x%x\n",
> + crtc->base.base.id, crtc->base.name,
> + plane->base.base.id, plane->base.name,
> + fb->width, fb->height, fb->format->cpp[0] * 8,
> + base, fb->pitches[0], plane_config->size);
>
> plane_config->fb = intel_fb;
> return;
> --
> 2.45.3
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ CI.Patch_applied: success for drm/i915: intel_display conversions and some debug improvements
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (10 preceding siblings ...)
2025-01-24 16:30 ` [PATCH 11/11] drm/i915: Pimp " Ville Syrjala
@ 2025-01-24 16:39 ` Patchwork
2025-01-24 16:40 ` ✗ CI.checkpatch: warning " Patchwork
` (7 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-01-24 16:39 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: intel_display conversions and some debug improvements
URL : https://patchwork.freedesktop.org/series/143941/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: b36df02c99e3 drm-tip: 2025y-01m-24d-16h-09m-54s UTC integration manifest
=== git am output follows ===
Applying: drm/i915: Decouple i915_gem_dumb_create() from the display a bit
Applying: drm/i915: Decouple intel_fb_bo.h interfaces from driver specific types
Applying: drm/i915: Convert intel_crtc.c to struct intel_display
Applying: drm/i915: Convert intel_fb.c to struct intel_display
Applying: drm/i915: Convert intel_display_power_{get, put}*() to intel_display
Applying: drm/i915: Convert i9xx_plane.c to struct intel_display
Applying: drm/i915: Finish intel_sprite.c struct intel_display conversion
Applying: drm/i915: Convert intel_cursor.c to struct intel_display
Applying: drm/i915: Convert skl_univeral_plane.c to struct intel_display
Applying: drm/i915: Use DRM_RECT_FMT & co. for plane debugs
Applying: drm/i915: Pimp plane debugs
^ permalink raw reply [flat|nested] 23+ messages in thread* ✗ CI.checkpatch: warning for drm/i915: intel_display conversions and some debug improvements
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (11 preceding siblings ...)
2025-01-24 16:39 ` ✓ CI.Patch_applied: success for drm/i915: intel_display conversions and some debug improvements Patchwork
@ 2025-01-24 16:40 ` Patchwork
2025-01-24 16:41 ` ✓ CI.KUnit: success " Patchwork
` (6 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-01-24 16:40 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: intel_display conversions and some debug improvements
URL : https://patchwork.freedesktop.org/series/143941/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 28324956ce72b34551c55debc3c66f8b80cb327a
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Fri Jan 24 18:30:40 2025 +0200
drm/i915: Pimp plane debugs
Include the standard "[PLANE:%d:s]" stuff in all plane debugs
(or rather all I was able to find), to provide better information
on which plane we're actually talking about.
There are a few spots where we care about the CRTC as well, so
include that where appropriate.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ /mt/dim checkpatch b36df02c99e3246ba2a90e951c71797327374db7 drm-intel
84ab094f5c1b drm/i915: Decouple i915_gem_dumb_create() from the display a bit
6d197cbd9a8d drm/i915: Decouple intel_fb_bo.h interfaces from driver specific types
950e00c46c2a drm/i915: Convert intel_crtc.c to struct intel_display
777b86ea5c62 drm/i915: Convert intel_fb.c to struct intel_display
-:436: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'var' - possible side-effects?
#436: FILE: drivers/gpu/drm/i915/display/intel_fb.c:1467:
+#define assign_bfld_chk_ovf(display, var, val) ({ \
(var) = (val); \
+ drm_WARN_ON((display)->drm, (var) != (val)); \
(var); \
})
-:436: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'val' - possible side-effects?
#436: FILE: drivers/gpu/drm/i915/display/intel_fb.c:1467:
+#define assign_bfld_chk_ovf(display, var, val) ({ \
(var) = (val); \
+ drm_WARN_ON((display)->drm, (var) != (val)); \
(var); \
})
total: 0 errors, 0 warnings, 2 checks, 878 lines checked
b50116fbbf98 drm/i915: Convert intel_display_power_{get, put}*() to intel_display
-:1505: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#1505: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:299:
+#define with_intel_display_power(display, domain, wf) \
+ for ((wf) = intel_display_power_get((display), (domain)); (wf); \
+ intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
-:1505: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'domain' - possible side-effects?
#1505: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:299:
+#define with_intel_display_power(display, domain, wf) \
+ for ((wf) = intel_display_power_get((display), (domain)); (wf); \
+ intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
-:1505: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects?
#1505: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:299:
+#define with_intel_display_power(display, domain, wf) \
+ for ((wf) = intel_display_power_get((display), (domain)); (wf); \
+ intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
-:1512: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'display' - possible side-effects?
#1512: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:303:
+#define with_intel_display_power_if_enabled(display, domain, wf) \
+ for ((wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
+ intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
-:1512: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'domain' - possible side-effects?
#1512: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:303:
+#define with_intel_display_power_if_enabled(display, domain, wf) \
+ for ((wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
+ intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
-:1512: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'wf' - possible side-effects?
#1512: FILE: drivers/gpu/drm/i915/display/intel_display_power.h:303:
+#define with_intel_display_power_if_enabled(display, domain, wf) \
+ for ((wf) = intel_display_power_get_if_enabled((display), (domain)); (wf); \
+ intel_display_power_put_async((display), (domain), (wf)), (wf) = NULL)
total: 0 errors, 0 warnings, 6 checks, 2358 lines checked
99722364c6e6 drm/i915: Convert i9xx_plane.c to struct intel_display
d49ab6f2253f drm/i915: Finish intel_sprite.c struct intel_display conversion
792cbd15cea8 drm/i915: Convert intel_cursor.c to struct intel_display
e438c832733f drm/i915: Convert skl_univeral_plane.c to struct intel_display
-:1129: WARNING:IS_ENABLED_CONFIG: IS_ENABLED(I915) is normally used as IS_ENABLED(CONFIG_I915)
#1129: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:2805:
+ if (!IS_ENABLED(I915) && !HAS_FLAT_CCS(to_i915(display->drm)))
total: 0 errors, 1 warnings, 0 checks, 1221 lines checked
fcad34b21029 drm/i915: Use DRM_RECT_FMT & co. for plane debugs
-:38: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#38: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:963:
+ drm_dbg_kms(&i915->drm, "Plane (" DRM_RECT_FMT ") must cover entire CRTC (" DRM_RECT_FMT ")\n",
total: 0 errors, 1 warnings, 0 checks, 23 lines checked
28324956ce72 drm/i915: Pimp plane debugs
-:79: CHECK:CONCATENATED_STRING: Concatenated strings should use spaces between elements
#79: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:949:
+ "[PLANE:%d:%s] invalid scaling "DRM_RECT_FP_FMT " -> " DRM_RECT_FMT "\n",
-:90: WARNING:LONG_LINE: line length of 113 exceeds 100 columns
#90: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:966:
+ "[PLANE:%d:%s] plane (" DRM_RECT_FMT ") must cover entire CRTC (" DRM_RECT_FMT ")\n",
total: 0 errors, 1 warnings, 1 checks, 378 lines checked
^ permalink raw reply [flat|nested] 23+ messages in thread* ✓ CI.KUnit: success for drm/i915: intel_display conversions and some debug improvements
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (12 preceding siblings ...)
2025-01-24 16:40 ` ✗ CI.checkpatch: warning " Patchwork
@ 2025-01-24 16:41 ` Patchwork
2025-01-24 17:03 ` ✓ CI.Build: " Patchwork
` (5 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-01-24 16:41 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: intel_display conversions and some debug improvements
URL : https://patchwork.freedesktop.org/series/143941/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:40:18] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:40:22] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[16:40:48] Starting KUnit Kernel (1/1)...
[16:40:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:40:48] ================== guc_buf (11 subtests) ===================
[16:40:48] [PASSED] test_smallest
[16:40:48] [PASSED] test_largest
[16:40:48] [PASSED] test_granular
[16:40:48] [PASSED] test_unique
[16:40:48] [PASSED] test_overlap
[16:40:48] [PASSED] test_reusable
[16:40:48] [PASSED] test_too_big
[16:40:48] [PASSED] test_flush
[16:40:48] [PASSED] test_lookup
[16:40:48] [PASSED] test_data
[16:40:48] [PASSED] test_class
[16:40:48] ===================== [PASSED] guc_buf =====================
[16:40:48] =================== guc_dbm (7 subtests) ===================
[16:40:48] [PASSED] test_empty
[16:40:48] [PASSED] test_default
[16:40:48] ======================== test_size ========================
[16:40:48] [PASSED] 4
[16:40:48] [PASSED] 8
[16:40:48] [PASSED] 32
[16:40:48] [PASSED] 256
[16:40:48] ==================== [PASSED] test_size ====================
[16:40:48] ======================= test_reuse ========================
[16:40:48] [PASSED] 4
[16:40:48] [PASSED] 8
[16:40:48] [PASSED] 32
[16:40:48] [PASSED] 256
[16:40:48] =================== [PASSED] test_reuse ====================
[16:40:48] =================== test_range_overlap ====================
[16:40:48] [PASSED] 4
[16:40:48] [PASSED] 8
[16:40:48] [PASSED] 32
[16:40:48] [PASSED] 256
[16:40:48] =============== [PASSED] test_range_overlap ================
[16:40:48] =================== test_range_compact ====================
[16:40:48] [PASSED] 4
[16:40:48] [PASSED] 8
[16:40:48] [PASSED] 32
[16:40:48] [PASSED] 256
[16:40:48] =============== [PASSED] test_range_compact ================
[16:40:48] ==================== test_range_spare =====================
[16:40:48] [PASSED] 4
[16:40:48] [PASSED] 8
[16:40:48] [PASSED] 32
[16:40:48] [PASSED] 256
[16:40:48] ================ [PASSED] test_range_spare =================
[16:40:48] ===================== [PASSED] guc_dbm =====================
[16:40:48] =================== guc_idm (6 subtests) ===================
[16:40:48] [PASSED] bad_init
[16:40:48] [PASSED] no_init
[16:40:48] [PASSED] init_fini
[16:40:48] [PASSED] check_used
[16:40:48] [PASSED] check_quota
[16:40:48] [PASSED] check_all
[16:40:48] ===================== [PASSED] guc_idm =====================
[16:40:48] ================== no_relay (3 subtests) ===================
[16:40:48] [PASSED] xe_drops_guc2pf_if_not_ready
[16:40:48] [PASSED] xe_drops_guc2vf_if_not_ready
[16:40:48] [PASSED] xe_rejects_send_if_not_ready
[16:40:48] ==================== [PASSED] no_relay =====================
[16:40:48] ================== pf_relay (14 subtests) ==================
[16:40:48] [PASSED] pf_rejects_guc2pf_too_short
[16:40:48] [PASSED] pf_rejects_guc2pf_too_long
[16:40:48] [PASSED] pf_rejects_guc2pf_no_payload
[16:40:48] [PASSED] pf_fails_no_payload
[16:40:48] [PASSED] pf_fails_bad_origin
[16:40:48] [PASSED] pf_fails_bad_type
[16:40:48] [PASSED] pf_txn_reports_error
[16:40:48] [PASSED] pf_txn_sends_pf2guc
[16:40:48] [PASSED] pf_sends_pf2guc
[16:40:48] [SKIPPED] pf_loopback_nop
[16:40:48] [SKIPPED] pf_loopback_echo
[16:40:48] [SKIPPED] pf_loopback_fail
[16:40:48] [SKIPPED] pf_loopback_busy
[16:40:48] [SKIPPED] pf_loopback_retry
[16:40:48] ==================== [PASSED] pf_relay =====================
[16:40:48] ================== vf_relay (3 subtests) ===================
[16:40:48] [PASSED] vf_rejects_guc2vf_too_short
[16:40:48] [PASSED] vf_rejects_guc2vf_too_long
[16:40:48] [PASSED] vf_rejects_guc2vf_no_payload
[16:40:48] ==================== [PASSED] vf_relay =====================
[16:40:48] ================= pf_service (11 subtests) =================
[16:40:48] [PASSED] pf_negotiate_any
[16:40:48] [PASSED] pf_negotiate_base_match
[16:40:48] [PASSED] pf_negotiate_base_newer
[16:40:48] [PASSED] pf_negotiate_base_next
[16:40:48] [SKIPPED] pf_negotiate_base_older
[16:40:48] [PASSED] pf_negotiate_base_prev
[16:40:48] [PASSED] pf_negotiate_latest_match
[16:40:48] [PASSED] pf_negotiate_latest_newer
[16:40:48] [PASSED] pf_negotiate_latest_next
[16:40:48] [SKIPPED] pf_negotiate_latest_older
[16:40:48] [SKIPPED] pf_negotiate_latest_prev
[16:40:48] =================== [PASSED] pf_service ====================
[16:40:48] ===================== lmtt (1 subtest) =====================
[16:40:48] ======================== test_ops =========================
[16:40:48] [PASSED] 2-level
[16:40:48] [PASSED] multi-level
[16:40:48] ==================== [PASSED] test_ops =====================
[16:40:48] ====================== [PASSED] lmtt =======================
[16:40:48] =================== xe_mocs (2 subtests) ===================
[16:40:48] ================ xe_live_mocs_kernel_kunit ================
[16:40:48] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:40:48] ================ xe_live_mocs_reset_kunit =================
[16:40:48] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:40:48] ==================== [SKIPPED] xe_mocs =====================
[16:40:48] ================= xe_migrate (2 subtests) ==================
[16:40:48] ================= xe_migrate_sanity_kunit =================
[16:40:48] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:40:48] ================== xe_validate_ccs_kunit ==================
[16:40:48] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:40:48] =================== [SKIPPED] xe_migrate ===================
[16:40:48] ================== xe_dma_buf (1 subtest) ==================
[16:40:48] ==================== xe_dma_buf_kunit =====================
[16:40:48] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:40:48] =================== [SKIPPED] xe_dma_buf ===================
[16:40:48] ================= xe_bo_shrink (1 subtest) =================
[16:40:48] =================== xe_bo_shrink_kunit ====================
[16:40:48] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:40:48] ================== [SKIPPED] xe_bo_shrink ==================
[16:40:48] ==================== xe_bo (2 subtests) ====================
[16:40:48] ================== xe_ccs_migrate_kunit ===================
[16:40:48] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
stty: 'standard input': Inappropriate ioctl for device
[16:40:48] ==================== xe_bo_evict_kunit ====================
[16:40:48] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:40:48] ===================== [SKIPPED] xe_bo ======================
[16:40:48] ==================== args (11 subtests) ====================
[16:40:48] [PASSED] count_args_test
[16:40:48] [PASSED] call_args_example
[16:40:48] [PASSED] call_args_test
[16:40:48] [PASSED] drop_first_arg_example
[16:40:48] [PASSED] drop_first_arg_test
[16:40:48] [PASSED] first_arg_example
[16:40:48] [PASSED] first_arg_test
[16:40:48] [PASSED] last_arg_example
[16:40:48] [PASSED] last_arg_test
[16:40:48] [PASSED] pick_arg_example
[16:40:48] [PASSED] sep_comma_example
[16:40:48] ====================== [PASSED] args =======================
[16:40:48] =================== xe_pci (2 subtests) ====================
[16:40:48] [PASSED] xe_gmdid_graphics_ip
[16:40:48] [PASSED] xe_gmdid_media_ip
[16:40:48] ===================== [PASSED] xe_pci ======================
[16:40:48] =================== xe_rtp (2 subtests) ====================
[16:40:48] =============== xe_rtp_process_to_sr_tests ================
[16:40:48] [PASSED] coalesce-same-reg
[16:40:48] [PASSED] no-match-no-add
[16:40:48] [PASSED] match-or
[16:40:48] [PASSED] match-or-xfail
[16:40:48] [PASSED] no-match-no-add-multiple-rules
[16:40:48] [PASSED] two-regs-two-entries
[16:40:48] [PASSED] clr-one-set-other
[16:40:48] [PASSED] set-field
[16:40:48] [PASSED] conflict-duplicate
[16:40:48] [PASSED] conflict-not-disjoint
[16:40:48] [PASSED] conflict-reg-type
[16:40:48] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:40:48] ================== xe_rtp_process_tests ===================
[16:40:48] [PASSED] active1
[16:40:48] [PASSED] active2
[16:40:48] [PASSED] active-inactive
[16:40:48] [PASSED] inactive-active
[16:40:48] [PASSED] inactive-1st_or_active-inactive
[16:40:48] [PASSED] inactive-2nd_or_active-inactive
[16:40:48] [PASSED] inactive-last_or_active-inactive
[16:40:48] [PASSED] inactive-no_or_active-inactive
[16:40:48] ============== [PASSED] xe_rtp_process_tests ===============
[16:40:48] ===================== [PASSED] xe_rtp ======================
[16:40:48] ==================== xe_wa (1 subtest) =====================
[16:40:48] ======================== xe_wa_gt =========================
[16:40:48] [PASSED] TIGERLAKE (B0)
[16:40:48] [PASSED] DG1 (A0)
[16:40:48] [PASSED] DG1 (B0)
[16:40:48] [PASSED] ALDERLAKE_S (A0)
[16:40:48] [PASSED] ALDERLAKE_S (B0)
[16:40:48] [PASSED] ALDERLAKE_S (C0)
[16:40:48] [PASSED] ALDERLAKE_S (D0)
[16:40:48] [PASSED] ALDERLAKE_P (A0)
[16:40:48] [PASSED] ALDERLAKE_P (B0)
[16:40:48] [PASSED] ALDERLAKE_P (C0)
[16:40:48] [PASSED] ALDERLAKE_S_RPLS (D0)
[16:40:48] [PASSED] ALDERLAKE_P_RPLU (E0)
[16:40:48] [PASSED] DG2_G10 (C0)
[16:40:48] [PASSED] DG2_G11 (B1)
[16:40:48] [PASSED] DG2_G12 (A1)
[16:40:48] [PASSED] METEORLAKE (g:A0, m:A0)
[16:40:48] [PASSED] METEORLAKE (g:A0, m:A0)
[16:40:48] [PASSED] METEORLAKE (g:A0, m:A0)
[16:40:48] [PASSED] LUNARLAKE (g:A0, m:A0)
[16:40:48] [PASSED] LUNARLAKE (g:B0, m:A0)
[16:40:48] [PASSED] BATTLEMAGE (g:A0, m:A1)
[16:40:48] ==================== [PASSED] xe_wa_gt =====================
[16:40:48] ====================== [PASSED] xe_wa ======================
[16:40:48] ============================================================
[16:40:48] Testing complete. Ran 133 tests: passed: 117, skipped: 16
[16:40:48] Elapsed time: 30.042s total, 4.187s configuring, 25.588s building, 0.258s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:40:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:40:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[16:41:11] Starting KUnit Kernel (1/1)...
[16:41:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:41:11] =========== drm_validate_clone_mode (2 subtests) ===========
[16:41:11] ============== drm_test_check_in_clone_mode ===============
[16:41:11] [PASSED] in_clone_mode
[16:41:11] [PASSED] not_in_clone_mode
[16:41:11] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:41:11] =============== drm_test_check_valid_clones ===============
[16:41:11] [PASSED] not_in_clone_mode
[16:41:11] [PASSED] valid_clone
[16:41:11] [PASSED] invalid_clone
[16:41:11] =========== [PASSED] drm_test_check_valid_clones ===========
[16:41:11] ============= [PASSED] drm_validate_clone_mode =============
[16:41:11] ============= drm_validate_modeset (1 subtest) =============
[16:41:11] [PASSED] drm_test_check_connector_changed_modeset
[16:41:11] ============== [PASSED] drm_validate_modeset ===============
[16:41:11] ================== drm_buddy (7 subtests) ==================
[16:41:11] [PASSED] drm_test_buddy_alloc_limit
[16:41:11] [PASSED] drm_test_buddy_alloc_optimistic
[16:41:11] [PASSED] drm_test_buddy_alloc_pessimistic
[16:41:11] [PASSED] drm_test_buddy_alloc_pathological
[16:41:11] [PASSED] drm_test_buddy_alloc_contiguous
[16:41:11] [PASSED] drm_test_buddy_alloc_clear
[16:41:11] [PASSED] drm_test_buddy_alloc_range_bias
[16:41:11] ==================== [PASSED] drm_buddy ====================
[16:41:11] ============= drm_cmdline_parser (40 subtests) =============
[16:41:11] [PASSED] drm_test_cmdline_force_d_only
[16:41:11] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:41:11] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:41:11] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:41:11] [PASSED] drm_test_cmdline_force_e_only
[16:41:11] [PASSED] drm_test_cmdline_res
[16:41:11] [PASSED] drm_test_cmdline_res_vesa
[16:41:11] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:41:11] [PASSED] drm_test_cmdline_res_rblank
[16:41:11] [PASSED] drm_test_cmdline_res_bpp
[16:41:11] [PASSED] drm_test_cmdline_res_refresh
[16:41:11] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:41:11] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:41:11] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:41:11] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:41:11] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:41:11] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:41:11] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:41:11] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:41:11] [PASSED] drm_test_cmdline_res_margins_force_on
[16:41:11] [PASSED] drm_test_cmdline_res_vesa_margins
[16:41:11] [PASSED] drm_test_cmdline_name
[16:41:11] [PASSED] drm_test_cmdline_name_bpp
[16:41:11] [PASSED] drm_test_cmdline_name_option
[16:41:11] [PASSED] drm_test_cmdline_name_bpp_option
[16:41:11] [PASSED] drm_test_cmdline_rotate_0
[16:41:11] [PASSED] drm_test_cmdline_rotate_90
[16:41:11] [PASSED] drm_test_cmdline_rotate_180
[16:41:11] [PASSED] drm_test_cmdline_rotate_270
[16:41:11] [PASSED] drm_test_cmdline_hmirror
[16:41:11] [PASSED] drm_test_cmdline_vmirror
[16:41:11] [PASSED] drm_test_cmdline_margin_options
[16:41:11] [PASSED] drm_test_cmdline_multiple_options
[16:41:11] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:41:11] [PASSED] drm_test_cmdline_extra_and_option
[16:41:11] [PASSED] drm_test_cmdline_freestanding_options
[16:41:11] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:41:11] [PASSED] drm_test_cmdline_panel_orientation
[16:41:11] ================ drm_test_cmdline_invalid =================
[16:41:11] [PASSED] margin_only
[16:41:11] [PASSED] interlace_only
[16:41:11] [PASSED] res_missing_x
[16:41:11] [PASSED] res_missing_y
[16:41:11] [PASSED] res_bad_y
[16:41:11] [PASSED] res_missing_y_bpp
[16:41:11] [PASSED] res_bad_bpp
[16:41:11] [PASSED] res_bad_refresh
[16:41:11] [PASSED] res_bpp_refresh_force_on_off
[16:41:11] [PASSED] res_invalid_mode
[16:41:11] [PASSED] res_bpp_wrong_place_mode
[16:41:11] [PASSED] name_bpp_refresh
[16:41:11] [PASSED] name_refresh
[16:41:11] [PASSED] name_refresh_wrong_mode
[16:41:11] [PASSED] name_refresh_invalid_mode
[16:41:11] [PASSED] rotate_multiple
[16:41:11] [PASSED] rotate_invalid_val
[16:41:11] [PASSED] rotate_truncated
[16:41:11] [PASSED] invalid_option
[16:41:11] [PASSED] invalid_tv_option
[16:41:11] [PASSED] truncated_tv_option
[16:41:11] ============ [PASSED] drm_test_cmdline_invalid =============
[16:41:11] =============== drm_test_cmdline_tv_options ===============
[16:41:11] [PASSED] NTSC
[16:41:11] [PASSED] NTSC_443
[16:41:11] [PASSED] NTSC_J
[16:41:11] [PASSED] PAL
[16:41:11] [PASSED] PAL_M
[16:41:11] [PASSED] PAL_N
[16:41:11] [PASSED] SECAM
[16:41:11] [PASSED] MONO_525
[16:41:11] [PASSED] MONO_625
[16:41:11] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:41:11] =============== [PASSED] drm_cmdline_parser ================
[16:41:11] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:41:11] [PASSED] drm_test_connector_hdmi_init_valid
[16:41:11] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:41:11] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:41:11] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:41:11] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:41:11] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:41:11] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:41:11] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:41:11] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:41:11] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:41:11] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:41:11] [PASSED] supported_formats=0x3 yuv420_allowed=1
[16:41:11] [PASSED] supported_formats=0x3 yuv420_allowed=0
[16:41:11] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:41:11] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:41:11] [PASSED] drm_test_connector_hdmi_init_null_product
[16:41:11] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:41:11] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:41:11] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:41:11] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:41:11] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:41:11] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:41:11] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:41:11] ========= drm_test_connector_hdmi_init_type_valid =========
[16:41:11] [PASSED] HDMI-A
[16:41:11] [PASSED] HDMI-B
[16:41:11] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:41:11] ======== drm_test_connector_hdmi_init_type_invalid ========
[16:41:11] [PASSED] Unknown
[16:41:11] [PASSED] VGA
[16:41:11] [PASSED] DVI-I
[16:41:11] [PASSED] DVI-D
[16:41:11] [PASSED] DVI-A
[16:41:11] [PASSED] Composite
[16:41:11] [PASSED] SVIDEO
[16:41:11] [PASSED] LVDS
[16:41:11] [PASSED] Component
[16:41:11] [PASSED] DIN
[16:41:11] [PASSED] DP
[16:41:11] [PASSED] TV
[16:41:11] [PASSED] eDP
[16:41:11] [PASSED] Virtual
[16:41:11] [PASSED] DSI
[16:41:11] [PASSED] DPI
[16:41:11] [PASSED] Writeback
[16:41:11] [PASSED] SPI
[16:41:11] [PASSED] USB
[16:41:11] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:41:11] ============ [PASSED] drmm_connector_hdmi_init =============
[16:41:11] ============= drmm_connector_init (3 subtests) =============
[16:41:11] [PASSED] drm_test_drmm_connector_init
[16:41:11] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:41:11] ========= drm_test_drmm_connector_init_type_valid =========
[16:41:11] [PASSED] Unknown
[16:41:11] [PASSED] VGA
[16:41:11] [PASSED] DVI-I
[16:41:11] [PASSED] DVI-D
[16:41:11] [PASSED] DVI-A
[16:41:11] [PASSED] Composite
[16:41:11] [PASSED] SVIDEO
[16:41:11] [PASSED] LVDS
[16:41:11] [PASSED] Component
[16:41:11] [PASSED] DIN
[16:41:11] [PASSED] DP
[16:41:11] [PASSED] HDMI-A
[16:41:11] [PASSED] HDMI-B
[16:41:11] [PASSED] TV
[16:41:11] [PASSED] eDP
[16:41:11] [PASSED] Virtual
[16:41:11] [PASSED] DSI
[16:41:11] [PASSED] DPI
[16:41:11] [PASSED] Writeback
[16:41:11] [PASSED] SPI
[16:41:11] [PASSED] USB
[16:41:11] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:41:11] =============== [PASSED] drmm_connector_init ===============
[16:41:11] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_init
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:41:11] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[16:41:11] [PASSED] Unknown
[16:41:11] [PASSED] VGA
[16:41:11] [PASSED] DVI-I
[16:41:11] [PASSED] DVI-D
[16:41:11] [PASSED] DVI-A
[16:41:11] [PASSED] Composite
[16:41:11] [PASSED] SVIDEO
[16:41:11] [PASSED] LVDS
[16:41:11] [PASSED] Component
[16:41:11] [PASSED] DIN
[16:41:11] [PASSED] DP
[16:41:11] [PASSED] HDMI-A
[16:41:11] [PASSED] HDMI-B
[16:41:11] [PASSED] TV
[16:41:11] [PASSED] eDP
[16:41:11] [PASSED] Virtual
[16:41:11] [PASSED] DSI
[16:41:11] [PASSED] DPI
[16:41:11] [PASSED] Writeback
[16:41:11] [PASSED] SPI
[16:41:11] [PASSED] USB
[16:41:11] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:41:11] ======== drm_test_drm_connector_dynamic_init_name =========
[16:41:11] [PASSED] Unknown
[16:41:11] [PASSED] VGA
[16:41:11] [PASSED] DVI-I
[16:41:11] [PASSED] DVI-D
[16:41:11] [PASSED] DVI-A
[16:41:11] [PASSED] Composite
[16:41:11] [PASSED] SVIDEO
[16:41:11] [PASSED] LVDS
[16:41:11] [PASSED] Component
[16:41:11] [PASSED] DIN
[16:41:11] [PASSED] DP
[16:41:11] [PASSED] HDMI-A
[16:41:11] [PASSED] HDMI-B
[16:41:11] [PASSED] TV
[16:41:11] [PASSED] eDP
[16:41:11] [PASSED] Virtual
[16:41:11] [PASSED] DSI
[16:41:11] [PASSED] DPI
[16:41:11] [PASSED] Writeback
[16:41:11] [PASSED] SPI
[16:41:11] [PASSED] USB
[16:41:11] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:41:11] =========== [PASSED] drm_connector_dynamic_init ============
[16:41:11] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:41:11] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:41:11] ======= drm_connector_dynamic_register (7 subtests) ========
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:41:11] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:41:11] ========= [PASSED] drm_connector_dynamic_register ==========
[16:41:11] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:41:11] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:41:11] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:41:11] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:41:11] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:41:11] ========== drm_test_get_tv_mode_from_name_valid ===========
[16:41:11] [PASSED] NTSC
[16:41:11] [PASSED] NTSC-443
[16:41:11] [PASSED] NTSC-J
[16:41:11] [PASSED] PAL
[16:41:11] [PASSED] PAL-M
[16:41:11] [PASSED] PAL-N
[16:41:11] [PASSED] SECAM
[16:41:11] [PASSED] Mono
[16:41:11] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:41:11] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:41:11] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:41:11] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:41:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:41:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:41:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:41:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:41:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:41:11] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:41:11] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[16:41:11] [PASSED] VIC 96
[16:41:11] [PASSED] VIC 97
[16:41:11] [PASSED] VIC 101
[16:41:11] [PASSED] VIC 102
[16:41:11] [PASSED] VIC 106
[16:41:11] [PASSED] VIC 107
[16:41:11] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:41:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:41:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:41:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:41:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:41:11] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:41:11] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:41:11] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:41:11] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[16:41:11] [PASSED] Automatic
[16:41:11] [PASSED] Full
[16:41:11] [PASSED] Limited 16:235
[16:41:11] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:41:11] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:41:11] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:41:11] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:41:11] === drm_test_drm_hdmi_connector_get_output_format_name ====
[16:41:11] [PASSED] RGB
[16:41:11] [PASSED] YUV 4:2:0
[16:41:11] [PASSED] YUV 4:2:2
[16:41:11] [PASSED] YUV 4:4:4
[16:41:11] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:41:11] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:41:11] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:41:11] ============= drm_damage_helper (21 subtests) ==============
[16:41:11] [PASSED] drm_test_damage_iter_no_damage
[16:41:11] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:41:11] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:41:11] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:41:11] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:41:11] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:41:11] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:41:11] [PASSED] drm_test_damage_iter_simple_damage
[16:41:11] [PASSED] drm_test_damage_iter_single_damage
[16:41:11] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:41:11] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:41:11] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:41:11] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:41:11] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:41:11] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:41:11] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:41:11] [PASSED] drm_test_damage_iter_damage
[16:41:11] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:41:11] [PASSED] drm_test_damage_iter_damage_one_outside
[16:41:11] [PASSED] drm_test_damage_iter_damage_src_moved
[16:41:11] [PASSED] drm_test_damage_iter_damage_not_visible
[16:41:11] ================ [PASSED] drm_damage_helper ================
[16:41:11] ============== drm_dp_mst_helper (3 subtests) ==============
[16:41:11] ============== drm_test_dp_mst_calc_pbn_mode ==============
[16:41:11] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:41:11] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:41:11] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:41:11] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:41:11] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:41:11] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:41:11] ============== drm_test_dp_mst_calc_pbn_div ===============
[16:41:11] [PASSED] Link rate 2000000 lane count 4
[16:41:11] [PASSED] Link rate 2000000 lane count 2
[16:41:11] [PASSED] Link rate 2000000 lane count 1
[16:41:11] [PASSED] Link rate 1350000 lane count 4
[16:41:11] [PASSED] Link rate 1350000 lane count 2
[16:41:11] [PASSED] Link rate 1350000 lane count 1
[16:41:11] [PASSED] Link rate 1000000 lane count 4
[16:41:11] [PASSED] Link rate 1000000 lane count 2
[16:41:11] [PASSED] Link rate 1000000 lane count 1
[16:41:11] [PASSED] Link rate 810000 lane count 4
[16:41:11] [PASSED] Link rate 810000 lane count 2
[16:41:11] [PASSED] Link rate 810000 lane count 1
[16:41:11] [PASSED] Link rate 540000 lane count 4
[16:41:11] [PASSED] Link rate 540000 lane count 2
[16:41:11] [PASSED] Link rate 540000 lane count 1
[16:41:11] [PASSED] Link rate 270000 lane count 4
[16:41:11] [PASSED] Link rate 270000 lane count 2
[16:41:11] [PASSED] Link rate 270000 lane count 1
[16:41:11] [PASSED] Link rate 162000 lane count 4
[16:41:11] [PASSED] Link rate 162000 lane count 2
[16:41:11] [PASSED] Link rate 162000 lane count 1
[16:41:11] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:41:11] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[16:41:11] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:41:11] [PASSED] DP_POWER_UP_PHY with port number
[16:41:11] [PASSED] DP_POWER_DOWN_PHY with port number
[16:41:11] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:41:11] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:41:11] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:41:11] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:41:11] [PASSED] DP_QUERY_PAYLOAD with port number
[16:41:11] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:41:11] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:41:11] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:41:11] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:41:11] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:41:11] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:41:11] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:41:11] [PASSED] DP_REMOTE_I2C_READ with port number
[16:41:11] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:41:11] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:41:11] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:41:11] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:41:11] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:41:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:41:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:41:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:41:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:41:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:41:11] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:41:11] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:41:11] ================ [PASSED] drm_dp_mst_helper ================
[16:41:11] ================== drm_exec (7 subtests) ===================
[16:41:11] [PASSED] sanitycheck
[16:41:11] [PASSED] test_lock
[16:41:11] [PASSED] test_lock_unlock
[16:41:11] [PASSED] test_duplicates
[16:41:11] [PASSED] test_prepare
[16:41:11] [PASSED] test_prepare_array
[16:41:11] [PASSED] test_multiple_loops
[16:41:11] ==================== [PASSED] drm_exec =====================
[16:41:11] =========== drm_format_helper_test (17 subtests) ===========
[16:41:11] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:41:11] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:41:11] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:41:11] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:41:11] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:41:11] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:41:11] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:41:11] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:41:11] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:41:11] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:41:11] ============== drm_test_fb_xrgb8888_to_mono ===============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:41:11] ==================== drm_test_fb_swab =====================
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ================ [PASSED] drm_test_fb_swab =================
[16:41:11] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:41:11] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[16:41:11] [PASSED] single_pixel_source_buffer
[16:41:11] [PASSED] single_pixel_clip_rectangle
[16:41:11] [PASSED] well_known_colors
[16:41:11] [PASSED] destination_pitch
[16:41:11] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:41:11] ================= drm_test_fb_clip_offset =================
[16:41:11] [PASSED] pass through
[16:41:11] [PASSED] horizontal offset
[16:41:11] [PASSED] vertical offset
[16:41:11] [PASSED] horizontal and vertical offset
[16:41:11] [PASSED] horizontal offset (custom pitch)
[16:41:11] [PASSED] vertical offset (custom pitch)
[16:41:11] [PASSED] horizontal and vertical offset (custom pitch)
[16:41:11] ============= [PASSED] drm_test_fb_clip_offset =============
[16:41:11] ============== drm_test_fb_build_fourcc_list ==============
[16:41:11] [PASSED] no native formats
[16:41:11] [PASSED] XRGB8888 as native format
[16:41:11] [PASSED] remove duplicates
[16:41:11] [PASSED] convert alpha formats
[16:41:11] [PASSED] random formats
[16:41:11] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[16:41:11] =================== drm_test_fb_memcpy ====================
[16:41:11] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:41:11] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:41:11] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:41:11] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:41:11] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:41:11] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:41:11] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:41:11] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:41:11] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:41:11] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:41:11] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:41:11] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:41:11] =============== [PASSED] drm_test_fb_memcpy ================
[16:41:11] ============= [PASSED] drm_format_helper_test ==============
[16:41:11] ================= drm_format (18 subtests) =================
[16:41:11] [PASSED] drm_test_format_block_width_invalid
[16:41:11] [PASSED] drm_test_format_block_width_one_plane
[16:41:11] [PASSED] drm_test_format_block_width_two_plane
[16:41:11] [PASSED] drm_test_format_block_width_three_plane
[16:41:11] [PASSED] drm_test_format_block_width_tiled
[16:41:11] [PASSED] drm_test_format_block_height_invalid
[16:41:11] [PASSED] drm_test_format_block_height_one_plane
[16:41:11] [PASSED] drm_test_format_block_height_two_plane
[16:41:11] [PASSED] drm_test_format_block_height_three_plane
[16:41:11] [PASSED] drm_test_format_block_height_tiled
[16:41:11] [PASSED] drm_test_format_min_pitch_invalid
[16:41:11] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:41:11] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:41:11] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:41:11] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:41:11] [PASSED] drm_test_format_min_pitch_two_plane
[16:41:11] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:41:11] [PASSED] drm_test_format_min_pitch_tiled
[16:41:11] =================== [PASSED] drm_format ====================
[16:41:11] ============== drm_framebuffer (10 subtests) ===============
[16:41:11] ========== drm_test_framebuffer_check_src_coords ==========
[16:41:11] [PASSED] Success: source fits into fb
[16:41:11] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:41:11] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:41:11] [PASSED] Fail: overflowing fb with source width
[16:41:11] [PASSED] Fail: overflowing fb with source height
[16:41:11] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:41:11] [PASSED] drm_test_framebuffer_cleanup
[16:41:11] =============== drm_test_framebuffer_create ===============
[16:41:11] [PASSED] ABGR8888 normal sizes
[16:41:11] [PASSED] ABGR8888 max sizes
[16:41:11] [PASSED] ABGR8888 pitch greater than min required
[16:41:11] [PASSED] ABGR8888 pitch less than min required
[16:41:11] [PASSED] ABGR8888 Invalid width
[16:41:11] [PASSED] ABGR8888 Invalid buffer handle
[16:41:11] [PASSED] No pixel format
[16:41:11] [PASSED] ABGR8888 Width 0
[16:41:11] [PASSED] ABGR8888 Height 0
[16:41:11] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:41:11] [PASSED] ABGR8888 Large buffer offset
[16:41:11] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:41:11] [PASSED] ABGR8888 Invalid flag
[16:41:11] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:41:11] [PASSED] ABGR8888 Valid buffer modifier
[16:41:11] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:41:11] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:41:11] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:41:11] [PASSED] NV12 Normal sizes
[16:41:11] [PASSED] NV12 Max sizes
[16:41:11] [PASSED] NV12 Invalid pitch
[16:41:11] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:41:11] [PASSED] NV12 different modifier per-plane
[16:41:11] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:41:11] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:41:11] [PASSED] NV12 Modifier for inexistent plane
[16:41:11] [PASSED] NV12 Handle for inexistent plane
[16:41:11] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:41:11] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:41:11] [PASSED] YVU420 Normal sizes
[16:41:11] [PASSED] YVU420 Max sizes
[16:41:11] [PASSED] YVU420 Invalid pitch
[16:41:11] [PASSED] YVU420 Different pitches
[16:41:11] [PASSED] YVU420 Different buffer offsets/pitches
[16:41:11] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:41:11] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:41:11] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:41:11] [PASSED] YVU420 Valid modifier
[16:41:11] [PASSED] YVU420 Different modifiers per plane
[16:41:11] [PASSED] YVU420 Modifier for inexistent plane
[16:41:11] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:41:11] [PASSED] X0L2 Normal sizes
[16:41:11] [PASSED] X0L2 Max sizes
[16:41:11] [PASSED] X0L2 Invalid pitch
[16:41:11] [PASSED] X0L2 Pitch greater than minimum required
[16:41:11] [PASSED] X0L2 Handle for inexistent plane
[16:41:11] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:41:11] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:41:11] [PASSED] X0L2 Valid modifier
[16:41:11] [PASSED] X0L2 Modifier for inexistent plane
[16:41:11] =========== [PASSED] drm_test_framebuffer_create ===========
[16:41:11] [PASSED] drm_test_framebuffer_free
[16:41:11] [PASSED] drm_test_framebuffer_init
[16:41:11] [PASSED] drm_test_framebuffer_init_bad_format
[16:41:11] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:41:11] [PASSED] drm_test_framebuffer_lookup
[16:41:11] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:41:11] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:41:11] ================= [PASSED] drm_framebuffer =================
[16:41:11] ================ drm_gem_shmem (8 subtests) ================
[16:41:11] [PASSED] drm_gem_shmem_test_obj_create
[16:41:11] [PASSED] drm_gem_shmem_test_obj_create_private
[16:41:11] [PASSED] drm_gem_shmem_test_pin_pages
[16:41:11] [PASSED] drm_gem_shmem_test_vmap
[16:41:11] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:41:11] [PASSED] drm_gem_shmem_test_get_sg_table
[16:41:11] [PASSED] drm_gem_shmem_test_madvise
[16:41:11] [PASSED] drm_gem_shmem_test_purge
[16:41:11] ================== [PASSED] drm_gem_shmem ==================
[16:41:11] === drm_atomic_helper_connector_hdmi_check (23 subtests) ===
[16:41:11] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:41:11] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:41:11] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:41:11] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:41:11] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:41:11] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:41:11] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:41:11] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:41:11] [PASSED] drm_test_check_disable_connector
[16:41:11] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:41:11] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback
[16:41:11] [PASSED] drm_test_check_max_tmds_rate_format_fallback
[16:41:11] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:41:11] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:41:11] [PASSED] drm_test_check_output_bpc_dvi
[16:41:11] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:41:11] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:41:11] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:41:11] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:41:11] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:41:11] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:41:11] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:41:11] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:41:11] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:41:11] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:41:11] [PASSED] drm_test_check_broadcast_rgb_value
[16:41:11] [PASSED] drm_test_check_bpc_8_value
[16:41:11] [PASSED] drm_test_check_bpc_10_value
[16:41:11] [PASSED] drm_test_check_bpc_12_value
[16:41:11] [PASSED] drm_test_check_format_value
[16:41:11] [PASSED] drm_test_check_tmds_char_value
[16:41:11] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:41:11] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[16:41:11] [PASSED] drm_test_check_mode_valid
[16:41:11] [PASSED] drm_test_check_mode_valid_reject
[16:41:11] [PASSED] drm_test_check_mode_valid_reject_rate
[16:41:11] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:41:11] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:41:11] ================= drm_managed (2 subtests) =================
[16:41:11] [PASSED] drm_test_managed_release_action
[16:41:11] [PASSED] drm_test_managed_run_action
[16:41:11] =================== [PASSED] drm_managed ===================
[16:41:11] =================== drm_mm (6 subtests) ====================
[16:41:11] [PASSED] drm_test_mm_init
[16:41:11] [PASSED] drm_test_mm_debug
[16:41:11] [PASSED] drm_test_mm_align32
[16:41:11] [PASSED] drm_test_mm_align64
[16:41:11] [PASSED] drm_test_mm_lowest
[16:41:11] [PASSED] drm_test_mm_highest
[16:41:11] ===================== [PASSED] drm_mm ======================
[16:41:11] ============= drm_modes_analog_tv (5 subtests) =============
[16:41:11] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:41:11] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:41:11] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:41:11] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:41:11] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:41:11] =============== [PASSED] drm_modes_analog_tv ===============
[16:41:11] ============== drm_plane_helper (2 subtests) ===============
[16:41:11] =============== drm_test_check_plane_state ================
[16:41:11] [PASSED] clipping_simple
[16:41:11] [PASSED] clipping_rotate_reflect
[16:41:11] [PASSED] positioning_simple
[16:41:11] [PASSED] upscaling
[16:41:11] [PASSED] downscaling
[16:41:11] [PASSED] rounding1
[16:41:11] [PASSED] rounding2
[16:41:11] [PASSED] rounding3
[16:41:11] [PASSED] rounding4
[16:41:11] =========== [PASSED] drm_test_check_plane_state ============
[16:41:11] =========== drm_test_check_invalid_plane_state ============
[16:41:11] [PASSED] positioning_invalid
[16:41:11] [PASSED] upscaling_invalid
[16:41:11] [PASSED] downscaling_invalid
[16:41:11] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:41:11] ================ [PASSED] drm_plane_helper =================
[16:41:11] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:41:11] ====== drm_test_connector_helper_tv_get_modes_check =======
[16:41:11] [PASSED] None
[16:41:11] [PASSED] PAL
[16:41:11] [PASSED] NTSC
[16:41:11] [PASSED] Both, NTSC Default
[16:41:11] [PASSED] Both, PAL Default
[16:41:11] [PASSED] Both, NTSC Default, with PAL on command-line
[16:41:11] [PASSED] Both, PAL Default, with NTSC on command-line
[16:41:11] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:41:11] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:41:11] ================== drm_rect (9 subtests) ===================
[16:41:11] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:41:11] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:41:11] [PASSED] drm_test_rect_clip_scaled_clipped
[16:41:11] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:41:11] ================= drm_test_rect_intersect =================
[16:41:11] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:41:11] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:41:11] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:41:11] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:41:11] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:41:11] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:41:11] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:41:11] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:41:11] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:41:11] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:41:11] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:41:11] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:41:11] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:41:11] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:41:11] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:41:11] ============= [PASSED] drm_test_rect_intersect =============
[16:41:11] ================ drm_test_rect_calc_hscale ================
[16:41:11] [PASSED] normal use
[16:41:11] [PASSED] out of max range
[16:41:11] [PASSED] out of min range
[16:41:11] [PASSED] zero dst
[16:41:11] [PASSED] negative src
[16:41:11] [PASSED] negative dst
[16:41:11] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:41:11] ================ drm_test_rect_calc_vscale ================
[16:41:11] [PASSED] normal use
[16:41:11] [PASSED] out of max range
[16:41:11] [PASSED] out of min range
[16:41:11] [PASSED] zero dst
[16:41:11] [PASSED] negative src
[16:41:11] [PASSED] negative dst
[16:41:11] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:41:11] ================== drm_test_rect_rotate ===================
[16:41:11] [PASSED] reflect-x
[16:41:11] [PASSED] reflect-y
[16:41:11] [PASSED] rotate-0
[16:41:11] [PASSED] rotate-90
[16:41:11] [PASSED] rotate-180
[16:41:11] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[16:41:11] ============== [PASSED] drm_test_rect_rotate ===============
[16:41:11] ================ drm_test_rect_rotate_inv =================
[16:41:11] [PASSED] reflect-x
[16:41:11] [PASSED] reflect-y
[16:41:11] [PASSED] rotate-0
[16:41:11] [PASSED] rotate-90
[16:41:11] [PASSED] rotate-180
[16:41:11] [PASSED] rotate-270
[16:41:11] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:41:11] ==================== [PASSED] drm_rect =====================
[16:41:11] ============================================================
[16:41:11] Testing complete. Ran 598 tests: passed: 598
[16:41:11] Elapsed time: 22.592s total, 1.708s configuring, 20.716s building, 0.142s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:41:11] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:41:13] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
[16:41:20] Starting KUnit Kernel (1/1)...
[16:41:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:41:20] ================= ttm_device (5 subtests) ==================
[16:41:20] [PASSED] ttm_device_init_basic
[16:41:20] [PASSED] ttm_device_init_multiple
[16:41:20] [PASSED] ttm_device_fini_basic
[16:41:20] [PASSED] ttm_device_init_no_vma_man
[16:41:20] ================== ttm_device_init_pools ==================
[16:41:20] [PASSED] No DMA allocations, no DMA32 required
[16:41:20] [PASSED] DMA allocations, DMA32 required
[16:41:20] [PASSED] No DMA allocations, DMA32 required
[16:41:20] [PASSED] DMA allocations, no DMA32 required
[16:41:20] ============== [PASSED] ttm_device_init_pools ==============
[16:41:20] =================== [PASSED] ttm_device ====================
[16:41:20] ================== ttm_pool (8 subtests) ===================
[16:41:20] ================== ttm_pool_alloc_basic ===================
[16:41:20] [PASSED] One page
[16:41:20] [PASSED] More than one page
[16:41:20] [PASSED] Above the allocation limit
[16:41:20] [PASSED] One page, with coherent DMA mappings enabled
[16:41:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:41:20] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:41:20] ============== ttm_pool_alloc_basic_dma_addr ==============
[16:41:20] [PASSED] One page
[16:41:20] [PASSED] More than one page
[16:41:20] [PASSED] Above the allocation limit
[16:41:20] [PASSED] One page, with coherent DMA mappings enabled
[16:41:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:41:20] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:41:20] [PASSED] ttm_pool_alloc_order_caching_match
[16:41:20] [PASSED] ttm_pool_alloc_caching_mismatch
[16:41:20] [PASSED] ttm_pool_alloc_order_mismatch
[16:41:20] [PASSED] ttm_pool_free_dma_alloc
[16:41:20] [PASSED] ttm_pool_free_no_dma_alloc
[16:41:20] [PASSED] ttm_pool_fini_basic
[16:41:20] ==================== [PASSED] ttm_pool =====================
[16:41:20] ================ ttm_resource (8 subtests) =================
[16:41:20] ================= ttm_resource_init_basic =================
[16:41:20] [PASSED] Init resource in TTM_PL_SYSTEM
[16:41:20] [PASSED] Init resource in TTM_PL_VRAM
[16:41:20] [PASSED] Init resource in a private placement
[16:41:20] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:41:20] ============= [PASSED] ttm_resource_init_basic =============
[16:41:20] [PASSED] ttm_resource_init_pinned
[16:41:20] [PASSED] ttm_resource_fini_basic
[16:41:20] [PASSED] ttm_resource_manager_init_basic
[16:41:20] [PASSED] ttm_resource_manager_usage_basic
[16:41:20] [PASSED] ttm_resource_manager_set_used_basic
[16:41:20] [PASSED] ttm_sys_man_alloc_basic
[16:41:20] [PASSED] ttm_sys_man_free_basic
[16:41:20] ================== [PASSED] ttm_resource ===================
[16:41:20] =================== ttm_tt (15 subtests) ===================
[16:41:20] ==================== ttm_tt_init_basic ====================
[16:41:20] [PASSED] Page-aligned size
[16:41:20] [PASSED] Extra pages requested
[16:41:20] ================ [PASSED] ttm_tt_init_basic ================
[16:41:20] [PASSED] ttm_tt_init_misaligned
[16:41:20] [PASSED] ttm_tt_fini_basic
[16:41:20] [PASSED] ttm_tt_fini_sg
[16:41:20] [PASSED] ttm_tt_fini_shmem
[16:41:20] [PASSED] ttm_tt_create_basic
[16:41:20] [PASSED] ttm_tt_create_invalid_bo_type
[16:41:20] [PASSED] ttm_tt_create_ttm_exists
[16:41:20] [PASSED] ttm_tt_create_failed
[16:41:20] [PASSED] ttm_tt_destroy_basic
[16:41:20] [PASSED] ttm_tt_populate_null_ttm
[16:41:20] [PASSED] ttm_tt_populate_populated_ttm
[16:41:20] [PASSED] ttm_tt_unpopulate_basic
[16:41:20] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:41:20] [PASSED] ttm_tt_swapin_basic
[16:41:20] ===================== [PASSED] ttm_tt ======================
[16:41:20] =================== ttm_bo (14 subtests) ===================
[16:41:20] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[16:41:20] [PASSED] Cannot be interrupted and sleeps
[16:41:20] [PASSED] Cannot be interrupted, locks straight away
[16:41:20] [PASSED] Can be interrupted, sleeps
[16:41:20] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:41:20] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:41:20] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:41:20] [PASSED] ttm_bo_reserve_double_resv
[16:41:20] [PASSED] ttm_bo_reserve_interrupted
[16:41:20] [PASSED] ttm_bo_reserve_deadlock
[16:41:20] [PASSED] ttm_bo_unreserve_basic
[16:41:20] [PASSED] ttm_bo_unreserve_pinned
[16:41:20] [PASSED] ttm_bo_unreserve_bulk
[16:41:20] [PASSED] ttm_bo_put_basic
[16:41:20] [PASSED] ttm_bo_put_shared_resv
[16:41:20] [PASSED] ttm_bo_pin_basic
[16:41:20] [PASSED] ttm_bo_pin_unpin_resource
[16:41:20] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:41:20] ===================== [PASSED] ttm_bo ======================
[16:41:20] ============== ttm_bo_validate (22 subtests) ===============
[16:41:20] ============== ttm_bo_init_reserved_sys_man ===============
[16:41:20] [PASSED] Buffer object for userspace
[16:41:20] [PASSED] Kernel buffer object
[16:41:20] [PASSED] Shared buffer object
[16:41:20] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:41:20] ============== ttm_bo_init_reserved_mock_man ==============
[16:41:20] [PASSED] Buffer object for userspace
[16:41:20] [PASSED] Kernel buffer object
[16:41:20] [PASSED] Shared buffer object
[16:41:20] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:41:20] [PASSED] ttm_bo_init_reserved_resv
[16:41:20] ================== ttm_bo_validate_basic ==================
[16:41:20] [PASSED] Buffer object for userspace
[16:41:20] [PASSED] Kernel buffer object
[16:41:20] [PASSED] Shared buffer object
[16:41:20] ============== [PASSED] ttm_bo_validate_basic ==============
[16:41:20] [PASSED] ttm_bo_validate_invalid_placement
[16:41:20] ============= ttm_bo_validate_same_placement ==============
[16:41:20] [PASSED] System manager
[16:41:20] [PASSED] VRAM manager
[16:41:20] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:41:20] [PASSED] ttm_bo_validate_failed_alloc
[16:41:20] [PASSED] ttm_bo_validate_pinned
[16:41:20] [PASSED] ttm_bo_validate_busy_placement
[16:41:20] ================ ttm_bo_validate_multihop =================
[16:41:20] [PASSED] Buffer object for userspace
[16:41:20] [PASSED] Kernel buffer object
[16:41:20] [PASSED] Shared buffer object
[16:41:20] ============ [PASSED] ttm_bo_validate_multihop =============
[16:41:20] ========== ttm_bo_validate_no_placement_signaled ==========
[16:41:20] [PASSED] Buffer object in system domain, no page vector
[16:41:20] [PASSED] Buffer object in system domain with an existing page vector
[16:41:20] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:41:20] ======== ttm_bo_validate_no_placement_not_signaled ========
[16:41:20] [PASSED] Buffer object for userspace
[16:41:20] [PASSED] Kernel buffer object
[16:41:20] [PASSED] Shared buffer object
[16:41:20] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:41:20] [PASSED] ttm_bo_validate_move_fence_signaled
[16:41:20] ========= ttm_bo_validate_move_fence_not_signaled =========
[16:41:20] [PASSED] Waits for GPU
[16:41:20] [PASSED] Tries to lock straight away
[16:41:21] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:41:21] [PASSED] ttm_bo_validate_swapout
[16:41:21] [PASSED] ttm_bo_validate_happy_evict
[16:41:21] [PASSED] ttm_bo_validate_all_pinned_evict
[16:41:21] [PASSED] ttm_bo_validate_allowed_only_evict
[16:41:21] [PASSED] ttm_bo_validate_deleted_evict
[16:41:21] [PASSED] ttm_bo_validate_busy_domain_evict
[16:41:21] [PASSED] ttm_bo_validate_evict_gutting
[16:41:21] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[16:41:21] ================= [PASSED] ttm_bo_validate =================
[16:41:21] ============================================================
[16:41:21] Testing complete. Ran 102 tests: passed: 102
[16:41:21] Elapsed time: 9.744s total, 1.634s configuring, 7.493s building, 0.529s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 23+ messages in thread* ✓ CI.Build: success for drm/i915: intel_display conversions and some debug improvements
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (13 preceding siblings ...)
2025-01-24 16:41 ` ✓ CI.KUnit: success " Patchwork
@ 2025-01-24 17:03 ` Patchwork
2025-01-24 17:05 ` ✗ CI.Hooks: failure " Patchwork
` (4 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-01-24 17:03 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: intel_display conversions and some debug improvements
URL : https://patchwork.freedesktop.org/series/143941/
State : success
== Summary ==
lib/modules/6.13.0-xe+/kernel/arch/x86/events/rapl.ko
lib/modules/6.13.0-xe+/kernel/arch/x86/kvm/
lib/modules/6.13.0-xe+/kernel/arch/x86/kvm/kvm.ko
lib/modules/6.13.0-xe+/kernel/arch/x86/kvm/kvm-intel.ko
lib/modules/6.13.0-xe+/kernel/arch/x86/kvm/kvm-amd.ko
lib/modules/6.13.0-xe+/kernel/kernel/
lib/modules/6.13.0-xe+/kernel/kernel/kheaders.ko
lib/modules/6.13.0-xe+/kernel/crypto/
lib/modules/6.13.0-xe+/kernel/crypto/ecrdsa_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/xcbc.ko
lib/modules/6.13.0-xe+/kernel/crypto/serpent_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/aria_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/crypto_simd.ko
lib/modules/6.13.0-xe+/kernel/crypto/adiantum.ko
lib/modules/6.13.0-xe+/kernel/crypto/tcrypt.ko
lib/modules/6.13.0-xe+/kernel/crypto/crypto_engine.ko
lib/modules/6.13.0-xe+/kernel/crypto/zstd.ko
lib/modules/6.13.0-xe+/kernel/crypto/asymmetric_keys/
lib/modules/6.13.0-xe+/kernel/crypto/asymmetric_keys/pkcs7_test_key.ko
lib/modules/6.13.0-xe+/kernel/crypto/asymmetric_keys/pkcs8_key_parser.ko
lib/modules/6.13.0-xe+/kernel/crypto/des_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/xctr.ko
lib/modules/6.13.0-xe+/kernel/crypto/authenc.ko
lib/modules/6.13.0-xe+/kernel/crypto/sm4_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/keywrap.ko
lib/modules/6.13.0-xe+/kernel/crypto/camellia_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/sm3.ko
lib/modules/6.13.0-xe+/kernel/crypto/pcrypt.ko
lib/modules/6.13.0-xe+/kernel/crypto/aegis128.ko
lib/modules/6.13.0-xe+/kernel/crypto/af_alg.ko
lib/modules/6.13.0-xe+/kernel/crypto/algif_aead.ko
lib/modules/6.13.0-xe+/kernel/crypto/cmac.ko
lib/modules/6.13.0-xe+/kernel/crypto/sm3_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/aes_ti.ko
lib/modules/6.13.0-xe+/kernel/crypto/chacha_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/poly1305_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/nhpoly1305.ko
lib/modules/6.13.0-xe+/kernel/crypto/crc32_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/essiv.ko
lib/modules/6.13.0-xe+/kernel/crypto/ccm.ko
lib/modules/6.13.0-xe+/kernel/crypto/wp512.ko
lib/modules/6.13.0-xe+/kernel/crypto/streebog_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/authencesn.ko
lib/modules/6.13.0-xe+/kernel/crypto/echainiv.ko
lib/modules/6.13.0-xe+/kernel/crypto/lrw.ko
lib/modules/6.13.0-xe+/kernel/crypto/cryptd.ko
lib/modules/6.13.0-xe+/kernel/crypto/crypto_user.ko
lib/modules/6.13.0-xe+/kernel/crypto/algif_hash.ko
lib/modules/6.13.0-xe+/kernel/crypto/vmac.ko
lib/modules/6.13.0-xe+/kernel/crypto/polyval-generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/hctr2.ko
lib/modules/6.13.0-xe+/kernel/crypto/842.ko
lib/modules/6.13.0-xe+/kernel/crypto/pcbc.ko
lib/modules/6.13.0-xe+/kernel/crypto/ansi_cprng.ko
lib/modules/6.13.0-xe+/kernel/crypto/cast6_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/twofish_common.ko
lib/modules/6.13.0-xe+/kernel/crypto/twofish_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/lz4hc.ko
lib/modules/6.13.0-xe+/kernel/crypto/blowfish_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/md4.ko
lib/modules/6.13.0-xe+/kernel/crypto/chacha20poly1305.ko
lib/modules/6.13.0-xe+/kernel/crypto/curve25519-generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/lz4.ko
lib/modules/6.13.0-xe+/kernel/crypto/rmd160.ko
lib/modules/6.13.0-xe+/kernel/crypto/algif_skcipher.ko
lib/modules/6.13.0-xe+/kernel/crypto/cast5_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/fcrypt.ko
lib/modules/6.13.0-xe+/kernel/crypto/ecdsa_generic.ko
lib/modules/6.13.0-xe+/kernel/crypto/sm4.ko
lib/modules/6.13.0-xe+/kernel/crypto/cast_common.ko
lib/modules/6.13.0-xe+/kernel/crypto/blowfish_common.ko
lib/modules/6.13.0-xe+/kernel/crypto/michael_mic.ko
lib/modules/6.13.0-xe+/kernel/crypto/async_tx/
lib/modules/6.13.0-xe+/kernel/crypto/async_tx/async_xor.ko
lib/modules/6.13.0-xe+/kernel/crypto/async_tx/async_tx.ko
lib/modules/6.13.0-xe+/kernel/crypto/async_tx/async_memcpy.ko
lib/modules/6.13.0-xe+/kernel/crypto/async_tx/async_pq.ko
lib/modules/6.13.0-xe+/kernel/crypto/async_tx/async_raid6_recov.ko
lib/modules/6.13.0-xe+/kernel/crypto/algif_rng.ko
lib/modules/6.13.0-xe+/kernel/block/
lib/modules/6.13.0-xe+/kernel/block/bfq.ko
lib/modules/6.13.0-xe+/kernel/block/kyber-iosched.ko
lib/modules/6.13.0-xe+/build
lib/modules/6.13.0-xe+/modules.alias.bin
lib/modules/6.13.0-xe+/modules.builtin
lib/modules/6.13.0-xe+/modules.softdep
lib/modules/6.13.0-xe+/modules.alias
lib/modules/6.13.0-xe+/modules.order
lib/modules/6.13.0-xe+/modules.symbols
lib/modules/6.13.0-xe+/modules.dep.bin
+ mv kernel-nodebug.tar.gz ..
+ cd ..
+ rm -rf archive
++ date +%s
+ echo -e '\e[0Ksection_end:1737738205:package_x86_64_nodebug\r\e[0K'
+ sync
^[[0Ksection_end:1737738205:package_x86_64_nodebug
^[[0K
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 23+ messages in thread* ✗ CI.Hooks: failure for drm/i915: intel_display conversions and some debug improvements
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (14 preceding siblings ...)
2025-01-24 17:03 ` ✓ CI.Build: " Patchwork
@ 2025-01-24 17:05 ` Patchwork
2025-01-24 17:07 ` ✗ CI.checksparse: warning " Patchwork
` (3 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-01-24 17:05 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: intel_display conversions and some debug improvements
URL : https://patchwork.freedesktop.org/series/143941/
State : failure
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
+ grep -Ei '(^|\W)CI_'
+ export
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-default"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ cd /workspace/kernel
++ nproc
+ make -j48 O=/workspace/kernel/build64-default modules_prepare
make[1]: Entering directory '/workspace/kernel/build64-default'
GEN Makefile
mkdir -p /workspace/kernel/build64-default/tools/objtool && make O=/workspace/kernel/build64-default subdir=tools/objtool --no-print-directory -C objtool
CALL ../scripts/checksyscalls.sh
INSTALL libsubcmd_headers
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64-default/tools/objtool/weak.o
CC /workspace/kernel/build64-default/tools/objtool/check.o
CC /workspace/kernel/build64-default/tools/objtool/special.o
CC /workspace/kernel/build64-default/tools/objtool/builtin-check.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64-default/tools/objtool/elf.o
CC /workspace/kernel/build64-default/tools/objtool/objtool.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/decode.o
CC /workspace/kernel/build64-default/tools/objtool/orc_gen.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/orc.o
CC /workspace/kernel/build64-default/tools/objtool/orc_dump.o
CC /workspace/kernel/build64-default/tools/objtool/libstring.o
CC /workspace/kernel/build64-default/tools/objtool/libctype.o
CC /workspace/kernel/build64-default/tools/objtool/str_error_r.o
CC /workspace/kernel/build64-default/tools/objtool/librbtree.o
LD /workspace/kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64-default/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64-default/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64-default'
++ nproc
+ make -j48 O=/workspace/kernel/build64-default W=1 drivers/gpu/drm/xe
make[1]: Entering directory '/workspace/kernel/build64-default'
make[2]: Nothing to be done for 'drivers/gpu/drm/xe'.
make[1]: Leaving directory '/workspace/kernel/build64-default'
run-parts: executing /workspace/ci/hooks/11-build-32b
+++ realpath /workspace/ci/hooks/11-build-32b
++ dirname /workspace/ci/hooks/11-build-32b
+ THIS_SCRIPT_DIR=/workspace/ci/hooks
+ SRC_DIR=/workspace/kernel
+ TOOLS_SRC_DIR=/workspace/ci
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ BUILD_DIR=/workspace/kernel/build64-default/build32
+ cd /workspace/kernel
+ mkdir -p /workspace/kernel/build64-default/build32
++ nproc
+ make -j48 ARCH=i386 O=/workspace/kernel/build64-default/build32 defconfig
make[1]: Entering directory '/workspace/kernel/build64-default/build32'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTLD scripts/kconfig/conf
*** Default configuration is based on 'i386_defconfig'
#
# configuration written to .config
#
make[1]: Leaving directory '/workspace/kernel/build64-default/build32'
+ cd /workspace/kernel/build64-default/build32
+ /workspace/kernel/scripts/kconfig/merge_config.sh .config /workspace/ci/kernel/fragments/10-xe.fragment
Using .config as base
Merging /workspace/ci/kernel/fragments/10-xe.fragment
Value of CONFIG_DRM_XE is redefined by fragment /workspace/ci/kernel/fragments/10-xe.fragment:
Previous value: # CONFIG_DRM_XE is not set
New value: CONFIG_DRM_XE=m
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
#
# configuration written to .config
#
Value requested for CONFIG_HAVE_UID16 not in final .config
Requested value: CONFIG_HAVE_UID16=y
Actual value:
Value requested for CONFIG_UID16 not in final .config
Requested value: CONFIG_UID16=y
Actual value:
Value requested for CONFIG_X86_32 not in final .config
Requested value: CONFIG_X86_32=y
Actual value:
Value requested for CONFIG_OUTPUT_FORMAT not in final .config
Requested value: CONFIG_OUTPUT_FORMAT="elf32-i386"
Actual value: CONFIG_OUTPUT_FORMAT="elf64-x86-64"
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MIN not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MIN=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MIN=28
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MAX not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MAX=16
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MAX=32
Value requested for CONFIG_PGTABLE_LEVELS not in final .config
Requested value: CONFIG_PGTABLE_LEVELS=2
Actual value: CONFIG_PGTABLE_LEVELS=5
Value requested for CONFIG_X86_BIGSMP not in final .config
Requested value: # CONFIG_X86_BIGSMP is not set
Actual value:
Value requested for CONFIG_X86_INTEL_QUARK not in final .config
Requested value: # CONFIG_X86_INTEL_QUARK is not set
Actual value:
Value requested for CONFIG_X86_RDC321X not in final .config
Requested value: # CONFIG_X86_RDC321X is not set
Actual value:
Value requested for CONFIG_X86_32_NON_STANDARD not in final .config
Requested value: # CONFIG_X86_32_NON_STANDARD is not set
Actual value:
Value requested for CONFIG_X86_32_IRIS not in final .config
Requested value: # CONFIG_X86_32_IRIS is not set
Actual value:
Value requested for CONFIG_M486SX not in final .config
Requested value: # CONFIG_M486SX is not set
Actual value:
Value requested for CONFIG_M486 not in final .config
Requested value: # CONFIG_M486 is not set
Actual value:
Value requested for CONFIG_M586 not in final .config
Requested value: # CONFIG_M586 is not set
Actual value:
Value requested for CONFIG_M586TSC not in final .config
Requested value: # CONFIG_M586TSC is not set
Actual value:
Value requested for CONFIG_M586MMX not in final .config
Requested value: # CONFIG_M586MMX is not set
Actual value:
Value requested for CONFIG_M686 not in final .config
Requested value: CONFIG_M686=y
Actual value:
Value requested for CONFIG_MPENTIUMII not in final .config
Requested value: # CONFIG_MPENTIUMII is not set
Actual value:
Value requested for CONFIG_MPENTIUMIII not in final .config
Requested value: # CONFIG_MPENTIUMIII is not set
Actual value:
Value requested for CONFIG_MPENTIUMM not in final .config
Requested value: # CONFIG_MPENTIUMM is not set
Actual value:
Value requested for CONFIG_MPENTIUM4 not in final .config
Requested value: # CONFIG_MPENTIUM4 is not set
Actual value:
Value requested for CONFIG_MK6 not in final .config
Requested value: # CONFIG_MK6 is not set
Actual value:
Value requested for CONFIG_MK7 not in final .config
Requested value: # CONFIG_MK7 is not set
Actual value:
Value requested for CONFIG_MCRUSOE not in final .config
Requested value: # CONFIG_MCRUSOE is not set
Actual value:
Value requested for CONFIG_MEFFICEON not in final .config
Requested value: # CONFIG_MEFFICEON is not set
Actual value:
Value requested for CONFIG_MWINCHIPC6 not in final .config
Requested value: # CONFIG_MWINCHIPC6 is not set
Actual value:
Value requested for CONFIG_MWINCHIP3D not in final .config
Requested value: # CONFIG_MWINCHIP3D is not set
Actual value:
Value requested for CONFIG_MELAN not in final .config
Requested value: # CONFIG_MELAN is not set
Actual value:
Value requested for CONFIG_MGEODEGX1 not in final .config
Requested value: # CONFIG_MGEODEGX1 is not set
Actual value:
Value requested for CONFIG_MGEODE_LX not in final .config
Requested value: # CONFIG_MGEODE_LX is not set
Actual value:
Value requested for CONFIG_MCYRIXIII not in final .config
Requested value: # CONFIG_MCYRIXIII is not set
Actual value:
Value requested for CONFIG_MVIAC3_2 not in final .config
Requested value: # CONFIG_MVIAC3_2 is not set
Actual value:
Value requested for CONFIG_MVIAC7 not in final .config
Requested value: # CONFIG_MVIAC7 is not set
Actual value:
Value requested for CONFIG_X86_GENERIC not in final .config
Requested value: # CONFIG_X86_GENERIC is not set
Actual value:
Value requested for CONFIG_X86_INTERNODE_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_INTERNODE_CACHE_SHIFT=5
Actual value: CONFIG_X86_INTERNODE_CACHE_SHIFT=6
Value requested for CONFIG_X86_L1_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_L1_CACHE_SHIFT=5
Actual value: CONFIG_X86_L1_CACHE_SHIFT=6
Value requested for CONFIG_X86_USE_PPRO_CHECKSUM not in final .config
Requested value: CONFIG_X86_USE_PPRO_CHECKSUM=y
Actual value:
Value requested for CONFIG_X86_MINIMUM_CPU_FAMILY not in final .config
Requested value: CONFIG_X86_MINIMUM_CPU_FAMILY=6
Actual value: CONFIG_X86_MINIMUM_CPU_FAMILY=64
Value requested for CONFIG_CPU_SUP_TRANSMETA_32 not in final .config
Requested value: CONFIG_CPU_SUP_TRANSMETA_32=y
Actual value:
Value requested for CONFIG_CPU_SUP_VORTEX_32 not in final .config
Requested value: CONFIG_CPU_SUP_VORTEX_32=y
Actual value:
Value requested for CONFIG_HPET_TIMER not in final .config
Requested value: # CONFIG_HPET_TIMER is not set
Actual value: CONFIG_HPET_TIMER=y
Value requested for CONFIG_NR_CPUS_RANGE_END not in final .config
Requested value: CONFIG_NR_CPUS_RANGE_END=8
Actual value: CONFIG_NR_CPUS_RANGE_END=512
Value requested for CONFIG_NR_CPUS_DEFAULT not in final .config
Requested value: CONFIG_NR_CPUS_DEFAULT=8
Actual value: CONFIG_NR_CPUS_DEFAULT=64
Value requested for CONFIG_X86_ANCIENT_MCE not in final .config
Requested value: # CONFIG_X86_ANCIENT_MCE is not set
Actual value:
Value requested for CONFIG_X86_LEGACY_VM86 not in final .config
Requested value: # CONFIG_X86_LEGACY_VM86 is not set
Actual value:
Value requested for CONFIG_X86_ESPFIX32 not in final .config
Requested value: CONFIG_X86_ESPFIX32=y
Actual value:
Value requested for CONFIG_TOSHIBA not in final .config
Requested value: # CONFIG_TOSHIBA is not set
Actual value:
Value requested for CONFIG_X86_REBOOTFIXUPS not in final .config
Requested value: # CONFIG_X86_REBOOTFIXUPS is not set
Actual value:
Value requested for CONFIG_MICROCODE_INITRD32 not in final .config
Requested value: CONFIG_MICROCODE_INITRD32=y
Actual value:
Value requested for CONFIG_NOHIGHMEM not in final .config
Requested value: # CONFIG_NOHIGHMEM is not set
Actual value:
Value requested for CONFIG_HIGHMEM4G not in final .config
Requested value: CONFIG_HIGHMEM4G=y
Actual value:
Value requested for CONFIG_HIGHMEM64G not in final .config
Requested value: # CONFIG_HIGHMEM64G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_3G not in final .config
Requested value: CONFIG_VMSPLIT_3G=y
Actual value:
Value requested for CONFIG_VMSPLIT_3G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_3G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G not in final .config
Requested value: # CONFIG_VMSPLIT_2G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_2G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_1G not in final .config
Requested value: # CONFIG_VMSPLIT_1G is not set
Actual value:
Value requested for CONFIG_PAGE_OFFSET not in final .config
Requested value: CONFIG_PAGE_OFFSET=0xC0000000
Actual value:
Value requested for CONFIG_HIGHMEM not in final .config
Requested value: CONFIG_HIGHMEM=y
Actual value:
Value requested for CONFIG_X86_PAE not in final .config
Requested value: # CONFIG_X86_PAE is not set
Actual value:
Value requested for CONFIG_ARCH_FLATMEM_ENABLE not in final .config
Requested value: CONFIG_ARCH_FLATMEM_ENABLE=y
Actual value:
Value requested for CONFIG_ARCH_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_ARCH_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_ILLEGAL_POINTER_VALUE not in final .config
Requested value: CONFIG_ILLEGAL_POINTER_VALUE=0
Actual value: CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
Value requested for CONFIG_HIGHPTE not in final .config
Requested value: # CONFIG_HIGHPTE is not set
Actual value:
Value requested for CONFIG_COMPAT_VDSO not in final .config
Requested value: # CONFIG_COMPAT_VDSO is not set
Actual value:
Value requested for CONFIG_FUNCTION_PADDING_CFI not in final .config
Requested value: CONFIG_FUNCTION_PADDING_CFI=0
Actual value: CONFIG_FUNCTION_PADDING_CFI=11
Value requested for CONFIG_FUNCTION_PADDING_BYTES not in final .config
Requested value: CONFIG_FUNCTION_PADDING_BYTES=4
Actual value: CONFIG_FUNCTION_PADDING_BYTES=16
Value requested for CONFIG_APM not in final .config
Requested value: # CONFIG_APM is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K6 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K6 is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K7 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K7 is not set
Actual value:
Value requested for CONFIG_X86_GX_SUSPMOD not in final .config
Requested value: # CONFIG_X86_GX_SUSPMOD is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_ICH not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_ICH is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_SMI not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_SMI is not set
Actual value:
Value requested for CONFIG_X86_CPUFREQ_NFORCE2 not in final .config
Requested value: # CONFIG_X86_CPUFREQ_NFORCE2 is not set
Actual value:
Value requested for CONFIG_X86_LONGRUN not in final .config
Requested value: # CONFIG_X86_LONGRUN is not set
Actual value:
Value requested for CONFIG_X86_LONGHAUL not in final .config
Requested value: # CONFIG_X86_LONGHAUL is not set
Actual value:
Value requested for CONFIG_X86_E_POWERSAVER not in final .config
Requested value: # CONFIG_X86_E_POWERSAVER is not set
Actual value:
Value requested for CONFIG_PCI_GOBIOS not in final .config
Requested value: # CONFIG_PCI_GOBIOS is not set
Actual value:
Value requested for CONFIG_PCI_GOMMCONFIG not in final .config
Requested value: # CONFIG_PCI_GOMMCONFIG is not set
Actual value:
Value requested for CONFIG_PCI_GODIRECT not in final .config
Requested value: # CONFIG_PCI_GODIRECT is not set
Actual value:
Value requested for CONFIG_PCI_GOANY not in final .config
Requested value: CONFIG_PCI_GOANY=y
Actual value:
Value requested for CONFIG_PCI_BIOS not in final .config
Requested value: CONFIG_PCI_BIOS=y
Actual value:
Value requested for CONFIG_ISA not in final .config
Requested value: # CONFIG_ISA is not set
Actual value:
Value requested for CONFIG_SCx200 not in final .config
Requested value: # CONFIG_SCx200 is not set
Actual value:
Value requested for CONFIG_OLPC not in final .config
Requested value: # CONFIG_OLPC is not set
Actual value:
Value requested for CONFIG_ALIX not in final .config
Requested value: # CONFIG_ALIX is not set
Actual value:
Value requested for CONFIG_NET5501 not in final .config
Requested value: # CONFIG_NET5501 is not set
Actual value:
Value requested for CONFIG_GEOS not in final .config
Requested value: # CONFIG_GEOS is not set
Actual value:
Value requested for CONFIG_COMPAT_32 not in final .config
Requested value: CONFIG_COMPAT_32=y
Actual value:
Value requested for CONFIG_HAVE_ATOMIC_IOMAP not in final .config
Requested value: CONFIG_HAVE_ATOMIC_IOMAP=y
Actual value:
Value requested for CONFIG_ARCH_32BIT_OFF_T not in final .config
Requested value: CONFIG_ARCH_32BIT_OFF_T=y
Actual value:
Value requested for CONFIG_ARCH_WANT_IPC_PARSE_VERSION not in final .config
Requested value: CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
Actual value:
Value requested for CONFIG_MODULES_USE_ELF_REL not in final .config
Requested value: CONFIG_MODULES_USE_ELF_REL=y
Actual value:
Value requested for CONFIG_ARCH_MMAP_RND_BITS not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS=28
Value requested for CONFIG_CLONE_BACKWARDS not in final .config
Requested value: CONFIG_CLONE_BACKWARDS=y
Actual value:
Value requested for CONFIG_OLD_SIGSUSPEND3 not in final .config
Requested value: CONFIG_OLD_SIGSUSPEND3=y
Actual value:
Value requested for CONFIG_OLD_SIGACTION not in final .config
Requested value: CONFIG_OLD_SIGACTION=y
Actual value:
Value requested for CONFIG_ARCH_SPLIT_ARG64 not in final .config
Requested value: CONFIG_ARCH_SPLIT_ARG64=y
Actual value:
Value requested for CONFIG_FUNCTION_ALIGNMENT not in final .config
Requested value: CONFIG_FUNCTION_ALIGNMENT=4
Actual value: CONFIG_FUNCTION_ALIGNMENT=16
Value requested for CONFIG_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_FLATMEM_MANUAL not in final .config
Requested value: CONFIG_FLATMEM_MANUAL=y
Actual value:
Value requested for CONFIG_SPARSEMEM_MANUAL not in final .config
Requested value: # CONFIG_SPARSEMEM_MANUAL is not set
Actual value:
Value requested for CONFIG_FLATMEM not in final .config
Requested value: CONFIG_FLATMEM=y
Actual value:
Value requested for CONFIG_SPARSEMEM_STATIC not in final .config
Requested value: CONFIG_SPARSEMEM_STATIC=y
Actual value:
Value requested for CONFIG_BOUNCE not in final .config
Requested value: CONFIG_BOUNCE=y
Actual value:
Value requested for CONFIG_KMAP_LOCAL not in final .config
Requested value: CONFIG_KMAP_LOCAL=y
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_COMPAQ not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_COMPAQ is not set
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_IBM not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_IBM is not set
Actual value:
Value requested for CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH not in final .config
Requested value: CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH=y
Actual value:
Value requested for CONFIG_PCH_PHUB not in final .config
Requested value: # CONFIG_PCH_PHUB is not set
Actual value:
Value requested for CONFIG_SCSI_NSP32 not in final .config
Requested value: # CONFIG_SCSI_NSP32 is not set
Actual value:
Value requested for CONFIG_PATA_CS5520 not in final .config
Requested value: # CONFIG_PATA_CS5520 is not set
Actual value:
Value requested for CONFIG_PATA_CS5530 not in final .config
Requested value: # CONFIG_PATA_CS5530 is not set
Actual value:
Value requested for CONFIG_PATA_CS5535 not in final .config
Requested value: # CONFIG_PATA_CS5535 is not set
Actual value:
Value requested for CONFIG_PATA_CS5536 not in final .config
Requested value: # CONFIG_PATA_CS5536 is not set
Actual value:
Value requested for CONFIG_PATA_SC1200 not in final .config
Requested value: # CONFIG_PATA_SC1200 is not set
Actual value:
Value requested for CONFIG_PCH_GBE not in final .config
Requested value: # CONFIG_PCH_GBE is not set
Actual value:
Value requested for CONFIG_INPUT_WISTRON_BTNS not in final .config
Requested value: # CONFIG_INPUT_WISTRON_BTNS is not set
Actual value:
Value requested for CONFIG_SERIAL_TIMBERDALE not in final .config
Requested value: # CONFIG_SERIAL_TIMBERDALE is not set
Actual value:
Value requested for CONFIG_SERIAL_PCH_UART not in final .config
Requested value: # CONFIG_SERIAL_PCH_UART is not set
Actual value:
Value requested for CONFIG_HW_RANDOM_GEODE not in final .config
Requested value: CONFIG_HW_RANDOM_GEODE=y
Actual value:
Value requested for CONFIG_SONYPI not in final .config
Requested value: # CONFIG_SONYPI is not set
Actual value:
Value requested for CONFIG_PC8736x_GPIO not in final .config
Requested value: # CONFIG_PC8736x_GPIO is not set
Actual value:
Value requested for CONFIG_NSC_GPIO not in final .config
Requested value: # CONFIG_NSC_GPIO is not set
Actual value:
Value requested for CONFIG_I2C_EG20T not in final .config
Requested value: # CONFIG_I2C_EG20T is not set
Actual value:
Value requested for CONFIG_SCx200_ACB not in final .config
Requested value: # CONFIG_SCx200_ACB is not set
Actual value:
Value requested for CONFIG_PTP_1588_CLOCK_PCH not in final .config
Requested value: # CONFIG_PTP_1588_CLOCK_PCH is not set
Actual value:
Value requested for CONFIG_SBC8360_WDT not in final .config
Requested value: # CONFIG_SBC8360_WDT is not set
Actual value:
Value requested for CONFIG_SBC7240_WDT not in final .config
Requested value: # CONFIG_SBC7240_WDT is not set
Actual value:
Value requested for CONFIG_MFD_CS5535 not in final .config
Requested value: # CONFIG_MFD_CS5535 is not set
Actual value:
Value requested for CONFIG_AGP_ALI not in final .config
Requested value: # CONFIG_AGP_ALI is not set
Actual value:
Value requested for CONFIG_AGP_ATI not in final .config
Requested value: # CONFIG_AGP_ATI is not set
Actual value:
Value requested for CONFIG_AGP_AMD not in final .config
Requested value: # CONFIG_AGP_AMD is not set
Actual value:
Value requested for CONFIG_AGP_NVIDIA not in final .config
Requested value: # CONFIG_AGP_NVIDIA is not set
Actual value:
Value requested for CONFIG_AGP_SWORKS not in final .config
Requested value: # CONFIG_AGP_SWORKS is not set
Actual value:
Value requested for CONFIG_AGP_EFFICEON not in final .config
Requested value: # CONFIG_AGP_EFFICEON is not set
Actual value:
Value requested for CONFIG_SND_CS5530 not in final .config
Requested value: # CONFIG_SND_CS5530 is not set
Actual value:
Value requested for CONFIG_SND_CS5535AUDIO not in final .config
Requested value: # CONFIG_SND_CS5535AUDIO is not set
Actual value:
Value requested for CONFIG_SND_SIS7019 not in final .config
Requested value: # CONFIG_SND_SIS7019 is not set
Actual value:
Value requested for CONFIG_LEDS_OT200 not in final .config
Requested value: # CONFIG_LEDS_OT200 is not set
Actual value:
Value requested for CONFIG_PCH_DMA not in final .config
Requested value: # CONFIG_PCH_DMA is not set
Actual value:
Value requested for CONFIG_CLKSRC_I8253 not in final .config
Requested value: CONFIG_CLKSRC_I8253=y
Actual value:
Value requested for CONFIG_MAILBOX not in final .config
Requested value: # CONFIG_MAILBOX is not set
Actual value: CONFIG_MAILBOX=y
Value requested for CONFIG_CRYPTO_SERPENT_SSE2_586 not in final .config
Requested value: # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_TWOFISH_586 not in final .config
Requested value: # CONFIG_CRYPTO_TWOFISH_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_GEODE not in final .config
Requested value: # CONFIG_CRYPTO_DEV_GEODE is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_HIFN_795X not in final .config
Requested value: # CONFIG_CRYPTO_DEV_HIFN_795X is not set
Actual value:
Value requested for CONFIG_CRYPTO_LIB_POLY1305_RSIZE not in final .config
Requested value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
Actual value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11
Value requested for CONFIG_AUDIT_GENERIC not in final .config
Requested value: CONFIG_AUDIT_GENERIC=y
Actual value:
Value requested for CONFIG_GENERIC_VDSO_32 not in final .config
Requested value: CONFIG_GENERIC_VDSO_32=y
Actual value:
Value requested for CONFIG_DEBUG_KMAP_LOCAL not in final .config
Requested value: # CONFIG_DEBUG_KMAP_LOCAL is not set
Actual value:
Value requested for CONFIG_DEBUG_HIGHMEM not in final .config
Requested value: # CONFIG_DEBUG_HIGHMEM is not set
Actual value:
Value requested for CONFIG_HAVE_DEBUG_STACKOVERFLOW not in final .config
Requested value: CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
Actual value:
Value requested for CONFIG_DEBUG_STACKOVERFLOW not in final .config
Requested value: # CONFIG_DEBUG_STACKOVERFLOW is not set
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_TRACER not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_RETVAL not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y
Actual value:
Value requested for CONFIG_DRM_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_KUNIT_TEST=m
Actual value:
Value requested for CONFIG_DRM_XE_WERROR not in final .config
Requested value: CONFIG_DRM_XE_WERROR=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG not in final .config
Requested value: CONFIG_DRM_XE_DEBUG=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG_MEM not in final .config
Requested value: CONFIG_DRM_XE_DEBUG_MEM=y
Actual value:
Value requested for CONFIG_DRM_XE_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_XE_KUNIT_TEST=m
Actual value:
++ nproc
+ make -j48 ARCH=i386 olddefconfig
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
#
# configuration written to .config
#
++ nproc
+ make -j48 ARCH=i386
SYNC include/config/auto.conf.cmd
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
GEN Makefile
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
UPD include/generated/uapi/linux/version.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
WRAP arch/x86/include/generated/uapi/asm/param.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
WRAP arch/x86/include/generated/uapi/asm/termbits.h
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/types.h
UPD include/generated/compile.h
HOSTCC arch/x86/tools/relocs_32.o
HOSTCC scripts/kallsyms
WRAP arch/x86/include/generated/asm/early_ioremap.h
HOSTCC arch/x86/tools/relocs_64.o
HOSTCC arch/x86/tools/relocs_common.o
HOSTCC scripts/sorttable
HOSTCC scripts/asn1_compiler
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
HOSTCC scripts/selinux/mdp/mdp
WRAP arch/x86/include/generated/asm/mmzone.h
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
WRAP arch/x86/include/generated/asm/mmiowb.h
WRAP arch/x86/include/generated/asm/module.lds.h
WRAP arch/x86/include/generated/asm/local64.h
WRAP arch/x86/include/generated/asm/rwonce.h
HOSTLD arch/x86/tools/relocs
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
UPD scripts/mod/devicetable-offsets.h
MKELF scripts/mod/elfconfig.h
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/file2alias.o
HOSTCC scripts/mod/sumversion.o
HOSTCC scripts/mod/symsearch.o
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-instrumented.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-long.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
UPD include/generated/asm-offsets.h
CALL /workspace/kernel/scripts/checksyscalls.sh
LDS scripts/module.lds
HOSTCC usr/gen_init_cpio
CC init/main.o
CC certs/system_keyring.o
CC init/do_mounts.o
UPD init/utsversion-tmp.h
CC mm/filemap.o
CC init/do_mounts_initrd.o
CC ipc/util.o
CC init/initramfs.o
CC ipc/msgutil.o
CC mm/mempool.o
CC security/commoncap.o
CC init/calibrate.o
CC ipc/msg.o
CC io_uring/io_uring.o
CC mm/oom_kill.o
AS arch/x86/entry/entry.o
AS arch/x86/lib/atomic64_cx8_32.o
CC ipc/sem.o
CC arch/x86/realmode/init.o
CC io_uring/opdef.o
CC security/lsm_syscalls.o
AS arch/x86/lib/checksum_32.o
AR arch/x86/crypto/built-in.a
CC security/keys/gc.o
AR arch/x86/net/built-in.a
HOSTCC security/selinux/genheaders
CC arch/x86/video/video-common.o
CC arch/x86/power/cpu.o
CC security/integrity/iint.o
AR arch/x86/entry/vsyscall/built-in.a
CC arch/x86/pci/i386.o
CC fs/nfs_common/nfsacl.o
CC arch/x86/events/amd/core.o
CC block/partitions/core.o
CC arch/x86/mm/pat/set_memory.o
CC fs/iomap/trace.o
AR arch/x86/platform/atom/built-in.a
AR virt/lib/built-in.a
CC arch/x86/virt/svm/cmdline.o
CC lib/math/div64.o
AR drivers/cache/built-in.a
CC fs/notify/dnotify/dnotify.o
CC io_uring/kbuf.o
CC net/core/sock.o
AR virt/built-in.a
CC arch/x86/kernel/fpu/init.o
AR arch/x86/virt/vmx/built-in.a
CC sound/core/seq/seq.o
AR drivers/irqchip/built-in.a
HOSTCC certs/extract-cert
CC arch/x86/entry/vdso/vma.o
CC arch/x86/lib/cmdline.o
AR arch/x86/platform/ce4100/built-in.a
CC arch/x86/events/zhaoxin/core.o
CC arch/x86/events/intel/core.o
CC sound/core/seq/seq_lock.o
CC net/ethernet/eth.o
AR drivers/bus/mhi/built-in.a
CC arch/x86/platform/efi/memmap.o
CC kernel/sched/core.o
AR drivers/bus/built-in.a
CC crypto/asymmetric_keys/asymmetric_type.o
AR drivers/pwm/built-in.a
AR arch/x86/virt/svm/built-in.a
AR drivers/leds/trigger/built-in.a
AR arch/x86/virt/built-in.a
AS arch/x86/lib/cmpxchg8b_emu.o
AR drivers/leds/blink/built-in.a
AR drivers/leds/simple/built-in.a
CC arch/x86/lib/cpu.o
CC drivers/leds/led-core.o
CC lib/math/gcd.o
CC arch/x86/kernel/cpu/mce/core.o
GEN security/selinux/flask.h security/selinux/av_permissions.h
CC security/selinux/avc.o
CC lib/math/lcm.o
CC lib/math/int_log.o
CC arch/x86/kernel/cpu/mtrr/mtrr.o
CC security/selinux/hooks.o
GEN usr/initramfs_data.cpio
COPY usr/initramfs_inc_data
CERT certs/x509_certificate_list
AS usr/initramfs_data.o
CC lib/math/int_pow.o
CERT certs/signing_key.x509
CC arch/x86/kernel/fpu/bugs.o
AS certs/system_certificates.o
AR usr/built-in.a
AR certs/built-in.a
CC arch/x86/platform/efi/quirks.o
CC arch/x86/platform/efi/efi.o
CC arch/x86/kernel/cpu/mtrr/if.o
CC lib/math/int_sqrt.o
CC arch/x86/kernel/fpu/core.o
CC arch/x86/lib/delay.o
CC sound/core/seq/seq_clientmgr.o
AS arch/x86/realmode/rm/header.o
CC lib/math/reciprocal_div.o
AS arch/x86/realmode/rm/trampoline_32.o
AR arch/x86/video/built-in.a
CC arch/x86/kernel/cpu/mtrr/generic.o
AS arch/x86/realmode/rm/stack.o
CC lib/math/rational.o
AS arch/x86/realmode/rm/reboot.o
CC security/integrity/integrity_audit.o
CC fs/nfs_common/grace.o
AS arch/x86/realmode/rm/wakeup_asm.o
CC kernel/sched/fair.o
CC crypto/asymmetric_keys/restrict.o
CC arch/x86/realmode/rm/wakemain.o
CC arch/x86/realmode/rm/video-mode.o
CC arch/x86/kernel/cpu/mce/severity.o
CC arch/x86/entry/vdso/extable.o
CC security/keys/key.o
AR fs/notify/dnotify/built-in.a
CC arch/x86/pci/init.o
CC fs/notify/inotify/inotify_fsnotify.o
CC security/selinux/selinuxfs.o
CC drivers/leds/led-class.o
CC block/bdev.o
CC sound/core/sound.o
AS arch/x86/lib/getuser.o
GEN arch/x86/lib/inat-tables.c
CC arch/x86/power/hibernate_32.o
AS arch/x86/realmode/rm/copy.o
AS arch/x86/entry/entry_32.o
CC arch/x86/lib/insn-eval.o
CC block/partitions/msdos.o
AS arch/x86/realmode/rm/bioscall.o
CC arch/x86/realmode/rm/regs.o
CC sound/core/seq/seq_memory.o
AR arch/x86/events/zhaoxin/built-in.a
CC security/min_addr.o
CC sound/core/seq/seq_queue.o
CC arch/x86/realmode/rm/video-vga.o
CC crypto/asymmetric_keys/signature.o
AR lib/math/built-in.a
CC lib/crypto/mpi/generic_mpih-lshift.o
CC security/keys/keyring.o
CC crypto/asymmetric_keys/public_key.o
CC arch/x86/realmode/rm/video-vesa.o
ASN.1 crypto/asymmetric_keys/x509.asn1.[ch]
CC sound/core/seq/seq_fifo.o
CC sound/core/seq/seq_prioq.o
CC sound/core/seq/seq_timer.o
CC arch/x86/events/amd/lbr.o
CC arch/x86/realmode/rm/video-bios.o
CC sound/core/init.o
CC fs/iomap/iter.o
CC block/fops.o
PASYMS arch/x86/realmode/rm/pasyms.h
LDS arch/x86/realmode/rm/realmode.lds
CC fs/notify/inotify/inotify_user.o
CC drivers/leds/led-triggers.o
LD arch/x86/realmode/rm/realmode.elf
RELOCS arch/x86/realmode/rm/realmode.relocs
OBJCOPY arch/x86/realmode/rm/realmode.bin
AS arch/x86/realmode/rmpiggy.o
CC block/bio.o
CC arch/x86/platform/efi/efi_32.o
AR arch/x86/realmode/built-in.a
AR net/ethernet/built-in.a
CC arch/x86/kernel/cpu/mtrr/cleanup.o
CC block/elevator.o
AR security/integrity/built-in.a
CC fs/nfs_common/common.o
CC arch/x86/mm/pat/memtype.o
CC arch/x86/pci/pcbios.o
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
CC block/blk-core.o
CC block/blk-sysfs.o
CC init/init_task.o
AS arch/x86/entry/vdso/vdso32/note.o
AS arch/x86/entry/vdso/vdso32/system_call.o
CC fs/proc/task_mmu.o
CC fs/quota/dquot.o
CC block/blk-flush.o
AS arch/x86/entry/vdso/vdso32/sigreturn.o
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
AS arch/x86/power/hibernate_asm_32.o
CC lib/crypto/mpi/generic_mpih-mul1.o
CC arch/x86/power/hibernate.o
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
CC arch/x86/kernel/fpu/regset.o
CC block/blk-settings.o
HOSTCC arch/x86/entry/vdso/vdso2c
CC ipc/shm.o
CC fs/quota/quota_v2.o
CC block/partitions/efi.o
CC arch/x86/lib/insn.o
CC arch/x86/lib/kaslr.o
CC crypto/api.o
ASN.1 crypto/asymmetric_keys/x509_akid.asn1.[ch]
CC arch/x86/lib/memcpy_32.o
CC crypto/asymmetric_keys/x509_loader.o
CC io_uring/rsrc.o
CC arch/x86/kernel/cpu/mtrr/amd.o
CC ipc/syscall.o
CC ipc/ipc_sysctl.o
CC sound/core/seq/seq_system.o
CC block/blk-ioc.o
CC fs/iomap/buffered-io.o
CC arch/x86/kernel/cpu/mce/genpool.o
CC crypto/asymmetric_keys/x509_public_key.o
AR drivers/leds/built-in.a
CC arch/x86/pci/mmconfig_32.o
CC sound/core/seq/seq_ports.o
CC drivers/pci/msi/pcidev_msi.o
AS arch/x86/lib/memmove_32.o
CC arch/x86/events/amd/ibs.o
AR fs/nfs_common/built-in.a
CC arch/x86/lib/misc.o
CC sound/core/seq/seq_info.o
AS arch/x86/platform/efi/efi_stub_32.o
CC fs/iomap/direct-io.o
CC arch/x86/platform/efi/runtime-map.o
CC arch/x86/lib/pc-conf-reg.o
AR net/802/built-in.a
ASN.1 crypto/asymmetric_keys/pkcs7.asn1.[ch]
CC arch/x86/events/amd/uncore.o
CC drivers/pci/pcie/portdrv.o
CC init/version.o
CC lib/crypto/mpi/generic_mpih-mul2.o
AR fs/notify/inotify/built-in.a
CC arch/x86/entry/vdso/vdso32-setup.o
AR fs/notify/fanotify/built-in.a
CC security/keys/keyctl.o
CC fs/notify/fsnotify.o
CC arch/x86/mm/pat/memtype_interval.o
CC ipc/mqueue.o
AS arch/x86/lib/putuser.o
AR arch/x86/power/built-in.a
CC arch/x86/kernel/cpu/mtrr/cyrix.o
AR drivers/pci/pwrctrl/built-in.a
CC drivers/pci/msi/api.o
AS arch/x86/lib/retpoline.o
AR init/built-in.a
CC arch/x86/kernel/cpu/mtrr/centaur.o
CC drivers/pci/hotplug/pci_hotplug_core.o
CC arch/x86/lib/string_32.o
CC kernel/locking/mutex.o
CC drivers/pci/msi/msi.o
CC drivers/pci/msi/irqdomain.o
CC arch/x86/kernel/fpu/signal.o
CC arch/x86/lib/strstr_32.o
CC fs/notify/notification.o
CC arch/x86/lib/usercopy.o
CC mm/fadvise.o
CC lib/crypto/memneq.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
AR drivers/pci/switch/built-in.a
AR drivers/pci/controller/dwc/built-in.a
CC crypto/asymmetric_keys/pkcs7_trust.o
CC arch/x86/kernel/cpu/mce/intel.o
CC drivers/pci/hotplug/acpi_pcihp.o
AR drivers/pci/controller/mobiveil/built-in.a
OBJCOPY arch/x86/entry/vdso/vdso32.so
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
CC security/keys/permission.o
CC arch/x86/entry/vdso/vdso-image-32.o
AR drivers/pci/controller/plda/built-in.a
AR drivers/pci/controller/built-in.a
CC fs/iomap/fiemap.o
AR block/partitions/built-in.a
CC security/security.o
CC kernel/sched/build_policy.o
CC fs/quota/quota_tree.o
CC arch/x86/pci/direct.o
CC arch/x86/mm/init.o
CC lib/crypto/mpi/generic_mpih-mul3.o
CC arch/x86/lib/usercopy_32.o
CC sound/core/seq/seq_dummy.o
AR arch/x86/entry/vdso/built-in.a
CC arch/x86/entry/syscall_32.o
AR arch/x86/mm/pat/built-in.a
CC arch/x86/entry/common.o
CC drivers/pci/access.o
CC arch/x86/kernel/cpu/mtrr/legacy.o
AR arch/x86/platform/geode/built-in.a
AR arch/x86/platform/efi/built-in.a
CC crypto/asymmetric_keys/pkcs7_verify.o
CC drivers/pci/pcie/rcec.o
AR arch/x86/platform/iris/built-in.a
CC drivers/video/console/dummycon.o
CC drivers/video/backlight/backlight.o
CC arch/x86/kernel/cpu/microcode/core.o
CC arch/x86/platform/intel/iosf_mbi.o
CC arch/x86/events/intel/bts.o
CC drivers/video/console/vgacon.o
CC net/core/request_sock.o
CC arch/x86/lib/msr-smp.o
CC arch/x86/kernel/cpu/microcode/intel.o
CC arch/x86/kernel/acpi/boot.o
CC arch/x86/kernel/cpu/mce/amd.o
CC fs/notify/group.o
CC arch/x86/kernel/apic/apic.o
CC fs/quota/quota.o
CC kernel/power/qos.o
AR arch/x86/events/amd/built-in.a
CC fs/iomap/seek.o
AR arch/x86/platform/intel-mid/built-in.a
CC mm/maccess.o
CC fs/proc/inode.o
AR arch/x86/platform/intel-quark/built-in.a
CC arch/x86/lib/cache-smp.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
CC mm/page-writeback.o
CC arch/x86/kernel/kprobes/core.o
AR drivers/video/fbdev/core/built-in.a
AR drivers/pci/hotplug/built-in.a
CC arch/x86/kernel/kprobes/opt.o
CC arch/x86/kernel/fpu/xstate.o
CC kernel/locking/semaphore.o
AR drivers/video/fbdev/omap/built-in.a
CC arch/x86/pci/mmconfig-shared.o
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
CC crypto/asymmetric_keys/x509.asn1.o
CC lib/crypto/mpi/generic_mpih-rshift.o
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
AR drivers/video/fbdev/omap2/omapfb/built-in.a
AR drivers/pci/msi/built-in.a
CC crypto/asymmetric_keys/x509_akid.asn1.o
CC crypto/asymmetric_keys/x509_cert_parser.o
CC kernel/power/main.o
AR drivers/video/fbdev/omap2/built-in.a
AR drivers/video/fbdev/built-in.a
CC kernel/locking/rwsem.o
CC kernel/locking/percpu-rwsem.o
CC block/blk-map.o
CC security/keys/process_keys.o
CC arch/x86/lib/msr.o
AR sound/core/seq/built-in.a
CC sound/core/memory.o
CC drivers/pci/bus.o
CC security/selinux/netlink.o
CC arch/x86/pci/fixup.o
CC drivers/pci/pcie/bwctrl.o
CC kernel/sched/build_utility.o
AR arch/x86/platform/intel/built-in.a
CC drivers/pci/pcie/aspm.o
CC arch/x86/kernel/cpu/microcode/amd.o
CC arch/x86/kernel/cpu/mce/threshold.o
AR arch/x86/platform/olpc/built-in.a
CC arch/x86/mm/init_32.o
AR arch/x86/platform/scx200/built-in.a
AR arch/x86/platform/ts5500/built-in.a
AR arch/x86/platform/uv/built-in.a
AR arch/x86/platform/built-in.a
AR drivers/video/backlight/built-in.a
CC ipc/namespace.o
AR sound/i2c/other/built-in.a
AR sound/i2c/built-in.a
CC arch/x86/events/core.o
CC fs/notify/mark.o
CC fs/kernfs/mount.o
AS arch/x86/entry/thunk.o
CC io_uring/notif.o
AS arch/x86/lib/msr-reg.o
AR arch/x86/entry/built-in.a
CC fs/kernfs/inode.o
CC fs/iomap/swapfile.o
CC ipc/mq_sysctl.o
CC fs/kernfs/dir.o
CC arch/x86/events/intel/ds.o
CC lib/crypto/mpi/generic_mpih-sub1.o
CC crypto/asymmetric_keys/pkcs7.asn1.o
CC arch/x86/events/intel/knc.o
CC arch/x86/lib/msr-reg-export.o
CC crypto/asymmetric_keys/pkcs7_parser.o
CC security/lsm_audit.o
CC fs/proc/root.o
AR drivers/video/console/built-in.a
CC drivers/video/aperture.o
CC net/core/skbuff.o
CC sound/core/control.o
LDS arch/x86/kernel/vmlinux.lds
CC kernel/power/console.o
AS arch/x86/kernel/head_32.o
CC kernel/locking/spinlock.o
CC kernel/power/process.o
AR arch/x86/kernel/kprobes/built-in.a
CC lib/zlib_inflate/inffast.o
CC kernel/power/suspend.o
CC arch/x86/kernel/acpi/sleep.o
AS arch/x86/lib/hweight.o
CC lib/zlib_inflate/inflate.o
CC kernel/power/hibernate.o
CC arch/x86/lib/iomem.o
CC kernel/locking/osq_lock.o
CC drivers/pci/probe.o
CC kernel/locking/qspinlock.o
CC security/selinux/nlmsgtab.o
CC fs/quota/kqid.o
AR ipc/built-in.a
AR sound/drivers/opl3/built-in.a
CC block/blk-merge.o
AR sound/drivers/opl4/built-in.a
AR sound/drivers/vx/built-in.a
AR sound/drivers/mpu401/built-in.a
AR sound/isa/ad1816a/built-in.a
AR sound/drivers/pcsp/built-in.a
AR sound/pci/ac97/built-in.a
AR sound/drivers/built-in.a
AR sound/isa/ad1848/built-in.a
CC security/keys/request_key.o
AR sound/isa/cs423x/built-in.a
CC security/device_cgroup.o
AR sound/pci/ali5451/built-in.a
CC arch/x86/pci/acpi.o
AR sound/isa/es1688/built-in.a
AR sound/pci/asihpi/built-in.a
AR sound/isa/galaxy/built-in.a
AR arch/x86/kernel/fpu/built-in.a
CC arch/x86/events/intel/lbr.o
AR sound/pci/au88x0/built-in.a
AR sound/isa/gus/built-in.a
AR sound/isa/msnd/built-in.a
AR sound/pci/aw2/built-in.a
AR sound/isa/opti9xx/built-in.a
AR sound/pci/ctxfi/built-in.a
AR sound/isa/sb/built-in.a
CC arch/x86/kernel/apic/apic_common.o
AR sound/pci/ca0106/built-in.a
CC lib/crypto/mpi/generic_mpih-add1.o
AR crypto/asymmetric_keys/built-in.a
AR sound/isa/wavefront/built-in.a
AR sound/pci/cs46xx/built-in.a
CC crypto/cipher.o
CC arch/x86/pci/legacy.o
AR sound/pci/cs5535audio/built-in.a
AR sound/isa/wss/built-in.a
AR sound/pci/lola/built-in.a
AR sound/isa/built-in.a
AR sound/pci/lx6464es/built-in.a
AR arch/x86/kernel/cpu/microcode/built-in.a
AR sound/pci/echoaudio/built-in.a
AR sound/pci/emu10k1/built-in.a
CC kernel/printk/printk.o
CC fs/proc/base.o
CC fs/sysfs/file.o
CC sound/pci/hda/hda_bind.o
AR fs/iomap/built-in.a
CC arch/x86/lib/atomic64_32.o
CC arch/x86/mm/fault.o
CC fs/quota/netlink.o
CC arch/x86/kernel/head32.o
CC arch/x86/kernel/ebda.o
CC arch/x86/lib/inat.o
CC fs/notify/fdinfo.o
AR arch/x86/lib/built-in.a
CC fs/proc/generic.o
CC mm/folio-compat.o
CC kernel/locking/rtmutex_api.o
AR arch/x86/kernel/cpu/mce/built-in.a
CC arch/x86/kernel/cpu/cacheinfo.o
CC kernel/locking/qrwlock.o
AR arch/x86/lib/lib.a
CC drivers/video/cmdline.o
CC arch/x86/pci/irq.o
CC arch/x86/pci/common.o
CC fs/proc/array.o
AS arch/x86/kernel/acpi/wakeup_32.o
CC lib/zlib_inflate/infutil.o
CC net/sched/sch_generic.o
CC drivers/pci/pcie/pme.o
CC arch/x86/kernel/acpi/cstate.o
CC arch/x86/kernel/apic/apic_noop.o
CC io_uring/tctx.o
CC net/netlink/af_netlink.o
CC lib/crypto/mpi/mpicoder.o
CC fs/kernfs/file.o
CC crypto/compress.o
AR net/bpf/built-in.a
CC net/netlink/genetlink.o
CC fs/sysfs/dir.o
AR sound/ppc/built-in.a
CC security/keys/request_key_auth.o
CC block/blk-timeout.o
CC lib/zlib_inflate/inftrees.o
CC block/blk-lib.o
CC sound/core/misc.o
AR sound/pci/ice1712/built-in.a
CC arch/x86/events/probe.o
CC arch/x86/pci/early.o
CC lib/zlib_deflate/deflate.o
CC security/selinux/netif.o
CC kernel/power/snapshot.o
CC sound/pci/hda/hda_codec.o
AR fs/notify/built-in.a
CC lib/zlib_deflate/deftree.o
CC net/sched/sch_mq.o
CC kernel/irq/irqdesc.o
CC lib/zlib_inflate/inflate_syms.o
CC arch/x86/kernel/apic/ipi.o
AR fs/quota/built-in.a
CC kernel/irq/handle.o
AR arch/x86/kernel/acpi/built-in.a
AR drivers/idle/built-in.a
CC security/selinux/netnode.o
CC io_uring/filetable.o
CC arch/x86/events/intel/p4.o
CC mm/readahead.o
CC arch/x86/mm/ioremap.o
CC drivers/video/nomodeset.o
CC kernel/irq/manage.o
CC lib/crypto/mpi/mpi-add.o
CC drivers/pci/host-bridge.o
AR drivers/pci/pcie/built-in.a
CC kernel/printk/printk_safe.o
AR lib/zlib_inflate/built-in.a
CC mm/swap.o
AR kernel/locking/built-in.a
CC crypto/algapi.o
CC arch/x86/events/intel/p6.o
AR sound/pci/korg1212/built-in.a
CC sound/core/device.o
CC arch/x86/kernel/cpu/scattered.o
CC fs/sysfs/symlink.o
CC io_uring/rw.o
CC kernel/printk/nbcon.o
CC mm/truncate.o
CC kernel/rcu/update.o
CC kernel/rcu/sync.o
CC security/keys/user_defined.o
CC drivers/video/hdmi.o
CC crypto/scatterwalk.o
CC fs/devpts/inode.o
CC net/ethtool/ioctl.o
CC lib/zlib_deflate/deflate_syms.o
CC security/keys/proc.o
CC net/ethtool/common.o
CC drivers/pci/remove.o
CC arch/x86/events/utils.o
CC arch/x86/pci/bus_numa.o
CC block/blk-mq.o
CC arch/x86/kernel/apic/vector.o
CC arch/x86/kernel/apic/init.o
CC lib/lzo/lzo1x_compress.o
CC lib/crypto/mpi/mpi-bit.o
CC fs/kernfs/symlink.o
CC arch/x86/kernel/cpu/topology_common.o
CC lib/lzo/lzo1x_decompress_safe.o
CC sound/core/info.o
AR lib/zlib_deflate/built-in.a
CC arch/x86/pci/amd_bus.o
CC arch/x86/kernel/apic/hw_nmi.o
CC net/core/datagram.o
CC kernel/power/swap.o
CC mm/vmscan.o
CC lib/crypto/utils.o
CC arch/x86/mm/extable.o
CC fs/sysfs/mount.o
CC fs/proc/fd.o
CC arch/x86/events/intel/pt.o
CC lib/crypto/chacha.o
CC kernel/rcu/srcutree.o
CC sound/pci/hda/hda_jack.o
AR kernel/livepatch/built-in.a
CC fs/sysfs/group.o
CC kernel/dma/mapping.o
CC security/keys/sysctl.o
CC drivers/pci/pci.o
CC net/netfilter/core.o
CC security/selinux/netport.o
CC arch/x86/kernel/platform-quirks.o
AR fs/devpts/built-in.a
CC arch/x86/kernel/cpu/topology_ext.o
CC arch/x86/kernel/cpu/topology_amd.o
AR lib/lzo/built-in.a
CC kernel/rcu/tree.o
CC arch/x86/events/rapl.o
CC net/netfilter/nf_log.o
CC kernel/rcu/rcu_segcblist.o
CC lib/crypto/mpi/mpi-cmp.o
AR drivers/video/built-in.a
CC kernel/entry/common.o
CC security/selinux/status.o
CC io_uring/net.o
CC kernel/printk/printk_ringbuffer.o
CC sound/core/isadma.o
CC net/sched/sch_frag.o
AR fs/kernfs/built-in.a
CC net/sched/sch_api.o
CC sound/core/vmaster.o
CC kernel/entry/syscall_user_dispatch.o
CC crypto/proc.o
CC kernel/irq/spurious.o
CC io_uring/poll.o
AR arch/x86/pci/built-in.a
CC net/netlink/policy.o
CC block/blk-mq-tag.o
CC lib/crypto/mpi/mpi-sub-ui.o
CC arch/x86/kernel/cpu/common.o
AR sound/arm/built-in.a
CC sound/pci/hda/hda_auto_parser.o
CC arch/x86/kernel/cpu/rdrand.o
CC lib/lz4/lz4_decompress.o
AR kernel/sched/built-in.a
CC arch/x86/mm/mmap.o
CC security/keys/keyctl_pkey.o
CC kernel/printk/sysctl.o
AR sound/sh/built-in.a
CC arch/x86/kernel/process_32.o
CC sound/core/ctljack.o
AR fs/sysfs/built-in.a
CC arch/x86/kernel/signal.o
CC arch/x86/kernel/signal_32.o
CC net/ethtool/netlink.o
CC block/blk-stat.o
CC arch/x86/kernel/apic/io_apic.o
CC fs/proc/proc_tty.o
CC arch/x86/kernel/apic/msi.o
CC arch/x86/events/msr.o
CC kernel/dma/direct.o
CC kernel/irq/resend.o
CC crypto/aead.o
CC fs/netfs/buffered_read.o
CC arch/x86/kernel/traps.o
CC fs/ext4/balloc.o
CC security/selinux/ss/ebitmap.o
AR kernel/printk/built-in.a
CC drivers/pci/pci-driver.o
AR sound/synth/emux/built-in.a
AR sound/synth/built-in.a
CC arch/x86/kernel/apic/probe_32.o
CC kernel/power/user.o
CC sound/core/jack.o
CC lib/crypto/mpi/mpi-div.o
CC mm/shrinker.o
CC arch/x86/mm/pgtable.o
AR kernel/entry/built-in.a
CC kernel/power/poweroff.o
CC fs/proc/cmdline.o
CC arch/x86/events/intel/uncore.o
AR security/keys/built-in.a
CC net/ethtool/bitset.o
CC sound/core/hwdep.o
CC fs/proc/consoles.o
AR net/netlink/built-in.a
AR drivers/char/ipmi/built-in.a
CC kernel/irq/chip.o
CC arch/x86/events/intel/uncore_nhmex.o
CC net/netfilter/nf_queue.o
CC fs/jbd2/transaction.o
CC net/netfilter/nf_sockopt.o
CC net/netfilter/utils.o
CC fs/jbd2/commit.o
CC drivers/acpi/acpica/dsargs.o
CC net/netfilter/nfnetlink.o
AR sound/pci/mixart/built-in.a
CC fs/jbd2/recovery.o
CC arch/x86/kernel/cpu/match.o
CC arch/x86/mm/physaddr.o
CC arch/x86/events/intel/uncore_snb.o
CC net/netfilter/nfnetlink_log.o
CC block/blk-mq-sysfs.o
CC sound/pci/hda/hda_sysfs.o
CC drivers/acpi/acpica/dscontrol.o
CC lib/crypto/mpi/mpi-mod.o
CC fs/ramfs/inode.o
AR kernel/power/built-in.a
CC net/core/stream.o
CC block/blk-mq-cpumap.o
AR lib/lz4/built-in.a
CC fs/proc/cpuinfo.o
CC security/selinux/ss/hashtab.o
CC sound/pci/hda/hda_controller.o
CC crypto/geniv.o
CC security/selinux/ss/symtab.o
CC fs/jbd2/checkpoint.o
CC sound/core/timer.o
CC fs/netfs/buffered_write.o
CC sound/pci/hda/hda_proc.o
CC lib/zstd/zstd_decompress_module.o
CC arch/x86/kernel/cpu/bugs.o
CC lib/xz/xz_dec_syms.o
CC crypto/lskcipher.o
CC arch/x86/mm/tlb.o
CC io_uring/eventfd.o
AR drivers/acpi/pmic/built-in.a
CC mm/shmem.o
CC kernel/dma/ops_helpers.o
CC drivers/acpi/acpica/dsdebug.o
CC fs/hugetlbfs/inode.o
CC net/xfrm/xfrm_policy.o
CC net/ipv4/netfilter/nf_defrag_ipv4.o
CC net/ipv4/route.o
CC net/sched/sch_blackhole.o
CC mm/util.o
CC security/selinux/ss/sidtab.o
CC lib/crypto/mpi/mpi-mul.o
CC lib/zstd/decompress/huf_decompress.o
CC kernel/irq/dummychip.o
CC lib/xz/xz_dec_stream.o
CC security/selinux/ss/avtab.o
CC fs/proc/devices.o
CC kernel/irq/devres.o
CC lib/zstd/decompress/zstd_ddict.o
AR arch/x86/kernel/apic/built-in.a
CC drivers/acpi/acpica/dsfield.o
CC net/netfilter/nf_conntrack_core.o
CC drivers/acpi/dptf/int340x_thermal.o
CC sound/core/hrtimer.o
CC arch/x86/kernel/cpu/aperfmperf.o
CC net/ethtool/strset.o
CC fs/ramfs/file-mmu.o
CC net/ipv4/netfilter/nf_reject_ipv4.o
CC io_uring/uring_cmd.o
CC arch/x86/mm/cpu_entry_area.o
AR sound/usb/misc/built-in.a
AR sound/usb/usx2y/built-in.a
AR sound/usb/caiaq/built-in.a
AR sound/usb/6fire/built-in.a
CC arch/x86/mm/maccess.o
AR sound/usb/hiface/built-in.a
AR sound/usb/bcd2000/built-in.a
CC kernel/dma/remap.o
AR sound/usb/built-in.a
AR sound/firewire/built-in.a
CC lib/dim/dim.o
CC arch/x86/events/intel/uncore_snbep.o
CC block/blk-mq-sched.o
CC drivers/pnp/pnpacpi/core.o
AR drivers/amba/built-in.a
CC fs/jbd2/revoke.o
CC lib/crypto/aes.o
CC lib/dim/net_dim.o
CC drivers/pnp/core.o
CC drivers/pci/search.o
CC security/selinux/ss/policydb.o
CC kernel/irq/autoprobe.o
CC fs/ext4/bitmap.o
CC lib/xz/xz_dec_lzma2.o
CC net/core/scm.o
CC lib/crypto/mpi/mpih-cmp.o
AR drivers/acpi/dptf/built-in.a
CC net/xfrm/xfrm_state.o
CC drivers/acpi/acpica/dsinit.o
CC security/selinux/ss/services.o
CC security/selinux/ss/conditional.o
CC crypto/skcipher.o
CC arch/x86/events/intel/uncore_discovery.o
CC net/ethtool/linkinfo.o
CC fs/proc/interrupts.o
CC fs/netfs/direct_read.o
CC lib/xz/xz_dec_bcj.o
CC block/ioctl.o
CC net/sched/cls_api.o
CC mm/mmzone.o
AR sound/sparc/built-in.a
CC net/ipv4/inetpeer.o
CC sound/core/pcm.o
CC sound/pci/hda/hda_hwdep.o
CC arch/x86/mm/pgprot.o
AR fs/ramfs/built-in.a
CC fs/jbd2/journal.o
CC arch/x86/mm/pgtable_32.o
AR kernel/dma/built-in.a
CC sound/pci/hda/hda_intel.o
AR sound/spi/built-in.a
CC security/selinux/ss/mls.o
CC lib/crypto/arc4.o
CC drivers/acpi/acpica/dsmethod.o
CC drivers/pnp/pnpacpi/rsparser.o
CC kernel/irq/irqdomain.o
CC lib/dim/rdma_dim.o
CC sound/core/pcm_native.o
CC block/genhd.o
CC lib/crypto/mpi/mpih-div.o
CC fs/proc/loadavg.o
CC arch/x86/kernel/cpu/cpuid-deps.o
CC net/netfilter/nf_conntrack_standalone.o
CC drivers/pci/rom.o
CC fs/ext4/block_validity.o
AR lib/xz/built-in.a
CC lib/zstd/decompress/zstd_decompress.o
CC net/unix/af_unix.o
AR drivers/clk/actions/built-in.a
CC drivers/dma/dw/core.o
AR drivers/clk/analogbits/built-in.a
CC lib/zstd/decompress/zstd_decompress_block.o
AR fs/hugetlbfs/built-in.a
CC drivers/dma/hsu/hsu.o
AR drivers/clk/bcm/built-in.a
CC lib/zstd/zstd_common_module.o
AR drivers/clk/imgtec/built-in.a
AR drivers/clk/imx/built-in.a
AR drivers/clk/ingenic/built-in.a
CC io_uring/openclose.o
AR drivers/soc/apple/built-in.a
AR drivers/clk/mediatek/built-in.a
CC io_uring/sqpoll.o
AR drivers/soc/aspeed/built-in.a
AR drivers/clk/microchip/built-in.a
AR drivers/soc/bcm/built-in.a
AR drivers/clk/mstar/built-in.a
CC io_uring/xattr.o
CC drivers/acpi/acpica/dsmthdat.o
AR drivers/soc/fsl/built-in.a
AR drivers/clk/mvebu/built-in.a
AR lib/dim/built-in.a
AR drivers/soc/fujitsu/built-in.a
CC drivers/virtio/virtio.o
AR drivers/clk/ralink/built-in.a
CC net/ipv4/netfilter/ip_tables.o
AR drivers/soc/hisilicon/built-in.a
AR drivers/soc/imx/built-in.a
AR drivers/clk/renesas/built-in.a
AR drivers/soc/ixp4xx/built-in.a
AR drivers/clk/socfpga/built-in.a
AR drivers/soc/loongson/built-in.a
AR drivers/clk/sophgo/built-in.a
AR drivers/clk/sprd/built-in.a
AR drivers/soc/mediatek/built-in.a
AR drivers/clk/starfive/built-in.a
AR drivers/soc/microchip/built-in.a
AR drivers/clk/sunxi-ng/built-in.a
AR drivers/soc/nuvoton/built-in.a
CC net/ethtool/linkmodes.o
CC arch/x86/mm/iomap_32.o
AR drivers/clk/ti/built-in.a
CC arch/x86/kernel/cpu/umwait.o
AR drivers/clk/versatile/built-in.a
AR drivers/soc/pxa/built-in.a
CC drivers/tty/vt/vt_ioctl.o
CC fs/netfs/direct_write.o
AR drivers/soc/amlogic/built-in.a
AR drivers/clk/xilinx/built-in.a
AR drivers/clk/built-in.a
AR drivers/soc/qcom/built-in.a
AR drivers/soc/renesas/built-in.a
MKCAP arch/x86/kernel/cpu/capflags.c
AR drivers/soc/rockchip/built-in.a
CC arch/x86/kernel/cpu/powerflags.o
AR drivers/soc/sunxi/built-in.a
CC arch/x86/mm/hugetlbpage.o
CC arch/x86/mm/dump_pagetables.o
AR drivers/soc/ti/built-in.a
CC fs/proc/meminfo.o
AR drivers/soc/versatile/built-in.a
AR drivers/dma/idxd/built-in.a
AR drivers/soc/xilinx/built-in.a
CC net/core/gen_stats.o
CC drivers/tty/hvc/hvc_console.o
AR drivers/soc/built-in.a
CC crypto/seqiv.o
CC arch/x86/mm/highmem_32.o
AR kernel/rcu/built-in.a
CC lib/zstd/common/debug.o
CC net/ipv4/protocol.o
CC drivers/tty/vt/vc_screen.o
CC drivers/char/hw_random/core.o
CC drivers/acpi/acpica/dsobject.o
CC drivers/pci/setup-res.o
CC drivers/char/agp/backend.o
AR drivers/pnp/pnpacpi/built-in.a
CC drivers/pnp/card.o
CC lib/crypto/mpi/mpih-mul.o
CC mm/vmstat.o
CC fs/ext4/dir.o
CC net/ethtool/rss.o
CC mm/backing-dev.o
CC net/ipv4/netfilter/iptable_filter.o
AR drivers/dma/hsu/built-in.a
CC net/netfilter/nf_conntrack_expect.o
CC kernel/irq/proc.o
CC drivers/virtio/virtio_ring.o
CC kernel/irq/migration.o
CC drivers/tty/vt/selection.o
CC sound/core/pcm_lib.o
CC drivers/acpi/acpica/dsopcode.o
CC net/ipv4/ip_input.o
CC block/ioprio.o
CC fs/fat/cache.o
CC net/ipv4/netfilter/iptable_mangle.o
CC fs/proc/stat.o
CC crypto/echainiv.o
CC fs/proc/uptime.o
CC drivers/dma/dw/dw.o
AR sound/pci/hda/built-in.a
AR arch/x86/mm/built-in.a
CC arch/x86/events/intel/cstate.o
AR sound/pci/nm256/built-in.a
CC drivers/acpi/acpica/dspkginit.o
AR sound/pci/oxygen/built-in.a
AR sound/pci/pcxhr/built-in.a
CC fs/netfs/iterator.o
AR sound/pci/riptide/built-in.a
AR sound/pci/rme9652/built-in.a
AR drivers/tty/hvc/built-in.a
AR sound/pci/trident/built-in.a
CC fs/isofs/namei.o
AR sound/pci/ymfpci/built-in.a
CC drivers/char/hw_random/intel-rng.o
CC fs/proc/util.o
CC crypto/ahash.o
AR sound/pci/vx222/built-in.a
AR sound/pci/built-in.a
CC drivers/char/agp/generic.o
CC fs/fat/dir.o
CC drivers/pci/irq.o
CC fs/isofs/inode.o
CC drivers/acpi/x86/apple.o
CC drivers/char/mem.o
CC drivers/pnp/driver.o
CC net/xfrm/xfrm_hash.o
CC lib/crypto/mpi/mpi-pow.o
CC net/core/gen_estimator.o
CC io_uring/nop.o
AR drivers/dma/amd/built-in.a
CC mm/mm_init.o
CC kernel/irq/cpuhotplug.o
CC drivers/acpi/acpica/dsutils.o
CC drivers/char/hw_random/amd-rng.o
CC arch/x86/kernel/idt.o
CC drivers/char/agp/isoch.o
CC drivers/tty/vt/keyboard.o
CC fs/proc/version.o
CC fs/proc/softirqs.o
CC net/core/net_namespace.o
CC security/selinux/ss/context.o
CC drivers/dma/dw/idma32.o
CC fs/ext4/ext4_jbd2.o
CC net/ethtool/linkstate.o
CC net/core/secure_seq.o
CC block/badblocks.o
CC net/core/flow_dissector.o
CC lib/crypto/mpi/mpiutil.o
CC drivers/acpi/x86/cmos_rtc.o
CC drivers/pnp/resource.o
AR arch/x86/events/intel/built-in.a
CC net/core/sysctl_net_core.o
CC drivers/tty/serial/8250/8250_core.o
AR arch/x86/events/built-in.a
CC net/netfilter/nf_conntrack_helper.o
AR fs/jbd2/built-in.a
CC drivers/tty/serial/8250/8250_platform.o
CC drivers/acpi/x86/lpss.o
CC drivers/pci/vpd.o
CC drivers/acpi/acpica/dswexec.o
CC net/core/dev.o
CC net/ipv4/netfilter/ipt_REJECT.o
CC net/xfrm/xfrm_input.o
CC net/sched/act_api.o
CC kernel/module/main.o
CC block/blk-rq-qos.o
CC fs/netfs/locking.o
CC drivers/tty/serial/serial_core.o
CC lib/zstd/common/entropy_common.o
AR sound/parisc/built-in.a
CC drivers/acpi/x86/s2idle.o
CC crypto/shash.o
CC io_uring/fs.o
CC kernel/irq/pm.o
CC drivers/char/hw_random/geode-rng.o
CC drivers/dma/dw/acpi.o
CC fs/proc/namespaces.o
CC drivers/acpi/tables.o
CC net/netfilter/nf_conntrack_proto.o
CC drivers/char/agp/amd64-agp.o
CC lib/zstd/common/error_private.o
CC drivers/tty/serial/serial_base_bus.o
AR drivers/tty/ipwireless/built-in.a
CC net/unix/garbage.o
CC drivers/char/agp/intel-agp.o
CC lib/zstd/common/fse_decompress.o
CC drivers/acpi/osi.o
CC drivers/acpi/acpica/dswload.o
CC drivers/acpi/x86/utils.o
AR lib/crypto/mpi/built-in.a
CC sound/core/pcm_misc.o
CC lib/crypto/gf128mul.o
CC fs/isofs/dir.o
CC fs/ext4/extents.o
CC drivers/virtio/virtio_anchor.o
CC security/selinux/netlabel.o
CC crypto/akcipher.o
CC kernel/irq/msi.o
CC fs/fat/fatent.o
CC mm/percpu.o
CC crypto/sig.o
CC net/ethtool/debug.o
CC drivers/acpi/acpica/dswload2.o
CC drivers/pci/setup-bus.o
CC block/disk-events.o
AR drivers/dma/dw/built-in.a
CC drivers/tty/serial/8250/8250_pnp.o
AR drivers/dma/mediatek/built-in.a
CC drivers/pnp/manager.o
CC kernel/irq/affinity.o
CC drivers/char/hw_random/via-rng.o
AR drivers/dma/qcom/built-in.a
CC lib/zstd/common/zstd_common.o
CC drivers/tty/vt/vt.o
AR drivers/dma/stm32/built-in.a
AR drivers/dma/ti/built-in.a
AR drivers/dma/xilinx/built-in.a
CC drivers/dma/dmaengine.o
AR drivers/iommu/amd/built-in.a
CC fs/netfs/main.o
AR drivers/iommu/intel/built-in.a
CC fs/netfs/misc.o
AR drivers/gpu/host1x/built-in.a
AR lib/zstd/built-in.a
AR drivers/iommu/arm/arm-smmu/built-in.a
CC fs/netfs/objects.o
CC drivers/connector/cn_queue.o
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
AR drivers/iommu/arm/built-in.a
CC [M] net/ipv4/netfilter/iptable_nat.o
CC fs/proc/self.o
AR drivers/iommu/iommufd/built-in.a
AR drivers/iommu/riscv/built-in.a
CC drivers/iommu/iommu.o
CC io_uring/splice.o
CC fs/proc/thread_self.o
CC drivers/pci/vc.o
CC lib/crypto/blake2s.o
CC drivers/acpi/x86/blacklist.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC fs/proc/proc_sysctl.o
CC drivers/char/agp/intel-gtt.o
CC sound/core/pcm_memory.o
AR drivers/gpu/drm/tests/built-in.a
AR drivers/gpu/drm/arm/built-in.a
CC fs/nfs/client.o
AR drivers/gpu/drm/clients/built-in.a
CC fs/exportfs/expfs.o
CC drivers/gpu/drm/display/drm_display_helper_mod.o
CC fs/isofs/util.o
CC drivers/acpi/acpica/dswscope.o
CC fs/proc/proc_net.o
AR drivers/char/hw_random/built-in.a
CC mm/slab_common.o
CC drivers/tty/tty_io.o
CC net/ethtool/wol.o
CC net/unix/sysctl_net_unix.o
CC lib/crypto/blake2s-generic.o
CC drivers/pnp/support.o
CC drivers/tty/n_tty.o
CC crypto/kpp.o
CC drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
AR drivers/acpi/x86/built-in.a
CC drivers/acpi/acpica/dswstate.o
CC net/xfrm/xfrm_output.o
CC net/core/dev_addr_lists.o
CC net/ethtool/features.o
CC drivers/tty/serial/8250/8250_rsa.o
CC block/blk-ia-ranges.o
CC net/ethtool/privflags.o
CC net/netfilter/nf_conntrack_proto_generic.o
CC drivers/virtio/virtio_pci_legacy_dev.o
CC net/sched/sch_fifo.o
AR fs/exportfs/built-in.a
CC fs/isofs/rock.o
CC fs/ext4/extents_status.o
CC kernel/time/time.o
CC kernel/irq/matrix.o
CC sound/core/memalloc.o
CC io_uring/sync.o
CC fs/fat/file.o
CC drivers/gpu/drm/ttm/ttm_tt.o
AR security/selinux/built-in.a
CC drivers/dma/virt-dma.o
AR security/built-in.a
ASN.1 crypto/rsapubkey.asn1.[ch]
CC fs/fat/inode.o
ASN.1 crypto/rsaprivkey.asn1.[ch]
CC drivers/tty/serial/serial_ctrl.o
CC drivers/connector/connector.o
CC lib/crypto/sha1.o
CC block/early-lookup.o
CC drivers/acpi/acpica/evevent.o
CC drivers/pnp/interface.o
CC arch/x86/kernel/irq.o
AR net/ipv4/netfilter/built-in.a
CC net/ipv4/ip_fragment.o
AR drivers/char/agp/built-in.a
CC drivers/char/random.o
CC net/ipv4/ip_forward.o
CC kernel/module/strict_rwx.o
CC drivers/tty/serial/8250/8250_port.o
CC crypto/rsa.o
CC drivers/gpu/drm/display/drm_dp_helper.o
CC drivers/virtio/virtio_pci_modern.o
CC drivers/acpi/acpica/evgpe.o
CC lib/fonts/fonts.o
COPY drivers/tty/vt/defkeymap.c
AR net/unix/built-in.a
CC lib/crypto/sha256.o
AR drivers/gpu/drm/renesas/rcar-du/built-in.a
AR drivers/gpu/drm/renesas/rz-du/built-in.a
AR drivers/gpu/drm/omapdrm/built-in.a
AR drivers/gpu/drm/renesas/built-in.a
CC drivers/dma/acpi-dma.o
CC drivers/gpu/drm/i915/i915_config.o
CC drivers/pci/mmap.o
CC arch/x86/kernel/cpu/topology.o
CC kernel/time/timer.o
CC drivers/connector/cn_proc.o
CC fs/netfs/read_collect.o
CC drivers/pnp/quirks.o
CC fs/proc/kcore.o
CC net/ethtool/rings.o
CC block/bounce.o
CC drivers/gpu/drm/i915/i915_driver.o
CC crypto/rsa_helper.o
CC io_uring/msg_ring.o
CC block/bsg.o
CC lib/fonts/font_8x16.o
CC fs/isofs/export.o
CC fs/nfs/dir.o
CC net/netfilter/nf_conntrack_proto_tcp.o
CC sound/core/pcm_timer.o
CC drivers/gpu/drm/ttm/ttm_bo.o
CC kernel/module/kmod.o
CC drivers/acpi/acpica/evgpeblk.o
CC block/blk-cgroup.o
CC net/sched/cls_cgroup.o
CC net/ethtool/channels.o
CC drivers/iommu/iommu-traces.o
CC net/netfilter/nf_conntrack_proto_udp.o
CC block/blk-ioprio.o
CC block/blk-iolatency.o
CC block/blk-iocost.o
AR lib/crypto/built-in.a
CC net/netfilter/nf_conntrack_proto_icmp.o
CC net/ipv4/ip_options.o
CC net/netfilter/nf_conntrack_extend.o
CC drivers/pci/devres.o
CC mm/compaction.o
CC net/xfrm/xfrm_sysctl.o
AR kernel/irq/built-in.a
CC block/mq-deadline.o
AR lib/fonts/built-in.a
CC lib/argv_split.o
CC crypto/rsa-pkcs1pad.o
AR drivers/dma/built-in.a
CC net/netfilter/nf_conntrack_acct.o
CC drivers/acpi/acpica/evgpeinit.o
CC drivers/virtio/virtio_pci_common.o
CC fs/fat/misc.o
CC drivers/tty/vt/consolemap.o
CC drivers/pnp/system.o
CC fs/isofs/joliet.o
HOSTCC drivers/tty/vt/conmakehash
CC sound/core/seq_device.o
CC net/netfilter/nf_conntrack_seqadj.o
CC fs/isofs/compress.o
In file included from /workspace/kernel/drivers/gpu/drm/i915/display/intel_bw.h:12,
from /workspace/kernel/drivers/gpu/drm/i915/i915_driver.c:50:
/workspace/kernel/drivers/gpu/drm/i915/display/intel_display_power.h: In function ‘intel_display_power_put’:
/workspace/kernel/drivers/gpu/drm/i915/display/intel_display_power.h:228:43: error: passing argument 1 of ‘intel_display_power_put_unchecked’ from incompatible pointer type [-Werror=incompatible-pointer-types]
228 | intel_display_power_put_unchecked(display, domain);
| ^~~~~~~
| |
| struct intel_display *
/workspace/kernel/drivers/gpu/drm/i915/display/intel_display_power.h:220:65: note: expected ‘struct drm_i915_private *’ but argument is of type ‘struct intel_display *’
220 | void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
| ~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~
CC lib/bug.o
CC fs/proc/vmcore.o
CC drivers/char/misc.o
CC kernel/module/tree_lookup.o
CC fs/proc/kmsg.o
CC net/netfilter/nf_conntrack_proto_icmpv6.o
CC io_uring/advise.o
CC drivers/acpi/acpica/evgpeutil.o
AR drivers/connector/built-in.a
CC lib/buildid.o
CC drivers/tty/tty_ioctl.o
CC fs/netfs/read_pgpriv2.o
CC drivers/gpu/drm/ttm/ttm_bo_util.o
CC fs/proc/page.o
CC crypto/rsassa-pkcs1.o
CC drivers/virtio/virtio_pci_legacy.o
CC drivers/pci/proc.o
AR drivers/pnp/built-in.a
CC kernel/time/hrtimer.o
CC drivers/iommu/iommu-sysfs.o
CC net/ethtool/coalesce.o
CC mm/show_mem.o
AR sound/core/built-in.a
AR sound/pcmcia/vx/built-in.a
CC kernel/time/sleep_timeout.o
AR sound/pcmcia/pdaudiocf/built-in.a
CC drivers/acpi/acpica/evglock.o
AR sound/pcmcia/built-in.a
CC drivers/char/virtio_console.o
CC net/sched/ematch.o
AR sound/mips/built-in.a
CC block/kyber-iosched.o
CC kernel/time/timekeeping.o
CC net/xfrm/xfrm_replay.o
AR sound/soc/built-in.a
AR sound/atmel/built-in.a
CC drivers/tty/serial/8250/8250_dma.o
AR drivers/gpu/drm/tilcdc/built-in.a
CC drivers/tty/tty_ldisc.o
CC sound/hda/hda_bus_type.o
CC drivers/gpu/drm/i915/i915_drm_client.o
CC mm/interval_tree.o
CC fs/fat/nfs.o
CC kernel/module/kallsyms.o
cc1: all warnings being treated as errors
CC net/ipv6/netfilter/ip6_tables.o
make[6]: *** [/workspace/kernel/scripts/Makefile.build:194: drivers/gpu/drm/i915/i915_driver.o] Error 1
CC net/ipv6/af_inet6.o
make[6]: *** Waiting for unfinished jobs....
CC arch/x86/kernel/cpu/proc.o
CC drivers/tty/vt/defkeymap.o
CC drivers/char/hpet.o
CC drivers/gpu/drm/display/drm_dp_mst_topology.o
AR fs/isofs/built-in.a
CC net/packet/af_packet.o
CC net/ipv4/ip_output.o
CC arch/x86/kernel/cpu/feat_ctl.o
AR drivers/gpu/vga/built-in.a
CC crypto/acompress.o
CC drivers/tty/serial/8250/8250_dwlib.o
CONMK drivers/tty/vt/consolemap_deftbl.c
CC drivers/tty/vt/consolemap_deftbl.o
CC lib/clz_tab.o
CC fs/ext4/file.o
CC io_uring/epoll.o
AR drivers/tty/vt/built-in.a
CC lib/cmdline.o
CC drivers/acpi/acpica/evhandler.o
CC drivers/virtio/virtio_pci_admin_legacy_io.o
AR sound/x86/built-in.a
CC fs/netfs/read_retry.o
AR sound/xen/built-in.a
CC drivers/gpu/drm/ttm/ttm_bo_vm.o
CC drivers/pci/pci-sysfs.o
AR fs/proc/built-in.a
CC arch/x86/kernel/cpu/intel.o
CC drivers/gpu/drm/virtio/virtgpu_drv.o
CC drivers/char/nvram.o
CC drivers/iommu/dma-iommu.o
CC net/ipv6/netfilter/ip6table_filter.o
CC drivers/gpu/drm/virtio/virtgpu_kms.o
CC lib/cpumask.o
CC drivers/pci/slot.o
CC fs/fat/namei_vfat.o
CC net/ipv4/ip_sockglue.o
CC fs/nfs/file.o
CC sound/hda/hdac_bus.o
CC kernel/futex/core.o
In file included from /workspace/kernel/drivers/gpu/drm/i915/display/intel_display_core.h:23,
from /workspace/kernel/drivers/gpu/drm/i915/i915_drv.h:40,
from /workspace/kernel/drivers/gpu/drm/i915/gt/intel_context.h:14,
from /workspace/kernel/drivers/gpu/drm/i915/gem/i915_gem_context.h:12,
from /workspace/kernel/drivers/gpu/drm/i915/i915_drm_client.c:14:
/workspace/kernel/drivers/gpu/drm/i915/display/intel_display_power.h: In function ‘intel_display_power_put’:
/workspace/kernel/drivers/gpu/drm/i915/display/intel_display_power.h:228:43: error: passing argument 1 of ‘intel_display_power_put_unchecked’ from incompatible pointer type [-Werror=incompatible-pointer-types]
228 | intel_display_power_put_unchecked(display, domain);
| ^~~~~~~
| |
| struct intel_display *
/workspace/kernel/drivers/gpu/drm/i915/display/intel_display_power.h:220:65: note: expected ‘struct drm_i915_private *’ but argument is of type ‘struct intel_display *’
220 | void intel_display_power_put_unchecked(struct drm_i915_private *dev_priv,
| ~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~
CC kernel/futex/syscalls.o
CC drivers/acpi/acpica/evmisc.o
CC net/netfilter/nf_conntrack_netlink.o
CC drivers/pci/pci-acpi.o
CC kernel/futex/pi.o
AR net/dsa/built-in.a
CC fs/lockd/clntlock.o
AR drivers/gpu/drm/imx/built-in.a
CC drivers/gpu/drm/display/drm_dsc_helper.o
CC drivers/iommu/iova.o
CC kernel/module/procfs.o
CC drivers/tty/serial/8250/8250_pcilib.o
CC drivers/virtio/virtio_input.o
AR net/sched/built-in.a
CC fs/lockd/clntproc.o
CC crypto/scompress.o
CC net/ethtool/pause.o
CC arch/x86/kernel/cpu/tsx.o
CC lib/ctype.o
CC block/blk-mq-pci.o
cc1: all warnings being treated as errors
CC lib/dec_and_lock.o
make[6]: *** [/workspace/kernel/scripts/Makefile.build:194: drivers/gpu/drm/i915/i915_drm_client.o] Error 1
make[5]: *** [/workspace/kernel/scripts/Makefile.build:440: drivers/gpu/drm/i915] Error 2
make[5]: *** Waiting for unfinished jobs....
CC arch/x86/kernel/irq_32.o
CC drivers/base/power/sysfs.o
CC drivers/acpi/acpica/evregion.o
CC io_uring/statx.o
CC drivers/base/firmware_loader/builtin/main.o
CC drivers/base/regmap/regmap.o
CC net/xfrm/xfrm_device.o
CC drivers/gpu/drm/ttm/ttm_module.o
CC lib/decompress.o
CC drivers/gpu/drm/virtio/virtgpu_gem.o
CC drivers/acpi/acpica/evrgnini.o
CC fs/netfs/write_collect.o
AR drivers/char/built-in.a
CC fs/ext4/fsmap.o
CC drivers/base/firmware_loader/main.o
CC drivers/gpu/drm/ttm/ttm_execbuf_util.o
CC lib/decompress_bunzip2.o
CC drivers/gpu/drm/ttm/ttm_range_manager.o
CC mm/list_lru.o
CC sound/hda/hdac_device.o
CC kernel/time/ntp.o
CC kernel/module/sysfs.o
CC arch/x86/kernel/cpu/intel_epb.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC drivers/acpi/acpica/evsci.o
CC drivers/gpu/drm/ttm/ttm_resource.o
CC drivers/gpu/drm/ttm/ttm_pool.o
CC drivers/acpi/acpica/evxface.o
CC drivers/tty/serial/8250/8250_early.o
CC drivers/acpi/osl.o
CC kernel/futex/requeue.o
CC fs/nls/nls_base.o
AR fs/unicode/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_vram.o
CC fs/autofs/init.o
CC drivers/base/power/generic_ops.o
CC fs/lockd/clntxdr.o
CC fs/lockd/host.o
CC net/ipv6/netfilter/ip6table_mangle.o
CC drivers/base/regmap/regcache.o
CC block/blk-mq-virtio.o
CC fs/ext4/fsync.o
CC fs/fat/namei_msdos.o
CC drivers/pci/iomap.o
CC drivers/tty/serial/8250/8250_exar.o
CC drivers/virtio/virtio_dma_buf.o
CC sound/hda/hdac_sysfs.o
CC arch/x86/kernel/cpu/amd.o
CC crypto/algboss.o
CC net/xfrm/xfrm_nat_keepalive.o
AR drivers/iommu/built-in.a
CC drivers/pci/quirks.o
CC io_uring/timeout.o
CC arch/x86/kernel/cpu/hygon.o
CC net/ethtool/eee.o
CC drivers/tty/serial/8250/8250_lpss.o
CC drivers/acpi/acpica/evxfevnt.o
CC lib/decompress_inflate.o
CC fs/nls/nls_cp437.o
CC fs/autofs/inode.o
CC drivers/base/power/common.o
CC mm/workingset.o
AR kernel/module/built-in.a
CC lib/decompress_unlz4.o
CC fs/netfs/write_issue.o
CC drivers/base/regmap/regcache-rbtree.o
CC kernel/time/clocksource.o
CC block/blk-mq-debugfs.o
AR drivers/base/firmware_loader/built-in.a
CC kernel/futex/waitwake.o
CC net/sunrpc/auth_gss/auth_gss.o
CC fs/ext4/hash.o
CC drivers/gpu/drm/virtio/virtgpu_display.o
CC net/netfilter/nf_conntrack_ftp.o
CC drivers/tty/serial/serial_port.o
CC arch/x86/kernel/dumpstack_32.o
CC fs/autofs/root.o
AR drivers/virtio/built-in.a
CC net/ipv4/inet_hashtables.o
CC net/sunrpc/clnt.o
CC net/sunrpc/auth_gss/gss_generic_token.o
CC drivers/acpi/acpica/evxfgpe.o
CC net/sunrpc/xprt.o
CC fs/nls/nls_ascii.o
CC drivers/gpu/drm/ttm/ttm_device.o
CC fs/nfs/getroot.o
CC drivers/gpu/drm/ttm/ttm_sys_manager.o
CC drivers/acpi/utils.o
CC drivers/gpu/drm/ttm/ttm_agp_backend.o
CC drivers/base/power/qos.o
AR fs/fat/built-in.a
CC drivers/pci/pci-label.o
CC sound/hda/hdac_regmap.o
CC net/sunrpc/socklib.o
CC fs/ext4/ialloc.o
CC lib/decompress_unlzma.o
CC arch/x86/kernel/cpu/centaur.o
CC drivers/tty/serial/8250/8250_mid.o
CC net/core/dst.o
CC crypto/testmgr.o
CC fs/nls/nls_iso8859-1.o
CC drivers/gpu/drm/display/drm_hdcp_helper.o
CC net/xfrm/xfrm_algo.o
CC net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
CC net/xfrm/xfrm_user.o
CC drivers/acpi/acpica/evxfregn.o
CC drivers/tty/serial/8250/8250_pci.o
CC net/ethtool/tsinfo.o
CC fs/lockd/svc.o
CC mm/debug.o
AR kernel/futex/built-in.a
CC net/ipv4/inet_timewait_sock.o
CC io_uring/fdinfo.o
CC fs/ext4/indirect.o
CC net/ipv6/netfilter/nf_conntrack_reasm.o
CC net/ipv6/netfilter/nf_reject_ipv6.o
CC arch/x86/kernel/cpu/transmeta.o
AR drivers/base/test/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_vq.o
CC fs/autofs/symlink.o
AR net/packet/built-in.a
CC net/ethtool/cabletest.o
CC block/blk-pm.o
CC mm/gup.o
AR sound/virtio/built-in.a
CC drivers/base/regmap/regcache-flat.o
CC net/sunrpc/xprtsock.o
CC fs/nls/nls_utf8.o
CC kernel/time/jiffies.o
CC io_uring/cancel.o
CC fs/9p/vfs_super.o
CC drivers/acpi/acpica/exconcat.o
CC drivers/block/loop.o
AR drivers/gpu/drm/ttm/built-in.a
CC drivers/acpi/acpica/exconfig.o
CC sound/sound_core.o
CC drivers/misc/eeprom/eeprom_93cx6.o
AR fs/netfs/built-in.a
CC sound/last.o
CC crypto/cmac.o
AR drivers/mfd/built-in.a
CC drivers/block/virtio_blk.o
CC sound/hda/hdac_controller.o
CC drivers/tty/serial/8250/8250_pericom.o
AR fs/nls/built-in.a
CC net/ipv6/netfilter/ip6t_ipv6header.o
CC lib/decompress_unlzo.o
CC drivers/gpu/drm/display/drm_hdmi_helper.o
CC kernel/time/timer_list.o
CC fs/nfs/inode.o
CC arch/x86/kernel/cpu/zhaoxin.o
CC fs/9p/vfs_inode.o
CC drivers/acpi/acpica/exconvrt.o
CC net/netfilter/nf_conntrack_irc.o
CC fs/autofs/waitq.o
CC drivers/base/regmap/regcache-maple.o
AR drivers/misc/eeprom/built-in.a
CC fs/9p/vfs_inode_dotl.o
CC drivers/base/regmap/regmap-debugfs.o
AR drivers/misc/cb710/built-in.a
AR drivers/misc/lis3lv02d/built-in.a
CC drivers/pci/vgaarb.o
CC fs/nfs/super.o
CC fs/ext4/inline.o
AR drivers/misc/cardreader/built-in.a
CC block/holder.o
AR drivers/misc/keba/built-in.a
CC drivers/base/power/runtime.o
AR drivers/misc/built-in.a
CC sound/hda/hdac_stream.o
CC crypto/hmac.o
CC io_uring/waitid.o
AR fs/hostfs/built-in.a
CC net/ipv6/anycast.o
CC net/ipv6/ip6_output.o
CC net/sunrpc/sched.o
CC drivers/base/component.o
CC net/core/netevent.o
CC arch/x86/kernel/cpu/vortex.o
CC fs/lockd/svclock.o
CC drivers/gpu/drm/virtio/virtgpu_fence.o
CC arch/x86/kernel/time.o
CC lib/decompress_unxz.o
CC drivers/acpi/acpica/excreate.o
CC net/ipv4/inet_connection_sock.o
CC drivers/gpu/drm/display/drm_scdc_helper.o
CC net/ethtool/tunnels.o
CC sound/hda/array.o
CC fs/autofs/expire.o
CC drivers/base/core.o
AR drivers/tty/serial/8250/built-in.a
CC drivers/tty/serial/earlycon.o
CC kernel/time/timeconv.o
CC drivers/base/bus.o
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC io_uring/register.o
CC net/sunrpc/auth_gss/gss_mech_switch.o
CC fs/ext4/inode.o
CC net/sunrpc/auth_gss/svcauth_gss.o
AR block/built-in.a
CC drivers/tty/tty_buffer.o
CC drivers/acpi/acpica/exdebug.o
AR drivers/base/regmap/built-in.a
CC drivers/tty/tty_port.o
CC crypto/crypto_null.o
CC crypto/md5.o
CC net/ipv6/ip6_input.o
CC net/core/neighbour.o
CC lib/decompress_unzstd.o
CC net/ipv6/netfilter/ip6t_REJECT.o
AR drivers/block/built-in.a
CC kernel/time/timecounter.o
CC net/sunrpc/auth.o
CC drivers/base/power/wakeirq.o
CC net/sunrpc/auth_gss/gss_rpc_upcall.o
CC fs/9p/vfs_addr.o
CC kernel/time/alarmtimer.o
CC drivers/base/power/main.o
CC net/netfilter/nf_conntrack_sip.o
CC net/ethtool/fec.o
AR drivers/pci/built-in.a
CC fs/nfs/io.o
CC drivers/acpi/acpica/exdump.o
CC sound/hda/hdmi_chmap.o
CC drivers/base/dd.o
CC arch/x86/kernel/ioport.o
CC drivers/gpu/drm/virtio/virtgpu_object.o
CC fs/9p/vfs_file.o
CC drivers/gpu/drm/virtio/virtgpu_debugfs.o
AR drivers/tty/serial/built-in.a
CC fs/autofs/dev-ioctl.o
AR drivers/gpu/drm/display/built-in.a
CC fs/nfs/direct.o
CC arch/x86/kernel/cpu/vmware.o
CC fs/nfs/pagelist.o
CC mm/mmap_lock.o
CC arch/x86/kernel/cpu/hypervisor.o
CC drivers/gpu/drm/virtio/virtgpu_plane.o
CC net/core/rtnetlink.o
CC crypto/sha256_generic.o
AR net/wireless/tests/built-in.a
CC drivers/acpi/acpica/exfield.o
CC net/wireless/core.o
CC drivers/gpu/drm/virtio/virtgpu_ioctl.o
CC lib/dump_stack.o
CC net/ethtool/eeprom.o
CC drivers/gpu/drm/virtio/virtgpu_prime.o
CC drivers/tty/tty_mutex.o
AR net/xfrm/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_trace_points.o
CC drivers/gpu/drm/virtio/virtgpu_submit.o
CC mm/highmem.o
AR drivers/nfc/built-in.a
CC fs/lockd/svcshare.o
CC sound/hda/trace.o
CC kernel/cgroup/cgroup.o
CC crypto/sha512_generic.o
CC drivers/acpi/acpica/exfldio.o
CC net/wireless/sysfs.o
CC arch/x86/kernel/dumpstack.o
CC fs/debugfs/inode.o
CC arch/x86/kernel/cpu/mshyperv.o
CC fs/9p/vfs_dir.o
AR drivers/dax/hmem/built-in.a
AR drivers/dax/built-in.a
CC net/netfilter/nf_nat_core.o
CC io_uring/truncate.o
CC net/sunrpc/auth_gss/gss_rpc_xdr.o
CC crypto/sha3_generic.o
CC kernel/cgroup/rstat.o
CC lib/earlycpio.o
AR net/ipv6/netfilter/built-in.a
AR fs/autofs/built-in.a
CC net/ipv6/addrconf.o
CC kernel/time/posix-timers.o
CC fs/ext4/ioctl.o
CC drivers/tty/tty_ldsem.o
CC fs/tracefs/inode.o
CC drivers/base/syscore.o
CC fs/debugfs/file.o
CC lib/extable.o
CC net/ipv4/tcp.o
CC kernel/trace/trace_clock.o
CC net/sunrpc/auth_null.o
CC drivers/dma-buf/dma-buf.o
CC drivers/acpi/acpica/exmisc.o
CC fs/nfs/read.o
CC crypto/ecb.o
AR drivers/gpu/drm/virtio/built-in.a
make[4]: *** [/workspace/kernel/scripts/Makefile.build:440: drivers/gpu/drm] Error 2
make[3]: *** [/workspace/kernel/scripts/Makefile.build:440: drivers/gpu] Error 2
make[3]: *** Waiting for unfinished jobs....
CC drivers/dma-buf/dma-fence.o
CC fs/nfs/symlink.o
CC net/ethtool/stats.o
CC [M] fs/efivarfs/inode.o
CC kernel/trace/ring_buffer.o
CC mm/memory.o
CC [M] fs/efivarfs/file.o
CC fs/nfs/unlink.o
CC lib/flex_proportions.o
CC fs/open.o
CC drivers/base/power/wakeup.o
CC sound/hda/hdac_component.o
CC net/ethtool/phc_vclocks.o
CC net/netfilter/nf_nat_proto.o
CC fs/lockd/svcproc.o
CC fs/9p/vfs_dentry.o
CC fs/lockd/svcsubs.o
CC drivers/tty/tty_baudrate.o
CC drivers/acpi/acpica/exmutex.o
CC arch/x86/kernel/cpu/debugfs.o
CC fs/ext4/mballoc.o
CC crypto/cbc.o
CC io_uring/memmap.o
CC fs/ext4/migrate.o
CC kernel/cgroup/namespace.o
CC lib/idr.o
CC fs/tracefs/event_inode.o
CC fs/read_write.o
CC drivers/base/power/wakeup_stats.o
CC fs/nfs/write.o
CC drivers/acpi/acpica/exnames.o
CC net/sunrpc/auth_gss/trace.o
CC [M] fs/efivarfs/super.o
CC fs/ext4/mmp.o
CC crypto/ctr.o
CC net/ethtool/mm.o
CC fs/9p/v9fs.o
AR fs/debugfs/built-in.a
CC drivers/tty/tty_jobctrl.o
CC fs/ext4/move_extent.o
CC sound/hda/hdac_i915.o
CC net/ethtool/module.o
CC kernel/time/posix-cpu-timers.o
CC [M] fs/efivarfs/vars.o
CC arch/x86/kernel/cpu/bus_lock.o
CC drivers/base/power/trace.o
CC lib/iomem_copy.o
CC net/sunrpc/auth_gss/gss_krb5_mech.o
CC mm/mincore.o
CC drivers/acpi/acpica/exoparg1.o
CC kernel/time/posix-clock.o
CC drivers/dma-buf/dma-fence-array.o
CC net/sunrpc/auth_gss/gss_krb5_seal.o
CC kernel/cgroup/cgroup-v1.o
CC mm/mlock.o
CC lib/irq_regs.o
CC io_uring/io-wq.o
CC net/ipv6/addrlabel.o
CC crypto/gcm.o
CC fs/9p/fid.o
CC fs/lockd/mon.o
CC lib/is_single_threaded.o
CC sound/hda/intel-dsp-config.o
CC lib/klist.o
AR fs/tracefs/built-in.a
CC drivers/tty/n_null.o
CC fs/9p/xattr.o
CC net/sunrpc/auth_tls.o
CC net/wireless/radiotap.o
CC drivers/base/driver.o
CC drivers/acpi/acpica/exoparg2.o
CC kernel/cgroup/freezer.o
CC fs/lockd/trace.o
CC drivers/dma-buf/dma-fence-chain.o
CC net/netfilter/nf_nat_helper.o
LD [M] fs/efivarfs/efivarfs.o
CC mm/mmap.o
CC net/ipv6/route.o
CC net/netfilter/nf_nat_masquerade.o
AR drivers/base/power/built-in.a
CC lib/kobject.o
CC fs/nfs/namespace.o
CC drivers/acpi/acpica/exoparg3.o
CC kernel/time/itimer.o
CC net/sunrpc/auth_gss/gss_krb5_unseal.o
CC arch/x86/kernel/cpu/capflags.o
AR arch/x86/kernel/cpu/built-in.a
CC kernel/bpf/core.o
CC net/sunrpc/auth_gss/gss_krb5_wrap.o
CC arch/x86/kernel/nmi.o
CC net/ipv4/tcp_input.o
CC drivers/tty/pty.o
CC sound/hda/intel-nhlt.o
CC drivers/base/class.o
CC net/ethtool/cmis_fw_update.o
CC drivers/base/platform.o
CC drivers/dma-buf/dma-fence-unwrap.o
CC kernel/events/core.o
CC fs/file_table.o
CC crypto/ccm.o
CC arch/x86/kernel/ldt.o
CC arch/x86/kernel/setup.o
AR fs/9p/built-in.a
CC drivers/acpi/acpica/exoparg6.o
CC crypto/aes_generic.o
AR net/mac80211/tests/built-in.a
CC net/netlabel/netlabel_user.o
CC net/mac80211/main.o
CC net/rfkill/core.o
CC net/9p/mod.o
CC lib/kobject_uevent.o
CC net/dns_resolver/dns_key.o
CC net/9p/client.o
CC fs/nfs/mount_clnt.o
CC kernel/fork.o
CC net/wireless/util.o
CC sound/hda/intel-sdw-acpi.o
CC net/netfilter/nf_nat_ftp.o
CC io_uring/futex.o
CC net/sunrpc/auth_gss/gss_krb5_crypto.o
CC drivers/dma-buf/dma-resv.o
CC drivers/acpi/acpica/exprep.o
CC net/core/utils.o
CC drivers/tty/tty_audit.o
CC fs/lockd/xdr.o
CC drivers/base/cpu.o
CC kernel/time/clockevents.o
CC kernel/trace/trace.o
CC mm/mmu_gather.o
CC arch/x86/kernel/x86_init.o
CC net/ethtool/cmis_cdb.o
CC lib/logic_pio.o
CC net/handshake/alert.o
CC fs/ext4/namei.o
CC kernel/exec_domain.o
CC net/rfkill/input.o
CC drivers/acpi/acpica/exregion.o
CC net/devres.o
CC net/wireless/reg.o
CC net/handshake/genl.o
CC net/ipv6/ip6_fib.o
AR sound/hda/built-in.a
CC net/handshake/netlink.o
AR sound/built-in.a
CC crypto/crc32c_generic.o
CC net/dns_resolver/dns_query.o
CC net/handshake/request.o
CC kernel/cgroup/legacy_freezer.o
CC net/netlabel/netlabel_kapi.o
CC drivers/acpi/reboot.o
CC net/handshake/tlshd.o
CC drivers/dma-buf/sync_file.o
CC fs/lockd/clnt4xdr.o
CC drivers/acpi/acpica/exresnte.o
CC kernel/time/tick-common.o
CC fs/lockd/xdr4.o
CC drivers/tty/sysrq.o
CC net/ethtool/pse-pd.o
CC drivers/acpi/acpica/exresolv.o
CC lib/maple_tree.o
CC crypto/authenc.o
CC io_uring/napi.o
CC net/core/link_watch.o
CC drivers/acpi/nvs.o
CC arch/x86/kernel/i8259.o
CC fs/nfs/nfstrace.o
AR net/rfkill/built-in.a
CC arch/x86/kernel/irqinit.o
CC mm/mprotect.o
CC drivers/base/firmware.o
CC net/netfilter/nf_nat_irc.o
CC fs/super.o
CC fs/nfs/export.o
CC kernel/time/tick-broadcast.o
AR net/dns_resolver/built-in.a
CC kernel/events/ring_buffer.o
CC net/sunrpc/auth_gss/gss_krb5_keys.o
CC net/9p/error.o
CC kernel/cgroup/pids.o
CC drivers/acpi/acpica/exresop.o
CC net/ipv4/tcp_output.o
CC fs/char_dev.o
CC net/netfilter/nf_nat_sip.o
AR drivers/dma-buf/built-in.a
CC kernel/time/tick-broadcast-hrtimer.o
CC net/core/filter.o
CC drivers/base/init.o
CC fs/ext4/page-io.o
CC mm/mremap.o
CC net/socket.o
CC kernel/trace/trace_output.o
CC lib/memcat_p.o
CC net/9p/protocol.o
CC drivers/acpi/acpica/exserial.o
CC kernel/panic.o
CC fs/stat.o
AR drivers/tty/built-in.a
CC net/sunrpc/auth_unix.o
CC kernel/events/callchain.o
CC arch/x86/kernel/jump_label.o
CC kernel/time/tick-oneshot.o
CC crypto/authencesn.o
CC net/sunrpc/svc.o
CC net/handshake/trace.o
CC net/netlabel/netlabel_domainhash.o
CC kernel/cgroup/rdma.o
CC net/ethtool/plca.o
CC kernel/trace/trace_seq.o
CC drivers/base/map.o
CC fs/lockd/svc4proc.o
CC fs/lockd/procfs.o
CC fs/ext4/readpage.o
CC net/9p/trans_common.o
AR kernel/bpf/built-in.a
CC net/ipv4/tcp_timer.o
CC drivers/base/devres.o
CC kernel/trace/trace_stat.o
CC drivers/acpi/acpica/exstore.o
CC kernel/trace/trace_printk.o
CC net/ipv4/tcp_ipv4.o
CC net/wireless/scan.o
CC kernel/time/tick-sched.o
AR io_uring/built-in.a
CC net/9p/trans_fd.o
AR net/sunrpc/auth_gss/built-in.a
CC net/ipv4/tcp_minisocks.o
CC net/ipv4/tcp_cong.o
CC net/ipv4/tcp_metrics.o
CC drivers/acpi/acpica/exstoren.o
CC arch/x86/kernel/irq_work.o
CC mm/msync.o
CC net/mac80211/status.o
CC net/ipv6/ipv6_sockglue.o
CC net/ipv6/ndisc.o
CC kernel/cgroup/cpuset.o
CC net/ipv6/udp.o
CC arch/x86/kernel/probe_roms.o
CC net/ipv4/tcp_fastopen.o
CC net/sunrpc/svcsock.o
CC drivers/acpi/wakeup.o
CC net/wireless/nl80211.o
CC net/netfilter/x_tables.o
CC crypto/lzo.o
CC fs/nfs/sysfs.o
CC drivers/acpi/acpica/exstorob.o
CC drivers/base/attribute_container.o
CC drivers/base/transport_class.o
CC net/core/sock_diag.o
CC drivers/acpi/acpica/exsystem.o
CC net/ethtool/phy.o
CC net/sunrpc/svcauth.o
CC net/ipv4/tcp_rate.o
CC net/netlabel/netlabel_addrlist.o
CC kernel/cpu.o
CC kernel/time/timer_migration.o
AR fs/lockd/built-in.a
CC mm/page_vma_mapped.o
CC drivers/base/topology.o
CC fs/ext4/resize.o
CC net/core/dev_ioctl.o
AR net/handshake/built-in.a
CC kernel/events/hw_breakpoint.o
CC drivers/acpi/acpica/extrace.o
CC net/core/tso.o
CC kernel/events/uprobes.o
CC fs/exec.o
CC fs/nfs/fs_context.o
CC crypto/lzo-rle.o
CC arch/x86/kernel/sys_ia32.o
CC kernel/trace/pid_list.o
CC kernel/cgroup/misc.o
CC net/9p/trans_virtio.o
CC net/sunrpc/svcauth_unix.o
CC lib/nmi_backtrace.o
CC drivers/acpi/acpica/exutils.o
CC drivers/base/container.o
CC drivers/base/property.o
CC lib/objpool.o
CC mm/pagewalk.o
CC drivers/acpi/acpica/hwacpi.o
CC net/ipv6/udplite.o
CC net/mac80211/driver-ops.o
CC net/ipv6/raw.o
CC net/sunrpc/addr.o
CC drivers/acpi/acpica/hwesleep.o
AR net/ethtool/built-in.a
CC net/sunrpc/rpcb_clnt.o
CC crypto/rng.o
CC net/sunrpc/timer.o
CC net/sunrpc/xdr.o
CC net/netlabel/netlabel_mgmt.o
CC fs/pipe.o
CC net/sunrpc/sunrpc_syms.o
CC arch/x86/kernel/ksysfs.o
CC net/sunrpc/cache.o
CC net/sunrpc/rpc_pipe.o
CC net/ipv6/icmp.o
CC fs/nfs/nfsroot.o
CC kernel/trace/trace_sched_switch.o
CC net/core/sock_reuseport.o
CC kernel/time/vsyscall.o
CC drivers/acpi/acpica/hwgpe.o
CC mm/pgtable-generic.o
CC fs/ext4/super.o
CC net/sysctl_net.o
CC net/netfilter/xt_tcpudp.o
CC arch/x86/kernel/bootflag.o
CC kernel/cgroup/debug.o
CC drivers/acpi/sleep.o
CC kernel/trace/trace_nop.o
CC drivers/acpi/device_sysfs.o
CC drivers/acpi/acpica/hwregs.o
CC crypto/drbg.o
CC arch/x86/kernel/e820.o
CC kernel/time/timekeeping_debug.o
CC net/ipv6/mcast.o
AR net/9p/built-in.a
CC kernel/time/namespace.o
CC kernel/exit.o
CC drivers/base/cacheinfo.o
CC drivers/base/swnode.o
CC net/ipv4/tcp_recovery.o
CC drivers/base/auxiliary.o
CC crypto/jitterentropy.o
CC arch/x86/kernel/pci-dma.o
CC lib/plist.o
CC drivers/acpi/acpica/hwsleep.o
CC mm/rmap.o
CC fs/nfs/sysctl.o
CC lib/radix-tree.o
CC net/ipv4/tcp_ulp.o
CC net/sunrpc/sysfs.o
CC kernel/trace/blktrace.o
CC net/netlabel/netlabel_unlabeled.o
CC net/netfilter/xt_CONNSECMARK.o
CC net/sunrpc/svc_xprt.o
CC fs/nfs/nfs3super.o
CC mm/vmalloc.o
AR kernel/cgroup/built-in.a
CC fs/namei.o
CC crypto/jitterentropy-kcapi.o
CC drivers/acpi/acpica/hwvalid.o
CC drivers/acpi/acpica/hwxface.o
CC fs/ext4/symlink.o
CC arch/x86/kernel/quirks.o
CC crypto/ghash-generic.o
CC net/core/fib_notifier.o
CC kernel/trace/trace_events.o
CC mm/vma.o
CC lib/ratelimit.o
AR kernel/time/built-in.a
CC kernel/softirq.o
CC fs/ext4/sysfs.o
CC crypto/hash_info.o
CC kernel/resource.o
CC fs/ext4/xattr.o
CC net/wireless/mlme.o
CC net/mac80211/sta_info.o
CC fs/ext4/xattr_hurd.o
AR kernel/events/built-in.a
CC net/netfilter/xt_NFLOG.o
CC net/netfilter/xt_SECMARK.o
CC net/wireless/ibss.o
CC mm/process_vm_access.o
CC drivers/acpi/acpica/hwxfsleep.o
CC net/netlabel/netlabel_cipso_v4.o
CC net/ipv4/tcp_offload.o
CC kernel/sysctl.o
CC fs/fcntl.o
CC drivers/base/devtmpfs.o
CC crypto/rsapubkey.asn1.o
CC crypto/rsaprivkey.asn1.o
AR crypto/built-in.a
CC fs/ext4/xattr_trusted.o
CC drivers/acpi/acpica/hwpci.o
CC net/mac80211/wep.o
CC drivers/base/module.o
CC drivers/acpi/device_pm.o
CC net/netfilter/xt_TCPMSS.o
CC mm/page_alloc.o
CC arch/x86/kernel/kdebugfs.o
CC net/netlabel/netlabel_calipso.o
CC net/core/xdp.o
CC lib/rbtree.o
CC kernel/capability.o
CC net/mac80211/aead_api.o
CC fs/nfs/nfs3client.o
CC net/ipv4/tcp_plb.o
CC drivers/acpi/acpica/nsaccess.o
CC drivers/acpi/acpica/nsalloc.o
CC drivers/acpi/proc.o
CC kernel/ptrace.o
CC drivers/acpi/bus.o
CC fs/ioctl.o
CC lib/seq_buf.o
CC drivers/acpi/glue.o
CC drivers/acpi/scan.o
CC net/mac80211/wpa.o
CC drivers/base/auxiliary_sysfs.o
CC drivers/base/devcoredump.o
CC net/wireless/sme.o
CC arch/x86/kernel/alternative.o
CC mm/page_frag_cache.o
CC lib/siphash.o
CC net/ipv4/datagram.o
CC arch/x86/kernel/i8253.o
CC drivers/acpi/acpica/nsarguments.o
CC arch/x86/kernel/hw_breakpoint.o
CC net/sunrpc/xprtmultipath.o
CC arch/x86/kernel/tsc.o
CC mm/init-mm.o
CC mm/memblock.o
CC mm/slub.o
CC kernel/trace/trace_export.o
CC lib/string.o
CC fs/ext4/xattr_user.o
CC net/sunrpc/stats.o
CC kernel/user.o
CC net/netfilter/xt_conntrack.o
CC kernel/signal.o
CC kernel/sys.o
CC drivers/acpi/acpica/nsconvert.o
CC mm/madvise.o
CC net/wireless/chan.o
AR net/netlabel/built-in.a
CC drivers/base/platform-msi.o
CC lib/timerqueue.o
CC lib/union_find.o
CC fs/nfs/nfs3proc.o
CC net/wireless/ethtool.o
CC net/ipv6/reassembly.o
CC net/ipv6/tcp_ipv6.o
CC kernel/umh.o
CC fs/ext4/fast_commit.o
CC net/core/flow_offload.o
CC lib/vsprintf.o
CC kernel/workqueue.o
CC kernel/trace/trace_event_perf.o
CC net/sunrpc/sysctl.o
CC kernel/trace/trace_events_filter.o
CC net/wireless/mesh.o
CC fs/readdir.o
CC kernel/trace/trace_events_trigger.o
CC drivers/acpi/acpica/nsdump.o
CC drivers/base/physical_location.o
CC net/core/gro.o
CC net/ipv6/ping.o
CC lib/win_minmax.o
CC net/mac80211/scan.o
CC lib/xarray.o
CC fs/select.o
CC drivers/acpi/acpica/nseval.o
CC net/ipv4/raw.o
CC net/wireless/ap.o
CC arch/x86/kernel/tsc_msr.o
CC mm/page_io.o
CC mm/swap_state.o
CC fs/nfs/nfs3xdr.o
CC kernel/trace/trace_eprobe.o
CC arch/x86/kernel/io_delay.o
CC drivers/acpi/acpica/nsinit.o
CC drivers/base/trace.o
CC fs/ext4/orphan.o
CC arch/x86/kernel/rtc.o
CC net/core/netdev-genl.o
CC fs/ext4/acl.o
CC net/netfilter/xt_policy.o
CC kernel/trace/trace_kprobe.o
CC fs/ext4/xattr_security.o
CC kernel/pid.o
CC mm/swapfile.o
CC net/ipv6/exthdrs.o
CC net/netfilter/xt_state.o
CC net/mac80211/offchannel.o
CC drivers/acpi/acpica/nsload.o
CC [M] net/netfilter/nf_log_syslog.o
CC kernel/task_work.o
CC net/core/netdev-genl-gen.o
CC drivers/acpi/mipi-disco-img.o
CC lib/lockref.o
CC net/mac80211/ht.o
CC lib/bcd.o
CC [M] net/netfilter/xt_mark.o
CC arch/x86/kernel/resource.o
CC kernel/trace/error_report-traces.o
CC drivers/acpi/acpica/nsnames.o
CC net/ipv4/udp.o
CC net/wireless/trace.o
AR drivers/base/built-in.a
CC lib/sort.o
CC fs/nfs/nfs3acl.o
AR net/sunrpc/built-in.a
CC [M] net/netfilter/xt_nat.o
AS arch/x86/kernel/irqflags.o
CC [M] net/netfilter/xt_LOG.o
CC lib/parser.o
CC net/core/gso.o
CC arch/x86/kernel/static_call.o
CC net/core/net-sysfs.o
CC drivers/acpi/resource.o
CC net/mac80211/agg-tx.o
CC drivers/acpi/acpi_processor.o
CC net/core/hotdata.o
CC drivers/acpi/acpica/nsobject.o
CC kernel/trace/power-traces.o
CC fs/dcache.o
CC [M] net/netfilter/xt_MASQUERADE.o
CC lib/debug_locks.o
CC arch/x86/kernel/process.o
CC kernel/trace/rpm-traces.o
CC fs/nfs/nfs4proc.o
CC mm/swap_slots.o
CC fs/nfs/nfs4xdr.o
CC [M] net/netfilter/xt_addrtype.o
CC net/ipv6/datagram.o
CC drivers/acpi/processor_core.o
CC net/ipv6/ip6_flowlabel.o
CC net/core/netdev_rx_queue.o
CC fs/inode.o
CC net/core/net-procfs.o
CC fs/attr.o
CC net/ipv6/inet6_connection_sock.o
CC kernel/extable.o
CC kernel/params.o
CC drivers/acpi/acpica/nsparse.o
CC kernel/kthread.o
CC kernel/sys_ni.o
CC net/mac80211/agg-rx.o
CC net/ipv6/udp_offload.o
CC net/mac80211/vht.o
CC lib/random32.o
CC lib/bust_spinlocks.o
CC drivers/acpi/acpica/nspredef.o
CC drivers/acpi/acpica/nsprepkg.o
CC net/core/netpoll.o
CC mm/dmapool.o
CC kernel/nsproxy.o
CC mm/hugetlb.o
CC lib/kasprintf.o
CC net/mac80211/he.o
CC drivers/acpi/acpica/nsrepair.o
CC net/core/fib_rules.o
CC fs/bad_inode.o
CC net/core/net-traces.o
CC fs/file.o
CC net/ipv6/seg6.o
CC fs/filesystems.o
CC net/wireless/ocb.o
CC net/wireless/pmsr.o
CC fs/namespace.o
GEN net/wireless/shipped-certs.c
CC mm/mmu_notifier.o
CC fs/nfs/nfs4state.o
CC kernel/trace/trace_dynevent.o
CC arch/x86/kernel/ptrace.o
CC drivers/acpi/acpica/nsrepair2.o
CC drivers/acpi/processor_pdc.o
CC kernel/notifier.o
CC net/core/selftests.o
CC net/ipv6/fib6_notifier.o
CC fs/nfs/nfs4renewd.o
CC lib/bitmap.o
CC fs/seq_file.o
CC net/ipv4/udplite.o
AR net/netfilter/built-in.a
CC net/core/ptp_classifier.o
CC arch/x86/kernel/tls.o
CC fs/nfs/nfs4super.o
CC drivers/acpi/acpica/nssearch.o
CC lib/scatterlist.o
CC fs/nfs/nfs4file.o
CC net/wireless/shipped-certs.o
CC kernel/trace/trace_probe.o
CC mm/migrate.o
CC net/mac80211/s1g.o
CC fs/nfs/delegation.o
CC net/ipv4/udp_offload.o
CC arch/x86/kernel/step.o
CC net/ipv6/rpl.o
CC net/core/netprio_cgroup.o
CC net/core/netclassid_cgroup.o
CC lib/list_sort.o
CC fs/nfs/nfs4idmap.o
CC drivers/acpi/acpica/nsutils.o
CC mm/page_counter.o
CC drivers/acpi/acpica/nswalk.o
CC drivers/acpi/acpica/nsxfeval.o
CC drivers/acpi/acpica/nsxfname.o
CC net/ipv4/arp.o
CC fs/xattr.o
CC kernel/ksysfs.o
CC net/ipv4/icmp.o
CC net/ipv6/ioam6.o
CC kernel/cred.o
CC mm/hugetlb_cgroup.o
CC drivers/acpi/ec.o
CC kernel/trace/trace_uprobe.o
CC net/core/dst_cache.o
CC kernel/reboot.o
CC kernel/async.o
CC net/ipv4/devinet.o
CC drivers/acpi/acpica/nsxfobj.o
CC arch/x86/kernel/i8237.o
CC fs/libfs.o
CC net/ipv6/sysctl_net_ipv6.o
CC drivers/acpi/dock.o
CC mm/early_ioremap.o
CC net/ipv6/xfrm6_policy.o
CC mm/secretmem.o
CC drivers/acpi/pci_root.o
CC arch/x86/kernel/stacktrace.o
CC net/ipv4/af_inet.o
CC lib/uuid.o
CC fs/fs-writeback.o
CC drivers/acpi/acpica/psargs.o
CC net/mac80211/ibss.o
CC fs/nfs/callback.o
CC mm/hmm.o
CC kernel/range.o
CC drivers/acpi/pci_link.o
CC lib/iov_iter.o
CC kernel/trace/rethook.o
CC drivers/acpi/acpica/psloop.o
AR fs/ext4/built-in.a
CC arch/x86/kernel/reboot.o
CC lib/clz_ctz.o
CC net/ipv4/igmp.o
CC lib/bsearch.o
CC arch/x86/kernel/msr.o
CC net/ipv6/xfrm6_state.o
CC fs/pnode.o
CC net/ipv6/xfrm6_input.o
CC drivers/acpi/pci_irq.o
CC fs/nfs/callback_xdr.o
CC lib/find_bit.o
CC drivers/acpi/acpi_apd.o
CC net/mac80211/iface.o
CC fs/splice.o
CC net/core/gro_cells.o
CC lib/llist.o
CC drivers/acpi/acpica/psobject.o
CC net/ipv6/xfrm6_output.o
CC drivers/acpi/acpi_platform.o
CC mm/memfd.o
CC kernel/smpboot.o
CC fs/nfs/callback_proc.o
CC net/mac80211/link.o
CC net/core/failover.o
CC fs/sync.o
CC mm/ptdump.o
CC arch/x86/kernel/cpuid.o
CC net/mac80211/rate.o
CC fs/utimes.o
CC arch/x86/kernel/early-quirks.o
CC net/mac80211/michael.o
CC mm/execmem.o
CC drivers/acpi/acpica/psopcode.o
CC kernel/ucount.o
CC arch/x86/kernel/smp.o
CC net/mac80211/tkip.o
CC net/ipv6/xfrm6_protocol.o
CC lib/lwq.o
CC fs/d_path.o
CC fs/stack.o
CC net/ipv6/netfilter.o
CC kernel/regset.o
CC arch/x86/kernel/smpboot.o
CC drivers/acpi/acpi_pnp.o
CC net/ipv4/fib_frontend.o
CC drivers/acpi/acpica/psopinfo.o
CC kernel/ksyms_common.o
CC lib/memweight.o
CC arch/x86/kernel/tsc_sync.o
CC drivers/acpi/acpica/psparse.o
CC net/mac80211/aes_cmac.o
AR kernel/trace/built-in.a
CC net/mac80211/aes_gmac.o
CC fs/fs_struct.o
CC fs/statfs.o
CC fs/fs_pin.o
CC net/mac80211/fils_aead.o
CC fs/nfs/nfs4namespace.o
CC kernel/groups.o
CC lib/kfifo.o
CC fs/nsfs.o
CC net/ipv4/fib_semantics.o
CC net/ipv6/proc.o
CC kernel/kcmp.o
CC net/mac80211/cfg.o
CC arch/x86/kernel/setup_percpu.o
CC net/ipv4/fib_trie.o
CC drivers/acpi/power.o
AR mm/built-in.a
CC arch/x86/kernel/mpparse.o
CC net/mac80211/ethtool.o
CC net/ipv4/fib_notifier.o
CC net/mac80211/rx.o
CC drivers/acpi/acpica/psscope.o
CC fs/fs_types.o
CC fs/fs_context.o
CC lib/percpu-refcount.o
CC drivers/acpi/event.o
CC drivers/acpi/acpica/pstree.o
CC net/ipv4/inet_fragment.o
CC lib/rhashtable.o
CC net/ipv6/syncookies.o
CC kernel/freezer.o
CC lib/base64.o
CC net/ipv6/calipso.o
CC kernel/profile.o
CC drivers/acpi/evged.o
CC arch/x86/kernel/trace_clock.o
CC kernel/stacktrace.o
CC net/ipv6/ah6.o
CC net/mac80211/spectmgmt.o
CC drivers/acpi/acpica/psutils.o
CC fs/nfs/nfs4getroot.o
CC drivers/acpi/sysfs.o
CC drivers/acpi/acpica/pswalk.o
CC fs/nfs/nfs4client.o
CC net/ipv4/ping.o
AR net/core/built-in.a
CC net/ipv6/esp6.o
CC arch/x86/kernel/trace.o
CC net/mac80211/tx.o
CC drivers/acpi/property.o
CC kernel/dma.o
CC fs/fs_parser.o
CC drivers/acpi/acpica/psxface.o
CC fs/nfs/nfs4session.o
CC net/mac80211/key.o
CC arch/x86/kernel/rethook.o
CC arch/x86/kernel/vmcore_info_32.o
CC drivers/acpi/acpica/rsaddr.o
CC kernel/smp.o
CC drivers/acpi/debugfs.o
CC fs/fsopen.o
CC net/mac80211/util.o
CC lib/once.o
CC arch/x86/kernel/machine_kexec_32.o
CC lib/refcount.o
CC fs/nfs/dns_resolve.o
CC fs/nfs/nfs4trace.o
AS arch/x86/kernel/relocate_kernel_32.o
CC fs/init.o
CC net/ipv6/sit.o
CC fs/nfs/nfs4sysctl.o
CC drivers/acpi/acpica/rscalc.o
CC lib/rcuref.o
CC drivers/acpi/acpi_lpat.o
CC fs/kernel_read_file.o
CC net/ipv4/ip_tunnel_core.o
CC net/ipv4/gre_offload.o
CC net/mac80211/parse.o
CC net/mac80211/wme.o
CC arch/x86/kernel/crash_dump_32.o
CC net/mac80211/chan.o
CC net/ipv6/addrconf_core.o
CC lib/usercopy.o
CC fs/mnt_idmapping.o
CC net/ipv6/exthdrs_core.o
CC drivers/acpi/acpica/rscreate.o
CC arch/x86/kernel/crash.o
CC net/ipv6/ip6_checksum.o
CC drivers/acpi/acpi_pcc.o
CC arch/x86/kernel/module.o
CC net/mac80211/trace.o
CC lib/errseq.o
CC fs/remap_range.o
CC net/ipv6/ip6_icmp.o
CC fs/pidfs.o
CC kernel/uid16.o
CC lib/bucket_locks.o
CC fs/buffer.o
CC drivers/acpi/ac.o
CC kernel/kallsyms.o
CC net/ipv6/output_core.o
CC drivers/acpi/acpica/rsdumpinfo.o
CC net/ipv6/protocol.o
CC arch/x86/kernel/doublefault_32.o
CC net/ipv6/ip6_offload.o
CC net/ipv6/tcpv6_offload.o
CC lib/generic-radix-tree.o
CC fs/mpage.o
CC net/mac80211/mlme.o
CC arch/x86/kernel/early_printk.o
CC drivers/acpi/button.o
CC net/mac80211/tdls.o
CC lib/bitmap-str.o
CC net/ipv4/metrics.o
CC net/ipv4/netlink.o
CC net/mac80211/ocb.o
CC drivers/acpi/acpica/rsinfo.o
CC net/ipv4/nexthop.o
CC arch/x86/kernel/hpet.o
CC drivers/acpi/fan_core.o
CC lib/string_helpers.o
CC drivers/acpi/fan_attr.o
CC net/mac80211/airtime.o
CC net/ipv4/udp_tunnel_stub.o
CC fs/proc_namespace.o
CC drivers/acpi/acpica/rsio.o
CC kernel/acct.o
CC net/ipv4/ip_tunnel.o
CC drivers/acpi/fan_hwmon.o
CC fs/direct-io.o
CC net/mac80211/eht.o
CC net/ipv6/exthdrs_offload.o
CC lib/hexdump.o
CC lib/kstrtox.o
CC lib/iomap.o
CC net/ipv4/sysctl_net_ipv4.o
CC lib/iomap_copy.o
CC kernel/vmcore_info.o
CC drivers/acpi/acpica/rsirq.o
CC net/ipv6/inet6_hashtables.o
CC kernel/elfcorehdr.o
CC net/ipv4/proc.o
CC arch/x86/kernel/amd_nb.o
CC arch/x86/kernel/kvm.o
CC fs/eventpoll.o
CC drivers/acpi/acpica/rslist.o
CC drivers/acpi/acpi_video.o
CC kernel/crash_reserve.o
CC net/mac80211/led.o
CC net/ipv4/fib_rules.o
CC net/ipv4/ipmr.o
CC net/mac80211/pm.o
CC arch/x86/kernel/kvmclock.o
CC drivers/acpi/acpica/rsmemory.o
CC kernel/kexec_core.o
CC net/ipv6/mcast_snoop.o
CC drivers/acpi/acpica/rsmisc.o
CC net/mac80211/rc80211_minstrel_ht.o
CC fs/anon_inodes.o
CC net/ipv4/ipmr_base.o
CC arch/x86/kernel/paravirt.o
CC drivers/acpi/video_detect.o
CC arch/x86/kernel/pvclock.o
CC net/ipv4/syncookies.o
CC lib/devres.o
CC kernel/crash_core.o
CC drivers/acpi/acpica/rsserial.o
CC fs/signalfd.o
CC kernel/kexec.o
CC net/ipv4/tunnel4.o
CC net/ipv4/ipconfig.o
CC kernel/utsname.o
CC drivers/acpi/processor_driver.o
CC net/ipv4/netfilter.o
CC fs/timerfd.o
CC drivers/acpi/acpica/rsutils.o
CC lib/check_signature.o
CC kernel/pid_namespace.o
CC drivers/acpi/acpica/rsxface.o
CC net/mac80211/wbrf.o
CC lib/interval_tree.o
CC arch/x86/kernel/pcspeaker.o
CC fs/eventfd.o
CC arch/x86/kernel/check.o
CC lib/assoc_array.o
CC arch/x86/kernel/uprobes.o
CC drivers/acpi/processor_thermal.o
CC fs/aio.o
CC kernel/stop_machine.o
CC net/ipv4/tcp_cubic.o
CC drivers/acpi/acpica/tbdata.o
CC net/ipv4/tcp_sigpool.o
CC fs/locks.o
CC arch/x86/kernel/perf_regs.o
CC lib/bitrev.o
CC arch/x86/kernel/tracepoint.o
CC net/ipv4/cipso_ipv4.o
CC drivers/acpi/acpica/tbfadt.o
CC fs/binfmt_misc.o
CC arch/x86/kernel/itmt.o
AR net/ipv6/built-in.a
CC lib/crc-ccitt.o
CC net/ipv4/xfrm4_policy.o
CC arch/x86/kernel/umip.o
CC fs/binfmt_script.o
CC lib/crc16.o
CC arch/x86/kernel/unwind_frame.o
AR fs/nfs/built-in.a
CC net/ipv4/xfrm4_state.o
CC drivers/acpi/processor_idle.o
CC fs/binfmt_elf.o
CC drivers/acpi/processor_throttling.o
CC kernel/audit.o
HOSTCC lib/gen_crc32table
CC kernel/auditfilter.o
CC drivers/acpi/acpica/tbfind.o
CC net/ipv4/xfrm4_input.o
CC drivers/acpi/processor_perflib.o
CC lib/xxhash.o
CC drivers/acpi/container.o
CC lib/genalloc.o
CC drivers/acpi/acpica/tbinstal.o
CC net/ipv4/xfrm4_output.o
CC lib/percpu_counter.o
CC net/ipv4/xfrm4_protocol.o
CC lib/audit.o
CC drivers/acpi/thermal_lib.o
CC drivers/acpi/thermal.o
CC kernel/auditsc.o
CC drivers/acpi/nhlt.o
CC drivers/acpi/acpi_memhotplug.o
CC drivers/acpi/ioapic.o
CC drivers/acpi/acpica/tbprint.o
CC drivers/acpi/battery.o
CC lib/syscall.o
CC fs/mbcache.o
CC drivers/acpi/acpica/tbutils.o
CC kernel/audit_watch.o
CC drivers/acpi/bgrt.o
CC lib/errname.o
AR arch/x86/kernel/built-in.a
CC drivers/acpi/acpica/tbxface.o
CC lib/nlattr.o
AR arch/x86/built-in.a
CC drivers/acpi/spcr.o
CC fs/posix_acl.o
CC kernel/audit_fsnotify.o
CC drivers/acpi/acpica/tbxfload.o
CC kernel/audit_tree.o
CC fs/coredump.o
CC lib/cpu_rmap.o
CC kernel/kprobes.o
CC fs/drop_caches.o
CC kernel/seccomp.o
CC fs/sysctls.o
CC fs/fhandle.o
AR net/wireless/built-in.a
CC drivers/acpi/acpica/tbxfroot.o
CC lib/dynamic_queue_limits.o
CC drivers/acpi/acpica/utaddress.o
CC kernel/relay.o
CC kernel/utsname_sysctl.o
CC lib/glob.o
CC drivers/acpi/acpica/utalloc.o
CC kernel/delayacct.o
CC lib/strncpy_from_user.o
CC kernel/taskstats.o
CC kernel/tsacct.o
CC drivers/acpi/acpica/utascii.o
CC kernel/tracepoint.o
CC lib/strnlen_user.o
CC drivers/acpi/acpica/utbuffer.o
CC kernel/irq_work.o
CC drivers/acpi/acpica/utcksum.o
CC kernel/static_call.o
CC lib/net_utils.o
CC kernel/padata.o
CC drivers/acpi/acpica/utcopy.o
CC lib/sg_pool.o
CC kernel/jump_label.o
CC lib/stackdepot.o
CC lib/asn1_decoder.o
CC kernel/context_tracking.o
GEN lib/oid_registry_data.c
CC kernel/iomem.o
CC drivers/acpi/acpica/utexcep.o
CC kernel/rseq.o
CC lib/ucs2_string.o
CC lib/sbitmap.o
CC drivers/acpi/acpica/utdecode.o
CC drivers/acpi/acpica/utdebug.o
CC lib/group_cpus.o
CC drivers/acpi/acpica/utdelete.o
CC lib/fw_table.o
CC drivers/acpi/acpica/uterror.o
CC drivers/acpi/acpica/uteval.o
CC drivers/acpi/acpica/utglobal.o
CC drivers/acpi/acpica/uthex.o
AR lib/lib.a
CC drivers/acpi/acpica/utids.o
CC drivers/acpi/acpica/utinit.o
CC drivers/acpi/acpica/utlock.o
GEN lib/crc32table.h
CC drivers/acpi/acpica/utmath.o
AR net/ipv4/built-in.a
CC lib/oid_registry.o
CC drivers/acpi/acpica/utmisc.o
CC drivers/acpi/acpica/utmutex.o
CC lib/crc32.o
CC drivers/acpi/acpica/utnonansi.o
CC drivers/acpi/acpica/utobject.o
CC drivers/acpi/acpica/utosi.o
CC drivers/acpi/acpica/utownerid.o
CC drivers/acpi/acpica/utpredef.o
CC drivers/acpi/acpica/utresdecode.o
CC drivers/acpi/acpica/utresrc.o
CC drivers/acpi/acpica/utstate.o
CC drivers/acpi/acpica/utstring.o
CC drivers/acpi/acpica/utstrsuppt.o
CC drivers/acpi/acpica/utstrtoul64.o
CC drivers/acpi/acpica/utxface.o
CC drivers/acpi/acpica/utxfinit.o
CC drivers/acpi/acpica/utxferror.o
CC drivers/acpi/acpica/utxfmutex.o
AR lib/built-in.a
AR drivers/acpi/acpica/built-in.a
AR drivers/acpi/built-in.a
make[2]: *** [/workspace/kernel/scripts/Makefile.build:440: drivers] Error 2
make[2]: *** Waiting for unfinished jobs....
AR fs/built-in.a
AR kernel/built-in.a
AR net/mac80211/built-in.a
AR net/built-in.a
make[1]: *** [/workspace/kernel/Makefile:1989: .] Error 2
make: *** [/workspace/kernel/Makefile:251: __sub-make] Error 2
run-parts: /workspace/ci/hooks/11-build-32b exited with return code 2
^ permalink raw reply [flat|nested] 23+ messages in thread* ✗ CI.checksparse: warning for drm/i915: intel_display conversions and some debug improvements
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (15 preceding siblings ...)
2025-01-24 17:05 ` ✗ CI.Hooks: failure " Patchwork
@ 2025-01-24 17:07 ` Patchwork
2025-01-24 17:41 ` ✓ Xe.CI.BAT: success " Patchwork
` (2 subsequent siblings)
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-01-24 17:07 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915: intel_display conversions and some debug improvements
URL : https://patchwork.freedesktop.org/series/143941/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast b36df02c99e3246ba2a90e951c71797327374db7
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 23+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915: intel_display conversions and some debug improvements
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (16 preceding siblings ...)
2025-01-24 17:07 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-01-24 17:41 ` Patchwork
2025-01-24 23:24 ` ✗ Xe.CI.Full: failure " Patchwork
2025-02-04 11:14 ` [PATCH 00/11] " Jani Nikula
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-01-24 17:41 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 6664 bytes --]
== Series Details ==
Series: drm/i915: intel_display conversions and some debug improvements
URL : https://patchwork.freedesktop.org/series/143941/
State : success
== Summary ==
CI Bug Log - changes from xe-2548-897537fb818365733977947214c799d61675895f_BAT -> xe-pw-143941v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (7 -> 7)
------------------------------
Additional (1): bat-bmg-2
Missing (1): bat-adlp-vm
Known issues
------------
Here are the changes found in xe-pw-143941v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@nullptr:
- bat-bmg-2: NOTRUN -> [SKIP][1] ([Intel XE#2134]) +4 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@fbdev@nullptr.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][2] ([Intel XE#2233])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][3] ([Intel XE#2489] / [Intel XE#3419]) +13 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_flip@basic-flip-vs-modeset:
- bat-bmg-2: NOTRUN -> [SKIP][4] ([Intel XE#2482]) +3 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_frontbuffer_tracking@basic:
- bat-bmg-2: NOTRUN -> [SKIP][5] ([Intel XE#2434] / [Intel XE#2548])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_psr@psr-primary-page-flip:
- bat-bmg-2: NOTRUN -> [SKIP][6] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@kms_psr@psr-primary-page-flip.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- bat-bmg-2: NOTRUN -> [SKIP][7] ([Intel XE#1091] / [Intel XE#2849]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-2: NOTRUN -> [SKIP][8] ([Intel XE#2229])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_live_ktest@xe_migrate:
- bat-adlp-vf: [PASS][9] -> [SKIP][10] ([Intel XE#1192]) +1 other test skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/bat-adlp-vf/igt@xe_live_ktest@xe_migrate.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-adlp-vf/igt@xe_live_ktest@xe_migrate.html
* igt@xe_pat@pat-index-xehpc:
- bat-bmg-2: NOTRUN -> [SKIP][11] ([Intel XE#1420])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- bat-bmg-2: NOTRUN -> [SKIP][12] ([Intel XE#2245])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- bat-bmg-2: NOTRUN -> [SKIP][13] ([Intel XE#2236])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html
* igt@xe_sriov_flr@flr-vf1-clear:
- bat-bmg-2: NOTRUN -> [SKIP][14] ([Intel XE#3342])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-bmg-2/igt@xe_sriov_flr@flr-vf1-clear.html
* igt@xe_vm@shared-pde3-page:
- bat-adlp-vf: [PASS][15] -> [DMESG-WARN][16] ([Intel XE#4078])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/bat-adlp-vf/igt@xe_vm@shared-pde3-page.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-adlp-vf/igt@xe_vm@shared-pde3-page.html
#### Warnings ####
* igt@xe_live_ktest@xe_bo:
- bat-adlp-vf: [SKIP][17] ([Intel XE#2229] / [Intel XE#455]) -> [SKIP][18] ([Intel XE#1192])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/bat-adlp-vf/igt@xe_live_ktest@xe_bo.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/bat-adlp-vf/igt@xe_live_ktest@xe_bo.html
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
[Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
[Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
[Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
[Intel XE#4078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4078
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
Build changes
-------------
* IGT: IGT_8207 -> IGT_8209
* Linux: xe-2548-897537fb818365733977947214c799d61675895f -> xe-pw-143941v1
IGT_8207: 9f36f9f9e8825a67b762630c2b31628ddcda5c10 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8209: 07ec14a8b00849e82a6ee7aff433c8f564787bf0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-2548-897537fb818365733977947214c799d61675895f: 897537fb818365733977947214c799d61675895f
xe-pw-143941v1: 143941v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/index.html
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^ permalink raw reply [flat|nested] 23+ messages in thread* ✗ Xe.CI.Full: failure for drm/i915: intel_display conversions and some debug improvements
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (17 preceding siblings ...)
2025-01-24 17:41 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-01-24 23:24 ` Patchwork
2025-02-04 11:14 ` [PATCH 00/11] " Jani Nikula
19 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2025-01-24 23:24 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 170865 bytes --]
== Series Details ==
Series: drm/i915: intel_display conversions and some debug improvements
URL : https://patchwork.freedesktop.org/series/143941/
State : failure
== Summary ==
CI Bug Log - changes from xe-2548-897537fb818365733977947214c799d61675895f_full -> xe-pw-143941v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-143941v1_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-143941v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-143941v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
- shard-bmg: [PASS][1] -> [SKIP][2] +1 other test skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
* igt@kms_flip@flip-vs-rmfb-interruptible:
- shard-bmg: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_flip@flip-vs-rmfb-interruptible.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_flip@flip-vs-rmfb-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a2:
- shard-dg2-set2: NOTRUN -> [FAIL][5] +1 other test fail
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a2.html
* igt@kms_plane_cursor@viewport:
- shard-bmg: [PASS][6] -> [FAIL][7] +1 other test fail
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_plane_cursor@viewport.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_plane_cursor@viewport.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][8] +1 other test dmesg-warn
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6.html
* igt@kms_setmode@basic:
- shard-bmg: [PASS][9] -> [INCOMPLETE][10] +1 other test incomplete
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@kms_setmode@basic.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_setmode@basic.html
* igt@xe_pm@s2idle-basic-exec:
- shard-adlp: [PASS][11] -> [DMESG-WARN][12] +2 other tests dmesg-warn
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-6/igt@xe_pm@s2idle-basic-exec.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-2/igt@xe_pm@s2idle-basic-exec.html
#### Warnings ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][13] ([Intel XE#3862]) -> [DMESG-WARN][14]
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-bmg: [SKIP][15] ([Intel XE#2887]) -> [SKIP][16] +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
- shard-bmg: [SKIP][17] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][18]
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-dg2-set2: [DMESG-WARN][19] ([Intel XE#1033]) -> [INCOMPLETE][20] +1 other test incomplete
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@kms_hdr@bpc-switch-suspend.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-dg2-set2: [SKIP][21] ([Intel XE#2925]) -> [SKIP][22]
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
Known issues
------------
Here are the changes found in xe-pw-143941v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_getversion@all-cards:
- shard-dg2-set2: [PASS][23] -> [FAIL][24] ([Intel XE#3440])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@core_getversion@all-cards.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@core_getversion@all-cards.html
* igt@core_hotunplug@unbind-rebind:
- shard-dg2-set2: [PASS][25] -> [SKIP][26] ([Intel XE#2136]) +27 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@core_hotunplug@unbind-rebind.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@core_hotunplug@unbind-rebind.html
* igt@core_setmaster@master-drop-set-user:
- shard-dg2-set2: [PASS][27] -> [FAIL][28] ([Intel XE#3249])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@core_setmaster@master-drop-set-user.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@core_setmaster@master-drop-set-user.html
* igt@fbdev@read:
- shard-dg2-set2: [PASS][29] -> [SKIP][30] ([Intel XE#2134]) +2 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@fbdev@read.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@fbdev@read.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-adlp: NOTRUN -> [SKIP][31] ([Intel XE#619])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-dg2-set2: NOTRUN -> [SKIP][32] ([Intel XE#316]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#1407]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-4/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0:
- shard-bmg: [PASS][34] -> [SKIP][35] ([Intel XE#829]) +2 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-0:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#1124]) +4 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#1428]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-4/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-adlp: [PASS][38] -> [DMESG-FAIL][39] ([Intel XE#1033]) +6 other tests dmesg-fail
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-adlp: [PASS][40] -> [FAIL][41] ([Intel XE#1874]) +2 other tests fail
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][42] ([Intel XE#1124]) +4 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_big_fb@yf-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-adlp: NOTRUN -> [SKIP][43] ([Intel XE#610])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#1124]) +6 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-bmg: [PASS][45] -> [SKIP][46] ([Intel XE#3007]) +1 other test skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][47] ([Intel XE#2191]) +3 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
- shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#2191]) +1 other test skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][49] ([Intel XE#2191])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
* igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2314] / [Intel XE#2894])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#1512])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-dg2-set2: NOTRUN -> [SKIP][52] ([Intel XE#367]) +3 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-2560x1440p:
- shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#367]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-5/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-4-displays-2160x1440p:
- shard-adlp: NOTRUN -> [SKIP][54] ([Intel XE#367]) +2 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-3/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-4-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#367])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#2669]) +3 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-3/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][57] ([Intel XE#787]) +17 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-3/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#2887])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][59] ([Intel XE#455] / [Intel XE#787]) +28 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][60] ([Intel XE#3433]) +3 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-adlp: NOTRUN -> [SKIP][61] ([Intel XE#455] / [Intel XE#787]) +11 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [PASS][62] -> [ABORT][63] ([Intel XE#2625])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-2:
- shard-dg2-set2: NOTRUN -> [ABORT][64] ([Intel XE#2625])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-2.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][65] ([Intel XE#787]) +167 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][66] ([Intel XE#2887]) +4 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-3/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs.html
* igt@kms_cdclk@mode-transition@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][67] ([Intel XE#314]) +3 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html
* igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][68] ([Intel XE#1152]) +3 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html
* igt@kms_chamelium_color@ctm-red-to-blue:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#2325])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_chamelium_color@ctm-red-to-blue.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-adlp: NOTRUN -> [SKIP][70] ([Intel XE#373]) +7 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_frames@hdmi-crc-planes-random:
- shard-bmg: NOTRUN -> [SKIP][71] ([Intel XE#2252]) +1 other test skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@kms_chamelium_frames@hdmi-crc-planes-random.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][72] ([Intel XE#373]) +4 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode:
- shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#373]) +5 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2-set2: NOTRUN -> [DMESG-FAIL][74] ([Intel XE#1033]) +2 other tests dmesg-fail
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_content_protection@atomic-dpms.html
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#3278])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#307])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_content_protection@dp-mst-type-0.html
- shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#307])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-6/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@legacy:
- shard-adlp: NOTRUN -> [SKIP][78] ([Intel XE#455]) +15 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-6/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@srm@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [FAIL][79] ([Intel XE#1178])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_content_protection@srm@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-lnl: NOTRUN -> [SKIP][80] ([Intel XE#2321])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-2/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-adlp: NOTRUN -> [SKIP][81] ([Intel XE#308]) +1 other test skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-3/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_crc@cursor-sliding-64x64:
- shard-dg2-set2: [PASS][82] -> [SKIP][83] ([Intel XE#2423] / [i915#2575]) +88 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@kms_cursor_crc@cursor-sliding-64x64.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_cursor_crc@cursor-sliding-64x64.html
* igt@kms_cursor_crc@cursor-sliding-max-size:
- shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#1424]) +3 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-6/igt@kms_cursor_crc@cursor-sliding-max-size.html
* igt@kms_cursor_crc@cursor-suspend:
- shard-bmg: [PASS][85] -> [DMESG-WARN][86] ([Intel XE#1033]) +75 other tests dmesg-warn
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@kms_cursor_crc@cursor-suspend.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_cursor_crc@cursor-suspend.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-lnl: NOTRUN -> [SKIP][87] ([Intel XE#309]) +3 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-7/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_dp_aux_dev:
- shard-dg2-set2: [PASS][88] -> [SKIP][89] ([Intel XE#2423])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@kms_dp_aux_dev.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_dp_aux_dev.html
* igt@kms_dsc@dsc-with-bpc:
- shard-lnl: NOTRUN -> [SKIP][90] ([Intel XE#2244])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_feature_discovery@display-4x:
- shard-dg2-set2: NOTRUN -> [SKIP][91] ([Intel XE#1138])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_feature_discovery@display-4x.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-bmg: [PASS][92] -> [SKIP][93] ([Intel XE#4108]) +5 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-lnl: NOTRUN -> [SKIP][94] ([Intel XE#1421]) +4 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-4/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-adlp: NOTRUN -> [SKIP][95] ([Intel XE#310]) +3 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip@2x-wf_vblank-ts-check@cd-dp2-hdmi-a3:
- shard-bmg: NOTRUN -> [DMESG-WARN][96] ([Intel XE#1033]) +4 other tests dmesg-warn
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_flip@2x-wf_vblank-ts-check@cd-dp2-hdmi-a3.html
* igt@kms_flip@busy-flip:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][97] ([Intel XE#1033]) +19 other tests dmesg-warn
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_flip@busy-flip.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a6:
- shard-dg2-set2: [PASS][98] -> [DMESG-WARN][99] ([Intel XE#1033]) +29 other tests dmesg-warn
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a6.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@a-hdmi-a6.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4:
- shard-dg2-set2: NOTRUN -> [FAIL][100] ([Intel XE#301]) +2 other tests fail
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4.html
* igt@kms_flip@flip-vs-expired-vblank@a-dp2:
- shard-bmg: [PASS][101] -> [FAIL][102] ([Intel XE#3321]) +5 other tests fail
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_flip@flip-vs-expired-vblank@a-dp2.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_flip@flip-vs-expired-vblank@a-dp2.html
* igt@kms_flip@plain-flip-fb-recreate:
- shard-dg2-set2: [PASS][103] -> [FAIL][104] ([Intel XE#2882])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_flip@plain-flip-fb-recreate.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_flip@plain-flip-fb-recreate.html
* igt@kms_flip@plain-flip-ts-check:
- shard-adlp: [PASS][105] -> [FAIL][106] ([Intel XE#886]) +1 other test fail
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-8/igt@kms_flip@plain-flip-ts-check.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-4/igt@kms_flip@plain-flip-ts-check.html
* igt@kms_flip@plain-flip-ts-check@a-edp1:
- shard-lnl: [PASS][107] -> [FAIL][108] ([Intel XE#886]) +1 other test fail
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-lnl-4/igt@kms_flip@plain-flip-ts-check@a-edp1.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@kms_flip@plain-flip-ts-check@a-edp1.html
* igt@kms_flip@wf_vblank-ts-check-interruptible@a-dp2:
- shard-bmg: [PASS][109] -> [FAIL][110] ([Intel XE#2882]) +1 other test fail
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-4/igt@kms_flip@wf_vblank-ts-check-interruptible@a-dp2.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_flip@wf_vblank-ts-check-interruptible@a-dp2.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][111] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling:
- shard-dg2-set2: [PASS][112] -> [SKIP][113] ([Intel XE#2136] / [Intel XE#2351]) +7 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-lnl: NOTRUN -> [SKIP][114] ([Intel XE#1401] / [Intel XE#1745]) +2 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][115] ([Intel XE#1401]) +2 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling:
- shard-adlp: [PASS][116] -> [DMESG-FAIL][117] ([Intel XE#1033] / [Intel XE#324]) +1 other test dmesg-fail
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-3/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][118] ([Intel XE#2293]) +2 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_force_connector_basic@force-connector-state:
- shard-bmg: [PASS][119] -> [SKIP][120] ([Intel XE#540]) +1 other test skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_force_connector_basic@force-connector-state.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][121] ([Intel XE#651]) +6 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
- shard-adlp: NOTRUN -> [SKIP][122] ([Intel XE#656]) +22 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
- shard-dg2-set2: NOTRUN -> [SKIP][123] ([Intel XE#2136]) +30 other tests skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][124] ([Intel XE#2311]) +3 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][125] ([Intel XE#4141]) +1 other test skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
- shard-adlp: NOTRUN -> [DMESG-FAIL][126] ([Intel XE#1033]) +2 other tests dmesg-fail
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-lnl: NOTRUN -> [SKIP][127] ([Intel XE#1469])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-5/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-onoff:
- shard-adlp: NOTRUN -> [SKIP][128] ([Intel XE#651]) +10 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][129] ([Intel XE#2136] / [Intel XE#2351]) +9 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][130] ([Intel XE#656]) +14 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc:
- shard-dg2-set2: NOTRUN -> [SKIP][131] ([Intel XE#651]) +15 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][132] ([Intel XE#2313]) +2 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-adlp: NOTRUN -> [SKIP][133] ([Intel XE#653]) +7 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][134] ([Intel XE#653]) +12 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][135] ([Intel XE#658])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_hdmi_inject@inject-audio:
- shard-lnl: NOTRUN -> [SKIP][136] ([Intel XE#1470] / [Intel XE#2853])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-5/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-lnl: NOTRUN -> [SKIP][137] ([Intel XE#2934])
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][138] ([Intel XE#2927])
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64:
- shard-dg2-set2: [PASS][139] -> [FAIL][140] ([Intel XE#616]) +1 other test fail
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_plane_cursor@overlay@pipe-a-hdmi-a-6-size-64.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-adlp: NOTRUN -> [SKIP][141] ([Intel XE#309])
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-3/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-a:
- shard-adlp: NOTRUN -> [SKIP][142] ([Intel XE#2763]) +2 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-a.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c:
- shard-lnl: NOTRUN -> [SKIP][143] ([Intel XE#2763]) +11 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-4/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-c.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d:
- shard-adlp: NOTRUN -> [SKIP][144] ([Intel XE#2763] / [Intel XE#455]) +1 other test skip
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling@pipe-d.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d:
- shard-dg2-set2: NOTRUN -> [SKIP][145] ([Intel XE#2763] / [Intel XE#455]) +3 other tests skip
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-d.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][146] ([Intel XE#2763]) +7 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-a.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b:
- shard-dg2-set2: NOTRUN -> [SKIP][147] ([Intel XE#2763]) +11 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-b.html
* igt@kms_pm_dc@dc5-dpms:
- shard-lnl: [PASS][148] -> [FAIL][149] ([Intel XE#718]) +1 other test fail
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-lnl-5/igt@kms_pm_dc@dc5-dpms.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-4/igt@kms_pm_dc@dc5-dpms.html
* igt@kms_pm_dc@deep-pkgc:
- shard-adlp: NOTRUN -> [SKIP][150] ([Intel XE#2007])
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-4/igt@kms_pm_dc@deep-pkgc.html
- shard-lnl: NOTRUN -> [FAIL][151] ([Intel XE#2029])
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-7/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-dg2-set2: [PASS][152] -> [SKIP][153] ([Intel XE#2446]) +3 other tests skip
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2-set2: NOTRUN -> [SKIP][154] ([Intel XE#2446])
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_prop_blob@blob-prop-lifetime:
- shard-bmg: [PASS][155] -> [SKIP][156] ([Intel XE#780])
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-4/igt@kms_prop_blob@blob-prop-lifetime.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_prop_blob@blob-prop-lifetime.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][157] ([Intel XE#1489]) +3 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-lnl: NOTRUN -> [SKIP][158] ([Intel XE#2893]) +2 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf:
- shard-adlp: NOTRUN -> [SKIP][159] ([Intel XE#1489]) +5 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf:
- shard-bmg: NOTRUN -> [SKIP][160] ([Intel XE#1489])
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr@pr-dpms:
- shard-lnl: NOTRUN -> [SKIP][161] ([Intel XE#1406]) +1 other test skip
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-6/igt@kms_psr@pr-dpms.html
* igt@kms_psr@psr-sprite-plane-move:
- shard-bmg: NOTRUN -> [SKIP][162] ([Intel XE#2234] / [Intel XE#2850])
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@kms_psr@psr-sprite-plane-move.html
* igt@kms_psr@psr2-sprite-blt:
- shard-adlp: NOTRUN -> [SKIP][163] ([Intel XE#2850] / [Intel XE#929]) +10 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-6/igt@kms_psr@psr2-sprite-blt.html
- shard-dg2-set2: NOTRUN -> [SKIP][164] ([Intel XE#2850] / [Intel XE#929]) +6 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_psr@psr2-sprite-blt.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-adlp: NOTRUN -> [SKIP][165] ([Intel XE#2939])
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
- shard-dg2-set2: NOTRUN -> [SKIP][166] ([Intel XE#2939])
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-lnl: NOTRUN -> [SKIP][167] ([Intel XE#3414] / [Intel XE#3904]) +2 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-adlp: NOTRUN -> [SKIP][168] ([Intel XE#3414]) +1 other test skip
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-3/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- shard-dg2-set2: NOTRUN -> [SKIP][169] ([Intel XE#3414])
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
* igt@kms_rotation_crc@sprite-rotation-180:
- shard-dg2-set2: NOTRUN -> [SKIP][170] ([Intel XE#2423] / [i915#2575]) +40 other tests skip
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_rotation_crc@sprite-rotation-180.html
* igt@kms_sequence@get-busy:
- shard-bmg: [PASS][171] -> [DMESG-WARN][172] ([Intel XE#877]) +1 other test dmesg-warn
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_sequence@get-busy.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_sequence@get-busy.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [PASS][173] -> [FAIL][174] ([Intel XE#2883]) +2 other tests fail
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-lnl-3/igt@kms_setmode@basic@pipe-b-edp-1.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-7/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-lnl: NOTRUN -> [SKIP][175] ([Intel XE#1435])
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1:
- shard-lnl: [PASS][176] -> [FAIL][177] ([Intel XE#899])
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-lnl-8/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html
* igt@kms_vrr@cmrr:
- shard-adlp: NOTRUN -> [SKIP][178] ([Intel XE#2168])
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_vrr@cmrr.html
* igt@kms_vrr@flip-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][179] ([Intel XE#455]) +9 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_vrr@flip-dpms.html
- shard-bmg: NOTRUN -> [SKIP][180] ([Intel XE#1499])
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_vrr@flip-dpms.html
* igt@kms_vrr@lobf:
- shard-dg2-set2: NOTRUN -> [SKIP][181] ([Intel XE#2168]) +1 other test skip
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_vrr@lobf.html
* igt@testdisplay:
- shard-dg2-set2: NOTRUN -> [SKIP][182] ([Intel XE#2423])
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@testdisplay.html
* igt@xe_ccs@block-multicopy-compressed:
- shard-adlp: NOTRUN -> [SKIP][183] ([Intel XE#455] / [Intel XE#488])
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-2/igt@xe_ccs@block-multicopy-compressed.html
* igt@xe_ccs@large-ctrl-surf-copy:
- shard-adlp: NOTRUN -> [SKIP][184] ([Intel XE#3576])
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@xe_ccs@large-ctrl-surf-copy.html
* igt@xe_copy_basic@mem-copy-linear-0x369:
- shard-bmg: [PASS][185] -> [SKIP][186] ([Intel XE#1130]) +10 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@xe_copy_basic@mem-copy-linear-0x369.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@xe_copy_basic@mem-copy-linear-0x369.html
* igt@xe_copy_basic@mem-set-linear-0x369:
- shard-adlp: NOTRUN -> [SKIP][187] ([Intel XE#1126])
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-2/igt@xe_copy_basic@mem-set-linear-0x369.html
* igt@xe_copy_basic@mem-set-linear-0xfffe:
- shard-dg2-set2: NOTRUN -> [SKIP][188] ([Intel XE#1126]) +1 other test skip
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@xe_copy_basic@mem-set-linear-0xfffe.html
* igt@xe_eudebug@basic-vm-bind-metadata-discovery:
- shard-adlp: NOTRUN -> [SKIP][189] ([Intel XE#2905]) +6 other tests skip
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
* igt@xe_eudebug@basic-vm-bind-ufence-delay-ack:
- shard-lnl: NOTRUN -> [SKIP][190] ([Intel XE#3889])
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html
* igt@xe_eudebug_online@stopped-thread:
- shard-bmg: NOTRUN -> [SKIP][191] ([Intel XE#2905]) +2 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-2/igt@xe_eudebug_online@stopped-thread.html
- shard-dg2-set2: NOTRUN -> [SKIP][192] ([Intel XE#2905]) +3 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@xe_eudebug_online@stopped-thread.html
* igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram:
- shard-lnl: NOTRUN -> [SKIP][193] ([Intel XE#2905]) +3 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-7/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram.html
* igt@xe_evict@evict-beng-small-multi-vm:
- shard-adlp: NOTRUN -> [SKIP][194] ([Intel XE#261] / [Intel XE#688])
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-6/igt@xe_evict@evict-beng-small-multi-vm.html
* igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen:
- shard-adlp: NOTRUN -> [SKIP][195] ([Intel XE#688])
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
- shard-dg2-set2: [PASS][196] -> [SKIP][197] ([Intel XE#1130]) +162 other tests skip
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
* igt@xe_evict_ccs@evict-overcommit-standalone-nofree-reopen:
- shard-lnl: NOTRUN -> [SKIP][198] ([Intel XE#688]) +1 other test skip
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-3/igt@xe_evict_ccs@evict-overcommit-standalone-nofree-reopen.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null:
- shard-bmg: NOTRUN -> [SKIP][199] ([Intel XE#2322])
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null.html
* igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate:
- shard-dg2-set2: [PASS][200] -> [SKIP][201] ([Intel XE#1392])
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind:
- shard-adlp: NOTRUN -> [SKIP][202] ([Intel XE#1392]) +3 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-6/igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind.html
- shard-lnl: NOTRUN -> [SKIP][203] ([Intel XE#1392]) +2 other tests skip
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-6/igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind.html
* igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr:
- shard-adlp: NOTRUN -> [SKIP][204] ([Intel XE#288]) +12 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr.html
* igt@xe_exec_fault_mode@many-userptr:
- shard-dg2-set2: NOTRUN -> [SKIP][205] ([Intel XE#288]) +6 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@xe_exec_fault_mode@many-userptr.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][206] ([Intel XE#1130]) +48 other tests skip
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
* igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit:
- shard-adlp: NOTRUN -> [FAIL][207] ([Intel XE#1999]) +2 other tests fail
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-3/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html
- shard-dg2-set2: NOTRUN -> [FAIL][208] ([Intel XE#1999]) +2 other tests fail
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_live_ktest@xe_mocs@xe_live_mocs_kernel_kunit.html
* igt@xe_mmap@small-bar:
- shard-adlp: NOTRUN -> [SKIP][209] ([Intel XE#512])
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-6/igt@xe_mmap@small-bar.html
- shard-lnl: NOTRUN -> [SKIP][210] ([Intel XE#512])
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-4/igt@xe_mmap@small-bar.html
* igt@xe_module_load@force-load:
- shard-bmg: NOTRUN -> [SKIP][211] ([Intel XE#2457])
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@xe_module_load@force-load.html
- shard-dg2-set2: NOTRUN -> [SKIP][212] ([Intel XE#378])
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@force-load.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235], [PASS][236], [PASS][237]) -> ([PASS][238], [SKIP][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247], [PASS][248], [PASS][249], [PASS][250], [PASS][251], [PASS][252], [PASS][253], [PASS][254], [PASS][255], [PASS][256], [PASS][257], [PASS][258], [PASS][259], [PASS][260], [PASS][261], [PASS][262]) ([Intel XE#2457])
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@xe_module_load@load.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-4/igt@xe_module_load@load.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@xe_module_load@load.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-4/igt@xe_module_load@load.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@xe_module_load@load.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@xe_module_load@load.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@xe_module_load@load.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@xe_module_load@load.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-1/igt@xe_module_load@load.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-1/igt@xe_module_load@load.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-1/igt@xe_module_load@load.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-1/igt@xe_module_load@load.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@xe_module_load@load.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@xe_module_load@load.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@xe_module_load@load.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@xe_module_load@load.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-4/igt@xe_module_load@load.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@xe_module_load@load.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@xe_module_load@load.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@xe_module_load@load.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-4/igt@xe_module_load@load.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@xe_module_load@load.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@xe_module_load@load.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@xe_module_load@load.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@xe_module_load@load.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@xe_module_load@load.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@xe_module_load@load.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@xe_module_load@load.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@xe_module_load@load.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@xe_module_load@load.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@xe_module_load@load.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-5/igt@xe_module_load@load.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@xe_module_load@load.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@xe_module_load@load.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@xe_module_load@load.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@xe_module_load@load.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@xe_module_load@load.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@xe_module_load@load.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@xe_module_load@load.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@xe_module_load@load.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@xe_module_load@load.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@xe_module_load@load.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-2/igt@xe_module_load@load.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-2/igt@xe_module_load@load.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@xe_module_load@load.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@xe_module_load@load.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@xe_module_load@load.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@xe_module_load@load.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-2/igt@xe_module_load@load.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-2/igt@xe_module_load@load.html
- shard-dg2-set2: ([PASS][263], [PASS][264], [PASS][265], [PASS][266], [PASS][267], [PASS][268], [PASS][269], [PASS][270], [PASS][271], [PASS][272], [PASS][273], [PASS][274], [PASS][275], [PASS][276], [PASS][277], [PASS][278], [PASS][279], [PASS][280], [PASS][281], [PASS][282], [PASS][283], [PASS][284], [PASS][285], [PASS][286], [PASS][287]) -> ([PASS][288], [PASS][289], [PASS][290], [PASS][291], [PASS][292], [PASS][293], [PASS][294], [PASS][295], [PASS][296], [PASS][297], [PASS][298], [PASS][299], [PASS][300], [PASS][301], [PASS][302], [PASS][303], [SKIP][304], [PASS][305], [PASS][306], [PASS][307], [PASS][308], [PASS][309], [PASS][310], [PASS][311], [PASS][312], [PASS][313]) ([Intel XE#378])
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_module_load@load.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_module_load@load.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@xe_module_load@load.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_module_load@load.html
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@xe_module_load@load.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@xe_module_load@load.html
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@xe_module_load@load.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@xe_module_load@load.html
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@xe_module_load@load.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@xe_module_load@load.html
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@xe_module_load@load.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_module_load@load.html
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_module_load@load.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@xe_module_load@load.html
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@xe_module_load@load.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@xe_module_load@load.html
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@xe_module_load@load.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_module_load@load.html
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@xe_module_load@load.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@xe_module_load@load.html
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_module_load@load.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@xe_module_load@load.html
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_module_load@load.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_module_load@load.html
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_module_load@load.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_module_load@load.html
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@xe_module_load@load.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@xe_module_load@load.html
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@xe_module_load@load.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@xe_module_load@load.html
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_module_load@load.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_module_load@load.html
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_module_load@load.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@xe_module_load@load.html
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@xe_module_load@load.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@load.html
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@xe_module_load@load.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@load.html
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@load.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@load.html
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@load.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@xe_module_load@load.html
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@xe_module_load@load.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@load.html
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@load.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@load.html
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@xe_module_load@load.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@xe_module_load@load.html
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_module_load@load.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_module_load@load.html
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_module_load@load.html
* igt@xe_module_load@many-reload:
- shard-dg2-set2: [PASS][314] -> [FAIL][315] ([Intel XE#3546])
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_module_load@many-reload.html
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_module_load@many-reload.html
* igt@xe_module_load@reload-no-display:
- shard-bmg: [PASS][316] -> [FAIL][317] ([Intel XE#3546])
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@xe_module_load@reload-no-display.html
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@xe_module_load@reload-no-display.html
* igt@xe_oa@missing-sample-flags:
- shard-dg2-set2: NOTRUN -> [SKIP][318] ([Intel XE#2541] / [Intel XE#3573])
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_oa@missing-sample-flags.html
* igt@xe_oa@rc6-disable:
- shard-adlp: NOTRUN -> [SKIP][319] ([Intel XE#2541] / [Intel XE#3573]) +5 other tests skip
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-3/igt@xe_oa@rc6-disable.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-dg2-set2: NOTRUN -> [SKIP][320] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pm@d3hot-mmap-vram:
- shard-lnl: NOTRUN -> [SKIP][321] ([Intel XE#1948])
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-7/igt@xe_pm@d3hot-mmap-vram.html
* igt@xe_pm@s2idle-d3hot-basic-exec:
- shard-dg2-set2: [PASS][322] -> [ABORT][323] ([Intel XE#1358])
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_pm@s2idle-d3hot-basic-exec.html
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@xe_pm@s2idle-d3hot-basic-exec.html
* igt@xe_pm@s3-vm-bind-prefetch:
- shard-lnl: NOTRUN -> [SKIP][324] ([Intel XE#584])
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-7/igt@xe_pm@s3-vm-bind-prefetch.html
* igt@xe_pm@s3-vm-bind-userptr:
- shard-bmg: [PASS][325] -> [DMESG-WARN][326] ([Intel XE#1033] / [Intel XE#569])
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-1/igt@xe_pm@s3-vm-bind-userptr.html
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@xe_pm@s3-vm-bind-userptr.html
- shard-dg2-set2: [PASS][327] -> [DMESG-WARN][328] ([Intel XE#1033] / [Intel XE#569])
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@xe_pm@s3-vm-bind-userptr.html
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@xe_pm@s3-vm-bind-userptr.html
* igt@xe_pm@s4-basic:
- shard-lnl: NOTRUN -> [ABORT][329] ([Intel XE#1358] / [Intel XE#1607])
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-2/igt@xe_pm@s4-basic.html
* igt@xe_pm@s4-d3cold-basic-exec:
- shard-lnl: NOTRUN -> [SKIP][330] ([Intel XE#2284] / [Intel XE#366])
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@xe_pm@s4-d3cold-basic-exec.html
* igt@xe_pm@s4-mocs:
- shard-bmg: [PASS][331] -> [DMESG-WARN][332] ([Intel XE#1033] / [Intel XE#2280]) +1 other test dmesg-warn
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@xe_pm@s4-mocs.html
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@xe_pm@s4-mocs.html
- shard-dg2-set2: [PASS][333] -> [DMESG-WARN][334] ([Intel XE#1033] / [Intel XE#2280])
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@xe_pm@s4-mocs.html
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_pm@s4-mocs.html
* igt@xe_pm@s4-multiple-execs:
- shard-adlp: [PASS][335] -> [ABORT][336] ([Intel XE#1358] / [Intel XE#1607] / [Intel XE#1794])
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-3/igt@xe_pm@s4-multiple-execs.html
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@xe_pm@s4-multiple-execs.html
* igt@xe_pm@s4-vm-bind-userptr:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][337] ([Intel XE#1033] / [Intel XE#2280])
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_pm@s4-vm-bind-userptr.html
* igt@xe_query@multigpu-query-invalid-size:
- shard-lnl: NOTRUN -> [SKIP][338] ([Intel XE#944]) +1 other test skip
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-5/igt@xe_query@multigpu-query-invalid-size.html
- shard-adlp: NOTRUN -> [SKIP][339] ([Intel XE#944]) +1 other test skip
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-9/igt@xe_query@multigpu-query-invalid-size.html
* igt@xe_query@multigpu-query-uc-fw-version-huc:
- shard-bmg: NOTRUN -> [SKIP][340] ([Intel XE#944])
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@xe_query@multigpu-query-uc-fw-version-huc.html
- shard-dg2-set2: NOTRUN -> [SKIP][341] ([Intel XE#944])
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_query@multigpu-query-uc-fw-version-huc.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-dg2-set2: NOTRUN -> [SKIP][342] ([Intel XE#3342])
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_sriov_flr@flr-each-isolation.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-lnl: NOTRUN -> [SKIP][343] ([Intel XE#3342])
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-8/igt@xe_sriov_flr@flr-vf1-clear.html
* igt@xe_wedged@wedged-mode-toggle:
- shard-lnl: [PASS][344] -> [ABORT][345] ([Intel XE#3084])
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-lnl-2/igt@xe_wedged@wedged-mode-toggle.html
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@xe_wedged@wedged-mode-toggle.html
#### Possible fixes ####
* igt@core_getstats:
- shard-dg2-set2: [SKIP][346] ([Intel XE#2423]) -> [PASS][347] +1 other test pass
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@core_getstats.html
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@core_getstats.html
* igt@core_setmaster@master-drop-set-root:
- shard-dg2-set2: [FAIL][348] ([Intel XE#3249]) -> [PASS][349]
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@core_setmaster@master-drop-set-root.html
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@core_setmaster@master-drop-set-root.html
* igt@core_setmaster@master-drop-set-shared-fd:
- shard-dg2-set2: [SKIP][350] ([Intel XE#3453]) -> [PASS][351]
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@core_setmaster@master-drop-set-shared-fd.html
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@core_setmaster@master-drop-set-shared-fd.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic:
- shard-bmg: [FAIL][352] ([Intel XE#3701] / [Intel XE#3718] / [Intel XE#827]) -> [PASS][353]
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
* igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-dp-2:
- shard-bmg: [FAIL][354] ([Intel XE#3718] / [Intel XE#827]) -> [PASS][355]
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-dp-2.html
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-dp-2.html
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-adlp: [DMESG-WARN][356] ([Intel XE#1033]) -> [PASS][357] +2 other tests pass
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-2/igt@kms_async_flips@async-flip-suspend-resume.html
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-2/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_async_flips@async-flip-with-page-flip-events:
- shard-bmg: [INCOMPLETE][358] -> [PASS][359] +3 other tests pass
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_async_flips@async-flip-with-page-flip-events.html
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@kms_async_flips@async-flip-with-page-flip-events.html
* igt@kms_async_flips@async-flip-with-page-flip-events-atomic:
- shard-lnl: [FAIL][360] ([Intel XE#3719] / [Intel XE#911]) -> [PASS][361] +3 other tests pass
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events-atomic.html
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-1/igt@kms_async_flips@async-flip-with-page-flip-events-atomic.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-adlp: [FAIL][362] ([Intel XE#1874]) -> [PASS][363]
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-adlp: [DMESG-FAIL][364] ([Intel XE#1033]) -> [PASS][365] +3 other tests pass
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][366] ([Intel XE#3862]) -> [PASS][367]
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][368] ([Intel XE#1727] / [Intel XE#3124] / [Intel XE#4010]) -> [PASS][369] +1 other test pass
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html
* igt@kms_cdclk@mode-transition:
- shard-dg2-set2: [SKIP][370] ([Intel XE#2136]) -> [PASS][371] +24 other tests pass
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_cdclk@mode-transition.html
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_cdclk@mode-transition.html
* igt@kms_color@ctm-blue-to-red:
- shard-bmg: [SKIP][372] ([Intel XE#3007]) -> [PASS][373] +16 other tests pass
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_color@ctm-blue-to-red.html
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@kms_color@ctm-blue-to-red.html
* igt@kms_cursor_edge_walk@128x128-right-edge:
- shard-dg2-set2: [SKIP][374] ([Intel XE#2423] / [i915#2575]) -> [PASS][375] +70 other tests pass
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_cursor_edge_walk@128x128-right-edge.html
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_cursor_edge_walk@128x128-right-edge.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [DMESG-WARN][376] -> [PASS][377]
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ad-dp2-hdmi-a3:
- shard-bmg: [FAIL][378] ([Intel XE#3321]) -> [PASS][379] +1 other test pass
[378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@kms_flip@2x-flip-vs-expired-vblank@ad-dp2-hdmi-a3.html
[379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@kms_flip@2x-flip-vs-expired-vblank@ad-dp2-hdmi-a3.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling:
- shard-dg2-set2: [SKIP][380] ([Intel XE#2136] / [Intel XE#2351]) -> [PASS][381] +9 other tests pass
[380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html
[381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-blt:
- shard-bmg: [SKIP][382] ([Intel XE#2136] / [Intel XE#2231]) -> [PASS][383] +2 other tests pass
[382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-blt.html
[383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-adlp: [DMESG-WARN][384] -> [PASS][385] +5 other tests pass
[384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-suspend.html
[385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-2/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-dg2-set2: [SKIP][386] ([Intel XE#2446]) -> [PASS][387] +5 other tests pass
[386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_pm_rpm@modeset-non-lpsp.html
[387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_pm_rpm@modeset-non-lpsp.html
- shard-bmg: [SKIP][388] ([Intel XE#2446]) -> [PASS][389]
[388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_pm_rpm@modeset-non-lpsp.html
[389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1:
- shard-lnl: [INCOMPLETE][390] -> [PASS][391] +1 other test pass
[390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-lnl-7/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1.html
[391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-7/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1.html
* igt@kms_universal_plane@cursor-fb-leak:
- shard-adlp: [FAIL][392] ([Intel XE#771] / [Intel XE#899]) -> [PASS][393]
[392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-2/igt@kms_universal_plane@cursor-fb-leak.html
[393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_universal_plane@cursor-fb-leak.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1:
- shard-adlp: [FAIL][394] ([Intel XE#899]) -> [PASS][395]
[394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-2/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
[395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
* igt@kms_vblank@ts-continuation-idle-hang@pipe-d-hdmi-a-3:
- shard-bmg: [DMESG-WARN][396] ([Intel XE#1033]) -> [PASS][397] +39 other tests pass
[396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_vblank@ts-continuation-idle-hang@pipe-d-hdmi-a-3.html
[397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_vblank@ts-continuation-idle-hang@pipe-d-hdmi-a-3.html
* igt@xe_drm_fdinfo@utilization-others-idle:
- shard-dg2-set2: [DMESG-WARN][398] ([Intel XE#1033]) -> [PASS][399] +11 other tests pass
[398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@xe_drm_fdinfo@utilization-others-idle.html
[399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@xe_drm_fdinfo@utilization-others-idle.html
* igt@xe_exec_balancer@once-parallel-rebind:
- shard-dg2-set2: [SKIP][400] ([Intel XE#1130]) -> [PASS][401] +151 other tests pass
[400]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_exec_balancer@once-parallel-rebind.html
[401]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@xe_exec_balancer@once-parallel-rebind.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind:
- shard-dg2-set2: [SKIP][402] ([Intel XE#1392]) -> [PASS][403]
[402]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html
[403]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html
* igt@xe_module_load@reload:
- shard-dg2-set2: [FAIL][404] ([Intel XE#3546]) -> [PASS][405]
[404]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_module_load@reload.html
[405]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_module_load@reload.html
* igt@xe_pm@s4-basic-exec:
- shard-adlp: [ABORT][406] ([Intel XE#1358] / [Intel XE#1607] / [Intel XE#1794]) -> [PASS][407]
[406]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-adlp-9/igt@xe_pm@s4-basic-exec.html
[407]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-adlp-8/igt@xe_pm@s4-basic-exec.html
* igt@xe_spin_batch@spin-all:
- shard-bmg: [SKIP][408] ([Intel XE#1130]) -> [PASS][409] +40 other tests pass
[408]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@xe_spin_batch@spin-all.html
[409]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-2/igt@xe_spin_batch@spin-all.html
#### Warnings ####
* igt@fbdev@write:
- shard-dg2-set2: [SKIP][410] ([Intel XE#2134]) -> [DMESG-WARN][411] ([Intel XE#1033])
[410]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@fbdev@write.html
[411]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@fbdev@write.html
* igt@kms_async_flips@invalid-async-flip:
- shard-bmg: [SKIP][412] ([Intel XE#873]) -> [SKIP][413] ([Intel XE#4108])
[412]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-4/igt@kms_async_flips@invalid-async-flip.html
[413]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_async_flips@invalid-async-flip.html
* igt@kms_async_flips@invalid-async-flip-atomic:
- shard-dg2-set2: [SKIP][414] ([Intel XE#2423] / [i915#2575]) -> [SKIP][415] ([Intel XE#3768])
[414]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_async_flips@invalid-async-flip-atomic.html
[415]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_async_flips@invalid-async-flip-atomic.html
* igt@kms_atomic_transition@modeset-transition:
- shard-dg2-set2: [DMESG-WARN][416] ([Intel XE#1033]) -> [SKIP][417] ([Intel XE#2423] / [i915#2575]) +2 other tests skip
[416]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_atomic_transition@modeset-transition.html
[417]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_atomic_transition@modeset-transition.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-dg2-set2: [SKIP][418] ([Intel XE#316]) -> [SKIP][419] ([Intel XE#2136] / [Intel XE#2351])
[418]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
[419]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-270:
- shard-bmg: [SKIP][420] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][421] ([Intel XE#2327]) +1 other test skip
[420]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
[421]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
- shard-dg2-set2: [SKIP][422] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][423] ([Intel XE#316]) +1 other test skip
[422]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
[423]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- shard-dg2-set2: [SKIP][424] ([Intel XE#2136]) -> [SKIP][425] ([Intel XE#316]) +1 other test skip
[424]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
[425]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-270:
- shard-dg2-set2: [SKIP][426] ([Intel XE#316]) -> [SKIP][427] ([Intel XE#2136]) +1 other test skip
[426]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
[427]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-180:
- shard-dg2-set2: [SKIP][428] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][429] ([Intel XE#1124]) +3 other tests skip
[428]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
[429]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-270:
- shard-bmg: [SKIP][430] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][431] ([Intel XE#1124]) +2 other tests skip
[430]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
[431]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-5/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-dg2-set2: [SKIP][432] ([Intel XE#2136]) -> [SKIP][433] ([Intel XE#1124]) +4 other tests skip
[432]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
[433]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-dg2-set2: [SKIP][434] ([Intel XE#1124]) -> [SKIP][435] ([Intel XE#2136] / [Intel XE#2351]) +2 other tests skip
[434]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[435]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-90:
- shard-bmg: [SKIP][436] ([Intel XE#1124]) -> [SKIP][437] ([Intel XE#2136] / [Intel XE#2231])
[436]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-4/igt@kms_big_fb@yf-tiled-16bpp-rotate-90.html
[437]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_big_fb@yf-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-dg2-set2: [SKIP][438] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][439] ([Intel XE#619]) +1 other test skip
[438]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_big_fb@yf-tiled-addfb.html
[439]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-dg2-set2: [SKIP][440] ([Intel XE#607]) -> [SKIP][441] ([Intel XE#2136])
[440]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
[441]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-dg2-set2: [SKIP][442] ([Intel XE#1124]) -> [SKIP][443] ([Intel XE#2136]) +5 other tests skip
[442]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[443]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-bmg: [SKIP][444] ([Intel XE#1124]) -> [SKIP][445] ([Intel XE#829])
[444]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
[445]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
- shard-dg2-set2: [SKIP][446] ([Intel XE#2191]) -> [SKIP][447] ([Intel XE#2423] / [i915#2575])
[446]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
[447]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
* igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
- shard-bmg: [SKIP][448] ([Intel XE#3007]) -> [SKIP][449] ([Intel XE#2314] / [Intel XE#2894])
[448]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
[449]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-1-displays-2160x1440p:
- shard-bmg: [SKIP][450] ([Intel XE#367]) -> [SKIP][451] ([Intel XE#4108])
[450]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
[451]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-1-displays-2560x1440p:
- shard-bmg: [SKIP][452] ([Intel XE#3007]) -> [SKIP][453] ([Intel XE#367])
[452]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
[453]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-1-displays-3840x2160p:
- shard-dg2-set2: [SKIP][454] ([Intel XE#2423] / [i915#2575]) -> [SKIP][455] ([Intel XE#367])
[454]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html
[455]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-2560x1440p:
- shard-dg2-set2: [SKIP][456] ([Intel XE#367]) -> [SKIP][457] ([Intel XE#2423] / [i915#2575])
[456]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html
[457]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-dg2-set2: [SKIP][458] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][459] ([Intel XE#2136] / [Intel XE#2351])
[458]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
[459]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs:
- shard-bmg: [SKIP][460] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][461] ([Intel XE#2887]) +3 other tests skip
[460]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs.html
[461]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-dg2-set2: [SKIP][462] ([Intel XE#2907]) -> [SKIP][463] ([Intel XE#2136]) +2 other tests skip
[462]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
[463]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs:
- shard-dg2-set2: [SKIP][464] ([Intel XE#2136]) -> [SKIP][465] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip
[464]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs.html
[465]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs:
- shard-dg2-set2: [SKIP][466] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][467] ([Intel XE#2136]) +12 other tests skip
[466]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html
[467]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][468] ([Intel XE#3862]) -> [SKIP][469] ([Intel XE#2136])
[468]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
[469]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-dg2-set2: [SKIP][470] ([Intel XE#3442]) -> [SKIP][471] ([Intel XE#2136])
[470]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
[471]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs:
- shard-bmg: [SKIP][472] ([Intel XE#2887]) -> [SKIP][473] ([Intel XE#2136] / [Intel XE#2231]) +1 other test skip
[472]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs.html
[473]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs:
- shard-dg2-set2: [SKIP][474] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][475] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
[474]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs.html
[475]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs.html
* igt@kms_cdclk@plane-scaling:
- shard-bmg: [SKIP][476] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][477] ([Intel XE#2724])
[476]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_cdclk@plane-scaling.html
[477]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-bmg: [SKIP][478] ([Intel XE#2325]) -> [SKIP][479] ([Intel XE#3007])
[478]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@kms_chamelium_color@ctm-0-75.html
[479]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-dg2-set2: [SKIP][480] ([Intel XE#306]) -> [SKIP][481] ([Intel XE#2423] / [i915#2575])
[480]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_chamelium_color@ctm-green-to-red.html
[481]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-bmg: [SKIP][482] ([Intel XE#2252]) -> [SKIP][483] ([Intel XE#4108]) +1 other test skip
[482]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
[483]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
- shard-bmg: [SKIP][484] ([Intel XE#3007]) -> [SKIP][485] ([Intel XE#2252]) +1 other test skip
[484]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
[485]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
* igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode:
- shard-bmg: [SKIP][486] ([Intel XE#2252]) -> [SKIP][487] ([Intel XE#3007]) +1 other test skip
[486]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode.html
[487]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
- shard-dg2-set2: [SKIP][488] ([Intel XE#373]) -> [SKIP][489] ([Intel XE#2423] / [i915#2575]) +9 other tests skip
[488]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
[489]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-dg2-set2: [SKIP][490] ([Intel XE#2423] / [i915#2575]) -> [SKIP][491] ([Intel XE#373]) +8 other tests skip
[490]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
[491]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
- shard-bmg: [FAIL][492] ([Intel XE#1178]) -> [DMESG-FAIL][493] ([Intel XE#1033]) +1 other test dmesg-fail
[492]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
[493]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-bmg: [SKIP][494] ([Intel XE#2390]) -> [SKIP][495] ([Intel XE#4108])
[494]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_content_protection@dp-mst-type-1.html
[495]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@lic-type-1:
- shard-dg2-set2: [SKIP][496] ([Intel XE#2423] / [i915#2575]) -> [SKIP][497] ([Intel XE#455]) +4 other tests skip
[496]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_content_protection@lic-type-1.html
[497]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_content_protection@lic-type-1.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-dg2-set2: [SKIP][498] ([Intel XE#308]) -> [SKIP][499] ([Intel XE#2423] / [i915#2575]) +1 other test skip
[498]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@kms_cursor_crc@cursor-offscreen-512x170.html
[499]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-32x10:
- shard-dg2-set2: [SKIP][500] ([Intel XE#455]) -> [SKIP][501] ([Intel XE#2423] / [i915#2575]) +4 other tests skip
[500]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_cursor_crc@cursor-random-32x10.html
[501]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_cursor_crc@cursor-random-32x10.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-dg2-set2: [SKIP][502] ([Intel XE#2423] / [i915#2575]) -> [SKIP][503] ([Intel XE#308])
[502]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
[503]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_crc@cursor-sliding-256x85:
- shard-bmg: [SKIP][504] ([Intel XE#3007]) -> [SKIP][505] ([Intel XE#2320]) +2 other tests skip
[504]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_cursor_crc@cursor-sliding-256x85.html
[505]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@kms_cursor_crc@cursor-sliding-256x85.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
- shard-dg2-set2: [SKIP][506] ([Intel XE#323]) -> [SKIP][507] ([Intel XE#2423] / [i915#2575])
[506]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
[507]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2-set2: [SKIP][508] ([Intel XE#2423] / [i915#2575]) -> [SKIP][509] ([Intel XE#323]) +1 other test skip
[508]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
[509]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-bmg: [SKIP][510] ([Intel XE#1508]) -> [SKIP][511] ([Intel XE#2136] / [Intel XE#2231])
[510]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
[511]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dsc@dsc-with-formats:
- shard-dg2-set2: [SKIP][512] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][513] ([Intel XE#455]) +1 other test skip
[512]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_dsc@dsc-with-formats.html
[513]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_dsc@dsc-with-formats.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc:
- shard-dg2-set2: [SKIP][514] ([Intel XE#2136]) -> [SKIP][515] ([Intel XE#455]) +4 other tests skip
[514]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
[515]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-dg2-set2: [SKIP][516] ([Intel XE#776]) -> [SKIP][517] ([Intel XE#2136]) +1 other test skip
[516]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@kms_fbcon_fbt@psr-suspend.html
[517]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@display-3x:
- shard-dg2-set2: [SKIP][518] ([Intel XE#703]) -> [SKIP][519] ([Intel XE#2423] / [i915#2575])
[518]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_feature_discovery@display-3x.html
[519]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@dp-mst:
- shard-dg2-set2: [SKIP][520] ([Intel XE#1137]) -> [SKIP][521] ([Intel XE#2423] / [i915#2575])
[520]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@kms_feature_discovery@dp-mst.html
[521]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_feature_discovery@dp-mst.html
* igt@kms_feature_discovery@psr1:
- shard-bmg: [SKIP][522] ([Intel XE#3007]) -> [SKIP][523] ([Intel XE#2374])
[522]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_feature_discovery@psr1.html
[523]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_feature_discovery@psr1.html
* igt@kms_feature_discovery@psr2:
- shard-dg2-set2: [SKIP][524] ([Intel XE#1135]) -> [SKIP][525] ([Intel XE#2423] / [i915#2575])
[524]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_feature_discovery@psr2.html
[525]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-dg2-set2: [INCOMPLETE][526] ([Intel XE#2049]) -> [SKIP][527] ([Intel XE#2423] / [i915#2575])
[526]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_flip@2x-blocking-wf_vblank.html
[527]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-dg2-set2: [SKIP][528] ([Intel XE#2423] / [i915#2575]) -> [FAIL][529] ([Intel XE#301])
[528]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_flip@2x-flip-vs-expired-vblank.html
[529]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@2x-wf_vblank-ts-check:
- shard-bmg: [SKIP][530] ([Intel XE#3007]) -> [DMESG-WARN][531] ([Intel XE#1033]) +1 other test dmesg-warn
[530]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_flip@2x-wf_vblank-ts-check.html
[531]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_flip@2x-wf_vblank-ts-check.html
* igt@kms_flip@bo-too-big-interruptible@a-edp1:
- shard-lnl: [INCOMPLETE][532] -> [INCOMPLETE][533] ([Intel XE#1504]) +1 other test incomplete
[532]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-lnl-7/igt@kms_flip@bo-too-big-interruptible@a-edp1.html
[533]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-lnl-5/igt@kms_flip@bo-too-big-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-absolute-wf_vblank:
- shard-dg2-set2: [SKIP][534] ([Intel XE#2423] / [i915#2575]) -> [DMESG-WARN][535] ([Intel XE#1033]) +6 other tests dmesg-warn
[534]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_flip@flip-vs-absolute-wf_vblank.html
[535]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_flip@flip-vs-absolute-wf_vblank.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-dg2-set2: [FAIL][536] ([Intel XE#301]) -> [SKIP][537] ([Intel XE#2423] / [i915#2575])
[536]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@kms_flip@flip-vs-expired-vblank.html
[537]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-bmg: [FAIL][538] ([Intel XE#3321]) -> [DMESG-WARN][539] ([Intel XE#1033])
[538]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[539]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
- shard-dg2-set2: [SKIP][540] ([Intel XE#2423] / [i915#2575]) -> [DMESG-FAIL][541] ([Intel XE#1033])
[540]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[541]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-bmg: [SKIP][542] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][543] ([Intel XE#2293] / [Intel XE#2380])
[542]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
[543]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-dg2-set2: [SKIP][544] ([Intel XE#455]) -> [SKIP][545] ([Intel XE#2136] / [Intel XE#2351])
[544]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
[545]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-dg2-set2: [SKIP][546] ([Intel XE#455]) -> [SKIP][547] ([Intel XE#2136]) +5 other tests skip
[546]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
[547]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff:
- shard-dg2-set2: [SKIP][548] ([Intel XE#651]) -> [SKIP][549] ([Intel XE#2136]) +13 other tests skip
[548]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff.html
[549]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][550] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][551] ([Intel XE#2311]) +6 other tests skip
[550]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html
[551]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff:
- shard-dg2-set2: [SKIP][552] ([Intel XE#651]) -> [SKIP][553] ([Intel XE#2136] / [Intel XE#2351]) +13 other tests skip
[552]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff.html
[553]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][554] ([Intel XE#2311]) -> [SKIP][555] ([Intel XE#4108]) +3 other tests skip
[554]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html
[555]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-mmap-wc:
- shard-dg2-set2: [SKIP][556] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][557] ([Intel XE#651]) +7 other tests skip
[556]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-mmap-wc.html
[557]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-dg2-set2: [SKIP][558] ([Intel XE#2136]) -> [DMESG-WARN][559] ([Intel XE#1033]) +3 other tests dmesg-warn
[558]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
[559]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
- shard-dg2-set2: [DMESG-WARN][560] ([Intel XE#1033]) -> [SKIP][561] ([Intel XE#2136] / [Intel XE#2351])
[560]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
[561]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][562] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][563] ([Intel XE#4141]) +1 other test skip
[562]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html
[563]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
- shard-dg2-set2: [SKIP][564] ([Intel XE#2136] / [Intel XE#2351]) -> [DMESG-WARN][565] ([Intel XE#1033])
[564]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
[565]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][566] ([Intel XE#4141]) -> [SKIP][567] ([Intel XE#2136] / [Intel XE#2231])
[566]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen.html
[567]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc:
- shard-dg2-set2: [DMESG-WARN][568] ([Intel XE#1033]) -> [SKIP][569] ([Intel XE#2136])
[568]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc.html
[569]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_frontbuffer_tracking@fbc-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-dg2-set2: [DMESG-WARN][570] ([Intel XE#1033]) -> [ABORT][571] ([Intel XE#2625])
[570]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-suspend.html
[571]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbc-tiling-linear:
- shard-bmg: [SKIP][572] ([Intel XE#4141]) -> [SKIP][573] ([Intel XE#4108])
[572]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html
[573]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][574] ([Intel XE#2311]) -> [SKIP][575] ([Intel XE#2136] / [Intel XE#2231]) +2 other tests skip
[574]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-blt.html
[575]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte:
- shard-dg2-set2: [SKIP][576] ([Intel XE#2136]) -> [SKIP][577] ([Intel XE#651]) +20 other tests skip
[576]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html
[577]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
- shard-dg2-set2: [SKIP][578] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][579] ([Intel XE#658])
[578]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
[579]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen:
- shard-dg2-set2: [SKIP][580] ([Intel XE#2136]) -> [SKIP][581] ([Intel XE#653]) +18 other tests skip
[580]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen.html
[581]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbcpsr-slowdraw:
- shard-dg2-set2: [SKIP][582] ([Intel XE#653]) -> [SKIP][583] ([Intel XE#2136] / [Intel XE#2351]) +14 other tests skip
[582]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-slowdraw.html
[583]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-slowdraw.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][584] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][585] ([Intel XE#2313]) +5 other tests skip
[584]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[585]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
- shard-bmg: [SKIP][586] ([Intel XE#2313]) -> [SKIP][587] ([Intel XE#4108]) +1 other test skip
[586]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html
[587]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render:
- shard-dg2-set2: [SKIP][588] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][589] ([Intel XE#653]) +2 other tests skip
[588]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render.html
[589]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][590] ([Intel XE#2313]) -> [SKIP][591] ([Intel XE#2136] / [Intel XE#2231]) +1 other test skip
[590]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt.html
[591]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-slowdraw:
- shard-dg2-set2: [SKIP][592] ([Intel XE#653]) -> [SKIP][593] ([Intel XE#2136]) +16 other tests skip
[592]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_frontbuffer_tracking@psr-slowdraw.html
[593]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-slowdraw.html
* igt@kms_getfb@getfb-reject-ccs:
- shard-dg2-set2: [SKIP][594] ([Intel XE#605]) -> [SKIP][595] ([Intel XE#2423] / [i915#2575])
[594]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_getfb@getfb-reject-ccs.html
[595]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_getfb@getfb-reject-ccs.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][596] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][597] ([Intel XE#3544])
[596]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
[597]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-dg2-set2: [SKIP][598] ([Intel XE#346]) -> [SKIP][599] ([Intel XE#2136])
[598]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_joiner@invalid-modeset-big-joiner.html
[599]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-dg2-set2: [SKIP][600] ([Intel XE#2136]) -> [SKIP][601] ([Intel XE#2927])
[600]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_joiner@invalid-modeset-ultra-joiner.html
[601]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-dg2-set2: [SKIP][602] ([Intel XE#2423] / [i915#2575]) -> [SKIP][603] ([Intel XE#356])
[602]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[603]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane_cursor@primary:
- shard-dg2-set2: [FAIL][604] ([Intel XE#616]) -> [SKIP][605] ([Intel XE#2423] / [i915#2575])
[604]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_plane_cursor@primary.html
[605]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_plane_cursor@primary.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers:
- shard-bmg: [DMESG-WARN][606] ([Intel XE#1033]) -> [SKIP][607] ([Intel XE#4108])
[606]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-5/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers.html
[607]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_plane_scaling@plane-upscale-20x20-with-modifiers.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling:
- shard-dg2-set2: [SKIP][608] ([Intel XE#2423] / [i915#2575]) -> [SKIP][609] ([Intel XE#2763] / [Intel XE#455]) +3 other tests skip
[608]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling.html
[609]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-bmg: [SKIP][610] ([Intel XE#3007]) -> [SKIP][611] ([Intel XE#2763]) +1 other test skip
[610]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
[611]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-dg2-set2: [SKIP][612] ([Intel XE#2136]) -> [SKIP][613] ([Intel XE#2938])
[612]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_pm_backlight@brightness-with-dpms.html
[613]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade:
- shard-dg2-set2: [SKIP][614] ([Intel XE#2136]) -> [SKIP][615] ([Intel XE#870])
[614]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_pm_backlight@fade.html
[615]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@kms_pm_backlight@fade.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-dg2-set2: [SKIP][616] ([Intel XE#870]) -> [SKIP][617] ([Intel XE#2136]) +1 other test skip
[616]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_pm_backlight@fade-with-dpms.html
[617]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-dg2-set2: [SKIP][618] ([Intel XE#1122]) -> [SKIP][619] ([Intel XE#2136] / [Intel XE#2351])
[618]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@kms_pm_dc@dc3co-vpb-simulation.html
[619]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc5-psr:
- shard-dg2-set2: [SKIP][620] ([Intel XE#1129]) -> [SKIP][621] ([Intel XE#2136])
[620]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@kms_pm_dc@dc5-psr.html
[621]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-dg2-set2: [SKIP][622] ([Intel XE#2136]) -> [SKIP][623] ([Intel XE#3309])
[622]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_pm_dc@dc5-retention-flops.html
[623]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_dc@dc6-dpms:
- shard-dg2-set2: [SKIP][624] ([Intel XE#908]) -> [SKIP][625] ([Intel XE#2136] / [Intel XE#2351])
[624]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@kms_pm_dc@dc6-dpms.html
[625]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_rpm@cursor-dpms:
- shard-dg2-set2: [DMESG-WARN][626] ([Intel XE#1033]) -> [SKIP][627] ([Intel XE#2446])
[626]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@kms_pm_rpm@cursor-dpms.html
[627]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_pm_rpm@cursor-dpms.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-dg2-set2: [SKIP][628] ([Intel XE#1489]) -> [SKIP][629] ([Intel XE#2136]) +6 other tests skip
[628]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
[629]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
- shard-bmg: [SKIP][630] ([Intel XE#1489]) -> [SKIP][631] ([Intel XE#4108])
[630]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
[631]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf:
- shard-dg2-set2: [SKIP][632] ([Intel XE#2136]) -> [SKIP][633] ([Intel XE#1489]) +7 other tests skip
[632]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html
[633]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
- shard-bmg: [SKIP][634] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][635] ([Intel XE#1489]) +2 other tests skip
[634]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html
[635]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-8/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-dg2-set2: [SKIP][636] ([Intel XE#1122]) -> [SKIP][637] ([Intel XE#2136])
[636]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_psr2_su@page_flip-nv12.html
[637]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@fbc-pr-basic:
- shard-bmg: [SKIP][638] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][639] ([Intel XE#4108])
[638]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-3/igt@kms_psr@fbc-pr-basic.html
[639]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_psr@fbc-pr-basic.html
* igt@kms_psr@fbc-pr-sprite-blt:
- shard-bmg: [SKIP][640] ([Intel XE#2136] / [Intel XE#2231]) -> [SKIP][641] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[640]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_psr@fbc-pr-sprite-blt.html
[641]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_psr@fbc-pr-sprite-blt.html
* igt@kms_psr@fbc-psr-sprite-plane-move:
- shard-dg2-set2: [SKIP][642] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][643] ([Intel XE#2136] / [Intel XE#2351]) +4 other tests skip
[642]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@kms_psr@fbc-psr-sprite-plane-move.html
[643]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_psr@fbc-psr-sprite-plane-move.html
* igt@kms_psr@fbc-psr-sprite-plane-onoff:
- shard-dg2-set2: [SKIP][644] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][645] ([Intel XE#2850] / [Intel XE#929]) +4 other tests skip
[644]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_psr@fbc-psr-sprite-plane-onoff.html
[645]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_psr@fbc-psr-sprite-plane-onoff.html
* igt@kms_psr@fbc-psr2-sprite-plane-onoff:
- shard-dg2-set2: [SKIP][646] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][647] ([Intel XE#2136]) +12 other tests skip
[646]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html
[647]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html
* igt@kms_psr@psr-cursor-blt:
- shard-bmg: [SKIP][648] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][649] ([Intel XE#2136] / [Intel XE#2231]) +1 other test skip
[648]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-1/igt@kms_psr@psr-cursor-blt.html
[649]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_psr@psr-cursor-blt.html
* igt@kms_psr@psr2-sprite-plane-move:
- shard-dg2-set2: [SKIP][650] ([Intel XE#2136]) -> [SKIP][651] ([Intel XE#2850] / [Intel XE#929]) +7 other tests skip
[650]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_psr@psr2-sprite-plane-move.html
[651]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-433/igt@kms_psr@psr2-sprite-plane-move.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-dg2-set2: [SKIP][652] ([Intel XE#2423] / [i915#2575]) -> [SKIP][653] ([Intel XE#3414]) +1 other test skip
[652]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@kms_rotation_crc@primary-rotation-90.html
[653]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-bmg: [SKIP][654] ([Intel XE#3007]) -> [SKIP][655] ([Intel XE#2330])
[654]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
[655]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
- shard-dg2-set2: [SKIP][656] ([Intel XE#2423] / [i915#2575]) -> [SKIP][657] ([Intel XE#1127])
[656]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
[657]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-bmg: [SKIP][658] ([Intel XE#1499]) -> [SKIP][659] ([Intel XE#4108])
[658]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-2/igt@kms_vrr@seamless-rr-switch-vrr.html
[659]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-dg2-set2: [SKIP][660] ([Intel XE#756]) -> [SKIP][661] ([Intel XE#2423] / [i915#2575])
[660]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@kms_writeback@writeback-invalid-parameters.html
[661]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@kms_writeback@writeback-invalid-parameters.html
* igt@xe_compute_preempt@compute-preempt:
- shard-dg2-set2: [SKIP][662] ([Intel XE#1280] / [Intel XE#455]) -> [SKIP][663] ([Intel XE#1130])
[662]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@xe_compute_preempt@compute-preempt.html
[663]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_compute_preempt@compute-preempt.html
* igt@xe_copy_basic@mem-copy-linear-0x3fff:
- shard-dg2-set2: [SKIP][664] ([Intel XE#1123]) -> [SKIP][665] ([Intel XE#1130]) +1 other test skip
[664]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@xe_copy_basic@mem-copy-linear-0x3fff.html
[665]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_copy_basic@mem-copy-linear-0x3fff.html
* igt@xe_copy_basic@mem-copy-linear-0xfffe:
- shard-dg2-set2: [SKIP][666] ([Intel XE#1130]) -> [SKIP][667] ([Intel XE#1123])
[666]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_copy_basic@mem-copy-linear-0xfffe.html
[667]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_copy_basic@mem-copy-linear-0xfffe.html
* igt@xe_eudebug@attach-debug-metadata:
- shard-bmg: [SKIP][668] ([Intel XE#1130]) -> [SKIP][669] ([Intel XE#2905]) +1 other test skip
[668]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@xe_eudebug@attach-debug-metadata.html
[669]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-2/igt@xe_eudebug@attach-debug-metadata.html
* igt@xe_eudebug@basic-vm-bind-ufence-sigint-client:
- shard-dg2-set2: [SKIP][670] ([Intel XE#3889]) -> [SKIP][671] ([Intel XE#1130])
[670]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-436/igt@xe_eudebug@basic-vm-bind-ufence-sigint-client.html
[671]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_eudebug@basic-vm-bind-ufence-sigint-client.html
* igt@xe_eudebug@multiple-sessions:
- shard-bmg: [SKIP][672] ([Intel XE#2905]) -> [SKIP][673] ([Intel XE#1130])
[672]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-8/igt@xe_eudebug@multiple-sessions.html
[673]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-3/igt@xe_eudebug@multiple-sessions.html
* igt@xe_eudebug_online@preempt-breakpoint:
- shard-dg2-set2: [SKIP][674] ([Intel XE#1130]) -> [SKIP][675] ([Intel XE#2905]) +8 other tests skip
[674]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_eudebug_online@preempt-breakpoint.html
[675]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-463/igt@xe_eudebug_online@preempt-breakpoint.html
* igt@xe_eudebug_online@writes-caching-vram-bb-sram-target-sram:
- shard-dg2-set2: [SKIP][676] ([Intel XE#2905]) -> [SKIP][677] ([Intel XE#1130]) +7 other tests skip
[676]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@xe_eudebug_online@writes-caching-vram-bb-sram-target-sram.html
[677]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_eudebug_online@writes-caching-vram-bb-sram-target-sram.html
* igt@xe_exec_basic@multigpu-no-exec-null:
- shard-bmg: [SKIP][678] ([Intel XE#1130]) -> [SKIP][679] ([Intel XE#2322]) +1 other test skip
[678]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@xe_exec_basic@multigpu-no-exec-null.html
[679]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-4/igt@xe_exec_basic@multigpu-no-exec-null.html
* igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
- shard-dg2-set2: [SKIP][680] ([Intel XE#1392]) -> [SKIP][681] ([Intel XE#1130]) +1 other test skip
[680]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
[681]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
* igt@xe_exec_fault_mode@many-basic-prefetch:
- shard-dg2-set2: [SKIP][682] ([Intel XE#288]) -> [SKIP][683] ([Intel XE#1130]) +22 other tests skip
[682]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@xe_exec_fault_mode@many-basic-prefetch.html
[683]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_exec_fault_mode@many-basic-prefetch.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch:
- shard-dg2-set2: [SKIP][684] ([Intel XE#1130]) -> [SKIP][685] ([Intel XE#288]) +20 other tests skip
[684]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch.html
[685]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
- shard-dg2-set2: [SKIP][686] ([Intel XE#2360]) -> [SKIP][687] ([Intel XE#1130]) +2 other tests skip
[686]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-435/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
[687]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
* igt@xe_media_fill@media-fill:
- shard-dg2-set2: [SKIP][688] ([Intel XE#1130]) -> [SKIP][689] ([Intel XE#560])
[688]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_media_fill@media-fill.html
[689]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_media_fill@media-fill.html
* igt@xe_oa@closed-fd-and-unmapped-access:
- shard-dg2-set2: [SKIP][690] ([Intel XE#1130]) -> [SKIP][691] ([Intel XE#2541] / [Intel XE#3573]) +6 other tests skip
[690]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-433/igt@xe_oa@closed-fd-and-unmapped-access.html
[691]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_oa@closed-fd-and-unmapped-access.html
* igt@xe_oa@oa-unit-exclusive-stream-sample-oa:
- shard-dg2-set2: [SKIP][692] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][693] ([Intel XE#1130]) +9 other tests skip
[692]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_oa@oa-unit-exclusive-stream-sample-oa.html
[693]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_oa@oa-unit-exclusive-stream-sample-oa.html
* igt@xe_pat@pat-index-xehpc:
- shard-dg2-set2: [SKIP][694] ([Intel XE#1130]) -> [SKIP][695] ([Intel XE#2838] / [Intel XE#979])
[694]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_pat@pat-index-xehpc.html
[695]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pm@d3cold-mocs:
- shard-dg2-set2: [SKIP][696] ([Intel XE#2284]) -> [SKIP][697] ([Intel XE#1130])
[696]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@xe_pm@d3cold-mocs.html
[697]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_pm@d3cold-mocs.html
* igt@xe_pm@s2idle-multiple-execs:
- shard-dg2-set2: [SKIP][698] ([Intel XE#1130]) -> [ABORT][699] ([Intel XE#1358])
[698]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_pm@s2idle-multiple-execs.html
[699]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-432/igt@xe_pm@s2idle-multiple-execs.html
* igt@xe_pm@s3-basic-exec:
- shard-dg2-set2: [SKIP][700] ([Intel XE#1130]) -> [DMESG-WARN][701] ([Intel XE#1033] / [Intel XE#569])
[700]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_pm@s3-basic-exec.html
[701]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_pm@s3-basic-exec.html
* igt@xe_pm@s3-vm-bind-prefetch:
- shard-dg2-set2: [DMESG-WARN][702] ([Intel XE#1033] / [Intel XE#569]) -> [SKIP][703] ([Intel XE#1130])
[702]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_pm@s3-vm-bind-prefetch.html
[703]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_pm@s3-vm-bind-prefetch.html
* igt@xe_pm@s4-exec-after:
- shard-bmg: [SKIP][704] ([Intel XE#1130]) -> [DMESG-WARN][705] ([Intel XE#1033]) +1 other test dmesg-warn
[704]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-bmg-7/igt@xe_pm@s4-exec-after.html
[705]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-bmg-1/igt@xe_pm@s4-exec-after.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-dg2-set2: [SKIP][706] ([Intel XE#579]) -> [SKIP][707] ([Intel XE#1130])
[706]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_pm@vram-d3cold-threshold.html
[707]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_query@multigpu-query-gt-list:
- shard-dg2-set2: [SKIP][708] ([Intel XE#944]) -> [SKIP][709] ([Intel XE#1130]) +3 other tests skip
[708]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-434/igt@xe_query@multigpu-query-gt-list.html
[709]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_query@multigpu-query-gt-list.html
* igt@xe_query@multigpu-query-oa-units:
- shard-dg2-set2: [SKIP][710] ([Intel XE#1130]) -> [SKIP][711] ([Intel XE#944]) +1 other test skip
[710]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_query@multigpu-query-oa-units.html
[711]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-436/igt@xe_query@multigpu-query-oa-units.html
* igt@xe_spin_batch@spin-fixed-duration-with-preempter:
- shard-dg2-set2: [SKIP][712] ([Intel XE#1130]) -> [DMESG-WARN][713] ([Intel XE#1033])
[712]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-466/igt@xe_spin_batch@spin-fixed-duration-with-preempter.html
[713]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-434/igt@xe_spin_batch@spin-fixed-duration-with-preempter.html
* igt@xe_sriov_auto_provisioning@exclusive-ranges:
- shard-dg2-set2: [SKIP][714] ([Intel XE#4130]) -> [SKIP][715] ([Intel XE#1130])
[714]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2548-897537fb818365733977947214c799d61675895f/shard-dg2-463/igt@xe_sriov_auto_provisioning@exclusive-ranges.html
[715]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/shard-dg2-466/igt@xe_sriov_auto_provisioning@exclusive-ranges.html
[Intel XE#1033]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1033
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1130
[Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
[Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
[Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
[Intel XE#1152]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1152
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
[Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1504
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#1607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1607
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#1948]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1948
[Intel XE#1999]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1999
[Intel XE#2007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2007
[Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2136
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2231
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2280
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2423]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2423
[Intel XE#2446]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2446
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2625
[Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2853
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
[Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
[Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#3007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3007
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#3084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3084
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/314
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#324]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/324
[Intel XE#3249]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3249
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3433
[Intel XE#3440]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3440
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#3453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3453
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3546]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3546
[Intel XE#356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/356
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#3576]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3576
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3701
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#3719]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3719
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3768]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3768
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3889]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3889
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4010
[Intel XE#4108]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4108
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
[Intel XE#540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/540
[Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
[Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#605]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/605
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
[Intel XE#771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/771
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/780
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#827]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/827
[Intel XE#829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/829
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/873
[Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899
[Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908
[Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
Build changes
-------------
* IGT: IGT_8207 -> IGT_8209
* Linux: xe-2548-897537fb818365733977947214c799d61675895f -> xe-pw-143941v1
IGT_8207: 9f36f9f9e8825a67b762630c2b31628ddcda5c10 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8209: 07ec14a8b00849e82a6ee7aff433c8f564787bf0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-2548-897537fb818365733977947214c799d61675895f: 897537fb818365733977947214c799d61675895f
xe-pw-143941v1: 143941v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-143941v1/index.html
[-- Attachment #2: Type: text/html, Size: 214607 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread* Re: [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements
2025-01-24 16:30 [PATCH 00/11] drm/i915: intel_display conversions and some debug improvements Ville Syrjala
` (18 preceding siblings ...)
2025-01-24 23:24 ` ✗ Xe.CI.Full: failure " Patchwork
@ 2025-02-04 11:14 ` Jani Nikula
19 siblings, 0 replies; 23+ messages in thread
From: Jani Nikula @ 2025-02-04 11:14 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe
On Fri, 24 Jan 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Convert a bunch of stuff over to struct intel_display, and
> finish off with a few debug print improvements.
Good stuff. Series is
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> Ville Syrjälä (11):
> drm/i915: Decouple i915_gem_dumb_create() from the display a bit
> drm/i915: Decouple intel_fb_bo.h interfaces from driver specific types
> drm/i915: Convert intel_crtc.c to struct intel_display
> drm/i915: Convert intel_fb.c to struct intel_display
> drm/i915: Convert intel_display_power_{get,put}*() to intel_display
> drm/i915: Convert i9xx_plane.c to struct intel_display
> drm/i915: Finish intel_sprite.c struct intel_display conversion
> drm/i915: Convert intel_cursor.c to struct intel_display
> drm/i915: Convert skl_univeral_plane.c to struct intel_display
> drm/i915: Use DRM_RECT_FMT & co. for plane debugs
> drm/i915: Pimp plane debugs
>
> drivers/gpu/drm/i915/display/g4x_dp.c | 9 +-
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 8 +-
> drivers/gpu/drm/i915/display/i9xx_plane.c | 262 +++++------
> drivers/gpu/drm/i915/display/i9xx_plane.h | 6 +-
> drivers/gpu/drm/i915/display/icl_dsi.c | 11 +-
> .../gpu/drm/i915/display/intel_atomic_plane.c | 24 +-
> drivers/gpu/drm/i915/display/intel_audio.c | 9 +-
> drivers/gpu/drm/i915/display/intel_cdclk.c | 8 +-
> drivers/gpu/drm/i915/display/intel_crt.c | 16 +-
> drivers/gpu/drm/i915/display/intel_crtc.c | 65 +--
> drivers/gpu/drm/i915/display/intel_crtc.h | 7 +-
> drivers/gpu/drm/i915/display/intel_cursor.c | 174 ++++----
> drivers/gpu/drm/i915/display/intel_cursor.h | 4 +-
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 13 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 63 +--
> drivers/gpu/drm/i915/display/intel_display.c | 74 +--
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> .../drm/i915/display/intel_display_debugfs.c | 5 +-
> .../drm/i915/display/intel_display_driver.c | 2 +-
> .../gpu/drm/i915/display/intel_display_irq.c | 10 +-
> .../drm/i915/display/intel_display_power.c | 85 ++--
> .../drm/i915/display/intel_display_power.h | 54 +--
> drivers/gpu/drm/i915/display/intel_dmc.c | 7 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 7 +-
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 5 +-
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 55 ++-
> drivers/gpu/drm/i915/display/intel_fb.c | 249 ++++++-----
> drivers/gpu/drm/i915/display/intel_fb.h | 11 +-
> drivers/gpu/drm/i915/display/intel_fb_bo.c | 18 +-
> drivers/gpu/drm/i915/display/intel_fb_bo.h | 8 +-
> drivers/gpu/drm/i915/display/intel_gmbus.c | 10 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 10 +-
> drivers/gpu/drm/i915/display/intel_hotplug.c | 5 +-
> drivers/gpu/drm/i915/display/intel_lvds.c | 5 +-
> .../drm/i915/display/intel_modeset_setup.c | 6 +-
> drivers/gpu/drm/i915/display/intel_pipe_crc.c | 5 +-
> drivers/gpu/drm/i915/display/intel_pps.c | 18 +-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 3 +-
> drivers/gpu/drm/i915/display/intel_sprite.c | 110 ++---
> drivers/gpu/drm/i915/display/intel_sprite.h | 6 +-
> drivers/gpu/drm/i915/display/intel_tc.c | 78 ++--
> drivers/gpu/drm/i915/display/intel_vdsc.c | 5 +-
> drivers/gpu/drm/i915/display/intel_vga.c | 5 +-
> drivers/gpu/drm/i915/display/skl_scaler.c | 13 +-
> .../drm/i915/display/skl_universal_plane.c | 422 +++++++++---------
> .../drm/i915/display/skl_universal_plane.h | 8 +-
> drivers/gpu/drm/i915/display/skl_watermark.c | 5 +-
> drivers/gpu/drm/i915/display/vlv_dsi.c | 4 +-
> drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gt_pm.c | 6 +-
> drivers/gpu/drm/xe/display/intel_fb_bo.c | 7 +-
> 51 files changed, 1019 insertions(+), 985 deletions(-)
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 23+ messages in thread