* [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
@ 2023-06-30 10:00 Thomas Hellström
2023-06-30 10:03 ` [Intel-xe] ✓ CI.Patch_applied: success for " Patchwork
` (10 more replies)
0 siblings, 11 replies; 20+ messages in thread
From: Thomas Hellström @ 2023-06-30 10:00 UTC (permalink / raw)
To: intel-xe
Add a copy of xe_drm.h for uAPI review purposes only. Never commit this,
the intention is to perform an uAPI review in this thread and if needed
move it to Gitlab for easier discussion.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
include/uapi/drm/xe_drm_reviewonly.h | 1009 ++++++++++++++++++++++++++
1 file changed, 1009 insertions(+)
create mode 100644 include/uapi/drm/xe_drm_reviewonly.h
diff --git a/include/uapi/drm/xe_drm_reviewonly.h b/include/uapi/drm/xe_drm_reviewonly.h
new file mode 100644
index 000000000000..e890b131af91
--- /dev/null
+++ b/include/uapi/drm/xe_drm_reviewonly.h
@@ -0,0 +1,1009 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _UAPI_XE_DRM_H_
+#define _UAPI_XE_DRM_H_
+
+#include "drm.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* Please note that modifications to all structs defined here are
+ * subject to backwards-compatibility constraints.
+ */
+
+/**
+ * struct xe_user_extension - Base class for defining a chain of extensions
+ *
+ * Many interfaces need to grow over time. In most cases we can simply
+ * extend the struct and have userspace pass in more data. Another option,
+ * as demonstrated by Vulkan's approach to providing extensions for forward
+ * and backward compatibility, is to use a list of optional structs to
+ * provide those extra details.
+ *
+ * The key advantage to using an extension chain is that it allows us to
+ * redefine the interface more easily than an ever growing struct of
+ * increasing complexity, and for large parts of that interface to be
+ * entirely optional. The downside is more pointer chasing; chasing across
+ * the __user boundary with pointers encapsulated inside u64.
+ *
+ * Example chaining:
+ *
+ * .. code-block:: C
+ *
+ * struct xe_user_extension ext3 {
+ * .next_extension = 0, // end
+ * .name = ...,
+ * };
+ * struct xe_user_extension ext2 {
+ * .next_extension = (uintptr_t)&ext3,
+ * .name = ...,
+ * };
+ * struct xe_user_extension ext1 {
+ * .next_extension = (uintptr_t)&ext2,
+ * .name = ...,
+ * };
+ *
+ * Typically the struct xe_user_extension would be embedded in some uAPI
+ * struct, and in this case we would feed it the head of the chain(i.e ext1),
+ * which would then apply all of the above extensions.
+ *
+ */
+struct xe_user_extension {
+ /**
+ * @next_extension:
+ *
+ * Pointer to the next struct xe_user_extension, or zero if the end.
+ */
+ __u64 next_extension;
+
+ /**
+ * @name: Name of the extension.
+ *
+ * Note that the name here is just some integer.
+ *
+ * Also note that the name space for this is not global for the whole
+ * driver, but rather its scope/meaning is limited to the specific piece
+ * of uAPI which has embedded the struct xe_user_extension.
+ */
+ __u32 name;
+
+ /**
+ * @pad: MBZ
+ *
+ * All undefined bits must be zero.
+ */
+ __u32 pad;
+};
+
+/*
+ * xe specific ioctls.
+ *
+ * The device specific ioctl range is [DRM_COMMAND_BASE, DRM_COMMAND_END) ie
+ * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset
+ * against DRM_COMMAND_BASE and should be between [0x0, 0x60).
+ */
+#define DRM_XE_DEVICE_QUERY 0x00
+#define DRM_XE_GEM_CREATE 0x01
+#define DRM_XE_GEM_MMAP_OFFSET 0x02
+#define DRM_XE_VM_CREATE 0x03
+#define DRM_XE_VM_DESTROY 0x04
+#define DRM_XE_VM_BIND 0x05
+#define DRM_XE_ENGINE_CREATE 0x06
+#define DRM_XE_ENGINE_DESTROY 0x07
+#define DRM_XE_EXEC 0x08
+#define DRM_XE_MMIO 0x09
+#define DRM_XE_ENGINE_SET_PROPERTY 0x0a
+#define DRM_XE_WAIT_USER_FENCE 0x0b
+#define DRM_XE_VM_MADVISE 0x0c
+#define DRM_XE_ENGINE_GET_PROPERTY 0x0d
+
+/* Must be kept compact -- no holes */
+#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
+#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
+#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
+#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
+#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
+#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
+#define DRM_IOCTL_XE_ENGINE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_ENGINE_CREATE, struct drm_xe_engine_create)
+#define DRM_IOCTL_XE_ENGINE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_ENGINE_GET_PROPERTY, struct drm_xe_engine_get_property)
+#define DRM_IOCTL_XE_ENGINE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_ENGINE_DESTROY, struct drm_xe_engine_destroy)
+#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
+#define DRM_IOCTL_XE_MMIO DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_MMIO, struct drm_xe_mmio)
+#define DRM_IOCTL_XE_ENGINE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_ENGINE_SET_PROPERTY, struct drm_xe_engine_set_property)
+#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
+#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
+
+/**
+ * enum drm_xe_memory_class - Supported memory classes.
+ */
+enum drm_xe_memory_class {
+ /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
+ XE_MEM_REGION_CLASS_SYSMEM = 0,
+ /**
+ * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
+ * represents the memory that is local to the device, which we
+ * call VRAM. Not valid on integrated platforms.
+ */
+ XE_MEM_REGION_CLASS_VRAM
+};
+
+/**
+ * struct drm_xe_query_mem_region - Describes some region as known to
+ * the driver.
+ */
+struct drm_xe_query_mem_region {
+ /**
+ * @mem_class: The memory class describing this region.
+ *
+ * See enum drm_xe_memory_class for supported values.
+ */
+ __u16 mem_class;
+ /**
+ * @instance: The instance for this region.
+ *
+ * The @mem_class and @instance taken together will always give
+ * a unique pair.
+ */
+ __u16 instance;
+ /** @pad: MBZ */
+ __u32 pad;
+ /**
+ * @min_page_size: Min page-size in bytes for this region.
+ *
+ * When the kernel allocates memory for this region, the
+ * underlying pages will be at least @min_page_size in size.
+ *
+ * Important note: When userspace allocates a GTT address which
+ * can point to memory allocated from this region, it must also
+ * respect this minimum alignment. This is enforced by the
+ * kernel.
+ */
+ __u32 min_page_size;
+ /**
+ * @max_page_size: Max page-size in bytes for this region.
+ */
+ __u32 max_page_size;
+ /**
+ * @total_size: The usable size in bytes for this region.
+ */
+ __u64 total_size;
+ /**
+ * @used: Estimate of the memory used in bytes for this region.
+ *
+ * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
+ * accounting. Without this the value here will always equal
+ * zero.
+ */
+ __u64 used;
+ /** @reserved: MBZ */
+ __u64 reserved[8];
+};
+
+/**
+ * struct drm_xe_query_mem_usage - describe memory regions and usage
+ *
+ * If a query is made with a struct drm_xe_device_query where .query
+ * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
+ * struct drm_xe_query_mem_usage in .data.
+ */
+struct drm_xe_query_mem_usage {
+ /** @num_regions: number of memory regions returned in @regions */
+ __u32 num_regions;
+ /** @pad: MBZ */
+ __u32 pad;
+ /** @regions: The returned regions for this device */
+ struct drm_xe_query_mem_region regions[];
+};
+
+/**
+ * struct drm_xe_query_config - describe the device configuration
+ *
+ * If a query is made with a struct drm_xe_device_query where .query
+ * is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
+ * struct drm_xe_query_config in .data.
+ */
+struct drm_xe_query_config {
+ /** @num_params: number of parameters returned in info */
+ __u32 num_params;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
+#define XE_QUERY_CONFIG_FLAGS 1
+ #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
+ #define XE_QUERY_CONFIG_FLAGS_USE_GUC (0x1 << 1)
+#define XE_QUERY_CONFIG_MIN_ALIGNEMENT 2
+#define XE_QUERY_CONFIG_VA_BITS 3
+#define XE_QUERY_CONFIG_GT_COUNT 4
+#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
+#define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
+#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY + 1)
+ /** @info: array of elements containing the config info */
+ __u64 info[];
+};
+
+/**
+ * struct drm_xe_query_gts - describe GTs
+ *
+ * If a query is made with a struct drm_xe_device_query where .query
+ * is equal to DRM_XE_DEVICE_QUERY_GTS, then the reply uses struct
+ * drm_xe_query_gts in .data.
+ */
+struct drm_xe_query_gts {
+ /** @num_gt: number of GTs returned in gts */
+ __u32 num_gt;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /**
+ * @gts: The GTs returned for this device
+ *
+ * TODO: convert drm_xe_query_gt to proper kernel-doc.
+ * TODO: Perhaps info about every mem region relative to this GT? e.g.
+ * bandwidth between this GT and remote region?
+ */
+ struct drm_xe_query_gt {
+#define XE_QUERY_GT_TYPE_MAIN 0
+#define XE_QUERY_GT_TYPE_REMOTE 1
+#define XE_QUERY_GT_TYPE_MEDIA 2
+ __u16 type;
+ __u16 instance;
+ __u32 clock_freq;
+ __u64 features;
+ __u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
+ __u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
+ __u64 inaccessible_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
+ __u64 reserved[8];
+ } gts[];
+};
+
+/**
+ * struct drm_xe_query_topology_mask - describe the topology mask of a GT
+ *
+ * This is the hardware topology which reflects the internal physical
+ * structure of the GPU.
+ *
+ * If a query is made with a struct drm_xe_device_query where .query
+ * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
+ * struct drm_xe_query_topology_mask in .data.
+ */
+struct drm_xe_query_topology_mask {
+ /** @gt_id: GT ID the mask is associated with */
+ __u16 gt_id;
+
+ /*
+ * To query the mask of Dual Sub Slices (DSS) available for geometry
+ * operations. For example a query response containing the following
+ * in mask:
+ * DSS_GEOMETRY ff ff ff ff 00 00 00 00
+ * means 32 DSS are available for geometry.
+ */
+#define XE_TOPO_DSS_GEOMETRY (1 << 0)
+ /*
+ * To query the mask of Dual Sub Slices (DSS) available for compute
+ * operations. For example a query response containing the following
+ * in mask:
+ * DSS_COMPUTE ff ff ff ff 00 00 00 00
+ * means 32 DSS are available for compute.
+ */
+#define XE_TOPO_DSS_COMPUTE (1 << 1)
+ /*
+ * To query the mask of Execution Units (EU) available per Dual Sub
+ * Slices (DSS). For example a query response containing the following
+ * in mask:
+ * EU_PER_DSS ff ff 00 00 00 00 00 00
+ * means each DSS has 16 EU.
+ */
+#define XE_TOPO_EU_PER_DSS (1 << 2)
+ /** @type: type of mask */
+ __u16 type;
+
+ /** @num_bytes: number of bytes in requested mask */
+ __u32 num_bytes;
+
+ /** @mask: little-endian mask of @num_bytes */
+ __u8 mask[];
+};
+
+/**
+ * struct drm_xe_device_query - main structure to query device information
+ *
+ * If size is set to 0, the driver fills it with the required size for the
+ * requested type of data to query. If size is equal to the required size,
+ * the queried information is copied into data.
+ *
+ * For example the following code snippet allows retrieving and printing
+ * information about the device engines with DRM_XE_DEVICE_QUERY_ENGINES:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_xe_engine_class_instance *hwe;
+ * struct drm_xe_device_query query = {
+ * .extensions = 0,
+ * .query = DRM_XE_DEVICE_QUERY_ENGINES,
+ * .size = 0,
+ * .data = 0,
+ * };
+ * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
+ * hwe = malloc(query.size);
+ * query.data = (uintptr_t)hwe;
+ * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
+ * int num_engines = query.size / sizeof(*hwe);
+ * for (int i = 0; i < num_engines; i++) {
+ * printf("Engine %d: %s\n", i,
+ * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
+ * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COPY ? "COPY":
+ * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_DECODE ? "VIDEO_DECODE":
+ * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ? "VIDEO_ENHANCE":
+ * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
+ * "UNKNOWN");
+ * }
+ * free(hwe);
+ */
+struct drm_xe_device_query {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+#define DRM_XE_DEVICE_QUERY_ENGINES 0
+#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
+#define DRM_XE_DEVICE_QUERY_CONFIG 2
+#define DRM_XE_DEVICE_QUERY_GTS 3
+#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
+#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
+ /** @query: The type of data to query */
+ __u32 query;
+
+ /** @size: Size of the queried data */
+ __u32 size;
+
+ /** @data: Queried data is placed here */
+ __u64 data;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_gem_create {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /**
+ * @size: Requested size for the object
+ *
+ * The (page-aligned) allocated size for the object will be returned.
+ */
+ __u64 size;
+
+#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
+#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
+ /**
+ * @flags: Flags, currently a mask of memory instances of where BO can
+ * be placed
+ */
+ __u32 flags;
+
+ /**
+ * @vm_id: Attached VM, if any
+ *
+ * If a VM is specified, this BO must:
+ *
+ * 1. Only ever be bound to that VM.
+ *
+ * 2. Cannot be exported as a PRIME fd.
+ */
+ __u32 vm_id;
+
+ /**
+ * @handle: Returned handle for the object.
+ *
+ * Object handles are nonzero.
+ */
+ __u32 handle;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_gem_mmap_offset {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @handle: Handle for the object being mapped. */
+ __u32 handle;
+
+ /** @flags: Must be zero */
+ __u32 flags;
+
+ /** @offset: The fake offset to use for subsequent mmap call */
+ __u64 offset;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+/**
+ * struct drm_xe_vm_bind_op_error_capture - format of VM bind op error capture
+ */
+struct drm_xe_vm_bind_op_error_capture {
+ /** @error: errno that occured */
+ __s32 error;
+
+ /** @op: operation that encounter an error */
+ __u32 op;
+
+ /** @addr: address of bind op */
+ __u64 addr;
+
+ /** @size: size of bind */
+ __u64 size;
+};
+
+/** struct drm_xe_ext_vm_set_property - VM set property extension */
+struct drm_xe_ext_vm_set_property {
+ /** @base: base user extension */
+ struct xe_user_extension base;
+
+#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
+ /** @property: property to set */
+ __u32 property;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @value: property value */
+ __u64 value;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_vm_create {
+#define XE_VM_EXTENSION_SET_PROPERTY 0
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
+#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
+#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
+#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
+ /** @flags: Flags */
+ __u32 flags;
+
+ /** @vm_id: Returned VM ID */
+ __u32 vm_id;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_vm_destroy {
+ /** @vm_id: VM ID */
+ __u32 vm_id;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_vm_bind_op {
+ /**
+ * @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for UNMAP
+ */
+ __u32 obj;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ union {
+ /**
+ * @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
+ * ignored for unbind
+ */
+ __u64 obj_offset;
+
+ /** @userptr: user pointer to bind on */
+ __u64 userptr;
+ };
+
+ /**
+ * @range: Number of bytes from the object to bind to addr, MBZ for UNMAP_ALL
+ */
+ __u64 range;
+
+ /** @addr: Address to operate on, MBZ for UNMAP_ALL */
+ __u64 addr;
+
+ /**
+ * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
+ * only applies to creating new VMAs
+ */
+ __u64 tile_mask;
+
+#define XE_VM_BIND_OP_MAP 0x0
+#define XE_VM_BIND_OP_UNMAP 0x1
+#define XE_VM_BIND_OP_MAP_USERPTR 0x2
+#define XE_VM_BIND_OP_RESTART 0x3
+#define XE_VM_BIND_OP_UNMAP_ALL 0x4
+#define XE_VM_BIND_OP_PREFETCH 0x5
+
+#define XE_VM_BIND_FLAG_READONLY (0x1 << 16)
+ /*
+ * A bind ops completions are always async, hence the support for out
+ * sync. This flag indicates the allocation of the memory for new page
+ * tables and the job to program the pages tables is asynchronous
+ * relative to the IOCTL. That part of a bind operation can fail under
+ * memory pressure, the job in practice can't fail unless the system is
+ * totally shot.
+ *
+ * If this flag is clear and the IOCTL doesn't return an error, in
+ * practice the bind op is good and will complete.
+ *
+ * If this flag is set and doesn't return an error, the bind op can
+ * still fail and recovery is needed. If configured, the bind op that
+ * caused the error will be captured in drm_xe_vm_bind_op_error_capture.
+ * Once the user sees the error (via a ufence +
+ * XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS), it should free memory
+ * via non-async unbinds, and then restart all queue'd async binds op via
+ * XE_VM_BIND_OP_RESTART. Or alternatively the user should destroy the
+ * VM.
+ *
+ * This flag is only allowed when DRM_XE_VM_CREATE_ASYNC_BIND_OPS is
+ * configured in the VM and must be set if the VM is configured with
+ * DRM_XE_VM_CREATE_ASYNC_BIND_OPS and not in an error state.
+ */
+#define XE_VM_BIND_FLAG_ASYNC (0x1 << 17)
+ /*
+ * Valid on a faulting VM only, do the MAP operation immediately rather
+ * than differing the MAP to the page fault handler.
+ */
+#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 18)
+ /*
+ * When the NULL flag is set, the page tables are setup with a special
+ * bit which indicates writes are dropped and all reads return zero. In
+ * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
+ * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
+ * intended to implement VK sparse bindings.
+ */
+#define XE_VM_BIND_FLAG_NULL (0x1 << 19)
+ /** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits) */
+ __u32 op;
+
+ /** @mem_region: Memory region to prefetch VMA to, instance not a mask */
+ __u32 region;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_vm_bind {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @vm_id: The ID of the VM to bind to */
+ __u32 vm_id;
+
+ /**
+ * @engine_id: engine_id, must be of class DRM_XE_ENGINE_CLASS_VM_BIND
+ * and engine must have same vm_id. If zero, the default VM bind engine
+ * is used.
+ */
+ __u32 engine_id;
+
+ /** @num_binds: number of binds in this IOCTL */
+ __u32 num_binds;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ union {
+ /** @bind: used if num_binds == 1 */
+ struct drm_xe_vm_bind_op bind;
+
+ /**
+ * @vector_of_binds: userptr to array of struct
+ * drm_xe_vm_bind_op if num_binds > 1
+ */
+ __u64 vector_of_binds;
+ };
+
+ /** @num_syncs: amount of syncs to wait on */
+ __u32 num_syncs;
+
+ /** @pad2: MBZ */
+ __u32 pad2;
+
+ /** @syncs: pointer to struct drm_xe_sync array */
+ __u64 syncs;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+/** struct drm_xe_ext_engine_set_property - engine set property extension */
+struct drm_xe_ext_engine_set_property {
+ /** @base: base user extension */
+ struct xe_user_extension base;
+
+ /** @property: property to set */
+ __u32 property;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @value: property value */
+ __u64 value;
+};
+
+/**
+ * struct drm_xe_engine_set_property - engine set property
+ *
+ * Same namespace for extensions as drm_xe_engine_create
+ */
+struct drm_xe_engine_set_property {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @engine_id: Engine ID */
+ __u32 engine_id;
+
+#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
+#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
+#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
+ /*
+ * Long running or ULLS engine mode. DMA fences not allowed in this
+ * mode. Must match the value of DRM_XE_VM_CREATE_COMPUTE_MODE, serves
+ * as a sanity check the UMD knows what it is doing. Can only be set at
+ * engine create time.
+ */
+#define XE_ENGINE_SET_PROPERTY_COMPUTE_MODE 3
+#define XE_ENGINE_SET_PROPERTY_PERSISTENCE 4
+#define XE_ENGINE_SET_PROPERTY_JOB_TIMEOUT 5
+#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
+#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
+#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
+ /** @property: property to set */
+ __u32 property;
+
+ /** @value: property value */
+ __u64 value;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+/** struct drm_xe_engine_class_instance - instance of an engine class */
+struct drm_xe_engine_class_instance {
+#define DRM_XE_ENGINE_CLASS_RENDER 0
+#define DRM_XE_ENGINE_CLASS_COPY 1
+#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
+#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
+#define DRM_XE_ENGINE_CLASS_COMPUTE 4
+ /*
+ * Kernel only class (not actual hardware engine class). Used for
+ * creating ordered queues of VM bind operations.
+ */
+#define DRM_XE_ENGINE_CLASS_VM_BIND 5
+ __u16 engine_class;
+
+ __u16 engine_instance;
+ __u16 gt_id;
+};
+
+struct drm_xe_engine_create {
+#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @width: submission width (number BB per exec) for this engine */
+ __u16 width;
+
+ /** @num_placements: number of valid placements for this engine */
+ __u16 num_placements;
+
+ /** @vm_id: VM to use for this engine */
+ __u32 vm_id;
+
+ /** @flags: MBZ */
+ __u32 flags;
+
+ /** @engine_id: Returned engine ID */
+ __u32 engine_id;
+
+ /**
+ * @instances: user pointer to a 2-d array of struct
+ * drm_xe_engine_class_instance
+ *
+ * length = width (i) * num_placements (j)
+ * index = j + i * width
+ */
+ __u64 instances;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_engine_get_property {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @engine_id: Engine ID */
+ __u32 engine_id;
+
+#define XE_ENGINE_GET_PROPERTY_BAN 0
+ /** @property: property to get */
+ __u32 property;
+
+ /** @value: property value */
+ __u64 value;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_engine_destroy {
+ /** @engine_id: Engine ID */
+ __u32 engine_id;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_sync {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+#define DRM_XE_SYNC_SYNCOBJ 0x0
+#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
+#define DRM_XE_SYNC_DMA_BUF 0x2
+#define DRM_XE_SYNC_USER_FENCE 0x3
+#define DRM_XE_SYNC_SIGNAL 0x10
+ __u32 flags;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ union {
+ __u32 handle;
+
+ /**
+ * @addr: Address of user fence. When sync passed in via exec
+ * IOCTL this a GPU address in the VM. When sync passed in via
+ * VM bind IOCTL this is a user pointer. In either case, it is
+ * the users responsibility that this address is present and
+ * mapped when the user fence is signalled. Must be qword
+ * aligned.
+ */
+ __u64 addr;
+ };
+
+ __u64 timeline_value;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_exec {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @vm_id: VM ID to run batch buffer in */
+ __u32 engine_id;
+
+ /** @num_syncs: Amount of struct drm_xe_sync in array. */
+ __u32 num_syncs;
+
+ /** @syncs: Pointer to struct drm_xe_sync array. */
+ __u64 syncs;
+
+ /**
+ * @address: address of batch buffer if num_batch_buffer == 1 or an
+ * array of batch buffer addresses
+ */
+ __u64 address;
+
+ /**
+ * @num_batch_buffer: number of batch buffer in this exec, must match
+ * the width of the engine
+ */
+ __u16 num_batch_buffer;
+
+ /** @pad: MBZ */
+ __u16 pad[3];
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_mmio {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ __u32 addr;
+
+#define DRM_XE_MMIO_8BIT 0x0
+#define DRM_XE_MMIO_16BIT 0x1
+#define DRM_XE_MMIO_32BIT 0x2
+#define DRM_XE_MMIO_64BIT 0x3
+#define DRM_XE_MMIO_BITS_MASK 0x3
+#define DRM_XE_MMIO_READ 0x4
+#define DRM_XE_MMIO_WRITE 0x8
+ __u32 flags;
+
+ __u64 value;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+/**
+ * struct drm_xe_wait_user_fence - wait user fence
+ *
+ * Wait on user fence, XE will wakeup on every HW engine interrupt in the
+ * instances list and check if user fence is complete::
+ *
+ * (*addr & MASK) OP (VALUE & MASK)
+ *
+ * Returns to user on user fence completion or timeout.
+ */
+struct drm_xe_wait_user_fence {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ union {
+ /**
+ * @addr: user pointer address to wait on, must qword aligned
+ */
+ __u64 addr;
+
+ /**
+ * @vm_id: The ID of the VM which encounter an error used with
+ * DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be clear.
+ */
+ __u64 vm_id;
+ };
+
+#define DRM_XE_UFENCE_WAIT_EQ 0
+#define DRM_XE_UFENCE_WAIT_NEQ 1
+#define DRM_XE_UFENCE_WAIT_GT 2
+#define DRM_XE_UFENCE_WAIT_GTE 3
+#define DRM_XE_UFENCE_WAIT_LT 4
+#define DRM_XE_UFENCE_WAIT_LTE 5
+ /** @op: wait operation (type of comparison) */
+ __u16 op;
+
+#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
+#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
+#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
+ /** @flags: wait flags */
+ __u16 flags;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @value: compare value */
+ __u64 value;
+
+#define DRM_XE_UFENCE_WAIT_U8 0xffu
+#define DRM_XE_UFENCE_WAIT_U16 0xffffu
+#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
+#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
+ /** @mask: comparison mask */
+ __u64 mask;
+ /**
+ * @timeout: how long to wait before bailing, value in nanoseconds.
+ * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
+ * it contains timeout expressed in nanoseconds to wait (fence will
+ * expire at now() + timeout).
+ * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout) wait
+ * will end at timeout (uses system MONOTONIC_CLOCK).
+ * Passing negative timeout leads to neverending wait.
+ *
+ * On relative timeout this value is updated with timeout left
+ * (for restarting the call in case of signal delivery).
+ * On absolute timeout this value stays intact (restarted call still
+ * expire at the same point of time).
+ */
+ __s64 timeout;
+
+ /**
+ * @num_engines: number of engine instances to wait on, must be zero
+ * when DRM_XE_UFENCE_WAIT_SOFT_OP set
+ */
+ __u64 num_engines;
+
+ /**
+ * @instances: user pointer to array of drm_xe_engine_class_instance to
+ * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
+ */
+ __u64 instances;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_vm_madvise {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @vm_id: The ID VM in which the VMA exists */
+ __u32 vm_id;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @range: Number of bytes in the VMA */
+ __u64 range;
+
+ /** @addr: Address of the VMA to operation on */
+ __u64 addr;
+
+ /*
+ * Setting the preferred location will trigger a migrate of the VMA
+ * backing store to new location if the backing store is already
+ * allocated.
+ *
+ * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
+ * drm_xe_memory_class.
+ */
+#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
+#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
+ /*
+ * In this case lower 32 bits are mem class, upper 32 are GT.
+ * Combination provides a single IOCTL plus migrate VMA to preferred
+ * location.
+ */
+#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
+ /*
+ * The CPU will do atomic memory operations to this VMA. Must be set on
+ * some devices for atomics to behave correctly.
+ */
+#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
+ /*
+ * The device will do atomic memory operations to this VMA. Must be set
+ * on some devices for atomics to behave correctly.
+ */
+#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
+ /*
+ * Priority WRT to eviction (moving from preferred memory location due
+ * to memory pressure). The lower the priority, the more likely to be
+ * evicted.
+ */
+#define DRM_XE_VM_MADVISE_PRIORITY 5
+#define DRM_XE_VMA_PRIORITY_LOW 0
+#define DRM_XE_VMA_PRIORITY_NORMAL 1 /* Default */
+#define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must be elevated user */
+ /* Pin the VMA in memory, must be elevated user */
+#define DRM_XE_VM_MADVISE_PIN 6
+ /** @property: property to set */
+ __u32 property;
+
+ /** @pad2: MBZ */
+ __u32 pad2;
+
+ /** @value: property value */
+ __u64 value;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* _UAPI_XE_DRM_H_ */
--
2.40.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-xe] ✓ CI.Patch_applied: success for drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
@ 2023-06-30 10:03 ` Patchwork
2023-06-30 10:03 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
` (9 subsequent siblings)
10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-06-30 10:03 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
== Series Details ==
Series: drm/xe: uapi review submission
URL : https://patchwork.freedesktop.org/series/120052/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: d835d7f04 drm/xe: Enable PCI device earlier
=== git am output follows ===
Applying: drm/xe: uapi review submission
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-xe] ✗ CI.checkpatch: warning for drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
2023-06-30 10:03 ` [Intel-xe] ✓ CI.Patch_applied: success for " Patchwork
@ 2023-06-30 10:03 ` Patchwork
2023-06-30 10:05 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
` (8 subsequent siblings)
10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-06-30 10:03 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
== Series Details ==
Series: drm/xe: uapi review submission
URL : https://patchwork.freedesktop.org/series/120052/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
c7d32770e3cd31d9fc134ce41f329b10aa33ee15
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit ba42ad11f23b9954d8904c5ee28285c74d492a93
Author: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Date: Fri Jun 30 12:00:59 2023 +0200
drm/xe: uapi review submission
Add a copy of xe_drm.h for uAPI review purposes only. Never commit this,
the intention is to perform an uAPI review in this thread and if needed
move it to Gitlab for easier discussion.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
+ /mt/dim checkpatch d835d7f04101ccffa1978e3144b930bfe2af5eda drm-intel
ba42ad11f drm/xe: uapi review submission
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:16: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#16:
new file mode 100644
-:126: WARNING:LONG_LINE: line length of 124 exceeds 100 columns
#126: FILE: include/uapi/drm/xe_drm_reviewonly.h:106:
+#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
-:127: WARNING:LONG_LINE: line length of 120 exceeds 100 columns
#127: FILE: include/uapi/drm/xe_drm_reviewonly.h:107:
+#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
-:128: WARNING:LONG_LINE: line length of 130 exceeds 100 columns
#128: FILE: include/uapi/drm/xe_drm_reviewonly.h:108:
+#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
-:129: WARNING:LONG_LINE: line length of 118 exceeds 100 columns
#129: FILE: include/uapi/drm/xe_drm_reviewonly.h:109:
+#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
-:130: WARNING:LONG_LINE: line length of 120 exceeds 100 columns
#130: FILE: include/uapi/drm/xe_drm_reviewonly.h:110:
+#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
-:131: WARNING:LONG_LINE: line length of 114 exceeds 100 columns
#131: FILE: include/uapi/drm/xe_drm_reviewonly.h:111:
+#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
-:132: WARNING:LONG_LINE: line length of 126 exceeds 100 columns
#132: FILE: include/uapi/drm/xe_drm_reviewonly.h:112:
+#define DRM_IOCTL_XE_ENGINE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_ENGINE_CREATE, struct drm_xe_engine_create)
-:133: WARNING:LONG_LINE: line length of 138 exceeds 100 columns
#133: FILE: include/uapi/drm/xe_drm_reviewonly.h:113:
+#define DRM_IOCTL_XE_ENGINE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_ENGINE_GET_PROPERTY, struct drm_xe_engine_get_property)
-:134: WARNING:LONG_LINE: line length of 128 exceeds 100 columns
#134: FILE: include/uapi/drm/xe_drm_reviewonly.h:114:
+#define DRM_IOCTL_XE_ENGINE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_ENGINE_DESTROY, struct drm_xe_engine_destroy)
-:135: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#135: FILE: include/uapi/drm/xe_drm_reviewonly.h:115:
+#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
-:136: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#136: FILE: include/uapi/drm/xe_drm_reviewonly.h:116:
+#define DRM_IOCTL_XE_MMIO DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_MMIO, struct drm_xe_mmio)
-:137: WARNING:LONG_LINE: line length of 138 exceeds 100 columns
#137: FILE: include/uapi/drm/xe_drm_reviewonly.h:117:
+#define DRM_IOCTL_XE_ENGINE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_ENGINE_SET_PROPERTY, struct drm_xe_engine_set_property)
-:138: WARNING:LONG_LINE: line length of 130 exceeds 100 columns
#138: FILE: include/uapi/drm/xe_drm_reviewonly.h:118:
+#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
-:139: WARNING:LONG_LINE: line length of 120 exceeds 100 columns
#139: FILE: include/uapi/drm/xe_drm_reviewonly.h:119:
+#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
-:280: WARNING:LONG_LINE_COMMENT: line length of 103 exceeds 100 columns
#280: FILE: include/uapi/drm/xe_drm_reviewonly.h:260:
+ __u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
-:281: WARNING:LONG_LINE_COMMENT: line length of 103 exceeds 100 columns
#281: FILE: include/uapi/drm/xe_drm_reviewonly.h:261:
+ __u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
-:282: WARNING:LONG_LINE_COMMENT: line length of 103 exceeds 100 columns
#282: FILE: include/uapi/drm/xe_drm_reviewonly.h:262:
+ __u64 inaccessible_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
-:458: WARNING:TYPO_SPELLING: 'occured' may be misspelled - perhaps 'occurred'?
#458: FILE: include/uapi/drm/xe_drm_reviewonly.h:438:
+ /** @error: errno that occured */
^^^^^^^
total: 0 errors, 19 warnings, 0 checks, 1009 lines checked
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-xe] ✓ CI.KUnit: success for drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
2023-06-30 10:03 ` [Intel-xe] ✓ CI.Patch_applied: success for " Patchwork
2023-06-30 10:03 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
@ 2023-06-30 10:05 ` Patchwork
2023-06-30 10:08 ` [Intel-xe] ✓ CI.Build: " Patchwork
` (7 subsequent siblings)
10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-06-30 10:05 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
== Series Details ==
Series: drm/xe: uapi review submission
URL : https://patchwork.freedesktop.org/series/120052/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
stty: 'standard input': Inappropriate ioctl for device
[10:03:48] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:03:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
In file included from ../include/linux/build_bug.h:5,
from ../include/linux/init.h:5,
from ../include/linux/io.h:10,
from ../include/linux/iosys-map.h:10,
from ../drivers/gpu/drm/ttm/ttm_resource.c:25:
../drivers/gpu/drm/ttm/ttm_resource.c: In function ‘ttm_lru_bulk_move_del’:
../drivers/gpu/drm/ttm/ttm_resource.c:117:26: warning: suggest parentheses around ‘&&’ within ‘||’ [-Wparentheses]
117 | pos->first == res && pos->last == res)) {
| ~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~
../include/linux/compiler.h:78:42: note: in definition of macro ‘unlikely’
78 | # define unlikely(x) __builtin_expect(!!(x), 0)
| ^
[10:04:14] Starting KUnit Kernel (1/1)...
[10:04:14] ============================================================
[10:04:14] ==================== xe_bo (2 subtests) ====================
[10:04:14] [SKIPPED] xe_ccs_migrate_kunit
[10:04:14] [SKIPPED] xe_bo_evict_kunit
[10:04:14] ===================== [SKIPPED] xe_bo ======================
[10:04:14] ================== xe_dma_buf (1 subtest) ==================
[10:04:14] [SKIPPED] xe_dma_buf_kunit
[10:04:14] =================== [SKIPPED] xe_dma_buf ===================
[10:04:14] ================== xe_migrate (1 subtest) ==================
[10:04:14] [SKIPPED] xe_migrate_sanity_kunit
[10:04:14] =================== [SKIPPED] xe_migrate ===================
[10:04:14] =================== xe_pci (2 subtests) ====================
[10:04:14] [PASSED] xe_gmdid_graphics_ip
[10:04:14] [PASSED] xe_gmdid_media_ip
[10:04:14] ===================== [PASSED] xe_pci ======================
[10:04:14] ==================== xe_rtp (1 subtest) ====================
[10:04:14] ================== xe_rtp_process_tests ===================
[10:04:14] [PASSED] coalesce-same-reg
[10:04:14] [PASSED] no-match-no-add
[10:04:14] [PASSED] no-match-no-add-multiple-rules
[10:04:14] [PASSED] two-regs-two-entries
[10:04:14] [PASSED] clr-one-set-other
[10:04:14] [PASSED] set-field
[10:04:14] [PASSED] conflict-duplicate
[10:04:14] [PASSED] conflict-not-disjoint
[10:04:14] [PASSED] conflict-reg-type
[10:04:14] ============== [PASSED] xe_rtp_process_tests ===============
[10:04:14] ===================== [PASSED] xe_rtp ======================
[10:04:14] ==================== xe_wa (1 subtest) =====================
[10:04:14] ======================== xe_wa_gt =========================
[10:04:14] [PASSED] TIGERLAKE (B0)
[10:04:14] [PASSED] DG1 (A0)
[10:04:14] [PASSED] DG1 (B0)
[10:04:14] [PASSED] ALDERLAKE_S (A0)
[10:04:14] [PASSED] ALDERLAKE_S (B0)
[10:04:14] [PASSED] ALDERLAKE_S (C0)
[10:04:14] [PASSED] ALDERLAKE_S (D0)
[10:04:14] [PASSED] ALDERLAKE_P (A0)
[10:04:14] [PASSED] ALDERLAKE_P (B0)
[10:04:14] [PASSED] ALDERLAKE_P (C0)
[10:04:14] [PASSED] DG2_G10 (A0)
[10:04:14] [PASSED] DG2_G10 (A1)
[10:04:14] [PASSED] DG2_G10 (B0)
[10:04:14] [PASSED] DG2_G10 (C0)
[10:04:14] [PASSED] DG2_G11 (A0)
[10:04:14] [PASSED] DG2_G11 (B0)
[10:04:14] [PASSED] DG2_G11 (B1)
[10:04:14] [PASSED] DG2_G12 (A0)
[10:04:14] [PASSED] DG2_G12 (A1)
[10:04:14] [PASSED] PVC (B0)
[10:04:14] [PASSED] PVC (B1)
[10:04:14] [PASSED] PVC (C0)
[10:04:14] ==================== [PASSED] xe_wa_gt =====================
[10:04:14] ====================== [PASSED] xe_wa ======================
[10:04:14] ============================================================
[10:04:14] Testing complete. Ran 37 tests: passed: 33, skipped: 4
[10:04:14] Elapsed time: 26.332s total, 4.246s configuring, 21.967s building, 0.097s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:04:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:04:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
[10:04:35] Starting KUnit Kernel (1/1)...
[10:04:35] ============================================================
[10:04:35] ============ drm_test_pick_cmdline (2 subtests) ============
[10:04:35] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:04:35] =============== drm_test_pick_cmdline_named ===============
[10:04:35] [PASSED] NTSC
[10:04:35] [PASSED] NTSC-J
[10:04:35] [PASSED] PAL
[10:04:35] [PASSED] PAL-M
[10:04:35] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:04:35] ============== [PASSED] drm_test_pick_cmdline ==============
[10:04:35] ================== drm_buddy (6 subtests) ==================
[10:04:35] [PASSED] drm_test_buddy_alloc_limit
[10:04:35] [PASSED] drm_test_buddy_alloc_range
[10:04:35] [PASSED] drm_test_buddy_alloc_optimistic
[10:04:35] [PASSED] drm_test_buddy_alloc_pessimistic
[10:04:35] [PASSED] drm_test_buddy_alloc_smoke
[10:04:35] [PASSED] drm_test_buddy_alloc_pathological
[10:04:35] ==================== [PASSED] drm_buddy ====================
[10:04:35] ============= drm_cmdline_parser (40 subtests) =============
[10:04:35] [PASSED] drm_test_cmdline_force_d_only
[10:04:35] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:04:35] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:04:35] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:04:35] [PASSED] drm_test_cmdline_force_e_only
[10:04:35] [PASSED] drm_test_cmdline_res
[10:04:35] [PASSED] drm_test_cmdline_res_vesa
[10:04:35] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:04:35] [PASSED] drm_test_cmdline_res_rblank
[10:04:35] [PASSED] drm_test_cmdline_res_bpp
[10:04:35] [PASSED] drm_test_cmdline_res_refresh
[10:04:35] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:04:35] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:04:35] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:04:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:04:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:04:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:04:35] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:04:35] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:04:35] [PASSED] drm_test_cmdline_res_margins_force_on
[10:04:35] [PASSED] drm_test_cmdline_res_vesa_margins
[10:04:35] [PASSED] drm_test_cmdline_name
[10:04:35] [PASSED] drm_test_cmdline_name_bpp
[10:04:35] [PASSED] drm_test_cmdline_name_option
[10:04:35] [PASSED] drm_test_cmdline_name_bpp_option
[10:04:35] [PASSED] drm_test_cmdline_rotate_0
[10:04:35] [PASSED] drm_test_cmdline_rotate_90
[10:04:35] [PASSED] drm_test_cmdline_rotate_180
[10:04:35] [PASSED] drm_test_cmdline_rotate_270
[10:04:35] [PASSED] drm_test_cmdline_hmirror
[10:04:35] [PASSED] drm_test_cmdline_vmirror
[10:04:35] [PASSED] drm_test_cmdline_margin_options
[10:04:35] [PASSED] drm_test_cmdline_multiple_options
[10:04:35] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:04:35] [PASSED] drm_test_cmdline_extra_and_option
[10:04:35] [PASSED] drm_test_cmdline_freestanding_options
[10:04:35] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:04:35] [PASSED] drm_test_cmdline_panel_orientation
[10:04:35] ================ drm_test_cmdline_invalid =================
[10:04:35] [PASSED] margin_only
[10:04:35] [PASSED] interlace_only
[10:04:35] [PASSED] res_missing_x
[10:04:35] [PASSED] res_missing_y
[10:04:35] [PASSED] res_bad_y
[10:04:35] [PASSED] res_missing_y_bpp
[10:04:35] [PASSED] res_bad_bpp
[10:04:35] [PASSED] res_bad_refresh
[10:04:35] [PASSED] res_bpp_refresh_force_on_off
[10:04:35] [PASSED] res_invalid_mode
[10:04:35] [PASSED] res_bpp_wrong_place_mode
[10:04:35] [PASSED] name_bpp_refresh
[10:04:35] [PASSED] name_refresh
[10:04:35] [PASSED] name_refresh_wrong_mode
[10:04:35] [PASSED] name_refresh_invalid_mode
[10:04:35] [PASSED] rotate_multiple
[10:04:35] [PASSED] rotate_invalid_val
[10:04:35] [PASSED] rotate_truncated
[10:04:35] [PASSED] invalid_option
[10:04:35] [PASSED] invalid_tv_option
[10:04:35] [PASSED] truncated_tv_option
[10:04:35] ============ [PASSED] drm_test_cmdline_invalid =============
[10:04:35] =============== drm_test_cmdline_tv_options ===============
[10:04:35] [PASSED] NTSC
[10:04:35] [PASSED] NTSC_443
[10:04:35] [PASSED] NTSC_J
[10:04:35] [PASSED] PAL
[10:04:35] [PASSED] PAL_M
[10:04:35] [PASSED] PAL_N
[10:04:35] [PASSED] SECAM
[10:04:35] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:04:35] =============== [PASSED] drm_cmdline_parser ================
[10:04:35] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:04:35] ========== drm_test_get_tv_mode_from_name_valid ===========
[10:04:35] [PASSED] NTSC
[10:04:35] [PASSED] NTSC-443
[10:04:35] [PASSED] NTSC-J
[10:04:35] [PASSED] PAL
[10:04:35] [PASSED] PAL-M
[10:04:35] [PASSED] PAL-N
[10:04:35] [PASSED] SECAM
[10:04:35] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:04:35] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:04:35] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:04:35] ============= drm_damage_helper (21 subtests) ==============
[10:04:35] [PASSED] drm_test_damage_iter_no_damage
[10:04:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:04:35] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:04:35] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:04:35] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:04:35] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:04:35] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:04:35] [PASSED] drm_test_damage_iter_simple_damage
[10:04:35] [PASSED] drm_test_damage_iter_single_damage
[10:04:35] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:04:35] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:04:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:04:35] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:04:35] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:04:35] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:04:35] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:04:35] [PASSED] drm_test_damage_iter_damage
[10:04:35] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:04:35] [PASSED] drm_test_damage_iter_damage_one_outside
[10:04:35] [PASSED] drm_test_damage_iter_damage_src_moved
[10:04:35] [PASSED] drm_test_damage_iter_damage_not_visible
[10:04:35] ================ [PASSED] drm_damage_helper ================
[10:04:35] ============== drm_dp_mst_helper (2 subtests) ==============
[10:04:35] ============== drm_test_dp_mst_calc_pbn_mode ==============
[10:04:35] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:04:35] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:04:35] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:04:35] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:04:35] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:04:35] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:04:35] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[10:04:35] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:04:35] [PASSED] DP_POWER_UP_PHY with port number
[10:04:35] [PASSED] DP_POWER_DOWN_PHY with port number
[10:04:35] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:04:35] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:04:35] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:04:35] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:04:35] [PASSED] DP_QUERY_PAYLOAD with port number
[10:04:35] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:04:35] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:04:35] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:04:35] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:04:35] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:04:35] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:04:35] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:04:35] [PASSED] DP_REMOTE_I2C_READ with port number
[10:04:35] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:04:35] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:04:35] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:04:35] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:04:35] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:04:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:04:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:04:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:04:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:04:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:04:35] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:04:35] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:04:35] ================ [PASSED] drm_dp_mst_helper ================
[10:04:35] =========== drm_format_helper_test (11 subtests) ===========
[10:04:35] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:04:35] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:04:35] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:04:35] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:04:35] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:04:35] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:04:35] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:04:35] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:04:35] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:04:35] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:04:35] ============== drm_test_fb_xrgb8888_to_mono ===============
[10:04:35] [PASSED] single_pixel_source_buffer
[10:04:35] [PASSED] single_pixel_clip_rectangle
[10:04:35] [PASSED] well_known_colors
[10:04:35] [PASSED] destination_pitch
[10:04:35] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:04:35] ============= [PASSED] drm_format_helper_test ==============
[10:04:35] ================= drm_format (18 subtests) =================
[10:04:35] [PASSED] drm_test_format_block_width_invalid
[10:04:35] [PASSED] drm_test_format_block_width_one_plane
[10:04:35] [PASSED] drm_test_format_block_width_two_plane
[10:04:35] [PASSED] drm_test_format_block_width_three_plane
[10:04:35] [PASSED] drm_test_format_block_width_tiled
[10:04:35] [PASSED] drm_test_format_block_height_invalid
[10:04:35] [PASSED] drm_test_format_block_height_one_plane
[10:04:35] [PASSED] drm_test_format_block_height_two_plane
[10:04:35] [PASSED] drm_test_format_block_height_three_plane
[10:04:35] [PASSED] drm_test_format_block_height_tiled
[10:04:35] [PASSED] drm_test_format_min_pitch_invalid
[10:04:35] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:04:35] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:04:35] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:04:35] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:04:35] [PASSED] drm_test_format_min_pitch_two_plane
[10:04:35] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:04:35] [PASSED] drm_test_format_min_pitch_tiled
[10:04:35] =================== [PASSED] drm_format ====================
[10:04:35] =============== drm_framebuffer (1 subtest) ================
[10:04:35] =============== drm_test_framebuffer_create ===============
[10:04:35] [PASSED] ABGR8888 normal sizes
[10:04:35] [PASSED] ABGR8888 max sizes
[10:04:35] [PASSED] ABGR8888 pitch greater than min required
[10:04:35] [PASSED] ABGR8888 pitch less than min required
[10:04:35] [PASSED] ABGR8888 Invalid width
[10:04:35] [PASSED] ABGR8888 Invalid buffer handle
[10:04:35] [PASSED] No pixel format
[10:04:35] [PASSED] ABGR8888 Width 0
[10:04:35] [PASSED] ABGR8888 Height 0
[10:04:35] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:04:35] [PASSED] ABGR8888 Large buffer offset
[10:04:35] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:04:35] [PASSED] ABGR8888 Valid buffer modifier
[10:04:35] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:04:35] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:04:35] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:04:35] [PASSED] NV12 Normal sizes
[10:04:35] [PASSED] NV12 Max sizes
[10:04:35] [PASSED] NV12 Invalid pitch
[10:04:35] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:04:35] [PASSED] NV12 different modifier per-plane
[10:04:35] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:04:35] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:04:35] [PASSED] NV12 Modifier for inexistent plane
[10:04:35] [PASSED] NV12 Handle for inexistent plane
[10:04:35] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:04:35] [PASSED] YVU420 Normal sizes
[10:04:35] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:04:35] [PASSED] YVU420 Max sizes
[10:04:35] [PASSED] YVU420 Invalid pitch
[10:04:35] [PASSED] YVU420 Different pitches
[10:04:35] [PASSED] YVU420 Different buffer offsets/pitches
[10:04:35] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:04:35] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:04:35] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:04:35] [PASSED] YVU420 Valid modifier
[10:04:35] [PASSED] YVU420 Different modifiers per plane
[10:04:35] [PASSED] YVU420 Modifier for inexistent plane
[10:04:35] [PASSED] X0L2 Normal sizes
[10:04:35] [PASSED] X0L2 Max sizes
[10:04:35] [PASSED] X0L2 Invalid pitch
[10:04:35] [PASSED] X0L2 Pitch greater than minimum required
stty: 'standard input': Inappropriate ioctl for device
[10:04:35] [PASSED] X0L2 Handle for inexistent plane
[10:04:35] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:04:35] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:04:35] [PASSED] X0L2 Valid modifier
[10:04:35] [PASSED] X0L2 Modifier for inexistent plane
[10:04:35] =========== [PASSED] drm_test_framebuffer_create ===========
[10:04:35] ================= [PASSED] drm_framebuffer =================
[10:04:35] =============== drm-test-managed (1 subtest) ===============
[10:04:35] [PASSED] drm_test_managed_run_action
[10:04:35] ================ [PASSED] drm-test-managed =================
[10:04:35] =================== drm_mm (19 subtests) ===================
[10:04:35] [PASSED] drm_test_mm_init
[10:04:35] [PASSED] drm_test_mm_debug
[10:04:45] [PASSED] drm_test_mm_reserve
[10:04:56] [PASSED] drm_test_mm_insert
[10:04:56] [PASSED] drm_test_mm_replace
[10:04:56] [PASSED] drm_test_mm_insert_range
[10:04:56] [PASSED] drm_test_mm_frag
[10:04:56] [PASSED] drm_test_mm_align
[10:04:56] [PASSED] drm_test_mm_align32
[10:04:57] [PASSED] drm_test_mm_align64
[10:04:57] [PASSED] drm_test_mm_evict
[10:04:57] [PASSED] drm_test_mm_evict_range
[10:04:57] [PASSED] drm_test_mm_topdown
[10:04:57] [PASSED] drm_test_mm_bottomup
[10:04:57] [PASSED] drm_test_mm_lowest
[10:04:57] [PASSED] drm_test_mm_highest
[10:04:58] [PASSED] drm_test_mm_color
[10:04:58] [PASSED] drm_test_mm_color_evict
[10:04:58] [PASSED] drm_test_mm_color_evict_range
[10:04:58] ===================== [PASSED] drm_mm ======================
[10:04:58] ============= drm_modes_analog_tv (4 subtests) =============
[10:04:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:04:58] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:04:58] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:04:58] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:04:58] =============== [PASSED] drm_modes_analog_tv ===============
[10:04:58] ============== drm_plane_helper (2 subtests) ===============
[10:04:58] =============== drm_test_check_plane_state ================
[10:04:58] [PASSED] clipping_simple
[10:04:58] [PASSED] clipping_rotate_reflect
[10:04:58] [PASSED] positioning_simple
[10:04:58] [PASSED] upscaling
[10:04:58] [PASSED] downscaling
[10:04:58] [PASSED] rounding1
[10:04:58] [PASSED] rounding2
[10:04:58] [PASSED] rounding3
[10:04:58] [PASSED] rounding4
[10:04:58] =========== [PASSED] drm_test_check_plane_state ============
[10:04:58] =========== drm_test_check_invalid_plane_state ============
[10:04:58] [PASSED] positioning_invalid
[10:04:58] [PASSED] upscaling_invalid
[10:04:58] [PASSED] downscaling_invalid
[10:04:58] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:04:58] ================ [PASSED] drm_plane_helper =================
[10:04:58] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:04:58] ====== drm_test_connector_helper_tv_get_modes_check =======
[10:04:58] [PASSED] None
[10:04:58] [PASSED] PAL
[10:04:58] [PASSED] NTSC
[10:04:58] [PASSED] Both, NTSC Default
[10:04:58] [PASSED] Both, PAL Default
[10:04:58] [PASSED] Both, NTSC Default, with PAL on command-line
[10:04:58] [PASSED] Both, PAL Default, with NTSC on command-line
[10:04:58] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:04:58] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:04:58] ================== drm_rect (9 subtests) ===================
[10:04:58] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:04:58] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:04:58] [PASSED] drm_test_rect_clip_scaled_clipped
[10:04:58] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:04:58] ================= drm_test_rect_intersect =================
[10:04:58] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:04:58] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:04:58] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:04:58] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:04:58] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:04:58] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:04:58] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:04:58] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:04:58] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:04:58] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:04:58] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:04:58] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:04:58] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:04:58] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:04:58] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:04:58] ============= [PASSED] drm_test_rect_intersect =============
[10:04:58] ================ drm_test_rect_calc_hscale ================
[10:04:58] [PASSED] normal use
[10:04:58] [PASSED] out of max range
[10:04:58] [PASSED] out of min range
[10:04:58] [PASSED] zero dst
[10:04:58] [PASSED] negative src
[10:04:58] [PASSED] negative dst
[10:04:58] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:04:58] ================ drm_test_rect_calc_vscale ================
[10:04:58] [PASSED] normal use
[10:04:58] [PASSED] out of max range
[10:04:58] [PASSED] out of min range
[10:04:58] [PASSED] zero dst
[10:04:58] [PASSED] negative src
[10:04:58] [PASSED] negative dst
[10:04:58] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:04:58] ================== drm_test_rect_rotate ===================
[10:04:58] [PASSED] reflect-x
[10:04:58] [PASSED] reflect-y
[10:04:58] [PASSED] rotate-0
[10:04:58] [PASSED] rotate-90
[10:04:58] [PASSED] rotate-180
[10:04:58] [PASSED] rotate-270
[10:04:58] ============== [PASSED] drm_test_rect_rotate ===============
[10:04:58] ================ drm_test_rect_rotate_inv =================
[10:04:58] [PASSED] reflect-x
[10:04:58] [PASSED] reflect-y
[10:04:58] [PASSED] rotate-0
[10:04:58] [PASSED] rotate-90
[10:04:58] [PASSED] rotate-180
[10:04:58] [PASSED] rotate-270
[10:04:58] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:04:58] ==================== [PASSED] drm_rect =====================
[10:04:58] ============================================================
[10:04:58] Testing complete. Ran 333 tests: passed: 333
[10:04:58] Elapsed time: 43.876s total, 1.676s configuring, 18.557s building, 23.589s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-xe] ✓ CI.Build: success for drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
` (2 preceding siblings ...)
2023-06-30 10:05 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
@ 2023-06-30 10:08 ` Patchwork
2023-06-30 10:09 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
` (6 subsequent siblings)
10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-06-30 10:08 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
== Series Details ==
Series: drm/xe: uapi review submission
URL : https://patchwork.freedesktop.org/series/120052/
State : success
== Summary ==
+ trap cleanup EXIT
+ cd /kernel
+ git clone https://gitlab.freedesktop.org/drm/xe/ci.git .ci
Cloning into '.ci'...
++ date +%s
+ echo -e '\e[0Ksection_start:1688119508:build_x86_64[collapsed=true]\r\e[0KBuild x86-64'
+ mkdir -p build64
^[[0Ksection_start:1688119508:build_x86_64[collapsed=true]
^[[0KBuild x86-64
+ cat .ci/kernel/kconfig
+ [[ '' != '' ]]
+ make O=build64 olddefconfig
make[1]: Entering directory '/kernel/build64'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTLD scripts/kconfig/conf
#
# configuration written to .config
#
make[1]: Leaving directory '/kernel/build64'
++ nproc
+ make O=build64 -j48
make[1]: Entering directory '/kernel/build64'
GEN Makefile
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
SYSHDR arch/x86/include/generated/asm/unistd_32_ia32.h
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
SYSHDR arch/x86/include/generated/asm/unistd_64_x32.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
SYSTBL arch/x86/include/generated/asm/syscalls_64.h
WRAP arch/x86/include/generated/uapi/asm/param.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/termbits.h
WRAP arch/x86/include/generated/uapi/asm/types.h
UPD include/generated/uapi/linux/version.h
UPD include/config/kernel.release
HOSTCC arch/x86/tools/relocs_32.o
HOSTCC arch/x86/tools/relocs_64.o
HOSTCC arch/x86/tools/relocs_common.o
UPD include/generated/compile.h
WRAP arch/x86/include/generated/asm/early_ioremap.h
WRAP arch/x86/include/generated/asm/export.h
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
WRAP arch/x86/include/generated/asm/mmiowb.h
WRAP arch/x86/include/generated/asm/local64.h
WRAP arch/x86/include/generated/asm/rwonce.h
WRAP arch/x86/include/generated/asm/module.lds.h
WRAP arch/x86/include/generated/asm/unaligned.h
HOSTCC scripts/unifdef
HOSTCC scripts/kallsyms
HOSTCC scripts/sorttable
HOSTCC scripts/asn1_compiler
UPD include/generated/utsrelease.h
DESCEND objtool
HOSTCC /kernel/build64/tools/objtool/fixdep.o
HOSTLD /kernel/build64/tools/objtool/fixdep-in.o
LINK /kernel/build64/tools/objtool/fixdep
INSTALL /kernel/build64/tools/objtool/libsubcmd/include/subcmd/exec-cmd.h
INSTALL /kernel/build64/tools/objtool/libsubcmd/include/subcmd/help.h
INSTALL /kernel/build64/tools/objtool/libsubcmd/include/subcmd/pager.h
INSTALL /kernel/build64/tools/objtool/libsubcmd/include/subcmd/parse-options.h
INSTALL /kernel/build64/tools/objtool/libsubcmd/include/subcmd/run-command.h
INSTALL libsubcmd_headers
CC /kernel/build64/tools/objtool/libsubcmd/exec-cmd.o
CC /kernel/build64/tools/objtool/libsubcmd/help.o
CC /kernel/build64/tools/objtool/libsubcmd/pager.o
CC /kernel/build64/tools/objtool/libsubcmd/parse-options.o
CC /kernel/build64/tools/objtool/libsubcmd/run-command.o
CC /kernel/build64/tools/objtool/libsubcmd/sigchain.o
CC /kernel/build64/tools/objtool/libsubcmd/subcmd-config.o
HOSTLD arch/x86/tools/relocs
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
HDRINST usr/include/video/edid.h
HDRINST usr/include/video/sisfb.h
HDRINST usr/include/video/uvesafb.h
HDRINST usr/include/drm/amdgpu_drm.h
HDRINST usr/include/drm/qaic_accel.h
HDRINST usr/include/drm/i915_drm.h
HDRINST usr/include/drm/vgem_drm.h
HDRINST usr/include/drm/virtgpu_drm.h
HDRINST usr/include/drm/xe_drm.h
HDRINST usr/include/drm/omap_drm.h
HDRINST usr/include/drm/radeon_drm.h
HDRINST usr/include/drm/tegra_drm.h
HDRINST usr/include/drm/drm_mode.h
HDRINST usr/include/drm/ivpu_accel.h
HDRINST usr/include/drm/exynos_drm.h
HDRINST usr/include/drm/drm_sarea.h
HDRINST usr/include/drm/v3d_drm.h
HDRINST usr/include/drm/xe_drm_reviewonly.h
HDRINST usr/include/drm/qxl_drm.h
HDRINST usr/include/drm/drm_fourcc.h
HDRINST usr/include/drm/nouveau_drm.h
HDRINST usr/include/drm/habanalabs_accel.h
HDRINST usr/include/drm/vmwgfx_drm.h
HDRINST usr/include/drm/msm_drm.h
HDRINST usr/include/drm/etnaviv_drm.h
HDRINST usr/include/drm/vc4_drm.h
HDRINST usr/include/drm/panfrost_drm.h
HDRINST usr/include/drm/drm.h
HDRINST usr/include/drm/lima_drm.h
HDRINST usr/include/mtd/inftl-user.h
HDRINST usr/include/mtd/nftl-user.h
HDRINST usr/include/drm/armada_drm.h
HDRINST usr/include/mtd/mtd-user.h
HDRINST usr/include/mtd/ubi-user.h
HDRINST usr/include/mtd/mtd-abi.h
HDRINST usr/include/xen/gntdev.h
HDRINST usr/include/xen/gntalloc.h
HDRINST usr/include/xen/evtchn.h
HDRINST usr/include/xen/privcmd.h
HDRINST usr/include/asm-generic/auxvec.h
HDRINST usr/include/asm-generic/bitsperlong.h
HDRINST usr/include/asm-generic/posix_types.h
HDRINST usr/include/asm-generic/ioctls.h
HDRINST usr/include/asm-generic/mman.h
HDRINST usr/include/asm-generic/shmbuf.h
HDRINST usr/include/asm-generic/bpf_perf_event.h
HDRINST usr/include/asm-generic/types.h
HDRINST usr/include/asm-generic/poll.h
HDRINST usr/include/asm-generic/msgbuf.h
HDRINST usr/include/asm-generic/swab.h
HDRINST usr/include/asm-generic/statfs.h
HDRINST usr/include/asm-generic/unistd.h
HDRINST usr/include/asm-generic/hugetlb_encode.h
HDRINST usr/include/asm-generic/resource.h
HDRINST usr/include/asm-generic/param.h
HDRINST usr/include/asm-generic/termbits-common.h
HDRINST usr/include/asm-generic/sockios.h
HDRINST usr/include/asm-generic/kvm_para.h
HDRINST usr/include/asm-generic/errno.h
HDRINST usr/include/asm-generic/termios.h
HDRINST usr/include/asm-generic/mman-common.h
HDRINST usr/include/asm-generic/ioctl.h
HDRINST usr/include/asm-generic/socket.h
HDRINST usr/include/asm-generic/signal-defs.h
HDRINST usr/include/asm-generic/termbits.h
HDRINST usr/include/asm-generic/int-ll64.h
HDRINST usr/include/asm-generic/signal.h
HDRINST usr/include/asm-generic/siginfo.h
HDRINST usr/include/asm-generic/stat.h
HDRINST usr/include/asm-generic/int-l64.h
UPD scripts/mod/devicetable-offsets.h
HDRINST usr/include/asm-generic/errno-base.h
HDRINST usr/include/asm-generic/fcntl.h
HDRINST usr/include/asm-generic/setup.h
HDRINST usr/include/asm-generic/ipcbuf.h
HDRINST usr/include/asm-generic/sembuf.h
HDRINST usr/include/asm-generic/ucontext.h
HDRINST usr/include/rdma/mlx5_user_ioctl_cmds.h
HDRINST usr/include/rdma/irdma-abi.h
HDRINST usr/include/rdma/mana-abi.h
HDRINST usr/include/rdma/hfi/hfi1_user.h
HDRINST usr/include/rdma/hfi/hfi1_ioctl.h
HDRINST usr/include/rdma/rdma_user_rxe.h
HDRINST usr/include/rdma/rdma_user_ioctl.h
HDRINST usr/include/rdma/mlx5_user_ioctl_verbs.h
HDRINST usr/include/rdma/bnxt_re-abi.h
HDRINST usr/include/rdma/hns-abi.h
HDRINST usr/include/rdma/ib_user_ioctl_cmds.h
HDRINST usr/include/rdma/qedr-abi.h
HDRINST usr/include/rdma/vmw_pvrdma-abi.h
HDRINST usr/include/rdma/ib_user_sa.h
HDRINST usr/include/rdma/ib_user_ioctl_verbs.h
HDRINST usr/include/rdma/rvt-abi.h
HDRINST usr/include/rdma/mlx5-abi.h
HDRINST usr/include/rdma/rdma_netlink.h
HDRINST usr/include/rdma/erdma-abi.h
HDRINST usr/include/rdma/rdma_user_ioctl_cmds.h
HDRINST usr/include/rdma/rdma_user_cm.h
HDRINST usr/include/rdma/ib_user_verbs.h
HDRINST usr/include/rdma/efa-abi.h
HDRINST usr/include/rdma/siw-abi.h
HDRINST usr/include/rdma/mlx4-abi.h
HDRINST usr/include/rdma/mthca-abi.h
HDRINST usr/include/rdma/ib_user_mad.h
HDRINST usr/include/rdma/ocrdma-abi.h
HDRINST usr/include/rdma/cxgb4-abi.h
HDRINST usr/include/misc/xilinx_sdfec.h
HDRINST usr/include/misc/uacce/hisi_qm.h
HDRINST usr/include/misc/uacce/uacce.h
HDRINST usr/include/misc/cxl.h
HDRINST usr/include/misc/ocxl.h
HDRINST usr/include/misc/fastrpc.h
HDRINST usr/include/misc/pvpanic.h
HDRINST usr/include/linux/i8k.h
HDRINST usr/include/linux/acct.h
HDRINST usr/include/linux/atmmpc.h
HDRINST usr/include/linux/fs.h
HDRINST usr/include/linux/cifs/cifs_mount.h
HDRINST usr/include/linux/cifs/cifs_netlink.h
HDRINST usr/include/linux/if_packet.h
HDRINST usr/include/linux/route.h
HDRINST usr/include/linux/patchkey.h
HDRINST usr/include/linux/tc_ematch/tc_em_cmp.h
HDRINST usr/include/linux/tc_ematch/tc_em_ipt.h
HDRINST usr/include/linux/tc_ematch/tc_em_meta.h
HDRINST usr/include/linux/tc_ematch/tc_em_nbyte.h
HDRINST usr/include/linux/tc_ematch/tc_em_text.h
HDRINST usr/include/linux/virtio_pmem.h
HDRINST usr/include/linux/rkisp1-config.h
HDRINST usr/include/linux/vhost.h
HDRINST usr/include/linux/cec-funcs.h
HDRINST usr/include/linux/ppdev.h
HDRINST usr/include/linux/isdn/capicmd.h
HDRINST usr/include/linux/virtio_fs.h
HDRINST usr/include/linux/netfilter_ipv6.h
HDRINST usr/include/linux/lirc.h
HDRINST usr/include/linux/mroute6.h
MKELF scripts/mod/elfconfig.h
HDRINST usr/include/linux/nl80211-vnd-intel.h
HDRINST usr/include/linux/ivtvfb.h
HDRINST usr/include/linux/auxvec.h
HDRINST usr/include/linux/dm-log-userspace.h
HOSTCC scripts/mod/modpost.o
HDRINST usr/include/linux/dccp.h
HDRINST usr/include/linux/virtio_scmi.h
HOSTCC scripts/mod/file2alias.o
HDRINST usr/include/linux/atmarp.h
HOSTCC scripts/mod/sumversion.o
HDRINST usr/include/linux/arcfb.h
HDRINST usr/include/linux/nbd-netlink.h
HDRINST usr/include/linux/sched/types.h
HDRINST usr/include/linux/tcp.h
HDRINST usr/include/linux/neighbour.h
HDRINST usr/include/linux/dlm_device.h
HDRINST usr/include/linux/wmi.h
HDRINST usr/include/linux/btrfs_tree.h
HDRINST usr/include/linux/virtio_crypto.h
HDRINST usr/include/linux/vbox_err.h
HDRINST usr/include/linux/edd.h
HDRINST usr/include/linux/loop.h
HDRINST usr/include/linux/nvme_ioctl.h
HDRINST usr/include/linux/mmtimer.h
HDRINST usr/include/linux/if_pppol2tp.h
HDRINST usr/include/linux/mtio.h
HDRINST usr/include/linux/if_arcnet.h
HDRINST usr/include/linux/romfs_fs.h
HDRINST usr/include/linux/posix_types.h
HDRINST usr/include/linux/rtc.h
HDRINST usr/include/linux/landlock.h
HDRINST usr/include/linux/gpio.h
HDRINST usr/include/linux/selinux_netlink.h
HDRINST usr/include/linux/pps.h
HDRINST usr/include/linux/ndctl.h
HDRINST usr/include/linux/virtio_gpu.h
HDRINST usr/include/linux/android/binderfs.h
HDRINST usr/include/linux/android/binder.h
HDRINST usr/include/linux/virtio_vsock.h
HDRINST usr/include/linux/sound.h
HDRINST usr/include/linux/vtpm_proxy.h
HDRINST usr/include/linux/nfs_fs.h
HDRINST usr/include/linux/elf-fdpic.h
HDRINST usr/include/linux/adfs_fs.h
HDRINST usr/include/linux/target_core_user.h
HDRINST usr/include/linux/netlink_diag.h
HDRINST usr/include/linux/const.h
HDRINST usr/include/linux/firewire-cdev.h
HDRINST usr/include/linux/vdpa.h
HDRINST usr/include/linux/if_infiniband.h
HDRINST usr/include/linux/serial.h
HDRINST usr/include/linux/iio/types.h
HDRINST usr/include/linux/iio/buffer.h
HDRINST usr/include/linux/iio/events.h
HDRINST usr/include/linux/baycom.h
HDRINST usr/include/linux/major.h
HDRINST usr/include/linux/atmppp.h
HDRINST usr/include/linux/ipv6_route.h
HDRINST usr/include/linux/spi/spidev.h
HDRINST usr/include/linux/spi/spi.h
HDRINST usr/include/linux/virtio_ring.h
HDRINST usr/include/linux/hdlc/ioctl.h
HDRINST usr/include/linux/remoteproc_cdev.h
HDRINST usr/include/linux/hyperv.h
HDRINST usr/include/linux/rpl_iptunnel.h
HDRINST usr/include/linux/sync_file.h
HDRINST usr/include/linux/igmp.h
HDRINST usr/include/linux/v4l2-dv-timings.h
HDRINST usr/include/linux/virtio_i2c.h
HDRINST usr/include/linux/xfrm.h
HDRINST usr/include/linux/capability.h
HDRINST usr/include/linux/gtp.h
HDRINST usr/include/linux/xdp_diag.h
HDRINST usr/include/linux/pkt_cls.h
HDRINST usr/include/linux/suspend_ioctls.h
HDRINST usr/include/linux/vt.h
HDRINST usr/include/linux/loadpin.h
HDRINST usr/include/linux/dlm_plock.h
HDRINST usr/include/linux/fb.h
HDRINST usr/include/linux/max2175.h
HDRINST usr/include/linux/sunrpc/debug.h
HDRINST usr/include/linux/gsmmux.h
HDRINST usr/include/linux/watchdog.h
HDRINST usr/include/linux/vhost_types.h
HDRINST usr/include/linux/vduse.h
HDRINST usr/include/linux/ila.h
HDRINST usr/include/linux/tdx-guest.h
HDRINST usr/include/linux/close_range.h
HDRINST usr/include/linux/ivtv.h
HDRINST usr/include/linux/cryptouser.h
HDRINST usr/include/linux/netfilter/xt_string.h
HDRINST usr/include/linux/netfilter/nfnetlink_compat.h
HDRINST usr/include/linux/netfilter/nf_nat.h
HDRINST usr/include/linux/netfilter/xt_recent.h
HDRINST usr/include/linux/netfilter/xt_addrtype.h
HDRINST usr/include/linux/netfilter/nf_conntrack_tcp.h
HDRINST usr/include/linux/netfilter/xt_MARK.h
HDRINST usr/include/linux/netfilter/xt_SYNPROXY.h
HDRINST usr/include/linux/netfilter/xt_multiport.h
HDRINST usr/include/linux/netfilter/nfnetlink.h
HDRINST usr/include/linux/netfilter/xt_cgroup.h
HDRINST usr/include/linux/netfilter/nf_synproxy.h
HDRINST usr/include/linux/netfilter/xt_TCPOPTSTRIP.h
HDRINST usr/include/linux/netfilter/nfnetlink_log.h
HDRINST usr/include/linux/netfilter/xt_TPROXY.h
HDRINST usr/include/linux/netfilter/xt_u32.h
HDRINST usr/include/linux/netfilter/nfnetlink_osf.h
HDRINST usr/include/linux/netfilter/xt_ecn.h
HDRINST usr/include/linux/netfilter/xt_esp.h
HDRINST usr/include/linux/netfilter/nfnetlink_hook.h
HDRINST usr/include/linux/netfilter/xt_mac.h
HDRINST usr/include/linux/netfilter/xt_comment.h
HDRINST usr/include/linux/netfilter/xt_NFQUEUE.h
HDRINST usr/include/linux/netfilter/xt_osf.h
HDRINST usr/include/linux/netfilter/xt_hashlimit.h
HDRINST usr/include/linux/netfilter/nf_conntrack_sctp.h
HDRINST usr/include/linux/netfilter/xt_socket.h
HDRINST usr/include/linux/netfilter/xt_connmark.h
HDRINST usr/include/linux/netfilter/xt_sctp.h
HDRINST usr/include/linux/netfilter/xt_tcpudp.h
HDRINST usr/include/linux/netfilter/xt_DSCP.h
HDRINST usr/include/linux/netfilter/xt_time.h
HDRINST usr/include/linux/netfilter/xt_IDLETIMER.h
HDRINST usr/include/linux/netfilter/xt_policy.h
HDRINST usr/include/linux/netfilter/xt_rpfilter.h
HDRINST usr/include/linux/netfilter/xt_nfacct.h
HDRINST usr/include/linux/netfilter/xt_SECMARK.h
HDRINST usr/include/linux/netfilter/xt_length.h
HDRINST usr/include/linux/netfilter/nfnetlink_cthelper.h
HDRINST usr/include/linux/netfilter/xt_quota.h
HDRINST usr/include/linux/netfilter/xt_CLASSIFY.h
HDRINST usr/include/linux/netfilter/xt_ipcomp.h
HDRINST usr/include/linux/netfilter/xt_iprange.h
HDRINST usr/include/linux/netfilter/xt_bpf.h
HDRINST usr/include/linux/netfilter/xt_LOG.h
HDRINST usr/include/linux/netfilter/xt_rateest.h
HDRINST usr/include/linux/netfilter/xt_CONNSECMARK.h
HDRINST usr/include/linux/netfilter/xt_HMARK.h
HDRINST usr/include/linux/netfilter/xt_CONNMARK.h
HDRINST usr/include/linux/netfilter/xt_pkttype.h
HDRINST usr/include/linux/netfilter/xt_ipvs.h
HDRINST usr/include/linux/netfilter/xt_devgroup.h
HDRINST usr/include/linux/netfilter/xt_AUDIT.h
HDRINST usr/include/linux/netfilter/xt_realm.h
HDRINST usr/include/linux/netfilter/nf_conntrack_common.h
HDRINST usr/include/linux/netfilter/xt_set.h
HDRINST usr/include/linux/netfilter/xt_LED.h
HDRINST usr/include/linux/netfilter/xt_connlabel.h
HDRINST usr/include/linux/netfilter/xt_owner.h
HDRINST usr/include/linux/netfilter/xt_dccp.h
HDRINST usr/include/linux/netfilter/xt_limit.h
HDRINST usr/include/linux/netfilter/xt_conntrack.h
HDRINST usr/include/linux/netfilter/xt_TEE.h
HDRINST usr/include/linux/netfilter/xt_RATEEST.h
HDRINST usr/include/linux/netfilter/xt_connlimit.h
HDRINST usr/include/linux/netfilter/ipset/ip_set.h
HDRINST usr/include/linux/netfilter/ipset/ip_set_list.h
HDRINST usr/include/linux/netfilter/ipset/ip_set_hash.h
HDRINST usr/include/linux/netfilter/x_tables.h
HDRINST usr/include/linux/netfilter/ipset/ip_set_bitmap.h
HDRINST usr/include/linux/netfilter/xt_dscp.h
HDRINST usr/include/linux/netfilter/nf_conntrack_ftp.h
HDRINST usr/include/linux/netfilter/xt_cluster.h
HDRINST usr/include/linux/netfilter/nf_conntrack_tuple_common.h
HDRINST usr/include/linux/netfilter/nf_log.h
HDRINST usr/include/linux/netfilter/xt_tcpmss.h
HDRINST usr/include/linux/netfilter/xt_NFLOG.h
HDRINST usr/include/linux/netfilter/xt_l2tp.h
HDRINST usr/include/linux/netfilter/xt_helper.h
HDRINST usr/include/linux/netfilter/xt_statistic.h
HDRINST usr/include/linux/netfilter/nfnetlink_queue.h
HDRINST usr/include/linux/netfilter/nfnetlink_cttimeout.h
HDRINST usr/include/linux/netfilter/xt_CT.h
HDRINST usr/include/linux/netfilter/xt_CHECKSUM.h
HDRINST usr/include/linux/netfilter/xt_connbytes.h
HDRINST usr/include/linux/netfilter/xt_state.h
HDRINST usr/include/linux/netfilter/nf_tables.h
HDRINST usr/include/linux/netfilter/xt_mark.h
HDRINST usr/include/linux/netfilter/xt_cpu.h
HDRINST usr/include/linux/netfilter/nf_tables_compat.h
HDRINST usr/include/linux/netfilter/xt_physdev.h
HDRINST usr/include/linux/netfilter/nfnetlink_conntrack.h
HDRINST usr/include/linux/netfilter/nfnetlink_acct.h
HDRINST usr/include/linux/netfilter/xt_TCPMSS.h
HDRINST usr/include/linux/tty_flags.h
HDRINST usr/include/linux/if_phonet.h
HDRINST usr/include/linux/elf-em.h
HDRINST usr/include/linux/vm_sockets.h
HDRINST usr/include/linux/dlmconstants.h
HDRINST usr/include/linux/bsg.h
HDRINST usr/include/linux/matroxfb.h
HDRINST usr/include/linux/sysctl.h
HDRINST usr/include/linux/unix_diag.h
HDRINST usr/include/linux/pcitest.h
HDRINST usr/include/linux/mman.h
HDRINST usr/include/linux/if_plip.h
HDRINST usr/include/linux/virtio_balloon.h
HDRINST usr/include/linux/pidfd.h
HDRINST usr/include/linux/f2fs.h
HDRINST usr/include/linux/x25.h
HDRINST usr/include/linux/if_cablemodem.h
HDRINST usr/include/linux/utsname.h
HDRINST usr/include/linux/counter.h
HDRINST usr/include/linux/atm_tcp.h
HDRINST usr/include/linux/atalk.h
HDRINST usr/include/linux/virtio_rng.h
HDRINST usr/include/linux/vboxguest.h
HDRINST usr/include/linux/bpf_perf_event.h
HDRINST usr/include/linux/ipmi_ssif_bmc.h
HDRINST usr/include/linux/nfs_mount.h
HDRINST usr/include/linux/sonet.h
HDRINST usr/include/linux/netfilter.h
HDRINST usr/include/linux/keyctl.h
HDRINST usr/include/linux/nl80211.h
HDRINST usr/include/linux/misc/bcm_vk.h
HDRINST usr/include/linux/audit.h
HDRINST usr/include/linux/tipc_config.h
HDRINST usr/include/linux/tipc_sockets_diag.h
HDRINST usr/include/linux/futex.h
HDRINST usr/include/linux/sev-guest.h
HDRINST usr/include/linux/ublk_cmd.h
HDRINST usr/include/linux/types.h
HDRINST usr/include/linux/virtio_input.h
HDRINST usr/include/linux/if_slip.h
HDRINST usr/include/linux/personality.h
HDRINST usr/include/linux/openat2.h
HDRINST usr/include/linux/poll.h
HDRINST usr/include/linux/posix_acl.h
HDRINST usr/include/linux/smc_diag.h
HDRINST usr/include/linux/snmp.h
HDRINST usr/include/linux/errqueue.h
HDRINST usr/include/linux/if_tunnel.h
HDRINST usr/include/linux/fanotify.h
HDRINST usr/include/linux/kernel.h
HDRINST usr/include/linux/rtnetlink.h
HDRINST usr/include/linux/rpl.h
HDRINST usr/include/linux/memfd.h
HDRINST usr/include/linux/serial_core.h
HDRINST usr/include/linux/dns_resolver.h
HDRINST usr/include/linux/pr.h
HDRINST usr/include/linux/atm_eni.h
HDRINST usr/include/linux/lp.h
HDRINST usr/include/linux/virtio_mem.h
HDRINST usr/include/linux/ultrasound.h
HDRINST usr/include/linux/sctp.h
HDRINST usr/include/linux/uio.h
HDRINST usr/include/linux/tcp_metrics.h
HDRINST usr/include/linux/wwan.h
HDRINST usr/include/linux/atmbr2684.h
HDRINST usr/include/linux/in_route.h
HDRINST usr/include/linux/qemu_fw_cfg.h
HDRINST usr/include/linux/if_macsec.h
HDRINST usr/include/linux/usb/charger.h
HDRINST usr/include/linux/usb/g_uvc.h
HDRINST usr/include/linux/usb/gadgetfs.h
HDRINST usr/include/linux/usb/raw_gadget.h
HDRINST usr/include/linux/usb/cdc-wdm.h
HDRINST usr/include/linux/usb/g_printer.h
HDRINST usr/include/linux/usb/midi.h
HDRINST usr/include/linux/usb/tmc.h
HDRINST usr/include/linux/usb/video.h
HDRINST usr/include/linux/usb/functionfs.h
HDRINST usr/include/linux/usb/audio.h
HDRINST usr/include/linux/usb/ch11.h
HDRINST usr/include/linux/usb/ch9.h
HDRINST usr/include/linux/usb/cdc.h
HDRINST usr/include/linux/jffs2.h
HDRINST usr/include/linux/ax25.h
HDRINST usr/include/linux/auto_fs.h
HDRINST usr/include/linux/tiocl.h
HDRINST usr/include/linux/scc.h
HDRINST usr/include/linux/psci.h
HDRINST usr/include/linux/swab.h
HDRINST usr/include/linux/cec.h
HDRINST usr/include/linux/kfd_ioctl.h
HDRINST usr/include/linux/smc.h
HDRINST usr/include/linux/qrtr.h
HDRINST usr/include/linux/screen_info.h
HDRINST usr/include/linux/nfsacl.h
HDRINST usr/include/linux/seg6_hmac.h
HDRINST usr/include/linux/gameport.h
HDRINST usr/include/linux/wireless.h
HDRINST usr/include/linux/fdreg.h
HDRINST usr/include/linux/cciss_defs.h
HDRINST usr/include/linux/serial_reg.h
HDRINST usr/include/linux/perf_event.h
HDRINST usr/include/linux/in6.h
HDRINST usr/include/linux/hid.h
HDRINST usr/include/linux/netlink.h
HDRINST usr/include/linux/fuse.h
HDRINST usr/include/linux/magic.h
HDRINST usr/include/linux/ioam6_iptunnel.h
HDRINST usr/include/linux/stm.h
HDRINST usr/include/linux/vsockmon.h
HDRINST usr/include/linux/seg6.h
HDRINST usr/include/linux/idxd.h
HDRINST usr/include/linux/nitro_enclaves.h
HDRINST usr/include/linux/ptrace.h
HDRINST usr/include/linux/ioam6_genl.h
HDRINST usr/include/linux/qnx4_fs.h
HDRINST usr/include/linux/fsl_mc.h
HDRINST usr/include/linux/net_tstamp.h
HDRINST usr/include/linux/msg.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_TTL.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ttl.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ah.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ECN.h
HDRINST usr/include/linux/netfilter_ipv4/ip_tables.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ecn.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_CLUSTERIP.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_REJECT.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_LOG.h
HDRINST usr/include/linux/sem.h
HDRINST usr/include/linux/net_namespace.h
HDRINST usr/include/linux/radeonfb.h
HDRINST usr/include/linux/tee.h
HDRINST usr/include/linux/udp.h
HDRINST usr/include/linux/virtio_bt.h
HDRINST usr/include/linux/v4l2-subdev.h
HDRINST usr/include/linux/posix_acl_xattr.h
HDRINST usr/include/linux/v4l2-mediabus.h
HDRINST usr/include/linux/atmapi.h
HDRINST usr/include/linux/raid/md_p.h
HDRINST usr/include/linux/raid/md_u.h
HDRINST usr/include/linux/zorro_ids.h
HDRINST usr/include/linux/nbd.h
HDRINST usr/include/linux/isst_if.h
HDRINST usr/include/linux/rxrpc.h
HDRINST usr/include/linux/unistd.h
HDRINST usr/include/linux/if_arp.h
HDRINST usr/include/linux/atm_zatm.h
HDRINST usr/include/linux/io_uring.h
HDRINST usr/include/linux/if_fddi.h
HDRINST usr/include/linux/bpqether.h
HDRINST usr/include/linux/sysinfo.h
HDRINST usr/include/linux/auto_dev-ioctl.h
HDRINST usr/include/linux/nfs4_mount.h
HDRINST usr/include/linux/keyboard.h
HDRINST usr/include/linux/virtio_mmio.h
HDRINST usr/include/linux/input.h
HDRINST usr/include/linux/qnxtypes.h
HDRINST usr/include/linux/mdio.h
HDRINST usr/include/linux/lwtunnel.h
HDRINST usr/include/linux/gfs2_ondisk.h
HDRINST usr/include/linux/nfs4.h
HDRINST usr/include/linux/ptp_clock.h
HDRINST usr/include/linux/nubus.h
HDRINST usr/include/linux/if_bonding.h
HDRINST usr/include/linux/kcov.h
HDRINST usr/include/linux/fadvise.h
HDRINST usr/include/linux/taskstats.h
HDRINST usr/include/linux/veth.h
HDRINST usr/include/linux/atm.h
HDRINST usr/include/linux/ipmi.h
HDRINST usr/include/linux/kdev_t.h
HDRINST usr/include/linux/mount.h
HDRINST usr/include/linux/shm.h
HDRINST usr/include/linux/resource.h
HDRINST usr/include/linux/prctl.h
HDRINST usr/include/linux/watch_queue.h
HDRINST usr/include/linux/sched.h
HDRINST usr/include/linux/phonet.h
HDRINST usr/include/linux/random.h
HDRINST usr/include/linux/tty.h
HDRINST usr/include/linux/apm_bios.h
HDRINST usr/include/linux/fd.h
HDRINST usr/include/linux/um_timetravel.h
HDRINST usr/include/linux/tls.h
HDRINST usr/include/linux/rpmsg_types.h
HDRINST usr/include/linux/pfrut.h
HDRINST usr/include/linux/mei.h
HDRINST usr/include/linux/fsi.h
HDRINST usr/include/linux/rds.h
HDRINST usr/include/linux/if_x25.h
HDRINST usr/include/linux/param.h
HDRINST usr/include/linux/netdevice.h
HDRINST usr/include/linux/binfmts.h
HDRINST usr/include/linux/if_pppox.h
HDRINST usr/include/linux/sockios.h
HDRINST usr/include/linux/kcm.h
HDRINST usr/include/linux/virtio_9p.h
HDRINST usr/include/linux/genwqe/genwqe_card.h
HDRINST usr/include/linux/if_tun.h
HDRINST usr/include/linux/if_ether.h
HDRINST usr/include/linux/kvm_para.h
HDRINST usr/include/linux/kernel-page-flags.h
HDRINST usr/include/linux/cdrom.h
HDRINST usr/include/linux/un.h
HDRINST usr/include/linux/module.h
HDRINST usr/include/linux/mqueue.h
HDRINST usr/include/linux/a.out.h
HDRINST usr/include/linux/input-event-codes.h
HDRINST usr/include/linux/rio_mport_cdev.h
HDRINST usr/include/linux/coda.h
HDRINST usr/include/linux/ipsec.h
HDRINST usr/include/linux/blkpg.h
HDRINST usr/include/linux/blkzoned.h
HDRINST usr/include/linux/netfilter_bridge/ebt_arpreply.h
HDRINST usr/include/linux/netfilter_bridge/ebt_redirect.h
HDRINST usr/include/linux/netfilter_bridge/ebt_nflog.h
HDRINST usr/include/linux/netfilter_bridge/ebt_802_3.h
HDRINST usr/include/linux/netfilter_bridge/ebt_nat.h
HDRINST usr/include/linux/netfilter_bridge/ebt_mark_m.h
HDRINST usr/include/linux/netfilter_bridge/ebtables.h
HDRINST usr/include/linux/netfilter_bridge/ebt_vlan.h
HDRINST usr/include/linux/netfilter_bridge/ebt_limit.h
HDRINST usr/include/linux/netfilter_bridge/ebt_log.h
HDRINST usr/include/linux/netfilter_bridge/ebt_stp.h
HDRINST usr/include/linux/netfilter_bridge/ebt_pkttype.h
HDRINST usr/include/linux/netfilter_bridge/ebt_ip.h
HDRINST usr/include/linux/netfilter_bridge/ebt_ip6.h
HDRINST usr/include/linux/netfilter_bridge/ebt_arp.h
HDRINST usr/include/linux/netfilter_bridge/ebt_mark_t.h
HDRINST usr/include/linux/netfilter_bridge/ebt_among.h
HDRINST usr/include/linux/reiserfs_fs.h
HDRINST usr/include/linux/cciss_ioctl.h
HDRINST usr/include/linux/fsmap.h
HDRINST usr/include/linux/smiapp.h
HDRINST usr/include/linux/switchtec_ioctl.h
HDRINST usr/include/linux/atmdev.h
HDRINST usr/include/linux/hpet.h
HDRINST usr/include/linux/virtio_config.h
HDRINST usr/include/linux/string.h
HDRINST usr/include/linux/kfd_sysfs.h
HDRINST usr/include/linux/inet_diag.h
HDRINST usr/include/linux/netdev.h
HDRINST usr/include/linux/xattr.h
HDRINST usr/include/linux/iommufd.h
HDRINST usr/include/linux/errno.h
HDRINST usr/include/linux/icmp.h
HDRINST usr/include/linux/i2o-dev.h
HDRINST usr/include/linux/pg.h
HDRINST usr/include/linux/if_bridge.h
HDRINST usr/include/linux/thermal.h
HDRINST usr/include/linux/uinput.h
HDRINST usr/include/linux/dqblk_xfs.h
HDRINST usr/include/linux/v4l2-common.h
HDRINST usr/include/linux/nvram.h
HDRINST usr/include/linux/if_vlan.h
HDRINST usr/include/linux/uhid.h
HDRINST usr/include/linux/omap3isp.h
HDRINST usr/include/linux/rose.h
HDRINST usr/include/linux/phantom.h
HDRINST usr/include/linux/ipmi_msgdefs.h
HDRINST usr/include/linux/bcm933xx_hcs.h
HDRINST usr/include/linux/bpf.h
HDRINST usr/include/linux/mempolicy.h
HDRINST usr/include/linux/efs_fs_sb.h
HDRINST usr/include/linux/nexthop.h
HDRINST usr/include/linux/net_dropmon.h
HDRINST usr/include/linux/surface_aggregator/cdev.h
HDRINST usr/include/linux/surface_aggregator/dtx.h
HDRINST usr/include/linux/net.h
HDRINST usr/include/linux/mii.h
HDRINST usr/include/linux/cm4000_cs.h
HDRINST usr/include/linux/virtio_pcidev.h
HDRINST usr/include/linux/termios.h
HDRINST usr/include/linux/cgroupstats.h
HDRINST usr/include/linux/mpls.h
HDRINST usr/include/linux/iommu.h
HDRINST usr/include/linux/toshiba.h
HDRINST usr/include/linux/virtio_scsi.h
HDRINST usr/include/linux/zorro.h
HDRINST usr/include/linux/chio.h
HDRINST usr/include/linux/pkt_sched.h
HDRINST usr/include/linux/cramfs_fs.h
HDRINST usr/include/linux/vfio_ccw.h
HDRINST usr/include/linux/nfs3.h
HDRINST usr/include/linux/atm_nicstar.h
HDRINST usr/include/linux/ncsi.h
HDRINST usr/include/linux/virtio_net.h
HDRINST usr/include/linux/ioctl.h
HDRINST usr/include/linux/stddef.h
HDRINST usr/include/linux/limits.h
HDRINST usr/include/linux/ipmi_bmc.h
HDRINST usr/include/linux/netfilter_arp.h
HDRINST usr/include/linux/if_addr.h
HDRINST usr/include/linux/rpmsg.h
HDRINST usr/include/linux/media-bus-format.h
HDRINST usr/include/linux/kernelcapi.h
HDRINST usr/include/linux/ppp_defs.h
HDRINST usr/include/linux/ethtool.h
HDRINST usr/include/linux/aspeed-video.h
HDRINST usr/include/linux/hdlc.h
HDRINST usr/include/linux/fscrypt.h
HDRINST usr/include/linux/batadv_packet.h
HDRINST usr/include/linux/uuid.h
HDRINST usr/include/linux/capi.h
HDRINST usr/include/linux/mptcp.h
HDRINST usr/include/linux/hidraw.h
HDRINST usr/include/linux/virtio_console.h
HDRINST usr/include/linux/irqnr.h
HDRINST usr/include/linux/coresight-stm.h
HDRINST usr/include/linux/cxl_mem.h
HDRINST usr/include/linux/iso_fs.h
HDRINST usr/include/linux/virtio_blk.h
HDRINST usr/include/linux/udf_fs_i.h
HDRINST usr/include/linux/coff.h
HDRINST usr/include/linux/dma-buf.h
HDRINST usr/include/linux/ife.h
HDRINST usr/include/linux/agpgart.h
HDRINST usr/include/linux/socket.h
HDRINST usr/include/linux/nilfs2_ondisk.h
HDRINST usr/include/linux/connector.h
HDRINST usr/include/linux/auto_fs4.h
HDRINST usr/include/linux/bt-bmc.h
HDRINST usr/include/linux/map_to_7segment.h
HDRINST usr/include/linux/tc_act/tc_skbedit.h
HDRINST usr/include/linux/tc_act/tc_ctinfo.h
HDRINST usr/include/linux/tc_act/tc_defact.h
HDRINST usr/include/linux/tc_act/tc_gact.h
HDRINST usr/include/linux/tc_act/tc_vlan.h
HDRINST usr/include/linux/tc_act/tc_skbmod.h
HDRINST usr/include/linux/tc_act/tc_sample.h
HDRINST usr/include/linux/tc_act/tc_tunnel_key.h
HDRINST usr/include/linux/tc_act/tc_gate.h
HDRINST usr/include/linux/tc_act/tc_mirred.h
HDRINST usr/include/linux/tc_act/tc_nat.h
HDRINST usr/include/linux/tc_act/tc_csum.h
HDRINST usr/include/linux/tc_act/tc_connmark.h
HDRINST usr/include/linux/tc_act/tc_ife.h
HDRINST usr/include/linux/tc_act/tc_mpls.h
HDRINST usr/include/linux/tc_act/tc_ct.h
HDRINST usr/include/linux/tc_act/tc_pedit.h
HDRINST usr/include/linux/tc_act/tc_bpf.h
HDRINST usr/include/linux/tc_act/tc_ipt.h
HDRINST usr/include/linux/netrom.h
HDRINST usr/include/linux/joystick.h
HDRINST usr/include/linux/falloc.h
LD /kernel/build64/tools/objtool/libsubcmd/libsubcmd-in.o
HDRINST usr/include/linux/cycx_cfm.h
HDRINST usr/include/linux/omapfb.h
HDRINST usr/include/linux/msdos_fs.h
HDRINST usr/include/linux/virtio_types.h
HDRINST usr/include/linux/mroute.h
HDRINST usr/include/linux/psample.h
HDRINST usr/include/linux/ipv6.h
HDRINST usr/include/linux/dw100.h
HDRINST usr/include/linux/psp-sev.h
HDRINST usr/include/linux/vfio.h
HDRINST usr/include/linux/if_ppp.h
HDRINST usr/include/linux/byteorder/big_endian.h
HDRINST usr/include/linux/byteorder/little_endian.h
HDRINST usr/include/linux/comedi.h
HDRINST usr/include/linux/scif_ioctl.h
HDRINST usr/include/linux/timerfd.h
HDRINST usr/include/linux/time_types.h
HDRINST usr/include/linux/firewire-constants.h
HDRINST usr/include/linux/virtio_snd.h
HDRINST usr/include/linux/ppp-ioctl.h
HDRINST usr/include/linux/fib_rules.h
HDRINST usr/include/linux/gen_stats.h
HDRINST usr/include/linux/virtio_iommu.h
HDRINST usr/include/linux/genetlink.h
HDRINST usr/include/linux/uvcvideo.h
HDRINST usr/include/linux/pfkeyv2.h
HDRINST usr/include/linux/soundcard.h
AR /kernel/build64/tools/objtool/libsubcmd/libsubcmd.a
HDRINST usr/include/linux/times.h
HDRINST usr/include/linux/nfc.h
HDRINST usr/include/linux/affs_hardblocks.h
HDRINST usr/include/linux/nilfs2_api.h
HDRINST usr/include/linux/rseq.h
HDRINST usr/include/linux/caif/caif_socket.h
HDRINST usr/include/linux/caif/if_caif.h
HDRINST usr/include/linux/i2c-dev.h
HDRINST usr/include/linux/cuda.h
HDRINST usr/include/linux/cn_proc.h
HDRINST usr/include/linux/parport.h
HDRINST usr/include/linux/v4l2-controls.h
HDRINST usr/include/linux/hsi/cs-protocol.h
HDRINST usr/include/linux/hsi/hsi_char.h
HDRINST usr/include/linux/seg6_genl.h
HDRINST usr/include/linux/am437x-vpfe.h
HDRINST usr/include/linux/amt.h
HDRINST usr/include/linux/netconf.h
HDRINST usr/include/linux/erspan.h
HDRINST usr/include/linux/nsfs.h
HDRINST usr/include/linux/xilinx-v4l2-controls.h
HDRINST usr/include/linux/aspeed-p2a-ctrl.h
HDRINST usr/include/linux/vfio_zdev.h
HDRINST usr/include/linux/serio.h
HDRINST usr/include/linux/acrn.h
HDRINST usr/include/linux/nfs2.h
HDRINST usr/include/linux/virtio_pci.h
HDRINST usr/include/linux/ipc.h
HDRINST usr/include/linux/ethtool_netlink.h
HDRINST usr/include/linux/kd.h
HDRINST usr/include/linux/elf.h
HDRINST usr/include/linux/videodev2.h
HDRINST usr/include/linux/if_alg.h
HDRINST usr/include/linux/sonypi.h
HDRINST usr/include/linux/fsverity.h
HDRINST usr/include/linux/if.h
HDRINST usr/include/linux/btrfs.h
HDRINST usr/include/linux/vm_sockets_diag.h
HDRINST usr/include/linux/netfilter_bridge.h
HDRINST usr/include/linux/packet_diag.h
HDRINST usr/include/linux/netfilter_ipv4.h
HDRINST usr/include/linux/kvm.h
HDRINST usr/include/linux/pci.h
HDRINST usr/include/linux/if_addrlabel.h
HDRINST usr/include/linux/hdlcdrv.h
HDRINST usr/include/linux/cfm_bridge.h
HDRINST usr/include/linux/fiemap.h
HDRINST usr/include/linux/dm-ioctl.h
HDRINST usr/include/linux/aspeed-lpc-ctrl.h
HDRINST usr/include/linux/atmioc.h
HDRINST usr/include/linux/dlm.h
HDRINST usr/include/linux/pci_regs.h
HDRINST usr/include/linux/cachefiles.h
HDRINST usr/include/linux/membarrier.h
HDRINST usr/include/linux/nfs_idmap.h
HDRINST usr/include/linux/ip.h
HDRINST usr/include/linux/atm_he.h
HDRINST usr/include/linux/nfsd/export.h
HDRINST usr/include/linux/nfsd/stats.h
HDRINST usr/include/linux/nfsd/debug.h
HDRINST usr/include/linux/nfsd/cld.h
HDRINST usr/include/linux/ip_vs.h
HDRINST usr/include/linux/vmcore.h
HDRINST usr/include/linux/vbox_vmmdev_types.h
CC /kernel/build64/tools/objtool/weak.o
HDRINST usr/include/linux/dvb/osd.h
HDRINST usr/include/linux/dvb/dmx.h
CC /kernel/build64/tools/objtool/check.o
MKDIR /kernel/build64/tools/objtool/arch/x86/
CC /kernel/build64/tools/objtool/special.o
HDRINST usr/include/linux/dvb/net.h
HDRINST usr/include/linux/dvb/frontend.h
CC /kernel/build64/tools/objtool/builtin-check.o
MKDIR /kernel/build64/tools/objtool/arch/x86/lib/
HDRINST usr/include/linux/dvb/ca.h
CC /kernel/build64/tools/objtool/elf.o
HDRINST usr/include/linux/dvb/version.h
CC /kernel/build64/tools/objtool/objtool.o
HDRINST usr/include/linux/dvb/video.h
CC /kernel/build64/tools/objtool/arch/x86/special.o
HDRINST usr/include/linux/dvb/audio.h
CC /kernel/build64/tools/objtool/orc_gen.o
HDRINST usr/include/linux/nfs.h
GEN /kernel/build64/tools/objtool/arch/x86/lib/inat-tables.c
HDRINST usr/include/linux/if_link.h
CC /kernel/build64/tools/objtool/orc_dump.o
HDRINST usr/include/linux/wait.h
HDRINST usr/include/linux/icmpv6.h
CC /kernel/build64/tools/objtool/libstring.o
CC /kernel/build64/tools/objtool/libctype.o
HDRINST usr/include/linux/media.h
HDRINST usr/include/linux/seg6_local.h
CC /kernel/build64/tools/objtool/str_error_r.o
HDRINST usr/include/linux/openvswitch.h
HDRINST usr/include/linux/atmsap.h
CC /kernel/build64/tools/objtool/librbtree.o
HDRINST usr/include/linux/bpfilter.h
HDRINST usr/include/linux/fpga-dfl.h
HDRINST usr/include/linux/userio.h
HDRINST usr/include/linux/signal.h
HDRINST usr/include/linux/map_to_14segment.h
HDRINST usr/include/linux/hdreg.h
HDRINST usr/include/linux/utime.h
HDRINST usr/include/linux/usbdevice_fs.h
HDRINST usr/include/linux/timex.h
HDRINST usr/include/linux/if_fc.h
HDRINST usr/include/linux/reiserfs_xattr.h
HDRINST usr/include/linux/hw_breakpoint.h
HDRINST usr/include/linux/quota.h
HDRINST usr/include/linux/ioprio.h
HDRINST usr/include/linux/eventpoll.h
HDRINST usr/include/linux/atmclip.h
HDRINST usr/include/linux/can.h
HDRINST usr/include/linux/if_team.h
HDRINST usr/include/linux/usbip.h
HDRINST usr/include/linux/stat.h
HDRINST usr/include/linux/fou.h
HDRINST usr/include/linux/hash_info.h
HDRINST usr/include/linux/ppp-comp.h
HDRINST usr/include/linux/ip6_tunnel.h
HDRINST usr/include/linux/tipc_netlink.h
HDRINST usr/include/linux/in.h
HDRINST usr/include/linux/wireguard.h
HDRINST usr/include/linux/btf.h
HDRINST usr/include/linux/batman_adv.h
HDRINST usr/include/linux/fcntl.h
HDRINST usr/include/linux/if_ltalk.h
HDRINST usr/include/linux/i2c.h
HDRINST usr/include/linux/atm_idt77105.h
HDRINST usr/include/linux/kexec.h
HDRINST usr/include/linux/arm_sdei.h
HDRINST usr/include/linux/netfilter_ipv6/ip6_tables.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_ah.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_NPT.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_rt.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_REJECT.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_opts.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_srh.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_LOG.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_mh.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_HL.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_hl.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_frag.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_ipv6header.h
HDRINST usr/include/linux/minix_fs.h
HDRINST usr/include/linux/aio_abi.h
HDRINST usr/include/linux/pktcdvd.h
HDRINST usr/include/linux/libc-compat.h
HDRINST usr/include/linux/atmlec.h
HDRINST usr/include/linux/signalfd.h
HDRINST usr/include/linux/bpf_common.h
HDRINST usr/include/linux/seg6_iptunnel.h
HDRINST usr/include/linux/synclink.h
HDRINST usr/include/linux/mpls_iptunnel.h
HDRINST usr/include/linux/mctp.h
HDRINST usr/include/linux/if_xdp.h
HDRINST usr/include/linux/llc.h
HDRINST usr/include/linux/atmsvc.h
CC /kernel/build64/tools/objtool/arch/x86/decode.o
HDRINST usr/include/linux/sed-opal.h
HDRINST usr/include/linux/sock_diag.h
HDRINST usr/include/linux/time.h
HDRINST usr/include/linux/securebits.h
HDRINST usr/include/linux/fsl_hypervisor.h
HDRINST usr/include/linux/if_hippi.h
HDRINST usr/include/linux/dlm_netlink.h
HDRINST usr/include/linux/seccomp.h
HDRINST usr/include/linux/oom.h
HDRINST usr/include/linux/filter.h
HDRINST usr/include/linux/inotify.h
HDRINST usr/include/linux/rfkill.h
HDRINST usr/include/linux/reboot.h
HDRINST usr/include/linux/can/vxcan.h
HDRINST usr/include/linux/can/j1939.h
HDRINST usr/include/linux/can/netlink.h
HDRINST usr/include/linux/can/bcm.h
HDRINST usr/include/linux/can/raw.h
HDRINST usr/include/linux/can/gw.h
HDRINST usr/include/linux/can/error.h
HDRINST usr/include/linux/can/isotp.h
HDRINST usr/include/linux/if_eql.h
HDRINST usr/include/linux/hiddev.h
HDRINST usr/include/linux/blktrace_api.h
HDRINST usr/include/linux/ccs.h
HDRINST usr/include/linux/ioam6.h
HDRINST usr/include/linux/hsr_netlink.h
HDRINST usr/include/linux/mmc/ioctl.h
HDRINST usr/include/linux/bfs_fs.h
HDRINST usr/include/linux/rio_cm_cdev.h
HDRINST usr/include/linux/uleds.h
HDRINST usr/include/linux/mrp_bridge.h
HDRINST usr/include/linux/adb.h
HDRINST usr/include/linux/pmu.h
HDRINST usr/include/linux/udmabuf.h
HDRINST usr/include/linux/kcmp.h
HDRINST usr/include/linux/dma-heap.h
HDRINST usr/include/linux/userfaultfd.h
HDRINST usr/include/linux/netfilter_arp/arpt_mangle.h
HDRINST usr/include/linux/netfilter_arp/arp_tables.h
HDRINST usr/include/linux/tipc.h
HDRINST usr/include/linux/virtio_ids.h
HDRINST usr/include/linux/l2tp.h
HDRINST usr/include/linux/devlink.h
HDRINST usr/include/linux/virtio_gpio.h
HDRINST usr/include/linux/dcbnl.h
HDRINST usr/include/linux/cyclades.h
HDRINST usr/include/sound/intel/avs/tokens.h
HDRINST usr/include/sound/sof/fw.h
HDRINST usr/include/sound/sof/abi.h
HDRINST usr/include/sound/sof/tokens.h
HDRINST usr/include/sound/sof/header.h
HDRINST usr/include/sound/usb_stream.h
HDRINST usr/include/sound/sfnt_info.h
HDRINST usr/include/sound/asequencer.h
HDRINST usr/include/sound/tlv.h
HDRINST usr/include/sound/asound.h
HDRINST usr/include/sound/asoc.h
HDRINST usr/include/sound/sb16_csp.h
HDRINST usr/include/sound/compress_offload.h
HDRINST usr/include/sound/hdsp.h
HDRINST usr/include/sound/emu10k1.h
HDRINST usr/include/sound/snd_ar_tokens.h
HDRINST usr/include/sound/snd_sst_tokens.h
HDRINST usr/include/sound/asound_fm.h
HDRINST usr/include/sound/hdspm.h
HDRINST usr/include/sound/compress_params.h
HDRINST usr/include/sound/firewire.h
HDRINST usr/include/sound/skl-tplg-interface.h
HDRINST usr/include/scsi/scsi_bsg_ufs.h
HDRINST usr/include/scsi/scsi_netlink_fc.h
HDRINST usr/include/scsi/scsi_bsg_mpi3mr.h
HDRINST usr/include/scsi/fc/fc_ns.h
HDRINST usr/include/scsi/fc/fc_fs.h
HDRINST usr/include/scsi/fc/fc_els.h
HDRINST usr/include/scsi/fc/fc_gs.h
HDRINST usr/include/scsi/scsi_bsg_fc.h
HDRINST usr/include/scsi/cxlflash_ioctl.h
HDRINST usr/include/scsi/scsi_netlink.h
HDRINST usr/include/linux/version.h
HDRINST usr/include/asm/processor-flags.h
HDRINST usr/include/asm/auxvec.h
HDRINST usr/include/asm/svm.h
HDRINST usr/include/asm/bitsperlong.h
HDRINST usr/include/asm/kvm_perf.h
HDRINST usr/include/asm/mce.h
HDRINST usr/include/asm/posix_types.h
HDRINST usr/include/asm/msr.h
HDRINST usr/include/asm/sigcontext32.h
HDRINST usr/include/asm/mman.h
HDRINST usr/include/asm/shmbuf.h
HDRINST usr/include/asm/e820.h
HDRINST usr/include/asm/posix_types_64.h
HDRINST usr/include/asm/vsyscall.h
HDRINST usr/include/asm/msgbuf.h
HDRINST usr/include/asm/swab.h
HDRINST usr/include/asm/statfs.h
HDRINST usr/include/asm/posix_types_x32.h
HDRINST usr/include/asm/ptrace.h
HDRINST usr/include/asm/unistd.h
HDRINST usr/include/asm/ist.h
HDRINST usr/include/asm/prctl.h
HDRINST usr/include/asm/boot.h
HDRINST usr/include/asm/sigcontext.h
HDRINST usr/include/asm/posix_types_32.h
HDRINST usr/include/asm/kvm_para.h
HDRINST usr/include/asm/a.out.h
HDRINST usr/include/asm/mtrr.h
HDRINST usr/include/asm/amd_hsmp.h
HDRINST usr/include/asm/hwcap2.h
HDRINST usr/include/asm/ptrace-abi.h
HDRINST usr/include/asm/vm86.h
HDRINST usr/include/asm/vmx.h
HDRINST usr/include/asm/ldt.h
HDRINST usr/include/asm/perf_regs.h
HDRINST usr/include/asm/kvm.h
HDRINST usr/include/asm/debugreg.h
HDRINST usr/include/asm/signal.h
HDRINST usr/include/asm/bootparam.h
HDRINST usr/include/asm/siginfo.h
HDRINST usr/include/asm/hw_breakpoint.h
HDRINST usr/include/asm/stat.h
HDRINST usr/include/asm/setup.h
HDRINST usr/include/asm/sembuf.h
HDRINST usr/include/asm/sgx.h
HDRINST usr/include/asm/ucontext.h
HDRINST usr/include/asm/byteorder.h
HDRINST usr/include/asm/unistd_64.h
HDRINST usr/include/asm/ioctls.h
HDRINST usr/include/asm/bpf_perf_event.h
HDRINST usr/include/asm/types.h
HDRINST usr/include/asm/poll.h
HDRINST usr/include/asm/resource.h
HDRINST usr/include/asm/param.h
HDRINST usr/include/asm/sockios.h
HDRINST usr/include/asm/errno.h
HDRINST usr/include/asm/unistd_x32.h
HDRINST usr/include/asm/termios.h
HDRINST usr/include/asm/ioctl.h
HDRINST usr/include/asm/socket.h
HDRINST usr/include/asm/unistd_32.h
HDRINST usr/include/asm/termbits.h
HDRINST usr/include/asm/fcntl.h
HDRINST usr/include/asm/ipcbuf.h
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 ../include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 ../include/linux/atomic/atomic-instrumented.h
CHKSHA1 ../include/linux/atomic/atomic-long.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
LD /kernel/build64/tools/objtool/arch/x86/objtool-in.o
UPD include/generated/asm-offsets.h
CALL ../scripts/checksyscalls.sh
LD /kernel/build64/tools/objtool/objtool-in.o
LINK /kernel/build64/tools/objtool/objtool
LDS scripts/module.lds
CC ipc/compat.o
CC ipc/util.o
CC ipc/msgutil.o
CC ipc/msg.o
CC ipc/sem.o
HOSTCC usr/gen_init_cpio
CC ipc/shm.o
CC init/main.o
CC ipc/syscall.o
CC security/commoncap.o
AR certs/built-in.a
CC ipc/ipc_sysctl.o
CC security/min_addr.o
CC init/do_mounts.o
CC security/inode.o
CC ipc/mqueue.o
AS arch/x86/lib/clear_page_64.o
UPD init/utsversion-tmp.h
CC ipc/namespace.o
CC arch/x86/lib/cmdline.o
CC init/do_mounts_initrd.o
CC security/device_cgroup.o
CC init/initramfs.o
AS arch/x86/lib/cmpxchg16b_emu.o
CC ipc/mq_sysctl.o
CC block/bdev.o
CC io_uring/io_uring.o
CC arch/x86/power/cpu.o
CC security/keys/gc.o
CC block/fops.o
AR arch/x86/video/built-in.a
CC arch/x86/pci/i386.o
AR virt/lib/built-in.a
CC block/partitions/core.o
CC net/llc/llc_core.o
CC [M] arch/x86/video/fbdev.o
CC net/core/sock.o
CC [M] virt/lib/irqbypass.o
CC arch/x86/realmode/init.o
CC arch/x86/events/amd/core.o
CC arch/x86/mm/pat/set_memory.o
AR sound/drivers/opl3/built-in.a
CC sound/core/seq/seq.o
AR drivers/irqchip/built-in.a
CC fs/notify/dnotify/dnotify.o
AR sound/i2c/other/built-in.a
CC arch/x86/kernel/fpu/init.o
CC lib/kunit/test.o
AR sound/i2c/built-in.a
CC lib/math/div64.o
CC lib/math/gcd.o
AR sound/drivers/opl4/built-in.a
AR drivers/bus/mhi/built-in.a
CC security/keys/key.o
CC arch/x86/entry/vdso/vma.o
AR drivers/bus/built-in.a
AR sound/drivers/mpu401/built-in.a
CC kernel/sched/core.o
CC mm/kasan/common.o
AR sound/drivers/vx/built-in.a
AR drivers/phy/allwinner/built-in.a
CC crypto/api.o
AR sound/drivers/pcsp/built-in.a
AR drivers/phy/amlogic/built-in.a
AR sound/drivers/built-in.a
AR drivers/phy/broadcom/built-in.a
CC lib/math/lcm.o
CC security/keys/keyring.o
CC fs/nfs_common/grace.o
AR drivers/phy/cadence/built-in.a
CC arch/x86/lib/copy_mc.o
AR drivers/phy/freescale/built-in.a
AR drivers/phy/hisilicon/built-in.a
AR drivers/phy/ingenic/built-in.a
CC lib/math/int_pow.o
AR drivers/phy/intel/built-in.a
AR drivers/phy/lantiq/built-in.a
AR drivers/phy/marvell/built-in.a
AR drivers/phy/mediatek/built-in.a
AR drivers/phy/microchip/built-in.a
CC lib/math/int_sqrt.o
AR drivers/phy/motorola/built-in.a
AR drivers/phy/mscc/built-in.a
AR drivers/phy/qualcomm/built-in.a
AR drivers/phy/ralink/built-in.a
AR drivers/phy/renesas/built-in.a
CC lib/math/reciprocal_div.o
GEN usr/initramfs_data.cpio
AR drivers/phy/rockchip/built-in.a
COPY usr/initramfs_inc_data
AS usr/initramfs_data.o
AR drivers/phy/samsung/built-in.a
AR drivers/phy/socionext/built-in.a
AR usr/built-in.a
AR drivers/phy/st/built-in.a
AR drivers/phy/sunplus/built-in.a
AR sound/isa/ad1816a/built-in.a
AR drivers/phy/tegra/built-in.a
AR sound/isa/ad1848/built-in.a
AR drivers/phy/ti/built-in.a
AR sound/isa/cs423x/built-in.a
AR drivers/phy/xilinx/built-in.a
CC drivers/phy/phy-core.o
AR sound/isa/es1688/built-in.a
CC lib/math/rational.o
AS arch/x86/lib/copy_mc_64.o
AR sound/isa/galaxy/built-in.a
AR sound/isa/gus/built-in.a
AS arch/x86/lib/copy_page_64.o
AR sound/isa/msnd/built-in.a
AR drivers/pinctrl/actions/built-in.a
AR sound/isa/opti9xx/built-in.a
AR virt/built-in.a
AS arch/x86/lib/copy_user_64.o
CC net/core/request_sock.o
CC sound/core/seq/seq_lock.o
AR drivers/pinctrl/bcm/built-in.a
AR sound/isa/sb/built-in.a
AR drivers/pinctrl/cirrus/built-in.a
AR sound/isa/wavefront/built-in.a
AR drivers/pinctrl/freescale/built-in.a
AR sound/isa/wss/built-in.a
CC arch/x86/lib/cpu.o
AR sound/isa/built-in.a
CC drivers/pinctrl/intel/pinctrl-baytrail.o
AR drivers/pinctrl/mediatek/built-in.a
CC arch/x86/mm/init.o
CC arch/x86/mm/init_64.o
AR drivers/pinctrl/mvebu/built-in.a
CC arch/x86/power/hibernate_64.o
AR drivers/pinctrl/nomadik/built-in.a
AS arch/x86/power/hibernate_asm_64.o
AS arch/x86/realmode/rm/header.o
AR drivers/pinctrl/nuvoton/built-in.a
AS arch/x86/realmode/rm/trampoline_64.o
CC arch/x86/kernel/fpu/bugs.o
CC drivers/gpio/gpiolib.o
CC arch/x86/power/hibernate.o
AS arch/x86/realmode/rm/stack.o
CC sound/core/seq/seq_clientmgr.o
CC mm/kasan/report.o
CC mm/kasan/init.o
AS arch/x86/realmode/rm/reboot.o
CC mm/kasan/generic.o
AR fs/notify/dnotify/built-in.a
CC mm/kasan/report_generic.o
CC fs/notify/inotify/inotify_fsnotify.o
AS arch/x86/realmode/rm/wakeup_asm.o
CC arch/x86/pci/init.o
CC arch/x86/realmode/rm/wakemain.o
CC fs/notify/inotify/inotify_user.o
CC arch/x86/kernel/fpu/core.o
CC lib/kunit/resource.o
CC [M] lib/math/prime_numbers.o
CC net/llc/llc_input.o
CC arch/x86/realmode/rm/video-mode.o
CC crypto/cipher.o
CC net/llc/llc_output.o
CC arch/x86/entry/vdso/extable.o
CC arch/x86/lib/delay.o
CC fs/iomap/trace.o
AR fs/quota/built-in.a
CC block/partitions/ldm.o
AR fs/nfs_common/built-in.a
CC fs/notify/fanotify/fanotify.o
AS arch/x86/lib/getuser.o
AS arch/x86/realmode/rm/copy.o
CC fs/iomap/iter.o
AS arch/x86/realmode/rm/bioscall.o
CC fs/notify/fanotify/fanotify_user.o
CC arch/x86/realmode/rm/regs.o
CC security/keys/keyctl.o
CC arch/x86/events/amd/lbr.o
CC sound/core/seq/seq_memory.o
CC arch/x86/realmode/rm/video-vga.o
CC arch/x86/realmode/rm/video-vesa.o
CC fs/proc/task_mmu.o
CC sound/core/seq/seq_queue.o
AR drivers/pinctrl/sprd/built-in.a
CC init/calibrate.o
GEN arch/x86/lib/inat-tables.c
CC fs/kernfs/mount.o
CC net/core/skbuff.o
CC mm/filemap.o
CC lib/kunit/static_stub.o
CC arch/x86/realmode/rm/video-bios.o
CC arch/x86/lib/insn-eval.o
CC lib/kunit/string-stream.o
CC mm/mempool.o
CC crypto/compress.o
CC arch/x86/pci/mmconfig_64.o
PASYMS arch/x86/realmode/rm/pasyms.h
AR arch/x86/power/built-in.a
CC mm/oom_kill.o
LDS arch/x86/realmode/rm/realmode.lds
CC mm/fadvise.o
LD arch/x86/realmode/rm/realmode.elf
AR lib/math/built-in.a
RELOCS arch/x86/realmode/rm/realmode.relocs
OBJCOPY arch/x86/realmode/rm/realmode.bin
AS arch/x86/realmode/rmpiggy.o
CC fs/sysfs/file.o
AR drivers/phy/built-in.a
CC fs/notify/fsnotify.o
AR arch/x86/realmode/built-in.a
CC fs/configfs/inode.o
CC mm/kasan/shadow.o
CC arch/x86/kernel/fpu/regset.o
CC fs/configfs/file.o
CC sound/core/seq/seq_fifo.o
CC block/partitions/msdos.o
AR drivers/pwm/built-in.a
CC mm/kasan/quarantine.o
CC arch/x86/entry/vdso/vdso32-setup.o
CC arch/x86/kernel/fpu/signal.o
CC init/init_task.o
CC arch/x86/kernel/fpu/xstate.o
CC arch/x86/mm/pat/memtype.o
CC drivers/pinctrl/intel/pinctrl-intel.o
CC [M] drivers/pinctrl/intel/pinctrl-cherryview.o
CC arch/x86/events/amd/ibs.o
AR net/llc/built-in.a
CC net/ethernet/eth.o
CC crypto/algapi.o
CC crypto/scatterwalk.o
LDS arch/x86/entry/vdso/vdso.lds
AR fs/notify/inotify/built-in.a
AS arch/x86/entry/vdso/vdso-note.o
CC lib/kunit/assert.o
CC drivers/gpio/gpiolib-devres.o
CC fs/configfs/dir.o
CC arch/x86/entry/vdso/vclock_gettime.o
CC net/core/datagram.o
CC fs/iomap/buffered-io.o
CC net/802/p8022.o
CC fs/kernfs/inode.o
CC net/802/psnap.o
CC fs/sysfs/dir.o
CC fs/sysfs/symlink.o
CC arch/x86/pci/direct.o
CC arch/x86/mm/pat/memtype_interval.o
CC fs/iomap/direct-io.o
CC drivers/pci/msi/pcidev_msi.o
CC fs/iomap/fiemap.o
CC drivers/pci/pcie/portdrv.o
CC drivers/pci/hotplug/pci_hotplug_core.o
CC sound/core/seq/seq_prioq.o
CC drivers/pci/pcie/rcec.o
CC fs/notify/notification.o
CC fs/kernfs/dir.o
AR ipc/built-in.a
CC arch/x86/lib/insn.o
CC drivers/pci/pcie/aspm.o
AS arch/x86/lib/memcpy_64.o
CC init/version.o
CC fs/kernfs/file.o
AS arch/x86/lib/memmove_64.o
CC security/keys/permission.o
CC lib/kunit/try-catch.o
AR mm/kasan/built-in.a
CC block/partitions/efi.o
CC mm/maccess.o
CC sound/core/seq/seq_timer.o
CC arch/x86/entry/vdso/vgetcpu.o
CC fs/configfs/symlink.o
CC fs/sysfs/mount.o
HOSTCC arch/x86/entry/vdso/vdso2c
CC fs/sysfs/group.o
AR fs/notify/fanotify/built-in.a
CC security/keys/process_keys.o
AR init/built-in.a
AR drivers/pci/controller/dwc/built-in.a
AR drivers/pci/controller/mobiveil/built-in.a
AR drivers/pci/switch/built-in.a
CC drivers/pci/controller/vmd.o
CC mm/page-writeback.o
CC fs/notify/group.o
AS arch/x86/lib/memset_64.o
CC fs/notify/mark.o
CC arch/x86/lib/misc.o
CC arch/x86/lib/pc-conf-reg.o
CC drivers/pci/msi/api.o
CC fs/proc/inode.o
CC fs/proc/root.o
CC lib/kunit/executor.o
AR arch/x86/mm/pat/built-in.a
CC arch/x86/pci/mmconfig-shared.o
CC arch/x86/mm/fault.o
CC lib/crypto/memneq.o
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
CC arch/x86/events/amd/uncore.o
AS arch/x86/entry/vdso/vdso32/note.o
CC net/802/stp.o
CC lib/crypto/utils.o
CC lib/crypto/chacha.o
CC sound/core/seq/seq_system.o
AS arch/x86/entry/vdso/vdso32/system_call.o
CC block/bio.o
CC sound/core/seq/seq_ports.o
AS arch/x86/lib/putuser.o
AS arch/x86/entry/vdso/vdso32/sigreturn.o
AS arch/x86/lib/retpoline.o
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
CC fs/iomap/seek.o
AR arch/x86/kernel/fpu/built-in.a
CC [M] drivers/pinctrl/intel/pinctrl-broxton.o
CC sound/core/seq/seq_info.o
CC arch/x86/kernel/cpu/mce/core.o
CC arch/x86/lib/usercopy.o
CC arch/x86/kernel/cpu/mce/severity.o
AR net/ethernet/built-in.a
CC fs/configfs/mount.o
CC arch/x86/kernel/cpu/mce/genpool.o
CC arch/x86/kernel/cpu/mtrr/mtrr.o
CC drivers/pci/hotplug/acpi_pcihp.o
CC arch/x86/kernel/cpu/cacheinfo.o
CC crypto/proc.o
CC arch/x86/kernel/cpu/mtrr/if.o
CC net/sched/sch_generic.o
AR fs/sysfs/built-in.a
CC arch/x86/kernel/cpu/mtrr/generic.o
CC [M] drivers/pinctrl/intel/pinctrl-geminilake.o
CC io_uring/xattr.o
CC fs/devpts/inode.o
AR block/partitions/built-in.a
CC security/keys/request_key.o
CC [M] drivers/pinctrl/intel/pinctrl-sunrisepoint.o
CC lib/kunit/hooks.o
CC lib/crypto/aes.o
CC kernel/locking/mutex.o
CC lib/crypto/gf128mul.o
CC drivers/gpio/gpiolib-legacy.o
CC arch/x86/kernel/cpu/mtrr/cleanup.o
CC arch/x86/mm/ioremap.o
CC drivers/pci/pcie/aer.o
CC fs/kernfs/symlink.o
CC drivers/pci/msi/msi.o
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
CC security/keys/request_key_auth.o
CC sound/core/sound.o
CC arch/x86/lib/usercopy_64.o
AR lib/kunit/built-in.a
CC io_uring/nop.o
CC arch/x86/mm/extable.o
CC arch/x86/lib/msr-smp.o
CC fs/configfs/item.o
CC drivers/pci/msi/irqdomain.o
CC crypto/aead.o
CC fs/proc/base.o
VDSO arch/x86/entry/vdso/vdso64.so.dbg
AR drivers/pci/controller/built-in.a
CC fs/proc/generic.o
CC block/elevator.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
CC fs/notify/fdinfo.o
AR net/802/built-in.a
OBJCOPY arch/x86/entry/vdso/vdso64.so
OBJCOPY arch/x86/entry/vdso/vdso32.so
CC arch/x86/kernel/cpu/mce/intel.o
VDSO2C arch/x86/entry/vdso/vdso-image-64.c
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
CC arch/x86/entry/vdso/vdso-image-64.o
AR sound/core/seq/built-in.a
CC arch/x86/pci/fixup.o
CC net/netlink/af_netlink.o
AR net/bpf/built-in.a
CC arch/x86/pci/acpi.o
CC drivers/pci/hotplug/pciehp_core.o
CC net/core/stream.o
CC net/ethtool/ioctl.o
AR arch/x86/events/amd/built-in.a
CC arch/x86/events/intel/core.o
AR drivers/pinctrl/intel/built-in.a
AR drivers/pinctrl/sunplus/built-in.a
CC arch/x86/events/intel/bts.o
AR drivers/pinctrl/ti/built-in.a
CC drivers/pinctrl/core.o
CC fs/iomap/swapfile.o
CC net/ethtool/common.o
CC arch/x86/entry/vdso/vdso-image-32.o
CC drivers/gpio/gpiolib-cdev.o
CC net/netlink/genetlink.o
CC lib/crypto/blake2s.o
CC sound/core/init.o
CC sound/core/memory.o
AR fs/kernfs/built-in.a
AR fs/devpts/built-in.a
CC sound/core/control.o
CC drivers/video/console/dummycon.o
AR fs/configfs/built-in.a
CC arch/x86/lib/cache-smp.o
CC arch/x86/lib/msr.o
CC io_uring/fs.o
AR arch/x86/entry/vdso/built-in.a
CC fs/ext4/balloc.o
CC arch/x86/mm/mmap.o
CC drivers/video/console/vgacon.o
CC arch/x86/entry/vsyscall/vsyscall_64.o
CC security/keys/user_defined.o
AS arch/x86/entry/vsyscall/vsyscall_emu_64.o
CC io_uring/splice.o
CC kernel/sched/fair.o
AR fs/notify/built-in.a
CC drivers/pci/access.o
CC kernel/power/qos.o
CC arch/x86/events/zhaoxin/core.o
CC lib/crypto/blake2s-generic.o
CC crypto/geniv.o
CC arch/x86/events/core.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
CC lib/crypto/blake2s-selftest.o
CC crypto/skcipher.o
AR drivers/pci/msi/built-in.a
CC drivers/pci/hotplug/pciehp_ctrl.o
CC drivers/gpio/gpiolib-sysfs.o
CC arch/x86/kernel/cpu/scattered.o
CC arch/x86/pci/legacy.o
CC kernel/power/main.o
AS arch/x86/lib/msr-reg.o
CC arch/x86/mm/pgtable.o
AR fs/iomap/built-in.a
CC crypto/seqiv.o
CC drivers/pci/pcie/err.o
CC kernel/locking/semaphore.o
CC block/blk-core.o
CC kernel/locking/rwsem.o
CC arch/x86/kernel/cpu/mce/threshold.o
CC arch/x86/events/intel/ds.o
CC kernel/locking/percpu-rwsem.o
CC block/blk-sysfs.o
CC security/keys/compat.o
CC mm/folio-compat.o
CC security/keys/proc.o
CC arch/x86/mm/physaddr.o
CC drivers/pci/pcie/aer_inject.o
CC drivers/pci/hotplug/pciehp_pci.o
CC drivers/gpio/gpiolib-acpi.o
CC fs/proc/array.o
CC arch/x86/lib/msr-reg-export.o
CC fs/proc/fd.o
AR arch/x86/entry/vsyscall/built-in.a
AS arch/x86/entry/entry.o
AS arch/x86/entry/entry_64.o
AS arch/x86/lib/hweight.o
CC io_uring/sync.o
CC arch/x86/lib/iomem.o
CC arch/x86/entry/syscall_64.o
CC arch/x86/pci/irq.o
CC lib/crypto/des.o
AR arch/x86/events/zhaoxin/built-in.a
CC drivers/pinctrl/pinctrl-utils.o
CC arch/x86/entry/common.o
CC drivers/gpio/gpiolib-swnode.o
CC arch/x86/kernel/cpu/mce/apei.o
AS arch/x86/lib/iomap_copy_64.o
CC net/core/scm.o
CC drivers/pci/hotplug/pciehp_hpc.o
AR drivers/video/console/built-in.a
CC [M] net/netfilter/ipvs/ip_vs_conn.o
CC [M] net/netfilter/ipvs/ip_vs_core.o
CC drivers/video/logo/logo.o
CC kernel/power/console.o
HOSTCC drivers/video/logo/pnmtologo
CC net/sched/sch_mq.o
CC net/netfilter/core.o
CC security/keys/sysctl.o
CC drivers/video/backlight/backlight.o
CC net/netfilter/nf_log.o
AS arch/x86/crypto/aesni-intel_asm.o
CC arch/x86/mm/tlb.o
CC [M] net/netfilter/ipvs/ip_vs_ctl.o
CC arch/x86/lib/inat.o
CC [M] net/netfilter/ipvs/ip_vs_sched.o
CC arch/x86/mm/cpu_entry_area.o
CC arch/x86/crypto/aesni-intel_glue.o
CC kernel/power/process.o
CC kernel/power/suspend.o
CC mm/readahead.o
CC crypto/echainiv.o
CC mm/swap.o
CC drivers/pci/pcie/pme.o
LOGO drivers/video/logo/logo_linux_clut224.c
AR arch/x86/lib/built-in.a
AR arch/x86/lib/lib.a
CC drivers/video/logo/logo_linux_clut224.o
CC kernel/power/hibernate.o
CC drivers/pinctrl/pinmux.o
AR drivers/video/logo/built-in.a
CC crypto/ahash.o
CC sound/core/misc.o
CC kernel/power/snapshot.o
CC block/blk-flush.o
CC drivers/video/fbdev/core/fb_notify.o
AR sound/pci/ac97/built-in.a
AR sound/pci/ali5451/built-in.a
AR sound/pci/asihpi/built-in.a
AR sound/pci/au88x0/built-in.a
AR sound/pci/aw2/built-in.a
AR arch/x86/kernel/cpu/mce/built-in.a
AR sound/pci/ctxfi/built-in.a
CC arch/x86/kernel/cpu/topology.o
AR sound/pci/ca0106/built-in.a
CC io_uring/advise.o
CC fs/ext4/bitmap.o
AS arch/x86/entry/thunk_64.o
AR sound/pci/cs46xx/built-in.a
AR security/keys/built-in.a
AR security/built-in.a
AR sound/pci/cs5535audio/built-in.a
CC kernel/power/swap.o
CC kernel/power/user.o
AR sound/pci/lola/built-in.a
AS arch/x86/entry/entry_64_compat.o
AR sound/pci/lx6464es/built-in.a
AR sound/pci/echoaudio/built-in.a
AR sound/pci/emu10k1/built-in.a
AR sound/pci/hda/built-in.a
CC arch/x86/entry/syscall_32.o
CC [M] sound/pci/hda/hda_bind.o
CC block/blk-settings.o
AR drivers/gpio/built-in.a
CC net/netlink/policy.o
CC kernel/locking/irqflag-debug.o
CC fs/proc/proc_tty.o
CC net/netlink/diag.o
CC kernel/locking/mutex-debug.o
CC lib/crypto/sha1.o
CC net/sched/sch_frag.o
CC kernel/printk/printk.o
AR drivers/video/backlight/built-in.a
CC arch/x86/events/intel/knc.o
CC arch/x86/kernel/cpu/common.o
CC arch/x86/kernel/cpu/rdrand.o
CC arch/x86/pci/common.o
CC net/ethtool/netlink.o
CC drivers/pci/hotplug/acpiphp_core.o
CC drivers/pci/pcie/dpc.o
CC net/core/gen_stats.o
CC [M] drivers/video/fbdev/core/fbmem.o
CC sound/core/device.o
CC arch/x86/events/probe.o
CC drivers/pinctrl/pinconf.o
CC kernel/power/poweroff.o
CC arch/x86/mm/maccess.o
AS arch/x86/crypto/aesni-intel_avx-x86_64.o
AR net/ipv4/netfilter/built-in.a
CC [M] net/ipv4/netfilter/nf_defrag_ipv4.o
CC net/xfrm/xfrm_policy.o
CC net/unix/af_unix.o
CC fs/ext4/block_validity.o
CC io_uring/filetable.o
CC net/unix/garbage.o
AR arch/x86/entry/built-in.a
CC crypto/shash.o
CC crypto/akcipher.o
CC [M] net/netfilter/ipvs/ip_vs_xmit.o
CC net/xfrm/xfrm_state.o
CC net/xfrm/xfrm_hash.o
CC lib/crypto/sha256.o
CC block/blk-ioc.o
CC crypto/kpp.o
CC sound/core/info.o
CC [M] sound/pci/hda/hda_codec.o
CC fs/proc/cmdline.o
CC [M] sound/pci/hda/hda_jack.o
CC kernel/locking/lockdep.o
CC kernel/locking/lockdep_proc.o
CC fs/ext4/dir.o
CC arch/x86/mm/pgprot.o
CC drivers/pinctrl/pinconf-generic.o
CC lib/zlib_inflate/inffast.o
AS arch/x86/crypto/aes_ctrby8_avx-x86_64.o
CC lib/zlib_inflate/inflate.o
AS [M] arch/x86/crypto/ghash-clmulni-intel_asm.o
CC kernel/printk/printk_safe.o
CC kernel/printk/printk_ringbuffer.o
CC [M] arch/x86/crypto/ghash-clmulni-intel_glue.o
CC arch/x86/events/intel/lbr.o
CC net/xfrm/xfrm_input.o
CC drivers/pci/hotplug/acpiphp_glue.o
CC arch/x86/pci/early.o
CC [M] sound/pci/hda/hda_auto_parser.o
AR net/netlink/built-in.a
CC lib/zlib_deflate/deflate.o
AR drivers/pci/pcie/built-in.a
CC lib/lzo/lzo1x_compress.o
CC lib/lz4/lz4_compress.o
CC lib/zstd/zstd_compress_module.o
CC fs/proc/consoles.o
CC lib/zstd/compress/fse_compress.o
CC net/xfrm/xfrm_output.o
AR kernel/power/built-in.a
CC lib/lzo/lzo1x_decompress_safe.o
CC [M] lib/crypto/arc4.o
CC arch/x86/mm/hugetlbpage.o
CC lib/lz4/lz4hc_compress.o
CC net/core/gen_estimator.o
CC net/sched/sch_api.o
CC block/blk-map.o
AR drivers/pinctrl/built-in.a
CC kernel/irq/irqdesc.o
CC kernel/rcu/update.o
AR kernel/livepatch/built-in.a
CC lib/zstd/compress/hist.o
CC kernel/irq/handle.o
AS [M] arch/x86/crypto/crc32-pclmul_asm.o
CC fs/ext4/ext4_jbd2.o
CC [M] arch/x86/crypto/crc32-pclmul_glue.o
CC sound/core/isadma.o
CC crypto/acompress.o
CC [M] net/netfilter/ipvs/ip_vs_app.o
CC mm/truncate.o
CC [M] net/ipv4/netfilter/nf_reject_ipv4.o
CC net/ethtool/bitset.o
CC arch/x86/events/intel/p4.o
AR drivers/video/fbdev/omap/built-in.a
CC lib/lz4/lz4_decompress.o
AR lib/crypto/built-in.a
CC lib/zlib_inflate/infutil.o
LD [M] lib/crypto/libarc4.o
CC lib/zlib_inflate/inftrees.o
CC lib/zstd/compress/huf_compress.o
CC lib/zlib_inflate/inflate_syms.o
CC net/core/net_namespace.o
CC io_uring/openclose.o
CC lib/zstd/compress/zstd_compress.o
CC arch/x86/pci/bus_numa.o
AR lib/lzo/built-in.a
CC net/xfrm/xfrm_sysctl.o
CC fs/proc/cpuinfo.o
CC fs/ext4/extents.o
CC arch/x86/kernel/cpu/match.o
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
AR net/ipv6/netfilter/built-in.a
AR drivers/video/fbdev/omap2/omapfb/built-in.a
CC [M] net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
AR drivers/video/fbdev/omap2/built-in.a
CC net/packet/af_packet.o
CC [M] drivers/video/fbdev/core/fbmon.o
CC kernel/locking/spinlock.o
AR lib/zlib_inflate/built-in.a
CC arch/x86/mm/kasan_init_64.o
CC arch/x86/mm/pkeys.o
CC sound/core/vmaster.o
AS [M] arch/x86/crypto/crct10dif-pcl-asm_64.o
CC [M] arch/x86/crypto/crct10dif-pclmul_glue.o
CC lib/zlib_deflate/deftree.o
CC arch/x86/mm/pti.o
CC arch/x86/kernel/cpu/bugs.o
CC [M] sound/pci/hda/hda_sysfs.o
AR drivers/pci/hotplug/built-in.a
CC kernel/irq/manage.o
CC drivers/pci/bus.o
CC fs/proc/devices.o
CC io_uring/uring_cmd.o
CC arch/x86/pci/amd_bus.o
CC crypto/scompress.o
CC kernel/printk/sysctl.o
CC arch/x86/kernel/cpu/aperfmperf.o
CC block/blk-merge.o
CC kernel/locking/osq_lock.o
CC [M] net/netfilter/ipvs/ip_vs_sync.o
CC fs/proc/interrupts.o
CC [M] net/netfilter/ipvs/ip_vs_est.o
LD [M] arch/x86/crypto/ghash-clmulni-intel.o
LD [M] arch/x86/crypto/crc32-pclmul.o
LD [M] arch/x86/crypto/crct10dif-pclmul.o
AR arch/x86/crypto/built-in.a
CC arch/x86/events/intel/p6.o
CC [M] drivers/video/fbdev/core/fbcmap.o
AR kernel/printk/built-in.a
CC kernel/dma/mapping.o
CC mm/vmscan.o
CC kernel/dma/direct.o
CC sound/core/ctljack.o
CC kernel/entry/common.o
CC kernel/module/main.o
CC kernel/time/time.o
CC kernel/entry/syscall_user_dispatch.o
AR lib/lz4/built-in.a
CC kernel/time/timer.o
CC kernel/futex/core.o
CC kernel/time/hrtimer.o
CC lib/zlib_deflate/deflate_syms.o
CC net/ethtool/strset.o
CC arch/x86/events/intel/pt.o
CC [M] net/ipv4/netfilter/ip_tables.o
AR arch/x86/mm/built-in.a
CC fs/ext4/extents_status.o
CC kernel/entry/kvm.o
CC kernel/rcu/sync.o
CC [M] net/ipv4/netfilter/iptable_filter.o
CC fs/proc/loadavg.o
CC net/xfrm/xfrm_replay.o
CC [M] sound/pci/hda/hda_controller.o
CC [M] sound/pci/hda/hda_proc.o
CC drivers/pci/probe.o
CC kernel/futex/syscalls.o
CC [M] net/ipv6/netfilter/nf_conntrack_reasm.o
AR arch/x86/pci/built-in.a
CC [M] drivers/video/fbdev/uvesafb.o
CC sound/core/jack.o
CC net/packet/diag.o
CC drivers/video/aperture.o
CC crypto/algboss.o
AR lib/zlib_deflate/built-in.a
CC net/ethtool/linkinfo.o
CC net/core/secure_seq.o
CC net/unix/sysctl_net_unix.o
CC kernel/rcu/srcutree.o
CC [M] drivers/video/fbdev/core/fbsysfs.o
CC mm/shmem.o
CC io_uring/epoll.o
CC [M] drivers/video/fbdev/core/modedb.o
CC fs/proc/meminfo.o
CC net/sched/sch_blackhole.o
CC kernel/dma/ops_helpers.o
CC arch/x86/kernel/cpu/cpuid-deps.o
CC kernel/irq/spurious.o
CC arch/x86/kernel/cpu/umwait.o
CC net/ethtool/linkmodes.o
CC kernel/sched/build_policy.o
CC kernel/sched/build_utility.o
CC sound/core/timer.o
AR kernel/entry/built-in.a
CC arch/x86/kernel/cpu/proc.o
CC net/sched/sch_fifo.o
CC kernel/futex/pi.o
CC block/blk-timeout.o
CC drivers/video/cmdline.o
CC net/netfilter/nf_queue.o
CC kernel/cgroup/cgroup.o
CC lib/xz/xz_dec_syms.o
CC crypto/testmgr.o
CC io_uring/statx.o
CC lib/xz/xz_dec_stream.o
CC [M] sound/pci/hda/hda_hwdep.o
MKCAP arch/x86/kernel/cpu/capflags.c
CC net/xfrm/xfrm_device.o
CC net/unix/diag.o
CC io_uring/net.o
CC net/ethtool/rss.o
CC kernel/dma/dummy.o
CC arch/x86/events/intel/uncore.o
CC fs/proc/stat.o
CC kernel/irq/resend.o
CC net/ethtool/linkstate.o
CC [M] net/netfilter/ipvs/ip_vs_proto.o
CC net/core/flow_dissector.o
CC net/core/sysctl_net_core.o
CC lib/zstd/compress/zstd_compress_literals.o
CC kernel/dma/contiguous.o
CC kernel/dma/swiotlb.o
CC kernel/rcu/tree.o
CC kernel/dma/remap.o
CC arch/x86/events/intel/uncore_nhmex.o
CC [M] drivers/video/fbdev/core/fbcvt.o
LD [M] net/ipv6/netfilter/nf_defrag_ipv6.o
CC lib/raid6/algos.o
CC net/ipv6/af_inet6.o
CC block/blk-lib.o
CC kernel/futex/requeue.o
CC kernel/locking/qspinlock.o
CC lib/xz/xz_dec_lzma2.o
CC lib/xz/xz_dec_bcj.o
CC [M] net/ipv4/netfilter/iptable_mangle.o
CC fs/proc/uptime.o
CC [M] sound/pci/hda/hda_generic.o
CC arch/x86/kernel/cpu/powerflags.o
CC lib/zstd/compress/zstd_compress_sequences.o
CC io_uring/msg_ring.o
CC kernel/rcu/rcu_segcblist.o
AR net/sched/built-in.a
CC [M] net/ipv4/netfilter/iptable_nat.o
CC drivers/pci/host-bridge.o
CC kernel/irq/chip.o
CC net/ipv6/anycast.o
CC kernel/futex/waitwake.o
CC [M] drivers/video/fbdev/simplefb.o
CC kernel/time/timekeeping.o
CC net/core/dev.o
CC kernel/trace/trace_clock.o
CC kernel/module/strict_rwx.o
CC kernel/bpf/core.o
CC kernel/locking/rtmutex_api.o
CC net/ethtool/debug.o
CC net/unix/scm.o
CC lib/raid6/recov.o
CC kernel/trace/ftrace.o
CC lib/zstd/compress/zstd_compress_superblock.o
CC net/netfilter/nf_sockopt.o
CC net/ethtool/wol.o
CC net/ethtool/features.o
CC [M] drivers/video/fbdev/core/fb_cmdline.o
CC fs/proc/util.o
AR net/packet/built-in.a
CC block/blk-mq.o
CC drivers/pci/remove.o
CC net/xfrm/xfrm_algo.o
AR kernel/futex/built-in.a
CC drivers/pci/pci.o
CC [M] drivers/video/fbdev/core/fb_defio.o
CC kernel/trace/ring_buffer.o
CC crypto/cmac.o
AR lib/xz/built-in.a
CC sound/core/hrtimer.o
CC crypto/hmac.o
CC lib/zstd/compress/zstd_double_fast.o
CC lib/zstd/compress/zstd_fast.o
CC mm/util.o
AR kernel/dma/built-in.a
CC fs/proc/version.o
CC [M] net/netfilter/ipvs/ip_vs_pe.o
CC kernel/module/tree_lookup.o
CC arch/x86/events/utils.o
CC arch/x86/events/rapl.o
CC arch/x86/events/msr.o
HOSTCC lib/raid6/mktables
CC fs/ext4/file.o
CC fs/ext4/fsmap.o
CC [M] net/ipv4/netfilter/ipt_REJECT.o
CC arch/x86/events/intel/uncore_snb.o
CC kernel/irq/dummychip.o
CC sound/core/seq_device.o
UNROLL lib/raid6/int1.c
UNROLL lib/raid6/int2.c
CC io_uring/timeout.o
UNROLL lib/raid6/int4.c
UNROLL lib/raid6/int8.c
UNROLL lib/raid6/int16.c
UNROLL lib/raid6/int32.c
CC lib/fonts/fonts.o
CC lib/raid6/recov_ssse3.o
CC mm/mmzone.o
CC lib/fonts/font_8x8.o
AR net/unix/built-in.a
CC [M] sound/core/control_led.o
CC mm/vmstat.o
CC fs/proc/softirqs.o
CC drivers/pci/pci-driver.o
CC net/netfilter/utils.o
CC [M] sound/core/hwdep.o
CC fs/proc/namespaces.o
CC net/ipv6/ip6_output.o
CC block/blk-mq-tag.o
CC kernel/irq/devres.o
CC kernel/module/debug_kmemleak.o
CC net/ethtool/privflags.o
CC kernel/locking/spinlock_debug.o
CC [M] drivers/video/fbdev/core/fbcon.o
CC crypto/vmac.o
CC lib/fonts/font_8x16.o
CC kernel/cgroup/rstat.o
CC net/key/af_key.o
CC kernel/time/ntp.o
CC crypto/xcbc.o
CC net/core/dev_addr_lists.o
CC net/xfrm/xfrm_user.o
AR arch/x86/ia32/built-in.a
AR arch/x86/net/built-in.a
AR arch/x86/platform/atom/built-in.a
CC [M] sound/core/pcm.o
AR arch/x86/platform/ce4100/built-in.a
CC arch/x86/platform/efi/memmap.o
AR arch/x86/platform/geode/built-in.a
AR sound/ppc/built-in.a
CC arch/x86/kernel/cpu/feat_ctl.o
AR sound/arm/built-in.a
CC fs/jbd2/transaction.o
CC lib/raid6/recov_avx2.o
CC net/core/dst.o
CC lib/raid6/mmx.o
CC [M] net/netfilter/ipvs/ip_vs_proto_tcp.o
CC lib/raid6/sse1.o
CC lib/raid6/sse2.o
CC kernel/locking/qrwlock.o
CC kernel/module/kallsyms.o
AR lib/fonts/built-in.a
CC kernel/irq/autoprobe.o
CC fs/proc/self.o
CC arch/x86/events/intel/uncore_snbep.o
CC net/ipv4/route.o
CC net/ipv4/inetpeer.o
CC kernel/irq/irqdomain.o
CC kernel/module/procfs.o
CC [M] net/netfilter/ipvs/ip_vs_proto_udp.o
CC net/ethtool/rings.o
CC io_uring/sqpoll.o
CC [M] net/netfilter/ipvs/ip_vs_nfct.o
CC kernel/time/clocksource.o
CC [M] net/netfilter/ipvs/ip_vs_rr.o
CC [M] net/netfilter/nfnetlink.o
AR kernel/locking/built-in.a
CC arch/x86/platform/efi/quirks.o
CC crypto/crypto_null.o
CC arch/x86/platform/efi/efi.o
CC arch/x86/platform/efi/efi_64.o
CC fs/proc/thread_self.o
CC kernel/module/sysfs.o
CC kernel/irq/proc.o
AS arch/x86/platform/efi/efi_stub_64.o
CC arch/x86/kernel/cpu/intel.o
CC fs/ext4/fsync.o
CC arch/x86/kernel/cpu/intel_pconfig.o
CC lib/raid6/avx2.o
CC fs/proc/proc_sysctl.o
CC drivers/pci/search.o
CC [M] sound/core/pcm_native.o
CC mm/backing-dev.o
CC drivers/video/nomodeset.o
CC net/ipv4/protocol.o
CC arch/x86/kernel/cpu/tsx.o
AR kernel/bpf/built-in.a
CC kernel/events/core.o
CC crypto/md5.o
CC net/core/netevent.o
CC fs/proc/proc_net.o
CC net/ethtool/channels.o
CC [M] net/netfilter/nf_conntrack_core.o
CC net/ipv4/ip_input.o
AR arch/x86/platform/iris/built-in.a
CC fs/ext4/hash.o
CC kernel/cgroup/namespace.o
AR kernel/module/built-in.a
CC net/ipv6/ip6_input.o
CC kernel/irq/migration.o
CC kernel/fork.o
CC kernel/exec_domain.o
CC io_uring/fdinfo.o
CC kernel/cgroup/cgroup-v1.o
CC kernel/trace/trace.o
CC kernel/time/jiffies.o
CC kernel/time/timer_list.o
CC lib/raid6/avx512.o
AR arch/x86/platform/efi/built-in.a
CC fs/ext4/ialloc.o
CC arch/x86/platform/intel/iosf_mbi.o
CC fs/ext4/indirect.o
CC [M] drivers/video/fbdev/core/bitblit.o
LD [M] net/netfilter/ipvs/ip_vs.o
CC fs/jbd2/commit.o
CC drivers/pci/pci-sysfs.o
CC [M] net/netfilter/nf_conntrack_standalone.o
CC crypto/sha1_generic.o
CC arch/x86/kernel/cpu/intel_epb.o
CC kernel/time/timeconv.o
CC kernel/time/timecounter.o
CC kernel/cgroup/freezer.o
CC kernel/irq/cpuhotplug.o
CC drivers/video/hdmi.o
CC kernel/events/ring_buffer.o
CC fs/ext4/inline.o
AR arch/x86/platform/intel-mid/built-in.a
CC [M] sound/pci/hda/patch_realtek.o
CC kernel/time/alarmtimer.o
CC [M] net/netfilter/nf_conntrack_expect.o
CC [M] drivers/video/fbdev/core/softcursor.o
CC [M] drivers/video/fbdev/core/tileblit.o
CC kernel/panic.o
CC lib/raid6/recov_avx512.o
CC fs/ramfs/inode.o
AR arch/x86/platform/intel/built-in.a
CC arch/x86/kernel/cpu/amd.o
AR arch/x86/platform/intel-quark/built-in.a
CC kernel/time/posix-timers.o
AR arch/x86/platform/olpc/built-in.a
AR arch/x86/platform/scx200/built-in.a
CC arch/x86/kernel/cpu/hygon.o
AR net/xfrm/built-in.a
CC net/ethtool/coalesce.o
CC mm/mm_init.o
AR arch/x86/platform/ts5500/built-in.a
AR arch/x86/platform/uv/built-in.a
CC kernel/cgroup/legacy_freezer.o
AR arch/x86/platform/built-in.a
AR sound/sh/built-in.a
CC kernel/cgroup/pids.o
CC kernel/time/posix-cpu-timers.o
CC crypto/sha256_generic.o
AR net/key/built-in.a
CC arch/x86/kernel/cpu/centaur.o
CC arch/x86/events/intel/uncore_discovery.o
AR net/bridge/netfilter/built-in.a
CC net/bridge/br.o
CC block/blk-stat.o
CC fs/proc/kcore.o
AR kernel/rcu/built-in.a
CC net/bridge/br_device.o
CC kernel/irq/pm.o
CC net/bridge/br_fdb.o
AR kernel/sched/built-in.a
CC [M] net/sunrpc/auth_gss/auth_gss.o
CC io_uring/tctx.o
CC io_uring/poll.o
CC fs/proc/kmsg.o
CC net/ipv6/addrconf.o
CC arch/x86/events/intel/cstate.o
CC net/8021q/vlan_core.o
TABLE lib/raid6/tables.c
CC lib/raid6/int1.o
CC [M] net/8021q/vlan.o
CC net/dcb/dcbnl.o
CC [M] drivers/video/fbdev/core/cfbfillrect.o
CC crypto/sha512_generic.o
CC net/dcb/dcbevent.o
CC drivers/pci/rom.o
CC fs/ramfs/file-mmu.o
CC net/l3mdev/l3mdev.o
CC block/blk-mq-sysfs.o
CC lib/zstd/compress/zstd_lazy.o
CC mm/percpu.o
CC kernel/events/callchain.o
CC [M] net/netfilter/nf_conntrack_helper.o
CC fs/jbd2/recovery.o
CC kernel/cgroup/cpuset.o
CC [M] arch/x86/kvm/../../../virt/kvm/kvm_main.o
CC arch/x86/kernel/cpu/zhaoxin.o
CC [M] arch/x86/kvm/../../../virt/kvm/eventfd.o
CC [M] net/8021q/vlan_dev.o
CC mm/slab_common.o
CC lib/zstd/compress/zstd_ldm.o
CC kernel/irq/msi.o
CC drivers/pci/setup-res.o
CC net/ethtool/pause.o
CC fs/proc/page.o
AR fs/ramfs/built-in.a
CC fs/hugetlbfs/inode.o
CC lib/raid6/int2.o
CC net/bridge/br_forward.o
CC [M] net/netfilter/nf_conntrack_proto.o
CC [M] net/netfilter/nf_conntrack_proto_generic.o
CC mm/compaction.o
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC net/ipv4/ip_fragment.o
CC fs/fat/cache.o
AR arch/x86/events/intel/built-in.a
AR arch/x86/events/built-in.a
CC drivers/pci/irq.o
CC crypto/blake2b_generic.o
CC [M] drivers/video/fbdev/core/cfbcopyarea.o
CC [M] sound/core/pcm_lib.o
CC lib/raid6/int4.o
CC lib/raid6/int8.o
CC block/blk-mq-cpumap.o
CC block/blk-mq-sched.o
CC kernel/time/posix-clock.o
CC block/ioctl.o
AR net/l3mdev/built-in.a
CC fs/ext4/inode.o
CC [M] drivers/video/fbdev/core/cfbimgblt.o
CC drivers/pci/vpd.o
CC [M] net/bluetooth/af_bluetooth.o
CC io_uring/cancel.o
CC [M] net/bluetooth/hci_core.o
CC [M] net/8021q/vlan_netlink.o
CC fs/ext4/ioctl.o
CC fs/jbd2/checkpoint.o
CC drivers/pci/setup-bus.o
CC [M] net/netfilter/nf_conntrack_proto_tcp.o
CC arch/x86/kernel/cpu/vmware.o
CC drivers/pci/vc.o
CC fs/fat/dir.o
AR fs/proc/built-in.a
CC net/bridge/br_if.o
CC net/ethtool/eee.o
CC kernel/cpu.o
CC [M] net/8021q/vlanproc.o
CC [M] net/bluetooth/hci_conn.o
AR sound/pci/ice1712/built-in.a
AR sound/pci/korg1212/built-in.a
CC [M] arch/x86/kvm/../../../virt/kvm/binary_stats.o
AR sound/pci/mixart/built-in.a
CC lib/raid6/int16.o
CC lib/argv_split.o
CC kernel/time/itimer.o
CC kernel/irq/affinity.o
CC kernel/exit.o
CC crypto/ecb.o
CC [M] sound/pci/hda/patch_analog.o
CC arch/x86/kernel/cpu/hypervisor.o
AR sound/pci/nm256/built-in.a
CC drivers/pci/mmap.o
CC drivers/pci/setup-irq.o
CC [M] drivers/video/fbdev/core/sysfillrect.o
CC net/ethtool/tsinfo.o
CC net/ethtool/cabletest.o
CC [M] net/bluetooth/hci_event.o
AR net/dcb/built-in.a
CC net/ipv4/ip_forward.o
CC lib/raid6/int32.o
CC block/genhd.o
AR fs/hugetlbfs/built-in.a
CC crypto/cbc.o
CC kernel/irq/matrix.o
CC [M] net/sunrpc/auth_gss/gss_generic_token.o
CC io_uring/kbuf.o
AR sound/pci/oxygen/built-in.a
CC arch/x86/kernel/cpu/mshyperv.o
CC [M] net/bluetooth/mgmt.o
CC [M] net/dns_resolver/dns_key.o
CC net/devres.o
CC [M] net/netfilter/nf_conntrack_proto_udp.o
CC [M] net/dns_resolver/dns_query.o
CC mm/interval_tree.o
CC drivers/idle/intel_idle.o
CC fs/jbd2/revoke.o
CC [M] net/bluetooth/hci_sock.o
AR sound/pci/pcxhr/built-in.a
AR sound/pci/riptide/built-in.a
AR sound/pci/rme9652/built-in.a
CC kernel/time/clockevents.o
CC drivers/pci/proc.o
AR net/8021q/built-in.a
CC lib/bug.o
LD [M] net/8021q/8021q.o
AR drivers/char/ipmi/built-in.a
CC fs/jbd2/journal.o
CC [M] sound/core/pcm_misc.o
CC crypto/pcbc.o
CC lib/raid6/tables.o
CC [M] sound/pci/hda/patch_hdmi.o
CC [M] net/sunrpc/auth_gss/gss_mech_switch.o
CC [M] net/bluetooth/hci_sysfs.o
CC kernel/trace/trace_output.o
CC mm/list_lru.o
CC net/bridge/br_input.o
CC mm/workingset.o
CC [M] drivers/video/fbdev/core/syscopyarea.o
CC [M] sound/pci/hda/hda_eld.o
CC net/core/neighbour.o
LD [M] net/dns_resolver/dns_resolver.o
CC net/ethtool/tunnels.o
CC arch/x86/kernel/cpu/capflags.o
CC kernel/softirq.o
CC kernel/trace/trace_seq.o
AR arch/x86/kernel/cpu/built-in.a
CC drivers/pci/slot.o
CC arch/x86/kernel/acpi/boot.o
CC fs/fat/fatent.o
AR kernel/cgroup/built-in.a
CC arch/x86/kernel/acpi/sleep.o
CC crypto/cts.o
AS arch/x86/kernel/acpi/wakeup_64.o
CC [M] net/netfilter/nf_conntrack_proto_icmp.o
CC lib/buildid.o
CC io_uring/rsrc.o
CC kernel/time/tick-common.o
CC io_uring/rw.o
CC kernel/trace/trace_stat.o
CC [M] sound/core/pcm_memory.o
CC drivers/acpi/acpica/dsargs.o
CC drivers/pnp/pnpacpi/core.o
CC drivers/acpi/acpica/dscontrol.o
AR kernel/irq/built-in.a
CC drivers/pnp/core.o
CC net/ipv4/ip_options.o
AR lib/raid6/built-in.a
CC block/ioprio.o
CC arch/x86/kernel/acpi/apei.o
CC block/badblocks.o
AR drivers/idle/built-in.a
AR drivers/amba/built-in.a
AR drivers/clk/actions/built-in.a
AR drivers/clk/analogbits/built-in.a
AR drivers/clk/bcm/built-in.a
AR drivers/clk/imgtec/built-in.a
AR drivers/clk/imx/built-in.a
AR drivers/clk/ingenic/built-in.a
CC [M] sound/core/memalloc.o
AR drivers/clk/mediatek/built-in.a
AR drivers/clk/microchip/built-in.a
AR drivers/clk/mstar/built-in.a
CC drivers/acpi/acpica/dsdebug.o
AR drivers/clk/mvebu/built-in.a
AR drivers/clk/ralink/built-in.a
AR drivers/clk/renesas/built-in.a
CC drivers/acpi/acpica/dsfield.o
AR drivers/clk/socfpga/built-in.a
AR drivers/clk/sprd/built-in.a
AR drivers/clk/sunxi-ng/built-in.a
AR drivers/clk/ti/built-in.a
AR drivers/clk/versatile/built-in.a
CC net/ipv4/ip_output.o
CC [M] net/bluetooth/l2cap_core.o
CC drivers/clk/x86/clk-lpss-atom.o
CC [M] drivers/video/fbdev/core/sysimgblt.o
CC block/blk-rq-qos.o
CC block/disk-events.o
CC kernel/trace/trace_printk.o
CC net/core/rtnetlink.o
CC net/core/utils.o
CC mm/debug.o
CC drivers/pci/pci-acpi.o
CC crypto/lrw.o
CC drivers/pnp/pnpacpi/rsparser.o
CC [M] net/sunrpc/auth_gss/svcauth_gss.o
CC drivers/clk/x86/clk-pmc-atom.o
CC arch/x86/kernel/acpi/cppc.o
CC [M] sound/core/pcm_timer.o
CC io_uring/opdef.o
CC fs/ext4/mballoc.o
CC drivers/acpi/acpica/dsinit.o
CC kernel/trace/pid_list.o
CC io_uring/notif.o
CC net/ethtool/fec.o
CC kernel/time/tick-broadcast.o
CC arch/x86/kernel/apic/apic.o
CC arch/x86/kernel/kprobes/core.o
CC fs/fat/file.o
LDS arch/x86/kernel/vmlinux.lds
CC net/bridge/br_ioctl.o
AS arch/x86/kernel/head_64.o
CC arch/x86/kernel/kprobes/opt.o
CC net/ipv6/addrlabel.o
AR sound/pci/trident/built-in.a
CC kernel/trace/trace_sched_switch.o
CC io_uring/io-wq.o
CC [M] net/netfilter/nf_conntrack_extend.o
CC drivers/acpi/apei/apei-base.o
CC drivers/acpi/acpica/dsmethod.o
CC drivers/acpi/acpica/dsmthdat.o
CC [M] net/bluetooth/l2cap_sock.o
CC crypto/xts.o
CC arch/x86/kernel/acpi/cstate.o
CC block/blk-ia-ranges.o
CC [M] net/netfilter/nf_conntrack_acct.o
AR drivers/clk/x86/built-in.a
AR drivers/clk/xilinx/built-in.a
CC drivers/clk/clk-devres.o
CC mm/gup.o
CC crypto/ctr.o
LD [M] sound/core/snd-ctl-led.o
LD [M] sound/core/snd-hwdep.o
CC [M] drivers/video/fbdev/core/fb_sys_fops.o
LD [M] sound/core/snd-pcm.o
CC [M] net/sunrpc/auth_gss/gss_rpc_upcall.o
AR sound/core/built-in.a
AR sound/pci/ymfpci/built-in.a
AR sound/pci/vx222/built-in.a
CC net/ipv6/route.o
AR sound/synth/emux/built-in.a
AR sound/synth/built-in.a
AR sound/usb/misc/built-in.a
AR sound/usb/usx2y/built-in.a
AR sound/usb/caiaq/built-in.a
CC [M] sound/pci/hda/hda_intel.o
CC arch/x86/kernel/head64.o
AR sound/usb/6fire/built-in.a
AR sound/usb/hiface/built-in.a
CC drivers/acpi/apei/hest.o
AR sound/usb/bcd2000/built-in.a
AR drivers/pnp/pnpacpi/built-in.a
AR sound/usb/built-in.a
CC drivers/pnp/card.o
CC kernel/events/hw_breakpoint.o
CC kernel/time/tick-broadcast-hrtimer.o
CC kernel/resource.o
CC drivers/pci/quirks.o
CC drivers/pci/ats.o
CC kernel/sysctl.o
CC [M] net/sunrpc/auth_gss/gss_rpc_xdr.o
CC crypto/gcm.o
CC drivers/acpi/acpica/dsobject.o
CC drivers/clk/clk-bulk.o
CC kernel/trace/trace_functions.o
CC [M] arch/x86/kvm/../../../virt/kvm/vfio.o
AR arch/x86/kernel/acpi/built-in.a
CC arch/x86/kernel/kprobes/ftrace.o
CC kernel/trace/trace_preemptirq.o
CC net/ethtool/eeprom.o
CC fs/fat/inode.o
CC drivers/pci/iov.o
CC drivers/acpi/acpica/dsopcode.o
CC net/core/link_watch.o
AR fs/jbd2/built-in.a
CC block/bsg.o
CC fs/nfs/client.o
CC fs/nfs/dir.o
CC fs/fat/misc.o
CC kernel/time/tick-oneshot.o
CC net/bridge/br_stp.o
LD [M] drivers/video/fbdev/core/fb.o
CC fs/nfs/file.o
AR drivers/video/fbdev/core/built-in.a
AR drivers/video/fbdev/built-in.a
AR sound/firewire/built-in.a
AR drivers/video/built-in.a
CC net/sunrpc/clnt.o
CC [M] net/netfilter/nf_conntrack_seqadj.o
CC net/socket.o
CC arch/x86/kernel/ebda.o
CC drivers/acpi/apei/erst.o
CC drivers/clk/clkdev.o
CC block/bsg-lib.o
CC drivers/pnp/driver.o
CC drivers/acpi/acpica/dspkginit.o
AR arch/x86/kernel/kprobes/built-in.a
CC arch/x86/kernel/platform-quirks.o
CC [M] net/sunrpc/auth_gss/trace.o
CC drivers/pci/pci-label.o
CC net/sunrpc/xprt.o
CC kernel/time/tick-sched.o
AR io_uring/built-in.a
CC crypto/pcrypt.o
CC net/compat.o
CC net/sysctl_net.o
CC [M] arch/x86/kvm/../../../virt/kvm/coalesced_mmio.o
CC arch/x86/kernel/apic/apic_common.o
CC kernel/capability.o
CC kernel/trace/trace_nop.o
CC net/core/filter.o
CC block/blk-cgroup.o
CC kernel/ptrace.o
CC drivers/acpi/acpica/dsutils.o
CC block/blk-cgroup-rwstat.o
CC net/ethtool/stats.o
CC drivers/clk/clk.o
CC block/blk-throttle.o
CC kernel/trace/trace_functions_graph.o
CC kernel/events/uprobes.o
CC drivers/pnp/resource.o
CC net/ipv4/ip_sockglue.o
CC kernel/trace/fgraph.o
CC fs/fat/nfs.o
CC net/ipv4/inet_hashtables.o
CC [M] net/sunrpc/auth_gss/gss_krb5_mech.o
CC arch/x86/kernel/apic/apic_noop.o
CC crypto/cryptd.o
CC block/mq-deadline.o
CC [M] net/sunrpc/auth_gss/gss_krb5_seal.o
LD [M] sound/pci/hda/snd-hda-codec.o
LD [M] sound/pci/hda/snd-hda-codec-generic.o
CC drivers/acpi/apei/bert.o
LD [M] sound/pci/hda/snd-hda-codec-realtek.o
LD [M] sound/pci/hda/snd-hda-codec-analog.o
LD [M] sound/pci/hda/snd-hda-codec-hdmi.o
CC fs/fat/namei_vfat.o
CC drivers/acpi/acpica/dswexec.o
LD [M] sound/pci/hda/snd-hda-intel.o
CC net/bridge/br_stp_bpdu.o
CC [M] net/bluetooth/smp.o
AR sound/pci/built-in.a
CC arch/x86/kernel/process_64.o
CC arch/x86/kernel/apic/ipi.o
AR sound/sparc/built-in.a
AR sound/spi/built-in.a
CC [M] net/netfilter/nf_conntrack_proto_icmpv6.o
AR sound/parisc/built-in.a
CC [M] arch/x86/kvm/../../../virt/kvm/async_pf.o
AR sound/pcmcia/vx/built-in.a
AR sound/pcmcia/pdaudiocf/built-in.a
AR sound/pcmcia/built-in.a
AR sound/mips/built-in.a
AR sound/soc/built-in.a
CC kernel/time/vsyscall.o
AR sound/atmel/built-in.a
AR sound/hda/built-in.a
CC [M] sound/hda/hda_bus_type.o
CC block/kyber-iosched.o
CC [M] sound/hda/hdac_bus.o
CC block/bfq-iosched.o
CC mm/mmap_lock.o
AR drivers/acpi/pmic/built-in.a
CC drivers/acpi/dptf/int340x_thermal.o
CC arch/x86/kernel/apic/vector.o
CC fs/nfs/getroot.o
CC drivers/pci/pci-stub.o
CC drivers/pci/vgaarb.o
CC drivers/acpi/apei/ghes.o
CC drivers/acpi/acpica/dswload.o
CC [M] sound/hda/hdac_device.o
CC drivers/acpi/acpica/dswload2.o
CC kernel/time/timekeeping_debug.o
CC mm/highmem.o
CC net/ethtool/phc_vclocks.o
CC drivers/pnp/manager.o
CC drivers/pnp/support.o
CC drivers/acpi/acpica/dswscope.o
CC kernel/trace/blktrace.o
CC net/ipv6/ip6_fib.o
CC crypto/des_generic.o
CC [M] sound/hda/hdac_sysfs.o
AR drivers/acpi/dptf/built-in.a
CC mm/memory.o
CC [M] sound/hda/hdac_regmap.o
CC block/bfq-wf2q.o
CC [M] sound/hda/hdac_controller.o
CC [M] arch/x86/kvm/../../../virt/kvm/irqchip.o
CC block/bfq-cgroup.o
CC [M] net/bluetooth/lib.o
CC drivers/acpi/acpica/dswstate.o
CC net/ipv6/ipv6_sockglue.o
CC fs/fat/namei_msdos.o
CC [M] sound/hda/hdac_stream.o
CC kernel/user.o
CC drivers/pnp/interface.o
CC [M] net/sunrpc/auth_gss/gss_krb5_unseal.o
CC net/bridge/br_stp_if.o
CC [M] net/bluetooth/ecdh_helper.o
CC mm/mincore.o
CC crypto/aes_generic.o
CC kernel/time/namespace.o
CC [M] net/netfilter/nf_conntrack_proto_dccp.o
CC kernel/signal.o
CC drivers/acpi/acpica/evevent.o
AR kernel/events/built-in.a
CC [M] sound/hda/array.o
CC fs/exportfs/expfs.o
CC kernel/trace/trace_events.o
CC [M] sound/hda/hdmi_chmap.o
CC [M] net/bluetooth/hci_request.o
CC net/ethtool/mm.o
CC drivers/acpi/acpica/evgpe.o
CC drivers/pnp/quirks.o
CC drivers/pnp/system.o
CC mm/mlock.o
CC kernel/sys.o
AR drivers/pci/built-in.a
CC kernel/umh.o
CC kernel/workqueue.o
CC kernel/pid.o
AR drivers/acpi/apei/built-in.a
CC fs/nfs/inode.o
CC fs/lockd/clntlock.o
CC net/ipv6/ndisc.o
CC [M] sound/hda/trace.o
CC net/ipv4/inet_timewait_sock.o
CC fs/nls/nls_base.o
AR fs/unicode/built-in.a
CC fs/nfs/super.o
CC [M] net/sunrpc/auth_gss/gss_krb5_seqnum.o
CC net/ethtool/module.o
CC crypto/deflate.o
CC [M] arch/x86/kvm/../../../virt/kvm/dirty_ring.o
CC arch/x86/kernel/apic/hw_nmi.o
CC drivers/acpi/acpica/evgpeblk.o
CC net/core/sock_diag.o
AR fs/fat/built-in.a
AR kernel/time/built-in.a
CC kernel/task_work.o
CC block/blk-mq-pci.o
CC [M] sound/hda/hdac_component.o
CC net/sunrpc/socklib.o
CC block/blk-mq-virtio.o
AR fs/exportfs/built-in.a
CC crypto/crc32c_generic.o
CC [M] net/netfilter/nf_conntrack_proto_sctp.o
CC net/core/dev_ioctl.o
CC fs/nls/nls_cp437.o
CC [M] net/bluetooth/mgmt_util.o
CC drivers/acpi/acpica/evgpeinit.o
CC net/bridge/br_stp_timer.o
AR drivers/pnp/built-in.a
CC fs/nls/nls_ascii.o
CC [M] net/bluetooth/mgmt_config.o
CC net/ipv4/inet_connection_sock.o
CC drivers/acpi/tables.o
CC fs/lockd/clntproc.o
CC fs/lockd/clntxdr.o
CC fs/ext4/migrate.o
CC [M] net/sunrpc/auth_gss/gss_krb5_wrap.o
CC drivers/dma/dw/core.o
AR drivers/soc/apple/built-in.a
CC crypto/crct10dif_common.o
CC arch/x86/kernel/apic/io_apic.o
AR drivers/soc/aspeed/built-in.a
CC drivers/dma/dw/dw.o
AR drivers/soc/bcm/bcm63xx/built-in.a
AR drivers/soc/bcm/built-in.a
CC arch/x86/kernel/apic/msi.o
AR drivers/soc/fsl/built-in.a
AR drivers/soc/fujitsu/built-in.a
AR drivers/soc/imx/built-in.a
CC fs/nls/nls_iso8859-1.o
AR drivers/soc/ixp4xx/built-in.a
CC net/bridge/br_netlink.o
AR drivers/soc/loongson/built-in.a
AR drivers/soc/mediatek/built-in.a
CC net/bridge/br_netlink_tunnel.o
AR drivers/soc/microchip/built-in.a
AR drivers/soc/nuvoton/built-in.a
CC arch/x86/kernel/apic/x2apic_phys.o
AR drivers/soc/amlogic/built-in.a
AR drivers/soc/pxa/built-in.a
CC drivers/acpi/acpica/evgpeutil.o
CC [M] sound/hda/hdac_i915.o
CC drivers/clk/clk-divider.o
AR drivers/soc/qcom/built-in.a
CC drivers/virtio/virtio.o
AR drivers/soc/renesas/built-in.a
AR drivers/soc/rockchip/built-in.a
AR drivers/soc/sifive/built-in.a
AR drivers/soc/sunxi/built-in.a
CC [M] net/bluetooth/hci_codec.o
CC net/core/tso.o
AR drivers/soc/ti/built-in.a
AR drivers/soc/xilinx/built-in.a
CC net/ethtool/pse-pd.o
AR drivers/soc/built-in.a
CC arch/x86/kernel/apic/x2apic_cluster.o
CC [M] arch/x86/kvm/../../../virt/kvm/pfncache.o
CC drivers/acpi/blacklist.o
CC crypto/crct10dif_generic.o
CC lib/zstd/compress/zstd_opt.o
CC drivers/dma/hsu/hsu.o
CC fs/nls/nls_utf8.o
CC net/sunrpc/xprtsock.o
CC [M] arch/x86/kvm/x86.o
CC net/sunrpc/sched.o
CC [M] net/netfilter/nf_conntrack_netlink.o
CC drivers/dma/dw/idma32.o
CC drivers/acpi/acpica/evglock.o
CC net/core/sock_reuseport.o
CC [M] net/sunrpc/auth_gss/gss_krb5_crypto.o
CC net/core/fib_notifier.o
CC [M] sound/hda/intel-dsp-config.o
AR sound/x86/built-in.a
CC fs/ntfs/aops.o
CC fs/autofs/init.o
CC net/ipv6/udp.o
CC fs/debugfs/inode.o
CC block/blk-mq-debugfs.o
CC fs/debugfs/file.o
CC crypto/authenc.o
CC [M] net/bluetooth/eir.o
CC net/sunrpc/auth.o
AR fs/nls/built-in.a
CC fs/ext4/mmp.o
CC fs/ext4/move_extent.o
CC arch/x86/kernel/apic/apic_flat_64.o
CC drivers/clk/clk-fixed-factor.o
CC drivers/virtio/virtio_ring.o
CC fs/ext4/namei.o
CC net/ipv4/tcp.o
CC net/ipv4/tcp_input.o
CC drivers/acpi/acpica/evhandler.o
CC kernel/trace/trace_export.o
CC fs/lockd/host.o
CC [M] arch/x86/kvm/emulate.o
CC net/ethtool/plca.o
CC fs/nfs/io.o
CC arch/x86/kernel/apic/probe_64.o
CC fs/nfs/direct.o
CC fs/autofs/inode.o
CC drivers/dma/dw/acpi.o
AR drivers/dma/hsu/built-in.a
CC fs/ext4/page-io.o
CC drivers/tty/vt/vt_ioctl.o
CC drivers/clk/clk-fixed-rate.o
CC drivers/dma/dw/pci.o
CC [M] sound/hda/intel-nhlt.o
CC mm/mmap.o
CC drivers/acpi/acpica/evmisc.o
CC [M] net/sunrpc/auth_gss/gss_krb5_keys.o
CC fs/nfs/pagelist.o
CC arch/x86/kernel/signal.o
CC drivers/acpi/acpica/evregion.o
CC [M] sound/hda/intel-sdw-acpi.o
CC fs/ext4/readpage.o
AR arch/x86/kernel/apic/built-in.a
CC mm/mmu_gather.o
CC block/blk-pm.o
CC crypto/authencesn.o
AR fs/debugfs/built-in.a
CC drivers/tty/hvc/hvc_console.o
CC kernel/trace/trace_event_perf.o
CC fs/ntfs/attrib.o
CC drivers/tty/serial/8250/8250_core.o
CC [M] net/bluetooth/hci_sync.o
CC drivers/clk/clk-gate.o
CC drivers/tty/serial/8250/8250_pnp.o
CC fs/autofs/root.o
CC kernel/extable.o
CC fs/nfs/read.o
CC net/bridge/br_arp_nd_proxy.o
CC fs/nfs/symlink.o
CC crypto/lzo.o
AR drivers/dma/dw/built-in.a
AR drivers/dma/idxd/built-in.a
CC crypto/lzo-rle.o
CC drivers/tty/serial/8250/8250_port.o
AR drivers/dma/mediatek/built-in.a
AR drivers/dma/qcom/built-in.a
AR drivers/dma/ti/built-in.a
AR drivers/dma/xilinx/built-in.a
CC [M] drivers/dma/ioat/init.o
CC fs/tracefs/inode.o
AR net/ethtool/built-in.a
CC drivers/acpi/acpica/evrgnini.o
CC drivers/tty/serial/8250/8250_dma.o
LD [M] sound/hda/snd-hda-core.o
LD [M] sound/hda/snd-intel-dspcfg.o
LD [M] sound/hda/snd-intel-sdw-acpi.o
AR sound/xen/built-in.a
AR sound/virtio/built-in.a
CC sound/sound_core.o
CC block/holder.o
LD [M] net/sunrpc/auth_gss/auth_rpcgss.o
CC fs/autofs/symlink.o
CC arch/x86/kernel/signal_64.o
CC fs/lockd/svc.o
CC drivers/clk/clk-multiplier.o
LD [M] net/sunrpc/auth_gss/rpcsec_gss_krb5.o
CC net/sunrpc/auth_null.o
CC drivers/dma/dmaengine.o
CC drivers/tty/vt/vc_screen.o
CC drivers/virtio/virtio_anchor.o
CC net/bridge/br_sysfs_if.o
CC drivers/tty/serial/8250/8250_dwlib.o
CC drivers/tty/serial/8250/8250_pcilib.o
CC drivers/clk/clk-mux.o
CC net/sunrpc/auth_unix.o
CC fs/autofs/waitq.o
CC drivers/acpi/acpica/evsci.o
CC kernel/trace/trace_events_filter.o
CC crypto/lz4.o
CC sound/last.o
AR drivers/tty/hvc/built-in.a
CC drivers/tty/serial/8250/8250_pci.o
CC arch/x86/kernel/traps.o
CC kernel/params.o
CC fs/ntfs/collate.o
CC fs/ntfs/compress.o
CC drivers/acpi/acpica/evxface.o
CC fs/ext4/resize.o
AR fs/tracefs/built-in.a
CC fs/ext4/super.o
CC drivers/tty/serial/serial_core.o
AR block/built-in.a
CC net/sunrpc/svc.o
CC mm/mprotect.o
CC drivers/tty/vt/selection.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC [M] net/netfilter/nf_nat_core.o
CC [M] drivers/dma/ioat/dma.o
CC arch/x86/kernel/idt.o
CC drivers/acpi/acpica/evxfevnt.o
AR sound/built-in.a
CC mm/mremap.o
CC drivers/clk/clk-composite.o
CC crypto/lz4hc.o
CC fs/pstore/inode.o
CC fs/btrfs/super.o
CC fs/pstore/platform.o
CC drivers/virtio/virtio_pci_legacy_dev.o
CC drivers/acpi/acpica/evxfgpe.o
CC fs/autofs/expire.o
CC net/sunrpc/svcsock.o
CC [M] drivers/dma/ioat/prep.o
CC net/ipv6/udplite.o
CC fs/ntfs/debug.o
CC fs/autofs/dev-ioctl.o
CC fs/lockd/svclock.o
CC [M] net/netfilter/nf_nat_proto.o
CC fs/ext4/symlink.o
CC kernel/kthread.o
CC crypto/xxhash_generic.o
CC fs/nfs/unlink.o
CC net/bridge/br_sysfs_br.o
CC arch/x86/kernel/irq.o
CC net/ipv6/raw.o
CC drivers/clk/clk-fractional-divider.o
CC mm/msync.o
CC fs/nfs/write.o
CC drivers/tty/vt/keyboard.o
CC drivers/tty/serial/8250/8250_exar.o
CC drivers/acpi/acpica/evxfregn.o
CC lib/cmdline.o
CC drivers/virtio/virtio_mmio.o
CC kernel/sys_ni.o
CC [M] net/netfilter/nf_nat_helper.o
CC fs/pstore/pmsg.o
CC drivers/tty/serial/earlycon.o
CC drivers/tty/serial/8250/8250_early.o
CC drivers/clk/clk-gpio.o
CC arch/x86/kernel/irq_64.o
CC fs/ntfs/dir.o
CC crypto/rng.o
CC kernel/trace/trace_events_trigger.o
CC net/ipv6/icmp.o
AR fs/autofs/built-in.a
CC lib/zstd/zstd_decompress_module.o
CC lib/zstd/decompress/huf_decompress.o
CC drivers/acpi/osi.o
CC drivers/acpi/acpica/exconcat.o
CC [M] arch/x86/kvm/i8259.o
CC net/core/xdp.o
CC [M] arch/x86/kvm/irq.o
CC kernel/nsproxy.o
CC fs/btrfs/ctree.o
CC drivers/char/hw_random/core.o
CC [M] drivers/dma/ioat/dca.o
AR fs/pstore/built-in.a
CC mm/page_vma_mapped.o
CC fs/btrfs/extent-tree.o
AR drivers/clk/built-in.a
CC drivers/char/agp/backend.o
CC drivers/char/tpm/tpm-chip.o
CC lib/zstd/decompress/zstd_ddict.o
CC drivers/char/agp/generic.o
CC drivers/char/hw_random/intel-rng.o
CC [M] net/netfilter/nf_nat_redirect.o
CC drivers/char/agp/isoch.o
AR drivers/iommu/amd/built-in.a
CC drivers/iommu/intel/dmar.o
AR drivers/iommu/arm/arm-smmu/built-in.a
CC drivers/virtio/virtio_pci_modern.o
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
AR drivers/iommu/arm/built-in.a
CC drivers/tty/serial/8250/8250_dw.o
CC lib/zstd/decompress/zstd_decompress.o
AR drivers/iommu/iommufd/built-in.a
CC lib/zstd/decompress/zstd_decompress_block.o
CC drivers/acpi/acpica/exconfig.o
CC crypto/drbg.o
CC drivers/acpi/acpica/exconvrt.o
CC fs/lockd/svcshare.o
CC drivers/tty/serial/serial_mctrl_gpio.o
CC fs/ext4/sysfs.o
CC net/bridge/br_nf_core.o
CC kernel/notifier.o
CC fs/ext4/xattr.o
AR drivers/gpu/host1x/built-in.a
AR drivers/gpu/drm/tests/built-in.a
CC [M] drivers/gpu/drm/tests/drm_kunit_helpers.o
CC drivers/connector/cn_queue.o
CC [M] drivers/dma/ioat/sysfs.o
AR drivers/gpu/vga/built-in.a
CC fs/ntfs/file.o
CC lib/zstd/zstd_common_module.o
CC drivers/base/power/sysfs.o
CC drivers/base/firmware_loader/builtin/main.o
CC drivers/base/regmap/regmap.o
CC drivers/base/firmware_loader/main.o
AR drivers/char/hw_random/built-in.a
CC [M] drivers/gpu/drm/tests/drm_buddy_test.o
CC drivers/base/power/generic_ops.o
CC drivers/acpi/acpica/excreate.o
CC kernel/trace/trace_eprobe.o
CC [M] drivers/gpu/drm/tests/drm_cmdline_parser_test.o
CC drivers/tty/vt/consolemap.o
CC drivers/char/tpm/tpm-dev-common.o
CC net/ipv4/tcp_output.o
CC arch/x86/kernel/dumpstack_64.o
CC mm/pagewalk.o
CC drivers/virtio/virtio_pci_common.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC drivers/virtio/virtio_pci_legacy.o
CC drivers/char/agp/intel-agp.o
CC drivers/char/tpm/tpm-dev.o
CC [M] net/bluetooth/sco.o
CC [M] drivers/gpu/drm/tests/drm_connector_test.o
CC [M] drivers/gpu/drm/tests/drm_damage_helper_test.o
CC mm/pgtable-generic.o
CC drivers/tty/serial/8250/8250_lpss.o
CC mm/rmap.o
CC net/bridge/br_multicast.o
CC drivers/base/regmap/regcache.o
CC drivers/base/regmap/regcache-rbtree.o
CC [M] net/netfilter/nf_nat_masquerade.o
CC [M] net/netfilter/x_tables.o
CC fs/lockd/svcproc.o
CC drivers/base/regmap/regcache-flat.o
CC drivers/base/power/common.o
CC drivers/acpi/acpica/exdebug.o
LD [M] drivers/dma/ioat/ioatdma.o
CC net/ipv6/mcast.o
CC net/core/flow_offload.o
CC fs/ntfs/index.o
CC drivers/dma/virt-dma.o
CC net/core/gro.o
CC net/core/netdev-genl.o
CC arch/x86/kernel/time.o
CC drivers/connector/connector.o
CC drivers/char/tpm/tpm-interface.o
CC kernel/ksysfs.o
CC crypto/jitterentropy.o
CC drivers/base/regmap/regmap-debugfs.o
CC drivers/char/tpm/tpm1-cmd.o
CC drivers/acpi/acpica/exdump.o
CC crypto/jitterentropy-kcapi.o
AR drivers/base/firmware_loader/built-in.a
CC net/ipv4/tcp_timer.o
HOSTCC drivers/tty/vt/conmakehash
CC arch/x86/kernel/ioport.o
CC drivers/base/power/qos.o
CC drivers/char/mem.o
CC [M] drivers/virtio/virtio_mem.o
CC drivers/tty/serial/8250/8250_mid.o
CC kernel/cred.o
CC drivers/char/agp/intel-gtt.o
CC drivers/acpi/acpica/exfield.o
CC fs/nfs/namespace.o
CC drivers/iommu/intel/iommu.o
CC drivers/tty/serial/8250/8250_pericom.o
CC drivers/tty/vt/vt.o
CC crypto/ghash-generic.o
CC drivers/dma/acpi-dma.o
CC net/sunrpc/svcauth.o
CC fs/ntfs/inode.o
CC [M] drivers/gpu/drm/tests/drm_dp_mst_helper_test.o
CC drivers/acpi/acpica/exfldio.o
CC kernel/trace/trace_kprobe.o
CC drivers/iommu/intel/pasid.o
CC drivers/iommu/intel/trace.o
CC drivers/iommu/intel/cap_audit.o
CC fs/lockd/svcsubs.o
CC drivers/acpi/acpica/exmisc.o
CC net/sunrpc/svcauth_unix.o
CC arch/x86/kernel/dumpstack.o
COPY drivers/tty/vt/defkeymap.c
CC arch/x86/kernel/nmi.o
CC drivers/base/regmap/regmap-i2c.o
CC crypto/af_alg.o
CC drivers/connector/cn_proc.o
CC drivers/acpi/acpica/exmutex.o
CC drivers/iommu/intel/irq_remapping.o
CC drivers/char/tpm/tpm2-cmd.o
CC drivers/char/tpm/tpmrm-dev.o
CC [M] drivers/gpu/drm/tests/drm_format_helper_test.o
AR drivers/tty/serial/8250/built-in.a
AR drivers/tty/serial/built-in.a
CC [M] net/bluetooth/iso.o
CC [M] net/netfilter/xt_tcpudp.o
CC drivers/iommu/intel/perfmon.o
CC drivers/char/tpm/tpm2-space.o
CC [M] drivers/gpu/drm/tests/drm_format_test.o
CC kernel/reboot.o
AR drivers/dma/built-in.a
CC drivers/base/power/runtime.o
CC drivers/acpi/acpica/exnames.o
CC fs/btrfs/print-tree.o
AR drivers/char/agp/built-in.a
AR drivers/tty/ipwireless/built-in.a
CC drivers/char/random.o
CC net/core/netdev-genl-gen.o
CC arch/x86/kernel/ldt.o
CC drivers/base/regmap/regmap-irq.o
CC fs/nfs/mount_clnt.o
CC net/core/net-sysfs.o
CC lib/cpumask.o
CC kernel/async.o
CC kernel/trace/error_report-traces.o
CC [M] net/netfilter/xt_mark.o
CC net/sunrpc/addr.o
CC net/sunrpc/rpcb_clnt.o
CC [M] net/bluetooth/a2mp.o
CC drivers/acpi/acpica/exoparg1.o
AR drivers/base/test/built-in.a
CC drivers/base/component.o
CC net/ipv4/tcp_ipv4.o
CC fs/lockd/mon.o
CC mm/vmalloc.o
CC lib/zstd/common/debug.o
CC [M] drivers/gpu/drm/tests/drm_framebuffer_test.o
CC [M] drivers/gpu/drm/tests/drm_managed_test.o
CC lib/zstd/common/entropy_common.o
CC kernel/range.o
CC fs/ntfs/mft.o
CC net/sunrpc/timer.o
CC fs/lockd/xdr.o
CC drivers/char/tpm/tpm-sysfs.o
CC fs/efivarfs/inode.o
CC [M] fs/netfs/buffered_read.o
AR drivers/connector/built-in.a
AR drivers/virtio/built-in.a
CC net/core/net-procfs.o
CC net/ipv6/reassembly.o
CC net/ipv4/tcp_minisocks.o
CC [M] fs/netfs/io.o
CC lib/ctype.o
CC net/core/netpoll.o
CC [M] drivers/gpu/drm/tests/drm_mm_test.o
CC lib/zstd/common/error_private.o
CC drivers/iommu/iommu.o
CC lib/zstd/common/fse_decompress.o
CC net/bridge/br_mdb.o
CC kernel/trace/power-traces.o
CC net/sunrpc/xdr.o
CC drivers/acpi/acpica/exoparg2.o
CC [M] net/bluetooth/amp.o
CC arch/x86/kernel/setup.o
CC drivers/base/power/wakeirq.o
CC [M] fs/netfs/iterator.o
CC [M] fs/netfs/main.o
CC [M] net/netfilter/xt_nat.o
CC drivers/tty/tty_io.o
CC fs/nfs/nfstrace.o
CC crypto/algif_hash.o
CC arch/x86/kernel/x86_init.o
CC [M] fs/netfs/objects.o
CC net/ipv4/tcp_cong.o
CC fs/efivarfs/file.o
CC net/ipv4/tcp_metrics.o
CC fs/btrfs/root-tree.o
AR drivers/base/regmap/built-in.a
CC fs/lockd/clnt4xdr.o
CC lib/zstd/common/zstd_common.o
CC fs/ntfs/mst.o
CC drivers/char/tpm/eventlog/common.o
CC fs/ntfs/namei.o
CC drivers/acpi/acpica/exoparg3.o
CC fs/efivarfs/super.o
CC net/sunrpc/sunrpc_syms.o
CC drivers/tty/n_tty.o
CC drivers/base/power/main.o
CC net/bridge/br_multicast_eht.o
CONMK drivers/tty/vt/consolemap_deftbl.c
CC drivers/tty/vt/defkeymap.o
CC fs/ext4/xattr_hurd.o
CC drivers/char/misc.o
CC drivers/base/core.o
CC [M] net/bluetooth/hci_debugfs.o
AR lib/zstd/built-in.a
CC lib/dec_and_lock.o
CC drivers/tty/vt/consolemap_deftbl.o
CC fs/ext4/xattr_trusted.o
CC fs/ext4/xattr_user.o
CC net/ipv6/tcp_ipv6.o
CC fs/efivarfs/vars.o
AR drivers/tty/vt/built-in.a
CC fs/nfs/export.o
CC drivers/acpi/acpica/exoparg6.o
CC fs/nfs/sysfs.o
CC fs/ntfs/runlist.o
CC fs/ext4/fast_commit.o
CC drivers/char/virtio_console.o
AR drivers/iommu/intel/built-in.a
CC lib/decompress.o
CC arch/x86/kernel/i8259.o
CC net/bridge/br_vlan.o
CC lib/decompress_bunzip2.o
CC net/core/fib_rules.o
LD [M] fs/netfs/netfs.o
CC drivers/char/tpm/eventlog/tpm1.o
CC arch/x86/kernel/irqinit.o
CC [M] net/netfilter/xt_REDIRECT.o
CC net/bridge/br_vlan_tunnel.o
CC drivers/char/tpm/eventlog/tpm2.o
CC net/sunrpc/cache.o
CC fs/lockd/xdr4.o
CC kernel/trace/rpm-traces.o
CC crypto/algif_skcipher.o
CC fs/lockd/svc4proc.o
CC net/bridge/br_vlan_options.o
CC drivers/acpi/acpica/exprep.o
CC drivers/acpi/acpica/exregion.o
CC drivers/char/tpm/tpm_ppi.o
CC net/ipv6/ping.o
CC [M] fs/fscache/cache.o
CC [M] fs/fscache/cookie.o
CC [M] fs/fscache/io.o
CC net/core/net-traces.o
CC [M] fs/smbfs_common/cifs_arc4.o
CC fs/btrfs/dir-item.o
AR fs/efivarfs/built-in.a
CC [M] fs/smbfs_common/cifs_md4.o
CC net/ipv4/tcp_fastopen.o
CC [M] drivers/gpu/drm/tests/drm_modes_test.o
CC crypto/xor.o
CC drivers/base/bus.o
CC lib/decompress_inflate.o
CC drivers/char/tpm/eventlog/acpi.o
CC drivers/iommu/iommu-traces.o
CC drivers/acpi/acpica/exresnte.o
CC [M] fs/cifs/trace.o
CC net/bridge/br_mst.o
CC [M] fs/fuse/dev.o
CC arch/x86/kernel/jump_label.o
CC fs/ntfs/super.o
CC [M] fs/cifs/cifsfs.o
CC fs/ntfs/sysctl.o
CC net/core/selftests.o
CC [M] fs/cifs/cifs_debug.o
CC kernel/trace/trace_dynevent.o
CC lib/decompress_unlz4.o
CC drivers/char/tpm/eventlog/efi.o
CC drivers/tty/tty_ioctl.o
CC kernel/smpboot.o
AR drivers/gpu/drm/arm/built-in.a
CC [M] net/netfilter/xt_MASQUERADE.o
AR drivers/gpu/drm/display/built-in.a
CC [M] drivers/gpu/drm/display/drm_display_helper_mod.o
CC [M] net/netfilter/xt_addrtype.o
CC net/sunrpc/rpc_pipe.o
CC crypto/hash_info.o
CC drivers/acpi/acpica/exresolv.o
CC lib/decompress_unlzma.o
CC [M] drivers/gpu/drm/tests/drm_plane_helper_test.o
LD [M] net/bluetooth/bluetooth.o
CC crypto/simd.o
CC [M] drivers/gpu/drm/tests/drm_probe_helper_test.o
CC fs/lockd/procfs.o
CC drivers/char/tpm/tpm_crb.o
CC fs/nfs/fs_context.o
CC drivers/base/power/wakeup.o
CC arch/x86/kernel/irq_work.o
CC [M] crypto/md4.o
CC arch/x86/kernel/probe_roms.o
CC [M] drivers/gpu/drm/tests/drm_rect_test.o
CC drivers/acpi/acpica/exresop.o
CC [M] drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
CC [M] drivers/gpu/drm/display/drm_dp_helper.o
CC drivers/base/power/wakeup_stats.o
CC fs/nfs/sysctl.o
CC net/sunrpc/sysfs.o
CC lib/decompress_unlzo.o
CC net/core/ptp_classifier.o
CC drivers/iommu/iommu-sysfs.o
CC mm/page_alloc.o
CC lib/decompress_unxz.o
CC fs/btrfs/file-item.o
CC kernel/trace/trace_probe.o
CC kernel/trace/trace_uprobe.o
CC [M] fs/fscache/main.o
CC kernel/trace/rethook.o
CC drivers/tty/tty_ldisc.o
CC [M] crypto/ccm.o
CC drivers/tty/tty_buffer.o
CC net/ipv4/tcp_rate.o
CC drivers/acpi/acpica/exserial.o
CC mm/init-mm.o
CC mm/memblock.o
AR fs/lockd/built-in.a
CC [M] fs/fscache/volume.o
CC [M] fs/overlayfs/super.o
CC [M] fs/overlayfs/namei.o
CC [M] arch/x86/kvm/lapic.o
CC drivers/base/power/domain.o
CC arch/x86/kernel/sys_ia32.o
CC [M] net/netfilter/xt_conntrack.o
CC [M] net/bridge/br_netfilter_hooks.o
CC fs/ntfs/unistr.o
AR drivers/char/tpm/built-in.a
CC kernel/ucount.o
CC drivers/char/hpet.o
CC [M] drivers/gpu/drm/display/drm_dp_mst_topology.o
CC lib/decompress_unzstd.o
CC [M] crypto/arc4.o
CC fs/ext4/orphan.o
CC drivers/iommu/dma-iommu.o
CC [M] fs/fuse/dir.o
CC drivers/iommu/ioasid.o
CC net/ipv6/exthdrs.o
CC fs/open.o
CC [M] fs/cifs/connect.o
CC drivers/acpi/acpica/exstore.o
CC [M] fs/cifs/dir.o
CC fs/btrfs/inode-item.o
CC [M] net/netfilter/xt_ipvs.o
CC lib/dump_stack.o
CC lib/earlycpio.o
CC drivers/base/dd.o
AR drivers/gpu/drm/rcar-du/built-in.a
CC [M] net/bridge/br_netfilter_ipv6.o
CC drivers/tty/tty_port.o
CC [M] fs/cifs/file.o
CC net/sunrpc/svc_xprt.o
CC net/core/netprio_cgroup.o
CC drivers/base/syscore.o
AR drivers/gpu/drm/omapdrm/built-in.a
CC drivers/base/power/domain_governor.o
CC net/sunrpc/xprtmultipath.o
CC [M] crypto/ecc.o
CC [M] fs/fuse/file.o
CC [M] fs/cifs/inode.o
CC fs/ntfs/upcase.o
CC [M] arch/x86/kvm/i8254.o
CC drivers/acpi/acpica/exstoren.o
CC drivers/iommu/iova.o
CC arch/x86/kernel/signal_32.o
CC drivers/iommu/irq_remapping.o
CC [M] fs/fscache/proc.o
CC net/ipv4/tcp_recovery.o
CC [M] fs/overlayfs/util.o
CC lib/extable.o
CC net/core/dst_cache.o
CC fs/nfs/nfs2super.o
CC drivers/char/nvram.o
CC net/sunrpc/stats.o
AR fs/ext4/built-in.a
CC drivers/base/driver.o
CC drivers/acpi/acpica/exstorob.o
CC lib/flex_proportions.o
CC fs/nfs/proc.o
CC drivers/acpi/acpica/exsystem.o
AR drivers/gpu/drm/tilcdc/built-in.a
CC fs/read_write.o
AR fs/ntfs/built-in.a
CC fs/file_table.o
CC net/ipv6/datagram.o
CC drivers/acpi/acpica/extrace.o
CC lib/idr.o
CC drivers/tty/tty_mutex.o
CC fs/btrfs/disk-io.o
CC net/sunrpc/sysctl.o
CC [M] fs/overlayfs/inode.o
LD [M] net/netfilter/nf_conntrack.o
CC lib/irq_regs.o
CC drivers/base/class.o
AR kernel/trace/built-in.a
CC drivers/base/power/clock_ops.o
CC kernel/regset.o
LD [M] net/netfilter/nf_nat.o
LD [M] fs/fscache/fscache.o
AR net/netfilter/built-in.a
CC lib/is_single_threaded.o
CC drivers/acpi/osl.o
CC drivers/acpi/acpica/exutils.o
CC drivers/acpi/acpica/hwacpi.o
CC drivers/acpi/acpica/hwesleep.o
CC lib/klist.o
CC drivers/base/platform.o
CC drivers/block/loop.o
AR drivers/iommu/built-in.a
CC arch/x86/kernel/sys_x86_64.o
CC drivers/block/virtio_blk.o
CC lib/kobject.o
CC [M] drivers/block/nbd.o
CC fs/btrfs/transaction.o
AR drivers/char/built-in.a
CC arch/x86/kernel/espfix_64.o
AR drivers/misc/eeprom/built-in.a
AR drivers/misc/cb710/built-in.a
CC lib/kobject_uevent.o
CC fs/super.o
CC lib/logic_pio.o
AR drivers/misc/ti-st/built-in.a
AR drivers/misc/lis3lv02d/built-in.a
AR drivers/misc/cardreader/built-in.a
CC [M] drivers/misc/mei/hdcp/mei_hdcp.o
CC kernel/kmod.o
CC arch/x86/kernel/ksysfs.o
CC drivers/tty/tty_ldsem.o
CC [M] drivers/misc/mei/pxp/mei_pxp.o
CC [M] fs/overlayfs/file.o
CC [M] fs/overlayfs/dir.o
CC lib/maple_tree.o
CC [M] drivers/misc/mei/init.o
CC kernel/groups.o
CC net/ipv4/tcp_ulp.o
CC net/core/gro_cells.o
CC drivers/acpi/acpica/hwgpe.o
CC [M] drivers/misc/mei/hbm.o
CC [M] fs/cifs/link.o
AR net/bridge/built-in.a
CC drivers/tty/tty_baudrate.o
LD [M] net/bridge/br_netfilter.o
CC drivers/tty/tty_jobctrl.o
AR drivers/base/power/built-in.a
CC drivers/base/cpu.o
CC drivers/acpi/acpica/hwregs.o
CC [M] drivers/misc/mei/interrupt.o
CC net/core/failover.o
CC fs/nfs/nfs2xdr.o
CC [M] crypto/essiv.o
CC lib/memcat_p.o
CC kernel/kcmp.o
CC net/ipv4/tcp_offload.o
CC [M] fs/overlayfs/readdir.o
CC net/ipv4/tcp_plb.o
CC arch/x86/kernel/bootflag.o
CC [M] arch/x86/kvm/ioapic.o
CC [M] drivers/misc/mei/client.o
CC fs/nfs/nfs3super.o
CC lib/nmi_backtrace.o
CC lib/plist.o
CC drivers/mfd/mfd-core.o
AR drivers/nfc/built-in.a
CC drivers/mfd/intel-lpss.o
CC drivers/acpi/acpica/hwsleep.o
CC net/ipv6/ip6_flowlabel.o
CC fs/nfs/nfs3client.o
CC drivers/mfd/intel-lpss-pci.o
CC net/ipv6/inet6_connection_sock.o
CC kernel/freezer.o
CC [M] crypto/ecdh.o
AR drivers/dax/hmem/built-in.a
CC drivers/dax/super.o
CC drivers/base/firmware.o
AR net/sunrpc/built-in.a
CC drivers/dax/bus.o
CC [M] fs/overlayfs/copy_up.o
CC drivers/base/init.o
CC [M] arch/x86/kvm/irq_comm.o
CC drivers/dma-buf/dma-buf.o
AR drivers/cxl/core/built-in.a
AR drivers/cxl/built-in.a
CC drivers/tty/n_null.o
CC lib/radix-tree.o
CC [M] arch/x86/kvm/cpuid.o
CC [M] fs/fuse/inode.o
CC fs/char_dev.o
CC kernel/stacktrace.o
CC arch/x86/kernel/e820.o
CC drivers/acpi/acpica/hwvalid.o
CC net/ipv4/datagram.o
CC [M] fs/overlayfs/export.o
CC [M] drivers/gpu/drm/display/drm_dsc_helper.o
AR drivers/macintosh/built-in.a
CC kernel/dma.o
CC drivers/mfd/intel-lpss-acpi.o
CC drivers/dma-buf/dma-fence.o
AR net/core/built-in.a
CC drivers/scsi/scsi.o
CC drivers/nvme/host/core.o
AR drivers/nvme/target/built-in.a
CC drivers/dma-buf/dma-fence-array.o
CC [M] drivers/gpu/drm/display/drm_hdcp_helper.o
CC [M] arch/x86/kvm/pmu.o
CC [M] crypto/ecdh_helper.o
CC drivers/ata/libata-core.o
CC fs/nfs/nfs3proc.o
CC drivers/base/map.o
CC [M] drivers/gpu/drm/display/drm_hdmi_helper.o
CC drivers/tty/pty.o
CC drivers/tty/sysrq.o
CC drivers/ata/libata-scsi.o
CC fs/nfs/nfs3xdr.o
CC drivers/acpi/acpica/hwxface.o
CC drivers/base/devres.o
CC drivers/mfd/intel_soc_pmic_crc.o
CC net/ipv4/raw.o
CC lib/ratelimit.o
CC drivers/scsi/hosts.o
CC kernel/smp.o
CC drivers/ata/libata-eh.o
LD [M] crypto/ecdh_generic.o
CC drivers/nvme/host/ioctl.o
AR crypto/built-in.a
CC lib/rbtree.o
CC [M] arch/x86/kvm/mtrr.o
CC drivers/dma-buf/dma-fence-chain.o
CC kernel/uid16.o
CC drivers/ata/libata-transport.o
CC drivers/ata/libata-trace.o
CC drivers/base/attribute_container.o
CC [M] drivers/gpu/drm/display/drm_scdc_helper.o
CC [M] drivers/mfd/lpc_sch.o
LD [M] fs/overlayfs/overlay.o
CC drivers/dma-buf/dma-fence-unwrap.o
CC drivers/dma-buf/dma-resv.o
CC net/ipv6/udp_offload.o
CC fs/stat.o
CC lib/seq_buf.o
CC lib/show_mem.o
CC fs/exec.o
AR drivers/dax/built-in.a
CC drivers/acpi/acpica/hwxfsleep.o
CC net/ipv6/seg6.o
CC [M] drivers/mfd/lpc_ich.o
CC [M] drivers/gpu/drm/display/drm_dp_aux_dev.o
CC drivers/nvme/host/trace.o
AR drivers/block/built-in.a
CC drivers/spi/spi.o
CC arch/x86/kernel/pci-dma.o
CC drivers/net/phy/mdio-boardinfo.o
CC arch/x86/kernel/quirks.o
CC drivers/net/phy/mdio_devres.o
CC drivers/nvme/host/pci.o
CC [M] drivers/misc/mei/main.o
CC drivers/scsi/scsi_ioctl.o
CC [M] fs/fuse/control.o
CC drivers/dma-buf/sync_file.o
CC drivers/dma-buf/sw_sync.o
CC drivers/dma-buf/sync_debug.o
CC mm/memory_hotplug.o
CC drivers/acpi/acpica/hwpci.o
CC mm/madvise.o
CC drivers/base/transport_class.o
CC kernel/kallsyms.o
CC net/ipv4/udp.o
AR drivers/tty/built-in.a
CC drivers/net/phy/phy.o
CC drivers/base/topology.o
CC drivers/acpi/acpica/nsaccess.o
CC drivers/scsi/scsicam.o
CC lib/siphash.o
CC arch/x86/kernel/topology.o
CC [M] fs/cifs/misc.o
CC fs/pipe.o
CC mm/page_io.o
CC fs/namei.o
CC [M] arch/x86/kvm/hyperv.o
AR drivers/mfd/built-in.a
AR drivers/misc/built-in.a
CC [M] arch/x86/kvm/debugfs.o
AR drivers/firewire/built-in.a
CC drivers/base/container.o
CC drivers/base/property.o
CC net/ipv4/udplite.o
CC fs/btrfs/inode.o
CC drivers/ata/libata-sata.o
CC fs/fcntl.o
CC drivers/scsi/scsi_error.o
CC drivers/net/phy/phy-c45.o
CC [M] drivers/dma-buf/selftest.o
CC fs/ioctl.o
CC lib/string.o
CC drivers/net/phy/phy-core.o
CC lib/timerqueue.o
CC net/ipv6/fib6_notifier.o
LD [M] drivers/gpu/drm/display/drm_display_helper.o
CC drivers/acpi/acpica/nsalloc.o
CC net/ipv4/udp_offload.o
CC [M] fs/cifs/netmisc.o
CC fs/readdir.o
AR drivers/gpu/drm/imx/built-in.a
AR drivers/gpu/drm/i2c/built-in.a
AR drivers/gpu/drm/panel/built-in.a
AR drivers/gpu/drm/bridge/analogix/built-in.a
AR drivers/gpu/drm/bridge/cadence/built-in.a
CC [M] fs/fuse/xattr.o
CC arch/x86/kernel/kdebugfs.o
CC arch/x86/kernel/alternative.o
AR drivers/gpu/drm/bridge/imx/built-in.a
AR drivers/gpu/drm/bridge/synopsys/built-in.a
AR drivers/gpu/drm/bridge/built-in.a
AR drivers/gpu/drm/hisilicon/built-in.a
AR drivers/gpu/drm/mxsfb/built-in.a
CC fs/select.o
AR drivers/gpu/drm/tiny/built-in.a
AR drivers/gpu/drm/xlnx/built-in.a
AR drivers/gpu/drm/gud/built-in.a
AR drivers/gpu/drm/solomon/built-in.a
CC lib/vsprintf.o
CC [M] drivers/dma-buf/st-dma-fence.o
CC [M] drivers/gpu/drm/ttm/ttm_tt.o
CC [M] drivers/gpu/drm/ttm/ttm_bo.o
AR drivers/cdrom/built-in.a
CC [M] drivers/gpu/drm/ttm/ttm_bo_util.o
AR drivers/auxdisplay/built-in.a
CC [M] fs/cifs/smbencrypt.o
CC [M] drivers/misc/mei/dma-ring.o
AR fs/nfs/built-in.a
CC [M] drivers/gpu/drm/ttm/ttm_bo_vm.o
CC [M] drivers/dma-buf/st-dma-fence-chain.o
CC drivers/acpi/acpica/nsarguments.o
CC lib/win_minmax.o
CC drivers/ata/libata-sff.o
CC kernel/acct.o
CC net/ipv4/arp.o
CC fs/dcache.o
CC [M] fs/cifs/transport.o
CC net/ipv6/rpl.o
CC net/ipv4/icmp.o
CC [M] fs/fuse/acl.o
CC fs/inode.o
CC net/ipv4/devinet.o
CC drivers/base/cacheinfo.o
CC drivers/net/phy/phy_device.o
CC drivers/base/swnode.o
CC drivers/acpi/acpica/nsconvert.o
CC drivers/ata/libata-pmp.o
CC lib/xarray.o
CC [M] drivers/gpu/drm/ttm/ttm_module.o
CC mm/swap_state.o
CC [M] drivers/gpu/drm/ttm/ttm_execbuf_util.o
CC [M] drivers/misc/mei/bus.o
CC drivers/net/phy/linkmode.o
CC [M] drivers/dma-buf/st-dma-fence-unwrap.o
CC [M] drivers/dma-buf/st-dma-resv.o
CC fs/btrfs/file.o
CC fs/btrfs/defrag.o
CC fs/btrfs/extent_map.o
CC [M] drivers/gpu/drm/ttm/ttm_range_manager.o
CC mm/swapfile.o
CC [M] fs/cifs/cached_dir.o
CC [M] drivers/misc/mei/bus-fixup.o
CC drivers/ata/libata-acpi.o
CC drivers/acpi/acpica/nsdump.o
CC drivers/ata/libata-pata-timings.o
CC drivers/scsi/scsi_lib.o
CC net/ipv6/ioam6.o
CC drivers/scsi/scsi_lib_dma.o
CC net/ipv6/sysctl_net_ipv6.o
CC [M] fs/fuse/readdir.o
CC net/ipv6/xfrm6_policy.o
CC arch/x86/kernel/i8253.o
AR drivers/net/pse-pd/built-in.a
CC drivers/net/mdio/acpi_mdio.o
CC kernel/crash_core.o
AR drivers/dma-buf/built-in.a
LD [M] drivers/dma-buf/dmabuf_selftests.o
CC drivers/net/mdio/fwnode_mdio.o
CC arch/x86/kernel/hw_breakpoint.o
CC kernel/compat.o
CC kernel/utsname.o
CC [M] fs/fuse/ioctl.o
AR drivers/nvme/host/built-in.a
CC drivers/base/auxiliary.o
AR drivers/nvme/built-in.a
CC drivers/usb/common/common.o
CC [M] drivers/gpu/drm/ttm/ttm_resource.o
CC drivers/acpi/acpica/nseval.o
CC drivers/usb/core/usb.o
CC drivers/base/devtmpfs.o
CC arch/x86/kernel/tsc.o
CC drivers/ata/ahci.o
CC net/ipv6/xfrm6_state.o
CC [M] drivers/misc/mei/debugfs.o
CC net/ipv6/xfrm6_input.o
CC mm/swap_slots.o
AR drivers/net/pcs/built-in.a
AR drivers/net/ethernet/adi/built-in.a
CC drivers/ata/libahci.o
AR drivers/net/ethernet/alacritech/built-in.a
CC [M] arch/x86/kvm/mmu/mmu.o
AR drivers/net/ethernet/amazon/built-in.a
AR drivers/net/ethernet/aquantia/built-in.a
AR drivers/net/usb/built-in.a
CC [M] drivers/net/usb/pegasus.o
AR drivers/net/ethernet/asix/built-in.a
CC drivers/acpi/acpica/nsinit.o
AR drivers/net/ethernet/cadence/built-in.a
CC kernel/user_namespace.o
AR drivers/net/ethernet/broadcom/built-in.a
CC [M] drivers/net/ethernet/broadcom/b44.o
AR drivers/spi/built-in.a
CC [M] drivers/net/ethernet/broadcom/bnx2.o
AR drivers/net/ethernet/cavium/common/built-in.a
AR drivers/net/ethernet/cavium/thunder/built-in.a
In file included from ../include/linux/build_bug.h:5,
from ../include/linux/init.h:5,
from ../include/linux/io.h:10,
from ../include/linux/iosys-map.h:10,
from ../drivers/gpu/drm/ttm/ttm_resource.c:25:
../drivers/gpu/drm/ttm/ttm_resource.c: In function ‘ttm_lru_bulk_move_del’:
../drivers/gpu/drm/ttm/ttm_resource.c:117:26: warning: suggest parentheses around ‘&&’ within ‘||’ [-Wparentheses]
117 | pos->first == res && pos->last == res)) {
| ~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~
../include/linux/compiler.h:78:42: note: in definition of macro ‘unlikely’
78 | # define unlikely(x) __builtin_expect(!!(x), 0)
| ^
AR drivers/net/ethernet/cavium/liquidio/built-in.a
AR drivers/net/ethernet/cavium/octeon/built-in.a
AR drivers/net/ethernet/cavium/built-in.a
CC [M] arch/x86/kvm/mmu/page_track.o
CC drivers/ata/ata_piix.o
CC drivers/input/serio/serio.o
AR drivers/net/mdio/built-in.a
CC net/ipv4/af_inet.o
AR drivers/net/ethernet/cortina/built-in.a
CC net/ipv4/igmp.o
CC drivers/usb/common/debug.o
CC [M] arch/x86/kvm/mmu/spte.o
CC lib/lockref.o
CC [M] drivers/net/usb/rtl8150.o
LD [M] fs/fuse/fuse.o
CC [M] drivers/net/ipvlan/ipvlan_core.o
CC [M] drivers/net/usb/r8152.o
CC [M] drivers/net/vxlan/vxlan_core.o
AR drivers/usb/common/built-in.a
CC fs/btrfs/sysfs.o
CC drivers/input/keyboard/atkbd.o
AR drivers/input/mouse/built-in.a
CC [M] drivers/misc/mei/mei-trace.o
CC drivers/acpi/acpica/nsload.o
CC drivers/acpi/acpica/nsnames.o
CC fs/attr.o
CC drivers/input/input.o
CC drivers/base/memory.o
CC [M] drivers/gpu/drm/ttm/ttm_pool.o
CC drivers/scsi/scsi_scan.o
CC net/ipv6/xfrm6_output.o
CC drivers/acpi/utils.o
CC drivers/rtc/lib.o
CC drivers/acpi/reboot.o
CC drivers/usb/core/hub.o
CC drivers/net/phy/mdio_bus.o
CC drivers/acpi/nvs.o
CC net/ipv4/fib_frontend.o
CC lib/bcd.o
CC lib/sort.o
CC drivers/rtc/class.o
CC [M] fs/cifs/cifs_unicode.o
CC [M] fs/cifs/nterr.o
CC lib/parser.o
CC drivers/acpi/acpica/nsobject.o
CC arch/x86/kernel/tsc_msr.o
AR drivers/usb/phy/built-in.a
CC drivers/acpi/acpica/nsparse.o
CC drivers/acpi/acpica/nspredef.o
CC drivers/input/serio/i8042.o
AR drivers/i2c/algos/built-in.a
CC [M] drivers/i2c/algos/i2c-algo-bit.o
AR drivers/i3c/built-in.a
CC [M] arch/x86/kvm/mmu/tdp_iter.o
CC [M] drivers/net/ipvlan/ipvlan_main.o
CC arch/x86/kernel/io_delay.o
AR drivers/i2c/muxes/built-in.a
CC drivers/i2c/busses/i2c-designware-common.o
CC kernel/pid_namespace.o
CC [M] drivers/i2c/muxes/i2c-mux-gpio.o
CC drivers/i2c/busses/i2c-designware-master.o
CC drivers/i2c/i2c-boardinfo.o
CC lib/debug_locks.o
CC lib/random32.o
CC drivers/rtc/interface.o
CC [M] drivers/misc/mei/pci-me.o
CC lib/bust_spinlocks.o
CC mm/dmapool.o
CC drivers/i2c/i2c-core-base.o
CC [M] fs/cifs/cifsencrypt.o
CC [M] drivers/net/ethernet/broadcom/cnic.o
CC fs/bad_inode.o
CC drivers/base/module.o
CC lib/kasprintf.o
CC drivers/rtc/nvmem.o
CC drivers/acpi/acpica/nsprepkg.o
GEN drivers/scsi/scsi_devinfo_tbl.c
CC fs/file.o
CC [M] fs/cifs/readdir.o
CC [M] drivers/gpu/drm/ttm/ttm_device.o
CC drivers/acpi/acpica/nsrepair.o
CC arch/x86/kernel/rtc.o
AR drivers/input/keyboard/built-in.a
CC mm/hugetlb.o
CC lib/bitmap.o
CC lib/scatterlist.o
UPD kernel/config_data
CC kernel/stop_machine.o
CC [M] drivers/gpu/drm/ttm/ttm_sys_manager.o
CC [M] fs/cifs/ioctl.o
CC net/ipv6/xfrm6_protocol.o
CC drivers/scsi/scsi_devinfo.o
CC [M] drivers/net/ipvlan/ipvlan_l3s.o
AR drivers/ata/built-in.a
CC drivers/input/serio/libps2.o
CC drivers/base/pinctrl.o
CC fs/btrfs/accessors.o
CC [M] drivers/gpu/drm/scheduler/sched_main.o
CC [M] drivers/gpu/drm/scheduler/sched_fence.o
CC drivers/net/phy/mdio_device.o
CC drivers/input/input-compat.o
CC drivers/rtc/dev.o
CC drivers/i2c/i2c-core-smbus.o
CC [M] fs/cifs/sess.o
CC drivers/acpi/acpica/nsrepair2.o
CC drivers/i2c/i2c-core-acpi.o
CC [M] arch/x86/kvm/mmu/tdp_mmu.o
CC [M] drivers/misc/mei/hw-me.o
CC drivers/input/input-mt.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o
CC drivers/input/input-poller.o
CC arch/x86/kernel/resource.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_device.o
CC drivers/rtc/proc.o
CC drivers/i2c/busses/i2c-designware-platdrv.o
CC drivers/i2c/busses/i2c-designware-baytrail.o
CC [M] drivers/net/ethernet/broadcom/tg3.o
CC [M] drivers/gpu/drm/ttm/ttm_agp_backend.o
CC drivers/base/devcoredump.o
CC [M] drivers/gpu/drm/scheduler/sched_entity.o
CC [M] arch/x86/kvm/smm.o
AS arch/x86/kernel/irqflags.o
CC arch/x86/kernel/static_call.o
CC drivers/net/phy/swphy.o
CC drivers/usb/core/hcd.o
CC drivers/acpi/acpica/nssearch.o
CC drivers/acpi/acpica/nsutils.o
CC kernel/kprobes.o
CC drivers/input/ff-core.o
CC drivers/scsi/scsi_sysctl.o
CC drivers/usb/core/urb.o
AR drivers/input/serio/built-in.a
CC net/ipv4/fib_semantics.o
CC [M] drivers/net/vxlan/vxlan_multicast.o
CC lib/list_sort.o
CC arch/x86/kernel/process.o
CC drivers/input/touchscreen.o
CC drivers/rtc/sysfs.o
CC drivers/usb/host/pci-quirks.o
CC lib/uuid.o
CC [M] drivers/net/vxlan/vxlan_vnifilter.o
CC drivers/base/platform-msi.o
CC drivers/usb/storage/scsiglue.o
LD [M] drivers/net/ipvlan/ipvlan.o
LD [M] drivers/gpu/drm/ttm/ttm.o
CC drivers/acpi/wakeup.o
CC drivers/base/physical_location.o
CC drivers/net/loopback.o
CC drivers/net/netconsole.o
CC arch/x86/kernel/ptrace.o
CC drivers/usb/storage/protocol.o
CC net/ipv6/netfilter.o
CC lib/iov_iter.o
CC drivers/acpi/acpica/nswalk.o
CC [M] drivers/i2c/busses/i2c-scmi.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_kms.o
CC drivers/net/phy/fixed_phy.o
CC [M] drivers/net/phy/phylink.o
CC arch/x86/kernel/tls.o
CC drivers/scsi/scsi_debugfs.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.o
CC drivers/acpi/sleep.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.o
CC drivers/acpi/acpica/nsxfeval.o
CC drivers/input/ff-memless.o
CC drivers/input/vivaldi-fmap.o
CC [M] drivers/gpu/drm/i915/i915_driver.o
CC [M] drivers/gpu/drm/i915/i915_drm_client.o
CC [M] drivers/gpu/drm/i915/i915_config.o
CC drivers/rtc/rtc-mc146818-lib.o
CC drivers/usb/serial/usb-serial.o
CC [M] drivers/gpu/drm/xe/tests/xe_bo_test.o
CC drivers/base/trace.o
AR drivers/usb/misc/built-in.a
CC [M] drivers/usb/misc/ftdi-elan.o
CC drivers/net/virtio_net.o
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC fs/btrfs/xattr.o
CC drivers/acpi/acpica/nsxfname.o
CC drivers/usb/host/ehci-hcd.o
CC [M] drivers/misc/mei/gsc-me.o
CC drivers/usb/storage/transport.o
CC drivers/scsi/scsi_trace.o
CC drivers/acpi/acpica/nsxfobj.o
CC [M] fs/cifs/export.o
CC [M] drivers/gpu/drm/vgem/vgem_drv.o
CC drivers/usb/core/message.o
CC [M] drivers/gpu/drm/xe/tests/xe_dma_buf_test.o
CC [M] drivers/i2c/busses/i2c-ccgx-ucsi.o
CC drivers/acpi/device_sysfs.o
CC [M] drivers/gpu/drm/vgem/vgem_fence.o
CC [M] drivers/i2c/busses/i2c-i801.o
CC [M] drivers/net/phy/aquantia_main.o
CC drivers/usb/storage/usb.o
CC drivers/rtc/rtc-cmos.o
CC drivers/i2c/i2c-core-slave.o
CC arch/x86/kernel/step.o
CC drivers/acpi/device_pm.o
CC drivers/input/input-leds.o
CC [M] arch/x86/kvm/vmx/vmx.o
CC [M] arch/x86/kvm/kvm-asm-offsets.s
AR drivers/base/built-in.a
CC [M] drivers/gpu/drm/xe/tests/xe_migrate_test.o
CC drivers/i2c/i2c-dev.o
CC drivers/acpi/acpica/psargs.o
CC kernel/hung_task.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC drivers/scsi/scsi_logging.o
CC net/ipv6/fib6_rules.o
CC [M] drivers/gpu/drm/xe/tests/xe_pci_test.o
CC drivers/usb/storage/initializers.o
LD [M] drivers/misc/mei/mei.o
CC fs/filesystems.o
LD [M] drivers/misc/mei/mei-me.o
LD [M] drivers/misc/mei/mei-gsc.o
AR drivers/media/i2c/built-in.a
AR drivers/media/tuners/built-in.a
CC [M] drivers/gpu/drm/xe/tests/xe_rtp_test.o
AR drivers/media/rc/keymaps/built-in.a
AR drivers/media/rc/built-in.a
AR drivers/media/common/b2c2/built-in.a
CC [M] drivers/gpu/drm/xe/tests/xe_wa_test.o
AR drivers/media/common/saa7146/built-in.a
AR drivers/media/common/siano/built-in.a
AR drivers/media/common/v4l2-tpg/built-in.a
CC drivers/input/mousedev.o
AR drivers/media/common/videobuf2/built-in.a
AR drivers/media/common/built-in.a
AR drivers/ptp/built-in.a
LD [M] drivers/gpu/drm/vgem/vgem.o
CC [M] drivers/ptp/ptp_clock.o
AR drivers/power/reset/built-in.a
AR drivers/media/platform/allegro-dvt/built-in.a
CC drivers/input/evdev.o
CC drivers/power/supply/power_supply_core.o
CC [M] drivers/net/phy/aquantia_hwmon.o
AR drivers/media/platform/amlogic/meson-ge2d/built-in.a
AR drivers/media/platform/amlogic/built-in.a
AR drivers/media/platform/amphion/built-in.a
CC drivers/power/supply/power_supply_sysfs.o
AR drivers/media/platform/aspeed/built-in.a
AR drivers/media/platform/atmel/built-in.a
CC arch/x86/kernel/i8237.o
CC [M] fs/cifs/unc.o
CC net/ipv4/fib_trie.o
AR drivers/media/platform/cadence/built-in.a
CC net/ipv4/fib_notifier.o
AR drivers/media/platform/chips-media/built-in.a
CC drivers/usb/serial/generic.o
AR drivers/media/platform/intel/built-in.a
CC drivers/acpi/acpica/psloop.o
CC drivers/usb/storage/sierra_ms.o
AR drivers/media/platform/marvell/built-in.a
AR drivers/media/platform/mediatek/jpeg/built-in.a
AR drivers/media/platform/mediatek/mdp/built-in.a
AR drivers/media/platform/mediatek/vcodec/built-in.a
AR drivers/media/platform/mediatek/vpu/built-in.a
CC fs/btrfs/ordered-data.o
AR drivers/media/platform/mediatek/mdp3/built-in.a
AR drivers/media/platform/mediatek/built-in.a
CC fs/namespace.o
AR drivers/media/platform/microchip/built-in.a
CC mm/hugetlb_vmemmap.o
AR drivers/media/platform/nvidia/tegra-vde/built-in.a
AR drivers/media/platform/nvidia/built-in.a
CC [M] drivers/net/phy/ax88796b.o
LD [M] drivers/net/vxlan/vxlan.o
AR drivers/media/pci/ttpci/built-in.a
AR drivers/media/platform/nxp/dw100/built-in.a
AR drivers/media/pci/b2c2/built-in.a
AR drivers/media/platform/nxp/imx-jpeg/built-in.a
AR drivers/media/platform/nxp/built-in.a
AR drivers/media/pci/pluto2/built-in.a
AR drivers/media/pci/dm1105/built-in.a
AR drivers/media/platform/qcom/camss/built-in.a
AR drivers/media/pci/pt1/built-in.a
CC [M] drivers/gpu/drm/i915/i915_getparam.o
CC drivers/net/net_failover.o
CC [M] drivers/net/dummy.o
AR drivers/media/platform/qcom/venus/built-in.a
AR drivers/media/pci/pt3/built-in.a
AR drivers/media/platform/qcom/built-in.a
AR drivers/media/pci/mantis/built-in.a
AR drivers/media/platform/renesas/rcar-vin/built-in.a
AR drivers/media/pci/ngene/built-in.a
AR drivers/media/platform/renesas/rzg2l-cru/built-in.a
AR drivers/media/pci/ddbridge/built-in.a
AR drivers/media/platform/rockchip/rga/built-in.a
AR drivers/rtc/built-in.a
AR drivers/media/platform/renesas/vsp1/built-in.a
AR drivers/media/pci/saa7146/built-in.a
AR drivers/media/platform/rockchip/rkisp1/built-in.a
CC drivers/acpi/acpica/psobject.o
AR drivers/media/platform/renesas/built-in.a
AR drivers/media/platform/rockchip/built-in.a
AR drivers/media/pci/smipcie/built-in.a
CC kernel/watchdog.o
CC [M] drivers/i2c/i2c-smbus.o
AR drivers/media/platform/samsung/exynos-gsc/built-in.a
CC drivers/scsi/scsi_pm.o
AR drivers/media/pci/netup_unidvb/built-in.a
AR drivers/media/platform/samsung/exynos4-is/built-in.a
AR drivers/media/platform/samsung/s3c-camif/built-in.a
AR drivers/media/pci/intel/ipu3/built-in.a
AR drivers/media/pci/intel/built-in.a
AR drivers/media/platform/samsung/s5p-g2d/built-in.a
AR drivers/media/pci/built-in.a
CC arch/x86/kernel/stacktrace.o
AR drivers/media/platform/samsung/s5p-jpeg/built-in.a
AR drivers/media/platform/samsung/s5p-mfc/built-in.a
CC [M] drivers/net/phy/bcm7xxx.o
AR drivers/media/platform/samsung/built-in.a
AR drivers/media/platform/st/sti/bdisp/built-in.a
CC fs/seq_file.o
AR drivers/media/platform/sunxi/sun4i-csi/built-in.a
AR drivers/media/platform/st/sti/c8sectpfe/built-in.a
AR drivers/media/platform/st/sti/delta/built-in.a
AR drivers/media/platform/sunxi/sun6i-csi/built-in.a
AR drivers/media/platform/st/sti/hva/built-in.a
AR drivers/media/platform/st/stm32/built-in.a
AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a
CC net/ipv4/inet_fragment.o
AR drivers/media/platform/st/built-in.a
AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a
CC [M] fs/cifs/winucase.o
AR drivers/media/platform/sunxi/sun8i-di/built-in.a
AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a
CC net/ipv4/ping.o
AR drivers/media/platform/sunxi/built-in.a
AR drivers/media/platform/ti/am437x/built-in.a
CC drivers/usb/host/ehci-pci.o
CC drivers/usb/host/ohci-hcd.o
AR drivers/media/platform/ti/cal/built-in.a
CC [M] drivers/net/macvlan.o
AR drivers/media/platform/ti/vpe/built-in.a
CC lib/clz_ctz.o
CC drivers/scsi/scsi_bsg.o
AR drivers/media/platform/ti/davinci/built-in.a
AR drivers/media/platform/ti/omap/built-in.a
CC [M] drivers/i2c/busses/i2c-isch.o
AR drivers/media/platform/ti/omap3isp/built-in.a
AR drivers/media/platform/ti/built-in.a
CC drivers/usb/core/driver.o
CC drivers/usb/host/ohci-pci.o
AR drivers/media/platform/verisilicon/built-in.a
CC drivers/usb/host/uhci-hcd.o
AR drivers/media/platform/via/built-in.a
AR drivers/media/platform/xilinx/built-in.a
AR drivers/net/ethernet/engleder/built-in.a
AR drivers/media/platform/built-in.a
CC net/ipv6/proc.o
CC [M] drivers/net/usb/asix_devices.o
CC kernel/watchdog_hld.o
CC [M] drivers/net/usb/asix_common.o
AR drivers/media/usb/b2c2/built-in.a
CC drivers/usb/storage/option_ms.o
AR drivers/media/usb/dvb-usb/built-in.a
AR drivers/media/usb/dvb-usb-v2/built-in.a
CC lib/bsearch.o
AR drivers/media/usb/s2255/built-in.a
AR drivers/media/usb/siano/built-in.a
AR drivers/media/usb/ttusb-budget/built-in.a
CC [M] drivers/ptp/ptp_chardev.o
AR drivers/media/usb/ttusb-dec/built-in.a
AR drivers/media/usb/built-in.a
CC drivers/usb/storage/usual-tables.o
CC drivers/power/supply/power_supply_leds.o
CC drivers/acpi/acpica/psopcode.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_crtc.o
AR drivers/media/mmc/siano/built-in.a
AR drivers/media/mmc/built-in.a
AR drivers/media/firewire/built-in.a
AR drivers/media/spi/built-in.a
AR drivers/media/test-drivers/built-in.a
CC drivers/power/supply/power_supply_hwmon.o
AR drivers/media/built-in.a
CC drivers/usb/serial/bus.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.o
CC [M] drivers/net/phy/bcm87xx.o
CC arch/x86/kernel/reboot.o
AR drivers/input/built-in.a
CC drivers/scsi/scsi_common.o
CC drivers/hwmon/hwmon.o
CC drivers/scsi/sd.o
CC [M] drivers/hwmon/acpi_power_meter.o
CC [M] drivers/net/mii.o
CC [M] drivers/hwmon/coretemp.o
CC [M] drivers/net/mdio.o
CC [M] fs/cifs/smb2ops.o
CC [M] drivers/gpu/drm/i915/i915_ioctl.o
CC drivers/acpi/acpica/psopinfo.o
CC net/ipv4/ip_tunnel_core.o
CC drivers/scsi/sg.o
CC [M] drivers/net/phy/bcm-phy-lib.o
CC drivers/usb/core/config.o
CC [M] drivers/i2c/busses/i2c-ismt.o
CC lib/find_bit.o
CC drivers/usb/host/xhci.o
AR drivers/usb/storage/built-in.a
CC [M] drivers/i2c/busses/i2c-piix4.o
CC mm/sparse.o
CC kernel/seccomp.o
CC kernel/relay.o
AR drivers/power/supply/built-in.a
AR drivers/power/built-in.a
CC mm/sparse-vmemmap.o
CC [M] drivers/gpu/drm/nouveau/nvif/object.o
CC drivers/usb/gadget/udc/core.o
AR drivers/usb/gadget/function/built-in.a
CC mm/mmu_notifier.o
CC drivers/usb/serial/console.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC [M] drivers/ptp/ptp_sysfs.o
CC drivers/acpi/acpica/psparse.o
CC lib/llist.o
CC [M] drivers/net/phy/broadcom.o
CC lib/memweight.o
CC drivers/usb/core/file.o
CC lib/kfifo.o
CC fs/btrfs/extent_io.o
CC drivers/usb/core/buffer.o
CC drivers/scsi/scsi_sysfs.o
CC arch/x86/kernel/msr.o
CC net/ipv6/syncookies.o
CC [M] arch/x86/kvm/vmx/pmu_intel.o
CC mm/ksm.o
CC drivers/usb/gadget/usbstring.o
AR drivers/usb/gadget/legacy/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/atom.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fence.o
CC [M] drivers/net/usb/ax88172a.o
AR drivers/thermal/broadcom/built-in.a
AR drivers/thermal/samsung/built-in.a
CC drivers/watchdog/watchdog_core.o
CC drivers/acpi/acpica/psscope.o
CC drivers/thermal/intel/intel_tcc.o
CC [M] drivers/gpu/drm/i915/i915_irq.o
CC [M] drivers/gpu/drm/ast/ast_drv.o
AR drivers/hwmon/built-in.a
CC drivers/usb/serial/ftdi_sio.o
CC [M] drivers/gpu/drm/ast/ast_i2c.o
CC drivers/thermal/intel/therm_throt.o
CC [M] drivers/gpu/drm/ast/ast_main.o
CC [M] drivers/gpu/drm/i915/i915_mitigations.o
CC [M] drivers/gpu/drm/nouveau/nvif/client.o
AR drivers/thermal/st/built-in.a
CC mm/slub.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvif/conn.o
CC drivers/usb/serial/pl2303.o
CC [M] drivers/ptp/ptp_vclock.o
CC [M] drivers/net/tun.o
CC drivers/usb/core/sysfs.o
CC [M] drivers/i2c/busses/i2c-designware-pcidrv.o
CC [M] drivers/md/persistent-data/dm-array.o
CC drivers/usb/core/endpoint.o
CC fs/xattr.o
CC fs/libfs.o
CC arch/x86/kernel/cpuid.o
CC [M] fs/cifs/smb2maperror.o
CC drivers/acpi/acpica/pstree.o
CC drivers/usb/gadget/config.o
CC net/ipv4/gre_offload.o
CC lib/percpu-refcount.o
CC [M] drivers/net/phy/lxt.o
CC [M] drivers/net/phy/realtek.o
CC drivers/usb/gadget/udc/trace.o
CC drivers/usb/host/xhci-mem.o
CC fs/fs-writeback.o
CC [M] drivers/net/usb/ax88179_178a.o
CC kernel/utsname_sysctl.o
CC arch/x86/kernel/early-quirks.o
CC drivers/acpi/acpica/psutils.o
CC [M] drivers/gpu/drm/nouveau/nvif/device.o
CC drivers/watchdog/watchdog_dev.o
CC [M] drivers/gpu/drm/i915/i915_module.o
CC [M] drivers/ptp/ptp_kvm_x86.o
CC net/ipv6/mip6.o
CC [M] drivers/gpu/drm/nouveau/nvif/disp.o
CC [M] drivers/net/veth.o
CC arch/x86/kernel/smp.o
CC [M] drivers/gpu/drm/nouveau/nvif/driver.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC kernel/delayacct.o
CC [M] drivers/gpu/drm/ast/ast_mm.o
CC drivers/usb/host/xhci-ext-caps.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o
CC arch/x86/kernel/smpboot.o
CC [M] drivers/ptp/ptp_kvm_common.o
LD [M] drivers/i2c/busses/i2c-designware-pci.o
CC [M] drivers/gpu/drm/i915/i915_params.o
CC [M] drivers/md/persistent-data/dm-bitset.o
AR drivers/i2c/busses/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.o
CC [M] drivers/i2c/i2c-mux.o
AR drivers/scsi/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvif/event.o
CC kernel/taskstats.o
CC drivers/opp/core.o
CC drivers/acpi/acpica/pswalk.o
CC lib/rhashtable.o
CC drivers/usb/core/devio.o
AR drivers/usb/serial/built-in.a
CC drivers/opp/cpu.o
CC [M] drivers/thermal/intel/intel_menlow.o
CC [M] drivers/gpu/drm/i915/i915_pci.o
CC net/ipv4/metrics.o
CC net/ipv4/netlink.o
CC kernel/tsacct.o
CC [M] drivers/net/phy/smsc.o
CC drivers/acpi/acpica/psxface.o
CC [M] drivers/gpu/drm/nouveau/nvif/fifo.o
LD [M] drivers/ptp/ptp.o
CC drivers/usb/core/notify.o
CC [M] fs/cifs/smb2transport.o
CC [M] fs/cifs/smb2misc.o
CC fs/pnode.o
CC [M] drivers/gpu/drm/xe/xe_device.o
CC arch/x86/kernel/tsc_sync.o
CC kernel/tracepoint.o
AR drivers/i2c/built-in.a
CC drivers/acpi/acpica/rsaddr.o
CC [M] drivers/gpu/drm/nouveau/nvif/head.o
LD [M] drivers/ptp/ptp_kvm.o
AR drivers/usb/gadget/udc/built-in.a
CC [M] drivers/md/persistent-data/dm-block-manager.o
CC fs/btrfs/volumes.o
CC drivers/usb/gadget/epautoconf.o
CC [M] drivers/net/usb/cdc_ether.o
CC drivers/watchdog/softdog.o
CC [M] drivers/gpu/drm/ast/ast_mode.o
CC fs/splice.o
CC drivers/usb/core/generic.o
CC drivers/usb/host/xhci-ring.o
CC drivers/cpufreq/cpufreq.o
CC [M] drivers/gpu/drm/nouveau/nvif/mem.o
CC drivers/cpufreq/freq_table.o
CC net/ipv6/addrconf_core.o
CC mm/migrate.o
CC [M] drivers/net/usb/cdc_eem.o
CC arch/x86/kernel/setup_percpu.o
AR drivers/thermal/intel/built-in.a
AR drivers/thermal/qcom/built-in.a
AR drivers/thermal/tegra/built-in.a
CC drivers/acpi/acpica/rscalc.o
AR drivers/thermal/mediatek/built-in.a
CC drivers/thermal/thermal_core.o
CC arch/x86/kernel/ftrace.o
AS arch/x86/kernel/ftrace_64.o
CC kernel/latencytop.o
CC drivers/usb/core/quirks.o
CC mm/migrate_device.o
AR drivers/watchdog/built-in.a
CC drivers/usb/host/xhci-hub.o
CC drivers/usb/gadget/composite.o
CC [M] drivers/gpu/drm/nouveau/nvif/mmu.o
CC drivers/thermal/thermal_sysfs.o
CC drivers/usb/host/xhci-dbg.o
CC fs/sync.o
CC [M] drivers/md/persistent-data/dm-space-map-common.o
CC kernel/irq_work.o
LD [M] drivers/net/phy/aquantia.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_object.o
AR drivers/net/phy/built-in.a
CC drivers/usb/core/devices.o
CC [M] drivers/md/persistent-data/dm-space-map-disk.o
CC drivers/gpu/drm/drm_mipi_dsi.o
CC lib/base64.o
CC drivers/cpufreq/cpufreq_performance.o
CC [M] drivers/gpu/drm/i915/i915_scatterlist.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC net/ipv4/nexthop.o
CC drivers/acpi/acpica/rscreate.o
CC lib/once.o
CC drivers/usb/gadget/functions.o
CC drivers/opp/debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvif/outp.o
CC fs/btrfs/async-thread.o
CC drivers/acpi/proc.o
CC [M] drivers/gpu/drm/nouveau/nvif/timer.o
CC drivers/usb/core/phy.o
CC [M] drivers/net/usb/smsc75xx.o
CC [M] arch/x86/kvm/vmx/vmcs12.o
CC [M] drivers/md/persistent-data/dm-space-map-metadata.o
CC net/ipv6/exthdrs_core.o
CC arch/x86/kernel/trace_clock.o
CC kernel/static_call.o
CC drivers/acpi/acpica/rsdumpinfo.o
CC lib/refcount.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gart.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.o
CC arch/x86/kernel/trace.o
CC [M] drivers/gpu/drm/xe/xe_engine.o
CC net/ipv6/ip6_checksum.o
CC drivers/cpufreq/cpufreq_ondemand.o
CC drivers/usb/host/xhci-trace.o
CC drivers/thermal/thermal_trip.o
CC [M] drivers/gpu/drm/ast/ast_post.o
CC drivers/cpufreq/cpufreq_governor.o
CC net/ipv6/ip6_icmp.o
CC kernel/static_call_inline.o
CC drivers/acpi/acpica/rsinfo.o
AR drivers/opp/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvif/vmm.o
CC [M] arch/x86/kvm/vmx/hyperv.o
CC drivers/usb/core/port.o
CC lib/usercopy.o
CC [M] fs/cifs/smb2pdu.o
CC drivers/thermal/thermal_helpers.o
CC drivers/usb/gadget/configfs.o
CC [M] drivers/md/persistent-data/dm-transaction-manager.o
CC arch/x86/kernel/rethook.o
CC drivers/acpi/bus.o
CC mm/huge_memory.o
CC [M] drivers/gpu/drm/nouveau/nvif/user.o
CC drivers/usb/core/hcd-pci.o
CC net/ipv6/output_core.o
CC [M] drivers/gpu/drm/i915/i915_suspend.o
CC fs/btrfs/ioctl.o
CC [M] drivers/gpu/drm/ast/ast_dp501.o
CC drivers/acpi/glue.o
CC drivers/acpi/acpica/rsio.o
CC drivers/usb/core/usb-acpi.o
CC lib/errseq.o
CC net/ipv6/protocol.o
CC lib/bucket_locks.o
CC [M] drivers/md/persistent-data/dm-btree.o
CC drivers/thermal/thermal_hwmon.o
CC drivers/thermal/gov_fair_share.o
CC [M] drivers/gpu/drm/ast/ast_dp.o
CC kernel/user-return-notifier.o
CC drivers/cpufreq/cpufreq_governor_attr_set.o
CC [M] drivers/gpu/drm/nouveau/nvif/userc361.o
CC kernel/padata.o
CC drivers/thermal/gov_step_wise.o
CC fs/utimes.o
CC drivers/cpufreq/acpi-cpufreq.o
CC arch/x86/kernel/crash_core_64.o
CC drivers/acpi/scan.o
CC drivers/thermal/gov_user_space.o
CC [M] drivers/usb/class/usbtmc.o
CC drivers/acpi/acpica/rsirq.o
CC [M] drivers/md/persistent-data/dm-btree-remove.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_display.o
CC [M] drivers/md/persistent-data/dm-btree-spine.o
CC drivers/acpi/resource.o
CC [M] arch/x86/kvm/vmx/nested.o
CC lib/generic-radix-tree.o
CC drivers/acpi/acpica/rslist.o
CC drivers/cpufreq/intel_pstate.o
CC arch/x86/kernel/module.o
CC drivers/acpi/acpi_processor.o
CC fs/d_path.o
CC drivers/acpi/acpica/rsmemory.o
CC drivers/usb/gadget/u_f.o
CC net/ipv6/ip6_offload.o
CC [M] arch/x86/kvm/vmx/posted_intr.o
LD [M] arch/x86/kvm/kvm.o
CC drivers/acpi/processor_core.o
AR drivers/usb/core/built-in.a
CC fs/stack.o
CC lib/string_helpers.o
CC drivers/usb/host/xhci-debugfs.o
CC lib/hexdump.o
AR drivers/thermal/built-in.a
CC [M] drivers/gpu/drm/xe/xe_exec.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/client.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC drivers/acpi/acpica/rsmisc.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.o
CC lib/kstrtox.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gem.o
CC net/ipv6/tcpv6_offload.o
CC [M] drivers/gpu/drm/i915/i915_switcheroo.o
CC [M] drivers/net/usb/smsc95xx.o
CC drivers/acpi/acpica/rsserial.o
CC [M] drivers/net/usb/mcs7830.o
LD [M] drivers/gpu/drm/ast/ast.o
CC drivers/cpuidle/governors/menu.o
CC drivers/mmc/core/core.o
AR drivers/ufs/built-in.a
CC drivers/acpi/acpica/rsutils.o
CC drivers/mmc/host/sdhci.o
CC kernel/jump_label.o
CC drivers/usb/host/xhci-pci.o
CC kernel/context_tracking.o
CC drivers/mmc/host/sdhci-pci-core.o
AR drivers/usb/gadget/built-in.a
CC drivers/mmc/core/bus.o
AR drivers/leds/trigger/built-in.a
CC [M] drivers/leds/trigger/ledtrig-audio.o
CC drivers/mmc/core/host.o
CC arch/x86/kernel/early_printk.o
AR drivers/leds/blink/built-in.a
CC fs/fs_struct.o
CC fs/statfs.o
AR drivers/leds/simple/built-in.a
LD [M] drivers/md/persistent-data/dm-persistent-data.o
CC fs/fs_pin.o
CC drivers/md/md.o
CC drivers/mmc/host/sdhci-pci-o2micro.o
UPD arch/x86/kvm/kvm-asm-offsets.h
CC [M] drivers/gpu/drm/i915/i915_sysfs.o
CC drivers/acpi/acpica/rsxface.o
CC drivers/mmc/host/sdhci-pci-arasan.o
CC drivers/md/md-bitmap.o
CC fs/nsfs.o
CC arch/x86/kernel/hpet.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/engine.o
CC drivers/cpuidle/governors/haltpoll.o
CC lib/debug_info.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/enum.o
CC drivers/leds/led-core.o
CC drivers/acpi/acpica/tbdata.o
CC [M] drivers/gpu/drm/i915/i915_utils.o
CC mm/khugepaged.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC fs/fs_types.o
CC drivers/cpuidle/cpuidle.o
CC [M] drivers/gpu/drm/i915/intel_clock_gating.o
CC drivers/acpi/processor_pdc.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ring.o
CC kernel/iomem.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
AR drivers/net/ethernet/ezchip/built-in.a
AR drivers/net/ethernet/fungible/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/core/event.o
AR drivers/net/ethernet/huawei/built-in.a
CC drivers/acpi/ec.o
AR drivers/net/ethernet/i825xx/built-in.a
CC drivers/leds/led-class.o
CC [M] drivers/net/ethernet/intel/e1000/e1000_main.o
CC drivers/leds/led-triggers.o
AR drivers/net/ethernet/microsoft/built-in.a
CC net/ipv6/exthdrs_offload.o
CC [M] drivers/net/ethernet/intel/e1000/e1000_hw.o
AR drivers/net/ethernet/litex/built-in.a
CC [M] drivers/net/ethernet/intel/e1000/e1000_ethtool.o
CC net/ipv4/udp_tunnel_stub.o
CC [M] drivers/net/ethernet/intel/e1000/e1000_param.o
CC drivers/mmc/core/mmc.o
CC drivers/md/md-autodetect.o
CC mm/page_counter.o
CC kernel/rseq.o
CC arch/x86/kernel/amd_nb.o
CC drivers/acpi/acpica/tbfadt.o
AR drivers/usb/host/built-in.a
AR drivers/usb/built-in.a
AS [M] arch/x86/kvm/vmx/vmenter.o
AR drivers/firmware/arm_ffa/built-in.a
CC arch/x86/kernel/kvm.o
AR drivers/firmware/arm_scmi/built-in.a
AR drivers/firmware/broadcom/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_cs.o
AR drivers/firmware/cirrus/built-in.a
CC [M] drivers/gpu/drm/i915/intel_device_info.o
AR drivers/firmware/meson/built-in.a
AR drivers/crypto/stm32/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/core/firmware.o
CC drivers/clocksource/acpi_pm.o
AR drivers/cpuidle/governors/built-in.a
AR drivers/crypto/xilinx/built-in.a
CC arch/x86/kernel/kvmclock.o
AR drivers/crypto/hisilicon/built-in.a
AR drivers/crypto/keembay/built-in.a
AR drivers/crypto/built-in.a
CC fs/fs_context.o
CC drivers/mmc/host/sdhci-pci-dwc-mshc.o
CC drivers/hid/usbhid/hid-core.o
CC drivers/firmware/efi/libstub/efi-stub-helper.o
CC drivers/hid/usbhid/hiddev.o
CC drivers/firmware/efi/libstub/gop.o
CC drivers/cpuidle/driver.o
AR drivers/cpufreq/built-in.a
AR drivers/firmware/imx/built-in.a
CC fs/fs_parser.o
AR drivers/firmware/psci/built-in.a
CC drivers/cpuidle/governor.o
CC fs/fsopen.o
CC fs/btrfs/locking.o
CC drivers/firmware/efi/efi-bgrt.o
CC [M] drivers/net/usb/usbnet.o
AR drivers/leds/built-in.a
AR drivers/staging/media/built-in.a
CC drivers/acpi/acpica/tbfind.o
AR drivers/staging/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt.o
CC lib/iomap.o
AR drivers/platform/x86/amd/built-in.a
CC drivers/platform/x86/intel/pmc/core.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC [M] drivers/platform/x86/intel/pmt/class.o
CC net/ipv6/inet6_hashtables.o
CC drivers/platform/x86/p2sb.o
CC drivers/platform/x86/intel/turbo_max_3.o
CC drivers/clocksource/i8253.o
CC net/ipv4/sysctl_net_ipv4.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_bios.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle_sysfs.o
CC drivers/cpuidle/sysfs.o
CC arch/x86/kernel/paravirt.o
CC drivers/cpuidle/poll_state.o
CC drivers/hid/hid-core.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/gpuobj.o
CC drivers/acpi/acpica/tbinstal.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
GZIP kernel/config_data.gz
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC kernel/configs.o
AR drivers/platform/surface/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/core/intr.o
CC drivers/firmware/efi/libstub/secureboot.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/ioctl.o
CC mm/memcontrol.o
CC drivers/cpuidle/cpuidle-haltpoll.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC lib/pci_iomap.o
CC drivers/hid/hid-input.o
AR drivers/clocksource/built-in.a
CC [M] drivers/gpu/drm/i915/intel_memory_region.o
CC drivers/acpi/dock.o
CC [M] drivers/gpu/drm/i915/intel_pcode.o
CC [M] drivers/gpu/drm/i915/intel_region_ttm.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/memory.o
CC [M] drivers/platform/x86/intel/pmt/telemetry.o
CC drivers/mmc/host/sdhci-pci-gli.o
CC drivers/md/dm-uevent.o
AR drivers/net/ethernet/microchip/built-in.a
CC lib/iomap_copy.o
CC lib/devres.o
CC drivers/acpi/acpica/tbprint.o
CC drivers/platform/x86/intel/pmc/spt.o
CC drivers/mailbox/mailbox.o
AR drivers/cpuidle/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
CC lib/check_signature.o
AR kernel/built-in.a
CC drivers/acpi/acpica/tbutils.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/mm.o
CC drivers/firmware/efi/efi.o
CC drivers/mmc/core/mmc_ops.o
CC drivers/platform/x86/pmc_atom.o
CC arch/x86/kernel/pvclock.o
CC arch/x86/kernel/pcspeaker.o
CC drivers/firmware/efi/libstub/tpm.o
CC lib/interval_tree.o
CC drivers/platform/x86/intel/pmc/cnp.o
AR drivers/hid/usbhid/built-in.a
CC fs/btrfs/orphan.o
CC fs/btrfs/export.o
CC [M] drivers/platform/x86/wmi.o
CC mm/vmpressure.o
CC [M] fs/cifs/smb2inode.o
CC drivers/hid/hid-quirks.o
CC [M] drivers/platform/x86/wmi-bmof.o
CC [M] drivers/platform/x86/intel/vsec.o
CC drivers/md/dm.o
CC fs/init.o
CC drivers/acpi/acpica/tbxface.o
CC [M] drivers/platform/x86/intel/pmt/crashlog.o
CC drivers/firmware/efi/vars.o
CC net/ipv6/mcast_snoop.o
CC drivers/hid/hid-debug.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/object.o
CC lib/assoc_array.o
CC lib/list_debug.o
CC lib/debugobjects.o
CC drivers/firmware/efi/reboot.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.o
CC net/ipv4/proc.o
CC drivers/mailbox/pcc.o
CC drivers/firmware/efi/memattr.o
CC drivers/mmc/core/sd.o
CC arch/x86/kernel/check.o
CC drivers/platform/x86/intel/pmc/icl.o
CC arch/x86/kernel/uprobes.o
CC lib/bitrev.o
CC drivers/acpi/acpica/tbxfload.o
CC drivers/mmc/core/sd_ops.o
CC [M] drivers/platform/x86/mxm-wmi.o
CC drivers/firmware/efi/tpm.o
CC [M] drivers/gpu/drm/i915/intel_runtime_pm.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC [M] drivers/net/usb/cdc_ncm.o
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC drivers/firmware/efi/libstub/file.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
CC arch/x86/kernel/perf_regs.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC mm/swap_cgroup.o
CC mm/hugetlb_cgroup.o
CC drivers/firmware/efi/memmap.o
CC drivers/mmc/core/sdio.o
CC [M] drivers/net/usb/r8153_ecm.o
CC drivers/mmc/host/sdhci-acpi.o
CC [M] drivers/platform/x86/intel_ips.o
CC drivers/mmc/core/sdio_ops.o
LD [M] drivers/platform/x86/intel/pmt/pmt_class.o
CC drivers/md/dm-table.o
LD [M] drivers/platform/x86/intel/pmt/pmt_telemetry.o
CC drivers/md/dm-target.o
LD [M] drivers/platform/x86/intel/pmt/pmt_crashlog.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC net/ipv4/syncookies.o
CC drivers/platform/x86/intel/pmc/tgl.o
CC drivers/acpi/acpica/tbxfroot.o
AR drivers/firmware/smccc/built-in.a
CC drivers/mmc/host/cqhci-core.o
CC [M] drivers/gpu/drm/drm_aperture.o
CC [M] drivers/mmc/host/sdhci-pltfm.o
AR drivers/mailbox/built-in.a
CC lib/crc16.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
CC drivers/hid/hidraw.o
CC drivers/platform/x86/intel/pmc/adl.o
CC fs/btrfs/tree-log.o
CC lib/crc-t10dif.o
CC drivers/firmware/efi/esrt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/oproxy.o
CC fs/kernel_read_file.o
CC [M] drivers/platform/x86/intel/rst.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_dp.o
CC [M] net/ipv6/ip6_udp_tunnel.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC arch/x86/kernel/tracepoint.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.o
LD [M] drivers/net/ethernet/intel/e1000/e1000.o
CC drivers/firmware/efi/libstub/mem.o
CC [M] drivers/gpu/drm/i915/intel_sbi.o
CC drivers/acpi/acpica/utaddress.o
CC [M] drivers/net/ethernet/intel/e1000e/82571.o
CC [M] drivers/net/ethernet/intel/igb/igb_main.o
CC drivers/mmc/core/sdio_bus.o
CC [M] drivers/net/ethernet/intel/igb/igb_ethtool.o
CC [M] drivers/gpu/drm/i915/intel_step.o
CC [M] drivers/gpu/drm/drm_atomic.o
CC [M] drivers/net/ethernet/intel/igc/igc_main.o
CC drivers/acpi/pci_root.o
CC [M] drivers/net/ethernet/intel/igc/igc_mac.o
CC drivers/platform/x86/intel/pmc/mtl.o
CC [M] drivers/net/ethernet/intel/igc/igc_i225.o
CC drivers/platform/x86/intel/pmc/pltdrv.o
CC [M] drivers/gpu/drm/i915/intel_uncore.o
HOSTCC lib/gen_crc32table
CC [M] drivers/gpu/drm/i915/intel_wakeref.o
CC drivers/mmc/core/sdio_cis.o
CC arch/x86/kernel/itmt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/option.o
CC net/ipv4/esp4.o
CC lib/libcrc32c.o
CC [M] fs/cifs/smb2file.o
CC [M] drivers/net/ethernet/intel/e1000e/ich8lan.o
AR drivers/firmware/tegra/built-in.a
CC drivers/hid/hid-generic.o
CC [M] fs/cifs/cifsacl.o
CC fs/mnt_idmapping.o
CC drivers/acpi/acpica/utalloc.o
LD [M] arch/x86/kvm/kvm-intel.o
CC drivers/mmc/core/sdio_io.o
CC drivers/hid/hid-a4tech.o
CC mm/kmemleak.o
CC drivers/hid/hid-apple.o
CC [M] fs/cifs/fs_context.o
CC drivers/firmware/efi/libstub/random.o
CC drivers/md/dm-linear.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/ramht.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC lib/xxhash.o
AR drivers/platform/x86/intel/pmc/built-in.a
LD [M] drivers/platform/x86/intel/intel_vsec.o
LD [M] drivers/platform/x86/intel/intel-rst.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/subdev.o
AR drivers/platform/x86/intel/built-in.a
AR drivers/platform/x86/built-in.a
AR drivers/platform/built-in.a
AR drivers/net/ethernet/mscc/built-in.a
AR net/ipv6/built-in.a
AR drivers/firmware/xilinx/built-in.a
AR drivers/net/ethernet/neterion/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/core/uevent.o
AR drivers/net/ethernet/netronome/built-in.a
CC [M] drivers/net/ethernet/intel/e1000e/80003es2lan.o
CC [M] drivers/net/ethernet/intel/e1000e/mac.o
CC [M] drivers/net/ethernet/intel/e1000e/manage.o
CC [M] drivers/net/ethernet/intel/igbvf/vf.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_main.o
CC [M] drivers/gpu/drm/i915/vlv_sideband.o
CC drivers/acpi/acpica/utascii.o
LD [M] drivers/net/usb/asix.o
CC arch/x86/kernel/umip.o
CC [M] drivers/gpu/drm/i915/vlv_suspend.o
AR drivers/mmc/host/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_trace_points.o
CC lib/genalloc.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_encoders.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sa.o
CC fs/remap_range.o
CC net/ipv4/esp4_offload.o
CC drivers/firmware/efi/efi-pstore.o
CC drivers/firmware/efi/cper.o
CC [M] drivers/gpu/drm/i915/soc/intel_dram.o
CC drivers/devfreq/devfreq.o
CC [M] drivers/gpu/drm/i915/soc/intel_gmch.o
CC [M] drivers/net/ethernet/intel/igc/igc_base.o
CC drivers/hid/hid-belkin.o
CC [M] drivers/net/ethernet/intel/igc/igc_nvm.o
CC [M] drivers/net/ethernet/intel/igc/igc_phy.o
CC lib/percpu_counter.o
CC lib/fault-inject.o
CC drivers/firmware/efi/libstub/randomalloc.o
CC drivers/acpi/acpica/utbuffer.o
CC drivers/mmc/core/sdio_irq.o
CC drivers/mmc/core/slot-gpio.o
CC drivers/hid/hid-cherry.o
CC drivers/hid/hid-chicony.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/fw.o
CC arch/x86/kernel/unwind_orc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/hs.o
CC drivers/firmware/efi/cper_cxl.o
CC [M] drivers/net/ethernet/intel/igbvf/mbx.o
CC lib/syscall.o
CC [M] drivers/net/ethernet/intel/e1000e/nvm.o
CC drivers/acpi/acpica/utcksum.o
CC drivers/mmc/core/regulator.o
CC [M] drivers/gpu/drm/drm_atomic_uapi.o
CC drivers/md/dm-stripe.o
CC [M] drivers/gpu/drm/drm_auth.o
CC [M] drivers/gpu/drm/drm_blend.o
CC drivers/acpi/acpica/utcopy.o
CC lib/dynamic_debug.o
CC drivers/firmware/efi/libstub/pci.o
CC [M] drivers/net/ethernet/intel/igc/igc_diag.o
CC [M] drivers/net/ethernet/intel/igc/igc_ethtool.o
CC [M] drivers/devfreq/governor_simpleondemand.o
CC [M] drivers/net/ethernet/intel/igc/igc_ptp.o
CC [M] drivers/net/ethernet/intel/e1000e/phy.o
CC [M] drivers/net/ethernet/intel/e1000e/param.o
CC lib/errname.o
CC drivers/mmc/core/debugfs.o
CC [M] drivers/net/ethernet/intel/igc/igc_dump.o
CC [M] drivers/net/ethernet/intel/igc/igc_tsn.o
CC net/ipv4/netfilter.o
CC net/ipv4/inet_diag.o
CC drivers/firmware/dmi_scan.o
CC mm/page_isolation.o
CC [M] drivers/gpu/drm/drm_bridge.o
CC drivers/acpi/acpica/utexcep.o
CC [M] drivers/net/ethernet/intel/ixgbevf/vf.o
CC drivers/hid/hid-cypress.o
CC [M] drivers/net/ethernet/intel/ixgb/ixgb_main.o
CC lib/nlattr.o
CC [M] drivers/net/ethernet/intel/ixgbevf/mbx.o
CC [M] drivers/net/ethernet/intel/igb/e1000_82575.o
CC arch/x86/kernel/callthunks.o
CC [M] drivers/net/ethernet/intel/igbvf/ethtool.o
CC drivers/firmware/efi/libstub/skip_spaces.o
CC drivers/firmware/efi/libstub/lib-cmdline.o
CC drivers/acpi/acpica/utdebug.o
CC [M] drivers/net/ethernet/intel/igc/igc_xdp.o
CC [M] fs/cifs/dns_resolve.o
AR drivers/net/ethernet/intel/built-in.a
CC [M] drivers/net/ethernet/intel/e100.o
CC [M] drivers/net/ethernet/intel/igbvf/netdev.o
CC drivers/md/dm-ioctl.o
CC drivers/md/dm-io.o
CC [M] drivers/gpu/drm/drm_cache.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/ls.o
CC drivers/firmware/efi/libstub/lib-ctype.o
CC drivers/firmware/efi/libstub/alignedmem.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
CC [M] drivers/devfreq/governor_performance.o
CC [M] drivers/net/ethernet/intel/ixgbevf/ethtool.o
CC lib/checksum.o
CC drivers/mmc/core/block.o
CC drivers/mmc/core/queue.o
CC mm/early_ioremap.o
CC drivers/acpi/acpica/utdecode.o
CC drivers/acpi/pci_link.o
CC drivers/hid/hid-ezkey.o
AR drivers/devfreq/built-in.a
CC [M] drivers/net/ethernet/intel/e1000e/ethtool.o
ASN.1 fs/cifs/cifs_spnego_negtokeninit.asn1.[ch]
CC drivers/md/dm-kcopyd.o
CC [M] fs/cifs/smb1ops.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_i2c.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm.o
CC [M] fs/cifs/cifssmb.o
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC [M] drivers/gpu/drm/drm_client.o
CC drivers/hid/hid-kensington.o
CC lib/cpu_rmap.o
CC drivers/firmware/efi/libstub/relocate.o
CC arch/x86/kernel/mmconf-fam10h_64.o
CC net/ipv4/tcp_diag.o
CC [M] drivers/net/ethernet/intel/igb/e1000_mac.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_common.o
CC drivers/hid/hid-lg.o
AR drivers/net/ethernet/ni/built-in.a
CC [M] drivers/gpu/drm/drm_client_modeset.o
CC drivers/acpi/acpica/utdelete.o
CC [M] drivers/gpu/drm/i915/soc/intel_pch.o
CC mm/cma.o
CC mm/secretmem.o
CC [M] drivers/net/ethernet/intel/e1000e/netdev.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC mm/userfaultfd.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/acr.o
CC arch/x86/kernel/vsmp_64.o
CC drivers/powercap/powercap_sys.o
CC drivers/powercap/intel_rapl_common.o
CC fs/btrfs/free-space-cache.o
CC drivers/powercap/intel_rapl_msr.o
CC [M] fs/cifs/cifs_spnego_negtokeninit.asn1.o
CC lib/dynamic_queue_limits.o
CC fs/btrfs/zlib.o
CC drivers/firmware/dmi-sysfs.o
AR drivers/net/ethernet/packetengines/built-in.a
CC [M] fs/cifs/asn1.o
CC drivers/acpi/pci_irq.o
AR drivers/perf/built-in.a
CC drivers/firmware/efi/libstub/printk.o
CC drivers/firmware/efi/libstub/vsprintf.o
CC drivers/acpi/acpica/uterror.o
CC lib/glob.o
AR drivers/net/ethernet/realtek/built-in.a
CC drivers/acpi/acpi_lpss.o
CC [M] drivers/net/ethernet/realtek/8139cp.o
AR drivers/net/ethernet/renesas/built-in.a
CC [M] drivers/net/ethernet/realtek/8139too.o
CC drivers/acpi/acpi_apd.o
AR drivers/net/ethernet/sfc/built-in.a
CC drivers/acpi/acpi_platform.o
CC [M] drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.o
AR arch/x86/kernel/built-in.a
CC drivers/firmware/efi/libstub/x86-stub.o
AR arch/x86/built-in.a
CC fs/btrfs/lzo.o
CC drivers/firmware/dmi-id.o
CC net/ipv4/udp_diag.o
CC mm/memremap.o
CC drivers/md/dm-sysfs.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC [M] drivers/net/ethernet/intel/ixgb/ixgb_hw.o
CC drivers/acpi/acpica/uteval.o
CC mm/hmm.o
CC lib/strncpy_from_user.o
LD [M] drivers/net/ethernet/intel/igc/igc.o
CC mm/memfd.o
CC drivers/md/dm-stats.o
CC drivers/acpi/acpi_pnp.o
CC [M] drivers/net/ethernet/intel/e1000e/ptp.o
CC drivers/firmware/memmap.o
CC fs/buffer.o
CC fs/btrfs/zstd.o
CC drivers/acpi/acpica/utglobal.o
CC drivers/acpi/acpica/uthex.o
CC drivers/hid/hid-lg-g15.o
CC [M] drivers/gpu/drm/i915/i915_memcpy.o
CC [M] drivers/net/ethernet/intel/ixgbevf/ipsec.o
CC mm/bootmem_info.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/flcn.o
CC drivers/acpi/power.o
CC [M] drivers/gpu/drm/drm_color_mgmt.o
CC drivers/acpi/event.o
CC [M] drivers/net/ethernet/intel/igb/e1000_nvm.o
CC [M] drivers/gpu/drm/drm_connector.o
AR drivers/mmc/core/built-in.a
AR drivers/mmc/built-in.a
CC drivers/acpi/acpica/utids.o
CC drivers/ras/ras.o
LD [M] drivers/net/ethernet/intel/igbvf/igbvf.o
AR drivers/powercap/built-in.a
CC drivers/ras/debugfs.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/base.o
CC [M] drivers/gpu/drm/i915/i915_mm.o
CC lib/strnlen_user.o
CC drivers/acpi/evged.o
STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o
STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.o
STUBCPY drivers/firmware/efi/libstub/file.stub.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
CC [M] drivers/gpu/drm/xe/xe_mmio.o
STUBCPY drivers/firmware/efi/libstub/gop.stub.o
CC drivers/acpi/acpica/utinit.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o
CC fs/btrfs/compression.o
STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o
STUBCPY drivers/firmware/efi/libstub/mem.stub.o
STUBCPY drivers/firmware/efi/libstub/pci.stub.o
STUBCPY drivers/firmware/efi/libstub/printk.stub.o
STUBCPY drivers/firmware/efi/libstub/random.stub.o
STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o
STUBCPY drivers/firmware/efi/libstub/relocate.stub.o
STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o
STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o
STUBCPY drivers/firmware/efi/libstub/tpm.stub.o
STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o
STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o
AR drivers/firmware/efi/libstub/lib.a
CC drivers/firmware/efi/runtime-wrappers.o
CC drivers/acpi/sysfs.o
CC net/ipv4/tcp_cubic.o
CC drivers/hid/hid-microsoft.o
CC [M] drivers/net/ethernet/intel/igb/e1000_phy.o
CC [M] drivers/net/ethernet/intel/igb/e1000_mbx.o
CC drivers/md/dm-rq.o
CC drivers/acpi/acpica/utlock.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_82599.o
CC [M] drivers/net/ethernet/intel/ixgb/ixgb_ee.o
CC lib/net_utils.o
CC net/ipv4/xfrm4_policy.o
AR mm/built-in.a
CC lib/sg_pool.o
CC net/ipv4/xfrm4_state.o
CC lib/stackdepot.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC drivers/acpi/property.o
AR drivers/hwtracing/intel_th/built-in.a
CC [M] drivers/gpu/drm/drm_crtc.o
CC [M] drivers/net/ethernet/realtek/r8169_main.o
CC net/ipv4/xfrm4_input.o
CC drivers/hid/hid-monterey.o
CC fs/btrfs/delayed-ref.o
CC [M] drivers/gpu/drm/i915/i915_sw_fence.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ib.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_pll.o
CC drivers/acpi/acpica/utmath.o
AR drivers/ras/built-in.a
CC drivers/acpi/acpica/utmisc.o
CC drivers/md/dm-io-rewind.o
CC [M] drivers/net/ethernet/realtek/r8169_firmware.o
CC drivers/android/binderfs.o
CC [M] drivers/net/ethernet/intel/igb/e1000_i210.o
CC drivers/nvmem/core.o
CC drivers/firmware/efi/dev-path-parser.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.o
CC [M] drivers/net/ethernet/intel/igb/igb_ptp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/fw.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.o
CC [M] drivers/net/ethernet/intel/igb/igb_hwmon.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.o
CC drivers/md/dm-builtin.o
CC drivers/acpi/acpi_cmos_rtc.o
CC fs/btrfs/relocation.o
CC drivers/android/binder.o
CC fs/mpage.o
CC lib/ucs2_string.o
CC [M] drivers/mtd/chips/chipreg.o
CC [M] drivers/net/ethernet/intel/ixgb/ixgb_ethtool.o
CC [M] drivers/gpu/drm/drm_displayid.o
CC fs/proc_namespace.o
CC [M] drivers/md/dm-bufio.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_82598.o
CC drivers/acpi/acpica/utmutex.o
CC fs/btrfs/delayed-inode.o
AR drivers/hid/built-in.a
CC fs/btrfs/scrub.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.o
CC [M] drivers/md/dm-bio-prison-v1.o
CC fs/direct-io.o
CC net/ipv4/xfrm4_output.o
CC [M] drivers/gpu/drm/drm_drv.o
CC [M] drivers/gpu/drm/i915/i915_sw_fence_work.o
CC lib/sbitmap.o
CC [M] drivers/gpu/drm/i915/i915_syncmap.o
CC drivers/firmware/efi/apple-properties.o
CC drivers/android/binder_alloc.o
CC net/ipv4/xfrm4_protocol.o
CC drivers/acpi/acpica/utnonansi.o
CC [M] drivers/gpu/drm/drm_dumb_buffers.o
CC [M] drivers/gpu/drm/drm_edid.o
CC [M] drivers/gpu/drm/drm_encoder.o
CC [M] drivers/uio/uio.o
CC [M] drivers/mtd/mtdcore.o
CC [M] net/ipv4/ip_tunnel.o
CC drivers/acpi/x86/apple.o
CC fs/btrfs/backref.o
CC fs/eventpoll.o
CC [M] drivers/mtd/mtdsuper.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sync.o
CC fs/anon_inodes.o
CC [M] net/ipv4/udp_tunnel_core.o
CC lib/group_cpus.o
CC [M] drivers/gpu/drm/i915/i915_user_extensions.o
AR drivers/nvmem/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/msgq.o
CC drivers/acpi/x86/utils.o
CC drivers/acpi/acpica/utobject.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_preempt_mgr.o
LD [M] fs/cifs/cifs.o
CC [M] net/ipv4/udp_tunnel_nic.o
AR drivers/net/ethernet/smsc/built-in.a
CC fs/signalfd.o
CC [M] drivers/net/ethernet/smsc/smsc9420.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC [M] lib/asn1_decoder.o
CC drivers/firmware/efi/earlycon.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.o
CC drivers/acpi/x86/s2idle.o
CC [M] drivers/md/dm-bio-prison-v2.o
CC [M] drivers/md/dm-crypt.o
CC [M] drivers/gpu/drm/i915/i915_ioc32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.o
LD [M] drivers/net/ethernet/intel/ixgbevf/ixgbevf.o
CC [M] drivers/net/ethernet/intel/ixgb/ixgb_param.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_phy.o
CC fs/btrfs/ulist.o
CC [M] drivers/gpu/drm/drm_file.o
LD [M] drivers/net/ethernet/intel/igb/igb.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.o
CC fs/btrfs/qgroup.o
CC drivers/acpi/acpica/utosi.o
CC [M] drivers/gpu/drm/i915/i915_debugfs.o
GEN lib/oid_registry_data.c
CC drivers/acpi/debugfs.o
CC [M] drivers/net/ethernet/realtek/r8169_phy_config.o
CC drivers/acpi/acpica/utownerid.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_virt.o
AR drivers/net/ethernet/socionext/built-in.a
CC [M] drivers/vfio/pci/vfio_pci_core.o
CC [M] drivers/vfio/vfio_main.o
AR drivers/net/ethernet/vertexcom/built-in.a
CC [M] drivers/vfio/group.o
AR drivers/net/ethernet/wangxun/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.o
CC [M] lib/oid_registry.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_x540.o
CC [M] drivers/gpu/drm/i915/i915_debugfs_params.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC drivers/acpi/acpica/utpredef.o
CC drivers/acpi/acpica/utresdecode.o
CC drivers/firmware/efi/cper-x86.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/v1.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC [M] drivers/vfio/iova_bitmap.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_x550.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_lib.o
CC drivers/acpi/acpica/utresrc.o
CC drivers/acpi/acpi_lpat.o
CC fs/btrfs/send.o
LD [M] drivers/net/ethernet/intel/e1000e/e1000e.o
CC fs/timerfd.o
AR lib/lib.a
GEN lib/crc32table.h
CC [M] drivers/md/dm-thin.o
CC lib/crc32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/gm200.o
CC [M] drivers/vfio/container.o
CC [M] drivers/pps/pps.o
CC [M] drivers/mtd/mtdconcat.o
CC [M] drivers/pps/kapi.o
CC [M] drivers/pps/sysfs.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.o
CC [M] drivers/gpu/drm/drm_fourcc.o
CC [M] drivers/bluetooth/btusb.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.o
LD [M] drivers/net/ethernet/intel/ixgb/ixgb.o
CC fs/btrfs/dev-replace.o
CC drivers/acpi/acpica/utstate.o
CC [M] drivers/bluetooth/btintel.o
LD [M] drivers/net/ethernet/realtek/r8169.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/gp102.o
CC drivers/acpi/acpica/utstring.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.o
CC fs/btrfs/raid56.o
CC drivers/acpi/acpi_lpit.o
CC drivers/acpi/prmt.o
CC drivers/acpi/acpi_pcc.o
AR drivers/firmware/efi/built-in.a
AR drivers/firmware/built-in.a
CC [M] drivers/gpu/drm/i915/display/intel_display_debugfs.o
CC drivers/acpi/acpica/utstrsuppt.o
CC drivers/acpi/acpica/utstrtoul64.o
CC [M] drivers/dca/dca-core.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/ga100.o
CC [M] drivers/dca/dca-sysfs.o
AR lib/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sched.o
CC [M] drivers/ssb/main.o
CC [M] drivers/vhost/net.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
AR net/ipv4/built-in.a
CC [M] drivers/vhost/vhost.o
LD [M] net/ipv4/udp_tunnel.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.o
AR net/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/ga102.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.o
CC [M] drivers/ssb/scan.o
CC [M] drivers/gpu/drm/i915/display/intel_pipe_crc.o
LD [M] drivers/pps/pps_core.o
CC [M] drivers/gpu/drm/i915/i915_pmu.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC [M] drivers/mtd/mtdpart.o
CC fs/eventfd.o
CC fs/userfaultfd.o
CC drivers/acpi/ac.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.o
CC drivers/acpi/acpica/utxface.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.o
CC [M] drivers/vfio/pci/vfio_pci_intrs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.o
CC [M] drivers/vhost/iotlb.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.o
CC [M] drivers/vfio/virqfd.o
CC [M] drivers/md/dm-thin-metadata.o
CC fs/btrfs/uuid-tree.o
CC [M] drivers/vfio/pci/vfio_pci_rdwr.o
CC [M] drivers/gpu/drm/drm_framebuffer.o
CC [M] drivers/vfio/pci/vfio_pci_config.o
CC drivers/acpi/button.o
LD [M] drivers/dca/dca.o
CC drivers/acpi/acpica/utxfinit.o
CC [M] drivers/mtd/mtdchar.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.o
CC drivers/acpi/acpica/utxferror.o
CC [M] drivers/ssb/sprom.o
CC fs/btrfs/props.o
CC [M] drivers/bluetooth/btbcm.o
CC drivers/acpi/acpica/utxfmutex.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC [M] drivers/bluetooth/btrtl.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
CC drivers/acpi/fan_core.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC fs/btrfs/free-space-tree.o
CC fs/btrfs/tree-checker.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.o
LD [M] drivers/md/dm-bio-prison.o
CC [M] drivers/vfio/vfio_iommu_type1.o
AR drivers/md/built-in.a
CC fs/aio.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.o
CC [M] drivers/gpu/drm/i915/gt/gen2_engine_cs.o
CC drivers/acpi/fan_attr.o
CC drivers/acpi/processor_driver.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.o
CC [M] drivers/gpu/drm/drm_gem.o
CC [M] drivers/gpu/drm/drm_ioctl.o
LD [M] drivers/vhost/vhost_iotlb.o
CC [M] drivers/gpu/drm/i915/gt/gen6_engine_cs.o
AR drivers/acpi/acpica/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.o
CC [M] drivers/ssb/pci.o
CC [M] drivers/vfio/pci/vfio_pci.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC drivers/acpi/processor_thermal.o
CC [M] drivers/gpu/drm/i915/gt/gen6_ppgtt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp108.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ids.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gv100.o
CC drivers/acpi/processor_idle.o
CC [M] drivers/gpu/drm/i915/gt/gen7_renderclear.o
CC drivers/acpi/processor_throttling.o
AR drivers/net/ethernet/xilinx/built-in.a
AR drivers/net/ethernet/synopsys/built-in.a
AR drivers/net/ethernet/pensando/built-in.a
CC [M] drivers/gpu/drm/drm_lease.o
CC fs/btrfs/space-info.o
CC [M] drivers/gpu/drm/i915/gt/gen8_engine_cs.o
LD [M] drivers/vhost/vhost_net.o
CC [M] drivers/gpu/drm/drm_managed.o
CC [M] drivers/gpu/drm/i915/gt/gen8_ppgtt.o
CC [M] drivers/ssb/pcihost_wrapper.o
CC fs/btrfs/block-rsv.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
LD [M] drivers/md/dm-thin-pool.o
GEN xe_wa_oob.c xe_wa_oob.h
GEN xe_wa_oob.c xe_wa_oob.h
LD [M] drivers/mtd/mtd.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
LD [M] drivers/vfio/vfio.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.o
LD [M] drivers/vfio/pci/vfio-pci-core.o
CC [M] drivers/ssb/driver_chipcommon.o
CC drivers/acpi/processor_perflib.o
CC drivers/acpi/container.o
CC [M] drivers/gpu/drm/drm_mm.o
CC drivers/acpi/thermal.o
LD [M] drivers/vfio/pci/vfio-pci.o
CC drivers/acpi/acpi_memhotplug.o
CC drivers/acpi/ioapic.o
CC fs/locks.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.o
CC [M] drivers/gpu/drm/drm_mode_config.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC fs/binfmt_script.o
AR drivers/android/built-in.a
CC [M] drivers/gpu/drm/i915/gt/intel_breadcrumbs.o
CC [M] drivers/gpu/drm/drm_mode_object.o
CC drivers/acpi/battery.o
CC drivers/acpi/hed.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga100.o
CC [M] drivers/gpu/drm/i915/gt/intel_context.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.o
CC [M] drivers/ssb/driver_chipcommon_pmu.o
CC [M] drivers/gpu/drm/drm_modes.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC drivers/acpi/bgrt.o
CC drivers/acpi/cppc_acpi.o
CC drivers/acpi/spcr.o
CC [M] drivers/ssb/driver_pcicore.o
CC drivers/acpi/acpi_pad.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC fs/binfmt_elf.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC [M] drivers/gpu/drm/i915/gt/intel_context_sseu.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_csa.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_cs.o
LD [M] drivers/net/ethernet/intel/ixgbe/ixgbe.o
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC [M] drivers/acpi/acpi_video.o
CC [M] drivers/acpi/video_detect.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC fs/btrfs/delalloc-space.o
CC fs/compat_binfmt_elf.o
CC [M] drivers/gpu/drm/drm_modeset_lock.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ras.o
AR drivers/net/ethernet/built-in.a
CC [M] drivers/gpu/drm/xe/xe_uc.o
AR drivers/net/built-in.a
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC [M] drivers/gpu/drm/drm_plane.o
CC fs/btrfs/block-group.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.o
CC [M] drivers/gpu/drm/drm_prime.o
CC [M] drivers/gpu/drm/drm_print.o
CC [M] drivers/gpu/drm/drm_property.o
CC fs/mbcache.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.o
CC fs/btrfs/discard.o
CC fs/btrfs/reflink.o
CC fs/btrfs/subpage.o
CC fs/btrfs/tree-mod-log.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
LD [M] drivers/ssb/ssb.o
CC fs/btrfs/extent-io-tree.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o
CC [M] drivers/gpu/drm/drm_syncobj.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_pm.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.o
CC fs/posix_acl.o
CC [M] drivers/gpu/drm/xe/xe_vm.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_user.o
CC [M] drivers/gpu/drm/xe/xe_vm_madvise.o
CC [M] drivers/gpu/drm/i915/gt/intel_execlists_submission.o
CC [M] drivers/gpu/drm/i915/gt/intel_ggtt.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC [M] drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
CC fs/btrfs/fs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.o
CC fs/coredump.o
CC [M] drivers/gpu/drm/drm_sysfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/g84.o
CC [M] drivers/gpu/drm/drm_trace_points.o
AR drivers/acpi/built-in.a
CC [M] drivers/gpu/drm/i915/gt/intel_gt.o
CC fs/btrfs/messages.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.o
CC fs/drop_caches.o
CC [M] drivers/gpu/drm/drm_vblank.o
CC [M] drivers/gpu/drm/drm_vblank_work.o
CC [M] drivers/gpu/drm/drm_vma_manager.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.o
CC [M] drivers/gpu/drm/drm_writeback.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o
CC fs/btrfs/bio.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o
CC fs/fhandle.o
CC [M] drivers/gpu/drm/xe/xe_display.o
LD [M] drivers/acpi/video.o
CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_debugfs.o
CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.o
CC fs/btrfs/lru_cache.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_irq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/tu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_umc.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rps.o
CC [M] drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o
CC [M] drivers/gpu/drm/lib/drm_random.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.o
CC [M] drivers/gpu/drm/drm_ioc32.o
CC fs/btrfs/acl.o
CC [M] drivers/gpu/drm/xe/display/ext/intel_clock_gating.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/base.o
CC [M] drivers/gpu/drm/drm_panel.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/bit.o
CC [M] drivers/gpu/drm/drm_pci.o
CC [M] drivers/gpu/drm/drm_debugfs.o
CC [M] drivers/gpu/drm/drm_debugfs_crc.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_mcr.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_pm.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_rap.o
CC [M] drivers/gpu/drm/drm_edid_load.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.o
CC [M] drivers/gpu/drm/xe/display/ext/intel_device_info.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/boost.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/conn.o
CC [M] drivers/gpu/drm/drm_panel_orientation_quirks.o
CC [M] drivers/gpu/drm/xe/display/ext/intel_dram.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/cstep.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_requests.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_sysfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o
CC [M] drivers/gpu/drm/drm_buddy.o
CC [M] drivers/gpu/drm/i915/gt/intel_gtt.o
CC [M] drivers/gpu/drm/xe/display/ext/intel_pch.o
CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o
CC [M] drivers/gpu/drm/drm_gem_shmem_helper.o
CC [M] drivers/gpu/drm/i915/gt/intel_llc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/drm_suballoc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/extdev.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.o
CC [M] drivers/gpu/drm/i915/gt/intel_lrc.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_mca.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/gpio.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/iccsense.o
CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/image.o
CC [M] drivers/gpu/drm/drm_atomic_helper.o
CC [M] drivers/gpu/drm/drm_atomic_state_helper.o
CC [M] drivers/gpu/drm/drm_bridge_connector.o
CC [M] drivers/gpu/drm/i915/gt/intel_migrate.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.o
CC [M] drivers/gpu/drm/i915/gt/intel_mocs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/npde.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.o
CC [M] drivers/gpu/drm/amd/amdgpu/cik.o
CC [M] drivers/gpu/drm/amd/amdgpu/cik_ih.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o
CC [M] drivers/gpu/drm/i915/gt/intel_ppgtt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o
AR fs/btrfs/built-in.a
CC [M] drivers/gpu/drm/i915/gt/intel_rc6.o
AR fs/built-in.a
CC [M] drivers/gpu/drm/i915/gt/intel_region_lmem.o
CC [M] drivers/gpu/drm/i915/gt/intel_renderstate.o
CC [M] drivers/gpu/drm/drm_crtc_helper.o
CC [M] drivers/gpu/drm/drm_damage_helper.o
CC [M] drivers/gpu/drm/drm_encoder_slave.o
CC [M] drivers/gpu/drm/i915/gt/intel_reset.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v8_0.o
CC [M] drivers/gpu/drm/drm_flip_work.o
CC [M] drivers/gpu/drm/i915/gt/intel_ring.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/pcir.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o
CC [M] drivers/gpu/drm/i915/gt/intel_ring_submission.o
CC [M] drivers/gpu/drm/drm_format_helper.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.o
CC [M] drivers/gpu/drm/i915/gt/intel_rps.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/pmu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/power_budget.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v7_0.o
CC [M] drivers/gpu/drm/i915/gt/intel_sa_media.o
CC [M] drivers/gpu/drm/drm_gem_atomic_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/ramcfg.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.o
CC [M] drivers/gpu/drm/i915/gt/intel_sseu.o
CC [M] drivers/gpu/drm/amd/amdgpu/cik_sdma.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v4_2.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o
CC [M] drivers/gpu/drm/drm_gem_framebuffer_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v2_0.o
CC [M] drivers/gpu/drm/drm_kms_helper_common.o
CC [M] drivers/gpu/drm/drm_modeset_helper.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o
CC [M] drivers/gpu/drm/amd/amdgpu/si.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v6_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v6_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o
CC [M] drivers/gpu/drm/i915/gt/intel_timeline.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.o
CC [M] drivers/gpu/drm/i915/gt/intel_wopcm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowof.o
CC [M] drivers/gpu/drm/drm_plane_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowpci.o
CC [M] drivers/gpu/drm/i915/gt/intel_workarounds.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowramin.o
CC [M] drivers/gpu/drm/i915/gt/shmem_utils.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowrom.o
CC [M] drivers/gpu/drm/i915/gt/sysfs_engines.o
CC [M] drivers/gpu/drm/drm_probe_helper.o
CC [M] drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o
CC [M] drivers/gpu/drm/i915/gt/gen6_renderstate.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o
CC [M] drivers/gpu/drm/drm_rect.o
CC [M] drivers/gpu/drm/drm_self_refresh_helper.o
CC [M] drivers/gpu/drm/i915/gt/gen7_renderstate.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o
CC [M] drivers/gpu/drm/drm_simple_kms_helper.o
CC [M] drivers/gpu/drm/i915/gt/gen8_renderstate.o
CC [M] drivers/gpu/drm/amd/amdgpu/si_ih.o
CC [M] drivers/gpu/drm/amd/amdgpu/si_dma.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v6_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/therm.o
CC [M] drivers/gpu/drm/i915/gt/gen9_renderstate.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_busy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/vmap.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/volt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/vpstate.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_clflush.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_context.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_create.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/xpio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_domain.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v3_1.o
CC [M] drivers/gpu/drm/amd/amdgpu/vi.o
CC [M] drivers/gpu/drm/amd/amdgpu/mxgpu_vi.o
CC [M] drivers/gpu/drm/bridge/panel.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v6_1.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o
CC [M] drivers/gpu/drm/amd/amdgpu/soc15.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/emu_soc.o
CC [M] drivers/gpu/drm/drm_fbdev_generic.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_internal.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_object.o
CC [M] drivers/gpu/drm/amd/amdgpu/mxgpu_ai.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_lmem.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_mman.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_pages.o
CC [M] drivers/gpu/drm/drm_fb_helper.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_phys.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0203.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0205.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/P0260.o
LD [M] drivers/gpu/drm/drm.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_pm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega10_reg_init.o
LD [M] drivers/gpu/drm/drm_shmem_helper.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega20_reg_init.o
LD [M] drivers/gpu/drm/drm_ttm_helper.o
AR drivers/gpu/drm/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_4.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_region.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_shmem.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_shrinker.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v2_3.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_stolen.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_throttle.o
CC [M] drivers/gpu/drm/amd/amdgpu/nv.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_tiling.o
CC [M] drivers/gpu/drm/amd/amdgpu/arct_reg_init.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.o
CC [M] drivers/gpu/drm/amd/amdgpu/mxgpu_nv.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_ttm.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v4_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v5_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o
CC [M] drivers/gpu/drm/amd/amdgpu/aldebaran_reg_init.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_userptr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o
CC [M] drivers/gpu/drm/amd/amdgpu/aldebaran.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_wait.o
CC [M] drivers/gpu/drm/i915/gem/i915_gemfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/soc21.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o
CC [M] drivers/gpu/drm/amd/amdgpu/sienna_cichlid.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o
CC [M] drivers/gpu/drm/i915/i915_active.o
LD [M] drivers/gpu/drm/drm_kms_helper.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o
CC [M] drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v4_3.o
CC [M] drivers/gpu/drm/i915/i915_cmd_parser.o
CC [M] drivers/gpu/drm/i915/i915_deps.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v6_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/g94.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_7.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.o
CC [M] drivers/gpu/drm/i915/i915_gem_evict.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v5_2.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.o
CC [M] drivers/gpu/drm/i915/i915_gem_gtt.o
CC [M] drivers/gpu/drm/i915/i915_gem_ww.o
CC [M] drivers/gpu/drm/i915/i915_gem.o
CC [M] drivers/gpu/drm/i915/i915_query.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_9.o
CC [M] drivers/gpu/drm/amd/amdgpu/df_v1_7.o
CC [M] drivers/gpu/drm/amd/amdgpu/df_v3_6.o
CC [M] drivers/gpu/drm/i915/i915_request.o
CC [M] drivers/gpu/drm/i915/i915_scheduler.o
CC [M] drivers/gpu/drm/amd/amdgpu/df_v4_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v7_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/i915/i915_trace_points.o
CC [M] drivers/gpu/drm/i915/i915_ttm_buddy_manager.o
CC [M] drivers/gpu/drm/i915/i915_vma.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v8_0.o
CC [M] drivers/gpu/drm/i915/i915_vma_resource.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v9_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v10_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/g84.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_log.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_huc.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_uc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v11_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o
CC [M] drivers/gpu/drm/i915/gt/intel_gsc.o
CC [M] drivers/gpu/drm/i915/i915_hwmon.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.o
CC [M] drivers/gpu/drm/i915/display/hsw_ips.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.o
CC [M] drivers/gpu/drm/i915/display/intel_atomic.o
CC [M] drivers/gpu/drm/i915/display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/i915/display/intel_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v6_0.o
CC [M] drivers/gpu/drm/i915/display/intel_bios.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.o
CC [M] drivers/gpu/drm/i915/display/intel_bw.o
CC [M] drivers/gpu/drm/i915/display/intel_cdclk.o
CC [M] drivers/gpu/drm/i915/display/intel_color.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v6_1.o
CC [M] drivers/gpu/drm/i915/display/intel_combo_phy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.o
CC [M] drivers/gpu/drm/i915/display/intel_connector.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v6_7.o
CC [M] drivers/gpu/drm/i915/display/intel_crtc.o
CC [M] drivers/gpu/drm/i915/display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v8_7.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v8_10.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_irq.o
CC [M] drivers/gpu/drm/i915/display/intel_cursor.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/i915/display/intel_display.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ih.o
CC [M] drivers/gpu/drm/amd/amdgpu/iceland_ih.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o
CC [M] drivers/gpu/drm/i915/display/intel_display_driver.o
CC [M] drivers/gpu/drm/amd/amdgpu/tonga_ih.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/amd/amdgpu/cz_ih.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o
CC [M] drivers/gpu/drm/i915/display/intel_display_irq.o
CC [M] drivers/gpu/drm/i915/display/intel_display_power.o
CC [M] drivers/gpu/drm/i915/display/intel_display_power_map.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega10_ih.o
CC [M] drivers/gpu/drm/i915/display/intel_display_power_well.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv10.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega20_ih.o
CC [M] drivers/gpu/drm/amd/amdgpu/navi10_ih.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv1a.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv20.o
CC [M] drivers/gpu/drm/amd/amdgpu/ih_v6_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.o
CC [M] drivers/gpu/drm/i915/display/intel_display_reset.o
CC [M] drivers/gpu/drm/i915/display/intel_display_rps.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_psp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o
CC [M] drivers/gpu/drm/i915/display/intel_dmc.o
CC [M] drivers/gpu/drm/i915/display/intel_dpio_phy.o
CC [M] drivers/gpu/drm/i915/display/intel_dpll.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v3_1.o
CC [M] drivers/gpu/drm/i915/display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o
CC [M] drivers/gpu/drm/i915/display/intel_dpt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o
CC [M] drivers/gpu/drm/i915/display/intel_drrs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o
CC [M] drivers/gpu/drm/i915/display/intel_dsb.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v10_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v11_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o
CC [M] drivers/gpu/drm/i915/display/intel_fb.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.o
CC [M] drivers/gpu/drm/i915/display/intel_fb_pin.o
CC [M] drivers/gpu/drm/i915/display/intel_fbc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v12_0.o
CC [M] drivers/gpu/drm/i915/display/intel_fdi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.o
CC [M] drivers/gpu/drm/i915/display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o
CC [M] drivers/gpu/drm/i915/display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/i915/display/intel_global_state.o
CC [M] drivers/gpu/drm/i915/display/intel_hdcp.o
CC [M] drivers/gpu/drm/i915/display/intel_hdcp_gsc.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v13_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ga100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.o
CC [M] drivers/gpu/drm/i915/display/intel_hotplug.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/user.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp10b.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o
CC [M] drivers/gpu/drm/i915/display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/i915/display/intel_hti.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.o
CC [M] drivers/gpu/drm/i915/display/intel_load_detect.o
CC [M] drivers/gpu/drm/i915/display/intel_lpe_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o
CC [M] drivers/gpu/drm/i915/display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/i915/display/intel_modeset_setup.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/tu102.o
CC [M] drivers/gpu/drm/i915/display/intel_overlay.o
CC [M] drivers/gpu/drm/i915/display/intel_pch_display.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v10_0.o
CC [M] drivers/gpu/drm/i915/display/intel_pch_refclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbdev.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v11_0.o
CC [M] drivers/gpu/drm/xe/xe_guc.o
CC [M] drivers/gpu/drm/i915/display/intel_plane_initial.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv04.o
CC [M] drivers/gpu/drm/i915/display/intel_psr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv10.o
CC [M] drivers/gpu/drm/i915/display/intel_quirks.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv1a.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.o
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
HDRTEST drivers/gpu/drm/xe/abi/guc_klvs_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_errors_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_slpc_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_mmio_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_messages_abi.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_vma_types.h
CC [M] drivers/gpu/drm/i915/display/intel_sprite.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband_reg.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv20.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v8_0.o
CC [M] drivers/gpu/drm/i915/display/intel_sprite_uapi.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_0.o
CC [M] drivers/gpu/drm/i915/display/intel_tc.o
CC [M] drivers/gpu/drm/i915/display/intel_vblank.o
CC [M] drivers/gpu/drm/i915/display/intel_vga.o
CC [M] drivers/gpu/drm/i915/display/intel_wm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv25.o
CC [M] drivers/gpu/drm/i915/display/i9xx_plane.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv30.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv35.o
CC [M] drivers/gpu/drm/i915/display/i9xx_wm.o
CC [M] drivers/gpu/drm/i915/display/skl_scaler.o
CC [M] drivers/gpu/drm/i915/display/skl_universal_plane.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_4.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv36.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv40.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv41.o
CC [M] drivers/gpu/drm/i915/display/skl_watermark.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
CC [M] drivers/gpu/drm/i915/display/intel_acpi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv44.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_reg_defs.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_trace.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_reg.h
CC [M] drivers/gpu/drm/i915/display/intel_opregion.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_active_types.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_config.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv46.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband.h
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_mchbar_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv47.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v10_0.o
CC [M] drivers/gpu/drm/i915/display/intel_fbdev.o
CC [M] drivers/gpu/drm/i915/display/dvo_ch7017.o
CC [M] drivers/gpu/drm/i915/display/dvo_ch7xxx.o
CC [M] drivers/gpu/drm/amd/amdgpu/imu_v11_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v11_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv49.o
CC [M] drivers/gpu/drm/i915/display/dvo_ivch.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_runtime_pm.h
CC [M] drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv4e.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_pm_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/g84.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gt215.o
CC [M] drivers/gpu/drm/i915/display/dvo_ns2501.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_pci_config.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_clock_gating.h
HDRTEST drivers/gpu/drm/xe/display/ext/i915_irq.h
CC [M] drivers/gpu/drm/i915/display/dvo_sil164.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/mcp77.o
HDRTEST drivers/gpu/drm/xe/display/ext/intel_pch.h
CC [M] drivers/gpu/drm/i915/display/dvo_tfp410.o
HDRTEST drivers/gpu/drm/xe/display/ext/intel_dram.h
HDRTEST drivers/gpu/drm/xe/display/ext/intel_device_info.h
CC [M] drivers/gpu/drm/i915/display/g4x_dp.o
HDRTEST drivers/gpu/drm/xe/regs/xe_reg_defs.h
CC [M] drivers/gpu/drm/i915/display/g4x_hdmi.o
HDRTEST drivers/gpu/drm/xe/regs/xe_guc_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_gt_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_gpu_commands.h
CC [M] drivers/gpu/drm/i915/display/icl_dsi.o
HDRTEST drivers/gpu/drm/xe/regs/xe_lrc_layout.h
HDRTEST drivers/gpu/drm/xe/regs/xe_engine_regs.h
HDRTEST drivers/gpu/drm/xe/tests/xe_test.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/mcp89.o
CC [M] drivers/gpu/drm/i915/display/intel_backlight.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf108.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v2_4.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v3_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.o
HDRTEST drivers/gpu/drm/xe/tests/xe_pci_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_migrate_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_dma_buf_test.h
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v4_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.o
HDRTEST drivers/gpu/drm/xe/tests/xe_bo_test.h
HDRTEST drivers/gpu/drm/xe/xe_bb.h
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v4_4.o
HDRTEST drivers/gpu/drm/xe/xe_bb_types.h
HDRTEST drivers/gpu/drm/xe/xe_bo.h
HDRTEST drivers/gpu/drm/xe/xe_bo_doc.h
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.o
HDRTEST drivers/gpu/drm/xe/xe_bo_evict.h
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v5_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v5_2.o
CC [M] drivers/gpu/drm/i915/display/intel_crt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.o
CC [M] drivers/gpu/drm/i915/display/intel_cx0_phy.o
CC [M] drivers/gpu/drm/i915/display/intel_ddi.o
CC [M] drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v6_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_mes.o
HDRTEST drivers/gpu/drm/xe/xe_bo_types.h
HDRTEST drivers/gpu/drm/xe/xe_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/mes_v10_1.o
HDRTEST drivers/gpu/drm/xe/xe_devcoredump.h
CC [M] drivers/gpu/drm/amd/amdgpu/mes_v11_0.o
CC [M] drivers/gpu/drm/i915/display/intel_display_device.o
HDRTEST drivers/gpu/drm/xe/xe_devcoredump_types.h
HDRTEST drivers/gpu/drm/xe/xe_device.h
CC [M] drivers/gpu/drm/i915/display/intel_display_trace.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm200.o
CC [M] drivers/gpu/drm/i915/display/intel_dkl_phy.o
CC [M] drivers/gpu/drm/i915/display/intel_dp.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_aux.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm20b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp100.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_hdcp.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp10b.o
HDRTEST drivers/gpu/drm/xe/xe_device_types.h
HDRTEST drivers/gpu/drm/xe/xe_display.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gv100.o
HDRTEST drivers/gpu/drm/xe/xe_dma_buf.h
CC [M] drivers/gpu/drm/i915/display/intel_dp_link_training.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_mst.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/tu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v5_0.o
HDRTEST drivers/gpu/drm/xe/xe_drv.h
CC [M] drivers/gpu/drm/i915/display/intel_dsi.o
CC [M] drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o
HDRTEST drivers/gpu/drm/xe/xe_engine.h
HDRTEST drivers/gpu/drm/xe/xe_engine_types.h
HDRTEST drivers/gpu/drm/xe/xe_exec.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga100.o
HDRTEST drivers/gpu/drm/xe/xe_execlist.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga102.o
HDRTEST drivers/gpu/drm/xe/xe_execlist_types.h
HDRTEST drivers/gpu/drm/xe/xe_force_wake.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.o
CC [M] drivers/gpu/drm/i915/display/intel_dsi_vbt.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v6_0.o
CC [M] drivers/gpu/drm/i915/display/intel_dvo.o
CC [M] drivers/gpu/drm/i915/display/intel_gmbus.o
HDRTEST drivers/gpu/drm/xe/xe_force_wake_types.h
CC [M] drivers/gpu/drm/i915/display/intel_hdmi.o
CC [M] drivers/gpu/drm/i915/display/intel_lspcon.o
CC [M] drivers/gpu/drm/i915/display/intel_lvds.o
HDRTEST drivers/gpu/drm/xe/xe_ggtt.h
HDRTEST drivers/gpu/drm/xe/xe_ggtt_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt.h
CC [M] drivers/gpu/drm/i915/display/intel_panel.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v7_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv04.o
CC [M] drivers/gpu/drm/i915/display/intel_pps.o
CC [M] drivers/gpu/drm/i915/display/intel_qp_tables.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv10.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vce.o
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v3_0.o
CC [M] drivers/gpu/drm/i915/display/intel_sdvo.o
CC [M] drivers/gpu/drm/i915/display/intel_snps_phy.o
HDRTEST drivers/gpu/drm/xe/xe_gt_clock.h
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v4_0.o
HDRTEST drivers/gpu/drm/xe/xe_gt_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.o
HDRTEST drivers/gpu/drm/xe/xe_gt_mcr.h
CC [M] drivers/gpu/drm/i915/display/intel_tv.o
CC [M] drivers/gpu/drm/i915/display/intel_vdsc.o
CC [M] drivers/gpu/drm/i915/display/intel_vrr.o
CC [M] drivers/gpu/drm/i915/display/vlv_dsi.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_sw_ring.o
CC [M] drivers/gpu/drm/i915/display/vlv_dsi_pll.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv1a.o
CC [M] drivers/gpu/drm/i915/i915_perf.o
HDRTEST drivers/gpu/drm/xe/xe_gt_pagefault.h
HDRTEST drivers/gpu/drm/xe/xe_gt_printk.h
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp.o
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs.h
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_tee.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v1_0.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_huc.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v2_0.o
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_cmd.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v2_5.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_irq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv20.o
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_pm.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_session.o
HDRTEST drivers/gpu/drm/xe/xe_gt_topology.h
CC [M] drivers/gpu/drm/i915/i915_gpu_error.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v3_0.o
HDRTEST drivers/gpu/drm/xe/xe_gt_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc.h
CC [M] drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.o
HDRTEST drivers/gpu/drm/xe/xe_guc_ads.h
HDRTEST drivers/gpu/drm/xe/xe_guc_ads_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_ct.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.o
CC [M] drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.o
CC [M] drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v4_0.o
HDRTEST drivers/gpu/drm/xe/xe_guc_ct_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.o
HDRTEST drivers/gpu/drm/xe/xe_guc_engine_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_fwif.h
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.o
CC [M] drivers/gpu/drm/i915/selftests/i915_random.o
CC [M] drivers/gpu/drm/i915/selftests/i915_selftest.o
HDRTEST drivers/gpu/drm/xe/xe_guc_hwconfig.h
HDRTEST drivers/gpu/drm/xe/xe_guc_log.h
HDRTEST drivers/gpu/drm/xe/xe_guc_log_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_pc.h
HDRTEST drivers/gpu/drm/xe/xe_guc_pc_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.o
CC [M] drivers/gpu/drm/i915/selftests/igt_atomic.o
CC [M] drivers/gpu/drm/i915/selftests/igt_flush_test.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv41.o
CC [M] drivers/gpu/drm/i915/selftests/igt_live_test.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv44.o
CC [M] drivers/gpu/drm/i915/selftests/igt_mmap.o
CC [M] drivers/gpu/drm/i915/selftests/igt_reset.o
HDRTEST drivers/gpu/drm/xe/xe_guc_submit.h
CC [M] drivers/gpu/drm/i915/selftests/igt_spinner.o
CC [M] drivers/gpu/drm/i915/selftests/librapl.o
HDRTEST drivers/gpu/drm/xe/xe_guc_submit_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_types.h
HDRTEST drivers/gpu/drm/xe/xe_huc.h
HDRTEST drivers/gpu/drm/xe/xe_huc_debugfs.h
CC [M] drivers/gpu/drm/i915/i915_vgpu.o
HDRTEST drivers/gpu/drm/xe/xe_huc_types.h
HDRTEST drivers/gpu/drm/xe/xe_hw_engine.h
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.o
HDRTEST drivers/gpu/drm/xe/xe_hw_engine_types.h
HDRTEST drivers/gpu/drm/xe/xe_hw_fence.h
HDRTEST drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_crtc_state_dump.h
HDRTEST drivers/gpu/drm/i915/display/hsw_ips.h
HDRTEST drivers/gpu/drm/i915/display/g4x_hdmi.h
HDRTEST drivers/gpu/drm/i915/display/intel_hdcp_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_overlay.h
HDRTEST drivers/gpu/drm/i915/display/intel_display.h
HDRTEST drivers/gpu/drm/i915/display/skl_watermark_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_dmc.h
HDRTEST drivers/gpu/drm/i915/display/intel_vga.h
HDRTEST drivers/gpu/drm/i915/display/intel_audio.h
HDRTEST drivers/gpu/drm/xe/xe_hw_fence_types.h
HDRTEST drivers/gpu/drm/xe/xe_irq.h
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_lvds.h
HDRTEST drivers/gpu/drm/xe/xe_lrc.h
HDRTEST drivers/gpu/drm/xe/xe_lrc_types.h
HDRTEST drivers/gpu/drm/i915/display/intel_modeset_setup.h
HDRTEST drivers/gpu/drm/xe/xe_macros.h
HDRTEST drivers/gpu/drm/i915/display/intel_cdclk.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv49.o
HDRTEST drivers/gpu/drm/xe/xe_map.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_limits.h
HDRTEST drivers/gpu/drm/xe/xe_migrate.h
HDRTEST drivers/gpu/drm/i915/display/intel_hotplug.h
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_dkl_phy.h
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v1_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_atomic.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_driver.h
HDRTEST drivers/gpu/drm/i915/display/intel_dpll.h
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi_pll_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v2_0.o
HDRTEST drivers/gpu/drm/xe/xe_migrate_doc.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp_mst.h
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v2_1.o
HDRTEST drivers/gpu/drm/i915/display/intel_fdi_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v3_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv4e.o
HDRTEST drivers/gpu/drm/i915/display/g4x_dp.h
HDRTEST drivers/gpu/drm/xe/xe_mmio.h
HDRTEST drivers/gpu/drm/i915/display/intel_tc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.o
HDRTEST drivers/gpu/drm/i915/display/intel_frontbuffer.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/rammcp77.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsi_vbt.h
HDRTEST drivers/gpu/drm/i915/display/intel_psr.h
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v9_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_crt.h
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v11_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_opregion.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.o
HDRTEST drivers/gpu/drm/i915/display/intel_snps_phy_regs.h
HDRTEST drivers/gpu/drm/i915/display/i9xx_wm.h
HDRTEST drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
HDRTEST drivers/gpu/drm/xe/xe_mocs.h
HDRTEST drivers/gpu/drm/xe/xe_module.h
HDRTEST drivers/gpu/drm/i915/display/intel_global_state.h
HDRTEST drivers/gpu/drm/xe/xe_pat.h
HDRTEST drivers/gpu/drm/i915/display/intel_lpe_audio.h
HDRTEST drivers/gpu/drm/i915/display/intel_drrs.h
HDRTEST drivers/gpu/drm/xe/xe_pci.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_rps.h
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v11_0_6.o
HDRTEST drivers/gpu/drm/xe/xe_pci_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf108.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v13_0.o
HDRTEST drivers/gpu/drm/xe/xe_pcode.h
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v13_0_6.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_reset.o
HDRTEST drivers/gpu/drm/xe/xe_pcode_api.h
CC [M] drivers/gpu/drm/amd/amdgpu/mca_v3_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgm107.o
HDRTEST drivers/gpu/drm/xe/xe_platform_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgm200.o
HDRTEST drivers/gpu/drm/xe/xe_pm.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgp100.o
HDRTEST drivers/gpu/drm/i915/display/intel_fbdev.h
HDRTEST drivers/gpu/drm/i915/display/intel_pps_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_module.o
HDRTEST drivers/gpu/drm/xe/xe_preempt_fence.h
HDRTEST drivers/gpu/drm/i915/display/intel_hdmi.h
HDRTEST drivers/gpu/drm/i915/display/intel_fdi.h
HDRTEST drivers/gpu/drm/i915/display/intel_fb.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramga102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device.o
HDRTEST drivers/gpu/drm/i915/display/intel_qp_tables.h
HDRTEST drivers/gpu/drm/xe/xe_preempt_fence_types.h
HDRTEST drivers/gpu/drm/i915/display/intel_dsb_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_vdsc.h
HDRTEST drivers/gpu/drm/xe/xe_pt.h
HDRTEST drivers/gpu/drm/xe/xe_pt_types.h
HDRTEST drivers/gpu/drm/xe/xe_pt_walk.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_chardev.o
HDRTEST drivers/gpu/drm/i915/display/intel_snps_phy.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.o
HDRTEST drivers/gpu/drm/xe/xe_query.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_core.h
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi_pll.h
HDRTEST drivers/gpu/drm/xe/xe_reg_sr.h
HDRTEST drivers/gpu/drm/i915/display/intel_dvo_dev.h
HDRTEST drivers/gpu/drm/i915/display/intel_hdcp.h
HDRTEST drivers/gpu/drm/xe/xe_reg_sr_types.h
HDRTEST drivers/gpu/drm/xe/xe_reg_whitelist.h
HDRTEST drivers/gpu/drm/i915/display/intel_sdvo_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_pasid.o
HDRTEST drivers/gpu/drm/i915/display/intel_pch_refclk.h
HDRTEST drivers/gpu/drm/xe/xe_res_cursor.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_doorbell.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_flat_memory.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr2.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_trace.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_power.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp_aux_regs.h
HDRTEST drivers/gpu/drm/i915/display/i9xx_plane.h
../drivers/gpu/drm/i915/i915_gpu_error.c:2174: warning: Function parameter or member 'dump_flags' not described in 'i915_capture_error_state'
HDRTEST drivers/gpu/drm/i915/display/intel_dp_aux_backlight.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_queue.o
HDRTEST drivers/gpu/drm/i915/display/intel_dpll_mgr.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager.o
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi.h
HDRTEST drivers/gpu/drm/i915/display/intel_plane_initial.h
HDRTEST drivers/gpu/drm/xe/xe_ring_ops.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_cik.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_vi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr5.o
HDRTEST drivers/gpu/drm/xe/xe_ring_ops_types.h
HDRTEST drivers/gpu/drm/xe/xe_rtp.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v9.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v10.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v11.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_kernel_queue.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_vi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_v9.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process_queue_manager.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_device.h
HDRTEST drivers/gpu/drm/i915/display/intel_fifo_underrun.h
HDRTEST drivers/gpu/drm/i915/display/intel_cursor.h
HDRTEST drivers/gpu/drm/xe/xe_rtp_types.h
HDRTEST drivers/gpu/drm/xe/xe_sa.h
HDRTEST drivers/gpu/drm/xe/xe_sa_types.h
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi_regs.h
HDRTEST drivers/gpu/drm/xe/xe_sched_job.h
HDRTEST drivers/gpu/drm/i915/display/intel_cx0_phy.h
HDRTEST drivers/gpu/drm/i915/display/skl_scaler.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.o
HDRTEST drivers/gpu/drm/i915/display/intel_hti.h
HDRTEST drivers/gpu/drm/i915/display/icl_dsi_regs.h
../drivers/gpu/drm/i915/i915_perf.c:5307: warning: Function parameter or member 'i915' not described in 'i915_perf_ioctl_version'
HDRTEST drivers/gpu/drm/i915/display/intel_atomic_plane.h
HDRTEST drivers/gpu/drm/i915/display/skl_watermark.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_cik.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_vi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v9.o
HDRTEST drivers/gpu/drm/i915/display/intel_fbc.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_reg_defs.h
HDRTEST drivers/gpu/drm/i915/display/intel_acpi.h
HDRTEST drivers/gpu/drm/xe/xe_sched_job_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf119.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.o
HDRTEST drivers/gpu/drm/i915/display/intel_connector.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v10.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ga102.o
HDRTEST drivers/gpu/drm/i915/display/intel_dpt.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.o
HDRTEST drivers/gpu/drm/i915/display/intel_quirks.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp_link_training.h
HDRTEST drivers/gpu/drm/xe/xe_step.h
HDRTEST drivers/gpu/drm/xe/xe_step_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v11.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_interrupt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gv100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_events.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.o
HDRTEST drivers/gpu/drm/xe/xe_sync.h
HDRTEST drivers/gpu/drm/xe/xe_sync_types.h
HDRTEST drivers/gpu/drm/xe/xe_tile.h
HDRTEST drivers/gpu/drm/i915/display/intel_color.h
HDRTEST drivers/gpu/drm/i915/display/intel_crtc.h
HDRTEST drivers/gpu/drm/xe/xe_tile_sysfs.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/cik_event_interrupt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv4e.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_int_process_v9.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_int_process_v11.o
HDRTEST drivers/gpu/drm/i915/display/intel_modeset_verify.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_power_well.h
HDRTEST drivers/gpu/drm/i915/display/intel_psr_regs.h
HDRTEST drivers/gpu/drm/xe/xe_tile_sysfs_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_smi_events.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_crat.o
HDRTEST drivers/gpu/drm/xe/xe_trace.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_debugfs.o
HDRTEST drivers/gpu/drm/i915/display/intel_wm.h
HDRTEST drivers/gpu/drm/i915/display/intel_pipe_crc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.o
HDRTEST drivers/gpu/drm/i915/display/intel_audio_regs.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_stolen_mgr.h
HDRTEST drivers/gpu/drm/i915/display/intel_panel.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_sys_mgr.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_vram_mgr.h
HDRTEST drivers/gpu/drm/i915/display/intel_sprite.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_vram_mgr_types.h
HDRTEST drivers/gpu/drm/i915/display/intel_wm_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.o
HDRTEST drivers/gpu/drm/i915/display/intel_tv.h
HDRTEST drivers/gpu/drm/i915/display/intel_hti_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_vrr.h
HDRTEST drivers/gpu/drm/xe/xe_tuning.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv50.o
HDRTEST drivers/gpu/drm/xe/xe_uc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/g94.o
HDRTEST drivers/gpu/drm/xe/xe_uc_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_uc_fw.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.o
HDRTEST drivers/gpu/drm/i915/display/intel_load_detect.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gf117.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.o
HDRTEST drivers/gpu/drm/xe/xe_uc_fw_abi.h
HDRTEST drivers/gpu/drm/xe/xe_uc_fw_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.o
HDRTEST drivers/gpu/drm/i915/display/skl_universal_plane.h
HDRTEST drivers/gpu/drm/xe/xe_uc_types.h
HDRTEST drivers/gpu/drm/xe/xe_vm.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gf119.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk104.o
HDRTEST drivers/gpu/drm/i915/display/intel_mg_phy_regs.h
HDRTEST drivers/gpu/drm/xe/xe_vm_doc.h
HDRTEST drivers/gpu/drm/xe/xe_vm_madvise.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk110.o
HDRTEST drivers/gpu/drm/i915/display/intel_bw.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_irq.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gm200.o
HDRTEST drivers/gpu/drm/i915/display/intel_de.h
HDRTEST drivers/gpu/drm/i915/display/intel_lvds_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/pad.o
HDRTEST drivers/gpu/drm/i915/display/intel_gmbus_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.h
HDRTEST drivers/gpu/drm/i915/display/intel_dvo.h
HDRTEST drivers/gpu/drm/xe/xe_vm_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_job.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_acp.o
HDRTEST drivers/gpu/drm/i915/display/intel_sdvo.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv04.o
HDRTEST drivers/gpu/drm/i915/display/intel_dp_aux.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv4e.o
CC [M] drivers/gpu/drm/amd/amdgpu/../acp/acp_hw.o
HDRTEST drivers/gpu/drm/i915/display/intel_vdsc_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ioc32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padg94.o
HDRTEST drivers/gpu/drm/xe/xe_wa.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.o
HDRTEST drivers/gpu/drm/xe/xe_wait_user_fence.h
HDRTEST drivers/gpu/drm/xe/xe_wopcm.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgf119.o
HDRTEST drivers/gpu/drm/xe/xe_wopcm_types.h
HDRTEST drivers/gpu/drm/i915/display/intel_combo_phy.h
HDRTEST drivers/gpu/drm/i915/display/intel_dvo_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/arcturus_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/navi10_ppt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bus.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/sienna_cichlid_ppt.o
HDRTEST drivers/gpu/drm/i915/display/intel_gmbus.h
HDRTEST drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/cyan_skillfish_ppt.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsi.h
LD [M] drivers/gpu/drm/xe/xe.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busnv04.o
HDRTEST drivers/gpu/drm/i915/display/intel_dmc_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busnv4e.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busnv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busgf119.o
HDRTEST drivers/gpu/drm/i915/display/intel_ddi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bit.o
HDRTEST drivers/gpu/drm/i915/display/intel_hotplug_irq.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.o
HDRTEST drivers/gpu/drm/i915/display/intel_tv_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/smu_v11_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsb.h
HDRTEST drivers/gpu/drm/i915/display/intel_bios.h
HDRTEST drivers/gpu/drm/i915/display/intel_pch_display.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu12/renoir_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu12/smu_v12_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0.o
HDRTEST drivers/gpu/drm/i915/display/intel_backlight.h
HDRTEST drivers/gpu/drm/i915/display/intel_vblank.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp.h
HDRTEST drivers/gpu/drm/i915/display/intel_backlight_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgf119.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_reset.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/anx9805.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_power_map.h
HDRTEST drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
HDRTEST drivers/gpu/drm/i915/display/icl_dsi.h
HDRTEST drivers/gpu/drm/i915/display/intel_lspcon.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/aldebaran_ppt.o
HDRTEST drivers/gpu/drm/i915/display/intel_dpio_phy.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp_hdcp.h
HDRTEST drivers/gpu/drm/i915/display/intel_fb_pin.h
HDRTEST drivers/gpu/drm/i915/display/intel_pps.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/yellow_carp_ppt.o
HDRTEST drivers/gpu/drm/i915/display/intel_sprite_uapi.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ttm.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_0_ppt.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_region.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_context_types.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_lmem.h
drivers/gpu/drm/xe/xe.o: warning: objtool: intel_set_cpu_fifo_underrun_reporting+0x385: unreachable instruction
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_4_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_5_ppt.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_mman.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_7_ppt.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_object_types.h
../drivers/gpu/drm/i915/gem/i915_gem_region.h:25: warning: Incorrect use of kernel-doc format: * process_obj - Process the current object
../drivers/gpu/drm/i915/gem/i915_gem_region.h:35: warning: Function parameter or member 'process_obj' not described in 'i915_gem_apply_to_region_ops'
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_context.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_clflush.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_tiling.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_6_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/amdgpu_smu.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_stolen.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_create.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ttm_move.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ioctls.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_domain.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_internal.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
HDRTEST drivers/gpu/drm/i915/gem/selftests/mock_context.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/huge_gem_object.h
HDRTEST drivers/gpu/drm/i915/gem/selftests/mock_gem_object.h
HDRTEST drivers/gpu/drm/i915/gem/selftests/mock_dmabuf.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smumgr.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_userptr.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_pm.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_shrinker.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gemfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_object.h
HDRTEST drivers/gpu/drm/i915/gt/intel_timeline_types.h
HDRTEST drivers/gpu/drm/i915/gt/selftest_engine.h
HDRTEST drivers/gpu/drm/i915/gt/intel_breadcrumbs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu8_smumgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_heartbeat.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp100.o
HDRTEST drivers/gpu/drm/i915/gt/intel_context_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/tonga_smumgr.o
../drivers/gpu/drm/i915/gem/i915_gem_ttm.h:50: warning: Function parameter or member 'bo' not described in 'i915_ttm_to_gem'
HDRTEST drivers/gpu/drm/i915/gt/intel_execlists_submission.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_pm.h
HDRTEST drivers/gpu/drm/i915/gt/selftest_rc6.h
HDRTEST drivers/gpu/drm/i915/gt/intel_llc_types.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.o
HDRTEST drivers/gpu/drm/i915/gt/intel_region_lmem.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_requests.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/ga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.o
HDRTEST drivers/gpu/drm/i915/gt/intel_ggtt_gmch.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/fiji_smumgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/polaris10_smumgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_print.h
HDRTEST drivers/gpu/drm/i915/gt/gen8_ppgtt.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_mcr.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/iceland_smumgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_timeline.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.o
HDRTEST drivers/gpu/drm/i915/gt/gen6_engine_cs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_workarounds_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.o
HDRTEST drivers/gpu/drm/i915/gt/selftest_rps.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu7_smumgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_sa_media.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vega10_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_clock_utils.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu10_smumgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_rps_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.o
HDRTEST drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.h
../drivers/gpu/drm/i915/gem/i915_gem_object.h:94: warning: Function parameter or member 'file' not described in 'i915_gem_object_lookup_rcu'
../drivers/gpu/drm/i915/gem/i915_gem_object.h:94: warning: Excess function parameter 'filp' description in 'i915_gem_object_lookup_rcu'
HDRTEST drivers/gpu/drm/i915/gt/sysfs_engines.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.o
HDRTEST drivers/gpu/drm/i915/gt/gen7_renderclear.h
HDRTEST drivers/gpu/drm/i915/gt/intel_context.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/ci_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.o
HDRTEST drivers/gpu/drm/i915/gt/intel_wopcm.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vega12_smumgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_mocs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.o
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_pm.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_sysfs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_rc6.h
HDRTEST drivers/gpu/drm/i915/gt/intel_ring_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.o
HDRTEST drivers/gpu/drm/i915/gt/intel_workarounds.h
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_regs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_pm_irq.h
HDRTEST drivers/gpu/drm/i915/gt/shmem_utils.h
HDRTEST drivers/gpu/drm/i915/gt/intel_engine.h
HDRTEST drivers/gpu/drm/i915/gt/intel_reset_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vegam_smumgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_regs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_reset.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.h
HDRTEST drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_uc.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_print.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_fw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.h
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_actions_slpc_abi.h
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu9_smumgr.o
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h
HDRTEST drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vega20_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_huc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv04.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_huc_fw.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv41.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv44.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/g84.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mcp77.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk104.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/hwmgr.o
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_guc_rc.h
HDRTEST drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.h
../drivers/gpu/drm/i915/gt/intel_context.h:108: warning: Function parameter or member 'ce' not described in 'intel_context_lock_pinned'
../drivers/gpu/drm/i915/gt/intel_context.h:123: warning: Function parameter or member 'ce' not described in 'intel_context_is_pinned'
../drivers/gpu/drm/i915/gt/intel_context.h:142: warning: Function parameter or member 'ce' not described in 'intel_context_unlock_pinned'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:27: warning: Function parameter or member 'size' not described in '__guc_capture_bufstate'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:27: warning: Function parameter or member 'data' not described in '__guc_capture_bufstate'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:27: warning: Function parameter or member 'rd' not described in '__guc_capture_bufstate'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:27: warning: Function parameter or member 'wr' not described in '__guc_capture_bufstate'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter or member 'link' not described in '__guc_capture_parsed_output'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter or member 'is_partial' not described in '__guc_capture_parsed_output'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter or member 'eng_class' not described in '__guc_capture_parsed_output'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter or member 'eng_inst' not described in '__guc_capture_parsed_output'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter or member 'guc_id' not described in '__guc_capture_parsed_output'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter or member 'lrca' not described in '__guc_capture_parsed_output'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:59: warning: Function parameter or member 'reginfo' not described in '__guc_capture_parsed_output'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:62: warning: wrong kernel-doc identifier on line:
* struct guc_debug_capture_list_header / struct guc_debug_capture_list
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:80: warning: wrong kernel-doc identifier on line:
* struct __guc_mmio_reg_descr / struct __guc_mmio_reg_descr_group
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:105: warning: wrong kernel-doc identifier on line:
* struct guc_state_capture_header_t / struct guc_state_capture_t /
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:163: warning: Function parameter or member 'is_valid' not described in '__guc_capture_ads_cache'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:163: warning: Function parameter or member 'ptr' not described in '__guc_capture_ads_cache'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:163: warning: Function parameter or member 'size' not described in '__guc_capture_ads_cache'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:163: warning: Function parameter or member 'status' not described in '__guc_capture_ads_cache'
HDRTEST drivers/gpu/drm/i915/gt/intel_hwconfig.h
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:216: warning: Function parameter or member 'ads_null_cache' not described in 'intel_guc_state_capture'
../drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h:216: warning: Function parameter or member 'max_mmio_per_node' not described in 'intel_guc_state_capture'
HDRTEST drivers/gpu/drm/i915/gt/intel_llc.h
HDRTEST drivers/gpu/drm/i915/gt/gen8_engine_cs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_sseu_debugfs.h
HDRTEST drivers/gpu/drm/i915/gt/intel_rc6_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm200.o
HDRTEST drivers/gpu/drm/i915/gt/intel_context_param.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gpu_commands.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm20b.o
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_user.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_irq.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gsc.h
HDRTEST drivers/gpu/drm/i915/gt/intel_rps.h
HDRTEST drivers/gpu/drm/i915/gt/selftest_llc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp100.o
HDRTEST drivers/gpu/drm/i915/gt/gen6_ppgtt.h
HDRTEST drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h
HDRTEST drivers/gpu/drm/i915/gt/intel_migrate_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp10b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gv100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/processpptables.o
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'marker' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'read_ptr' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'write_ptr' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'size' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'sampled_write_ptr' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'wrap_offset' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'flush_to_file' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'buffer_full_cnt' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'reserved' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'flags' not described in 'guc_log_buffer_state'
../drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:491: warning: Function parameter or member 'version' not described in 'guc_log_buffer_state'
HDRTEST drivers/gpu/drm/i915/gt/selftests/mock_timeline.h
HDRTEST drivers/gpu/drm/i915/gt/intel_lrc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/hardwaremanager.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu8_hwmgr.o
HDRTEST drivers/gpu/drm/i915/gt/intel_lrc_reg.h
../drivers/gpu/drm/i915/gt/uc/intel_guc.h:274: warning: Function parameter or member 'dbgfs_node' not described in 'intel_guc'
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/pppcielanes.o
HDRTEST drivers/gpu/drm/i915/gt/intel_migrate.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/tu102.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.h
HDRTEST drivers/gpu/drm/i915/gt/intel_breadcrumbs_types.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/process_pptables_v1_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mem.o
HDRTEST drivers/gpu/drm/i915/gt/mock_engine.h
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_stats.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gtt.h
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_buffer_pool_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.o
HDRTEST drivers/gpu/drm/i915/gt/intel_ring.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomfwctrl.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv04.o
HDRTEST drivers/gpu/drm/i915/gt/intel_renderstate.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memgf100.o
HDRTEST drivers/gpu/drm/i915/gt/intel_sseu.h
HDRTEST drivers/gpu/drm/i915/gt/intel_engine_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_powertune.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv04.o
HDRTEST drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_thermal.o
HDRTEST drivers/gpu/drm/i915/gt/gen2_engine_cs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_clockpowergating.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv41.o
HDRTEST drivers/gpu/drm/i915/gvt/gvt.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmmcp77.o
HDRTEST drivers/gpu/drm/i915/gvt/trace.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_processpptables.o
HDRTEST drivers/gpu/drm/i915/gvt/debug.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.o
HDRTEST drivers/gpu/drm/i915/gvt/edid.h
HDRTEST drivers/gpu/drm/i915/gvt/page_track.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_powertune.o
HDRTEST drivers/gpu/drm/i915/gvt/mmio.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk20a.o
HDRTEST drivers/gpu/drm/i915/gvt/sched_policy.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.o
HDRTEST drivers/gpu/drm/i915/gvt/fb_decoder.h
HDRTEST drivers/gpu/drm/i915/gvt/cmd_parser.h
HDRTEST drivers/gpu/drm/i915/gvt/dmabuf.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_thermal.o
HDRTEST drivers/gpu/drm/i915/gvt/mmio_context.h
HDRTEST drivers/gpu/drm/i915/gvt/display.h
HDRTEST drivers/gpu/drm/i915/gvt/gtt.h
HDRTEST drivers/gpu/drm/i915/gvt/scheduler.h
HDRTEST drivers/gpu/drm/i915/gvt/reg.h
HDRTEST drivers/gpu/drm/i915/gvt/execlist.h
HDRTEST drivers/gpu/drm/i915/gvt/interrupt.h
HDRTEST drivers/gpu/drm/i915/i915_active.h
HDRTEST drivers/gpu/drm/i915/i915_active_types.h
HDRTEST drivers/gpu/drm/i915/i915_cmd_parser.h
../drivers/gpu/drm/i915/gt/intel_engine_types.h:293: warning: Function parameter or member 'preempt_hang' not described in 'intel_engine_execlists'
../drivers/gpu/drm/i915/gt/intel_gtt.h:515: warning: Function parameter or member 'vm' not described in 'i915_vm_resv_put'
../drivers/gpu/drm/i915/gt/intel_gtt.h:515: warning: Excess function parameter 'resv' description in 'i915_vm_resv_put'
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm20b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.o
HDRTEST drivers/gpu/drm/i915/i915_config.h
HDRTEST drivers/gpu/drm/i915/i915_debugfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu10_hwmgr.o
HDRTEST drivers/gpu/drm/i915/i915_debugfs_params.h
HDRTEST drivers/gpu/drm/i915/i915_deps.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.o
HDRTEST drivers/gpu/drm/i915/i915_driver.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.o
HDRTEST drivers/gpu/drm/i915/i915_drm_client.h
HDRTEST drivers/gpu/drm/i915/i915_drv.h
HDRTEST drivers/gpu/drm/i915/i915_file_private.h
HDRTEST drivers/gpu/drm/i915/i915_fixed.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/pp_psm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.o
HDRTEST drivers/gpu/drm/i915/i915_gem.h
HDRTEST drivers/gpu/drm/i915/i915_gem_evict.h
HDRTEST drivers/gpu/drm/i915/i915_gem_gtt.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_processpptables.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/umem.o
HDRTEST drivers/gpu/drm/i915/i915_gem_ww.h
HDRTEST drivers/gpu/drm/i915/i915_getparam.h
HDRTEST drivers/gpu/drm/i915/i915_gpu_error.h
HDRTEST drivers/gpu/drm/i915/i915_hwmon.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_hwmgr.o
HDRTEST drivers/gpu/drm/i915/i915_ioc32.h
HDRTEST drivers/gpu/drm/i915/i915_ioctl.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_thermal.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/pp_overdriver.o
HDRTEST drivers/gpu/drm/i915/i915_iosf_mbi.h
HDRTEST drivers/gpu/drm/i915/i915_irq.h
HDRTEST drivers/gpu/drm/i915/i915_memcpy.h
HDRTEST drivers/gpu/drm/i915/i915_mitigations.h
HDRTEST drivers/gpu/drm/i915/i915_mm.h
HDRTEST drivers/gpu/drm/i915/i915_params.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ummu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_processpptables.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_hwmgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.o
HDRTEST drivers/gpu/drm/i915/i915_pci.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_powertune.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_thermal.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/common_baco.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_baco.o
HDRTEST drivers/gpu/drm/i915/i915_perf.h
HDRTEST drivers/gpu/drm/i915/i915_perf_oa_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv04.o
HDRTEST drivers/gpu/drm/i915/i915_perf_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_baco.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_baco.o
../drivers/gpu/drm/i915/i915_active.h:66: warning: Function parameter or member 'active' not described in '__i915_active_fence_init'
../drivers/gpu/drm/i915/i915_active.h:66: warning: Function parameter or member 'fence' not described in '__i915_active_fence_init'
../drivers/gpu/drm/i915/i915_active.h:66: warning: Function parameter or member 'fn' not described in '__i915_active_fence_init'
../drivers/gpu/drm/i915/i915_active.h:89: warning: Function parameter or member 'active' not described in 'i915_active_fence_set'
../drivers/gpu/drm/i915/i915_active.h:89: warning: Function parameter or member 'rq' not described in 'i915_active_fence_set'
../drivers/gpu/drm/i915/i915_active.h:102: warning: Function parameter or member 'active' not described in 'i915_active_fence_get'
HDRTEST drivers/gpu/drm/i915/i915_pmu.h
../drivers/gpu/drm/i915/i915_active.h:122: warning: Function parameter or member 'active' not described in 'i915_active_fence_isset'
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu9_baco.o
HDRTEST drivers/gpu/drm/i915/i915_priolist_types.h
HDRTEST drivers/gpu/drm/i915/i915_pvinfo.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/tonga_baco.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.o
HDRTEST drivers/gpu/drm/i915/i915_query.h
HDRTEST drivers/gpu/drm/i915/i915_reg.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv46.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv4c.o
HDRTEST drivers/gpu/drm/i915/i915_reg_defs.h
HDRTEST drivers/gpu/drm/i915/i915_request.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/polaris_baco.o
HDRTEST drivers/gpu/drm/i915/i915_scatterlist.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.o
HDRTEST drivers/gpu/drm/i915/i915_scheduler.h
HDRTEST drivers/gpu/drm/i915/i915_scheduler_types.h
HDRTEST drivers/gpu/drm/i915/i915_selftest.h
HDRTEST drivers/gpu/drm/i915/i915_suspend.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.o
HDRTEST drivers/gpu/drm/i915/i915_sw_fence.h
HDRTEST drivers/gpu/drm/i915/i915_sw_fence_work.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/fiji_baco.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ci_baco.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_baco.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/amd_powerplay.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.o
../drivers/gpu/drm/i915/i915_pmu.h:21: warning: cannot understand function prototype: 'enum i915_pmu_tracked_events '
../drivers/gpu/drm/i915/i915_pmu.h:32: warning: cannot understand function prototype: 'enum '
../drivers/gpu/drm/i915/i915_pmu.h:41: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* How many different events we track in the global PMU mask.
HDRTEST drivers/gpu/drm/i915/i915_switcheroo.h
HDRTEST drivers/gpu/drm/i915/i915_syncmap.h
HDRTEST drivers/gpu/drm/i915/i915_sysfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/legacy_dpm.o
HDRTEST drivers/gpu/drm/i915/i915_tasklet.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/kv_dpm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gp100.o
HDRTEST drivers/gpu/drm/i915/i915_trace.h
HDRTEST drivers/gpu/drm/i915/i915_ttm_buddy_manager.h
HDRTEST drivers/gpu/drm/i915/i915_user_extensions.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/kv_smc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.o
HDRTEST drivers/gpu/drm/i915/i915_utils.h
HDRTEST drivers/gpu/drm/i915/i915_vgpu.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.o
HDRTEST drivers/gpu/drm/i915/i915_vma.h
HDRTEST drivers/gpu/drm/i915/i915_vma_resource.h
../drivers/gpu/drm/i915/i915_scatterlist.h:160: warning: Incorrect use of kernel-doc format: * release() - Free the memory of the struct i915_refct_sgt
../drivers/gpu/drm/i915/i915_scatterlist.h:164: warning: Function parameter or member 'release' not described in 'i915_refct_sgt_ops'
../drivers/gpu/drm/i915/i915_scatterlist.h:187: warning: Function parameter or member 'rsgt' not described in 'i915_refct_sgt_put'
../drivers/gpu/drm/i915/i915_scatterlist.h:198: warning: Function parameter or member 'rsgt' not described in 'i915_refct_sgt_get'
../drivers/gpu/drm/i915/i915_scatterlist.h:214: warning: Function parameter or member 'rsgt' not described in '__i915_refct_sgt_init'
HDRTEST drivers/gpu/drm/i915/i915_vma_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.o
HDRTEST drivers/gpu/drm/i915/intel_clock_gating.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf119.o
HDRTEST drivers/gpu/drm/i915/intel_device_info.h
../drivers/gpu/drm/i915/i915_request.h:176: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* Request queue structure.
../drivers/gpu/drm/i915/i915_request.h:477: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* Returns true if seq1 is later than seq2.
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_smc.o
HDRTEST drivers/gpu/drm/i915/intel_gvt.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm.o
HDRTEST drivers/gpu/drm/i915/intel_mchbar_regs.h
HDRTEST drivers/gpu/drm/i915/intel_memory_region.h
HDRTEST drivers/gpu/drm/i915/intel_pci_config.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.o
HDRTEST drivers/gpu/drm/i915/intel_pcode.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_pm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk208.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.o
HDRTEST drivers/gpu/drm/i915/intel_region_ttm.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.o
HDRTEST drivers/gpu/drm/i915/intel_runtime_pm.h
../drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'OP' not described in '__wait_for'
../drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'COND' not described in '__wait_for'
../drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'US' not described in '__wait_for'
../drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'Wmin' not described in '__wait_for'
../drivers/gpu/drm/i915/i915_utils.h:284: warning: Function parameter or member 'Wmax' not described in '__wait_for'
HDRTEST drivers/gpu/drm/i915/intel_sbi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm107.o
HDRTEST drivers/gpu/drm/i915/intel_step.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_crtc.o
HDRTEST drivers/gpu/drm/i915/intel_uncore.h
HDRTEST drivers/gpu/drm/i915/intel_wakeref.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_irq.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_color.o
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_tee.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/dc_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.o
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_irq.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_services.o
../drivers/gpu/drm/i915/i915_vma_resource.h:91: warning: Incorrect use of kernel-doc format: * struct i915_vma_bindinfo - Information needed for async bind
../drivers/gpu/drm/i915/i915_vma_resource.h:129: warning: Function parameter or member 'wakeref' not described in 'i915_vma_resource'
../drivers/gpu/drm/i915/i915_vma_resource.h:129: warning: Function parameter or member 'bi' not described in 'i915_vma_resource'
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_session.h
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_cmd.h
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp.h
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_types.h
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.h
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_cmn.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.o
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_huc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf100.o
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_pm.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.o
HDRTEST drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_42.h
HDRTEST drivers/gpu/drm/i915/selftests/igt_live_test.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf117.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.o
HDRTEST drivers/gpu/drm/i915/selftests/igt_atomic.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_psr.o
../drivers/gpu/drm/i915/i915_vma.h:145: warning: expecting prototype for i915_vma_offset(). Prototype was for i915_vma_size() instead
HDRTEST drivers/gpu/drm/i915/selftests/mock_gem_device.h
HDRTEST drivers/gpu/drm/i915/selftests/mock_drm.h
HDRTEST drivers/gpu/drm/i915/selftests/igt_reset.h
HDRTEST drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_hdcp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk104.o
HDRTEST drivers/gpu/drm/i915/selftests/lib_sw_fence.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_crc.o
HDRTEST drivers/gpu/drm/i915/selftests/i915_perf_selftests.h
HDRTEST drivers/gpu/drm/i915/selftests/mock_uncore.h
HDRTEST drivers/gpu/drm/i915/selftests/mock_gtt.h
HDRTEST drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
HDRTEST drivers/gpu/drm/i915/selftests/mock_request.h
HDRTEST drivers/gpu/drm/i915/selftests/i915_random.h
HDRTEST drivers/gpu/drm/i915/selftests/igt_spinner.h
../drivers/gpu/drm/i915/pxp/intel_pxp_types.h:96: warning: Function parameter or member 'dev_link' not described in 'intel_pxp'
HDRTEST drivers/gpu/drm/i915/selftests/librapl.h
HDRTEST drivers/gpu/drm/i915/selftests/mock_region.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gm200.o
HDRTEST drivers/gpu/drm/i915/selftests/i915_live_selftests.h
HDRTEST drivers/gpu/drm/i915/selftests/igt_mmap.h
HDRTEST drivers/gpu/drm/i915/selftests/igt_flush_test.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gp10b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fan.o
HDRTEST drivers/gpu/drm/i915/soc/intel_pch.h
HDRTEST drivers/gpu/drm/i915/soc/intel_dram.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/conversion.o
HDRTEST drivers/gpu/drm/i915/soc/intel_gmch.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/fixpt31_32.o
HDRTEST drivers/gpu/drm/i915/vlv_sideband.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/vector.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/dc_common.o
HDRTEST drivers/gpu/drm/i915/vlv_sideband_reg.h
HDRTEST drivers/gpu/drm/i915/vlv_suspend.h
LD [M] drivers/gpu/drm/i915/i915.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser_interface.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fannil.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fanpwm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/ic.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser_common.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table2.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table_helper2.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser2.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce60/command_table_helper_dce60.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf119.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce112/command_table_helper_dce112.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce112/command_table_helper2_dce112.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dce_calcs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/custom_float.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/bw_fixed.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_rq_dlg_helpers.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dml1_display_rq_dlg_calc.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn10/dcn10_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/dcn20_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_vba.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_rq_dlg_calc_20.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv41.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_rq_dlg_calc_20v2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/top/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20v2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_rq_dlg_calc_21.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_mode_vba_21.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/uvfn.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/ga100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gpio.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gf117.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gm20b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/falcon.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/dcn31_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/xtensa.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn321/dcn321_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn301/dcn301_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn302/dcn302_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gp102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/ga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/dcn314_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/rc_calc_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dcn_calcs.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dcn_calc_math.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/pci.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dcn_calc_auto.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/user.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce100/dce_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce110/dce110_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce112/dce112_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/head.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce120/dce120_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv1_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/vga.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv2_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_smu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/udisp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.o
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-xe] ✓ CI.Hooks: success for drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
` (3 preceding siblings ...)
2023-06-30 10:08 ` [Intel-xe] ✓ CI.Build: " Patchwork
@ 2023-06-30 10:09 ` Patchwork
2023-06-30 10:10 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
` (5 subsequent siblings)
10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-06-30 10:09 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
== Series Details ==
Series: drm/xe: uapi review submission
URL : https://patchwork.freedesktop.org/series/120052/
State : success
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
/workspace
+ pwd
+ ls -la
total 516
drwxrwxr-x 10 1003 1003 4096 Jun 30 10:08 .
drwxr-xr-x 1 root root 4096 Jun 30 10:08 ..
-rw-rw-r-- 1 1003 1003 398130 Jun 30 10:08 build.log
-rw-rw-r-- 1 1003 1003 5359 Jun 30 10:03 checkpatch.log
drwxrwxr-x 5 1003 1003 4096 Jun 30 10:02 ci
drwxrwxr-x 10 1003 1003 4096 Jun 30 10:02 docker
drwxrwxr-x 8 1003 1003 4096 Jun 30 10:02 .git
-rw-rw-r-- 1 1003 1003 195 Jun 30 10:03 git_apply.log
drwxrwxr-x 3 1003 1003 4096 Jun 30 10:02 .github
-rw-rw-r-- 1 1003 1003 233 Jun 30 10:02 .groovylintrc.json
-rw-rw-r-- 1 1003 1003 78 Jun 30 10:08 hooks.log
drwxrwxr-x 31 1003 1003 4096 Jun 30 10:08 kernel
-rw-rw-r-- 1 1003 1003 30144 Jun 30 10:03 kernel.mbox
-rw-rw-r-- 1 1003 1003 26861 Jun 30 10:04 kunit.log
drwxrwxr-x 42 1003 1003 4096 Jun 30 10:02 pipelines
-rw-rw-r-- 1 1003 1003 793 Jun 30 10:02 README.adoc
drwxrwxr-x 3 1003 1003 4096 Jun 30 10:02 scripts
drwxrwxr-x 2 1003 1003 4096 Jun 30 10:02 .vscode
+ uname -a
Linux 40d1f5e4ab78 5.4.0-149-generic #166-Ubuntu SMP Tue Apr 18 16:51:45 UTC 2023 x86_64 x86_64 x86_64 GNU/Linux
+ export
+ grep -Ei '(^|\W)CI_'
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64"
declare -x CI_KERNEL_IMAGES_DIR="/workspace/kernel/archive/boot"
declare -x CI_KERNEL_MODULES_DIR="/workspace/kernel/archive"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
+ '[' -n /workspace ']'
+ git_args='-C /workspace/kernel'
+ git_log_args=
+ git --no-pager -C /workspace/kernel log --format=oneline --abbrev-commit
ba42ad11f drm/xe: uapi review submission
d835d7f04 drm/xe: Enable PCI device earlier
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64 ']'
+ BUILD_DIR=/workspace/kernel/build64
+ cd /workspace/kernel
+ grep -q -e '^CONFIG_DRM_XE_DISPLAY=[yY]' /workspace/kernel/build64/.config
+ RESTORE_DISPLAY_CONFIG=1
+ trap cleanup EXIT
+ ./scripts/config --file /workspace/kernel/build64/.config --disable CONFIG_DRM_XE_DISPLAY
++ nproc
+ make -j48 O=/workspace/kernel/build64 modules_prepare
make[1]: Entering directory '/workspace/kernel/build64'
SYNC include/config/auto.conf.cmd
GEN Makefile
GEN Makefile
UPD include/generated/compile.h
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
DESCEND objtool
CALL ../scripts/checksyscalls.sh
HOSTCC /workspace/kernel/build64/tools/objtool/fixdep.o
HOSTLD /workspace/kernel/build64/tools/objtool/fixdep-in.o
LINK /workspace/kernel/build64/tools/objtool/fixdep
INSTALL libsubcmd_headers
CC /workspace/kernel/build64/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64/tools/objtool/weak.o
CC /workspace/kernel/build64/tools/objtool/check.o
CC /workspace/kernel/build64/tools/objtool/special.o
CC /workspace/kernel/build64/tools/objtool/builtin-check.o
CC /workspace/kernel/build64/tools/objtool/elf.o
CC /workspace/kernel/build64/tools/objtool/objtool.o
CC /workspace/kernel/build64/tools/objtool/orc_gen.o
CC /workspace/kernel/build64/tools/objtool/orc_dump.o
CC /workspace/kernel/build64/tools/objtool/libstring.o
CC /workspace/kernel/build64/tools/objtool/libctype.o
CC /workspace/kernel/build64/tools/objtool/str_error_r.o
CC /workspace/kernel/build64/tools/objtool/librbtree.o
CC /workspace/kernel/build64/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64/tools/objtool/arch/x86/decode.o
LD /workspace/kernel/build64/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64'
++ nproc
+ make -j48 O=/workspace/kernel/build64 M=drivers/gpu/drm/xe W=1
make[1]: Entering directory '/workspace/kernel/build64'
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC [M] drivers/gpu/drm/xe/xe_device.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC [M] drivers/gpu/drm/xe/xe_engine.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC [M] drivers/gpu/drm/xe/xe_gt.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
CC [M] drivers/gpu/drm/xe/xe_vm.o
CC [M] drivers/gpu/drm/xe/xe_vm_madvise.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
HDRTEST drivers/gpu/drm/xe/abi/guc_klvs_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_errors_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_slpc_abi.h
CC [M] drivers/gpu/drm/xe/tests/xe_bo_test.o
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_mmio_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_messages_abi.h
HDRTEST drivers/gpu/drm/xe/regs/xe_reg_defs.h
CC [M] drivers/gpu/drm/xe/tests/xe_dma_buf_test.o
HDRTEST drivers/gpu/drm/xe/regs/xe_guc_regs.h
CC [M] drivers/gpu/drm/xe/tests/xe_migrate_test.o
CC [M] drivers/gpu/drm/xe/tests/xe_pci_test.o
HDRTEST drivers/gpu/drm/xe/regs/xe_gt_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_gpu_commands.h
CC [M] drivers/gpu/drm/xe/tests/xe_rtp_test.o
HDRTEST drivers/gpu/drm/xe/regs/xe_lrc_layout.h
CC [M] drivers/gpu/drm/xe/tests/xe_wa_test.o
HDRTEST drivers/gpu/drm/xe/regs/xe_engine_regs.h
HDRTEST drivers/gpu/drm/xe/tests/xe_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_pci_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_migrate_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_dma_buf_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_bo_test.h
HDRTEST drivers/gpu/drm/xe/xe_bb.h
HDRTEST drivers/gpu/drm/xe/xe_bb_types.h
HDRTEST drivers/gpu/drm/xe/xe_bo.h
HDRTEST drivers/gpu/drm/xe/xe_bo_doc.h
HDRTEST drivers/gpu/drm/xe/xe_bo_evict.h
HDRTEST drivers/gpu/drm/xe/xe_bo_types.h
HDRTEST drivers/gpu/drm/xe/xe_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_devcoredump.h
HDRTEST drivers/gpu/drm/xe/xe_devcoredump_types.h
HDRTEST drivers/gpu/drm/xe/xe_device.h
HDRTEST drivers/gpu/drm/xe/xe_device_types.h
HDRTEST drivers/gpu/drm/xe/xe_dma_buf.h
HDRTEST drivers/gpu/drm/xe/xe_drv.h
HDRTEST drivers/gpu/drm/xe/xe_engine.h
HDRTEST drivers/gpu/drm/xe/xe_engine_types.h
HDRTEST drivers/gpu/drm/xe/xe_exec.h
HDRTEST drivers/gpu/drm/xe/xe_execlist.h
HDRTEST drivers/gpu/drm/xe/xe_execlist_types.h
HDRTEST drivers/gpu/drm/xe/xe_force_wake.h
HDRTEST drivers/gpu/drm/xe/xe_force_wake_types.h
HDRTEST drivers/gpu/drm/xe/xe_ggtt.h
HDRTEST drivers/gpu/drm/xe/xe_ggtt_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt.h
HDRTEST drivers/gpu/drm/xe/xe_gt_clock.h
HDRTEST drivers/gpu/drm/xe/xe_gt_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_mcr.h
HDRTEST drivers/gpu/drm/xe/xe_gt_pagefault.h
HDRTEST drivers/gpu/drm/xe/xe_gt_printk.h
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_topology.h
HDRTEST drivers/gpu/drm/xe/xe_gt_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc.h
HDRTEST drivers/gpu/drm/xe/xe_guc_ads.h
HDRTEST drivers/gpu/drm/xe/xe_guc_ads_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_ct.h
HDRTEST drivers/gpu/drm/xe/xe_guc_ct_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_guc_engine_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_fwif.h
HDRTEST drivers/gpu/drm/xe/xe_guc_hwconfig.h
HDRTEST drivers/gpu/drm/xe/xe_guc_log.h
HDRTEST drivers/gpu/drm/xe/xe_guc_log_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_pc.h
HDRTEST drivers/gpu/drm/xe/xe_guc_pc_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_submit.h
HDRTEST drivers/gpu/drm/xe/xe_guc_submit_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc_types.h
HDRTEST drivers/gpu/drm/xe/xe_huc.h
HDRTEST drivers/gpu/drm/xe/xe_huc_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_huc_types.h
HDRTEST drivers/gpu/drm/xe/xe_hw_engine.h
HDRTEST drivers/gpu/drm/xe/xe_hw_engine_types.h
HDRTEST drivers/gpu/drm/xe/xe_hw_fence.h
HDRTEST drivers/gpu/drm/xe/xe_hw_fence_types.h
HDRTEST drivers/gpu/drm/xe/xe_irq.h
HDRTEST drivers/gpu/drm/xe/xe_lrc.h
HDRTEST drivers/gpu/drm/xe/xe_lrc_types.h
HDRTEST drivers/gpu/drm/xe/xe_macros.h
HDRTEST drivers/gpu/drm/xe/xe_map.h
HDRTEST drivers/gpu/drm/xe/xe_migrate.h
HDRTEST drivers/gpu/drm/xe/xe_migrate_doc.h
HDRTEST drivers/gpu/drm/xe/xe_mmio.h
HDRTEST drivers/gpu/drm/xe/xe_mocs.h
HDRTEST drivers/gpu/drm/xe/xe_module.h
HDRTEST drivers/gpu/drm/xe/xe_pci.h
HDRTEST drivers/gpu/drm/xe/xe_pat.h
HDRTEST drivers/gpu/drm/xe/xe_pci_types.h
HDRTEST drivers/gpu/drm/xe/xe_pcode.h
HDRTEST drivers/gpu/drm/xe/xe_pcode_api.h
HDRTEST drivers/gpu/drm/xe/xe_platform_types.h
HDRTEST drivers/gpu/drm/xe/xe_pm.h
HDRTEST drivers/gpu/drm/xe/xe_preempt_fence.h
HDRTEST drivers/gpu/drm/xe/xe_preempt_fence_types.h
HDRTEST drivers/gpu/drm/xe/xe_pt.h
HDRTEST drivers/gpu/drm/xe/xe_pt_types.h
HDRTEST drivers/gpu/drm/xe/xe_pt_walk.h
HDRTEST drivers/gpu/drm/xe/xe_query.h
HDRTEST drivers/gpu/drm/xe/xe_reg_sr.h
HDRTEST drivers/gpu/drm/xe/xe_reg_sr_types.h
HDRTEST drivers/gpu/drm/xe/xe_reg_whitelist.h
HDRTEST drivers/gpu/drm/xe/xe_res_cursor.h
HDRTEST drivers/gpu/drm/xe/xe_ring_ops.h
HDRTEST drivers/gpu/drm/xe/xe_ring_ops_types.h
HDRTEST drivers/gpu/drm/xe/xe_rtp.h
HDRTEST drivers/gpu/drm/xe/xe_rtp_types.h
HDRTEST drivers/gpu/drm/xe/xe_sa.h
HDRTEST drivers/gpu/drm/xe/xe_sa_types.h
HDRTEST drivers/gpu/drm/xe/xe_sched_job.h
HDRTEST drivers/gpu/drm/xe/xe_sched_job_types.h
HDRTEST drivers/gpu/drm/xe/xe_step.h
HDRTEST drivers/gpu/drm/xe/xe_step_types.h
HDRTEST drivers/gpu/drm/xe/xe_sync.h
HDRTEST drivers/gpu/drm/xe/xe_sync_types.h
HDRTEST drivers/gpu/drm/xe/xe_tile.h
HDRTEST drivers/gpu/drm/xe/xe_tile_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_tile_sysfs_types.h
HDRTEST drivers/gpu/drm/xe/xe_trace.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_stolen_mgr.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_sys_mgr.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_vram_mgr.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_vram_mgr_types.h
HDRTEST drivers/gpu/drm/xe/xe_tuning.h
HDRTEST drivers/gpu/drm/xe/xe_uc.h
HDRTEST drivers/gpu/drm/xe/xe_uc_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_uc_fw.h
HDRTEST drivers/gpu/drm/xe/xe_uc_fw_abi.h
HDRTEST drivers/gpu/drm/xe/xe_uc_fw_types.h
HDRTEST drivers/gpu/drm/xe/xe_uc_types.h
HDRTEST drivers/gpu/drm/xe/xe_vm.h
HDRTEST drivers/gpu/drm/xe/xe_vm_doc.h
HDRTEST drivers/gpu/drm/xe/xe_vm_madvise.h
HDRTEST drivers/gpu/drm/xe/xe_vm_types.h
HDRTEST drivers/gpu/drm/xe/xe_wa.h
HDRTEST drivers/gpu/drm/xe/xe_wait_user_fence.h
HDRTEST drivers/gpu/drm/xe/xe_wopcm.h
HDRTEST drivers/gpu/drm/xe/xe_wopcm_types.h
GEN xe_wa_oob.c xe_wa_oob.h
GEN xe_wa_oob.c xe_wa_oob.h
CC [M] drivers/gpu/drm/xe/xe_guc.o
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
LD [M] drivers/gpu/drm/xe/xe.o
MODPOST drivers/gpu/drm/xe/Module.symvers
CC [M] drivers/gpu/drm/xe/xe.mod.o
CC [M] drivers/gpu/drm/xe/tests/xe_bo_test.mod.o
CC [M] drivers/gpu/drm/xe/tests/xe_dma_buf_test.mod.o
CC [M] drivers/gpu/drm/xe/tests/xe_migrate_test.mod.o
CC [M] drivers/gpu/drm/xe/tests/xe_pci_test.mod.o
CC [M] drivers/gpu/drm/xe/tests/xe_rtp_test.mod.o
CC [M] drivers/gpu/drm/xe/tests/xe_wa_test.mod.o
LD [M] drivers/gpu/drm/xe/tests/xe_bo_test.ko
LD [M] drivers/gpu/drm/xe/tests/xe_pci_test.ko
LD [M] drivers/gpu/drm/xe/tests/xe_rtp_test.ko
LD [M] drivers/gpu/drm/xe/tests/xe_wa_test.ko
LD [M] drivers/gpu/drm/xe/tests/xe_dma_buf_test.ko
LD [M] drivers/gpu/drm/xe/tests/xe_migrate_test.ko
LD [M] drivers/gpu/drm/xe/xe.ko
make[1]: Leaving directory '/workspace/kernel/build64'
+ cleanup
+ '[' 1 -eq 1 ']'
+ ./scripts/config --file /workspace/kernel/build64/.config --enable CONFIG_DRM_XE_DISPLAY
run-parts: executing /workspace/ci/hooks/20-kernel-doc
+ SRC_DIR=/workspace/kernel
+ cd /workspace/kernel
+ find drivers/gpu/drm/xe/ -name '*.[ch]' -not -path 'drivers/gpu/drm/xe/display/*'
+ xargs ./scripts/kernel-doc -Werror -none include/uapi/drm/xe_drm.h
All hooks done
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-xe] ✗ CI.checksparse: warning for drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
` (4 preceding siblings ...)
2023-06-30 10:09 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
@ 2023-06-30 10:10 ` Patchwork
2023-06-30 10:57 ` [Intel-xe] ○ CI.BAT: info " Patchwork
` (4 subsequent siblings)
10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-06-30 10:10 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
== Series Details ==
Series: drm/xe: uapi review submission
URL : https://patchwork.freedesktop.org/series/120052/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast d835d7f04101ccffa1978e3144b930bfe2af5eda
Sparse version: 0.6.1 (Ubuntu: 0.6.1-2build1)
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-xe] ○ CI.BAT: info for drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
` (5 preceding siblings ...)
2023-06-30 10:10 ` [Intel-xe] ✗ CI.checksparse: warning " Patchwork
@ 2023-06-30 10:57 ` Patchwork
2023-06-30 12:21 ` [Intel-xe] [PATCH DONTMERGE] " Thomas Hellström
` (3 subsequent siblings)
10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2023-06-30 10:57 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 349 bytes --]
== Series Details ==
Series: drm/xe: uapi review submission
URL : https://patchwork.freedesktop.org/series/120052/
State : info
== Summary ==
Participating hosts:
bat-pvc-2
bat-atsm-2
bat-dg2-oem2
bat-adlp-7
Missing hosts results[1]:
bat-dg2-oem2
Results: [xe-pw-120052v1](https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-120052v1/index.html)
[-- Attachment #2: Type: text/html, Size: 871 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
` (6 preceding siblings ...)
2023-06-30 10:57 ` [Intel-xe] ○ CI.BAT: info " Patchwork
@ 2023-06-30 12:21 ` Thomas Hellström
2023-06-30 23:40 ` Dixit, Ashutosh
` (2 subsequent siblings)
10 siblings, 0 replies; 20+ messages in thread
From: Thomas Hellström @ 2023-06-30 12:21 UTC (permalink / raw)
To: intel-xe
Review comments on our uAPI below.
/Thomas
On Fri, 2023-06-30 at 12:00 +0200, Thomas Hellström wrote:
> Add a copy of xe_drm.h for uAPI review purposes only. Never commit
> this,
> the intention is to perform an uAPI review in this thread and if
> needed
> move it to Gitlab for easier discussion.
>
> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> include/uapi/drm/xe_drm_reviewonly.h | 1009
> ++++++++++++++++++++++++++
> 1 file changed, 1009 insertions(+)
> create mode 100644 include/uapi/drm/xe_drm_reviewonly.h
>
> diff --git a/include/uapi/drm/xe_drm_reviewonly.h
> b/include/uapi/drm/xe_drm_reviewonly.h
> new file mode 100644
> index 000000000000..e890b131af91
> --- /dev/null
> +++ b/include/uapi/drm/xe_drm_reviewonly.h
> @@ -0,0 +1,1009 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef _UAPI_XE_DRM_H_
> +#define _UAPI_XE_DRM_H_
> +
> +#include "drm.h"
> +
> +#if defined(__cplusplus)
> +extern "C" {
> +#endif
> +
> +/* Please note that modifications to all structs defined here are
> + * subject to backwards-compatibility constraints.
> + */
> +
> +/**
> + * struct xe_user_extension - Base class for defining a chain of
> extensions
> + *
> + * Many interfaces need to grow over time. In most cases we can
> simply
> + * extend the struct and have userspace pass in more data. Another
> option,
> + * as demonstrated by Vulkan's approach to providing extensions for
> forward
> + * and backward compatibility, is to use a list of optional structs
> to
> + * provide those extra details.
> + *
> + * The key advantage to using an extension chain is that it allows
> us to
> + * redefine the interface more easily than an ever growing struct of
> + * increasing complexity, and for large parts of that interface to
> be
> + * entirely optional. The downside is more pointer chasing; chasing
> across
> + * the __user boundary with pointers encapsulated inside u64.
> + *
> + * Example chaining:
> + *
> + * .. code-block:: C
> + *
> + * struct xe_user_extension ext3 {
> + * .next_extension = 0, // end
> + * .name = ...,
> + * };
> + * struct xe_user_extension ext2 {
> + * .next_extension = (uintptr_t)&ext3,
> + * .name = ...,
> + * };
> + * struct xe_user_extension ext1 {
> + * .next_extension = (uintptr_t)&ext2,
> + * .name = ...,
> + * };
> + *
> + * Typically the struct xe_user_extension would be embedded in some
> uAPI
> + * struct, and in this case we would feed it the head of the
> chain(i.e ext1),
> + * which would then apply all of the above extensions.
> + *
> + */
> +struct xe_user_extension {
> + /**
> + * @next_extension:
> + *
> + * Pointer to the next struct xe_user_extension, or zero if
> the end.
> + */
> + __u64 next_extension;
> +
> + /**
> + * @name: Name of the extension.
> + *
> + * Note that the name here is just some integer.
> + *
> + * Also note that the name space for this is not global for
> the whole
> + * driver, but rather its scope/meaning is limited to the
> specific piece
> + * of uAPI which has embedded the struct xe_user_extension.
> + */
> + __u32 name;
> +
> + /**
> + * @pad: MBZ
> + *
> + * All undefined bits must be zero.
> + */
> + __u32 pad;
> +};
> +
> +/*
> + * xe specific ioctls.
> + *
> + * The device specific ioctl range is [DRM_COMMAND_BASE,
> DRM_COMMAND_END) ie
> + * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as
> offset
> + * against DRM_COMMAND_BASE and should be between [0x0, 0x60).
> + */
> +#define DRM_XE_DEVICE_QUERY 0x00
> +#define DRM_XE_GEM_CREATE 0x01
> +#define DRM_XE_GEM_MMAP_OFFSET 0x02
> +#define DRM_XE_VM_CREATE 0x03
> +#define DRM_XE_VM_DESTROY 0x04
> +#define DRM_XE_VM_BIND 0x05
> +#define DRM_XE_ENGINE_CREATE 0x06
> +#define DRM_XE_ENGINE_DESTROY 0x07
> +#define DRM_XE_EXEC 0x08
> +#define DRM_XE_MMIO 0x09
> +#define DRM_XE_ENGINE_SET_PROPERTY 0x0a
> +#define DRM_XE_WAIT_USER_FENCE 0x0b
> +#define DRM_XE_VM_MADVISE 0x0c
> +#define DRM_XE_ENGINE_GET_PROPERTY 0x0d
> +
> +/* Must be kept compact -- no holes */
> +#define
> DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
> +#define
> DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_B
> ASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
> +#define
> DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
> +#define
> DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_VM_CREATE, struct drm_xe_vm_create)
> +#define DRM_IOCTL_XE_VM_DESTROY
> DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct
> drm_xe_vm_destroy)
> +#define DRM_IOCTL_XE_VM_BIND
> DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
> +#define
> DRM_IOCTL_XE_ENGINE_CREATE DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_ENGINE_CREATE, struct drm_xe_engine_create)
> +#define
> DRM_IOCTL_XE_ENGINE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_ENGINE_GET_PROPERTY, struct drm_xe_engine_get_property)
> +#define DRM_IOCTL_XE_ENGINE_DESTROY
> DRM_IOW(DRM_COMMAND_BASE + DRM_XE_ENGINE_DESTROY, struct
> drm_xe_engine_destroy)
> +#define DRM_IOCTL_XE_EXEC
> DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
> +#define
> DRM_IOCTL_XE_MMIO DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_MMIO, struct drm_xe_mmio)
> +#define DRM_IOCTL_XE_ENGINE_SET_PROPERTY
> DRM_IOW(DRM_COMMAND_BASE + DRM_XE_ENGINE_SET_PROPERTY, struct
> drm_xe_engine_set_property)
> +#define
> DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
> +#define DRM_IOCTL_XE_VM_MADVISE
> DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct
> drm_xe_vm_madvise)
> +
> +/**
> + * enum drm_xe_memory_class - Supported memory classes.
> + */
> +enum drm_xe_memory_class {
> + /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
> + XE_MEM_REGION_CLASS_SYSMEM = 0,
> + /**
> + * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
> + * represents the memory that is local to the device, which
> we
> + * call VRAM. Not valid on integrated platforms.
> + */
> + XE_MEM_REGION_CLASS_VRAM
> +};
> +
> +/**
> + * struct drm_xe_query_mem_region - Describes some region as known
> to
> + * the driver.
> + */
> +struct drm_xe_query_mem_region {
> + /**
> + * @mem_class: The memory class describing this region.
> + *
> + * See enum drm_xe_memory_class for supported values.
> + */
> + __u16 mem_class;
> + /**
> + * @instance: The instance for this region.
> + *
> + * The @mem_class and @instance taken together will always
> give
> + * a unique pair.
> + */
> + __u16 instance;
> + /** @pad: MBZ */
> + __u32 pad;
> + /**
> + * @min_page_size: Min page-size in bytes for this region.
> + *
> + * When the kernel allocates memory for this region, the
> + * underlying pages will be at least @min_page_size in size.
> + *
> + * Important note: When userspace allocates a GTT address
> which
> + * can point to memory allocated from this region, it must
> also
> + * respect this minimum alignment. This is enforced by the
> + * kernel.
> + */
> + __u32 min_page_size;
> + /**
> + * @max_page_size: Max page-size in bytes for this region.
> + */
> + __u32 max_page_size;
What's the intended usage for this field? What exactly does
max_page_size mean and how is UMD expected to use it? Is it the max
size of a GTT page-table entry?
> + /**
> + * @total_size: The usable size in bytes for this region.
> + */
> + __u64 total_size;
> + /**
> + * @used: Estimate of the memory used in bytes for this
> region.
> + *
> + * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
> + * accounting. Without this the value here will always equal
> + * zero.
> + */
> + __u64 used;
> + /** @reserved: MBZ */
> + __u64 reserved[8];
> +};
> +
> +/**
> + * struct drm_xe_query_mem_usage - describe memory regions and usage
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
> + * struct drm_xe_query_mem_usage in .data.
> + */
> +struct drm_xe_query_mem_usage {
> + /** @num_regions: number of memory regions returned in
> @regions */
> + __u32 num_regions;
> + /** @pad: MBZ */
> + __u32 pad;
> + /** @regions: The returned regions for this device */
> + struct drm_xe_query_mem_region regions[];
> +};
> +
> +/**
> + * struct drm_xe_query_config - describe the device configuration
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
> + * struct drm_xe_query_config in .data.
> + */
> +struct drm_xe_query_config {
> + /** @num_params: number of parameters returned in info */
> + __u32 num_params;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> +#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
> +#define XE_QUERY_CONFIG_FLAGS 1
> + #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
> + #define XE_QUERY_CONFIG_FLAGS_USE_GUC (0x1 << 1)
> +#define XE_QUERY_CONFIG_MIN_ALIGNEMENT 2
s/ALIGNEMENT/ALIGNMENT/
> +#define XE_QUERY_CONFIG_VA_BITS 3
> +#define XE_QUERY_CONFIG_GT_COUNT 4
General: Should we replace GT with tile now, and avoid GT specific data
in the IOCTL interface (but keep it in the sysfs interface)?
> +#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> +#define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
> +#define
> XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_ENGINE_PR
> IORITY + 1)
We should document all the above better.
> + /** @info: array of elements containing the config info */
> + __u64 info[];
How is info laid out? Is it key-value pairs? Document.
> +};
> +
> +/**
> + * struct drm_xe_query_gts - describe GTs
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_GTS, then the reply uses struct
> + * drm_xe_query_gts in .data.
> + */
See above on tiles vs gts.
> +struct drm_xe_query_gts {
> + /** @num_gt: number of GTs returned in gts */
> + __u32 num_gt;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /**
> + * @gts: The GTs returned for this device
> + *
> + * TODO: convert drm_xe_query_gt to proper kernel-doc.
> + * TODO: Perhaps info about every mem region relative to this
> GT? e.g.
> + * bandwidth between this GT and remote region?
> + */
> + struct drm_xe_query_gt {
> +#define XE_QUERY_GT_TYPE_MAIN 0
> +#define XE_QUERY_GT_TYPE_REMOTE 1
> +#define XE_QUERY_GT_TYPE_MEDIA 2
> + __u16 type;
> + __u16 instance;
> + __u32 clock_freq;
> + __u64 features;
> + __u64 native_mem_regions; /* bit mask of
> instances from drm_xe_query_mem_usage */
> + __u64 slow_mem_regions; /* bit mask of
> instances from drm_xe_query_mem_usage */
> + __u64 inaccessible_mem_regions; /* bit mask of
> instances from drm_xe_query_mem_usage */
> + __u64 reserved[8];
> + } gts[];
> +};
> +
> +/**
> + * struct drm_xe_query_topology_mask - describe the topology mask of
> a GT
> + *
> + * This is the hardware topology which reflects the internal
> physical
> + * structure of the GPU.
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
> + * struct drm_xe_query_topology_mask in .data.
> + */
Again, tile vs GT.
> +struct drm_xe_query_topology_mask {
> + /** @gt_id: GT ID the mask is associated with */
> + __u16 gt_id;
> +
> + /*
> + * To query the mask of Dual Sub Slices (DSS) available for
> geometry
> + * operations. For example a query response containing the
> following
> + * in mask:
> + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> + * means 32 DSS are available for geometry.
> + */
> +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> + /*
> + * To query the mask of Dual Sub Slices (DSS) available for
> compute
> + * operations. For example a query response containing the
> following
> + * in mask:
> + * DSS_COMPUTE ff ff ff ff 00 00 00 00
> + * means 32 DSS are available for compute.
> + */
> +#define XE_TOPO_DSS_COMPUTE (1 << 1)
> + /*
> + * To query the mask of Execution Units (EU) available per
> Dual Sub
> + * Slices (DSS). For example a query response containing the
> following
> + * in mask:
> + * EU_PER_DSS ff ff 00 00 00 00 00 00
> + * means each DSS has 16 EU.
> + */
> +#define XE_TOPO_EU_PER_DSS (1 << 2)
> + /** @type: type of mask */
> + __u16 type;
> +
> + /** @num_bytes: number of bytes in requested mask */
> + __u32 num_bytes;
> +
> + /** @mask: little-endian mask of @num_bytes */
> + __u8 mask[];
> +};
> +
> +/**
> + * struct drm_xe_device_query - main structure to query device
> information
> + *
> + * If size is set to 0, the driver fills it with the required size
> for the
> + * requested type of data to query. If size is equal to the required
> size,
> + * the queried information is copied into data.
> + *
> + * For example the following code snippet allows retrieving and
> printing
> + * information about the device engines with
> DRM_XE_DEVICE_QUERY_ENGINES:
What happens if user-space uses a too small value of .size?
> + *
> + * .. code-block:: C
> + *
> + * struct drm_xe_engine_class_instance *hwe;
> + * struct drm_xe_device_query query = {
> + * .extensions = 0,
> + * .query = DRM_XE_DEVICE_QUERY_ENGINES,
> + * .size = 0,
> + * .data = 0,
> + * };
> + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> + * hwe = malloc(query.size);
> + * query.data = (uintptr_t)hwe;
> + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> + * int num_engines = query.size / sizeof(*hwe);
> + * for (int i = 0; i < num_engines; i++) {
> + * printf("Engine %d: %s\n", i,
> + * hwe[i].engine_class ==
> DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
> + * hwe[i].engine_class ==
> DRM_XE_ENGINE_CLASS_COPY ? "COPY":
> + * hwe[i].engine_class ==
> DRM_XE_ENGINE_CLASS_VIDEO_DECODE ? "VIDEO_DECODE":
> + * hwe[i].engine_class ==
> DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ? "VIDEO_ENHANCE":
> + * hwe[i].engine_class ==
> DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
> + * "UNKNOWN");
> + * }
> + * free(hwe);
> + */
> +struct drm_xe_device_query {
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> +#define DRM_XE_DEVICE_QUERY_ENGINES 0
> +#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
> +#define DRM_XE_DEVICE_QUERY_CONFIG 2
> +#define DRM_XE_DEVICE_QUERY_GTS 3
> +#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> +#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> + /** @query: The type of data to query */
> + __u32 query;
> +
> + /** @size: Size of the queried data */
> + __u32 size;
> +
> + /** @data: Queried data is placed here */
> + __u64 data;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_gem_create {
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> + /**
> + * @size: Requested size for the object
> + *
> + * The (page-aligned) allocated size for the object will be
> returned.
> + */
> + __u64 size;
> +
> +#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> +#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
Can we use a define for the magic shift of 24, explaining why it is
used (24 bits reserved)
> + /**
> + * @flags: Flags, currently a mask of memory instances of
> where BO can
> + * be placed
> + */
> + __u32 flags;
> +
> + /**
> + * @vm_id: Attached VM, if any
> + *
> + * If a VM is specified, this BO must:
> + *
> + * 1. Only ever be bound to that VM.
> + *
> + * 2. Cannot be exported as a PRIME fd.
> + */
Remove newlines in item list?
> + __u32 vm_id;
> +
> + /**
> + * @handle: Returned handle for the object.
> + *
> + * Object handles are nonzero.
> + */
> + __u32 handle;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_gem_mmap_offset {
With TTM the mmap offset is known at bo creation time, so could be
returned from gem create, but that restricts future implementations.
Perhaps worth keeping the mmap offset IOCTL.
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> + /** @handle: Handle for the object being mapped. */
> + __u32 handle;
> +
> + /** @flags: Must be zero */
> + __u32 flags;
> +
> + /** @offset: The fake offset to use for subsequent mmap call
> */
> + __u64 offset;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/**
> + * struct drm_xe_vm_bind_op_error_capture - format of VM bind op
> error capture
> + */
Revisit after the removal of the VM_BIND async worker / VM_BIND
refactoring?
> +struct drm_xe_vm_bind_op_error_capture {
> + /** @error: errno that occured */
> + __s32 error;
> +
> + /** @op: operation that encounter an error */
> + __u32 op;
> +
> + /** @addr: address of bind op */
> + __u64 addr;
> +
> + /** @size: size of bind */
> + __u64 size;
> +};
> +
> +/** struct drm_xe_ext_vm_set_property - VM set property extension */
Revisit after the removal of the VM_BIND async worker / VM_BIND
refactoring?
> +struct drm_xe_ext_vm_set_property {
> + /** @base: base user extension */
> + struct xe_user_extension base;
> +
> +#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_create {
> +#define XE_VM_EXTENSION_SET_PROPERTY 0
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> +#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> +#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
We should think a bit about this. I'd like to see s/COMPUTE/LR/ here,
and then the KMD can choose between preempt-fence mode or fault mode
which are the two ways to implement LR. A client wanting to force FAULT
mode can do that with _CREATE_FORCE_FAULT_MODE
> +#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
> +#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> + /** @flags: Flags */
> + __u32 flags;
> +
> + /** @vm_id: Returned VM ID */
> + __u32 vm_id;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_destroy {
> + /** @vm_id: VM ID */
> + __u32 vm_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_bind_op {
> + /**
> + * @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ
> for UNMAP
> + */
> + __u32 obj;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + union {
> + /**
> + * @obj_offset: Offset into the object, MBZ for
> CLEAR_RANGE,
> + * ignored for unbind
> + */
> + __u64 obj_offset;
> +
> + /** @userptr: user pointer to bind on */
> + __u64 userptr;
> + };
> +
> + /**
> + * @range: Number of bytes from the object to bind to addr,
> MBZ for UNMAP_ALL
> + */
> + __u64 range;
> +
> + /** @addr: Address to operate on, MBZ for UNMAP_ALL */
> + __u64 addr;
> +
> + /**
> + * @tile_mask: Mask for which tiles to create binds for, 0 ==
> All tiles,
> + * only applies to creating new VMAs
> + */
> + __u64 tile_mask;
> +
> +#define XE_VM_BIND_OP_MAP 0x0
> +#define XE_VM_BIND_OP_UNMAP 0x1
> +#define XE_VM_BIND_OP_MAP_USERPTR 0x2
> +#define XE_VM_BIND_OP_RESTART 0x3
> +#define XE_VM_BIND_OP_UNMAP_ALL 0x4
> +#define XE_VM_BIND_OP_PREFETCH 0x5
> +
> +#define XE_VM_BIND_FLAG_READONLY (0x1 << 16)
> + /*
> + * A bind ops completions are always async, hence the support
> for out
> + * sync. This flag indicates the allocation of the memory for
> new page
> + * tables and the job to program the pages tables is
> asynchronous
> + * relative to the IOCTL. That part of a bind operation can
> fail under
> + * memory pressure, the job in practice can't fail unless the
> system is
> + * totally shot.
> + *
> + * If this flag is clear and the IOCTL doesn't return an
> error, in
> + * practice the bind op is good and will complete.
> + *
> + * If this flag is set and doesn't return an error, the bind
> op can
> + * still fail and recovery is needed. If configured, the bind
> op that
> + * caused the error will be captured in
> drm_xe_vm_bind_op_error_capture.
> + * Once the user sees the error (via a ufence +
> + * XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS), it should
> free memory
> + * via non-async unbinds, and then restart all queue'd async
> binds op via
> + * XE_VM_BIND_OP_RESTART. Or alternatively the user should
> destroy the
> + * VM.
> + *
> + * This flag is only allowed when
> DRM_XE_VM_CREATE_ASYNC_BIND_OPS is
> + * configured in the VM and must be set if the VM is
> configured with
> + * DRM_XE_VM_CREATE_ASYNC_BIND_OPS and not in an error state.
> + */
> +#define XE_VM_BIND_FLAG_ASYNC (0x1 << 17)
> + /*
> + * Valid on a faulting VM only, do the MAP operation
> immediately rather
> + * than differing the MAP to the page fault handler.
s/differing/deferring/. Perhaps a NOP on non-faulting VMs
> + */
> +#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 18)
> + /*
> + * When the NULL flag is set, the page tables are setup with
> a special
> + * bit which indicates writes are dropped and all reads
> return zero. In
> + * the future, the NULL flags will only be valid for
> XE_VM_BIND_OP_MAP
> + * operations, the BO handle MBZ, and the BO offset MBZ. This
> flag is
> + * intended to implement VK sparse bindings.
> + */
Revisit the above, and align to consensus.
> +#define XE_VM_BIND_FLAG_NULL (0x1 << 19)
> + /** @op: Operation to perform (lower 16 bits) and flags
> (upper 16 bits) */
> + __u32 op;
Can we use two __u16s instead?
> +
> + /** @mem_region: Memory region to prefetch VMA to, instance
> not a mask */
> + __u32 region;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_bind {
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> + /** @vm_id: The ID of the VM to bind to */
> + __u32 vm_id;
> +
> + /**
> + * @engine_id: engine_id, must be of class
> DRM_XE_ENGINE_CLASS_VM_BIND
> + * and engine must have same vm_id. If zero, the default VM
> bind engine
> + * is used.
> + */
> + __u32 engine_id;
General: engine vs context. Discussion going on elsewhere.
> +
> + /** @num_binds: number of binds in this IOCTL */
> + __u32 num_binds;
num_ops?
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + union {
> + /** @bind: used if num_binds == 1 */
> + struct drm_xe_vm_bind_op bind;
> +
> + /**
> + * @vector_of_binds: userptr to array of struct
> + * drm_xe_vm_bind_op if num_binds > 1
> + */
> + __u64 vector_of_binds;
> + };
> +
> + /** @num_syncs: amount of syncs to wait on */
> + __u32 num_syncs;
> +
> + /** @pad2: MBZ */
> + __u32 pad2;
> +
> + /** @syncs: pointer to struct drm_xe_sync array */
> + __u64 syncs;
Disable in-syncs on LR vms, and user-fence in-syncs in general?
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/** struct drm_xe_ext_engine_set_property - engine set property
> extension */
Is this for multiple properties per ioctl? Document.
> +struct drm_xe_ext_engine_set_property {
> + /** @base: base user extension */
> + struct xe_user_extension base;
> +
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @value: property value */
> + __u64 value;
> +};
> +
> +/**
> + * struct drm_xe_engine_set_property - engine set property
> + *
> + * Same namespace for extensions as drm_xe_engine_create
> + */
> +struct drm_xe_engine_set_property {
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> + /** @engine_id: Engine ID */
> + __u32 engine_id;
> +
> +#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
> +#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
> +#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
Document. Do these open up for DoS vulnerabilities?
> + /*
> + * Long running or ULLS engine mode. DMA fences not allowed
> in this
> + * mode. Must match the value of
> DRM_XE_VM_CREATE_COMPUTE_MODE, serves
> + * as a sanity check the UMD knows what it is doing. Can only
> be set at
> + * engine create time.
> + */
s/COMPUTE/LR/ ?
> +#define XE_ENGINE_SET_PROPERTY_COMPUTE_MODE 3
> +#define XE_ENGINE_SET_PROPERTY_PERSISTENCE 4
> +#define XE_ENGINE_SET_PROPERTY_JOB_TIMEOUT 5
> +#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
> +#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
> +#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
Documentation?
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/** struct drm_xe_engine_class_instance - instance of an engine
> class */
> +struct drm_xe_engine_class_instance {
contex / engine?
> +#define DRM_XE_ENGINE_CLASS_RENDER 0
> +#define DRM_XE_ENGINE_CLASS_COPY 1
> +#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
> +#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
> +#define DRM_XE_ENGINE_CLASS_COMPUTE 4
> + /*
> + * Kernel only class (not actual hardware engine class). Used
> for
> + * creating ordered queues of VM bind operations.
> + */
> +#define DRM_XE_ENGINE_CLASS_VM_BIND 5
> + __u16 engine_class;
> +
> + __u16 engine_instance;
> + __u16 gt_id;
tile/gt?
> +};
> +
> +struct drm_xe_engine_create {
context/engine?
> +#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> + /** @width: submission width (number BB per exec) for this
> engine */
> + __u16 width;
> +
> + /** @num_placements: number of valid placements for this
> engine */
> + __u16 num_placements;
> +
> + /** @vm_id: VM to use for this engine */
> + __u32 vm_id;
> +
> + /** @flags: MBZ */
> + __u32 flags;
> +
> + /** @engine_id: Returned engine ID */
> + __u32 engine_id;
> +
> + /**
> + * @instances: user pointer to a 2-d array of struct
> + * drm_xe_engine_class_instance
> + *
> + * length = width (i) * num_placements (j)
> + * index = j + i * width
> + */
> + __u64 instances;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_engine_get_property {
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
We should document for each extension pointer what extensions are
currently supported.
> +
> + /** @engine_id: Engine ID */
> + __u32 engine_id;
> +
> +#define XE_ENGINE_GET_PROPERTY_BAN 0
> + /** @property: property to get */
> + __u32 property;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_engine_destroy {
> + /** @engine_id: Engine ID */
> + __u32 engine_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_sync {
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> +#define DRM_XE_SYNC_SYNCOBJ 0x0
> +#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
> +#define DRM_XE_SYNC_DMA_BUF 0x2
> +#define DRM_XE_SYNC_USER_FENCE 0x3
> +#define DRM_XE_SYNC_SIGNAL 0x10
An enum or flags? Should separate __u16 again?
> + __u32 flags;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + union {
> + __u32 handle;
> +
> + /**
> + * @addr: Address of user fence. When sync passed in
> via exec
> + * IOCTL this a GPU address in the VM. When sync
> passed in via
> + * VM bind IOCTL this is a user pointer. In either
> case, it is
> + * the users responsibility that this address is
> present and
> + * mapped when the user fence is signalled. Must be
> qword
> + * aligned.
> + */
Document the size of the user fence value? Does Xe guarantee atomicity
when updating? (I guess we must do). In that case we must look at
whether copy_to_user(), put_user() etc guarantees that or whether we
actually need to do a get_user_page, kmap it and perform a kmd atomic
operation.
> + __u64 addr;
> + };
> +
> + __u64 timeline_value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_exec {
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> + /** @vm_id: VM ID to run batch buffer in */
> + __u32 engine_id;
> +
> + /** @num_syncs: Amount of struct drm_xe_sync in array. */
> + __u32 num_syncs;
What sync-types are allowed and correctly handled?
> +
> + /** @syncs: Pointer to struct drm_xe_sync array. */
> + __u64 syncs;
> +
> + /**
> + * @address: address of batch buffer if num_batch_buffer == 1
> or an
> + * array of batch buffer addresses
> + */
> + __u64 address;
> +
> + /**
> + * @num_batch_buffer: number of batch buffer in this exec,
> must match
> + * the width of the engine
> + */
> + __u16 num_batch_buffer;
> +
> + /** @pad: MBZ */
> + __u16 pad[3];
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_mmio {
Is this IOCTL generally available to all clients? or CAP_SYS_ADMIN
only?
On a first look this looks like a pretty dangerous IOCTL. Who's going
to use it and for what?
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> + __u32 addr;
> +
> +#define DRM_XE_MMIO_8BIT 0x0
> +#define DRM_XE_MMIO_16BIT 0x1
> +#define DRM_XE_MMIO_32BIT 0x2
> +#define DRM_XE_MMIO_64BIT 0x3
> +#define DRM_XE_MMIO_BITS_MASK 0x3
> +#define DRM_XE_MMIO_READ 0x4
> +#define DRM_XE_MMIO_WRITE 0x8
> + __u32 flags;
> +
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/**
> + * struct drm_xe_wait_user_fence - wait user fence
> + *
> + * Wait on user fence, XE will wakeup on every HW engine interrupt
> in the
> + * instances list and check if user fence is complete::
> + *
> + * (*addr & MASK) OP (VALUE & MASK)
> + *
> + * Returns to user on user fence completion or timeout.
> + */
> +struct drm_xe_wait_user_fence {
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> + union {
> + /**
> + * @addr: user pointer address to wait on, must qword
> aligned
And qword sized?
> + */
> + __u64 addr;
> +
> + /**
> + * @vm_id: The ID of the VM which encounter an error
> used with
> + * DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be
> clear.
> + */
> + __u64 vm_id;
> + };
> +
> +#define DRM_XE_UFENCE_WAIT_EQ 0
> +#define DRM_XE_UFENCE_WAIT_NEQ 1
> +#define DRM_XE_UFENCE_WAIT_GT 2
> +#define DRM_XE_UFENCE_WAIT_GTE 3
> +#define DRM_XE_UFENCE_WAIT_LT 4
> +#define DRM_XE_UFENCE_WAIT_LTE 5
> + /** @op: wait operation (type of comparison) */
> + __u16 op;
> +
> +#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait
> on VM bind */
> +#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
> +#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
> + /** @flags: wait flags */
> + __u16 flags;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @value: compare value */
> + __u64 value;
> +
> +#define DRM_XE_UFENCE_WAIT_U8 0xffu
> +#define DRM_XE_UFENCE_WAIT_U16 0xffffu
> +#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
> +#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
> + /** @mask: comparison mask */
> + __u64 mask;
> + /**
> + * @timeout: how long to wait before bailing, value in
> nanoseconds.
> + * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative
> timeout)
> + * it contains timeout expressed in nanoseconds to wait
> (fence will
> + * expire at now() + timeout).
> + * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute
> timeout) wait
> + * will end at timeout (uses system MONOTONIC_CLOCK).
> + * Passing negative timeout leads to neverending wait.
> + *
> + * On relative timeout this value is updated with timeout
> left
> + * (for restarting the call in case of signal delivery).
> + * On absolute timeout this value stays intact (restarted
> call still
> + * expire at the same point of time).
> + */
> + __s64 timeout;
> +
> + /**
> + * @num_engines: number of engine instances to wait on, must
> be zero
> + * when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + */
> + __u64 num_engines;
> +
> + /**
> + * @instances: user pointer to array of
> drm_xe_engine_class_instance to
> + * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + */
> + __u64 instances;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_madvise {
> + /** @extensions: Pointer to the first extension struct, if
> any */
> + __u64 extensions;
> +
> + /** @vm_id: The ID VM in which the VMA exists */
> + __u32 vm_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @range: Number of bytes in the VMA */
> + __u64 range;
> +
> + /** @addr: Address of the VMA to operation on */
> + __u64 addr;
GPU VA?
Does the addr and range need to exactly match an existing vma. What
happens otherwise.
> +
> + /*
> + * Setting the preferred location will trigger a migrate of
> the VMA
> + * backing store to new location if the backing store is
> already
> + * allocated.
> + *
> + * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
> + * drm_xe_memory_class.
> + */
> +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
> +#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
> + /*
> + * In this case lower 32 bits are mem class, upper 32 are GT.
> + * Combination provides a single IOCTL plus migrate VMA to
> preferred
> + * location.
> + */
> +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
> + /*
> + * The CPU will do atomic memory operations to this VMA. Must
> be set on
> + * some devices for atomics to behave correctly.
> + */
> +#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
> + /*
> + * The device will do atomic memory operations to this VMA.
> Must be set
> + * on some devices for atomics to behave correctly.
> + */
> +#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
> + /*
> + * Priority WRT to eviction (moving from preferred memory
> location due
> + * to memory pressure). The lower the priority, the more
> likely to be
> + * evicted.
> + */
> +#define DRM_XE_VM_MADVISE_PRIORITY 5
> +#define DRM_XE_VMA_PRIORITY_LOW 0
> +#define DRM_XE_VMA_PRIORITY_NORMAL 1 /*
> Default */
> +#define DRM_XE_VMA_PRIORITY_HIGH 2 /*
> Must be elevated user */
> + /* Pin the VMA in memory, must be elevated user */
> +#define DRM_XE_VM_MADVISE_PIN 6
>
s/elevated user/user has elevated privileges/
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @pad2: MBZ */
> + __u32 pad2;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +#if defined(__cplusplus)
> +}
> +#endif
> +
> +#endif /* _UAPI_XE_DRM_H_ */
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
` (7 preceding siblings ...)
2023-06-30 12:21 ` [Intel-xe] [PATCH DONTMERGE] " Thomas Hellström
@ 2023-06-30 23:40 ` Dixit, Ashutosh
2023-07-05 21:19 ` Matt Roper
2023-07-06 4:20 ` Matt Roper
[not found] ` <76c3d534-453a-7fd3-6fc8-cf30e9c8d464@intel.com>
10 siblings, 1 reply; 20+ messages in thread
From: Dixit, Ashutosh @ 2023-06-30 23:40 UTC (permalink / raw)
To: intel-xe; +Cc: Matt Roper, Lionel Landwerlin
On Fri, 30 Jun 2023 03:00:59 -0700, Thomas Hellström wrote:
>
I have a question about the toplogy query below. I am not hugely familiar
with why/how this particular struct was chosen nor the history here, but
anyway.
> +/**
> + * struct drm_xe_query_topology_mask - describe the topology mask of a GT
> + *
> + * This is the hardware topology which reflects the internal physical
> + * structure of the GPU.
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
> + * struct drm_xe_query_topology_mask in .data.
> + */
> +struct drm_xe_query_topology_mask {
> + /** @gt_id: GT ID the mask is associated with */
> + __u16 gt_id;
> +
> + /*
> + * To query the mask of Dual Sub Slices (DSS) available for geometry
> + * operations. For example a query response containing the following
> + * in mask:
> + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> + * means 32 DSS are available for geometry.
> + */
> +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> + /*
> + * To query the mask of Dual Sub Slices (DSS) available for compute
> + * operations. For example a query response containing the following
> + * in mask:
> + * DSS_COMPUTE ff ff ff ff 00 00 00 00
> + * means 32 DSS are available for compute.
> + */
> +#define XE_TOPO_DSS_COMPUTE (1 << 1)
> + /*
> + * To query the mask of Execution Units (EU) available per Dual Sub
> + * Slices (DSS). For example a query response containing the following
> + * in mask:
> + * EU_PER_DSS ff ff 00 00 00 00 00 00
> + * means each DSS has 16 EU.
> + */
> +#define XE_TOPO_EU_PER_DSS (1 << 2)
> + /** @type: type of mask */
> + __u16 type;
> +
> + /** @num_bytes: number of bytes in requested mask */
> + __u32 num_bytes;
> +
> + /** @mask: little-endian mask of @num_bytes */
> + __u8 mask[];
> +};
So typically to consume the above struct, userspace needs additional
information, specifically 'max_subslices' and 'max_eus_per_subslice' which
was included in i915 'struct drm_i915_query_topology_info'.
For example to consume 'struct drm_xe_query_topology_mask' I had recently
to write the following code in IGT because this information was not
available through 'struct drm_xe_query_topology_mask':
/* Fixed fields, see fill_topology_info() and intel_sseu_set_info() in i915 */
i915_topinfo.max_slices = 1; /* always 1 */
if (IS_PONTEVECCHIO(xe_dev_id(drm_fd))) {
i915_topinfo.max_subslices = 64;
i915_topinfo.max_eus_per_subslice = 8;
} else if (intel_graphics_ver(xe_dev_id(drm_fd)) >= IP_VER(12, 50)) {
i915_topinfo.max_subslices = 32;
i915_topinfo.max_eus_per_subslice = 16;
} else if (intel_graphics_ver(xe_dev_id(drm_fd)) >= IP_VER(12, 0)) {
i915_topinfo.max_subslices = 6;
i915_topinfo.max_eus_per_subslice = 16;
} else {
igt_assert(0);
}
So, if we are going to expose 'struct drm_xe_query_topology_mask' as it is
above through xe uapi, are we assuming that userspace has out of band
knowledge of 'max_subslices' and 'max_eus_per_subslice'? Or should this
information be (somehow) added to the above struct?
Another option (which sort of works but only approximately) would be to set
'num_bytes' field in 'struct drm_xe_query_topology_mask' to actual number
of bytes in the mask. At present it is set unconditionally to 8 in
query_gt_topology(), irrespective of the actual num bytes in the masks
which is basically (again in i915 parlance):
i915_topinfo.subslice_stride = DIV_ROUND_UP(i915_topinfo.max_subslices, 8);
i915_topinfo.eu_stride = DIV_ROUND_UP(i915_topinfo.max_eus_per_subslice, 8);
If we go the 'num_bytes' route, that would be just an implementation change
not a uapi change.
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-06-30 23:40 ` Dixit, Ashutosh
@ 2023-07-05 21:19 ` Matt Roper
2023-07-05 22:33 ` Dixit, Ashutosh
0 siblings, 1 reply; 20+ messages in thread
From: Matt Roper @ 2023-07-05 21:19 UTC (permalink / raw)
To: Dixit, Ashutosh; +Cc: intel-xe, Lionel Landwerlin
On Fri, Jun 30, 2023 at 04:40:54PM -0700, Dixit, Ashutosh wrote:
> On Fri, 30 Jun 2023 03:00:59 -0700, Thomas Hellström wrote:
> >
>
> I have a question about the toplogy query below. I am not hugely familiar
> with why/how this particular struct was chosen nor the history here, but
> anyway.
>
> > +/**
> > + * struct drm_xe_query_topology_mask - describe the topology mask of a GT
> > + *
> > + * This is the hardware topology which reflects the internal physical
> > + * structure of the GPU.
> > + *
> > + * If a query is made with a struct drm_xe_device_query where .query
> > + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
> > + * struct drm_xe_query_topology_mask in .data.
> > + */
> > +struct drm_xe_query_topology_mask {
> > + /** @gt_id: GT ID the mask is associated with */
> > + __u16 gt_id;
> > +
> > + /*
> > + * To query the mask of Dual Sub Slices (DSS) available for geometry
> > + * operations. For example a query response containing the following
> > + * in mask:
> > + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> > + * means 32 DSS are available for geometry.
> > + */
> > +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> > + /*
> > + * To query the mask of Dual Sub Slices (DSS) available for compute
> > + * operations. For example a query response containing the following
> > + * in mask:
> > + * DSS_COMPUTE ff ff ff ff 00 00 00 00
> > + * means 32 DSS are available for compute.
> > + */
> > +#define XE_TOPO_DSS_COMPUTE (1 << 1)
> > + /*
> > + * To query the mask of Execution Units (EU) available per Dual Sub
> > + * Slices (DSS). For example a query response containing the following
> > + * in mask:
> > + * EU_PER_DSS ff ff 00 00 00 00 00 00
> > + * means each DSS has 16 EU.
> > + */
> > +#define XE_TOPO_EU_PER_DSS (1 << 2)
> > + /** @type: type of mask */
> > + __u16 type;
> > +
> > + /** @num_bytes: number of bytes in requested mask */
> > + __u32 num_bytes;
> > +
> > + /** @mask: little-endian mask of @num_bytes */
> > + __u8 mask[];
> > +};
>
> So typically to consume the above struct, userspace needs additional
> information, specifically 'max_subslices' and 'max_eus_per_subslice' which
> was included in i915 'struct drm_i915_query_topology_info'.
>
> For example to consume 'struct drm_xe_query_topology_mask' I had recently
> to write the following code in IGT because this information was not
> available through 'struct drm_xe_query_topology_mask':
>
> /* Fixed fields, see fill_topology_info() and intel_sseu_set_info() in i915 */
> i915_topinfo.max_slices = 1; /* always 1 */
> if (IS_PONTEVECCHIO(xe_dev_id(drm_fd))) {
> i915_topinfo.max_subslices = 64;
> i915_topinfo.max_eus_per_subslice = 8;
> } else if (intel_graphics_ver(xe_dev_id(drm_fd)) >= IP_VER(12, 50)) {
> i915_topinfo.max_subslices = 32;
> i915_topinfo.max_eus_per_subslice = 16;
> } else if (intel_graphics_ver(xe_dev_id(drm_fd)) >= IP_VER(12, 0)) {
> i915_topinfo.max_subslices = 6;
> i915_topinfo.max_eus_per_subslice = 16;
> } else {
> igt_assert(0);
> }
>
> So, if we are going to expose 'struct drm_xe_query_topology_mask' as it is
> above through xe uapi, are we assuming that userspace has out of band
> knowledge of 'max_subslices' and 'max_eus_per_subslice'? Or should this
> information be (somehow) added to the above struct?
>
> Another option (which sort of works but only approximately) would be to set
> 'num_bytes' field in 'struct drm_xe_query_topology_mask' to actual number
> of bytes in the mask. At present it is set unconditionally to 8 in
> query_gt_topology(), irrespective of the actual num bytes in the masks
> which is basically (again in i915 parlance):
I'm not sure what you're saying here. num_bytes is set to the actual
size of the mask data returned; it's not hardcoded as a constant value,
although in practice it won't change very often since it's not tied to
the specific platform you're running on.
The size of the mask may be larger than the true set of possible DSS/EUs
on a given platform, but that's expected. For example, if some platform
can only ever have a maximum of 4 DSS, but we tell userspace they're
getting 8 bytes (64 bits), that's fine since the upper bits will always
be 0 and can just be ignored.
Remember --- this API is not intended to be give information about
platform theoretical maximums (e.g., "Foobar Lake will never have more
than 23 DSS") since if userspace drivers actually need that information
it must come from the GuC's hwconfig, not from the driver code. This
interface is exclusively about conveying the fusing information of which
units are physically present on your specific chip.
Matt
>
> i915_topinfo.subslice_stride = DIV_ROUND_UP(i915_topinfo.max_subslices, 8);
> i915_topinfo.eu_stride = DIV_ROUND_UP(i915_topinfo.max_eus_per_subslice, 8);
>
> If we go the 'num_bytes' route, that would be just an implementation change
> not a uapi change.
>
> Thanks.
> --
> Ashutosh
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-07-05 21:19 ` Matt Roper
@ 2023-07-05 22:33 ` Dixit, Ashutosh
0 siblings, 0 replies; 20+ messages in thread
From: Dixit, Ashutosh @ 2023-07-05 22:33 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-xe, Lionel Landwerlin
On Wed, 05 Jul 2023 14:19:23 -0700, Matt Roper wrote:
>
> On Fri, Jun 30, 2023 at 04:40:54PM -0700, Dixit, Ashutosh wrote:
> > On Fri, 30 Jun 2023 03:00:59 -0700, Thomas Hellström wrote:
> > >
> >
> > I have a question about the toplogy query below. I am not hugely familiar
> > with why/how this particular struct was chosen nor the history here, but
> > anyway.
> >
> > > +/**
> > > + * struct drm_xe_query_topology_mask - describe the topology mask of a GT
> > > + *
> > > + * This is the hardware topology which reflects the internal physical
> > > + * structure of the GPU.
> > > + *
> > > + * If a query is made with a struct drm_xe_device_query where .query
> > > + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
> > > + * struct drm_xe_query_topology_mask in .data.
> > > + */
> > > +struct drm_xe_query_topology_mask {
> > > + /** @gt_id: GT ID the mask is associated with */
> > > + __u16 gt_id;
> > > +
> > > + /*
> > > + * To query the mask of Dual Sub Slices (DSS) available for geometry
> > > + * operations. For example a query response containing the following
> > > + * in mask:
> > > + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> > > + * means 32 DSS are available for geometry.
> > > + */
> > > +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> > > + /*
> > > + * To query the mask of Dual Sub Slices (DSS) available for compute
> > > + * operations. For example a query response containing the following
> > > + * in mask:
> > > + * DSS_COMPUTE ff ff ff ff 00 00 00 00
> > > + * means 32 DSS are available for compute.
> > > + */
> > > +#define XE_TOPO_DSS_COMPUTE (1 << 1)
> > > + /*
> > > + * To query the mask of Execution Units (EU) available per Dual Sub
> > > + * Slices (DSS). For example a query response containing the following
> > > + * in mask:
> > > + * EU_PER_DSS ff ff 00 00 00 00 00 00
> > > + * means each DSS has 16 EU.
> > > + */
> > > +#define XE_TOPO_EU_PER_DSS (1 << 2)
> > > + /** @type: type of mask */
> > > + __u16 type;
> > > +
> > > + /** @num_bytes: number of bytes in requested mask */
> > > + __u32 num_bytes;
> > > +
> > > + /** @mask: little-endian mask of @num_bytes */
> > > + __u8 mask[];
> > > +};
> >
> > So typically to consume the above struct, userspace needs additional
> > information, specifically 'max_subslices' and 'max_eus_per_subslice' which
> > was included in i915 'struct drm_i915_query_topology_info'.
> >
> > For example to consume 'struct drm_xe_query_topology_mask' I had recently
> > to write the following code in IGT because this information was not
> > available through 'struct drm_xe_query_topology_mask':
> >
> > /* Fixed fields, see fill_topology_info() and intel_sseu_set_info() in i915 */
> > i915_topinfo.max_slices = 1; /* always 1 */
> > if (IS_PONTEVECCHIO(xe_dev_id(drm_fd))) {
> > i915_topinfo.max_subslices = 64;
> > i915_topinfo.max_eus_per_subslice = 8;
> > } else if (intel_graphics_ver(xe_dev_id(drm_fd)) >= IP_VER(12, 50)) {
> > i915_topinfo.max_subslices = 32;
> > i915_topinfo.max_eus_per_subslice = 16;
> > } else if (intel_graphics_ver(xe_dev_id(drm_fd)) >= IP_VER(12, 0)) {
> > i915_topinfo.max_subslices = 6;
> > i915_topinfo.max_eus_per_subslice = 16;
> > } else {
> > igt_assert(0);
> > }
> >
> > So, if we are going to expose 'struct drm_xe_query_topology_mask' as it is
> > above through xe uapi, are we assuming that userspace has out of band
> > knowledge of 'max_subslices' and 'max_eus_per_subslice'? Or should this
> > information be (somehow) added to the above struct?
> >
> > Another option (which sort of works but only approximately) would be to set
> > 'num_bytes' field in 'struct drm_xe_query_topology_mask' to actual number
> > of bytes in the mask. At present it is set unconditionally to 8 in
> > query_gt_topology(), irrespective of the actual num bytes in the masks
> > which is basically (again in i915 parlance):
>
> I'm not sure what you're saying here. num_bytes is set to the actual
> size of the mask data returned; it's not hardcoded as a constant value,
> although in practice it won't change very often since it's not tied to
> the specific platform you're running on.
>
> The size of the mask may be larger than the true set of possible DSS/EUs
> on a given platform, but that's expected. For example, if some platform
> can only ever have a maximum of 4 DSS, but we tell userspace they're
> getting 8 bytes (64 bits), that's fine since the upper bits will always
> be 0 and can just be ignored.
>
> Remember --- this API is not intended to be give information about
> platform theoretical maximums (e.g., "Foobar Lake will never have more
> than 23 DSS") since if userspace drivers actually need that information
> it must come from the GuC's hwconfig, not from the driver code. This
> interface is exclusively about conveying the fusing information of which
> units are physically present on your specific chip.
Ah, thanks Matt, what I missed was the GuC hwconfig part. That should solve
my problem.
Thanks.
--
Ashutosh
> > i915_topinfo.subslice_stride = DIV_ROUND_UP(i915_topinfo.max_subslices, 8);
> > i915_topinfo.eu_stride = DIV_ROUND_UP(i915_topinfo.max_eus_per_subslice, 8);
> >
> > If we go the 'num_bytes' route, that would be just an implementation change
> > not a uapi change.
> >
> > Thanks.
> > --
> > Ashutosh
>
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
` (8 preceding siblings ...)
2023-06-30 23:40 ` Dixit, Ashutosh
@ 2023-07-06 4:20 ` Matt Roper
2023-07-06 6:14 ` Thomas Hellström
[not found] ` <76c3d534-453a-7fd3-6fc8-cf30e9c8d464@intel.com>
10 siblings, 1 reply; 20+ messages in thread
From: Matt Roper @ 2023-07-06 4:20 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
On Fri, Jun 30, 2023 at 12:00:59PM +0200, Thomas Hellström wrote:
> Add a copy of xe_drm.h for uAPI review purposes only. Never commit this,
> the intention is to perform an uAPI review in this thread and if needed
> move it to Gitlab for easier discussion.
>
> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> include/uapi/drm/xe_drm_reviewonly.h | 1009 ++++++++++++++++++++++++++
> 1 file changed, 1009 insertions(+)
> create mode 100644 include/uapi/drm/xe_drm_reviewonly.h
>
> diff --git a/include/uapi/drm/xe_drm_reviewonly.h b/include/uapi/drm/xe_drm_reviewonly.h
> new file mode 100644
> index 000000000000..e890b131af91
> --- /dev/null
> +++ b/include/uapi/drm/xe_drm_reviewonly.h
> @@ -0,0 +1,1009 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef _UAPI_XE_DRM_H_
> +#define _UAPI_XE_DRM_H_
> +
> +#include "drm.h"
> +
> +#if defined(__cplusplus)
> +extern "C" {
> +#endif
> +
> +/* Please note that modifications to all structs defined here are
> + * subject to backwards-compatibility constraints.
> + */
> +
> +/**
> + * struct xe_user_extension - Base class for defining a chain of extensions
> + *
> + * Many interfaces need to grow over time. In most cases we can simply
> + * extend the struct and have userspace pass in more data. Another option,
> + * as demonstrated by Vulkan's approach to providing extensions for forward
> + * and backward compatibility, is to use a list of optional structs to
> + * provide those extra details.
> + *
> + * The key advantage to using an extension chain is that it allows us to
> + * redefine the interface more easily than an ever growing struct of
> + * increasing complexity, and for large parts of that interface to be
> + * entirely optional. The downside is more pointer chasing; chasing across
> + * the __user boundary with pointers encapsulated inside u64.
> + *
> + * Example chaining:
> + *
> + * .. code-block:: C
> + *
> + * struct xe_user_extension ext3 {
> + * .next_extension = 0, // end
> + * .name = ...,
> + * };
> + * struct xe_user_extension ext2 {
> + * .next_extension = (uintptr_t)&ext3,
> + * .name = ...,
> + * };
> + * struct xe_user_extension ext1 {
> + * .next_extension = (uintptr_t)&ext2,
> + * .name = ...,
> + * };
> + *
> + * Typically the struct xe_user_extension would be embedded in some uAPI
> + * struct, and in this case we would feed it the head of the chain(i.e ext1),
> + * which would then apply all of the above extensions.
> + *
> + */
> +struct xe_user_extension {
> + /**
> + * @next_extension:
> + *
> + * Pointer to the next struct xe_user_extension, or zero if the end.
> + */
> + __u64 next_extension;
> +
> + /**
> + * @name: Name of the extension.
> + *
> + * Note that the name here is just some integer.
> + *
> + * Also note that the name space for this is not global for the whole
> + * driver, but rather its scope/meaning is limited to the specific piece
> + * of uAPI which has embedded the struct xe_user_extension.
> + */
> + __u32 name;
> +
> + /**
> + * @pad: MBZ
> + *
> + * All undefined bits must be zero.
> + */
> + __u32 pad;
> +};
> +
> +/*
> + * xe specific ioctls.
> + *
> + * The device specific ioctl range is [DRM_COMMAND_BASE, DRM_COMMAND_END) ie
> + * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset
> + * against DRM_COMMAND_BASE and should be between [0x0, 0x60).
> + */
> +#define DRM_XE_DEVICE_QUERY 0x00
> +#define DRM_XE_GEM_CREATE 0x01
> +#define DRM_XE_GEM_MMAP_OFFSET 0x02
> +#define DRM_XE_VM_CREATE 0x03
> +#define DRM_XE_VM_DESTROY 0x04
> +#define DRM_XE_VM_BIND 0x05
> +#define DRM_XE_ENGINE_CREATE 0x06
> +#define DRM_XE_ENGINE_DESTROY 0x07
> +#define DRM_XE_EXEC 0x08
> +#define DRM_XE_MMIO 0x09
> +#define DRM_XE_ENGINE_SET_PROPERTY 0x0a
> +#define DRM_XE_WAIT_USER_FENCE 0x0b
> +#define DRM_XE_VM_MADVISE 0x0c
> +#define DRM_XE_ENGINE_GET_PROPERTY 0x0d
> +
> +/* Must be kept compact -- no holes */
> +#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
> +#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
> +#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
> +#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
> +#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
> +#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
> +#define DRM_IOCTL_XE_ENGINE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_ENGINE_CREATE, struct drm_xe_engine_create)
> +#define DRM_IOCTL_XE_ENGINE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_ENGINE_GET_PROPERTY, struct drm_xe_engine_get_property)
> +#define DRM_IOCTL_XE_ENGINE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_ENGINE_DESTROY, struct drm_xe_engine_destroy)
> +#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
> +#define DRM_IOCTL_XE_MMIO DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_MMIO, struct drm_xe_mmio)
> +#define DRM_IOCTL_XE_ENGINE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_ENGINE_SET_PROPERTY, struct drm_xe_engine_set_property)
> +#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
> +#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
> +
> +/**
> + * enum drm_xe_memory_class - Supported memory classes.
> + */
> +enum drm_xe_memory_class {
> + /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
> + XE_MEM_REGION_CLASS_SYSMEM = 0,
> + /**
> + * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
> + * represents the memory that is local to the device, which we
> + * call VRAM. Not valid on integrated platforms.
> + */
> + XE_MEM_REGION_CLASS_VRAM
> +};
> +
> +/**
> + * struct drm_xe_query_mem_region - Describes some region as known to
> + * the driver.
> + */
> +struct drm_xe_query_mem_region {
> + /**
> + * @mem_class: The memory class describing this region.
> + *
> + * See enum drm_xe_memory_class for supported values.
> + */
> + __u16 mem_class;
> + /**
> + * @instance: The instance for this region.
> + *
> + * The @mem_class and @instance taken together will always give
> + * a unique pair.
> + */
> + __u16 instance;
> + /** @pad: MBZ */
> + __u32 pad;
> + /**
> + * @min_page_size: Min page-size in bytes for this region.
> + *
> + * When the kernel allocates memory for this region, the
> + * underlying pages will be at least @min_page_size in size.
> + *
> + * Important note: When userspace allocates a GTT address which
> + * can point to memory allocated from this region, it must also
> + * respect this minimum alignment. This is enforced by the
> + * kernel.
> + */
> + __u32 min_page_size;
> + /**
> + * @max_page_size: Max page-size in bytes for this region.
> + */
> + __u32 max_page_size;
> + /**
> + * @total_size: The usable size in bytes for this region.
> + */
> + __u64 total_size;
> + /**
> + * @used: Estimate of the memory used in bytes for this region.
> + *
> + * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
> + * accounting. Without this the value here will always equal
> + * zero.
> + */
> + __u64 used;
> + /** @reserved: MBZ */
> + __u64 reserved[8];
> +};
> +
> +/**
> + * struct drm_xe_query_mem_usage - describe memory regions and usage
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
> + * struct drm_xe_query_mem_usage in .data.
> + */
> +struct drm_xe_query_mem_usage {
> + /** @num_regions: number of memory regions returned in @regions */
> + __u32 num_regions;
> + /** @pad: MBZ */
> + __u32 pad;
> + /** @regions: The returned regions for this device */
> + struct drm_xe_query_mem_region regions[];
> +};
> +
> +/**
> + * struct drm_xe_query_config - describe the device configuration
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
> + * struct drm_xe_query_config in .data.
> + */
> +struct drm_xe_query_config {
> + /** @num_params: number of parameters returned in info */
> + __u32 num_params;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> +#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
> +#define XE_QUERY_CONFIG_FLAGS 1
> + #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
> + #define XE_QUERY_CONFIG_FLAGS_USE_GUC (0x1 << 1)
> +#define XE_QUERY_CONFIG_MIN_ALIGNEMENT 2
> +#define XE_QUERY_CONFIG_VA_BITS 3
> +#define XE_QUERY_CONFIG_GT_COUNT 4
> +#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> +#define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
> +#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY + 1)
> + /** @info: array of elements containing the config info */
> + __u64 info[];
> +};
> +
> +/**
> + * struct drm_xe_query_gts - describe GTs
"gts" terminology (throughout the code, not just the uapi) was strongly
nak'ed when multi-GT code was first being upstreamed for i915. The
maintainers felt that given Intel's alphabet soup it was too confusing
to the reader whether this was the plural form or "GT" or whether it was
a completely separate acronym. Presumably this will need to be renamed
to something like "drm_xe_query_gt_list" to align with the previous
feedback that was given for i915.
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_GTS, then the reply uses struct
> + * drm_xe_query_gts in .data.
> + */
> +struct drm_xe_query_gts {
Some of this information should really move to a separate tile query
rather than the GT query. The big series that split GTs vs tiles apart
intentionally did not touch anything uapi-related because such changes
will need to be discussed/coordinated with the userspace teams (and
should probably be handled by someone more familiar with actual
userspace needs).
> + /** @num_gt: number of GTs returned in gts */
> + __u32 num_gt;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /**
> + * @gts: The GTs returned for this device
> + *
> + * TODO: convert drm_xe_query_gt to proper kernel-doc.
> + * TODO: Perhaps info about every mem region relative to this GT? e.g.
> + * bandwidth between this GT and remote region?
> + */
> + struct drm_xe_query_gt {
> +#define XE_QUERY_GT_TYPE_MAIN 0
> +#define XE_QUERY_GT_TYPE_REMOTE 1
Once tiles get properly exposed through the uapi and there's a way to
determine which GTs belong to which tiles, TYPE_REMOTE should probably
go away. Within any given tile, the GTs would just be of types
TYPE_MAIN and TYPE_MEDIA. The "main" GT on remote tiles isn't
functionally any different than the "main" GT on the root tile.
> +#define XE_QUERY_GT_TYPE_MEDIA 2
> + __u16 type;
> + __u16 instance;
We need to decide (and then document) whether this should stay a
device-wide instance number, or whether we want this to become a
per-tile instance number instead.
> + __u32 clock_freq;
> + __u64 features;
What is this one for? As far as I can see it's not actually set/used yet.
> + __u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
> + __u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
> + __u64 inaccessible_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
> + __u64 reserved[8];
> + } gts[];
> +};
> +
> +/**
> + * struct drm_xe_query_topology_mask - describe the topology mask of a GT
> + *
> + * This is the hardware topology which reflects the internal physical
> + * structure of the GPU.
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
> + * struct drm_xe_query_topology_mask in .data.
> + */
> +struct drm_xe_query_topology_mask {
> + /** @gt_id: GT ID the mask is associated with */
> + __u16 gt_id;
> +
> + /*
> + * To query the mask of Dual Sub Slices (DSS) available for geometry
> + * operations. For example a query response containing the following
> + * in mask:
> + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> + * means 32 DSS are available for geometry.
> + */
> +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> + /*
> + * To query the mask of Dual Sub Slices (DSS) available for compute
> + * operations. For example a query response containing the following
> + * in mask:
> + * DSS_COMPUTE ff ff ff ff 00 00 00 00
> + * means 32 DSS are available for compute.
> + */
> +#define XE_TOPO_DSS_COMPUTE (1 << 1)
> + /*
> + * To query the mask of Execution Units (EU) available per Dual Sub
> + * Slices (DSS). For example a query response containing the following
> + * in mask:
> + * EU_PER_DSS ff ff 00 00 00 00 00 00
> + * means each DSS has 16 EU.
> + */
> +#define XE_TOPO_EU_PER_DSS (1 << 2)
> + /** @type: type of mask */
> + __u16 type;
> +
> + /** @num_bytes: number of bytes in requested mask */
> + __u32 num_bytes;
> +
> + /** @mask: little-endian mask of @num_bytes */
> + __u8 mask[];
> +};
> +
> +/**
> + * struct drm_xe_device_query - main structure to query device information
> + *
> + * If size is set to 0, the driver fills it with the required size for the
> + * requested type of data to query. If size is equal to the required size,
> + * the queried information is copied into data.
> + *
> + * For example the following code snippet allows retrieving and printing
> + * information about the device engines with DRM_XE_DEVICE_QUERY_ENGINES:
> + *
> + * .. code-block:: C
> + *
> + * struct drm_xe_engine_class_instance *hwe;
> + * struct drm_xe_device_query query = {
> + * .extensions = 0,
> + * .query = DRM_XE_DEVICE_QUERY_ENGINES,
> + * .size = 0,
> + * .data = 0,
> + * };
> + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> + * hwe = malloc(query.size);
> + * query.data = (uintptr_t)hwe;
> + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> + * int num_engines = query.size / sizeof(*hwe);
> + * for (int i = 0; i < num_engines; i++) {
> + * printf("Engine %d: %s\n", i,
> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COPY ? "COPY":
> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_DECODE ? "VIDEO_DECODE":
> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ? "VIDEO_ENHANCE":
> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
> + * "UNKNOWN");
> + * }
> + * free(hwe);
> + */
> +struct drm_xe_device_query {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> +#define DRM_XE_DEVICE_QUERY_ENGINES 0
> +#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
> +#define DRM_XE_DEVICE_QUERY_CONFIG 2
> +#define DRM_XE_DEVICE_QUERY_GTS 3
> +#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> +#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> + /** @query: The type of data to query */
> + __u32 query;
> +
> + /** @size: Size of the queried data */
> + __u32 size;
> +
> + /** @data: Queried data is placed here */
> + __u64 data;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_gem_create {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /**
> + * @size: Requested size for the object
> + *
> + * The (page-aligned) allocated size for the object will be returned.
> + */
> + __u64 size;
> +
> +#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> +#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
I think I asked a while back, but is marking an object as scanout at
creation time even reasonable? I think there are a lot of real-world
setups where a render/media client allocates a buffer, generates content
into it, and then hands it over to a compositor for display. Even the
compositor itself may not necessarily know up front whether it will make
sense to flip that buffer directly onto a display plane for scanout, or
whether to use it as a source texture when compositing surfaces into a
different scanout buffer. It seems like to be safe, any kind of render
target on the client side is going to have to get marked as SCANOUT,
even though chances are it will never actually get used that way in the
end. Pretty much only internal, non-shared objects would be able to
skip the SCANOUT flag.
> + /**
> + * @flags: Flags, currently a mask of memory instances of where BO can
> + * be placed
> + */
> + __u32 flags;
> +
> + /**
> + * @vm_id: Attached VM, if any
> + *
> + * If a VM is specified, this BO must:
> + *
> + * 1. Only ever be bound to that VM.
> + *
> + * 2. Cannot be exported as a PRIME fd.
> + */
> + __u32 vm_id;
> +
> + /**
> + * @handle: Returned handle for the object.
> + *
> + * Object handles are nonzero.
> + */
> + __u32 handle;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_gem_mmap_offset {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @handle: Handle for the object being mapped. */
> + __u32 handle;
> +
> + /** @flags: Must be zero */
> + __u32 flags;
> +
> + /** @offset: The fake offset to use for subsequent mmap call */
> + __u64 offset;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/**
> + * struct drm_xe_vm_bind_op_error_capture - format of VM bind op error capture
> + */
> +struct drm_xe_vm_bind_op_error_capture {
> + /** @error: errno that occured */
> + __s32 error;
> +
> + /** @op: operation that encounter an error */
> + __u32 op;
> +
> + /** @addr: address of bind op */
> + __u64 addr;
> +
> + /** @size: size of bind */
> + __u64 size;
> +};
> +
> +/** struct drm_xe_ext_vm_set_property - VM set property extension */
> +struct drm_xe_ext_vm_set_property {
> + /** @base: base user extension */
> + struct xe_user_extension base;
> +
> +#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_create {
> +#define XE_VM_EXTENSION_SET_PROPERTY 0
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> +#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> +#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
> +#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
> +#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> + /** @flags: Flags */
> + __u32 flags;
> +
> + /** @vm_id: Returned VM ID */
> + __u32 vm_id;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_destroy {
> + /** @vm_id: VM ID */
> + __u32 vm_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_bind_op {
> + /**
> + * @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for UNMAP
> + */
> + __u32 obj;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + union {
> + /**
> + * @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
> + * ignored for unbind
> + */
> + __u64 obj_offset;
> +
> + /** @userptr: user pointer to bind on */
> + __u64 userptr;
> + };
> +
> + /**
> + * @range: Number of bytes from the object to bind to addr, MBZ for UNMAP_ALL
> + */
> + __u64 range;
> +
> + /** @addr: Address to operate on, MBZ for UNMAP_ALL */
> + __u64 addr;
> +
> + /**
> + * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
> + * only applies to creating new VMAs
> + */
> + __u64 tile_mask;
> +
> +#define XE_VM_BIND_OP_MAP 0x0
> +#define XE_VM_BIND_OP_UNMAP 0x1
> +#define XE_VM_BIND_OP_MAP_USERPTR 0x2
> +#define XE_VM_BIND_OP_RESTART 0x3
> +#define XE_VM_BIND_OP_UNMAP_ALL 0x4
> +#define XE_VM_BIND_OP_PREFETCH 0x5
> +
> +#define XE_VM_BIND_FLAG_READONLY (0x1 << 16)
> + /*
> + * A bind ops completions are always async, hence the support for out
> + * sync. This flag indicates the allocation of the memory for new page
> + * tables and the job to program the pages tables is asynchronous
> + * relative to the IOCTL. That part of a bind operation can fail under
> + * memory pressure, the job in practice can't fail unless the system is
> + * totally shot.
> + *
> + * If this flag is clear and the IOCTL doesn't return an error, in
> + * practice the bind op is good and will complete.
> + *
> + * If this flag is set and doesn't return an error, the bind op can
> + * still fail and recovery is needed. If configured, the bind op that
> + * caused the error will be captured in drm_xe_vm_bind_op_error_capture.
> + * Once the user sees the error (via a ufence +
> + * XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS), it should free memory
> + * via non-async unbinds, and then restart all queue'd async binds op via
> + * XE_VM_BIND_OP_RESTART. Or alternatively the user should destroy the
> + * VM.
> + *
> + * This flag is only allowed when DRM_XE_VM_CREATE_ASYNC_BIND_OPS is
> + * configured in the VM and must be set if the VM is configured with
> + * DRM_XE_VM_CREATE_ASYNC_BIND_OPS and not in an error state.
> + */
> +#define XE_VM_BIND_FLAG_ASYNC (0x1 << 17)
> + /*
> + * Valid on a faulting VM only, do the MAP operation immediately rather
> + * than differing the MAP to the page fault handler.
> + */
> +#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 18)
> + /*
> + * When the NULL flag is set, the page tables are setup with a special
> + * bit which indicates writes are dropped and all reads return zero. In
> + * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
> + * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
> + * intended to implement VK sparse bindings.
> + */
> +#define XE_VM_BIND_FLAG_NULL (0x1 << 19)
> + /** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits) */
> + __u32 op;
> +
> + /** @mem_region: Memory region to prefetch VMA to, instance not a mask */
> + __u32 region;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_bind {
Should there be a field in here to allow userspace to specify which PAT
index corresponds to the behavior (caching, coherency, CLOS, etc.) they
want on this binding? The PAT should be a characteristic of the bind
rather than of the underlying object, right?
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @vm_id: The ID of the VM to bind to */
> + __u32 vm_id;
> +
> + /**
> + * @engine_id: engine_id, must be of class DRM_XE_ENGINE_CLASS_VM_BIND
> + * and engine must have same vm_id. If zero, the default VM bind engine
> + * is used.
> + */
> + __u32 engine_id;
> +
> + /** @num_binds: number of binds in this IOCTL */
> + __u32 num_binds;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + union {
> + /** @bind: used if num_binds == 1 */
> + struct drm_xe_vm_bind_op bind;
> +
> + /**
> + * @vector_of_binds: userptr to array of struct
> + * drm_xe_vm_bind_op if num_binds > 1
> + */
> + __u64 vector_of_binds;
> + };
> +
> + /** @num_syncs: amount of syncs to wait on */
> + __u32 num_syncs;
> +
> + /** @pad2: MBZ */
> + __u32 pad2;
> +
> + /** @syncs: pointer to struct drm_xe_sync array */
> + __u64 syncs;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/** struct drm_xe_ext_engine_set_property - engine set property extension */
> +struct drm_xe_ext_engine_set_property {
> + /** @base: base user extension */
> + struct xe_user_extension base;
> +
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @value: property value */
> + __u64 value;
> +};
> +
> +/**
> + * struct drm_xe_engine_set_property - engine set property
> + *
> + * Same namespace for extensions as drm_xe_engine_create
> + */
> +struct drm_xe_engine_set_property {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @engine_id: Engine ID */
> + __u32 engine_id;
> +
> +#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
> +#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
> +#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
> + /*
> + * Long running or ULLS engine mode. DMA fences not allowed in this
> + * mode. Must match the value of DRM_XE_VM_CREATE_COMPUTE_MODE, serves
> + * as a sanity check the UMD knows what it is doing. Can only be set at
> + * engine create time.
> + */
> +#define XE_ENGINE_SET_PROPERTY_COMPUTE_MODE 3
> +#define XE_ENGINE_SET_PROPERTY_PERSISTENCE 4
> +#define XE_ENGINE_SET_PROPERTY_JOB_TIMEOUT 5
> +#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
> +#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
> +#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/** struct drm_xe_engine_class_instance - instance of an engine class */
> +struct drm_xe_engine_class_instance {
> +#define DRM_XE_ENGINE_CLASS_RENDER 0
> +#define DRM_XE_ENGINE_CLASS_COPY 1
> +#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
> +#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
> +#define DRM_XE_ENGINE_CLASS_COMPUTE 4
> + /*
> + * Kernel only class (not actual hardware engine class). Used for
> + * creating ordered queues of VM bind operations.
> + */
> +#define DRM_XE_ENGINE_CLASS_VM_BIND 5
> + __u16 engine_class;
> +
> + __u16 engine_instance;
> + __u16 gt_id;
> +};
> +
> +struct drm_xe_engine_create {
> +#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @width: submission width (number BB per exec) for this engine */
> + __u16 width;
> +
> + /** @num_placements: number of valid placements for this engine */
> + __u16 num_placements;
> +
> + /** @vm_id: VM to use for this engine */
> + __u32 vm_id;
> +
> + /** @flags: MBZ */
> + __u32 flags;
> +
> + /** @engine_id: Returned engine ID */
> + __u32 engine_id;
> +
> + /**
> + * @instances: user pointer to a 2-d array of struct
> + * drm_xe_engine_class_instance
> + *
> + * length = width (i) * num_placements (j)
> + * index = j + i * width
> + */
> + __u64 instances;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_engine_get_property {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @engine_id: Engine ID */
> + __u32 engine_id;
> +
> +#define XE_ENGINE_GET_PROPERTY_BAN 0
> + /** @property: property to get */
> + __u32 property;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_engine_destroy {
> + /** @engine_id: Engine ID */
> + __u32 engine_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_sync {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> +#define DRM_XE_SYNC_SYNCOBJ 0x0
> +#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
> +#define DRM_XE_SYNC_DMA_BUF 0x2
> +#define DRM_XE_SYNC_USER_FENCE 0x3
> +#define DRM_XE_SYNC_SIGNAL 0x10
> + __u32 flags;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + union {
> + __u32 handle;
> +
> + /**
> + * @addr: Address of user fence. When sync passed in via exec
> + * IOCTL this a GPU address in the VM. When sync passed in via
> + * VM bind IOCTL this is a user pointer. In either case, it is
> + * the users responsibility that this address is present and
> + * mapped when the user fence is signalled. Must be qword
> + * aligned.
> + */
> + __u64 addr;
> + };
> +
> + __u64 timeline_value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_exec {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @vm_id: VM ID to run batch buffer in */
> + __u32 engine_id;
> +
> + /** @num_syncs: Amount of struct drm_xe_sync in array. */
> + __u32 num_syncs;
> +
> + /** @syncs: Pointer to struct drm_xe_sync array. */
> + __u64 syncs;
> +
> + /**
> + * @address: address of batch buffer if num_batch_buffer == 1 or an
> + * array of batch buffer addresses
> + */
> + __u64 address;
> +
> + /**
> + * @num_batch_buffer: number of batch buffer in this exec, must match
> + * the width of the engine
> + */
> + __u16 num_batch_buffer;
> +
> + /** @pad: MBZ */
> + __u16 pad[3];
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_mmio {
I'm a bit skeptical of the need for this ioctl. The only "real"
userspace that uses it only reads one specific register and only because
we haven't given them the timestamp correlation interface that they
really want (https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/384).
Being able to read/write arbitrary registers is handy for the xe_reg
tool in IGT, but if we didn't have the ioctl we could also have just
used libpciaccess to map the BAR directly like i915's intel_reg tool
does.
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + __u32 addr;
> +
> +#define DRM_XE_MMIO_8BIT 0x0
> +#define DRM_XE_MMIO_16BIT 0x1
> +#define DRM_XE_MMIO_32BIT 0x2
> +#define DRM_XE_MMIO_64BIT 0x3
> +#define DRM_XE_MMIO_BITS_MASK 0x3
> +#define DRM_XE_MMIO_READ 0x4
> +#define DRM_XE_MMIO_WRITE 0x8
> + __u32 flags;
> +
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/**
> + * struct drm_xe_wait_user_fence - wait user fence
> + *
> + * Wait on user fence, XE will wakeup on every HW engine interrupt in the
> + * instances list and check if user fence is complete::
> + *
> + * (*addr & MASK) OP (VALUE & MASK)
> + *
> + * Returns to user on user fence completion or timeout.
> + */
> +struct drm_xe_wait_user_fence {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + union {
> + /**
> + * @addr: user pointer address to wait on, must qword aligned
> + */
> + __u64 addr;
> +
> + /**
> + * @vm_id: The ID of the VM which encounter an error used with
> + * DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be clear.
> + */
> + __u64 vm_id;
> + };
> +
> +#define DRM_XE_UFENCE_WAIT_EQ 0
> +#define DRM_XE_UFENCE_WAIT_NEQ 1
> +#define DRM_XE_UFENCE_WAIT_GT 2
> +#define DRM_XE_UFENCE_WAIT_GTE 3
> +#define DRM_XE_UFENCE_WAIT_LT 4
> +#define DRM_XE_UFENCE_WAIT_LTE 5
> + /** @op: wait operation (type of comparison) */
> + __u16 op;
> +
> +#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
> +#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
> +#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
> + /** @flags: wait flags */
> + __u16 flags;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @value: compare value */
> + __u64 value;
> +
> +#define DRM_XE_UFENCE_WAIT_U8 0xffu
> +#define DRM_XE_UFENCE_WAIT_U16 0xffffu
> +#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
> +#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
> + /** @mask: comparison mask */
> + __u64 mask;
> + /**
> + * @timeout: how long to wait before bailing, value in nanoseconds.
> + * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
> + * it contains timeout expressed in nanoseconds to wait (fence will
> + * expire at now() + timeout).
> + * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout) wait
> + * will end at timeout (uses system MONOTONIC_CLOCK).
> + * Passing negative timeout leads to neverending wait.
> + *
> + * On relative timeout this value is updated with timeout left
> + * (for restarting the call in case of signal delivery).
> + * On absolute timeout this value stays intact (restarted call still
> + * expire at the same point of time).
> + */
> + __s64 timeout;
> +
> + /**
> + * @num_engines: number of engine instances to wait on, must be zero
> + * when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + */
> + __u64 num_engines;
> +
> + /**
> + * @instances: user pointer to array of drm_xe_engine_class_instance to
> + * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + */
> + __u64 instances;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_madvise {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @vm_id: The ID VM in which the VMA exists */
> + __u32 vm_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @range: Number of bytes in the VMA */
> + __u64 range;
> +
> + /** @addr: Address of the VMA to operation on */
> + __u64 addr;
> +
> + /*
> + * Setting the preferred location will trigger a migrate of the VMA
> + * backing store to new location if the backing store is already
> + * allocated.
> + *
> + * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
> + * drm_xe_memory_class.
> + */
> +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
> +#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
> + /*
> + * In this case lower 32 bits are mem class, upper 32 are GT.
> + * Combination provides a single IOCTL plus migrate VMA to preferred
> + * location.
> + */
> +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
This is another place where we probably need to switch things over to be
tile-centric rather than GT-centric.
Matt
> + /*
> + * The CPU will do atomic memory operations to this VMA. Must be set on
> + * some devices for atomics to behave correctly.
> + */
> +#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
> + /*
> + * The device will do atomic memory operations to this VMA. Must be set
> + * on some devices for atomics to behave correctly.
> + */
> +#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
> + /*
> + * Priority WRT to eviction (moving from preferred memory location due
> + * to memory pressure). The lower the priority, the more likely to be
> + * evicted.
> + */
> +#define DRM_XE_VM_MADVISE_PRIORITY 5
> +#define DRM_XE_VMA_PRIORITY_LOW 0
> +#define DRM_XE_VMA_PRIORITY_NORMAL 1 /* Default */
> +#define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must be elevated user */
> + /* Pin the VMA in memory, must be elevated user */
> +#define DRM_XE_VM_MADVISE_PIN 6
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @pad2: MBZ */
> + __u32 pad2;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +#if defined(__cplusplus)
> +}
> +#endif
> +
> +#endif /* _UAPI_XE_DRM_H_ */
> --
> 2.40.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-07-06 4:20 ` Matt Roper
@ 2023-07-06 6:14 ` Thomas Hellström
2023-07-06 22:30 ` Matt Roper
2023-07-06 22:48 ` Matt Roper
0 siblings, 2 replies; 20+ messages in thread
From: Thomas Hellström @ 2023-07-06 6:14 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-xe
Hi, Matt,
Thanks for taking a look into this. Some comments below. I think we need
to set up tasks for the various review concerns and assign people to
have them resolved:
On 7/6/23 06:20, Matt Roper wrote:
>
>> +/**
>> + * struct drm_xe_query_gts - describe GTs
> "gts" terminology (throughout the code, not just the uapi) was strongly
> nak'ed when multi-GT code was first being upstreamed for i915. The
> maintainers felt that given Intel's alphabet soup it was too confusing
> to the reader whether this was the plural form or "GT" or whether it was
> a completely separate acronym. Presumably this will need to be renamed
> to something like "drm_xe_query_gt_list" to align with the previous
> feedback that was given for i915.
>
>> + *
>> + * If a query is made with a struct drm_xe_device_query where .query
>> + * is equal to DRM_XE_DEVICE_QUERY_GTS, then the reply uses struct
>> + * drm_xe_query_gts in .data.
>> + */
>> +struct drm_xe_query_gts {
> Some of this information should really move to a separate tile query
> rather than the GT query. The big series that split GTs vs tiles apart
> intentionally did not touch anything uapi-related because such changes
> will need to be discussed/coordinated with the userspace teams (and
> should probably be handled by someone more familiar with actual
> userspace needs).
I noted the tile-vs-GT issue in my review as well.
>> + /** @num_gt: number of GTs returned in gts */
>> + __u32 num_gt;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + /**
>> + * @gts: The GTs returned for this device
>> + *
>> + * TODO: convert drm_xe_query_gt to proper kernel-doc.
>> + * TODO: Perhaps info about every mem region relative to this GT? e.g.
>> + * bandwidth between this GT and remote region?
>> + */
>> + struct drm_xe_query_gt {
>> +#define XE_QUERY_GT_TYPE_MAIN 0
>> +#define XE_QUERY_GT_TYPE_REMOTE 1
> Once tiles get properly exposed through the uapi and there's a way to
> determine which GTs belong to which tiles, TYPE_REMOTE should probably
> go away. Within any given tile, the GTs would just be of types
> TYPE_MAIN and TYPE_MEDIA. The "main" GT on remote tiles isn't
> functionally any different than the "main" GT on the root tile.
Do we need to expose the GT to user-space through the ioctl interface at
all? Assuming that we could add the engine info of all GTs to the tile,
is there something else in the ioctl that needs to be per-gt-specific. I
learned that in sysfs interface there is. Does the same thing hold here?
>> +#define XE_QUERY_GT_TYPE_MEDIA 2
>> + __u16 type;
>> + __u16 instance;
> We need to decide (and then document) whether this should stay a
> device-wide instance number, or whether we want this to become a
> per-tile instance number instead.
>
>> + __u32 clock_freq;
>> + __u64 features;
> What is this one for? As far as I can see it's not actually set/used yet.
>
>> + __u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
>> + __u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
>> + __u64 inaccessible_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
>> + __u64 reserved[8];
>> + } gts[];
>> +};
>> +
>> +/**
>> + * struct drm_xe_query_topology_mask - describe the topology mask of a GT
>> + *
>> + * This is the hardware topology which reflects the internal physical
>> + * structure of the GPU.
>> + *
>> + * If a query is made with a struct drm_xe_device_query where .query
>> + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
>> + * struct drm_xe_query_topology_mask in .data.
>> + */
>> +struct drm_xe_query_topology_mask {
>> + /** @gt_id: GT ID the mask is associated with */
>> + __u16 gt_id;
>> +
>> + /*
>> + * To query the mask of Dual Sub Slices (DSS) available for geometry
>> + * operations. For example a query response containing the following
>> + * in mask:
>> + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
>> + * means 32 DSS are available for geometry.
>> + */
>> +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
>> + /*
>> + * To query the mask of Dual Sub Slices (DSS) available for compute
>> + * operations. For example a query response containing the following
>> + * in mask:
>> + * DSS_COMPUTE ff ff ff ff 00 00 00 00
>> + * means 32 DSS are available for compute.
>> + */
>> +#define XE_TOPO_DSS_COMPUTE (1 << 1)
>> + /*
>> + * To query the mask of Execution Units (EU) available per Dual Sub
>> + * Slices (DSS). For example a query response containing the following
>> + * in mask:
>> + * EU_PER_DSS ff ff 00 00 00 00 00 00
>> + * means each DSS has 16 EU.
>> + */
>> +#define XE_TOPO_EU_PER_DSS (1 << 2)
>> + /** @type: type of mask */
>> + __u16 type;
>> +
>> + /** @num_bytes: number of bytes in requested mask */
>> + __u32 num_bytes;
>> +
>> + /** @mask: little-endian mask of @num_bytes */
>> + __u8 mask[];
>> +};
>> +
>> +/**
>> + * struct drm_xe_device_query - main structure to query device information
>> + *
>> + * If size is set to 0, the driver fills it with the required size for the
>> + * requested type of data to query. If size is equal to the required size,
>> + * the queried information is copied into data.
>> + *
>> + * For example the following code snippet allows retrieving and printing
>> + * information about the device engines with DRM_XE_DEVICE_QUERY_ENGINES:
>> + *
>> + * .. code-block:: C
>> + *
>> + * struct drm_xe_engine_class_instance *hwe;
>> + * struct drm_xe_device_query query = {
>> + * .extensions = 0,
>> + * .query = DRM_XE_DEVICE_QUERY_ENGINES,
>> + * .size = 0,
>> + * .data = 0,
>> + * };
>> + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
>> + * hwe = malloc(query.size);
>> + * query.data = (uintptr_t)hwe;
>> + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
>> + * int num_engines = query.size / sizeof(*hwe);
>> + * for (int i = 0; i < num_engines; i++) {
>> + * printf("Engine %d: %s\n", i,
>> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
>> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COPY ? "COPY":
>> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_DECODE ? "VIDEO_DECODE":
>> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ? "VIDEO_ENHANCE":
>> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
>> + * "UNKNOWN");
>> + * }
>> + * free(hwe);
>> + */
>> +struct drm_xe_device_query {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> +#define DRM_XE_DEVICE_QUERY_ENGINES 0
>> +#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
>> +#define DRM_XE_DEVICE_QUERY_CONFIG 2
>> +#define DRM_XE_DEVICE_QUERY_GTS 3
>> +#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
>> +#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
>> + /** @query: The type of data to query */
>> + __u32 query;
>> +
>> + /** @size: Size of the queried data */
>> + __u32 size;
>> +
>> + /** @data: Queried data is placed here */
>> + __u64 data;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_gem_create {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + /**
>> + * @size: Requested size for the object
>> + *
>> + * The (page-aligned) allocated size for the object will be returned.
>> + */
>> + __u64 size;
>> +
>> +#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
>> +#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
> I think I asked a while back, but is marking an object as scanout at
> creation time even reasonable? I think there are a lot of real-world
> setups where a render/media client allocates a buffer, generates content
> into it, and then hands it over to a compositor for display. Even the
> compositor itself may not necessarily know up front whether it will make
> sense to flip that buffer directly onto a display plane for scanout, or
> whether to use it as a source texture when compositing surfaces into a
> different scanout buffer. It seems like to be safe, any kind of render
> target on the client side is going to have to get marked as SCANOUT,
> even though chances are it will never actually get used that way in the
> end. Pretty much only internal, non-shared objects would be able to
> skip the SCANOUT flag.
It sounds like consensus is this is doable. I think there has been
discussions with mesa, acking this. Also Joonas and Ron Silvas agreeing
on this approach.
>
>> + /**
>> + * @flags: Flags, currently a mask of memory instances of where BO can
>> + * be placed
>> + */
>> + __u32 flags;
>> +
>> + /**
>> + * @vm_id: Attached VM, if any
>> + *
>> + * If a VM is specified, this BO must:
>> + *
>> + * 1. Only ever be bound to that VM.
>> + *
>> + * 2. Cannot be exported as a PRIME fd.
>> + */
>> + __u32 vm_id;
>> +
>> + /**
>> + * @handle: Returned handle for the object.
>> + *
>> + * Object handles are nonzero.
>> + */
>> + __u32 handle;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_gem_mmap_offset {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + /** @handle: Handle for the object being mapped. */
>> + __u32 handle;
>> +
>> + /** @flags: Must be zero */
>> + __u32 flags;
>> +
>> + /** @offset: The fake offset to use for subsequent mmap call */
>> + __u64 offset;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +/**
>> + * struct drm_xe_vm_bind_op_error_capture - format of VM bind op error capture
>> + */
>> +struct drm_xe_vm_bind_op_error_capture {
>> + /** @error: errno that occured */
>> + __s32 error;
>> +
>> + /** @op: operation that encounter an error */
>> + __u32 op;
>> +
>> + /** @addr: address of bind op */
>> + __u64 addr;
>> +
>> + /** @size: size of bind */
>> + __u64 size;
>> +};
>> +
>> +/** struct drm_xe_ext_vm_set_property - VM set property extension */
>> +struct drm_xe_ext_vm_set_property {
>> + /** @base: base user extension */
>> + struct xe_user_extension base;
>> +
>> +#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
>> + /** @property: property to set */
>> + __u32 property;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + /** @value: property value */
>> + __u64 value;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_vm_create {
>> +#define XE_VM_EXTENSION_SET_PROPERTY 0
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> +#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
>> +#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
>> +#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
>> +#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
>> + /** @flags: Flags */
>> + __u32 flags;
>> +
>> + /** @vm_id: Returned VM ID */
>> + __u32 vm_id;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_vm_destroy {
>> + /** @vm_id: VM ID */
>> + __u32 vm_id;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_vm_bind_op {
>> + /**
>> + * @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for UNMAP
>> + */
>> + __u32 obj;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + union {
>> + /**
>> + * @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
>> + * ignored for unbind
>> + */
>> + __u64 obj_offset;
>> +
>> + /** @userptr: user pointer to bind on */
>> + __u64 userptr;
>> + };
>> +
>> + /**
>> + * @range: Number of bytes from the object to bind to addr, MBZ for UNMAP_ALL
>> + */
>> + __u64 range;
>> +
>> + /** @addr: Address to operate on, MBZ for UNMAP_ALL */
>> + __u64 addr;
>> +
>> + /**
>> + * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
>> + * only applies to creating new VMAs
>> + */
>> + __u64 tile_mask;
>> +
>> +#define XE_VM_BIND_OP_MAP 0x0
>> +#define XE_VM_BIND_OP_UNMAP 0x1
>> +#define XE_VM_BIND_OP_MAP_USERPTR 0x2
>> +#define XE_VM_BIND_OP_RESTART 0x3
>> +#define XE_VM_BIND_OP_UNMAP_ALL 0x4
>> +#define XE_VM_BIND_OP_PREFETCH 0x5
>> +
>> +#define XE_VM_BIND_FLAG_READONLY (0x1 << 16)
>> + /*
>> + * A bind ops completions are always async, hence the support for out
>> + * sync. This flag indicates the allocation of the memory for new page
>> + * tables and the job to program the pages tables is asynchronous
>> + * relative to the IOCTL. That part of a bind operation can fail under
>> + * memory pressure, the job in practice can't fail unless the system is
>> + * totally shot.
>> + *
>> + * If this flag is clear and the IOCTL doesn't return an error, in
>> + * practice the bind op is good and will complete.
>> + *
>> + * If this flag is set and doesn't return an error, the bind op can
>> + * still fail and recovery is needed. If configured, the bind op that
>> + * caused the error will be captured in drm_xe_vm_bind_op_error_capture.
>> + * Once the user sees the error (via a ufence +
>> + * XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS), it should free memory
>> + * via non-async unbinds, and then restart all queue'd async binds op via
>> + * XE_VM_BIND_OP_RESTART. Or alternatively the user should destroy the
>> + * VM.
>> + *
>> + * This flag is only allowed when DRM_XE_VM_CREATE_ASYNC_BIND_OPS is
>> + * configured in the VM and must be set if the VM is configured with
>> + * DRM_XE_VM_CREATE_ASYNC_BIND_OPS and not in an error state.
>> + */
>> +#define XE_VM_BIND_FLAG_ASYNC (0x1 << 17)
>> + /*
>> + * Valid on a faulting VM only, do the MAP operation immediately rather
>> + * than differing the MAP to the page fault handler.
>> + */
>> +#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 18)
>> + /*
>> + * When the NULL flag is set, the page tables are setup with a special
>> + * bit which indicates writes are dropped and all reads return zero. In
>> + * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
>> + * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
>> + * intended to implement VK sparse bindings.
>> + */
>> +#define XE_VM_BIND_FLAG_NULL (0x1 << 19)
>> + /** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits) */
>> + __u32 op;
>> +
>> + /** @mem_region: Memory region to prefetch VMA to, instance not a mask */
>> + __u32 region;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_vm_bind {
> Should there be a field in here to allow userspace to specify which PAT
> index corresponds to the behavior (caching, coherency, CLOS, etc.) they
> want on this binding? The PAT should be a characteristic of the bind
> rather than of the underlying object, right?
Yes, given certain immutable restrictions given at buffer-object create
time; For example the CPU caching mode will restrict the coherency mode
used in PAT, and CPU caching mode needs to be specified at bo create
time. The current suggestion is therefore that coherency mode also needs
to be specified at bo create time, a slightly stricter limitation on the
available PAT indices at VM_BIND time. Whether we want to include PAT in
the main struct or as an extension hasn't been decided yet.
>
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + /** @vm_id: The ID of the VM to bind to */
>> + __u32 vm_id;
>> +
>> + /**
>> + * @engine_id: engine_id, must be of class DRM_XE_ENGINE_CLASS_VM_BIND
>> + * and engine must have same vm_id. If zero, the default VM bind engine
>> + * is used.
>> + */
>> + __u32 engine_id;
>> +
>> + /** @num_binds: number of binds in this IOCTL */
>> + __u32 num_binds;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + union {
>> + /** @bind: used if num_binds == 1 */
>> + struct drm_xe_vm_bind_op bind;
>> +
>> + /**
>> + * @vector_of_binds: userptr to array of struct
>> + * drm_xe_vm_bind_op if num_binds > 1
>> + */
>> + __u64 vector_of_binds;
>> + };
>> +
>> + /** @num_syncs: amount of syncs to wait on */
>> + __u32 num_syncs;
>> +
>> + /** @pad2: MBZ */
>> + __u32 pad2;
>> +
>> + /** @syncs: pointer to struct drm_xe_sync array */
>> + __u64 syncs;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +/** struct drm_xe_ext_engine_set_property - engine set property extension */
>> +struct drm_xe_ext_engine_set_property {
>> + /** @base: base user extension */
>> + struct xe_user_extension base;
>> +
>> + /** @property: property to set */
>> + __u32 property;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + /** @value: property value */
>> + __u64 value;
>> +};
>> +
>> +/**
>> + * struct drm_xe_engine_set_property - engine set property
>> + *
>> + * Same namespace for extensions as drm_xe_engine_create
>> + */
>> +struct drm_xe_engine_set_property {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + /** @engine_id: Engine ID */
>> + __u32 engine_id;
>> +
>> +#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
>> +#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
>> +#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
>> + /*
>> + * Long running or ULLS engine mode. DMA fences not allowed in this
>> + * mode. Must match the value of DRM_XE_VM_CREATE_COMPUTE_MODE, serves
>> + * as a sanity check the UMD knows what it is doing. Can only be set at
>> + * engine create time.
>> + */
>> +#define XE_ENGINE_SET_PROPERTY_COMPUTE_MODE 3
>> +#define XE_ENGINE_SET_PROPERTY_PERSISTENCE 4
>> +#define XE_ENGINE_SET_PROPERTY_JOB_TIMEOUT 5
>> +#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
>> +#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
>> +#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
>> + /** @property: property to set */
>> + __u32 property;
>> +
>> + /** @value: property value */
>> + __u64 value;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +/** struct drm_xe_engine_class_instance - instance of an engine class */
>> +struct drm_xe_engine_class_instance {
>> +#define DRM_XE_ENGINE_CLASS_RENDER 0
>> +#define DRM_XE_ENGINE_CLASS_COPY 1
>> +#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
>> +#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
>> +#define DRM_XE_ENGINE_CLASS_COMPUTE 4
>> + /*
>> + * Kernel only class (not actual hardware engine class). Used for
>> + * creating ordered queues of VM bind operations.
>> + */
>> +#define DRM_XE_ENGINE_CLASS_VM_BIND 5
>> + __u16 engine_class;
>> +
>> + __u16 engine_instance;
>> + __u16 gt_id;
>> +};
>> +
>> +struct drm_xe_engine_create {
>> +#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + /** @width: submission width (number BB per exec) for this engine */
>> + __u16 width;
>> +
>> + /** @num_placements: number of valid placements for this engine */
>> + __u16 num_placements;
>> +
>> + /** @vm_id: VM to use for this engine */
>> + __u32 vm_id;
>> +
>> + /** @flags: MBZ */
>> + __u32 flags;
>> +
>> + /** @engine_id: Returned engine ID */
>> + __u32 engine_id;
>> +
>> + /**
>> + * @instances: user pointer to a 2-d array of struct
>> + * drm_xe_engine_class_instance
>> + *
>> + * length = width (i) * num_placements (j)
>> + * index = j + i * width
>> + */
>> + __u64 instances;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_engine_get_property {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + /** @engine_id: Engine ID */
>> + __u32 engine_id;
>> +
>> +#define XE_ENGINE_GET_PROPERTY_BAN 0
>> + /** @property: property to get */
>> + __u32 property;
>> +
>> + /** @value: property value */
>> + __u64 value;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_engine_destroy {
>> + /** @engine_id: Engine ID */
>> + __u32 engine_id;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_sync {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> +#define DRM_XE_SYNC_SYNCOBJ 0x0
>> +#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
>> +#define DRM_XE_SYNC_DMA_BUF 0x2
>> +#define DRM_XE_SYNC_USER_FENCE 0x3
>> +#define DRM_XE_SYNC_SIGNAL 0x10
>> + __u32 flags;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + union {
>> + __u32 handle;
>> +
>> + /**
>> + * @addr: Address of user fence. When sync passed in via exec
>> + * IOCTL this a GPU address in the VM. When sync passed in via
>> + * VM bind IOCTL this is a user pointer. In either case, it is
>> + * the users responsibility that this address is present and
>> + * mapped when the user fence is signalled. Must be qword
>> + * aligned.
>> + */
>> + __u64 addr;
>> + };
>> +
>> + __u64 timeline_value;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_exec {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + /** @vm_id: VM ID to run batch buffer in */
>> + __u32 engine_id;
>> +
>> + /** @num_syncs: Amount of struct drm_xe_sync in array. */
>> + __u32 num_syncs;
>> +
>> + /** @syncs: Pointer to struct drm_xe_sync array. */
>> + __u64 syncs;
>> +
>> + /**
>> + * @address: address of batch buffer if num_batch_buffer == 1 or an
>> + * array of batch buffer addresses
>> + */
>> + __u64 address;
>> +
>> + /**
>> + * @num_batch_buffer: number of batch buffer in this exec, must match
>> + * the width of the engine
>> + */
>> + __u16 num_batch_buffer;
>> +
>> + /** @pad: MBZ */
>> + __u16 pad[3];
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_mmio {
> I'm a bit skeptical of the need for this ioctl. The only "real"
> userspace that uses it only reads one specific register and only because
> we haven't given them the timestamp correlation interface that they
> really want (https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/384).
> Being able to read/write arbitrary registers is handy for the xe_reg
> tool in IGT, but if we didn't have the ioctl we could also have just
> used libpciaccess to map the BAR directly like i915's intel_reg tool
> does.
+1 here.
>
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + __u32 addr;
>> +
>> +#define DRM_XE_MMIO_8BIT 0x0
>> +#define DRM_XE_MMIO_16BIT 0x1
>> +#define DRM_XE_MMIO_32BIT 0x2
>> +#define DRM_XE_MMIO_64BIT 0x3
>> +#define DRM_XE_MMIO_BITS_MASK 0x3
>> +#define DRM_XE_MMIO_READ 0x4
>> +#define DRM_XE_MMIO_WRITE 0x8
>> + __u32 flags;
>> +
>> + __u64 value;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +/**
>> + * struct drm_xe_wait_user_fence - wait user fence
>> + *
>> + * Wait on user fence, XE will wakeup on every HW engine interrupt in the
>> + * instances list and check if user fence is complete::
>> + *
>> + * (*addr & MASK) OP (VALUE & MASK)
>> + *
>> + * Returns to user on user fence completion or timeout.
>> + */
>> +struct drm_xe_wait_user_fence {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + union {
>> + /**
>> + * @addr: user pointer address to wait on, must qword aligned
>> + */
>> + __u64 addr;
>> +
>> + /**
>> + * @vm_id: The ID of the VM which encounter an error used with
>> + * DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be clear.
>> + */
>> + __u64 vm_id;
>> + };
>> +
>> +#define DRM_XE_UFENCE_WAIT_EQ 0
>> +#define DRM_XE_UFENCE_WAIT_NEQ 1
>> +#define DRM_XE_UFENCE_WAIT_GT 2
>> +#define DRM_XE_UFENCE_WAIT_GTE 3
>> +#define DRM_XE_UFENCE_WAIT_LT 4
>> +#define DRM_XE_UFENCE_WAIT_LTE 5
>> + /** @op: wait operation (type of comparison) */
>> + __u16 op;
>> +
>> +#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
>> +#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
>> +#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
>> + /** @flags: wait flags */
>> + __u16 flags;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + /** @value: compare value */
>> + __u64 value;
>> +
>> +#define DRM_XE_UFENCE_WAIT_U8 0xffu
>> +#define DRM_XE_UFENCE_WAIT_U16 0xffffu
>> +#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
>> +#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
>> + /** @mask: comparison mask */
>> + __u64 mask;
>> + /**
>> + * @timeout: how long to wait before bailing, value in nanoseconds.
>> + * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
>> + * it contains timeout expressed in nanoseconds to wait (fence will
>> + * expire at now() + timeout).
>> + * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout) wait
>> + * will end at timeout (uses system MONOTONIC_CLOCK).
>> + * Passing negative timeout leads to neverending wait.
>> + *
>> + * On relative timeout this value is updated with timeout left
>> + * (for restarting the call in case of signal delivery).
>> + * On absolute timeout this value stays intact (restarted call still
>> + * expire at the same point of time).
>> + */
>> + __s64 timeout;
>> +
>> + /**
>> + * @num_engines: number of engine instances to wait on, must be zero
>> + * when DRM_XE_UFENCE_WAIT_SOFT_OP set
>> + */
>> + __u64 num_engines;
>> +
>> + /**
>> + * @instances: user pointer to array of drm_xe_engine_class_instance to
>> + * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
>> + */
>> + __u64 instances;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +struct drm_xe_vm_madvise {
>> + /** @extensions: Pointer to the first extension struct, if any */
>> + __u64 extensions;
>> +
>> + /** @vm_id: The ID VM in which the VMA exists */
>> + __u32 vm_id;
>> +
>> + /** @pad: MBZ */
>> + __u32 pad;
>> +
>> + /** @range: Number of bytes in the VMA */
>> + __u64 range;
>> +
>> + /** @addr: Address of the VMA to operation on */
>> + __u64 addr;
>> +
>> + /*
>> + * Setting the preferred location will trigger a migrate of the VMA
>> + * backing store to new location if the backing store is already
>> + * allocated.
>> + *
>> + * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
>> + * drm_xe_memory_class.
>> + */
>> +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
>> +#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
>> + /*
>> + * In this case lower 32 bits are mem class, upper 32 are GT.
>> + * Combination provides a single IOCTL plus migrate VMA to preferred
>> + * location.
>> + */
>> +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
> This is another place where we probably need to switch things over to be
> tile-centric rather than GT-centric.
>
>
> Matt
>
>> + /*
>> + * The CPU will do atomic memory operations to this VMA. Must be set on
>> + * some devices for atomics to behave correctly.
>> + */
>> +#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
>> + /*
>> + * The device will do atomic memory operations to this VMA. Must be set
>> + * on some devices for atomics to behave correctly.
>> + */
>> +#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
>> + /*
>> + * Priority WRT to eviction (moving from preferred memory location due
>> + * to memory pressure). The lower the priority, the more likely to be
>> + * evicted.
>> + */
>> +#define DRM_XE_VM_MADVISE_PRIORITY 5
>> +#define DRM_XE_VMA_PRIORITY_LOW 0
>> +#define DRM_XE_VMA_PRIORITY_NORMAL 1 /* Default */
>> +#define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must be elevated user */
>> + /* Pin the VMA in memory, must be elevated user */
>> +#define DRM_XE_VM_MADVISE_PIN 6
>> + /** @property: property to set */
>> + __u32 property;
>> +
>> + /** @pad2: MBZ */
>> + __u32 pad2;
>> +
>> + /** @value: property value */
>> + __u64 value;
>> +
>> + /** @reserved: Reserved */
>> + __u64 reserved[2];
>> +};
>> +
>> +#if defined(__cplusplus)
>> +}
>> +#endif
>> +
>> +#endif /* _UAPI_XE_DRM_H_ */
>> --
>> 2.40.1
>>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-07-06 6:14 ` Thomas Hellström
@ 2023-07-06 22:30 ` Matt Roper
2023-07-07 7:22 ` Thomas Hellström
2023-07-06 22:48 ` Matt Roper
1 sibling, 1 reply; 20+ messages in thread
From: Matt Roper @ 2023-07-06 22:30 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
On Thu, Jul 06, 2023 at 08:14:52AM +0200, Thomas Hellström wrote:
> Hi, Matt,
>
> Thanks for taking a look into this. Some comments below. I think we need to
> set up tasks for the various review concerns and assign people to have them
> resolved:
...
> > > +struct drm_xe_vm_bind {
> > Should there be a field in here to allow userspace to specify which PAT
> > index corresponds to the behavior (caching, coherency, CLOS, etc.) they
> > want on this binding? The PAT should be a characteristic of the bind
> > rather than of the underlying object, right?
> Yes, given certain immutable restrictions given at buffer-object create
> time; For example the CPU caching mode will restrict the coherency mode used
> in PAT, and CPU caching mode needs to be specified at bo create time. The
> current suggestion is therefore that coherency mode also needs to be
> specified at bo create time, a slightly stricter limitation on the available
> PAT indices at VM_BIND time. Whether we want to include PAT in the main
> struct or as an extension hasn't been decided yet.
I'm not sure I fully understand this one; I thought CPU caching to be
mostly orthogonal to GPU coherency mode. Do you mean we'd step in and
prevent combinations like CPU:WB + GPU:non-coherent since then the GPU
might not see updates done by the CPU that are still stuck in the CPU
cache and/or the CPU might read stale data from its cache after the GPU
has updated the buffer? It seems like there are so many ways userspace
could already shoot itself in the foot if it picked nonsense settings
that I'm surprised we'd try to stop it here. Even for the example given
there might be some cases where it still winds up being fine (e.g., the
CPU side always does clflushes at the necessary times and the GPU never
does any writes that would need to invalidate the CPU cache).
Am I overlooking something, or are the combinations that will get
restricted based on something else entirely?
Matt
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-07-06 6:14 ` Thomas Hellström
2023-07-06 22:30 ` Matt Roper
@ 2023-07-06 22:48 ` Matt Roper
1 sibling, 0 replies; 20+ messages in thread
From: Matt Roper @ 2023-07-06 22:48 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-xe
On Thu, Jul 06, 2023 at 08:14:52AM +0200, Thomas Hellström wrote:
...
> > > + /** @num_gt: number of GTs returned in gts */
> > > + __u32 num_gt;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /**
> > > + * @gts: The GTs returned for this device
> > > + *
> > > + * TODO: convert drm_xe_query_gt to proper kernel-doc.
> > > + * TODO: Perhaps info about every mem region relative to this GT? e.g.
> > > + * bandwidth between this GT and remote region?
> > > + */
> > > + struct drm_xe_query_gt {
> > > +#define XE_QUERY_GT_TYPE_MAIN 0
> > > +#define XE_QUERY_GT_TYPE_REMOTE 1
> > Once tiles get properly exposed through the uapi and there's a way to
> > determine which GTs belong to which tiles, TYPE_REMOTE should probably
> > go away. Within any given tile, the GTs would just be of types
> > TYPE_MAIN and TYPE_MEDIA. The "main" GT on remote tiles isn't
> > functionally any different than the "main" GT on the root tile.
> Do we need to expose the GT to user-space through the ioctl interface at
> all? Assuming that we could add the engine info of all GTs to the tile, is
> there something else in the ioctl that needs to be per-gt-specific. I
> learned that in sysfs interface there is. Does the same thing hold here?
Sorry, I missed this question on my other reply. I think the main
GT-centric things that userspace cares about today are:
* Power management stuff (clock frequencies, sleep states like RC6,
etc.). Most of this gets queried/modified via filesystem interface
rather than through ioctls, although I do see "__u32 clock_freq" in
the structure below...I'm not sure if any userspace truly needs that
or not given that they should be able to get the same info from sysfs
I think.
* Topology/fusing of the programmable graphics units (DSS / EU). On
current platforms these masks always wind up being 0 for the media
GT, so there isn't too much benefit to being able to query primary GT
and media GT separately and we could theoretically just query these
at the tile level with the understanding that the value returned
always applies to the tile's primary GT. But that makes me a bit
nervous since it would be possible for hardware architecture to
change and for some level of programmable hardware to be added to the
media GT in the future, and then we'd be a bit stuck without a good
way to separate the values for each GT.
Matt
> > > +#define XE_QUERY_GT_TYPE_MEDIA 2
> > > + __u16 type;
> > > + __u16 instance;
> > We need to decide (and then document) whether this should stay a
> > device-wide instance number, or whether we want this to become a
> > per-tile instance number instead.
> >
> > > + __u32 clock_freq;
> > > + __u64 features;
> > What is this one for? As far as I can see it's not actually set/used yet.
> >
> > > + __u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
> > > + __u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
> > > + __u64 inaccessible_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */
> > > + __u64 reserved[8];
> > > + } gts[];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_query_topology_mask - describe the topology mask of a GT
> > > + *
> > > + * This is the hardware topology which reflects the internal physical
> > > + * structure of the GPU.
> > > + *
> > > + * If a query is made with a struct drm_xe_device_query where .query
> > > + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
> > > + * struct drm_xe_query_topology_mask in .data.
> > > + */
> > > +struct drm_xe_query_topology_mask {
> > > + /** @gt_id: GT ID the mask is associated with */
> > > + __u16 gt_id;
> > > +
> > > + /*
> > > + * To query the mask of Dual Sub Slices (DSS) available for geometry
> > > + * operations. For example a query response containing the following
> > > + * in mask:
> > > + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> > > + * means 32 DSS are available for geometry.
> > > + */
> > > +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> > > + /*
> > > + * To query the mask of Dual Sub Slices (DSS) available for compute
> > > + * operations. For example a query response containing the following
> > > + * in mask:
> > > + * DSS_COMPUTE ff ff ff ff 00 00 00 00
> > > + * means 32 DSS are available for compute.
> > > + */
> > > +#define XE_TOPO_DSS_COMPUTE (1 << 1)
> > > + /*
> > > + * To query the mask of Execution Units (EU) available per Dual Sub
> > > + * Slices (DSS). For example a query response containing the following
> > > + * in mask:
> > > + * EU_PER_DSS ff ff 00 00 00 00 00 00
> > > + * means each DSS has 16 EU.
> > > + */
> > > +#define XE_TOPO_EU_PER_DSS (1 << 2)
> > > + /** @type: type of mask */
> > > + __u16 type;
> > > +
> > > + /** @num_bytes: number of bytes in requested mask */
> > > + __u32 num_bytes;
> > > +
> > > + /** @mask: little-endian mask of @num_bytes */
> > > + __u8 mask[];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_device_query - main structure to query device information
> > > + *
> > > + * If size is set to 0, the driver fills it with the required size for the
> > > + * requested type of data to query. If size is equal to the required size,
> > > + * the queried information is copied into data.
> > > + *
> > > + * For example the following code snippet allows retrieving and printing
> > > + * information about the device engines with DRM_XE_DEVICE_QUERY_ENGINES:
> > > + *
> > > + * .. code-block:: C
> > > + *
> > > + * struct drm_xe_engine_class_instance *hwe;
> > > + * struct drm_xe_device_query query = {
> > > + * .extensions = 0,
> > > + * .query = DRM_XE_DEVICE_QUERY_ENGINES,
> > > + * .size = 0,
> > > + * .data = 0,
> > > + * };
> > > + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> > > + * hwe = malloc(query.size);
> > > + * query.data = (uintptr_t)hwe;
> > > + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> > > + * int num_engines = query.size / sizeof(*hwe);
> > > + * for (int i = 0; i < num_engines; i++) {
> > > + * printf("Engine %d: %s\n", i,
> > > + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
> > > + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COPY ? "COPY":
> > > + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_DECODE ? "VIDEO_DECODE":
> > > + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ? "VIDEO_ENHANCE":
> > > + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
> > > + * "UNKNOWN");
> > > + * }
> > > + * free(hwe);
> > > + */
> > > +struct drm_xe_device_query {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > +#define DRM_XE_DEVICE_QUERY_ENGINES 0
> > > +#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
> > > +#define DRM_XE_DEVICE_QUERY_CONFIG 2
> > > +#define DRM_XE_DEVICE_QUERY_GTS 3
> > > +#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> > > +#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> > > + /** @query: The type of data to query */
> > > + __u32 query;
> > > +
> > > + /** @size: Size of the queried data */
> > > + __u32 size;
> > > +
> > > + /** @data: Queried data is placed here */
> > > + __u64 data;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_gem_create {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /**
> > > + * @size: Requested size for the object
> > > + *
> > > + * The (page-aligned) allocated size for the object will be returned.
> > > + */
> > > + __u64 size;
> > > +
> > > +#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> > > +#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
> > I think I asked a while back, but is marking an object as scanout at
> > creation time even reasonable? I think there are a lot of real-world
> > setups where a render/media client allocates a buffer, generates content
> > into it, and then hands it over to a compositor for display. Even the
> > compositor itself may not necessarily know up front whether it will make
> > sense to flip that buffer directly onto a display plane for scanout, or
> > whether to use it as a source texture when compositing surfaces into a
> > different scanout buffer. It seems like to be safe, any kind of render
> > target on the client side is going to have to get marked as SCANOUT,
> > even though chances are it will never actually get used that way in the
> > end. Pretty much only internal, non-shared objects would be able to
> > skip the SCANOUT flag.
>
> It sounds like consensus is this is doable. I think there has been
> discussions with mesa, acking this. Also Joonas and Ron Silvas agreeing on
> this approach.
>
> >
> > > + /**
> > > + * @flags: Flags, currently a mask of memory instances of where BO can
> > > + * be placed
> > > + */
> > > + __u32 flags;
> > > +
> > > + /**
> > > + * @vm_id: Attached VM, if any
> > > + *
> > > + * If a VM is specified, this BO must:
> > > + *
> > > + * 1. Only ever be bound to that VM.
> > > + *
> > > + * 2. Cannot be exported as a PRIME fd.
> > > + */
> > > + __u32 vm_id;
> > > +
> > > + /**
> > > + * @handle: Returned handle for the object.
> > > + *
> > > + * Object handles are nonzero.
> > > + */
> > > + __u32 handle;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_gem_mmap_offset {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @handle: Handle for the object being mapped. */
> > > + __u32 handle;
> > > +
> > > + /** @flags: Must be zero */
> > > + __u32 flags;
> > > +
> > > + /** @offset: The fake offset to use for subsequent mmap call */
> > > + __u64 offset;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_vm_bind_op_error_capture - format of VM bind op error capture
> > > + */
> > > +struct drm_xe_vm_bind_op_error_capture {
> > > + /** @error: errno that occured */
> > > + __s32 error;
> > > +
> > > + /** @op: operation that encounter an error */
> > > + __u32 op;
> > > +
> > > + /** @addr: address of bind op */
> > > + __u64 addr;
> > > +
> > > + /** @size: size of bind */
> > > + __u64 size;
> > > +};
> > > +
> > > +/** struct drm_xe_ext_vm_set_property - VM set property extension */
> > > +struct drm_xe_ext_vm_set_property {
> > > + /** @base: base user extension */
> > > + struct xe_user_extension base;
> > > +
> > > +#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
> > > + /** @property: property to set */
> > > + __u32 property;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_create {
> > > +#define XE_VM_EXTENSION_SET_PROPERTY 0
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > +#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> > > +#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
> > > +#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
> > > +#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> > > + /** @flags: Flags */
> > > + __u32 flags;
> > > +
> > > + /** @vm_id: Returned VM ID */
> > > + __u32 vm_id;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_destroy {
> > > + /** @vm_id: VM ID */
> > > + __u32 vm_id;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_bind_op {
> > > + /**
> > > + * @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for UNMAP
> > > + */
> > > + __u32 obj;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + union {
> > > + /**
> > > + * @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
> > > + * ignored for unbind
> > > + */
> > > + __u64 obj_offset;
> > > +
> > > + /** @userptr: user pointer to bind on */
> > > + __u64 userptr;
> > > + };
> > > +
> > > + /**
> > > + * @range: Number of bytes from the object to bind to addr, MBZ for UNMAP_ALL
> > > + */
> > > + __u64 range;
> > > +
> > > + /** @addr: Address to operate on, MBZ for UNMAP_ALL */
> > > + __u64 addr;
> > > +
> > > + /**
> > > + * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
> > > + * only applies to creating new VMAs
> > > + */
> > > + __u64 tile_mask;
> > > +
> > > +#define XE_VM_BIND_OP_MAP 0x0
> > > +#define XE_VM_BIND_OP_UNMAP 0x1
> > > +#define XE_VM_BIND_OP_MAP_USERPTR 0x2
> > > +#define XE_VM_BIND_OP_RESTART 0x3
> > > +#define XE_VM_BIND_OP_UNMAP_ALL 0x4
> > > +#define XE_VM_BIND_OP_PREFETCH 0x5
> > > +
> > > +#define XE_VM_BIND_FLAG_READONLY (0x1 << 16)
> > > + /*
> > > + * A bind ops completions are always async, hence the support for out
> > > + * sync. This flag indicates the allocation of the memory for new page
> > > + * tables and the job to program the pages tables is asynchronous
> > > + * relative to the IOCTL. That part of a bind operation can fail under
> > > + * memory pressure, the job in practice can't fail unless the system is
> > > + * totally shot.
> > > + *
> > > + * If this flag is clear and the IOCTL doesn't return an error, in
> > > + * practice the bind op is good and will complete.
> > > + *
> > > + * If this flag is set and doesn't return an error, the bind op can
> > > + * still fail and recovery is needed. If configured, the bind op that
> > > + * caused the error will be captured in drm_xe_vm_bind_op_error_capture.
> > > + * Once the user sees the error (via a ufence +
> > > + * XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS), it should free memory
> > > + * via non-async unbinds, and then restart all queue'd async binds op via
> > > + * XE_VM_BIND_OP_RESTART. Or alternatively the user should destroy the
> > > + * VM.
> > > + *
> > > + * This flag is only allowed when DRM_XE_VM_CREATE_ASYNC_BIND_OPS is
> > > + * configured in the VM and must be set if the VM is configured with
> > > + * DRM_XE_VM_CREATE_ASYNC_BIND_OPS and not in an error state.
> > > + */
> > > +#define XE_VM_BIND_FLAG_ASYNC (0x1 << 17)
> > > + /*
> > > + * Valid on a faulting VM only, do the MAP operation immediately rather
> > > + * than differing the MAP to the page fault handler.
> > > + */
> > > +#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 18)
> > > + /*
> > > + * When the NULL flag is set, the page tables are setup with a special
> > > + * bit which indicates writes are dropped and all reads return zero. In
> > > + * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
> > > + * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
> > > + * intended to implement VK sparse bindings.
> > > + */
> > > +#define XE_VM_BIND_FLAG_NULL (0x1 << 19)
> > > + /** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits) */
> > > + __u32 op;
> > > +
> > > + /** @mem_region: Memory region to prefetch VMA to, instance not a mask */
> > > + __u32 region;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_bind {
> > Should there be a field in here to allow userspace to specify which PAT
> > index corresponds to the behavior (caching, coherency, CLOS, etc.) they
> > want on this binding? The PAT should be a characteristic of the bind
> > rather than of the underlying object, right?
> Yes, given certain immutable restrictions given at buffer-object create
> time; For example the CPU caching mode will restrict the coherency mode used
> in PAT, and CPU caching mode needs to be specified at bo create time. The
> current suggestion is therefore that coherency mode also needs to be
> specified at bo create time, a slightly stricter limitation on the available
> PAT indices at VM_BIND time. Whether we want to include PAT in the main
> struct or as an extension hasn't been decided yet.
> >
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @vm_id: The ID of the VM to bind to */
> > > + __u32 vm_id;
> > > +
> > > + /**
> > > + * @engine_id: engine_id, must be of class DRM_XE_ENGINE_CLASS_VM_BIND
> > > + * and engine must have same vm_id. If zero, the default VM bind engine
> > > + * is used.
> > > + */
> > > + __u32 engine_id;
> > > +
> > > + /** @num_binds: number of binds in this IOCTL */
> > > + __u32 num_binds;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + union {
> > > + /** @bind: used if num_binds == 1 */
> > > + struct drm_xe_vm_bind_op bind;
> > > +
> > > + /**
> > > + * @vector_of_binds: userptr to array of struct
> > > + * drm_xe_vm_bind_op if num_binds > 1
> > > + */
> > > + __u64 vector_of_binds;
> > > + };
> > > +
> > > + /** @num_syncs: amount of syncs to wait on */
> > > + __u32 num_syncs;
> > > +
> > > + /** @pad2: MBZ */
> > > + __u32 pad2;
> > > +
> > > + /** @syncs: pointer to struct drm_xe_sync array */
> > > + __u64 syncs;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +/** struct drm_xe_ext_engine_set_property - engine set property extension */
> > > +struct drm_xe_ext_engine_set_property {
> > > + /** @base: base user extension */
> > > + struct xe_user_extension base;
> > > +
> > > + /** @property: property to set */
> > > + __u32 property;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_engine_set_property - engine set property
> > > + *
> > > + * Same namespace for extensions as drm_xe_engine_create
> > > + */
> > > +struct drm_xe_engine_set_property {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @engine_id: Engine ID */
> > > + __u32 engine_id;
> > > +
> > > +#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
> > > +#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
> > > +#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
> > > + /*
> > > + * Long running or ULLS engine mode. DMA fences not allowed in this
> > > + * mode. Must match the value of DRM_XE_VM_CREATE_COMPUTE_MODE, serves
> > > + * as a sanity check the UMD knows what it is doing. Can only be set at
> > > + * engine create time.
> > > + */
> > > +#define XE_ENGINE_SET_PROPERTY_COMPUTE_MODE 3
> > > +#define XE_ENGINE_SET_PROPERTY_PERSISTENCE 4
> > > +#define XE_ENGINE_SET_PROPERTY_JOB_TIMEOUT 5
> > > +#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
> > > +#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
> > > +#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
> > > + /** @property: property to set */
> > > + __u32 property;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +/** struct drm_xe_engine_class_instance - instance of an engine class */
> > > +struct drm_xe_engine_class_instance {
> > > +#define DRM_XE_ENGINE_CLASS_RENDER 0
> > > +#define DRM_XE_ENGINE_CLASS_COPY 1
> > > +#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
> > > +#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
> > > +#define DRM_XE_ENGINE_CLASS_COMPUTE 4
> > > + /*
> > > + * Kernel only class (not actual hardware engine class). Used for
> > > + * creating ordered queues of VM bind operations.
> > > + */
> > > +#define DRM_XE_ENGINE_CLASS_VM_BIND 5
> > > + __u16 engine_class;
> > > +
> > > + __u16 engine_instance;
> > > + __u16 gt_id;
> > > +};
> > > +
> > > +struct drm_xe_engine_create {
> > > +#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @width: submission width (number BB per exec) for this engine */
> > > + __u16 width;
> > > +
> > > + /** @num_placements: number of valid placements for this engine */
> > > + __u16 num_placements;
> > > +
> > > + /** @vm_id: VM to use for this engine */
> > > + __u32 vm_id;
> > > +
> > > + /** @flags: MBZ */
> > > + __u32 flags;
> > > +
> > > + /** @engine_id: Returned engine ID */
> > > + __u32 engine_id;
> > > +
> > > + /**
> > > + * @instances: user pointer to a 2-d array of struct
> > > + * drm_xe_engine_class_instance
> > > + *
> > > + * length = width (i) * num_placements (j)
> > > + * index = j + i * width
> > > + */
> > > + __u64 instances;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_engine_get_property {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @engine_id: Engine ID */
> > > + __u32 engine_id;
> > > +
> > > +#define XE_ENGINE_GET_PROPERTY_BAN 0
> > > + /** @property: property to get */
> > > + __u32 property;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_engine_destroy {
> > > + /** @engine_id: Engine ID */
> > > + __u32 engine_id;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_sync {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > +#define DRM_XE_SYNC_SYNCOBJ 0x0
> > > +#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
> > > +#define DRM_XE_SYNC_DMA_BUF 0x2
> > > +#define DRM_XE_SYNC_USER_FENCE 0x3
> > > +#define DRM_XE_SYNC_SIGNAL 0x10
> > > + __u32 flags;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + union {
> > > + __u32 handle;
> > > +
> > > + /**
> > > + * @addr: Address of user fence. When sync passed in via exec
> > > + * IOCTL this a GPU address in the VM. When sync passed in via
> > > + * VM bind IOCTL this is a user pointer. In either case, it is
> > > + * the users responsibility that this address is present and
> > > + * mapped when the user fence is signalled. Must be qword
> > > + * aligned.
> > > + */
> > > + __u64 addr;
> > > + };
> > > +
> > > + __u64 timeline_value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_exec {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @vm_id: VM ID to run batch buffer in */
> > > + __u32 engine_id;
> > > +
> > > + /** @num_syncs: Amount of struct drm_xe_sync in array. */
> > > + __u32 num_syncs;
> > > +
> > > + /** @syncs: Pointer to struct drm_xe_sync array. */
> > > + __u64 syncs;
> > > +
> > > + /**
> > > + * @address: address of batch buffer if num_batch_buffer == 1 or an
> > > + * array of batch buffer addresses
> > > + */
> > > + __u64 address;
> > > +
> > > + /**
> > > + * @num_batch_buffer: number of batch buffer in this exec, must match
> > > + * the width of the engine
> > > + */
> > > + __u16 num_batch_buffer;
> > > +
> > > + /** @pad: MBZ */
> > > + __u16 pad[3];
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_mmio {
> > I'm a bit skeptical of the need for this ioctl. The only "real"
> > userspace that uses it only reads one specific register and only because
> > we haven't given them the timestamp correlation interface that they
> > really want (https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/384).
> > Being able to read/write arbitrary registers is handy for the xe_reg
> > tool in IGT, but if we didn't have the ioctl we could also have just
> > used libpciaccess to map the BAR directly like i915's intel_reg tool
> > does.
>
> +1 here.
>
> >
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + __u32 addr;
> > > +
> > > +#define DRM_XE_MMIO_8BIT 0x0
> > > +#define DRM_XE_MMIO_16BIT 0x1
> > > +#define DRM_XE_MMIO_32BIT 0x2
> > > +#define DRM_XE_MMIO_64BIT 0x3
> > > +#define DRM_XE_MMIO_BITS_MASK 0x3
> > > +#define DRM_XE_MMIO_READ 0x4
> > > +#define DRM_XE_MMIO_WRITE 0x8
> > > + __u32 flags;
> > > +
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_wait_user_fence - wait user fence
> > > + *
> > > + * Wait on user fence, XE will wakeup on every HW engine interrupt in the
> > > + * instances list and check if user fence is complete::
> > > + *
> > > + * (*addr & MASK) OP (VALUE & MASK)
> > > + *
> > > + * Returns to user on user fence completion or timeout.
> > > + */
> > > +struct drm_xe_wait_user_fence {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + union {
> > > + /**
> > > + * @addr: user pointer address to wait on, must qword aligned
> > > + */
> > > + __u64 addr;
> > > +
> > > + /**
> > > + * @vm_id: The ID of the VM which encounter an error used with
> > > + * DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be clear.
> > > + */
> > > + __u64 vm_id;
> > > + };
> > > +
> > > +#define DRM_XE_UFENCE_WAIT_EQ 0
> > > +#define DRM_XE_UFENCE_WAIT_NEQ 1
> > > +#define DRM_XE_UFENCE_WAIT_GT 2
> > > +#define DRM_XE_UFENCE_WAIT_GTE 3
> > > +#define DRM_XE_UFENCE_WAIT_LT 4
> > > +#define DRM_XE_UFENCE_WAIT_LTE 5
> > > + /** @op: wait operation (type of comparison) */
> > > + __u16 op;
> > > +
> > > +#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
> > > +#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
> > > +#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
> > > + /** @flags: wait flags */
> > > + __u16 flags;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @value: compare value */
> > > + __u64 value;
> > > +
> > > +#define DRM_XE_UFENCE_WAIT_U8 0xffu
> > > +#define DRM_XE_UFENCE_WAIT_U16 0xffffu
> > > +#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
> > > +#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
> > > + /** @mask: comparison mask */
> > > + __u64 mask;
> > > + /**
> > > + * @timeout: how long to wait before bailing, value in nanoseconds.
> > > + * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
> > > + * it contains timeout expressed in nanoseconds to wait (fence will
> > > + * expire at now() + timeout).
> > > + * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout) wait
> > > + * will end at timeout (uses system MONOTONIC_CLOCK).
> > > + * Passing negative timeout leads to neverending wait.
> > > + *
> > > + * On relative timeout this value is updated with timeout left
> > > + * (for restarting the call in case of signal delivery).
> > > + * On absolute timeout this value stays intact (restarted call still
> > > + * expire at the same point of time).
> > > + */
> > > + __s64 timeout;
> > > +
> > > + /**
> > > + * @num_engines: number of engine instances to wait on, must be zero
> > > + * when DRM_XE_UFENCE_WAIT_SOFT_OP set
> > > + */
> > > + __u64 num_engines;
> > > +
> > > + /**
> > > + * @instances: user pointer to array of drm_xe_engine_class_instance to
> > > + * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
> > > + */
> > > + __u64 instances;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_madvise {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @vm_id: The ID VM in which the VMA exists */
> > > + __u32 vm_id;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @range: Number of bytes in the VMA */
> > > + __u64 range;
> > > +
> > > + /** @addr: Address of the VMA to operation on */
> > > + __u64 addr;
> > > +
> > > + /*
> > > + * Setting the preferred location will trigger a migrate of the VMA
> > > + * backing store to new location if the backing store is already
> > > + * allocated.
> > > + *
> > > + * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
> > > + * drm_xe_memory_class.
> > > + */
> > > +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
> > > +#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
> > > + /*
> > > + * In this case lower 32 bits are mem class, upper 32 are GT.
> > > + * Combination provides a single IOCTL plus migrate VMA to preferred
> > > + * location.
> > > + */
> > > +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
> > This is another place where we probably need to switch things over to be
> > tile-centric rather than GT-centric.
> >
> >
> > Matt
> >
> > > + /*
> > > + * The CPU will do atomic memory operations to this VMA. Must be set on
> > > + * some devices for atomics to behave correctly.
> > > + */
> > > +#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
> > > + /*
> > > + * The device will do atomic memory operations to this VMA. Must be set
> > > + * on some devices for atomics to behave correctly.
> > > + */
> > > +#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
> > > + /*
> > > + * Priority WRT to eviction (moving from preferred memory location due
> > > + * to memory pressure). The lower the priority, the more likely to be
> > > + * evicted.
> > > + */
> > > +#define DRM_XE_VM_MADVISE_PRIORITY 5
> > > +#define DRM_XE_VMA_PRIORITY_LOW 0
> > > +#define DRM_XE_VMA_PRIORITY_NORMAL 1 /* Default */
> > > +#define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must be elevated user */
> > > + /* Pin the VMA in memory, must be elevated user */
> > > +#define DRM_XE_VM_MADVISE_PIN 6
> > > + /** @property: property to set */
> > > + __u32 property;
> > > +
> > > + /** @pad2: MBZ */
> > > + __u32 pad2;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +#if defined(__cplusplus)
> > > +}
> > > +#endif
> > > +
> > > +#endif /* _UAPI_XE_DRM_H_ */
> > > --
> > > 2.40.1
> > >
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-07-06 22:30 ` Matt Roper
@ 2023-07-07 7:22 ` Thomas Hellström
0 siblings, 0 replies; 20+ messages in thread
From: Thomas Hellström @ 2023-07-07 7:22 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-xe
Hi, Matt,
On 7/7/23 00:30, Matt Roper wrote:
> On Thu, Jul 06, 2023 at 08:14:52AM +0200, Thomas Hellström wrote:
>> Hi, Matt,
>>
>> Thanks for taking a look into this. Some comments below. I think we need to
>> set up tasks for the various review concerns and assign people to have them
>> resolved:
> ...
>>>> +struct drm_xe_vm_bind {
>>> Should there be a field in here to allow userspace to specify which PAT
>>> index corresponds to the behavior (caching, coherency, CLOS, etc.) they
>>> want on this binding? The PAT should be a characteristic of the bind
>>> rather than of the underlying object, right?
>> Yes, given certain immutable restrictions given at buffer-object create
>> time; For example the CPU caching mode will restrict the coherency mode used
>> in PAT, and CPU caching mode needs to be specified at bo create time. The
>> current suggestion is therefore that coherency mode also needs to be
>> specified at bo create time, a slightly stricter limitation on the available
>> PAT indices at VM_BIND time. Whether we want to include PAT in the main
>> struct or as an extension hasn't been decided yet.
> I'm not sure I fully understand this one; I thought CPU caching to be
> mostly orthogonal to GPU coherency mode. Do you mean we'd step in and
> prevent combinations like CPU:WB + GPU:non-coherent since then the GPU
> might not see updates done by the CPU that are still stuck in the CPU
> cache and/or the CPU might read stale data from its cache after the GPU
> has updated the buffer? It seems like there are so many ways userspace
> could already shoot itself in the foot if it picked nonsense settings
> that I'm surprised we'd try to stop it here. Even for the example given
> there might be some cases where it still winds up being fine (e.g., the
> CPU side always does clflushes at the necessary times and the GPU never
> does any writes that would need to invalidate the CPU cache).
>
> Am I overlooking something, or are the combinations that will get
> restricted based on something else entirely?
The reason we try to stop the GPU bypassing the CPU cache by choosing
non-coherent GPU mappings with WB system memory is so that user-space
doesn't find a way to bypass the page-wiping done by the kernel and can
access previous sensitive page-contents. The intention is not really to
stop user-space shooting itself in the foot. It's still free to do that.
There are three ways we can do this:
1) Kernel clflushes, like i915. (Works only for integrated, since it
requires a guarantee that the processor never writes-back a clean
(prefetched) cache-line). We only have that guarantee for Intel
processors. Linus has made it clear that we should avoid relying on
something arch- or processor dependent like this, but we might get away
with it on integrated).
2) Write-combined system memory mappings, making the memory appear
coherent anyway, (Probably only works for x86) This actually moves the
clflush to the WB->WC transition in the x86 arch layer of the kernel. I
think amdgpu is using this.
3) We've been discussing GPU flushing of cpu-cache using a read with a
suitable PAT setting (The only way we can do this generically on
discrete, I think, if discrete ever decides to implement non-coherent
system page mappings. For now, we've been told no current or planned
PCIe discrete will implement the PCIe no-snoop hint. Not sure what
happens with CXL).
For uAPI purposes, we landed in 2) (That would also allow us to base
implementation on 1-3 if it turns out to be needed). WC system memory
can only be choosen at backing store creation, which is a TTM restriction.
These were all part of the PAT presentations on Xe weekly sync.
Ofc if you think there are reasons we should reconsider, these are not
fully set in stone yet
/Thomas
>
>
> Matt
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
[not found] ` <76c3d534-453a-7fd3-6fc8-cf30e9c8d464@intel.com>
@ 2023-09-14 1:40 ` Zeng, Oak
2023-09-25 21:42 ` Rodrigo Vivi
0 siblings, 1 reply; 20+ messages in thread
From: Zeng, Oak @ 2023-09-14 1:40 UTC (permalink / raw)
To: Thomas Hellström
Cc: intel-xe@lists.freedesktop.org, Arteaga Molina, Jaime A
Hi Thomas,
One thing regarding the atomic madvise came up in our recent discussion with L0 team. See inline
> -----Original Message-----
> From: Welty, Brian <brian.welty@intel.com>
> Sent: Wednesday, September 13, 2023 8:32 PM
> To: Zeng, Oak <oak.zeng@intel.com>
> Subject: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
>
>
>
>
> -------- Forwarded Message --------
> Subject: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
> Date: Fri, 30 Jun 2023 12:00:59 +0200
> From: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> To: intel-xe@lists.freedesktop.org
>
> Add a copy of xe_drm.h for uAPI review purposes only. Never commit this,
> the intention is to perform an uAPI review in this thread and if needed
> move it to Gitlab for easier discussion.
>
> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
> include/uapi/drm/xe_drm_reviewonly.h | 1009
> ++++++++++++++++++++++++++
> 1 file changed, 1009 insertions(+)
> create mode 100644 include/uapi/drm/xe_drm_reviewonly.h
>
> diff --git a/include/uapi/drm/xe_drm_reviewonly.h
> b/include/uapi/drm/xe_drm_reviewonly.h
> new file mode 100644
> index 000000000000..e890b131af91
> --- /dev/null
> +++ b/include/uapi/drm/xe_drm_reviewonly.h
> @@ -0,0 +1,1009 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef _UAPI_XE_DRM_H_
> +#define _UAPI_XE_DRM_H_
> +
> +#include "drm.h"
> +
> +#if defined(__cplusplus)
> +extern "C" {
> +#endif
> +
> +/* Please note that modifications to all structs defined here are
> + * subject to backwards-compatibility constraints.
> + */
> +
> +/**
> + * struct xe_user_extension - Base class for defining a chain of extensions
> + *
> + * Many interfaces need to grow over time. In most cases we can simply
> + * extend the struct and have userspace pass in more data. Another option,
> + * as demonstrated by Vulkan's approach to providing extensions for forward
> + * and backward compatibility, is to use a list of optional structs to
> + * provide those extra details.
> + *
> + * The key advantage to using an extension chain is that it allows us to
> + * redefine the interface more easily than an ever growing struct of
> + * increasing complexity, and for large parts of that interface to be
> + * entirely optional. The downside is more pointer chasing; chasing across
> + * the __user boundary with pointers encapsulated inside u64.
> + *
> + * Example chaining:
> + *
> + * .. code-block:: C
> + *
> + * struct xe_user_extension ext3 {
> + * .next_extension = 0, // end
> + * .name = ...,
> + * };
> + * struct xe_user_extension ext2 {
> + * .next_extension = (uintptr_t)&ext3,
> + * .name = ...,
> + * };
> + * struct xe_user_extension ext1 {
> + * .next_extension = (uintptr_t)&ext2,
> + * .name = ...,
> + * };
> + *
> + * Typically the struct xe_user_extension would be embedded in some uAPI
> + * struct, and in this case we would feed it the head of the chain(i.e
> ext1),
> + * which would then apply all of the above extensions.
> + *
> + */
> +struct xe_user_extension {
> + /**
> + * @next_extension:
> + *
> + * Pointer to the next struct xe_user_extension, or zero if the end.
> + */
> + __u64 next_extension;
> +
> + /**
> + * @name: Name of the extension.
> + *
> + * Note that the name here is just some integer.
> + *
> + * Also note that the name space for this is not global for the whole
> + * driver, but rather its scope/meaning is limited to the specific piece
> + * of uAPI which has embedded the struct xe_user_extension.
> + */
> + __u32 name;
> +
> + /**
> + * @pad: MBZ
> + *
> + * All undefined bits must be zero.
> + */
> + __u32 pad;
> +};
> +
> +/*
> + * xe specific ioctls.
> + *
> + * The device specific ioctl range is [DRM_COMMAND_BASE,
> DRM_COMMAND_END) ie
> + * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset
> + * against DRM_COMMAND_BASE and should be between [0x0, 0x60).
> + */
> +#define DRM_XE_DEVICE_QUERY 0x00
> +#define DRM_XE_GEM_CREATE 0x01
> +#define DRM_XE_GEM_MMAP_OFFSET 0x02
> +#define DRM_XE_VM_CREATE 0x03
> +#define DRM_XE_VM_DESTROY 0x04
> +#define DRM_XE_VM_BIND 0x05
> +#define DRM_XE_ENGINE_CREATE 0x06
> +#define DRM_XE_ENGINE_DESTROY 0x07
> +#define DRM_XE_EXEC 0x08
> +#define DRM_XE_MMIO 0x09
> +#define DRM_XE_ENGINE_SET_PROPERTY 0x0a
> +#define DRM_XE_WAIT_USER_FENCE 0x0b
> +#define DRM_XE_VM_MADVISE 0x0c
> +#define DRM_XE_ENGINE_GET_PROPERTY 0x0d
> +
> +/* Must be kept compact -- no holes */
> +#define DRM_IOCTL_XE_DEVICE_QUERY
> DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
> +#define DRM_IOCTL_XE_GEM_CREATE
> DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
> +#define DRM_IOCTL_XE_GEM_MMAP_OFFSET
> DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
> +#define DRM_IOCTL_XE_VM_CREATE
> DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_VM_CREATE, struct drm_xe_vm_create)
> +#define DRM_IOCTL_XE_VM_DESTROY
> DRM_IOW(DRM_COMMAND_BASE +
> DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
> +#define DRM_IOCTL_XE_VM_BIND
> DRM_IOW(DRM_COMMAND_BASE +
> DRM_XE_VM_BIND, struct drm_xe_vm_bind)
> +#define DRM_IOCTL_XE_ENGINE_CREATE
> DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_ENGINE_CREATE, struct drm_xe_engine_create)
> +#define DRM_IOCTL_XE_ENGINE_GET_PROPERTY
> DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_ENGINE_GET_PROPERTY, struct drm_xe_engine_get_property)
> +#define DRM_IOCTL_XE_ENGINE_DESTROY
> DRM_IOW(DRM_COMMAND_BASE +
> DRM_XE_ENGINE_DESTROY, struct drm_xe_engine_destroy)
> +#define DRM_IOCTL_XE_EXEC
> DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC,
> struct drm_xe_exec)
> +#define DRM_IOCTL_XE_MMIO
> DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_MMIO,
> struct drm_xe_mmio)
> +#define DRM_IOCTL_XE_ENGINE_SET_PROPERTY
> DRM_IOW(DRM_COMMAND_BASE +
> DRM_XE_ENGINE_SET_PROPERTY, struct drm_xe_engine_set_property)
> +#define DRM_IOCTL_XE_WAIT_USER_FENCE
> DRM_IOWR(DRM_COMMAND_BASE +
> DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
> +#define DRM_IOCTL_XE_VM_MADVISE
> DRM_IOW(DRM_COMMAND_BASE +
> DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
> +
> +/**
> + * enum drm_xe_memory_class - Supported memory classes.
> + */
> +enum drm_xe_memory_class {
> + /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory.
> */
> + XE_MEM_REGION_CLASS_SYSMEM = 0,
> + /**
> + * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
> + * represents the memory that is local to the device, which we
> + * call VRAM. Not valid on integrated platforms.
> + */
> + XE_MEM_REGION_CLASS_VRAM
> +};
> +
> +/**
> + * struct drm_xe_query_mem_region - Describes some region as known to
> + * the driver.
> + */
> +struct drm_xe_query_mem_region {
> + /**
> + * @mem_class: The memory class describing this region.
> + *
> + * See enum drm_xe_memory_class for supported values.
> + */
> + __u16 mem_class;
> + /**
> + * @instance: The instance for this region.
> + *
> + * The @mem_class and @instance taken together will always give
> + * a unique pair.
> + */
> + __u16 instance;
> + /** @pad: MBZ */
> + __u32 pad;
> + /**
> + * @min_page_size: Min page-size in bytes for this region.
> + *
> + * When the kernel allocates memory for this region, the
> + * underlying pages will be at least @min_page_size in size.
> + *
> + * Important note: When userspace allocates a GTT address which
> + * can point to memory allocated from this region, it must also
> + * respect this minimum alignment. This is enforced by the
> + * kernel.
> + */
> + __u32 min_page_size;
> + /**
> + * @max_page_size: Max page-size in bytes for this region.
> + */
> + __u32 max_page_size;
> + /**
> + * @total_size: The usable size in bytes for this region.
> + */
> + __u64 total_size;
> + /**
> + * @used: Estimate of the memory used in bytes for this region.
> + *
> + * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
> + * accounting. Without this the value here will always equal
> + * zero.
> + */
> + __u64 used;
> + /** @reserved: MBZ */
> + __u64 reserved[8];
> +};
> +
> +/**
> + * struct drm_xe_query_mem_usage - describe memory regions and usage
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
> + * struct drm_xe_query_mem_usage in .data.
> + */
> +struct drm_xe_query_mem_usage {
> + /** @num_regions: number of memory regions returned in @regions */
> + __u32 num_regions;
> + /** @pad: MBZ */
> + __u32 pad;
> + /** @regions: The returned regions for this device */
> + struct drm_xe_query_mem_region regions[];
> +};
> +
> +/**
> + * struct drm_xe_query_config - describe the device configuration
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
> + * struct drm_xe_query_config in .data.
> + */
> +struct drm_xe_query_config {
> + /** @num_params: number of parameters returned in info */
> + __u32 num_params;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> +#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
> +#define XE_QUERY_CONFIG_FLAGS 1
> + #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
> + #define XE_QUERY_CONFIG_FLAGS_USE_GUC (0x1 << 1)
> +#define XE_QUERY_CONFIG_MIN_ALIGNEMENT 2
> +#define XE_QUERY_CONFIG_VA_BITS 3
> +#define XE_QUERY_CONFIG_GT_COUNT 4
> +#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> +#define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
> +#define XE_QUERY_CONFIG_NUM_PARAM
> (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY
> + 1)
> + /** @info: array of elements containing the config info */
> + __u64 info[];
> +};
> +
> +/**
> + * struct drm_xe_query_gts - describe GTs
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_GTS, then the reply uses struct
> + * drm_xe_query_gts in .data.
> + */
> +struct drm_xe_query_gts {
> + /** @num_gt: number of GTs returned in gts */
> + __u32 num_gt;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /**
> + * @gts: The GTs returned for this device
> + *
> + * TODO: convert drm_xe_query_gt to proper kernel-doc.
> + * TODO: Perhaps info about every mem region relative to this GT? e.g.
> + * bandwidth between this GT and remote region?
> + */
> + struct drm_xe_query_gt {
> +#define XE_QUERY_GT_TYPE_MAIN 0
> +#define XE_QUERY_GT_TYPE_REMOTE 1
> +#define XE_QUERY_GT_TYPE_MEDIA 2
> + __u16 type;
> + __u16 instance;
> + __u32 clock_freq;
> + __u64 features;
> + __u64 native_mem_regions; /* bit mask of instances from
> drm_xe_query_mem_usage */
> + __u64 slow_mem_regions; /* bit mask of instances
> from
> drm_xe_query_mem_usage */
> + __u64 inaccessible_mem_regions; /* bit mask of instances
> from
> drm_xe_query_mem_usage */
> + __u64 reserved[8];
> + } gts[];
> +};
> +
> +/**
> + * struct drm_xe_query_topology_mask - describe the topology mask of a GT
> + *
> + * This is the hardware topology which reflects the internal physical
> + * structure of the GPU.
> + *
> + * If a query is made with a struct drm_xe_device_query where .query
> + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
> + * struct drm_xe_query_topology_mask in .data.
> + */
> +struct drm_xe_query_topology_mask {
> + /** @gt_id: GT ID the mask is associated with */
> + __u16 gt_id;
> +
> + /*
> + * To query the mask of Dual Sub Slices (DSS) available for geometry
> + * operations. For example a query response containing the following
> + * in mask:
> + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> + * means 32 DSS are available for geometry.
> + */
> +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> + /*
> + * To query the mask of Dual Sub Slices (DSS) available for compute
> + * operations. For example a query response containing the following
> + * in mask:
> + * DSS_COMPUTE ff ff ff ff 00 00 00 00
> + * means 32 DSS are available for compute.
> + */
> +#define XE_TOPO_DSS_COMPUTE (1 << 1)
> + /*
> + * To query the mask of Execution Units (EU) available per Dual Sub
> + * Slices (DSS). For example a query response containing the following
> + * in mask:
> + * EU_PER_DSS ff ff 00 00 00 00 00 00
> + * means each DSS has 16 EU.
> + */
> +#define XE_TOPO_EU_PER_DSS (1 << 2)
> + /** @type: type of mask */
> + __u16 type;
> +
> + /** @num_bytes: number of bytes in requested mask */
> + __u32 num_bytes;
> +
> + /** @mask: little-endian mask of @num_bytes */
> + __u8 mask[];
> +};
> +
> +/**
> + * struct drm_xe_device_query - main structure to query device information
> + *
> + * If size is set to 0, the driver fills it with the required size for the
> + * requested type of data to query. If size is equal to the required size,
> + * the queried information is copied into data.
> + *
> + * For example the following code snippet allows retrieving and printing
> + * information about the device engines with
> DRM_XE_DEVICE_QUERY_ENGINES:
> + *
> + * .. code-block:: C
> + *
> + * struct drm_xe_engine_class_instance *hwe;
> + * struct drm_xe_device_query query = {
> + * .extensions = 0,
> + * .query = DRM_XE_DEVICE_QUERY_ENGINES,
> + * .size = 0,
> + * .data = 0,
> + * };
> + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> + * hwe = malloc(query.size);
> + * query.data = (uintptr_t)hwe;
> + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> + * int num_engines = query.size / sizeof(*hwe);
> + * for (int i = 0; i < num_engines; i++) {
> + * printf("Engine %d: %s\n", i,
> + * hwe[i].engine_class ==
> DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
> + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COPY ?
> "COPY":
> + * hwe[i].engine_class ==
> DRM_XE_ENGINE_CLASS_VIDEO_DECODE ?
> "VIDEO_DECODE":
> + * hwe[i].engine_class ==
> DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ?
> "VIDEO_ENHANCE":
> + * hwe[i].engine_class ==
> DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
> + * "UNKNOWN");
> + * }
> + * free(hwe);
> + */
> +struct drm_xe_device_query {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> +#define DRM_XE_DEVICE_QUERY_ENGINES 0
> +#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
> +#define DRM_XE_DEVICE_QUERY_CONFIG 2
> +#define DRM_XE_DEVICE_QUERY_GTS 3
> +#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> +#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> + /** @query: The type of data to query */
> + __u32 query;
> +
> + /** @size: Size of the queried data */
> + __u32 size;
> +
> + /** @data: Queried data is placed here */
> + __u64 data;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_gem_create {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /**
> + * @size: Requested size for the object
> + *
> + * The (page-aligned) allocated size for the object will be returned.
> + */
> + __u64 size;
> +
> +#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> +#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
> + /**
> + * @flags: Flags, currently a mask of memory instances of where BO can
> + * be placed
> + */
> + __u32 flags;
> +
> + /**
> + * @vm_id: Attached VM, if any
> + *
> + * If a VM is specified, this BO must:
> + *
> + * 1. Only ever be bound to that VM.
> + *
> + * 2. Cannot be exported as a PRIME fd.
> + */
> + __u32 vm_id;
> +
> + /**
> + * @handle: Returned handle for the object.
> + *
> + * Object handles are nonzero.
> + */
> + __u32 handle;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_gem_mmap_offset {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @handle: Handle for the object being mapped. */
> + __u32 handle;
> +
> + /** @flags: Must be zero */
> + __u32 flags;
> +
> + /** @offset: The fake offset to use for subsequent mmap call */
> + __u64 offset;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/**
> + * struct drm_xe_vm_bind_op_error_capture - format of VM bind op error
> capture
> + */
> +struct drm_xe_vm_bind_op_error_capture {
> + /** @error: errno that occured */
> + __s32 error;
> +
> + /** @op: operation that encounter an error */
> + __u32 op;
> +
> + /** @addr: address of bind op */
> + __u64 addr;
> +
> + /** @size: size of bind */
> + __u64 size;
> +};
> +
> +/** struct drm_xe_ext_vm_set_property - VM set property extension */
> +struct drm_xe_ext_vm_set_property {
> + /** @base: base user extension */
> + struct xe_user_extension base;
> +
> +#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_create {
> +#define XE_VM_EXTENSION_SET_PROPERTY 0
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> +#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> +#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
> +#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
> +#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> + /** @flags: Flags */
> + __u32 flags;
> +
> + /** @vm_id: Returned VM ID */
> + __u32 vm_id;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_destroy {
> + /** @vm_id: VM ID */
> + __u32 vm_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_bind_op {
> + /**
> + * @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for
> UNMAP
> + */
> + __u32 obj;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + union {
> + /**
> + * @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
> + * ignored for unbind
> + */
> + __u64 obj_offset;
> +
> + /** @userptr: user pointer to bind on */
> + __u64 userptr;
> + };
> +
> + /**
> + * @range: Number of bytes from the object to bind to addr, MBZ for
> UNMAP_ALL
> + */
> + __u64 range;
> +
> + /** @addr: Address to operate on, MBZ for UNMAP_ALL */
> + __u64 addr;
> +
> + /**
> + * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
> + * only applies to creating new VMAs
> + */
> + __u64 tile_mask;
> +
> +#define XE_VM_BIND_OP_MAP 0x0
> +#define XE_VM_BIND_OP_UNMAP 0x1
> +#define XE_VM_BIND_OP_MAP_USERPTR 0x2
> +#define XE_VM_BIND_OP_RESTART 0x3
> +#define XE_VM_BIND_OP_UNMAP_ALL 0x4
> +#define XE_VM_BIND_OP_PREFETCH 0x5
> +
> +#define XE_VM_BIND_FLAG_READONLY (0x1 << 16)
> + /*
> + * A bind ops completions are always async, hence the support for out
> + * sync. This flag indicates the allocation of the memory for new page
> + * tables and the job to program the pages tables is asynchronous
> + * relative to the IOCTL. That part of a bind operation can fail under
> + * memory pressure, the job in practice can't fail unless the system is
> + * totally shot.
> + *
> + * If this flag is clear and the IOCTL doesn't return an error, in
> + * practice the bind op is good and will complete.
> + *
> + * If this flag is set and doesn't return an error, the bind op can
> + * still fail and recovery is needed. If configured, the bind op that
> + * caused the error will be captured in
> drm_xe_vm_bind_op_error_capture.
> + * Once the user sees the error (via a ufence +
> + * XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS), it should
> free memory
> + * via non-async unbinds, and then restart all queue'd async binds op via
> + * XE_VM_BIND_OP_RESTART. Or alternatively the user should destroy
> the
> + * VM.
> + *
> + * This flag is only allowed when
> DRM_XE_VM_CREATE_ASYNC_BIND_OPS is
> + * configured in the VM and must be set if the VM is configured with
> + * DRM_XE_VM_CREATE_ASYNC_BIND_OPS and not in an error state.
> + */
> +#define XE_VM_BIND_FLAG_ASYNC (0x1 << 17)
> + /*
> + * Valid on a faulting VM only, do the MAP operation immediately rather
> + * than differing the MAP to the page fault handler.
> + */
> +#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 18)
> + /*
> + * When the NULL flag is set, the page tables are setup with a special
> + * bit which indicates writes are dropped and all reads return zero. In
> + * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
> + * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
> + * intended to implement VK sparse bindings.
> + */
> +#define XE_VM_BIND_FLAG_NULL (0x1 << 19)
> + /** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits)
> */
> + __u32 op;
> +
> + /** @mem_region: Memory region to prefetch VMA to, instance not a
> mask */
> + __u32 region;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_bind {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @vm_id: The ID of the VM to bind to */
> + __u32 vm_id;
> +
> + /**
> + * @engine_id: engine_id, must be of class
> DRM_XE_ENGINE_CLASS_VM_BIND
> + * and engine must have same vm_id. If zero, the default VM bind engine
> + * is used.
> + */
> + __u32 engine_id;
> +
> + /** @num_binds: number of binds in this IOCTL */
> + __u32 num_binds;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + union {
> + /** @bind: used if num_binds == 1 */
> + struct drm_xe_vm_bind_op bind;
> +
> + /**
> + * @vector_of_binds: userptr to array of struct
> + * drm_xe_vm_bind_op if num_binds > 1
> + */
> + __u64 vector_of_binds;
> + };
> +
> + /** @num_syncs: amount of syncs to wait on */
> + __u32 num_syncs;
> +
> + /** @pad2: MBZ */
> + __u32 pad2;
> +
> + /** @syncs: pointer to struct drm_xe_sync array */
> + __u64 syncs;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/** struct drm_xe_ext_engine_set_property - engine set property
> extension */
> +struct drm_xe_ext_engine_set_property {
> + /** @base: base user extension */
> + struct xe_user_extension base;
> +
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @value: property value */
> + __u64 value;
> +};
> +
> +/**
> + * struct drm_xe_engine_set_property - engine set property
> + *
> + * Same namespace for extensions as drm_xe_engine_create
> + */
> +struct drm_xe_engine_set_property {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @engine_id: Engine ID */
> + __u32 engine_id;
> +
> +#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
> +#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
> +#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
> + /*
> + * Long running or ULLS engine mode. DMA fences not allowed in this
> + * mode. Must match the value of
> DRM_XE_VM_CREATE_COMPUTE_MODE, serves
> + * as a sanity check the UMD knows what it is doing. Can only be set at
> + * engine create time.
> + */
> +#define XE_ENGINE_SET_PROPERTY_COMPUTE_MODE 3
> +#define XE_ENGINE_SET_PROPERTY_PERSISTENCE 4
> +#define XE_ENGINE_SET_PROPERTY_JOB_TIMEOUT 5
> +#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
> +#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
> +#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/** struct drm_xe_engine_class_instance - instance of an engine class */
> +struct drm_xe_engine_class_instance {
> +#define DRM_XE_ENGINE_CLASS_RENDER 0
> +#define DRM_XE_ENGINE_CLASS_COPY 1
> +#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
> +#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
> +#define DRM_XE_ENGINE_CLASS_COMPUTE 4
> + /*
> + * Kernel only class (not actual hardware engine class). Used for
> + * creating ordered queues of VM bind operations.
> + */
> +#define DRM_XE_ENGINE_CLASS_VM_BIND 5
> + __u16 engine_class;
> +
> + __u16 engine_instance;
> + __u16 gt_id;
> +};
> +
> +struct drm_xe_engine_create {
> +#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @width: submission width (number BB per exec) for this engine */
> + __u16 width;
> +
> + /** @num_placements: number of valid placements for this engine */
> + __u16 num_placements;
> +
> + /** @vm_id: VM to use for this engine */
> + __u32 vm_id;
> +
> + /** @flags: MBZ */
> + __u32 flags;
> +
> + /** @engine_id: Returned engine ID */
> + __u32 engine_id;
> +
> + /**
> + * @instances: user pointer to a 2-d array of struct
> + * drm_xe_engine_class_instance
> + *
> + * length = width (i) * num_placements (j)
> + * index = j + i * width
> + */
> + __u64 instances;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_engine_get_property {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @engine_id: Engine ID */
> + __u32 engine_id;
> +
> +#define XE_ENGINE_GET_PROPERTY_BAN 0
> + /** @property: property to get */
> + __u32 property;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_engine_destroy {
> + /** @engine_id: Engine ID */
> + __u32 engine_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_sync {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> +#define DRM_XE_SYNC_SYNCOBJ 0x0
> +#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
> +#define DRM_XE_SYNC_DMA_BUF 0x2
> +#define DRM_XE_SYNC_USER_FENCE 0x3
> +#define DRM_XE_SYNC_SIGNAL 0x10
> + __u32 flags;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + union {
> + __u32 handle;
> +
> + /**
> + * @addr: Address of user fence. When sync passed in via exec
> + * IOCTL this a GPU address in the VM. When sync passed in via
> + * VM bind IOCTL this is a user pointer. In either case, it is
> + * the users responsibility that this address is present and
> + * mapped when the user fence is signalled. Must be qword
> + * aligned.
> + */
> + __u64 addr;
> + };
> +
> + __u64 timeline_value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_exec {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @vm_id: VM ID to run batch buffer in */
> + __u32 engine_id;
> +
> + /** @num_syncs: Amount of struct drm_xe_sync in array. */
> + __u32 num_syncs;
> +
> + /** @syncs: Pointer to struct drm_xe_sync array. */
> + __u64 syncs;
> +
> + /**
> + * @address: address of batch buffer if num_batch_buffer == 1 or an
> + * array of batch buffer addresses
> + */
> + __u64 address;
> +
> + /**
> + * @num_batch_buffer: number of batch buffer in this exec, must match
> + * the width of the engine
> + */
> + __u16 num_batch_buffer;
> +
> + /** @pad: MBZ */
> + __u16 pad[3];
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_mmio {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + __u32 addr;
> +
> +#define DRM_XE_MMIO_8BIT 0x0
> +#define DRM_XE_MMIO_16BIT 0x1
> +#define DRM_XE_MMIO_32BIT 0x2
> +#define DRM_XE_MMIO_64BIT 0x3
> +#define DRM_XE_MMIO_BITS_MASK 0x3
> +#define DRM_XE_MMIO_READ 0x4
> +#define DRM_XE_MMIO_WRITE 0x8
> + __u32 flags;
> +
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +/**
> + * struct drm_xe_wait_user_fence - wait user fence
> + *
> + * Wait on user fence, XE will wakeup on every HW engine interrupt in the
> + * instances list and check if user fence is complete::
> + *
> + * (*addr & MASK) OP (VALUE & MASK)
> + *
> + * Returns to user on user fence completion or timeout.
> + */
> +struct drm_xe_wait_user_fence {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + union {
> + /**
> + * @addr: user pointer address to wait on, must qword aligned
> + */
> + __u64 addr;
> +
> + /**
> + * @vm_id: The ID of the VM which encounter an error used with
> + * DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be
> clear.
> + */
> + __u64 vm_id;
> + };
> +
> +#define DRM_XE_UFENCE_WAIT_EQ 0
> +#define DRM_XE_UFENCE_WAIT_NEQ 1
> +#define DRM_XE_UFENCE_WAIT_GT 2
> +#define DRM_XE_UFENCE_WAIT_GTE 3
> +#define DRM_XE_UFENCE_WAIT_LT 4
> +#define DRM_XE_UFENCE_WAIT_LTE 5
> + /** @op: wait operation (type of comparison) */
> + __u16 op;
> +
> +#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind
> */
> +#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
> +#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
> + /** @flags: wait flags */
> + __u16 flags;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @value: compare value */
> + __u64 value;
> +
> +#define DRM_XE_UFENCE_WAIT_U8 0xffu
> +#define DRM_XE_UFENCE_WAIT_U16 0xffffu
> +#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
> +#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
> + /** @mask: comparison mask */
> + __u64 mask;
> + /**
> + * @timeout: how long to wait before bailing, value in nanoseconds.
> + * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
> + * it contains timeout expressed in nanoseconds to wait (fence will
> + * expire at now() + timeout).
> + * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout)
> wait
> + * will end at timeout (uses system MONOTONIC_CLOCK).
> + * Passing negative timeout leads to neverending wait.
> + *
> + * On relative timeout this value is updated with timeout left
> + * (for restarting the call in case of signal delivery).
> + * On absolute timeout this value stays intact (restarted call still
> + * expire at the same point of time).
> + */
> + __s64 timeout;
> +
> + /**
> + * @num_engines: number of engine instances to wait on, must be zero
> + * when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + */
> + __u64 num_engines;
> +
> + /**
> + * @instances: user pointer to array of drm_xe_engine_class_instance to
> + * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + */
> + __u64 instances;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +struct drm_xe_vm_madvise {
> + /** @extensions: Pointer to the first extension struct, if any */
> + __u64 extensions;
> +
> + /** @vm_id: The ID VM in which the VMA exists */
> + __u32 vm_id;
> +
> + /** @pad: MBZ */
> + __u32 pad;
> +
> + /** @range: Number of bytes in the VMA */
> + __u64 range;
> +
> + /** @addr: Address of the VMA to operation on */
> + __u64 addr;
> +
> + /*
> + * Setting the preferred location will trigger a migrate of the VMA
> + * backing store to new location if the backing store is already
> + * allocated.
> + *
> + * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see
> enum
> + * drm_xe_memory_class.
> + */
> +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
> +#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
> + /*
> + * In this case lower 32 bits are mem class, upper 32 are GT.
> + * Combination provides a single IOCTL plus migrate VMA to preferred
> + * location.
> + */
> +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
> + /*
> + * The CPU will do atomic memory operations to this VMA. Must be set
> on
> + * some devices for atomics to behave correctly.
> + */
> +#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
> + /*
> + * The device will do atomic memory operations to this VMA. Must be set
> + * on some devices for atomics to behave correctly.
> + */
> +#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
> + /*
> + * Priority WRT to eviction (moving from preferred memory location due
> + * to memory pressure). The lower the priority, the more likely to be
> + * evicted.
> + */
Making ATOMIC as a madvise caused some problem. Atomic should be a hard requirement, not a hint, because atomic has correctness implication. Hint/madvise is best effort. Even if we can't meet the requirement of a hint, it won't cause any correctness problem. For example, one some device, when we mark an allocation as DEVICE_ATOMIC, driver will HAVE to guarantee the backing store of the allocation is in device as device can't perform atomic operations to system memory across PCIe on such device.
So we should remove the MADVISE verb from above definition, such as:
+#define DRM_XE_VM_SET_DEVICE_ATOMIC 4
Also, besides CPU_ATOMIC and DEVICE_ATOMIC, we should also define SYSTEM_ATOMIC which means both CPU and device can perform atomics to such allocation. This definition is better aligned with the new L0 specification, see: https://spec.oneapi.io/level-zero/latest/core/api.html#ze__api_8h_1a020717d3d1d0f52f645226b7ffd4552b. The old version of the L0 specification is https://spec.oneapi.io/level-zero/latest/core/api.html#ze-memory-advice-t, which is similar to your definitions above (having the word ADVICE).
HOST_ATOMIC seems a little bit better name than CPU_ATOMIC, to pair with DEVICE_ATOMIC.
Thanks,
Oak
> +#define DRM_XE_VM_MADVISE_PRIORITY 5
> +#define DRM_XE_VMA_PRIORITY_LOW 0
> +#define DRM_XE_VMA_PRIORITY_NORMAL 1 /* Default
> */
> +#define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must
> be elevated user */
> + /* Pin the VMA in memory, must be elevated user */
> +#define DRM_XE_VM_MADVISE_PIN 6
> + /** @property: property to set */
> + __u32 property;
> +
> + /** @pad2: MBZ */
> + __u32 pad2;
> +
> + /** @value: property value */
> + __u64 value;
> +
> + /** @reserved: Reserved */
> + __u64 reserved[2];
> +};
> +
> +#if defined(__cplusplus)
> +}
> +#endif
> +
> +#endif /* _UAPI_XE_DRM_H_ */
> --
> 2.40.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-09-14 1:40 ` Zeng, Oak
@ 2023-09-25 21:42 ` Rodrigo Vivi
2023-09-25 22:07 ` Zeng, Oak
0 siblings, 1 reply; 20+ messages in thread
From: Rodrigo Vivi @ 2023-09-25 21:42 UTC (permalink / raw)
To: Zeng, Oak; +Cc: intel-xe@lists.freedesktop.org, Arteaga Molina, Jaime A
On Thu, Sep 14, 2023 at 01:40:12AM +0000, Zeng, Oak wrote:
> Hi Thomas,
>
> One thing regarding the atomic madvise came up in our recent discussion with L0 team. See inline
>
> > -----Original Message-----
> > From: Welty, Brian <brian.welty@intel.com>
> > Sent: Wednesday, September 13, 2023 8:32 PM
> > To: Zeng, Oak <oak.zeng@intel.com>
> > Subject: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
> >
> >
> >
> >
> > -------- Forwarded Message --------
> > Subject: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
> > Date: Fri, 30 Jun 2023 12:00:59 +0200
> > From: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > To: intel-xe@lists.freedesktop.org
> >
> > Add a copy of xe_drm.h for uAPI review purposes only. Never commit this,
> > the intention is to perform an uAPI review in this thread and if needed
> > move it to Gitlab for easier discussion.
> >
> > Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > ---
> > include/uapi/drm/xe_drm_reviewonly.h | 1009
> > ++++++++++++++++++++++++++
> > 1 file changed, 1009 insertions(+)
> > create mode 100644 include/uapi/drm/xe_drm_reviewonly.h
> >
> > diff --git a/include/uapi/drm/xe_drm_reviewonly.h
> > b/include/uapi/drm/xe_drm_reviewonly.h
> > new file mode 100644
> > index 000000000000..e890b131af91
> > --- /dev/null
> > +++ b/include/uapi/drm/xe_drm_reviewonly.h
> > @@ -0,0 +1,1009 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2023 Intel Corporation
> > + */
> > +
> > +#ifndef _UAPI_XE_DRM_H_
> > +#define _UAPI_XE_DRM_H_
> > +
> > +#include "drm.h"
> > +
> > +#if defined(__cplusplus)
> > +extern "C" {
> > +#endif
> > +
> > +/* Please note that modifications to all structs defined here are
> > + * subject to backwards-compatibility constraints.
> > + */
> > +
> > +/**
> > + * struct xe_user_extension - Base class for defining a chain of extensions
> > + *
> > + * Many interfaces need to grow over time. In most cases we can simply
> > + * extend the struct and have userspace pass in more data. Another option,
> > + * as demonstrated by Vulkan's approach to providing extensions for forward
> > + * and backward compatibility, is to use a list of optional structs to
> > + * provide those extra details.
> > + *
> > + * The key advantage to using an extension chain is that it allows us to
> > + * redefine the interface more easily than an ever growing struct of
> > + * increasing complexity, and for large parts of that interface to be
> > + * entirely optional. The downside is more pointer chasing; chasing across
> > + * the __user boundary with pointers encapsulated inside u64.
> > + *
> > + * Example chaining:
> > + *
> > + * .. code-block:: C
> > + *
> > + * struct xe_user_extension ext3 {
> > + * .next_extension = 0, // end
> > + * .name = ...,
> > + * };
> > + * struct xe_user_extension ext2 {
> > + * .next_extension = (uintptr_t)&ext3,
> > + * .name = ...,
> > + * };
> > + * struct xe_user_extension ext1 {
> > + * .next_extension = (uintptr_t)&ext2,
> > + * .name = ...,
> > + * };
> > + *
> > + * Typically the struct xe_user_extension would be embedded in some uAPI
> > + * struct, and in this case we would feed it the head of the chain(i.e
> > ext1),
> > + * which would then apply all of the above extensions.
> > + *
> > + */
> > +struct xe_user_extension {
> > + /**
> > + * @next_extension:
> > + *
> > + * Pointer to the next struct xe_user_extension, or zero if the end.
> > + */
> > + __u64 next_extension;
> > +
> > + /**
> > + * @name: Name of the extension.
> > + *
> > + * Note that the name here is just some integer.
> > + *
> > + * Also note that the name space for this is not global for the whole
> > + * driver, but rather its scope/meaning is limited to the specific piece
> > + * of uAPI which has embedded the struct xe_user_extension.
> > + */
> > + __u32 name;
> > +
> > + /**
> > + * @pad: MBZ
> > + *
> > + * All undefined bits must be zero.
> > + */
> > + __u32 pad;
> > +};
> > +
> > +/*
> > + * xe specific ioctls.
> > + *
> > + * The device specific ioctl range is [DRM_COMMAND_BASE,
> > DRM_COMMAND_END) ie
> > + * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset
> > + * against DRM_COMMAND_BASE and should be between [0x0, 0x60).
> > + */
> > +#define DRM_XE_DEVICE_QUERY 0x00
> > +#define DRM_XE_GEM_CREATE 0x01
> > +#define DRM_XE_GEM_MMAP_OFFSET 0x02
> > +#define DRM_XE_VM_CREATE 0x03
> > +#define DRM_XE_VM_DESTROY 0x04
> > +#define DRM_XE_VM_BIND 0x05
> > +#define DRM_XE_ENGINE_CREATE 0x06
> > +#define DRM_XE_ENGINE_DESTROY 0x07
> > +#define DRM_XE_EXEC 0x08
> > +#define DRM_XE_MMIO 0x09
> > +#define DRM_XE_ENGINE_SET_PROPERTY 0x0a
> > +#define DRM_XE_WAIT_USER_FENCE 0x0b
> > +#define DRM_XE_VM_MADVISE 0x0c
> > +#define DRM_XE_ENGINE_GET_PROPERTY 0x0d
> > +
> > +/* Must be kept compact -- no holes */
> > +#define DRM_IOCTL_XE_DEVICE_QUERY
> > DRM_IOWR(DRM_COMMAND_BASE +
> > DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
> > +#define DRM_IOCTL_XE_GEM_CREATE
> > DRM_IOWR(DRM_COMMAND_BASE +
> > DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
> > +#define DRM_IOCTL_XE_GEM_MMAP_OFFSET
> > DRM_IOWR(DRM_COMMAND_BASE +
> > DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
> > +#define DRM_IOCTL_XE_VM_CREATE
> > DRM_IOWR(DRM_COMMAND_BASE +
> > DRM_XE_VM_CREATE, struct drm_xe_vm_create)
> > +#define DRM_IOCTL_XE_VM_DESTROY
> > DRM_IOW(DRM_COMMAND_BASE +
> > DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
> > +#define DRM_IOCTL_XE_VM_BIND
> > DRM_IOW(DRM_COMMAND_BASE +
> > DRM_XE_VM_BIND, struct drm_xe_vm_bind)
> > +#define DRM_IOCTL_XE_ENGINE_CREATE
> > DRM_IOWR(DRM_COMMAND_BASE +
> > DRM_XE_ENGINE_CREATE, struct drm_xe_engine_create)
> > +#define DRM_IOCTL_XE_ENGINE_GET_PROPERTY
> > DRM_IOWR(DRM_COMMAND_BASE +
> > DRM_XE_ENGINE_GET_PROPERTY, struct drm_xe_engine_get_property)
> > +#define DRM_IOCTL_XE_ENGINE_DESTROY
> > DRM_IOW(DRM_COMMAND_BASE +
> > DRM_XE_ENGINE_DESTROY, struct drm_xe_engine_destroy)
> > +#define DRM_IOCTL_XE_EXEC
> > DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC,
> > struct drm_xe_exec)
> > +#define DRM_IOCTL_XE_MMIO
> > DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_MMIO,
> > struct drm_xe_mmio)
> > +#define DRM_IOCTL_XE_ENGINE_SET_PROPERTY
> > DRM_IOW(DRM_COMMAND_BASE +
> > DRM_XE_ENGINE_SET_PROPERTY, struct drm_xe_engine_set_property)
> > +#define DRM_IOCTL_XE_WAIT_USER_FENCE
> > DRM_IOWR(DRM_COMMAND_BASE +
> > DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
> > +#define DRM_IOCTL_XE_VM_MADVISE
> > DRM_IOW(DRM_COMMAND_BASE +
> > DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
> > +
> > +/**
> > + * enum drm_xe_memory_class - Supported memory classes.
> > + */
> > +enum drm_xe_memory_class {
> > + /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory.
> > */
> > + XE_MEM_REGION_CLASS_SYSMEM = 0,
> > + /**
> > + * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
> > + * represents the memory that is local to the device, which we
> > + * call VRAM. Not valid on integrated platforms.
> > + */
> > + XE_MEM_REGION_CLASS_VRAM
> > +};
> > +
> > +/**
> > + * struct drm_xe_query_mem_region - Describes some region as known to
> > + * the driver.
> > + */
> > +struct drm_xe_query_mem_region {
> > + /**
> > + * @mem_class: The memory class describing this region.
> > + *
> > + * See enum drm_xe_memory_class for supported values.
> > + */
> > + __u16 mem_class;
> > + /**
> > + * @instance: The instance for this region.
> > + *
> > + * The @mem_class and @instance taken together will always give
> > + * a unique pair.
> > + */
> > + __u16 instance;
> > + /** @pad: MBZ */
> > + __u32 pad;
> > + /**
> > + * @min_page_size: Min page-size in bytes for this region.
> > + *
> > + * When the kernel allocates memory for this region, the
> > + * underlying pages will be at least @min_page_size in size.
> > + *
> > + * Important note: When userspace allocates a GTT address which
> > + * can point to memory allocated from this region, it must also
> > + * respect this minimum alignment. This is enforced by the
> > + * kernel.
> > + */
> > + __u32 min_page_size;
> > + /**
> > + * @max_page_size: Max page-size in bytes for this region.
> > + */
> > + __u32 max_page_size;
> > + /**
> > + * @total_size: The usable size in bytes for this region.
> > + */
> > + __u64 total_size;
> > + /**
> > + * @used: Estimate of the memory used in bytes for this region.
> > + *
> > + * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
> > + * accounting. Without this the value here will always equal
> > + * zero.
> > + */
> > + __u64 used;
> > + /** @reserved: MBZ */
> > + __u64 reserved[8];
> > +};
> > +
> > +/**
> > + * struct drm_xe_query_mem_usage - describe memory regions and usage
> > + *
> > + * If a query is made with a struct drm_xe_device_query where .query
> > + * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
> > + * struct drm_xe_query_mem_usage in .data.
> > + */
> > +struct drm_xe_query_mem_usage {
> > + /** @num_regions: number of memory regions returned in @regions */
> > + __u32 num_regions;
> > + /** @pad: MBZ */
> > + __u32 pad;
> > + /** @regions: The returned regions for this device */
> > + struct drm_xe_query_mem_region regions[];
> > +};
> > +
> > +/**
> > + * struct drm_xe_query_config - describe the device configuration
> > + *
> > + * If a query is made with a struct drm_xe_device_query where .query
> > + * is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
> > + * struct drm_xe_query_config in .data.
> > + */
> > +struct drm_xe_query_config {
> > + /** @num_params: number of parameters returned in info */
> > + __u32 num_params;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > +#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
> > +#define XE_QUERY_CONFIG_FLAGS 1
> > + #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
> > + #define XE_QUERY_CONFIG_FLAGS_USE_GUC (0x1 << 1)
> > +#define XE_QUERY_CONFIG_MIN_ALIGNEMENT 2
> > +#define XE_QUERY_CONFIG_VA_BITS 3
> > +#define XE_QUERY_CONFIG_GT_COUNT 4
> > +#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> > +#define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
> > +#define XE_QUERY_CONFIG_NUM_PARAM
> > (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY
> > + 1)
> > + /** @info: array of elements containing the config info */
> > + __u64 info[];
> > +};
> > +
> > +/**
> > + * struct drm_xe_query_gts - describe GTs
> > + *
> > + * If a query is made with a struct drm_xe_device_query where .query
> > + * is equal to DRM_XE_DEVICE_QUERY_GTS, then the reply uses struct
> > + * drm_xe_query_gts in .data.
> > + */
> > +struct drm_xe_query_gts {
> > + /** @num_gt: number of GTs returned in gts */
> > + __u32 num_gt;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + /**
> > + * @gts: The GTs returned for this device
> > + *
> > + * TODO: convert drm_xe_query_gt to proper kernel-doc.
> > + * TODO: Perhaps info about every mem region relative to this GT? e.g.
> > + * bandwidth between this GT and remote region?
> > + */
> > + struct drm_xe_query_gt {
> > +#define XE_QUERY_GT_TYPE_MAIN 0
> > +#define XE_QUERY_GT_TYPE_REMOTE 1
> > +#define XE_QUERY_GT_TYPE_MEDIA 2
> > + __u16 type;
> > + __u16 instance;
> > + __u32 clock_freq;
> > + __u64 features;
> > + __u64 native_mem_regions; /* bit mask of instances from
> > drm_xe_query_mem_usage */
> > + __u64 slow_mem_regions; /* bit mask of instances
> > from
> > drm_xe_query_mem_usage */
> > + __u64 inaccessible_mem_regions; /* bit mask of instances
> > from
> > drm_xe_query_mem_usage */
> > + __u64 reserved[8];
> > + } gts[];
> > +};
> > +
> > +/**
> > + * struct drm_xe_query_topology_mask - describe the topology mask of a GT
> > + *
> > + * This is the hardware topology which reflects the internal physical
> > + * structure of the GPU.
> > + *
> > + * If a query is made with a struct drm_xe_device_query where .query
> > + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
> > + * struct drm_xe_query_topology_mask in .data.
> > + */
> > +struct drm_xe_query_topology_mask {
> > + /** @gt_id: GT ID the mask is associated with */
> > + __u16 gt_id;
> > +
> > + /*
> > + * To query the mask of Dual Sub Slices (DSS) available for geometry
> > + * operations. For example a query response containing the following
> > + * in mask:
> > + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> > + * means 32 DSS are available for geometry.
> > + */
> > +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> > + /*
> > + * To query the mask of Dual Sub Slices (DSS) available for compute
> > + * operations. For example a query response containing the following
> > + * in mask:
> > + * DSS_COMPUTE ff ff ff ff 00 00 00 00
> > + * means 32 DSS are available for compute.
> > + */
> > +#define XE_TOPO_DSS_COMPUTE (1 << 1)
> > + /*
> > + * To query the mask of Execution Units (EU) available per Dual Sub
> > + * Slices (DSS). For example a query response containing the following
> > + * in mask:
> > + * EU_PER_DSS ff ff 00 00 00 00 00 00
> > + * means each DSS has 16 EU.
> > + */
> > +#define XE_TOPO_EU_PER_DSS (1 << 2)
> > + /** @type: type of mask */
> > + __u16 type;
> > +
> > + /** @num_bytes: number of bytes in requested mask */
> > + __u32 num_bytes;
> > +
> > + /** @mask: little-endian mask of @num_bytes */
> > + __u8 mask[];
> > +};
> > +
> > +/**
> > + * struct drm_xe_device_query - main structure to query device information
> > + *
> > + * If size is set to 0, the driver fills it with the required size for the
> > + * requested type of data to query. If size is equal to the required size,
> > + * the queried information is copied into data.
> > + *
> > + * For example the following code snippet allows retrieving and printing
> > + * information about the device engines with
> > DRM_XE_DEVICE_QUERY_ENGINES:
> > + *
> > + * .. code-block:: C
> > + *
> > + * struct drm_xe_engine_class_instance *hwe;
> > + * struct drm_xe_device_query query = {
> > + * .extensions = 0,
> > + * .query = DRM_XE_DEVICE_QUERY_ENGINES,
> > + * .size = 0,
> > + * .data = 0,
> > + * };
> > + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> > + * hwe = malloc(query.size);
> > + * query.data = (uintptr_t)hwe;
> > + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> > + * int num_engines = query.size / sizeof(*hwe);
> > + * for (int i = 0; i < num_engines; i++) {
> > + * printf("Engine %d: %s\n", i,
> > + * hwe[i].engine_class ==
> > DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
> > + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COPY ?
> > "COPY":
> > + * hwe[i].engine_class ==
> > DRM_XE_ENGINE_CLASS_VIDEO_DECODE ?
> > "VIDEO_DECODE":
> > + * hwe[i].engine_class ==
> > DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ?
> > "VIDEO_ENHANCE":
> > + * hwe[i].engine_class ==
> > DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
> > + * "UNKNOWN");
> > + * }
> > + * free(hwe);
> > + */
> > +struct drm_xe_device_query {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > +#define DRM_XE_DEVICE_QUERY_ENGINES 0
> > +#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
> > +#define DRM_XE_DEVICE_QUERY_CONFIG 2
> > +#define DRM_XE_DEVICE_QUERY_GTS 3
> > +#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> > +#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> > + /** @query: The type of data to query */
> > + __u32 query;
> > +
> > + /** @size: Size of the queried data */
> > + __u32 size;
> > +
> > + /** @data: Queried data is placed here */
> > + __u64 data;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_gem_create {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + /**
> > + * @size: Requested size for the object
> > + *
> > + * The (page-aligned) allocated size for the object will be returned.
> > + */
> > + __u64 size;
> > +
> > +#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> > +#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
> > + /**
> > + * @flags: Flags, currently a mask of memory instances of where BO can
> > + * be placed
> > + */
> > + __u32 flags;
> > +
> > + /**
> > + * @vm_id: Attached VM, if any
> > + *
> > + * If a VM is specified, this BO must:
> > + *
> > + * 1. Only ever be bound to that VM.
> > + *
> > + * 2. Cannot be exported as a PRIME fd.
> > + */
> > + __u32 vm_id;
> > +
> > + /**
> > + * @handle: Returned handle for the object.
> > + *
> > + * Object handles are nonzero.
> > + */
> > + __u32 handle;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_gem_mmap_offset {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + /** @handle: Handle for the object being mapped. */
> > + __u32 handle;
> > +
> > + /** @flags: Must be zero */
> > + __u32 flags;
> > +
> > + /** @offset: The fake offset to use for subsequent mmap call */
> > + __u64 offset;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +/**
> > + * struct drm_xe_vm_bind_op_error_capture - format of VM bind op error
> > capture
> > + */
> > +struct drm_xe_vm_bind_op_error_capture {
> > + /** @error: errno that occured */
> > + __s32 error;
> > +
> > + /** @op: operation that encounter an error */
> > + __u32 op;
> > +
> > + /** @addr: address of bind op */
> > + __u64 addr;
> > +
> > + /** @size: size of bind */
> > + __u64 size;
> > +};
> > +
> > +/** struct drm_xe_ext_vm_set_property - VM set property extension */
> > +struct drm_xe_ext_vm_set_property {
> > + /** @base: base user extension */
> > + struct xe_user_extension base;
> > +
> > +#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS 0
> > + /** @property: property to set */
> > + __u32 property;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + /** @value: property value */
> > + __u64 value;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_vm_create {
> > +#define XE_VM_EXTENSION_SET_PROPERTY 0
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > +#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> > +#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
> > +#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
> > +#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> > + /** @flags: Flags */
> > + __u32 flags;
> > +
> > + /** @vm_id: Returned VM ID */
> > + __u32 vm_id;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_vm_destroy {
> > + /** @vm_id: VM ID */
> > + __u32 vm_id;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_vm_bind_op {
> > + /**
> > + * @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for
> > UNMAP
> > + */
> > + __u32 obj;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + union {
> > + /**
> > + * @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
> > + * ignored for unbind
> > + */
> > + __u64 obj_offset;
> > +
> > + /** @userptr: user pointer to bind on */
> > + __u64 userptr;
> > + };
> > +
> > + /**
> > + * @range: Number of bytes from the object to bind to addr, MBZ for
> > UNMAP_ALL
> > + */
> > + __u64 range;
> > +
> > + /** @addr: Address to operate on, MBZ for UNMAP_ALL */
> > + __u64 addr;
> > +
> > + /**
> > + * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
> > + * only applies to creating new VMAs
> > + */
> > + __u64 tile_mask;
> > +
> > +#define XE_VM_BIND_OP_MAP 0x0
> > +#define XE_VM_BIND_OP_UNMAP 0x1
> > +#define XE_VM_BIND_OP_MAP_USERPTR 0x2
> > +#define XE_VM_BIND_OP_RESTART 0x3
> > +#define XE_VM_BIND_OP_UNMAP_ALL 0x4
> > +#define XE_VM_BIND_OP_PREFETCH 0x5
> > +
> > +#define XE_VM_BIND_FLAG_READONLY (0x1 << 16)
> > + /*
> > + * A bind ops completions are always async, hence the support for out
> > + * sync. This flag indicates the allocation of the memory for new page
> > + * tables and the job to program the pages tables is asynchronous
> > + * relative to the IOCTL. That part of a bind operation can fail under
> > + * memory pressure, the job in practice can't fail unless the system is
> > + * totally shot.
> > + *
> > + * If this flag is clear and the IOCTL doesn't return an error, in
> > + * practice the bind op is good and will complete.
> > + *
> > + * If this flag is set and doesn't return an error, the bind op can
> > + * still fail and recovery is needed. If configured, the bind op that
> > + * caused the error will be captured in
> > drm_xe_vm_bind_op_error_capture.
> > + * Once the user sees the error (via a ufence +
> > + * XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS), it should
> > free memory
> > + * via non-async unbinds, and then restart all queue'd async binds op via
> > + * XE_VM_BIND_OP_RESTART. Or alternatively the user should destroy
> > the
> > + * VM.
> > + *
> > + * This flag is only allowed when
> > DRM_XE_VM_CREATE_ASYNC_BIND_OPS is
> > + * configured in the VM and must be set if the VM is configured with
> > + * DRM_XE_VM_CREATE_ASYNC_BIND_OPS and not in an error state.
> > + */
> > +#define XE_VM_BIND_FLAG_ASYNC (0x1 << 17)
> > + /*
> > + * Valid on a faulting VM only, do the MAP operation immediately rather
> > + * than differing the MAP to the page fault handler.
> > + */
> > +#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 18)
> > + /*
> > + * When the NULL flag is set, the page tables are setup with a special
> > + * bit which indicates writes are dropped and all reads return zero. In
> > + * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
> > + * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
> > + * intended to implement VK sparse bindings.
> > + */
> > +#define XE_VM_BIND_FLAG_NULL (0x1 << 19)
> > + /** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits)
> > */
> > + __u32 op;
> > +
> > + /** @mem_region: Memory region to prefetch VMA to, instance not a
> > mask */
> > + __u32 region;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_vm_bind {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + /** @vm_id: The ID of the VM to bind to */
> > + __u32 vm_id;
> > +
> > + /**
> > + * @engine_id: engine_id, must be of class
> > DRM_XE_ENGINE_CLASS_VM_BIND
> > + * and engine must have same vm_id. If zero, the default VM bind engine
> > + * is used.
> > + */
> > + __u32 engine_id;
> > +
> > + /** @num_binds: number of binds in this IOCTL */
> > + __u32 num_binds;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + union {
> > + /** @bind: used if num_binds == 1 */
> > + struct drm_xe_vm_bind_op bind;
> > +
> > + /**
> > + * @vector_of_binds: userptr to array of struct
> > + * drm_xe_vm_bind_op if num_binds > 1
> > + */
> > + __u64 vector_of_binds;
> > + };
> > +
> > + /** @num_syncs: amount of syncs to wait on */
> > + __u32 num_syncs;
> > +
> > + /** @pad2: MBZ */
> > + __u32 pad2;
> > +
> > + /** @syncs: pointer to struct drm_xe_sync array */
> > + __u64 syncs;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +/** struct drm_xe_ext_engine_set_property - engine set property
> > extension */
> > +struct drm_xe_ext_engine_set_property {
> > + /** @base: base user extension */
> > + struct xe_user_extension base;
> > +
> > + /** @property: property to set */
> > + __u32 property;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + /** @value: property value */
> > + __u64 value;
> > +};
> > +
> > +/**
> > + * struct drm_xe_engine_set_property - engine set property
> > + *
> > + * Same namespace for extensions as drm_xe_engine_create
> > + */
> > +struct drm_xe_engine_set_property {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + /** @engine_id: Engine ID */
> > + __u32 engine_id;
> > +
> > +#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
> > +#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
> > +#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
> > + /*
> > + * Long running or ULLS engine mode. DMA fences not allowed in this
> > + * mode. Must match the value of
> > DRM_XE_VM_CREATE_COMPUTE_MODE, serves
> > + * as a sanity check the UMD knows what it is doing. Can only be set at
> > + * engine create time.
> > + */
> > +#define XE_ENGINE_SET_PROPERTY_COMPUTE_MODE 3
> > +#define XE_ENGINE_SET_PROPERTY_PERSISTENCE 4
> > +#define XE_ENGINE_SET_PROPERTY_JOB_TIMEOUT 5
> > +#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
> > +#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
> > +#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
> > + /** @property: property to set */
> > + __u32 property;
> > +
> > + /** @value: property value */
> > + __u64 value;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +/** struct drm_xe_engine_class_instance - instance of an engine class */
> > +struct drm_xe_engine_class_instance {
> > +#define DRM_XE_ENGINE_CLASS_RENDER 0
> > +#define DRM_XE_ENGINE_CLASS_COPY 1
> > +#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
> > +#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
> > +#define DRM_XE_ENGINE_CLASS_COMPUTE 4
> > + /*
> > + * Kernel only class (not actual hardware engine class). Used for
> > + * creating ordered queues of VM bind operations.
> > + */
> > +#define DRM_XE_ENGINE_CLASS_VM_BIND 5
> > + __u16 engine_class;
> > +
> > + __u16 engine_instance;
> > + __u16 gt_id;
> > +};
> > +
> > +struct drm_xe_engine_create {
> > +#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + /** @width: submission width (number BB per exec) for this engine */
> > + __u16 width;
> > +
> > + /** @num_placements: number of valid placements for this engine */
> > + __u16 num_placements;
> > +
> > + /** @vm_id: VM to use for this engine */
> > + __u32 vm_id;
> > +
> > + /** @flags: MBZ */
> > + __u32 flags;
> > +
> > + /** @engine_id: Returned engine ID */
> > + __u32 engine_id;
> > +
> > + /**
> > + * @instances: user pointer to a 2-d array of struct
> > + * drm_xe_engine_class_instance
> > + *
> > + * length = width (i) * num_placements (j)
> > + * index = j + i * width
> > + */
> > + __u64 instances;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_engine_get_property {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + /** @engine_id: Engine ID */
> > + __u32 engine_id;
> > +
> > +#define XE_ENGINE_GET_PROPERTY_BAN 0
> > + /** @property: property to get */
> > + __u32 property;
> > +
> > + /** @value: property value */
> > + __u64 value;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_engine_destroy {
> > + /** @engine_id: Engine ID */
> > + __u32 engine_id;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_sync {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > +#define DRM_XE_SYNC_SYNCOBJ 0x0
> > +#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
> > +#define DRM_XE_SYNC_DMA_BUF 0x2
> > +#define DRM_XE_SYNC_USER_FENCE 0x3
> > +#define DRM_XE_SYNC_SIGNAL 0x10
> > + __u32 flags;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + union {
> > + __u32 handle;
> > +
> > + /**
> > + * @addr: Address of user fence. When sync passed in via exec
> > + * IOCTL this a GPU address in the VM. When sync passed in via
> > + * VM bind IOCTL this is a user pointer. In either case, it is
> > + * the users responsibility that this address is present and
> > + * mapped when the user fence is signalled. Must be qword
> > + * aligned.
> > + */
> > + __u64 addr;
> > + };
> > +
> > + __u64 timeline_value;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_exec {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + /** @vm_id: VM ID to run batch buffer in */
> > + __u32 engine_id;
> > +
> > + /** @num_syncs: Amount of struct drm_xe_sync in array. */
> > + __u32 num_syncs;
> > +
> > + /** @syncs: Pointer to struct drm_xe_sync array. */
> > + __u64 syncs;
> > +
> > + /**
> > + * @address: address of batch buffer if num_batch_buffer == 1 or an
> > + * array of batch buffer addresses
> > + */
> > + __u64 address;
> > +
> > + /**
> > + * @num_batch_buffer: number of batch buffer in this exec, must match
> > + * the width of the engine
> > + */
> > + __u16 num_batch_buffer;
> > +
> > + /** @pad: MBZ */
> > + __u16 pad[3];
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_mmio {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + __u32 addr;
> > +
> > +#define DRM_XE_MMIO_8BIT 0x0
> > +#define DRM_XE_MMIO_16BIT 0x1
> > +#define DRM_XE_MMIO_32BIT 0x2
> > +#define DRM_XE_MMIO_64BIT 0x3
> > +#define DRM_XE_MMIO_BITS_MASK 0x3
> > +#define DRM_XE_MMIO_READ 0x4
> > +#define DRM_XE_MMIO_WRITE 0x8
> > + __u32 flags;
> > +
> > + __u64 value;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +/**
> > + * struct drm_xe_wait_user_fence - wait user fence
> > + *
> > + * Wait on user fence, XE will wakeup on every HW engine interrupt in the
> > + * instances list and check if user fence is complete::
> > + *
> > + * (*addr & MASK) OP (VALUE & MASK)
> > + *
> > + * Returns to user on user fence completion or timeout.
> > + */
> > +struct drm_xe_wait_user_fence {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + union {
> > + /**
> > + * @addr: user pointer address to wait on, must qword aligned
> > + */
> > + __u64 addr;
> > +
> > + /**
> > + * @vm_id: The ID of the VM which encounter an error used with
> > + * DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be
> > clear.
> > + */
> > + __u64 vm_id;
> > + };
> > +
> > +#define DRM_XE_UFENCE_WAIT_EQ 0
> > +#define DRM_XE_UFENCE_WAIT_NEQ 1
> > +#define DRM_XE_UFENCE_WAIT_GT 2
> > +#define DRM_XE_UFENCE_WAIT_GTE 3
> > +#define DRM_XE_UFENCE_WAIT_LT 4
> > +#define DRM_XE_UFENCE_WAIT_LTE 5
> > + /** @op: wait operation (type of comparison) */
> > + __u16 op;
> > +
> > +#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind
> > */
> > +#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
> > +#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
> > + /** @flags: wait flags */
> > + __u16 flags;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + /** @value: compare value */
> > + __u64 value;
> > +
> > +#define DRM_XE_UFENCE_WAIT_U8 0xffu
> > +#define DRM_XE_UFENCE_WAIT_U16 0xffffu
> > +#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
> > +#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
> > + /** @mask: comparison mask */
> > + __u64 mask;
> > + /**
> > + * @timeout: how long to wait before bailing, value in nanoseconds.
> > + * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
> > + * it contains timeout expressed in nanoseconds to wait (fence will
> > + * expire at now() + timeout).
> > + * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout)
> > wait
> > + * will end at timeout (uses system MONOTONIC_CLOCK).
> > + * Passing negative timeout leads to neverending wait.
> > + *
> > + * On relative timeout this value is updated with timeout left
> > + * (for restarting the call in case of signal delivery).
> > + * On absolute timeout this value stays intact (restarted call still
> > + * expire at the same point of time).
> > + */
> > + __s64 timeout;
> > +
> > + /**
> > + * @num_engines: number of engine instances to wait on, must be zero
> > + * when DRM_XE_UFENCE_WAIT_SOFT_OP set
> > + */
> > + __u64 num_engines;
> > +
> > + /**
> > + * @instances: user pointer to array of drm_xe_engine_class_instance to
> > + * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
> > + */
> > + __u64 instances;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +struct drm_xe_vm_madvise {
> > + /** @extensions: Pointer to the first extension struct, if any */
> > + __u64 extensions;
> > +
> > + /** @vm_id: The ID VM in which the VMA exists */
> > + __u32 vm_id;
> > +
> > + /** @pad: MBZ */
> > + __u32 pad;
> > +
> > + /** @range: Number of bytes in the VMA */
> > + __u64 range;
> > +
> > + /** @addr: Address of the VMA to operation on */
> > + __u64 addr;
> > +
> > + /*
> > + * Setting the preferred location will trigger a migrate of the VMA
> > + * backing store to new location if the backing store is already
> > + * allocated.
> > + *
> > + * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see
> > enum
> > + * drm_xe_memory_class.
> > + */
> > +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
> > +#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
> > + /*
> > + * In this case lower 32 bits are mem class, upper 32 are GT.
> > + * Combination provides a single IOCTL plus migrate VMA to preferred
> > + * location.
> > + */
> > +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
> > + /*
> > + * The CPU will do atomic memory operations to this VMA. Must be set
> > on
> > + * some devices for atomics to behave correctly.
> > + */
> > +#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
> > + /*
> > + * The device will do atomic memory operations to this VMA. Must be set
> > + * on some devices for atomics to behave correctly.
> > + */
> > +#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
> > + /*
> > + * Priority WRT to eviction (moving from preferred memory location due
> > + * to memory pressure). The lower the priority, the more likely to be
> > + * evicted.
> > + */
Hi Oak,
Thanks for your reviews and comments here...
>
> Making ATOMIC as a madvise caused some problem. Atomic should be a hard requirement, not a hint, because atomic has correctness implication. Hint/madvise is best effort. Even if we can't meet the requirement of a hint, it won't cause any correctness problem. For example, one some device, when we mark an allocation as DEVICE_ATOMIC, driver will HAVE to guarantee the backing store of the allocation is in device as device can't perform atomic operations to system memory across PCIe on such device.
>
> So we should remove the MADVISE verb from above definition, such as:
>
> +#define DRM_XE_VM_SET_DEVICE_ATOMIC 4
I don't quite get this suggestion since this doesn't align
with the madvise_func call. So, should we kill that function
and make this a VM property? in such case, what would this
property do?
>
> Also, besides CPU_ATOMIC and DEVICE_ATOMIC, we should also define SYSTEM_ATOMIC which means both CPU and device can perform atomics to such allocation. This definition is better aligned with the new L0 specification, see: https://spec.oneapi.io/level-zero/latest/core/api.html#ze__api_8h_1a020717d3d1d0f52f645226b7ffd4552b. The old version of the L0 specification is https://spec.oneapi.io/level-zero/latest/core/api.html#ze-memory-advice-t, which is similar to your definitions above (having the word ADVICE).
>
> HOST_ATOMIC seems a little bit better name than CPU_ATOMIC, to pair with DEVICE_ATOMIC.
Could you please open up on your proposal for the proper alignment?
I just created https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/739
so we don't lose track of it.
Thanks,
Rodrigo.
>
> Thanks,
> Oak
>
> > +#define DRM_XE_VM_MADVISE_PRIORITY 5
> > +#define DRM_XE_VMA_PRIORITY_LOW 0
> > +#define DRM_XE_VMA_PRIORITY_NORMAL 1 /* Default
> > */
> > +#define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must
> > be elevated user */
> > + /* Pin the VMA in memory, must be elevated user */
> > +#define DRM_XE_VM_MADVISE_PIN 6
> > + /** @property: property to set */
> > + __u32 property;
> > +
> > + /** @pad2: MBZ */
> > + __u32 pad2;
> > +
> > + /** @value: property value */
> > + __u64 value;
> > +
> > + /** @reserved: Reserved */
> > + __u64 reserved[2];
> > +};
> > +
> > +#if defined(__cplusplus)
> > +}
> > +#endif
> > +
> > +#endif /* _UAPI_XE_DRM_H_ */
> > --
> > 2.40.1
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
2023-09-25 21:42 ` Rodrigo Vivi
@ 2023-09-25 22:07 ` Zeng, Oak
0 siblings, 0 replies; 20+ messages in thread
From: Zeng, Oak @ 2023-09-25 22:07 UTC (permalink / raw)
To: Vivi, Rodrigo; +Cc: intel-xe@lists.freedesktop.org, Arteaga Molina, Jaime A
Thanks,
Oak
> -----Original Message-----
> From: Vivi, Rodrigo <rodrigo.vivi@intel.com>
> Sent: Monday, September 25, 2023 5:42 PM
> To: Zeng, Oak <oak.zeng@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>; intel-
> xe@lists.freedesktop.org; Arteaga Molina, Jaime A
> <jaime.a.arteaga.molina@intel.com>
> Subject: Re: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
>
> On Thu, Sep 14, 2023 at 01:40:12AM +0000, Zeng, Oak wrote:
> > Hi Thomas,
> >
> > One thing regarding the atomic madvise came up in our recent discussion with
> L0 team. See inline
> >
> > > -----Original Message-----
> > > From: Welty, Brian <brian.welty@intel.com>
> > > Sent: Wednesday, September 13, 2023 8:32 PM
> > > To: Zeng, Oak <oak.zeng@intel.com>
> > > Subject: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
> > >
> > >
> > >
> > >
> > > -------- Forwarded Message --------
> > > Subject: [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission
> > > Date: Fri, 30 Jun 2023 12:00:59 +0200
> > > From: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > > To: intel-xe@lists.freedesktop.org
> > >
> > > Add a copy of xe_drm.h for uAPI review purposes only. Never commit this,
> > > the intention is to perform an uAPI review in this thread and if needed
> > > move it to Gitlab for easier discussion.
> > >
> > > Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > > ---
> > > include/uapi/drm/xe_drm_reviewonly.h | 1009
> > > ++++++++++++++++++++++++++
> > > 1 file changed, 1009 insertions(+)
> > > create mode 100644 include/uapi/drm/xe_drm_reviewonly.h
> > >
> > > diff --git a/include/uapi/drm/xe_drm_reviewonly.h
> > > b/include/uapi/drm/xe_drm_reviewonly.h
> > > new file mode 100644
> > > index 000000000000..e890b131af91
> > > --- /dev/null
> > > +++ b/include/uapi/drm/xe_drm_reviewonly.h
> > > @@ -0,0 +1,1009 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright © 2023 Intel Corporation
> > > + */
> > > +
> > > +#ifndef _UAPI_XE_DRM_H_
> > > +#define _UAPI_XE_DRM_H_
> > > +
> > > +#include "drm.h"
> > > +
> > > +#if defined(__cplusplus)
> > > +extern "C" {
> > > +#endif
> > > +
> > > +/* Please note that modifications to all structs defined here are
> > > + * subject to backwards-compatibility constraints.
> > > + */
> > > +
> > > +/**
> > > + * struct xe_user_extension - Base class for defining a chain of extensions
> > > + *
> > > + * Many interfaces need to grow over time. In most cases we can simply
> > > + * extend the struct and have userspace pass in more data. Another option,
> > > + * as demonstrated by Vulkan's approach to providing extensions for
> forward
> > > + * and backward compatibility, is to use a list of optional structs to
> > > + * provide those extra details.
> > > + *
> > > + * The key advantage to using an extension chain is that it allows us to
> > > + * redefine the interface more easily than an ever growing struct of
> > > + * increasing complexity, and for large parts of that interface to be
> > > + * entirely optional. The downside is more pointer chasing; chasing across
> > > + * the __user boundary with pointers encapsulated inside u64.
> > > + *
> > > + * Example chaining:
> > > + *
> > > + * .. code-block:: C
> > > + *
> > > + * struct xe_user_extension ext3 {
> > > + * .next_extension = 0, // end
> > > + * .name = ...,
> > > + * };
> > > + * struct xe_user_extension ext2 {
> > > + * .next_extension = (uintptr_t)&ext3,
> > > + * .name = ...,
> > > + * };
> > > + * struct xe_user_extension ext1 {
> > > + * .next_extension = (uintptr_t)&ext2,
> > > + * .name = ...,
> > > + * };
> > > + *
> > > + * Typically the struct xe_user_extension would be embedded in some uAPI
> > > + * struct, and in this case we would feed it the head of the chain(i.e
> > > ext1),
> > > + * which would then apply all of the above extensions.
> > > + *
> > > + */
> > > +struct xe_user_extension {
> > > + /**
> > > + * @next_extension:
> > > + *
> > > + * Pointer to the next struct xe_user_extension, or zero if the end.
> > > + */
> > > + __u64 next_extension;
> > > +
> > > + /**
> > > + * @name: Name of the extension.
> > > + *
> > > + * Note that the name here is just some integer.
> > > + *
> > > + * Also note that the name space for this is not global for the whole
> > > + * driver, but rather its scope/meaning is limited to the specific piece
> > > + * of uAPI which has embedded the struct xe_user_extension.
> > > + */
> > > + __u32 name;
> > > +
> > > + /**
> > > + * @pad: MBZ
> > > + *
> > > + * All undefined bits must be zero.
> > > + */
> > > + __u32 pad;
> > > +};
> > > +
> > > +/*
> > > + * xe specific ioctls.
> > > + *
> > > + * The device specific ioctl range is [DRM_COMMAND_BASE,
> > > DRM_COMMAND_END) ie
> > > + * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset
> > > + * against DRM_COMMAND_BASE and should be between [0x0, 0x60).
> > > + */
> > > +#define DRM_XE_DEVICE_QUERY 0x00
> > > +#define DRM_XE_GEM_CREATE 0x01
> > > +#define DRM_XE_GEM_MMAP_OFFSET 0x02
> > > +#define DRM_XE_VM_CREATE 0x03
> > > +#define DRM_XE_VM_DESTROY 0x04
> > > +#define DRM_XE_VM_BIND 0x05
> > > +#define DRM_XE_ENGINE_CREATE 0x06
> > > +#define DRM_XE_ENGINE_DESTROY 0x07
> > > +#define DRM_XE_EXEC 0x08
> > > +#define DRM_XE_MMIO 0x09
> > > +#define DRM_XE_ENGINE_SET_PROPERTY 0x0a
> > > +#define DRM_XE_WAIT_USER_FENCE 0x0b
> > > +#define DRM_XE_VM_MADVISE 0x0c
> > > +#define DRM_XE_ENGINE_GET_PROPERTY 0x0d
> > > +
> > > +/* Must be kept compact -- no holes */
> > > +#define DRM_IOCTL_XE_DEVICE_QUERY
> > > DRM_IOWR(DRM_COMMAND_BASE +
> > > DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
> > > +#define DRM_IOCTL_XE_GEM_CREATE
> > > DRM_IOWR(DRM_COMMAND_BASE +
> > > DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
> > > +#define DRM_IOCTL_XE_GEM_MMAP_OFFSET
> > > DRM_IOWR(DRM_COMMAND_BASE +
> > > DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
> > > +#define DRM_IOCTL_XE_VM_CREATE
> > > DRM_IOWR(DRM_COMMAND_BASE +
> > > DRM_XE_VM_CREATE, struct drm_xe_vm_create)
> > > +#define DRM_IOCTL_XE_VM_DESTROY
> > > DRM_IOW(DRM_COMMAND_BASE +
> > > DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
> > > +#define DRM_IOCTL_XE_VM_BIND
> > > DRM_IOW(DRM_COMMAND_BASE +
> > > DRM_XE_VM_BIND, struct drm_xe_vm_bind)
> > > +#define DRM_IOCTL_XE_ENGINE_CREATE
> > > DRM_IOWR(DRM_COMMAND_BASE +
> > > DRM_XE_ENGINE_CREATE, struct drm_xe_engine_create)
> > > +#define DRM_IOCTL_XE_ENGINE_GET_PROPERTY
> > > DRM_IOWR(DRM_COMMAND_BASE +
> > > DRM_XE_ENGINE_GET_PROPERTY, struct drm_xe_engine_get_property)
> > > +#define DRM_IOCTL_XE_ENGINE_DESTROY
> > > DRM_IOW(DRM_COMMAND_BASE +
> > > DRM_XE_ENGINE_DESTROY, struct drm_xe_engine_destroy)
> > > +#define DRM_IOCTL_XE_EXEC
> > > DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC,
> > > struct drm_xe_exec)
> > > +#define DRM_IOCTL_XE_MMIO
> > > DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_MMIO,
> > > struct drm_xe_mmio)
> > > +#define DRM_IOCTL_XE_ENGINE_SET_PROPERTY
> > > DRM_IOW(DRM_COMMAND_BASE +
> > > DRM_XE_ENGINE_SET_PROPERTY, struct drm_xe_engine_set_property)
> > > +#define DRM_IOCTL_XE_WAIT_USER_FENCE
> > > DRM_IOWR(DRM_COMMAND_BASE +
> > > DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
> > > +#define DRM_IOCTL_XE_VM_MADVISE
> > > DRM_IOW(DRM_COMMAND_BASE +
> > > DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
> > > +
> > > +/**
> > > + * enum drm_xe_memory_class - Supported memory classes.
> > > + */
> > > +enum drm_xe_memory_class {
> > > + /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory.
> > > */
> > > + XE_MEM_REGION_CLASS_SYSMEM = 0,
> > > + /**
> > > + * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
> > > + * represents the memory that is local to the device, which we
> > > + * call VRAM. Not valid on integrated platforms.
> > > + */
> > > + XE_MEM_REGION_CLASS_VRAM
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_query_mem_region - Describes some region as known to
> > > + * the driver.
> > > + */
> > > +struct drm_xe_query_mem_region {
> > > + /**
> > > + * @mem_class: The memory class describing this region.
> > > + *
> > > + * See enum drm_xe_memory_class for supported values.
> > > + */
> > > + __u16 mem_class;
> > > + /**
> > > + * @instance: The instance for this region.
> > > + *
> > > + * The @mem_class and @instance taken together will always give
> > > + * a unique pair.
> > > + */
> > > + __u16 instance;
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > + /**
> > > + * @min_page_size: Min page-size in bytes for this region.
> > > + *
> > > + * When the kernel allocates memory for this region, the
> > > + * underlying pages will be at least @min_page_size in size.
> > > + *
> > > + * Important note: When userspace allocates a GTT address which
> > > + * can point to memory allocated from this region, it must also
> > > + * respect this minimum alignment. This is enforced by the
> > > + * kernel.
> > > + */
> > > + __u32 min_page_size;
> > > + /**
> > > + * @max_page_size: Max page-size in bytes for this region.
> > > + */
> > > + __u32 max_page_size;
> > > + /**
> > > + * @total_size: The usable size in bytes for this region.
> > > + */
> > > + __u64 total_size;
> > > + /**
> > > + * @used: Estimate of the memory used in bytes for this region.
> > > + *
> > > + * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
> > > + * accounting. Without this the value here will always equal
> > > + * zero.
> > > + */
> > > + __u64 used;
> > > + /** @reserved: MBZ */
> > > + __u64 reserved[8];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_query_mem_usage - describe memory regions and usage
> > > + *
> > > + * If a query is made with a struct drm_xe_device_query where .query
> > > + * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
> > > + * struct drm_xe_query_mem_usage in .data.
> > > + */
> > > +struct drm_xe_query_mem_usage {
> > > + /** @num_regions: number of memory regions returned in @regions */
> > > + __u32 num_regions;
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > + /** @regions: The returned regions for this device */
> > > + struct drm_xe_query_mem_region regions[];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_query_config - describe the device configuration
> > > + *
> > > + * If a query is made with a struct drm_xe_device_query where .query
> > > + * is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
> > > + * struct drm_xe_query_config in .data.
> > > + */
> > > +struct drm_xe_query_config {
> > > + /** @num_params: number of parameters returned in info */
> > > + __u32 num_params;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > +#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
> > > +#define XE_QUERY_CONFIG_FLAGS 1
> > > + #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
> > > + #define XE_QUERY_CONFIG_FLAGS_USE_GUC (0x1 << 1)
> > > +#define XE_QUERY_CONFIG_MIN_ALIGNEMENT 2
> > > +#define XE_QUERY_CONFIG_VA_BITS 3
> > > +#define XE_QUERY_CONFIG_GT_COUNT 4
> > > +#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> > > +#define XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY 6
> > > +#define XE_QUERY_CONFIG_NUM_PARAM
> > > (XE_QUERY_CONFIG_MAX_ENGINE_PRIORITY
> > > + 1)
> > > + /** @info: array of elements containing the config info */
> > > + __u64 info[];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_query_gts - describe GTs
> > > + *
> > > + * If a query is made with a struct drm_xe_device_query where .query
> > > + * is equal to DRM_XE_DEVICE_QUERY_GTS, then the reply uses struct
> > > + * drm_xe_query_gts in .data.
> > > + */
> > > +struct drm_xe_query_gts {
> > > + /** @num_gt: number of GTs returned in gts */
> > > + __u32 num_gt;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /**
> > > + * @gts: The GTs returned for this device
> > > + *
> > > + * TODO: convert drm_xe_query_gt to proper kernel-doc.
> > > + * TODO: Perhaps info about every mem region relative to this GT? e.g.
> > > + * bandwidth between this GT and remote region?
> > > + */
> > > + struct drm_xe_query_gt {
> > > +#define XE_QUERY_GT_TYPE_MAIN 0
> > > +#define XE_QUERY_GT_TYPE_REMOTE 1
> > > +#define XE_QUERY_GT_TYPE_MEDIA 2
> > > + __u16 type;
> > > + __u16 instance;
> > > + __u32 clock_freq;
> > > + __u64 features;
> > > + __u64 native_mem_regions; /* bit mask of instances from
> > > drm_xe_query_mem_usage */
> > > + __u64 slow_mem_regions; /* bit mask of instances
> > > from
> > > drm_xe_query_mem_usage */
> > > + __u64 inaccessible_mem_regions; /* bit mask of instances
> > > from
> > > drm_xe_query_mem_usage */
> > > + __u64 reserved[8];
> > > + } gts[];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_query_topology_mask - describe the topology mask of a
> GT
> > > + *
> > > + * This is the hardware topology which reflects the internal physical
> > > + * structure of the GPU.
> > > + *
> > > + * If a query is made with a struct drm_xe_device_query where .query
> > > + * is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
> > > + * struct drm_xe_query_topology_mask in .data.
> > > + */
> > > +struct drm_xe_query_topology_mask {
> > > + /** @gt_id: GT ID the mask is associated with */
> > > + __u16 gt_id;
> > > +
> > > + /*
> > > + * To query the mask of Dual Sub Slices (DSS) available for geometry
> > > + * operations. For example a query response containing the following
> > > + * in mask:
> > > + * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> > > + * means 32 DSS are available for geometry.
> > > + */
> > > +#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> > > + /*
> > > + * To query the mask of Dual Sub Slices (DSS) available for compute
> > > + * operations. For example a query response containing the following
> > > + * in mask:
> > > + * DSS_COMPUTE ff ff ff ff 00 00 00 00
> > > + * means 32 DSS are available for compute.
> > > + */
> > > +#define XE_TOPO_DSS_COMPUTE (1 << 1)
> > > + /*
> > > + * To query the mask of Execution Units (EU) available per Dual Sub
> > > + * Slices (DSS). For example a query response containing the following
> > > + * in mask:
> > > + * EU_PER_DSS ff ff 00 00 00 00 00 00
> > > + * means each DSS has 16 EU.
> > > + */
> > > +#define XE_TOPO_EU_PER_DSS (1 << 2)
> > > + /** @type: type of mask */
> > > + __u16 type;
> > > +
> > > + /** @num_bytes: number of bytes in requested mask */
> > > + __u32 num_bytes;
> > > +
> > > + /** @mask: little-endian mask of @num_bytes */
> > > + __u8 mask[];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_device_query - main structure to query device information
> > > + *
> > > + * If size is set to 0, the driver fills it with the required size for the
> > > + * requested type of data to query. If size is equal to the required size,
> > > + * the queried information is copied into data.
> > > + *
> > > + * For example the following code snippet allows retrieving and printing
> > > + * information about the device engines with
> > > DRM_XE_DEVICE_QUERY_ENGINES:
> > > + *
> > > + * .. code-block:: C
> > > + *
> > > + * struct drm_xe_engine_class_instance *hwe;
> > > + * struct drm_xe_device_query query = {
> > > + * .extensions = 0,
> > > + * .query = DRM_XE_DEVICE_QUERY_ENGINES,
> > > + * .size = 0,
> > > + * .data = 0,
> > > + * };
> > > + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> > > + * hwe = malloc(query.size);
> > > + * query.data = (uintptr_t)hwe;
> > > + * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
> > > + * int num_engines = query.size / sizeof(*hwe);
> > > + * for (int i = 0; i < num_engines; i++) {
> > > + * printf("Engine %d: %s\n", i,
> > > + * hwe[i].engine_class ==
> > > DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
> > > + * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COPY ?
> > > "COPY":
> > > + * hwe[i].engine_class ==
> > > DRM_XE_ENGINE_CLASS_VIDEO_DECODE ?
> > > "VIDEO_DECODE":
> > > + * hwe[i].engine_class ==
> > > DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ?
> > > "VIDEO_ENHANCE":
> > > + * hwe[i].engine_class ==
> > > DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
> > > + * "UNKNOWN");
> > > + * }
> > > + * free(hwe);
> > > + */
> > > +struct drm_xe_device_query {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > +#define DRM_XE_DEVICE_QUERY_ENGINES 0
> > > +#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
> > > +#define DRM_XE_DEVICE_QUERY_CONFIG 2
> > > +#define DRM_XE_DEVICE_QUERY_GTS 3
> > > +#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> > > +#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> > > + /** @query: The type of data to query */
> > > + __u32 query;
> > > +
> > > + /** @size: Size of the queried data */
> > > + __u32 size;
> > > +
> > > + /** @data: Queried data is placed here */
> > > + __u64 data;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_gem_create {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /**
> > > + * @size: Requested size for the object
> > > + *
> > > + * The (page-aligned) allocated size for the object will be returned.
> > > + */
> > > + __u64 size;
> > > +
> > > +#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> > > +#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
> > > + /**
> > > + * @flags: Flags, currently a mask of memory instances of where BO can
> > > + * be placed
> > > + */
> > > + __u32 flags;
> > > +
> > > + /**
> > > + * @vm_id: Attached VM, if any
> > > + *
> > > + * If a VM is specified, this BO must:
> > > + *
> > > + * 1. Only ever be bound to that VM.
> > > + *
> > > + * 2. Cannot be exported as a PRIME fd.
> > > + */
> > > + __u32 vm_id;
> > > +
> > > + /**
> > > + * @handle: Returned handle for the object.
> > > + *
> > > + * Object handles are nonzero.
> > > + */
> > > + __u32 handle;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_gem_mmap_offset {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @handle: Handle for the object being mapped. */
> > > + __u32 handle;
> > > +
> > > + /** @flags: Must be zero */
> > > + __u32 flags;
> > > +
> > > + /** @offset: The fake offset to use for subsequent mmap call */
> > > + __u64 offset;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_vm_bind_op_error_capture - format of VM bind op error
> > > capture
> > > + */
> > > +struct drm_xe_vm_bind_op_error_capture {
> > > + /** @error: errno that occured */
> > > + __s32 error;
> > > +
> > > + /** @op: operation that encounter an error */
> > > + __u32 op;
> > > +
> > > + /** @addr: address of bind op */
> > > + __u64 addr;
> > > +
> > > + /** @size: size of bind */
> > > + __u64 size;
> > > +};
> > > +
> > > +/** struct drm_xe_ext_vm_set_property - VM set property extension */
> > > +struct drm_xe_ext_vm_set_property {
> > > + /** @base: base user extension */
> > > + struct xe_user_extension base;
> > > +
> > > +#define XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS
> 0
> > > + /** @property: property to set */
> > > + __u32 property;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_create {
> > > +#define XE_VM_EXTENSION_SET_PROPERTY 0
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > +#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> > > +#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
> > > +#define DRM_XE_VM_CREATE_ASYNC_BIND_OPS (0x1 << 2)
> > > +#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> > > + /** @flags: Flags */
> > > + __u32 flags;
> > > +
> > > + /** @vm_id: Returned VM ID */
> > > + __u32 vm_id;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_destroy {
> > > + /** @vm_id: VM ID */
> > > + __u32 vm_id;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_bind_op {
> > > + /**
> > > + * @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for
> > > UNMAP
> > > + */
> > > + __u32 obj;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + union {
> > > + /**
> > > + * @obj_offset: Offset into the object, MBZ for CLEAR_RANGE,
> > > + * ignored for unbind
> > > + */
> > > + __u64 obj_offset;
> > > +
> > > + /** @userptr: user pointer to bind on */
> > > + __u64 userptr;
> > > + };
> > > +
> > > + /**
> > > + * @range: Number of bytes from the object to bind to addr, MBZ for
> > > UNMAP_ALL
> > > + */
> > > + __u64 range;
> > > +
> > > + /** @addr: Address to operate on, MBZ for UNMAP_ALL */
> > > + __u64 addr;
> > > +
> > > + /**
> > > + * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
> > > + * only applies to creating new VMAs
> > > + */
> > > + __u64 tile_mask;
> > > +
> > > +#define XE_VM_BIND_OP_MAP 0x0
> > > +#define XE_VM_BIND_OP_UNMAP 0x1
> > > +#define XE_VM_BIND_OP_MAP_USERPTR 0x2
> > > +#define XE_VM_BIND_OP_RESTART 0x3
> > > +#define XE_VM_BIND_OP_UNMAP_ALL 0x4
> > > +#define XE_VM_BIND_OP_PREFETCH 0x5
> > > +
> > > +#define XE_VM_BIND_FLAG_READONLY (0x1 << 16)
> > > + /*
> > > + * A bind ops completions are always async, hence the support for out
> > > + * sync. This flag indicates the allocation of the memory for new page
> > > + * tables and the job to program the pages tables is asynchronous
> > > + * relative to the IOCTL. That part of a bind operation can fail under
> > > + * memory pressure, the job in practice can't fail unless the system is
> > > + * totally shot.
> > > + *
> > > + * If this flag is clear and the IOCTL doesn't return an error, in
> > > + * practice the bind op is good and will complete.
> > > + *
> > > + * If this flag is set and doesn't return an error, the bind op can
> > > + * still fail and recovery is needed. If configured, the bind op that
> > > + * caused the error will be captured in
> > > drm_xe_vm_bind_op_error_capture.
> > > + * Once the user sees the error (via a ufence +
> > > + * XE_VM_PROPERTY_BIND_OP_ERROR_CAPTURE_ADDRESS), it should
> > > free memory
> > > + * via non-async unbinds, and then restart all queue'd async binds op via
> > > + * XE_VM_BIND_OP_RESTART. Or alternatively the user should destroy
> > > the
> > > + * VM.
> > > + *
> > > + * This flag is only allowed when
> > > DRM_XE_VM_CREATE_ASYNC_BIND_OPS is
> > > + * configured in the VM and must be set if the VM is configured with
> > > + * DRM_XE_VM_CREATE_ASYNC_BIND_OPS and not in an error state.
> > > + */
> > > +#define XE_VM_BIND_FLAG_ASYNC (0x1 << 17)
> > > + /*
> > > + * Valid on a faulting VM only, do the MAP operation immediately rather
> > > + * than differing the MAP to the page fault handler.
> > > + */
> > > +#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 18)
> > > + /*
> > > + * When the NULL flag is set, the page tables are setup with a special
> > > + * bit which indicates writes are dropped and all reads return zero. In
> > > + * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
> > > + * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
> > > + * intended to implement VK sparse bindings.
> > > + */
> > > +#define XE_VM_BIND_FLAG_NULL (0x1 << 19)
> > > + /** @op: Operation to perform (lower 16 bits) and flags (upper 16 bits)
> > > */
> > > + __u32 op;
> > > +
> > > + /** @mem_region: Memory region to prefetch VMA to, instance not a
> > > mask */
> > > + __u32 region;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_bind {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @vm_id: The ID of the VM to bind to */
> > > + __u32 vm_id;
> > > +
> > > + /**
> > > + * @engine_id: engine_id, must be of class
> > > DRM_XE_ENGINE_CLASS_VM_BIND
> > > + * and engine must have same vm_id. If zero, the default VM bind engine
> > > + * is used.
> > > + */
> > > + __u32 engine_id;
> > > +
> > > + /** @num_binds: number of binds in this IOCTL */
> > > + __u32 num_binds;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + union {
> > > + /** @bind: used if num_binds == 1 */
> > > + struct drm_xe_vm_bind_op bind;
> > > +
> > > + /**
> > > + * @vector_of_binds: userptr to array of struct
> > > + * drm_xe_vm_bind_op if num_binds > 1
> > > + */
> > > + __u64 vector_of_binds;
> > > + };
> > > +
> > > + /** @num_syncs: amount of syncs to wait on */
> > > + __u32 num_syncs;
> > > +
> > > + /** @pad2: MBZ */
> > > + __u32 pad2;
> > > +
> > > + /** @syncs: pointer to struct drm_xe_sync array */
> > > + __u64 syncs;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +/** struct drm_xe_ext_engine_set_property - engine set property
> > > extension */
> > > +struct drm_xe_ext_engine_set_property {
> > > + /** @base: base user extension */
> > > + struct xe_user_extension base;
> > > +
> > > + /** @property: property to set */
> > > + __u32 property;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_engine_set_property - engine set property
> > > + *
> > > + * Same namespace for extensions as drm_xe_engine_create
> > > + */
> > > +struct drm_xe_engine_set_property {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @engine_id: Engine ID */
> > > + __u32 engine_id;
> > > +
> > > +#define XE_ENGINE_SET_PROPERTY_PRIORITY 0
> > > +#define XE_ENGINE_SET_PROPERTY_TIMESLICE 1
> > > +#define XE_ENGINE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
> > > + /*
> > > + * Long running or ULLS engine mode. DMA fences not allowed in this
> > > + * mode. Must match the value of
> > > DRM_XE_VM_CREATE_COMPUTE_MODE, serves
> > > + * as a sanity check the UMD knows what it is doing. Can only be set at
> > > + * engine create time.
> > > + */
> > > +#define XE_ENGINE_SET_PROPERTY_COMPUTE_MODE 3
> > > +#define XE_ENGINE_SET_PROPERTY_PERSISTENCE 4
> > > +#define XE_ENGINE_SET_PROPERTY_JOB_TIMEOUT 5
> > > +#define XE_ENGINE_SET_PROPERTY_ACC_TRIGGER 6
> > > +#define XE_ENGINE_SET_PROPERTY_ACC_NOTIFY 7
> > > +#define XE_ENGINE_SET_PROPERTY_ACC_GRANULARITY 8
> > > + /** @property: property to set */
> > > + __u32 property;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +/** struct drm_xe_engine_class_instance - instance of an engine class */
> > > +struct drm_xe_engine_class_instance {
> > > +#define DRM_XE_ENGINE_CLASS_RENDER 0
> > > +#define DRM_XE_ENGINE_CLASS_COPY 1
> > > +#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
> > > +#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
> > > +#define DRM_XE_ENGINE_CLASS_COMPUTE 4
> > > + /*
> > > + * Kernel only class (not actual hardware engine class). Used for
> > > + * creating ordered queues of VM bind operations.
> > > + */
> > > +#define DRM_XE_ENGINE_CLASS_VM_BIND 5
> > > + __u16 engine_class;
> > > +
> > > + __u16 engine_instance;
> > > + __u16 gt_id;
> > > +};
> > > +
> > > +struct drm_xe_engine_create {
> > > +#define XE_ENGINE_EXTENSION_SET_PROPERTY 0
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @width: submission width (number BB per exec) for this engine */
> > > + __u16 width;
> > > +
> > > + /** @num_placements: number of valid placements for this engine */
> > > + __u16 num_placements;
> > > +
> > > + /** @vm_id: VM to use for this engine */
> > > + __u32 vm_id;
> > > +
> > > + /** @flags: MBZ */
> > > + __u32 flags;
> > > +
> > > + /** @engine_id: Returned engine ID */
> > > + __u32 engine_id;
> > > +
> > > + /**
> > > + * @instances: user pointer to a 2-d array of struct
> > > + * drm_xe_engine_class_instance
> > > + *
> > > + * length = width (i) * num_placements (j)
> > > + * index = j + i * width
> > > + */
> > > + __u64 instances;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_engine_get_property {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @engine_id: Engine ID */
> > > + __u32 engine_id;
> > > +
> > > +#define XE_ENGINE_GET_PROPERTY_BAN 0
> > > + /** @property: property to get */
> > > + __u32 property;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_engine_destroy {
> > > + /** @engine_id: Engine ID */
> > > + __u32 engine_id;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_sync {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > +#define DRM_XE_SYNC_SYNCOBJ 0x0
> > > +#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
> > > +#define DRM_XE_SYNC_DMA_BUF 0x2
> > > +#define DRM_XE_SYNC_USER_FENCE 0x3
> > > +#define DRM_XE_SYNC_SIGNAL 0x10
> > > + __u32 flags;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + union {
> > > + __u32 handle;
> > > +
> > > + /**
> > > + * @addr: Address of user fence. When sync passed in via exec
> > > + * IOCTL this a GPU address in the VM. When sync passed in via
> > > + * VM bind IOCTL this is a user pointer. In either case, it is
> > > + * the users responsibility that this address is present and
> > > + * mapped when the user fence is signalled. Must be qword
> > > + * aligned.
> > > + */
> > > + __u64 addr;
> > > + };
> > > +
> > > + __u64 timeline_value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_exec {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @vm_id: VM ID to run batch buffer in */
> > > + __u32 engine_id;
> > > +
> > > + /** @num_syncs: Amount of struct drm_xe_sync in array. */
> > > + __u32 num_syncs;
> > > +
> > > + /** @syncs: Pointer to struct drm_xe_sync array. */
> > > + __u64 syncs;
> > > +
> > > + /**
> > > + * @address: address of batch buffer if num_batch_buffer == 1 or an
> > > + * array of batch buffer addresses
> > > + */
> > > + __u64 address;
> > > +
> > > + /**
> > > + * @num_batch_buffer: number of batch buffer in this exec, must match
> > > + * the width of the engine
> > > + */
> > > + __u16 num_batch_buffer;
> > > +
> > > + /** @pad: MBZ */
> > > + __u16 pad[3];
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_mmio {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + __u32 addr;
> > > +
> > > +#define DRM_XE_MMIO_8BIT 0x0
> > > +#define DRM_XE_MMIO_16BIT 0x1
> > > +#define DRM_XE_MMIO_32BIT 0x2
> > > +#define DRM_XE_MMIO_64BIT 0x3
> > > +#define DRM_XE_MMIO_BITS_MASK 0x3
> > > +#define DRM_XE_MMIO_READ 0x4
> > > +#define DRM_XE_MMIO_WRITE 0x8
> > > + __u32 flags;
> > > +
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +/**
> > > + * struct drm_xe_wait_user_fence - wait user fence
> > > + *
> > > + * Wait on user fence, XE will wakeup on every HW engine interrupt in the
> > > + * instances list and check if user fence is complete::
> > > + *
> > > + * (*addr & MASK) OP (VALUE & MASK)
> > > + *
> > > + * Returns to user on user fence completion or timeout.
> > > + */
> > > +struct drm_xe_wait_user_fence {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + union {
> > > + /**
> > > + * @addr: user pointer address to wait on, must qword aligned
> > > + */
> > > + __u64 addr;
> > > +
> > > + /**
> > > + * @vm_id: The ID of the VM which encounter an error used with
> > > + * DRM_XE_UFENCE_WAIT_VM_ERROR. Upper 32 bits must be
> > > clear.
> > > + */
> > > + __u64 vm_id;
> > > + };
> > > +
> > > +#define DRM_XE_UFENCE_WAIT_EQ 0
> > > +#define DRM_XE_UFENCE_WAIT_NEQ 1
> > > +#define DRM_XE_UFENCE_WAIT_GT 2
> > > +#define DRM_XE_UFENCE_WAIT_GTE 3
> > > +#define DRM_XE_UFENCE_WAIT_LT 4
> > > +#define DRM_XE_UFENCE_WAIT_LTE 5
> > > + /** @op: wait operation (type of comparison) */
> > > + __u16 op;
> > > +
> > > +#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on
> VM bind
> > > */
> > > +#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
> > > +#define DRM_XE_UFENCE_WAIT_VM_ERROR (1 << 2)
> > > + /** @flags: wait flags */
> > > + __u16 flags;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @value: compare value */
> > > + __u64 value;
> > > +
> > > +#define DRM_XE_UFENCE_WAIT_U8 0xffu
> > > +#define DRM_XE_UFENCE_WAIT_U16 0xffffu
> > > +#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
> > > +#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
> > > + /** @mask: comparison mask */
> > > + __u64 mask;
> > > + /**
> > > + * @timeout: how long to wait before bailing, value in nanoseconds.
> > > + * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
> > > + * it contains timeout expressed in nanoseconds to wait (fence will
> > > + * expire at now() + timeout).
> > > + * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout)
> > > wait
> > > + * will end at timeout (uses system MONOTONIC_CLOCK).
> > > + * Passing negative timeout leads to neverending wait.
> > > + *
> > > + * On relative timeout this value is updated with timeout left
> > > + * (for restarting the call in case of signal delivery).
> > > + * On absolute timeout this value stays intact (restarted call still
> > > + * expire at the same point of time).
> > > + */
> > > + __s64 timeout;
> > > +
> > > + /**
> > > + * @num_engines: number of engine instances to wait on, must be zero
> > > + * when DRM_XE_UFENCE_WAIT_SOFT_OP set
> > > + */
> > > + __u64 num_engines;
> > > +
> > > + /**
> > > + * @instances: user pointer to array of drm_xe_engine_class_instance to
> > > + * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
> > > + */
> > > + __u64 instances;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +struct drm_xe_vm_madvise {
> > > + /** @extensions: Pointer to the first extension struct, if any */
> > > + __u64 extensions;
> > > +
> > > + /** @vm_id: The ID VM in which the VMA exists */
> > > + __u32 vm_id;
> > > +
> > > + /** @pad: MBZ */
> > > + __u32 pad;
> > > +
> > > + /** @range: Number of bytes in the VMA */
> > > + __u64 range;
> > > +
> > > + /** @addr: Address of the VMA to operation on */
> > > + __u64 addr;
> > > +
> > > + /*
> > > + * Setting the preferred location will trigger a migrate of the VMA
> > > + * backing store to new location if the backing store is already
> > > + * allocated.
> > > + *
> > > + * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see
> > > enum
> > > + * drm_xe_memory_class.
> > > + */
> > > +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
> > > +#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
> > > + /*
> > > + * In this case lower 32 bits are mem class, upper 32 are GT.
> > > + * Combination provides a single IOCTL plus migrate VMA to preferred
> > > + * location.
> > > + */
> > > +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
> > > + /*
> > > + * The CPU will do atomic memory operations to this VMA. Must be set
> > > on
> > > + * some devices for atomics to behave correctly.
> > > + */
> > > +#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
> > > + /*
> > > + * The device will do atomic memory operations to this VMA. Must be set
> > > + * on some devices for atomics to behave correctly.
> > > + */
> > > +#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
> > > + /*
> > > + * Priority WRT to eviction (moving from preferred memory location due
> > > + * to memory pressure). The lower the priority, the more likely to be
> > > + * evicted.
> > > + */
>
> Hi Oak,
>
> Thanks for your reviews and comments here...
>
> >
> > Making ATOMIC as a madvise caused some problem. Atomic should be a hard
> requirement, not a hint, because atomic has correctness implication.
> Hint/madvise is best effort. Even if we can't meet the requirement of a hint, it
> won't cause any correctness problem. For example, one some device, when we
> mark an allocation as DEVICE_ATOMIC, driver will HAVE to guarantee the backing
> store of the allocation is in device as device can't perform atomic operations to
> system memory across PCIe on such device.
> >
> > So we should remove the MADVISE verb from above definition, such as:
> >
> > +#define DRM_XE_VM_SET_DEVICE_ATOMIC 4
>
> I don't quite get this suggestion since this doesn't align
> with the madvise_func call. So, should we kill that function
> and make this a VM property? in such case, what would this
> property do?
In struct xe_bo, we already have a properties for atomics, such as device_atomic, cpu_atomic. This is good. What I was saying above is, the function to set the device_atomic property should not be a madvise function. The preferred_gt, _priority etc can be a madvise function, but the device_atomic can't be set through the xe_vm_madvise_ioctl function, due the reason I explained above. It would be better we introduce some set_property ioctl to set the atomic property of xe_bo.
>
> >
> > Also, besides CPU_ATOMIC and DEVICE_ATOMIC, we should also define
> SYSTEM_ATOMIC which means both CPU and device can perform atomics to such
> allocation. This definition is better aligned with the new L0 specification, see:
> https://spec.oneapi.io/level-
> zero/latest/core/api.html#ze__api_8h_1a020717d3d1d0f52f645226b7ffd4552b.
> The old version of the L0 specification is https://spec.oneapi.io/level-
> zero/latest/core/api.html#ze-memory-advice-t, which is similar to your
> definitions above (having the word ADVICE).
> >
> > HOST_ATOMIC seems a little bit better name than CPU_ATOMIC, to pair with
> DEVICE_ATOMIC.
>
> Could you please open up on your proposal for the proper alignment?
>
> I just created https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/739
> so we don't lose track of it.
Ok, I will follow up on gitlab then.
Thanks,
Oak
>
> Thanks,
> Rodrigo.
>
> >
> > Thanks,
> > Oak
> >
> > > +#define DRM_XE_VM_MADVISE_PRIORITY 5
> > > +#define DRM_XE_VMA_PRIORITY_LOW 0
> > > +#define DRM_XE_VMA_PRIORITY_NORMAL 1 /* Default
> > > */
> > > +#define DRM_XE_VMA_PRIORITY_HIGH 2 /* Must
> > > be elevated user */
> > > + /* Pin the VMA in memory, must be elevated user */
> > > +#define DRM_XE_VM_MADVISE_PIN 6
> > > + /** @property: property to set */
> > > + __u32 property;
> > > +
> > > + /** @pad2: MBZ */
> > > + __u32 pad2;
> > > +
> > > + /** @value: property value */
> > > + __u64 value;
> > > +
> > > + /** @reserved: Reserved */
> > > + __u64 reserved[2];
> > > +};
> > > +
> > > +#if defined(__cplusplus)
> > > +}
> > > +#endif
> > > +
> > > +#endif /* _UAPI_XE_DRM_H_ */
> > > --
> > > 2.40.1
> >
^ permalink raw reply [flat|nested] 20+ messages in thread
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2023-06-30 10:00 [Intel-xe] [PATCH DONTMERGE] drm/xe: uapi review submission Thomas Hellström
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2023-06-30 12:21 ` [Intel-xe] [PATCH DONTMERGE] " Thomas Hellström
2023-06-30 23:40 ` Dixit, Ashutosh
2023-07-05 21:19 ` Matt Roper
2023-07-05 22:33 ` Dixit, Ashutosh
2023-07-06 4:20 ` Matt Roper
2023-07-06 6:14 ` Thomas Hellström
2023-07-06 22:30 ` Matt Roper
2023-07-07 7:22 ` Thomas Hellström
2023-07-06 22:48 ` Matt Roper
[not found] ` <76c3d534-453a-7fd3-6fc8-cf30e9c8d464@intel.com>
2023-09-14 1:40 ` Zeng, Oak
2023-09-25 21:42 ` Rodrigo Vivi
2023-09-25 22:07 ` Zeng, Oak
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