From: "Tauro, Riana" <riana.tauro@intel.com>
To: Raag Jadav <raag.jadav@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <anshuman.gupta@intel.com>,
<rodrigo.vivi@intel.com>, <aravind.iddamsetty@linux.intel.com>,
<badal.nilawar@intel.com>, <ravi.kishore.koppuravuri@intel.com>,
<mallesh.koujalagi@intel.com>, <soham.purkait@intel.com>
Subject: Re: [PATCH v2 2/5] drm/xe/xe_ras: Add structures and commands for get and clear counter
Date: Mon, 20 Apr 2026 13:20:02 +0530 [thread overview]
Message-ID: <95ab12e8-7f5b-4b15-bfb2-42b1ffd72b48@intel.com> (raw)
In-Reply-To: <adyxZnShDWNhNuaq@black.igk.intel.com>
On 4/13/2026 2:33 PM, Raag Jadav wrote:
> On Mon, Apr 06, 2026 at 08:24:41PM +0530, Riana Tauro wrote:
>> Add request and response structures for get and clear counter command.
> ...
>
>> +/**
>> + * struct xe_ras_info_queue_header - Info queue header
>> + *
>> + * This structure provides metadata about large info queue data
>> + */
>> +struct xe_ras_info_queue_header {
>> + /** @total_size: Total size of complete info queue data (bytes) */
>> + u32 total_size;
>> + /** @chunk_offset: Offset of this chunk within total data (bytes) */
>> + u32 chunk_offset;
>> + /** @chunk_size: Size of data in this chunk (bytes) */
>> + u32 chunk_size;
>> + /** @sequence_number: Sequence number of this chunk (starts at 0) */
>> + u32 sequence_number;
>> + /** @flags: Info queue control flags */
>> + u32 flags:8;
>> + /** @compression_type: Compression algorithm used (0 = none) */
>> + u32 compression_type:4;
>> + /** @num_headers: Number of detailed counter headers present at the beginning of queue data */
>> + u32 num_headers:5;
>> + /** @reserved: Reserved for future use */
>> + u32 reserved:15;
>> + /** @checksum: Checksum of the chunk data */
>> + u32 checksum;
>> +} __packed;
> Do we actually use this in the code?
>
>> +
>> +/**
>> + * struct xe_ras_info_queue_response - Info queue response
>> + *
>> + * This structure provides the response for commands with info queue
>> + */
>> +struct xe_ras_info_queue_response {
>> + /** @queue_header: Info queue metadata */
>> + struct xe_ras_info_queue_header queue_header;
>> + /** @queue_data: Info queue data chunk */
>> + u8 queue_data[XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE];
>> +} __packed;
> Ditto.
>
>> +
>> +/**
>> + * struct xe_ras_get_counter_request - Request for XE_SYSCTRL_CMD_GET_COUNTER
>> + *
>> + * This structure defines the request format to get error counter value.
>> + */
>> +struct xe_ras_get_counter_request {
>> + /** @error_class: RAS error class */
>> + struct xe_ras_error_class error_class;
>> + /** @reserved: Reserved for future use */
>> + u32 reserved;
>> +} __packed;
>> +
>> +/**
>> + * struct xe_ras_get_counter_response - Response for XE_SYSCTRL_CMD_GET_COUNTER
>> + *
>> + * This structure defines the response format to get error counter value.
>> + */
>> +struct xe_ras_get_counter_response {
>> + /** @error_class: RAS error class */
>> + struct xe_ras_error_class error_class;
>> + /** @counter_value: Current counter value */
>> + u32 counter_value;
>> + /** @timestamp: Timestamp of the counter value */
>> + u64 timestamp;
>> + /** @threshold_value: Threshold value for the counter */
>> + u32 threshold_value;
>> + /** @counter_status: Status of the counter */
>> + u32 counter_status:8;
> Ditto.
>
>> + /** @reserved: Reserved for future use */
>> + u32 reserved:1;
>> + /** @has_info_queue: Indicates if info queue is present */
>> + u32 has_info_queue:1;
> Ditto.
>
>> + /** @reserved1: Reserved for future use */
>> + u32 reserved1:22;
>> + /** @info_queue: Info queue data */
>> + struct xe_ras_info_queue_response info_queue;
> Hm, so I'm wondering if we can just add reserved padding for now and
> introduce the struct when we actually use it in code? Will tidy up things
> quite a bit ;)
Sure, makes sense
Riana
>
> Also, probably just squash it with next patch where we use the struct.
>
>> +} __packed;
>> +
>> +/**
>> + * struct xe_ras_clear_counter_request - Request for XE_SYSCTRL_CMD_CLEAR_COUNTER
>> + *
>> + * This structure defines the request format to clear an error counter.
>> + */
>> +struct xe_ras_clear_counter_request {
>> + /** @error_class: RAS error class */
>> + struct xe_ras_error_class error_class;
>> + /** @specific_counter: (1 = Specific counter, 0 = Aggregate counter) */
>> + u32 specific_counter:1;
> Same as above.
>
> Raag
>
>> + /** @reserved: Reserved for future use */
>> + u32 reserved:31;
>> +} __packed;
>> +
>> +/**
>> + * struct xe_ras_clear_counter_response - Response for XE_SYSCTRL_CMD_CLEAR_COUNTER
>> + *
>> + * This structure defines the response received on clearing an error counter.
>> + */
>> +struct xe_ras_clear_counter_response {
>> + /** @error_class: RAS error class */
>> + struct xe_ras_error_class error_class;
>> + /** @previous_counter_value: Counter value before clearing */
>> + u32 previous_counter_value;
>> + /** @clear_timestamp: Timestamp when the counter was cleared */
>> + u64 clear_timestamp;
>> + /** @status: Status of the clear operation (Success/Failure) */
>> + u32 status;
>> + /** @reserved: Reserved for future use */
>> + u32 reserved[3];
>> +} __packed;
>> +#endif
next prev parent reply other threads:[~2026-04-20 7:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
2026-04-06 14:54 ` [PATCH v2 1/5] drm/xe/uapi: Add additional error components to XE drm_ras Riana Tauro
2026-04-06 14:54 ` [PATCH v2 2/5] drm/xe/xe_ras: Add structures and commands for get and clear counter Riana Tauro
2026-04-13 9:03 ` Raag Jadav
2026-04-20 7:50 ` Tauro, Riana [this message]
2026-04-06 14:54 ` [PATCH v2 3/5] drm/xe/xe_ras: Add support to query error counter for CRI Riana Tauro
2026-04-13 9:19 ` Raag Jadav
2026-04-20 6:33 ` Tauro, Riana
2026-04-20 8:21 ` Raag Jadav
2026-04-06 14:54 ` [PATCH v2 4/5] drm/xe/xe_ras: Add helper to clear error counter Riana Tauro
2026-04-13 9:25 ` Raag Jadav
2026-04-20 7:48 ` Tauro, Riana
2026-04-06 14:54 ` [PATCH v2 5/5] drm/xe/ras: Add flag for Xe RAS Riana Tauro
2026-04-06 14:54 ` ✗ CI.checkpatch: warning for Add get-error-counter and clear-error-counter support for CRI Patchwork
2026-04-06 14:56 ` ✓ CI.KUnit: success " Patchwork
2026-04-06 15:32 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-06 18:50 ` ✗ Xe.CI.FULL: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=95ab12e8-7f5b-4b15-bfb2-42b1ffd72b48@intel.com \
--to=riana.tauro@intel.com \
--cc=anshuman.gupta@intel.com \
--cc=aravind.iddamsetty@linux.intel.com \
--cc=badal.nilawar@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=mallesh.koujalagi@intel.com \
--cc=raag.jadav@intel.com \
--cc=ravi.kishore.koppuravuri@intel.com \
--cc=rodrigo.vivi@intel.com \
--cc=soham.purkait@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox