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* [PATCH] PCI: Fix resizable bar fails due to bridge memory region
@ 2026-04-24 14:43 Maarten Lankhorst
  2026-04-24 14:48 ` ✗ CI.checkpatch: warning for " Patchwork
                   ` (4 more replies)
  0 siblings, 5 replies; 10+ messages in thread
From: Maarten Lankhorst @ 2026-04-24 14:43 UTC (permalink / raw)
  To: linux-pci, Bjorn Helgaas, intel-xe@lists.freedesktop.org

I encountered a problem that I have on my system, where I cannot resize
the bar because one of the bridges has a 

If I take a look at the topology, the GPU shares the memory region with a bridge,

+-[0000:64]-+-00.0-[65-68]----00.0-[66-68]--+-01.0-[67]----00.0

The specific bridge likely causing a failure is:

65:00.0 PCI bridge: Intel Corporation Device e2ff (rev 01) (prog-if 00 [Normal decode])
        Flags: bus master, fast devsel, latency 0, IRQ 32, IOMMU group 1
        Memory at 382400000000 (64-bit, prefetchable) [size=8M]
        ....

Which causes upstream bridge 64:00.0 initially to allocate the region
[38fe0000000-38ff0000000) for the GPU, and [382ff0000000..382ff07fffff]
for the bridge device.

Bridge 64 is big enough for 1 BMG with a 32 GB bar and the second 8 MB allocation:
pci_bus 0000:64: resource 9 [mem 0x382000000000-0x382fffffffff window] (64GB window)

The reason for failure is that bridge 65 has a 8 MB memory region assigned,
and previously it was ignored when reallocating.

Failing case:
xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: was not released (still contains assigned resources)
pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
pcieport 0000:64:00.0:   bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]
pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
pcieport 0000:65:00.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
pcieport 0000:66:01.0: PCI bridge to [bus 67]
pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
pcieport 0000:66:01.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]

Working with the patch below:
xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
pcieport 0000:65:00.0: BAR 0 [mem 0x382ff0000000-0x382ff07fffff 64bit pref]: releasing
pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: releasing
pcieport 0000:64:00.0: bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]: assigned
pcieport 0000:65:00.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
pcieport 0000:65:00.0: BAR 0 [mem 0x382400000000-0x3824007fffff 64bit pref]: assigned
pcieport 0000:66:01.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
xe 0000:67:00.0: BAR 2 [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
pcieport 0000:64:00.0:   bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]
pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
pcieport 0000:66:01.0: PCI bridge to [bus 67]
pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
pcieport 0000:66:01.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
xe 0000:67:00.0: [drm] BAR2 resized to 16384MiB


Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
I'm not 100% this is the correct fix, I don't know why the bridge itself has
a memory region, why the kernel allocates it and when it's supposed to
be used. Not a PCI expert. :-)
---

diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 61f769aaa2f6c..98692dccc4721 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -2258,6 +2258,7 @@ static int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *
 	unsigned long type = res->flags;
 	struct pci_dev_resource *dev_res;
 	struct pci_dev *bridge = NULL;
+	struct resource *r;
 	LIST_HEAD(added);
 	LIST_HEAD(failed);
 	unsigned int i;
@@ -2286,6 +2287,21 @@ static int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *
 				 res_name, res);
 		}
 
+		pci_dev_for_each_resource(bridge, r, i) {
+			if (!resource_assigned(r) || r->child)
+				continue;
+
+			if ((r->flags & IORESOURCE_TYPE_BITS) !=
+			    (type & IORESOURCE_TYPE_BITS))
+				continue;
+
+			ret = pci_dev_res_add_to_list(saved, bridge, r, 0, 0);
+			if (ret)
+				return ret;
+
+			pci_release_resource(bridge, i);
+		}
+
 		bus = bus->parent;
 	}
 

^ permalink raw reply related	[flat|nested] 10+ messages in thread

* ✗ CI.checkpatch: warning for PCI: Fix resizable bar fails due to bridge memory region
  2026-04-24 14:43 [PATCH] PCI: Fix resizable bar fails due to bridge memory region Maarten Lankhorst
@ 2026-04-24 14:48 ` Patchwork
  2026-04-24 14:50 ` ✓ CI.KUnit: success " Patchwork
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-04-24 14:48 UTC (permalink / raw)
  To: Maarten Lankhorst; +Cc: intel-xe

== Series Details ==

Series: PCI: Fix resizable bar fails due to bridge memory region
URL   : https://patchwork.freedesktop.org/series/165435/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 69242ef658cebfb11f3e6ea1465352116bd1bc6c
Author: Maarten Lankhorst <dev@lankhorst.se>
Date:   Fri Apr 24 16:43:26 2026 +0200

    PCI: Fix resizable bar fails due to bridge memory region
    
    I encountered a problem that I have on my system, where I cannot resize
    the bar because one of the bridges has a
    
    If I take a look at the topology, the GPU shares the memory region with a bridge,
    
    +-[0000:64]-+-00.0-[65-68]----00.0-[66-68]--+-01.0-[67]----00.0
    
    The specific bridge likely causing a failure is:
    
    65:00.0 PCI bridge: Intel Corporation Device e2ff (rev 01) (prog-if 00 [Normal decode])
            Flags: bus master, fast devsel, latency 0, IRQ 32, IOMMU group 1
            Memory at 382400000000 (64-bit, prefetchable) [size=8M]
            ....
    
    Which causes upstream bridge 64:00.0 initially to allocate the region
    [38fe0000000-38ff0000000) for the GPU, and [382ff0000000..382ff07fffff]
    for the bridge device.
    
    Bridge 64 is big enough for 1 BMG with a 32 GB bar and the second 8 MB allocation:
    pci_bus 0000:64: resource 9 [mem 0x382000000000-0x382fffffffff window] (64GB window)
    
    The reason for failure is that bridge 65 has a 8 MB memory region assigned,
    and previously it was ignored when reallocating.
    
    Failing case:
    xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
    xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
    pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
    pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
    pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: was not released (still contains assigned resources)
    pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
    pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
    pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
    pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
    pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
    pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
    pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
    pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
    xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
    xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
    xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
    xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
    pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
    pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
    pcieport 0000:64:00.0:   bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]
    pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
    pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
    pcieport 0000:65:00.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
    pcieport 0000:66:01.0: PCI bridge to [bus 67]
    pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
    pcieport 0000:66:01.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
    
    Working with the patch below:
    xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
    xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
    pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
    pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
    pcieport 0000:65:00.0: BAR 0 [mem 0x382ff0000000-0x382ff07fffff 64bit pref]: releasing
    pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: releasing
    pcieport 0000:64:00.0: bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]: assigned
    pcieport 0000:65:00.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
    pcieport 0000:65:00.0: BAR 0 [mem 0x382400000000-0x3824007fffff 64bit pref]: assigned
    pcieport 0000:66:01.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
    xe 0000:67:00.0: BAR 2 [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
    pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
    pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
    pcieport 0000:64:00.0:   bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]
    pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
    pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
    pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
    pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
    pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
    pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
    pcieport 0000:66:01.0: PCI bridge to [bus 67]
    pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
    pcieport 0000:66:01.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
    xe 0000:67:00.0: [drm] BAR2 resized to 16384MiB
    
    Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
+ /mt/dim checkpatch 3573339bb775e24c33992aa26fdf05e073943ac9 drm-intel
69242ef658ce PCI: Fix resizable bar fails due to bridge memory region
-:9: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#9: 
If I take a look at the topology, the GPU shares the memory region with a bridge,

total: 0 errors, 1 warnings, 0 checks, 28 lines checked



^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✓ CI.KUnit: success for PCI: Fix resizable bar fails due to bridge memory region
  2026-04-24 14:43 [PATCH] PCI: Fix resizable bar fails due to bridge memory region Maarten Lankhorst
  2026-04-24 14:48 ` ✗ CI.checkpatch: warning for " Patchwork
@ 2026-04-24 14:50 ` Patchwork
  2026-04-24 15:04 ` [PATCH] " Ilpo Järvinen
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-04-24 14:50 UTC (permalink / raw)
  To: Maarten Lankhorst; +Cc: intel-xe

== Series Details ==

Series: PCI: Fix resizable bar fails due to bridge memory region
URL   : https://patchwork.freedesktop.org/series/165435/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[14:48:52] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:48:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:49:27] Starting KUnit Kernel (1/1)...
[14:49:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:49:28] ================== guc_buf (11 subtests) ===================
[14:49:28] [PASSED] test_smallest
[14:49:28] [PASSED] test_largest
[14:49:28] [PASSED] test_granular
[14:49:28] [PASSED] test_unique
[14:49:28] [PASSED] test_overlap
[14:49:28] [PASSED] test_reusable
[14:49:28] [PASSED] test_too_big
[14:49:28] [PASSED] test_flush
[14:49:28] [PASSED] test_lookup
[14:49:28] [PASSED] test_data
[14:49:28] [PASSED] test_class
[14:49:28] ===================== [PASSED] guc_buf =====================
[14:49:28] =================== guc_dbm (7 subtests) ===================
[14:49:28] [PASSED] test_empty
[14:49:28] [PASSED] test_default
[14:49:28] ======================== test_size  ========================
[14:49:28] [PASSED] 4
[14:49:28] [PASSED] 8
[14:49:28] [PASSED] 32
[14:49:28] [PASSED] 256
[14:49:28] ==================== [PASSED] test_size ====================
[14:49:28] ======================= test_reuse  ========================
[14:49:28] [PASSED] 4
[14:49:28] [PASSED] 8
[14:49:28] [PASSED] 32
[14:49:28] [PASSED] 256
[14:49:28] =================== [PASSED] test_reuse ====================
[14:49:28] =================== test_range_overlap  ====================
[14:49:28] [PASSED] 4
[14:49:28] [PASSED] 8
[14:49:28] [PASSED] 32
[14:49:28] [PASSED] 256
[14:49:28] =============== [PASSED] test_range_overlap ================
[14:49:28] =================== test_range_compact  ====================
[14:49:28] [PASSED] 4
[14:49:28] [PASSED] 8
[14:49:28] [PASSED] 32
[14:49:28] [PASSED] 256
[14:49:28] =============== [PASSED] test_range_compact ================
[14:49:28] ==================== test_range_spare  =====================
[14:49:28] [PASSED] 4
[14:49:28] [PASSED] 8
[14:49:28] [PASSED] 32
[14:49:28] [PASSED] 256
[14:49:28] ================ [PASSED] test_range_spare =================
[14:49:28] ===================== [PASSED] guc_dbm =====================
[14:49:28] =================== guc_idm (6 subtests) ===================
[14:49:28] [PASSED] bad_init
[14:49:28] [PASSED] no_init
[14:49:28] [PASSED] init_fini
[14:49:28] [PASSED] check_used
[14:49:28] [PASSED] check_quota
[14:49:28] [PASSED] check_all
[14:49:28] ===================== [PASSED] guc_idm =====================
[14:49:28] ================== no_relay (3 subtests) ===================
[14:49:28] [PASSED] xe_drops_guc2pf_if_not_ready
[14:49:28] [PASSED] xe_drops_guc2vf_if_not_ready
[14:49:28] [PASSED] xe_rejects_send_if_not_ready
[14:49:28] ==================== [PASSED] no_relay =====================
[14:49:28] ================== pf_relay (14 subtests) ==================
[14:49:28] [PASSED] pf_rejects_guc2pf_too_short
[14:49:28] [PASSED] pf_rejects_guc2pf_too_long
[14:49:28] [PASSED] pf_rejects_guc2pf_no_payload
[14:49:28] [PASSED] pf_fails_no_payload
[14:49:28] [PASSED] pf_fails_bad_origin
[14:49:28] [PASSED] pf_fails_bad_type
[14:49:28] [PASSED] pf_txn_reports_error
[14:49:28] [PASSED] pf_txn_sends_pf2guc
[14:49:28] [PASSED] pf_sends_pf2guc
[14:49:28] [SKIPPED] pf_loopback_nop
[14:49:28] [SKIPPED] pf_loopback_echo
[14:49:28] [SKIPPED] pf_loopback_fail
[14:49:28] [SKIPPED] pf_loopback_busy
[14:49:28] [SKIPPED] pf_loopback_retry
[14:49:28] ==================== [PASSED] pf_relay =====================
[14:49:28] ================== vf_relay (3 subtests) ===================
[14:49:28] [PASSED] vf_rejects_guc2vf_too_short
[14:49:28] [PASSED] vf_rejects_guc2vf_too_long
[14:49:28] [PASSED] vf_rejects_guc2vf_no_payload
[14:49:28] ==================== [PASSED] vf_relay =====================
[14:49:28] ================ pf_gt_config (9 subtests) =================
[14:49:28] [PASSED] fair_contexts_1vf
[14:49:28] [PASSED] fair_doorbells_1vf
[14:49:28] [PASSED] fair_ggtt_1vf
[14:49:28] ====================== fair_vram_1vf  ======================
[14:49:28] [PASSED] 3.50 GiB
[14:49:28] [PASSED] 11.5 GiB
[14:49:28] [PASSED] 15.5 GiB
[14:49:28] [PASSED] 31.5 GiB
[14:49:28] [PASSED] 63.5 GiB
[14:49:28] [PASSED] 1.91 GiB
[14:49:28] ================== [PASSED] fair_vram_1vf ==================
[14:49:28] ================ fair_vram_1vf_admin_only  =================
[14:49:28] [PASSED] 3.50 GiB
[14:49:28] [PASSED] 11.5 GiB
[14:49:28] [PASSED] 15.5 GiB
[14:49:28] [PASSED] 31.5 GiB
[14:49:28] [PASSED] 63.5 GiB
[14:49:28] [PASSED] 1.91 GiB
[14:49:28] ============ [PASSED] fair_vram_1vf_admin_only =============
[14:49:28] ====================== fair_contexts  ======================
[14:49:28] [PASSED] 1 VF
[14:49:28] [PASSED] 2 VFs
[14:49:28] [PASSED] 3 VFs
[14:49:28] [PASSED] 4 VFs
[14:49:28] [PASSED] 5 VFs
[14:49:28] [PASSED] 6 VFs
[14:49:28] [PASSED] 7 VFs
[14:49:28] [PASSED] 8 VFs
[14:49:28] [PASSED] 9 VFs
[14:49:28] [PASSED] 10 VFs
[14:49:28] [PASSED] 11 VFs
[14:49:28] [PASSED] 12 VFs
[14:49:28] [PASSED] 13 VFs
[14:49:28] [PASSED] 14 VFs
[14:49:28] [PASSED] 15 VFs
[14:49:28] [PASSED] 16 VFs
[14:49:28] [PASSED] 17 VFs
[14:49:28] [PASSED] 18 VFs
[14:49:28] [PASSED] 19 VFs
[14:49:28] [PASSED] 20 VFs
[14:49:28] [PASSED] 21 VFs
[14:49:28] [PASSED] 22 VFs
[14:49:28] [PASSED] 23 VFs
[14:49:28] [PASSED] 24 VFs
[14:49:28] [PASSED] 25 VFs
[14:49:28] [PASSED] 26 VFs
[14:49:28] [PASSED] 27 VFs
[14:49:28] [PASSED] 28 VFs
[14:49:28] [PASSED] 29 VFs
[14:49:28] [PASSED] 30 VFs
[14:49:28] [PASSED] 31 VFs
[14:49:28] [PASSED] 32 VFs
[14:49:28] [PASSED] 33 VFs
[14:49:28] [PASSED] 34 VFs
[14:49:28] [PASSED] 35 VFs
[14:49:28] [PASSED] 36 VFs
[14:49:28] [PASSED] 37 VFs
[14:49:28] [PASSED] 38 VFs
[14:49:28] [PASSED] 39 VFs
[14:49:28] [PASSED] 40 VFs
[14:49:28] [PASSED] 41 VFs
[14:49:28] [PASSED] 42 VFs
[14:49:28] [PASSED] 43 VFs
[14:49:28] [PASSED] 44 VFs
[14:49:28] [PASSED] 45 VFs
[14:49:28] [PASSED] 46 VFs
[14:49:28] [PASSED] 47 VFs
[14:49:28] [PASSED] 48 VFs
[14:49:28] [PASSED] 49 VFs
[14:49:28] [PASSED] 50 VFs
[14:49:28] [PASSED] 51 VFs
[14:49:28] [PASSED] 52 VFs
[14:49:28] [PASSED] 53 VFs
[14:49:28] [PASSED] 54 VFs
[14:49:28] [PASSED] 55 VFs
[14:49:28] [PASSED] 56 VFs
[14:49:28] [PASSED] 57 VFs
[14:49:28] [PASSED] 58 VFs
[14:49:28] [PASSED] 59 VFs
[14:49:28] [PASSED] 60 VFs
[14:49:28] [PASSED] 61 VFs
[14:49:28] [PASSED] 62 VFs
[14:49:28] [PASSED] 63 VFs
[14:49:28] ================== [PASSED] fair_contexts ==================
[14:49:28] ===================== fair_doorbells  ======================
[14:49:28] [PASSED] 1 VF
[14:49:28] [PASSED] 2 VFs
[14:49:28] [PASSED] 3 VFs
[14:49:28] [PASSED] 4 VFs
[14:49:28] [PASSED] 5 VFs
[14:49:28] [PASSED] 6 VFs
[14:49:28] [PASSED] 7 VFs
[14:49:28] [PASSED] 8 VFs
[14:49:28] [PASSED] 9 VFs
[14:49:28] [PASSED] 10 VFs
[14:49:28] [PASSED] 11 VFs
[14:49:28] [PASSED] 12 VFs
[14:49:28] [PASSED] 13 VFs
[14:49:28] [PASSED] 14 VFs
[14:49:28] [PASSED] 15 VFs
[14:49:28] [PASSED] 16 VFs
[14:49:28] [PASSED] 17 VFs
[14:49:28] [PASSED] 18 VFs
[14:49:28] [PASSED] 19 VFs
[14:49:28] [PASSED] 20 VFs
[14:49:28] [PASSED] 21 VFs
[14:49:28] [PASSED] 22 VFs
[14:49:28] [PASSED] 23 VFs
[14:49:28] [PASSED] 24 VFs
[14:49:28] [PASSED] 25 VFs
[14:49:28] [PASSED] 26 VFs
[14:49:28] [PASSED] 27 VFs
[14:49:28] [PASSED] 28 VFs
[14:49:28] [PASSED] 29 VFs
[14:49:28] [PASSED] 30 VFs
[14:49:28] [PASSED] 31 VFs
[14:49:28] [PASSED] 32 VFs
[14:49:28] [PASSED] 33 VFs
[14:49:28] [PASSED] 34 VFs
[14:49:28] [PASSED] 35 VFs
[14:49:28] [PASSED] 36 VFs
[14:49:28] [PASSED] 37 VFs
[14:49:28] [PASSED] 38 VFs
[14:49:28] [PASSED] 39 VFs
[14:49:28] [PASSED] 40 VFs
[14:49:28] [PASSED] 41 VFs
[14:49:28] [PASSED] 42 VFs
[14:49:28] [PASSED] 43 VFs
[14:49:28] [PASSED] 44 VFs
[14:49:28] [PASSED] 45 VFs
[14:49:28] [PASSED] 46 VFs
[14:49:28] [PASSED] 47 VFs
[14:49:28] [PASSED] 48 VFs
[14:49:28] [PASSED] 49 VFs
[14:49:28] [PASSED] 50 VFs
[14:49:28] [PASSED] 51 VFs
[14:49:28] [PASSED] 52 VFs
[14:49:28] [PASSED] 53 VFs
[14:49:28] [PASSED] 54 VFs
[14:49:28] [PASSED] 55 VFs
[14:49:28] [PASSED] 56 VFs
[14:49:28] [PASSED] 57 VFs
[14:49:28] [PASSED] 58 VFs
[14:49:28] [PASSED] 59 VFs
[14:49:28] [PASSED] 60 VFs
[14:49:28] [PASSED] 61 VFs
[14:49:28] [PASSED] 62 VFs
[14:49:28] [PASSED] 63 VFs
[14:49:28] ================= [PASSED] fair_doorbells ==================
[14:49:28] ======================== fair_ggtt  ========================
[14:49:28] [PASSED] 1 VF
[14:49:28] [PASSED] 2 VFs
[14:49:28] [PASSED] 3 VFs
[14:49:28] [PASSED] 4 VFs
[14:49:28] [PASSED] 5 VFs
[14:49:28] [PASSED] 6 VFs
[14:49:28] [PASSED] 7 VFs
[14:49:28] [PASSED] 8 VFs
[14:49:28] [PASSED] 9 VFs
[14:49:28] [PASSED] 10 VFs
[14:49:28] [PASSED] 11 VFs
[14:49:28] [PASSED] 12 VFs
[14:49:28] [PASSED] 13 VFs
[14:49:28] [PASSED] 14 VFs
[14:49:28] [PASSED] 15 VFs
[14:49:28] [PASSED] 16 VFs
[14:49:28] [PASSED] 17 VFs
[14:49:28] [PASSED] 18 VFs
[14:49:28] [PASSED] 19 VFs
[14:49:28] [PASSED] 20 VFs
[14:49:28] [PASSED] 21 VFs
[14:49:28] [PASSED] 22 VFs
[14:49:28] [PASSED] 23 VFs
[14:49:28] [PASSED] 24 VFs
[14:49:28] [PASSED] 25 VFs
[14:49:28] [PASSED] 26 VFs
[14:49:28] [PASSED] 27 VFs
[14:49:28] [PASSED] 28 VFs
[14:49:28] [PASSED] 29 VFs
[14:49:28] [PASSED] 30 VFs
[14:49:28] [PASSED] 31 VFs
[14:49:28] [PASSED] 32 VFs
[14:49:28] [PASSED] 33 VFs
[14:49:28] [PASSED] 34 VFs
[14:49:28] [PASSED] 35 VFs
[14:49:28] [PASSED] 36 VFs
[14:49:28] [PASSED] 37 VFs
[14:49:28] [PASSED] 38 VFs
[14:49:28] [PASSED] 39 VFs
[14:49:28] [PASSED] 40 VFs
[14:49:28] [PASSED] 41 VFs
[14:49:28] [PASSED] 42 VFs
[14:49:28] [PASSED] 43 VFs
[14:49:28] [PASSED] 44 VFs
[14:49:28] [PASSED] 45 VFs
[14:49:28] [PASSED] 46 VFs
[14:49:28] [PASSED] 47 VFs
[14:49:28] [PASSED] 48 VFs
[14:49:28] [PASSED] 49 VFs
[14:49:28] [PASSED] 50 VFs
[14:49:28] [PASSED] 51 VFs
[14:49:28] [PASSED] 52 VFs
[14:49:28] [PASSED] 53 VFs
[14:49:28] [PASSED] 54 VFs
[14:49:28] [PASSED] 55 VFs
[14:49:28] [PASSED] 56 VFs
[14:49:28] [PASSED] 57 VFs
[14:49:28] [PASSED] 58 VFs
[14:49:28] [PASSED] 59 VFs
[14:49:28] [PASSED] 60 VFs
[14:49:28] [PASSED] 61 VFs
[14:49:28] [PASSED] 62 VFs
[14:49:28] [PASSED] 63 VFs
[14:49:28] ==================== [PASSED] fair_ggtt ====================
[14:49:28] ======================== fair_vram  ========================
[14:49:28] [PASSED] 1 VF
[14:49:28] [PASSED] 2 VFs
[14:49:28] [PASSED] 3 VFs
[14:49:28] [PASSED] 4 VFs
[14:49:28] [PASSED] 5 VFs
[14:49:28] [PASSED] 6 VFs
[14:49:28] [PASSED] 7 VFs
[14:49:28] [PASSED] 8 VFs
[14:49:28] [PASSED] 9 VFs
[14:49:28] [PASSED] 10 VFs
[14:49:28] [PASSED] 11 VFs
[14:49:28] [PASSED] 12 VFs
[14:49:28] [PASSED] 13 VFs
[14:49:28] [PASSED] 14 VFs
[14:49:28] [PASSED] 15 VFs
[14:49:28] [PASSED] 16 VFs
[14:49:28] [PASSED] 17 VFs
[14:49:28] [PASSED] 18 VFs
[14:49:28] [PASSED] 19 VFs
[14:49:28] [PASSED] 20 VFs
[14:49:28] [PASSED] 21 VFs
[14:49:28] [PASSED] 22 VFs
[14:49:28] [PASSED] 23 VFs
[14:49:28] [PASSED] 24 VFs
[14:49:28] [PASSED] 25 VFs
[14:49:28] [PASSED] 26 VFs
[14:49:28] [PASSED] 27 VFs
[14:49:28] [PASSED] 28 VFs
[14:49:28] [PASSED] 29 VFs
[14:49:28] [PASSED] 30 VFs
[14:49:28] [PASSED] 31 VFs
[14:49:28] [PASSED] 32 VFs
[14:49:28] [PASSED] 33 VFs
[14:49:28] [PASSED] 34 VFs
[14:49:28] [PASSED] 35 VFs
[14:49:28] [PASSED] 36 VFs
[14:49:28] [PASSED] 37 VFs
[14:49:28] [PASSED] 38 VFs
[14:49:28] [PASSED] 39 VFs
[14:49:28] [PASSED] 40 VFs
[14:49:28] [PASSED] 41 VFs
[14:49:28] [PASSED] 42 VFs
[14:49:28] [PASSED] 43 VFs
[14:49:28] [PASSED] 44 VFs
[14:49:28] [PASSED] 45 VFs
[14:49:28] [PASSED] 46 VFs
[14:49:28] [PASSED] 47 VFs
[14:49:28] [PASSED] 48 VFs
[14:49:28] [PASSED] 49 VFs
[14:49:28] [PASSED] 50 VFs
[14:49:28] [PASSED] 51 VFs
[14:49:28] [PASSED] 52 VFs
[14:49:28] [PASSED] 53 VFs
[14:49:28] [PASSED] 54 VFs
[14:49:28] [PASSED] 55 VFs
[14:49:28] [PASSED] 56 VFs
[14:49:28] [PASSED] 57 VFs
[14:49:28] [PASSED] 58 VFs
[14:49:28] [PASSED] 59 VFs
[14:49:28] [PASSED] 60 VFs
[14:49:28] [PASSED] 61 VFs
[14:49:28] [PASSED] 62 VFs
[14:49:28] [PASSED] 63 VFs
[14:49:28] ==================== [PASSED] fair_vram ====================
[14:49:28] ================== [PASSED] pf_gt_config ===================
[14:49:28] ===================== lmtt (1 subtest) =====================
[14:49:28] ======================== test_ops  =========================
[14:49:28] [PASSED] 2-level
[14:49:28] [PASSED] multi-level
[14:49:28] ==================== [PASSED] test_ops =====================
[14:49:28] ====================== [PASSED] lmtt =======================
[14:49:28] ================= pf_service (11 subtests) =================
[14:49:28] [PASSED] pf_negotiate_any
[14:49:28] [PASSED] pf_negotiate_base_match
[14:49:28] [PASSED] pf_negotiate_base_newer
[14:49:28] [PASSED] pf_negotiate_base_next
[14:49:28] [SKIPPED] pf_negotiate_base_older
[14:49:28] [PASSED] pf_negotiate_base_prev
[14:49:28] [PASSED] pf_negotiate_latest_match
[14:49:28] [PASSED] pf_negotiate_latest_newer
[14:49:28] [PASSED] pf_negotiate_latest_next
[14:49:28] [SKIPPED] pf_negotiate_latest_older
[14:49:28] [SKIPPED] pf_negotiate_latest_prev
[14:49:28] =================== [PASSED] pf_service ====================
[14:49:28] ================= xe_guc_g2g (2 subtests) ==================
[14:49:28] ============== xe_live_guc_g2g_kunit_default  ==============
[14:49:28] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[14:49:28] ============== xe_live_guc_g2g_kunit_allmem  ===============
[14:49:28] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[14:49:28] =================== [SKIPPED] xe_guc_g2g ===================
[14:49:28] =================== xe_mocs (2 subtests) ===================
[14:49:28] ================ xe_live_mocs_kernel_kunit  ================
[14:49:28] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[14:49:28] ================ xe_live_mocs_reset_kunit  =================
[14:49:28] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[14:49:28] ==================== [SKIPPED] xe_mocs =====================
[14:49:28] ================= xe_migrate (2 subtests) ==================
[14:49:28] ================= xe_migrate_sanity_kunit  =================
[14:49:28] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[14:49:28] ================== xe_validate_ccs_kunit  ==================
[14:49:28] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[14:49:28] =================== [SKIPPED] xe_migrate ===================
[14:49:28] ================== xe_dma_buf (1 subtest) ==================
[14:49:28] ==================== xe_dma_buf_kunit  =====================
[14:49:28] ================ [SKIPPED] xe_dma_buf_kunit ================
[14:49:28] =================== [SKIPPED] xe_dma_buf ===================
[14:49:28] ================= xe_bo_shrink (1 subtest) =================
[14:49:28] =================== xe_bo_shrink_kunit  ====================
[14:49:28] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[14:49:28] ================== [SKIPPED] xe_bo_shrink ==================
[14:49:28] ==================== xe_bo (2 subtests) ====================
[14:49:28] ================== xe_ccs_migrate_kunit  ===================
[14:49:28] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[14:49:28] ==================== xe_bo_evict_kunit  ====================
[14:49:28] =============== [SKIPPED] xe_bo_evict_kunit ================
[14:49:28] ===================== [SKIPPED] xe_bo ======================
[14:49:28] ==================== args (13 subtests) ====================
[14:49:28] [PASSED] count_args_test
[14:49:28] [PASSED] call_args_example
[14:49:28] [PASSED] call_args_test
[14:49:28] [PASSED] drop_first_arg_example
[14:49:28] [PASSED] drop_first_arg_test
[14:49:28] [PASSED] first_arg_example
[14:49:28] [PASSED] first_arg_test
[14:49:28] [PASSED] last_arg_example
[14:49:28] [PASSED] last_arg_test
[14:49:28] [PASSED] pick_arg_example
[14:49:28] [PASSED] if_args_example
[14:49:28] [PASSED] if_args_test
[14:49:28] [PASSED] sep_comma_example
[14:49:28] ====================== [PASSED] args =======================
[14:49:28] =================== xe_pci (3 subtests) ====================
[14:49:28] ==================== check_graphics_ip  ====================
[14:49:28] [PASSED] 12.00 Xe_LP
[14:49:28] [PASSED] 12.10 Xe_LP+
[14:49:28] [PASSED] 12.55 Xe_HPG
[14:49:28] [PASSED] 12.60 Xe_HPC
[14:49:28] [PASSED] 12.70 Xe_LPG
[14:49:28] [PASSED] 12.71 Xe_LPG
[14:49:28] [PASSED] 12.74 Xe_LPG+
[14:49:28] [PASSED] 20.01 Xe2_HPG
[14:49:28] [PASSED] 20.02 Xe2_HPG
[14:49:28] [PASSED] 20.04 Xe2_LPG
[14:49:28] [PASSED] 30.00 Xe3_LPG
[14:49:28] [PASSED] 30.01 Xe3_LPG
[14:49:28] [PASSED] 30.03 Xe3_LPG
[14:49:28] [PASSED] 30.04 Xe3_LPG
[14:49:28] [PASSED] 30.05 Xe3_LPG
[14:49:28] [PASSED] 35.10 Xe3p_LPG
[14:49:28] [PASSED] 35.11 Xe3p_XPC
[14:49:28] ================ [PASSED] check_graphics_ip ================
[14:49:28] ===================== check_media_ip  ======================
[14:49:28] [PASSED] 12.00 Xe_M
[14:49:28] [PASSED] 12.55 Xe_HPM
[14:49:28] [PASSED] 13.00 Xe_LPM+
[14:49:28] [PASSED] 13.01 Xe2_HPM
[14:49:28] [PASSED] 20.00 Xe2_LPM
[14:49:28] [PASSED] 30.00 Xe3_LPM
[14:49:28] [PASSED] 30.02 Xe3_LPM
[14:49:28] [PASSED] 35.00 Xe3p_LPM
[14:49:28] [PASSED] 35.03 Xe3p_HPM
[14:49:28] ================= [PASSED] check_media_ip ==================
[14:49:28] =================== check_platform_desc  ===================
[14:49:28] [PASSED] 0x9A60 (TIGERLAKE)
[14:49:28] [PASSED] 0x9A68 (TIGERLAKE)
[14:49:28] [PASSED] 0x9A70 (TIGERLAKE)
[14:49:28] [PASSED] 0x9A40 (TIGERLAKE)
[14:49:28] [PASSED] 0x9A49 (TIGERLAKE)
[14:49:28] [PASSED] 0x9A59 (TIGERLAKE)
[14:49:28] [PASSED] 0x9A78 (TIGERLAKE)
[14:49:28] [PASSED] 0x9AC0 (TIGERLAKE)
[14:49:28] [PASSED] 0x9AC9 (TIGERLAKE)
[14:49:28] [PASSED] 0x9AD9 (TIGERLAKE)
[14:49:28] [PASSED] 0x9AF8 (TIGERLAKE)
[14:49:28] [PASSED] 0x4C80 (ROCKETLAKE)
[14:49:28] [PASSED] 0x4C8A (ROCKETLAKE)
[14:49:28] [PASSED] 0x4C8B (ROCKETLAKE)
[14:49:28] [PASSED] 0x4C8C (ROCKETLAKE)
[14:49:28] [PASSED] 0x4C90 (ROCKETLAKE)
[14:49:28] [PASSED] 0x4C9A (ROCKETLAKE)
[14:49:28] [PASSED] 0x4680 (ALDERLAKE_S)
[14:49:28] [PASSED] 0x4682 (ALDERLAKE_S)
[14:49:28] [PASSED] 0x4688 (ALDERLAKE_S)
[14:49:28] [PASSED] 0x468A (ALDERLAKE_S)
[14:49:28] [PASSED] 0x468B (ALDERLAKE_S)
[14:49:28] [PASSED] 0x4690 (ALDERLAKE_S)
[14:49:28] [PASSED] 0x4692 (ALDERLAKE_S)
[14:49:28] [PASSED] 0x4693 (ALDERLAKE_S)
[14:49:28] [PASSED] 0x46A0 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46A1 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46A2 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46A3 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46A6 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46A8 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46AA (ALDERLAKE_P)
[14:49:28] [PASSED] 0x462A (ALDERLAKE_P)
[14:49:28] [PASSED] 0x4626 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x4628 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46B0 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46B1 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46B2 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46B3 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46C0 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46C1 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46C2 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46C3 (ALDERLAKE_P)
[14:49:28] [PASSED] 0x46D0 (ALDERLAKE_N)
[14:49:28] [PASSED] 0x46D1 (ALDERLAKE_N)
[14:49:28] [PASSED] 0x46D2 (ALDERLAKE_N)
[14:49:28] [PASSED] 0x46D3 (ALDERLAKE_N)
[14:49:28] [PASSED] 0x46D4 (ALDERLAKE_N)
[14:49:28] [PASSED] 0xA721 (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA7A1 (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA7A9 (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA7AC (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA7AD (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA720 (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA7A0 (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA7A8 (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA7AA (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA7AB (ALDERLAKE_P)
[14:49:28] [PASSED] 0xA780 (ALDERLAKE_S)
[14:49:28] [PASSED] 0xA781 (ALDERLAKE_S)
[14:49:28] [PASSED] 0xA782 (ALDERLAKE_S)
[14:49:28] [PASSED] 0xA783 (ALDERLAKE_S)
[14:49:28] [PASSED] 0xA788 (ALDERLAKE_S)
[14:49:28] [PASSED] 0xA789 (ALDERLAKE_S)
[14:49:28] [PASSED] 0xA78A (ALDERLAKE_S)
[14:49:28] [PASSED] 0xA78B (ALDERLAKE_S)
[14:49:28] [PASSED] 0x4905 (DG1)
[14:49:28] [PASSED] 0x4906 (DG1)
[14:49:28] [PASSED] 0x4907 (DG1)
[14:49:28] [PASSED] 0x4908 (DG1)
[14:49:28] [PASSED] 0x4909 (DG1)
[14:49:28] [PASSED] 0x56C0 (DG2)
[14:49:28] [PASSED] 0x56C2 (DG2)
[14:49:28] [PASSED] 0x56C1 (DG2)
[14:49:28] [PASSED] 0x7D51 (METEORLAKE)
[14:49:28] [PASSED] 0x7DD1 (METEORLAKE)
[14:49:28] [PASSED] 0x7D41 (METEORLAKE)
[14:49:28] [PASSED] 0x7D67 (METEORLAKE)
[14:49:28] [PASSED] 0xB640 (METEORLAKE)
[14:49:28] [PASSED] 0x56A0 (DG2)
[14:49:28] [PASSED] 0x56A1 (DG2)
[14:49:28] [PASSED] 0x56A2 (DG2)
[14:49:28] [PASSED] 0x56BE (DG2)
[14:49:28] [PASSED] 0x56BF (DG2)
[14:49:28] [PASSED] 0x5690 (DG2)
[14:49:28] [PASSED] 0x5691 (DG2)
[14:49:28] [PASSED] 0x5692 (DG2)
[14:49:28] [PASSED] 0x56A5 (DG2)
[14:49:28] [PASSED] 0x56A6 (DG2)
[14:49:28] [PASSED] 0x56B0 (DG2)
[14:49:28] [PASSED] 0x56B1 (DG2)
[14:49:28] [PASSED] 0x56BA (DG2)
[14:49:28] [PASSED] 0x56BB (DG2)
[14:49:28] [PASSED] 0x56BC (DG2)
[14:49:28] [PASSED] 0x56BD (DG2)
[14:49:28] [PASSED] 0x5693 (DG2)
[14:49:28] [PASSED] 0x5694 (DG2)
[14:49:28] [PASSED] 0x5695 (DG2)
[14:49:28] [PASSED] 0x56A3 (DG2)
[14:49:28] [PASSED] 0x56A4 (DG2)
[14:49:28] [PASSED] 0x56B2 (DG2)
[14:49:28] [PASSED] 0x56B3 (DG2)
[14:49:28] [PASSED] 0x5696 (DG2)
[14:49:28] [PASSED] 0x5697 (DG2)
[14:49:28] [PASSED] 0xB69 (PVC)
[14:49:28] [PASSED] 0xB6E (PVC)
[14:49:28] [PASSED] 0xBD4 (PVC)
[14:49:28] [PASSED] 0xBD5 (PVC)
[14:49:28] [PASSED] 0xBD6 (PVC)
[14:49:28] [PASSED] 0xBD7 (PVC)
[14:49:28] [PASSED] 0xBD8 (PVC)
[14:49:28] [PASSED] 0xBD9 (PVC)
[14:49:28] [PASSED] 0xBDA (PVC)
[14:49:28] [PASSED] 0xBDB (PVC)
[14:49:28] [PASSED] 0xBE0 (PVC)
[14:49:28] [PASSED] 0xBE1 (PVC)
[14:49:28] [PASSED] 0xBE5 (PVC)
[14:49:28] [PASSED] 0x7D40 (METEORLAKE)
[14:49:28] [PASSED] 0x7D45 (METEORLAKE)
[14:49:28] [PASSED] 0x7D55 (METEORLAKE)
[14:49:28] [PASSED] 0x7D60 (METEORLAKE)
[14:49:28] [PASSED] 0x7DD5 (METEORLAKE)
[14:49:28] [PASSED] 0x6420 (LUNARLAKE)
[14:49:28] [PASSED] 0x64A0 (LUNARLAKE)
[14:49:28] [PASSED] 0x64B0 (LUNARLAKE)
[14:49:28] [PASSED] 0xE202 (BATTLEMAGE)
[14:49:28] [PASSED] 0xE209 (BATTLEMAGE)
[14:49:28] [PASSED] 0xE20B (BATTLEMAGE)
[14:49:28] [PASSED] 0xE20C (BATTLEMAGE)
[14:49:28] [PASSED] 0xE20D (BATTLEMAGE)
[14:49:28] [PASSED] 0xE210 (BATTLEMAGE)
[14:49:28] [PASSED] 0xE211 (BATTLEMAGE)
[14:49:28] [PASSED] 0xE212 (BATTLEMAGE)
[14:49:28] [PASSED] 0xE216 (BATTLEMAGE)
[14:49:28] [PASSED] 0xE220 (BATTLEMAGE)
[14:49:28] [PASSED] 0xE221 (BATTLEMAGE)
[14:49:28] [PASSED] 0xE222 (BATTLEMAGE)
[14:49:28] [PASSED] 0xE223 (BATTLEMAGE)
[14:49:28] [PASSED] 0xB080 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB081 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB082 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB083 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB084 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB085 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB086 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB087 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB08F (PANTHERLAKE)
[14:49:28] [PASSED] 0xB090 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB0A0 (PANTHERLAKE)
[14:49:28] [PASSED] 0xB0B0 (PANTHERLAKE)
[14:49:28] [PASSED] 0xFD80 (PANTHERLAKE)
[14:49:28] [PASSED] 0xFD81 (PANTHERLAKE)
[14:49:28] [PASSED] 0xD740 (NOVALAKE_S)
[14:49:28] [PASSED] 0xD741 (NOVALAKE_S)
[14:49:28] [PASSED] 0xD742 (NOVALAKE_S)
[14:49:28] [PASSED] 0xD743 (NOVALAKE_S)
[14:49:28] [PASSED] 0xD744 (NOVALAKE_S)
[14:49:28] [PASSED] 0xD745 (NOVALAKE_S)
[14:49:28] [PASSED] 0x674C (CRESCENTISLAND)
[14:49:28] [PASSED] 0xD750 (NOVALAKE_P)
[14:49:28] [PASSED] 0xD751 (NOVALAKE_P)
[14:49:28] [PASSED] 0xD752 (NOVALAKE_P)
[14:49:28] [PASSED] 0xD753 (NOVALAKE_P)
[14:49:28] [PASSED] 0xD754 (NOVALAKE_P)
[14:49:28] [PASSED] 0xD755 (NOVALAKE_P)
[14:49:28] [PASSED] 0xD756 (NOVALAKE_P)
[14:49:28] [PASSED] 0xD757 (NOVALAKE_P)
[14:49:28] [PASSED] 0xD75F (NOVALAKE_P)
[14:49:28] =============== [PASSED] check_platform_desc ===============
[14:49:28] ===================== [PASSED] xe_pci ======================
[14:49:28] =================== xe_rtp (2 subtests) ====================
[14:49:28] =============== xe_rtp_process_to_sr_tests  ================
[14:49:28] [PASSED] coalesce-same-reg
[14:49:28] [PASSED] no-match-no-add
[14:49:28] [PASSED] match-or
[14:49:28] [PASSED] match-or-xfail
[14:49:28] [PASSED] no-match-no-add-multiple-rules
[14:49:28] [PASSED] two-regs-two-entries
[14:49:28] [PASSED] clr-one-set-other
[14:49:28] [PASSED] set-field
[14:49:28] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[14:49:28] [PASSED] conflict-not-disjoint
[14:49:28] [PASSED] conflict-reg-type
[14:49:28] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[14:49:28] ================== xe_rtp_process_tests  ===================
[14:49:28] [PASSED] active1
[14:49:28] [PASSED] active2
[14:49:28] [PASSED] active-inactive
[14:49:28] [PASSED] inactive-active
[14:49:28] [PASSED] inactive-1st_or_active-inactive
[14:49:28] [PASSED] inactive-2nd_or_active-inactive
[14:49:28] [PASSED] inactive-last_or_active-inactive
[14:49:28] [PASSED] inactive-no_or_active-inactive
[14:49:28] ============== [PASSED] xe_rtp_process_tests ===============
[14:49:28] ===================== [PASSED] xe_rtp ======================
[14:49:28] ==================== xe_wa (1 subtest) =====================
[14:49:28] ======================== xe_wa_gt  =========================
[14:49:28] [PASSED] TIGERLAKE B0
[14:49:28] [PASSED] DG1 A0
[14:49:28] [PASSED] DG1 B0
[14:49:28] [PASSED] ALDERLAKE_S A0
[14:49:28] [PASSED] ALDERLAKE_S B0
[14:49:28] [PASSED] ALDERLAKE_S C0
[14:49:28] [PASSED] ALDERLAKE_S D0
[14:49:28] [PASSED] ALDERLAKE_P A0
[14:49:28] [PASSED] ALDERLAKE_P B0
[14:49:28] [PASSED] ALDERLAKE_P C0
[14:49:28] [PASSED] ALDERLAKE_S RPLS D0
[14:49:28] [PASSED] ALDERLAKE_P RPLU E0
[14:49:28] [PASSED] DG2 G10 C0
[14:49:28] [PASSED] DG2 G11 B1
[14:49:28] [PASSED] DG2 G12 A1
[14:49:28] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:49:28] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:49:28] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[14:49:28] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[14:49:28] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[14:49:28] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[14:49:28] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[14:49:28] ==================== [PASSED] xe_wa_gt =====================
[14:49:28] ====================== [PASSED] xe_wa ======================
[14:49:28] ============================================================
[14:49:28] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[14:49:28] Elapsed time: 35.593s total, 4.211s configuring, 30.764s building, 0.605s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[14:49:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:49:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:49:54] Starting KUnit Kernel (1/1)...
[14:49:54] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:49:54] ============ drm_test_pick_cmdline (2 subtests) ============
[14:49:54] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[14:49:54] =============== drm_test_pick_cmdline_named  ===============
[14:49:54] [PASSED] NTSC
[14:49:54] [PASSED] NTSC-J
[14:49:54] [PASSED] PAL
[14:49:54] [PASSED] PAL-M
[14:49:54] =========== [PASSED] drm_test_pick_cmdline_named ===========
[14:49:54] ============== [PASSED] drm_test_pick_cmdline ==============
[14:49:54] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[14:49:54] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[14:49:54] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[14:49:54] =========== drm_validate_clone_mode (2 subtests) ===========
[14:49:54] ============== drm_test_check_in_clone_mode  ===============
[14:49:54] [PASSED] in_clone_mode
[14:49:54] [PASSED] not_in_clone_mode
[14:49:54] ========== [PASSED] drm_test_check_in_clone_mode ===========
[14:49:54] =============== drm_test_check_valid_clones  ===============
[14:49:54] [PASSED] not_in_clone_mode
[14:49:54] [PASSED] valid_clone
[14:49:54] [PASSED] invalid_clone
[14:49:54] =========== [PASSED] drm_test_check_valid_clones ===========
[14:49:54] ============= [PASSED] drm_validate_clone_mode =============
[14:49:54] ============= drm_validate_modeset (1 subtest) =============
[14:49:54] [PASSED] drm_test_check_connector_changed_modeset
[14:49:54] ============== [PASSED] drm_validate_modeset ===============
[14:49:54] ====== drm_test_bridge_get_current_state (2 subtests) ======
[14:49:54] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[14:49:54] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[14:49:54] ======== [PASSED] drm_test_bridge_get_current_state ========
[14:49:54] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[14:49:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[14:49:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[14:49:54] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[14:49:54] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[14:49:54] ============== drm_bridge_alloc (2 subtests) ===============
[14:49:54] [PASSED] drm_test_drm_bridge_alloc_basic
[14:49:54] [PASSED] drm_test_drm_bridge_alloc_get_put
[14:49:54] ================ [PASSED] drm_bridge_alloc =================
[14:49:54] ============= drm_cmdline_parser (40 subtests) =============
[14:49:54] [PASSED] drm_test_cmdline_force_d_only
[14:49:54] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:49:54] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:49:54] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:49:54] [PASSED] drm_test_cmdline_force_e_only
[14:49:54] [PASSED] drm_test_cmdline_res
[14:49:54] [PASSED] drm_test_cmdline_res_vesa
[14:49:54] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:49:54] [PASSED] drm_test_cmdline_res_rblank
[14:49:54] [PASSED] drm_test_cmdline_res_bpp
[14:49:54] [PASSED] drm_test_cmdline_res_refresh
[14:49:54] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:49:54] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:49:54] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:49:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:49:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:49:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:49:54] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:49:54] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:49:54] [PASSED] drm_test_cmdline_res_margins_force_on
[14:49:54] [PASSED] drm_test_cmdline_res_vesa_margins
[14:49:54] [PASSED] drm_test_cmdline_name
[14:49:54] [PASSED] drm_test_cmdline_name_bpp
[14:49:54] [PASSED] drm_test_cmdline_name_option
[14:49:54] [PASSED] drm_test_cmdline_name_bpp_option
[14:49:54] [PASSED] drm_test_cmdline_rotate_0
[14:49:54] [PASSED] drm_test_cmdline_rotate_90
[14:49:54] [PASSED] drm_test_cmdline_rotate_180
[14:49:54] [PASSED] drm_test_cmdline_rotate_270
[14:49:54] [PASSED] drm_test_cmdline_hmirror
[14:49:54] [PASSED] drm_test_cmdline_vmirror
[14:49:54] [PASSED] drm_test_cmdline_margin_options
[14:49:54] [PASSED] drm_test_cmdline_multiple_options
[14:49:54] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:49:54] [PASSED] drm_test_cmdline_extra_and_option
[14:49:54] [PASSED] drm_test_cmdline_freestanding_options
[14:49:54] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:49:54] [PASSED] drm_test_cmdline_panel_orientation
[14:49:54] ================ drm_test_cmdline_invalid  =================
[14:49:54] [PASSED] margin_only
[14:49:54] [PASSED] interlace_only
[14:49:54] [PASSED] res_missing_x
[14:49:54] [PASSED] res_missing_y
[14:49:54] [PASSED] res_bad_y
[14:49:54] [PASSED] res_missing_y_bpp
[14:49:54] [PASSED] res_bad_bpp
[14:49:54] [PASSED] res_bad_refresh
[14:49:54] [PASSED] res_bpp_refresh_force_on_off
[14:49:54] [PASSED] res_invalid_mode
[14:49:54] [PASSED] res_bpp_wrong_place_mode
[14:49:54] [PASSED] name_bpp_refresh
[14:49:54] [PASSED] name_refresh
[14:49:54] [PASSED] name_refresh_wrong_mode
[14:49:54] [PASSED] name_refresh_invalid_mode
[14:49:54] [PASSED] rotate_multiple
[14:49:54] [PASSED] rotate_invalid_val
[14:49:54] [PASSED] rotate_truncated
[14:49:54] [PASSED] invalid_option
[14:49:54] [PASSED] invalid_tv_option
[14:49:54] [PASSED] truncated_tv_option
[14:49:54] ============ [PASSED] drm_test_cmdline_invalid =============
[14:49:54] =============== drm_test_cmdline_tv_options  ===============
[14:49:54] [PASSED] NTSC
[14:49:54] [PASSED] NTSC_443
[14:49:54] [PASSED] NTSC_J
[14:49:54] [PASSED] PAL
[14:49:54] [PASSED] PAL_M
[14:49:54] [PASSED] PAL_N
[14:49:54] [PASSED] SECAM
[14:49:54] [PASSED] MONO_525
[14:49:54] [PASSED] MONO_625
[14:49:54] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:49:54] =============== [PASSED] drm_cmdline_parser ================
[14:49:54] ========== drmm_connector_hdmi_init (20 subtests) ==========
[14:49:54] [PASSED] drm_test_connector_hdmi_init_valid
[14:49:54] [PASSED] drm_test_connector_hdmi_init_bpc_8
[14:49:54] [PASSED] drm_test_connector_hdmi_init_bpc_10
[14:49:54] [PASSED] drm_test_connector_hdmi_init_bpc_12
[14:49:54] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[14:49:54] [PASSED] drm_test_connector_hdmi_init_bpc_null
[14:49:54] [PASSED] drm_test_connector_hdmi_init_formats_empty
[14:49:54] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[14:49:54] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[14:49:54] [PASSED] supported_formats=0x9 yuv420_allowed=1
[14:49:54] [PASSED] supported_formats=0x9 yuv420_allowed=0
[14:49:54] [PASSED] supported_formats=0x5 yuv420_allowed=1
[14:49:54] [PASSED] supported_formats=0x5 yuv420_allowed=0
[14:49:54] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:49:54] [PASSED] drm_test_connector_hdmi_init_null_ddc
[14:49:54] [PASSED] drm_test_connector_hdmi_init_null_product
[14:49:54] [PASSED] drm_test_connector_hdmi_init_null_vendor
[14:49:54] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[14:49:54] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[14:49:54] [PASSED] drm_test_connector_hdmi_init_product_valid
[14:49:54] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[14:49:54] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[14:49:54] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[14:49:54] ========= drm_test_connector_hdmi_init_type_valid  =========
[14:49:54] [PASSED] HDMI-A
[14:49:54] [PASSED] HDMI-B
[14:49:54] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[14:49:54] ======== drm_test_connector_hdmi_init_type_invalid  ========
[14:49:54] [PASSED] Unknown
[14:49:54] [PASSED] VGA
[14:49:54] [PASSED] DVI-I
[14:49:54] [PASSED] DVI-D
[14:49:54] [PASSED] DVI-A
[14:49:54] [PASSED] Composite
[14:49:54] [PASSED] SVIDEO
[14:49:54] [PASSED] LVDS
[14:49:54] [PASSED] Component
[14:49:54] [PASSED] DIN
[14:49:54] [PASSED] DP
[14:49:54] [PASSED] TV
[14:49:54] [PASSED] eDP
[14:49:54] [PASSED] Virtual
[14:49:54] [PASSED] DSI
[14:49:54] [PASSED] DPI
[14:49:54] [PASSED] Writeback
[14:49:54] [PASSED] SPI
[14:49:54] [PASSED] USB
[14:49:54] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[14:49:54] ============ [PASSED] drmm_connector_hdmi_init =============
[14:49:54] ============= drmm_connector_init (3 subtests) =============
[14:49:54] [PASSED] drm_test_drmm_connector_init
[14:49:54] [PASSED] drm_test_drmm_connector_init_null_ddc
[14:49:54] ========= drm_test_drmm_connector_init_type_valid  =========
[14:49:54] [PASSED] Unknown
[14:49:54] [PASSED] VGA
[14:49:54] [PASSED] DVI-I
[14:49:54] [PASSED] DVI-D
[14:49:54] [PASSED] DVI-A
[14:49:54] [PASSED] Composite
[14:49:54] [PASSED] SVIDEO
[14:49:54] [PASSED] LVDS
[14:49:54] [PASSED] Component
[14:49:54] [PASSED] DIN
[14:49:54] [PASSED] DP
[14:49:54] [PASSED] HDMI-A
[14:49:54] [PASSED] HDMI-B
[14:49:54] [PASSED] TV
[14:49:54] [PASSED] eDP
[14:49:54] [PASSED] Virtual
[14:49:54] [PASSED] DSI
[14:49:54] [PASSED] DPI
[14:49:54] [PASSED] Writeback
[14:49:54] [PASSED] SPI
[14:49:54] [PASSED] USB
[14:49:54] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[14:49:54] =============== [PASSED] drmm_connector_init ===============
[14:49:54] ========= drm_connector_dynamic_init (6 subtests) ==========
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_init
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_init_properties
[14:49:54] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[14:49:54] [PASSED] Unknown
[14:49:54] [PASSED] VGA
[14:49:54] [PASSED] DVI-I
[14:49:54] [PASSED] DVI-D
[14:49:54] [PASSED] DVI-A
[14:49:54] [PASSED] Composite
[14:49:54] [PASSED] SVIDEO
[14:49:54] [PASSED] LVDS
[14:49:54] [PASSED] Component
[14:49:54] [PASSED] DIN
[14:49:54] [PASSED] DP
[14:49:54] [PASSED] HDMI-A
[14:49:54] [PASSED] HDMI-B
[14:49:54] [PASSED] TV
[14:49:54] [PASSED] eDP
[14:49:54] [PASSED] Virtual
[14:49:54] [PASSED] DSI
[14:49:54] [PASSED] DPI
[14:49:54] [PASSED] Writeback
[14:49:54] [PASSED] SPI
[14:49:54] [PASSED] USB
[14:49:54] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[14:49:54] ======== drm_test_drm_connector_dynamic_init_name  =========
[14:49:54] [PASSED] Unknown
[14:49:54] [PASSED] VGA
[14:49:54] [PASSED] DVI-I
[14:49:54] [PASSED] DVI-D
[14:49:54] [PASSED] DVI-A
[14:49:54] [PASSED] Composite
[14:49:54] [PASSED] SVIDEO
[14:49:54] [PASSED] LVDS
[14:49:54] [PASSED] Component
[14:49:54] [PASSED] DIN
[14:49:54] [PASSED] DP
[14:49:54] [PASSED] HDMI-A
[14:49:54] [PASSED] HDMI-B
[14:49:54] [PASSED] TV
[14:49:54] [PASSED] eDP
[14:49:54] [PASSED] Virtual
[14:49:54] [PASSED] DSI
[14:49:54] [PASSED] DPI
[14:49:54] [PASSED] Writeback
[14:49:54] [PASSED] SPI
[14:49:54] [PASSED] USB
[14:49:54] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[14:49:54] =========== [PASSED] drm_connector_dynamic_init ============
[14:49:54] ==== drm_connector_dynamic_register_early (4 subtests) =====
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[14:49:54] ====== [PASSED] drm_connector_dynamic_register_early =======
[14:49:54] ======= drm_connector_dynamic_register (7 subtests) ========
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[14:49:54] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[14:49:54] ========= [PASSED] drm_connector_dynamic_register ==========
[14:49:54] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[14:49:54] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[14:49:54] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[14:49:54] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[14:49:54] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[14:49:54] ========== drm_test_get_tv_mode_from_name_valid  ===========
[14:49:54] [PASSED] NTSC
[14:49:54] [PASSED] NTSC-443
[14:49:54] [PASSED] NTSC-J
[14:49:54] [PASSED] PAL
[14:49:54] [PASSED] PAL-M
[14:49:54] [PASSED] PAL-N
[14:49:54] [PASSED] SECAM
[14:49:54] [PASSED] Mono
[14:49:54] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:49:54] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:49:54] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:49:54] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[14:49:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[14:49:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[14:49:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[14:49:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[14:49:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[14:49:54] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[14:49:54] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[14:49:54] [PASSED] VIC 96
[14:49:54] [PASSED] VIC 97
[14:49:54] [PASSED] VIC 101
[14:49:54] [PASSED] VIC 102
[14:49:54] [PASSED] VIC 106
[14:49:54] [PASSED] VIC 107
[14:49:54] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[14:49:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[14:49:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[14:49:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[14:49:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[14:49:54] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[14:49:54] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[14:49:54] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[14:49:54] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[14:49:54] [PASSED] Automatic
[14:49:54] [PASSED] Full
[14:49:54] [PASSED] Limited 16:235
[14:49:54] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[14:49:54] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[14:49:54] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[14:49:54] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[14:49:54] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[14:49:54] [PASSED] RGB
[14:49:54] [PASSED] YUV 4:2:0
[14:49:54] [PASSED] YUV 4:2:2
[14:49:54] [PASSED] YUV 4:4:4
[14:49:54] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[14:49:54] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[14:49:54] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[14:49:54] ============= drm_damage_helper (21 subtests) ==============
[14:49:54] [PASSED] drm_test_damage_iter_no_damage
[14:49:54] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:49:54] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:49:54] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:49:54] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:49:54] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:49:54] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:49:54] [PASSED] drm_test_damage_iter_simple_damage
[14:49:54] [PASSED] drm_test_damage_iter_single_damage
[14:49:54] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:49:54] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:49:54] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:49:54] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:49:54] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:49:54] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:49:54] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:49:54] [PASSED] drm_test_damage_iter_damage
[14:49:54] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:49:54] [PASSED] drm_test_damage_iter_damage_one_outside
[14:49:54] [PASSED] drm_test_damage_iter_damage_src_moved
[14:49:54] [PASSED] drm_test_damage_iter_damage_not_visible
[14:49:54] ================ [PASSED] drm_damage_helper ================
[14:49:54] ============== drm_dp_mst_helper (3 subtests) ==============
[14:49:54] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[14:49:54] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:49:54] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:49:54] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:49:54] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:49:54] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:49:54] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:49:54] ============== drm_test_dp_mst_calc_pbn_div  ===============
[14:49:54] [PASSED] Link rate 2000000 lane count 4
[14:49:54] [PASSED] Link rate 2000000 lane count 2
[14:49:54] [PASSED] Link rate 2000000 lane count 1
[14:49:54] [PASSED] Link rate 1350000 lane count 4
[14:49:54] [PASSED] Link rate 1350000 lane count 2
[14:49:54] [PASSED] Link rate 1350000 lane count 1
[14:49:54] [PASSED] Link rate 1000000 lane count 4
[14:49:54] [PASSED] Link rate 1000000 lane count 2
[14:49:54] [PASSED] Link rate 1000000 lane count 1
[14:49:54] [PASSED] Link rate 810000 lane count 4
[14:49:54] [PASSED] Link rate 810000 lane count 2
[14:49:54] [PASSED] Link rate 810000 lane count 1
[14:49:54] [PASSED] Link rate 540000 lane count 4
[14:49:54] [PASSED] Link rate 540000 lane count 2
[14:49:54] [PASSED] Link rate 540000 lane count 1
[14:49:54] [PASSED] Link rate 270000 lane count 4
[14:49:54] [PASSED] Link rate 270000 lane count 2
[14:49:54] [PASSED] Link rate 270000 lane count 1
[14:49:54] [PASSED] Link rate 162000 lane count 4
[14:49:54] [PASSED] Link rate 162000 lane count 2
[14:49:54] [PASSED] Link rate 162000 lane count 1
[14:49:54] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[14:49:54] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[14:49:54] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:49:54] [PASSED] DP_POWER_UP_PHY with port number
[14:49:54] [PASSED] DP_POWER_DOWN_PHY with port number
[14:49:54] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:49:54] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:49:54] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:49:54] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:49:54] [PASSED] DP_QUERY_PAYLOAD with port number
[14:49:54] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:49:54] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:49:54] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:49:54] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:49:54] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:49:54] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:49:54] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:49:54] [PASSED] DP_REMOTE_I2C_READ with port number
[14:49:54] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:49:54] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:49:54] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:49:54] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:49:54] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:49:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:49:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:49:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:49:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:49:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:49:54] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:49:54] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:49:54] ================ [PASSED] drm_dp_mst_helper ================
[14:49:54] ================== drm_exec (7 subtests) ===================
[14:49:54] [PASSED] sanitycheck
[14:49:54] [PASSED] test_lock
[14:49:54] [PASSED] test_lock_unlock
[14:49:54] [PASSED] test_duplicates
[14:49:54] [PASSED] test_prepare
[14:49:54] [PASSED] test_prepare_array
[14:49:54] [PASSED] test_multiple_loops
[14:49:54] ==================== [PASSED] drm_exec =====================
[14:49:54] =========== drm_format_helper_test (17 subtests) ===========
[14:49:54] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:49:54] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:49:54] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:49:54] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:49:54] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:49:54] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:49:54] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:49:54] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[14:49:54] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:49:54] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:49:54] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:49:54] ============== drm_test_fb_xrgb8888_to_mono  ===============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:49:54] ==================== drm_test_fb_swab  =====================
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ================ [PASSED] drm_test_fb_swab =================
[14:49:54] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[14:49:54] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[14:49:54] [PASSED] single_pixel_source_buffer
[14:49:54] [PASSED] single_pixel_clip_rectangle
[14:49:54] [PASSED] well_known_colors
[14:49:54] [PASSED] destination_pitch
[14:49:54] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[14:49:54] ================= drm_test_fb_clip_offset  =================
[14:49:54] [PASSED] pass through
[14:49:54] [PASSED] horizontal offset
[14:49:54] [PASSED] vertical offset
[14:49:54] [PASSED] horizontal and vertical offset
[14:49:54] [PASSED] horizontal offset (custom pitch)
[14:49:54] [PASSED] vertical offset (custom pitch)
[14:49:54] [PASSED] horizontal and vertical offset (custom pitch)
[14:49:54] ============= [PASSED] drm_test_fb_clip_offset =============
[14:49:54] =================== drm_test_fb_memcpy  ====================
[14:49:54] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:49:54] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:49:54] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:49:54] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:49:54] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:49:54] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:49:54] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:49:54] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:49:54] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:49:54] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:49:54] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:49:54] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:49:54] =============== [PASSED] drm_test_fb_memcpy ================
[14:49:54] ============= [PASSED] drm_format_helper_test ==============
[14:49:54] ================= drm_format (18 subtests) =================
[14:49:54] [PASSED] drm_test_format_block_width_invalid
[14:49:54] [PASSED] drm_test_format_block_width_one_plane
[14:49:54] [PASSED] drm_test_format_block_width_two_plane
[14:49:54] [PASSED] drm_test_format_block_width_three_plane
[14:49:54] [PASSED] drm_test_format_block_width_tiled
[14:49:54] [PASSED] drm_test_format_block_height_invalid
[14:49:54] [PASSED] drm_test_format_block_height_one_plane
[14:49:54] [PASSED] drm_test_format_block_height_two_plane
[14:49:54] [PASSED] drm_test_format_block_height_three_plane
[14:49:54] [PASSED] drm_test_format_block_height_tiled
[14:49:54] [PASSED] drm_test_format_min_pitch_invalid
[14:49:54] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:49:54] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:49:54] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:49:54] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:49:54] [PASSED] drm_test_format_min_pitch_two_plane
[14:49:54] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:49:54] [PASSED] drm_test_format_min_pitch_tiled
[14:49:54] =================== [PASSED] drm_format ====================
[14:49:54] ============== drm_framebuffer (10 subtests) ===============
[14:49:54] ========== drm_test_framebuffer_check_src_coords  ==========
[14:49:54] [PASSED] Success: source fits into fb
[14:49:54] [PASSED] Fail: overflowing fb with x-axis coordinate
[14:49:54] [PASSED] Fail: overflowing fb with y-axis coordinate
[14:49:54] [PASSED] Fail: overflowing fb with source width
[14:49:54] [PASSED] Fail: overflowing fb with source height
[14:49:54] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[14:49:54] [PASSED] drm_test_framebuffer_cleanup
[14:49:54] =============== drm_test_framebuffer_create  ===============
[14:49:54] [PASSED] ABGR8888 normal sizes
[14:49:54] [PASSED] ABGR8888 max sizes
[14:49:54] [PASSED] ABGR8888 pitch greater than min required
[14:49:54] [PASSED] ABGR8888 pitch less than min required
[14:49:54] [PASSED] ABGR8888 Invalid width
[14:49:54] [PASSED] ABGR8888 Invalid buffer handle
[14:49:54] [PASSED] No pixel format
[14:49:54] [PASSED] ABGR8888 Width 0
[14:49:54] [PASSED] ABGR8888 Height 0
[14:49:54] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:49:54] [PASSED] ABGR8888 Large buffer offset
[14:49:54] [PASSED] ABGR8888 Buffer offset for inexistent plane
[14:49:54] [PASSED] ABGR8888 Invalid flag
[14:49:54] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:49:54] [PASSED] ABGR8888 Valid buffer modifier
[14:49:54] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:49:54] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:49:54] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:49:54] [PASSED] NV12 Normal sizes
[14:49:54] [PASSED] NV12 Max sizes
[14:49:54] [PASSED] NV12 Invalid pitch
[14:49:54] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:49:54] [PASSED] NV12 different  modifier per-plane
[14:49:54] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:49:54] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:49:54] [PASSED] NV12 Modifier for inexistent plane
[14:49:54] [PASSED] NV12 Handle for inexistent plane
[14:49:54] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:49:54] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:49:54] [PASSED] YVU420 Normal sizes
[14:49:54] [PASSED] YVU420 Max sizes
[14:49:54] [PASSED] YVU420 Invalid pitch
[14:49:54] [PASSED] YVU420 Different pitches
[14:49:54] [PASSED] YVU420 Different buffer offsets/pitches
[14:49:54] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:49:54] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:49:54] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:49:54] [PASSED] YVU420 Valid modifier
[14:49:54] [PASSED] YVU420 Different modifiers per plane
[14:49:54] [PASSED] YVU420 Modifier for inexistent plane
[14:49:54] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[14:49:54] [PASSED] X0L2 Normal sizes
[14:49:54] [PASSED] X0L2 Max sizes
[14:49:54] [PASSED] X0L2 Invalid pitch
[14:49:54] [PASSED] X0L2 Pitch greater than minimum required
[14:49:54] [PASSED] X0L2 Handle for inexistent plane
[14:49:54] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:49:54] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:49:54] [PASSED] X0L2 Valid modifier
[14:49:54] [PASSED] X0L2 Modifier for inexistent plane
[14:49:54] =========== [PASSED] drm_test_framebuffer_create ===========
[14:49:54] [PASSED] drm_test_framebuffer_free
[14:49:54] [PASSED] drm_test_framebuffer_init
[14:49:54] [PASSED] drm_test_framebuffer_init_bad_format
[14:49:54] [PASSED] drm_test_framebuffer_init_dev_mismatch
[14:49:54] [PASSED] drm_test_framebuffer_lookup
[14:49:54] [PASSED] drm_test_framebuffer_lookup_inexistent
[14:49:54] [PASSED] drm_test_framebuffer_modifiers_not_supported
[14:49:54] ================= [PASSED] drm_framebuffer =================
[14:49:54] ================ drm_gem_shmem (8 subtests) ================
[14:49:54] [PASSED] drm_gem_shmem_test_obj_create
[14:49:54] [PASSED] drm_gem_shmem_test_obj_create_private
[14:49:54] [PASSED] drm_gem_shmem_test_pin_pages
[14:49:54] [PASSED] drm_gem_shmem_test_vmap
[14:49:54] [PASSED] drm_gem_shmem_test_get_sg_table
[14:49:54] [PASSED] drm_gem_shmem_test_get_pages_sgt
[14:49:54] [PASSED] drm_gem_shmem_test_madvise
[14:49:54] [PASSED] drm_gem_shmem_test_purge
[14:49:54] ================== [PASSED] drm_gem_shmem ==================
[14:49:54] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[14:49:54] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[14:49:54] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[14:49:54] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[14:49:54] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[14:49:54] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[14:49:54] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[14:49:54] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[14:49:54] [PASSED] Automatic
[14:49:54] [PASSED] Full
[14:49:54] [PASSED] Limited 16:235
[14:49:54] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[14:49:54] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[14:49:54] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[14:49:54] [PASSED] drm_test_check_disable_connector
[14:49:54] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[14:49:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[14:49:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[14:49:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[14:49:54] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[14:49:54] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[14:49:54] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[14:49:54] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[14:49:54] [PASSED] drm_test_check_output_bpc_dvi
[14:49:54] [PASSED] drm_test_check_output_bpc_format_vic_1
[14:49:54] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[14:49:54] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[14:49:54] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[14:49:54] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[14:49:54] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[14:49:54] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[14:49:54] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[14:49:54] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[14:49:54] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[14:49:54] [PASSED] drm_test_check_broadcast_rgb_value
[14:49:54] [PASSED] drm_test_check_bpc_8_value
[14:49:54] [PASSED] drm_test_check_bpc_10_value
[14:49:54] [PASSED] drm_test_check_bpc_12_value
[14:49:54] [PASSED] drm_test_check_format_value
[14:49:54] [PASSED] drm_test_check_tmds_char_value
[14:49:54] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[14:49:54] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[14:49:54] [PASSED] drm_test_check_mode_valid
[14:49:54] [PASSED] drm_test_check_mode_valid_reject
[14:49:54] [PASSED] drm_test_check_mode_valid_reject_rate
[14:49:54] [PASSED] drm_test_check_mode_valid_reject_max_clock
[14:49:54] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[14:49:54] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[14:49:54] [PASSED] drm_test_check_infoframes
[14:49:54] [PASSED] drm_test_check_reject_avi_infoframe
[14:49:54] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[14:49:54] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[14:49:54] [PASSED] drm_test_check_reject_audio_infoframe
[14:49:54] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[14:49:54] ================= drm_managed (2 subtests) =================
[14:49:54] [PASSED] drm_test_managed_release_action
[14:49:54] [PASSED] drm_test_managed_run_action
[14:49:54] =================== [PASSED] drm_managed ===================
[14:49:54] =================== drm_mm (6 subtests) ====================
[14:49:54] [PASSED] drm_test_mm_init
[14:49:54] [PASSED] drm_test_mm_debug
[14:49:54] [PASSED] drm_test_mm_align32
[14:49:54] [PASSED] drm_test_mm_align64
[14:49:54] [PASSED] drm_test_mm_lowest
[14:49:54] [PASSED] drm_test_mm_highest
[14:49:54] ===================== [PASSED] drm_mm ======================
[14:49:54] ============= drm_modes_analog_tv (5 subtests) =============
[14:49:54] [PASSED] drm_test_modes_analog_tv_mono_576i
[14:49:54] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:49:54] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:49:54] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:49:54] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:49:54] =============== [PASSED] drm_modes_analog_tv ===============
[14:49:54] ============== drm_plane_helper (2 subtests) ===============
[14:49:54] =============== drm_test_check_plane_state  ================
[14:49:54] [PASSED] clipping_simple
[14:49:54] [PASSED] clipping_rotate_reflect
[14:49:54] [PASSED] positioning_simple
[14:49:54] [PASSED] upscaling
[14:49:54] [PASSED] downscaling
[14:49:54] [PASSED] rounding1
[14:49:54] [PASSED] rounding2
[14:49:54] [PASSED] rounding3
[14:49:54] [PASSED] rounding4
[14:49:54] =========== [PASSED] drm_test_check_plane_state ============
[14:49:54] =========== drm_test_check_invalid_plane_state  ============
[14:49:54] [PASSED] positioning_invalid
[14:49:54] [PASSED] upscaling_invalid
[14:49:54] [PASSED] downscaling_invalid
[14:49:54] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:49:54] ================ [PASSED] drm_plane_helper =================
[14:49:54] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[14:49:54] ====== drm_test_connector_helper_tv_get_modes_check  =======
[14:49:54] [PASSED] None
[14:49:54] [PASSED] PAL
[14:49:54] [PASSED] NTSC
[14:49:54] [PASSED] Both, NTSC Default
[14:49:54] [PASSED] Both, PAL Default
[14:49:54] [PASSED] Both, NTSC Default, with PAL on command-line
[14:49:54] [PASSED] Both, PAL Default, with NTSC on command-line
[14:49:54] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:49:54] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:49:54] ================== drm_rect (9 subtests) ===================
[14:49:54] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:49:54] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:49:54] [PASSED] drm_test_rect_clip_scaled_clipped
[14:49:54] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:49:54] ================= drm_test_rect_intersect  =================
[14:49:54] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:49:54] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:49:54] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:49:54] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:49:54] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:49:54] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:49:54] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:49:54] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:49:54] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:49:54] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:49:54] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:49:54] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:49:54] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:49:54] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:49:54] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:49:54] ============= [PASSED] drm_test_rect_intersect =============
[14:49:54] ================ drm_test_rect_calc_hscale  ================
[14:49:54] [PASSED] normal use
[14:49:54] [PASSED] out of max range
[14:49:54] [PASSED] out of min range
[14:49:54] [PASSED] zero dst
[14:49:54] [PASSED] negative src
[14:49:54] [PASSED] negative dst
[14:49:54] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:49:54] ================ drm_test_rect_calc_vscale  ================
[14:49:54] [PASSED] normal use
[14:49:54] [PASSED] out of max range
[14:49:54] [PASSED] out of min range
[14:49:54] [PASSED] zero dst
[14:49:54] [PASSED] negative src
[14:49:54] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[14:49:54] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:49:54] ================== drm_test_rect_rotate  ===================
[14:49:54] [PASSED] reflect-x
[14:49:54] [PASSED] reflect-y
[14:49:54] [PASSED] rotate-0
[14:49:54] [PASSED] rotate-90
[14:49:54] [PASSED] rotate-180
[14:49:54] [PASSED] rotate-270
[14:49:54] ============== [PASSED] drm_test_rect_rotate ===============
[14:49:54] ================ drm_test_rect_rotate_inv  =================
[14:49:54] [PASSED] reflect-x
[14:49:54] [PASSED] reflect-y
[14:49:54] [PASSED] rotate-0
[14:49:54] [PASSED] rotate-90
[14:49:54] [PASSED] rotate-180
[14:49:54] [PASSED] rotate-270
[14:49:54] ============ [PASSED] drm_test_rect_rotate_inv =============
[14:49:54] ==================== [PASSED] drm_rect =====================
[14:49:54] ============ drm_sysfb_modeset_test (1 subtest) ============
[14:49:54] ============ drm_test_sysfb_build_fourcc_list  =============
[14:49:54] [PASSED] no native formats
[14:49:54] [PASSED] XRGB8888 as native format
[14:49:54] [PASSED] remove duplicates
[14:49:54] [PASSED] convert alpha formats
[14:49:54] [PASSED] random formats
[14:49:54] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[14:49:54] ============= [PASSED] drm_sysfb_modeset_test ==============
[14:49:54] ================== drm_fixp (2 subtests) ===================
[14:49:54] [PASSED] drm_test_int2fixp
[14:49:54] [PASSED] drm_test_sm2fixp
[14:49:54] ==================== [PASSED] drm_fixp =====================
[14:49:54] ============================================================
[14:49:54] Testing complete. Ran 621 tests: passed: 621
[14:49:54] Elapsed time: 25.825s total, 1.735s configuring, 23.924s building, 0.141s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[14:49:54] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:49:56] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:50:05] Starting KUnit Kernel (1/1)...
[14:50:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:50:05] ================= ttm_device (5 subtests) ==================
[14:50:05] [PASSED] ttm_device_init_basic
[14:50:05] [PASSED] ttm_device_init_multiple
[14:50:05] [PASSED] ttm_device_fini_basic
[14:50:05] [PASSED] ttm_device_init_no_vma_man
[14:50:05] ================== ttm_device_init_pools  ==================
[14:50:05] [PASSED] No DMA allocations, no DMA32 required
[14:50:05] [PASSED] DMA allocations, DMA32 required
[14:50:05] [PASSED] No DMA allocations, DMA32 required
[14:50:05] [PASSED] DMA allocations, no DMA32 required
[14:50:05] ============== [PASSED] ttm_device_init_pools ==============
[14:50:05] =================== [PASSED] ttm_device ====================
[14:50:05] ================== ttm_pool (8 subtests) ===================
[14:50:05] ================== ttm_pool_alloc_basic  ===================
[14:50:05] [PASSED] One page
[14:50:05] [PASSED] More than one page
[14:50:05] [PASSED] Above the allocation limit
[14:50:05] [PASSED] One page, with coherent DMA mappings enabled
[14:50:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:50:05] ============== [PASSED] ttm_pool_alloc_basic ===============
[14:50:05] ============== ttm_pool_alloc_basic_dma_addr  ==============
[14:50:05] [PASSED] One page
[14:50:05] [PASSED] More than one page
[14:50:05] [PASSED] Above the allocation limit
[14:50:05] [PASSED] One page, with coherent DMA mappings enabled
[14:50:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:50:05] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[14:50:05] [PASSED] ttm_pool_alloc_order_caching_match
[14:50:05] [PASSED] ttm_pool_alloc_caching_mismatch
[14:50:05] [PASSED] ttm_pool_alloc_order_mismatch
[14:50:05] [PASSED] ttm_pool_free_dma_alloc
[14:50:05] [PASSED] ttm_pool_free_no_dma_alloc
[14:50:05] [PASSED] ttm_pool_fini_basic
[14:50:05] ==================== [PASSED] ttm_pool =====================
[14:50:05] ================ ttm_resource (8 subtests) =================
[14:50:05] ================= ttm_resource_init_basic  =================
[14:50:05] [PASSED] Init resource in TTM_PL_SYSTEM
[14:50:05] [PASSED] Init resource in TTM_PL_VRAM
[14:50:05] [PASSED] Init resource in a private placement
[14:50:05] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[14:50:05] ============= [PASSED] ttm_resource_init_basic =============
[14:50:05] [PASSED] ttm_resource_init_pinned
[14:50:05] [PASSED] ttm_resource_fini_basic
[14:50:05] [PASSED] ttm_resource_manager_init_basic
[14:50:05] [PASSED] ttm_resource_manager_usage_basic
[14:50:05] [PASSED] ttm_resource_manager_set_used_basic
[14:50:05] [PASSED] ttm_sys_man_alloc_basic
[14:50:05] [PASSED] ttm_sys_man_free_basic
[14:50:05] ================== [PASSED] ttm_resource ===================
[14:50:05] =================== ttm_tt (15 subtests) ===================
[14:50:05] ==================== ttm_tt_init_basic  ====================
[14:50:05] [PASSED] Page-aligned size
[14:50:05] [PASSED] Extra pages requested
[14:50:05] ================ [PASSED] ttm_tt_init_basic ================
[14:50:05] [PASSED] ttm_tt_init_misaligned
[14:50:05] [PASSED] ttm_tt_fini_basic
[14:50:05] [PASSED] ttm_tt_fini_sg
[14:50:05] [PASSED] ttm_tt_fini_shmem
[14:50:05] [PASSED] ttm_tt_create_basic
[14:50:05] [PASSED] ttm_tt_create_invalid_bo_type
[14:50:05] [PASSED] ttm_tt_create_ttm_exists
[14:50:05] [PASSED] ttm_tt_create_failed
[14:50:05] [PASSED] ttm_tt_destroy_basic
[14:50:05] [PASSED] ttm_tt_populate_null_ttm
[14:50:05] [PASSED] ttm_tt_populate_populated_ttm
[14:50:05] [PASSED] ttm_tt_unpopulate_basic
[14:50:05] [PASSED] ttm_tt_unpopulate_empty_ttm
[14:50:05] [PASSED] ttm_tt_swapin_basic
[14:50:05] ===================== [PASSED] ttm_tt ======================
[14:50:05] =================== ttm_bo (14 subtests) ===================
[14:50:05] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[14:50:05] [PASSED] Cannot be interrupted and sleeps
[14:50:05] [PASSED] Cannot be interrupted, locks straight away
[14:50:05] [PASSED] Can be interrupted, sleeps
[14:50:05] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[14:50:05] [PASSED] ttm_bo_reserve_locked_no_sleep
[14:50:05] [PASSED] ttm_bo_reserve_no_wait_ticket
[14:50:05] [PASSED] ttm_bo_reserve_double_resv
[14:50:05] [PASSED] ttm_bo_reserve_interrupted
[14:50:05] [PASSED] ttm_bo_reserve_deadlock
[14:50:05] [PASSED] ttm_bo_unreserve_basic
[14:50:05] [PASSED] ttm_bo_unreserve_pinned
[14:50:05] [PASSED] ttm_bo_unreserve_bulk
[14:50:05] [PASSED] ttm_bo_fini_basic
[14:50:05] [PASSED] ttm_bo_fini_shared_resv
[14:50:05] [PASSED] ttm_bo_pin_basic
[14:50:05] [PASSED] ttm_bo_pin_unpin_resource
[14:50:05] [PASSED] ttm_bo_multiple_pin_one_unpin
[14:50:05] ===================== [PASSED] ttm_bo ======================
[14:50:05] ============== ttm_bo_validate (22 subtests) ===============
[14:50:05] ============== ttm_bo_init_reserved_sys_man  ===============
[14:50:05] [PASSED] Buffer object for userspace
[14:50:05] [PASSED] Kernel buffer object
[14:50:05] [PASSED] Shared buffer object
[14:50:05] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[14:50:05] ============== ttm_bo_init_reserved_mock_man  ==============
[14:50:05] [PASSED] Buffer object for userspace
[14:50:05] [PASSED] Kernel buffer object
[14:50:05] [PASSED] Shared buffer object
[14:50:05] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[14:50:05] [PASSED] ttm_bo_init_reserved_resv
[14:50:05] ================== ttm_bo_validate_basic  ==================
[14:50:05] [PASSED] Buffer object for userspace
[14:50:05] [PASSED] Kernel buffer object
[14:50:05] [PASSED] Shared buffer object
[14:50:05] ============== [PASSED] ttm_bo_validate_basic ==============
[14:50:05] [PASSED] ttm_bo_validate_invalid_placement
[14:50:05] ============= ttm_bo_validate_same_placement  ==============
[14:50:05] [PASSED] System manager
[14:50:05] [PASSED] VRAM manager
[14:50:05] ========= [PASSED] ttm_bo_validate_same_placement ==========
[14:50:05] [PASSED] ttm_bo_validate_failed_alloc
[14:50:05] [PASSED] ttm_bo_validate_pinned
[14:50:05] [PASSED] ttm_bo_validate_busy_placement
[14:50:05] ================ ttm_bo_validate_multihop  =================
[14:50:05] [PASSED] Buffer object for userspace
[14:50:05] [PASSED] Kernel buffer object
[14:50:05] [PASSED] Shared buffer object
[14:50:05] ============ [PASSED] ttm_bo_validate_multihop =============
[14:50:05] ========== ttm_bo_validate_no_placement_signaled  ==========
[14:50:05] [PASSED] Buffer object in system domain, no page vector
[14:50:05] [PASSED] Buffer object in system domain with an existing page vector
[14:50:05] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[14:50:05] ======== ttm_bo_validate_no_placement_not_signaled  ========
[14:50:05] [PASSED] Buffer object for userspace
[14:50:05] [PASSED] Kernel buffer object
[14:50:05] [PASSED] Shared buffer object
[14:50:05] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[14:50:05] [PASSED] ttm_bo_validate_move_fence_signaled
[14:50:05] ========= ttm_bo_validate_move_fence_not_signaled  =========
[14:50:05] [PASSED] Waits for GPU
[14:50:05] [PASSED] Tries to lock straight away
[14:50:05] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[14:50:05] [PASSED] ttm_bo_validate_swapout
[14:50:05] [PASSED] ttm_bo_validate_happy_evict
[14:50:05] [PASSED] ttm_bo_validate_all_pinned_evict
[14:50:05] [PASSED] ttm_bo_validate_allowed_only_evict
[14:50:05] [PASSED] ttm_bo_validate_deleted_evict
[14:50:05] [PASSED] ttm_bo_validate_busy_domain_evict
[14:50:05] [PASSED] ttm_bo_validate_evict_gutting
[14:50:05] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[14:50:05] ================= [PASSED] ttm_bo_validate =================
[14:50:05] ============================================================
[14:50:05] Testing complete. Ran 102 tests: passed: 102
[14:50:05] Elapsed time: 11.220s total, 1.724s configuring, 9.230s building, 0.229s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] PCI: Fix resizable bar fails due to bridge memory region
  2026-04-24 14:43 [PATCH] PCI: Fix resizable bar fails due to bridge memory region Maarten Lankhorst
  2026-04-24 14:48 ` ✗ CI.checkpatch: warning for " Patchwork
  2026-04-24 14:50 ` ✓ CI.KUnit: success " Patchwork
@ 2026-04-24 15:04 ` Ilpo Järvinen
  2026-04-24 16:03   ` Maarten Lankhorst
  2026-04-24 15:40 ` ✗ Xe.CI.BAT: failure for " Patchwork
  2026-04-24 17:24 ` ✗ Xe.CI.FULL: " Patchwork
  4 siblings, 1 reply; 10+ messages in thread
From: Ilpo Järvinen @ 2026-04-24 15:04 UTC (permalink / raw)
  To: Maarten Lankhorst
  Cc: linux-pci, Bjorn Helgaas, intel-xe@lists.freedesktop.org

On Fri, 24 Apr 2026, Maarten Lankhorst wrote:

> I encountered a problem that I have on my system, where I cannot resize
> the bar because one of the bridges has a 

You're missing words from here. But I can guess you've that extra BAR on 
in-card the bridge.

> If I take a look at the topology, the GPU shares the memory region with a bridge,
> 
> +-[0000:64]-+-00.0-[65-68]----00.0-[66-68]--+-01.0-[67]----00.0
> 
> The specific bridge likely causing a failure is:
> 
> 65:00.0 PCI bridge: Intel Corporation Device e2ff (rev 01) (prog-if 00 [Normal decode])
>         Flags: bus master, fast devsel, latency 0, IRQ 32, IOMMU group 1
>         Memory at 382400000000 (64-bit, prefetchable) [size=8M]
>         ....
> 
> Which causes upstream bridge 64:00.0 initially to allocate the region
> [38fe0000000-38ff0000000) for the GPU, and [382ff0000000..382ff07fffff]
> for the bridge device.
> 
> Bridge 64 is big enough for 1 BMG with a 32 GB bar and the second 8 MB allocation:
> pci_bus 0000:64: resource 9 [mem 0x382000000000-0x382fffffffff window] (64GB window)
> 
> The reason for failure is that bridge 65 has a 8 MB memory region assigned,

> and previously it was ignored when reallocating.

What does this mean? I don't think it was ever ignored while 
reallocating??

Note that kernel has become much more verbose in explaining why things 
fail so perhaps the added message is confusing you (they won't appear in 
the old kernels).

> Failing case:
> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: was not released (still contains assigned resources)
> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> pcieport 0000:64:00.0:   bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]
> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> pcieport 0000:65:00.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
> pcieport 0000:66:01.0: PCI bridge to [bus 67]
> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
> pcieport 0000:66:01.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
> 
> Working with the patch below:
> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> pcieport 0000:65:00.0: BAR 0 [mem 0x382ff0000000-0x382ff07fffff 64bit pref]: releasing
> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: releasing
> pcieport 0000:64:00.0: bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]: assigned
> pcieport 0000:65:00.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
> pcieport 0000:65:00.0: BAR 0 [mem 0x382400000000-0x3824007fffff 64bit pref]: assigned
> pcieport 0000:66:01.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
> xe 0000:67:00.0: BAR 2 [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> pcieport 0000:64:00.0:   bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]
> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
> pcieport 0000:66:01.0: PCI bridge to [bus 67]
> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
> pcieport 0000:66:01.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
> xe 0000:67:00.0: [drm] BAR2 resized to 16384MiB
> 
> 
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
> I'm not 100% this is the correct fix, I don't know why the bridge itself has
> a memory region, why the kernel allocates it and when it's supposed to
> be used. Not a PCI expert. :-)

I don't know why it is there either. Nothing in the portdrv really uses it 
for anything. There is patchset somewhere lying around which adds a quirk 
that releases the "extra" BAR.

> ---
> 
> diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
> index 61f769aaa2f6c..98692dccc4721 100644
> --- a/drivers/pci/setup-bus.c
> +++ b/drivers/pci/setup-bus.c
> @@ -2258,6 +2258,7 @@ static int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *
>  	unsigned long type = res->flags;
>  	struct pci_dev_resource *dev_res;
>  	struct pci_dev *bridge = NULL;
> +	struct resource *r;
>  	LIST_HEAD(added);
>  	LIST_HEAD(failed);
>  	unsigned int i;
> @@ -2286,6 +2287,21 @@ static int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *
>  				 res_name, res);
>  		}
>  
> +		pci_dev_for_each_resource(bridge, r, i) {
> +			if (!resource_assigned(r) || r->child)
> +				continue;
> +
> +			if ((r->flags & IORESOURCE_TYPE_BITS) !=
> +			    (type & IORESOURCE_TYPE_BITS))
> +				continue;

This should check if the bridge window is the same or not.

But it may not be wise to do this for any bridge without any 
discrimination.

> +			ret = pci_dev_res_add_to_list(saved, bridge, r, 0, 0);
> +			if (ret)
> +				return ret;
> +
> +			pci_release_resource(bridge, i);
> +		}
> +
>  		bus = bus->parent;
>  	}
>  
> 

-- 
 i.


^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✗ Xe.CI.BAT: failure for PCI: Fix resizable bar fails due to bridge memory region
  2026-04-24 14:43 [PATCH] PCI: Fix resizable bar fails due to bridge memory region Maarten Lankhorst
                   ` (2 preceding siblings ...)
  2026-04-24 15:04 ` [PATCH] " Ilpo Järvinen
@ 2026-04-24 15:40 ` Patchwork
  2026-04-24 17:24 ` ✗ Xe.CI.FULL: " Patchwork
  4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-04-24 15:40 UTC (permalink / raw)
  To: Maarten Lankhorst; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 386 bytes --]

== Series Details ==

Series: PCI: Fix resizable bar fails due to bridge memory region
URL   : https://patchwork.freedesktop.org/series/165435/
State : failure

== Summary ==

ERROR: The runconfig 'xe-4933-3573339bb775e24c33992aa26fdf05e073943ac9_BAT' does not exist in the database

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165435v1/index.html

[-- Attachment #2: Type: text/html, Size: 951 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] PCI: Fix resizable bar fails due to bridge memory region
  2026-04-24 15:04 ` [PATCH] " Ilpo Järvinen
@ 2026-04-24 16:03   ` Maarten Lankhorst
  2026-04-24 17:42     ` Ilpo Järvinen
  0 siblings, 1 reply; 10+ messages in thread
From: Maarten Lankhorst @ 2026-04-24 16:03 UTC (permalink / raw)
  To: Ilpo Järvinen
  Cc: linux-pci, Bjorn Helgaas, intel-xe@lists.freedesktop.org

Hey,

Den 2026-04-24 kl. 17:04, skrev Ilpo Järvinen:
> On Fri, 24 Apr 2026, Maarten Lankhorst wrote:
> 
>> I encountered a problem that I have on my system, where I cannot resize
>> the bar because one of the bridges has a 
> 
> You're missing words from here. But I can guess you've that extra BAR on 
> in-card the bridge.
> 
>> If I take a look at the topology, the GPU shares the memory region with a bridge,
>>
>> +-[0000:64]-+-00.0-[65-68]----00.0-[66-68]--+-01.0-[67]----00.0
>>
>> The specific bridge likely causing a failure is:
>>
>> 65:00.0 PCI bridge: Intel Corporation Device e2ff (rev 01) (prog-if 00 [Normal decode])
>>         Flags: bus master, fast devsel, latency 0, IRQ 32, IOMMU group 1
>>         Memory at 382400000000 (64-bit, prefetchable) [size=8M]
>>         ....
>>
>> Which causes upstream bridge 64:00.0 initially to allocate the region
>> [38fe0000000-38ff0000000) for the GPU, and [382ff0000000..382ff07fffff]
>> for the bridge device.
>>
>> Bridge 64 is big enough for 1 BMG with a 32 GB bar and the second 8 MB allocation:
>> pci_bus 0000:64: resource 9 [mem 0x382000000000-0x382fffffffff window] (64GB window)
>>
>> The reason for failure is that bridge 65 has a 8 MB memory region assigned,
> 
>> and previously it was ignored when reallocating.
> 
> What does this mean? I don't think it was ever ignored while 
> reallocating??
> 
> Note that kernel has become much more verbose in explaining why things 
> fail so perhaps the added message is confusing you (they won't appear in 
> the old kernels).
> 
>> Failing case:
>> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
>> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: was not released (still contains assigned resources)
>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
>> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
>> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>> pcieport 0000:64:00.0:   bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]
>> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
>> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>> pcieport 0000:65:00.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
>> pcieport 0000:66:01.0: PCI bridge to [bus 67]
>> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
>> pcieport 0000:66:01.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
>>
>> Working with the patch below:
>> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
>> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>> pcieport 0000:65:00.0: BAR 0 [mem 0x382ff0000000-0x382ff07fffff 64bit pref]: releasing
>> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: releasing
>> pcieport 0000:64:00.0: bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]: assigned
>> pcieport 0000:65:00.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
>> pcieport 0000:65:00.0: BAR 0 [mem 0x382400000000-0x3824007fffff 64bit pref]: assigned
>> pcieport 0000:66:01.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
>> xe 0000:67:00.0: BAR 2 [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
>> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
>> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>> pcieport 0000:64:00.0:   bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]
>> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
>> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
>> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
>> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
>> pcieport 0000:66:01.0: PCI bridge to [bus 67]
>> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
>> pcieport 0000:66:01.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
>> xe 0000:67:00.0: [drm] BAR2 resized to 16384MiB
>>
>>
>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>> ---
>> I'm not 100% this is the correct fix, I don't know why the bridge itself has
>> a memory region, why the kernel allocates it and when it's supposed to
>> be used. Not a PCI expert. :-)
> 
> I don't know why it is there either. Nothing in the portdrv really uses it 
> for anything. There is patchset somewhere lying around which adds a quirk 
> that releases the "extra" BAR.

Thank you, I've taken a look at that patch series. It looks like patch 1/2
would help a lot.

I'm wondering if it will completely fix the issue, it is still possible
that in the same config I have 2 identical cards, where resizing might
work, but when GPU1's VRAM BAR is already bound, it might be unable
to resize GPU2's VRAM BAR for the same reason as this patch.

What would be the best way to handle this case?

Kind regards,
~Maarten Lankhorst

^ permalink raw reply	[flat|nested] 10+ messages in thread

* ✗ Xe.CI.FULL: failure for PCI: Fix resizable bar fails due to bridge memory region
  2026-04-24 14:43 [PATCH] PCI: Fix resizable bar fails due to bridge memory region Maarten Lankhorst
                   ` (3 preceding siblings ...)
  2026-04-24 15:40 ` ✗ Xe.CI.BAT: failure for " Patchwork
@ 2026-04-24 17:24 ` Patchwork
  4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-04-24 17:24 UTC (permalink / raw)
  To: Maarten Lankhorst; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 387 bytes --]

== Series Details ==

Series: PCI: Fix resizable bar fails due to bridge memory region
URL   : https://patchwork.freedesktop.org/series/165435/
State : failure

== Summary ==

ERROR: The runconfig 'xe-4933-3573339bb775e24c33992aa26fdf05e073943ac9_FULL' does not exist in the database

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-165435v1/index.html

[-- Attachment #2: Type: text/html, Size: 952 bytes --]

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] PCI: Fix resizable bar fails due to bridge memory region
  2026-04-24 16:03   ` Maarten Lankhorst
@ 2026-04-24 17:42     ` Ilpo Järvinen
  2026-04-24 17:58       ` Maarten Lankhorst
  0 siblings, 1 reply; 10+ messages in thread
From: Ilpo Järvinen @ 2026-04-24 17:42 UTC (permalink / raw)
  To: Maarten Lankhorst
  Cc: linux-pci, Bjorn Helgaas, intel-xe@lists.freedesktop.org

[-- Attachment #1: Type: text/plain, Size: 8131 bytes --]

On Fri, 24 Apr 2026, Maarten Lankhorst wrote:
> Den 2026-04-24 kl. 17:04, skrev Ilpo Järvinen:
> > On Fri, 24 Apr 2026, Maarten Lankhorst wrote:
> > 
> >> I encountered a problem that I have on my system, where I cannot resize
> >> the bar because one of the bridges has a 
> > 
> > You're missing words from here. But I can guess you've that extra BAR on 
> > in-card the bridge.
> > 
> >> If I take a look at the topology, the GPU shares the memory region with a bridge,
> >>
> >> +-[0000:64]-+-00.0-[65-68]----00.0-[66-68]--+-01.0-[67]----00.0
> >>
> >> The specific bridge likely causing a failure is:
> >>
> >> 65:00.0 PCI bridge: Intel Corporation Device e2ff (rev 01) (prog-if 00 [Normal decode])
> >>         Flags: bus master, fast devsel, latency 0, IRQ 32, IOMMU group 1
> >>         Memory at 382400000000 (64-bit, prefetchable) [size=8M]
> >>         ....
> >>
> >> Which causes upstream bridge 64:00.0 initially to allocate the region
> >> [38fe0000000-38ff0000000) for the GPU, and [382ff0000000..382ff07fffff]
> >> for the bridge device.
> >>
> >> Bridge 64 is big enough for 1 BMG with a 32 GB bar and the second 8 MB allocation:
> >> pci_bus 0000:64: resource 9 [mem 0x382000000000-0x382fffffffff window] (64GB window)
> >>
> >> The reason for failure is that bridge 65 has a 8 MB memory region assigned,
> > 
> >> and previously it was ignored when reallocating.
> > 
> > What does this mean? I don't think it was ever ignored while 
> > reallocating??
> > 
> > Note that kernel has become much more verbose in explaining why things 
> > fail so perhaps the added message is confusing you (they won't appear in 
> > the old kernels).
> > 
> >> Failing case:
> >> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
> >> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: was not released (still contains assigned resources)
> >> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> >> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> >> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> >> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> >> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> >> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> >> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> >> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> >> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
> >> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
> >> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
> >> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
> >> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
> >> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >> pcieport 0000:64:00.0:   bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]
> >> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
> >> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >> pcieport 0000:65:00.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
> >> pcieport 0000:66:01.0: PCI bridge to [bus 67]
> >> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
> >> pcieport 0000:66:01.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
> >>
> >> Working with the patch below:
> >> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
> >> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >> pcieport 0000:65:00.0: BAR 0 [mem 0x382ff0000000-0x382ff07fffff 64bit pref]: releasing
> >> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: releasing
> >> pcieport 0000:64:00.0: bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]: assigned
> >> pcieport 0000:65:00.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
> >> pcieport 0000:65:00.0: BAR 0 [mem 0x382400000000-0x3824007fffff 64bit pref]: assigned
> >> pcieport 0000:66:01.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
> >> xe 0000:67:00.0: BAR 2 [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
> >> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
> >> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >> pcieport 0000:64:00.0:   bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]
> >> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
> >> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
> >> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
> >> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
> >> pcieport 0000:66:01.0: PCI bridge to [bus 67]
> >> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
> >> pcieport 0000:66:01.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
> >> xe 0000:67:00.0: [drm] BAR2 resized to 16384MiB
> >>
> >>
> >> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> >> ---
> >> I'm not 100% this is the correct fix, I don't know why the bridge itself has
> >> a memory region, why the kernel allocates it and when it's supposed to
> >> be used. Not a PCI expert. :-)
> > 
> > I don't know why it is there either. Nothing in the portdrv really uses it 
> > for anything. There is patchset somewhere lying around which adds a quirk 
> > that releases the "extra" BAR.
> 
> Thank you, I've taken a look at that patch series. It looks like patch 1/2
> would help a lot.

I should one day find time to finish that series, Bjorn didn't like how 
the code didn't "disable" BAR.

I did some (unset) work towards placing the BARs outside the bridge 
window but my algorithm was quite basic (just found min & max window
addresses and put BAR outside of that range but then I thought maybe I 
should add the possiblity for placing the BAR into the gap in the middle to
allow placement of a large BAR in cases where 32-bit mmio blocks low-end + 
64-bit mmio range blocking the top of the address space.

> I'm wondering if it will completely fix the issue, it is still possible
> that in the same config I have 2 identical cards, where resizing might
> work, but when GPU1's VRAM BAR is already bound, it might be unable
> to resize GPU2's VRAM BAR for the same reason as this patch.

It is always possible to find cases where a sibling pins the shared bridge 
window in place.

> What would be the best way to handle this case?

The best way is to size them into the largest possible sizes right from 
the beginning. But when doing that, nothing must break (introducing 
regressions is not okay) so it kernel must be able to graciously fallback 
to smaller sizes when there isn't enough space available for the largest 
size.

What makes it complicated is that sizing and assignment are done very much 
separately, so retrying with a smaller size is complicated. I'm working 
toward this kind of solution but there are various things that have to be 
fixed first.

-- 
 i.

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] PCI: Fix resizable bar fails due to bridge memory region
  2026-04-24 17:42     ` Ilpo Järvinen
@ 2026-04-24 17:58       ` Maarten Lankhorst
  2026-04-24 18:40         ` Ilpo Järvinen
  0 siblings, 1 reply; 10+ messages in thread
From: Maarten Lankhorst @ 2026-04-24 17:58 UTC (permalink / raw)
  To: Ilpo Järvinen
  Cc: linux-pci, Bjorn Helgaas, intel-xe@lists.freedesktop.org

Hey,

Den 2026-04-24 kl. 19:42, skrev Ilpo Järvinen:
> On Fri, 24 Apr 2026, Maarten Lankhorst wrote:
>> Den 2026-04-24 kl. 17:04, skrev Ilpo Järvinen:
>>> On Fri, 24 Apr 2026, Maarten Lankhorst wrote:
>>>
>>>> I encountered a problem that I have on my system, where I cannot resize
>>>> the bar because one of the bridges has a 
>>>
>>> You're missing words from here. But I can guess you've that extra BAR on 
>>> in-card the bridge.
>>>
>>>> If I take a look at the topology, the GPU shares the memory region with a bridge,
>>>>
>>>> +-[0000:64]-+-00.0-[65-68]----00.0-[66-68]--+-01.0-[67]----00.0
>>>>
>>>> The specific bridge likely causing a failure is:
>>>>
>>>> 65:00.0 PCI bridge: Intel Corporation Device e2ff (rev 01) (prog-if 00 [Normal decode])
>>>>         Flags: bus master, fast devsel, latency 0, IRQ 32, IOMMU group 1
>>>>         Memory at 382400000000 (64-bit, prefetchable) [size=8M]
>>>>         ....
>>>>
>>>> Which causes upstream bridge 64:00.0 initially to allocate the region
>>>> [38fe0000000-38ff0000000) for the GPU, and [382ff0000000..382ff07fffff]
>>>> for the bridge device.
>>>>
>>>> Bridge 64 is big enough for 1 BMG with a 32 GB bar and the second 8 MB allocation:
>>>> pci_bus 0000:64: resource 9 [mem 0x382000000000-0x382fffffffff window] (64GB window)
>>>>
>>>> The reason for failure is that bridge 65 has a 8 MB memory region assigned,
>>>
>>>> and previously it was ignored when reallocating.
>>>
>>> What does this mean? I don't think it was ever ignored while 
>>> reallocating??
>>>
>>> Note that kernel has become much more verbose in explaining why things 
>>> fail so perhaps the added message is confusing you (they won't appear in 
>>> the old kernels).
>>>
>>>> Failing case:
>>>> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
>>>> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>>>> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>>>> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>>>> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: was not released (still contains assigned resources)
>>>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
>>>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
>>>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
>>>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
>>>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
>>>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
>>>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
>>>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
>>>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
>>>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
>>>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
>>>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
>>>> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
>>>> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>>>> pcieport 0000:64:00.0:   bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]
>>>> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
>>>> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>>>> pcieport 0000:65:00.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
>>>> pcieport 0000:66:01.0: PCI bridge to [bus 67]
>>>> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
>>>> pcieport 0000:66:01.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
>>>>
>>>> Working with the patch below:
>>>> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
>>>> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>>>> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>>>> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
>>>> pcieport 0000:65:00.0: BAR 0 [mem 0x382ff0000000-0x382ff07fffff 64bit pref]: releasing
>>>> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: releasing
>>>> pcieport 0000:64:00.0: bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]: assigned
>>>> pcieport 0000:65:00.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
>>>> pcieport 0000:65:00.0: BAR 0 [mem 0x382400000000-0x3824007fffff 64bit pref]: assigned
>>>> pcieport 0000:66:01.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
>>>> xe 0000:67:00.0: BAR 2 [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
>>>> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
>>>> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>>>> pcieport 0000:64:00.0:   bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]
>>>> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
>>>> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>>>> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
>>>> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
>>>> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
>>>> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
>>>> pcieport 0000:66:01.0: PCI bridge to [bus 67]
>>>> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
>>>> pcieport 0000:66:01.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
>>>> xe 0000:67:00.0: [drm] BAR2 resized to 16384MiB
>>>>
>>>>
>>>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
>>>> ---
>>>> I'm not 100% this is the correct fix, I don't know why the bridge itself has
>>>> a memory region, why the kernel allocates it and when it's supposed to
>>>> be used. Not a PCI expert. :-)
>>>
>>> I don't know why it is there either. Nothing in the portdrv really uses it 
>>> for anything. There is patchset somewhere lying around which adds a quirk 
>>> that releases the "extra" BAR.
>>
>> Thank you, I've taken a look at that patch series. It looks like patch 1/2
>> would help a lot.
> 
> I should one day find time to finish that series, Bjorn didn't like how 
> the code didn't "disable" BAR.
> 
> I did some (unset) work towards placing the BARs outside the bridge 
> window but my algorithm was quite basic (just found min & max window
> addresses and put BAR outside of that range but then I thought maybe I 
> should add the possiblity for placing the BAR into the gap in the middle to
> allow placement of a large BAR in cases where 32-bit mmio blocks low-end + 
> 64-bit mmio range blocking the top of the address space.
> 
>> I'm wondering if it will completely fix the issue, it is still possible
>> that in the same config I have 2 identical cards, where resizing might
>> work, but when GPU1's VRAM BAR is already bound, it might be unable
>> to resize GPU2's VRAM BAR for the same reason as this patch.
> 
> It is always possible to find cases where a sibling pins the shared bridge 
> window in place.
> 
>> What would be the best way to handle this case?
> 
> The best way is to size them into the largest possible sizes right from 
> the beginning. But when doing that, nothing must break (introducing 
> regressions is not okay) so it kernel must be able to graciously fallback 
> to smaller sizes when there isn't enough space available for the largest 
> size.
> 
> What makes it complicated is that sizing and assignment are done very much 
> separately, so retrying with a smaller size is complicated. I'm working 
> toward this kind of solution but there are various things that have to be 
> fixed first.

How feasible would it be to add a quirk to resize the bar (or reserve enough
space for max) very early before any allocations are done?

I doubt any user of resizable bar is going to hotplug their GPU's.

Kind regards,
~Maarten Lankhorst

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [PATCH] PCI: Fix resizable bar fails due to bridge memory region
  2026-04-24 17:58       ` Maarten Lankhorst
@ 2026-04-24 18:40         ` Ilpo Järvinen
  0 siblings, 0 replies; 10+ messages in thread
From: Ilpo Järvinen @ 2026-04-24 18:40 UTC (permalink / raw)
  To: Maarten Lankhorst
  Cc: linux-pci, Bjorn Helgaas, intel-xe@lists.freedesktop.org

[-- Attachment #1: Type: text/plain, Size: 9586 bytes --]

On Fri, 24 Apr 2026, Maarten Lankhorst wrote:
> Den 2026-04-24 kl. 19:42, skrev Ilpo Järvinen:
> > On Fri, 24 Apr 2026, Maarten Lankhorst wrote:
> >> Den 2026-04-24 kl. 17:04, skrev Ilpo Järvinen:
> >>> On Fri, 24 Apr 2026, Maarten Lankhorst wrote:
> >>>
> >>>> I encountered a problem that I have on my system, where I cannot resize
> >>>> the bar because one of the bridges has a 
> >>>
> >>> You're missing words from here. But I can guess you've that extra BAR on 
> >>> in-card the bridge.
> >>>
> >>>> If I take a look at the topology, the GPU shares the memory region with a bridge,
> >>>>
> >>>> +-[0000:64]-+-00.0-[65-68]----00.0-[66-68]--+-01.0-[67]----00.0
> >>>>
> >>>> The specific bridge likely causing a failure is:
> >>>>
> >>>> 65:00.0 PCI bridge: Intel Corporation Device e2ff (rev 01) (prog-if 00 [Normal decode])
> >>>>         Flags: bus master, fast devsel, latency 0, IRQ 32, IOMMU group 1
> >>>>         Memory at 382400000000 (64-bit, prefetchable) [size=8M]
> >>>>         ....
> >>>>
> >>>> Which causes upstream bridge 64:00.0 initially to allocate the region
> >>>> [38fe0000000-38ff0000000) for the GPU, and [382ff0000000..382ff07fffff]
> >>>> for the bridge device.
> >>>>
> >>>> Bridge 64 is big enough for 1 BMG with a 32 GB bar and the second 8 MB allocation:
> >>>> pci_bus 0000:64: resource 9 [mem 0x382000000000-0x382fffffffff window] (64GB window)
> >>>>
> >>>> The reason for failure is that bridge 65 has a 8 MB memory region assigned,
> >>>
> >>>> and previously it was ignored when reallocating.
> >>>
> >>> What does this mean? I don't think it was ever ignored while 
> >>> reallocating??
> >>>
> >>> Note that kernel has become much more verbose in explaining why things 
> >>> fail so perhaps the added message is confusing you (they won't appear in 
> >>> the old kernels).
> >>>
> >>>> Failing case:
> >>>> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
> >>>> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >>>> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >>>> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >>>> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: was not released (still contains assigned resources)
> >>>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> >>>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> >>>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> >>>> pcieport 0000:65:00.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> >>>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> >>>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> >>>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: can't assign; no space
> >>>> pcieport 0000:66:01.0: bridge window [mem size 0x400000000 64bit pref]: failed to assign
> >>>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
> >>>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
> >>>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: can't assign; no space
> >>>> xe 0000:67:00.0: BAR 2 [mem size 0x400000000 64bit pref]: failed to assign
> >>>> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
> >>>> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >>>> pcieport 0000:64:00.0:   bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]
> >>>> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
> >>>> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >>>> pcieport 0000:65:00.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
> >>>> pcieport 0000:66:01.0: PCI bridge to [bus 67]
> >>>> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
> >>>> pcieport 0000:66:01.0:   bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]
> >>>>
> >>>> Working with the patch below:
> >>>> xe 0000:67:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
> >>>> xe 0000:67:00.0: BAR 2 [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >>>> pcieport 0000:66:01.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >>>> pcieport 0000:65:00.0: bridge window [mem 0x382fe0000000-0x382fefffffff 64bit pref]: releasing
> >>>> pcieport 0000:65:00.0: BAR 0 [mem 0x382ff0000000-0x382ff07fffff 64bit pref]: releasing
> >>>> pcieport 0000:64:00.0: bridge window [mem 0x382fe0000000-0x382ff07fffff 64bit pref]: releasing
> >>>> pcieport 0000:64:00.0: bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]: assigned
> >>>> pcieport 0000:65:00.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
> >>>> pcieport 0000:65:00.0: BAR 0 [mem 0x382400000000-0x3824007fffff 64bit pref]: assigned
> >>>> pcieport 0000:66:01.0: bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
> >>>> xe 0000:67:00.0: BAR 2 [mem 0x382000000000-0x3823ffffffff 64bit pref]: assigned
> >>>> pcieport 0000:64:00.0: PCI bridge to [bus 65-68]
> >>>> pcieport 0000:64:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >>>> pcieport 0000:64:00.0:   bridge window [mem 0x382000000000-0x3824007fffff 64bit pref]
> >>>> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
> >>>> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >>>> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
> >>>> pcieport 0000:65:00.0: PCI bridge to [bus 66-68]
> >>>> pcieport 0000:65:00.0:   bridge window [mem 0xd7000000-0xd83fffff]
> >>>> pcieport 0000:65:00.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
> >>>> pcieport 0000:66:01.0: PCI bridge to [bus 67]
> >>>> pcieport 0000:66:01.0:   bridge window [mem 0xd7000000-0xd81fffff]
> >>>> pcieport 0000:66:01.0:   bridge window [mem 0x382000000000-0x3823ffffffff 64bit pref]
> >>>> xe 0000:67:00.0: [drm] BAR2 resized to 16384MiB
> >>>>
> >>>>
> >>>> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> >>>> ---
> >>>> I'm not 100% this is the correct fix, I don't know why the bridge itself has
> >>>> a memory region, why the kernel allocates it and when it's supposed to
> >>>> be used. Not a PCI expert. :-)
> >>>
> >>> I don't know why it is there either. Nothing in the portdrv really uses it 
> >>> for anything. There is patchset somewhere lying around which adds a quirk 
> >>> that releases the "extra" BAR.
> >>
> >> Thank you, I've taken a look at that patch series. It looks like patch 1/2
> >> would help a lot.
> > 
> > I should one day find time to finish that series, Bjorn didn't like how 
> > the code didn't "disable" BAR.
> > 
> > I did some (unset) work towards placing the BARs outside the bridge 
> > window but my algorithm was quite basic (just found min & max window
> > addresses and put BAR outside of that range but then I thought maybe I 
> > should add the possiblity for placing the BAR into the gap in the middle to
> > allow placement of a large BAR in cases where 32-bit mmio blocks low-end + 
> > 64-bit mmio range blocking the top of the address space.
> > 
> >> I'm wondering if it will completely fix the issue, it is still possible
> >> that in the same config I have 2 identical cards, where resizing might
> >> work, but when GPU1's VRAM BAR is already bound, it might be unable
> >> to resize GPU2's VRAM BAR for the same reason as this patch.
> > 
> > It is always possible to find cases where a sibling pins the shared bridge 
> > window in place.
> > 
> >> What would be the best way to handle this case?
> > 
> > The best way is to size them into the largest possible sizes right from 
> > the beginning. But when doing that, nothing must break (introducing 
> > regressions is not okay) so it kernel must be able to graciously fallback 
> > to smaller sizes when there isn't enough space available for the largest 
> > size.
> > 
> > What makes it complicated is that sizing and assignment are done very much 
> > separately, so retrying with a smaller size is complicated. I'm working 
> > toward this kind of solution but there are various things that have to be 
> > fixed first.
> 
> How feasible would it be to add a quirk to resize the bar (or reserve enough
> space for max) very early before any allocations are done?

I don't think that is viable.

Resizing is way more complicated than touching a single BAR because how 
the bridge windows work and how resource sizes interact.

No solution is allowed to cause regressions which could easily happen 
_much later_ into the resource allocation (very much after the quirk has 
finished). How'd you rollback the size changes the quirk caused at that 
point???

What such a quirk would effectively do is make rolling back the size 
changes an intractable problem, so any regression would be unfixable 
except by piling in more and more hacks which isn't viable way forward.

> I doubt any user of resizable bar is going to hotplug their GPU's.

eGPUs connected over Thunderbolt are hotpluggable (whether the 
hotpluggability occurs in practice in those cases is another question 
though, or if the eGPU just sits there always connected).

-- 
 i.

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2026-04-24 18:40 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-04-24 14:43 [PATCH] PCI: Fix resizable bar fails due to bridge memory region Maarten Lankhorst
2026-04-24 14:48 ` ✗ CI.checkpatch: warning for " Patchwork
2026-04-24 14:50 ` ✓ CI.KUnit: success " Patchwork
2026-04-24 15:04 ` [PATCH] " Ilpo Järvinen
2026-04-24 16:03   ` Maarten Lankhorst
2026-04-24 17:42     ` Ilpo Järvinen
2026-04-24 17:58       ` Maarten Lankhorst
2026-04-24 18:40         ` Ilpo Järvinen
2026-04-24 15:40 ` ✗ Xe.CI.BAT: failure for " Patchwork
2026-04-24 17:24 ` ✗ Xe.CI.FULL: " Patchwork

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