messages from 2026-06-15 20:18:52 to 2026-06-16 14:53:31 UTC [more...]
[PATCH v2 00/11] Enable CMRR in fixed-RR VRR path
2026-06-16 14:42 UTC (10+ messages)
` [PATCH v2 02/11] drm/i915/vrr: compute CMRR fractional timings generically
` [PATCH v2 03/11] drm/i915/vrr: dump CMRR state in the crtc state dump
` [PATCH v2 04/11] drm/i915/vrr: Move CMRR hw registers to fix refresh rate path
` [PATCH v2 05/11] drm/i915/vrr: Enable/Disable CMRR based on enable/disable preconditions
` [PATCH v2 06/11] drm/i915/display: Move CMRR crtc_state members under VRR
` [PATCH v2 07/11] drm/i915/vrr: Fix the CMRR enabling/disabling sequence
` [PATCH v2 08/11] drm/i915/vrr: Compare state and HW registers if platform supports CMRR
` [PATCH v2 09/11] drm/i915/vrr: Remove TODO as CMRR is exclusive to Adaptive mode
` [PATCH v2 10/11] drm/i915/vrr: Return from CMRR compute config in case of PSR2 enabled
[PATCH V11 00/12] Add memory page offlining support
2026-06-16 14:13 UTC (12+ messages)
` [PATCH V11 11/12] drm/xe/uapi: Expose ban reason in EXEC_QUEUE_GET_PROPERTY_BAN
[PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms
2026-06-16 13:41 UTC (4+ messages)
` ✗ CI.checkpatch: warning for drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms (rev5)
` ✓ CI.KUnit: success "
` ✓ Xe.CI.BAT: "
[PATCH v4] drm/xe/guc: Hold device ref until queue teardown completes
2026-06-16 13:36 UTC (4+ messages)
` ✓ CI.KUnit: success for drm/xe/guc: Hold device ref until queue teardown completes (rev2)
` ✓ Xe.CI.BAT: "
` ✗ Xe.CI.FULL: failure "
[PATCH v2 0/2] Unify fec enable/disable across the mst streams
2026-06-16 12:57 UTC (10+ messages)
` [PATCH v2 1/2] drm/i915/mst: Unify fec_enable across "
` [PATCH v2 2/2] drm/i915/display: Refcount for fec enable/disable
` ✓ CI.KUnit: success for Unify fec enable/disable across the mst streams
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH v9 00/22] CMTG enablement
2026-06-16 12:56 UTC (31+ messages)
` [PATCH v9 01/22] drm/i915/cmtg: Add intel_cmtg_is_allowed() for CMTG
` [PATCH v9 02/22] drm/i915/cmtg: Set CMTG clock select
` [PATCH v9 06/22] drm/i915/display: Skip DP_MIN_HBLANK_CTL programming for CMTG transcoders
` [PATCH v9 07/22] drm/i915/display: Pass transcoder to intel_set_transcoder_timings_lrr()
` [PATCH v9 08/22] drm/i915/display: Rename cpu_transcoder parameter to transcoder in LRR path
` [PATCH v9 09/22] drm/i915/cmtg: Set timings for CMTG by using transcoder timing helpers
` [PATCH v9 10/22] drm/i915/vrr: Pass transcoder to intel_vrr_set_fixed_rr_timings()
` [PATCH v9 11/22] drm/i915/display: Rename cpu_transcoder parameter to transcoder in VRR fixed-rr path
` [PATCH v9 12/22] drm/i915/cmtg: Program VRR fixed-rate timings for CMTG transcoder
` [PATCH v9 13/22] drm/i915/cmtg: Program VRR control register "
` [PATCH v9 14/22] drm/i915/cmtg: Set link M/N "
` [PATCH v9 15/22] drm/i915/cmtg: Add hook to enable CMTG with sync to port
` [PATCH v9 16/22] drm/i915/cmtg: Add a hook to make eDP transcoder secondary
` [PATCH v9 17/22] drm/i915/cmtg: Modify existing hook to disable CMTG
` [PATCH v9 18/22] drm/i915/cmtg: Add CMTG HWGB programming
` [PATCH v9 19/22] drm/i915/cmtg: Add CMTG scan line programming
` [PATCH v9 20/22] drm/i915/cmtg: Add trigger to enable/disable cmtg
` [PATCH v9 21/22] drm/i915/cmtg: Restore CMTG after DC6 exit
` [PATCH v9 22/22] drm/i915/cmtg: Add CMTG interrupt handling
` ✓ CI.KUnit: success for CMTG enablement (rev10)
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
` [PATCH v9 05/22] drm/i915/display: Rename cpu_transcoder parameter to transcoder
[PATCH] drm/i915/backlight: Set brightness to 0 on disable
2026-06-16 12:54 UTC (4+ messages)
` ✓ CI.KUnit: success for "
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[CI v4 00/39] For CI only: DC3CO/CMTG validation series
2026-06-16 12:44 UTC (40+ messages)
` [CI v4 01/39] drm/i915/cmtg: Add intel_cmtg_is_allowed() for CMTG
` [CI v4 02/39] drm/i915/cmtg: Set CMTG clock select
` [CI v4 03/39] drm/i915/cmtg: Add CMTG transcoder offset in struct _device_info
` [CI v4 04/39] drm/i915/display: Pass target transcoder to intel_set_transcoder_timings()
` [CI v4 05/39] drm/i915/display: Rename cpu_transcoder parameter to transcoder
` [CI v4 06/39] drm/i915/display: Skip DP_MIN_HBLANK_CTL programming for CMTG transcoders
` [CI v4 07/39] drm/i915/display: Pass transcoder to intel_set_transcoder_timings_lrr()
` [CI v4 08/39] drm/i915/display: Rename cpu_transcoder parameter to transcoder in LRR path
` [CI v4 09/39] drm/i915/cmtg: Set timings for CMTG by using transcoder timing helpers
` [CI v4 10/39] drm/i915/vrr: Pass transcoder to intel_vrr_set_fixed_rr_timings()
` [CI v4 11/39] drm/i915/display: Rename cpu_transcoder parameter to transcoder in VRR fixed-rr path
` [CI v4 12/39] drm/i915/cmtg: Program VRR fixed-rate timings for CMTG transcoder
` [CI v4 13/39] drm/i915/cmtg: Program VRR control register "
` [CI v4 14/39] drm/i915/cmtg: Set link M/N "
` [CI v4 15/39] drm/i915/cmtg: Add hook to enable CMTG with sync to port
` [CI v4 16/39] drm/i915/cmtg: Add a hook to make eDP transcoder secondary
` [CI v4 17/39] drm/i915/cmtg: Modify existing hook to disable CMTG
` [CI v4 18/39] drm/i915/cmtg: Add CMTG HWGB programming
` [CI v4 19/39] drm/i915/cmtg: Add CMTG scan line programming
` [CI v4 20/39] drm/i915/cmtg: Add trigger to enable/disable cmtg
` [CI v4 21/39] drm/i915/cmtg: Restore CMTG after DC6 exit
` [CI v4 22/39] drm/i915/cmtg: Add CMTG interrupt handling
` [CI v4 23/39] drm/i915/display: Remove TGL DC3CO support
` [CI v4 24/39] drm/i915/display: Switch DC3CO enable from standalone bit to DC level encoding
` [CI v4 25/39] drm/i915/display: Use FIELD_PREP() for DC state enable bits
` [CI v4 26/39] drm/i915/display: Add DC3CO DC_STATE enable/disable support
` [CI v4 27/39] drm/i915/display: Add HAS_DC3CO() macro
` [CI v4 28/39] drm/i915/display: Add DC3CO support check
` [CI v4 29/39] drm/i915/psr: Add psr2 deep sleep helper API
` [CI v4 30/39] drm/i915/display: Add DC3CO compute and set target state in commit tail
` [CI v4 31/39] drm/i915/display: Store DC3CO eligibility in PSR state
` [CI v4 32/39] drm/i915/display: PSR2: Set idle_frames to 0 for DC3CO
` [CI v4 33/39] drm/i915/display: Enable DC3CO idle protocol in ALPM
` [CI v4 34/39] drm/i915/display: PSR Add delayed work to exit DC3CO
` [CI v4 35/39] drm/i915/display: Add helper to enable DC counter
` [CI v4 36/39] drm/i915/display: Add DC3CO count and residency in dmc debugfs
` [CI v4 37/39] drm/i915/display: Guard CMTG function calls
` [CI v4 38/39] drm/i915/display: Enable DC3CO DC state
` [CI v4 39/39] drm/i915/display: Mask RO bits in gen9_write_dc_state()
[PATCH v2] drm/i915/alpm: Move the check for PSR and Fixed RR in compute_config_late
2026-06-16 12:33 UTC (5+ messages)
` ✓ CI.KUnit: success for drm/i915/alpm: Move the check for PSR and Fixed RR in compute_config_late (rev2)
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH] drm/i915/display: update to the BW buddy configuration
2026-06-16 11:54 UTC (3+ messages)
` ✓ CI.KUnit: success for "
` ✓ Xe.CI.BAT: "
[RFC PATCH 0/4] Xe driver asynchronous notification mechanism
2026-06-16 11:18 UTC (4+ messages)
[PATCH v2] drm/xe/pt: Fix NULL pointer dereference in xe_pt_zap_ptes_entry()
2026-06-16 10:59 UTC (4+ messages)
` ✓ CI.KUnit: success for drm/xe/pt: Fix NULL pointer dereference in xe_pt_zap_ptes_entry() (rev2)
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH v1] drm/i915/display: Program TRANS_VTOTAL from mode vtotal
2026-06-16 10:14 UTC (6+ messages)
` ✗ CI.checkpatch: warning for "
` ✓ CI.KUnit: success "
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH 0/4] drm/{i915,xe}: unify runtime pm calls
2026-06-16 10:09 UTC (6+ messages)
` [PATCH 3/4] drm/xe/display: separate d3cold handling from xe_display_pm_runtime_suspend_late()
` [PATCH 4/4] drm/xe/display: unify runtime suspend/resume with i915 for non-d3cold
[PATCH 00/23] driver core: count references of the platform device's fwnode, not OF node
2026-06-16 9:51 UTC (12+ messages)
` [PATCH 07/23] driver core: platform: provide platform_device_set_fwnode()
` [PATCH 08/23] driver core: platform: provide platform_device_set_of_node_from_dev()
[PATCH] drm/intel: drop driver include from mchbar_regs.h
2026-06-16 9:44 UTC (3+ messages)
[PATCH 0/6] drm/i915/cdclk: CDCLK sanitization stuff
2026-06-16 8:26 UTC (12+ messages)
` [PATCH 1/6] drm/i915/cdclk: Fix up CDCLK_FREQ_DECIMAL without a full PLL re-enable
` [PATCH 2/6] drm/i915/cdclk: Print the reason for the CDCLK sanitization
` [PATCH 3/6] drm/i915/cdclk Clean up CDCLK_CTL defines
` [PATCH 4/6] drm/i915/cdclk: Document CDCLK_CTL bits
` [PATCH 6/6] drm/i915/cdclk: Use the TGL+ CD2x pipe select bits also on ICL
` [PATCH 5/6] drm/i915/cdclk: Introduce bxt_cdclk_cd2x_pipe_mask() and use it
[PATCH] drm/i915/alpm: Move the check for PSR and Fixed RR in compute_config_late
2026-06-16 8:22 UTC (3+ messages)
[PATCH] drm/i915/drrs: Synchronize drrs activate with debugfs
2026-06-16 8:05 UTC (2+ messages)
[PATCH v8] drm/xe: Consolidate debugfs fault injection functions
2026-06-16 7:37 UTC (4+ messages)
` ✓ CI.KUnit: success for drm/xe: Consolidate debugfs fault injection functions. (rev2)
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH 0/4] drm/i915: Work harder to enable VRR based refresh rate changes on eDP
2026-06-16 7:21 UTC (5+ messages)
[PATCH] drm/i915/display: Refcount for fec enable/disable
2026-06-16 5:46 UTC (5+ messages)
[PATCH] drm/xe/guc: Downgrade Memory CAT error message
2026-06-16 3:59 UTC (5+ messages)
` ✓ CI.KUnit: success for "
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH v3 0/9] Don't whitelist OA registers unconditionally
2026-06-16 3:33 UTC (14+ messages)
` [PATCH v3 1/9] drm/xe/rtp: Add RING_FORCE_TO_NONPRIV_DENY to OA whitelists
` [PATCH v3 2/9] drm/xe/rtp: Maintain OA whitelists separately
` [PATCH v3 3/9] drm/xe/rtp: Keep track of non-OA nonpriv slots
` [PATCH v3 4/9] drm/xe/rtp: Generalize whitelist_apply_to_hwe
` [PATCH v3 5/9] drm/xe/rtp: Save OA nonpriv registers to register save/restore lists
` [PATCH v3 6/9] drm/xe/rtp: Toggle 'deny' bit to (de-)whitelist OA regs
` [PATCH v3 7/9] drm/xe/rtp: (De-)whitelist OA registers for all hwe's for a gt
` [PATCH v3 8/9] drm/xe/oa: (De-)whitelist OA registers on OA stream open/release
` [PATCH v3 9/9] drm/xe/rtp: Ensure locking/ref counting for OA whitelists
` ✗ CI.checkpatch: warning for Don't whitelist OA registers unconditionally (rev4)
` ✓ CI.KUnit: success "
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[drm-xe:drm-xe-next] BUILD SUCCESS 0a78a44f4901aa6c9263e66be7fce02282f1109f
2026-06-16 1:58 UTC
[PATCH v3 0/7] drm/i915/display: reduce the pm demand peak bw based on display data rate
2026-06-16 1:34 UTC (11+ messages)
` [PATCH v3 1/7] drm/i915/wm: clear the plane ddb_y entries on plane disable
` [PATCH v3 2/7] drm/i915/pm_demand: introduce HAS_PMDEMAND macro
` [PATCH v3 3/7] drm/i915/display: sagv pre/post plane calls to check pmdemand support
` [PATCH v3 4/7] drm/i915/bw: Extract icl_init_qgv_info()
` [PATCH v3 5/7] drm/i915/bw: extract update_sagv_status()
` [PATCH v3 6/7] drm/i915/bw: avoid replicating the update_sagv_status() calls
` [PATCH v3 7/7] drm/i915/bw: introduce the peak bandwidth threshold
` ✓ CI.KUnit: success for drm/i915/display: reduce the pm demand peak bw based on display data rate (rev2)
` ✓ Xe.CI.BAT: "
` ✓ Xe.CI.FULL: "
[PATCH v8 00/27] drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe
2026-06-15 23:22 UTC (23+ messages)
` [PATCH v8 11/27] drm/i915/display: Make icl_dsi_frame_update use _fw too
` [PATCH v8 12/27] drm/i915/display: Use intel_de_read/write_fw in colorops
` [PATCH v8 13/27] drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset
` [PATCH v8 14/27] drm/i915/display: Make set_pipeconf use the fw variants
` [PATCH v8 15/27] drm/i915/gt: Use spin_lock_irq() instead of local_irq_disable() + spin_lock()
` [PATCH v8 16/27] drm/i915: Drop the irqs_disabled() check
` [PATCH v8 17/27] drm/i915/guc: Consider also RCU depth in busy loop
` [PATCH v8 18/27] drm/i915/gt: Fix selftests on PREEMPT_RT
` [PATCH v8 19/27] drm/i915/gt: Set stop_timeout() correctly on PREEMPT-RT
` [PATCH v8 20/27] drm/i915/display: Remove uncore lock from vlv_atomic_update_fifo
` [PATCH v8 21/27] drm/i915: Use sleeping selftests for igt_atomic on PREEMPT_RT
` [PATCH v8 22/27] Revert "drm/i915: Depend on !PREEMPT_RT."
` [PATCH v8 23/27] PREEMPT_RT injection
` [PATCH v8 24/27] FOR-CI: bump MAX_STACK_TRACE_ENTRIES
` [PATCH v8 25/27] drm/i915/gt: Add a spinlock to prevent starvation of irq_work
` [PATCH v8 26/27] drm/xe/display: Always use system memory on PREEMPT_RT for DPT
` [PATCH v8 27/27] drm/xe/display: Prefer not to allocate a framebuffers in stolen memory
` ✗ CI.checkpatch: warning for drm/i915/display: All patches to make PREEMPT_RT work on i915 + xe. (rev16)
` ✓ CI.KUnit: success "
` ✗ CI.checksparse: warning "
` ✗ Xe.CI.BAT: failure "
` ✗ Xe.CI.FULL: "
[PATCH] drm/xe/memirq: Size report pages from static engine mask
2026-06-15 22:26 UTC (2+ messages)
[PATCH v2 0/3] drm/i915/scaler: allocation cleanup
2026-06-15 21:23 UTC (2+ messages)
` ✓ Xe.CI.FULL: success for drm/i915/scaler: allocation cleanup (rev2)
[PATCH 0/6] drm/{i915, xe}: display probe/remove cleanup and unification
2026-06-15 20:44 UTC (2+ messages)
` ✓ Xe.CI.FULL: success for "
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