* [PATCH v2 0/2] Unify fec enable/disable across the mst streams
@ 2026-06-16 6:15 Arun R Murthy
2026-06-16 6:15 ` [PATCH v2 1/2] drm/i915/mst: Unify fec_enable across " Arun R Murthy
` (5 more replies)
0 siblings, 6 replies; 10+ messages in thread
From: Arun R Murthy @ 2026-06-16 6:15 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Arun R Murthy, Stephen Fuhry
First version of the patch included only one patch i.e the ref count
https://patchwork.freedesktop.org/series/167664/
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
Arun R Murthy (2):
drm/i915/mst: Unify fec_enable across mst streams
drm/i915/display: Refcount for fec enable/disable
drivers/gpu/drm/i915/display/intel_ddi.c | 58 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_ddi.h | 1 +
drivers/gpu/drm/i915/display/intel_display_types.h | 3 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 70 ++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_modeset_setup.c | 6 ++
5 files changed, 138 insertions(+)
---
base-commit: c585a0a7e48a48aca80f7c0acb7294c7bf301bb7
change-id: 20260616-fec-82a3d27e0f11
Best regards,
--
Arun R Murthy <arun.r.murthy@intel.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 1/2] drm/i915/mst: Unify fec_enable across mst streams
2026-06-16 6:15 [PATCH v2 0/2] Unify fec enable/disable across the mst streams Arun R Murthy
@ 2026-06-16 6:15 ` Arun R Murthy
2026-06-16 12:57 ` Jani Nikula
2026-06-16 6:15 ` [PATCH v2 2/2] drm/i915/display: Refcount for fec enable/disable Arun R Murthy
` (4 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Arun R Murthy @ 2026-06-16 6:15 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Arun R Murthy, Stephen Fuhry
FEC is a link-wide property: DP_TP_CTL_FEC_ENABLE is a per-port HW bit
while crtc_state->fec_enable is per-stream. With DP MST several streams
share the same port, so if any sibling stream needs FEC the per-port HW
bit is on for every sibling. If sibling crtc_states disagree the
following two symptoms appear:
- intel_pipe_config_compare() rejects fastset on the sibling whose new
crtc_state->fec_enable disagrees with the old (HW) value
("fastset requirement not met in fec_enable"), forcing an
unnecessary full modeset.
- verify_crtc_state() after commit reports a fec_enable mismatch
("[CRTC:..] mismatch in fec_enable (expected no, found yes)") because
the per-port HW bit is read back into every sibling's hw state.
Walk every MST connector on @mst_mgr, pulling currently-active siblings
into @state if they are not already in it (covers the case where the
user's commit touches only a subset of MST streams on the link). Then OR
all sibling fec_enable values together and write the unified result back
into every sibling crtc_state. The unification only widens
(false -> true), never narrows, so a stream that genuinely needs FEC
keeps it.
This runs from intel_dp_mst_atomic_check_link(), which is invoked after
intel_atomic_check_config_and_link() has finished all per-stream
compute_config and compute_config_late passes but before
intel_crtc_check_fastset() and the post-commit verify, so the unified
value is visible to both checks.
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/16073
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Tested-by: Stephen Fuhry <fuhrysteve@gmail.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 70 +++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index bcdc504913471a1ac7d255cde49a907c9f3d88a6..d487f1c90dcd2671754e6c6f28f207f32ace9ee2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -881,6 +881,72 @@ static int intel_dp_mst_check_bw(struct intel_atomic_state *state,
return ret ? : -EAGAIN;
}
+/*
+ * Unify crtc_state->fec_enable across every MST sibling stream on @mst_mgr.
+ */
+static int intel_dp_mst_unify_fec_enable(struct intel_atomic_state *state,
+ struct drm_dp_mst_topology_mgr *mst_mgr)
+{
+ struct intel_display *display = to_intel_display(state);
+ struct drm_connector_list_iter connector_list_iter;
+ struct intel_connector *connector;
+ struct intel_crtc *crtcs[I915_MAX_PIPES];
+ int n_crtcs = 0;
+ bool need_fec = false;
+ int ret = 0;
+ int i;
+
+ drm_connector_list_iter_begin(display->drm, &connector_list_iter);
+ for_each_intel_connector_iter(connector, &connector_list_iter) {
+ struct intel_digital_connector_state *conn_state;
+ struct intel_crtc_state *crtc_state;
+ struct intel_crtc *crtc;
+
+ if (&connector->mst.dp->mst.mgr != mst_mgr)
+ continue;
+
+ conn_state = intel_atomic_get_digital_connector_state(state,
+ connector);
+ if (IS_ERR(conn_state)) {
+ ret = PTR_ERR(conn_state);
+ break;
+ }
+
+ if (!conn_state->base.crtc)
+ continue;
+
+ crtc = to_intel_crtc(conn_state->base.crtc);
+ crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
+ if (IS_ERR(crtc_state)) {
+ ret = PTR_ERR(crtc_state);
+ break;
+ }
+
+ if (!crtc_state->hw.active)
+ continue;
+
+ if (drm_WARN_ON(display->drm, n_crtcs >= ARRAY_SIZE(crtcs)))
+ break;
+
+ crtcs[n_crtcs++] = crtc;
+ if (crtc_state->fec_enable)
+ need_fec = true;
+ }
+ drm_connector_list_iter_end(&connector_list_iter);
+
+ if (ret || !need_fec)
+ return ret;
+
+ for (i = 0; i < n_crtcs; i++) {
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtcs[i]);
+
+ crtc_state->fec_enable = true;
+ }
+
+ return 0;
+}
+
/**
* intel_dp_mst_atomic_check_link - check all modeset MST link configuration
* @state: intel atomic state
@@ -908,6 +974,10 @@ int intel_dp_mst_atomic_check_link(struct intel_atomic_state *state,
int i;
for_each_new_mst_mgr_in_state(&state->base, mgr, mst_state, i) {
+ ret = intel_dp_mst_unify_fec_enable(state, mgr);
+ if (ret)
+ return ret;
+
ret = intel_dp_mst_check_dsc_change(state, mgr, limits);
if (ret)
return ret;
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] drm/i915/display: Refcount for fec enable/disable
2026-06-16 6:15 [PATCH v2 0/2] Unify fec enable/disable across the mst streams Arun R Murthy
2026-06-16 6:15 ` [PATCH v2 1/2] drm/i915/mst: Unify fec_enable across " Arun R Murthy
@ 2026-06-16 6:15 ` Arun R Murthy
2026-06-16 12:52 ` Jani Nikula
2026-06-16 6:24 ` ✓ CI.KUnit: success for Unify fec enable/disable across the mst streams Patchwork
` (3 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Arun R Murthy @ 2026-06-16 6:15 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Arun R Murthy, Stephen Fuhry
The FEC_ENABLE bit is per port basis and is enabled/disabled on ddi
pre_enable and post_disable. This fec is shared across the mst streams
and can be enabled per stream basis as well.
So have a refcount to track the usage of FEC and then enable/disable
accordingly.
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/16073
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Tested-by: Stephen Fuhry <fuhrysteve@gmail.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 58 ++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_ddi.h | 1 +
drivers/gpu/drm/i915/display/intel_display_types.h | 3 ++
drivers/gpu/drm/i915/display/intel_modeset_setup.c | 6 +++
4 files changed, 68 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 25314ec65ae77b91bf4d732c229f236d070e18cc..477a11a63fe8f8d6731905be21de34dcbaa895b5 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2096,6 +2096,47 @@ void intel_ddi_disable_clock(struct intel_encoder *encoder)
encoder->disable_clock(encoder);
}
+/**
+ * intel_ddi_seed_fec_refcounts - Seed per-port FEC refcounts from active CRTCs
+ * @display: display device
+ *
+ * intel_digital_port::fec_active_streams is the per-port refcount that gates
+ * programming of the shared DP_TP_CTL_FEC_ENABLE bit. After initial HW state
+ * readout (driver load, resume, GPU reset takeover), the persistent
+ * crtc_state->fec_enable values reflect what HW currently has; we need to
+ * align the refcount with that so the first paired disable doesn't underflow
+ * and the next enable doesn't incorrectly skip programming the HW bit.
+ *
+ * Must be called once after intel_modeset_readout_hw_state(), before any new
+ * modeset commit can run.
+ */
+void intel_ddi_seed_fec_refcounts(struct intel_display *display)
+{
+ struct intel_crtc *crtc;
+
+ for_each_intel_crtc(display, crtc) {
+ const struct intel_crtc_state *crtc_state =
+ to_intel_crtc_state(crtc->base.state);
+ struct intel_encoder *encoder;
+
+ if (!crtc_state->hw.active || !crtc_state->fec_enable)
+ continue;
+
+ for_each_intel_encoder(display->drm, encoder) {
+ struct intel_digital_port *dig_port;
+
+ if (encoder->base.crtc != &crtc->base)
+ continue;
+ if (!intel_encoder_is_dig_port(encoder))
+ continue;
+
+ dig_port = enc_to_dig_port(encoder);
+ dig_port->fec_active_streams++;
+ break;
+ }
+ }
+}
+
void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
@@ -2413,12 +2454,22 @@ static void intel_ddi_enable_fec(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
int i;
int ret;
if (!crtc_state->fec_enable)
return;
+ /*
+ * FEC is link-wide: DP_TP_CTL_FEC_ENABLE is per-port while
+ * crtc_state->fec_enable is per-stream. For DP MST, several streams
+ * on this port share the bit. Only program HW on the first stream
+ * needing FEC; subsequent streams just bump the refcount.
+ */
+ if (dig_port->fec_active_streams++ > 0)
+ return;
+
intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state),
0, DP_TP_CTL_FEC_ENABLE);
@@ -2454,10 +2505,17 @@ static void intel_ddi_disable_fec(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
+ struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
if (!crtc_state->fec_enable)
return;
+ if (drm_WARN_ON(display->drm, dig_port->fec_active_streams <= 0))
+ return;
+
+ if (--dig_port->fec_active_streams > 0)
+ return;
+
intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state),
DP_TP_CTL_FEC_ENABLE, 0);
intel_de_posting_read(display, dp_tp_ctl_reg(encoder, crtc_state));
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index 580ecb09b8b606e07445c7e26142a2fcfa69a2d2..3678c28a0dc952d4962428893c519fb7d41e4422 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -78,6 +78,7 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
enum transcoder cpu_transcoder,
bool enable, u32 hdcp_mask);
void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
+void intel_ddi_seed_fec_refcounts(struct intel_display *display);
int intel_ddi_level(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int lane);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index aa4772a1c208e4cb4bb6f51dc0dcc2349e422dd0..276d4cc21d6ecdd8c17777608e59223d9f49c554 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1989,6 +1989,9 @@ struct intel_digital_port {
struct ref_tracker *ddi_io_wakeref;
struct ref_tracker *aux_wakeref;
+ /* Number of active streams on this port currently using FEC */
+ int fec_active_streams;
+
struct intel_tc_port *tc;
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index e8730b5baf2a4bd2e5edfc5fc8fd2622a57d2a4e..4b6abcb1dd928ab2bc9b17f0521db78ebb6ef586 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -952,6 +952,12 @@ void intel_modeset_setup_hw_state(struct intel_display *display,
intel_modeset_readout_hw_state(display);
+ /*
+ * Seed per-port FEC refcounts from the just-populated active
+ * crtc_states before anything can issue an enable/disable.
+ */
+ intel_ddi_seed_fec_refcounts(display);
+
/* HW state is read out, now we need to sanitize this mess. */
get_encoder_power_domains(display);
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✓ CI.KUnit: success for Unify fec enable/disable across the mst streams
2026-06-16 6:15 [PATCH v2 0/2] Unify fec enable/disable across the mst streams Arun R Murthy
2026-06-16 6:15 ` [PATCH v2 1/2] drm/i915/mst: Unify fec_enable across " Arun R Murthy
2026-06-16 6:15 ` [PATCH v2 2/2] drm/i915/display: Refcount for fec enable/disable Arun R Murthy
@ 2026-06-16 6:24 ` Patchwork
2026-06-16 7:07 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-06-16 6:24 UTC (permalink / raw)
To: Arun R Murthy; +Cc: intel-xe
== Series Details ==
Series: Unify fec enable/disable across the mst streams
URL : https://patchwork.freedesktop.org/series/168569/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[06:23:00] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:23:04] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:23:35] Starting KUnit Kernel (1/1)...
[06:23:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:23:36] ================== guc_buf (11 subtests) ===================
[06:23:36] [PASSED] test_smallest
[06:23:36] [PASSED] test_largest
[06:23:36] [PASSED] test_granular
[06:23:36] [PASSED] test_unique
[06:23:36] [PASSED] test_overlap
[06:23:36] [PASSED] test_reusable
[06:23:36] [PASSED] test_too_big
[06:23:36] [PASSED] test_flush
[06:23:36] [PASSED] test_lookup
[06:23:36] [PASSED] test_data
[06:23:36] [PASSED] test_class
[06:23:36] ===================== [PASSED] guc_buf =====================
[06:23:36] =================== guc_dbm (7 subtests) ===================
[06:23:36] [PASSED] test_empty
[06:23:36] [PASSED] test_default
[06:23:36] ======================== test_size ========================
[06:23:36] [PASSED] 4
[06:23:36] [PASSED] 8
[06:23:36] [PASSED] 32
[06:23:36] [PASSED] 256
[06:23:36] ==================== [PASSED] test_size ====================
[06:23:36] ======================= test_reuse ========================
[06:23:36] [PASSED] 4
[06:23:36] [PASSED] 8
[06:23:36] [PASSED] 32
[06:23:36] [PASSED] 256
[06:23:36] =================== [PASSED] test_reuse ====================
[06:23:36] =================== test_range_overlap ====================
[06:23:36] [PASSED] 4
[06:23:36] [PASSED] 8
[06:23:36] [PASSED] 32
[06:23:36] [PASSED] 256
[06:23:36] =============== [PASSED] test_range_overlap ================
[06:23:36] =================== test_range_compact ====================
[06:23:36] [PASSED] 4
[06:23:36] [PASSED] 8
[06:23:36] [PASSED] 32
[06:23:36] [PASSED] 256
[06:23:36] =============== [PASSED] test_range_compact ================
[06:23:36] ==================== test_range_spare =====================
[06:23:36] [PASSED] 4
[06:23:36] [PASSED] 8
[06:23:36] [PASSED] 32
[06:23:36] [PASSED] 256
[06:23:36] ================ [PASSED] test_range_spare =================
[06:23:36] ===================== [PASSED] guc_dbm =====================
[06:23:36] =================== guc_idm (6 subtests) ===================
[06:23:36] [PASSED] bad_init
[06:23:36] [PASSED] no_init
[06:23:36] [PASSED] init_fini
[06:23:36] [PASSED] check_used
[06:23:36] [PASSED] check_quota
[06:23:36] [PASSED] check_all
[06:23:36] ===================== [PASSED] guc_idm =====================
[06:23:36] ================== no_relay (3 subtests) ===================
[06:23:36] [PASSED] xe_drops_guc2pf_if_not_ready
[06:23:36] [PASSED] xe_drops_guc2vf_if_not_ready
[06:23:36] [PASSED] xe_rejects_send_if_not_ready
[06:23:36] ==================== [PASSED] no_relay =====================
[06:23:36] ================== pf_relay (14 subtests) ==================
[06:23:36] [PASSED] pf_rejects_guc2pf_too_short
[06:23:36] [PASSED] pf_rejects_guc2pf_too_long
[06:23:36] [PASSED] pf_rejects_guc2pf_no_payload
[06:23:36] [PASSED] pf_fails_no_payload
[06:23:36] [PASSED] pf_fails_bad_origin
[06:23:36] [PASSED] pf_fails_bad_type
[06:23:36] [PASSED] pf_txn_reports_error
[06:23:36] [PASSED] pf_txn_sends_pf2guc
[06:23:36] [PASSED] pf_sends_pf2guc
[06:23:36] [SKIPPED] pf_loopback_nop
[06:23:36] [SKIPPED] pf_loopback_echo
[06:23:36] [SKIPPED] pf_loopback_fail
[06:23:36] [SKIPPED] pf_loopback_busy
[06:23:36] [SKIPPED] pf_loopback_retry
[06:23:36] ==================== [PASSED] pf_relay =====================
[06:23:36] ================== vf_relay (3 subtests) ===================
[06:23:36] [PASSED] vf_rejects_guc2vf_too_short
[06:23:36] [PASSED] vf_rejects_guc2vf_too_long
[06:23:36] [PASSED] vf_rejects_guc2vf_no_payload
[06:23:36] ==================== [PASSED] vf_relay =====================
[06:23:36] ================ pf_gt_config (9 subtests) =================
[06:23:36] [PASSED] fair_contexts_1vf
[06:23:36] [PASSED] fair_doorbells_1vf
[06:23:36] [PASSED] fair_ggtt_1vf
[06:23:36] ====================== fair_vram_1vf ======================
[06:23:36] [PASSED] 3.50 GiB
[06:23:36] [PASSED] 11.5 GiB
[06:23:36] [PASSED] 15.5 GiB
[06:23:36] [PASSED] 31.5 GiB
[06:23:36] [PASSED] 63.5 GiB
[06:23:36] [PASSED] 1.91 GiB
[06:23:36] ================== [PASSED] fair_vram_1vf ==================
[06:23:36] ================ fair_vram_1vf_admin_only =================
[06:23:36] [PASSED] 3.50 GiB
[06:23:36] [PASSED] 11.5 GiB
[06:23:36] [PASSED] 15.5 GiB
[06:23:36] [PASSED] 31.5 GiB
[06:23:36] [PASSED] 63.5 GiB
[06:23:36] [PASSED] 1.91 GiB
[06:23:36] ============ [PASSED] fair_vram_1vf_admin_only =============
[06:23:36] ====================== fair_contexts ======================
[06:23:36] [PASSED] 1 VF
[06:23:36] [PASSED] 2 VFs
[06:23:36] [PASSED] 3 VFs
[06:23:36] [PASSED] 4 VFs
[06:23:36] [PASSED] 5 VFs
[06:23:36] [PASSED] 6 VFs
[06:23:36] [PASSED] 7 VFs
[06:23:36] [PASSED] 8 VFs
[06:23:36] [PASSED] 9 VFs
[06:23:36] [PASSED] 10 VFs
[06:23:36] [PASSED] 11 VFs
[06:23:36] [PASSED] 12 VFs
[06:23:36] [PASSED] 13 VFs
[06:23:36] [PASSED] 14 VFs
[06:23:36] [PASSED] 15 VFs
[06:23:36] [PASSED] 16 VFs
[06:23:36] [PASSED] 17 VFs
[06:23:36] [PASSED] 18 VFs
[06:23:36] [PASSED] 19 VFs
[06:23:36] [PASSED] 20 VFs
[06:23:36] [PASSED] 21 VFs
[06:23:36] [PASSED] 22 VFs
[06:23:36] [PASSED] 23 VFs
[06:23:36] [PASSED] 24 VFs
[06:23:36] [PASSED] 25 VFs
[06:23:36] [PASSED] 26 VFs
[06:23:36] [PASSED] 27 VFs
[06:23:36] [PASSED] 28 VFs
[06:23:36] [PASSED] 29 VFs
[06:23:36] [PASSED] 30 VFs
[06:23:36] [PASSED] 31 VFs
[06:23:36] [PASSED] 32 VFs
[06:23:36] [PASSED] 33 VFs
[06:23:36] [PASSED] 34 VFs
[06:23:36] [PASSED] 35 VFs
[06:23:36] [PASSED] 36 VFs
[06:23:36] [PASSED] 37 VFs
[06:23:36] [PASSED] 38 VFs
[06:23:36] [PASSED] 39 VFs
[06:23:36] [PASSED] 40 VFs
[06:23:36] [PASSED] 41 VFs
[06:23:36] [PASSED] 42 VFs
[06:23:36] [PASSED] 43 VFs
[06:23:36] [PASSED] 44 VFs
[06:23:36] [PASSED] 45 VFs
[06:23:36] [PASSED] 46 VFs
[06:23:36] [PASSED] 47 VFs
[06:23:36] [PASSED] 48 VFs
[06:23:36] [PASSED] 49 VFs
[06:23:36] [PASSED] 50 VFs
[06:23:36] [PASSED] 51 VFs
[06:23:36] [PASSED] 52 VFs
[06:23:36] [PASSED] 53 VFs
[06:23:36] [PASSED] 54 VFs
[06:23:36] [PASSED] 55 VFs
[06:23:36] [PASSED] 56 VFs
[06:23:36] [PASSED] 57 VFs
[06:23:36] [PASSED] 58 VFs
[06:23:36] [PASSED] 59 VFs
[06:23:36] [PASSED] 60 VFs
[06:23:36] [PASSED] 61 VFs
[06:23:36] [PASSED] 62 VFs
[06:23:36] [PASSED] 63 VFs
[06:23:36] ================== [PASSED] fair_contexts ==================
[06:23:36] ===================== fair_doorbells ======================
[06:23:36] [PASSED] 1 VF
[06:23:36] [PASSED] 2 VFs
[06:23:36] [PASSED] 3 VFs
[06:23:36] [PASSED] 4 VFs
[06:23:36] [PASSED] 5 VFs
[06:23:36] [PASSED] 6 VFs
[06:23:36] [PASSED] 7 VFs
[06:23:36] [PASSED] 8 VFs
[06:23:36] [PASSED] 9 VFs
[06:23:36] [PASSED] 10 VFs
[06:23:36] [PASSED] 11 VFs
[06:23:36] [PASSED] 12 VFs
[06:23:36] [PASSED] 13 VFs
[06:23:36] [PASSED] 14 VFs
[06:23:36] [PASSED] 15 VFs
[06:23:36] [PASSED] 16 VFs
[06:23:36] [PASSED] 17 VFs
[06:23:36] [PASSED] 18 VFs
[06:23:36] [PASSED] 19 VFs
[06:23:36] [PASSED] 20 VFs
[06:23:36] [PASSED] 21 VFs
[06:23:36] [PASSED] 22 VFs
[06:23:36] [PASSED] 23 VFs
[06:23:36] [PASSED] 24 VFs
[06:23:36] [PASSED] 25 VFs
[06:23:36] [PASSED] 26 VFs
[06:23:36] [PASSED] 27 VFs
[06:23:36] [PASSED] 28 VFs
[06:23:36] [PASSED] 29 VFs
[06:23:36] [PASSED] 30 VFs
[06:23:36] [PASSED] 31 VFs
[06:23:36] [PASSED] 32 VFs
[06:23:36] [PASSED] 33 VFs
[06:23:36] [PASSED] 34 VFs
[06:23:36] [PASSED] 35 VFs
[06:23:36] [PASSED] 36 VFs
[06:23:36] [PASSED] 37 VFs
[06:23:36] [PASSED] 38 VFs
[06:23:36] [PASSED] 39 VFs
[06:23:36] [PASSED] 40 VFs
[06:23:36] [PASSED] 41 VFs
[06:23:36] [PASSED] 42 VFs
[06:23:36] [PASSED] 43 VFs
[06:23:36] [PASSED] 44 VFs
[06:23:36] [PASSED] 45 VFs
[06:23:36] [PASSED] 46 VFs
[06:23:36] [PASSED] 47 VFs
[06:23:36] [PASSED] 48 VFs
[06:23:36] [PASSED] 49 VFs
[06:23:36] [PASSED] 50 VFs
[06:23:36] [PASSED] 51 VFs
[06:23:36] [PASSED] 52 VFs
[06:23:36] [PASSED] 53 VFs
[06:23:36] [PASSED] 54 VFs
[06:23:36] [PASSED] 55 VFs
[06:23:36] [PASSED] 56 VFs
[06:23:36] [PASSED] 57 VFs
[06:23:36] [PASSED] 58 VFs
[06:23:36] [PASSED] 59 VFs
[06:23:36] [PASSED] 60 VFs
[06:23:36] [PASSED] 61 VFs
[06:23:36] [PASSED] 62 VFs
[06:23:36] [PASSED] 63 VFs
[06:23:36] ================= [PASSED] fair_doorbells ==================
[06:23:36] ======================== fair_ggtt ========================
[06:23:36] [PASSED] 1 VF
[06:23:36] [PASSED] 2 VFs
[06:23:36] [PASSED] 3 VFs
[06:23:36] [PASSED] 4 VFs
[06:23:36] [PASSED] 5 VFs
[06:23:36] [PASSED] 6 VFs
[06:23:36] [PASSED] 7 VFs
[06:23:36] [PASSED] 8 VFs
[06:23:36] [PASSED] 9 VFs
[06:23:36] [PASSED] 10 VFs
[06:23:36] [PASSED] 11 VFs
[06:23:36] [PASSED] 12 VFs
[06:23:36] [PASSED] 13 VFs
[06:23:36] [PASSED] 14 VFs
[06:23:36] [PASSED] 15 VFs
[06:23:36] [PASSED] 16 VFs
[06:23:36] [PASSED] 17 VFs
[06:23:36] [PASSED] 18 VFs
[06:23:36] [PASSED] 19 VFs
[06:23:36] [PASSED] 20 VFs
[06:23:36] [PASSED] 21 VFs
[06:23:36] [PASSED] 22 VFs
[06:23:36] [PASSED] 23 VFs
[06:23:36] [PASSED] 24 VFs
[06:23:36] [PASSED] 25 VFs
[06:23:36] [PASSED] 26 VFs
[06:23:36] [PASSED] 27 VFs
[06:23:36] [PASSED] 28 VFs
[06:23:36] [PASSED] 29 VFs
[06:23:36] [PASSED] 30 VFs
[06:23:36] [PASSED] 31 VFs
[06:23:36] [PASSED] 32 VFs
[06:23:36] [PASSED] 33 VFs
[06:23:36] [PASSED] 34 VFs
[06:23:36] [PASSED] 35 VFs
[06:23:36] [PASSED] 36 VFs
[06:23:36] [PASSED] 37 VFs
[06:23:36] [PASSED] 38 VFs
[06:23:36] [PASSED] 39 VFs
[06:23:36] [PASSED] 40 VFs
[06:23:36] [PASSED] 41 VFs
[06:23:36] [PASSED] 42 VFs
[06:23:36] [PASSED] 43 VFs
[06:23:36] [PASSED] 44 VFs
[06:23:36] [PASSED] 45 VFs
[06:23:36] [PASSED] 46 VFs
[06:23:36] [PASSED] 47 VFs
[06:23:36] [PASSED] 48 VFs
[06:23:36] [PASSED] 49 VFs
[06:23:36] [PASSED] 50 VFs
[06:23:36] [PASSED] 51 VFs
[06:23:36] [PASSED] 52 VFs
[06:23:36] [PASSED] 53 VFs
[06:23:36] [PASSED] 54 VFs
[06:23:36] [PASSED] 55 VFs
[06:23:36] [PASSED] 56 VFs
[06:23:36] [PASSED] 57 VFs
[06:23:36] [PASSED] 58 VFs
[06:23:36] [PASSED] 59 VFs
[06:23:36] [PASSED] 60 VFs
[06:23:36] [PASSED] 61 VFs
[06:23:36] [PASSED] 62 VFs
[06:23:36] [PASSED] 63 VFs
[06:23:36] ==================== [PASSED] fair_ggtt ====================
[06:23:36] ======================== fair_vram ========================
[06:23:36] [PASSED] 1 VF
[06:23:36] [PASSED] 2 VFs
[06:23:36] [PASSED] 3 VFs
[06:23:36] [PASSED] 4 VFs
[06:23:36] [PASSED] 5 VFs
[06:23:36] [PASSED] 6 VFs
[06:23:36] [PASSED] 7 VFs
[06:23:36] [PASSED] 8 VFs
[06:23:36] [PASSED] 9 VFs
[06:23:36] [PASSED] 10 VFs
[06:23:36] [PASSED] 11 VFs
[06:23:36] [PASSED] 12 VFs
[06:23:36] [PASSED] 13 VFs
[06:23:36] [PASSED] 14 VFs
[06:23:36] [PASSED] 15 VFs
[06:23:36] [PASSED] 16 VFs
[06:23:36] [PASSED] 17 VFs
[06:23:36] [PASSED] 18 VFs
[06:23:36] [PASSED] 19 VFs
[06:23:36] [PASSED] 20 VFs
[06:23:36] [PASSED] 21 VFs
[06:23:36] [PASSED] 22 VFs
[06:23:36] [PASSED] 23 VFs
[06:23:36] [PASSED] 24 VFs
[06:23:36] [PASSED] 25 VFs
[06:23:36] [PASSED] 26 VFs
[06:23:36] [PASSED] 27 VFs
[06:23:36] [PASSED] 28 VFs
[06:23:36] [PASSED] 29 VFs
[06:23:36] [PASSED] 30 VFs
[06:23:36] [PASSED] 31 VFs
[06:23:36] [PASSED] 32 VFs
[06:23:36] [PASSED] 33 VFs
[06:23:36] [PASSED] 34 VFs
[06:23:36] [PASSED] 35 VFs
[06:23:36] [PASSED] 36 VFs
[06:23:36] [PASSED] 37 VFs
[06:23:36] [PASSED] 38 VFs
[06:23:36] [PASSED] 39 VFs
[06:23:36] [PASSED] 40 VFs
[06:23:36] [PASSED] 41 VFs
[06:23:36] [PASSED] 42 VFs
[06:23:36] [PASSED] 43 VFs
[06:23:36] [PASSED] 44 VFs
[06:23:36] [PASSED] 45 VFs
[06:23:36] [PASSED] 46 VFs
[06:23:36] [PASSED] 47 VFs
[06:23:36] [PASSED] 48 VFs
[06:23:36] [PASSED] 49 VFs
[06:23:36] [PASSED] 50 VFs
[06:23:36] [PASSED] 51 VFs
[06:23:36] [PASSED] 52 VFs
[06:23:36] [PASSED] 53 VFs
[06:23:36] [PASSED] 54 VFs
[06:23:36] [PASSED] 55 VFs
[06:23:36] [PASSED] 56 VFs
[06:23:36] [PASSED] 57 VFs
[06:23:36] [PASSED] 58 VFs
[06:23:36] [PASSED] 59 VFs
[06:23:36] [PASSED] 60 VFs
[06:23:36] [PASSED] 61 VFs
[06:23:36] [PASSED] 62 VFs
[06:23:36] [PASSED] 63 VFs
[06:23:36] ==================== [PASSED] fair_vram ====================
[06:23:36] ================== [PASSED] pf_gt_config ===================
[06:23:36] ===================== lmtt (1 subtest) =====================
[06:23:36] ======================== test_ops =========================
[06:23:36] [PASSED] 2-level
[06:23:36] [PASSED] multi-level
[06:23:36] ==================== [PASSED] test_ops =====================
[06:23:36] ====================== [PASSED] lmtt =======================
[06:23:36] ================= pf_service (11 subtests) =================
[06:23:36] [PASSED] pf_negotiate_any
[06:23:36] [PASSED] pf_negotiate_base_match
[06:23:36] [PASSED] pf_negotiate_base_newer
[06:23:36] [PASSED] pf_negotiate_base_next
[06:23:36] [SKIPPED] pf_negotiate_base_older
[06:23:36] [PASSED] pf_negotiate_base_prev
[06:23:36] [PASSED] pf_negotiate_latest_match
[06:23:36] [PASSED] pf_negotiate_latest_newer
[06:23:36] [PASSED] pf_negotiate_latest_next
[06:23:36] [SKIPPED] pf_negotiate_latest_older
[06:23:36] [SKIPPED] pf_negotiate_latest_prev
[06:23:36] =================== [PASSED] pf_service ====================
[06:23:36] ================= xe_guc_g2g (2 subtests) ==================
[06:23:36] ============== xe_live_guc_g2g_kunit_default ==============
[06:23:36] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[06:23:36] ============== xe_live_guc_g2g_kunit_allmem ===============
[06:23:36] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[06:23:36] =================== [SKIPPED] xe_guc_g2g ===================
[06:23:36] =================== xe_mocs (2 subtests) ===================
[06:23:36] ================ xe_live_mocs_kernel_kunit ================
[06:23:36] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[06:23:36] ================ xe_live_mocs_reset_kunit =================
[06:23:36] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[06:23:36] ==================== [SKIPPED] xe_mocs =====================
[06:23:36] ================= xe_migrate (2 subtests) ==================
[06:23:36] ================= xe_migrate_sanity_kunit =================
[06:23:36] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[06:23:36] ================== xe_validate_ccs_kunit ==================
[06:23:36] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[06:23:36] =================== [SKIPPED] xe_migrate ===================
[06:23:36] ================== xe_dma_buf (1 subtest) ==================
[06:23:36] ==================== xe_dma_buf_kunit =====================
[06:23:36] ================ [SKIPPED] xe_dma_buf_kunit ================
[06:23:36] =================== [SKIPPED] xe_dma_buf ===================
[06:23:36] ================= xe_bo_shrink (1 subtest) =================
[06:23:36] =================== xe_bo_shrink_kunit ====================
[06:23:36] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[06:23:36] ================== [SKIPPED] xe_bo_shrink ==================
[06:23:36] ==================== xe_bo (2 subtests) ====================
[06:23:36] ================== xe_ccs_migrate_kunit ===================
[06:23:36] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[06:23:36] ==================== xe_bo_evict_kunit ====================
[06:23:36] =============== [SKIPPED] xe_bo_evict_kunit ================
[06:23:36] ===================== [SKIPPED] xe_bo ======================
[06:23:36] ==================== args (13 subtests) ====================
[06:23:36] [PASSED] count_args_test
[06:23:36] [PASSED] call_args_example
[06:23:36] [PASSED] call_args_test
[06:23:36] [PASSED] drop_first_arg_example
[06:23:36] [PASSED] drop_first_arg_test
[06:23:36] [PASSED] first_arg_example
[06:23:36] [PASSED] first_arg_test
[06:23:36] [PASSED] last_arg_example
[06:23:36] [PASSED] last_arg_test
[06:23:36] [PASSED] pick_arg_example
[06:23:36] [PASSED] if_args_example
[06:23:36] [PASSED] if_args_test
[06:23:36] [PASSED] sep_comma_example
[06:23:36] ====================== [PASSED] args =======================
[06:23:36] =================== xe_pci (3 subtests) ====================
[06:23:36] ==================== check_graphics_ip ====================
[06:23:36] [PASSED] 12.00 Xe_LP
[06:23:36] [PASSED] 12.10 Xe_LP+
[06:23:36] [PASSED] 12.55 Xe_HPG
[06:23:36] [PASSED] 12.60 Xe_HPC
[06:23:36] [PASSED] 12.70 Xe_LPG
[06:23:36] [PASSED] 12.71 Xe_LPG
[06:23:36] [PASSED] 12.74 Xe_LPG+
[06:23:36] [PASSED] 20.01 Xe2_HPG
[06:23:36] [PASSED] 20.02 Xe2_HPG
[06:23:36] [PASSED] 20.04 Xe2_LPG
[06:23:36] [PASSED] 30.00 Xe3_LPG
[06:23:36] [PASSED] 30.01 Xe3_LPG
[06:23:36] [PASSED] 30.03 Xe3_LPG
[06:23:36] [PASSED] 30.04 Xe3_LPG
[06:23:36] [PASSED] 30.05 Xe3_LPG
[06:23:36] [PASSED] 35.10 Xe3p_LPG
[06:23:36] [PASSED] 35.11 Xe3p_XPC
[06:23:36] ================ [PASSED] check_graphics_ip ================
[06:23:36] ===================== check_media_ip ======================
[06:23:36] [PASSED] 12.00 Xe_M
[06:23:36] [PASSED] 12.55 Xe_HPM
[06:23:36] [PASSED] 13.00 Xe_LPM+
[06:23:36] [PASSED] 13.01 Xe2_HPM
[06:23:36] [PASSED] 20.00 Xe2_LPM
[06:23:36] [PASSED] 30.00 Xe3_LPM
[06:23:36] [PASSED] 30.02 Xe3_LPM
[06:23:36] [PASSED] 35.00 Xe3p_LPM
[06:23:36] [PASSED] 35.03 Xe3p_HPM
[06:23:36] ================= [PASSED] check_media_ip ==================
[06:23:36] =================== check_platform_desc ===================
[06:23:36] [PASSED] 0x9A60 (TIGERLAKE)
[06:23:36] [PASSED] 0x9A68 (TIGERLAKE)
[06:23:36] [PASSED] 0x9A70 (TIGERLAKE)
[06:23:36] [PASSED] 0x9A40 (TIGERLAKE)
[06:23:36] [PASSED] 0x9A49 (TIGERLAKE)
[06:23:36] [PASSED] 0x9A59 (TIGERLAKE)
[06:23:36] [PASSED] 0x9A78 (TIGERLAKE)
[06:23:36] [PASSED] 0x9AC0 (TIGERLAKE)
[06:23:36] [PASSED] 0x9AC9 (TIGERLAKE)
[06:23:36] [PASSED] 0x9AD9 (TIGERLAKE)
[06:23:36] [PASSED] 0x9AF8 (TIGERLAKE)
[06:23:36] [PASSED] 0x4C80 (ROCKETLAKE)
[06:23:36] [PASSED] 0x4C8A (ROCKETLAKE)
[06:23:36] [PASSED] 0x4C8B (ROCKETLAKE)
[06:23:36] [PASSED] 0x4C8C (ROCKETLAKE)
[06:23:36] [PASSED] 0x4C90 (ROCKETLAKE)
[06:23:36] [PASSED] 0x4C9A (ROCKETLAKE)
[06:23:36] [PASSED] 0x4680 (ALDERLAKE_S)
[06:23:36] [PASSED] 0x4682 (ALDERLAKE_S)
[06:23:36] [PASSED] 0x4688 (ALDERLAKE_S)
[06:23:36] [PASSED] 0x468A (ALDERLAKE_S)
[06:23:36] [PASSED] 0x468B (ALDERLAKE_S)
[06:23:36] [PASSED] 0x4690 (ALDERLAKE_S)
[06:23:36] [PASSED] 0x4692 (ALDERLAKE_S)
[06:23:36] [PASSED] 0x4693 (ALDERLAKE_S)
[06:23:36] [PASSED] 0x46A0 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46A1 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46A2 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46A3 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46A6 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46A8 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46AA (ALDERLAKE_P)
[06:23:36] [PASSED] 0x462A (ALDERLAKE_P)
[06:23:36] [PASSED] 0x4626 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x4628 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46B0 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46B1 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46B2 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46B3 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46C0 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46C1 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46C2 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46C3 (ALDERLAKE_P)
[06:23:36] [PASSED] 0x46D0 (ALDERLAKE_N)
[06:23:36] [PASSED] 0x46D1 (ALDERLAKE_N)
[06:23:36] [PASSED] 0x46D2 (ALDERLAKE_N)
[06:23:36] [PASSED] 0x46D3 (ALDERLAKE_N)
[06:23:36] [PASSED] 0x46D4 (ALDERLAKE_N)
[06:23:36] [PASSED] 0xA721 (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA7A1 (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA7A9 (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA7AC (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA7AD (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA720 (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA7A0 (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA7A8 (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA7AA (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA7AB (ALDERLAKE_P)
[06:23:36] [PASSED] 0xA780 (ALDERLAKE_S)
[06:23:36] [PASSED] 0xA781 (ALDERLAKE_S)
[06:23:36] [PASSED] 0xA782 (ALDERLAKE_S)
[06:23:36] [PASSED] 0xA783 (ALDERLAKE_S)
[06:23:36] [PASSED] 0xA788 (ALDERLAKE_S)
[06:23:36] [PASSED] 0xA789 (ALDERLAKE_S)
[06:23:36] [PASSED] 0xA78A (ALDERLAKE_S)
[06:23:36] [PASSED] 0xA78B (ALDERLAKE_S)
[06:23:36] [PASSED] 0x4905 (DG1)
[06:23:36] [PASSED] 0x4906 (DG1)
[06:23:36] [PASSED] 0x4907 (DG1)
[06:23:36] [PASSED] 0x4908 (DG1)
[06:23:36] [PASSED] 0x4909 (DG1)
[06:23:36] [PASSED] 0x56C0 (DG2)
[06:23:36] [PASSED] 0x56C2 (DG2)
[06:23:36] [PASSED] 0x56C1 (DG2)
[06:23:36] [PASSED] 0x7D51 (METEORLAKE)
[06:23:36] [PASSED] 0x7DD1 (METEORLAKE)
[06:23:36] [PASSED] 0x7D41 (METEORLAKE)
[06:23:36] [PASSED] 0x7D67 (METEORLAKE)
[06:23:36] [PASSED] 0xB640 (METEORLAKE)
[06:23:36] [PASSED] 0x56A0 (DG2)
[06:23:36] [PASSED] 0x56A1 (DG2)
[06:23:36] [PASSED] 0x56A2 (DG2)
[06:23:36] [PASSED] 0x56BE (DG2)
[06:23:36] [PASSED] 0x56BF (DG2)
[06:23:36] [PASSED] 0x5690 (DG2)
[06:23:36] [PASSED] 0x5691 (DG2)
[06:23:36] [PASSED] 0x5692 (DG2)
[06:23:36] [PASSED] 0x56A5 (DG2)
[06:23:36] [PASSED] 0x56A6 (DG2)
[06:23:36] [PASSED] 0x56B0 (DG2)
[06:23:36] [PASSED] 0x56B1 (DG2)
[06:23:36] [PASSED] 0x56BA (DG2)
[06:23:36] [PASSED] 0x56BB (DG2)
[06:23:36] [PASSED] 0x56BC (DG2)
[06:23:36] [PASSED] 0x56BD (DG2)
[06:23:36] [PASSED] 0x5693 (DG2)
[06:23:36] [PASSED] 0x5694 (DG2)
[06:23:36] [PASSED] 0x5695 (DG2)
[06:23:36] [PASSED] 0x56A3 (DG2)
[06:23:36] [PASSED] 0x56A4 (DG2)
[06:23:36] [PASSED] 0x56B2 (DG2)
[06:23:36] [PASSED] 0x56B3 (DG2)
[06:23:36] [PASSED] 0x5696 (DG2)
[06:23:36] [PASSED] 0x5697 (DG2)
[06:23:36] [PASSED] 0xB69 (PVC)
[06:23:36] [PASSED] 0xB6E (PVC)
[06:23:36] [PASSED] 0xBD4 (PVC)
[06:23:36] [PASSED] 0xBD5 (PVC)
[06:23:36] [PASSED] 0xBD6 (PVC)
[06:23:36] [PASSED] 0xBD7 (PVC)
[06:23:36] [PASSED] 0xBD8 (PVC)
[06:23:36] [PASSED] 0xBD9 (PVC)
[06:23:36] [PASSED] 0xBDA (PVC)
[06:23:36] [PASSED] 0xBDB (PVC)
[06:23:36] [PASSED] 0xBE0 (PVC)
[06:23:36] [PASSED] 0xBE1 (PVC)
[06:23:36] [PASSED] 0xBE5 (PVC)
[06:23:36] [PASSED] 0x7D40 (METEORLAKE)
[06:23:36] [PASSED] 0x7D45 (METEORLAKE)
[06:23:36] [PASSED] 0x7D55 (METEORLAKE)
[06:23:36] [PASSED] 0x7D60 (METEORLAKE)
[06:23:36] [PASSED] 0x7DD5 (METEORLAKE)
[06:23:36] [PASSED] 0x6420 (LUNARLAKE)
[06:23:36] [PASSED] 0x64A0 (LUNARLAKE)
[06:23:36] [PASSED] 0x64B0 (LUNARLAKE)
[06:23:36] [PASSED] 0xE202 (BATTLEMAGE)
[06:23:36] [PASSED] 0xE209 (BATTLEMAGE)
[06:23:36] [PASSED] 0xE20B (BATTLEMAGE)
[06:23:36] [PASSED] 0xE20C (BATTLEMAGE)
[06:23:36] [PASSED] 0xE20D (BATTLEMAGE)
[06:23:36] [PASSED] 0xE210 (BATTLEMAGE)
[06:23:36] [PASSED] 0xE211 (BATTLEMAGE)
[06:23:36] [PASSED] 0xE212 (BATTLEMAGE)
[06:23:36] [PASSED] 0xE216 (BATTLEMAGE)
[06:23:36] [PASSED] 0xE220 (BATTLEMAGE)
[06:23:36] [PASSED] 0xE221 (BATTLEMAGE)
[06:23:36] [PASSED] 0xE222 (BATTLEMAGE)
[06:23:36] [PASSED] 0xE223 (BATTLEMAGE)
[06:23:36] [PASSED] 0xB080 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB081 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB082 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB083 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB084 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB085 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB086 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB087 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB08F (PANTHERLAKE)
[06:23:36] [PASSED] 0xB090 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB0A0 (PANTHERLAKE)
[06:23:36] [PASSED] 0xB0B0 (PANTHERLAKE)
[06:23:36] [PASSED] 0xFD80 (PANTHERLAKE)
[06:23:36] [PASSED] 0xFD81 (PANTHERLAKE)
[06:23:36] [PASSED] 0xD740 (NOVALAKE_S)
[06:23:36] [PASSED] 0xD741 (NOVALAKE_S)
[06:23:36] [PASSED] 0xD742 (NOVALAKE_S)
[06:23:36] [PASSED] 0xD743 (NOVALAKE_S)
[06:23:36] [PASSED] 0xD745 (NOVALAKE_S)
[06:23:36] [PASSED] 0xD74A (NOVALAKE_S)
[06:23:36] [PASSED] 0xD74B (NOVALAKE_S)
[06:23:36] [PASSED] 0x674C (CRESCENTISLAND)
[06:23:36] [PASSED] 0x674D (CRESCENTISLAND)
[06:23:36] [PASSED] 0x674E (CRESCENTISLAND)
[06:23:36] [PASSED] 0x674F (CRESCENTISLAND)
[06:23:36] [PASSED] 0x6750 (CRESCENTISLAND)
[06:23:36] [PASSED] 0xD750 (NOVALAKE_P)
[06:23:36] [PASSED] 0xD751 (NOVALAKE_P)
[06:23:36] [PASSED] 0xD752 (NOVALAKE_P)
[06:23:36] [PASSED] 0xD753 (NOVALAKE_P)
[06:23:36] [PASSED] 0xD754 (NOVALAKE_P)
[06:23:36] [PASSED] 0xD755 (NOVALAKE_P)
[06:23:36] [PASSED] 0xD756 (NOVALAKE_P)
[06:23:36] [PASSED] 0xD757 (NOVALAKE_P)
[06:23:36] [PASSED] 0xD75F (NOVALAKE_P)
[06:23:36] =============== [PASSED] check_platform_desc ===============
[06:23:36] ===================== [PASSED] xe_pci ======================
[06:23:36] ============= xe_rtp_tables_test (4 subtests) ==============
[06:23:36] ================== xe_rtp_table_gt_test ===================
[06:23:36] [PASSED] gt_was/14011060649
[06:23:36] [PASSED] gt_was/14011059788
[06:23:36] [PASSED] gt_was/14015795083
[06:23:36] [PASSED] gt_was/16021867713
[06:23:36] [PASSED] gt_was/14019449301
[06:23:36] [PASSED] gt_was/16028005424
[06:23:36] [PASSED] gt_was/14026578760
[06:23:36] [PASSED] gt_was/1409420604
[06:23:36] [PASSED] gt_was/1408615072
[06:23:36] [PASSED] gt_was/22010523718
[06:23:36] [PASSED] gt_was/14011006942
[06:23:36] [PASSED] gt_was/14014830051
[06:23:36] [PASSED] gt_was/18018781329
[06:23:36] [PASSED] gt_was/1509235366
[06:23:36] [PASSED] gt_was/18018781329
[06:23:36] [PASSED] gt_was/16016694945
[06:23:36] [PASSED] gt_was/14018575942
[06:23:36] [PASSED] gt_was/22016670082
[06:23:36] [PASSED] gt_was/22016670082
[06:23:36] [PASSED] gt_was/14017421178
[06:23:36] [PASSED] gt_was/16025250150
[06:23:36] [PASSED] gt_was/14021871409
[06:23:36] [PASSED] gt_was/16021865536
[06:23:36] [PASSED] gt_was/14021486841
[06:23:36] [PASSED] gt_was/14025160223
[06:23:36] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[06:23:36] [PASSED] gt_was/14025635424
[06:23:36] [PASSED] gt_was/16028005424
[06:23:36] ============== [PASSED] xe_rtp_table_gt_test ===============
[06:23:36] ================== xe_rtp_table_gt_test ===================
[06:23:36] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[06:23:36] [PASSED] gt_tunings/Tuning: 32B Access Enable
[06:23:36] [PASSED] gt_tunings/Tuning: L3 cache
[06:23:36] [PASSED] gt_tunings/Tuning: L3 cache - media
[06:23:36] [PASSED] gt_tunings/Tuning: Compression Overfetch
[06:23:36] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[06:23:36] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[06:23:36] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[06:23:36] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[06:23:36] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[06:23:36] [PASSED] gt_tunings/Tuning: Stateless compression control
[06:23:36] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[06:23:36] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[06:23:36] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[06:23:36] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[06:23:36] ============== [PASSED] xe_rtp_table_gt_test ===============
[06:23:36] ================== xe_rtp_table_oob_test ==================
[06:23:36] [PASSED] oob_was/1607983814
[06:23:36] [PASSED] oob_was/16010904313
[06:23:36] [PASSED] oob_was/18022495364
[06:23:36] [PASSED] oob_was/22012773006
[06:23:36] [PASSED] oob_was/14014475959
[06:23:36] [PASSED] oob_was/22011391025
[06:23:36] [PASSED] oob_was/22012727170
[06:23:36] [PASSED] oob_was/22012727685
[06:23:36] [PASSED] oob_was/22016596838
[06:23:36] [PASSED] oob_was/18020744125
[06:23:36] [PASSED] oob_was/1409600907
[06:23:36] [PASSED] oob_was/22014953428
[06:23:36] [PASSED] oob_was/16017236439
[06:23:36] [PASSED] oob_was/14019821291
[06:23:36] [PASSED] oob_was/14015076503
[06:23:36] [PASSED] oob_was/14018913170
[06:23:36] [PASSED] oob_was/14018094691
[06:23:36] [PASSED] oob_was/18024947630
[06:23:36] [PASSED] oob_was/16022287689
[06:23:36] [PASSED] oob_was/13011645652
[06:23:36] [PASSED] oob_was/14022293748
[06:23:36] [PASSED] oob_was/22019794406
[06:23:36] [PASSED] oob_was/22019338487
[06:23:36] [PASSED] oob_was/16023588340
[06:23:36] [PASSED] oob_was/14019789679
[06:23:36] [PASSED] oob_was/14022866841
[06:23:36] [PASSED] oob_was/16021333562
[06:23:36] [PASSED] oob_was/14016712196
[06:23:36] [PASSED] oob_was/14015568240
[06:23:36] [PASSED] oob_was/18013179988
[06:23:36] [PASSED] oob_was/1508761755
[06:23:36] [PASSED] oob_was/16023105232
[06:23:36] [PASSED] oob_was/16026508708
[06:23:36] [PASSED] oob_was/14020001231
[06:23:36] [PASSED] oob_was/16023683509
[06:23:36] [PASSED] oob_was/14025515070
[06:23:36] [PASSED] oob_was/15015404425_disable
[06:23:36] [PASSED] oob_was/16026007364
[06:23:36] [PASSED] oob_was/14020316580
[06:23:36] [PASSED] oob_was/14025883347
[06:23:36] [PASSED] oob_was/16029380221
[06:23:36] ============== [PASSED] xe_rtp_table_oob_test ==============
[06:23:36] ================ xe_rtp_table_dev_oob_test ================
[06:23:36] [PASSED] device_oob_was/22010954014
[06:23:36] [PASSED] device_oob_was/15015404425
[06:23:36] [PASSED] device_oob_was/22019338487_display
[06:23:36] [PASSED] device_oob_was/14022085890
[06:23:36] [PASSED] device_oob_was/14026539277
[06:23:36] [PASSED] device_oob_was/14026633728
[06:23:36] [PASSED] device_oob_was/14026746987
[06:23:36] [PASSED] device_oob_was/14026779378
[06:23:36] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[06:23:36] =============== [PASSED] xe_rtp_tables_test ================
[06:23:36] =================== xe_rtp (3 subtests) ====================
[06:23:36] =================== xe_rtp_rules_tests ====================
[06:23:36] [PASSED] no
[06:23:36] [PASSED] yes
[06:23:36] [PASSED] no-and-no
[06:23:36] [PASSED] no-and-yes
[06:23:36] [PASSED] yes-and-no
[06:23:36] [PASSED] yes-and-yes
[06:23:36] [PASSED] no-or-no
[06:23:36] [PASSED] no-or-yes
[06:23:36] [PASSED] yes-or-no
[06:23:36] [PASSED] yes-or-yes
[06:23:36] [PASSED] no-yes-or-yes-no
[06:23:36] [PASSED] no-yes-or-yes-yes
[06:23:36] [PASSED] yes-yes-or-no-yes
[06:23:36] [PASSED] yes-yes-or-yes-yes
[06:23:36] [PASSED] no-no-or-yes-or-no
[06:23:36] [PASSED] or
[06:23:36] [PASSED] or-yes
[06:23:36] [PASSED] or-no
[06:23:36] [PASSED] yes-or
[06:23:36] [PASSED] no-or
[06:23:36] [PASSED] no-or-or-yes
[06:23:36] [PASSED] yes-or-or-no
[06:23:36] [PASSED] no-or-or-no
[06:23:36] [PASSED] missing-context-engine-class
[06:23:36] [PASSED] missing-context-engine-class-or-yes
[06:23:36] [PASSED] missing-context-engine-class-or-or-yes
[06:23:36] =============== [PASSED] xe_rtp_rules_tests ================
[06:23:36] =============== xe_rtp_process_to_sr_tests ================
[06:23:36] [PASSED] coalesce-same-reg
[06:23:36] [PASSED] no-match-no-add
[06:23:36] [PASSED] two-regs-two-entries
[06:23:36] [PASSED] clr-one-set-other
[06:23:36] [PASSED] set-field
[06:23:36] [PASSED] conflict-duplicate
[06:23:36] [PASSED] conflict-not-disjoint
[06:23:36] [PASSED] conflict-reg-type
[06:23:36] [PASSED] bad-mcr-reg-forced-to-regular
[06:23:36] [PASSED] bad-regular-reg-forced-to-mcr
[06:23:36] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[06:23:36] ================== xe_rtp_process_tests ===================
[06:23:36] [PASSED] active1
[06:23:36] [PASSED] active2
[06:23:36] [PASSED] active-inactive
[06:23:36] [PASSED] inactive-active
[06:23:36] [PASSED] inactive-active-inactive
[06:23:36] [PASSED] inactive-inactive-inactive
[06:23:36] ============== [PASSED] xe_rtp_process_tests ===============
[06:23:36] ===================== [PASSED] xe_rtp ======================
[06:23:36] ==================== xe_wa (1 subtest) =====================
[06:23:36] ======================== xe_wa_gt =========================
[06:23:36] [PASSED] TIGERLAKE B0
[06:23:36] [PASSED] DG1 A0
[06:23:36] [PASSED] DG1 B0
[06:23:36] [PASSED] ALDERLAKE_S A0
[06:23:36] [PASSED] ALDERLAKE_S B0
[06:23:36] [PASSED] ALDERLAKE_S C0
[06:23:36] [PASSED] ALDERLAKE_S D0
[06:23:36] [PASSED] ALDERLAKE_P A0
[06:23:36] [PASSED] ALDERLAKE_P B0
[06:23:36] [PASSED] ALDERLAKE_P C0
[06:23:36] [PASSED] ALDERLAKE_S RPLS D0
[06:23:36] [PASSED] ALDERLAKE_P RPLU E0
[06:23:36] [PASSED] DG2 G10 C0
[06:23:36] [PASSED] DG2 G11 B1
[06:23:36] [PASSED] DG2 G12 A1
[06:23:36] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:23:36] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:23:36] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[06:23:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[06:23:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[06:23:36] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[06:23:36] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[06:23:36] ==================== [PASSED] xe_wa_gt =====================
[06:23:36] ====================== [PASSED] xe_wa ======================
[06:23:36] ============================================================
[06:23:36] Testing complete. Ran 717 tests: passed: 699, skipped: 18
[06:23:36] Elapsed time: 36.313s total, 4.311s configuring, 31.336s building, 0.648s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[06:23:36] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:23:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:24:02] Starting KUnit Kernel (1/1)...
[06:24:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:24:02] ============ drm_test_pick_cmdline (2 subtests) ============
[06:24:02] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[06:24:02] =============== drm_test_pick_cmdline_named ===============
[06:24:02] [PASSED] NTSC
[06:24:02] [PASSED] NTSC-J
[06:24:02] [PASSED] PAL
[06:24:02] [PASSED] PAL-M
[06:24:02] =========== [PASSED] drm_test_pick_cmdline_named ===========
[06:24:02] ============== [PASSED] drm_test_pick_cmdline ==============
[06:24:02] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[06:24:02] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[06:24:02] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[06:24:02] =========== drm_validate_clone_mode (2 subtests) ===========
[06:24:02] ============== drm_test_check_in_clone_mode ===============
[06:24:02] [PASSED] in_clone_mode
[06:24:02] [PASSED] not_in_clone_mode
[06:24:02] ========== [PASSED] drm_test_check_in_clone_mode ===========
[06:24:02] =============== drm_test_check_valid_clones ===============
[06:24:02] [PASSED] not_in_clone_mode
[06:24:02] [PASSED] valid_clone
[06:24:02] [PASSED] invalid_clone
[06:24:02] =========== [PASSED] drm_test_check_valid_clones ===========
[06:24:02] ============= [PASSED] drm_validate_clone_mode =============
[06:24:02] ============= drm_validate_modeset (1 subtest) =============
[06:24:02] [PASSED] drm_test_check_connector_changed_modeset
[06:24:02] ============== [PASSED] drm_validate_modeset ===============
[06:24:02] ====== drm_test_bridge_get_current_state (2 subtests) ======
[06:24:02] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[06:24:02] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[06:24:02] ======== [PASSED] drm_test_bridge_get_current_state ========
[06:24:02] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[06:24:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[06:24:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[06:24:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[06:24:02] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[06:24:02] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[06:24:02] ============== drm_bridge_alloc (2 subtests) ===============
[06:24:02] [PASSED] drm_test_drm_bridge_alloc_basic
[06:24:02] [PASSED] drm_test_drm_bridge_alloc_get_put
[06:24:02] ================ [PASSED] drm_bridge_alloc =================
[06:24:02] ============= drm_bridge_bus_fmt (5 subtests) ==============
[06:24:02] [PASSED] drm_test_bridge_rgb_yuv_rgb
[06:24:02] [PASSED] drm_test_bridge_must_convert_to_yuv444
[06:24:02] [PASSED] drm_test_bridge_hdmi_auto_rgb
[06:24:02] [PASSED] drm_test_bridge_auto_first
[06:24:02] [PASSED] drm_test_bridge_rgb_yuv_no_path
[06:24:02] =============== [PASSED] drm_bridge_bus_fmt ================
[06:24:02] ============= drm_cmdline_parser (40 subtests) =============
[06:24:02] [PASSED] drm_test_cmdline_force_d_only
[06:24:02] [PASSED] drm_test_cmdline_force_D_only_dvi
[06:24:02] [PASSED] drm_test_cmdline_force_D_only_hdmi
[06:24:02] [PASSED] drm_test_cmdline_force_D_only_not_digital
[06:24:02] [PASSED] drm_test_cmdline_force_e_only
[06:24:02] [PASSED] drm_test_cmdline_res
[06:24:02] [PASSED] drm_test_cmdline_res_vesa
[06:24:02] [PASSED] drm_test_cmdline_res_vesa_rblank
[06:24:02] [PASSED] drm_test_cmdline_res_rblank
[06:24:02] [PASSED] drm_test_cmdline_res_bpp
[06:24:02] [PASSED] drm_test_cmdline_res_refresh
[06:24:02] [PASSED] drm_test_cmdline_res_bpp_refresh
[06:24:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[06:24:02] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[06:24:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[06:24:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[06:24:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[06:24:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[06:24:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[06:24:02] [PASSED] drm_test_cmdline_res_margins_force_on
[06:24:02] [PASSED] drm_test_cmdline_res_vesa_margins
[06:24:02] [PASSED] drm_test_cmdline_name
[06:24:02] [PASSED] drm_test_cmdline_name_bpp
[06:24:02] [PASSED] drm_test_cmdline_name_option
[06:24:02] [PASSED] drm_test_cmdline_name_bpp_option
[06:24:02] [PASSED] drm_test_cmdline_rotate_0
[06:24:02] [PASSED] drm_test_cmdline_rotate_90
[06:24:02] [PASSED] drm_test_cmdline_rotate_180
[06:24:02] [PASSED] drm_test_cmdline_rotate_270
[06:24:02] [PASSED] drm_test_cmdline_hmirror
[06:24:02] [PASSED] drm_test_cmdline_vmirror
[06:24:02] [PASSED] drm_test_cmdline_margin_options
[06:24:02] [PASSED] drm_test_cmdline_multiple_options
[06:24:02] [PASSED] drm_test_cmdline_bpp_extra_and_option
[06:24:02] [PASSED] drm_test_cmdline_extra_and_option
[06:24:02] [PASSED] drm_test_cmdline_freestanding_options
[06:24:02] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[06:24:02] [PASSED] drm_test_cmdline_panel_orientation
[06:24:02] ================ drm_test_cmdline_invalid =================
[06:24:02] [PASSED] margin_only
[06:24:02] [PASSED] interlace_only
[06:24:02] [PASSED] res_missing_x
[06:24:02] [PASSED] res_missing_y
[06:24:02] [PASSED] res_bad_y
[06:24:02] [PASSED] res_missing_y_bpp
[06:24:02] [PASSED] res_bad_bpp
[06:24:02] [PASSED] res_bad_refresh
[06:24:02] [PASSED] res_bpp_refresh_force_on_off
[06:24:02] [PASSED] res_invalid_mode
[06:24:02] [PASSED] res_bpp_wrong_place_mode
[06:24:02] [PASSED] name_bpp_refresh
[06:24:02] [PASSED] name_refresh
[06:24:02] [PASSED] name_refresh_wrong_mode
[06:24:02] [PASSED] name_refresh_invalid_mode
[06:24:02] [PASSED] rotate_multiple
[06:24:02] [PASSED] rotate_invalid_val
[06:24:02] [PASSED] rotate_truncated
[06:24:02] [PASSED] invalid_option
[06:24:02] [PASSED] invalid_tv_option
[06:24:02] [PASSED] truncated_tv_option
[06:24:02] ============ [PASSED] drm_test_cmdline_invalid =============
[06:24:02] =============== drm_test_cmdline_tv_options ===============
[06:24:02] [PASSED] NTSC
[06:24:02] [PASSED] NTSC_443
[06:24:02] [PASSED] NTSC_J
[06:24:02] [PASSED] PAL
[06:24:02] [PASSED] PAL_M
[06:24:02] [PASSED] PAL_N
[06:24:02] [PASSED] SECAM
[06:24:02] [PASSED] MONO_525
[06:24:02] [PASSED] MONO_625
[06:24:02] =========== [PASSED] drm_test_cmdline_tv_options ===========
[06:24:02] =============== [PASSED] drm_cmdline_parser ================
[06:24:02] ========== drmm_connector_hdmi_init (20 subtests) ==========
[06:24:02] [PASSED] drm_test_connector_hdmi_init_valid
[06:24:02] [PASSED] drm_test_connector_hdmi_init_bpc_8
[06:24:02] [PASSED] drm_test_connector_hdmi_init_bpc_10
[06:24:02] [PASSED] drm_test_connector_hdmi_init_bpc_12
[06:24:02] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[06:24:02] [PASSED] drm_test_connector_hdmi_init_bpc_null
[06:24:02] [PASSED] drm_test_connector_hdmi_init_formats_empty
[06:24:02] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[06:24:02] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:24:02] [PASSED] supported_formats=0x9 yuv420_allowed=1
[06:24:02] [PASSED] supported_formats=0x9 yuv420_allowed=0
[06:24:02] [PASSED] supported_formats=0x5 yuv420_allowed=1
[06:24:02] [PASSED] supported_formats=0x5 yuv420_allowed=0
[06:24:02] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:24:02] [PASSED] drm_test_connector_hdmi_init_null_ddc
[06:24:02] [PASSED] drm_test_connector_hdmi_init_null_product
[06:24:02] [PASSED] drm_test_connector_hdmi_init_null_vendor
[06:24:02] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[06:24:02] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[06:24:02] [PASSED] drm_test_connector_hdmi_init_product_valid
[06:24:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[06:24:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[06:24:02] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[06:24:02] ========= drm_test_connector_hdmi_init_type_valid =========
[06:24:02] [PASSED] HDMI-A
[06:24:02] [PASSED] HDMI-B
[06:24:02] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[06:24:02] ======== drm_test_connector_hdmi_init_type_invalid ========
[06:24:02] [PASSED] Unknown
[06:24:02] [PASSED] VGA
[06:24:02] [PASSED] DVI-I
[06:24:02] [PASSED] DVI-D
[06:24:02] [PASSED] DVI-A
[06:24:02] [PASSED] Composite
[06:24:02] [PASSED] SVIDEO
[06:24:02] [PASSED] LVDS
[06:24:02] [PASSED] Component
[06:24:02] [PASSED] DIN
[06:24:02] [PASSED] DP
[06:24:02] [PASSED] TV
[06:24:02] [PASSED] eDP
[06:24:02] [PASSED] Virtual
[06:24:02] [PASSED] DSI
[06:24:02] [PASSED] DPI
[06:24:02] [PASSED] Writeback
[06:24:02] [PASSED] SPI
[06:24:02] [PASSED] USB
[06:24:02] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[06:24:02] ============ [PASSED] drmm_connector_hdmi_init =============
[06:24:02] ============= drmm_connector_init (3 subtests) =============
[06:24:02] [PASSED] drm_test_drmm_connector_init
[06:24:02] [PASSED] drm_test_drmm_connector_init_null_ddc
[06:24:02] ========= drm_test_drmm_connector_init_type_valid =========
[06:24:02] [PASSED] Unknown
[06:24:02] [PASSED] VGA
[06:24:02] [PASSED] DVI-I
[06:24:02] [PASSED] DVI-D
[06:24:02] [PASSED] DVI-A
[06:24:02] [PASSED] Composite
[06:24:02] [PASSED] SVIDEO
[06:24:02] [PASSED] LVDS
[06:24:02] [PASSED] Component
[06:24:02] [PASSED] DIN
[06:24:02] [PASSED] DP
[06:24:02] [PASSED] HDMI-A
[06:24:02] [PASSED] HDMI-B
[06:24:02] [PASSED] TV
[06:24:02] [PASSED] eDP
[06:24:02] [PASSED] Virtual
[06:24:02] [PASSED] DSI
[06:24:02] [PASSED] DPI
[06:24:02] [PASSED] Writeback
[06:24:02] [PASSED] SPI
[06:24:02] [PASSED] USB
[06:24:02] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[06:24:02] =============== [PASSED] drmm_connector_init ===============
[06:24:02] ========= drm_connector_dynamic_init (6 subtests) ==========
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_init
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_init_properties
[06:24:02] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[06:24:02] [PASSED] Unknown
[06:24:02] [PASSED] VGA
[06:24:02] [PASSED] DVI-I
[06:24:02] [PASSED] DVI-D
[06:24:02] [PASSED] DVI-A
[06:24:02] [PASSED] Composite
[06:24:02] [PASSED] SVIDEO
[06:24:02] [PASSED] LVDS
[06:24:02] [PASSED] Component
[06:24:02] [PASSED] DIN
[06:24:02] [PASSED] DP
[06:24:02] [PASSED] HDMI-A
[06:24:02] [PASSED] HDMI-B
[06:24:02] [PASSED] TV
[06:24:02] [PASSED] eDP
[06:24:02] [PASSED] Virtual
[06:24:02] [PASSED] DSI
[06:24:02] [PASSED] DPI
[06:24:02] [PASSED] Writeback
[06:24:02] [PASSED] SPI
[06:24:02] [PASSED] USB
[06:24:02] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[06:24:02] ======== drm_test_drm_connector_dynamic_init_name =========
[06:24:02] [PASSED] Unknown
[06:24:02] [PASSED] VGA
[06:24:02] [PASSED] DVI-I
[06:24:02] [PASSED] DVI-D
[06:24:02] [PASSED] DVI-A
[06:24:02] [PASSED] Composite
[06:24:02] [PASSED] SVIDEO
[06:24:02] [PASSED] LVDS
[06:24:02] [PASSED] Component
[06:24:02] [PASSED] DIN
[06:24:02] [PASSED] DP
[06:24:02] [PASSED] HDMI-A
[06:24:02] [PASSED] HDMI-B
[06:24:02] [PASSED] TV
[06:24:02] [PASSED] eDP
[06:24:02] [PASSED] Virtual
[06:24:02] [PASSED] DSI
[06:24:02] [PASSED] DPI
[06:24:02] [PASSED] Writeback
[06:24:02] [PASSED] SPI
[06:24:02] [PASSED] USB
[06:24:02] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[06:24:02] =========== [PASSED] drm_connector_dynamic_init ============
[06:24:02] ==== drm_connector_dynamic_register_early (4 subtests) =====
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[06:24:02] ====== [PASSED] drm_connector_dynamic_register_early =======
[06:24:02] ======= drm_connector_dynamic_register (7 subtests) ========
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[06:24:02] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[06:24:02] ========= [PASSED] drm_connector_dynamic_register ==========
[06:24:02] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[06:24:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[06:24:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[06:24:02] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[06:24:02] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[06:24:02] ========== drm_test_get_tv_mode_from_name_valid ===========
[06:24:02] [PASSED] NTSC
[06:24:02] [PASSED] NTSC-443
[06:24:02] [PASSED] NTSC-J
[06:24:02] [PASSED] PAL
[06:24:02] [PASSED] PAL-M
[06:24:02] [PASSED] PAL-N
[06:24:02] [PASSED] SECAM
[06:24:02] [PASSED] Mono
[06:24:02] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[06:24:02] [PASSED] drm_test_get_tv_mode_from_name_truncated
[06:24:02] ============ [PASSED] drm_get_tv_mode_from_name ============
[06:24:02] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[06:24:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[06:24:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[06:24:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[06:24:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[06:24:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[06:24:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[06:24:02] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[06:24:02] [PASSED] VIC 96
[06:24:02] [PASSED] VIC 97
[06:24:02] [PASSED] VIC 101
[06:24:02] [PASSED] VIC 102
[06:24:02] [PASSED] VIC 106
[06:24:02] [PASSED] VIC 107
[06:24:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[06:24:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[06:24:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[06:24:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[06:24:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[06:24:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[06:24:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[06:24:02] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[06:24:02] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[06:24:02] [PASSED] Automatic
[06:24:02] [PASSED] Full
[06:24:02] [PASSED] Limited 16:235
[06:24:02] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[06:24:02] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[06:24:02] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[06:24:02] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[06:24:02] === drm_test_drm_hdmi_connector_get_output_format_name ====
[06:24:02] [PASSED] RGB
[06:24:02] [PASSED] YUV 4:2:0
[06:24:02] [PASSED] YUV 4:2:2
[06:24:02] [PASSED] YUV 4:4:4
[06:24:02] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[06:24:02] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[06:24:02] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[06:24:02] ============= drm_damage_helper (21 subtests) ==============
[06:24:02] [PASSED] drm_test_damage_iter_no_damage
[06:24:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[06:24:02] [PASSED] drm_test_damage_iter_no_damage_src_moved
[06:24:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[06:24:02] [PASSED] drm_test_damage_iter_no_damage_not_visible
[06:24:02] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[06:24:02] [PASSED] drm_test_damage_iter_no_damage_no_fb
[06:24:02] [PASSED] drm_test_damage_iter_simple_damage
[06:24:02] [PASSED] drm_test_damage_iter_single_damage
[06:24:02] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[06:24:02] [PASSED] drm_test_damage_iter_single_damage_outside_src
[06:24:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[06:24:02] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[06:24:02] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[06:24:02] [PASSED] drm_test_damage_iter_single_damage_src_moved
[06:24:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[06:24:02] [PASSED] drm_test_damage_iter_damage
[06:24:02] [PASSED] drm_test_damage_iter_damage_one_intersect
[06:24:02] [PASSED] drm_test_damage_iter_damage_one_outside
[06:24:02] [PASSED] drm_test_damage_iter_damage_src_moved
[06:24:02] [PASSED] drm_test_damage_iter_damage_not_visible
[06:24:02] ================ [PASSED] drm_damage_helper ================
[06:24:02] ============== drm_dp_mst_helper (3 subtests) ==============
[06:24:02] ============== drm_test_dp_mst_calc_pbn_mode ==============
[06:24:02] [PASSED] Clock 154000 BPP 30 DSC disabled
[06:24:02] [PASSED] Clock 234000 BPP 30 DSC disabled
[06:24:02] [PASSED] Clock 297000 BPP 24 DSC disabled
[06:24:02] [PASSED] Clock 332880 BPP 24 DSC enabled
[06:24:02] [PASSED] Clock 324540 BPP 24 DSC enabled
[06:24:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[06:24:02] ============== drm_test_dp_mst_calc_pbn_div ===============
[06:24:02] [PASSED] Link rate 2000000 lane count 4
[06:24:02] [PASSED] Link rate 2000000 lane count 2
[06:24:02] [PASSED] Link rate 2000000 lane count 1
[06:24:02] [PASSED] Link rate 1350000 lane count 4
[06:24:02] [PASSED] Link rate 1350000 lane count 2
[06:24:02] [PASSED] Link rate 1350000 lane count 1
[06:24:02] [PASSED] Link rate 1000000 lane count 4
[06:24:02] [PASSED] Link rate 1000000 lane count 2
[06:24:02] [PASSED] Link rate 1000000 lane count 1
[06:24:02] [PASSED] Link rate 810000 lane count 4
[06:24:02] [PASSED] Link rate 810000 lane count 2
[06:24:02] [PASSED] Link rate 810000 lane count 1
[06:24:02] [PASSED] Link rate 540000 lane count 4
[06:24:02] [PASSED] Link rate 540000 lane count 2
[06:24:02] [PASSED] Link rate 540000 lane count 1
[06:24:02] [PASSED] Link rate 270000 lane count 4
[06:24:02] [PASSED] Link rate 270000 lane count 2
[06:24:02] [PASSED] Link rate 270000 lane count 1
[06:24:02] [PASSED] Link rate 162000 lane count 4
[06:24:02] [PASSED] Link rate 162000 lane count 2
[06:24:02] [PASSED] Link rate 162000 lane count 1
[06:24:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[06:24:02] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[06:24:02] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[06:24:02] [PASSED] DP_POWER_UP_PHY with port number
[06:24:02] [PASSED] DP_POWER_DOWN_PHY with port number
[06:24:02] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[06:24:02] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[06:24:02] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[06:24:02] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[06:24:02] [PASSED] DP_QUERY_PAYLOAD with port number
[06:24:02] [PASSED] DP_QUERY_PAYLOAD with VCPI
[06:24:02] [PASSED] DP_REMOTE_DPCD_READ with port number
[06:24:02] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[06:24:02] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[06:24:02] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[06:24:02] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[06:24:02] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[06:24:02] [PASSED] DP_REMOTE_I2C_READ with port number
[06:24:02] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[06:24:02] [PASSED] DP_REMOTE_I2C_READ with transactions array
[06:24:02] [PASSED] DP_REMOTE_I2C_WRITE with port number
[06:24:02] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[06:24:02] [PASSED] DP_REMOTE_I2C_WRITE with data array
[06:24:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[06:24:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[06:24:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[06:24:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[06:24:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[06:24:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[06:24:02] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[06:24:02] ================ [PASSED] drm_dp_mst_helper ================
[06:24:02] ================== drm_exec (7 subtests) ===================
[06:24:02] [PASSED] sanitycheck
[06:24:02] [PASSED] test_lock
[06:24:02] [PASSED] test_lock_unlock
[06:24:02] [PASSED] test_duplicates
[06:24:02] [PASSED] test_prepare
[06:24:02] [PASSED] test_prepare_array
[06:24:02] [PASSED] test_multiple_loops
[06:24:02] ==================== [PASSED] drm_exec =====================
[06:24:02] =========== drm_format_helper_test (17 subtests) ===========
[06:24:02] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[06:24:02] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[06:24:02] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[06:24:02] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[06:24:02] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[06:24:02] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[06:24:02] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[06:24:02] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[06:24:02] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[06:24:02] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[06:24:02] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[06:24:02] ============== drm_test_fb_xrgb8888_to_mono ===============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[06:24:02] ==================== drm_test_fb_swab =====================
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ================ [PASSED] drm_test_fb_swab =================
[06:24:02] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[06:24:02] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[06:24:02] [PASSED] single_pixel_source_buffer
[06:24:02] [PASSED] single_pixel_clip_rectangle
[06:24:02] [PASSED] well_known_colors
[06:24:02] [PASSED] destination_pitch
[06:24:02] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[06:24:02] ================= drm_test_fb_clip_offset =================
[06:24:02] [PASSED] pass through
[06:24:02] [PASSED] horizontal offset
[06:24:02] [PASSED] vertical offset
[06:24:02] [PASSED] horizontal and vertical offset
[06:24:02] [PASSED] horizontal offset (custom pitch)
[06:24:02] [PASSED] vertical offset (custom pitch)
[06:24:02] [PASSED] horizontal and vertical offset (custom pitch)
[06:24:02] ============= [PASSED] drm_test_fb_clip_offset =============
[06:24:02] =================== drm_test_fb_memcpy ====================
[06:24:02] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[06:24:02] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[06:24:02] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[06:24:02] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[06:24:02] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[06:24:02] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[06:24:02] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[06:24:02] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[06:24:02] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[06:24:02] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[06:24:02] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[06:24:02] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[06:24:02] =============== [PASSED] drm_test_fb_memcpy ================
[06:24:02] ============= [PASSED] drm_format_helper_test ==============
[06:24:02] ================= drm_format (18 subtests) =================
[06:24:02] [PASSED] drm_test_format_block_width_invalid
[06:24:02] [PASSED] drm_test_format_block_width_one_plane
[06:24:02] [PASSED] drm_test_format_block_width_two_plane
[06:24:02] [PASSED] drm_test_format_block_width_three_plane
[06:24:02] [PASSED] drm_test_format_block_width_tiled
[06:24:02] [PASSED] drm_test_format_block_height_invalid
[06:24:02] [PASSED] drm_test_format_block_height_one_plane
[06:24:02] [PASSED] drm_test_format_block_height_two_plane
[06:24:02] [PASSED] drm_test_format_block_height_three_plane
[06:24:02] [PASSED] drm_test_format_block_height_tiled
[06:24:02] [PASSED] drm_test_format_min_pitch_invalid
[06:24:02] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[06:24:02] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[06:24:02] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[06:24:02] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[06:24:02] [PASSED] drm_test_format_min_pitch_two_plane
[06:24:02] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[06:24:02] [PASSED] drm_test_format_min_pitch_tiled
[06:24:02] =================== [PASSED] drm_format ====================
[06:24:02] ============== drm_framebuffer (10 subtests) ===============
[06:24:02] ========== drm_test_framebuffer_check_src_coords ==========
[06:24:02] [PASSED] Success: source fits into fb
[06:24:02] [PASSED] Fail: overflowing fb with x-axis coordinate
[06:24:02] [PASSED] Fail: overflowing fb with y-axis coordinate
[06:24:02] [PASSED] Fail: overflowing fb with source width
[06:24:02] [PASSED] Fail: overflowing fb with source height
[06:24:02] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[06:24:02] [PASSED] drm_test_framebuffer_cleanup
[06:24:02] =============== drm_test_framebuffer_create ===============
[06:24:02] [PASSED] ABGR8888 normal sizes
[06:24:02] [PASSED] ABGR8888 max sizes
[06:24:02] [PASSED] ABGR8888 pitch greater than min required
[06:24:02] [PASSED] ABGR8888 pitch less than min required
[06:24:02] [PASSED] ABGR8888 Invalid width
[06:24:02] [PASSED] ABGR8888 Invalid buffer handle
[06:24:02] [PASSED] No pixel format
[06:24:02] [PASSED] ABGR8888 Width 0
[06:24:02] [PASSED] ABGR8888 Height 0
[06:24:02] [PASSED] ABGR8888 Out of bound height * pitch combination
[06:24:02] [PASSED] ABGR8888 Large buffer offset
[06:24:02] [PASSED] ABGR8888 Buffer offset for inexistent plane
[06:24:02] [PASSED] ABGR8888 Invalid flag
[06:24:02] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[06:24:02] [PASSED] ABGR8888 Valid buffer modifier
[06:24:02] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[06:24:02] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[06:24:02] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[06:24:02] [PASSED] NV12 Normal sizes
[06:24:02] [PASSED] NV12 Max sizes
[06:24:02] [PASSED] NV12 Invalid pitch
[06:24:02] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[06:24:02] [PASSED] NV12 different modifier per-plane
[06:24:02] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[06:24:02] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[06:24:02] [PASSED] NV12 Modifier for inexistent plane
[06:24:02] [PASSED] NV12 Handle for inexistent plane
[06:24:02] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[06:24:02] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[06:24:02] [PASSED] YVU420 Normal sizes
[06:24:02] [PASSED] YVU420 Max sizes
[06:24:02] [PASSED] YVU420 Invalid pitch
[06:24:02] [PASSED] YVU420 Different pitches
[06:24:02] [PASSED] YVU420 Different buffer offsets/pitches
[06:24:02] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[06:24:02] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[06:24:02] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[06:24:02] [PASSED] YVU420 Valid modifier
[06:24:02] [PASSED] YVU420 Different modifiers per plane
[06:24:02] [PASSED] YVU420 Modifier for inexistent plane
[06:24:02] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[06:24:02] [PASSED] X0L2 Normal sizes
[06:24:02] [PASSED] X0L2 Max sizes
[06:24:02] [PASSED] X0L2 Invalid pitch
[06:24:02] [PASSED] X0L2 Pitch greater than minimum required
[06:24:02] [PASSED] X0L2 Handle for inexistent plane
[06:24:02] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[06:24:02] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[06:24:02] [PASSED] X0L2 Valid modifier
[06:24:02] [PASSED] X0L2 Modifier for inexistent plane
[06:24:02] =========== [PASSED] drm_test_framebuffer_create ===========
[06:24:02] [PASSED] drm_test_framebuffer_free
[06:24:02] [PASSED] drm_test_framebuffer_init
[06:24:02] [PASSED] drm_test_framebuffer_init_bad_format
[06:24:02] [PASSED] drm_test_framebuffer_init_dev_mismatch
[06:24:02] [PASSED] drm_test_framebuffer_lookup
[06:24:02] [PASSED] drm_test_framebuffer_lookup_inexistent
[06:24:02] [PASSED] drm_test_framebuffer_modifiers_not_supported
[06:24:02] ================= [PASSED] drm_framebuffer =================
[06:24:02] ================ drm_gem_shmem (8 subtests) ================
[06:24:02] [PASSED] drm_gem_shmem_test_obj_create
[06:24:02] [PASSED] drm_gem_shmem_test_obj_create_private
[06:24:02] [PASSED] drm_gem_shmem_test_pin_pages
[06:24:02] [PASSED] drm_gem_shmem_test_vmap
[06:24:02] [PASSED] drm_gem_shmem_test_get_sg_table
[06:24:02] [PASSED] drm_gem_shmem_test_get_pages_sgt
[06:24:02] [PASSED] drm_gem_shmem_test_madvise
[06:24:02] [PASSED] drm_gem_shmem_test_purge
[06:24:02] ================== [PASSED] drm_gem_shmem ==================
[06:24:02] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[06:24:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[06:24:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[06:24:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[06:24:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[06:24:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[06:24:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[06:24:02] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[06:24:02] [PASSED] Automatic
[06:24:02] [PASSED] Full
[06:24:02] [PASSED] Limited 16:235
[06:24:02] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[06:24:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[06:24:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[06:24:02] [PASSED] drm_test_check_disable_connector
[06:24:02] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[06:24:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[06:24:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[06:24:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[06:24:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[06:24:02] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[06:24:02] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[06:24:02] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[06:24:02] [PASSED] drm_test_check_output_bpc_dvi
[06:24:02] [PASSED] drm_test_check_output_bpc_format_vic_1
[06:24:02] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[06:24:02] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[06:24:02] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[06:24:02] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[06:24:02] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[06:24:02] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[06:24:02] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[06:24:02] ============ drm_test_check_hdmi_color_format =============
[06:24:02] [PASSED] AUTO -> RGB
[06:24:02] [PASSED] YCBCR422 -> YUV422
[06:24:02] [PASSED] YCBCR420 -> YUV420
[06:24:02] [PASSED] YCBCR444 -> YUV444
[06:24:02] [PASSED] RGB -> RGB
[06:24:02] ======== [PASSED] drm_test_check_hdmi_color_format =========
[06:24:02] ======== drm_test_check_hdmi_color_format_420_only ========
[06:24:02] [PASSED] RGB should fail
[06:24:02] [PASSED] YUV444 should fail
[06:24:02] [PASSED] YUV422 should fail
[06:24:02] [PASSED] YUV420 should work
[06:24:02] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[06:24:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[06:24:02] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[06:24:02] [PASSED] drm_test_check_broadcast_rgb_value
[06:24:02] [PASSED] drm_test_check_bpc_8_value
[06:24:02] [PASSED] drm_test_check_bpc_10_value
[06:24:02] [PASSED] drm_test_check_bpc_12_value
[06:24:02] [PASSED] drm_test_check_format_value
[06:24:02] [PASSED] drm_test_check_tmds_char_value
[06:24:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[06:24:02] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[06:24:02] [PASSED] drm_test_check_mode_valid
[06:24:02] [PASSED] drm_test_check_mode_valid_reject
[06:24:02] [PASSED] drm_test_check_mode_valid_reject_rate
[06:24:02] [PASSED] drm_test_check_mode_valid_reject_max_clock
[06:24:02] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[06:24:02] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[06:24:02] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[06:24:02] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[06:24:02] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[06:24:02] [PASSED] drm_test_check_infoframes
[06:24:02] [PASSED] drm_test_check_reject_avi_infoframe
[06:24:02] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[06:24:02] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[06:24:02] [PASSED] drm_test_check_reject_audio_infoframe
[06:24:02] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[06:24:02] ================= drm_managed (2 subtests) =================
[06:24:02] [PASSED] drm_test_managed_release_action
[06:24:02] [PASSED] drm_test_managed_run_action
[06:24:02] =================== [PASSED] drm_managed ===================
[06:24:02] =================== drm_mm (6 subtests) ====================
[06:24:02] [PASSED] drm_test_mm_init
[06:24:02] [PASSED] drm_test_mm_debug
[06:24:02] [PASSED] drm_test_mm_align32
[06:24:02] [PASSED] drm_test_mm_align64
[06:24:02] [PASSED] drm_test_mm_lowest
[06:24:02] [PASSED] drm_test_mm_highest
[06:24:02] ===================== [PASSED] drm_mm ======================
[06:24:02] ============= drm_modes_analog_tv (5 subtests) =============
[06:24:02] [PASSED] drm_test_modes_analog_tv_mono_576i
[06:24:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[06:24:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[06:24:02] [PASSED] drm_test_modes_analog_tv_pal_576i
[06:24:02] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[06:24:02] =============== [PASSED] drm_modes_analog_tv ===============
[06:24:02] ============== drm_plane_helper (2 subtests) ===============
[06:24:02] =============== drm_test_check_plane_state ================
[06:24:02] [PASSED] clipping_simple
[06:24:02] [PASSED] clipping_rotate_reflect
[06:24:02] [PASSED] positioning_simple
[06:24:02] [PASSED] upscaling
[06:24:02] [PASSED] downscaling
[06:24:02] [PASSED] rounding1
[06:24:02] [PASSED] rounding2
[06:24:02] [PASSED] rounding3
[06:24:02] [PASSED] rounding4
[06:24:02] =========== [PASSED] drm_test_check_plane_state ============
[06:24:02] =========== drm_test_check_invalid_plane_state ============
[06:24:02] [PASSED] positioning_invalid
[06:24:02] [PASSED] upscaling_invalid
[06:24:02] [PASSED] downscaling_invalid
[06:24:02] ======= [PASSED] drm_test_check_invalid_plane_state ========
[06:24:02] ================ [PASSED] drm_plane_helper =================
[06:24:02] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[06:24:02] ====== drm_test_connector_helper_tv_get_modes_check =======
[06:24:02] [PASSED] None
[06:24:02] [PASSED] PAL
[06:24:02] [PASSED] NTSC
[06:24:02] [PASSED] Both, NTSC Default
[06:24:02] [PASSED] Both, PAL Default
[06:24:02] [PASSED] Both, NTSC Default, with PAL on command-line
[06:24:02] [PASSED] Both, PAL Default, with NTSC on command-line
[06:24:02] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[06:24:02] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[06:24:02] ================== drm_rect (9 subtests) ===================
[06:24:02] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[06:24:02] [PASSED] drm_test_rect_clip_scaled_not_clipped
[06:24:02] [PASSED] drm_test_rect_clip_scaled_clipped
[06:24:02] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[06:24:02] ================= drm_test_rect_intersect =================
[06:24:02] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[06:24:02] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[06:24:02] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[06:24:02] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[06:24:02] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[06:24:02] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[06:24:02] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[06:24:02] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[06:24:02] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[06:24:02] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[06:24:02] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[06:24:02] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[06:24:02] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[06:24:02] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[06:24:02] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[06:24:02] ============= [PASSED] drm_test_rect_intersect =============
[06:24:02] ================ drm_test_rect_calc_hscale ================
[06:24:02] [PASSED] normal use
[06:24:02] [PASSED] out of max range
[06:24:02] [PASSED] out of min range
[06:24:02] [PASSED] zero dst
[06:24:02] [PASSED] negative src
[06:24:02] [PASSED] negative dst
[06:24:02] ============ [PASSED] drm_test_rect_calc_hscale ============
[06:24:02] ================ drm_test_rect_calc_vscale ================
[06:24:02] [PASSED] normal use
[06:24:02] [PASSED] out of max range
[06:24:02] [PASSED] out of min range
[06:24:02] [PASSED] zero dst
[06:24:02] [PASSED] negative src
[06:24:02] [PASSED] negative dst
[06:24:02] ============ [PASSED] drm_test_rect_calc_vscale ============
[06:24:02] ================== drm_test_rect_rotate ===================
[06:24:02] [PASSED] reflect-x
[06:24:02] [PASSED] reflect-y
[06:24:02] [PASSED] rotate-0
[06:24:02] [PASSED] rotate-90
[06:24:02] [PASSED] rotate-180
[06:24:02] [PASSED] rotate-270
[06:24:02] ============== [PASSED] drm_test_rect_rotate ===============
[06:24:02] ================ drm_test_rect_rotate_inv =================
[06:24:02] [PASSED] reflect-x
[06:24:02] [PASSED] reflect-y
[06:24:02] [PASSED] rotate-0
[06:24:02] [PASSED] rotate-90
[06:24:02] [PASSED] rotate-180
[06:24:02] [PASSED] rotate-270
[06:24:02] ============ [PASSED] drm_test_rect_rotate_inv =============
[06:24:02] ==================== [PASSED] drm_rect =====================
[06:24:02] ============ drm_sysfb_modeset_test (1 subtest) ============
[06:24:02] ============ drm_test_sysfb_build_fourcc_list =============
[06:24:02] [PASSED] no native formats
[06:24:02] [PASSED] XRGB8888 as native format
[06:24:02] [PASSED] remove duplicates
[06:24:02] [PASSED] convert alpha formats
[06:24:02] [PASSED] random formats
[06:24:02] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[06:24:02] ============= [PASSED] drm_sysfb_modeset_test ==============
[06:24:02] ================== drm_fixp (2 subtests) ===================
[06:24:02] [PASSED] drm_test_int2fixp
[06:24:02] [PASSED] drm_test_sm2fixp
[06:24:02] ==================== [PASSED] drm_fixp =====================
[06:24:02] ============================================================
[06:24:02] Testing complete. Ran 639 tests: passed: 639
[06:24:02] Elapsed time: 26.050s total, 1.780s configuring, 24.100s building, 0.153s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[06:24:02] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:24:04] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:24:14] Starting KUnit Kernel (1/1)...
[06:24:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:24:14] ================= ttm_device (5 subtests) ==================
[06:24:14] [PASSED] ttm_device_init_basic
[06:24:14] [PASSED] ttm_device_init_multiple
[06:24:14] [PASSED] ttm_device_fini_basic
[06:24:14] [PASSED] ttm_device_init_no_vma_man
[06:24:14] ================== ttm_device_init_pools ==================
[06:24:14] [PASSED] No DMA allocations, no DMA32 required
[06:24:14] [PASSED] DMA allocations, DMA32 required
[06:24:14] [PASSED] No DMA allocations, DMA32 required
[06:24:14] [PASSED] DMA allocations, no DMA32 required
[06:24:14] ============== [PASSED] ttm_device_init_pools ==============
[06:24:14] =================== [PASSED] ttm_device ====================
[06:24:14] ================== ttm_pool (8 subtests) ===================
[06:24:14] ================== ttm_pool_alloc_basic ===================
[06:24:14] [PASSED] One page
[06:24:14] [PASSED] More than one page
[06:24:14] [PASSED] Above the allocation limit
[06:24:14] [PASSED] One page, with coherent DMA mappings enabled
[06:24:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:24:14] ============== [PASSED] ttm_pool_alloc_basic ===============
[06:24:14] ============== ttm_pool_alloc_basic_dma_addr ==============
[06:24:14] [PASSED] One page
[06:24:14] [PASSED] More than one page
[06:24:14] [PASSED] Above the allocation limit
[06:24:14] [PASSED] One page, with coherent DMA mappings enabled
[06:24:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:24:14] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[06:24:14] [PASSED] ttm_pool_alloc_order_caching_match
[06:24:14] [PASSED] ttm_pool_alloc_caching_mismatch
[06:24:14] [PASSED] ttm_pool_alloc_order_mismatch
[06:24:14] [PASSED] ttm_pool_free_dma_alloc
[06:24:14] [PASSED] ttm_pool_free_no_dma_alloc
[06:24:14] [PASSED] ttm_pool_fini_basic
[06:24:14] ==================== [PASSED] ttm_pool =====================
[06:24:14] ================ ttm_resource (8 subtests) =================
[06:24:14] ================= ttm_resource_init_basic =================
[06:24:14] [PASSED] Init resource in TTM_PL_SYSTEM
[06:24:14] [PASSED] Init resource in TTM_PL_VRAM
[06:24:14] [PASSED] Init resource in a private placement
[06:24:14] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[06:24:14] ============= [PASSED] ttm_resource_init_basic =============
[06:24:14] [PASSED] ttm_resource_init_pinned
[06:24:14] [PASSED] ttm_resource_fini_basic
[06:24:14] [PASSED] ttm_resource_manager_init_basic
[06:24:14] [PASSED] ttm_resource_manager_usage_basic
[06:24:14] [PASSED] ttm_resource_manager_set_used_basic
[06:24:14] [PASSED] ttm_sys_man_alloc_basic
[06:24:14] [PASSED] ttm_sys_man_free_basic
[06:24:14] ================== [PASSED] ttm_resource ===================
[06:24:14] =================== ttm_tt (15 subtests) ===================
[06:24:14] ==================== ttm_tt_init_basic ====================
[06:24:14] [PASSED] Page-aligned size
[06:24:14] [PASSED] Extra pages requested
[06:24:14] ================ [PASSED] ttm_tt_init_basic ================
[06:24:14] [PASSED] ttm_tt_init_misaligned
[06:24:14] [PASSED] ttm_tt_fini_basic
[06:24:14] [PASSED] ttm_tt_fini_sg
[06:24:14] [PASSED] ttm_tt_fini_shmem
[06:24:14] [PASSED] ttm_tt_create_basic
[06:24:14] [PASSED] ttm_tt_create_invalid_bo_type
[06:24:14] [PASSED] ttm_tt_create_ttm_exists
[06:24:14] [PASSED] ttm_tt_create_failed
[06:24:14] [PASSED] ttm_tt_destroy_basic
[06:24:14] [PASSED] ttm_tt_populate_null_ttm
[06:24:14] [PASSED] ttm_tt_populate_populated_ttm
[06:24:14] [PASSED] ttm_tt_unpopulate_basic
[06:24:14] [PASSED] ttm_tt_unpopulate_empty_ttm
[06:24:14] [PASSED] ttm_tt_swapin_basic
[06:24:14] ===================== [PASSED] ttm_tt ======================
[06:24:14] =================== ttm_bo (14 subtests) ===================
[06:24:14] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[06:24:14] [PASSED] Cannot be interrupted and sleeps
[06:24:14] [PASSED] Cannot be interrupted, locks straight away
[06:24:14] [PASSED] Can be interrupted, sleeps
[06:24:14] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[06:24:14] [PASSED] ttm_bo_reserve_locked_no_sleep
[06:24:14] [PASSED] ttm_bo_reserve_no_wait_ticket
[06:24:14] [PASSED] ttm_bo_reserve_double_resv
[06:24:14] [PASSED] ttm_bo_reserve_interrupted
[06:24:14] [PASSED] ttm_bo_reserve_deadlock
[06:24:14] [PASSED] ttm_bo_unreserve_basic
[06:24:14] [PASSED] ttm_bo_unreserve_pinned
[06:24:14] [PASSED] ttm_bo_unreserve_bulk
[06:24:14] [PASSED] ttm_bo_fini_basic
[06:24:14] [PASSED] ttm_bo_fini_shared_resv
[06:24:14] [PASSED] ttm_bo_pin_basic
[06:24:14] [PASSED] ttm_bo_pin_unpin_resource
[06:24:14] [PASSED] ttm_bo_multiple_pin_one_unpin
[06:24:14] ===================== [PASSED] ttm_bo ======================
[06:24:14] ============== ttm_bo_validate (22 subtests) ===============
[06:24:14] ============== ttm_bo_init_reserved_sys_man ===============
[06:24:14] [PASSED] Buffer object for userspace
[06:24:14] [PASSED] Kernel buffer object
[06:24:14] [PASSED] Shared buffer object
[06:24:14] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[06:24:14] ============== ttm_bo_init_reserved_mock_man ==============
[06:24:14] [PASSED] Buffer object for userspace
[06:24:14] [PASSED] Kernel buffer object
[06:24:14] [PASSED] Shared buffer object
[06:24:14] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[06:24:14] [PASSED] ttm_bo_init_reserved_resv
[06:24:14] ================== ttm_bo_validate_basic ==================
[06:24:14] [PASSED] Buffer object for userspace
[06:24:14] [PASSED] Kernel buffer object
[06:24:14] [PASSED] Shared buffer object
[06:24:14] ============== [PASSED] ttm_bo_validate_basic ==============
[06:24:14] [PASSED] ttm_bo_validate_invalid_placement
[06:24:14] ============= ttm_bo_validate_same_placement ==============
[06:24:14] [PASSED] System manager
[06:24:14] [PASSED] VRAM manager
[06:24:14] ========= [PASSED] ttm_bo_validate_same_placement ==========
[06:24:14] [PASSED] ttm_bo_validate_failed_alloc
[06:24:14] [PASSED] ttm_bo_validate_pinned
[06:24:14] [PASSED] ttm_bo_validate_busy_placement
[06:24:14] ================ ttm_bo_validate_multihop =================
[06:24:14] [PASSED] Buffer object for userspace
[06:24:14] [PASSED] Kernel buffer object
[06:24:14] [PASSED] Shared buffer object
[06:24:14] ============ [PASSED] ttm_bo_validate_multihop =============
[06:24:14] ========== ttm_bo_validate_no_placement_signaled ==========
[06:24:14] [PASSED] Buffer object in system domain, no page vector
[06:24:14] [PASSED] Buffer object in system domain with an existing page vector
[06:24:14] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[06:24:14] ======== ttm_bo_validate_no_placement_not_signaled ========
[06:24:14] [PASSED] Buffer object for userspace
[06:24:14] [PASSED] Kernel buffer object
[06:24:14] [PASSED] Shared buffer object
[06:24:14] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[06:24:14] [PASSED] ttm_bo_validate_move_fence_signaled
[06:24:14] ========= ttm_bo_validate_move_fence_not_signaled =========
[06:24:14] [PASSED] Waits for GPU
[06:24:14] [PASSED] Tries to lock straight away
[06:24:14] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[06:24:14] [PASSED] ttm_bo_validate_swapout
[06:24:14] [PASSED] ttm_bo_validate_happy_evict
[06:24:14] [PASSED] ttm_bo_validate_all_pinned_evict
[06:24:14] [PASSED] ttm_bo_validate_allowed_only_evict
[06:24:14] [PASSED] ttm_bo_validate_deleted_evict
[06:24:14] [PASSED] ttm_bo_validate_busy_domain_evict
[06:24:14] [PASSED] ttm_bo_validate_evict_gutting
[06:24:14] [PASSED] ttm_bo_validate_recrusive_evict
[06:24:14] ================= [PASSED] ttm_bo_validate =================
[06:24:14] ============================================================
[06:24:14] Testing complete. Ran 102 tests: passed: 102
[06:24:14] Elapsed time: 11.526s total, 1.709s configuring, 9.602s building, 0.183s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.BAT: success for Unify fec enable/disable across the mst streams
2026-06-16 6:15 [PATCH v2 0/2] Unify fec enable/disable across the mst streams Arun R Murthy
` (2 preceding siblings ...)
2026-06-16 6:24 ` ✓ CI.KUnit: success for Unify fec enable/disable across the mst streams Patchwork
@ 2026-06-16 7:07 ` Patchwork
2026-06-16 8:01 ` [PATCH v2 0/2] " Jani Nikula
2026-06-16 9:01 ` ✓ Xe.CI.FULL: success for " Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-06-16 7:07 UTC (permalink / raw)
To: Arun R Murthy; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1584 bytes --]
== Series Details ==
Series: Unify fec enable/disable across the mst streams
URL : https://patchwork.freedesktop.org/series/168569/
State : success
== Summary ==
CI Bug Log - changes from xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7_BAT -> xe-pw-168569v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-168569v1_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_live_ktest@xe_dma_buf:
- bat-bmg-vm: [ABORT][1] ([Intel XE#8007] / [Intel XE#8023]) -> [PASS][2] +1 other test pass
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8023]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8023
Build changes
-------------
* IGT: IGT_8964 -> IGT_8965
* Linux: xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7 -> xe-pw-168569v1
IGT_8964: 8964
IGT_8965: 8965
xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7: c585a0a7e48a48aca80f7c0acb7294c7bf301bb7
xe-pw-168569v1: 168569v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/index.html
[-- Attachment #2: Type: text/html, Size: 2156 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 0/2] Unify fec enable/disable across the mst streams
2026-06-16 6:15 [PATCH v2 0/2] Unify fec enable/disable across the mst streams Arun R Murthy
` (3 preceding siblings ...)
2026-06-16 7:07 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-06-16 8:01 ` Jani Nikula
2026-06-16 9:18 ` Murthy, Arun R
2026-06-16 9:01 ` ✓ Xe.CI.FULL: success for " Patchwork
5 siblings, 1 reply; 10+ messages in thread
From: Jani Nikula @ 2026-06-16 8:01 UTC (permalink / raw)
To: Arun R Murthy, intel-gfx, intel-xe; +Cc: Arun R Murthy, Stephen Fuhry
On Tue, 16 Jun 2026, Arun R Murthy <arun.r.murthy@intel.com> wrote:
> First version of the patch included only one patch i.e the ref count
> https://patchwork.freedesktop.org/series/167664/
>
> Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
> ---
> Arun R Murthy (2):
> drm/i915/mst: Unify fec_enable across mst streams
> drm/i915/display: Refcount for fec enable/disable
>
> drivers/gpu/drm/i915/display/intel_ddi.c | 58 ++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_ddi.h | 1 +
> drivers/gpu/drm/i915/display/intel_display_types.h | 3 +
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 70 ++++++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_modeset_setup.c | 6 ++
> 5 files changed, 138 insertions(+)
Okay, this may seem a bit unfair, since I haven't dug deep into the
problem, but I really have a hard time believing this level of
complexity is required for FEC.
BR,
Jani.
> ---
> base-commit: c585a0a7e48a48aca80f7c0acb7294c7bf301bb7
> change-id: 20260616-fec-82a3d27e0f11
>
> Best regards,
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Xe.CI.FULL: success for Unify fec enable/disable across the mst streams
2026-06-16 6:15 [PATCH v2 0/2] Unify fec enable/disable across the mst streams Arun R Murthy
` (4 preceding siblings ...)
2026-06-16 8:01 ` [PATCH v2 0/2] " Jani Nikula
@ 2026-06-16 9:01 ` Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-06-16 9:01 UTC (permalink / raw)
To: Murthy, Arun R; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 24718 bytes --]
== Series Details ==
Series: Unify fec enable/disable across the mst streams
URL : https://patchwork.freedesktop.org/series/168569/
State : success
== Summary ==
CI Bug Log - changes from xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7_FULL -> xe-pw-168569v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-168569v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [PASS][1] -> [FAIL][2] ([Intel XE#7445])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-4/igt@intel_hwmon@hwmon-write.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-2/igt@intel_hwmon@hwmon-write.html
* igt@kms_chamelium_frames@hdmi-aspect-ratio:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2252])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-1/igt@kms_chamelium_frames@hdmi-aspect-ratio.html
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#373])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-7/igt@kms_chamelium_frames@hdmi-aspect-ratio.html
* igt@kms_cursor_crc@cursor-offscreen-32x10:
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#1424])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-8/igt@kms_cursor_crc@cursor-offscreen-32x10.html
* igt@kms_cursor_crc@cursor-onscreen-256x85:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2320]) +1 other test skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-2/igt@kms_cursor_crc@cursor-onscreen-256x85.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [PASS][7] -> [FAIL][8] ([Intel XE#7571])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#4156] / [Intel XE#7425])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-lnl: NOTRUN -> [SKIP][10] ([Intel XE#1421])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-4/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [PASS][11] -> [FAIL][12] ([Intel XE#301])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw:
- shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#6312] / [Intel XE#651])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-5/igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2311]) +5 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
- shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#656] / [Intel XE#7905])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrshdr-1p-pri-indfb-multidraw:
- shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#6312])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-4/igt@kms_frontbuffer_tracking@drrshdr-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-lnl: [PASS][17] -> [ABORT][18] ([Intel XE#8007])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#7061])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-blt.html
- shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#7061])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-move:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2313]) +2 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-2/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-move.html
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#7905]) +2 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-4/igt@kms_frontbuffer_tracking@psrhdr-2p-primscrn-spr-indfb-move.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][23] -> [SKIP][24] ([Intel XE#1503])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-1/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [PASS][25] -> [SKIP][26] ([Intel XE#7922]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-6/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-1/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [PASS][27] -> [SKIP][28] ([Intel XE#7915]) +3 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-5/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-8/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_hdr@static-toggle:
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#1503] / [Intel XE#7915])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-5/igt@kms_hdr@static-toggle.html
* igt@kms_hdr@static-toggle@pipe-a-edp-1-xrgb2101010:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#7915]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-5/igt@kms_hdr@static-toggle@pipe-a-edp-1-xrgb2101010.html
* igt@kms_mst@mst-suspend-read-crc:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#8348])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-1/igt@kms_mst@mst-suspend-read-crc.html
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#8348])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-6/igt@kms_mst@mst-suspend-read-crc.html
* igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#1489]) +2 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-1/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@fbc-psr2-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2234] / [Intel XE#2850])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-10/igt@kms_psr@fbc-psr2-cursor-plane-move.html
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#1406] / [Intel XE#7345])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-5/igt@kms_psr@fbc-psr2-cursor-plane-move.html
* igt@kms_psr@fbc-psr2-cursor-plane-move@edp-1:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#1406] / [Intel XE#4609])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-5/igt@kms_psr@fbc-psr2-cursor-plane-move@edp-1.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#3904] / [Intel XE#7342])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-4/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
- shard-lnl: [PASS][38] -> [FAIL][39] ([Intel XE#2142]) +1 other test fail
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-4/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
* igt@xe_eudebug@basic-vm-bind-extended:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#7636]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-10/igt@xe_eudebug@basic-vm-bind-extended.html
* igt@xe_eudebug_online@interrupt-all-set-breakpoint:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#7636]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-4/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [PASS][42] -> [INCOMPLETE][43] ([Intel XE#6321])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-6/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen:
- shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#6540] / [Intel XE#688])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-1/igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-reopen.html
* igt@xe_exec_fault_mode@twice-multi-queue-userptr-prefetch:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#7136]) +1 other test skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-3/igt@xe_exec_fault_mode@twice-multi-queue-userptr-prefetch.html
- shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#7136])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-6/igt@xe_exec_fault_mode@twice-multi-queue-userptr-prefetch.html
* igt@xe_exec_multi_queue@one-queue-preempt-mode-basic-smem:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#6874]) +1 other test skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-7/igt@xe_exec_multi_queue@one-queue-preempt-mode-basic-smem.html
* igt@xe_exec_multi_queue@two-queues-dyn-priority-smem:
- shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#6874])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-3/igt@xe_exec_multi_queue@two-queues-dyn-priority-smem.html
* igt@xe_exec_system_allocator@fault-threads-benchmark:
- shard-bmg: [PASS][49] -> [FAIL][50] ([Intel XE#7850])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-2/igt@xe_exec_system_allocator@fault-threads-benchmark.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-6/igt@xe_exec_system_allocator@fault-threads-benchmark.html
* igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race:
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#7138])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-8/igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race.html
* igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#7138]) +1 other test skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-invalidate.html
* igt@xe_pm@d3cold-i2c:
- shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#5694] / [Intel XE#7370])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-7/igt@xe_pm@d3cold-i2c.html
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#5694] / [Intel XE#7370])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-4/igt@xe_pm@d3cold-i2c.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-bmg: NOTRUN -> [SKIP][55] ([Intel XE#944])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-3/igt@xe_query@multigpu-query-invalid-extension.html
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#944])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-2/igt@xe_query@multigpu-query-invalid-extension.html
#### Possible fixes ####
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-bmg: [INCOMPLETE][57] ([Intel XE#8155]) -> [PASS][58] +1 other test pass
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-4/igt@kms_flip@2x-plain-flip-ts-check.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-9/igt@kms_flip@2x-plain-flip-ts-check.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-bmg: [FAIL][59] ([Intel XE#3321]) -> [PASS][60] +1 other test pass
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [FAIL][61] ([Intel XE#301]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][63] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_hdmi_inject@inject-audio:
- shard-bmg: [SKIP][65] ([Intel XE#7308]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-5/igt@kms_hdmi_inject@inject-audio.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-5/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [SKIP][67] ([Intel XE#7915]) -> [PASS][68] +3 other tests pass
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-8/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-3/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_pm_dc@dc6-dpms:
- shard-lnl: [FAIL][69] ([Intel XE#7340]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-3/igt@kms_pm_dc@dc6-dpms.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-6/igt@kms_pm_dc@dc6-dpms.html
* igt@xe_exec_reset@long-spin-many-preempt-threads:
- shard-bmg: [FAIL][71] ([Intel XE#7956]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-3/igt@xe_exec_reset@long-spin-many-preempt-threads.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-2/igt@xe_exec_reset@long-spin-many-preempt-threads.html
* igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads:
- shard-bmg: [FAIL][73] ([Intel XE#7850]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-7/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-2/igt@xe_exec_reset@long-spin-sys-reuse-many-preempt-threads.html
* igt@xe_exec_system_allocator@many-large-execqueues-mmap-remap-ro:
- shard-lnl: [ABORT][75] ([Intel XE#8007]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-1/igt@xe_exec_system_allocator@many-large-execqueues-mmap-remap-ro.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-5/igt@xe_exec_system_allocator@many-large-execqueues-mmap-remap-ro.html
#### Warnings ####
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][77] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][78] ([Intel XE#309] / [Intel XE#7343])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-lnl: [FAIL][79] ([Intel XE#301] / [Intel XE#3149]) -> [FAIL][80] ([Intel XE#301])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][81] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][82] ([Intel XE#1729] / [Intel XE#7424])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][83] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][84] ([Intel XE#2509] / [Intel XE#7437])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
[Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7445]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7445
[Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7850
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#7956]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7956
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8155]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8155
[Intel XE#8348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8348
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_8964 -> IGT_8965
* Linux: xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7 -> xe-pw-168569v1
IGT_8964: 8964
IGT_8965: 8965
xe-5261-c585a0a7e48a48aca80f7c0acb7294c7bf301bb7: c585a0a7e48a48aca80f7c0acb7294c7bf301bb7
xe-pw-168569v1: 168569v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-168569v1/index.html
[-- Attachment #2: Type: text/html, Size: 28276 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH v2 0/2] Unify fec enable/disable across the mst streams
2026-06-16 8:01 ` [PATCH v2 0/2] " Jani Nikula
@ 2026-06-16 9:18 ` Murthy, Arun R
0 siblings, 0 replies; 10+ messages in thread
From: Murthy, Arun R @ 2026-06-16 9:18 UTC (permalink / raw)
To: Jani Nikula, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Stephen Fuhry
> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Tuesday, June 16, 2026 1:31 PM
> To: Murthy, Arun R <arun.r.murthy@intel.com>; intel-gfx@lists.freedesktop.org;
> intel-xe@lists.freedesktop.org
> Cc: Murthy, Arun R <arun.r.murthy@intel.com>; Stephen Fuhry
> <fuhrysteve@gmail.com>
> Subject: Re: [PATCH v2 0/2] Unify fec enable/disable across the mst streams
>
> On Tue, 16 Jun 2026, Arun R Murthy <arun.r.murthy@intel.com> wrote:
> > First version of the patch included only one patch i.e the ref count
> > https://patchwork.freedesktop.org/series/167664/
> >
> > Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
> > ---
> > Arun R Murthy (2):
> > drm/i915/mst: Unify fec_enable across mst streams
> > drm/i915/display: Refcount for fec enable/disable
> >
> > drivers/gpu/drm/i915/display/intel_ddi.c | 58 ++++++++++++++++++
> > drivers/gpu/drm/i915/display/intel_ddi.h | 1 +
> > drivers/gpu/drm/i915/display/intel_display_types.h | 3 +
> > drivers/gpu/drm/i915/display/intel_dp_mst.c | 70
> ++++++++++++++++++++++
> > drivers/gpu/drm/i915/display/intel_modeset_setup.c | 6 ++
> > 5 files changed, 138 insertions(+)
>
> Okay, this may seem a bit unfair, since I haven't dug deep into the problem, but
> I really have a hard time believing this level of complexity is required for FEC.
>
The problem is FEC is a link-wide property: DP_TP_CTL_FEC_ENABLE is a per-port HW bit, while crtc_state->fec_enable is per-stream.
So synchronization across the mst stream is required.
If not with refcount, maybe with get/put which eventually will be a kind of refcount but different name.
Other alternative can be to add a logic in disble_fec() to check if there are any fec users within the mst siblings and if not then disable else return. But this only change may not help, will have to remove the crtc_state->fec_enable compare and HW readout as well.
Thanks and Regards,
Arun R Murthy
-------------------
>
> BR,
> Jani.
>
>
> > ---
> > base-commit: c585a0a7e48a48aca80f7c0acb7294c7bf301bb7
> > change-id: 20260616-fec-82a3d27e0f11
> >
> > Best regards,
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/2] drm/i915/display: Refcount for fec enable/disable
2026-06-16 6:15 ` [PATCH v2 2/2] drm/i915/display: Refcount for fec enable/disable Arun R Murthy
@ 2026-06-16 12:52 ` Jani Nikula
0 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2026-06-16 12:52 UTC (permalink / raw)
To: Arun R Murthy, intel-gfx, intel-xe; +Cc: Arun R Murthy, Stephen Fuhry
On Tue, 16 Jun 2026, Arun R Murthy <arun.r.murthy@intel.com> wrote:
> The FEC_ENABLE bit is per port basis and is enabled/disabled on ddi
> pre_enable and post_disable. This fec is shared across the mst streams
> and can be enabled per stream basis as well.
> So have a refcount to track the usage of FEC and then enable/disable
> accordingly.
The FEC enable/disable should only happen on the first/last DP MST
stream through the primary_encoder pre_enable()/post_disable() hooks.
There's a lot of stuff that's only relevant for the primary_encoder, and
we don't have to jump through hoops for them. We have the active stream
counting already in place. We shouldn't need separate tracking for FEC.
BR,
Jani.
>
> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/16073
> Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
> Tested-by: Stephen Fuhry <fuhrysteve@gmail.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 58 ++++++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_ddi.h | 1 +
> drivers/gpu/drm/i915/display/intel_display_types.h | 3 ++
> drivers/gpu/drm/i915/display/intel_modeset_setup.c | 6 +++
> 4 files changed, 68 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 25314ec65ae77b91bf4d732c229f236d070e18cc..477a11a63fe8f8d6731905be21de34dcbaa895b5 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2096,6 +2096,47 @@ void intel_ddi_disable_clock(struct intel_encoder *encoder)
> encoder->disable_clock(encoder);
> }
>
> +/**
> + * intel_ddi_seed_fec_refcounts - Seed per-port FEC refcounts from active CRTCs
> + * @display: display device
> + *
> + * intel_digital_port::fec_active_streams is the per-port refcount that gates
> + * programming of the shared DP_TP_CTL_FEC_ENABLE bit. After initial HW state
> + * readout (driver load, resume, GPU reset takeover), the persistent
> + * crtc_state->fec_enable values reflect what HW currently has; we need to
> + * align the refcount with that so the first paired disable doesn't underflow
> + * and the next enable doesn't incorrectly skip programming the HW bit.
> + *
> + * Must be called once after intel_modeset_readout_hw_state(), before any new
> + * modeset commit can run.
> + */
> +void intel_ddi_seed_fec_refcounts(struct intel_display *display)
> +{
> + struct intel_crtc *crtc;
> +
> + for_each_intel_crtc(display, crtc) {
> + const struct intel_crtc_state *crtc_state =
> + to_intel_crtc_state(crtc->base.state);
> + struct intel_encoder *encoder;
> +
> + if (!crtc_state->hw.active || !crtc_state->fec_enable)
> + continue;
> +
> + for_each_intel_encoder(display->drm, encoder) {
> + struct intel_digital_port *dig_port;
> +
> + if (encoder->base.crtc != &crtc->base)
> + continue;
> + if (!intel_encoder_is_dig_port(encoder))
> + continue;
> +
> + dig_port = enc_to_dig_port(encoder);
> + dig_port->fec_active_streams++;
> + break;
> + }
> + }
> +}
> +
> void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
> {
> struct intel_display *display = to_intel_display(encoder);
> @@ -2413,12 +2454,22 @@ static void intel_ddi_enable_fec(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> + struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> int i;
> int ret;
>
> if (!crtc_state->fec_enable)
> return;
>
> + /*
> + * FEC is link-wide: DP_TP_CTL_FEC_ENABLE is per-port while
> + * crtc_state->fec_enable is per-stream. For DP MST, several streams
> + * on this port share the bit. Only program HW on the first stream
> + * needing FEC; subsequent streams just bump the refcount.
> + */
> + if (dig_port->fec_active_streams++ > 0)
> + return;
> +
> intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state),
> 0, DP_TP_CTL_FEC_ENABLE);
>
> @@ -2454,10 +2505,17 @@ static void intel_ddi_disable_fec(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> + struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>
> if (!crtc_state->fec_enable)
> return;
>
> + if (drm_WARN_ON(display->drm, dig_port->fec_active_streams <= 0))
> + return;
> +
> + if (--dig_port->fec_active_streams > 0)
> + return;
> +
> intel_de_rmw(display, dp_tp_ctl_reg(encoder, crtc_state),
> DP_TP_CTL_FEC_ENABLE, 0);
> intel_de_posting_read(display, dp_tp_ctl_reg(encoder, crtc_state));
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
> index 580ecb09b8b606e07445c7e26142a2fcfa69a2d2..3678c28a0dc952d4962428893c519fb7d41e4422 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> @@ -78,6 +78,7 @@ int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
> enum transcoder cpu_transcoder,
> bool enable, u32 hdcp_mask);
> void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
> +void intel_ddi_seed_fec_refcounts(struct intel_display *display);
> int intel_ddi_level(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> int lane);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index aa4772a1c208e4cb4bb6f51dc0dcc2349e422dd0..276d4cc21d6ecdd8c17777608e59223d9f49c554 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1989,6 +1989,9 @@ struct intel_digital_port {
> struct ref_tracker *ddi_io_wakeref;
> struct ref_tracker *aux_wakeref;
>
> + /* Number of active streams on this port currently using FEC */
> + int fec_active_streams;
> +
> struct intel_tc_port *tc;
>
> struct {
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> index e8730b5baf2a4bd2e5edfc5fc8fd2622a57d2a4e..4b6abcb1dd928ab2bc9b17f0521db78ebb6ef586 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> @@ -952,6 +952,12 @@ void intel_modeset_setup_hw_state(struct intel_display *display,
>
> intel_modeset_readout_hw_state(display);
>
> + /*
> + * Seed per-port FEC refcounts from the just-populated active
> + * crtc_states before anything can issue an enable/disable.
> + */
> + intel_ddi_seed_fec_refcounts(display);
> +
> /* HW state is read out, now we need to sanitize this mess. */
> get_encoder_power_domains(display);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 1/2] drm/i915/mst: Unify fec_enable across mst streams
2026-06-16 6:15 ` [PATCH v2 1/2] drm/i915/mst: Unify fec_enable across " Arun R Murthy
@ 2026-06-16 12:57 ` Jani Nikula
0 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2026-06-16 12:57 UTC (permalink / raw)
To: Arun R Murthy, intel-gfx, intel-xe; +Cc: Arun R Murthy, Stephen Fuhry
On Tue, 16 Jun 2026, Arun R Murthy <arun.r.murthy@intel.com> wrote:
> FEC is a link-wide property: DP_TP_CTL_FEC_ENABLE is a per-port HW bit
> while crtc_state->fec_enable is per-stream. With DP MST several streams
> share the same port, so if any sibling stream needs FEC the per-port HW
> bit is on for every sibling. If sibling crtc_states disagree the
> following two symptoms appear:
>
> - intel_pipe_config_compare() rejects fastset on the sibling whose new
> crtc_state->fec_enable disagrees with the old (HW) value
> ("fastset requirement not met in fec_enable"), forcing an
> unnecessary full modeset.
> - verify_crtc_state() after commit reports a fec_enable mismatch
> ("[CRTC:..] mismatch in fec_enable (expected no, found yes)") because
> the per-port HW bit is read back into every sibling's hw state.
>
> Walk every MST connector on @mst_mgr, pulling currently-active siblings
> into @state if they are not already in it (covers the case where the
> user's commit touches only a subset of MST streams on the link). Then OR
> all sibling fec_enable values together and write the unified result back
> into every sibling crtc_state. The unification only widens
> (false -> true), never narrows, so a stream that genuinely needs FEC
> keeps it.
>
> This runs from intel_dp_mst_atomic_check_link(), which is invoked after
> intel_atomic_check_config_and_link() has finished all per-stream
> compute_config and compute_config_late passes but before
> intel_crtc_check_fastset() and the post-commit verify, so the unified
> value is visible to both checks.
I believe the refcounting should already be in place. See my reply to
patch 2.
Here, it's slightly misleading to say FEC is a "per-port bit". I think
the main point here is that for DP MST it gets set/cleared for the
primary encoder & master transcoder in the first/last stream.
Maybe add debug logging to FEC enable/disable and see if it gets called
too many times or not.
Seems like the confusion comes from the fact that the readout is also
based on the master transcoder register, and throws off the state
checker.
BR,
Jani.
>
> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/16073
> Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
> Tested-by: Stephen Fuhry <fuhrysteve@gmail.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 70 +++++++++++++++++++++++++++++
> 1 file changed, 70 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index bcdc504913471a1ac7d255cde49a907c9f3d88a6..d487f1c90dcd2671754e6c6f28f207f32ace9ee2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -881,6 +881,72 @@ static int intel_dp_mst_check_bw(struct intel_atomic_state *state,
> return ret ? : -EAGAIN;
> }
>
> +/*
> + * Unify crtc_state->fec_enable across every MST sibling stream on @mst_mgr.
> + */
> +static int intel_dp_mst_unify_fec_enable(struct intel_atomic_state *state,
> + struct drm_dp_mst_topology_mgr *mst_mgr)
> +{
> + struct intel_display *display = to_intel_display(state);
> + struct drm_connector_list_iter connector_list_iter;
> + struct intel_connector *connector;
> + struct intel_crtc *crtcs[I915_MAX_PIPES];
> + int n_crtcs = 0;
> + bool need_fec = false;
> + int ret = 0;
> + int i;
> +
> + drm_connector_list_iter_begin(display->drm, &connector_list_iter);
> + for_each_intel_connector_iter(connector, &connector_list_iter) {
> + struct intel_digital_connector_state *conn_state;
> + struct intel_crtc_state *crtc_state;
> + struct intel_crtc *crtc;
> +
> + if (&connector->mst.dp->mst.mgr != mst_mgr)
> + continue;
> +
> + conn_state = intel_atomic_get_digital_connector_state(state,
> + connector);
> + if (IS_ERR(conn_state)) {
> + ret = PTR_ERR(conn_state);
> + break;
> + }
> +
> + if (!conn_state->base.crtc)
> + continue;
> +
> + crtc = to_intel_crtc(conn_state->base.crtc);
> + crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> + if (IS_ERR(crtc_state)) {
> + ret = PTR_ERR(crtc_state);
> + break;
> + }
> +
> + if (!crtc_state->hw.active)
> + continue;
> +
> + if (drm_WARN_ON(display->drm, n_crtcs >= ARRAY_SIZE(crtcs)))
> + break;
> +
> + crtcs[n_crtcs++] = crtc;
> + if (crtc_state->fec_enable)
> + need_fec = true;
> + }
> + drm_connector_list_iter_end(&connector_list_iter);
> +
> + if (ret || !need_fec)
> + return ret;
> +
> + for (i = 0; i < n_crtcs; i++) {
> + struct intel_crtc_state *crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtcs[i]);
> +
> + crtc_state->fec_enable = true;
> + }
> +
> + return 0;
> +}
> +
> /**
> * intel_dp_mst_atomic_check_link - check all modeset MST link configuration
> * @state: intel atomic state
> @@ -908,6 +974,10 @@ int intel_dp_mst_atomic_check_link(struct intel_atomic_state *state,
> int i;
>
> for_each_new_mst_mgr_in_state(&state->base, mgr, mst_state, i) {
> + ret = intel_dp_mst_unify_fec_enable(state, mgr);
> + if (ret)
> + return ret;
> +
> ret = intel_dp_mst_check_dsc_change(state, mgr, limits);
> if (ret)
> return ret;
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2026-06-16 12:57 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-06-16 6:15 [PATCH v2 0/2] Unify fec enable/disable across the mst streams Arun R Murthy
2026-06-16 6:15 ` [PATCH v2 1/2] drm/i915/mst: Unify fec_enable across " Arun R Murthy
2026-06-16 12:57 ` Jani Nikula
2026-06-16 6:15 ` [PATCH v2 2/2] drm/i915/display: Refcount for fec enable/disable Arun R Murthy
2026-06-16 12:52 ` Jani Nikula
2026-06-16 6:24 ` ✓ CI.KUnit: success for Unify fec enable/disable across the mst streams Patchwork
2026-06-16 7:07 ` ✓ Xe.CI.BAT: " Patchwork
2026-06-16 8:01 ` [PATCH v2 0/2] " Jani Nikula
2026-06-16 9:18 ` Murthy, Arun R
2026-06-16 9:01 ` ✓ Xe.CI.FULL: success for " Patchwork
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox