From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Nilawar, Badal" <badal.nilawar@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <anshuman.gupta@intel.com>,
<rafael.j.wysocki@intel.com>, <raag.jadav@intel.com>
Subject: Re: [PATCH] drm/xe/d3cold: Set power state to D3Cold during s2idle/s3
Date: Fri, 28 Mar 2025 12:02:17 -0400 [thread overview]
Message-ID: <Z-bICZUBN_Fk0_mM@intel.com> (raw)
In-Reply-To: <Z-WHYbhu1QdjUFPR@intel.com>
On Thu, Mar 27, 2025 at 01:14:09PM -0400, Rodrigo Vivi wrote:
> On Thu, Mar 27, 2025 at 10:02:29PM +0530, Nilawar, Badal wrote:
> >
> > On 27-03-2025 21:49, Badal Nilawar wrote:
> > Hi Rodrigo,
> >
> > > According to pci core guidelines, pci_save_config is recommended when the
> > > driver explicitly needs to set the pci power state. As of now xe kmd is
> > > only doing pci_save_config while entering to s2idle/s3 state, which makes
> > > pci core think that device driver has already applied required pci power
> > > state. This leads to GPU remain in D0 state. To fix the issue setting
> > > the pci power state to D3Cold.
> > >
> > > Fixes:dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
> > > Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> > > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_pci.c | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> > > index 7046e7e9a6c7..3317d475be79 100644
> > > --- a/drivers/gpu/drm/xe/xe_pci.c
> > > +++ b/drivers/gpu/drm/xe/xe_pci.c
> > > @@ -932,6 +932,7 @@ static int xe_pci_suspend(struct device *dev)
> > > pci_save_state(pdev);
> > > pci_disable_device(pdev);
> > > + pci_set_power_state(pdev, PCI_D3cold);
> >
> > Another approach to avoid calling pci_save_state and pci_set_power_state,
> > allowing the PCI core to manage this.
> > Currently, the above change aligns with the Xe RPM suspend flow.
>
> Either way is fine it seems. Or we don't save the state and let pci subsystem
> handle that for us or we save and set explicitly. So, let's move quickly
> with this option here that is already fixing our current issue.
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
now pushed to drm-xe-next, thank you!
>
> >
> > Regards,
> > Badal
> >
> > > return 0;
> > > }
next prev parent reply other threads:[~2025-03-28 16:03 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-27 16:19 [PATCH] drm/xe/d3cold: Set power state to D3Cold during s2idle/s3 Badal Nilawar
2025-03-27 16:24 ` ✓ CI.Patch_applied: success for " Patchwork
2025-03-27 16:25 ` ✗ CI.checkpatch: warning " Patchwork
2025-03-27 16:26 ` ✓ CI.KUnit: success " Patchwork
2025-03-27 16:32 ` [PATCH] " Nilawar, Badal
2025-03-27 17:14 ` Rodrigo Vivi
2025-03-28 16:02 ` Rodrigo Vivi [this message]
2025-03-29 5:20 ` Raag Jadav
2025-03-31 16:15 ` Rodrigo Vivi
2025-03-31 20:18 ` Wysocki, Rafael J
2025-04-01 17:53 ` Raag Jadav
2025-04-01 19:35 ` Rafael J. Wysocki
2025-04-02 7:31 ` Raag Jadav
2025-04-02 8:34 ` Raag Jadav
2025-04-02 10:31 ` Rafael J. Wysocki
2025-04-03 3:12 ` Raag Jadav
2025-04-03 11:12 ` Rafael J. Wysocki
2025-04-02 10:19 ` Rafael J. Wysocki
2025-04-02 11:19 ` Gupta, Anshuman
2025-04-03 7:36 ` Nilawar, Badal
2025-04-03 11:16 ` Rafael J. Wysocki
2025-03-27 16:42 ` ✓ CI.Build: success for " Patchwork
2025-03-27 16:44 ` ✓ CI.Hooks: " Patchwork
2025-03-27 16:46 ` ✓ CI.checksparse: " Patchwork
2025-03-27 17:08 ` ✓ Xe.CI.BAT: " Patchwork
2025-03-28 1:49 ` ✗ Xe.CI.Full: failure " Patchwork
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