From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Jouni Högander" <jouni.hogander@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
animesh.manna@intel.com, ville.syrjala@intel.com
Subject: Re: [PATCH v4 12/13] drm/i915/display: Ensure we have "Frame Change" event in DSB commit
Date: Fri, 24 Jan 2025 13:57:59 +0200 [thread overview]
Message-ID: <Z5OARwCaGG8OyXVW@intel.com> (raw)
In-Reply-To: <Z5N83bbvxBKm4yEQ@intel.com>
On Fri, Jan 24, 2025 at 01:43:25PM +0200, Ville Syrjälä wrote:
> On Fri, Jan 24, 2025 at 12:56:23PM +0200, Jouni Högander wrote:
> > We may have commit which doesn't have any non-arming plane register
> > writes. In that case there aren't "Frame Change" event before DSB vblank
> > evasion which hangs as PIPEDSL register is reading as 0 when PSR state is
> > SRDENT(PSR1) or DEEP_SLEEP(PSR2). Handle this by adding dummy write
> > triggering the "Frame Change" event.
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index a189aa437d972..cd7e960bd29f1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -7666,6 +7666,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
> > intel_atomic_get_old_crtc_state(state, crtc);
> > struct intel_crtc_state *new_crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> > + struct intel_display *display = to_intel_display(crtc);
> >
> > if (!new_crtc_state->hw.active)
> > return;
> > @@ -7708,6 +7709,15 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state,
> > intel_crtc_planes_update_noarm(new_crtc_state->dsb_commit,
> > state, crtc);
> >
> > + /*
> > + * Ensure we have "Frame Change" event when PSR state is
> > + * SRDENT(PSR1) or DEEP_SLEEP(PSR2). Otherwise DSB vblank
> > + * evasion hangs as PIPEDSL is reading as 0.
> > + */
> > + if (new_crtc_state->has_psr && !new_crtc_state->has_panel_replay)
> > + intel_de_write_dsb(display, new_crtc_state->dsb_commit,
> > + CURSURFLIVE(display, crtc->pipe), 0);
>
> I don't really want to see the low level detais right here.
> So we should probably should stuff this into some kind of
> intel_dsb_ensure_psr_frame_change() function or something
> along those lines.
Oh, and I guess this really should be using
intel_pre_commit_crtc_state() as well. I suppose it doesn't
actually matter if we skip commits that change PSR stuff anyway,
but at some point the plan is to attempt full fastsets with
the DSB (if actually possible).
>
> > +
> > intel_dsb_vblank_evade(state, new_crtc_state->dsb_commit);
> >
> > if (intel_crtc_needs_color_update(new_crtc_state))
> > --
> > 2.43.0
>
> --
> Ville Syrjälä
> Intel
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2025-01-24 11:58 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-24 10:56 [PATCH v4 00/13] PSR DSB support Jouni Högander
2025-01-24 10:56 ` [PATCH v4 01/13] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Jouni Högander
2025-01-24 10:56 ` [PATCH v4 02/13] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Jouni Högander
2025-01-24 10:56 ` [PATCH v4 03/13] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Jouni Högander
2025-01-24 10:56 ` [PATCH v4 04/13] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Jouni Högander
2025-01-24 10:56 ` [PATCH v4 05/13] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Jouni Högander
2025-01-24 10:56 ` [PATCH v4 06/13] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Jouni Högander
2025-01-24 10:56 ` [PATCH v4 07/13] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Jouni Högander
2025-01-24 10:56 ` [PATCH v4 08/13] drm/i915/psr: Add intel_psr_is_psr_mode_changing Jouni Högander
2025-01-24 10:56 ` [PATCH v4 09/13] drm/i915/display: Don't use DSB if psr mode changing Jouni Högander
2025-01-24 11:53 ` Ville Syrjälä
2025-01-24 12:09 ` Hogander, Jouni
2025-01-24 12:16 ` Hogander, Jouni
2025-01-24 12:32 ` Ville Syrjälä
2025-01-24 12:35 ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 10/13] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit Jouni Högander
2025-01-24 11:46 ` Ville Syrjälä
2025-01-24 11:51 ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 11/13] drm/i915/display: Evade scanline 0 as well if PSR1 or PSR2 is enabled Jouni Högander
2025-01-24 11:39 ` Ville Syrjälä
2025-01-24 11:57 ` Hogander, Jouni
2025-01-24 12:37 ` Ville Syrjälä
2025-01-24 12:41 ` Hogander, Jouni
2025-01-24 12:49 ` Ville Syrjälä
2025-01-27 14:53 ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 12/13] drm/i915/display: Ensure we have "Frame Change" event in DSB commit Jouni Högander
2025-01-24 11:43 ` Ville Syrjälä
2025-01-24 11:57 ` Ville Syrjälä [this message]
2025-01-24 12:10 ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 13/13] drm/i915/psr: Allow DSB usage when PSR is enabled Jouni Högander
2025-01-24 11:05 ` ✗ CI.Patch_applied: failure for PSR DSB support (rev4) Patchwork
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