Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"Manna,  Animesh" <animesh.manna@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Syrjala, Ville" <ville.syrjala@intel.com>
Subject: Re: [PATCH v4 09/13] drm/i915/display: Don't use DSB if psr mode changing
Date: Fri, 24 Jan 2025 12:16:56 +0000	[thread overview]
Message-ID: <fc528489a1e37dd9f853aa63bb93fd3fdfee0be2.camel@intel.com> (raw)
In-Reply-To: <f11a7d44d79533b0f1469277b2225b3bf1878825.camel@intel.com>

On Fri, 2025-01-24 at 14:09 +0200, Hogander, Jouni wrote:
> On Fri, 2025-01-24 at 13:53 +0200, Ville Syrjälä wrote:
> > On Fri, Jan 24, 2025 at 12:56:20PM +0200, Jouni Högander wrote:
> > > Changing PSR mode using DSB is not implemented. Do not use DSB
> > > when
> > > PSR
> > > mode is changing.
> > > 
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
> > >  1 file changed, 2 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 3ac1cc9ac08a8..a189aa437d972 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -7682,7 +7682,8 @@ static void intel_atomic_dsb_finish(struct
> > > intel_atomic_state *state,
> > >  		!new_crtc_state->scaler_state.scaler_users &&
> > >  		!old_crtc_state->scaler_state.scaler_users &&
> > >  		!intel_crtc_needs_modeset(new_crtc_state) &&
> > > -		!intel_crtc_needs_fastset(new_crtc_state);
> > > +		!intel_crtc_needs_fastset(new_crtc_state) &&
> > > +		!intel_psr_is_psr_mode_changing(old_crtc_state,
> > > new_crtc_state);
> > 
> > Hmm. Doesn't all that imply a fastset anyway
> 
> PSR/PR doesn't imply fastset.
> 
> At the time of enabling PSR/PR crtc_state->has_psr is true at this
> point, but PSR is not yet enabled. It gets enabled only in 
> pre_plane_update. Also in hsw_activate_psr2 and
> dg2_panel_replay_activate we are writing PSR2_MAN_TRK_CTL.

I said it wrong here: post_plane_update I mean of course.

BR,

Jouni Högander

> 
> BR,
> 
> Jouni Högander
> 
> > , and/or maybe all the
> > PSR stuff happens in the {pre,post}_plane_update() stuff? In which
> > case it shouldn't really matter for the stuff that the DSB does.
> > 
> > >  
> > >  	if (!new_crtc_state->use_dsb && !new_crtc_state-
> > > > dsb_color_vblank)
> > >  		return;
> > > -- 
> > > 2.43.0
> > 
> 


  reply	other threads:[~2025-01-24 12:17 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-24 10:56 [PATCH v4 00/13] PSR DSB support Jouni Högander
2025-01-24 10:56 ` [PATCH v4 01/13] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Jouni Högander
2025-01-24 10:56 ` [PATCH v4 02/13] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Jouni Högander
2025-01-24 10:56 ` [PATCH v4 03/13] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Jouni Högander
2025-01-24 10:56 ` [PATCH v4 04/13] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Jouni Högander
2025-01-24 10:56 ` [PATCH v4 05/13] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Jouni Högander
2025-01-24 10:56 ` [PATCH v4 06/13] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Jouni Högander
2025-01-24 10:56 ` [PATCH v4 07/13] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Jouni Högander
2025-01-24 10:56 ` [PATCH v4 08/13] drm/i915/psr: Add intel_psr_is_psr_mode_changing Jouni Högander
2025-01-24 10:56 ` [PATCH v4 09/13] drm/i915/display: Don't use DSB if psr mode changing Jouni Högander
2025-01-24 11:53   ` Ville Syrjälä
2025-01-24 12:09     ` Hogander, Jouni
2025-01-24 12:16       ` Hogander, Jouni [this message]
2025-01-24 12:32         ` Ville Syrjälä
2025-01-24 12:35           ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 10/13] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit Jouni Högander
2025-01-24 11:46   ` Ville Syrjälä
2025-01-24 11:51     ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 11/13] drm/i915/display: Evade scanline 0 as well if PSR1 or PSR2 is enabled Jouni Högander
2025-01-24 11:39   ` Ville Syrjälä
2025-01-24 11:57     ` Hogander, Jouni
2025-01-24 12:37       ` Ville Syrjälä
2025-01-24 12:41         ` Hogander, Jouni
2025-01-24 12:49           ` Ville Syrjälä
2025-01-27 14:53             ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 12/13] drm/i915/display: Ensure we have "Frame Change" event in DSB commit Jouni Högander
2025-01-24 11:43   ` Ville Syrjälä
2025-01-24 11:57     ` Ville Syrjälä
2025-01-24 12:10     ` Hogander, Jouni
2025-01-24 10:56 ` [PATCH v4 13/13] drm/i915/psr: Allow DSB usage when PSR is enabled Jouni Högander
2025-01-24 11:05 ` ✗ CI.Patch_applied: failure for PSR DSB support (rev4) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=fc528489a1e37dd9f853aa63bb93fd3fdfee0be2.camel@intel.com \
    --to=jouni.hogander@intel.com \
    --cc=animesh.manna@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=ville.syrjala@intel.com \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox