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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Hogander, Jouni" <jouni.hogander@intel.com>
Cc: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"Manna, Animesh" <animesh.manna@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Syrjala, Ville" <ville.syrjala@intel.com>
Subject: Re: [PATCH v6 07/12] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use
Date: Tue, 11 Feb 2025 22:10:08 +0200	[thread overview]
Message-ID: <Z6uuoANVyxsbLVYJ@intel.com> (raw)
In-Reply-To: <0808c3a03225ff734ea3fade879a1b5a39bf67e6.camel@intel.com>

On Tue, Feb 11, 2025 at 06:24:24AM +0000, Hogander, Jouni wrote:
> On Mon, 2025-02-10 at 18:26 +0200, Ville Syrjälä wrote:
> > On Mon, Jan 27, 2025 at 12:28:41PM +0200, Jouni Högander wrote:
> > > Do needed changes to handle PSR2_MAN_TRK_CTL correctly when DSB is
> > > in use:
> > > 
> > > 1. Write PSR2_MAN_TRK_CTL in commit_pipe_pre_planes only when not
> > > using
> > >    DSB.
> > > 2. Add PSR2_MAN_TRK_CTL writing into DSB commit in
> > >    intel_atomic_dsb_finish.
> > > 
> > > Taking PSR lock over DSB commit is not needed because
> > > PSR2_MAN_TRK_CTL is
> > > now written only by DSB.
> > > 
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display.c | 5 ++++-
> > >  1 file changed, 4 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index aed35f203fd8d..5db2af86d0c8a 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -7143,7 +7143,8 @@ static void commit_pipe_pre_planes(struct
> > > intel_atomic_state *state,
> > >  			intel_pipe_fastset(old_crtc_state,
> > > new_crtc_state);
> > >  	}
> > >  
> > > -	intel_psr2_program_trans_man_trk_ctl(NULL,
> > > new_crtc_state);
> > > +	if (!new_crtc_state->use_dsb)
> > > +		intel_psr2_program_trans_man_trk_ctl(NULL,
> > > new_crtc_state);
> > 
> > commit_pipe_pre_planes() is not called when use_dsb==true.
> 
> Couple of lines earlier in same function there is this:
> 
> 	if (!modeset && !new_crtc_state->use_dsb) {
> 
> I followed that in here. Do you still think I should remove checking
> use_dsb from my patch?

Hmm, I guess it was some leftover from some of my earlier attempts
at reusing more of the existing commit path. We could remove it from
there as well for the time being. I suppose we could stick a few
drm_WARN_ON(use_dsb)s into commit_pipe_{pre,post}_planes() and
intel_pipe_update_{start,end}() to make it clear they aren't used
by the full DSB path.

At some point we need to attempt to refactor this stuff into some
kind of more sensible form. But as long as we can't do all the
relevant programming on the DSB it's a bit hard to see what the
end result should look like.

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2025-02-11 20:10 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-27 10:28 [PATCH v6 00/12] PSR DSB support Jouni Högander
2025-01-27 10:28 ` [PATCH v6 01/12] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Jouni Högander
2025-01-27 10:28 ` [PATCH v6 02/12] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Jouni Högander
2025-01-27 10:28 ` [PATCH v6 03/12] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Jouni Högander
2025-01-27 10:28 ` [PATCH v6 04/12] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Jouni Högander
2025-01-27 10:28 ` [PATCH v6 05/12] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Jouni Högander
2025-01-27 10:28 ` [PATCH v6 06/12] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Jouni Högander
2025-01-27 10:28 ` [PATCH v6 07/12] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Jouni Högander
2025-02-10 16:26   ` Ville Syrjälä
2025-02-11  6:24     ` Hogander, Jouni
2025-02-11 20:10       ` Ville Syrjälä [this message]
2025-01-27 10:28 ` [PATCH v6 08/12] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit Jouni Högander
2025-02-10 16:28   ` Ville Syrjälä
2025-01-27 10:28 ` [PATCH v6 09/12] drm/i915/display: Evade scanline 0 as well if PSR1 or PSR2 is enabled Jouni Högander
2025-02-10 16:29   ` Ville Syrjälä
2025-01-27 10:28 ` [PATCH v6 10/12] drm/i915/psr: Add function for triggering "Frame Change" event Jouni Högander
2025-02-10 16:34   ` Ville Syrjälä
2025-01-27 10:28 ` [PATCH v6 11/12] drm/i915/display: Ensure we have "Frame Change" event in DSB commit Jouni Högander
2025-02-10 16:34   ` Ville Syrjälä
2025-01-27 10:28 ` [PATCH v6 12/12] drm/i915/psr: Allow DSB usage when PSR is enabled Jouni Högander
2025-01-27 11:24 ` ✓ CI.Patch_applied: success for PSR DSB support (rev6) Patchwork
2025-01-27 11:25 ` ✓ CI.checkpatch: " Patchwork
2025-01-27 11:26 ` ✓ CI.KUnit: " Patchwork
2025-01-27 11:42 ` ✓ CI.Build: " Patchwork
2025-01-27 11:44 ` ✓ CI.Hooks: " Patchwork
2025-01-27 11:46 ` ✗ CI.checksparse: warning " Patchwork
2025-01-27 12:05 ` ✓ Xe.CI.BAT: success " Patchwork
2025-01-27 13:29 ` ✗ Xe.CI.Full: failure " Patchwork

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