* [PATCH 00/14] drm/i915/display: conversions to struct intel_display
@ 2025-02-12 16:36 Jani Nikula
2025-02-12 16:36 ` [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel display Jani Nikula
` (22 more replies)
0 siblings, 23 replies; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Convert a bunch of files and functions to struct intel display.
The approach is to mostly convert a file, then see what the stragglers
are, convert those too, and repeat.
The PCH checks are starting to become a big straggler for further
conversions.
BR,
Jani.
Jani Nikula (14):
drm/i915/dp: convert g4x_dp.[ch] to struct intel display
drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display
drm/i915/ips: convert hsw_ips.c to struct intel_display
drm/i915/display: convert assert_transcoder*() to struct intel_display
drm/i915/display: convert assert_port_valid() to struct intel_display
drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default()
drm/i915/display: convert
intel_set_{cpu,pch}_fifo_underrun_reporting() to intel_display
drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display
drm/i915/display: convert intel_cpu_transcoder_mode_valid() to
intel_display
drm/i915/display: convert intel_mode_valid_max_plane_size() to
intel_display
drm/i915/dsi: convert platform checks to display->platform.<platform>
style
drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct
intel_display
drm/i915/display: convert intel_fifo_underrun.[ch] to struct
intel_display
drm/i915/display: convert i915_pipestat_enable_mask() to struct
intel_display
drivers/gpu/drm/i915/display/g4x_dp.c | 99 +++---
drivers/gpu/drm/i915/display/g4x_dp.h | 14 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 154 +++++----
drivers/gpu/drm/i915/display/g4x_hdmi.h | 6 +-
drivers/gpu/drm/i915/display/hsw_ips.c | 26 +-
drivers/gpu/drm/i915/display/icl_dsi.c | 21 +-
.../gpu/drm/i915/display/intel_combo_phy.c | 180 ++++++-----
.../gpu/drm/i915/display/intel_combo_phy.h | 8 +-
drivers/gpu/drm/i915/display/intel_crt.c | 21 +-
drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 11 +-
drivers/gpu/drm/i915/display/intel_display.c | 155 ++++-----
drivers/gpu/drm/i915/display/intel_display.h | 10 +-
.../gpu/drm/i915/display/intel_display_irq.c | 37 +--
.../gpu/drm/i915/display/intel_display_irq.h | 5 +-
.../drm/i915/display/intel_display_power.c | 5 +-
.../i915/display/intel_display_power_well.c | 3 +-
drivers/gpu/drm/i915/display/intel_dp.c | 5 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +-
drivers/gpu/drm/i915/display/intel_dpll.c | 30 +-
drivers/gpu/drm/i915/display/intel_dsi.c | 8 +-
drivers/gpu/drm/i915/display/intel_dvo.c | 8 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
.../drm/i915/display/intel_fifo_underrun.c | 181 ++++++-----
.../drm/i915/display/intel_fifo_underrun.h | 18 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +-
drivers/gpu/drm/i915/display/intel_hotplug.c | 4 +-
drivers/gpu/drm/i915/display/intel_hotplug.h | 3 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 6 +-
.../drm/i915/display/intel_modeset_setup.c | 6 +-
.../gpu/drm/i915/display/intel_pch_display.c | 4 +-
drivers/gpu/drm/i915/display/intel_pps.c | 11 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 293 +++++++++---------
drivers/gpu/drm/i915/display/intel_sdvo.h | 10 +-
drivers/gpu/drm/i915/display/intel_tv.c | 6 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 8 +-
36 files changed, 671 insertions(+), 700 deletions(-)
--
2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 8:48 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 02/14] drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display Jani Nikula
` (21 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of g4x_dp.[ch] to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 80 +++++++++----------
drivers/gpu/drm/i915/display/g4x_dp.h | 14 ++--
drivers/gpu/drm/i915/display/intel_display.c | 20 ++---
.../gpu/drm/i915/display/intel_pch_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 11 ++-
5 files changed, 61 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index d3b5ead188ba..cfc796607a78 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -51,28 +51,29 @@ static const struct dpll chv_dpll[] = {
{ .dot = 270000, .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 /* 27.0 */ },
};
-const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
+const struct dpll *vlv_get_dpll(struct intel_display *display)
{
- return IS_CHERRYVIEW(i915) ? &chv_dpll[0] : &vlv_dpll[0];
+ return display->platform.cherryview ? &chv_dpll[0] : &vlv_dpll[0];
}
static void g4x_dp_set_clock(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
const struct dpll *divisor = NULL;
int i, count = 0;
- if (IS_G4X(dev_priv)) {
+ if (display->platform.g4x) {
divisor = g4x_dpll;
count = ARRAY_SIZE(g4x_dpll);
} else if (HAS_PCH_SPLIT(dev_priv)) {
divisor = pch_dpll;
count = ARRAY_SIZE(pch_dpll);
- } else if (IS_CHERRYVIEW(dev_priv)) {
+ } else if (display->platform.cherryview) {
divisor = chv_dpll;
count = ARRAY_SIZE(chv_dpll);
- } else if (IS_VALLEYVIEW(dev_priv)) {
+ } else if (display->platform.valleyview) {
divisor = vlv_dpll;
count = ARRAY_SIZE(vlv_dpll);
}
@@ -129,7 +130,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
/* Split out the IBX/CPU vs CPT settings */
- if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) {
+ if (display->platform.ivybridge && port == PORT_A) {
if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
intel_dp->DP |= DP_SYNC_HS_HIGH;
if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
@@ -148,7 +149,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
pipe_config->enhanced_framing ?
TRANS_DP_ENH_FRAMING : 0);
} else {
- if (IS_G4X(dev_priv) && pipe_config->limited_color_range)
+ if (display->platform.g4x && pipe_config->limited_color_range)
intel_dp->DP |= DP_COLOR_RANGE_16_235;
if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
@@ -160,7 +161,7 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
if (pipe_config->enhanced_framing)
intel_dp->DP |= DP_ENHANCED_FRAMING;
- if (IS_CHERRYVIEW(dev_priv))
+ if (display->platform.cherryview)
intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe);
else
intel_dp->DP |= DP_PIPE_SEL(crtc->pipe);
@@ -180,9 +181,8 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool state)
}
#define assert_dp_port_disabled(d) assert_dp_port((d), false)
-static void assert_edp_pll(struct drm_i915_private *dev_priv, bool state)
+static void assert_edp_pll(struct intel_display *display, bool state)
{
- struct intel_display *display = &dev_priv->display;
bool cur_state = intel_de_read(display, DP_A) & DP_PLL_ENABLE;
INTEL_DISPLAY_STATE_WARN(display, cur_state != state,
@@ -201,7 +201,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
assert_dp_port_disabled(intel_dp);
- assert_edp_pll_disabled(dev_priv);
+ assert_edp_pll_disabled(display);
drm_dbg_kms(display->drm, "enabling eDP PLL for clock %d\n",
pipe_config->port_clock);
@@ -223,7 +223,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
* 1. Wait for the start of vertical blank on the enabled pipe going to FDI
* 2. Program DP PLL enable
*/
- if (IS_IRONLAKE(dev_priv))
+ if (display->platform.ironlake)
intel_wait_for_vblank_if_active(display, !crtc->pipe);
intel_dp->DP |= DP_PLL_ENABLE;
@@ -242,7 +242,7 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
assert_dp_port_disabled(intel_dp);
- assert_edp_pll_enabled(dev_priv);
+ assert_edp_pll_enabled(display);
drm_dbg_kms(display->drm, "disabling eDP PLL\n");
@@ -253,10 +253,9 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
udelay(200);
}
-static bool cpt_dp_port_selected(struct drm_i915_private *dev_priv,
+static bool cpt_dp_port_selected(struct intel_display *display,
enum port port, enum pipe *pipe)
{
- struct intel_display *display = &dev_priv->display;
enum pipe p;
for_each_pipe(display, p) {
@@ -277,11 +276,11 @@ static bool cpt_dp_port_selected(struct drm_i915_private *dev_priv,
return false;
}
-bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
+bool g4x_dp_port_enabled(struct intel_display *display,
i915_reg_t dp_reg, enum port port,
enum pipe *pipe)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
bool ret;
u32 val;
@@ -290,11 +289,11 @@ bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
ret = val & DP_PORT_EN;
/* asserts want to know the pipe even if the port is disabled */
- if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
+ if (display->platform.ivybridge && port == PORT_A)
*pipe = (val & DP_PIPE_SEL_MASK_IVB) >> DP_PIPE_SEL_SHIFT_IVB;
else if (HAS_PCH_CPT(dev_priv) && port != PORT_A)
- ret &= cpt_dp_port_selected(dev_priv, port, pipe);
- else if (IS_CHERRYVIEW(dev_priv))
+ ret &= cpt_dp_port_selected(display, port, pipe);
+ else if (display->platform.cherryview)
*pipe = (val & DP_PIPE_SEL_MASK_CHV) >> DP_PIPE_SEL_SHIFT_CHV;
else
*pipe = (val & DP_PIPE_SEL_MASK) >> DP_PIPE_SEL_SHIFT;
@@ -306,7 +305,6 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
intel_wakeref_t wakeref;
bool ret;
@@ -316,7 +314,7 @@ static bool intel_dp_get_hw_state(struct intel_encoder *encoder,
if (!wakeref)
return false;
- ret = g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
+ ret = g4x_dp_port_enabled(display, intel_dp->output_reg,
encoder->port, pipe);
intel_display_power_put(display, encoder->power_domain, wakeref);
@@ -391,7 +389,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
pipe_config->hw.adjusted_mode.flags |= flags;
- if (IS_G4X(dev_priv) && tmp & DP_COLOR_RANGE_16_235)
+ if (display->platform.g4x && tmp & DP_COLOR_RANGE_16_235)
pipe_config->limited_color_range = true;
pipe_config->lane_count =
@@ -433,7 +431,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
drm_dbg_kms(display->drm, "\n");
- if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
+ if ((display->platform.ivybridge && port == PORT_A) ||
(HAS_PCH_CPT(dev_priv) && port != PORT_A)) {
intel_dp->DP &= ~DP_LINK_TRAIN_MASK_CPT;
intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE_CPT;
@@ -479,7 +477,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
msleep(intel_dp->pps.panel_power_down_delay);
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ if (display->platform.valleyview || display->platform.cherryview)
vlv_pps_port_disable(encoder, old_crtc_state);
}
@@ -682,7 +680,6 @@ static void intel_enable_dp(struct intel_atomic_state *state,
const struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(state);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
u32 dp_reg = intel_de_read(display, intel_dp->output_reg);
intel_wakeref_t wakeref;
@@ -691,7 +688,7 @@ static void intel_enable_dp(struct intel_atomic_state *state,
return;
with_intel_pps_lock(intel_dp, wakeref) {
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ if (display->platform.valleyview || display->platform.cherryview)
vlv_pps_port_enable_unlocked(encoder, pipe_config);
intel_dp_enable_port(intel_dp, pipe_config);
@@ -701,10 +698,10 @@ static void intel_enable_dp(struct intel_atomic_state *state,
intel_pps_vdd_off_unlocked(intel_dp, true);
}
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.valleyview || display->platform.cherryview) {
unsigned int lane_mask = 0x0;
- if (IS_CHERRYVIEW(dev_priv))
+ if (display->platform.cherryview)
lane_mask = intel_dp_unused_lane_mask(pipe_config->lane_count);
vlv_wait_port_ready(display, dp_to_dig_port(intel_dp), lane_mask);
@@ -1264,7 +1261,6 @@ static void intel_dp_encoder_destroy(struct drm_encoder *encoder)
static void intel_dp_encoder_reset(struct drm_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder->dev);
- struct drm_i915_private *dev_priv = to_i915(encoder->dev);
struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(encoder));
intel_dp->DP = intel_de_read(display, intel_dp->output_reg);
@@ -1272,7 +1268,7 @@ static void intel_dp_encoder_reset(struct drm_encoder *encoder)
intel_dp->reset_link_params = true;
intel_dp_invalidate_source_oui(intel_dp);
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ if (display->platform.valleyview || display->platform.cherryview)
vlv_pps_pipe_reset(intel_dp);
intel_pps_encoder_reset(intel_dp);
@@ -1283,10 +1279,10 @@ static const struct drm_encoder_funcs intel_dp_enc_funcs = {
.destroy = intel_dp_encoder_destroy,
};
-bool g4x_dp_init(struct drm_i915_private *dev_priv,
+bool g4x_dp_init(struct intel_display *display,
i915_reg_t output_reg, enum port port)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
const struct intel_bios_encoder_data *devdata;
struct intel_digital_port *dig_port;
struct intel_encoder *intel_encoder;
@@ -1337,14 +1333,14 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
intel_encoder->suspend = intel_dp_encoder_suspend;
intel_encoder->suspend_complete = g4x_dp_suspend_complete;
intel_encoder->shutdown = intel_dp_encoder_shutdown;
- if (IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.cherryview) {
intel_encoder->pre_pll_enable = chv_dp_pre_pll_enable;
intel_encoder->pre_enable = chv_pre_enable_dp;
intel_encoder->enable = vlv_enable_dp;
intel_encoder->disable = vlv_disable_dp;
intel_encoder->post_disable = chv_post_disable_dp;
intel_encoder->post_pll_disable = chv_dp_post_pll_disable;
- } else if (IS_VALLEYVIEW(dev_priv)) {
+ } else if (display->platform.valleyview) {
intel_encoder->pre_pll_enable = vlv_dp_pre_pll_enable;
intel_encoder->pre_enable = vlv_pre_enable_dp;
intel_encoder->enable = vlv_enable_dp;
@@ -1359,24 +1355,24 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
intel_encoder->audio_enable = g4x_dp_audio_enable;
intel_encoder->audio_disable = g4x_dp_audio_disable;
- if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
+ if ((display->platform.ivybridge && port == PORT_A) ||
(HAS_PCH_CPT(dev_priv) && port != PORT_A))
dig_port->dp.set_link_train = cpt_set_link_train;
else
dig_port->dp.set_link_train = g4x_set_link_train;
- if (IS_CHERRYVIEW(dev_priv))
+ if (display->platform.cherryview)
intel_encoder->set_signal_levels = chv_set_signal_levels;
- else if (IS_VALLEYVIEW(dev_priv))
+ else if (display->platform.valleyview)
intel_encoder->set_signal_levels = vlv_set_signal_levels;
- else if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
+ else if (display->platform.ivybridge && port == PORT_A)
intel_encoder->set_signal_levels = ivb_cpu_edp_set_signal_levels;
- else if (IS_SANDYBRIDGE(dev_priv) && port == PORT_A)
+ else if (display->platform.sandybridge && port == PORT_A)
intel_encoder->set_signal_levels = snb_cpu_edp_set_signal_levels;
else
intel_encoder->set_signal_levels = g4x_set_signal_levels;
- if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv) ||
+ if (display->platform.valleyview || display->platform.cherryview ||
(HAS_PCH_SPLIT(dev_priv) && port != PORT_A)) {
dig_port->dp.preemph_max = intel_dp_preemph_max_3;
dig_port->dp.voltage_max = intel_dp_voltage_max_3;
@@ -1390,7 +1386,7 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
intel_encoder->type = INTEL_OUTPUT_DP;
intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(display, port);
- if (IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.cherryview) {
if (port == PORT_D)
intel_encoder->pipe_mask = BIT(PIPE_C);
else
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.h b/drivers/gpu/drm/i915/display/g4x_dp.h
index 839a251dc069..0b28951b8365 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.h
+++ b/drivers/gpu/drm/i915/display/g4x_dp.h
@@ -12,30 +12,30 @@
enum pipe;
enum port;
-struct drm_i915_private;
struct intel_crtc_state;
+struct intel_display;
struct intel_dp;
struct intel_encoder;
#ifdef I915
-const struct dpll *vlv_get_dpll(struct drm_i915_private *i915);
-bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
+const struct dpll *vlv_get_dpll(struct intel_display *display);
+bool g4x_dp_port_enabled(struct intel_display *display,
i915_reg_t dp_reg, enum port port,
enum pipe *pipe);
-bool g4x_dp_init(struct drm_i915_private *dev_priv,
+bool g4x_dp_init(struct intel_display *display,
i915_reg_t output_reg, enum port port);
#else
-static inline const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
+static inline const struct dpll *vlv_get_dpll(struct intel_display *display)
{
return NULL;
}
-static inline bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
+static inline bool g4x_dp_port_enabled(struct intel_display *display,
i915_reg_t dp_reg, int port,
enum pipe *pipe)
{
return false;
}
-static inline bool g4x_dp_init(struct drm_i915_private *dev_priv,
+static inline bool g4x_dp_init(struct intel_display *display,
i915_reg_t output_reg, int port)
{
return false;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 6c1e7441313e..e5ceedf56335 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8229,7 +8229,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
dpd_is_edp = intel_dp_is_port_edp(display, PORT_D);
if (ilk_has_edp_a(dev_priv))
- g4x_dp_init(dev_priv, DP_A, PORT_A);
+ g4x_dp_init(display, DP_A, PORT_A);
if (intel_de_read(dev_priv, PCH_HDMIB) & SDVO_DETECTED) {
/* PCH SDVOB multiplex with HDMIB */
@@ -8237,7 +8237,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (!found)
g4x_hdmi_init(dev_priv, PCH_HDMIB, PORT_B);
if (!found && (intel_de_read(dev_priv, PCH_DP_B) & DP_DETECTED))
- g4x_dp_init(dev_priv, PCH_DP_B, PORT_B);
+ g4x_dp_init(display, PCH_DP_B, PORT_B);
}
if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED)
@@ -8247,10 +8247,10 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
g4x_hdmi_init(dev_priv, PCH_HDMID, PORT_D);
if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED)
- g4x_dp_init(dev_priv, PCH_DP_C, PORT_C);
+ g4x_dp_init(display, PCH_DP_C, PORT_C);
if (intel_de_read(dev_priv, PCH_DP_D) & DP_DETECTED)
- g4x_dp_init(dev_priv, PCH_DP_D, PORT_D);
+ g4x_dp_init(display, PCH_DP_D, PORT_D);
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
bool has_edp, has_port;
@@ -8275,14 +8275,14 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
has_edp = intel_dp_is_port_edp(display, PORT_B);
has_port = intel_bios_is_port_present(display, PORT_B);
if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED || has_port)
- has_edp &= g4x_dp_init(dev_priv, VLV_DP_B, PORT_B);
+ has_edp &= g4x_dp_init(display, VLV_DP_B, PORT_B);
if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED || has_port) && !has_edp)
g4x_hdmi_init(dev_priv, VLV_HDMIB, PORT_B);
has_edp = intel_dp_is_port_edp(display, PORT_C);
has_port = intel_bios_is_port_present(display, PORT_C);
if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED || has_port)
- has_edp &= g4x_dp_init(dev_priv, VLV_DP_C, PORT_C);
+ has_edp &= g4x_dp_init(display, VLV_DP_C, PORT_C);
if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED || has_port) && !has_edp)
g4x_hdmi_init(dev_priv, VLV_HDMIC, PORT_C);
@@ -8293,7 +8293,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
*/
has_port = intel_bios_is_port_present(display, PORT_D);
if (intel_de_read(dev_priv, CHV_DP_D) & DP_DETECTED || has_port)
- g4x_dp_init(dev_priv, CHV_DP_D, PORT_D);
+ g4x_dp_init(display, CHV_DP_D, PORT_D);
if (intel_de_read(dev_priv, CHV_HDMID) & SDVO_DETECTED || has_port)
g4x_hdmi_init(dev_priv, CHV_HDMID, PORT_D);
}
@@ -8320,7 +8320,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
}
if (!found && IS_G4X(dev_priv))
- g4x_dp_init(dev_priv, DP_B, PORT_B);
+ g4x_dp_init(display, DP_B, PORT_B);
}
/* Before G4X SDVOC doesn't have its own detect register */
@@ -8338,11 +8338,11 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
g4x_hdmi_init(dev_priv, GEN4_HDMIC, PORT_C);
}
if (IS_G4X(dev_priv))
- g4x_dp_init(dev_priv, DP_C, PORT_C);
+ g4x_dp_init(display, DP_C, PORT_C);
}
if (IS_G4X(dev_priv) && (intel_de_read(dev_priv, DP_D) & DP_DETECTED))
- g4x_dp_init(dev_priv, DP_D, PORT_D);
+ g4x_dp_init(display, DP_D, PORT_D);
if (SUPPORTS_TV(dev_priv))
intel_tv_init(display);
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 75ff5592312f..98a6b57ac956 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -45,7 +45,7 @@ static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv,
enum pipe port_pipe;
bool state;
- state = g4x_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe);
+ state = g4x_dp_port_enabled(display, dp_reg, port, &port_pipe);
INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe,
"PCH DP %c enabled on transcoder %c, should be disabled\n",
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index ef6effaf82e0..617ce4993172 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -134,7 +134,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
release_cl_override = display->platform.cherryview &&
!chv_phy_powergate_ch(display, phy, ch, true);
- if (vlv_force_pll_on(dev_priv, pipe, vlv_get_dpll(dev_priv))) {
+ if (vlv_force_pll_on(dev_priv, pipe, vlv_get_dpll(display))) {
drm_err(display->drm,
"Failed to force on PLL for pipe %c!\n",
pipe_name(pipe));
@@ -1225,11 +1225,10 @@ static void vlv_steal_power_sequencer(struct intel_display *display,
static enum pipe vlv_active_pipe(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
enum pipe pipe;
- if (g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
+ if (g4x_dp_port_enabled(display, intel_dp->output_reg,
encoder->port, &pipe))
return pipe;
@@ -1859,13 +1858,13 @@ void assert_pps_unlocked(struct intel_display *display, enum pipe pipe)
intel_lvds_port_enabled(dev_priv, PCH_LVDS, &panel_pipe);
break;
case PANEL_PORT_SELECT_DPA:
- g4x_dp_port_enabled(dev_priv, DP_A, PORT_A, &panel_pipe);
+ g4x_dp_port_enabled(display, DP_A, PORT_A, &panel_pipe);
break;
case PANEL_PORT_SELECT_DPC:
- g4x_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C, &panel_pipe);
+ g4x_dp_port_enabled(display, PCH_DP_C, PORT_C, &panel_pipe);
break;
case PANEL_PORT_SELECT_DPD:
- g4x_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe);
+ g4x_dp_port_enabled(display, PCH_DP_D, PORT_D, &panel_pipe);
break;
default:
MISSING_CASE(port_sel);
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 02/14] drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
2025-02-12 16:36 ` [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel display Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 8:55 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 03/14] drm/i915/ips: convert hsw_ips.c " Jani Nikula
` (20 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of g4x_hdmi.[ch] to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/g4x_hdmi.c | 139 +++++++++----------
drivers/gpu/drm/i915/display/g4x_hdmi.h | 6 +-
drivers/gpu/drm/i915/display/intel_display.c | 16 +--
3 files changed, 79 insertions(+), 82 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 9e1ca7767392..6670cf101b9a 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -27,8 +27,8 @@
static void intel_hdmi_prepare(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(encoder);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
@@ -54,13 +54,13 @@ static void intel_hdmi_prepare(struct intel_encoder *encoder,
if (HAS_PCH_CPT(dev_priv))
hdmi_val |= SDVO_PIPE_SEL_CPT(crtc->pipe);
- else if (IS_CHERRYVIEW(dev_priv))
+ else if (display->platform.cherryview)
hdmi_val |= SDVO_PIPE_SEL_CHV(crtc->pipe);
else
hdmi_val |= SDVO_PIPE_SEL(crtc->pipe);
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, hdmi_val);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, hdmi_val);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
}
static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
@@ -132,6 +132,7 @@ static int g4x_hdmi_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
@@ -142,7 +143,7 @@ static int g4x_hdmi_compute_config(struct intel_encoder *encoder,
return -EINVAL;
}
- if (IS_G4X(i915))
+ if (display->platform.g4x)
crtc_state->has_hdmi_sink = g4x_compute_has_hdmi_sink(state, crtc);
else
crtc_state->has_hdmi_sink =
@@ -154,15 +155,15 @@ static int g4x_hdmi_compute_config(struct intel_encoder *encoder,
static void intel_hdmi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
+ struct intel_display *display = to_intel_display(encoder);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
u32 tmp, flags = 0;
int dotclock;
pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI);
- tmp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
+ tmp = intel_de_read(display, intel_hdmi->hdmi_reg);
if (tmp & SDVO_HSYNC_ACTIVE_HIGH)
flags |= DRM_MODE_FLAG_PHSYNC;
@@ -222,33 +223,32 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
static void g4x_hdmi_enable_port(struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config)
{
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
u32 temp;
- temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
+ temp = intel_de_read(display, intel_hdmi->hdmi_reg);
temp |= SDVO_ENABLE;
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
}
static void g4x_hdmi_audio_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
if (!crtc_state->has_audio)
return;
- drm_WARN_ON(&i915->drm, !crtc_state->has_hdmi_sink);
+ drm_WARN_ON(display->drm, !crtc_state->has_hdmi_sink);
/* Enable audio presence detect */
- intel_de_rmw(i915, hdmi->hdmi_reg, 0, HDMI_AUDIO_ENABLE);
+ intel_de_rmw(display, hdmi->hdmi_reg, 0, HDMI_AUDIO_ENABLE);
intel_audio_codec_enable(encoder, crtc_state, conn_state);
}
@@ -257,7 +257,7 @@ static void g4x_hdmi_audio_disable(struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
if (!old_crtc_state->has_audio)
@@ -266,7 +266,7 @@ static void g4x_hdmi_audio_disable(struct intel_encoder *encoder,
intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
/* Disable audio presence detect */
- intel_de_rmw(i915, hdmi->hdmi_reg, HDMI_AUDIO_ENABLE, 0);
+ intel_de_rmw(display, hdmi->hdmi_reg, HDMI_AUDIO_ENABLE, 0);
}
static void g4x_enable_hdmi(struct intel_atomic_state *state,
@@ -282,12 +282,11 @@ static void ibx_enable_hdmi(struct intel_atomic_state *state,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
u32 temp;
- temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
+ temp = intel_de_read(display, intel_hdmi->hdmi_reg);
temp |= SDVO_ENABLE;
@@ -295,10 +294,10 @@ static void ibx_enable_hdmi(struct intel_atomic_state *state,
* HW workaround, need to write this twice for issue
* that may result in first write getting masked.
*/
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
/*
* HW workaround, need to toggle enable bit off and on
@@ -309,18 +308,18 @@ static void ibx_enable_hdmi(struct intel_atomic_state *state,
*/
if (pipe_config->pipe_bpp > 24 &&
pipe_config->pixel_multiplier > 1) {
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg,
+ intel_de_write(display, intel_hdmi->hdmi_reg,
temp & ~SDVO_ENABLE);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
/*
* HW workaround, need to write this twice for issue
* that may result in first write getting masked.
*/
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
}
}
@@ -329,14 +328,13 @@ static void cpt_enable_hdmi(struct intel_atomic_state *state,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
enum pipe pipe = crtc->pipe;
u32 temp;
- temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
+ temp = intel_de_read(display, intel_hdmi->hdmi_reg);
temp |= SDVO_ENABLE;
@@ -351,24 +349,24 @@ static void cpt_enable_hdmi(struct intel_atomic_state *state,
*/
if (pipe_config->pipe_bpp > 24) {
- intel_de_rmw(dev_priv, TRANS_CHICKEN1(pipe),
+ intel_de_rmw(display, TRANS_CHICKEN1(pipe),
0, TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE);
temp &= ~SDVO_COLOR_FORMAT_MASK;
temp |= SDVO_COLOR_FORMAT_8bpc;
}
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
if (pipe_config->pipe_bpp > 24) {
temp &= ~SDVO_COLOR_FORMAT_MASK;
temp |= HDMI_COLOR_FORMAT_12bpc;
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
- intel_de_rmw(dev_priv, TRANS_CHICKEN1(pipe),
+ intel_de_rmw(display, TRANS_CHICKEN1(pipe),
TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE, 0);
}
}
@@ -386,19 +384,18 @@ static void intel_disable_hdmi(struct intel_atomic_state *state,
const struct drm_connector_state *old_conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
struct intel_digital_port *dig_port =
hdmi_to_dig_port(intel_hdmi);
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
u32 temp;
- temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
+ temp = intel_de_read(display, intel_hdmi->hdmi_reg);
temp &= ~SDVO_ENABLE;
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
/*
* HW workaround for IBX, we need to move the port
@@ -419,14 +416,14 @@ static void intel_disable_hdmi(struct intel_atomic_state *state,
* HW workaround, need to write this twice for issue
* that may result in first write getting masked.
*/
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
temp &= ~SDVO_ENABLE;
- intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
- intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
+ intel_de_write(display, intel_hdmi->hdmi_reg, temp);
+ intel_de_posting_read(display, intel_hdmi->hdmi_reg);
intel_wait_for_vblank_if_active(display, PIPE_A);
intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
@@ -544,8 +541,8 @@ static void chv_hdmi_post_disable(struct intel_atomic_state *state,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(encoder);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
vlv_dpio_get(dev_priv);
@@ -614,7 +611,7 @@ intel_hdmi_hotplug(struct intel_encoder *encoder,
int g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state)
{
- struct drm_i915_private *i915 = to_i915(state->dev);
+ struct intel_display *display = to_intel_display(connector->dev);
struct drm_connector_list_iter conn_iter;
struct drm_connector *conn;
int ret;
@@ -623,7 +620,7 @@ int g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
if (ret)
return ret;
- if (!IS_G4X(i915))
+ if (!display->platform.g4x)
return 0;
if (!intel_connector_needs_modeset(to_intel_atomic_state(state), connector))
@@ -637,7 +634,7 @@ int g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
*
* See also g4x_compute_has_hdmi_sink().
*/
- drm_connector_list_iter_begin(&i915->drm, &conn_iter);
+ drm_connector_list_iter_begin(display->drm, &conn_iter);
drm_for_each_connector_iter(conn, &conn_iter) {
struct drm_connector_state *conn_state;
struct drm_crtc_state *crtc_state;
@@ -646,7 +643,7 @@ int g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
if (!connector_is_hdmi(conn))
continue;
- drm_dbg_kms(&i915->drm, "Adding [CONNECTOR:%d:%s]\n",
+ drm_dbg_kms(display->drm, "Adding [CONNECTOR:%d:%s]\n",
conn->base.id, conn->name);
conn_state = drm_atomic_get_connector_state(state, conn);
@@ -671,24 +668,24 @@ int g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
return ret;
}
-static bool is_hdmi_port_valid(struct drm_i915_private *i915, enum port port)
+static bool is_hdmi_port_valid(struct intel_display *display, enum port port)
{
- if (IS_G4X(i915) || IS_VALLEYVIEW(i915))
+ if (display->platform.g4x || display->platform.valleyview)
return port == PORT_B || port == PORT_C;
else
return port == PORT_B || port == PORT_C || port == PORT_D;
}
-static bool assert_hdmi_port_valid(struct drm_i915_private *i915, enum port port)
+static bool assert_hdmi_port_valid(struct intel_display *display, enum port port)
{
- return !drm_WARN(&i915->drm, !is_hdmi_port_valid(i915, port),
+ return !drm_WARN(display->drm, !is_hdmi_port_valid(display, port),
"Platform does not support HDMI %c\n", port_name(port));
}
-bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
+bool g4x_hdmi_init(struct intel_display *display,
i915_reg_t hdmi_reg, enum port port)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
const struct intel_bios_encoder_data *devdata;
struct intel_digital_port *dig_port;
struct intel_encoder *intel_encoder;
@@ -697,14 +694,14 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
if (!assert_port_valid(dev_priv, port))
return false;
- if (!assert_hdmi_port_valid(dev_priv, port))
+ if (!assert_hdmi_port_valid(display, port))
return false;
devdata = intel_bios_encoder_data_lookup(display, port);
/* FIXME bail? */
if (!devdata)
- drm_dbg_kms(&dev_priv->drm, "No VBT child device for HDMI-%c\n",
+ drm_dbg_kms(display->drm, "No VBT child device for HDMI-%c\n",
port_name(port));
dig_port = kzalloc(sizeof(*dig_port), GFP_KERNEL);
@@ -723,7 +720,7 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
mutex_init(&dig_port->hdcp_mutex);
- if (drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
+ if (drm_encoder_init(display->drm, &intel_encoder->base,
&intel_hdmi_enc_funcs, DRM_MODE_ENCODER_TMDS,
"HDMI %c", port_name(port)))
goto err_encoder_init;
@@ -738,13 +735,13 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
}
intel_encoder->get_hw_state = intel_hdmi_get_hw_state;
intel_encoder->get_config = intel_hdmi_get_config;
- if (IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.cherryview) {
intel_encoder->pre_pll_enable = chv_hdmi_pre_pll_enable;
intel_encoder->pre_enable = chv_hdmi_pre_enable;
intel_encoder->enable = vlv_enable_hdmi;
intel_encoder->post_disable = chv_hdmi_post_disable;
intel_encoder->post_pll_disable = chv_hdmi_post_pll_disable;
- } else if (IS_VALLEYVIEW(dev_priv)) {
+ } else if (display->platform.valleyview) {
intel_encoder->pre_pll_enable = vlv_hdmi_pre_pll_enable;
intel_encoder->pre_enable = vlv_hdmi_pre_enable;
intel_encoder->enable = vlv_enable_hdmi;
@@ -765,7 +762,7 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
intel_encoder->type = INTEL_OUTPUT_HDMI;
intel_encoder->power_domain = intel_display_power_ddi_lanes_domain(display, port);
intel_encoder->port = port;
- if (IS_CHERRYVIEW(dev_priv)) {
+ if (display->platform.cherryview) {
if (port == PORT_D)
intel_encoder->pipe_mask = BIT(PIPE_C);
else
@@ -780,7 +777,7 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
* to work on real hardware. And since g4x can send infoframes to
* only one port anyway, nothing is lost by allowing it.
*/
- if (IS_G4X(dev_priv))
+ if (display->platform.g4x)
intel_encoder->cloneable |= BIT(INTEL_OUTPUT_HDMI);
dig_port->hdmi.hdmi_reg = hdmi_reg;
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.h b/drivers/gpu/drm/i915/display/g4x_hdmi.h
index a52e8986ec7a..039d2bdba06c 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.h
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.h
@@ -13,15 +13,15 @@
enum port;
struct drm_atomic_state;
struct drm_connector;
-struct drm_i915_private;
+struct intel_display;
#ifdef I915
-bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
+bool g4x_hdmi_init(struct intel_display *display,
i915_reg_t hdmi_reg, enum port port);
int g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
struct drm_atomic_state *state);
#else
-static inline bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
+static inline bool g4x_hdmi_init(struct intel_display *display,
i915_reg_t hdmi_reg, int port)
{
return false;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e5ceedf56335..b8c57a5d26a0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8235,16 +8235,16 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
/* PCH SDVOB multiplex with HDMIB */
found = intel_sdvo_init(dev_priv, PCH_SDVOB, PORT_B);
if (!found)
- g4x_hdmi_init(dev_priv, PCH_HDMIB, PORT_B);
+ g4x_hdmi_init(display, PCH_HDMIB, PORT_B);
if (!found && (intel_de_read(dev_priv, PCH_DP_B) & DP_DETECTED))
g4x_dp_init(display, PCH_DP_B, PORT_B);
}
if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED)
- g4x_hdmi_init(dev_priv, PCH_HDMIC, PORT_C);
+ g4x_hdmi_init(display, PCH_HDMIC, PORT_C);
if (!dpd_is_edp && intel_de_read(dev_priv, PCH_HDMID) & SDVO_DETECTED)
- g4x_hdmi_init(dev_priv, PCH_HDMID, PORT_D);
+ g4x_hdmi_init(display, PCH_HDMID, PORT_D);
if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED)
g4x_dp_init(display, PCH_DP_C, PORT_C);
@@ -8277,14 +8277,14 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED || has_port)
has_edp &= g4x_dp_init(display, VLV_DP_B, PORT_B);
if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED || has_port) && !has_edp)
- g4x_hdmi_init(dev_priv, VLV_HDMIB, PORT_B);
+ g4x_hdmi_init(display, VLV_HDMIB, PORT_B);
has_edp = intel_dp_is_port_edp(display, PORT_C);
has_port = intel_bios_is_port_present(display, PORT_C);
if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED || has_port)
has_edp &= g4x_dp_init(display, VLV_DP_C, PORT_C);
if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED || has_port) && !has_edp)
- g4x_hdmi_init(dev_priv, VLV_HDMIC, PORT_C);
+ g4x_hdmi_init(display, VLV_HDMIC, PORT_C);
if (IS_CHERRYVIEW(dev_priv)) {
/*
@@ -8295,7 +8295,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (intel_de_read(dev_priv, CHV_DP_D) & DP_DETECTED || has_port)
g4x_dp_init(display, CHV_DP_D, PORT_D);
if (intel_de_read(dev_priv, CHV_HDMID) & SDVO_DETECTED || has_port)
- g4x_hdmi_init(dev_priv, CHV_HDMID, PORT_D);
+ g4x_hdmi_init(display, CHV_HDMID, PORT_D);
}
vlv_dsi_init(dev_priv);
@@ -8316,7 +8316,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (!found && IS_G4X(dev_priv)) {
drm_dbg_kms(&dev_priv->drm,
"probing HDMI on SDVOB\n");
- g4x_hdmi_init(dev_priv, GEN4_HDMIB, PORT_B);
+ g4x_hdmi_init(display, GEN4_HDMIB, PORT_B);
}
if (!found && IS_G4X(dev_priv))
@@ -8335,7 +8335,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (IS_G4X(dev_priv)) {
drm_dbg_kms(&dev_priv->drm,
"probing HDMI on SDVOC\n");
- g4x_hdmi_init(dev_priv, GEN4_HDMIC, PORT_C);
+ g4x_hdmi_init(display, GEN4_HDMIC, PORT_C);
}
if (IS_G4X(dev_priv))
g4x_dp_init(display, DP_C, PORT_C);
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 03/14] drm/i915/ips: convert hsw_ips.c to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
2025-02-12 16:36 ` [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel display Jani Nikula
2025-02-12 16:36 ` [PATCH 02/14] drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 8:56 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 04/14] drm/i915/display: convert assert_transcoder*() " Jani Nikula
` (19 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of hsw_ips.c to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/hsw_ips.c | 26 ++++++++++++--------------
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
index d02c328bf902..674a0e5f0858 100644
--- a/drivers/gpu/drm/i915/display/hsw_ips.c
+++ b/drivers/gpu/drm/i915/display/hsw_ips.c
@@ -36,7 +36,7 @@ static void hsw_ips_enable(const struct intel_crtc_state *crtc_state)
if (display->ips.false_color)
val |= IPS_FALSE_COLOR;
- if (IS_BROADWELL(i915)) {
+ if (display->platform.broadwell) {
drm_WARN_ON(display->drm,
snb_pcode_write(&i915->uncore, DISPLAY_IPS_CONTROL,
val | IPS_PCODE_CONTROL));
@@ -71,7 +71,7 @@ bool hsw_ips_disable(const struct intel_crtc_state *crtc_state)
if (!crtc_state->ips_enabled)
return need_vblank_wait;
- if (IS_BROADWELL(i915)) {
+ if (display->platform.broadwell) {
drm_WARN_ON(display->drm,
snb_pcode_write(&i915->uncore, DISPLAY_IPS_CONTROL, 0));
/*
@@ -96,7 +96,7 @@ bool hsw_ips_disable(const struct intel_crtc_state *crtc_state)
static bool hsw_ips_need_disable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
const struct intel_crtc_state *new_crtc_state =
@@ -114,7 +114,7 @@ static bool hsw_ips_need_disable(struct intel_atomic_state *state,
*
* Disable IPS before we program the LUT.
*/
- if (IS_HASWELL(i915) &&
+ if (display->platform.haswell &&
intel_crtc_needs_color_update(new_crtc_state) &&
new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
return true;
@@ -137,7 +137,7 @@ bool hsw_ips_pre_update(struct intel_atomic_state *state,
static bool hsw_ips_need_enable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
const struct intel_crtc_state *new_crtc_state =
@@ -155,7 +155,7 @@ static bool hsw_ips_need_enable(struct intel_atomic_state *state,
*
* Re-enable IPS after the LUT has been programmed.
*/
- if (IS_HASWELL(i915) &&
+ if (display->platform.haswell &&
intel_crtc_needs_color_update(new_crtc_state) &&
new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
return true;
@@ -194,7 +194,6 @@ static bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
/* IPS only exists on ULT machines and is tied to pipe A. */
if (!hsw_crtc_supports_ips(crtc))
@@ -213,7 +212,7 @@ static bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state
*
* Should measure whether using a lower cdclk w/o IPS
*/
- if (IS_BROADWELL(i915) &&
+ if (display->platform.broadwell &&
crtc_state->pixel_rate > display->cdclk.max_cdclk_freq * 95 / 100)
return false;
@@ -222,9 +221,9 @@ static bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state
int hsw_ips_min_cdclk(const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(crtc_state);
- if (!IS_BROADWELL(i915))
+ if (!display->platform.broadwell)
return 0;
if (!hsw_crtc_state_ips_capable(crtc_state))
@@ -237,7 +236,7 @@ int hsw_ips_min_cdclk(const struct intel_crtc_state *crtc_state)
int hsw_ips_compute_config(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
@@ -259,7 +258,7 @@ int hsw_ips_compute_config(struct intel_atomic_state *state,
if (!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)))
return 0;
- if (IS_BROADWELL(i915)) {
+ if (display->platform.broadwell) {
const struct intel_cdclk_state *cdclk_state;
cdclk_state = intel_atomic_get_cdclk_state(state);
@@ -280,12 +279,11 @@ void hsw_ips_get_config(struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
if (!hsw_crtc_supports_ips(crtc))
return;
- if (IS_HASWELL(i915)) {
+ if (display->platform.haswell) {
crtc_state->ips_enabled = intel_de_read(display, IPS_CTL) & IPS_ENABLE;
} else {
/*
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 04/14] drm/i915/display: convert assert_transcoder*() to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (2 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 03/14] drm/i915/ips: convert hsw_ips.c " Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 8:58 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 05/14] drm/i915/display: convert assert_port_valid() " Jani Nikula
` (18 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the assert_transcoder*() helpers to struct
intel_display, allowing further conversions elsewhere.
Do a few small opportunistic conversions right away.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 7 ++--
drivers/gpu/drm/i915/display/intel_display.c | 34 +++++++++-----------
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_dpll.c | 30 +++++++++--------
drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
drivers/gpu/drm/i915/display/intel_tv.c | 3 +-
6 files changed, 38 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index cfc796607a78..f50ab9a3f3e9 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -197,9 +197,8 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
{
struct intel_display *display = to_intel_display(intel_dp);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
+ assert_transcoder_disabled(display, pipe_config->cpu_transcoder);
assert_dp_port_disabled(intel_dp);
assert_edp_pll_disabled(display);
@@ -237,10 +236,8 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
const struct intel_crtc_state *old_crtc_state)
{
struct intel_display *display = to_intel_display(intel_dp);
- struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
+ assert_transcoder_disabled(display, old_crtc_state->cpu_transcoder);
assert_dp_port_disabled(intel_dp);
assert_edp_pll_enabled(display);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b8c57a5d26a0..a95564b499ea 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -419,23 +419,22 @@ intel_wait_for_pipe_off(const struct intel_crtc_state *old_crtc_state)
}
}
-void assert_transcoder(struct drm_i915_private *dev_priv,
+void assert_transcoder(struct intel_display *display,
enum transcoder cpu_transcoder, bool state)
{
- struct intel_display *display = &dev_priv->display;
bool cur_state;
enum intel_display_power_domain power_domain;
intel_wakeref_t wakeref;
/* we keep both pipes enabled on 830 */
- if (IS_I830(dev_priv))
+ if (display->platform.i830)
state = true;
power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
wakeref = intel_display_power_get_if_enabled(display, power_domain);
if (wakeref) {
- u32 val = intel_de_read(dev_priv,
- TRANSCONF(dev_priv, cpu_transcoder));
+ u32 val = intel_de_read(display,
+ TRANSCONF(display, cpu_transcoder));
cur_state = !!(val & TRANSCONF_ENABLE);
intel_display_power_put(display, power_domain, wakeref);
@@ -1968,8 +1967,8 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
if (!crtc_state->gmch_pfit.control)
return;
@@ -1978,18 +1977,18 @@ static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
* The panel fitter should only be adjusted whilst the pipe is disabled,
* according to register description and PRM.
*/
- drm_WARN_ON(&dev_priv->drm,
- intel_de_read(dev_priv, PFIT_CONTROL(dev_priv)) & PFIT_ENABLE);
- assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
+ drm_WARN_ON(display->drm,
+ intel_de_read(display, PFIT_CONTROL(display)) & PFIT_ENABLE);
+ assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
- intel_de_write(dev_priv, PFIT_PGM_RATIOS(dev_priv),
+ intel_de_write(display, PFIT_PGM_RATIOS(display),
crtc_state->gmch_pfit.pgm_ratios);
- intel_de_write(dev_priv, PFIT_CONTROL(dev_priv),
+ intel_de_write(display, PFIT_CONTROL(display),
crtc_state->gmch_pfit.control);
/* Border color in case we don't scale up to the full screen. Black by
* default, change to something else for debugging. */
- intel_de_write(dev_priv, BCLRPAT(dev_priv, crtc->pipe), 0);
+ intel_de_write(display, BCLRPAT(display, crtc->pipe), 0);
}
/* Prefer intel_encoder_is_combo() */
@@ -2300,17 +2299,16 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state)
{
- struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(old_crtc_state);
if (!old_crtc_state->gmch_pfit.control)
return;
- assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder);
+ assert_transcoder_disabled(display, old_crtc_state->cpu_transcoder);
- drm_dbg_kms(&dev_priv->drm, "disabling pfit, current: 0x%08x\n",
- intel_de_read(dev_priv, PFIT_CONTROL(dev_priv)));
- intel_de_write(dev_priv, PFIT_CONTROL(dev_priv), 0);
+ drm_dbg_kms(display->drm, "disabling pfit, current: 0x%08x\n",
+ intel_de_read(display, PFIT_CONTROL(display)));
+ intel_de_write(display, PFIT_CONTROL(display), 0);
}
static void i9xx_crtc_disable(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index e594492bade7..503e2ea1d029 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -574,7 +574,7 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state,
void intel_hpd_poll_fini(struct drm_i915_private *i915);
/* modesetting asserts */
-void assert_transcoder(struct drm_i915_private *dev_priv,
+void assert_transcoder(struct intel_display *display,
enum transcoder cpu_transcoder, bool state);
#define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true)
#define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index cc19cd51ab4d..08a30e5aafce 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1843,7 +1843,7 @@ void i9xx_enable_pll(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
int i;
- assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
+ assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
/* PLL is protected by panel, make sure we can write it */
if (i9xx_has_pps(dev_priv))
@@ -2024,7 +2024,7 @@ void vlv_enable_pll(const struct intel_crtc_state *crtc_state)
const struct i9xx_dpll_hw_state *hw_state = &crtc_state->dpll_hw_state.i9xx;
enum pipe pipe = crtc->pipe;
- assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
+ assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
/* PLL is protected by panel, make sure we can write it */
assert_pps_unlocked(display, pipe);
@@ -2171,7 +2171,7 @@ void chv_enable_pll(const struct intel_crtc_state *crtc_state)
const struct i9xx_dpll_hw_state *hw_state = &crtc_state->dpll_hw_state.i9xx;
enum pipe pipe = crtc->pipe;
- assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
+ assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
/* PLL is protected by panel, make sure we can write it */
assert_pps_unlocked(display, pipe);
@@ -2253,36 +2253,38 @@ int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe,
void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
{
+ struct intel_display *display = &dev_priv->display;
u32 val;
/* Make sure the pipe isn't still relying on us */
- assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
+ assert_transcoder_disabled(display, (enum transcoder)pipe);
val = DPLL_INTEGRATED_REF_CLK_VLV |
DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
if (pipe != PIPE_A)
val |= DPLL_INTEGRATED_CRI_CLK_VLV;
- intel_de_write(dev_priv, DPLL(dev_priv, pipe), val);
- intel_de_posting_read(dev_priv, DPLL(dev_priv, pipe));
+ intel_de_write(display, DPLL(display, pipe), val);
+ intel_de_posting_read(display, DPLL(display, pipe));
}
void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
{
+ struct intel_display *display = &dev_priv->display;
enum dpio_channel ch = vlv_pipe_to_channel(pipe);
enum dpio_phy phy = vlv_pipe_to_phy(pipe);
u32 val;
/* Make sure the pipe isn't still relying on us */
- assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
+ assert_transcoder_disabled(display, (enum transcoder)pipe);
val = DPLL_SSC_REF_CLK_CHV |
DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
if (pipe != PIPE_A)
val |= DPLL_INTEGRATED_CRI_CLK_VLV;
- intel_de_write(dev_priv, DPLL(dev_priv, pipe), val);
- intel_de_posting_read(dev_priv, DPLL(dev_priv, pipe));
+ intel_de_write(display, DPLL(display, pipe), val);
+ intel_de_posting_read(display, DPLL(display, pipe));
vlv_dpio_get(dev_priv);
@@ -2296,19 +2298,19 @@ void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
void i9xx_disable_pll(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
/* Don't disable pipe or pipe PLLs if needed */
- if (IS_I830(dev_priv))
+ if (display->platform.i830)
return;
/* Make sure the pipe isn't still relying on us */
- assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
+ assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
- intel_de_write(dev_priv, DPLL(dev_priv, pipe), DPLL_VGA_MODE_DIS);
- intel_de_posting_read(dev_priv, DPLL(dev_priv, pipe));
+ intel_de_write(display, DPLL(display, pipe), DPLL_VGA_MODE_DIS);
+ intel_de_posting_read(display, DPLL(display, pipe));
}
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index 9ebe80bfaab6..024d0c7e0a88 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -511,6 +511,7 @@ void intel_fdi_normal_train(struct intel_crtc *crtc)
static void ilk_fdi_link_train(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
enum pipe pipe = crtc->pipe;
@@ -525,7 +526,7 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
intel_de_read(dev_priv, PIPE_DATA_M1(dev_priv, pipe)) & TU_SIZE_MASK);
/* FDI needs bits from pipe first */
- assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder);
+ assert_transcoder_enabled(display, crtc_state->cpu_transcoder);
/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
for train result */
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index 1c50732a099d..7838c92f8ded 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1436,7 +1436,6 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
const struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_tv *intel_tv = enc_to_tv(encoder);
const struct intel_tv_connector_state *tv_conn_state =
@@ -1543,7 +1542,7 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
intel_de_write(display, TV_CLR_LEVEL,
((video_levels->black << TV_BLACK_LEVEL_SHIFT) | (video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
- assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
+ assert_transcoder_disabled(display, pipe_config->cpu_transcoder);
/* Filter ctl must be set before TV_WIN_SIZE */
tv_filter_ctl = TV_AUTO_SCALE;
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 05/14] drm/i915/display: convert assert_port_valid() to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (3 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 04/14] drm/i915/display: convert assert_transcoder*() " Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 8:59 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 06/14] drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default() Jani Nikula
` (17 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the assert_port_valid() helper to struct intel_display,
allowing further conversions elsewhere.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 2 +-
drivers/gpu/drm/i915/display/intel_crt.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_dvo.c | 2 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 3 ++-
8 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index f50ab9a3f3e9..b6cb5c74a32e 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1286,7 +1286,7 @@ bool g4x_dp_init(struct intel_display *display,
struct drm_encoder *encoder;
struct intel_connector *intel_connector;
- if (!assert_port_valid(dev_priv, port))
+ if (!assert_port_valid(display, port))
return false;
devdata = intel_bios_encoder_data_lookup(display, port);
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 6670cf101b9a..5b2df1014c10 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -691,7 +691,7 @@ bool g4x_hdmi_init(struct intel_display *display,
struct intel_encoder *intel_encoder;
struct intel_connector *intel_connector;
- if (!assert_port_valid(dev_priv, port))
+ if (!assert_port_valid(display, port))
return false;
if (!assert_hdmi_port_valid(display, port))
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index aa46c14ce225..396846025922 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -1099,7 +1099,7 @@ void intel_crt_init(struct intel_display *display)
connector->base.polled = connector->polled;
if (HAS_DDI(display)) {
- assert_port_valid(dev_priv, PORT_E);
+ assert_port_valid(display, PORT_E);
crt->base.port = PORT_E;
crt->base.get_config = hsw_crt_get_config;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 2c05742d8fd1..ab382adaba56 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -5132,7 +5132,7 @@ void intel_ddi_init(struct intel_display *display,
return;
}
- if (!assert_port_valid(dev_priv, port))
+ if (!assert_port_valid(display, port))
return;
if (port_in_use(dev_priv, port)) {
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a95564b499ea..2a8f53f06463 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8188,9 +8188,9 @@ static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv)
return true;
}
-bool assert_port_valid(struct drm_i915_private *i915, enum port port)
+bool assert_port_valid(struct intel_display *display, enum port port)
{
- return !drm_WARN(&i915->drm, !(DISPLAY_RUNTIME_INFO(i915)->port_mask & BIT(port)),
+ return !drm_WARN(display->drm, !(DISPLAY_RUNTIME_INFO(display)->port_mask & BIT(port)),
"Platform does not support port %c\n", port_name(port));
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 503e2ea1d029..9439da737f5b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -579,7 +579,7 @@ void assert_transcoder(struct intel_display *display,
#define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true)
#define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false)
-bool assert_port_valid(struct drm_i915_private *i915, enum port port);
+bool assert_port_valid(struct intel_display *display, enum port port);
/*
* Use INTEL_DISPLAY_STATE_WARN(x) (rather than WARN() and WARN_ON()) for hw
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index c310698a1a86..29f8788fb26a 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -524,7 +524,7 @@ void intel_dvo_init(struct drm_i915_private *i915)
return;
}
- assert_port_valid(i915, intel_dvo->dev.port);
+ assert_port_valid(display, intel_dvo->dev.port);
encoder->type = INTEL_OUTPUT_DVO;
encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 6ebd099d8861..0c3aa2e7b78b 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -3386,11 +3386,12 @@ static bool assert_sdvo_port_valid(struct drm_i915_private *dev_priv,
bool intel_sdvo_init(struct drm_i915_private *dev_priv,
i915_reg_t sdvo_reg, enum port port)
{
+ struct intel_display *display = &dev_priv->display;
struct intel_encoder *intel_encoder;
struct intel_sdvo *intel_sdvo;
int i;
- if (!assert_port_valid(dev_priv, port))
+ if (!assert_port_valid(display, port))
return false;
if (!assert_sdvo_port_valid(dev_priv, port))
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 06/14] drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default()
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (4 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 05/14] drm/i915/display: convert assert_port_valid() " Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 9:01 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 07/14] drm/i915/display: convert intel_set_{cpu, pch}_fifo_underrun_reporting() to intel_display Jani Nikula
` (16 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
The function doesn't use the parameter for anything. Drop it.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_hotplug.c | 4 +---
drivers/gpu/drm/i915/display/intel_hotplug.h | 3 +--
5 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index b6cb5c74a32e..4b51a4e47f63 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -1393,7 +1393,7 @@ bool g4x_dp_init(struct intel_display *display,
}
intel_encoder->cloneable = 0;
intel_encoder->port = port;
- intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
+ intel_encoder->hpd_pin = intel_hpd_pin_default(port);
dig_port->hpd_pulse = intel_dp_hpd_pulse;
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 5b2df1014c10..1cd2e68e6ec5 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -771,7 +771,7 @@ bool g4x_hdmi_init(struct intel_display *display,
intel_encoder->pipe_mask = ~0;
}
intel_encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG);
- intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
+ intel_encoder->hpd_pin = intel_hpd_pin_default(port);
/*
* BSpec is unclear about HDMI+HDMI cloning on g4x, but it seems
* to work on real hardware. And since g4x can send infoframes to
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index ab382adaba56..ce7097937d70 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -5368,7 +5368,7 @@ void intel_ddi_init(struct intel_display *display,
else if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv))
encoder->hpd_pin = skl_hpd_pin(dev_priv, port);
else
- encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
+ encoder->hpd_pin = intel_hpd_pin_default(port);
ddi_buf_ctl = intel_de_read(dev_priv, DDI_BUF_CTL(port));
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index d2e0002c5dc3..9c935afc60aa 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -82,15 +82,13 @@
/**
* intel_hpd_pin_default - return default pin associated with certain port.
- * @dev_priv: private driver data pointer
* @port: the hpd port to get associated pin
*
* It is only valid and used by digital port encoder.
*
* Return pin that is associatade with @port.
*/
-enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
- enum port port)
+enum hpd_pin intel_hpd_pin_default(enum port port)
{
return HPD_PORT_A + port - PORT_A;
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.h b/drivers/gpu/drm/i915/display/intel_hotplug.h
index a17253ddec83..d2ca9d2f1d39 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.h
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.h
@@ -24,8 +24,7 @@ void intel_hpd_trigger_irq(struct intel_digital_port *dig_port);
void intel_hpd_init(struct drm_i915_private *dev_priv);
void intel_hpd_init_early(struct drm_i915_private *i915);
void intel_hpd_cancel_work(struct drm_i915_private *dev_priv);
-enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
- enum port port);
+enum hpd_pin intel_hpd_pin_default(enum port port);
bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
void intel_hpd_debugfs_register(struct drm_i915_private *i915);
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 07/14] drm/i915/display: convert intel_set_{cpu, pch}_fifo_underrun_reporting() to intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (5 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 06/14] drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default() Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 9:03 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 08/14] drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display Jani Nikula
` (15 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert intel_set_cpu_fifo_underrun_reporting() and
intel_set_pch_fifo_underrun_reporting() to struct intel_display, along
with some of the call chains from there.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 8 +-
drivers/gpu/drm/i915/display/g4x_hdmi.c | 8 +-
drivers/gpu/drm/i915/display/intel_crt.c | 17 ++--
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 43 +++++-----
.../drm/i915/display/intel_fifo_underrun.c | 84 +++++++++----------
.../drm/i915/display/intel_fifo_underrun.h | 7 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 8 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
9 files changed, 89 insertions(+), 91 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 4b51a4e47f63..0cb98cb043c6 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -453,8 +453,8 @@ intel_dp_link_down(struct intel_encoder *encoder,
* We get CPU/PCH FIFO underruns on the other pipe when
* doing the workaround. Sweep them under the rug.
*/
- intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
+ intel_set_cpu_fifo_underrun_reporting(display, PIPE_A, false);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, false);
/* always enable with pattern 1 (as per spec) */
intel_dp->DP &= ~(DP_PIPE_SEL_MASK | DP_LINK_TRAIN_MASK);
@@ -468,8 +468,8 @@ intel_dp_link_down(struct intel_encoder *encoder,
intel_de_posting_read(display, intel_dp->output_reg);
intel_wait_for_vblank_if_active(display, PIPE_A);
- intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
+ intel_set_cpu_fifo_underrun_reporting(display, PIPE_A, true);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, true);
}
msleep(intel_dp->pps.panel_power_down_delay);
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 1cd2e68e6ec5..089f1a4d7720 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -407,8 +407,8 @@ static void intel_disable_hdmi(struct intel_atomic_state *state,
* We get CPU/PCH FIFO underruns on the other pipe when
* doing the workaround. Sweep them under the rug.
*/
- intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
+ intel_set_cpu_fifo_underrun_reporting(display, PIPE_A, false);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, false);
temp &= ~SDVO_PIPE_SEL_MASK;
temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
@@ -426,8 +426,8 @@ static void intel_disable_hdmi(struct intel_atomic_state *state,
intel_de_posting_read(display, intel_hdmi->hdmi_reg);
intel_wait_for_vblank_if_active(display, PIPE_A);
- intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
+ intel_set_cpu_fifo_underrun_reporting(display, PIPE_A, true);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, true);
}
dig_port->set_infoframes(encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 396846025922..8eedae1d7684 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -250,11 +250,10 @@ static void hsw_disable_crt(struct intel_atomic_state *state,
const struct drm_connector_state *old_conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
drm_WARN_ON(display->drm, !old_crtc_state->has_pch_encoder);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, false);
}
static void hsw_post_disable_crt(struct intel_atomic_state *state,
@@ -264,7 +263,6 @@ static void hsw_post_disable_crt(struct intel_atomic_state *state,
{
struct intel_display *display = to_intel_display(encoder);
struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
intel_crtc_vblank_off(old_crtc_state);
@@ -284,7 +282,7 @@ static void hsw_post_disable_crt(struct intel_atomic_state *state,
drm_WARN_ON(display->drm, !old_crtc_state->has_pch_encoder);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, true);
}
static void hsw_pre_pll_enable_crt(struct intel_atomic_state *state,
@@ -293,11 +291,10 @@ static void hsw_pre_pll_enable_crt(struct intel_atomic_state *state,
const struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, false);
}
static void hsw_pre_enable_crt(struct intel_atomic_state *state,
@@ -306,13 +303,12 @@ static void hsw_pre_enable_crt(struct intel_atomic_state *state,
const struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
enum pipe pipe = crtc->pipe;
drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder);
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
hsw_fdi_link_train(encoder, crtc_state);
@@ -325,7 +321,6 @@ static void hsw_enable_crt(struct intel_atomic_state *state,
const struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
enum pipe pipe = crtc->pipe;
@@ -343,8 +338,8 @@ static void hsw_enable_crt(struct intel_atomic_state *state,
intel_crtc_wait_for_next_vblank(crtc);
intel_crtc_wait_for_next_vblank(crtc);
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, true);
}
static void intel_enable_crt(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index ce7097937d70..900e066b2478 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3013,13 +3013,14 @@ static void intel_ddi_pre_enable(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_display *display = to_intel_display(state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
drm_WARN_ON(&dev_priv->drm, crtc_state->has_pch_encoder);
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
intel_ddi_pre_enable_hdmi(state, encoder, crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 2a8f53f06463..9bcbd52f23cf 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -774,6 +774,7 @@ void intel_plane_fixup_bitmasks(struct intel_crtc_state *crtc_state)
void intel_plane_disable_noatomic(struct intel_crtc *crtc,
struct intel_plane *plane)
{
+ struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
@@ -817,7 +818,7 @@ void intel_plane_disable_noatomic(struct intel_crtc *crtc,
* So disable underrun reporting before all the planes get disabled.
*/
if (DISPLAY_VER(dev_priv) == 2 && !crtc_state->active_planes)
- intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, false);
+ intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, false);
intel_plane_disable_arm(NULL, plane, crtc_state);
intel_plane_initial_vblank_wait(crtc);
@@ -1305,6 +1306,7 @@ static void intel_crtc_async_flip_disable_wa(struct intel_atomic_state *state,
static void intel_pre_plane_update(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(state);
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
@@ -1406,7 +1408,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
* vs. the old plane configuration.
*/
if (DISPLAY_VER(dev_priv) == 2 && planes_disabling(old_crtc_state, new_crtc_state))
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
/*
* WA for platforms where async address update enable bit
@@ -1645,6 +1647,7 @@ static void ilk_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta
static void ilk_crtc_enable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1663,8 +1666,8 @@ static void ilk_crtc_enable(struct intel_atomic_state *state,
*
* Spurious PCH underruns also occur during PCH enabling.
*/
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
- intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
+ intel_set_pch_fifo_underrun_reporting(display, pipe, false);
ilk_configure_cpu_transcoder(new_crtc_state);
@@ -1712,8 +1715,8 @@ static void ilk_crtc_enable(struct intel_atomic_state *state,
intel_crtc_wait_for_next_vblank(crtc);
intel_crtc_wait_for_next_vblank(crtc);
}
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
- intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
+ intel_set_pch_fifo_underrun_reporting(display, pipe, true);
}
/* Display WA #1180: WaDisableScalarClockGating: glk */
@@ -1901,9 +1904,9 @@ void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state)
static void ilk_crtc_disable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
/*
@@ -1911,8 +1914,8 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
* pipe is already disabled, but FDI RX/TX is still enabled.
* Happens at least with VGA+HDMI cloning. Suppress them.
*/
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
- intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
+ intel_set_pch_fifo_underrun_reporting(display, pipe, false);
intel_encoders_disable(state, crtc);
@@ -1930,8 +1933,8 @@ static void ilk_crtc_disable(struct intel_atomic_state *state,
if (old_crtc_state->has_pch_encoder)
ilk_pch_post_disable(state, crtc);
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
- intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
+ intel_set_pch_fifo_underrun_reporting(display, pipe, true);
intel_disable_shared_dpll(old_crtc_state);
}
@@ -2211,6 +2214,7 @@ static void i9xx_configure_cpu_transcoder(const struct intel_crtc_state *crtc_st
static void valleyview_crtc_enable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -2233,7 +2237,7 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state,
crtc->active = true;
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
intel_encoders_pre_pll_enable(state, crtc);
@@ -2259,6 +2263,7 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state,
static void i9xx_crtc_enable(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct intel_display *display = to_intel_display(crtc);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -2274,7 +2279,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state *state,
crtc->active = true;
if (DISPLAY_VER(dev_priv) != 2)
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
intel_encoders_pre_enable(state, crtc);
@@ -2349,7 +2354,7 @@ static void i9xx_crtc_disable(struct intel_atomic_state *state,
intel_encoders_post_pll_disable(state, crtc);
if (DISPLAY_VER(dev_priv) != 2)
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
if (!dev_priv->display.funcs.wm->initial_watermarks)
intel_update_watermarks(dev_priv);
@@ -7069,16 +7074,16 @@ static int intel_atomic_prepare_commit(struct intel_atomic_state *state)
void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ struct intel_display *display = to_intel_display(crtc);
- if (DISPLAY_VER(dev_priv) != 2 || crtc_state->active_planes)
- intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true);
+ if (DISPLAY_VER(display) != 2 || crtc_state->active_planes)
+ intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, true);
if (crtc_state->has_pch_encoder) {
enum pipe pch_transcoder =
intel_crtc_pch_transcoder(crtc);
- intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder, true);
+ intel_set_pch_fifo_underrun_reporting(display, pch_transcoder, true);
}
}
@@ -7921,7 +7926,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
* vs. the new plane configuration.
*/
if (DISPLAY_VER(dev_priv) == 2 && planes_enabling(old_crtc_state, new_crtc_state))
- intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true);
+ intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe, true);
intel_optimize_watermarks(state, crtc);
}
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index 18fcdbe1248a..cf70dab4881b 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -55,10 +55,9 @@
* The code also supports underrun detection on the PCH transcoder.
*/
-static bool ivb_can_enable_err_int(struct drm_device *dev)
+static bool ivb_can_enable_err_int(struct intel_display *display)
{
- struct intel_display *display = to_intel_display(dev);
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
enum pipe pipe;
@@ -74,10 +73,9 @@ static bool ivb_can_enable_err_int(struct drm_device *dev)
return true;
}
-static bool cpt_can_enable_serr_int(struct drm_device *dev)
+static bool cpt_can_enable_serr_int(struct intel_display *display)
{
- struct intel_display *display = to_intel_display(dev);
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
enum pipe pipe;
struct intel_crtc *crtc;
@@ -113,11 +111,11 @@ static void i9xx_check_fifo_underruns(struct intel_crtc *crtc)
drm_err(&dev_priv->drm, "pipe %c underrun\n", pipe_name(crtc->pipe));
}
-static void i9xx_set_fifo_underrun_reporting(struct drm_device *dev,
+static void i9xx_set_fifo_underrun_reporting(struct intel_display *display,
enum pipe pipe,
bool enable, bool old)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
i915_reg_t reg = PIPESTAT(dev_priv, pipe);
lockdep_assert_held(&dev_priv->irq_lock);
@@ -135,10 +133,10 @@ static void i9xx_set_fifo_underrun_reporting(struct drm_device *dev,
}
}
-static void ilk_set_fifo_underrun_reporting(struct drm_device *dev,
+static void ilk_set_fifo_underrun_reporting(struct intel_display *display,
enum pipe pipe, bool enable)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 bit = (pipe == PIPE_A) ?
DE_PIPEA_FIFO_UNDERRUN : DE_PIPEB_FIFO_UNDERRUN;
@@ -167,16 +165,16 @@ static void ivb_check_fifo_underruns(struct intel_crtc *crtc)
drm_err(&dev_priv->drm, "fifo underrun on pipe %c\n", pipe_name(pipe));
}
-static void ivb_set_fifo_underrun_reporting(struct drm_device *dev,
+static void ivb_set_fifo_underrun_reporting(struct intel_display *display,
enum pipe pipe, bool enable,
bool old)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
if (enable) {
intel_de_write(dev_priv, GEN7_ERR_INT,
ERR_INT_FIFO_UNDERRUN(pipe));
- if (!ivb_can_enable_err_int(dev))
+ if (!ivb_can_enable_err_int(display))
return;
ilk_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
@@ -192,10 +190,10 @@ static void ivb_set_fifo_underrun_reporting(struct drm_device *dev,
}
}
-static void bdw_set_fifo_underrun_reporting(struct drm_device *dev,
+static void bdw_set_fifo_underrun_reporting(struct intel_display *display,
enum pipe pipe, bool enable)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
if (enable)
bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_FIFO_UNDERRUN);
@@ -203,11 +201,11 @@ static void bdw_set_fifo_underrun_reporting(struct drm_device *dev,
bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_FIFO_UNDERRUN);
}
-static void ibx_set_fifo_underrun_reporting(struct drm_device *dev,
+static void ibx_set_fifo_underrun_reporting(struct intel_display *display,
enum pipe pch_transcoder,
bool enable)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 bit = (pch_transcoder == PIPE_A) ?
SDE_TRANSA_FIFO_UNDER : SDE_TRANSB_FIFO_UNDER;
@@ -238,17 +236,17 @@ static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc)
pipe_name(pch_transcoder));
}
-static void cpt_set_fifo_underrun_reporting(struct drm_device *dev,
+static void cpt_set_fifo_underrun_reporting(struct intel_display *display,
enum pipe pch_transcoder,
bool enable, bool old)
{
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
if (enable) {
intel_de_write(dev_priv, SERR_INT,
SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder));
- if (!cpt_can_enable_serr_int(dev))
+ if (!cpt_can_enable_serr_int(display))
return;
ibx_enable_display_interrupt(dev_priv, SDE_ERROR_CPT);
@@ -264,11 +262,10 @@ static void cpt_set_fifo_underrun_reporting(struct drm_device *dev,
}
}
-static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
+static bool __intel_set_cpu_fifo_underrun_reporting(struct intel_display *display,
enum pipe pipe, bool enable)
{
- struct intel_display *display = to_intel_display(dev);
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
bool old;
@@ -277,21 +274,21 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
old = !crtc->cpu_fifo_underrun_disabled;
crtc->cpu_fifo_underrun_disabled = !enable;
- if (HAS_GMCH(dev_priv))
- i9xx_set_fifo_underrun_reporting(dev, pipe, enable, old);
- else if (IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv))
- ilk_set_fifo_underrun_reporting(dev, pipe, enable);
- else if (DISPLAY_VER(dev_priv) == 7)
- ivb_set_fifo_underrun_reporting(dev, pipe, enable, old);
- else if (DISPLAY_VER(dev_priv) >= 8)
- bdw_set_fifo_underrun_reporting(dev, pipe, enable);
+ if (HAS_GMCH(display))
+ i9xx_set_fifo_underrun_reporting(display, pipe, enable, old);
+ else if (display->platform.ironlake || display->platform.sandybridge)
+ ilk_set_fifo_underrun_reporting(display, pipe, enable);
+ else if (DISPLAY_VER(display) == 7)
+ ivb_set_fifo_underrun_reporting(display, pipe, enable, old);
+ else if (DISPLAY_VER(display) >= 8)
+ bdw_set_fifo_underrun_reporting(display, pipe, enable);
return old;
}
/**
* intel_set_cpu_fifo_underrun_reporting - set cpu fifo underrun reporting state
- * @dev_priv: i915 device instance
+ * @display: display device instance
* @pipe: (CPU) pipe to set state for
* @enable: whether underruns should be reported or not
*
@@ -305,15 +302,15 @@ static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
*
* Returns the previous state of underrun reporting.
*/
-bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
+bool intel_set_cpu_fifo_underrun_reporting(struct intel_display *display,
enum pipe pipe, bool enable)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
unsigned long flags;
bool ret;
spin_lock_irqsave(&dev_priv->irq_lock, flags);
- ret = __intel_set_cpu_fifo_underrun_reporting(&dev_priv->drm, pipe,
- enable);
+ ret = __intel_set_cpu_fifo_underrun_reporting(display, pipe, enable);
spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
return ret;
@@ -321,7 +318,7 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
/**
* intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state
- * @dev_priv: i915 device instance
+ * @display: display device instance
* @pch_transcoder: the PCH transcoder (same as pipe on IVB and older)
* @enable: whether underruns should be reported or not
*
@@ -333,13 +330,12 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
*
* Returns the previous state of underrun reporting.
*/
-bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
+bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
enum pipe pch_transcoder,
bool enable)
{
- struct intel_display *display = &dev_priv->display;
- struct intel_crtc *crtc =
- intel_crtc_for_pipe(display, pch_transcoder);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
+ struct intel_crtc *crtc = intel_crtc_for_pipe(display, pch_transcoder);
unsigned long flags;
bool old;
@@ -358,11 +354,11 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
crtc->pch_fifo_underrun_disabled = !enable;
if (HAS_PCH_IBX(dev_priv))
- ibx_set_fifo_underrun_reporting(&dev_priv->drm,
+ ibx_set_fifo_underrun_reporting(display,
pch_transcoder,
enable);
else
- cpt_set_fifo_underrun_reporting(&dev_priv->drm,
+ cpt_set_fifo_underrun_reporting(display,
pch_transcoder,
enable, old);
@@ -394,7 +390,7 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
crtc->cpu_fifo_underrun_disabled)
return;
- if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) {
+ if (intel_set_cpu_fifo_underrun_reporting(display, pipe, false)) {
trace_intel_cpu_fifo_underrun(display, pipe);
drm_err(&dev_priv->drm, "CPU pipe %c FIFO underrun\n", pipe_name(pipe));
@@ -417,7 +413,7 @@ void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
{
struct intel_display *display = &dev_priv->display;
- if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder,
+ if (intel_set_pch_fifo_underrun_reporting(display, pch_transcoder,
false)) {
trace_intel_pch_fifo_underrun(display, pch_transcoder);
drm_err(&dev_priv->drm, "PCH transcoder %c FIFO underrun\n",
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.h b/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
index b00d8abebcf9..8302080c2313 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
@@ -8,15 +8,16 @@
#include <linux/types.h>
+enum pipe;
struct drm_i915_private;
struct intel_crtc;
-enum pipe;
+struct intel_display;
void intel_init_fifo_underrun_reporting(struct drm_i915_private *i915,
struct intel_crtc *crtc, bool enable);
-bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
+bool intel_set_cpu_fifo_underrun_reporting(struct intel_display *display,
enum pipe pipe, bool enable);
-bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
+bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
enum pipe pch_transcoder,
bool enable);
void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 0c3aa2e7b78b..46203d796fcc 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1864,8 +1864,8 @@ static void intel_disable_sdvo(struct intel_atomic_state *state,
* We get CPU/PCH FIFO underruns on the other pipe when
* doing the workaround. Sweep them under the rug.
*/
- intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
+ intel_set_cpu_fifo_underrun_reporting(display, PIPE_A, false);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, false);
temp &= ~SDVO_PIPE_SEL_MASK;
temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
@@ -1875,8 +1875,8 @@ static void intel_disable_sdvo(struct intel_atomic_state *state,
intel_sdvo_write_sdvox(intel_sdvo, temp);
intel_wait_for_vblank_if_active(display, PIPE_A);
- intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
- intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
+ intel_set_cpu_fifo_underrun_reporting(display, PIPE_A, true);
+ intel_set_pch_fifo_underrun_reporting(display, PIPE_A, true);
}
}
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index f6be1cd5d270..d68876fe782c 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -739,7 +739,7 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,
intel_dsi_wait_panel_power_cycle(intel_dsi);
- intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
+ intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
/*
* The BIOS may leave the PLL in a wonky state where it doesn't
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 08/14] drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (6 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 07/14] drm/i915/display: convert intel_set_{cpu, pch}_fifo_underrun_reporting() to intel_display Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 9:13 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 09/14] drm/i915/display: convert intel_cpu_transcoder_mode_valid() to intel_display Jani Nikula
` (14 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_sdvo.[ch] to struct
intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/g4x_hdmi.c | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 6 +-
.../gpu/drm/i915/display/intel_pch_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 281 +++++++++---------
drivers/gpu/drm/i915/display/intel_sdvo.h | 10 +-
5 files changed, 150 insertions(+), 152 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c b/drivers/gpu/drm/i915/display/g4x_hdmi.c
index 089f1a4d7720..5c5eb3d621c8 100644
--- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
+++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
@@ -67,7 +67,6 @@ static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
enum pipe *pipe)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
intel_wakeref_t wakeref;
bool ret;
@@ -77,7 +76,7 @@ static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
if (!wakeref)
return false;
- ret = intel_sdvo_port_enabled(dev_priv, intel_hdmi->hdmi_reg, pipe);
+ ret = intel_sdvo_port_enabled(display, intel_hdmi->hdmi_reg, pipe);
intel_display_power_put(display, encoder->power_domain, wakeref);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9bcbd52f23cf..e1186f46088d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8236,7 +8236,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (intel_de_read(dev_priv, PCH_HDMIB) & SDVO_DETECTED) {
/* PCH SDVOB multiplex with HDMIB */
- found = intel_sdvo_init(dev_priv, PCH_SDVOB, PORT_B);
+ found = intel_sdvo_init(display, PCH_SDVOB, PORT_B);
if (!found)
g4x_hdmi_init(display, PCH_HDMIB, PORT_B);
if (!found && (intel_de_read(dev_priv, PCH_DP_B) & DP_DETECTED))
@@ -8315,7 +8315,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (intel_de_read(dev_priv, GEN3_SDVOB) & SDVO_DETECTED) {
drm_dbg_kms(&dev_priv->drm, "probing SDVOB\n");
- found = intel_sdvo_init(dev_priv, GEN3_SDVOB, PORT_B);
+ found = intel_sdvo_init(display, GEN3_SDVOB, PORT_B);
if (!found && IS_G4X(dev_priv)) {
drm_dbg_kms(&dev_priv->drm,
"probing HDMI on SDVOB\n");
@@ -8330,7 +8330,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
if (intel_de_read(dev_priv, GEN3_SDVOB) & SDVO_DETECTED) {
drm_dbg_kms(&dev_priv->drm, "probing SDVOC\n");
- found = intel_sdvo_init(dev_priv, GEN3_SDVOC, PORT_C);
+ found = intel_sdvo_init(display, GEN3_SDVOC, PORT_C);
}
if (!found && (intel_de_read(dev_priv, GEN3_SDVOC) & SDVO_DETECTED)) {
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 98a6b57ac956..1abe0a784570 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -65,7 +65,7 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv,
enum pipe port_pipe;
bool state;
- state = intel_sdvo_port_enabled(dev_priv, hdmi_reg, &port_pipe);
+ state = intel_sdvo_port_enabled(display, hdmi_reg, &port_pipe);
INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe,
"PCH HDMI %c enabled on transcoder %c, should be disabled\n",
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 46203d796fcc..1ae766212e8a 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -213,29 +213,29 @@ intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
*/
static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
{
- struct drm_device *dev = intel_sdvo->base.base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 bval = val, cval = val;
int i;
if (HAS_PCH_SPLIT(dev_priv)) {
- intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
- intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
+ intel_de_write(display, intel_sdvo->sdvo_reg, val);
+ intel_de_posting_read(display, intel_sdvo->sdvo_reg);
/*
* HW workaround, need to write this twice for issue
* that may result in first write getting masked.
*/
if (HAS_PCH_IBX(dev_priv)) {
- intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
- intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
+ intel_de_write(display, intel_sdvo->sdvo_reg, val);
+ intel_de_posting_read(display, intel_sdvo->sdvo_reg);
}
return;
}
if (intel_sdvo->base.port == PORT_B)
- cval = intel_de_read(dev_priv, GEN3_SDVOC);
+ cval = intel_de_read(display, GEN3_SDVOC);
else
- bval = intel_de_read(dev_priv, GEN3_SDVOB);
+ bval = intel_de_read(display, GEN3_SDVOB);
/*
* Write the registers twice for luck. Sometimes,
@@ -243,17 +243,17 @@ static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
* The BIOS does this too. Yay, magic
*/
for (i = 0; i < 2; i++) {
- intel_de_write(dev_priv, GEN3_SDVOB, bval);
- intel_de_posting_read(dev_priv, GEN3_SDVOB);
+ intel_de_write(display, GEN3_SDVOB, bval);
+ intel_de_posting_read(display, GEN3_SDVOB);
- intel_de_write(dev_priv, GEN3_SDVOC, cval);
- intel_de_posting_read(dev_priv, GEN3_SDVOC);
+ intel_de_write(display, GEN3_SDVOC, cval);
+ intel_de_posting_read(display, GEN3_SDVOC);
}
}
static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct i2c_msg msgs[] = {
{
.addr = intel_sdvo->target_addr,
@@ -273,7 +273,7 @@ static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
return true;
- drm_dbg_kms(&i915->drm, "i2c transfer returned %d\n", ret);
+ drm_dbg_kms(display->drm, "i2c transfer returned %d\n", ret);
return false;
}
@@ -415,7 +415,7 @@ static const char *sdvo_cmd_name(u8 cmd)
static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
const void *args, int args_len)
{
- struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
const char *cmd_name;
int i, pos = 0;
char buffer[64];
@@ -436,10 +436,10 @@ static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
else
BUF_PRINT("(%02X)", cmd);
- drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
+ drm_WARN_ON(display->drm, pos >= sizeof(buffer) - 1);
#undef BUF_PRINT
- drm_dbg_kms(&dev_priv->drm, "%s: W: %02X %s\n", SDVO_NAME(intel_sdvo),
+ drm_dbg_kms(display->drm, "%s: W: %02X %s\n", SDVO_NAME(intel_sdvo),
cmd, buffer);
}
@@ -465,7 +465,7 @@ static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
const void *args, int args_len,
bool unlocked)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
u8 *buf, status;
struct i2c_msg *msgs;
int i, ret = true;
@@ -515,13 +515,13 @@ static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
else
ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
if (ret < 0) {
- drm_dbg_kms(&i915->drm, "I2c transfer returned %d\n", ret);
+ drm_dbg_kms(display->drm, "I2c transfer returned %d\n", ret);
ret = false;
goto out;
}
if (ret != i+3) {
/* failure in I2C transfer */
- drm_dbg_kms(&i915->drm, "I2c transfer returned %d/%d\n", ret, i+3);
+ drm_dbg_kms(display->drm, "I2c transfer returned %d/%d\n", ret, i + 3);
ret = false;
}
@@ -540,7 +540,7 @@ static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
void *response, int response_len)
{
- struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
const char *cmd_status;
u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
u8 status;
@@ -605,15 +605,15 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
BUF_PRINT(" %02X", ((u8 *)response)[i]);
}
- drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
+ drm_WARN_ON(display->drm, pos >= sizeof(buffer) - 1);
#undef BUF_PRINT
- drm_dbg_kms(&dev_priv->drm, "%s: R: %s\n",
+ drm_dbg_kms(display->drm, "%s: R: %s\n",
SDVO_NAME(intel_sdvo), buffer);
return true;
log_fail:
- drm_dbg_kms(&dev_priv->drm, "%s: R: ... failed %s\n",
+ drm_dbg_kms(display->drm, "%s: R: ... failed %s\n",
SDVO_NAME(intel_sdvo), buffer);
return false;
}
@@ -1009,7 +1009,7 @@ static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
unsigned int if_index, u8 tx_rate,
const u8 *data, unsigned int length)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
u8 set_buf_index[2] = { if_index, 0 };
u8 hbuf_size, tmp[8];
int i;
@@ -1022,7 +1022,7 @@ static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
return false;
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
if_index, length, hbuf_size);
@@ -1049,7 +1049,7 @@ static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
unsigned int if_index,
u8 *data, unsigned int length)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
u8 set_buf_index[2] = { if_index, 0 };
u8 hbuf_size, tx_rate, av_split;
int i;
@@ -1079,7 +1079,7 @@ static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
return false;
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
if_index, length, hbuf_size);
@@ -1100,7 +1100,7 @@ static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
- struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
@@ -1126,7 +1126,7 @@ static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
HDMI_QUANTIZATION_RANGE_FULL);
ret = hdmi_avi_infoframe_check(frame);
- if (drm_WARN_ON(&dev_priv->drm, ret))
+ if (drm_WARN_ON(display->drm, ret))
return false;
return true;
@@ -1135,7 +1135,7 @@ static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
ssize_t len;
@@ -1144,12 +1144,12 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
return true;
- if (drm_WARN_ON(&dev_priv->drm,
+ if (drm_WARN_ON(display->drm,
frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
return false;
len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
- if (drm_WARN_ON(&dev_priv->drm, len < 0))
+ if (drm_WARN_ON(display->drm, len < 0))
return false;
return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
@@ -1160,7 +1160,7 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
ssize_t len;
@@ -1172,7 +1172,7 @@ static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
sdvo_data, sizeof(sdvo_data));
if (len < 0) {
- drm_dbg_kms(&i915->drm, "failed to read AVI infoframe\n");
+ drm_dbg_kms(display->drm, "failed to read AVI infoframe\n");
return;
} else if (len == 0) {
return;
@@ -1183,12 +1183,12 @@ static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
if (ret) {
- drm_dbg_kms(&i915->drm, "Failed to unpack AVI infoframe\n");
+ drm_dbg_kms(display->drm, "Failed to unpack AVI infoframe\n");
return;
}
if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
}
@@ -1196,7 +1196,7 @@ static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
static void intel_sdvo_get_eld(struct intel_sdvo *intel_sdvo,
struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
ssize_t len;
u8 val;
@@ -1212,7 +1212,7 @@ static void intel_sdvo_get_eld(struct intel_sdvo *intel_sdvo,
len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
crtc_state->eld, sizeof(crtc_state->eld));
if (len < 0)
- drm_dbg_kms(&i915->drm, "failed to read ELD\n");
+ drm_dbg_kms(display->drm, "failed to read ELD\n");
}
static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
@@ -1282,7 +1282,7 @@ intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
{
- struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
+ struct intel_display *display = to_intel_display(pipe_config);
unsigned int dotclock = pipe_config->hw.adjusted_mode.crtc_clock;
struct dpll *clock = &pipe_config->dpll;
@@ -1303,7 +1303,7 @@ static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
clock->m1 = 12;
clock->m2 = 8;
} else {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"SDVO TV clock out of range: %i\n", dotclock);
return -EINVAL;
}
@@ -1359,6 +1359,7 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
+ struct intel_display *display = to_intel_display(encoder);
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
struct intel_sdvo_connector *intel_sdvo_connector =
@@ -1366,13 +1367,13 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
struct drm_display_mode *mode = &pipe_config->hw.mode;
- if (HAS_PCH_SPLIT(to_i915(encoder->base.dev))) {
+ if (HAS_PCH_SPLIT(i915)) {
pipe_config->has_pch_encoder = true;
if (!intel_fdi_compute_pipe_bpp(pipe_config))
return -EINVAL;
}
- drm_dbg_kms(&i915->drm, "forcing bpc to 8 for SDVO\n");
+ drm_dbg_kms(display->drm, "forcing bpc to 8 for SDVO\n");
/* FIXME: Don't increase pipe_bpp */
pipe_config->pipe_bpp = 8*3;
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
@@ -1451,7 +1452,7 @@ static int intel_sdvo_compute_config(struct intel_encoder *encoder,
if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
pipe_config, conn_state)) {
- drm_dbg_kms(&i915->drm, "bad AVI infoframe\n");
+ drm_dbg_kms(display->drm, "bad AVI infoframe\n");
return -EINVAL;
}
@@ -1525,6 +1526,7 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
+ struct intel_display *display = to_intel_display(intel_encoder);
struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
@@ -1570,7 +1572,7 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
}
if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
- drm_info(&dev_priv->drm,
+ drm_info(display->drm,
"Setting output timings on %s failed\n",
SDVO_NAME(intel_sdvo));
@@ -1600,13 +1602,13 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
- drm_info(&dev_priv->drm,
+ drm_info(display->drm,
"Setting input timings on %s failed\n",
SDVO_NAME(intel_sdvo));
switch (crtc_state->pixel_multiplier) {
default:
- drm_WARN(&dev_priv->drm, 1,
+ drm_WARN(display->drm, 1,
"unknown pixel multiplier specified\n");
fallthrough;
case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
@@ -1617,14 +1619,14 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
return;
/* Set the SDVO control regs. */
- if (DISPLAY_VER(dev_priv) >= 4) {
+ if (DISPLAY_VER(display) >= 4) {
/* The real mode polarity is set by the SDVO commands, using
* struct intel_sdvo_dtd. */
sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
- if (DISPLAY_VER(dev_priv) < 5)
+ if (DISPLAY_VER(display) < 5)
sdvox |= SDVO_BORDER_ENABLE;
} else {
- sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
+ sdvox = intel_de_read(display, intel_sdvo->sdvo_reg);
if (intel_sdvo->base.port == PORT_B)
sdvox &= SDVOB_PRESERVE_MASK;
else
@@ -1637,10 +1639,10 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
else
sdvox |= SDVO_PIPE_SEL(crtc->pipe);
- if (DISPLAY_VER(dev_priv) >= 4) {
+ if (DISPLAY_VER(display) >= 4) {
/* done in crtc_mode_set as the dpll_md reg must be written early */
- } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
- IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
+ } else if (display->platform.i945g || display->platform.i945gm ||
+ display->platform.g33 || display->platform.pineview) {
/* done in crtc_mode_set as it lives inside the dpll register */
} else {
sdvox |= (crtc_state->pixel_multiplier - 1)
@@ -1648,7 +1650,7 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
}
if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
- DISPLAY_VER(dev_priv) < 5)
+ DISPLAY_VER(display) < 5)
sdvox |= SDVO_STALL_SELECT;
intel_sdvo_write_sdvox(intel_sdvo, sdvox);
}
@@ -1665,17 +1667,18 @@ static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
return active_outputs & intel_sdvo_connector->output_flag;
}
-bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
+bool intel_sdvo_port_enabled(struct intel_display *display,
i915_reg_t sdvo_reg, enum pipe *pipe)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 val;
- val = intel_de_read(dev_priv, sdvo_reg);
+ val = intel_de_read(display, sdvo_reg);
/* asserts want to know the pipe even if the port is disabled */
if (HAS_PCH_CPT(dev_priv))
*pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
- else if (IS_CHERRYVIEW(dev_priv))
+ else if (display->platform.cherryview)
*pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
else
*pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
@@ -1686,14 +1689,14 @@ bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
enum pipe *pipe)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
u16 active_outputs = 0;
bool ret;
intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
- ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
+ ret = intel_sdvo_port_enabled(display, intel_sdvo->sdvo_reg, pipe);
return ret || active_outputs;
}
@@ -1701,8 +1704,7 @@ static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
static void intel_sdvo_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
struct intel_sdvo_dtd dtd;
int encoder_pixel_multiplier = 0;
@@ -1713,7 +1715,7 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
- sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
+ sdvox = intel_de_read(display, intel_sdvo->sdvo_reg);
ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
if (!ret) {
@@ -1721,7 +1723,7 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
* Some sdvo encoders are not spec compliant and don't
* implement the mandatory get_timings function.
*/
- drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n");
+ drm_dbg_kms(display->drm, "failed to retrieve SDVO DTD\n");
pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
} else {
if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
@@ -1744,7 +1746,7 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
* encoder->get_config we so already have a valid pixel multiplier on all
* other platforms.
*/
- if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
+ if (display->platform.i915g || display->platform.i915gm) {
pipe_config->pixel_multiplier =
((sdvox & SDVO_PORT_MULTIPLY_MASK)
>> SDVO_PORT_MULTIPLY_SHIFT) + 1;
@@ -1773,7 +1775,7 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
}
}
- drm_WARN(dev,
+ drm_WARN(display->drm,
encoder_pixel_multiplier != pipe_config->pixel_multiplier,
"SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
pipe_config->pixel_multiplier, encoder_pixel_multiplier);
@@ -1849,7 +1851,7 @@ static void intel_disable_sdvo(struct intel_atomic_state *state,
intel_sdvo_set_encoder_power_state(intel_sdvo,
DRM_MODE_DPMS_OFF);
- temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
+ temp = intel_de_read(display, intel_sdvo->sdvo_reg);
temp &= ~SDVO_ENABLE;
intel_sdvo_write_sdvox(intel_sdvo, temp);
@@ -1900,8 +1902,7 @@ static void intel_enable_sdvo(struct intel_atomic_state *state,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
- struct drm_device *dev = encoder->base.dev;
- struct drm_i915_private *dev_priv = to_i915(dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
struct intel_sdvo_connector *intel_sdvo_connector =
to_intel_sdvo_connector(conn_state->connector);
@@ -1911,7 +1912,7 @@ static void intel_enable_sdvo(struct intel_atomic_state *state,
int i;
bool success;
- temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
+ temp = intel_de_read(display, intel_sdvo->sdvo_reg);
temp |= SDVO_ENABLE;
intel_sdvo_write_sdvox(intel_sdvo, temp);
@@ -1926,7 +1927,7 @@ static void intel_enable_sdvo(struct intel_atomic_state *state,
* a given it the status is a success, we succeeded.
*/
if (success && !input1) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"First %s output reported failure to sync\n",
SDVO_NAME(intel_sdvo));
}
@@ -1941,12 +1942,13 @@ static enum drm_mode_status
intel_sdvo_mode_valid(struct drm_connector *connector,
const struct drm_display_mode *mode)
{
+ struct intel_display *display = to_intel_display(connector->dev);
struct drm_i915_private *i915 = to_i915(connector->dev);
struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
struct intel_sdvo_connector *intel_sdvo_connector =
to_intel_sdvo_connector(connector);
bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, connector->state);
- int max_dotclk = i915->display.cdclk.max_dotclk_freq;
+ int max_dotclk = display->cdclk.max_dotclk_freq;
enum drm_mode_status status;
int clock = mode->clock;
@@ -1982,14 +1984,15 @@ intel_sdvo_mode_valid(struct drm_connector *connector,
static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
+
BUILD_BUG_ON(sizeof(*caps) != 8);
if (!intel_sdvo_get_value(intel_sdvo,
SDVO_CMD_GET_DEVICE_CAPS,
caps, sizeof(*caps)))
return false;
- drm_dbg_kms(&i915->drm, "SDVO capabilities:\n"
+ drm_dbg_kms(display->drm, "SDVO capabilities:\n"
" vendor_id: %d\n"
" device_id: %d\n"
" device_rev_id: %d\n"
@@ -2031,17 +2034,17 @@ static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
{
- struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
u16 hotplug;
- if (!I915_HAS_HOTPLUG(dev_priv))
+ if (!I915_HAS_HOTPLUG(display))
return 0;
/*
* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
* on the line.
*/
- if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
+ if (display->platform.i945g || display->platform.i945gm)
return 0;
if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
@@ -2138,13 +2141,12 @@ static enum drm_connector_status
intel_sdvo_detect(struct drm_connector *connector, bool force)
{
struct intel_display *display = to_intel_display(connector->dev);
- struct drm_i915_private *i915 = to_i915(connector->dev);
struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
enum drm_connector_status ret;
u16 response;
- drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
+ drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
connector->base.id, connector->name);
if (!intel_display_device_enabled(display))
@@ -2162,7 +2164,7 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
&response, 2))
return connector_status_unknown;
- drm_dbg_kms(&i915->drm, "SDVO response %d %d [%x]\n",
+ drm_dbg_kms(display->drm, "SDVO response %d %d [%x]\n",
response & 0xff, response >> 8,
intel_sdvo_connector->output_flag);
@@ -2301,7 +2303,6 @@ static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
{
struct intel_display *display = to_intel_display(connector->dev);
struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
struct intel_sdvo_connector *intel_sdvo_connector =
to_intel_sdvo_connector(connector);
const struct drm_connector_state *conn_state = connector->state;
@@ -2310,7 +2311,7 @@ static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
int num_modes = 0;
int i;
- drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
+ drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
connector->base.id, connector->name);
if (!intel_display_driver_check_access(display))
@@ -2352,9 +2353,9 @@ static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
{
- struct drm_i915_private *dev_priv = to_i915(connector->dev);
+ struct intel_display *display = to_intel_display(connector->dev);
- drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
+ drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
connector->base.id, connector->name);
return intel_panel_get_modes(to_intel_connector(connector));
@@ -2618,14 +2619,14 @@ static struct intel_sdvo_ddc *
intel_sdvo_select_ddc_bus(struct intel_sdvo *sdvo,
struct intel_sdvo_connector *connector)
{
- struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&sdvo->base);
const struct sdvo_device_mapping *mapping;
int ddc_bus;
if (sdvo->base.port == PORT_B)
- mapping = &dev_priv->display.vbt.sdvo_mappings[0];
+ mapping = &display->vbt.sdvo_mappings[0];
else
- mapping = &dev_priv->display.vbt.sdvo_mappings[1];
+ mapping = &display->vbt.sdvo_mappings[1];
if (mapping->initialized)
ddc_bus = (mapping->ddc_pin & 0xf0) >> 4;
@@ -2642,14 +2643,13 @@ static void
intel_sdvo_select_i2c_bus(struct intel_sdvo *sdvo)
{
struct intel_display *display = to_intel_display(&sdvo->base);
- struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
const struct sdvo_device_mapping *mapping;
u8 pin;
if (sdvo->base.port == PORT_B)
- mapping = &dev_priv->display.vbt.sdvo_mappings[0];
+ mapping = &display->vbt.sdvo_mappings[0];
else
- mapping = &dev_priv->display.vbt.sdvo_mappings[1];
+ mapping = &display->vbt.sdvo_mappings[1];
if (mapping->initialized &&
intel_gmbus_is_valid_pin(display, mapping->i2c_pin))
@@ -2657,7 +2657,7 @@ intel_sdvo_select_i2c_bus(struct intel_sdvo *sdvo)
else
pin = GMBUS_PIN_DPB;
- drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s] I2C pin %d, target addr 0x%x\n",
+ drm_dbg_kms(display->drm, "[ENCODER:%d:%s] I2C pin %d, target addr 0x%x\n",
sdvo->base.base.base.id, sdvo->base.base.name,
pin, sdvo->target_addr);
@@ -2687,15 +2687,15 @@ intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo)
static u8
intel_sdvo_get_target_addr(struct intel_sdvo *sdvo)
{
- struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&sdvo->base);
const struct sdvo_device_mapping *my_mapping, *other_mapping;
if (sdvo->base.port == PORT_B) {
- my_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
- other_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
+ my_mapping = &display->vbt.sdvo_mappings[0];
+ other_mapping = &display->vbt.sdvo_mappings[1];
} else {
- my_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
- other_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
+ my_mapping = &display->vbt.sdvo_mappings[1];
+ other_mapping = &display->vbt.sdvo_mappings[0];
}
/* If the BIOS described our SDVO device, take advantage of it. */
@@ -2731,7 +2731,7 @@ static int
intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
struct intel_sdvo *encoder)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.base.dev);
+ struct intel_display *display = to_intel_display(&encoder->base);
struct intel_sdvo_ddc *ddc = NULL;
int ret;
@@ -2756,7 +2756,7 @@ intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
intel_connector_attach_encoder(&connector->base, &encoder->base);
if (ddc)
- drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] using %s\n",
+ drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] using %s\n",
connector->base.base.base.id, connector->base.base.name,
ddc->ddc.name);
@@ -2799,14 +2799,14 @@ static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
static bool
intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, u16 type)
{
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct drm_encoder *encoder = &intel_sdvo->base.base;
struct drm_connector *connector;
struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
- struct drm_i915_private *i915 = to_i915(intel_encoder->base.dev);
struct intel_connector *intel_connector;
struct intel_sdvo_connector *intel_sdvo_connector;
- drm_dbg_kms(&i915->drm, "initialising DVI type 0x%x\n", type);
+ drm_dbg_kms(display->drm, "initialising DVI type 0x%x\n", type);
intel_sdvo_connector = intel_sdvo_connector_alloc();
if (!intel_sdvo_connector)
@@ -2852,13 +2852,13 @@ intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, u16 type)
static bool
intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, u16 type)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct drm_encoder *encoder = &intel_sdvo->base.base;
struct drm_connector *connector;
struct intel_connector *intel_connector;
struct intel_sdvo_connector *intel_sdvo_connector;
- drm_dbg_kms(&i915->drm, "initialising TV type 0x%x\n", type);
+ drm_dbg_kms(display->drm, "initialising TV type 0x%x\n", type);
intel_sdvo_connector = intel_sdvo_connector_alloc();
if (!intel_sdvo_connector)
@@ -2892,13 +2892,13 @@ intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, u16 type)
static bool
intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, u16 type)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct drm_encoder *encoder = &intel_sdvo->base.base;
struct drm_connector *connector;
struct intel_connector *intel_connector;
struct intel_sdvo_connector *intel_sdvo_connector;
- drm_dbg_kms(&i915->drm, "initialising analog type 0x%x\n", type);
+ drm_dbg_kms(display->drm, "initialising analog type 0x%x\n", type);
intel_sdvo_connector = intel_sdvo_connector_alloc();
if (!intel_sdvo_connector)
@@ -2926,12 +2926,11 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
{
struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct drm_encoder *encoder = &intel_sdvo->base.base;
- struct drm_i915_private *i915 = to_i915(encoder->dev);
struct drm_connector *connector;
struct intel_connector *intel_connector;
struct intel_sdvo_connector *intel_sdvo_connector;
- drm_dbg_kms(&i915->drm, "initialising LVDS type 0x%x\n", type);
+ drm_dbg_kms(display->drm, "initialising LVDS type 0x%x\n", type);
intel_sdvo_connector = intel_sdvo_connector_alloc();
if (!intel_sdvo_connector)
@@ -2961,12 +2960,12 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
intel_panel_add_vbt_sdvo_fixed_mode(intel_connector);
if (!intel_panel_preferred_fixed_mode(intel_connector)) {
- mutex_lock(&i915->drm.mode_config.mutex);
+ mutex_lock(&display->drm->mode_config.mutex);
intel_ddc_get_modes(connector, connector->ddc);
intel_panel_add_edid_fixed_modes(intel_connector, false);
- mutex_unlock(&i915->drm.mode_config.mutex);
+ mutex_unlock(&display->drm->mode_config.mutex);
}
intel_panel_init(intel_connector, NULL);
@@ -3015,7 +3014,7 @@ static bool intel_sdvo_output_init(struct intel_sdvo *sdvo, u16 type)
static bool
intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
static const u16 probe_order[] = {
SDVO_OUTPUT_TMDS0,
SDVO_OUTPUT_TMDS1,
@@ -3034,7 +3033,7 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
flags = intel_sdvo_filter_output_flags(intel_sdvo->caps.output_flags);
if (flags == 0) {
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"%s: Unknown SDVO output type (0x%04x)\n",
SDVO_NAME(intel_sdvo), intel_sdvo->caps.output_flags);
return false;
@@ -3057,11 +3056,11 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
{
- struct drm_device *dev = intel_sdvo->base.base.dev;
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct drm_connector *connector, *tmp;
list_for_each_entry_safe(connector, tmp,
- &dev->mode_config.connector_list, head) {
+ &display->drm->mode_config.connector_list, head) {
if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) {
drm_connector_unregister(connector);
intel_connector_destroy(connector);
@@ -3073,7 +3072,7 @@ static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
struct intel_sdvo_connector *intel_sdvo_connector,
int type)
{
- struct drm_device *dev = intel_sdvo->base.base.dev;
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct intel_sdvo_tv_format format;
u32 format_map, i;
@@ -3098,7 +3097,7 @@ static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
intel_sdvo_connector->tv_format =
- drm_property_create(dev, DRM_MODE_PROP_ENUM,
+ drm_property_create(display->drm, DRM_MODE_PROP_ENUM,
"mode", intel_sdvo_connector->format_supported_num);
if (!intel_sdvo_connector->tv_format)
return false;
@@ -3120,12 +3119,12 @@ static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
return false; \
intel_sdvo_connector->name = \
- drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
+ drm_property_create_range(display->drm, 0, #name, 0, data_value[0]); \
if (!intel_sdvo_connector->name) return false; \
state_assignment = response; \
drm_object_attach_property(&connector->base, \
intel_sdvo_connector->name, 0); \
- drm_dbg_kms(dev, #name ": max %d, default %d, current %d\n", \
+ drm_dbg_kms(display->drm, #name ": max %d, default %d, current %d\n", \
data_value[0], data_value[1], response); \
} \
} while (0)
@@ -3137,8 +3136,7 @@ intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
struct intel_sdvo_connector *intel_sdvo_connector,
struct intel_sdvo_enhancements_reply enhancements)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
- struct drm_device *dev = intel_sdvo->base.base.dev;
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct drm_connector *connector = &intel_sdvo_connector->base.base;
struct drm_connector_state *conn_state = connector->state;
struct intel_sdvo_connector_state *sdvo_state =
@@ -3161,7 +3159,7 @@ intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
intel_sdvo_connector->max_hscan = data_value[0];
intel_sdvo_connector->left =
- drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
+ drm_property_create_range(display->drm, 0, "left_margin", 0, data_value[0]);
if (!intel_sdvo_connector->left)
return false;
@@ -3169,13 +3167,13 @@ intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
intel_sdvo_connector->left, 0);
intel_sdvo_connector->right =
- drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
+ drm_property_create_range(display->drm, 0, "right_margin", 0, data_value[0]);
if (!intel_sdvo_connector->right)
return false;
drm_object_attach_property(&connector->base,
intel_sdvo_connector->right, 0);
- drm_dbg_kms(&i915->drm, "h_overscan: max %d, default %d, current %d\n",
+ drm_dbg_kms(display->drm, "h_overscan: max %d, default %d, current %d\n",
data_value[0], data_value[1], response);
}
@@ -3194,7 +3192,7 @@ intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
intel_sdvo_connector->max_vscan = data_value[0];
intel_sdvo_connector->top =
- drm_property_create_range(dev, 0,
+ drm_property_create_range(display->drm, 0,
"top_margin", 0, data_value[0]);
if (!intel_sdvo_connector->top)
return false;
@@ -3203,14 +3201,14 @@ intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
intel_sdvo_connector->top, 0);
intel_sdvo_connector->bottom =
- drm_property_create_range(dev, 0,
+ drm_property_create_range(display->drm, 0,
"bottom_margin", 0, data_value[0]);
if (!intel_sdvo_connector->bottom)
return false;
drm_object_attach_property(&connector->base,
intel_sdvo_connector->bottom, 0);
- drm_dbg_kms(&i915->drm, "v_overscan: max %d, default %d, current %d\n",
+ drm_dbg_kms(display->drm, "v_overscan: max %d, default %d, current %d\n",
data_value[0], data_value[1], response);
}
@@ -3233,13 +3231,13 @@ intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
sdvo_state->tv.dot_crawl = response & 0x1;
intel_sdvo_connector->dot_crawl =
- drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
+ drm_property_create_range(display->drm, 0, "dot_crawl", 0, 1);
if (!intel_sdvo_connector->dot_crawl)
return false;
drm_object_attach_property(&connector->base,
intel_sdvo_connector->dot_crawl, 0);
- drm_dbg_kms(&i915->drm, "dot crawl: current %d\n", response);
+ drm_dbg_kms(display->drm, "dot crawl: current %d\n", response);
}
return true;
@@ -3250,7 +3248,7 @@ intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
struct intel_sdvo_connector *intel_sdvo_connector,
struct intel_sdvo_enhancements_reply enhancements)
{
- struct drm_device *dev = intel_sdvo->base.base.dev;
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
struct drm_connector *connector = &intel_sdvo_connector->base.base;
u16 response, data_value[2];
@@ -3264,7 +3262,7 @@ intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
struct intel_sdvo_connector *intel_sdvo_connector)
{
- struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
+ struct intel_display *display = to_intel_display(&intel_sdvo->base);
union {
struct intel_sdvo_enhancements_reply reply;
u16 response;
@@ -3276,7 +3274,7 @@ static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
&enhancements, sizeof(enhancements)) ||
enhancements.response == 0) {
- drm_dbg_kms(&i915->drm, "No enhancement is supported\n");
+ drm_dbg_kms(display->drm, "No enhancement is supported\n");
return true;
}
@@ -3351,8 +3349,8 @@ static int
intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
struct intel_sdvo *sdvo, int ddc_bus)
{
- struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
- struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
+ struct intel_display *display = to_intel_display(&sdvo->base);
+ struct pci_dev *pdev = to_pci_dev(display->drm->dev);
ddc->sdvo = sdvo;
ddc->ddc_bus = ddc_bus;
@@ -3368,25 +3366,26 @@ intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
return i2c_add_adapter(&ddc->ddc);
}
-static bool is_sdvo_port_valid(struct drm_i915_private *dev_priv, enum port port)
+static bool is_sdvo_port_valid(struct intel_display *display, enum port port)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
+
if (HAS_PCH_SPLIT(dev_priv))
return port == PORT_B;
else
return port == PORT_B || port == PORT_C;
}
-static bool assert_sdvo_port_valid(struct drm_i915_private *dev_priv,
- enum port port)
+static bool assert_sdvo_port_valid(struct intel_display *display, enum port port)
{
- return !drm_WARN(&dev_priv->drm, !is_sdvo_port_valid(dev_priv, port),
+ return !drm_WARN(display->drm, !is_sdvo_port_valid(display, port),
"Platform does not support SDVO %c\n", port_name(port));
}
-bool intel_sdvo_init(struct drm_i915_private *dev_priv,
+bool intel_sdvo_init(struct intel_display *display,
i915_reg_t sdvo_reg, enum port port)
{
- struct intel_display *display = &dev_priv->display;
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_encoder *intel_encoder;
struct intel_sdvo *intel_sdvo;
int i;
@@ -3394,7 +3393,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
if (!assert_port_valid(display, port))
return false;
- if (!assert_sdvo_port_valid(dev_priv, port))
+ if (!assert_sdvo_port_valid(display, port))
return false;
intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
@@ -3407,7 +3406,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
intel_encoder->port = port;
- drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
+ drm_encoder_init(display->drm, &intel_encoder->base,
&intel_sdvo_enc_funcs, 0,
"SDVO %c", port_name(port));
@@ -3421,7 +3420,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
u8 byte;
if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"No SDVO device found on %s\n",
SDVO_NAME(intel_sdvo));
goto err;
@@ -3459,7 +3458,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
}
if (!intel_sdvo_output_setup(intel_sdvo)) {
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"SDVO output failed to setup on %s\n",
SDVO_NAME(intel_sdvo));
/* Output_setup can leave behind connectors! */
@@ -3496,7 +3495,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
&intel_sdvo->pixel_clock_max))
goto err_output;
- drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, "
+ drm_dbg_kms(display->drm, "%s device VID/DID: %02X:%02X.%02X, "
"clock range %dMHz - %dMHz, "
"num inputs: %d, "
"output 1: %c, output 2: %c\n",
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.h b/drivers/gpu/drm/i915/display/intel_sdvo.h
index d1815b4103d4..1a9e40fdd8a8 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.h
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.h
@@ -10,22 +10,22 @@
#include "i915_reg_defs.h"
-struct drm_i915_private;
enum pipe;
enum port;
+struct intel_display;
#ifdef I915
-bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
+bool intel_sdvo_port_enabled(struct intel_display *display,
i915_reg_t sdvo_reg, enum pipe *pipe);
-bool intel_sdvo_init(struct drm_i915_private *dev_priv,
+bool intel_sdvo_init(struct intel_display *display,
i915_reg_t reg, enum port port);
#else
-static inline bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
+static inline bool intel_sdvo_port_enabled(struct intel_display *display,
i915_reg_t sdvo_reg, enum pipe *pipe)
{
return false;
}
-static inline bool intel_sdvo_init(struct drm_i915_private *dev_priv,
+static inline bool intel_sdvo_init(struct intel_display *display,
i915_reg_t reg, enum port port)
{
return false;
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 09/14] drm/i915/display: convert intel_cpu_transcoder_mode_valid() to intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (7 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 08/14] drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 9:15 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 10/14] drm/i915/display: convert intel_mode_valid_max_plane_size() " Jani Nikula
` (13 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the intel_cpu_transcoder_mode_valid()() helper to
struct intel_display, allowing further conversions elsewhere.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 4 ++--
drivers/gpu/drm/i915/display/intel_crt.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
drivers/gpu/drm/i915/display/intel_dvo.c | 6 +++---
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 6 +++---
drivers/gpu/drm/i915/display/intel_sdvo.c | 3 +--
drivers/gpu/drm/i915/display/intel_tv.c | 3 +--
drivers/gpu/drm/i915/display/vlv_dsi.c | 6 +++---
12 files changed, 21 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 0f2a19690c18..1f0ff4000658 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1460,10 +1460,10 @@ static void gen11_dsi_post_disable(struct intel_atomic_state *state,
static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector *connector,
const struct drm_display_mode *mode)
{
- struct drm_i915_private *i915 = to_i915(connector->dev);
+ struct intel_display *display = to_intel_display(connector->dev);
enum drm_mode_status status;
- status = intel_cpu_transcoder_mode_valid(i915, mode);
+ status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
return status;
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 8eedae1d7684..321580b095e7 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -360,7 +360,7 @@ intel_crt_mode_valid(struct drm_connector *connector,
enum drm_mode_status status;
int max_clock;
- status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
+ status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
return status;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e1186f46088d..7a25c84bfbac 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8464,14 +8464,14 @@ enum drm_mode_status intel_mode_valid(struct drm_device *dev,
return MODE_OK;
}
-enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *dev_priv,
+enum drm_mode_status intel_cpu_transcoder_mode_valid(struct intel_display *display,
const struct drm_display_mode *mode)
{
/*
* Additional transcoder timing limits,
* excluding BXT/GLK DSI transcoders.
*/
- if (DISPLAY_VER(dev_priv) >= 5) {
+ if (DISPLAY_VER(display) >= 5) {
if (mode->hdisplay < 64 ||
mode->htotal - mode->hdisplay < 32)
return MODE_H_ILLEGAL;
@@ -8490,7 +8490,7 @@ enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *de
* Cantiga+ cannot handle modes with a hsync front porch of 0.
* WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
*/
- if ((DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) &&
+ if ((DISPLAY_VER(display) >= 5 || display->platform.g4x) &&
mode->hsync_start == mode->hdisplay)
return MODE_H_ILLEGAL;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 9439da737f5b..08e28ea179d2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -428,7 +428,7 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
const struct drm_display_mode *mode,
int num_joined_pipes);
enum drm_mode_status
-intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915,
+intel_cpu_transcoder_mode_valid(struct intel_display *display,
const struct drm_display_mode *mode);
enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9ed7d46143e9..61827b0fe95e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1407,7 +1407,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
bool dsc = false;
int num_joined_pipes;
- status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
+ status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
return status;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 459440dd6e87..38804254980b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1481,7 +1481,7 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
return 0;
}
- *status = intel_cpu_transcoder_mode_valid(i915, mode);
+ *status = intel_cpu_transcoder_mode_valid(display, mode);
if (*status != MODE_OK)
return 0;
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index 29f8788fb26a..c16fb34b737d 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -219,16 +219,16 @@ static enum drm_mode_status
intel_dvo_mode_valid(struct drm_connector *_connector,
const struct drm_display_mode *mode)
{
+ struct intel_display *display = to_intel_display(_connector->dev);
struct intel_connector *connector = to_intel_connector(_connector);
- struct drm_i915_private *i915 = to_i915(connector->base.dev);
struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
const struct drm_display_mode *fixed_mode =
intel_panel_fixed_mode(connector, mode);
- int max_dotclk = to_i915(connector->base.dev)->display.cdclk.max_dotclk_freq;
+ int max_dotclk = display->cdclk.max_dotclk_freq;
int target_clock = mode->clock;
enum drm_mode_status status;
- status = intel_cpu_transcoder_mode_valid(i915, mode);
+ status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
return status;
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 015110fc57a2..60572deeffb3 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2023,7 +2023,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
bool ycbcr_420_only;
enum intel_output_format sink_format;
- status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
+ status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
return status;
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 6b05db2c10ba..7ed8625193fe 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -394,14 +394,14 @@ static enum drm_mode_status
intel_lvds_mode_valid(struct drm_connector *_connector,
const struct drm_display_mode *mode)
{
+ struct intel_display *display = to_intel_display(_connector->dev);
struct intel_connector *connector = to_intel_connector(_connector);
- struct drm_i915_private *i915 = to_i915(connector->base.dev);
const struct drm_display_mode *fixed_mode =
intel_panel_fixed_mode(connector, mode);
- int max_pixclk = to_i915(connector->base.dev)->display.cdclk.max_dotclk_freq;
+ int max_pixclk = display->cdclk.max_dotclk_freq;
enum drm_mode_status status;
- status = intel_cpu_transcoder_mode_valid(i915, mode);
+ status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
return status;
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 1ae766212e8a..6e2d9929b4d7 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1943,7 +1943,6 @@ intel_sdvo_mode_valid(struct drm_connector *connector,
const struct drm_display_mode *mode)
{
struct intel_display *display = to_intel_display(connector->dev);
- struct drm_i915_private *i915 = to_i915(connector->dev);
struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
struct intel_sdvo_connector *intel_sdvo_connector =
to_intel_sdvo_connector(connector);
@@ -1952,7 +1951,7 @@ intel_sdvo_mode_valid(struct drm_connector *connector,
enum drm_mode_status status;
int clock = mode->clock;
- status = intel_cpu_transcoder_mode_valid(i915, mode);
+ status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
return status;
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index 7838c92f8ded..5dbe857ea85b 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -960,12 +960,11 @@ intel_tv_mode_valid(struct drm_connector *connector,
const struct drm_display_mode *mode)
{
struct intel_display *display = to_intel_display(connector->dev);
- struct drm_i915_private *i915 = to_i915(connector->dev);
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
int max_dotclk = display->cdclk.max_dotclk_freq;
enum drm_mode_status status;
- status = intel_cpu_transcoder_mode_valid(i915, mode);
+ status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
return status;
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index d68876fe782c..7414794889e9 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -1543,12 +1543,12 @@ static const struct drm_encoder_funcs intel_dsi_funcs = {
static enum drm_mode_status vlv_dsi_mode_valid(struct drm_connector *connector,
const struct drm_display_mode *mode)
{
- struct drm_i915_private *i915 = to_i915(connector->dev);
+ struct intel_display *display = to_intel_display(connector->dev);
- if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
+ if (display->platform.valleyview || display->platform.cherryview) {
enum drm_mode_status status;
- status = intel_cpu_transcoder_mode_valid(i915, mode);
+ status = intel_cpu_transcoder_mode_valid(display, mode);
if (status != MODE_OK)
return status;
}
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 10/14] drm/i915/display: convert intel_mode_valid_max_plane_size() to intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (8 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 09/14] drm/i915/display: convert intel_cpu_transcoder_mode_valid() to intel_display Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-13 9:16 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 11/14] drm/i915/dsi: convert platform checks to display->platform.<platform> style Jani Nikula
` (12 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert the intel_mode_valid_max_plane_size() helper to struct
intel_display, allowing further conversions elsewhere.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 3 +--
drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +--
drivers/gpu/drm/i915/display/intel_dsi.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +--
6 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7a25c84bfbac..0450fdf9d4de 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8498,7 +8498,7 @@ enum drm_mode_status intel_cpu_transcoder_mode_valid(struct intel_display *displ
}
enum drm_mode_status
-intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
+intel_mode_valid_max_plane_size(struct intel_display *display,
const struct drm_display_mode *mode,
int num_joined_pipes)
{
@@ -8508,7 +8508,7 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
* intel_mode_valid() should be
* sufficient on older platforms.
*/
- if (DISPLAY_VER(dev_priv) < 9)
+ if (DISPLAY_VER(display) < 9)
return MODE_OK;
/*
@@ -8516,10 +8516,10 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
* plane so let's not advertize modes that are
* too big for that.
*/
- if (DISPLAY_VER(dev_priv) >= 30) {
+ if (DISPLAY_VER(display) >= 30) {
plane_width_max = 6144 * num_joined_pipes;
plane_height_max = 4800;
- } else if (DISPLAY_VER(dev_priv) >= 11) {
+ } else if (DISPLAY_VER(display) >= 11) {
plane_width_max = 5120 * num_joined_pipes;
plane_height_max = 4320;
} else {
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 08e28ea179d2..f702425df305 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -424,7 +424,7 @@ void intel_link_compute_m_n(u16 bpp, int nlanes,
u32 intel_plane_fb_max_stride(struct drm_device *drm,
u32 pixel_format, u64 modifier);
enum drm_mode_status
-intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
+intel_mode_valid_max_plane_size(struct intel_display *display,
const struct drm_display_mode *mode,
int num_joined_pipes);
enum drm_mode_status
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 61827b0fe95e..29970baaf03e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1396,7 +1396,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
struct intel_display *display = to_intel_display(_connector->dev);
struct intel_connector *connector = to_intel_connector(_connector);
struct intel_dp *intel_dp = intel_attached_dp(connector);
- struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
const struct drm_display_mode *fixed_mode;
int target_clock = mode->clock;
int max_rate, mode_rate, max_lanes, max_link_clock;
@@ -1496,7 +1495,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
if (status != MODE_OK)
return status;
- return intel_mode_valid_max_plane_size(dev_priv, mode, num_joined_pipes);
+ return intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
}
bool intel_dp_source_supports_tps3(struct intel_display *display)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 38804254980b..73a0a0f9b3d0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1462,7 +1462,6 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
{
struct intel_connector *connector = to_intel_connector(_connector);
struct intel_display *display = to_intel_display(connector);
- struct drm_i915_private *i915 = to_i915(display->drm);
struct intel_dp *intel_dp = connector->mst_port;
struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
struct drm_dp_mst_port *port = connector->port;
@@ -1565,7 +1564,7 @@ mst_connector_mode_valid_ctx(struct drm_connector *_connector,
return 0;
}
- *status = intel_mode_valid_max_plane_size(i915, mode, num_joined_pipes);
+ *status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c b/drivers/gpu/drm/i915/display/intel_dsi.c
index c93a3cf75c52..403151175a87 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi.c
@@ -60,14 +60,14 @@ int intel_dsi_get_modes(struct drm_connector *connector)
enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
const struct drm_display_mode *mode)
{
- struct drm_i915_private *dev_priv = to_i915(connector->dev);
+ struct intel_display *display = to_intel_display(connector->dev);
struct intel_connector *intel_connector = to_intel_connector(connector);
const struct drm_display_mode *fixed_mode =
intel_panel_fixed_mode(intel_connector, mode);
- int max_dotclk = to_i915(connector->dev)->display.cdclk.max_dotclk_freq;
+ int max_dotclk = display->cdclk.max_dotclk_freq;
enum drm_mode_status status;
- drm_dbg_kms(&dev_priv->drm, "\n");
+ drm_dbg_kms(display->drm, "\n");
status = intel_panel_mode_valid(intel_connector, mode);
if (status != MODE_OK)
@@ -76,7 +76,7 @@ enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
if (fixed_mode->clock > max_dotclk)
return MODE_CLOCK_HIGH;
- return intel_mode_valid_max_plane_size(dev_priv, mode, 1);
+ return intel_mode_valid_max_plane_size(display, mode, 1);
}
struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 60572deeffb3..ed017d9de920 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2015,7 +2015,6 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
{
struct intel_display *display = to_intel_display(connector->dev);
struct intel_hdmi *hdmi = intel_attached_hdmi(to_intel_connector(connector));
- struct drm_i915_private *dev_priv = to_i915(display->drm);
enum drm_mode_status status;
int clock = mode->clock;
int max_dotclk = to_i915(connector->dev)->display.cdclk.max_dotclk_freq;
@@ -2068,7 +2067,7 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
return status;
}
- return intel_mode_valid_max_plane_size(dev_priv, mode, 1);
+ return intel_mode_valid_max_plane_size(display, mode, 1);
}
bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 11/14] drm/i915/dsi: convert platform checks to display->platform.<platform> style
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (9 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 10/14] drm/i915/display: convert intel_mode_valid_max_plane_size() " Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-12 16:36 ` [PATCH 12/14] drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct intel_display Jani Nikula
` (11 subsequent siblings)
22 siblings, 0 replies; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
These are stragglers from a time the display->platform mechanism didn't
exist. Finish the conversion.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 11 ++++-------
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 1f0ff4000658..e84a362b54c9 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -345,7 +345,6 @@ static void gen11_dsi_program_esc_clk_div(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum port port;
int afe_clk_khz;
@@ -354,7 +353,7 @@ static void gen11_dsi_program_esc_clk_div(struct intel_encoder *encoder,
afe_clk_khz = afe_clk(encoder, crtc_state);
- if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) {
+ if (display->platform.alderlake_s || display->platform.alderlake_p) {
theo_word_clk = DIV_ROUND_UP(afe_clk_khz, 8 * DSI_MAX_ESC_CLK);
act_word_clk = max(3, theo_word_clk + (theo_word_clk + 1) % 2);
esc_clk_div_m = act_word_clk * 8;
@@ -375,7 +374,7 @@ static void gen11_dsi_program_esc_clk_div(struct intel_encoder *encoder,
intel_de_posting_read(display, ICL_DPHY_ESC_CLK_DIV(port));
}
- if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) {
+ if (display->platform.alderlake_s || display->platform.alderlake_p) {
for_each_dsi_port(port, intel_dsi->ports) {
intel_de_write(display, ADL_MIPIO_DW(port, 8),
esc_clk_div_m_phy & TX_ESC_CLK_DIV_PHY);
@@ -426,7 +425,6 @@ static void gen11_dsi_power_up_lanes(struct intel_encoder *encoder)
static void gen11_dsi_config_phy_lanes_sequence(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum phy phy;
u32 tmp;
@@ -451,7 +449,7 @@ static void gen11_dsi_config_phy_lanes_sequence(struct intel_encoder *encoder)
intel_de_write(display, ICL_PORT_TX_DW2_GRP(phy), tmp);
/* For EHL, TGL, set latency optimization for PCS_DW1 lanes */
- if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv) ||
+ if (display->platform.jasperlake || display->platform.elkhartlake ||
(DISPLAY_VER(display) >= 12)) {
intel_de_rmw(display, ICL_PORT_PCS_DW1_AUX(phy),
LATENCY_OPTIM_MASK, LATENCY_OPTIM_VAL(0));
@@ -533,7 +531,6 @@ gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum port port;
enum phy phy;
@@ -563,7 +560,7 @@ gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder,
}
}
- if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) {
+ if (display->platform.jasperlake || display->platform.elkhartlake) {
for_each_dsi_phy(phy, intel_dsi->phys)
intel_de_rmw(display, ICL_DPHY_CHKN(phy),
0, ICL_DPHY_CHKN_AFE_OVER_PPI_STRAP);
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 12/14] drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (10 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 11/14] drm/i915/dsi: convert platform checks to display->platform.<platform> style Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-12 16:36 ` [PATCH 13/14] drm/i915/display: convert intel_fifo_underrun.[ch] " Jani Nikula
` (10 subsequent siblings)
22 siblings, 0 replies; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_combo_phy.[ch] to struct
intel_display, along with intel_phy_is_combo() in intel_display.c.
Drive-by convert some drm_dbg() to drm_dbg_kms() while at it.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 6 +-
.../gpu/drm/i915/display/intel_combo_phy.c | 180 +++++++++---------
.../gpu/drm/i915/display/intel_combo_phy.h | 8 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 4 +-
drivers/gpu/drm/i915/display/intel_display.c | 14 +-
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
.../drm/i915/display/intel_display_power.c | 5 +-
.../i915/display/intel_display_power_well.c | 3 +-
8 files changed, 109 insertions(+), 113 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index e84a362b54c9..9600c2a346d4 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -31,8 +31,8 @@
#include <drm/drm_mipi_dsi.h>
#include <drm/drm_probe_helper.h>
-#include "i915_drv.h"
#include "i915_reg.h"
+#include "i915_utils.h"
#include "icl_dsi.h"
#include "icl_dsi_regs.h"
#include "intel_atomic.h"
@@ -413,12 +413,12 @@ static void gen11_dsi_enable_io_power(struct intel_encoder *encoder)
static void gen11_dsi_power_up_lanes(struct intel_encoder *encoder)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
enum phy phy;
for_each_dsi_phy(phy, intel_dsi->phys)
- intel_combo_phy_power_up_lanes(dev_priv, phy, true,
+ intel_combo_phy_power_up_lanes(display, phy, true,
intel_dsi->lane_count, false);
}
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c
index 4fbe2e3542ca..17eea244cc83 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
@@ -3,20 +3,20 @@
* Copyright © 2018 Intel Corporation
*/
-#include "i915_drv.h"
#include "i915_reg.h"
+#include "i915_utils.h"
#include "intel_combo_phy.h"
#include "intel_combo_phy_regs.h"
#include "intel_de.h"
#include "intel_display_types.h"
-#define for_each_combo_phy(__dev_priv, __phy) \
+#define for_each_combo_phy(__display, __phy) \
for ((__phy) = PHY_A; (__phy) < I915_MAX_PHYS; (__phy)++) \
- for_each_if(intel_phy_is_combo(__dev_priv, __phy))
+ for_each_if(intel_phy_is_combo(__display, __phy))
-#define for_each_combo_phy_reverse(__dev_priv, __phy) \
+#define for_each_combo_phy_reverse(__display, __phy) \
for ((__phy) = I915_MAX_PHYS; (__phy)-- > PHY_A;) \
- for_each_if(intel_phy_is_combo(__dev_priv, __phy))
+ for_each_if(intel_phy_is_combo(__display, __phy))
enum {
PROCMON_0_85V_DOT_0,
@@ -53,11 +53,11 @@ static const struct icl_procmon {
};
static const struct icl_procmon *
-icl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy)
+icl_get_procmon_ref_values(struct intel_display *display, enum phy phy)
{
u32 val;
- val = intel_de_read(dev_priv, ICL_PORT_COMP_DW3(phy));
+ val = intel_de_read(display, ICL_PORT_COMP_DW3(phy));
switch (val & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) {
default:
MISSING_CASE(val);
@@ -75,57 +75,57 @@ icl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy)
}
}
-static void icl_set_procmon_ref_values(struct drm_i915_private *dev_priv,
+static void icl_set_procmon_ref_values(struct intel_display *display,
enum phy phy)
{
const struct icl_procmon *procmon;
- procmon = icl_get_procmon_ref_values(dev_priv, phy);
+ procmon = icl_get_procmon_ref_values(display, phy);
- intel_de_rmw(dev_priv, ICL_PORT_COMP_DW1(phy),
+ intel_de_rmw(display, ICL_PORT_COMP_DW1(phy),
(0xff << 16) | 0xff, procmon->dw1);
- intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9);
- intel_de_write(dev_priv, ICL_PORT_COMP_DW10(phy), procmon->dw10);
+ intel_de_write(display, ICL_PORT_COMP_DW9(phy), procmon->dw9);
+ intel_de_write(display, ICL_PORT_COMP_DW10(phy), procmon->dw10);
}
-static bool check_phy_reg(struct drm_i915_private *dev_priv,
+static bool check_phy_reg(struct intel_display *display,
enum phy phy, i915_reg_t reg, u32 mask,
u32 expected_val)
{
- u32 val = intel_de_read(dev_priv, reg);
+ u32 val = intel_de_read(display, reg);
if ((val & mask) != expected_val) {
- drm_dbg(&dev_priv->drm,
- "Combo PHY %c reg %08x state mismatch: "
- "current %08x mask %08x expected %08x\n",
- phy_name(phy),
- reg.reg, val, mask, expected_val);
+ drm_dbg_kms(display->drm,
+ "Combo PHY %c reg %08x state mismatch: "
+ "current %08x mask %08x expected %08x\n",
+ phy_name(phy),
+ reg.reg, val, mask, expected_val);
return false;
}
return true;
}
-static bool icl_verify_procmon_ref_values(struct drm_i915_private *dev_priv,
+static bool icl_verify_procmon_ref_values(struct intel_display *display,
enum phy phy)
{
const struct icl_procmon *procmon;
bool ret;
- procmon = icl_get_procmon_ref_values(dev_priv, phy);
+ procmon = icl_get_procmon_ref_values(display, phy);
- ret = check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW1(phy),
+ ret = check_phy_reg(display, phy, ICL_PORT_COMP_DW1(phy),
(0xff << 16) | 0xff, procmon->dw1);
- ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW9(phy),
+ ret &= check_phy_reg(display, phy, ICL_PORT_COMP_DW9(phy),
-1U, procmon->dw9);
- ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW10(phy),
+ ret &= check_phy_reg(display, phy, ICL_PORT_COMP_DW10(phy),
-1U, procmon->dw10);
return ret;
}
-static bool has_phy_misc(struct drm_i915_private *i915, enum phy phy)
+static bool has_phy_misc(struct intel_display *display, enum phy phy)
{
/*
* Some platforms only expect PHY_MISC to be programmed for PHY-A and
@@ -136,32 +136,30 @@ static bool has_phy_misc(struct drm_i915_private *i915, enum phy phy)
* that we program it for PHY A.
*/
- if (IS_ALDERLAKE_S(i915))
+ if (display->platform.alderlake_s)
return phy == PHY_A;
- else if ((IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) ||
- IS_ROCKETLAKE(i915) ||
- IS_DG1(i915))
+ else if ((display->platform.jasperlake || display->platform.elkhartlake) ||
+ display->platform.rocketlake ||
+ display->platform.dg1)
return phy < PHY_C;
return true;
}
-static bool icl_combo_phy_enabled(struct drm_i915_private *dev_priv,
+static bool icl_combo_phy_enabled(struct intel_display *display,
enum phy phy)
{
/* The PHY C added by EHL has no PHY_MISC register */
- if (!has_phy_misc(dev_priv, phy))
- return intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)) & COMP_INIT;
+ if (!has_phy_misc(display, phy))
+ return intel_de_read(display, ICL_PORT_COMP_DW0(phy)) & COMP_INIT;
else
- return !(intel_de_read(dev_priv, ICL_PHY_MISC(phy)) &
+ return !(intel_de_read(display, ICL_PHY_MISC(phy)) &
ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN) &&
- (intel_de_read(dev_priv, ICL_PORT_COMP_DW0(phy)) & COMP_INIT);
+ (intel_de_read(display, ICL_PORT_COMP_DW0(phy)) & COMP_INIT);
}
-static bool ehl_vbt_ddi_d_present(struct drm_i915_private *i915)
+static bool ehl_vbt_ddi_d_present(struct intel_display *display)
{
- struct intel_display *display = &i915->display;
-
bool ddi_a_present = intel_bios_is_port_present(display, PORT_A);
bool ddi_d_present = intel_bios_is_port_present(display, PORT_D);
bool dsi_present = intel_bios_is_dsi_present(display, NULL);
@@ -181,13 +179,13 @@ static bool ehl_vbt_ddi_d_present(struct drm_i915_private *i915)
* in the log and let the internal display win.
*/
if (ddi_d_present)
- drm_err(&i915->drm,
+ drm_err(display->drm,
"VBT claims to have both internal and external displays on PHY A. Configuring for internal.\n");
return false;
}
-static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy phy)
+static bool phy_is_master(struct intel_display *display, enum phy phy)
{
/*
* Certain PHYs are connected to compensation resistors and act
@@ -207,64 +205,64 @@ static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy phy)
*/
if (phy == PHY_A)
return true;
- else if (IS_ALDERLAKE_S(dev_priv))
+ else if (display->platform.alderlake_s)
return phy == PHY_D;
- else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
+ else if (display->platform.dg1 || display->platform.rocketlake)
return phy == PHY_C;
return false;
}
-static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
+static bool icl_combo_phy_verify_state(struct intel_display *display,
enum phy phy)
{
bool ret = true;
u32 expected_val = 0;
- if (!icl_combo_phy_enabled(dev_priv, phy))
+ if (!icl_combo_phy_enabled(display, phy))
return false;
- if (DISPLAY_VER(dev_priv) >= 12) {
- ret &= check_phy_reg(dev_priv, phy, ICL_PORT_TX_DW8_LN(0, phy),
+ if (DISPLAY_VER(display) >= 12) {
+ ret &= check_phy_reg(display, phy, ICL_PORT_TX_DW8_LN(0, phy),
ICL_PORT_TX_DW8_ODCC_CLK_SEL |
ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK,
ICL_PORT_TX_DW8_ODCC_CLK_SEL |
ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_DIV2);
- ret &= check_phy_reg(dev_priv, phy, ICL_PORT_PCS_DW1_LN(0, phy),
+ ret &= check_phy_reg(display, phy, ICL_PORT_PCS_DW1_LN(0, phy),
DCC_MODE_SELECT_MASK, RUN_DCC_ONCE);
}
- ret &= icl_verify_procmon_ref_values(dev_priv, phy);
+ ret &= icl_verify_procmon_ref_values(display, phy);
- if (phy_is_master(dev_priv, phy)) {
- ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW8(phy),
+ if (phy_is_master(display, phy)) {
+ ret &= check_phy_reg(display, phy, ICL_PORT_COMP_DW8(phy),
IREFGEN, IREFGEN);
- if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) {
- if (ehl_vbt_ddi_d_present(dev_priv))
+ if (display->platform.jasperlake || display->platform.elkhartlake) {
+ if (ehl_vbt_ddi_d_present(display))
expected_val = ICL_PHY_MISC_MUX_DDID;
- ret &= check_phy_reg(dev_priv, phy, ICL_PHY_MISC(phy),
+ ret &= check_phy_reg(display, phy, ICL_PHY_MISC(phy),
ICL_PHY_MISC_MUX_DDID,
expected_val);
}
}
- ret &= check_phy_reg(dev_priv, phy, ICL_PORT_CL_DW5(phy),
+ ret &= check_phy_reg(display, phy, ICL_PORT_CL_DW5(phy),
CL_POWER_DOWN_ENABLE, CL_POWER_DOWN_ENABLE);
return ret;
}
-void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
+void intel_combo_phy_power_up_lanes(struct intel_display *display,
enum phy phy, bool is_dsi,
int lane_count, bool lane_reversal)
{
u8 lane_mask;
if (is_dsi) {
- drm_WARN_ON(&dev_priv->drm, lane_reversal);
+ drm_WARN_ON(display->drm, lane_reversal);
switch (lane_count) {
case 1:
@@ -302,28 +300,28 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
}
}
- intel_de_rmw(dev_priv, ICL_PORT_CL_DW10(phy),
+ intel_de_rmw(display, ICL_PORT_CL_DW10(phy),
PWR_DOWN_LN_MASK, lane_mask);
}
-static void icl_combo_phys_init(struct drm_i915_private *dev_priv)
+static void icl_combo_phys_init(struct intel_display *display)
{
enum phy phy;
- for_each_combo_phy(dev_priv, phy) {
+ for_each_combo_phy(display, phy) {
const struct icl_procmon *procmon;
u32 val;
- if (icl_combo_phy_verify_state(dev_priv, phy))
+ if (icl_combo_phy_verify_state(display, phy))
continue;
- procmon = icl_get_procmon_ref_values(dev_priv, phy);
+ procmon = icl_get_procmon_ref_values(display, phy);
- drm_dbg(&dev_priv->drm,
- "Initializing combo PHY %c (Voltage/Process Info : %s)\n",
- phy_name(phy), procmon->name);
+ drm_dbg_kms(display->drm,
+ "Initializing combo PHY %c (Voltage/Process Info : %s)\n",
+ phy_name(phy), procmon->name);
- if (!has_phy_misc(dev_priv, phy))
+ if (!has_phy_misc(display, phy))
goto skip_phy_misc;
/*
@@ -334,84 +332,84 @@ static void icl_combo_phys_init(struct drm_i915_private *dev_priv)
* based on whether our VBT indicates the presence of any
* "internal" child devices.
*/
- val = intel_de_read(dev_priv, ICL_PHY_MISC(phy));
- if ((IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) &&
+ val = intel_de_read(display, ICL_PHY_MISC(phy));
+ if ((display->platform.jasperlake || display->platform.elkhartlake) &&
phy == PHY_A) {
val &= ~ICL_PHY_MISC_MUX_DDID;
- if (ehl_vbt_ddi_d_present(dev_priv))
+ if (ehl_vbt_ddi_d_present(display))
val |= ICL_PHY_MISC_MUX_DDID;
}
val &= ~ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN;
- intel_de_write(dev_priv, ICL_PHY_MISC(phy), val);
+ intel_de_write(display, ICL_PHY_MISC(phy), val);
skip_phy_misc:
- if (DISPLAY_VER(dev_priv) >= 12) {
- val = intel_de_read(dev_priv, ICL_PORT_TX_DW8_LN(0, phy));
+ if (DISPLAY_VER(display) >= 12) {
+ val = intel_de_read(display, ICL_PORT_TX_DW8_LN(0, phy));
val &= ~ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK;
val |= ICL_PORT_TX_DW8_ODCC_CLK_SEL;
val |= ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_DIV2;
- intel_de_write(dev_priv, ICL_PORT_TX_DW8_GRP(phy), val);
+ intel_de_write(display, ICL_PORT_TX_DW8_GRP(phy), val);
- val = intel_de_read(dev_priv, ICL_PORT_PCS_DW1_LN(0, phy));
+ val = intel_de_read(display, ICL_PORT_PCS_DW1_LN(0, phy));
val &= ~DCC_MODE_SELECT_MASK;
val |= RUN_DCC_ONCE;
- intel_de_write(dev_priv, ICL_PORT_PCS_DW1_GRP(phy), val);
+ intel_de_write(display, ICL_PORT_PCS_DW1_GRP(phy), val);
}
- icl_set_procmon_ref_values(dev_priv, phy);
+ icl_set_procmon_ref_values(display, phy);
- if (phy_is_master(dev_priv, phy))
- intel_de_rmw(dev_priv, ICL_PORT_COMP_DW8(phy),
+ if (phy_is_master(display, phy))
+ intel_de_rmw(display, ICL_PORT_COMP_DW8(phy),
0, IREFGEN);
- intel_de_rmw(dev_priv, ICL_PORT_COMP_DW0(phy), 0, COMP_INIT);
- intel_de_rmw(dev_priv, ICL_PORT_CL_DW5(phy),
+ intel_de_rmw(display, ICL_PORT_COMP_DW0(phy), 0, COMP_INIT);
+ intel_de_rmw(display, ICL_PORT_CL_DW5(phy),
0, CL_POWER_DOWN_ENABLE);
}
}
-static void icl_combo_phys_uninit(struct drm_i915_private *dev_priv)
+static void icl_combo_phys_uninit(struct intel_display *display)
{
enum phy phy;
- for_each_combo_phy_reverse(dev_priv, phy) {
+ for_each_combo_phy_reverse(display, phy) {
if (phy == PHY_A &&
- !icl_combo_phy_verify_state(dev_priv, phy)) {
- if (IS_TIGERLAKE(dev_priv) || IS_DG1(dev_priv)) {
+ !icl_combo_phy_verify_state(display, phy)) {
+ if (display->platform.tigerlake || display->platform.dg1) {
/*
* A known problem with old ifwi:
* https://gitlab.freedesktop.org/drm/intel/-/issues/2411
* Suppress the warning for CI. Remove ASAP!
*/
- drm_dbg_kms(&dev_priv->drm,
+ drm_dbg_kms(display->drm,
"Combo PHY %c HW state changed unexpectedly\n",
phy_name(phy));
} else {
- drm_warn(&dev_priv->drm,
+ drm_warn(display->drm,
"Combo PHY %c HW state changed unexpectedly\n",
phy_name(phy));
}
}
- if (!has_phy_misc(dev_priv, phy))
+ if (!has_phy_misc(display, phy))
goto skip_phy_misc;
- intel_de_rmw(dev_priv, ICL_PHY_MISC(phy), 0,
+ intel_de_rmw(display, ICL_PHY_MISC(phy), 0,
ICL_PHY_MISC_DE_IO_COMP_PWR_DOWN);
skip_phy_misc:
- intel_de_rmw(dev_priv, ICL_PORT_COMP_DW0(phy), COMP_INIT, 0);
+ intel_de_rmw(display, ICL_PORT_COMP_DW0(phy), COMP_INIT, 0);
}
}
-void intel_combo_phy_init(struct drm_i915_private *i915)
+void intel_combo_phy_init(struct intel_display *display)
{
- icl_combo_phys_init(i915);
+ icl_combo_phys_init(display);
}
-void intel_combo_phy_uninit(struct drm_i915_private *i915)
+void intel_combo_phy_uninit(struct intel_display *display)
{
- icl_combo_phys_uninit(i915);
+ icl_combo_phys_uninit(display);
}
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.h b/drivers/gpu/drm/i915/display/intel_combo_phy.h
index 660886f86c59..3f5dba78e533 100644
--- a/drivers/gpu/drm/i915/display/intel_combo_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_combo_phy.h
@@ -8,12 +8,12 @@
#include <linux/types.h>
-struct drm_i915_private;
enum phy;
+struct intel_display;
-void intel_combo_phy_init(struct drm_i915_private *dev_priv);
-void intel_combo_phy_uninit(struct drm_i915_private *dev_priv);
-void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv,
+void intel_combo_phy_init(struct intel_display *display);
+void intel_combo_phy_uninit(struct intel_display *display);
+void intel_combo_phy_power_up_lanes(struct intel_display *display,
enum phy phy, bool is_dsi,
int lane_count, bool lane_reversal);
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 900e066b2478..5433279227e1 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2437,13 +2437,13 @@ static void intel_ddi_disable_fec(struct intel_encoder *encoder,
static void intel_ddi_power_up_lanes(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
if (intel_encoder_is_combo(encoder)) {
enum phy phy = intel_encoder_to_phy(encoder);
- intel_combo_phy_power_up_lanes(i915, phy, false,
+ intel_combo_phy_power_up_lanes(display, phy, false,
crtc_state->lane_count,
dig_port->lane_reversal);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 0450fdf9d4de..23d4e4c6bd6b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1995,17 +1995,17 @@ static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
}
/* Prefer intel_encoder_is_combo() */
-bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy)
+bool intel_phy_is_combo(struct intel_display *display, enum phy phy)
{
if (phy == PHY_NONE)
return false;
- else if (IS_ALDERLAKE_S(dev_priv))
+ else if (display->platform.alderlake_s)
return phy <= PHY_E;
- else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv))
+ else if (display->platform.dg1 || display->platform.rocketlake)
return phy <= PHY_D;
- else if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv))
+ else if (display->platform.jasperlake || display->platform.elkhartlake)
return phy <= PHY_C;
- else if (IS_ALDERLAKE_P(dev_priv) || IS_DISPLAY_VER(dev_priv, 11, 12))
+ else if (display->platform.alderlake_p || IS_DISPLAY_VER(display, 11, 12))
return phy <= PHY_B;
else
/*
@@ -2085,9 +2085,9 @@ enum phy intel_encoder_to_phy(struct intel_encoder *encoder)
bool intel_encoder_is_combo(struct intel_encoder *encoder)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ struct intel_display *display = to_intel_display(encoder);
- return intel_phy_is_combo(i915, intel_encoder_to_phy(encoder));
+ return intel_phy_is_combo(display, intel_encoder_to_phy(encoder));
}
bool intel_encoder_is_snps(struct intel_encoder *encoder)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index f702425df305..d4a709588700 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -476,7 +476,7 @@ struct drm_display_mode *
intel_encoder_current_mode(struct intel_encoder *encoder);
void intel_encoder_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state);
-bool intel_phy_is_combo(struct drm_i915_private *dev_priv, enum phy phy);
+bool intel_phy_is_combo(struct intel_display *display, enum phy phy);
bool intel_phy_is_tc(struct drm_i915_private *dev_priv, enum phy phy);
bool intel_phy_is_snps(struct drm_i915_private *dev_priv, enum phy phy);
enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index d93f43d145a9..396930937d98 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1651,7 +1651,7 @@ static void icl_display_core_init(struct intel_display *display,
return;
/* 2. Initialize all combo phys */
- intel_combo_phy_init(dev_priv);
+ intel_combo_phy_init(display);
/*
* 3. Enable Power Well 1 (PG1).
@@ -1714,7 +1714,6 @@ static void icl_display_core_init(struct intel_display *display,
static void icl_display_core_uninit(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
struct i915_power_well *well;
@@ -1747,7 +1746,7 @@ static void icl_display_core_uninit(struct intel_display *display)
mutex_unlock(&power_domains->lock);
/* 5. */
- intel_combo_phy_uninit(dev_priv);
+ intel_combo_phy_uninit(display);
}
static void chv_phy_control_init(struct intel_display *display)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 6fbb94c8bfb3..5b60db597329 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -973,7 +973,6 @@ static void gen9_assert_dbuf_enabled(struct intel_display *display)
void gen9_disable_dc_states(struct intel_display *display)
{
- struct drm_i915_private *dev_priv = to_i915(display->drm);
struct i915_power_domains *power_domains = &display->power.domains;
struct intel_cdclk_config cdclk_config = {};
u32 old_state = power_domains->dc_state;
@@ -1013,7 +1012,7 @@ void gen9_disable_dc_states(struct intel_display *display)
* PHY's HW context for port B is lost after DC transitions,
* so we need to restore it manually.
*/
- intel_combo_phy_init(dev_priv);
+ intel_combo_phy_init(display);
}
static void gen9_dc_off_power_well_enable(struct intel_display *display,
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 13/14] drm/i915/display: convert intel_fifo_underrun.[ch] to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (11 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 12/14] drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct intel_display Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-12 16:36 ` [PATCH 14/14] drm/i915/display: convert i915_pipestat_enable_mask() " Jani Nikula
` (9 subsequent siblings)
22 siblings, 0 replies; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of intel_fifo_underrun.[ch] to
struct intel_display.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 4 +-
.../gpu/drm/i915/display/intel_display_irq.c | 18 ++--
.../drm/i915/display/intel_fifo_underrun.c | 93 ++++++++++---------
.../drm/i915/display/intel_fifo_underrun.h | 11 +--
.../drm/i915/display/intel_modeset_setup.c | 6 +-
6 files changed, 67 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 89785da93603..5ecf7d1a5f18 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -328,7 +328,7 @@ int intel_crtc_init(struct intel_display *display, enum pipe pipe)
}
crtc->plane_ids_mask |= BIT(primary->id);
- intel_init_fifo_underrun_reporting(dev_priv, crtc, false);
+ intel_init_fifo_underrun_reporting(display, crtc, false);
for_each_sprite(display, pipe, sprite) {
struct intel_plane *plane;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 23d4e4c6bd6b..b491a1638a00 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7954,8 +7954,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
}
/* Underruns don't always raise interrupts, so check manually */
- intel_check_cpu_fifo_underruns(dev_priv);
- intel_check_pch_fifo_underruns(dev_priv);
+ intel_check_cpu_fifo_underruns(display);
+ intel_check_pch_fifo_underruns(display);
if (state->modeset)
intel_verify_planes(state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 0f68b0a34ca9..b8fcf74bd3ac 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -562,7 +562,7 @@ void i915_pipestat_irq_handler(struct drm_i915_private *dev_priv,
i9xx_pipe_crc_irq_handler(dev_priv, pipe);
if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)
- intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
+ intel_cpu_fifo_underrun_irq_handler(display, pipe);
}
if (blc_event || (iir & I915_ASLE_INTERRUPT))
@@ -587,7 +587,7 @@ void i965_pipestat_irq_handler(struct drm_i915_private *dev_priv,
i9xx_pipe_crc_irq_handler(dev_priv, pipe);
if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)
- intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
+ intel_cpu_fifo_underrun_irq_handler(display, pipe);
}
if (blc_event || (iir & I915_ASLE_INTERRUPT))
@@ -614,7 +614,7 @@ void valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv,
i9xx_pipe_crc_irq_handler(dev_priv, pipe);
if (pipe_stats[pipe] & PIPE_FIFO_UNDERRUN_STATUS)
- intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
+ intel_cpu_fifo_underrun_irq_handler(display, pipe);
}
if (pipe_stats[0] & PIPE_GMBUS_INTERRUPT_STATUS)
@@ -666,10 +666,10 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
"PCH transcoder CRC error interrupt\n");
if (pch_iir & SDE_TRANSA_FIFO_UNDER)
- intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_A);
+ intel_pch_fifo_underrun_irq_handler(display, PIPE_A);
if (pch_iir & SDE_TRANSB_FIFO_UNDER)
- intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
+ intel_pch_fifo_underrun_irq_handler(display, PIPE_B);
}
static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
@@ -683,7 +683,7 @@ static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
for_each_pipe(dev_priv, pipe) {
if (err_int & ERR_INT_FIFO_UNDERRUN(pipe))
- intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
+ intel_cpu_fifo_underrun_irq_handler(display, pipe);
if (err_int & ERR_INT_PIPE_CRC_DONE(pipe)) {
if (IS_IVYBRIDGE(dev_priv))
@@ -707,7 +707,7 @@ static void cpt_serr_int_handler(struct drm_i915_private *dev_priv)
for_each_pipe(dev_priv, pipe)
if (serr_int & SERR_INT_TRANS_FIFO_UNDERRUN(pipe))
- intel_pch_fifo_underrun_irq_handler(dev_priv, pipe);
+ intel_pch_fifo_underrun_irq_handler(display, pipe);
intel_de_write(display, SERR_INT, serr_int);
}
@@ -776,7 +776,7 @@ void ilk_display_irq_handler(struct drm_i915_private *dev_priv, u32 de_iir)
flip_done_handler(dev_priv, pipe);
if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
- intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
+ intel_cpu_fifo_underrun_irq_handler(display, pipe);
if (de_iir & DE_PIPE_CRC_DONE(pipe))
i9xx_pipe_crc_irq_handler(dev_priv, pipe);
@@ -1228,7 +1228,7 @@ void gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
hsw_pipe_crc_irq_handler(dev_priv, pipe);
if (iir & GEN8_PIPE_FIFO_UNDERRUN)
- intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
+ intel_cpu_fifo_underrun_irq_handler(display, pipe);
fault_errors = iir & gen8_de_pipe_fault_mask(dev_priv);
if (fault_errors)
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index cf70dab4881b..14b00988a81f 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -63,7 +63,7 @@ static bool ivb_can_enable_err_int(struct intel_display *display)
lockdep_assert_held(&dev_priv->irq_lock);
- for_each_pipe(dev_priv, pipe) {
+ for_each_pipe(display, pipe) {
crtc = intel_crtc_for_pipe(display, pipe);
if (crtc->cpu_fifo_underrun_disabled)
@@ -81,7 +81,7 @@ static bool cpt_can_enable_serr_int(struct intel_display *display)
lockdep_assert_held(&dev_priv->irq_lock);
- for_each_pipe(dev_priv, pipe) {
+ for_each_pipe(display, pipe) {
crtc = intel_crtc_for_pipe(display, pipe);
if (crtc->pch_fifo_underrun_disabled)
@@ -95,20 +95,20 @@ static void i9xx_check_fifo_underruns(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- i915_reg_t reg = PIPESTAT(dev_priv, crtc->pipe);
+ i915_reg_t reg = PIPESTAT(display, crtc->pipe);
u32 enable_mask;
lockdep_assert_held(&dev_priv->irq_lock);
- if ((intel_de_read(dev_priv, reg) & PIPE_FIFO_UNDERRUN_STATUS) == 0)
+ if ((intel_de_read(display, reg) & PIPE_FIFO_UNDERRUN_STATUS) == 0)
return;
enable_mask = i915_pipestat_enable_mask(dev_priv, crtc->pipe);
- intel_de_write(dev_priv, reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_write(display, reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS);
+ intel_de_posting_read(display, reg);
trace_intel_cpu_fifo_underrun(display, crtc->pipe);
- drm_err(&dev_priv->drm, "pipe %c underrun\n", pipe_name(crtc->pipe));
+ drm_err(display->drm, "pipe %c underrun\n", pipe_name(crtc->pipe));
}
static void i9xx_set_fifo_underrun_reporting(struct intel_display *display,
@@ -116,19 +116,19 @@ static void i9xx_set_fifo_underrun_reporting(struct intel_display *display,
bool enable, bool old)
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
- i915_reg_t reg = PIPESTAT(dev_priv, pipe);
+ i915_reg_t reg = PIPESTAT(display, pipe);
lockdep_assert_held(&dev_priv->irq_lock);
if (enable) {
u32 enable_mask = i915_pipestat_enable_mask(dev_priv, pipe);
- intel_de_write(dev_priv, reg,
+ intel_de_write(display, reg,
enable_mask | PIPE_FIFO_UNDERRUN_STATUS);
- intel_de_posting_read(dev_priv, reg);
+ intel_de_posting_read(display, reg);
} else {
- if (old && intel_de_read(dev_priv, reg) & PIPE_FIFO_UNDERRUN_STATUS)
- drm_err(&dev_priv->drm, "pipe %c underrun\n",
+ if (old && intel_de_read(display, reg) & PIPE_FIFO_UNDERRUN_STATUS)
+ drm_err(display->drm, "pipe %c underrun\n",
pipe_name(pipe));
}
}
@@ -151,18 +151,18 @@ static void ivb_check_fifo_underruns(struct intel_crtc *crtc)
struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- u32 err_int = intel_de_read(dev_priv, GEN7_ERR_INT);
+ u32 err_int = intel_de_read(display, GEN7_ERR_INT);
lockdep_assert_held(&dev_priv->irq_lock);
if ((err_int & ERR_INT_FIFO_UNDERRUN(pipe)) == 0)
return;
- intel_de_write(dev_priv, GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe));
- intel_de_posting_read(dev_priv, GEN7_ERR_INT);
+ intel_de_write(display, GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe));
+ intel_de_posting_read(display, GEN7_ERR_INT);
trace_intel_cpu_fifo_underrun(display, pipe);
- drm_err(&dev_priv->drm, "fifo underrun on pipe %c\n", pipe_name(pipe));
+ drm_err(display->drm, "fifo underrun on pipe %c\n", pipe_name(pipe));
}
static void ivb_set_fifo_underrun_reporting(struct intel_display *display,
@@ -171,7 +171,7 @@ static void ivb_set_fifo_underrun_reporting(struct intel_display *display,
{
struct drm_i915_private *dev_priv = to_i915(display->drm);
if (enable) {
- intel_de_write(dev_priv, GEN7_ERR_INT,
+ intel_de_write(display, GEN7_ERR_INT,
ERR_INT_FIFO_UNDERRUN(pipe));
if (!ivb_can_enable_err_int(display))
@@ -182,8 +182,8 @@ static void ivb_set_fifo_underrun_reporting(struct intel_display *display,
ilk_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
if (old &&
- intel_de_read(dev_priv, GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe)) {
- drm_err(&dev_priv->drm,
+ intel_de_read(display, GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe)) {
+ drm_err(display->drm,
"uncleared fifo underrun on pipe %c\n",
pipe_name(pipe));
}
@@ -220,19 +220,19 @@ static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc)
struct intel_display *display = to_intel_display(crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pch_transcoder = crtc->pipe;
- u32 serr_int = intel_de_read(dev_priv, SERR_INT);
+ u32 serr_int = intel_de_read(display, SERR_INT);
lockdep_assert_held(&dev_priv->irq_lock);
if ((serr_int & SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)) == 0)
return;
- intel_de_write(dev_priv, SERR_INT,
+ intel_de_write(display, SERR_INT,
SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder));
- intel_de_posting_read(dev_priv, SERR_INT);
+ intel_de_posting_read(display, SERR_INT);
trace_intel_pch_fifo_underrun(display, pch_transcoder);
- drm_err(&dev_priv->drm, "pch fifo underrun on pch transcoder %c\n",
+ drm_err(display->drm, "pch fifo underrun on pch transcoder %c\n",
pipe_name(pch_transcoder));
}
@@ -243,7 +243,7 @@ static void cpt_set_fifo_underrun_reporting(struct intel_display *display,
struct drm_i915_private *dev_priv = to_i915(display->drm);
if (enable) {
- intel_de_write(dev_priv, SERR_INT,
+ intel_de_write(display, SERR_INT,
SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder));
if (!cpt_can_enable_serr_int(display))
@@ -253,9 +253,9 @@ static void cpt_set_fifo_underrun_reporting(struct intel_display *display,
} else {
ibx_disable_display_interrupt(dev_priv, SDE_ERROR_CPT);
- if (old && intel_de_read(dev_priv, SERR_INT) &
+ if (old && intel_de_read(display, SERR_INT) &
SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder)) {
- drm_err(&dev_priv->drm,
+ drm_err(display->drm,
"uncleared pch fifo underrun on pch transcoder %c\n",
pipe_name(pch_transcoder));
}
@@ -368,17 +368,16 @@ bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
/**
* intel_cpu_fifo_underrun_irq_handler - handle CPU fifo underrun interrupt
- * @dev_priv: i915 device instance
+ * @display: display device instance
* @pipe: (CPU) pipe to set state for
*
* This handles a CPU fifo underrun interrupt, generating an underrun warning
* into dmesg if underrun reporting is enabled and then disables the underrun
* interrupt to avoid an irq storm.
*/
-void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
+void intel_cpu_fifo_underrun_irq_handler(struct intel_display *display,
enum pipe pipe)
{
- struct intel_display *display = &dev_priv->display;
struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
/* We may be called too early in init, thanks BIOS! */
@@ -386,63 +385,62 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
return;
/* GMCH can't disable fifo underruns, filter them. */
- if (HAS_GMCH(dev_priv) &&
+ if (HAS_GMCH(display) &&
crtc->cpu_fifo_underrun_disabled)
return;
if (intel_set_cpu_fifo_underrun_reporting(display, pipe, false)) {
trace_intel_cpu_fifo_underrun(display, pipe);
- drm_err(&dev_priv->drm, "CPU pipe %c FIFO underrun\n", pipe_name(pipe));
+ drm_err(display->drm, "CPU pipe %c FIFO underrun\n", pipe_name(pipe));
}
- intel_fbc_handle_fifo_underrun_irq(&dev_priv->display);
+ intel_fbc_handle_fifo_underrun_irq(display);
}
/**
* intel_pch_fifo_underrun_irq_handler - handle PCH fifo underrun interrupt
- * @dev_priv: i915 device instance
+ * @display: display device instance
* @pch_transcoder: the PCH transcoder (same as pipe on IVB and older)
*
* This handles a PCH fifo underrun interrupt, generating an underrun warning
* into dmesg if underrun reporting is enabled and then disables the underrun
* interrupt to avoid an irq storm.
*/
-void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
+void intel_pch_fifo_underrun_irq_handler(struct intel_display *display,
enum pipe pch_transcoder)
{
- struct intel_display *display = &dev_priv->display;
-
if (intel_set_pch_fifo_underrun_reporting(display, pch_transcoder,
false)) {
trace_intel_pch_fifo_underrun(display, pch_transcoder);
- drm_err(&dev_priv->drm, "PCH transcoder %c FIFO underrun\n",
+ drm_err(display->drm, "PCH transcoder %c FIFO underrun\n",
pipe_name(pch_transcoder));
}
}
/**
* intel_check_cpu_fifo_underruns - check for CPU fifo underruns immediately
- * @dev_priv: i915 device instance
+ * @display: display device instance
*
* Check for CPU fifo underruns immediately. Useful on IVB/HSW where the shared
* error interrupt may have been disabled, and so CPU fifo underruns won't
* necessarily raise an interrupt, and on GMCH platforms where underruns never
* raise an interrupt.
*/
-void intel_check_cpu_fifo_underruns(struct drm_i915_private *dev_priv)
+void intel_check_cpu_fifo_underruns(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
spin_lock_irq(&dev_priv->irq_lock);
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
if (crtc->cpu_fifo_underrun_disabled)
continue;
- if (HAS_GMCH(dev_priv))
+ if (HAS_GMCH(display))
i9xx_check_fifo_underruns(crtc);
- else if (DISPLAY_VER(dev_priv) == 7)
+ else if (DISPLAY_VER(display) == 7)
ivb_check_fifo_underruns(crtc);
}
@@ -451,19 +449,20 @@ void intel_check_cpu_fifo_underruns(struct drm_i915_private *dev_priv)
/**
* intel_check_pch_fifo_underruns - check for PCH fifo underruns immediately
- * @dev_priv: i915 device instance
+ * @display: display device instance
*
* Check for PCH fifo underruns immediately. Useful on CPT/PPT where the shared
* error interrupt may have been disabled, and so PCH fifo underruns won't
* necessarily raise an interrupt.
*/
-void intel_check_pch_fifo_underruns(struct drm_i915_private *dev_priv)
+void intel_check_pch_fifo_underruns(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
struct intel_crtc *crtc;
spin_lock_irq(&dev_priv->irq_lock);
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc(display->drm, crtc) {
if (crtc->pch_fifo_underrun_disabled)
continue;
@@ -474,10 +473,12 @@ void intel_check_pch_fifo_underruns(struct drm_i915_private *dev_priv)
spin_unlock_irq(&dev_priv->irq_lock);
}
-void intel_init_fifo_underrun_reporting(struct drm_i915_private *i915,
+void intel_init_fifo_underrun_reporting(struct intel_display *display,
struct intel_crtc *crtc,
bool enable)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
crtc->cpu_fifo_underrun_disabled = !enable;
/*
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.h b/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
index 8302080c2313..ebecc4347cfb 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
@@ -9,22 +9,21 @@
#include <linux/types.h>
enum pipe;
-struct drm_i915_private;
struct intel_crtc;
struct intel_display;
-void intel_init_fifo_underrun_reporting(struct drm_i915_private *i915,
+void intel_init_fifo_underrun_reporting(struct intel_display *display,
struct intel_crtc *crtc, bool enable);
bool intel_set_cpu_fifo_underrun_reporting(struct intel_display *display,
enum pipe pipe, bool enable);
bool intel_set_pch_fifo_underrun_reporting(struct intel_display *display,
enum pipe pch_transcoder,
bool enable);
-void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
+void intel_cpu_fifo_underrun_irq_handler(struct intel_display *display,
enum pipe pipe);
-void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
+void intel_pch_fifo_underrun_irq_handler(struct intel_display *display,
enum pipe pch_transcoder);
-void intel_check_cpu_fifo_underruns(struct drm_i915_private *dev_priv);
-void intel_check_pch_fifo_underruns(struct drm_i915_private *dev_priv);
+void intel_check_cpu_fifo_underruns(struct intel_display *display);
+void intel_check_pch_fifo_underruns(struct intel_display *display);
#endif /* __INTEL_FIFO_UNDERRUN_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index b4d1a18e9fd4..a5a00b3ce98f 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -454,8 +454,8 @@ static struct intel_connector *intel_encoder_find_connector(struct intel_encoder
static void intel_sanitize_fifo_underrun_reporting(const struct intel_crtc_state *crtc_state)
{
+ struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
/*
* We start out with underrun reporting disabled on active
@@ -470,9 +470,9 @@ static void intel_sanitize_fifo_underrun_reporting(const struct intel_crtc_state
* No protection against concurrent access is required - at
* worst a fifo underrun happens which also sets this to false.
*/
- intel_init_fifo_underrun_reporting(i915, crtc,
+ intel_init_fifo_underrun_reporting(display, crtc,
!crtc_state->hw.active &&
- !HAS_GMCH(i915));
+ !HAS_GMCH(display));
}
static bool intel_sanitize_crtc(struct intel_crtc *crtc,
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [PATCH 14/14] drm/i915/display: convert i915_pipestat_enable_mask() to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (12 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 13/14] drm/i915/display: convert intel_fifo_underrun.[ch] " Jani Nikula
@ 2025-02-12 16:36 ` Jani Nikula
2025-02-12 17:17 ` [PATCH 00/14] drm/i915/display: conversions " Ville Syrjälä
` (8 subsequent siblings)
22 siblings, 0 replies; 39+ messages in thread
From: Jani Nikula @ 2025-02-12 16:36 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Going forward, struct intel_display is the main display device data
pointer. Convert i915_pipestat_enable_mask() to struct intel_display,
allowing further conversions elsewhere.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../gpu/drm/i915/display/intel_display_irq.c | 19 ++++++++++---------
.../gpu/drm/i915/display/intel_display_irq.h | 5 +++--
.../drm/i915/display/intel_fifo_underrun.c | 4 ++--
3 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index b8fcf74bd3ac..880eaed83cd5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -226,29 +226,30 @@ void ibx_disable_display_interrupt(struct drm_i915_private *i915, u32 bits)
ibx_display_interrupt_update(i915, bits, 0);
}
-u32 i915_pipestat_enable_mask(struct drm_i915_private *dev_priv,
+u32 i915_pipestat_enable_mask(struct intel_display *display,
enum pipe pipe)
{
- u32 status_mask = dev_priv->display.irq.pipestat_irq_mask[pipe];
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
+ u32 status_mask = display->irq.pipestat_irq_mask[pipe];
u32 enable_mask = status_mask << 16;
lockdep_assert_held(&dev_priv->irq_lock);
- if (DISPLAY_VER(dev_priv) < 5)
+ if (DISPLAY_VER(display) < 5)
goto out;
/*
* On pipe A we don't support the PSR interrupt yet,
* on pipe B and C the same bit MBZ.
*/
- if (drm_WARN_ON_ONCE(&dev_priv->drm,
+ if (drm_WARN_ON_ONCE(display->drm,
status_mask & PIPE_A_PSR_STATUS_VLV))
return 0;
/*
* On pipe B and C we don't support the PSR interrupt yet, on pipe
* A the same bit is for perf counters which we don't use either.
*/
- if (drm_WARN_ON_ONCE(&dev_priv->drm,
+ if (drm_WARN_ON_ONCE(display->drm,
status_mask & PIPE_B_PSR_STATUS_VLV))
return 0;
@@ -261,7 +262,7 @@ u32 i915_pipestat_enable_mask(struct drm_i915_private *dev_priv,
enable_mask |= SPRITE1_FLIP_DONE_INT_EN_VLV;
out:
- drm_WARN_ONCE(&dev_priv->drm,
+ drm_WARN_ONCE(display->drm,
enable_mask & ~PIPESTAT_INT_ENABLE_MASK ||
status_mask & ~PIPESTAT_INT_STATUS_MASK,
"pipe %c: enable_mask=0x%x, status_mask=0x%x\n",
@@ -288,7 +289,7 @@ void i915_enable_pipestat(struct drm_i915_private *dev_priv,
return;
dev_priv->display.irq.pipestat_irq_mask[pipe] |= status_mask;
- enable_mask = i915_pipestat_enable_mask(dev_priv, pipe);
+ enable_mask = i915_pipestat_enable_mask(display, pipe);
intel_de_write(display, reg, enable_mask | status_mask);
intel_de_posting_read(display, reg);
@@ -312,7 +313,7 @@ void i915_disable_pipestat(struct drm_i915_private *dev_priv,
return;
dev_priv->display.irq.pipestat_irq_mask[pipe] &= ~status_mask;
- enable_mask = i915_pipestat_enable_mask(dev_priv, pipe);
+ enable_mask = i915_pipestat_enable_mask(display, pipe);
intel_de_write(display, reg, enable_mask | status_mask);
intel_de_posting_read(display, reg);
@@ -525,7 +526,7 @@ void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv,
reg = PIPESTAT(dev_priv, pipe);
pipe_stats[pipe] = intel_de_read(display, reg) & status_mask;
- enable_mask = i915_pipestat_enable_mask(dev_priv, pipe);
+ enable_mask = i915_pipestat_enable_mask(display, pipe);
/*
* Clear the PIPE*STAT regs before the IIR
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index b077712b7be1..75ab38a0908e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -11,8 +11,9 @@
#include "intel_display_limits.h"
enum pipe;
-struct drm_i915_private;
struct drm_crtc;
+struct drm_i915_private;
+struct intel_display;
void valleyview_enable_display_irqs(struct drm_i915_private *i915);
void valleyview_disable_display_irqs(struct drm_i915_private *i915);
@@ -64,7 +65,7 @@ void gen8_de_irq_postinstall(struct drm_i915_private *i915);
void gen11_de_irq_postinstall(struct drm_i915_private *i915);
void dg1_de_irq_postinstall(struct drm_i915_private *i915);
-u32 i915_pipestat_enable_mask(struct drm_i915_private *i915, enum pipe pipe);
+u32 i915_pipestat_enable_mask(struct intel_display *display, enum pipe pipe);
void i915_enable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
void i915_disable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
void i915_enable_asle_pipestat(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
index 14b00988a81f..7a8fbff39be0 100644
--- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
@@ -103,7 +103,7 @@ static void i9xx_check_fifo_underruns(struct intel_crtc *crtc)
if ((intel_de_read(display, reg) & PIPE_FIFO_UNDERRUN_STATUS) == 0)
return;
- enable_mask = i915_pipestat_enable_mask(dev_priv, crtc->pipe);
+ enable_mask = i915_pipestat_enable_mask(display, crtc->pipe);
intel_de_write(display, reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS);
intel_de_posting_read(display, reg);
@@ -121,7 +121,7 @@ static void i9xx_set_fifo_underrun_reporting(struct intel_display *display,
lockdep_assert_held(&dev_priv->irq_lock);
if (enable) {
- u32 enable_mask = i915_pipestat_enable_mask(dev_priv, pipe);
+ u32 enable_mask = i915_pipestat_enable_mask(display, pipe);
intel_de_write(display, reg,
enable_mask | PIPE_FIFO_UNDERRUN_STATUS);
--
2.39.5
^ permalink raw reply related [flat|nested] 39+ messages in thread
* Re: [PATCH 00/14] drm/i915/display: conversions to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (13 preceding siblings ...)
2025-02-12 16:36 ` [PATCH 14/14] drm/i915/display: convert i915_pipestat_enable_mask() " Jani Nikula
@ 2025-02-12 17:17 ` Ville Syrjälä
2025-02-13 8:27 ` Jani Nikula
2025-02-12 20:32 ` ✓ CI.Patch_applied: success for " Patchwork
` (7 subsequent siblings)
22 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjälä @ 2025-02-12 17:17 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Wed, Feb 12, 2025 at 06:36:29PM +0200, Jani Nikula wrote:
> Convert a bunch of files and functions to struct intel display.
>
> The approach is to mostly convert a file, then see what the stragglers
> are, convert those too, and repeat.
>
> The PCH checks are starting to become a big straggler for further
> conversions.
Aye. I wonder if we should in fact change all the HAS_PCH_FOO()
stuff to some kind of "south display type" thing. The current
situation is a bit of a mess due to:
- DG1/2 declare some kind of fake PCH type
- BXT/GLK don't declare one and yet we still use many
PCH/south display registers
Anyways, series is
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> BR,
> Jani.
>
> Jani Nikula (14):
> drm/i915/dp: convert g4x_dp.[ch] to struct intel display
> drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display
> drm/i915/ips: convert hsw_ips.c to struct intel_display
> drm/i915/display: convert assert_transcoder*() to struct intel_display
> drm/i915/display: convert assert_port_valid() to struct intel_display
> drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default()
> drm/i915/display: convert
> intel_set_{cpu,pch}_fifo_underrun_reporting() to intel_display
> drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display
> drm/i915/display: convert intel_cpu_transcoder_mode_valid() to
> intel_display
> drm/i915/display: convert intel_mode_valid_max_plane_size() to
> intel_display
> drm/i915/dsi: convert platform checks to display->platform.<platform>
> style
> drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct
> intel_display
> drm/i915/display: convert intel_fifo_underrun.[ch] to struct
> intel_display
> drm/i915/display: convert i915_pipestat_enable_mask() to struct
> intel_display
>
> drivers/gpu/drm/i915/display/g4x_dp.c | 99 +++---
> drivers/gpu/drm/i915/display/g4x_dp.h | 14 +-
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 154 +++++----
> drivers/gpu/drm/i915/display/g4x_hdmi.h | 6 +-
> drivers/gpu/drm/i915/display/hsw_ips.c | 26 +-
> drivers/gpu/drm/i915/display/icl_dsi.c | 21 +-
> .../gpu/drm/i915/display/intel_combo_phy.c | 180 ++++++-----
> .../gpu/drm/i915/display/intel_combo_phy.h | 8 +-
> drivers/gpu/drm/i915/display/intel_crt.c | 21 +-
> drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 11 +-
> drivers/gpu/drm/i915/display/intel_display.c | 155 ++++-----
> drivers/gpu/drm/i915/display/intel_display.h | 10 +-
> .../gpu/drm/i915/display/intel_display_irq.c | 37 +--
> .../gpu/drm/i915/display/intel_display_irq.h | 5 +-
> .../drm/i915/display/intel_display_power.c | 5 +-
> .../i915/display/intel_display_power_well.c | 3 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 5 +-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +-
> drivers/gpu/drm/i915/display/intel_dpll.c | 30 +-
> drivers/gpu/drm/i915/display/intel_dsi.c | 8 +-
> drivers/gpu/drm/i915/display/intel_dvo.c | 8 +-
> drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
> .../drm/i915/display/intel_fifo_underrun.c | 181 ++++++-----
> .../drm/i915/display/intel_fifo_underrun.h | 18 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +-
> drivers/gpu/drm/i915/display/intel_hotplug.c | 4 +-
> drivers/gpu/drm/i915/display/intel_hotplug.h | 3 +-
> drivers/gpu/drm/i915/display/intel_lvds.c | 6 +-
> .../drm/i915/display/intel_modeset_setup.c | 6 +-
> .../gpu/drm/i915/display/intel_pch_display.c | 4 +-
> drivers/gpu/drm/i915/display/intel_pps.c | 11 +-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 293 +++++++++---------
> drivers/gpu/drm/i915/display/intel_sdvo.h | 10 +-
> drivers/gpu/drm/i915/display/intel_tv.c | 6 +-
> drivers/gpu/drm/i915/display/vlv_dsi.c | 8 +-
> 36 files changed, 671 insertions(+), 700 deletions(-)
>
> --
> 2.39.5
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✓ CI.Patch_applied: success for drm/i915/display: conversions to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (14 preceding siblings ...)
2025-02-12 17:17 ` [PATCH 00/14] drm/i915/display: conversions " Ville Syrjälä
@ 2025-02-12 20:32 ` Patchwork
2025-02-12 20:33 ` ✗ CI.checkpatch: warning " Patchwork
` (6 subsequent siblings)
22 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-12 20:32 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: conversions to struct intel_display
URL : https://patchwork.freedesktop.org/series/144749/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: 1e935d0d2896 drm-tip: 2025y-02m-12d-20h-05m-00s UTC integration manifest
=== git am output follows ===
Applying: drm/i915/dp: convert g4x_dp.[ch] to struct intel display
Applying: drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display
Applying: drm/i915/ips: convert hsw_ips.c to struct intel_display
Applying: drm/i915/display: convert assert_transcoder*() to struct intel_display
Applying: drm/i915/display: convert assert_port_valid() to struct intel_display
Applying: drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default()
Applying: drm/i915/display: convert intel_set_{cpu, pch}_fifo_underrun_reporting() to intel_display
Applying: drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display
Applying: drm/i915/display: convert intel_cpu_transcoder_mode_valid() to intel_display
Applying: drm/i915/display: convert intel_mode_valid_max_plane_size() to intel_display
Applying: drm/i915/dsi: convert platform checks to display->platform.<platform> style
Applying: drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct intel_display
Applying: drm/i915/display: convert intel_fifo_underrun.[ch] to struct intel_display
Applying: drm/i915/display: convert i915_pipestat_enable_mask() to struct intel_display
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915/display: conversions to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (15 preceding siblings ...)
2025-02-12 20:32 ` ✓ CI.Patch_applied: success for " Patchwork
@ 2025-02-12 20:33 ` Patchwork
2025-02-12 20:34 ` ✓ CI.KUnit: success " Patchwork
` (5 subsequent siblings)
22 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-12 20:33 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: conversions to struct intel_display
URL : https://patchwork.freedesktop.org/series/144749/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
22f9cda3436b4fe965b5c5f31d2f2c1bcb483189
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit e5f913a0f834843e837392c7da955ee7fe12604d
Author: Jani Nikula <jani.nikula@intel.com>
Date: Wed Feb 12 18:36:43 2025 +0200
drm/i915/display: convert i915_pipestat_enable_mask() to struct intel_display
Going forward, struct intel_display is the main display device data
pointer. Convert i915_pipestat_enable_mask() to struct intel_display,
allowing further conversions elsewhere.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch 1e935d0d289627796230e9e1ca1451647fe9a2ad drm-intel
309e6045bdfc drm/i915/dp: convert g4x_dp.[ch] to struct intel display
-:349: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#349: FILE: drivers/gpu/drm/i915/display/g4x_dp.h:32:
}
+static inline bool g4x_dp_port_enabled(struct intel_display *display,
-:356: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#356: FILE: drivers/gpu/drm/i915/display/g4x_dp.h:38:
}
+static inline bool g4x_dp_init(struct intel_display *display,
total: 0 errors, 0 warnings, 2 checks, 431 lines checked
9fb9a895a185 drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display
6dbf2bf737db drm/i915/ips: convert hsw_ips.c to struct intel_display
7b731afcb780 drm/i915/display: convert assert_transcoder*() to struct intel_display
9b541f288b4c drm/i915/display: convert assert_port_valid() to struct intel_display
98bfb0c0314a drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default()
b727af307b1a drm/i915/display: convert intel_set_{cpu, pch}_fifo_underrun_reporting() to intel_display
e60d6897f59d drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display
-:960: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#960: FILE: drivers/gpu/drm/i915/display/intel_sdvo.c:3170:
+ drm_property_create_range(display->drm, 0, "right_margin", 0, data_value[0]);
-:1157: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#1157: FILE: drivers/gpu/drm/i915/display/intel_sdvo.h:28:
}
+static inline bool intel_sdvo_init(struct intel_display *display,
total: 0 errors, 1 warnings, 1 checks, 1036 lines checked
dd9f14206d5b drm/i915/display: convert intel_cpu_transcoder_mode_valid() to intel_display
d64e5e5d69be drm/i915/display: convert intel_mode_valid_max_plane_size() to intel_display
a3ee93c2794a drm/i915/dsi: convert platform checks to display->platform.<platform> style
b2d07622452e drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct intel_display
-:61: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__phy' - possible side-effects?
#61: FILE: drivers/gpu/drm/i915/display/intel_combo_phy.c:13:
+#define for_each_combo_phy(__display, __phy) \
for ((__phy) = PHY_A; (__phy) < I915_MAX_PHYS; (__phy)++) \
+ for_each_if(intel_phy_is_combo(__display, __phy))
-:67: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__phy' - possible side-effects?
#67: FILE: drivers/gpu/drm/i915/display/intel_combo_phy.c:17:
+#define for_each_combo_phy_reverse(__display, __phy) \
for ((__phy) = I915_MAX_PHYS; (__phy)-- > PHY_A;) \
+ for_each_if(intel_phy_is_combo(__display, __phy))
total: 0 errors, 0 warnings, 2 checks, 531 lines checked
f25b223c0326 drm/i915/display: convert intel_fifo_underrun.[ch] to struct intel_display
e5f913a0f834 drm/i915/display: convert i915_pipestat_enable_mask() to struct intel_display
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✓ CI.KUnit: success for drm/i915/display: conversions to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (16 preceding siblings ...)
2025-02-12 20:33 ` ✗ CI.checkpatch: warning " Patchwork
@ 2025-02-12 20:34 ` Patchwork
2025-02-12 20:51 ` ✓ CI.Build: " Patchwork
` (4 subsequent siblings)
22 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-12 20:34 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: conversions to struct intel_display
URL : https://patchwork.freedesktop.org/series/144749/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:33:34] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:33:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[20:34:04] Starting KUnit Kernel (1/1)...
[20:34:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:34:04] ================== guc_buf (11 subtests) ===================
[20:34:04] [PASSED] test_smallest
[20:34:04] [PASSED] test_largest
[20:34:04] [PASSED] test_granular
[20:34:04] [PASSED] test_unique
[20:34:04] [PASSED] test_overlap
[20:34:04] [PASSED] test_reusable
[20:34:04] [PASSED] test_too_big
[20:34:04] [PASSED] test_flush
[20:34:04] [PASSED] test_lookup
[20:34:04] [PASSED] test_data
[20:34:04] [PASSED] test_class
[20:34:04] ===================== [PASSED] guc_buf =====================
[20:34:04] =================== guc_dbm (7 subtests) ===================
[20:34:04] [PASSED] test_empty
[20:34:04] [PASSED] test_default
[20:34:04] ======================== test_size ========================
[20:34:04] [PASSED] 4
[20:34:04] [PASSED] 8
[20:34:04] [PASSED] 32
[20:34:04] [PASSED] 256
[20:34:04] ==================== [PASSED] test_size ====================
[20:34:04] ======================= test_reuse ========================
[20:34:04] [PASSED] 4
[20:34:04] [PASSED] 8
[20:34:04] [PASSED] 32
[20:34:04] [PASSED] 256
[20:34:04] =================== [PASSED] test_reuse ====================
[20:34:04] =================== test_range_overlap ====================
[20:34:04] [PASSED] 4
[20:34:04] [PASSED] 8
[20:34:04] [PASSED] 32
[20:34:04] [PASSED] 256
[20:34:04] =============== [PASSED] test_range_overlap ================
[20:34:04] =================== test_range_compact ====================
[20:34:04] [PASSED] 4
[20:34:04] [PASSED] 8
[20:34:04] [PASSED] 32
[20:34:04] [PASSED] 256
[20:34:04] =============== [PASSED] test_range_compact ================
[20:34:04] ==================== test_range_spare =====================
[20:34:04] [PASSED] 4
[20:34:04] [PASSED] 8
[20:34:04] [PASSED] 32
[20:34:04] [PASSED] 256
[20:34:04] ================ [PASSED] test_range_spare =================
[20:34:04] ===================== [PASSED] guc_dbm =====================
[20:34:04] =================== guc_idm (6 subtests) ===================
[20:34:04] [PASSED] bad_init
[20:34:04] [PASSED] no_init
[20:34:04] [PASSED] init_fini
[20:34:04] [PASSED] check_used
[20:34:04] [PASSED] check_quota
[20:34:04] [PASSED] check_all
[20:34:04] ===================== [PASSED] guc_idm =====================
[20:34:04] ================== no_relay (3 subtests) ===================
[20:34:04] [PASSED] xe_drops_guc2pf_if_not_ready
[20:34:04] [PASSED] xe_drops_guc2vf_if_not_ready
[20:34:04] [PASSED] xe_rejects_send_if_not_ready
[20:34:04] ==================== [PASSED] no_relay =====================
[20:34:04] ================== pf_relay (14 subtests) ==================
[20:34:04] [PASSED] pf_rejects_guc2pf_too_short
[20:34:04] [PASSED] pf_rejects_guc2pf_too_long
[20:34:04] [PASSED] pf_rejects_guc2pf_no_payload
[20:34:04] [PASSED] pf_fails_no_payload
[20:34:04] [PASSED] pf_fails_bad_origin
[20:34:04] [PASSED] pf_fails_bad_type
[20:34:04] [PASSED] pf_txn_reports_error
[20:34:04] [PASSED] pf_txn_sends_pf2guc
[20:34:04] [PASSED] pf_sends_pf2guc
[20:34:04] [SKIPPED] pf_loopback_nop
[20:34:04] [SKIPPED] pf_loopback_echo
[20:34:04] [SKIPPED] pf_loopback_fail
[20:34:04] [SKIPPED] pf_loopback_busy
[20:34:04] [SKIPPED] pf_loopback_retry
[20:34:04] ==================== [PASSED] pf_relay =====================
[20:34:04] ================== vf_relay (3 subtests) ===================
[20:34:04] [PASSED] vf_rejects_guc2vf_too_short
[20:34:04] [PASSED] vf_rejects_guc2vf_too_long
[20:34:04] [PASSED] vf_rejects_guc2vf_no_payload
[20:34:04] ==================== [PASSED] vf_relay =====================
[20:34:04] ================= pf_service (11 subtests) =================
[20:34:04] [PASSED] pf_negotiate_any
[20:34:04] [PASSED] pf_negotiate_base_match
[20:34:04] [PASSED] pf_negotiate_base_newer
[20:34:04] [PASSED] pf_negotiate_base_next
[20:34:04] [SKIPPED] pf_negotiate_base_older
[20:34:04] [PASSED] pf_negotiate_base_prev
[20:34:04] [PASSED] pf_negotiate_latest_match
[20:34:04] [PASSED] pf_negotiate_latest_newer
[20:34:04] [PASSED] pf_negotiate_latest_next
[20:34:04] [SKIPPED] pf_negotiate_latest_older
[20:34:04] [SKIPPED] pf_negotiate_latest_prev
[20:34:04] =================== [PASSED] pf_service ====================
[20:34:04] ===================== lmtt (1 subtest) =====================
[20:34:04] ======================== test_ops =========================
[20:34:04] [PASSED] 2-level
[20:34:04] [PASSED] multi-level
[20:34:04] ==================== [PASSED] test_ops =====================
[20:34:04] ====================== [PASSED] lmtt =======================
[20:34:04] =================== xe_mocs (2 subtests) ===================
[20:34:04] ================ xe_live_mocs_kernel_kunit ================
[20:34:04] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:34:04] ================ xe_live_mocs_reset_kunit =================
[20:34:04] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:34:04] ==================== [SKIPPED] xe_mocs =====================
[20:34:04] ================= xe_migrate (2 subtests) ==================
[20:34:04] ================= xe_migrate_sanity_kunit =================
[20:34:04] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:34:04] ================== xe_validate_ccs_kunit ==================
[20:34:04] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:34:04] =================== [SKIPPED] xe_migrate ===================
[20:34:04] ================== xe_dma_buf (1 subtest) ==================
[20:34:04] ==================== xe_dma_buf_kunit =====================
[20:34:04] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:34:04] =================== [SKIPPED] xe_dma_buf ===================
[20:34:04] ================= xe_bo_shrink (1 subtest) =================
[20:34:04] =================== xe_bo_shrink_kunit ====================
[20:34:04] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:34:04] ================== [SKIPPED] xe_bo_shrink ==================
[20:34:04] ==================== xe_bo (2 subtests) ====================
[20:34:04] ================== xe_ccs_migrate_kunit ===================
[20:34:04] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
stty: 'standard input': Inappropriate ioctl for device
[20:34:04] ==================== xe_bo_evict_kunit ====================
[20:34:04] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:34:04] ===================== [SKIPPED] xe_bo ======================
[20:34:04] ==================== args (11 subtests) ====================
[20:34:04] [PASSED] count_args_test
[20:34:04] [PASSED] call_args_example
[20:34:04] [PASSED] call_args_test
[20:34:04] [PASSED] drop_first_arg_example
[20:34:04] [PASSED] drop_first_arg_test
[20:34:04] [PASSED] first_arg_example
[20:34:04] [PASSED] first_arg_test
[20:34:04] [PASSED] last_arg_example
[20:34:04] [PASSED] last_arg_test
[20:34:04] [PASSED] pick_arg_example
[20:34:04] [PASSED] sep_comma_example
[20:34:04] ====================== [PASSED] args =======================
[20:34:04] =================== xe_pci (2 subtests) ====================
[20:34:04] [PASSED] xe_gmdid_graphics_ip
[20:34:04] [PASSED] xe_gmdid_media_ip
[20:34:04] ===================== [PASSED] xe_pci ======================
[20:34:04] =================== xe_rtp (2 subtests) ====================
[20:34:04] =============== xe_rtp_process_to_sr_tests ================
[20:34:04] [PASSED] coalesce-same-reg
[20:34:04] [PASSED] no-match-no-add
[20:34:04] [PASSED] match-or
[20:34:04] [PASSED] match-or-xfail
[20:34:04] [PASSED] no-match-no-add-multiple-rules
[20:34:04] [PASSED] two-regs-two-entries
[20:34:04] [PASSED] clr-one-set-other
[20:34:04] [PASSED] set-field
[20:34:04] [PASSED] conflict-duplicate
[20:34:04] [PASSED] conflict-not-disjoint
[20:34:04] [PASSED] conflict-reg-type
[20:34:04] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:34:04] ================== xe_rtp_process_tests ===================
[20:34:04] [PASSED] active1
[20:34:04] [PASSED] active2
[20:34:04] [PASSED] active-inactive
[20:34:04] [PASSED] inactive-active
[20:34:04] [PASSED] inactive-1st_or_active-inactive
[20:34:04] [PASSED] inactive-2nd_or_active-inactive
[20:34:04] [PASSED] inactive-last_or_active-inactive
[20:34:04] [PASSED] inactive-no_or_active-inactive
[20:34:04] ============== [PASSED] xe_rtp_process_tests ===============
[20:34:04] ===================== [PASSED] xe_rtp ======================
[20:34:04] ==================== xe_wa (1 subtest) =====================
[20:34:04] ======================== xe_wa_gt =========================
[20:34:04] [PASSED] TIGERLAKE (B0)
[20:34:04] [PASSED] DG1 (A0)
[20:34:04] [PASSED] DG1 (B0)
[20:34:04] [PASSED] ALDERLAKE_S (A0)
[20:34:04] [PASSED] ALDERLAKE_S (B0)
[20:34:04] [PASSED] ALDERLAKE_S (C0)
[20:34:04] [PASSED] ALDERLAKE_S (D0)
[20:34:04] [PASSED] ALDERLAKE_P (A0)
[20:34:04] [PASSED] ALDERLAKE_P (B0)
[20:34:04] [PASSED] ALDERLAKE_P (C0)
[20:34:04] [PASSED] ALDERLAKE_S_RPLS (D0)
[20:34:04] [PASSED] ALDERLAKE_P_RPLU (E0)
[20:34:04] [PASSED] DG2_G10 (C0)
[20:34:04] [PASSED] DG2_G11 (B1)
[20:34:04] [PASSED] DG2_G12 (A1)
[20:34:04] [PASSED] METEORLAKE (g:A0, m:A0)
[20:34:04] [PASSED] METEORLAKE (g:A0, m:A0)
[20:34:04] [PASSED] METEORLAKE (g:A0, m:A0)
[20:34:04] [PASSED] LUNARLAKE (g:A0, m:A0)
[20:34:04] [PASSED] LUNARLAKE (g:B0, m:A0)
[20:34:04] [PASSED] BATTLEMAGE (g:A0, m:A1)
[20:34:04] ==================== [PASSED] xe_wa_gt =====================
[20:34:04] ====================== [PASSED] xe_wa ======================
[20:34:04] ============================================================
[20:34:04] Testing complete. Ran 133 tests: passed: 117, skipped: 16
[20:34:04] Elapsed time: 30.473s total, 4.253s configuring, 25.954s building, 0.256s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:34:05] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:34:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[20:34:27] Starting KUnit Kernel (1/1)...
[20:34:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:34:27] =========== drm_validate_clone_mode (2 subtests) ===========
[20:34:27] ============== drm_test_check_in_clone_mode ===============
[20:34:27] [PASSED] in_clone_mode
[20:34:27] [PASSED] not_in_clone_mode
[20:34:27] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:34:27] =============== drm_test_check_valid_clones ===============
[20:34:27] [PASSED] not_in_clone_mode
[20:34:27] [PASSED] valid_clone
[20:34:27] [PASSED] invalid_clone
[20:34:27] =========== [PASSED] drm_test_check_valid_clones ===========
[20:34:27] ============= [PASSED] drm_validate_clone_mode =============
[20:34:27] ============= drm_validate_modeset (1 subtest) =============
[20:34:27] [PASSED] drm_test_check_connector_changed_modeset
[20:34:27] ============== [PASSED] drm_validate_modeset ===============
[20:34:27] ================== drm_buddy (7 subtests) ==================
[20:34:27] [PASSED] drm_test_buddy_alloc_limit
[20:34:27] [PASSED] drm_test_buddy_alloc_optimistic
[20:34:27] [PASSED] drm_test_buddy_alloc_pessimistic
[20:34:27] [PASSED] drm_test_buddy_alloc_pathological
[20:34:27] [PASSED] drm_test_buddy_alloc_contiguous
[20:34:27] [PASSED] drm_test_buddy_alloc_clear
[20:34:27] [PASSED] drm_test_buddy_alloc_range_bias
[20:34:27] ==================== [PASSED] drm_buddy ====================
[20:34:27] ============= drm_cmdline_parser (40 subtests) =============
[20:34:27] [PASSED] drm_test_cmdline_force_d_only
[20:34:27] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:34:27] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:34:27] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:34:27] [PASSED] drm_test_cmdline_force_e_only
[20:34:27] [PASSED] drm_test_cmdline_res
[20:34:27] [PASSED] drm_test_cmdline_res_vesa
[20:34:27] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:34:27] [PASSED] drm_test_cmdline_res_rblank
[20:34:27] [PASSED] drm_test_cmdline_res_bpp
[20:34:27] [PASSED] drm_test_cmdline_res_refresh
[20:34:27] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:34:27] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:34:27] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:34:27] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:34:27] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:34:27] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:34:27] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:34:27] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:34:27] [PASSED] drm_test_cmdline_res_margins_force_on
[20:34:27] [PASSED] drm_test_cmdline_res_vesa_margins
[20:34:27] [PASSED] drm_test_cmdline_name
[20:34:27] [PASSED] drm_test_cmdline_name_bpp
[20:34:27] [PASSED] drm_test_cmdline_name_option
[20:34:27] [PASSED] drm_test_cmdline_name_bpp_option
[20:34:27] [PASSED] drm_test_cmdline_rotate_0
[20:34:27] [PASSED] drm_test_cmdline_rotate_90
[20:34:27] [PASSED] drm_test_cmdline_rotate_180
[20:34:27] [PASSED] drm_test_cmdline_rotate_270
[20:34:27] [PASSED] drm_test_cmdline_hmirror
[20:34:27] [PASSED] drm_test_cmdline_vmirror
[20:34:27] [PASSED] drm_test_cmdline_margin_options
[20:34:27] [PASSED] drm_test_cmdline_multiple_options
[20:34:27] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:34:27] [PASSED] drm_test_cmdline_extra_and_option
[20:34:27] [PASSED] drm_test_cmdline_freestanding_options
[20:34:27] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:34:27] [PASSED] drm_test_cmdline_panel_orientation
[20:34:27] ================ drm_test_cmdline_invalid =================
[20:34:27] [PASSED] margin_only
[20:34:27] [PASSED] interlace_only
[20:34:27] [PASSED] res_missing_x
[20:34:27] [PASSED] res_missing_y
[20:34:27] [PASSED] res_bad_y
[20:34:27] [PASSED] res_missing_y_bpp
[20:34:27] [PASSED] res_bad_bpp
[20:34:27] [PASSED] res_bad_refresh
[20:34:27] [PASSED] res_bpp_refresh_force_on_off
[20:34:27] [PASSED] res_invalid_mode
[20:34:27] [PASSED] res_bpp_wrong_place_mode
[20:34:27] [PASSED] name_bpp_refresh
[20:34:27] [PASSED] name_refresh
[20:34:27] [PASSED] name_refresh_wrong_mode
[20:34:27] [PASSED] name_refresh_invalid_mode
[20:34:27] [PASSED] rotate_multiple
[20:34:27] [PASSED] rotate_invalid_val
[20:34:27] [PASSED] rotate_truncated
[20:34:27] [PASSED] invalid_option
[20:34:27] [PASSED] invalid_tv_option
[20:34:27] [PASSED] truncated_tv_option
[20:34:27] ============ [PASSED] drm_test_cmdline_invalid =============
[20:34:27] =============== drm_test_cmdline_tv_options ===============
[20:34:27] [PASSED] NTSC
[20:34:27] [PASSED] NTSC_443
[20:34:27] [PASSED] NTSC_J
[20:34:27] [PASSED] PAL
[20:34:27] [PASSED] PAL_M
[20:34:27] [PASSED] PAL_N
[20:34:27] [PASSED] SECAM
[20:34:27] [PASSED] MONO_525
[20:34:27] [PASSED] MONO_625
[20:34:27] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:34:27] =============== [PASSED] drm_cmdline_parser ================
[20:34:27] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:34:27] [PASSED] drm_test_connector_hdmi_init_valid
[20:34:27] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:34:27] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:34:27] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:34:27] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:34:27] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:34:27] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:34:27] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:34:27] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:34:27] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:34:27] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:34:27] [PASSED] supported_formats=0x3 yuv420_allowed=1
[20:34:27] [PASSED] supported_formats=0x3 yuv420_allowed=0
[20:34:27] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:34:27] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:34:27] [PASSED] drm_test_connector_hdmi_init_null_product
[20:34:27] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:34:27] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:34:27] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:34:27] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:34:27] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:34:27] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:34:27] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:34:27] ========= drm_test_connector_hdmi_init_type_valid =========
[20:34:27] [PASSED] HDMI-A
[20:34:27] [PASSED] HDMI-B
[20:34:27] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:34:27] ======== drm_test_connector_hdmi_init_type_invalid ========
[20:34:27] [PASSED] Unknown
[20:34:27] [PASSED] VGA
[20:34:27] [PASSED] DVI-I
[20:34:27] [PASSED] DVI-D
[20:34:27] [PASSED] DVI-A
[20:34:27] [PASSED] Composite
[20:34:27] [PASSED] SVIDEO
[20:34:27] [PASSED] LVDS
[20:34:27] [PASSED] Component
[20:34:27] [PASSED] DIN
[20:34:27] [PASSED] DP
[20:34:27] [PASSED] TV
[20:34:27] [PASSED] eDP
[20:34:27] [PASSED] Virtual
[20:34:27] [PASSED] DSI
[20:34:27] [PASSED] DPI
[20:34:27] [PASSED] Writeback
[20:34:27] [PASSED] SPI
[20:34:27] [PASSED] USB
[20:34:27] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:34:27] ============ [PASSED] drmm_connector_hdmi_init =============
[20:34:27] ============= drmm_connector_init (3 subtests) =============
[20:34:27] [PASSED] drm_test_drmm_connector_init
[20:34:27] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:34:27] ========= drm_test_drmm_connector_init_type_valid =========
[20:34:27] [PASSED] Unknown
[20:34:27] [PASSED] VGA
[20:34:27] [PASSED] DVI-I
[20:34:27] [PASSED] DVI-D
[20:34:27] [PASSED] DVI-A
[20:34:27] [PASSED] Composite
[20:34:27] [PASSED] SVIDEO
[20:34:27] [PASSED] LVDS
[20:34:27] [PASSED] Component
[20:34:27] [PASSED] DIN
[20:34:27] [PASSED] DP
[20:34:27] [PASSED] HDMI-A
[20:34:27] [PASSED] HDMI-B
[20:34:27] [PASSED] TV
[20:34:27] [PASSED] eDP
[20:34:27] [PASSED] Virtual
[20:34:27] [PASSED] DSI
[20:34:27] [PASSED] DPI
[20:34:27] [PASSED] Writeback
[20:34:27] [PASSED] SPI
[20:34:27] [PASSED] USB
[20:34:27] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:34:27] =============== [PASSED] drmm_connector_init ===============
[20:34:27] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_init
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:34:27] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[20:34:27] [PASSED] Unknown
[20:34:27] [PASSED] VGA
[20:34:27] [PASSED] DVI-I
[20:34:27] [PASSED] DVI-D
[20:34:27] [PASSED] DVI-A
[20:34:27] [PASSED] Composite
[20:34:27] [PASSED] SVIDEO
[20:34:27] [PASSED] LVDS
[20:34:27] [PASSED] Component
[20:34:27] [PASSED] DIN
[20:34:27] [PASSED] DP
[20:34:27] [PASSED] HDMI-A
[20:34:27] [PASSED] HDMI-B
[20:34:27] [PASSED] TV
[20:34:27] [PASSED] eDP
[20:34:27] [PASSED] Virtual
[20:34:27] [PASSED] DSI
[20:34:27] [PASSED] DPI
[20:34:27] [PASSED] Writeback
[20:34:27] [PASSED] SPI
[20:34:27] [PASSED] USB
[20:34:27] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:34:27] ======== drm_test_drm_connector_dynamic_init_name =========
[20:34:27] [PASSED] Unknown
[20:34:27] [PASSED] VGA
[20:34:27] [PASSED] DVI-I
[20:34:27] [PASSED] DVI-D
[20:34:27] [PASSED] DVI-A
[20:34:27] [PASSED] Composite
[20:34:27] [PASSED] SVIDEO
[20:34:27] [PASSED] LVDS
[20:34:27] [PASSED] Component
[20:34:27] [PASSED] DIN
[20:34:27] [PASSED] DP
[20:34:27] [PASSED] HDMI-A
[20:34:27] [PASSED] HDMI-B
[20:34:27] [PASSED] TV
[20:34:27] [PASSED] eDP
[20:34:27] [PASSED] Virtual
[20:34:27] [PASSED] DSI
[20:34:27] [PASSED] DPI
[20:34:27] [PASSED] Writeback
[20:34:27] [PASSED] SPI
[20:34:27] [PASSED] USB
[20:34:27] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:34:27] =========== [PASSED] drm_connector_dynamic_init ============
[20:34:27] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:34:27] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:34:27] ======= drm_connector_dynamic_register (7 subtests) ========
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:34:27] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:34:27] ========= [PASSED] drm_connector_dynamic_register ==========
[20:34:27] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:34:27] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:34:27] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:34:27] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:34:27] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:34:27] ========== drm_test_get_tv_mode_from_name_valid ===========
[20:34:27] [PASSED] NTSC
[20:34:27] [PASSED] NTSC-443
[20:34:27] [PASSED] NTSC-J
[20:34:27] [PASSED] PAL
[20:34:27] [PASSED] PAL-M
[20:34:27] [PASSED] PAL-N
[20:34:27] [PASSED] SECAM
[20:34:27] [PASSED] Mono
[20:34:27] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:34:27] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:34:27] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:34:27] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:34:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:34:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:34:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:34:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:34:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:34:27] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:34:27] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[20:34:27] [PASSED] VIC 96
[20:34:27] [PASSED] VIC 97
[20:34:27] [PASSED] VIC 101
[20:34:27] [PASSED] VIC 102
[20:34:27] [PASSED] VIC 106
[20:34:27] [PASSED] VIC 107
[20:34:27] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:34:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:34:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:34:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:34:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:34:27] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:34:27] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:34:27] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:34:27] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[20:34:27] [PASSED] Automatic
[20:34:27] [PASSED] Full
[20:34:27] [PASSED] Limited 16:235
[20:34:27] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:34:27] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:34:27] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:34:27] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:34:27] === drm_test_drm_hdmi_connector_get_output_format_name ====
[20:34:27] [PASSED] RGB
[20:34:27] [PASSED] YUV 4:2:0
[20:34:27] [PASSED] YUV 4:2:2
[20:34:27] [PASSED] YUV 4:4:4
[20:34:27] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:34:27] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:34:27] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:34:27] ============= drm_damage_helper (21 subtests) ==============
[20:34:27] [PASSED] drm_test_damage_iter_no_damage
[20:34:27] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:34:27] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:34:27] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:34:27] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:34:27] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:34:27] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:34:27] [PASSED] drm_test_damage_iter_simple_damage
[20:34:27] [PASSED] drm_test_damage_iter_single_damage
[20:34:27] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:34:27] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:34:27] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:34:27] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:34:27] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:34:27] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:34:27] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:34:27] [PASSED] drm_test_damage_iter_damage
[20:34:27] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:34:27] [PASSED] drm_test_damage_iter_damage_one_outside
[20:34:27] [PASSED] drm_test_damage_iter_damage_src_moved
[20:34:27] [PASSED] drm_test_damage_iter_damage_not_visible
[20:34:27] ================ [PASSED] drm_damage_helper ================
[20:34:27] ============== drm_dp_mst_helper (3 subtests) ==============
[20:34:27] ============== drm_test_dp_mst_calc_pbn_mode ==============
[20:34:27] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:34:27] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:34:27] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:34:27] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:34:27] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:34:27] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:34:27] ============== drm_test_dp_mst_calc_pbn_div ===============
[20:34:27] [PASSED] Link rate 2000000 lane count 4
[20:34:27] [PASSED] Link rate 2000000 lane count 2
[20:34:27] [PASSED] Link rate 2000000 lane count 1
[20:34:27] [PASSED] Link rate 1350000 lane count 4
[20:34:27] [PASSED] Link rate 1350000 lane count 2
[20:34:27] [PASSED] Link rate 1350000 lane count 1
[20:34:27] [PASSED] Link rate 1000000 lane count 4
[20:34:27] [PASSED] Link rate 1000000 lane count 2
[20:34:27] [PASSED] Link rate 1000000 lane count 1
[20:34:27] [PASSED] Link rate 810000 lane count 4
[20:34:27] [PASSED] Link rate 810000 lane count 2
[20:34:27] [PASSED] Link rate 810000 lane count 1
[20:34:27] [PASSED] Link rate 540000 lane count 4
[20:34:27] [PASSED] Link rate 540000 lane count 2
[20:34:27] [PASSED] Link rate 540000 lane count 1
[20:34:27] [PASSED] Link rate 270000 lane count 4
[20:34:27] [PASSED] Link rate 270000 lane count 2
[20:34:27] [PASSED] Link rate 270000 lane count 1
[20:34:27] [PASSED] Link rate 162000 lane count 4
[20:34:27] [PASSED] Link rate 162000 lane count 2
[20:34:27] [PASSED] Link rate 162000 lane count 1
[20:34:27] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:34:27] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[20:34:27] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:34:27] [PASSED] DP_POWER_UP_PHY with port number
[20:34:27] [PASSED] DP_POWER_DOWN_PHY with port number
[20:34:27] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:34:27] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:34:27] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:34:27] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:34:27] [PASSED] DP_QUERY_PAYLOAD with port number
[20:34:27] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:34:27] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:34:27] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:34:27] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:34:27] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:34:27] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:34:27] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:34:27] [PASSED] DP_REMOTE_I2C_READ with port number
[20:34:27] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:34:27] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:34:27] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:34:27] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:34:27] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:34:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:34:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:34:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:34:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:34:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:34:27] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:34:27] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:34:27] ================ [PASSED] drm_dp_mst_helper ================
[20:34:27] ================== drm_exec (7 subtests) ===================
[20:34:27] [PASSED] sanitycheck
[20:34:27] [PASSED] test_lock
[20:34:27] [PASSED] test_lock_unlock
[20:34:27] [PASSED] test_duplicates
[20:34:27] [PASSED] test_prepare
[20:34:27] [PASSED] test_prepare_array
[20:34:27] [PASSED] test_multiple_loops
[20:34:27] ==================== [PASSED] drm_exec =====================
[20:34:27] =========== drm_format_helper_test (17 subtests) ===========
[20:34:27] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:34:27] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:34:27] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:34:27] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:34:27] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:34:27] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:34:27] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:34:27] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:34:27] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:34:27] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:34:27] ============== drm_test_fb_xrgb8888_to_mono ===============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:34:27] ==================== drm_test_fb_swab =====================
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ================ [PASSED] drm_test_fb_swab =================
[20:34:27] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:34:27] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[20:34:27] [PASSED] single_pixel_source_buffer
[20:34:27] [PASSED] single_pixel_clip_rectangle
[20:34:27] [PASSED] well_known_colors
[20:34:27] [PASSED] destination_pitch
[20:34:27] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:34:27] ================= drm_test_fb_clip_offset =================
[20:34:27] [PASSED] pass through
[20:34:27] [PASSED] horizontal offset
[20:34:27] [PASSED] vertical offset
[20:34:27] [PASSED] horizontal and vertical offset
[20:34:27] [PASSED] horizontal offset (custom pitch)
[20:34:27] [PASSED] vertical offset (custom pitch)
[20:34:27] [PASSED] horizontal and vertical offset (custom pitch)
[20:34:27] ============= [PASSED] drm_test_fb_clip_offset =============
[20:34:27] ============== drm_test_fb_build_fourcc_list ==============
[20:34:27] [PASSED] no native formats
[20:34:27] [PASSED] XRGB8888 as native format
[20:34:27] [PASSED] remove duplicates
[20:34:27] [PASSED] convert alpha formats
[20:34:27] [PASSED] random formats
[20:34:27] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[20:34:27] =================== drm_test_fb_memcpy ====================
[20:34:27] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:34:27] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:34:27] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:34:27] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:34:27] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:34:27] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:34:27] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:34:27] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:34:27] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:34:27] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:34:27] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:34:27] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:34:27] =============== [PASSED] drm_test_fb_memcpy ================
[20:34:27] ============= [PASSED] drm_format_helper_test ==============
[20:34:27] ================= drm_format (18 subtests) =================
[20:34:27] [PASSED] drm_test_format_block_width_invalid
[20:34:27] [PASSED] drm_test_format_block_width_one_plane
[20:34:27] [PASSED] drm_test_format_block_width_two_plane
[20:34:27] [PASSED] drm_test_format_block_width_three_plane
[20:34:27] [PASSED] drm_test_format_block_width_tiled
[20:34:27] [PASSED] drm_test_format_block_height_invalid
[20:34:27] [PASSED] drm_test_format_block_height_one_plane
[20:34:27] [PASSED] drm_test_format_block_height_two_plane
[20:34:27] [PASSED] drm_test_format_block_height_three_plane
[20:34:27] [PASSED] drm_test_format_block_height_tiled
[20:34:27] [PASSED] drm_test_format_min_pitch_invalid
[20:34:27] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:34:27] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:34:27] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:34:27] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:34:27] [PASSED] drm_test_format_min_pitch_two_plane
[20:34:27] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:34:27] [PASSED] drm_test_format_min_pitch_tiled
[20:34:27] =================== [PASSED] drm_format ====================
[20:34:27] ============== drm_framebuffer (10 subtests) ===============
[20:34:27] ========== drm_test_framebuffer_check_src_coords ==========
[20:34:27] [PASSED] Success: source fits into fb
[20:34:27] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:34:27] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:34:27] [PASSED] Fail: overflowing fb with source width
[20:34:27] [PASSED] Fail: overflowing fb with source height
[20:34:27] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:34:27] [PASSED] drm_test_framebuffer_cleanup
[20:34:27] =============== drm_test_framebuffer_create ===============
[20:34:27] [PASSED] ABGR8888 normal sizes
[20:34:27] [PASSED] ABGR8888 max sizes
[20:34:27] [PASSED] ABGR8888 pitch greater than min required
[20:34:27] [PASSED] ABGR8888 pitch less than min required
[20:34:27] [PASSED] ABGR8888 Invalid width
[20:34:27] [PASSED] ABGR8888 Invalid buffer handle
[20:34:27] [PASSED] No pixel format
[20:34:27] [PASSED] ABGR8888 Width 0
[20:34:27] [PASSED] ABGR8888 Height 0
[20:34:27] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:34:27] [PASSED] ABGR8888 Large buffer offset
[20:34:27] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:34:27] [PASSED] ABGR8888 Invalid flag
[20:34:27] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:34:27] [PASSED] ABGR8888 Valid buffer modifier
[20:34:27] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:34:27] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:34:27] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:34:27] [PASSED] NV12 Normal sizes
[20:34:27] [PASSED] NV12 Max sizes
[20:34:27] [PASSED] NV12 Invalid pitch
[20:34:27] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:34:27] [PASSED] NV12 different modifier per-plane
[20:34:27] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:34:27] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:34:27] [PASSED] NV12 Modifier for inexistent plane
[20:34:27] [PASSED] NV12 Handle for inexistent plane
[20:34:27] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:34:27] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:34:27] [PASSED] YVU420 Normal sizes
[20:34:27] [PASSED] YVU420 Max sizes
[20:34:27] [PASSED] YVU420 Invalid pitch
[20:34:27] [PASSED] YVU420 Different pitches
[20:34:27] [PASSED] YVU420 Different buffer offsets/pitches
[20:34:27] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:34:27] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:34:27] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:34:27] [PASSED] YVU420 Valid modifier
[20:34:27] [PASSED] YVU420 Different modifiers per plane
[20:34:27] [PASSED] YVU420 Modifier for inexistent plane
[20:34:27] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:34:27] [PASSED] X0L2 Normal sizes
[20:34:27] [PASSED] X0L2 Max sizes
[20:34:27] [PASSED] X0L2 Invalid pitch
[20:34:27] [PASSED] X0L2 Pitch greater than minimum required
[20:34:27] [PASSED] X0L2 Handle for inexistent plane
[20:34:27] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:34:27] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:34:27] [PASSED] X0L2 Valid modifier
[20:34:27] [PASSED] X0L2 Modifier for inexistent plane
[20:34:27] =========== [PASSED] drm_test_framebuffer_create ===========
[20:34:27] [PASSED] drm_test_framebuffer_free
[20:34:27] [PASSED] drm_test_framebuffer_init
[20:34:27] [PASSED] drm_test_framebuffer_init_bad_format
[20:34:27] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:34:27] [PASSED] drm_test_framebuffer_lookup
[20:34:27] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:34:27] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:34:27] ================= [PASSED] drm_framebuffer =================
[20:34:27] ================ drm_gem_shmem (8 subtests) ================
[20:34:27] [PASSED] drm_gem_shmem_test_obj_create
[20:34:27] [PASSED] drm_gem_shmem_test_obj_create_private
[20:34:27] [PASSED] drm_gem_shmem_test_pin_pages
[20:34:27] [PASSED] drm_gem_shmem_test_vmap
[20:34:27] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:34:27] [PASSED] drm_gem_shmem_test_get_sg_table
[20:34:27] [PASSED] drm_gem_shmem_test_madvise
[20:34:27] [PASSED] drm_gem_shmem_test_purge
[20:34:27] ================== [PASSED] drm_gem_shmem ==================
[20:34:27] === drm_atomic_helper_connector_hdmi_check (23 subtests) ===
[20:34:27] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:34:27] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:34:27] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:34:27] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:34:27] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:34:27] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:34:27] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:34:27] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:34:27] [PASSED] drm_test_check_disable_connector
[20:34:27] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:34:27] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback
[20:34:27] [PASSED] drm_test_check_max_tmds_rate_format_fallback
[20:34:27] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:34:27] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:34:27] [PASSED] drm_test_check_output_bpc_dvi
[20:34:27] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:34:27] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:34:27] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:34:27] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:34:27] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:34:27] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:34:27] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:34:27] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:34:27] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:34:27] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:34:27] [PASSED] drm_test_check_broadcast_rgb_value
[20:34:27] [PASSED] drm_test_check_bpc_8_value
[20:34:27] [PASSED] drm_test_check_bpc_10_value
[20:34:27] [PASSED] drm_test_check_bpc_12_value
[20:34:27] [PASSED] drm_test_check_format_value
[20:34:27] [PASSED] drm_test_check_tmds_char_value
[20:34:27] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:34:27] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:34:27] [PASSED] drm_test_check_mode_valid
[20:34:27] [PASSED] drm_test_check_mode_valid_reject
[20:34:27] [PASSED] drm_test_check_mode_valid_reject_rate
[20:34:27] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:34:27] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:34:27] ================= drm_managed (2 subtests) =================
[20:34:27] [PASSED] drm_test_managed_release_action
[20:34:27] [PASSED] drm_test_managed_run_action
[20:34:27] =================== [PASSED] drm_managed ===================
[20:34:27] =================== drm_mm (6 subtests) ====================
[20:34:27] [PASSED] drm_test_mm_init
[20:34:27] [PASSED] drm_test_mm_debug
[20:34:27] [PASSED] drm_test_mm_align32
[20:34:27] [PASSED] drm_test_mm_align64
[20:34:27] [PASSED] drm_test_mm_lowest
[20:34:27] [PASSED] drm_test_mm_highest
[20:34:27] ===================== [PASSED] drm_mm ======================
[20:34:27] ============= drm_modes_analog_tv (5 subtests) =============
[20:34:27] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:34:27] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:34:27] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:34:27] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:34:27] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:34:27] =============== [PASSED] drm_modes_analog_tv ===============
[20:34:27] ============== drm_plane_helper (2 subtests) ===============
[20:34:27] =============== drm_test_check_plane_state ================
[20:34:27] [PASSED] clipping_simple
[20:34:27] [PASSED] clipping_rotate_reflect
[20:34:27] [PASSED] positioning_simple
[20:34:27] [PASSED] upscaling
[20:34:27] [PASSED] downscaling
[20:34:27] [PASSED] rounding1
[20:34:27] [PASSED] rounding2
[20:34:27] [PASSED] rounding3
[20:34:27] [PASSED] rounding4
[20:34:27] =========== [PASSED] drm_test_check_plane_state ============
[20:34:27] =========== drm_test_check_invalid_plane_state ============
[20:34:27] [PASSED] positioning_invalid
[20:34:27] [PASSED] upscaling_invalid
[20:34:27] [PASSED] downscaling_invalid
[20:34:27] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:34:27] ================ [PASSED] drm_plane_helper =================
[20:34:27] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:34:27] ====== drm_test_connector_helper_tv_get_modes_check =======
[20:34:27] [PASSED] None
[20:34:27] [PASSED] PAL
[20:34:27] [PASSED] NTSC
[20:34:27] [PASSED] Both, NTSC Default
[20:34:27] [PASSED] Both, PAL Default
[20:34:27] [PASSED] Both, NTSC Default, with PAL on command-line
[20:34:27] [PASSED] Both, PAL Default, with NTSC on command-line
[20:34:27] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:34:27] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:34:27] ================== drm_rect (9 subtests) ===================
[20:34:27] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:34:27] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:34:27] [PASSED] drm_test_rect_clip_scaled_clipped
[20:34:27] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:34:27] ================= drm_test_rect_intersect =================
[20:34:27] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:34:27] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:34:27] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:34:27] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:34:27] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:34:27] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:34:27] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:34:27] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:34:27] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:34:27] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:34:27] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:34:27] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:34:27] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:34:27] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:34:27] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:34:27] ============= [PASSED] drm_test_rect_intersect =============
[20:34:27] ================ drm_test_rect_calc_hscale ================
[20:34:27] [PASSED] normal use
[20:34:27] [PASSED] out of max range
[20:34:27] [PASSED] out of min range
[20:34:27] [PASSED] zero dst
[20:34:27] [PASSED] negative src
[20:34:27] [PASSED] negative dst
[20:34:27] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:34:27] ================ drm_test_rect_calc_vscale ================
[20:34:27] [PASSED] normal use
[20:34:27] [PASSED] out of max range
[20:34:27] [PASSED] out of min range
[20:34:27] [PASSED] zero dst
[20:34:27] [PASSED] negative src
[20:34:27] [PASSED] negative dst
[20:34:27] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:34:27] ================== drm_test_rect_rotate ===================
[20:34:27] [PASSED] reflect-x
[20:34:27] [PASSED] reflect-y
[20:34:27] [PASSED] rotate-0
[20:34:27] [PASSED] rotate-90
[20:34:27] [PASSED] rotate-180
[20:34:27] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[20:34:27] ============== [PASSED] drm_test_rect_rotate ===============
[20:34:27] ================ drm_test_rect_rotate_inv =================
[20:34:27] [PASSED] reflect-x
[20:34:27] [PASSED] reflect-y
[20:34:27] [PASSED] rotate-0
[20:34:27] [PASSED] rotate-90
[20:34:27] [PASSED] rotate-180
[20:34:27] [PASSED] rotate-270
[20:34:27] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:34:27] ==================== [PASSED] drm_rect =====================
[20:34:27] ============================================================
[20:34:27] Testing complete. Ran 598 tests: passed: 598
[20:34:27] Elapsed time: 22.945s total, 1.634s configuring, 21.144s building, 0.143s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:34:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:34:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
[20:34:37] Starting KUnit Kernel (1/1)...
[20:34:37] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:34:37] ================= ttm_device (5 subtests) ==================
[20:34:37] [PASSED] ttm_device_init_basic
[20:34:37] [PASSED] ttm_device_init_multiple
[20:34:37] [PASSED] ttm_device_fini_basic
[20:34:37] [PASSED] ttm_device_init_no_vma_man
[20:34:37] ================== ttm_device_init_pools ==================
[20:34:37] [PASSED] No DMA allocations, no DMA32 required
[20:34:37] [PASSED] DMA allocations, DMA32 required
[20:34:37] [PASSED] No DMA allocations, DMA32 required
[20:34:37] [PASSED] DMA allocations, no DMA32 required
[20:34:37] ============== [PASSED] ttm_device_init_pools ==============
[20:34:37] =================== [PASSED] ttm_device ====================
[20:34:37] ================== ttm_pool (8 subtests) ===================
[20:34:37] ================== ttm_pool_alloc_basic ===================
[20:34:37] [PASSED] One page
[20:34:37] [PASSED] More than one page
[20:34:37] [PASSED] Above the allocation limit
[20:34:37] [PASSED] One page, with coherent DMA mappings enabled
[20:34:37] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:34:37] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:34:37] ============== ttm_pool_alloc_basic_dma_addr ==============
[20:34:37] [PASSED] One page
[20:34:37] [PASSED] More than one page
[20:34:37] [PASSED] Above the allocation limit
[20:34:37] [PASSED] One page, with coherent DMA mappings enabled
[20:34:37] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:34:37] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:34:37] [PASSED] ttm_pool_alloc_order_caching_match
[20:34:37] [PASSED] ttm_pool_alloc_caching_mismatch
[20:34:37] [PASSED] ttm_pool_alloc_order_mismatch
[20:34:37] [PASSED] ttm_pool_free_dma_alloc
[20:34:37] [PASSED] ttm_pool_free_no_dma_alloc
[20:34:37] [PASSED] ttm_pool_fini_basic
[20:34:37] ==================== [PASSED] ttm_pool =====================
[20:34:37] ================ ttm_resource (8 subtests) =================
[20:34:37] ================= ttm_resource_init_basic =================
[20:34:37] [PASSED] Init resource in TTM_PL_SYSTEM
[20:34:37] [PASSED] Init resource in TTM_PL_VRAM
[20:34:37] [PASSED] Init resource in a private placement
[20:34:37] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:34:37] ============= [PASSED] ttm_resource_init_basic =============
[20:34:37] [PASSED] ttm_resource_init_pinned
[20:34:37] [PASSED] ttm_resource_fini_basic
[20:34:37] [PASSED] ttm_resource_manager_init_basic
[20:34:37] [PASSED] ttm_resource_manager_usage_basic
[20:34:37] [PASSED] ttm_resource_manager_set_used_basic
[20:34:37] [PASSED] ttm_sys_man_alloc_basic
[20:34:37] [PASSED] ttm_sys_man_free_basic
[20:34:37] ================== [PASSED] ttm_resource ===================
[20:34:37] =================== ttm_tt (15 subtests) ===================
[20:34:37] ==================== ttm_tt_init_basic ====================
[20:34:37] [PASSED] Page-aligned size
[20:34:37] [PASSED] Extra pages requested
[20:34:37] ================ [PASSED] ttm_tt_init_basic ================
[20:34:37] [PASSED] ttm_tt_init_misaligned
[20:34:37] [PASSED] ttm_tt_fini_basic
[20:34:37] [PASSED] ttm_tt_fini_sg
[20:34:37] [PASSED] ttm_tt_fini_shmem
[20:34:37] [PASSED] ttm_tt_create_basic
[20:34:37] [PASSED] ttm_tt_create_invalid_bo_type
[20:34:37] [PASSED] ttm_tt_create_ttm_exists
[20:34:37] [PASSED] ttm_tt_create_failed
[20:34:37] [PASSED] ttm_tt_destroy_basic
[20:34:37] [PASSED] ttm_tt_populate_null_ttm
[20:34:37] [PASSED] ttm_tt_populate_populated_ttm
[20:34:37] [PASSED] ttm_tt_unpopulate_basic
[20:34:37] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:34:37] [PASSED] ttm_tt_swapin_basic
[20:34:37] ===================== [PASSED] ttm_tt ======================
[20:34:37] =================== ttm_bo (14 subtests) ===================
[20:34:37] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[20:34:37] [PASSED] Cannot be interrupted and sleeps
[20:34:37] [PASSED] Cannot be interrupted, locks straight away
[20:34:37] [PASSED] Can be interrupted, sleeps
[20:34:37] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:34:37] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:34:37] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:34:37] [PASSED] ttm_bo_reserve_double_resv
[20:34:37] [PASSED] ttm_bo_reserve_interrupted
[20:34:37] [PASSED] ttm_bo_reserve_deadlock
[20:34:37] [PASSED] ttm_bo_unreserve_basic
[20:34:37] [PASSED] ttm_bo_unreserve_pinned
[20:34:37] [PASSED] ttm_bo_unreserve_bulk
[20:34:37] [PASSED] ttm_bo_put_basic
[20:34:37] [PASSED] ttm_bo_put_shared_resv
[20:34:37] [PASSED] ttm_bo_pin_basic
[20:34:37] [PASSED] ttm_bo_pin_unpin_resource
[20:34:37] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:34:37] ===================== [PASSED] ttm_bo ======================
[20:34:37] ============== ttm_bo_validate (22 subtests) ===============
[20:34:37] ============== ttm_bo_init_reserved_sys_man ===============
[20:34:37] [PASSED] Buffer object for userspace
[20:34:37] [PASSED] Kernel buffer object
[20:34:37] [PASSED] Shared buffer object
[20:34:37] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:34:37] ============== ttm_bo_init_reserved_mock_man ==============
[20:34:37] [PASSED] Buffer object for userspace
[20:34:37] [PASSED] Kernel buffer object
[20:34:37] [PASSED] Shared buffer object
[20:34:37] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:34:37] [PASSED] ttm_bo_init_reserved_resv
[20:34:37] ================== ttm_bo_validate_basic ==================
[20:34:37] [PASSED] Buffer object for userspace
[20:34:37] [PASSED] Kernel buffer object
[20:34:37] [PASSED] Shared buffer object
[20:34:37] ============== [PASSED] ttm_bo_validate_basic ==============
[20:34:37] [PASSED] ttm_bo_validate_invalid_placement
[20:34:37] ============= ttm_bo_validate_same_placement ==============
[20:34:37] [PASSED] System manager
[20:34:37] [PASSED] VRAM manager
[20:34:37] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:34:37] [PASSED] ttm_bo_validate_failed_alloc
[20:34:37] [PASSED] ttm_bo_validate_pinned
[20:34:37] [PASSED] ttm_bo_validate_busy_placement
[20:34:37] ================ ttm_bo_validate_multihop =================
[20:34:37] [PASSED] Buffer object for userspace
[20:34:37] [PASSED] Kernel buffer object
[20:34:37] [PASSED] Shared buffer object
[20:34:37] ============ [PASSED] ttm_bo_validate_multihop =============
[20:34:37] ========== ttm_bo_validate_no_placement_signaled ==========
[20:34:37] [PASSED] Buffer object in system domain, no page vector
[20:34:37] [PASSED] Buffer object in system domain with an existing page vector
[20:34:37] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:34:37] ======== ttm_bo_validate_no_placement_not_signaled ========
[20:34:37] [PASSED] Buffer object for userspace
[20:34:37] [PASSED] Kernel buffer object
[20:34:37] [PASSED] Shared buffer object
[20:34:37] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:34:37] [PASSED] ttm_bo_validate_move_fence_signaled
[20:34:37] ========= ttm_bo_validate_move_fence_not_signaled =========
[20:34:37] [PASSED] Waits for GPU
[20:34:37] [PASSED] Tries to lock straight away
[20:34:37] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:34:37] [PASSED] ttm_bo_validate_swapout
[20:34:37] [PASSED] ttm_bo_validate_happy_evict
[20:34:37] [PASSED] ttm_bo_validate_all_pinned_evict
[20:34:37] [PASSED] ttm_bo_validate_allowed_only_evict
[20:34:37] [PASSED] ttm_bo_validate_deleted_evict
[20:34:37] [PASSED] ttm_bo_validate_busy_domain_evict
[20:34:37] [PASSED] ttm_bo_validate_evict_gutting
[20:34:37] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[20:34:37] ================= [PASSED] ttm_bo_validate =================
[20:34:37] ============================================================
[20:34:37] Testing complete. Ran 102 tests: passed: 102
[20:34:37] Elapsed time: 9.881s total, 1.613s configuring, 7.651s building, 0.531s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✓ CI.Build: success for drm/i915/display: conversions to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (17 preceding siblings ...)
2025-02-12 20:34 ` ✓ CI.KUnit: success " Patchwork
@ 2025-02-12 20:51 ` Patchwork
2025-02-12 20:53 ` ✓ CI.Hooks: " Patchwork
` (3 subsequent siblings)
22 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-12 20:51 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: conversions to struct intel_display
URL : https://patchwork.freedesktop.org/series/144749/
State : success
== Summary ==
lib/modules/6.14.0-rc2-xe+/kernel/arch/x86/events/amd/
lib/modules/6.14.0-rc2-xe+/kernel/arch/x86/events/amd/amd-uncore.ko
lib/modules/6.14.0-rc2-xe+/kernel/arch/x86/events/rapl.ko
lib/modules/6.14.0-rc2-xe+/kernel/arch/x86/kvm/
lib/modules/6.14.0-rc2-xe+/kernel/arch/x86/kvm/kvm.ko
lib/modules/6.14.0-rc2-xe+/kernel/arch/x86/kvm/kvm-intel.ko
lib/modules/6.14.0-rc2-xe+/kernel/arch/x86/kvm/kvm-amd.ko
lib/modules/6.14.0-rc2-xe+/kernel/kernel/
lib/modules/6.14.0-rc2-xe+/kernel/kernel/kheaders.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/
lib/modules/6.14.0-rc2-xe+/kernel/crypto/ecrdsa_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/xcbc.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/serpent_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/aria_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/crypto_simd.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/adiantum.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/tcrypt.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/crypto_engine.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/zstd.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/asymmetric_keys/
lib/modules/6.14.0-rc2-xe+/kernel/crypto/asymmetric_keys/pkcs7_test_key.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/asymmetric_keys/pkcs8_key_parser.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/des_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/xctr.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/authenc.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/sm4_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/camellia_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/sm3.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/pcrypt.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/aegis128.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/af_alg.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/algif_aead.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/cmac.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/sm3_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/aes_ti.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/chacha_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/poly1305_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/nhpoly1305.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/crc32_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/essiv.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/ccm.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/wp512.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/streebog_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/authencesn.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/echainiv.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/lrw.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/cryptd.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/crypto_user.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/algif_hash.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/polyval-generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/hctr2.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/842.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/pcbc.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/ansi_cprng.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/cast6_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/twofish_common.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/twofish_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/lz4hc.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/blowfish_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/md4.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/chacha20poly1305.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/curve25519-generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/lz4.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/rmd160.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/algif_skcipher.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/cast5_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/fcrypt.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/ecdsa_generic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/sm4.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/cast_common.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/blowfish_common.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/michael_mic.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/async_tx/
lib/modules/6.14.0-rc2-xe+/kernel/crypto/async_tx/async_xor.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/async_tx/async_tx.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/async_tx/async_memcpy.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/async_tx/async_pq.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/async_tx/async_raid6_recov.ko
lib/modules/6.14.0-rc2-xe+/kernel/crypto/algif_rng.ko
lib/modules/6.14.0-rc2-xe+/kernel/block/
lib/modules/6.14.0-rc2-xe+/kernel/block/bfq.ko
lib/modules/6.14.0-rc2-xe+/kernel/block/kyber-iosched.ko
lib/modules/6.14.0-rc2-xe+/build
lib/modules/6.14.0-rc2-xe+/modules.alias.bin
lib/modules/6.14.0-rc2-xe+/modules.builtin
lib/modules/6.14.0-rc2-xe+/modules.softdep
lib/modules/6.14.0-rc2-xe+/modules.alias
lib/modules/6.14.0-rc2-xe+/modules.order
lib/modules/6.14.0-rc2-xe+/modules.symbols
lib/modules/6.14.0-rc2-xe+/modules.dep.bin
+ mv kernel-nodebug.tar.gz ..
+ cd ..
+ rm -rf archive
++ date +%s
+ echo -e '\e[0Ksection_end:1739393479:package_x86_64_nodebug\r\e[0K'
^[[0Ksection_end:1739393479:package_x86_64_nodebug
^[[0K
+ sync
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✓ CI.Hooks: success for drm/i915/display: conversions to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (18 preceding siblings ...)
2025-02-12 20:51 ` ✓ CI.Build: " Patchwork
@ 2025-02-12 20:53 ` Patchwork
2025-02-12 20:55 ` ✗ CI.checksparse: warning " Patchwork
` (2 subsequent siblings)
22 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-12 20:53 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: conversions to struct intel_display
URL : https://patchwork.freedesktop.org/series/144749/
State : success
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
+ export
+ grep -Ei '(^|\W)CI_'
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-default"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ cd /workspace/kernel
++ nproc
+ make -j48 O=/workspace/kernel/build64-default modules_prepare
make[1]: Entering directory '/workspace/kernel/build64-default'
GEN Makefile
mkdir -p /workspace/kernel/build64-default/tools/objtool && make O=/workspace/kernel/build64-default subdir=tools/objtool --no-print-directory -C objtool
CALL ../scripts/checksyscalls.sh
INSTALL libsubcmd_headers
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64-default/tools/objtool/weak.o
CC /workspace/kernel/build64-default/tools/objtool/check.o
CC /workspace/kernel/build64-default/tools/objtool/special.o
CC /workspace/kernel/build64-default/tools/objtool/builtin-check.o
CC /workspace/kernel/build64-default/tools/objtool/elf.o
CC /workspace/kernel/build64-default/tools/objtool/objtool.o
CC /workspace/kernel/build64-default/tools/objtool/orc_gen.o
CC /workspace/kernel/build64-default/tools/objtool/orc_dump.o
CC /workspace/kernel/build64-default/tools/objtool/libstring.o
CC /workspace/kernel/build64-default/tools/objtool/libctype.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64-default/tools/objtool/str_error_r.o
CC /workspace/kernel/build64-default/tools/objtool/librbtree.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/decode.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/orc.o
LD /workspace/kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64-default/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64-default/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64-default'
++ nproc
+ make -j48 O=/workspace/kernel/build64-default W=1 drivers/gpu/drm/xe
make[1]: Entering directory '/workspace/kernel/build64-default'
make[2]: Nothing to be done for 'drivers/gpu/drm/xe'.
make[1]: Leaving directory '/workspace/kernel/build64-default'
run-parts: executing /workspace/ci/hooks/11-build-32b
+++ realpath /workspace/ci/hooks/11-build-32b
++ dirname /workspace/ci/hooks/11-build-32b
+ THIS_SCRIPT_DIR=/workspace/ci/hooks
+ SRC_DIR=/workspace/kernel
+ TOOLS_SRC_DIR=/workspace/ci
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ BUILD_DIR=/workspace/kernel/build64-default/build32
+ cd /workspace/kernel
+ mkdir -p /workspace/kernel/build64-default/build32
++ nproc
+ make -j48 ARCH=i386 O=/workspace/kernel/build64-default/build32 defconfig
make[1]: Entering directory '/workspace/kernel/build64-default/build32'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTLD scripts/kconfig/conf
*** Default configuration is based on 'i386_defconfig'
#
# configuration written to .config
#
make[1]: Leaving directory '/workspace/kernel/build64-default/build32'
+ cd /workspace/kernel/build64-default/build32
+ /workspace/kernel/scripts/kconfig/merge_config.sh .config /workspace/ci/kernel/fragments/10-xe.fragment
Using .config as base
Merging /workspace/ci/kernel/fragments/10-xe.fragment
Value of CONFIG_DRM_XE is redefined by fragment /workspace/ci/kernel/fragments/10-xe.fragment:
Previous value: # CONFIG_DRM_XE is not set
New value: CONFIG_DRM_XE=m
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
#
# configuration written to .config
#
Value requested for CONFIG_HAVE_UID16 not in final .config
Requested value: CONFIG_HAVE_UID16=y
Actual value:
Value requested for CONFIG_UID16 not in final .config
Requested value: CONFIG_UID16=y
Actual value:
Value requested for CONFIG_X86_32 not in final .config
Requested value: CONFIG_X86_32=y
Actual value:
Value requested for CONFIG_OUTPUT_FORMAT not in final .config
Requested value: CONFIG_OUTPUT_FORMAT="elf32-i386"
Actual value: CONFIG_OUTPUT_FORMAT="elf64-x86-64"
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MIN not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MIN=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MIN=28
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MAX not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MAX=16
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MAX=32
Value requested for CONFIG_PGTABLE_LEVELS not in final .config
Requested value: CONFIG_PGTABLE_LEVELS=2
Actual value: CONFIG_PGTABLE_LEVELS=5
Value requested for CONFIG_X86_BIGSMP not in final .config
Requested value: # CONFIG_X86_BIGSMP is not set
Actual value:
Value requested for CONFIG_X86_INTEL_QUARK not in final .config
Requested value: # CONFIG_X86_INTEL_QUARK is not set
Actual value:
Value requested for CONFIG_X86_RDC321X not in final .config
Requested value: # CONFIG_X86_RDC321X is not set
Actual value:
Value requested for CONFIG_X86_32_NON_STANDARD not in final .config
Requested value: # CONFIG_X86_32_NON_STANDARD is not set
Actual value:
Value requested for CONFIG_X86_32_IRIS not in final .config
Requested value: # CONFIG_X86_32_IRIS is not set
Actual value:
Value requested for CONFIG_M486SX not in final .config
Requested value: # CONFIG_M486SX is not set
Actual value:
Value requested for CONFIG_M486 not in final .config
Requested value: # CONFIG_M486 is not set
Actual value:
Value requested for CONFIG_M586 not in final .config
Requested value: # CONFIG_M586 is not set
Actual value:
Value requested for CONFIG_M586TSC not in final .config
Requested value: # CONFIG_M586TSC is not set
Actual value:
Value requested for CONFIG_M586MMX not in final .config
Requested value: # CONFIG_M586MMX is not set
Actual value:
Value requested for CONFIG_M686 not in final .config
Requested value: CONFIG_M686=y
Actual value:
Value requested for CONFIG_MPENTIUMII not in final .config
Requested value: # CONFIG_MPENTIUMII is not set
Actual value:
Value requested for CONFIG_MPENTIUMIII not in final .config
Requested value: # CONFIG_MPENTIUMIII is not set
Actual value:
Value requested for CONFIG_MPENTIUMM not in final .config
Requested value: # CONFIG_MPENTIUMM is not set
Actual value:
Value requested for CONFIG_MPENTIUM4 not in final .config
Requested value: # CONFIG_MPENTIUM4 is not set
Actual value:
Value requested for CONFIG_MK6 not in final .config
Requested value: # CONFIG_MK6 is not set
Actual value:
Value requested for CONFIG_MK7 not in final .config
Requested value: # CONFIG_MK7 is not set
Actual value:
Value requested for CONFIG_MCRUSOE not in final .config
Requested value: # CONFIG_MCRUSOE is not set
Actual value:
Value requested for CONFIG_MEFFICEON not in final .config
Requested value: # CONFIG_MEFFICEON is not set
Actual value:
Value requested for CONFIG_MWINCHIPC6 not in final .config
Requested value: # CONFIG_MWINCHIPC6 is not set
Actual value:
Value requested for CONFIG_MWINCHIP3D not in final .config
Requested value: # CONFIG_MWINCHIP3D is not set
Actual value:
Value requested for CONFIG_MELAN not in final .config
Requested value: # CONFIG_MELAN is not set
Actual value:
Value requested for CONFIG_MGEODEGX1 not in final .config
Requested value: # CONFIG_MGEODEGX1 is not set
Actual value:
Value requested for CONFIG_MGEODE_LX not in final .config
Requested value: # CONFIG_MGEODE_LX is not set
Actual value:
Value requested for CONFIG_MCYRIXIII not in final .config
Requested value: # CONFIG_MCYRIXIII is not set
Actual value:
Value requested for CONFIG_MVIAC3_2 not in final .config
Requested value: # CONFIG_MVIAC3_2 is not set
Actual value:
Value requested for CONFIG_MVIAC7 not in final .config
Requested value: # CONFIG_MVIAC7 is not set
Actual value:
Value requested for CONFIG_X86_GENERIC not in final .config
Requested value: # CONFIG_X86_GENERIC is not set
Actual value:
Value requested for CONFIG_X86_INTERNODE_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_INTERNODE_CACHE_SHIFT=5
Actual value: CONFIG_X86_INTERNODE_CACHE_SHIFT=6
Value requested for CONFIG_X86_L1_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_L1_CACHE_SHIFT=5
Actual value: CONFIG_X86_L1_CACHE_SHIFT=6
Value requested for CONFIG_X86_USE_PPRO_CHECKSUM not in final .config
Requested value: CONFIG_X86_USE_PPRO_CHECKSUM=y
Actual value:
Value requested for CONFIG_X86_MINIMUM_CPU_FAMILY not in final .config
Requested value: CONFIG_X86_MINIMUM_CPU_FAMILY=6
Actual value: CONFIG_X86_MINIMUM_CPU_FAMILY=64
Value requested for CONFIG_CPU_SUP_TRANSMETA_32 not in final .config
Requested value: CONFIG_CPU_SUP_TRANSMETA_32=y
Actual value:
Value requested for CONFIG_CPU_SUP_VORTEX_32 not in final .config
Requested value: CONFIG_CPU_SUP_VORTEX_32=y
Actual value:
Value requested for CONFIG_HPET_TIMER not in final .config
Requested value: # CONFIG_HPET_TIMER is not set
Actual value: CONFIG_HPET_TIMER=y
Value requested for CONFIG_NR_CPUS_RANGE_END not in final .config
Requested value: CONFIG_NR_CPUS_RANGE_END=8
Actual value: CONFIG_NR_CPUS_RANGE_END=512
Value requested for CONFIG_NR_CPUS_DEFAULT not in final .config
Requested value: CONFIG_NR_CPUS_DEFAULT=8
Actual value: CONFIG_NR_CPUS_DEFAULT=64
Value requested for CONFIG_X86_ANCIENT_MCE not in final .config
Requested value: # CONFIG_X86_ANCIENT_MCE is not set
Actual value:
Value requested for CONFIG_X86_LEGACY_VM86 not in final .config
Requested value: # CONFIG_X86_LEGACY_VM86 is not set
Actual value:
Value requested for CONFIG_X86_ESPFIX32 not in final .config
Requested value: CONFIG_X86_ESPFIX32=y
Actual value:
Value requested for CONFIG_TOSHIBA not in final .config
Requested value: # CONFIG_TOSHIBA is not set
Actual value:
Value requested for CONFIG_X86_REBOOTFIXUPS not in final .config
Requested value: # CONFIG_X86_REBOOTFIXUPS is not set
Actual value:
Value requested for CONFIG_MICROCODE_INITRD32 not in final .config
Requested value: CONFIG_MICROCODE_INITRD32=y
Actual value:
Value requested for CONFIG_NOHIGHMEM not in final .config
Requested value: # CONFIG_NOHIGHMEM is not set
Actual value:
Value requested for CONFIG_HIGHMEM4G not in final .config
Requested value: CONFIG_HIGHMEM4G=y
Actual value:
Value requested for CONFIG_HIGHMEM64G not in final .config
Requested value: # CONFIG_HIGHMEM64G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_3G not in final .config
Requested value: CONFIG_VMSPLIT_3G=y
Actual value:
Value requested for CONFIG_VMSPLIT_3G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_3G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G not in final .config
Requested value: # CONFIG_VMSPLIT_2G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_2G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_1G not in final .config
Requested value: # CONFIG_VMSPLIT_1G is not set
Actual value:
Value requested for CONFIG_PAGE_OFFSET not in final .config
Requested value: CONFIG_PAGE_OFFSET=0xC0000000
Actual value:
Value requested for CONFIG_HIGHMEM not in final .config
Requested value: CONFIG_HIGHMEM=y
Actual value:
Value requested for CONFIG_X86_PAE not in final .config
Requested value: # CONFIG_X86_PAE is not set
Actual value:
Value requested for CONFIG_ARCH_FLATMEM_ENABLE not in final .config
Requested value: CONFIG_ARCH_FLATMEM_ENABLE=y
Actual value:
Value requested for CONFIG_ARCH_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_ARCH_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_ILLEGAL_POINTER_VALUE not in final .config
Requested value: CONFIG_ILLEGAL_POINTER_VALUE=0
Actual value: CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
Value requested for CONFIG_HIGHPTE not in final .config
Requested value: # CONFIG_HIGHPTE is not set
Actual value:
Value requested for CONFIG_COMPAT_VDSO not in final .config
Requested value: # CONFIG_COMPAT_VDSO is not set
Actual value:
Value requested for CONFIG_FUNCTION_PADDING_CFI not in final .config
Requested value: CONFIG_FUNCTION_PADDING_CFI=0
Actual value: CONFIG_FUNCTION_PADDING_CFI=11
Value requested for CONFIG_FUNCTION_PADDING_BYTES not in final .config
Requested value: CONFIG_FUNCTION_PADDING_BYTES=4
Actual value: CONFIG_FUNCTION_PADDING_BYTES=16
Value requested for CONFIG_APM not in final .config
Requested value: # CONFIG_APM is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K6 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K6 is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K7 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K7 is not set
Actual value:
Value requested for CONFIG_X86_GX_SUSPMOD not in final .config
Requested value: # CONFIG_X86_GX_SUSPMOD is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_ICH not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_ICH is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_SMI not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_SMI is not set
Actual value:
Value requested for CONFIG_X86_CPUFREQ_NFORCE2 not in final .config
Requested value: # CONFIG_X86_CPUFREQ_NFORCE2 is not set
Actual value:
Value requested for CONFIG_X86_LONGRUN not in final .config
Requested value: # CONFIG_X86_LONGRUN is not set
Actual value:
Value requested for CONFIG_X86_LONGHAUL not in final .config
Requested value: # CONFIG_X86_LONGHAUL is not set
Actual value:
Value requested for CONFIG_X86_E_POWERSAVER not in final .config
Requested value: # CONFIG_X86_E_POWERSAVER is not set
Actual value:
Value requested for CONFIG_PCI_GOBIOS not in final .config
Requested value: # CONFIG_PCI_GOBIOS is not set
Actual value:
Value requested for CONFIG_PCI_GOMMCONFIG not in final .config
Requested value: # CONFIG_PCI_GOMMCONFIG is not set
Actual value:
Value requested for CONFIG_PCI_GODIRECT not in final .config
Requested value: # CONFIG_PCI_GODIRECT is not set
Actual value:
Value requested for CONFIG_PCI_GOANY not in final .config
Requested value: CONFIG_PCI_GOANY=y
Actual value:
Value requested for CONFIG_PCI_BIOS not in final .config
Requested value: CONFIG_PCI_BIOS=y
Actual value:
Value requested for CONFIG_ISA not in final .config
Requested value: # CONFIG_ISA is not set
Actual value:
Value requested for CONFIG_SCx200 not in final .config
Requested value: # CONFIG_SCx200 is not set
Actual value:
Value requested for CONFIG_OLPC not in final .config
Requested value: # CONFIG_OLPC is not set
Actual value:
Value requested for CONFIG_ALIX not in final .config
Requested value: # CONFIG_ALIX is not set
Actual value:
Value requested for CONFIG_NET5501 not in final .config
Requested value: # CONFIG_NET5501 is not set
Actual value:
Value requested for CONFIG_GEOS not in final .config
Requested value: # CONFIG_GEOS is not set
Actual value:
Value requested for CONFIG_COMPAT_32 not in final .config
Requested value: CONFIG_COMPAT_32=y
Actual value:
Value requested for CONFIG_HAVE_ATOMIC_IOMAP not in final .config
Requested value: CONFIG_HAVE_ATOMIC_IOMAP=y
Actual value:
Value requested for CONFIG_ARCH_32BIT_OFF_T not in final .config
Requested value: CONFIG_ARCH_32BIT_OFF_T=y
Actual value:
Value requested for CONFIG_ARCH_WANT_IPC_PARSE_VERSION not in final .config
Requested value: CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
Actual value:
Value requested for CONFIG_MODULES_USE_ELF_REL not in final .config
Requested value: CONFIG_MODULES_USE_ELF_REL=y
Actual value:
Value requested for CONFIG_ARCH_MMAP_RND_BITS not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS=28
Value requested for CONFIG_CLONE_BACKWARDS not in final .config
Requested value: CONFIG_CLONE_BACKWARDS=y
Actual value:
Value requested for CONFIG_OLD_SIGSUSPEND3 not in final .config
Requested value: CONFIG_OLD_SIGSUSPEND3=y
Actual value:
Value requested for CONFIG_OLD_SIGACTION not in final .config
Requested value: CONFIG_OLD_SIGACTION=y
Actual value:
Value requested for CONFIG_ARCH_SPLIT_ARG64 not in final .config
Requested value: CONFIG_ARCH_SPLIT_ARG64=y
Actual value:
Value requested for CONFIG_FUNCTION_ALIGNMENT not in final .config
Requested value: CONFIG_FUNCTION_ALIGNMENT=4
Actual value: CONFIG_FUNCTION_ALIGNMENT=16
Value requested for CONFIG_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_FLATMEM_MANUAL not in final .config
Requested value: CONFIG_FLATMEM_MANUAL=y
Actual value:
Value requested for CONFIG_SPARSEMEM_MANUAL not in final .config
Requested value: # CONFIG_SPARSEMEM_MANUAL is not set
Actual value:
Value requested for CONFIG_FLATMEM not in final .config
Requested value: CONFIG_FLATMEM=y
Actual value:
Value requested for CONFIG_SPARSEMEM_STATIC not in final .config
Requested value: CONFIG_SPARSEMEM_STATIC=y
Actual value:
Value requested for CONFIG_BOUNCE not in final .config
Requested value: CONFIG_BOUNCE=y
Actual value:
Value requested for CONFIG_KMAP_LOCAL not in final .config
Requested value: CONFIG_KMAP_LOCAL=y
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_COMPAQ not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_COMPAQ is not set
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_IBM not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_IBM is not set
Actual value:
Value requested for CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH not in final .config
Requested value: CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH=y
Actual value:
Value requested for CONFIG_PCH_PHUB not in final .config
Requested value: # CONFIG_PCH_PHUB is not set
Actual value:
Value requested for CONFIG_SCSI_NSP32 not in final .config
Requested value: # CONFIG_SCSI_NSP32 is not set
Actual value:
Value requested for CONFIG_PATA_CS5520 not in final .config
Requested value: # CONFIG_PATA_CS5520 is not set
Actual value:
Value requested for CONFIG_PATA_CS5530 not in final .config
Requested value: # CONFIG_PATA_CS5530 is not set
Actual value:
Value requested for CONFIG_PATA_CS5535 not in final .config
Requested value: # CONFIG_PATA_CS5535 is not set
Actual value:
Value requested for CONFIG_PATA_CS5536 not in final .config
Requested value: # CONFIG_PATA_CS5536 is not set
Actual value:
Value requested for CONFIG_PATA_SC1200 not in final .config
Requested value: # CONFIG_PATA_SC1200 is not set
Actual value:
Value requested for CONFIG_PCH_GBE not in final .config
Requested value: # CONFIG_PCH_GBE is not set
Actual value:
Value requested for CONFIG_INPUT_WISTRON_BTNS not in final .config
Requested value: # CONFIG_INPUT_WISTRON_BTNS is not set
Actual value:
Value requested for CONFIG_SERIAL_TIMBERDALE not in final .config
Requested value: # CONFIG_SERIAL_TIMBERDALE is not set
Actual value:
Value requested for CONFIG_SERIAL_PCH_UART not in final .config
Requested value: # CONFIG_SERIAL_PCH_UART is not set
Actual value:
Value requested for CONFIG_HW_RANDOM_GEODE not in final .config
Requested value: CONFIG_HW_RANDOM_GEODE=y
Actual value:
Value requested for CONFIG_SONYPI not in final .config
Requested value: # CONFIG_SONYPI is not set
Actual value:
Value requested for CONFIG_PC8736x_GPIO not in final .config
Requested value: # CONFIG_PC8736x_GPIO is not set
Actual value:
Value requested for CONFIG_NSC_GPIO not in final .config
Requested value: # CONFIG_NSC_GPIO is not set
Actual value:
Value requested for CONFIG_I2C_EG20T not in final .config
Requested value: # CONFIG_I2C_EG20T is not set
Actual value:
Value requested for CONFIG_SCx200_ACB not in final .config
Requested value: # CONFIG_SCx200_ACB is not set
Actual value:
Value requested for CONFIG_PTP_1588_CLOCK_PCH not in final .config
Requested value: # CONFIG_PTP_1588_CLOCK_PCH is not set
Actual value:
Value requested for CONFIG_SBC8360_WDT not in final .config
Requested value: # CONFIG_SBC8360_WDT is not set
Actual value:
Value requested for CONFIG_SBC7240_WDT not in final .config
Requested value: # CONFIG_SBC7240_WDT is not set
Actual value:
Value requested for CONFIG_MFD_CS5535 not in final .config
Requested value: # CONFIG_MFD_CS5535 is not set
Actual value:
Value requested for CONFIG_AGP_ALI not in final .config
Requested value: # CONFIG_AGP_ALI is not set
Actual value:
Value requested for CONFIG_AGP_ATI not in final .config
Requested value: # CONFIG_AGP_ATI is not set
Actual value:
Value requested for CONFIG_AGP_AMD not in final .config
Requested value: # CONFIG_AGP_AMD is not set
Actual value:
Value requested for CONFIG_AGP_NVIDIA not in final .config
Requested value: # CONFIG_AGP_NVIDIA is not set
Actual value:
Value requested for CONFIG_AGP_SWORKS not in final .config
Requested value: # CONFIG_AGP_SWORKS is not set
Actual value:
Value requested for CONFIG_AGP_EFFICEON not in final .config
Requested value: # CONFIG_AGP_EFFICEON is not set
Actual value:
Value requested for CONFIG_SND_CS5530 not in final .config
Requested value: # CONFIG_SND_CS5530 is not set
Actual value:
Value requested for CONFIG_SND_CS5535AUDIO not in final .config
Requested value: # CONFIG_SND_CS5535AUDIO is not set
Actual value:
Value requested for CONFIG_SND_SIS7019 not in final .config
Requested value: # CONFIG_SND_SIS7019 is not set
Actual value:
Value requested for CONFIG_LEDS_OT200 not in final .config
Requested value: # CONFIG_LEDS_OT200 is not set
Actual value:
Value requested for CONFIG_PCH_DMA not in final .config
Requested value: # CONFIG_PCH_DMA is not set
Actual value:
Value requested for CONFIG_CLKSRC_I8253 not in final .config
Requested value: CONFIG_CLKSRC_I8253=y
Actual value:
Value requested for CONFIG_MAILBOX not in final .config
Requested value: # CONFIG_MAILBOX is not set
Actual value: CONFIG_MAILBOX=y
Value requested for CONFIG_CRYPTO_SERPENT_SSE2_586 not in final .config
Requested value: # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_TWOFISH_586 not in final .config
Requested value: # CONFIG_CRYPTO_TWOFISH_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_GEODE not in final .config
Requested value: # CONFIG_CRYPTO_DEV_GEODE is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_HIFN_795X not in final .config
Requested value: # CONFIG_CRYPTO_DEV_HIFN_795X is not set
Actual value:
Value requested for CONFIG_CRYPTO_LIB_POLY1305_RSIZE not in final .config
Requested value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
Actual value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11
Value requested for CONFIG_AUDIT_GENERIC not in final .config
Requested value: CONFIG_AUDIT_GENERIC=y
Actual value:
Value requested for CONFIG_GENERIC_VDSO_32 not in final .config
Requested value: CONFIG_GENERIC_VDSO_32=y
Actual value:
Value requested for CONFIG_DEBUG_KMAP_LOCAL not in final .config
Requested value: # CONFIG_DEBUG_KMAP_LOCAL is not set
Actual value:
Value requested for CONFIG_DEBUG_HIGHMEM not in final .config
Requested value: # CONFIG_DEBUG_HIGHMEM is not set
Actual value:
Value requested for CONFIG_HAVE_DEBUG_STACKOVERFLOW not in final .config
Requested value: CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
Actual value:
Value requested for CONFIG_DEBUG_STACKOVERFLOW not in final .config
Requested value: # CONFIG_DEBUG_STACKOVERFLOW is not set
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_TRACER not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_FREGS not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y
Actual value:
Value requested for CONFIG_HAVE_FTRACE_GRAPH_FUNC not in final .config
Requested value: CONFIG_HAVE_FTRACE_GRAPH_FUNC=y
Actual value:
Value requested for CONFIG_DRM_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_KUNIT_TEST=m
Actual value:
Value requested for CONFIG_DRM_XE_WERROR not in final .config
Requested value: CONFIG_DRM_XE_WERROR=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG not in final .config
Requested value: CONFIG_DRM_XE_DEBUG=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG_MEM not in final .config
Requested value: CONFIG_DRM_XE_DEBUG_MEM=y
Actual value:
Value requested for CONFIG_DRM_XE_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_XE_KUNIT_TEST=m
Actual value:
++ nproc
+ make -j48 ARCH=i386 olddefconfig
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
#
# configuration written to .config
#
++ nproc
+ make -j48 ARCH=i386
SYNC include/config/auto.conf.cmd
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m] && HAS_IOPORT [=y]
GEN Makefile
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
UPD include/generated/uapi/linux/version.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
WRAP arch/x86/include/generated/uapi/asm/param.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
WRAP arch/x86/include/generated/uapi/asm/termbits.h
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/types.h
HOSTCC arch/x86/tools/relocs_32.o
UPD include/generated/compile.h
HOSTCC arch/x86/tools/relocs_64.o
HOSTCC arch/x86/tools/relocs_common.o
WRAP arch/x86/include/generated/asm/early_ioremap.h
WRAP arch/x86/include/generated/asm/fprobe.h
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
WRAP arch/x86/include/generated/asm/mmzone.h
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
WRAP arch/x86/include/generated/asm/local64.h
WRAP arch/x86/include/generated/asm/mmiowb.h
HOSTCC scripts/kallsyms
WRAP arch/x86/include/generated/asm/module.lds.h
HOSTCC scripts/sorttable
WRAP arch/x86/include/generated/asm/rwonce.h
HOSTCC scripts/asn1_compiler
HOSTCC scripts/selinux/mdp/mdp
HOSTLD arch/x86/tools/relocs
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
UPD scripts/mod/devicetable-offsets.h
MKELF scripts/mod/elfconfig.h
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/file2alias.o
HOSTCC scripts/mod/symsearch.o
HOSTCC scripts/mod/sumversion.o
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-instrumented.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-long.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
UPD include/generated/asm-offsets.h
CALL /workspace/kernel/scripts/checksyscalls.sh
LDS scripts/module.lds
HOSTCC usr/gen_init_cpio
CC init/main.o
CC init/do_mounts.o
CC init/do_mounts_initrd.o
UPD init/utsversion-tmp.h
CC init/initramfs.o
CC certs/system_keyring.o
CC ipc/util.o
CC init/calibrate.o
CC security/commoncap.o
CC mm/filemap.o
CC ipc/msgutil.o
CC io_uring/io_uring.o
CC init/init_task.o
CC security/lsm_syscalls.o
AS arch/x86/entry/entry.o
CC ipc/msg.o
CC mm/mempool.o
AR arch/x86/crypto/built-in.a
CC io_uring/opdef.o
AS arch/x86/lib/atomic64_cx8_32.o
CC arch/x86/realmode/init.o
AR arch/x86/net/built-in.a
CC init/version.o
CC security/min_addr.o
CC arch/x86/pci/i386.o
AS arch/x86/entry/entry_32.o
CC arch/x86/video/video-common.o
CC arch/x86/power/cpu.o
HOSTCC security/selinux/genheaders
AR arch/x86/entry/vsyscall/built-in.a
CC security/keys/gc.o
CC security/integrity/iint.o
CC arch/x86/events/amd/core.o
AR virt/lib/built-in.a
CC block/partitions/core.o
CC arch/x86/mm/pat/set_memory.o
AR arch/x86/platform/atom/built-in.a
CC arch/x86/virt/svm/cmdline.o
AS arch/x86/realmode/rm/header.o
AR drivers/cache/built-in.a
CC arch/x86/kernel/fpu/init.o
CC net/core/sock.o
CC io_uring/kbuf.o
CC lib/math/div64.o
CC sound/core/seq/seq.o
AR virt/built-in.a
CC fs/notify/dnotify/dnotify.o
AR arch/x86/platform/ce4100/built-in.a
AS arch/x86/lib/checksum_32.o
AR sound/i2c/other/built-in.a
CC arch/x86/entry/vdso/vma.o
AR drivers/irqchip/built-in.a
CC lib/crypto/mpi/generic_mpih-lshift.o
CC sound/core/sound.o
CC arch/x86/platform/efi/memmap.o
AS arch/x86/realmode/rm/trampoline_32.o
AR sound/i2c/built-in.a
AR arch/x86/virt/vmx/built-in.a
CC kernel/sched/core.o
CC ipc/sem.o
AR drivers/bus/mhi/built-in.a
CC lib/math/gcd.o
CC fs/nfs_common/nfsacl.o
CC arch/x86/lib/cmdline.o
AS arch/x86/realmode/rm/stack.o
AR drivers/bus/built-in.a
CC crypto/asymmetric_keys/asymmetric_type.o
AS arch/x86/realmode/rm/reboot.o
AR drivers/pwm/built-in.a
AS arch/x86/realmode/rm/wakeup_asm.o
AR arch/x86/virt/svm/built-in.a
AR drivers/leds/trigger/built-in.a
CC lib/crypto/mpi/generic_mpih-mul1.o
AR arch/x86/virt/built-in.a
AR drivers/leds/blink/built-in.a
CC lib/crypto/mpi/generic_mpih-mul2.o
CC arch/x86/realmode/rm/wakemain.o
AR drivers/leds/simple/built-in.a
CC drivers/leds/led-core.o
AS arch/x86/lib/cmpxchg8b_emu.o
CC lib/math/lcm.o
GEN security/selinux/flask.h security/selinux/av_permissions.h
CC security/selinux/avc.o
CC arch/x86/pci/init.o
CC arch/x86/lib/cpu.o
CC lib/math/int_log.o
CC arch/x86/realmode/rm/video-mode.o
CC security/security.o
CC lib/math/int_pow.o
GEN usr/initramfs_data.cpio
AS arch/x86/realmode/rm/copy.o
COPY usr/initramfs_inc_data
AS usr/initramfs_data.o
AS arch/x86/realmode/rm/bioscall.o
CC lib/math/int_sqrt.o
HOSTCC certs/extract-cert
AR usr/built-in.a
CC arch/x86/kernel/fpu/bugs.o
CC arch/x86/realmode/rm/regs.o
CC arch/x86/kernel/fpu/core.o
CC arch/x86/realmode/rm/video-vga.o
CC lib/math/reciprocal_div.o
CC fs/iomap/trace.o
CC arch/x86/realmode/rm/video-vesa.o
CC lib/math/rational.o
CC arch/x86/lib/delay.o
CC fs/quota/dquot.o
CC sound/core/seq/seq_lock.o
CC arch/x86/realmode/rm/video-bios.o
CC fs/proc/task_mmu.o
AR arch/x86/video/built-in.a
CC sound/core/init.o
CC mm/oom_kill.o
CERT certs/x509_certificate_list
CERT certs/signing_key.x509
AS certs/system_certificates.o
PASYMS arch/x86/realmode/rm/pasyms.h
CC arch/x86/mm/pat/memtype.o
CC arch/x86/kernel/cpu/mce/core.o
CC net/core/request_sock.o
AR certs/built-in.a
CC arch/x86/kernel/cpu/mtrr/mtrr.o
LDS arch/x86/realmode/rm/realmode.lds
CC security/integrity/integrity_audit.o
CC lib/crypto/mpi/generic_mpih-mul3.o
CC arch/x86/platform/efi/quirks.o
LD arch/x86/realmode/rm/realmode.elf
CC drivers/leds/led-class.o
CC drivers/leds/led-triggers.o
RELOCS arch/x86/realmode/rm/realmode.relocs
OBJCOPY arch/x86/realmode/rm/realmode.bin
AS arch/x86/realmode/rmpiggy.o
CC fs/nfs_common/grace.o
CC drivers/pci/msi/pcidev_msi.o
CC crypto/asymmetric_keys/restrict.o
CC arch/x86/kernel/cpu/microcode/core.o
CC drivers/pci/pcie/portdrv.o
CC security/keys/key.o
AR arch/x86/realmode/built-in.a
CC arch/x86/mm/init.o
CC lib/crypto/mpi/generic_mpih-rshift.o
AR fs/notify/dnotify/built-in.a
CC arch/x86/entry/vdso/extable.o
CC drivers/pci/msi/api.o
CC fs/notify/inotify/inotify_fsnotify.o
CC arch/x86/pci/pcbios.o
CC arch/x86/power/hibernate_32.o
AS arch/x86/lib/getuser.o
GEN arch/x86/lib/inat-tables.c
AR lib/math/built-in.a
CC arch/x86/mm/init_32.o
CC arch/x86/lib/insn-eval.o
CC block/partitions/msdos.o
CC sound/core/seq/seq_clientmgr.o
CC fs/notify/inotify/inotify_user.o
AR fs/notify/fanotify/built-in.a
CC arch/x86/kernel/cpu/microcode/intel.o
CC fs/kernfs/mount.o
CC sound/core/memory.o
CC crypto/asymmetric_keys/signature.o
CC security/keys/keyring.o
CC arch/x86/events/amd/lbr.o
CC arch/x86/kernel/cpu/mce/severity.o
CC kernel/locking/mutex.o
AR sound/drivers/opl3/built-in.a
AR sound/drivers/opl4/built-in.a
AR sound/drivers/mpu401/built-in.a
CC lib/crypto/mpi/generic_mpih-sub1.o
AR sound/drivers/vx/built-in.a
CC kernel/locking/semaphore.o
CC arch/x86/mm/fault.o
AR sound/drivers/pcsp/built-in.a
AR sound/drivers/built-in.a
CC fs/quota/quota_v2.o
CC fs/quota/quota_tree.o
CC fs/nfs_common/common.o
AR security/integrity/built-in.a
AR init/built-in.a
CC arch/x86/kernel/cpu/mtrr/if.o
CC security/keys/keyctl.o
CC fs/sysfs/file.o
CC fs/devpts/inode.o
AR drivers/leds/built-in.a
CC fs/netfs/buffered_read.o
CC drivers/pci/msi/msi.o
CC fs/sysfs/dir.o
CC arch/x86/pci/mmconfig_32.o
AS arch/x86/power/hibernate_asm_32.o
CC arch/x86/mm/pat/memtype_interval.o
CC arch/x86/power/hibernate.o
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
CC drivers/pci/pcie/rcec.o
CC arch/x86/kernel/fpu/regset.o
AS arch/x86/entry/vdso/vdso32/note.o
AS arch/x86/entry/vdso/vdso32/system_call.o
AS arch/x86/entry/vdso/vdso32/sigreturn.o
CC arch/x86/platform/efi/efi.o
CC fs/iomap/iter.o
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
CC security/lsm_audit.o
CC crypto/asymmetric_keys/public_key.o
CC fs/sysfs/symlink.o
CC block/partitions/efi.o
CC arch/x86/kernel/cpu/cacheinfo.o
CC arch/x86/lib/insn.o
CC ipc/shm.o
CC arch/x86/events/amd/ibs.o
CC security/selinux/hooks.o
CC arch/x86/kernel/cpu/microcode/amd.o
CC fs/netfs/buffered_write.o
CC fs/kernfs/inode.o
CC lib/crypto/mpi/generic_mpih-add1.o
AR fs/notify/inotify/built-in.a
CC fs/notify/fsnotify.o
CC drivers/pci/msi/irqdomain.o
CC arch/x86/kernel/fpu/signal.o
CC arch/x86/kernel/cpu/scattered.o
CC arch/x86/kernel/cpu/mtrr/generic.o
CC arch/x86/lib/kaslr.o
CC kernel/power/qos.o
AR sound/isa/ad1816a/built-in.a
AR sound/isa/ad1848/built-in.a
AR sound/isa/cs423x/built-in.a
AR fs/nfs_common/built-in.a
AR sound/isa/es1688/built-in.a
AR sound/isa/galaxy/built-in.a
CC lib/zlib_inflate/inffast.o
AR sound/isa/gus/built-in.a
AR sound/isa/msnd/built-in.a
CC arch/x86/pci/direct.o
AR arch/x86/mm/pat/built-in.a
AR sound/isa/opti9xx/built-in.a
CC lib/zlib_deflate/deflate.o
AR sound/isa/sb/built-in.a
CC drivers/pci/pcie/bwctrl.o
AR arch/x86/power/built-in.a
AR fs/devpts/built-in.a
AR sound/isa/wavefront/built-in.a
CC arch/x86/events/amd/uncore.o
AR sound/isa/wss/built-in.a
CC arch/x86/kernel/fpu/xstate.o
CC fs/sysfs/mount.o
AR sound/isa/built-in.a
CC arch/x86/kernel/cpu/topology_common.o
AR sound/pci/ac97/built-in.a
CC sound/core/seq/seq_memory.o
AR sound/pci/ali5451/built-in.a
CC arch/x86/kernel/cpu/topology_ext.o
AR sound/pci/asihpi/built-in.a
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
AR sound/pci/au88x0/built-in.a
CC arch/x86/lib/memcpy_32.o
AR sound/pci/aw2/built-in.a
ASN.1 crypto/asymmetric_keys/x509.asn1.[ch]
ASN.1 crypto/asymmetric_keys/x509_akid.asn1.[ch]
HOSTCC arch/x86/entry/vdso/vdso2c
CC crypto/asymmetric_keys/x509_loader.o
AR sound/pci/ctxfi/built-in.a
AR sound/pci/ca0106/built-in.a
AS arch/x86/lib/memmove_32.o
CC lib/zlib_inflate/inflate.o
AR sound/pci/cs46xx/built-in.a
CC sound/core/seq/seq_queue.o
AR sound/pci/cs5535audio/built-in.a
CC fs/iomap/buffered-io.o
AR sound/pci/lola/built-in.a
CC arch/x86/lib/misc.o
AR sound/pci/lx6464es/built-in.a
CC arch/x86/kernel/cpu/topology_amd.o
CC sound/core/seq/seq_fifo.o
AR sound/pci/echoaudio/built-in.a
CC arch/x86/pci/mmconfig-shared.o
CC fs/proc/inode.o
CC arch/x86/lib/pc-conf-reg.o
AR sound/pci/emu10k1/built-in.a
CC fs/kernfs/dir.o
CC sound/pci/hda/hda_bind.o
CC arch/x86/kernel/cpu/mce/genpool.o
CC lib/crypto/mpi/mpicoder.o
CC crypto/asymmetric_keys/x509_public_key.o
AR drivers/pci/pwrctrl/built-in.a
CC fs/quota/quota.o
AS arch/x86/lib/putuser.o
CC kernel/locking/rwsem.o
CC arch/x86/pci/fixup.o
AR block/partitions/built-in.a
CC arch/x86/mm/ioremap.o
CC block/bdev.o
AS arch/x86/lib/retpoline.o
CC arch/x86/platform/efi/efi_32.o
CC arch/x86/lib/string_32.o
CC security/keys/permission.o
CC arch/x86/entry/syscall_32.o
CC arch/x86/lib/strstr_32.o
CC arch/x86/kernel/cpu/mtrr/cleanup.o
CC arch/x86/lib/usercopy.o
CC arch/x86/lib/usercopy_32.o
CC arch/x86/entry/vdso/vdso32-setup.o
AR arch/x86/platform/geode/built-in.a
AR arch/x86/kernel/cpu/microcode/built-in.a
CC fs/sysfs/group.o
AR drivers/pci/msi/built-in.a
CC fs/ext4/balloc.o
CC net/core/skbuff.o
CC security/keys/process_keys.o
CC lib/zlib_inflate/infutil.o
CC fs/kernfs/file.o
CC lib/zlib_inflate/inftrees.o
CC fs/notify/notification.o
CC drivers/pci/pcie/aspm.o
CC fs/netfs/direct_read.o
CC lib/crypto/memneq.o
CC mm/fadvise.o
CC drivers/pci/pcie/pme.o
CC ipc/syscall.o
CC drivers/video/console/dummycon.o
CC ipc/ipc_sysctl.o
CC lib/zlib_deflate/deftree.o
AR drivers/idle/built-in.a
AR drivers/char/ipmi/built-in.a
CC arch/x86/pci/acpi.o
CC fs/iomap/direct-io.o
CC io_uring/rsrc.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
CC arch/x86/lib/msr-smp.o
CC lib/zlib_deflate/deflate_syms.o
CC arch/x86/events/intel/core.o
OBJCOPY arch/x86/entry/vdso/vdso32.so
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
CC arch/x86/kernel/cpu/mce/intel.o
CC arch/x86/entry/vdso/vdso-image-32.o
CC arch/x86/kernel/cpu/mce/amd.o
ASN.1 crypto/asymmetric_keys/pkcs7.asn1.[ch]
CC crypto/asymmetric_keys/pkcs7_trust.o
CC sound/core/seq/seq_prioq.o
CC kernel/power/main.o
CC sound/pci/hda/hda_codec.o
CC lib/crypto/mpi/mpi-add.o
CC lib/zlib_inflate/inflate_syms.o
CC fs/proc/root.o
CC drivers/video/console/vgacon.o
CC arch/x86/events/intel/bts.o
AS arch/x86/platform/efi/efi_stub_32.o
CC arch/x86/lib/cache-smp.o
AR arch/x86/events/amd/built-in.a
CC arch/x86/platform/efi/runtime-map.o
CC fs/notify/group.o
CC fs/iomap/fiemap.o
AR arch/x86/entry/vdso/built-in.a
CC lib/lzo/lzo1x_compress.o
CC kernel/locking/percpu-rwsem.o
CC arch/x86/mm/extable.o
AR arch/x86/kernel/fpu/built-in.a
CC security/device_cgroup.o
CC fs/quota/kqid.o
CC arch/x86/kernel/cpu/mtrr/amd.o
AR fs/sysfs/built-in.a
CC arch/x86/pci/legacy.o
CC arch/x86/kernel/cpu/common.o
CC crypto/asymmetric_keys/pkcs7_verify.o
CC fs/netfs/direct_write.o
CC arch/x86/lib/crc32-glue.o
AR lib/zlib_inflate/built-in.a
CC io_uring/notif.o
CC security/selinux/selinuxfs.o
CC arch/x86/kernel/cpu/mce/threshold.o
CC arch/x86/events/zhaoxin/core.o
AR lib/zlib_deflate/built-in.a
CC net/core/datagram.o
CC fs/iomap/seek.o
CC arch/x86/entry/common.o
CC io_uring/tctx.o
CC fs/ext4/bitmap.o
CC ipc/mqueue.o
CC crypto/api.o
CC mm/maccess.o
CC sound/core/seq/seq_timer.o
CC block/fops.o
CC lib/crypto/mpi/mpi-bit.o
CC fs/notify/mark.o
CC security/keys/request_key.o
CC arch/x86/kernel/cpu/rdrand.o
AS arch/x86/lib/crc32-pclmul.o
CC crypto/asymmetric_keys/x509.asn1.o
CC fs/quota/netlink.o
CC arch/x86/lib/msr.o
CC lib/lzo/lzo1x_decompress_safe.o
CC crypto/asymmetric_keys/x509_akid.asn1.o
CC fs/kernfs/symlink.o
CC mm/page-writeback.o
CC crypto/asymmetric_keys/x509_cert_parser.o
CC arch/x86/kernel/cpu/mtrr/cyrix.o
CC kernel/locking/spinlock.o
AR arch/x86/platform/iris/built-in.a
CC arch/x86/events/core.o
CC fs/proc/base.o
CC arch/x86/platform/intel/iosf_mbi.o
CC arch/x86/pci/irq.o
AR arch/x86/platform/efi/built-in.a
CC arch/x86/kernel/cpu/match.o
AR drivers/pci/pcie/built-in.a
CC net/ethernet/eth.o
CC drivers/pci/hotplug/pci_hotplug_core.o
CC kernel/power/console.o
CC security/keys/request_key_auth.o
CC arch/x86/mm/mmap.o
CC fs/netfs/iterator.o
AR drivers/video/console/built-in.a
CC arch/x86/mm/pgtable.o
CC drivers/video/backlight/backlight.o
CC fs/iomap/swapfile.o
CC kernel/locking/osq_lock.o
CC arch/x86/mm/physaddr.o
AR lib/lzo/built-in.a
CC io_uring/filetable.o
CC fs/netfs/locking.o
CC lib/crypto/mpi/mpi-cmp.o
CC fs/netfs/main.o
CC fs/ext4/block_validity.o
CC lib/lz4/lz4_decompress.o
CC sound/core/seq/seq_system.o
CC fs/notify/fdinfo.o
AS arch/x86/entry/thunk.o
CC crypto/asymmetric_keys/pkcs7.asn1.o
CC fs/proc/generic.o
AR arch/x86/entry/built-in.a
CC arch/x86/kernel/cpu/mtrr/centaur.o
CC crypto/asymmetric_keys/pkcs7_parser.o
CC arch/x86/pci/common.o
CC kernel/printk/printk.o
CC lib/zstd/zstd_decompress_module.o
AR arch/x86/events/zhaoxin/built-in.a
CC kernel/irq/irqdesc.o
CC kernel/locking/qspinlock.o
CC kernel/rcu/update.o
AR arch/x86/kernel/cpu/mce/built-in.a
AR sound/pci/ice1712/built-in.a
CC fs/netfs/misc.o
AR fs/kernfs/built-in.a
AR fs/quota/built-in.a
CC kernel/printk/printk_safe.o
AR kernel/livepatch/built-in.a
CC arch/x86/pci/early.o
CC arch/x86/kernel/cpu/mtrr/legacy.o
CC arch/x86/kernel/cpu/bugs.o
AS arch/x86/lib/msr-reg.o
CC kernel/sched/fair.o
CC arch/x86/lib/msr-reg-export.o
CC block/bio.o
AR arch/x86/platform/intel/built-in.a
AR arch/x86/platform/intel-mid/built-in.a
AR arch/x86/platform/intel-quark/built-in.a
AR arch/x86/platform/olpc/built-in.a
AR arch/x86/platform/scx200/built-in.a
CC security/keys/user_defined.o
CC kernel/power/process.o
AR arch/x86/platform/ts5500/built-in.a
CC fs/proc/array.o
AR arch/x86/platform/uv/built-in.a
AR arch/x86/platform/built-in.a
CC kernel/rcu/sync.o
CC kernel/printk/nbcon.o
AS arch/x86/lib/hweight.o
CC lib/zstd/decompress/huf_decompress.o
AR drivers/pci/controller/dwc/built-in.a
CC drivers/pci/hotplug/acpi_pcihp.o
CC arch/x86/lib/iomem.o
AR drivers/pci/controller/mobiveil/built-in.a
CC lib/crypto/mpi/mpi-sub-ui.o
AR drivers/pci/controller/plda/built-in.a
AR drivers/pci/controller/built-in.a
CC lib/crypto/mpi/mpi-div.o
CC lib/zstd/decompress/zstd_ddict.o
CC sound/core/seq/seq_ports.o
CC arch/x86/mm/tlb.o
CC kernel/locking/rtmutex_api.o
AR fs/iomap/built-in.a
AR crypto/asymmetric_keys/built-in.a
CC lib/crypto/mpi/mpi-mod.o
CC crypto/cipher.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
CC lib/zstd/decompress/zstd_decompress.o
AR fs/notify/built-in.a
CC lib/crypto/utils.o
AR drivers/video/fbdev/core/built-in.a
AR drivers/video/fbdev/omap/built-in.a
CC kernel/locking/qrwlock.o
AR drivers/video/backlight/built-in.a
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
CC net/core/stream.o
CC io_uring/rw.o
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
CC kernel/irq/handle.o
AR drivers/video/fbdev/omap2/omapfb/built-in.a
AR drivers/video/fbdev/omap2/built-in.a
CC arch/x86/lib/atomic64_32.o
CC ipc/namespace.o
AR drivers/video/fbdev/built-in.a
CC drivers/video/aperture.o
AR drivers/pci/switch/built-in.a
CC drivers/video/cmdline.o
CC arch/x86/pci/bus_numa.o
CC net/core/scm.o
CC security/selinux/netlink.o
CC fs/jbd2/transaction.o
CC lib/crypto/mpi/mpi-mul.o
CC drivers/video/nomodeset.o
CC fs/ext4/dir.o
CC sound/pci/hda/hda_jack.o
CC arch/x86/events/probe.o
CC sound/core/seq/seq_info.o
CC arch/x86/lib/inat.o
AR net/ethernet/built-in.a
CC mm/folio-compat.o
CC security/keys/proc.o
AR arch/x86/lib/built-in.a
AR arch/x86/lib/lib.a
AR sound/pci/korg1212/built-in.a
CC kernel/dma/mapping.o
CC lib/xz/xz_dec_syms.o
CC sound/core/control.o
CC lib/dim/dim.o
CC arch/x86/kernel/cpu/aperfmperf.o
CC crypto/compress.o
AR net/802/built-in.a
CC ipc/mq_sysctl.o
AR drivers/pci/hotplug/built-in.a
CC kernel/printk/printk_ringbuffer.o
CC drivers/pci/access.o
CC arch/x86/events/utils.o
CC kernel/entry/common.o
CC kernel/rcu/srcutree.o
CC kernel/irq/manage.o
CC kernel/dma/direct.o
CC kernel/rcu/tree.o
AR lib/lz4/built-in.a
CC fs/jbd2/commit.o
CC kernel/entry/syscall_user_dispatch.o
CC arch/x86/kernel/acpi/boot.o
CC kernel/power/suspend.o
CC kernel/power/hibernate.o
CC lib/xz/xz_dec_stream.o
CC arch/x86/pci/amd_bus.o
CC sound/core/seq/seq_dummy.o
CC fs/proc/fd.o
CC lib/dim/net_dim.o
CC net/sched/sch_generic.o
CC lib/crypto/mpi/mpih-cmp.o
CC net/core/gen_stats.o
AR ipc/built-in.a
CC fs/netfs/objects.o
CC net/core/gen_estimator.o
CC drivers/video/hdmi.o
AR kernel/locking/built-in.a
CC lib/crypto/mpi/mpih-div.o
CC security/selinux/nlmsgtab.o
CC fs/ext4/ext4_jbd2.o
CC security/keys/sysctl.o
CC arch/x86/mm/cpu_entry_area.o
CC crypto/algapi.o
CC mm/readahead.o
CC lib/zstd/decompress/zstd_decompress_block.o
CC arch/x86/events/intel/ds.o
CC arch/x86/mm/maccess.o
CC arch/x86/mm/pgprot.o
CC arch/x86/kernel/cpu/cpuid-deps.o
CC lib/zstd/zstd_common_module.o
CC sound/pci/hda/hda_auto_parser.o
CC block/elevator.o
AR sound/pci/mixart/built-in.a
CC arch/x86/events/rapl.o
CC arch/x86/events/msr.o
CC lib/xz/xz_dec_lzma2.o
CC kernel/power/snapshot.o
CC net/netlink/af_netlink.o
AR sound/core/seq/built-in.a
AR net/bpf/built-in.a
CC lib/xz/xz_dec_bcj.o
CC drivers/pci/bus.o
CC fs/ext4/extents.o
CC io_uring/net.o
CC fs/proc/proc_tty.o
CC kernel/rcu/rcu_segcblist.o
CC sound/pci/hda/hda_sysfs.o
CC security/keys/keyctl_pkey.o
AR arch/x86/pci/built-in.a
CC arch/x86/kernel/cpu/umwait.o
CC arch/x86/kernel/acpi/sleep.o
AR kernel/entry/built-in.a
AS arch/x86/kernel/acpi/wakeup_32.o
CC net/sched/sch_mq.o
AR sound/pci/nm256/built-in.a
CC net/ethtool/ioctl.o
CC kernel/power/swap.o
CC net/netlink/genetlink.o
CC kernel/printk/sysctl.o
CC arch/x86/mm/pgtable_32.o
AR sound/ppc/built-in.a
CC fs/ramfs/inode.o
AR drivers/video/built-in.a
CC io_uring/poll.o
CC lib/dim/rdma_dim.o
CC lib/crypto/mpi/mpih-mul.o
CC fs/jbd2/recovery.o
CC fs/netfs/read_collect.o
CC block/blk-core.o
CC net/ethtool/common.o
CC sound/core/misc.o
CC lib/zstd/common/debug.o
CC arch/x86/events/intel/knc.o
CC arch/x86/events/intel/lbr.o
CC security/selinux/netif.o
CC arch/x86/kernel/apic/apic.o
CC kernel/irq/spurious.o
CC net/ethtool/netlink.o
CC block/blk-sysfs.o
CC fs/ramfs/file-mmu.o
CC block/blk-flush.o
AR lib/xz/built-in.a
AR kernel/printk/built-in.a
CC arch/x86/kernel/apic/apic_common.o
CC io_uring/eventfd.o
CC mm/swap.o
CC fs/proc/cmdline.o
AR security/keys/built-in.a
CC drivers/pci/probe.o
AR lib/dim/built-in.a
AR sound/pci/oxygen/built-in.a
CC lib/crypto/mpi/mpi-pow.o
CC lib/crypto/mpi/mpiutil.o
CC kernel/irq/resend.o
MKCAP arch/x86/kernel/cpu/capflags.c
CC kernel/sched/build_policy.o
CC crypto/scatterwalk.o
CC arch/x86/kernel/acpi/cstate.o
CC arch/x86/mm/iomap_32.o
CC sound/pci/hda/hda_controller.o
CC arch/x86/events/intel/p4.o
CC net/core/net_namespace.o
CC net/core/secure_seq.o
CC arch/x86/mm/hugetlbpage.o
CC fs/ext4/extents_status.o
CC kernel/module/main.o
CC sound/core/device.o
CC kernel/dma/ops_helpers.o
CC fs/jbd2/checkpoint.o
CC sound/pci/hda/hda_proc.o
CC fs/proc/consoles.o
CC kernel/irq/chip.o
AR fs/ramfs/built-in.a
CC fs/netfs/read_pgpriv2.o
CC kernel/power/user.o
CC sound/pci/hda/hda_hwdep.o
AR sound/arm/built-in.a
CC net/sched/sch_frag.o
CC kernel/module/strict_rwx.o
CC kernel/module/kmod.o
AR arch/x86/kernel/acpi/built-in.a
CC lib/zstd/common/entropy_common.o
CC fs/netfs/read_retry.o
CC crypto/proc.o
AR lib/crypto/mpi/built-in.a
CC io_uring/uring_cmd.o
CC lib/crypto/chacha.o
CC lib/fonts/fonts.o
CC kernel/sched/build_utility.o
CC arch/x86/events/intel/p6.o
CC arch/x86/events/intel/pt.o
CC sound/core/info.o
CC fs/hugetlbfs/inode.o
CC security/selinux/netnode.o
CC kernel/module/tree_lookup.o
CC lib/crypto/aes.o
CC arch/x86/kernel/apic/apic_noop.o
CC arch/x86/mm/dump_pagetables.o
CC kernel/dma/remap.o
CC fs/proc/cpuinfo.o
CC lib/zstd/common/error_private.o
CC fs/proc/devices.o
CC fs/jbd2/revoke.o
CC fs/fat/cache.o
CC net/sched/sch_api.o
CC arch/x86/kernel/apic/ipi.o
CC lib/fonts/font_8x16.o
CC lib/zstd/common/fse_decompress.o
CC mm/truncate.o
CC net/core/flow_dissector.o
CC arch/x86/events/intel/uncore.o
CC kernel/power/poweroff.o
CC crypto/aead.o
CC arch/x86/mm/highmem_32.o
CC arch/x86/kernel/apic/vector.o
CC kernel/irq/dummychip.o
CC mm/vmscan.o
CC arch/x86/kernel/cpu/powerflags.o
CC fs/ext4/file.o
CC kernel/time/time.o
CC lib/argv_split.o
CC lib/crypto/arc4.o
AR lib/fonts/built-in.a
CC net/ethtool/bitset.o
CC sound/core/isadma.o
CC net/ethtool/strset.o
AR kernel/power/built-in.a
CC net/netlink/policy.o
CC crypto/geniv.o
CC io_uring/openclose.o
CC fs/isofs/namei.o
CC sound/pci/hda/hda_intel.o
CC fs/isofs/inode.o
CC drivers/pci/host-bridge.o
CC fs/netfs/read_single.o
AR kernel/dma/built-in.a
CC kernel/module/kallsyms.o
CC crypto/lskcipher.o
CC block/blk-settings.o
CC fs/proc/interrupts.o
AR sound/pci/pcxhr/built-in.a
CC fs/proc/loadavg.o
AR drivers/acpi/pmic/built-in.a
CC lib/zstd/common/zstd_common.o
CC drivers/acpi/acpica/dsargs.o
CC net/ethtool/linkinfo.o
CC lib/bug.o
CC arch/x86/kernel/apic/init.o
AR lib/zstd/built-in.a
CC net/ethtool/linkmodes.o
CC lib/crypto/gf128mul.o
CC kernel/irq/devres.o
CC sound/core/vmaster.o
CC fs/fat/dir.o
CC fs/jbd2/journal.o
AR sound/pci/riptide/built-in.a
AR arch/x86/mm/built-in.a
CC net/netfilter/core.o
AR sound/pci/rme9652/built-in.a
CC lib/crypto/blake2s.o
CC security/selinux/netport.o
CC drivers/pnp/pnpacpi/core.o
CC kernel/time/timer.o
CC drivers/acpi/acpica/dscontrol.o
CC fs/ext4/fsmap.o
CC net/sched/sch_blackhole.o
AR kernel/rcu/built-in.a
CC lib/buildid.o
CC net/core/sysctl_net_core.o
CC drivers/acpi/dptf/int340x_thermal.o
CC fs/proc/meminfo.o
CC drivers/pci/remove.o
CC drivers/acpi/x86/apple.o
AR sound/pci/trident/built-in.a
CC kernel/irq/kexec.o
CC net/netfilter/nf_log.o
CC lib/crypto/blake2s-generic.o
CC kernel/time/hrtimer.o
AR fs/hugetlbfs/built-in.a
CC kernel/module/procfs.o
CC io_uring/sqpoll.o
CC fs/proc/stat.o
CC block/blk-ioc.o
CC arch/x86/kernel/apic/hw_nmi.o
CC fs/netfs/rolling_buffer.o
CC arch/x86/events/intel/uncore_nhmex.o
CC arch/x86/kernel/apic/io_apic.o
CC sound/core/ctljack.o
CC drivers/pnp/pnpacpi/rsparser.o
CC fs/ext4/fsync.o
CC drivers/acpi/acpica/dsdebug.o
AR net/netlink/built-in.a
CC fs/ext4/hash.o
CC net/netfilter/nf_queue.o
CC crypto/skcipher.o
CC security/selinux/status.o
CC arch/x86/kernel/apic/msi.o
AR drivers/acpi/dptf/built-in.a
CC drivers/pci/pci.o
CC net/ipv4/netfilter/nf_defrag_ipv4.o
CC kernel/irq/autoprobe.o
CC net/ipv4/netfilter/nf_reject_ipv4.o
CC drivers/acpi/x86/cmos_rtc.o
AR sound/pci/ymfpci/built-in.a
CC lib/crypto/sha1.o
CC fs/fat/fatent.o
CC fs/isofs/dir.o
CC drivers/acpi/acpica/dsfield.o
CC net/ethtool/rss.o
CC net/ethtool/linkstate.o
CC sound/core/jack.o
CC net/ipv4/netfilter/ip_tables.o
CC net/xfrm/xfrm_policy.o
CC drivers/acpi/tables.o
CC kernel/module/sysfs.o
CC fs/proc/uptime.o
CC net/netfilter/nf_sockopt.o
CC block/blk-map.o
CC block/blk-merge.o
AR sound/pci/hda/built-in.a
AR sound/pci/vx222/built-in.a
CC net/sched/cls_api.o
AR sound/pci/built-in.a
CC net/sched/act_api.o
CC fs/netfs/write_collect.o
CC kernel/time/sleep_timeout.o
CC lib/crypto/sha256.o
CC kernel/irq/irqdomain.o
CC net/netfilter/utils.o
CC drivers/acpi/acpica/dsinit.o
CC arch/x86/kernel/cpu/topology.o
CC security/selinux/ss/ebitmap.o
CC security/selinux/ss/hashtab.o
CC security/selinux/ss/symtab.o
CC net/core/dev.o
AR drivers/pnp/pnpacpi/built-in.a
CC drivers/pnp/core.o
CC drivers/acpi/x86/lpss.o
CC fs/proc/util.o
CC net/core/dev_addr_lists.o
CC fs/isofs/util.o
CC arch/x86/kernel/cpu/proc.o
CC sound/core/hwdep.o
CC arch/x86/events/intel/uncore_snb.o
CC net/unix/af_unix.o
CC kernel/time/timekeeping.o
CC net/core/dst.o
CC crypto/seqiv.o
CC drivers/acpi/acpica/dsmethod.o
AR kernel/module/built-in.a
AR drivers/amba/built-in.a
CC fs/fat/file.o
AR drivers/clk/actions/built-in.a
AR drivers/clk/analogbits/built-in.a
CC net/ipv6/netfilter/ip6_tables.o
AR drivers/clk/bcm/built-in.a
AR drivers/clk/imgtec/built-in.a
CC sound/core/timer.o
AR lib/crypto/built-in.a
AR drivers/clk/imx/built-in.a
CC lib/clz_tab.o
AR drivers/clk/ingenic/built-in.a
CC fs/ext4/ialloc.o
CC drivers/dma/dw/core.o
AR drivers/clk/mediatek/built-in.a
AR drivers/clk/microchip/built-in.a
CC lib/cmdline.o
AR drivers/clk/mstar/built-in.a
CC drivers/dma/hsu/hsu.o
CC drivers/dma/dw/dw.o
AR drivers/clk/mvebu/built-in.a
AR drivers/clk/ralink/built-in.a
AR drivers/clk/renesas/built-in.a
CC net/ethtool/debug.o
AR drivers/clk/socfpga/built-in.a
AR drivers/soc/apple/built-in.a
AR drivers/clk/sophgo/built-in.a
CC io_uring/xattr.o
AR drivers/soc/aspeed/built-in.a
AR drivers/clk/sprd/built-in.a
AR drivers/soc/bcm/built-in.a
AR drivers/clk/starfive/built-in.a
AR drivers/soc/fsl/built-in.a
AR drivers/clk/sunxi-ng/built-in.a
AR drivers/soc/fujitsu/built-in.a
AR drivers/clk/ti/built-in.a
AR drivers/soc/hisilicon/built-in.a
CC mm/shrinker.o
CC lib/cpumask.o
AR drivers/clk/versatile/built-in.a
AR drivers/soc/imx/built-in.a
AR drivers/dma/idxd/built-in.a
AR drivers/clk/xilinx/built-in.a
AR drivers/soc/ixp4xx/built-in.a
CC drivers/virtio/virtio.o
CC net/ipv6/netfilter/ip6table_filter.o
AR drivers/clk/built-in.a
AR drivers/soc/loongson/built-in.a
CC fs/proc/version.o
CC sound/core/hrtimer.o
AR drivers/soc/mediatek/built-in.a
AR drivers/soc/microchip/built-in.a
CC arch/x86/kernel/kprobes/core.o
AR drivers/soc/nuvoton/built-in.a
CC arch/x86/kernel/kprobes/opt.o
AR drivers/soc/pxa/built-in.a
AR drivers/dma/amd/built-in.a
CC net/ethtool/wol.o
CC drivers/pnp/card.o
AR drivers/soc/amlogic/built-in.a
AR drivers/soc/qcom/built-in.a
AR drivers/soc/renesas/built-in.a
AR drivers/soc/rockchip/built-in.a
CC arch/x86/kernel/apic/probe_32.o
AR drivers/soc/sunxi/built-in.a
CC mm/shmem.o
AR drivers/soc/ti/built-in.a
CC drivers/acpi/x86/s2idle.o
CC drivers/acpi/acpica/dsmthdat.o
AR drivers/soc/versatile/built-in.a
AR drivers/soc/xilinx/built-in.a
AR drivers/soc/built-in.a
CC fs/isofs/rock.o
LDS arch/x86/kernel/vmlinux.lds
CC net/unix/garbage.o
AR sound/sh/built-in.a
CC net/ipv4/netfilter/iptable_filter.o
CC drivers/acpi/x86/utils.o
CC fs/proc/softirqs.o
CC fs/netfs/write_issue.o
AR fs/jbd2/built-in.a
CC kernel/irq/proc.o
CC crypto/echainiv.o
CC crypto/ahash.o
CC drivers/dma/dw/idma32.o
AR kernel/sched/built-in.a
CC net/sched/sch_fifo.o
CC drivers/acpi/acpica/dsobject.o
CC net/netfilter/nfnetlink.o
CC drivers/pnp/driver.o
CC kernel/irq/migration.o
AR arch/x86/kernel/apic/built-in.a
CC security/selinux/ss/sidtab.o
CC lib/ctype.o
CC lib/dec_and_lock.o
CC fs/proc/namespaces.o
CC fs/proc/self.o
CC arch/x86/events/intel/uncore_snbep.o
CC block/blk-timeout.o
AR drivers/dma/hsu/built-in.a
CC drivers/dma/dw/acpi.o
CC net/xfrm/xfrm_state.o
CC io_uring/nop.o
CC fs/fat/inode.o
CC lib/decompress.o
CC drivers/virtio/virtio_ring.o
CC net/xfrm/xfrm_hash.o
CC lib/decompress_bunzip2.o
CC arch/x86/kernel/cpu/feat_ctl.o
CC arch/x86/kernel/cpu/intel.o
CC drivers/acpi/acpica/dsopcode.o
CC drivers/virtio/virtio_anchor.o
CC arch/x86/kernel/cpu/tsx.o
CC drivers/pnp/resource.o
CC block/blk-lib.o
CC net/packet/af_packet.o
CC fs/netfs/write_retry.o
CC kernel/futex/core.o
CC kernel/cgroup/cgroup.o
AR arch/x86/kernel/kprobes/built-in.a
CC net/ipv6/af_inet6.o
CC arch/x86/events/intel/uncore_discovery.o
CC drivers/acpi/x86/blacklist.o
CC kernel/irq/cpuhotplug.o
CC net/ethtool/features.o
CC kernel/futex/syscalls.o
CC fs/isofs/export.o
CC net/ipv4/route.o
CC drivers/pci/pci-driver.o
CC crypto/shash.o
CC kernel/time/ntp.o
CC sound/core/pcm.o
CC block/blk-mq.o
CC net/ipv4/netfilter/iptable_mangle.o
CC drivers/acpi/acpica/dspkginit.o
CC net/ipv4/netfilter/ipt_REJECT.o
AR drivers/dma/dw/built-in.a
AR net/dsa/built-in.a
CC drivers/acpi/acpica/dsutils.o
AR drivers/dma/mediatek/built-in.a
CC lib/decompress_inflate.o
AR drivers/dma/qcom/built-in.a
AR drivers/dma/stm32/built-in.a
CC fs/proc/thread_self.o
CC lib/decompress_unlz4.o
CC drivers/pci/search.o
AR drivers/dma/ti/built-in.a
AR drivers/dma/xilinx/built-in.a
CC drivers/dma/dmaengine.o
CC net/ipv6/netfilter/ip6table_mangle.o
CC net/unix/sysctl_net_unix.o
CC kernel/time/clocksource.o
AR drivers/acpi/x86/built-in.a
CC drivers/acpi/osi.o
CC net/ipv6/anycast.o
CC fs/fat/misc.o
CC arch/x86/kernel/cpu/intel_epb.o
CC io_uring/fs.o
CC net/ethtool/privflags.o
CC net/netfilter/nfnetlink_log.o
CC fs/isofs/joliet.o
CC net/sched/cls_cgroup.o
CC kernel/irq/pm.o
CC drivers/pnp/manager.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC security/selinux/ss/avtab.o
CC drivers/acpi/acpica/dswexec.o
CC [M] net/ipv4/netfilter/iptable_nat.o
CC io_uring/splice.o
AR fs/netfs/built-in.a
CC net/xfrm/xfrm_input.o
CC lib/decompress_unlzma.o
CC fs/ext4/indirect.o
CC kernel/cgroup/rstat.o
CC fs/proc/proc_sysctl.o
CC arch/x86/kernel/cpu/amd.o
CC kernel/futex/pi.o
CC security/selinux/ss/policydb.o
CC sound/core/pcm_native.o
CC drivers/pci/rom.o
CC sound/core/pcm_lib.o
CC kernel/cgroup/namespace.o
CC drivers/dma/virt-dma.o
CC crypto/akcipher.o
CC crypto/sig.o
CC net/sunrpc/auth_gss/auth_gss.o
CC drivers/acpi/acpica/dswload.o
CC net/xfrm/xfrm_output.o
CC net/netfilter/nf_conntrack_core.o
CC fs/isofs/compress.o
AR net/unix/built-in.a
CC fs/fat/nfs.o
CC security/selinux/ss/services.o
CC kernel/time/jiffies.o
CC drivers/pnp/support.o
CC fs/nfs/client.o
CC fs/exportfs/expfs.o
CC kernel/irq/msi.o
CC fs/lockd/clntlock.o
CC net/ethtool/rings.o
CC kernel/irq/affinity.o
CC mm/util.o
CC drivers/virtio/virtio_pci_legacy_dev.o
CC fs/nls/nls_base.o
AR fs/unicode/built-in.a
CC mm/mmzone.o
CC drivers/acpi/acpica/dswload2.o
CC drivers/pci/setup-res.o
CC net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
CC io_uring/sync.o
CC lib/decompress_unlzo.o
CC kernel/futex/requeue.o
CC kernel/time/timer_list.o
CC drivers/dma/acpi-dma.o
CC arch/x86/events/intel/cstate.o
CC mm/vmstat.o
CC net/sched/ematch.o
CC drivers/pci/irq.o
CC arch/x86/kernel/cpu/hygon.o
AR net/ipv4/netfilter/built-in.a
CC drivers/pnp/interface.o
CC drivers/pci/vpd.o
CC net/xfrm/xfrm_sysctl.o
AS arch/x86/kernel/head_32.o
CC crypto/kpp.o
CC lib/decompress_unxz.o
CC drivers/acpi/acpica/dswscope.o
CC sound/core/pcm_misc.o
CC fs/nls/nls_cp437.o
CC net/sunrpc/clnt.o
AR fs/exportfs/built-in.a
CC drivers/acpi/osl.o
AR net/wireless/tests/built-in.a
CC net/wireless/core.o
CC fs/ext4/inline.o
CC fs/fat/namei_vfat.o
CC drivers/virtio/virtio_pci_modern.o
AR fs/isofs/built-in.a
CC net/ipv6/ip6_output.o
CC drivers/acpi/utils.o
CC drivers/acpi/acpica/dswstate.o
CC arch/x86/kernel/cpu/centaur.o
CC net/ipv6/ip6_input.o
CC net/ipv6/addrconf.o
CC kernel/futex/waitwake.o
CC fs/proc/proc_net.o
CC fs/nls/nls_ascii.o
CC kernel/time/timeconv.o
CC kernel/time/timecounter.o
AR drivers/dma/built-in.a
CC fs/proc/kcore.o
CC io_uring/msg_ring.o
CC lib/decompress_unzstd.o
CC net/sunrpc/xprt.o
CC kernel/irq/matrix.o
CC drivers/pnp/quirks.o
CC net/ethtool/channels.o
CC fs/lockd/clntproc.o
AR arch/x86/events/intel/built-in.a
AR arch/x86/events/built-in.a
CC fs/lockd/clntxdr.o
CC drivers/pnp/system.o
CC net/xfrm/xfrm_replay.o
CC fs/nfs/dir.o
CC drivers/acpi/acpica/evevent.o
ASN.1 crypto/rsapubkey.asn1.[ch]
ASN.1 crypto/rsaprivkey.asn1.[ch]
CC crypto/rsa.o
CC drivers/pci/setup-bus.o
CC net/sunrpc/auth_gss/gss_mech_switch.o
CC drivers/virtio/virtio_pci_common.o
CC security/selinux/ss/conditional.o
CC arch/x86/kernel/cpu/transmeta.o
CC fs/nls/nls_iso8859-1.o
AR net/sched/built-in.a
CC net/wireless/sysfs.o
CC kernel/time/alarmtimer.o
CC net/ipv6/netfilter/nf_conntrack_reasm.o
CC net/ipv4/inetpeer.o
CC fs/proc/vmcore.o
CC net/sunrpc/socklib.o
CC fs/fat/namei_msdos.o
CC lib/dump_stack.o
CC drivers/acpi/acpica/evgpe.o
AR net/packet/built-in.a
CC lib/earlycpio.o
CC crypto/rsa_helper.o
AR kernel/futex/built-in.a
CC drivers/virtio/virtio_pci_legacy.o
CC net/core/netevent.o
CC fs/proc/kmsg.o
CC fs/nls/nls_utf8.o
CC mm/backing-dev.o
CC io_uring/advise.o
CC sound/core/pcm_memory.o
CC arch/x86/kernel/cpu/zhaoxin.o
CC crypto/rsa-pkcs1pad.o
AR drivers/pnp/built-in.a
CC drivers/acpi/reboot.o
CC drivers/tty/vt/vt_ioctl.o
CC net/wireless/radiotap.o
CC drivers/tty/hvc/hvc_console.o
CC drivers/tty/serial/serial_core.o
CC drivers/tty/serial/8250/8250_core.o
CC net/core/neighbour.o
CC net/wireless/util.o
CC net/netfilter/nf_conntrack_standalone.o
CC drivers/acpi/acpica/evgpeblk.o
CC block/blk-mq-tag.o
AR fs/nls/built-in.a
CC net/netfilter/nf_conntrack_expect.o
CC net/ethtool/coalesce.o
CC mm/mm_init.o
CC arch/x86/kernel/cpu/vortex.o
CC lib/extable.o
CC net/netfilter/nf_conntrack_helper.o
CC mm/percpu.o
AR kernel/irq/built-in.a
CC drivers/virtio/virtio_pci_admin_legacy_io.o
CC fs/ext4/inode.o
CC fs/autofs/init.o
CC net/xfrm/xfrm_device.o
CC fs/9p/vfs_super.o
CC drivers/acpi/acpica/evgpeinit.o
CC kernel/time/posix-timers.o
AR fs/fat/built-in.a
CC fs/lockd/host.o
CC net/ipv4/protocol.o
CC fs/autofs/inode.o
CC io_uring/epoll.o
CC fs/autofs/root.o
CC sound/core/memalloc.o
CC security/selinux/ss/mls.o
CC crypto/rsassa-pkcs1.o
CC fs/proc/page.o
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC fs/ext4/ioctl.o
CC net/netfilter/nf_conntrack_proto.o
CC net/sunrpc/auth_gss/svcauth_gss.o
CC drivers/char/hw_random/core.o
CC kernel/cgroup/cgroup-v1.o
CC lib/flex_proportions.o
CC net/ipv6/netfilter/nf_reject_ipv6.o
AR drivers/tty/hvc/built-in.a
CC kernel/time/posix-cpu-timers.o
CC mm/slab_common.o
CC drivers/acpi/acpica/evgpeutil.o
CC drivers/pci/vc.o
CC drivers/virtio/virtio_input.o
CC drivers/tty/serial/8250/8250_platform.o
CC drivers/tty/vt/vc_screen.o
CC drivers/tty/vt/selection.o
CC arch/x86/kernel/cpu/vmware.o
CC lib/idr.o
CC block/blk-stat.o
CC lib/iomem_copy.o
CC fs/9p/vfs_inode.o
CC io_uring/statx.o
CC crypto/acompress.o
CC security/selinux/ss/context.o
CC kernel/trace/trace_clock.o
CC kernel/cgroup/freezer.o
CC drivers/acpi/acpica/evglock.o
AR fs/proc/built-in.a
CC kernel/cgroup/legacy_freezer.o
CC net/ethtool/pause.o
CC net/core/rtnetlink.o
CC drivers/char/hw_random/intel-rng.o
AR net/mac80211/tests/built-in.a
CC net/mac80211/main.o
CC fs/ext4/mballoc.o
CC drivers/tty/serial/8250/8250_pnp.o
CC fs/autofs/symlink.o
CC sound/core/pcm_timer.o
CC net/xfrm/xfrm_nat_keepalive.o
CC security/selinux/netlabel.o
CC net/ipv4/ip_input.o
CC net/sunrpc/auth_gss/gss_rpc_upcall.o
CC block/blk-mq-sysfs.o
CC kernel/time/posix-clock.o
CC lib/irq_regs.o
CC arch/x86/kernel/cpu/hypervisor.o
CC kernel/trace/ring_buffer.o
CC drivers/acpi/acpica/evhandler.o
CC drivers/pci/mmap.o
CC drivers/pci/devres.o
CC crypto/scompress.o
CC drivers/virtio/virtio_dma_buf.o
CC drivers/char/hw_random/amd-rng.o
CC fs/lockd/svc.o
CC lib/is_single_threaded.o
CC net/netlabel/netlabel_user.o
CC drivers/tty/vt/keyboard.o
CC net/sunrpc/auth_gss/gss_rpc_xdr.o
CC drivers/tty/serial/8250/8250_rsa.o
CC arch/x86/kernel/cpu/mshyperv.o
CC drivers/pci/proc.o
CC fs/9p/vfs_inode_dotl.o
CC io_uring/timeout.o
CC drivers/acpi/nvs.o
CC sound/core/seq_device.o
CC drivers/acpi/acpica/evmisc.o
AR drivers/tty/ipwireless/built-in.a
CC net/netfilter/nf_conntrack_proto_generic.o
CC net/mac80211/status.o
CC arch/x86/kernel/cpu/debugfs.o
CC net/ipv6/netfilter/ip6t_ipv6header.o
CC fs/autofs/waitq.o
CC net/sunrpc/auth_gss/trace.o
CC io_uring/fdinfo.o
CC lib/klist.o
CC kernel/cgroup/pids.o
CC arch/x86/kernel/head32.o
CC fs/nfs/file.o
CC block/blk-mq-cpumap.o
CC kernel/time/itimer.o
AR drivers/virtio/built-in.a
AR fs/hostfs/built-in.a
CC lib/kobject.o
CC kernel/cgroup/rdma.o
CC arch/x86/kernel/ebda.o
CC net/ethtool/eee.o
CC drivers/char/hw_random/geode-rng.o
CC drivers/acpi/acpica/evregion.o
CC net/sunrpc/xprtsock.o
CC fs/nfs/getroot.o
CC net/netlabel/netlabel_kapi.o
AR sound/synth/emux/built-in.a
AR drivers/iommu/amd/built-in.a
AR sound/synth/built-in.a
AR drivers/iommu/intel/built-in.a
CC lib/kobject_uevent.o
CC drivers/tty/serial/8250/8250_port.o
AR drivers/iommu/arm/arm-smmu/built-in.a
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
CC net/xfrm/xfrm_algo.o
AR drivers/iommu/arm/built-in.a
CC crypto/algboss.o
CC drivers/tty/serial/serial_base_bus.o
AR drivers/iommu/iommufd/built-in.a
AR drivers/iommu/riscv/built-in.a
CC drivers/iommu/iommu.o
AR sound/core/built-in.a
CC net/ethtool/tsinfo.o
AR sound/usb/misc/built-in.a
AR sound/usb/usx2y/built-in.a
CC net/ipv6/addrlabel.o
AR security/selinux/built-in.a
AR sound/usb/caiaq/built-in.a
AR security/built-in.a
AR sound/usb/6fire/built-in.a
CC kernel/time/clockevents.o
AR sound/usb/hiface/built-in.a
CC kernel/bpf/core.o
AR sound/usb/bcd2000/built-in.a
AR sound/usb/built-in.a
CC kernel/time/tick-common.o
AR sound/firewire/built-in.a
CC net/mac80211/driver-ops.o
AR sound/sparc/built-in.a
CC arch/x86/kernel/cpu/bus_lock.o
CC block/blk-mq-sched.o
CC drivers/pci/pci-sysfs.o
AR sound/spi/built-in.a
AR sound/parisc/built-in.a
CC mm/compaction.o
AR sound/pcmcia/vx/built-in.a
AR sound/pcmcia/pdaudiocf/built-in.a
CC fs/autofs/expire.o
AR sound/pcmcia/built-in.a
CC kernel/cgroup/cpuset.o
CC net/ipv4/ip_fragment.o
CC drivers/acpi/acpica/evrgnini.o
AR sound/mips/built-in.a
AR sound/soc/built-in.a
AR sound/atmel/built-in.a
CC kernel/cgroup/misc.o
CC fs/lockd/svclock.o
CC fs/lockd/svcshare.o
CC sound/hda/hda_bus_type.o
CC fs/9p/vfs_addr.o
CC fs/9p/vfs_file.o
CC drivers/char/hw_random/via-rng.o
CC fs/autofs/dev-ioctl.o
CC drivers/tty/vt/vt.o
CC fs/debugfs/inode.o
CC io_uring/cancel.o
CC net/netfilter/nf_conntrack_proto_tcp.o
CC fs/debugfs/file.o
CC kernel/trace/trace.o
CC fs/nfs/inode.o
CC net/ipv6/netfilter/ip6t_REJECT.o
CC drivers/char/agp/backend.o
CC drivers/acpi/acpica/evsci.o
CC net/wireless/reg.o
CC crypto/testmgr.o
AR drivers/char/hw_random/built-in.a
CC fs/ext4/migrate.o
AR drivers/gpu/host1x/built-in.a
CC net/ipv6/route.o
CC kernel/time/tick-broadcast.o
CC sound/hda/hdac_bus.o
AR drivers/gpu/drm/tests/built-in.a
CC lib/logic_pio.o
AR drivers/gpu/drm/arm/built-in.a
AR drivers/gpu/drm/clients/built-in.a
CC drivers/acpi/acpica/evxface.o
CC drivers/gpu/drm/display/drm_display_helper_mod.o
CC io_uring/waitid.o
CC net/xfrm/xfrm_user.o
CC net/sunrpc/sched.o
CC arch/x86/kernel/cpu/capflags.o
CC fs/9p/vfs_dir.o
CC block/ioctl.o
AR arch/x86/kernel/cpu/built-in.a
CC net/ipv6/ip6_fib.o
CC arch/x86/kernel/platform-quirks.o
CC net/ethtool/cabletest.o
CC net/netlabel/netlabel_domainhash.o
AR fs/autofs/built-in.a
CC drivers/acpi/wakeup.o
AR sound/x86/built-in.a
CC net/rfkill/core.o
CC drivers/tty/serial/8250/8250_dma.o
CC drivers/iommu/iommu-traces.o
CC crypto/cmac.o
CC drivers/tty/tty_io.o
CC net/ipv6/ipv6_sockglue.o
CC drivers/char/agp/generic.o
CC fs/lockd/svcproc.o
CC drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
CC drivers/pci/slot.o
CC net/ipv4/ip_forward.o
CC drivers/acpi/acpica/evxfevnt.o
CC drivers/tty/serial/serial_ctrl.o
CC lib/maple_tree.o
CC kernel/time/tick-broadcast-hrtimer.o
CC arch/x86/kernel/process_32.o
AR fs/debugfs/built-in.a
CC drivers/tty/serial/8250/8250_dwlib.o
CC net/core/utils.o
CC net/sunrpc/auth_gss/gss_krb5_mech.o
CC block/genhd.o
AR drivers/gpu/vga/built-in.a
CC net/ethtool/tunnels.o
CC drivers/gpu/drm/ttm/ttm_tt.o
CC sound/hda/hdac_device.o
CC net/sunrpc/auth.o
CC crypto/hmac.o
CC drivers/iommu/iommu-sysfs.o
CC fs/9p/vfs_dentry.o
CC kernel/events/core.o
AR net/ipv6/netfilter/built-in.a
CC drivers/char/mem.o
CC drivers/acpi/acpica/evxfgpe.o
CC io_uring/register.o
CC kernel/time/tick-oneshot.o
CC kernel/events/ring_buffer.o
AR sound/xen/built-in.a
CC net/netfilter/nf_conntrack_proto_udp.o
CC kernel/cgroup/debug.o
CC crypto/crypto_null.o
CC drivers/pci/pci-acpi.o
CC lib/memcat_p.o
CC net/rfkill/input.o
CC net/wireless/scan.o
CC drivers/gpu/drm/display/drm_dp_helper.o
CC fs/tracefs/inode.o
CC drivers/tty/serial/8250/8250_pcilib.o
CC drivers/acpi/acpica/evxfregn.o
CC drivers/char/agp/isoch.o
CC drivers/iommu/dma-iommu.o
CC net/netlabel/netlabel_addrlist.o
CC kernel/time/tick-sched.o
CC net/sunrpc/auth_null.o
CC arch/x86/kernel/signal.o
CC drivers/pci/iomap.o
CC fs/9p/v9fs.o
CC net/mac80211/sta_info.o
CC mm/show_mem.o
CC fs/lockd/svcsubs.o
CC drivers/gpu/drm/ttm/ttm_bo.o
CC fs/nfs/super.o
CC sound/hda/hdac_sysfs.o
CC net/sunrpc/auth_gss/gss_krb5_seal.o
COPY drivers/tty/vt/defkeymap.c
CC net/ipv4/ip_options.o
CC drivers/tty/vt/consolemap.o
AR kernel/bpf/built-in.a
CC crypto/md5.o
HOSTCC drivers/tty/vt/conmakehash
CC sound/hda/hdac_regmap.o
CC drivers/acpi/acpica/exconcat.o
CC fs/tracefs/event_inode.o
CC net/core/link_watch.o
AR net/rfkill/built-in.a
CC fs/ext4/mmp.o
CC drivers/char/agp/amd64-agp.o
CC net/ethtool/fec.o
CC block/ioprio.o
AR kernel/cgroup/built-in.a
CC drivers/tty/n_tty.o
CC kernel/events/callchain.o
CC drivers/tty/serial/8250/8250_early.o
CC net/sunrpc/auth_tls.o
CC drivers/gpu/drm/ttm/ttm_bo_util.o
CC drivers/char/random.o
CC net/wireless/nl80211.o
CC drivers/iommu/iova.o
CC drivers/acpi/sleep.o
CC net/netlabel/netlabel_mgmt.o
CC drivers/acpi/acpica/exconfig.o
CC net/sunrpc/auth_unix.o
CC drivers/pci/quirks.o
CC fs/9p/fid.o
CC crypto/sha256_generic.o
CC arch/x86/kernel/signal_32.o
CC net/netfilter/nf_conntrack_proto_icmp.o
CC mm/interval_tree.o
CC kernel/time/timer_migration.o
CC kernel/trace/trace_output.o
CC drivers/acpi/device_sysfs.o
CC io_uring/truncate.o
CC sound/hda/hdac_controller.o
CC drivers/gpu/drm/display/drm_dp_mst_topology.o
AR net/xfrm/built-in.a
CC drivers/char/misc.o
CC drivers/connector/cn_queue.o
CC drivers/acpi/acpica/exconvrt.o
CC drivers/tty/vt/defkeymap.o
CC drivers/tty/serial/8250/8250_exar.o
CC fs/lockd/mon.o
CC fs/ext4/move_extent.o
CC mm/list_lru.o
CC drivers/char/agp/intel-agp.o
CC net/sunrpc/auth_gss/gss_krb5_unseal.o
CC block/badblocks.o
AR fs/tracefs/built-in.a
CC kernel/trace/trace_seq.o
CC kernel/events/hw_breakpoint.o
CONMK drivers/tty/vt/consolemap_deftbl.c
CC net/netfilter/nf_conntrack_extend.o
CC drivers/tty/vt/consolemap_deftbl.o
AR drivers/tty/vt/built-in.a
CC drivers/tty/serial/serial_port.o
CC crypto/sha512_generic.o
CC net/core/filter.o
CC net/ethtool/eeprom.o
CC fs/9p/xattr.o
AR drivers/iommu/built-in.a
AR sound/virtio/built-in.a
CC kernel/fork.o
CC drivers/gpu/drm/ttm/ttm_bo_vm.o
CC drivers/acpi/acpica/excreate.o
CC sound/hda/hdac_stream.o
CC net/ipv4/ip_output.o
CC arch/x86/kernel/traps.o
CC fs/nfs/io.o
CC net/netlabel/netlabel_unlabeled.o
CC net/sunrpc/auth_gss/gss_krb5_wrap.o
CC fs/lockd/trace.o
CC fs/ext4/namei.o
CC net/sunrpc/svc.o
CC drivers/tty/tty_ioctl.o
CC kernel/time/vsyscall.o
CC io_uring/memmap.o
CC drivers/acpi/acpica/exdebug.o
CC net/core/sock_diag.o
CC net/sunrpc/auth_gss/gss_krb5_crypto.o
CC net/ethtool/stats.o
CC drivers/connector/connector.o
CC mm/workingset.o
CC net/9p/mod.o
CC drivers/tty/serial/earlycon.o
CC drivers/char/agp/intel-gtt.o
CC kernel/events/uprobes.o
CC drivers/gpu/drm/i915/i915_config.o
CC drivers/base/power/sysfs.o
CC block/blk-rq-qos.o
CC crypto/sha3_generic.o
CC drivers/tty/serial/8250/8250_lpss.o
CC crypto/ecb.o
AR fs/9p/built-in.a
CC crypto/cbc.o
CC drivers/acpi/device_pm.o
CC drivers/acpi/acpica/exdump.o
CC drivers/block/loop.o
CC drivers/gpu/drm/i915/i915_driver.o
CC drivers/gpu/drm/ttm/ttm_module.o
CC drivers/block/virtio_blk.o
CC net/netfilter/nf_conntrack_acct.o
CC kernel/trace/trace_stat.o
CC net/wireless/mlme.o
CC drivers/misc/eeprom/eeprom_93cx6.o
CC net/9p/client.o
CC sound/hda/array.o
CC drivers/acpi/acpica/exfield.o
CC io_uring/alloc_cache.o
CC kernel/trace/trace_printk.o
CC kernel/time/timekeeping_debug.o
CC net/ipv6/ndisc.o
CC net/9p/error.o
CC net/sunrpc/auth_gss/gss_krb5_keys.o
CC arch/x86/kernel/idt.o
AR drivers/misc/cb710/built-in.a
CC crypto/ctr.o
CC lib/nmi_backtrace.o
CC fs/nfs/direct.o
CC drivers/base/power/generic_ops.o
CC sound/hda/hdmi_chmap.o
CC mm/debug.o
CC fs/lockd/xdr.o
CC drivers/pci/pci-label.o
CC drivers/gpu/drm/ttm/ttm_execbuf_util.o
CC drivers/tty/serial/8250/8250_mid.o
AR drivers/misc/eeprom/built-in.a
CC block/disk-events.o
AR drivers/misc/lis3lv02d/built-in.a
AR drivers/misc/cardreader/built-in.a
AR drivers/misc/keba/built-in.a
CC drivers/acpi/acpica/exfldio.o
AR drivers/misc/built-in.a
AR drivers/char/agp/built-in.a
CC drivers/acpi/acpica/exmisc.o
CC drivers/char/virtio_console.o
CC drivers/connector/cn_proc.o
CC fs/lockd/clnt4xdr.o
CC mm/gup.o
CC net/netlabel/netlabel_cipso_v4.o
CC net/ethtool/phc_vclocks.o
CC drivers/base/power/common.o
CC drivers/tty/serial/8250/8250_pci.o
CC crypto/gcm.o
CC io_uring/io-wq.o
CC drivers/base/power/qos.o
CC drivers/base/firmware_loader/builtin/main.o
CC kernel/time/namespace.o
CC drivers/base/firmware_loader/main.o
CC fs/nfs/pagelist.o
CC drivers/gpu/drm/i915/i915_drm_client.o
CC drivers/tty/tty_ldisc.o
CC net/netfilter/nf_conntrack_seqadj.o
CC arch/x86/kernel/irq.o
CC kernel/trace/pid_list.o
CC drivers/acpi/acpica/exmutex.o
CC drivers/pci/vgaarb.o
CC net/dns_resolver/dns_key.o
CC drivers/gpu/drm/ttm/ttm_range_manager.o
CC sound/hda/trace.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC net/mac80211/wep.o
CC mm/mmap_lock.o
CC net/dns_resolver/dns_query.o
CC net/sunrpc/svcsock.o
CC net/sunrpc/svcauth.o
CC block/blk-ia-ranges.o
CC net/ipv4/ip_sockglue.o
AR drivers/block/built-in.a
CC mm/highmem.o
AR net/sunrpc/auth_gss/built-in.a
CC net/ethtool/mm.o
CC net/mac80211/aead_api.o
CC net/ethtool/module.o
CC fs/ext4/page-io.o
CC net/netlabel/netlabel_calipso.o
CC drivers/acpi/acpica/exnames.o
CC fs/nfs/read.o
AR kernel/time/built-in.a
CC drivers/gpu/drm/display/drm_dsc_helper.o
CC net/netfilter/nf_conntrack_proto_icmpv6.o
CC io_uring/futex.o
CC fs/lockd/xdr4.o
AR drivers/connector/built-in.a
CC net/netfilter/nf_conntrack_netlink.o
CC drivers/gpu/drm/ttm/ttm_resource.o
CC crypto/ccm.o
CC drivers/gpu/drm/ttm/ttm_pool.o
CC drivers/acpi/acpica/exoparg1.o
CC net/9p/protocol.o
CC io_uring/napi.o
CC drivers/tty/serial/8250/8250_pericom.o
CC kernel/trace/trace_sched_switch.o
CC drivers/char/hpet.o
AR net/dns_resolver/built-in.a
AR drivers/base/firmware_loader/built-in.a
CC net/wireless/ibss.o
CC arch/x86/kernel/irq_32.o
CC block/early-lookup.o
CC net/sunrpc/svcauth_unix.o
CC kernel/exec_domain.o
CC net/wireless/sme.o
CC drivers/base/power/runtime.o
CC lib/objpool.o
CC drivers/gpu/drm/i915/i915_getparam.o
CC fs/ext4/readpage.o
CC block/bounce.o
CC sound/hda/hdac_component.o
AR drivers/pci/built-in.a
CC sound/sound_core.o
CC net/netfilter/nf_conntrack_ftp.o
CC drivers/acpi/acpica/exoparg2.o
CC drivers/tty/tty_buffer.o
CC drivers/base/regmap/regmap.o
CC net/mac80211/wpa.o
CC net/ipv4/inet_hashtables.o
CC net/ipv6/udp.o
CC net/ipv4/inet_timewait_sock.o
CC net/ipv4/inet_connection_sock.o
AR net/netlabel/built-in.a
CC net/ethtool/cmis_fw_update.o
CC net/ethtool/cmis_cdb.o
CC drivers/gpu/drm/display/drm_hdcp_helper.o
CC net/ipv4/tcp.o
CC lib/plist.o
CC net/ipv6/udplite.o
CC kernel/panic.o
CC mm/memory.o
CC net/9p/trans_common.o
AR drivers/tty/serial/8250/built-in.a
AR drivers/tty/serial/built-in.a
CC drivers/base/regmap/regcache.o
CC net/wireless/chan.o
CC lib/radix-tree.o
CC crypto/aes_generic.o
CC lib/ratelimit.o
CC drivers/acpi/acpica/exoparg3.o
CC arch/x86/kernel/dumpstack_32.o
CC drivers/gpu/drm/ttm/ttm_device.o
CC drivers/gpu/drm/ttm/ttm_sys_manager.o
CC fs/lockd/svc4proc.o
CC drivers/char/nvram.o
CC drivers/acpi/proc.o
CC sound/hda/hdac_i915.o
CC fs/ext4/resize.o
CC fs/nfs/symlink.o
CC drivers/tty/tty_port.o
CC sound/last.o
CC drivers/gpu/drm/i915/i915_ioctl.o
CC mm/mincore.o
CC kernel/trace/trace_nop.o
CC drivers/gpu/drm/ttm/ttm_agp_backend.o
CC drivers/base/power/wakeirq.o
CC drivers/acpi/acpica/exoparg6.o
CC net/9p/trans_fd.o
CC block/bsg.o
CC net/sunrpc/addr.o
AR io_uring/built-in.a
CC arch/x86/kernel/time.o
CC net/ipv6/raw.o
CC net/core/dev_ioctl.o
AR kernel/events/built-in.a
CC drivers/gpu/drm/display/drm_hdmi_helper.o
CC net/wireless/ethtool.o
CC lib/rbtree.o
CC lib/seq_buf.o
CC net/sunrpc/rpcb_clnt.o
CC crypto/authenc.o
CC fs/lockd/procfs.o
CC drivers/acpi/acpica/exprep.o
CC sound/hda/intel-dsp-config.o
CC drivers/base/power/main.o
CC drivers/tty/tty_mutex.o
CC drivers/gpu/drm/display/drm_scdc_helper.o
CC net/handshake/alert.o
CC kernel/trace/blktrace.o
CC drivers/gpu/drm/i915/i915_irq.o
CC fs/ext4/super.o
CC net/ipv4/tcp_input.o
CC arch/x86/kernel/ioport.o
CC net/ethtool/pse-pd.o
AR drivers/char/built-in.a
CC drivers/gpu/drm/i915/i915_mitigations.o
CC kernel/trace/trace_events.o
CC crypto/authencesn.o
AR drivers/gpu/drm/ttm/built-in.a
CC net/core/tso.o
CC block/blk-cgroup.o
CC net/devres.o
CC kernel/cpu.o
CC drivers/acpi/acpica/exregion.o
CC net/mac80211/scan.o
AR drivers/base/test/built-in.a
CC net/9p/trans_virtio.o
CC [M] fs/efivarfs/inode.o
CC net/netfilter/nf_conntrack_irc.o
CC net/ipv4/tcp_output.o
CC lib/siphash.o
CC fs/nfs/unlink.o
CC lib/string.o
CC net/netfilter/nf_conntrack_sip.o
CC sound/hda/intel-nhlt.o
CC drivers/tty/tty_ldsem.o
AR fs/lockd/built-in.a
CC drivers/tty/tty_baudrate.o
CC drivers/tty/tty_jobctrl.o
CC drivers/acpi/acpica/exresnte.o
CC net/handshake/genl.o
CC net/ethtool/plca.o
CC drivers/base/regmap/regcache-rbtree.o
AR drivers/gpu/drm/display/built-in.a
CC fs/ext4/symlink.o
CC arch/x86/kernel/dumpstack.o
CC lib/timerqueue.o
CC kernel/trace/trace_export.o
CC [M] fs/efivarfs/file.o
CC fs/nfs/write.o
CC drivers/base/component.o
CC net/sunrpc/timer.o
CC fs/open.o
CC lib/union_find.o
CC drivers/acpi/acpica/exresolv.o
CC sound/hda/intel-sdw-acpi.o
CC net/wireless/mesh.o
CC lib/vsprintf.o
CC drivers/tty/n_null.o
CC crypto/lzo.o
CC [M] fs/efivarfs/super.o
CC net/wireless/ap.o
CC block/blk-ioprio.o
CC net/ipv4/tcp_timer.o
CC drivers/base/power/wakeup.o
CC net/netfilter/nf_nat_core.o
CC drivers/gpu/drm/i915/i915_module.o
CC kernel/exit.o
CC arch/x86/kernel/nmi.o
CC [M] fs/efivarfs/vars.o
CC net/handshake/netlink.o
CC drivers/acpi/acpica/exresop.o
CC drivers/base/regmap/regcache-flat.o
CC net/mac80211/offchannel.o
CC net/ipv6/icmp.o
CC lib/win_minmax.o
CC net/sunrpc/xdr.o
AR net/9p/built-in.a
AR drivers/gpu/drm/renesas/rcar-du/built-in.a
AR drivers/gpu/drm/omapdrm/built-in.a
CC drivers/tty/pty.o
AR sound/hda/built-in.a
AR drivers/gpu/drm/renesas/rz-du/built-in.a
AR drivers/gpu/drm/tilcdc/built-in.a
AR sound/built-in.a
CC block/blk-iolatency.o
AR drivers/gpu/drm/renesas/built-in.a
CC net/core/sock_reuseport.o
CC drivers/base/regmap/regcache-maple.o
CC net/ipv4/tcp_ipv4.o
CC net/ipv4/tcp_minisocks.o
CC net/core/fib_notifier.o
CC block/blk-iocost.o
CC fs/ext4/sysfs.o
CC drivers/acpi/bus.o
CC fs/nfs/namespace.o
CC crypto/lzo-rle.o
CC net/ethtool/phy.o
CC drivers/acpi/acpica/exserial.o
CC lib/xarray.o
CC kernel/trace/trace_event_perf.o
CC net/handshake/request.o
CC net/netfilter/nf_nat_proto.o
CC kernel/softirq.o
CC mm/mlock.o
CC drivers/tty/tty_audit.o
LD [M] fs/efivarfs/efivarfs.o
CC net/socket.o
CC drivers/acpi/acpica/exstore.o
CC drivers/gpu/drm/i915/i915_params.o
AR drivers/mfd/built-in.a
CC crypto/rng.o
CC drivers/gpu/drm/i915/i915_pci.o
CC arch/x86/kernel/ldt.o
CC drivers/base/regmap/regmap-debugfs.o
CC net/ethtool/tsconfig.o
CC fs/read_write.o
CC drivers/base/core.o
CC block/mq-deadline.o
CC drivers/base/power/wakeup_stats.o
CC drivers/acpi/acpica/exstoren.o
AR drivers/nfc/built-in.a
CC kernel/resource.o
CC drivers/gpu/drm/virtio/virtgpu_drv.o
CC lib/lockref.o
CC fs/nfs/mount_clnt.o
CC block/kyber-iosched.o
CC drivers/gpu/drm/virtio/virtgpu_kms.o
CC drivers/gpu/drm/virtio/virtgpu_gem.o
CC drivers/base/power/trace.o
CC net/sunrpc/sunrpc_syms.o
CC drivers/tty/sysrq.o
CC net/wireless/trace.o
CC lib/bcd.o
CC drivers/gpu/drm/i915/i915_scatterlist.o
CC kernel/trace/trace_events_filter.o
CC kernel/trace/trace_events_trigger.o
CC fs/nfs/nfstrace.o
CC drivers/acpi/acpica/exstorob.o
CC drivers/base/bus.o
CC net/core/xdp.o
CC net/core/flow_offload.o
CC drivers/base/dd.o
CC drivers/base/syscore.o
CC net/handshake/tlshd.o
CC net/ipv6/mcast.o
CC crypto/drbg.o
AR drivers/base/regmap/built-in.a
CC fs/ext4/xattr.o
CC arch/x86/kernel/setup.o
CC drivers/acpi/glue.o
CC net/sunrpc/cache.o
AR drivers/gpu/drm/imx/built-in.a
CC crypto/jitterentropy.o
CC kernel/sysctl.o
CC drivers/acpi/acpica/exsystem.o
CC mm/mmap.o
CC net/netfilter/nf_nat_helper.o
CC net/core/gro.o
CC drivers/acpi/scan.o
CC net/ipv4/tcp_cong.o
CC drivers/acpi/acpica/extrace.o
AR net/ethtool/built-in.a
CC drivers/acpi/acpica/exutils.o
AR drivers/base/power/built-in.a
CC net/sunrpc/rpc_pipe.o
CC lib/sort.o
CC drivers/gpu/drm/virtio/virtgpu_vram.o
CC fs/file_table.o
CC block/blk-mq-debugfs.o
CC drivers/gpu/drm/i915/i915_switcheroo.o
CC drivers/base/driver.o
CC drivers/acpi/acpica/hwacpi.o
CC arch/x86/kernel/x86_init.o
CC fs/ext4/xattr_hurd.o
CC net/sysctl_net.o
CC fs/super.o
CC net/wireless/ocb.o
CC arch/x86/kernel/i8259.o
AR drivers/tty/built-in.a
CC net/handshake/trace.o
CC lib/parser.o
CC net/core/netdev-genl.o
CC net/mac80211/ht.o
CC drivers/acpi/acpica/hwesleep.o
CC drivers/acpi/mipi-disco-img.o
CC net/netfilter/nf_nat_masquerade.o
CC drivers/gpu/drm/i915/i915_sysfs.o
CC net/wireless/pmsr.o
CC drivers/gpu/drm/virtio/virtgpu_display.o
AR drivers/gpu/drm/i2c/built-in.a
CC crypto/jitterentropy-kcapi.o
AR drivers/dax/hmem/built-in.a
AR drivers/dax/built-in.a
CC lib/debug_locks.o
CC fs/ext4/xattr_trusted.o
CC net/core/netdev-genl-gen.o
CC arch/x86/kernel/irqinit.o
CC net/netfilter/nf_nat_ftp.o
CC fs/nfs/export.o
GEN net/wireless/shipped-certs.c
CC drivers/acpi/resource.o
CC drivers/gpu/drm/i915/i915_utils.o
CC net/mac80211/agg-tx.o
CC lib/random32.o
CC fs/char_dev.o
CC net/netfilter/nf_nat_irc.o
CC crypto/ghash-generic.o
CC drivers/acpi/acpica/hwgpe.o
CC kernel/trace/trace_eprobe.o
CC net/sunrpc/sysfs.o
CC drivers/gpu/drm/virtio/virtgpu_vq.o
CC drivers/gpu/drm/virtio/virtgpu_fence.o
CC drivers/base/class.o
CC block/blk-pm.o
CC drivers/dma-buf/dma-buf.o
CC net/core/gso.o
CC net/ipv6/reassembly.o
CC drivers/acpi/acpi_processor.o
CC lib/bust_spinlocks.o
CC net/sunrpc/svc_xprt.o
CC net/mac80211/agg-rx.o
AR drivers/gpu/drm/panel/built-in.a
CC kernel/trace/trace_kprobe.o
CC crypto/hash_info.o
CC arch/x86/kernel/jump_label.o
CC kernel/capability.o
CC crypto/rsapubkey.asn1.o
CC drivers/acpi/acpica/hwregs.o
CC mm/mmu_gather.o
CC crypto/rsaprivkey.asn1.o
AR crypto/built-in.a
CC net/netfilter/nf_nat_sip.o
CC net/ipv4/tcp_metrics.o
CC net/wireless/shipped-certs.o
CC net/sunrpc/xprtmultipath.o
CC drivers/acpi/processor_core.o
CC net/core/net-sysfs.o
CC kernel/trace/error_report-traces.o
CC drivers/dma-buf/dma-fence.o
CC block/holder.o
CC drivers/acpi/acpica/hwsleep.o
CC fs/ext4/xattr_user.o
CC drivers/gpu/drm/virtio/virtgpu_object.o
CC fs/stat.o
CC drivers/gpu/drm/i915/intel_clock_gating.o
AR net/handshake/built-in.a
CC net/mac80211/vht.o
CC lib/kasprintf.o
CC drivers/base/platform.o
CC net/mac80211/he.o
AR drivers/cxl/core/built-in.a
CC drivers/macintosh/mac_hid.o
AR drivers/cxl/built-in.a
CC net/ipv6/tcp_ipv6.o
AR drivers/scsi/pcmcia/built-in.a
CC drivers/scsi/scsi.o
AR drivers/gpu/drm/bridge/analogix/built-in.a
AR drivers/gpu/drm/bridge/cadence/built-in.a
AR drivers/gpu/drm/bridge/imx/built-in.a
AR drivers/gpu/drm/bridge/synopsys/built-in.a
AR drivers/gpu/drm/bridge/built-in.a
CC lib/bitmap.o
CC kernel/ptrace.o
CC drivers/acpi/acpica/hwvalid.o
CC arch/x86/kernel/irq_work.o
CC kernel/user.o
CC kernel/trace/power-traces.o
CC drivers/gpu/drm/i915/intel_cpu_info.o
CC drivers/dma-buf/dma-fence-array.o
CC lib/scatterlist.o
CC arch/x86/kernel/probe_roms.o
CC fs/nfs/sysfs.o
CC drivers/scsi/hosts.o
CC fs/ext4/fast_commit.o
CC mm/mprotect.o
CC mm/mremap.o
CC drivers/gpu/drm/virtio/virtgpu_debugfs.o
CC fs/ext4/orphan.o
CC net/ipv6/ping.o
AR block/built-in.a
CC drivers/acpi/acpica/hwxface.o
CC net/ipv4/tcp_fastopen.o
CC net/core/hotdata.o
CC drivers/gpu/drm/i915/intel_device_info.o
AR drivers/gpu/drm/hisilicon/built-in.a
CC kernel/trace/rpm-traces.o
CC drivers/gpu/drm/virtio/virtgpu_plane.o
CC drivers/dma-buf/dma-fence-chain.o
AR drivers/macintosh/built-in.a
CC fs/exec.o
CC drivers/acpi/processor_pdc.o
CC drivers/base/cpu.o
CC fs/ext4/acl.o
CC drivers/acpi/acpica/hwxfsleep.o
CC net/sunrpc/stats.o
CC net/netfilter/x_tables.o
CC net/netfilter/xt_tcpudp.o
CC kernel/trace/trace_dynevent.o
CC fs/pipe.o
CC arch/x86/kernel/sys_ia32.o
CC drivers/scsi/scsi_ioctl.o
CC drivers/base/firmware.o
CC net/ipv6/exthdrs.o
CC net/ipv4/tcp_rate.o
CC fs/nfs/fs_context.o
CC fs/ext4/xattr_security.o
CC net/core/netdev_rx_queue.o
CC net/netfilter/xt_CONNSECMARK.o
CC drivers/gpu/drm/virtio/virtgpu_ioctl.o
CC drivers/dma-buf/dma-fence-unwrap.o
CC drivers/acpi/acpica/hwpci.o
CC arch/x86/kernel/ksysfs.o
CC drivers/base/init.o
CC net/core/net-procfs.o
CC kernel/trace/trace_probe.o
CC mm/msync.o
CC lib/list_sort.o
CC net/sunrpc/sysctl.o
CC drivers/base/map.o
CC fs/namei.o
CC drivers/dma-buf/dma-resv.o
CC drivers/acpi/ec.o
CC drivers/scsi/scsicam.o
AR drivers/nvme/common/built-in.a
CC lib/uuid.o
CC lib/iov_iter.o
AR drivers/nvme/host/built-in.a
AR drivers/nvme/target/built-in.a
AR drivers/nvme/built-in.a
CC drivers/acpi/dock.o
CC net/ipv4/tcp_recovery.o
CC lib/clz_ctz.o
CC drivers/gpu/drm/i915/intel_memory_region.o
CC kernel/signal.o
AR drivers/gpu/drm/mxsfb/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_prime.o
CC net/netfilter/xt_NFLOG.o
CC kernel/trace/trace_uprobe.o
CC drivers/acpi/pci_root.o
CC drivers/acpi/acpica/nsaccess.o
CC drivers/base/devres.o
CC mm/page_vma_mapped.o
CC drivers/scsi/scsi_error.o
CC drivers/ata/libata-core.o
AR drivers/net/phy/mediatek/built-in.a
AR drivers/net/phy/qcom/built-in.a
CC net/ipv6/datagram.o
CC drivers/net/phy/realtek/realtek_main.o
CC drivers/firewire/init_ohci1394_dma.o
CC drivers/cdrom/cdrom.o
CC arch/x86/kernel/bootflag.o
CC net/netfilter/xt_SECMARK.o
AR drivers/auxdisplay/built-in.a
CC drivers/gpu/drm/i915/intel_pcode.o
CC mm/pagewalk.o
CC drivers/net/phy/realtek/realtek_hwmon.o
CC drivers/dma-buf/sync_file.o
CC net/mac80211/s1g.o
CC drivers/acpi/acpica/nsalloc.o
CC drivers/net/phy/mdio-boardinfo.o
CC drivers/pcmcia/cs.o
CC drivers/base/attribute_container.o
CC net/netfilter/xt_TCPMSS.o
CC net/netfilter/xt_conntrack.o
CC net/mac80211/ibss.o
AR drivers/gpu/drm/tiny/built-in.a
CC drivers/net/phy/stubs.o
CC kernel/trace/rethook.o
CC arch/x86/kernel/e820.o
CC drivers/gpu/drm/i915/intel_region_ttm.o
CC drivers/gpu/drm/virtio/virtgpu_trace_points.o
CC net/core/netpoll.o
CC drivers/gpu/drm/i915/intel_runtime_pm.o
CC net/mac80211/iface.o
CC mm/pgtable-generic.o
AR drivers/net/pse-pd/built-in.a
CC fs/fcntl.o
CC drivers/acpi/acpica/nsarguments.o
CC drivers/net/mdio/acpi_mdio.o
CC drivers/net/mdio/fwnode_mdio.o
CC fs/ioctl.o
AR drivers/firewire/built-in.a
CC drivers/base/transport_class.o
CC net/mac80211/link.o
CC lib/bsearch.o
CC arch/x86/kernel/pci-dma.o
CC fs/nfs/nfsroot.o
AR net/sunrpc/built-in.a
CC net/core/fib_rules.o
AR drivers/dma-buf/built-in.a
CC net/netfilter/xt_policy.o
CC net/mac80211/rate.o
CC drivers/net/phy/mdio_devres.o
CC kernel/sys.o
CC lib/find_bit.o
AR fs/ext4/built-in.a
CC net/ipv4/tcp_ulp.o
CC drivers/acpi/pci_link.o
CC drivers/acpi/acpica/nsconvert.o
CC drivers/gpu/drm/virtio/virtgpu_submit.o
CC arch/x86/kernel/quirks.o
CC drivers/ata/libata-scsi.o
CC net/core/net-traces.o
CC drivers/scsi/scsi_lib.o
CC drivers/base/topology.o
CC drivers/acpi/pci_irq.o
CC drivers/pcmcia/socket_sysfs.o
AR drivers/net/phy/realtek/built-in.a
CC net/mac80211/michael.o
CC net/mac80211/tkip.o
CC net/ipv6/ip6_flowlabel.o
CC drivers/net/phy/phy.o
CC drivers/acpi/acpica/nsdump.o
CC mm/rmap.o
CC drivers/acpi/acpi_apd.o
CC net/mac80211/aes_cmac.o
CC drivers/usb/common/common.o
CC drivers/input/serio/serio.o
CC lib/llist.o
CC drivers/input/keyboard/atkbd.o
CC drivers/rtc/lib.o
CC lib/lwq.o
AR kernel/trace/built-in.a
AR drivers/net/mdio/built-in.a
CC drivers/usb/common/debug.o
CC drivers/input/mouse/psmouse-base.o
CC net/ipv4/tcp_offload.o
CC drivers/input/serio/i8042.o
CC drivers/base/container.o
CC drivers/acpi/acpica/nseval.o
AR drivers/usb/phy/built-in.a
CC drivers/usb/core/usb.o
CC net/ipv6/inet6_connection_sock.o
CC drivers/acpi/acpi_platform.o
CC drivers/pcmcia/cardbus.o
CC drivers/gpu/drm/i915/intel_sbi.o
CC drivers/ata/libata-eh.o
CC net/netfilter/xt_state.o
CC arch/x86/kernel/kdebugfs.o
CC kernel/umh.o
CC arch/x86/kernel/alternative.o
AR drivers/cdrom/built-in.a
CC drivers/rtc/class.o
CC arch/x86/kernel/i8253.o
AR drivers/gpu/drm/virtio/built-in.a
CC drivers/gpu/drm/i915/intel_step.o
CC fs/nfs/sysctl.o
CC lib/memweight.o
CC drivers/base/property.o
CC drivers/input/mouse/synaptics.o
CC lib/kfifo.o
CC net/ipv6/udp_offload.o
CC drivers/acpi/acpica/nsinit.o
CC drivers/scsi/constants.o
CC net/mac80211/aes_gmac.o
AR drivers/usb/common/built-in.a
CC mm/vmalloc.o
CC mm/vma.o
CC net/mac80211/fils_aead.o
AR drivers/input/joystick/built-in.a
CC mm/process_vm_access.o
CC net/ipv6/seg6.o
CC drivers/gpu/drm/i915/intel_uncore.o
CC drivers/net/phy/phy-c45.o
CC drivers/pcmcia/ds.o
CC drivers/scsi/scsi_lib_dma.o
AR drivers/gpu/drm/xlnx/built-in.a
CC net/core/selftests.o
CC [M] net/netfilter/nf_log_syslog.o
CC drivers/rtc/interface.o
CC drivers/acpi/acpica/nsload.o
AR drivers/input/tablet/built-in.a
CC drivers/net/phy/phy-core.o
AR drivers/input/keyboard/built-in.a
CC drivers/usb/core/hub.o
CC arch/x86/kernel/hw_breakpoint.o
CC [M] net/netfilter/xt_mark.o
CC net/mac80211/cfg.o
CC fs/readdir.o
CC drivers/acpi/acpica/nsnames.o
CC kernel/workqueue.o
CC drivers/net/phy/phy_device.o
CC drivers/ata/libata-transport.o
CC drivers/pcmcia/pcmcia_resource.o
CC drivers/input/serio/serport.o
CC drivers/rtc/nvmem.o
CC lib/percpu-refcount.o
CC drivers/usb/core/hcd.o
CC drivers/acpi/acpica/nsobject.o
CC drivers/pcmcia/cistpl.o
CC [M] net/netfilter/xt_nat.o
CC drivers/i2c/algos/i2c-algo-bit.o
CC fs/nfs/nfs3super.o
CC lib/rhashtable.o
CC drivers/acpi/acpi_pnp.o
CC net/ipv4/tcp_plb.o
CC drivers/scsi/scsi_scan.o
AR drivers/gpu/drm/gud/built-in.a
CC net/core/ptp_classifier.o
CC drivers/input/mouse/focaltech.o
CC drivers/usb/core/urb.o
CC drivers/usb/mon/mon_main.o
CC [M] net/netfilter/xt_LOG.o
CC drivers/base/cacheinfo.o
AR drivers/input/touchscreen/built-in.a
CC fs/select.o
CC drivers/usb/core/message.o
CC drivers/acpi/acpica/nsparse.o
CC fs/nfs/nfs3client.o
CC net/ipv4/datagram.o
CC net/ipv6/fib6_notifier.o
AR drivers/input/misc/built-in.a
CC drivers/acpi/acpica/nspredef.o
CC mm/page_alloc.o
AR drivers/net/pcs/built-in.a
GEN drivers/scsi/scsi_devinfo_tbl.c
CC drivers/i2c/busses/i2c-i801.o
CC arch/x86/kernel/tsc.o
CC drivers/input/serio/libps2.o
CC net/ipv6/rpl.o
CC drivers/input/input.o
CC [M] net/netfilter/xt_MASQUERADE.o
AR drivers/i3c/built-in.a
CC net/mac80211/ethtool.o
CC drivers/scsi/scsi_devinfo.o
CC drivers/base/swnode.o
CC net/core/netprio_cgroup.o
CC drivers/pcmcia/pcmcia_cis.o
AR drivers/i2c/muxes/built-in.a
CC drivers/i2c/i2c-boardinfo.o
CC drivers/acpi/acpica/nsprepkg.o
AR drivers/media/i2c/built-in.a
AR drivers/media/tuners/built-in.a
AR drivers/i2c/algos/built-in.a
CC drivers/usb/core/driver.o
AR drivers/media/rc/keymaps/built-in.a
CC drivers/input/mouse/alps.o
AR drivers/media/rc/built-in.a
CC drivers/usb/mon/mon_stat.o
AR drivers/media/common/b2c2/built-in.a
AR drivers/media/common/saa7146/built-in.a
AR drivers/media/common/siano/built-in.a
AR drivers/media/common/v4l2-tpg/built-in.a
CC drivers/rtc/dev.o
AR drivers/media/common/videobuf2/built-in.a
AR drivers/media/platform/allegro-dvt/built-in.a
AR drivers/media/common/built-in.a
CC drivers/rtc/proc.o
AR drivers/media/platform/amlogic/meson-ge2d/built-in.a
CC drivers/input/mouse/byd.o
AR drivers/media/platform/amlogic/built-in.a
CC drivers/i2c/i2c-core-base.o
CC drivers/usb/core/config.o
AR drivers/media/platform/amphion/built-in.a
CC lib/base64.o
AR drivers/media/platform/aspeed/built-in.a
CC net/ipv6/ioam6.o
AR drivers/media/platform/atmel/built-in.a
AR drivers/media/platform/broadcom/built-in.a
AR drivers/media/platform/cadence/built-in.a
CC net/ipv6/sysctl_net_ipv6.o
AR drivers/media/platform/chips-media/coda/built-in.a
AR drivers/media/platform/imagination/built-in.a
AR drivers/media/platform/chips-media/wave5/built-in.a
CC drivers/acpi/power.o
AR drivers/media/platform/chips-media/built-in.a
CC lib/once.o
AR drivers/media/platform/intel/built-in.a
CC net/mac80211/rx.o
AR drivers/media/platform/marvell/built-in.a
AR drivers/media/platform/mediatek/jpeg/built-in.a
AR drivers/media/platform/mediatek/mdp/built-in.a
AR drivers/media/platform/mediatek/vcodec/common/built-in.a
AR drivers/media/platform/mediatek/vcodec/encoder/built-in.a
AR drivers/media/platform/mediatek/vcodec/decoder/built-in.a
AR drivers/media/platform/mediatek/vcodec/built-in.a
CC drivers/usb/mon/mon_text.o
AR drivers/input/serio/built-in.a
CC arch/x86/kernel/tsc_msr.o
AR drivers/media/platform/mediatek/vpu/built-in.a
CC arch/x86/kernel/io_delay.o
AR drivers/media/platform/mediatek/mdp3/built-in.a
AR drivers/media/platform/mediatek/built-in.a
CC drivers/acpi/acpica/nsrepair.o
CC drivers/scsi/scsi_sysctl.o
AR drivers/media/platform/microchip/built-in.a
AR drivers/media/platform/nuvoton/built-in.a
AR drivers/media/platform/nvidia/tegra-vde/built-in.a
AR drivers/media/platform/nvidia/built-in.a
AR drivers/pps/clients/built-in.a
CC fs/nfs/nfs3proc.o
CC drivers/pps/pps.o
AR drivers/media/platform/nxp/dw100/built-in.a
AR drivers/media/platform/nxp/imx-jpeg/built-in.a
CC drivers/gpu/drm/i915/intel_uncore_trace.o
AR drivers/media/platform/nxp/imx8-isi/built-in.a
AR drivers/media/platform/nxp/built-in.a
AR drivers/media/pci/ttpci/built-in.a
AR drivers/media/pci/b2c2/built-in.a
AR drivers/media/platform/qcom/camss/built-in.a
AR drivers/media/pci/pluto2/built-in.a
AR drivers/media/platform/qcom/venus/built-in.a
AR drivers/media/platform/qcom/built-in.a
AR drivers/media/pci/dm1105/built-in.a
AR drivers/media/usb/b2c2/built-in.a
AR drivers/media/pci/pt1/built-in.a
CC drivers/ptp/ptp_clock.o
CC drivers/ata/libata-trace.o
AR drivers/media/usb/dvb-usb/built-in.a
AR drivers/media/platform/raspberrypi/pisp_be/built-in.a
AR drivers/media/pci/pt3/built-in.a
AR drivers/media/usb/dvb-usb-v2/built-in.a
AR drivers/media/pci/mantis/built-in.a
AR drivers/media/platform/raspberrypi/rp1-cfe/built-in.a
AR drivers/media/pci/ngene/built-in.a
AR drivers/media/platform/raspberrypi/built-in.a
CC arch/x86/kernel/rtc.o
AR drivers/media/usb/s2255/built-in.a
AR drivers/media/pci/ddbridge/built-in.a
AR drivers/media/mmc/siano/built-in.a
AR drivers/media/mmc/built-in.a
AR drivers/media/usb/siano/built-in.a
AR drivers/media/platform/renesas/rcar-vin/built-in.a
AR drivers/media/pci/saa7146/built-in.a
CC lib/refcount.o
CC drivers/rtc/sysfs.o
AR drivers/media/usb/ttusb-budget/built-in.a
AR drivers/media/platform/renesas/rzg2l-cru/built-in.a
AR drivers/media/pci/smipcie/built-in.a
AR drivers/media/usb/ttusb-dec/built-in.a
AR drivers/media/platform/renesas/vsp1/built-in.a
AR drivers/media/pci/netup_unidvb/built-in.a
AR drivers/media/usb/built-in.a
CC net/ipv4/raw.o
AR drivers/media/platform/renesas/built-in.a
CC drivers/base/auxiliary.o
AR drivers/media/pci/intel/ipu3/built-in.a
CC drivers/net/phy/linkmode.o
AR drivers/media/pci/intel/ivsc/built-in.a
CC drivers/power/supply/power_supply_core.o
AR drivers/media/platform/rockchip/rga/built-in.a
AR drivers/media/pci/intel/built-in.a
CC drivers/usb/host/pci-quirks.o
AR drivers/media/platform/rockchip/rkisp1/built-in.a
AR drivers/media/pci/built-in.a
AR drivers/media/platform/rockchip/built-in.a
AR drivers/media/platform/samsung/exynos-gsc/built-in.a
CC drivers/usb/class/usblp.o
CC net/mac80211/spectmgmt.o
AR drivers/media/platform/samsung/exynos4-is/built-in.a
AR drivers/i2c/busses/built-in.a
AR drivers/media/platform/samsung/s3c-camif/built-in.a
CC drivers/ata/libata-sata.o
CC fs/dcache.o
CC [M] net/netfilter/xt_addrtype.o
AR drivers/media/platform/samsung/s5p-g2d/built-in.a
AR drivers/media/platform/samsung/s5p-jpeg/built-in.a
CC drivers/acpi/acpica/nsrepair2.o
CC fs/inode.o
CC drivers/pcmcia/rsrc_mgr.o
AR drivers/media/platform/samsung/s5p-mfc/built-in.a
CC drivers/usb/mon/mon_bin.o
AR drivers/media/platform/samsung/built-in.a
CC kernel/pid.o
AR drivers/media/platform/st/sti/bdisp/built-in.a
CC kernel/task_work.o
CC lib/rcuref.o
CC drivers/ptp/ptp_chardev.o
AR drivers/media/platform/st/sti/c8sectpfe/built-in.a
CC drivers/usb/storage/scsiglue.o
AR drivers/media/platform/st/sti/delta/built-in.a
AR drivers/net/ethernet/3com/built-in.a
AR drivers/media/platform/st/sti/hva/built-in.a
CC drivers/net/ethernet/8390/ne2k-pci.o
AR drivers/media/platform/st/stm32/built-in.a
AR drivers/media/platform/st/built-in.a
AR drivers/media/platform/sunxi/sun4i-csi/built-in.a
AR drivers/media/platform/sunxi/sun6i-csi/built-in.a
AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a
CC drivers/net/ethernet/8390/8390.o
AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a
CC drivers/usb/storage/protocol.o
AR drivers/media/platform/sunxi/sun8i-di/built-in.a
AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a
AR drivers/media/platform/sunxi/built-in.a
CC drivers/scsi/scsi_proc.o
AR drivers/media/platform/ti/am437x/built-in.a
CC lib/usercopy.o
AR drivers/media/platform/ti/cal/built-in.a
AR drivers/media/platform/ti/vpe/built-in.a
AR drivers/media/platform/ti/davinci/built-in.a
AR drivers/media/platform/ti/j721e-csi2rx/built-in.a
CC drivers/pps/kapi.o
AR drivers/media/platform/ti/omap/built-in.a
AR drivers/media/platform/ti/omap3isp/built-in.a
AR drivers/media/platform/ti/built-in.a
CC drivers/hwmon/hwmon.o
AR drivers/media/platform/verisilicon/built-in.a
CC drivers/base/devtmpfs.o
AR drivers/media/platform/via/built-in.a
AR drivers/media/platform/xilinx/built-in.a
AR drivers/media/platform/built-in.a
CC drivers/usb/host/ehci-hcd.o
AR drivers/media/firewire/built-in.a
CC drivers/scsi/scsi_debugfs.o
CC drivers/i2c/i2c-core-smbus.o
AR drivers/media/spi/built-in.a
AR drivers/media/test-drivers/built-in.a
CC drivers/gpu/drm/i915/intel_wakeref.o
AR drivers/media/built-in.a
CC arch/x86/kernel/resource.o
CC mm/page_frag_cache.o
CC drivers/pps/sysfs.o
CC drivers/rtc/rtc-mc146818-lib.o
CC drivers/acpi/acpica/nssearch.o
CC lib/errseq.o
CC drivers/input/mouse/logips2pp.o
CC drivers/pcmcia/rsrc_nonstatic.o
CC net/core/netclassid_cgroup.o
CC lib/bucket_locks.o
CC drivers/net/phy/phy_link_topology.o
AS arch/x86/kernel/irqflags.o
CC drivers/usb/core/file.o
CC arch/x86/kernel/static_call.o
CC drivers/net/phy/mdio_bus.o
CC drivers/usb/storage/transport.o
AR drivers/gpu/drm/solomon/built-in.a
AR drivers/usb/misc/built-in.a
AR drivers/net/wireless/admtek/built-in.a
CC lib/generic-radix-tree.o
CC net/ipv4/udp.o
AR drivers/net/wireless/ath/built-in.a
CC drivers/power/supply/power_supply_sysfs.o
AR drivers/net/wireless/atmel/built-in.a
AR drivers/net/wireless/broadcom/built-in.a
AR drivers/usb/class/built-in.a
AR drivers/net/wireless/intel/built-in.a
CC drivers/acpi/event.o
AR drivers/net/wireless/intersil/built-in.a
CC drivers/i2c/i2c-core-acpi.o
AR drivers/net/wireless/marvell/built-in.a
CC drivers/ata/libata-sff.o
AR drivers/net/wireless/mediatek/built-in.a
AR drivers/pps/built-in.a
CC mm/init-mm.o
CC drivers/acpi/acpica/nsutils.o
AR drivers/net/wireless/microchip/built-in.a
AR drivers/net/wireless/purelifi/built-in.a
CC fs/attr.o
AR drivers/net/wireless/quantenna/built-in.a
AR drivers/net/wireless/ralink/built-in.a
CC drivers/power/supply/power_supply_leds.o
AR drivers/net/wireless/realtek/built-in.a
AR drivers/net/wireless/rsi/built-in.a
AR drivers/net/wireless/silabs/built-in.a
AR drivers/net/wireless/st/built-in.a
CC net/ipv6/xfrm6_policy.o
AR drivers/net/wireless/ti/built-in.a
AR drivers/net/wireless/zydas/built-in.a
CC drivers/ptp/ptp_sysfs.o
AR drivers/net/wireless/virtual/built-in.a
AR drivers/net/wireless/built-in.a
CC fs/nfs/nfs3xdr.o
CC fs/bad_inode.o
CC net/ipv6/xfrm6_state.o
AR drivers/usb/mon/built-in.a
CC net/ipv6/xfrm6_input.o
CC drivers/scsi/scsi_trace.o
CC net/ipv6/xfrm6_output.o
CC arch/x86/kernel/process.o
CC drivers/acpi/evged.o
CC drivers/gpu/drm/i915/vlv_sideband.o
CC drivers/rtc/rtc-cmos.o
CC kernel/extable.o
AR drivers/net/usb/built-in.a
CC drivers/pcmcia/yenta_socket.o
AR net/netfilter/built-in.a
CC drivers/base/module.o
CC drivers/base/auxiliary_sysfs.o
CC drivers/input/mouse/lifebook.o
CC [M] drivers/gpu/drm/scheduler/sched_main.o
CC lib/bitmap-str.o
CC drivers/usb/core/buffer.o
AR drivers/net/ethernet/8390/built-in.a
AR drivers/net/ethernet/adaptec/built-in.a
AR drivers/net/ethernet/agere/built-in.a
CC drivers/acpi/acpica/nswalk.o
AR net/wireless/built-in.a
CC drivers/scsi/scsi_logging.o
AR drivers/net/ethernet/alacritech/built-in.a
CC lib/string_helpers.o
CC drivers/ptp/ptp_vclock.o
AR drivers/net/ethernet/alteon/built-in.a
AR drivers/net/ethernet/amazon/built-in.a
AR drivers/net/ethernet/amd/built-in.a
CC drivers/power/supply/power_supply_hwmon.o
AR drivers/net/ethernet/aquantia/built-in.a
AR drivers/net/ethernet/arc/built-in.a
CC drivers/usb/host/ehci-pci.o
AR drivers/net/ethernet/asix/built-in.a
AR drivers/net/ethernet/atheros/built-in.a
AR drivers/net/ethernet/cadence/built-in.a
CC drivers/net/ethernet/broadcom/bnx2.o
AR drivers/net/ethernet/brocade/built-in.a
CC drivers/base/devcoredump.o
CC drivers/usb/storage/usb.o
CC drivers/net/mii.o
CC [M] drivers/gpu/drm/scheduler/sched_fence.o
CC drivers/acpi/sysfs.o
AR drivers/thermal/broadcom/built-in.a
AR drivers/thermal/renesas/built-in.a
AR drivers/hwmon/built-in.a
CC drivers/ata/libata-pmp.o
AR drivers/thermal/samsung/built-in.a
CC drivers/thermal/intel/intel_tcc.o
CC drivers/thermal/intel/therm_throt.o
CC net/mac80211/tx.o
CC net/core/dst_cache.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC arch/x86/kernel/ptrace.o
AR drivers/net/ethernet/cavium/common/built-in.a
AR drivers/net/ethernet/chelsio/built-in.a
AR drivers/net/ethernet/cavium/thunder/built-in.a
CC fs/nfs/nfs3acl.o
CC drivers/usb/early/ehci-dbgp.o
CC drivers/acpi/acpica/nsxfeval.o
AR drivers/net/ethernet/cavium/liquidio/built-in.a
AR drivers/net/ethernet/cavium/octeon/built-in.a
GEN xe_wa_oob.c xe_wa_oob.h
AR drivers/net/ethernet/cavium/built-in.a
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC arch/x86/kernel/tls.o
CC drivers/gpu/drm/i915/vlv_suspend.o
CC drivers/input/mouse/trackpoint.o
CC net/core/gro_cells.o
CC mm/memblock.o
CC net/mac80211/key.o
CC drivers/i2c/i2c-smbus.o
AR drivers/power/supply/built-in.a
AR drivers/power/built-in.a
CC drivers/base/platform-msi.o
CC drivers/base/physical_location.o
CC drivers/usb/core/sysfs.o
CC drivers/ptp/ptp_kvm_x86.o
CC net/ipv6/xfrm6_protocol.o
CC drivers/acpi/property.o
CC drivers/net/phy/mdio_device.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC net/mac80211/util.o
AR drivers/rtc/built-in.a
CC kernel/params.o
CC drivers/usb/core/endpoint.o
CC lib/hexdump.o
CC drivers/net/ethernet/broadcom/tg3.o
AR drivers/watchdog/built-in.a
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC fs/nfs/nfs4proc.o
CC drivers/scsi/scsi_pm.o
CC net/ipv4/udplite.o
CC drivers/acpi/acpica/nsxfname.o
CC drivers/net/loopback.o
CC fs/file.o
CC net/core/failover.o
CC lib/kstrtox.o
CC drivers/usb/storage/initializers.o
CC drivers/base/trace.o
AR drivers/net/ethernet/cisco/built-in.a
CC net/mac80211/parse.o
CC mm/slub.o
CC drivers/net/phy/swphy.o
AR drivers/pcmcia/built-in.a
CC drivers/input/mouse/cypress_ps2.o
CC drivers/gpu/drm/i915/soc/intel_dram.o
CC [M] drivers/gpu/drm/scheduler/sched_entity.o
CC drivers/usb/core/devio.o
CC lib/iomap.o
AR drivers/i2c/built-in.a
CC drivers/usb/host/ohci-hcd.o
CC fs/filesystems.o
CC net/ipv4/udp_offload.o
AR drivers/usb/early/built-in.a
CC drivers/ptp/ptp_kvm_common.o
CC drivers/acpi/acpica/nsxfobj.o
AR drivers/thermal/st/built-in.a
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o
CC drivers/net/netconsole.o
CC kernel/kthread.o
CC arch/x86/kernel/step.o
CC drivers/ata/libata-acpi.o
CC drivers/ata/libata-pata-timings.o
CC drivers/input/input-compat.o
CC drivers/scsi/scsi_bsg.o
CC drivers/acpi/debugfs.o
CC drivers/md/md.o
CC drivers/net/phy/fixed_phy.o
CC drivers/usb/storage/sierra_ms.o
CC drivers/acpi/acpi_lpat.o
CC drivers/net/virtio_net.o
CC drivers/gpu/drm/i915/soc/intel_gmch.o
CC drivers/acpi/acpica/psargs.o
CC drivers/input/mouse/psmouse-smbus.o
CC kernel/sys_ni.o
CC net/ipv6/netfilter.o
AR drivers/base/built-in.a
CC drivers/gpu/drm/drm_atomic.o
CC lib/iomap_copy.o
CC net/mac80211/wme.o
CC net/mac80211/chan.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.o
CC drivers/scsi/scsi_common.o
AR net/core/built-in.a
CC net/mac80211/trace.o
CC drivers/md/md-bitmap.o
CC net/ipv6/proc.o
CC drivers/cpufreq/cpufreq.o
CC drivers/usb/core/notify.o
CC lib/devres.o
CC drivers/gpu/drm/drm_atomic_uapi.o
CC arch/x86/kernel/i8237.o
AR drivers/ptp/built-in.a
AR drivers/thermal/intel/built-in.a
CC drivers/usb/host/ohci-pci.o
CC drivers/md/md-autodetect.o
AR drivers/thermal/qcom/built-in.a
AR drivers/thermal/tegra/built-in.a
AR drivers/thermal/mediatek/built-in.a
CC drivers/thermal/thermal_core.o
CC drivers/acpi/acpi_pcc.o
CC net/ipv4/arp.o
CC drivers/ata/ahci.o
CC drivers/thermal/thermal_sysfs.o
CC drivers/acpi/acpica/psloop.o
CC arch/x86/kernel/stacktrace.o
CC drivers/input/input-mt.o
CC drivers/usb/storage/option_ms.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC drivers/scsi/scsi_transport_spi.o
CC arch/x86/kernel/reboot.o
CC lib/check_signature.o
CC drivers/usb/core/generic.o
CC drivers/gpu/drm/i915/soc/intel_pch.o
CC arch/x86/kernel/msr.o
CC net/ipv4/icmp.o
CC drivers/usb/core/quirks.o
AR drivers/input/mouse/built-in.a
CC lib/interval_tree.o
CC net/ipv6/syncookies.o
CC fs/namespace.o
AR drivers/net/phy/built-in.a
CC net/mac80211/mlme.o
CC drivers/gpu/drm/drm_auth.o
CC drivers/acpi/acpica/psobject.o
CC fs/nfs/nfs4xdr.o
CC kernel/nsproxy.o
CC drivers/usb/host/uhci-hcd.o
CC lib/assoc_array.o
CC mm/madvise.o
CC drivers/input/input-poller.o
CC fs/nfs/nfs4state.o
CC drivers/cpufreq/freq_table.o
CC drivers/ata/libahci.o
CC drivers/acpi/acpica/psopcode.o
CC drivers/usb/storage/usual-tables.o
CC drivers/acpi/ac.o
CC drivers/cpuidle/governors/menu.o
CC kernel/notifier.o
CC drivers/cpuidle/cpuidle.o
CC drivers/input/ff-core.o
CC fs/nfs/nfs4renewd.o
CC drivers/acpi/button.o
CC drivers/cpuidle/driver.o
CC drivers/usb/core/devices.o
CC net/mac80211/tdls.o
CC drivers/ata/ata_piix.o
CC arch/x86/kernel/cpuid.o
CC drivers/gpu/drm/i915/soc/intel_rom.o
CC kernel/ksysfs.o
CC drivers/acpi/acpica/psopinfo.o
CC [M] drivers/gpu/drm/xe/xe_device.o
CC kernel/cred.o
CC net/ipv4/devinet.o
CC net/ipv6/calipso.o
CC drivers/net/net_failover.o
CC lib/bitrev.o
AR drivers/net/ethernet/cortina/built-in.a
CC arch/x86/kernel/early-quirks.o
AR drivers/usb/storage/built-in.a
CC drivers/scsi/virtio_scsi.o
CC drivers/usb/host/xhci.o
CC drivers/thermal/thermal_trip.o
CC drivers/cpuidle/governors/haltpoll.o
CC drivers/acpi/acpica/psparse.o
CC drivers/acpi/fan_core.o
AR drivers/mmc/built-in.a
CC fs/nfs/nfs4super.o
CC fs/seq_file.o
CC drivers/input/touchscreen.o
CC drivers/thermal/thermal_helpers.o
CC drivers/ata/pata_amd.o
CC drivers/cpufreq/cpufreq_performance.o
CC drivers/ata/pata_oldpiix.o
CC lib/crc-ccitt.o
CC lib/crc16.o
HOSTCC lib/gen_crc32table
CC drivers/acpi/acpica/psscope.o
CC drivers/usb/core/phy.o
AR drivers/ufs/built-in.a
CC arch/x86/kernel/smp.o
CC drivers/cpuidle/governor.o
CC drivers/scsi/sd.o
CC mm/page_io.o
CC drivers/gpu/drm/i915/i915_memcpy.o
CC drivers/cpufreq/cpufreq_userspace.o
CC mm/swap_state.o
CC drivers/cpufreq/cpufreq_ondemand.o
CC drivers/thermal/thermal_thresholds.o
CC lib/xxhash.o
CC drivers/ata/pata_sch.o
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
CC kernel/reboot.o
CC drivers/gpu/drm/i915/i915_mm.o
CC drivers/acpi/acpica/pstree.o
CC mm/swapfile.o
CC net/ipv6/ah6.o
CC drivers/usb/core/port.o
CC drivers/input/ff-memless.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC [M] drivers/gpu/drm/xe/xe_drm_client.o
CC drivers/acpi/fan_attr.o
CC drivers/md/dm.o
AR drivers/cpuidle/governors/built-in.a
CC drivers/gpu/drm/drm_blend.o
CC drivers/cpuidle/sysfs.o
CC drivers/scsi/sr.o
CC net/ipv4/af_inet.o
CC drivers/input/sparse-keymap.o
CC arch/x86/kernel/smpboot.o
CC drivers/md/dm-table.o
CC drivers/gpu/drm/drm_bridge.o
CC drivers/usb/host/xhci-mem.o
CC drivers/usb/host/xhci-ext-caps.o
CC drivers/thermal/thermal_netlink.o
CC drivers/acpi/acpica/psutils.o
CC drivers/thermal/thermal_hwmon.o
CC drivers/thermal/gov_step_wise.o
CC drivers/md/dm-target.o
CC lib/genalloc.o
CC arch/x86/kernel/tsc_sync.o
CC drivers/scsi/sr_ioctl.o
CC mm/swap_slots.o
CC drivers/cpufreq/cpufreq_governor.o
CC drivers/ata/pata_mpiix.o
CC drivers/gpu/drm/drm_cache.o
CC fs/xattr.o
CC fs/libfs.o
CC lib/percpu_counter.o
CC fs/fs-writeback.o
CC drivers/acpi/acpica/pswalk.o
CC drivers/cpuidle/poll_state.o
CC drivers/scsi/sr_vendor.o
CC fs/nfs/nfs4file.o
CC drivers/cpufreq/cpufreq_governor_attr_set.o
CC drivers/input/vivaldi-fmap.o
CC drivers/gpu/drm/i915/i915_sw_fence.o
CC kernel/async.o
CC drivers/md/dm-linear.o
CC drivers/acpi/fan_hwmon.o
CC drivers/usb/core/hcd-pci.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
CC drivers/ata/ata_generic.o
CC drivers/cpuidle/cpuidle-haltpoll.o
CC fs/nfs/delegation.o
CC drivers/scsi/sg.o
CC drivers/input/input-leds.o
CC drivers/acpi/acpica/psxface.o
CC drivers/usb/host/xhci-ring.o
CC drivers/acpi/acpi_video.o
CC mm/dmapool.o
CC drivers/gpu/drm/i915/i915_sw_fence_work.o
CC lib/audit.o
CC drivers/md/dm-stripe.o
CC kernel/range.o
CC drivers/gpu/drm/drm_color_mgmt.o
CC drivers/cpufreq/acpi-cpufreq.o
CC drivers/acpi/video_detect.o
CC net/mac80211/ocb.o
CC kernel/smpboot.o
CC net/ipv6/esp6.o
CC lib/syscall.o
AR drivers/net/ethernet/dec/tulip/built-in.a
CC net/ipv4/igmp.o
AR drivers/net/ethernet/dec/built-in.a
CC arch/x86/kernel/setup_percpu.o
CC drivers/gpu/drm/drm_connector.o
CC mm/hugetlb.o
CC drivers/input/evdev.o
AR drivers/cpuidle/built-in.a
CC net/ipv6/sit.o
CC lib/errname.o
CC drivers/acpi/processor_driver.o
CC drivers/acpi/acpica/rsaddr.o
CC drivers/usb/core/usb-acpi.o
CC net/ipv4/fib_frontend.o
CC drivers/acpi/processor_thermal.o
CC drivers/gpu/drm/i915/i915_syncmap.o
CC drivers/acpi/processor_idle.o
CC net/mac80211/airtime.o
AR drivers/thermal/built-in.a
CC drivers/gpu/drm/i915/i915_user_extensions.o
CC drivers/gpu/drm/i915/i915_debugfs.o
CC drivers/gpu/drm/i915/i915_debugfs_params.o
AR drivers/ata/built-in.a
CC drivers/usb/host/xhci-hub.o
CC drivers/usb/host/xhci-dbg.o
CC drivers/cpufreq/amd-pstate.o
CC drivers/acpi/acpica/rscalc.o
CC mm/mmu_notifier.o
CC kernel/ucount.o
AR drivers/net/ethernet/dlink/built-in.a
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
CC drivers/gpu/drm/i915/i915_pmu.o
CC lib/nlattr.o
CC net/ipv4/fib_semantics.o
CC drivers/usb/host/xhci-trace.o
CC drivers/acpi/acpica/rscreate.o
AR drivers/firmware/arm_ffa/built-in.a
CC drivers/cpufreq/amd-pstate-trace.o
AR drivers/firmware/arm_scmi/built-in.a
CC net/mac80211/eht.o
AR drivers/firmware/broadcom/built-in.a
CC arch/x86/kernel/mpparse.o
CC drivers/md/dm-ioctl.o
AR drivers/firmware/cirrus/test/built-in.a
AR drivers/firmware/cirrus/built-in.a
CC net/mac80211/led.o
CC lib/cpu_rmap.o
AR drivers/firmware/meson/built-in.a
CC drivers/acpi/acpica/rsdumpinfo.o
AR drivers/firmware/microchip/built-in.a
CC net/ipv4/fib_trie.o
AR drivers/firmware/imx/built-in.a
CC mm/migrate.o
CC net/ipv4/fib_notifier.o
CC drivers/firmware/efi/libstub/efi-stub-helper.o
CC drivers/usb/host/xhci-debugfs.o
AR drivers/firmware/psci/built-in.a
CC drivers/acpi/acpica/rsinfo.o
AR drivers/usb/core/built-in.a
AR drivers/firmware/qcom/built-in.a
CC drivers/firmware/efi/libstub/gop.o
AR drivers/firmware/smccc/built-in.a
CC mm/page_counter.o
CC drivers/firmware/efi/efi-bgrt.o
CC kernel/regset.o
CC fs/nfs/nfs4idmap.o
CC lib/dynamic_queue_limits.o
AR drivers/crypto/stm32/built-in.a
AR drivers/crypto/xilinx/built-in.a
AR drivers/input/built-in.a
CC lib/glob.o
AR drivers/crypto/hisilicon/built-in.a
AR drivers/crypto/intel/keembay/built-in.a
AR drivers/crypto/intel/ixp4xx/built-in.a
AR drivers/crypto/starfive/built-in.a
AR drivers/crypto/intel/built-in.a
CC net/ipv6/addrconf_core.o
AR drivers/crypto/built-in.a
CC drivers/md/dm-io.o
CC drivers/firmware/efi/efi.o
CC drivers/cpufreq/intel_pstate.o
CC arch/x86/kernel/trace_clock.o
CC drivers/acpi/acpica/rsio.o
CC drivers/scsi/scsi_sysfs.o
CC net/ipv4/inet_fragment.o
CC kernel/ksyms_common.o
CC drivers/firmware/efi/libstub/secureboot.o
CC drivers/firmware/efi/libstub/tpm.o
CC fs/nfs/callback.o
CC fs/pnode.o
CC drivers/clocksource/acpi_pm.o
CC mm/hugetlb_cgroup.o
CC drivers/acpi/acpica/rsirq.o
CC kernel/groups.o
CC drivers/usb/host/xhci-pci.o
CC net/mac80211/pm.o
CC arch/x86/kernel/trace.o
CC drivers/gpu/drm/drm_crtc.o
AR drivers/firmware/tegra/built-in.a
CC drivers/acpi/processor_throttling.o
CC drivers/firmware/efi/vars.o
CC drivers/hid/usbhid/hid-core.o
CC net/mac80211/rc80211_minstrel_ht.o
CC lib/strncpy_from_user.o
AR drivers/firmware/xilinx/built-in.a
CC fs/splice.o
AR drivers/platform/x86/amd/built-in.a
CC drivers/platform/x86/wmi.o
AR drivers/platform/x86/intel/built-in.a
CC drivers/firmware/efi/libstub/file.o
CC drivers/acpi/acpica/rslist.o
CC net/mac80211/wbrf.o
AR drivers/platform/surface/built-in.a
CC drivers/md/dm-kcopyd.o
CC fs/sync.o
CC drivers/gpu/drm/i915/gt/gen2_engine_cs.o
CC drivers/gpu/drm/drm_displayid.o
CC fs/nfs/callback_xdr.o
AR drivers/net/ethernet/emulex/built-in.a
AR drivers/net/ethernet/engleder/built-in.a
CC mm/early_ioremap.o
CC net/ipv6/exthdrs_core.o
CC fs/utimes.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC drivers/platform/x86/wmi-bmof.o
CC drivers/firmware/dmi_scan.o
CC drivers/clocksource/i8253.o
CC drivers/mailbox/mailbox.o
CC arch/x86/kernel/rethook.o
CC drivers/platform/x86/eeepc-laptop.o
CC drivers/acpi/acpica/rsmemory.o
CC kernel/kcmp.o
AR drivers/perf/built-in.a
CC drivers/hid/usbhid/hiddev.o
CC drivers/hid/hid-core.o
CC lib/strnlen_user.o
CC net/ipv6/ip6_checksum.o
CC fs/d_path.o
CC drivers/mailbox/pcc.o
CC drivers/firmware/efi/libstub/mem.o
CC fs/nfs/callback_proc.o
CC drivers/hid/usbhid/hid-pidff.o
AR drivers/scsi/built-in.a
CC kernel/freezer.o
CC drivers/firmware/dmi-id.o
AR drivers/net/ethernet/ezchip/built-in.a
CC drivers/hid/hid-input.o
AR drivers/clocksource/built-in.a
CC net/ipv4/ping.o
CC fs/stack.o
CC drivers/acpi/acpica/rsmisc.o
CC drivers/gpu/drm/drm_drv.o
CC drivers/md/dm-sysfs.o
CC drivers/platform/x86/p2sb.o
CC arch/x86/kernel/vmcore_info_32.o
CC drivers/firmware/efi/reboot.o
CC lib/net_utils.o
CC drivers/hid/hid-quirks.o
CC drivers/firmware/efi/memattr.o
CC kernel/profile.o
CC drivers/firmware/memmap.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
AR drivers/usb/host/built-in.a
AR drivers/usb/built-in.a
CC drivers/acpi/acpica/rsserial.o
CC drivers/firmware/efi/tpm.o
AR drivers/net/ethernet/fujitsu/built-in.a
CC drivers/gpu/drm/drm_dumb_buffers.o
CC drivers/hid/hid-debug.o
CC fs/fs_struct.o
CC drivers/gpu/drm/i915/gt/gen6_engine_cs.o
CC drivers/firmware/efi/libstub/random.o
CC drivers/acpi/processor_perflib.o
AR drivers/mailbox/built-in.a
CC drivers/hid/hidraw.o
AR drivers/net/ethernet/fungible/built-in.a
CC kernel/stacktrace.o
CC lib/sg_pool.o
CC drivers/gpu/drm/i915/gt/gen6_ppgtt.o
CC drivers/gpu/drm/i915/gt/gen7_renderclear.o
CC drivers/hid/hid-generic.o
AR drivers/hwtracing/intel_th/built-in.a
CC lib/stackdepot.o
CC drivers/firmware/efi/memmap.o
CC arch/x86/kernel/machine_kexec_32.o
CC mm/secretmem.o
CC drivers/md/dm-stats.o
CC fs/nfs/nfs4namespace.o
CC fs/nfs/nfs4getroot.o
CC drivers/acpi/acpica/rsutils.o
AR drivers/cpufreq/built-in.a
AS arch/x86/kernel/relocate_kernel_32.o
CC lib/asn1_decoder.o
CC drivers/gpu/drm/i915/gt/gen8_engine_cs.o
CC drivers/firmware/efi/capsule.o
CC drivers/hid/hid-a4tech.o
CC fs/nfs/nfs4client.o
CC drivers/acpi/container.o
CC fs/statfs.o
AR drivers/platform/x86/built-in.a
AR drivers/platform/built-in.a
CC drivers/acpi/acpica/rsxface.o
CC net/ipv6/ip6_icmp.o
GEN lib/oid_registry_data.c
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC arch/x86/kernel/crash_dump_32.o
CC drivers/firmware/efi/libstub/randomalloc.o
CC kernel/dma.o
CC mm/hmm.o
CC fs/fs_pin.o
CC drivers/firmware/efi/esrt.o
CC net/ipv4/ip_tunnel_core.o
AR drivers/android/built-in.a
CC fs/nfs/nfs4session.o
CC [M] drivers/gpu/drm/xe/xe_gpu_scheduler.o
CC net/ipv6/output_core.o
CC fs/nsfs.o
CC fs/fs_types.o
CC arch/x86/kernel/crash.o
CC drivers/acpi/acpica/tbdata.o
CC net/ipv4/gre_offload.o
AR drivers/hid/usbhid/built-in.a
CC net/ipv6/protocol.o
CC drivers/gpu/drm/drm_edid.o
CC [M] drivers/gpu/drm/xe/xe_gsc.o
CC drivers/gpu/drm/i915/gt/gen8_ppgtt.o
CC drivers/md/dm-rq.o
CC drivers/firmware/efi/libstub/pci.o
CC mm/memfd.o
CC net/ipv4/metrics.o
AR drivers/nvmem/layouts/built-in.a
CC drivers/nvmem/core.o
CC drivers/firmware/efi/runtime-wrappers.o
CC [M] drivers/gpu/drm/xe/xe_gsc_debugfs.o
CC lib/ucs2_string.o
CC drivers/gpu/drm/drm_eld.o
CC drivers/acpi/thermal_lib.o
CC mm/ptdump.o
CC drivers/acpi/acpica/tbfadt.o
CC kernel/smp.o
CC lib/sbitmap.o
CC fs/nfs/dns_resolve.o
AR drivers/net/ethernet/google/built-in.a
CC drivers/gpu/drm/i915/gt/intel_breadcrumbs.o
CC drivers/acpi/thermal.o
CC [M] drivers/gpu/drm/xe/xe_gsc_proxy.o
CC net/ipv4/netlink.o
CC mm/execmem.o
AR drivers/net/ethernet/broadcom/built-in.a
AR drivers/net/ethernet/hisilicon/built-in.a
CC fs/nfs/nfs4trace.o
CC drivers/hid/hid-apple.o
AR drivers/net/ethernet/huawei/built-in.a
CC drivers/acpi/acpica/tbfind.o
CC drivers/net/ethernet/intel/e1000/e1000_main.o
CC drivers/firmware/efi/capsule-loader.o
CC drivers/net/ethernet/intel/e1000e/82571.o
CC drivers/firmware/efi/libstub/skip_spaces.o
CC fs/fs_context.o
CC drivers/net/ethernet/intel/e1000e/ich8lan.o
CC drivers/net/ethernet/intel/e100.o
CC drivers/firmware/efi/earlycon.o
CC drivers/net/ethernet/intel/e1000/e1000_hw.o
CC drivers/md/dm-io-rewind.o
CC arch/x86/kernel/module.o
CC drivers/gpu/drm/drm_encoder.o
CC net/ipv6/ip6_offload.o
CC [M] drivers/gpu/drm/xe/xe_gsc_submit.o
AR drivers/net/ethernet/i825xx/built-in.a
CC arch/x86/kernel/doublefault_32.o
CC net/ipv4/nexthop.o
CC drivers/acpi/acpica/tbinstal.o
CC drivers/firmware/efi/libstub/lib-cmdline.o
CC fs/nfs/nfs4sysctl.o
AR net/mac80211/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt.o
CC drivers/gpu/drm/i915/gt/intel_context.o
CC drivers/gpu/drm/drm_file.o
CC drivers/firmware/efi/libstub/lib-ctype.o
CC net/ipv6/tcpv6_offload.o
CC drivers/firmware/efi/libstub/alignedmem.o
CC arch/x86/kernel/early_printk.o
CC drivers/acpi/nhlt.o
CC drivers/net/ethernet/intel/e1000e/80003es2lan.o
CC net/ipv4/udp_tunnel_stub.o
AR drivers/net/ethernet/microsoft/built-in.a
CC kernel/uid16.o
CC drivers/acpi/acpica/tbprint.o
CC fs/fs_parser.o
CC fs/fsopen.o
CC arch/x86/kernel/hpet.o
AR mm/built-in.a
CC kernel/kallsyms.o
CC drivers/md/dm-builtin.o
CC arch/x86/kernel/amd_nb.o
CC lib/group_cpus.o
CC drivers/acpi/acpi_memhotplug.o
CC drivers/gpu/drm/drm_fourcc.o
CC drivers/gpu/drm/i915/gt/intel_context_sseu.o
CC [M] drivers/gpu/drm/xe/xe_gt_ccs_mode.o
CC lib/fw_table.o
CC drivers/firmware/efi/libstub/relocate.o
AR drivers/nvmem/built-in.a
CC drivers/hid/hid-belkin.o
CC drivers/gpu/drm/drm_framebuffer.o
CC drivers/md/dm-raid1.o
CC kernel/acct.o
CC drivers/net/ethernet/intel/e1000e/mac.o
CC net/ipv6/exthdrs_offload.o
CC drivers/acpi/acpica/tbutils.o
AR drivers/firmware/efi/built-in.a
CC drivers/acpi/ioapic.o
CC drivers/net/ethernet/intel/e1000/e1000_ethtool.o
CC arch/x86/kernel/amd_node.o
CC drivers/net/ethernet/intel/e1000/e1000_param.o
CC net/ipv6/inet6_hashtables.o
CC kernel/vmcore_info.o
CC net/ipv4/ip_tunnel.o
AR drivers/net/ethernet/litex/built-in.a
CC drivers/acpi/acpica/tbxface.o
CC drivers/md/dm-log.o
CC fs/init.o
CC fs/kernel_read_file.o
CC net/ipv6/mcast_snoop.o
CC drivers/acpi/battery.o
CC arch/x86/kernel/kvm.o
AR lib/lib.a
GEN lib/crc32table.h
CC lib/oid_registry.o
CC drivers/hid/hid-cherry.o
CC drivers/acpi/acpica/tbxfload.o
CC drivers/firmware/efi/libstub/printk.o
CC drivers/md/dm-region-hash.o
CC kernel/elfcorehdr.o
CC drivers/md/dm-zero.o
CC drivers/acpi/acpica/tbxfroot.o
CC drivers/gpu/drm/i915/gt/intel_engine_cs.o
CC drivers/gpu/drm/drm_gem.o
CC net/ipv4/sysctl_net_ipv4.o
CC drivers/net/ethernet/intel/e1000e/manage.o
CC fs/mnt_idmapping.o
CC kernel/crash_reserve.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o
AR drivers/net/ethernet/marvell/octeon_ep/built-in.a
AR drivers/net/ethernet/marvell/octeon_ep_vf/built-in.a
CC net/ipv4/proc.o
AR drivers/net/ethernet/marvell/octeontx2/built-in.a
CC net/ipv4/fib_rules.o
AR drivers/net/ethernet/marvell/prestera/built-in.a
CC drivers/net/ethernet/marvell/sky2.o
CC kernel/kexec_core.o
CC fs/remap_range.o
CC lib/crc32.o
CC drivers/acpi/acpica/utaddress.o
CC [M] drivers/gpu/drm/xe/xe_gt_freq.o
CC drivers/gpu/drm/drm_ioctl.o
CC arch/x86/kernel/kvmclock.o
AR drivers/net/ethernet/mellanox/built-in.a
CC drivers/hid/hid-chicony.o
AR drivers/net/ethernet/meta/built-in.a
CC drivers/net/ethernet/intel/e1000e/nvm.o
CC arch/x86/kernel/paravirt.o
CC drivers/firmware/efi/libstub/vsprintf.o
CC drivers/acpi/bgrt.o
CC drivers/gpu/drm/i915/gt/intel_engine_pm.o
CC drivers/acpi/acpica/utalloc.o
CC net/ipv4/ipmr.o
CC drivers/firmware/efi/libstub/x86-stub.o
CC drivers/hid/hid-cypress.o
CC drivers/gpu/drm/drm_lease.o
AR drivers/net/ethernet/micrel/built-in.a
CC arch/x86/kernel/pvclock.o
CC drivers/gpu/drm/i915/gt/intel_engine_user.o
CC drivers/acpi/acpica/utascii.o
CC net/ipv4/ipmr_base.o
CC fs/pidfs.o
CC drivers/hid/hid-ezkey.o
AR lib/built-in.a
CC arch/x86/kernel/pcspeaker.o
CC drivers/gpu/drm/drm_managed.o
CC fs/buffer.o
CC drivers/net/ethernet/intel/e1000e/phy.o
AR drivers/md/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_idle.o
CC net/ipv4/syncookies.o
CC drivers/acpi/spcr.o
CC drivers/hid/hid-gyration.o
CC kernel/crash_core.o
CC drivers/acpi/acpica/utbuffer.o
AR drivers/net/ethernet/microchip/built-in.a
CC drivers/net/ethernet/intel/e1000e/param.o
CC kernel/kexec.o
CC drivers/gpu/drm/drm_mm.o
CC arch/x86/kernel/check.o
AR net/ipv6/built-in.a
CC drivers/acpi/acpica/utcksum.o
CC drivers/net/ethernet/intel/e1000e/ethtool.o
CC fs/mpage.o
CC drivers/firmware/efi/libstub/smbios.o
CC drivers/hid/hid-ite.o
CC drivers/gpu/drm/i915/gt/intel_execlists_submission.o
CC drivers/hid/hid-kensington.o
CC net/ipv4/tunnel4.o
STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o
AR drivers/net/ethernet/mscc/built-in.a
CC fs/proc_namespace.o
CC drivers/gpu/drm/drm_mode_config.o
CC fs/direct-io.o
CC drivers/acpi/acpica/utcopy.o
CC net/ipv4/ipconfig.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
CC fs/eventpoll.o
CC drivers/gpu/drm/i915/gt/intel_ggtt.o
STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o
CC arch/x86/kernel/uprobes.o
CC arch/x86/kernel/perf_regs.o
CC net/ipv4/netfilter.o
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC fs/anon_inodes.o
CC drivers/gpu/drm/drm_mode_object.o
CC fs/signalfd.o
CC drivers/gpu/drm/drm_modes.o
CC drivers/net/ethernet/intel/e1000e/netdev.o
CC drivers/hid/hid-lg.o
CC net/ipv4/tcp_cubic.o
AR drivers/net/ethernet/intel/e1000/built-in.a
CC arch/x86/kernel/tracepoint.o
STUBCPY drivers/firmware/efi/libstub/file.stub.o
CC drivers/gpu/drm/drm_modeset_lock.o
CC drivers/acpi/acpica/utexcep.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC arch/x86/kernel/itmt.o
AR fs/nfs/built-in.a
CC drivers/hid/hid-lgff.o
CC drivers/hid/hid-lg4ff.o
CC drivers/gpu/drm/drm_plane.o
AR drivers/net/ethernet/myricom/built-in.a
CC drivers/acpi/acpica/utdebug.o
CC arch/x86/kernel/umip.o
STUBCPY drivers/firmware/efi/libstub/gop.stub.o
CC drivers/acpi/acpica/utdecode.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o
STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o
CC drivers/gpu/drm/drm_prime.o
CC kernel/utsname.o
STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o
STUBCPY drivers/firmware/efi/libstub/mem.stub.o
STUBCPY drivers/firmware/efi/libstub/pci.stub.o
STUBCPY drivers/firmware/efi/libstub/printk.stub.o
STUBCPY drivers/firmware/efi/libstub/random.stub.o
CC fs/timerfd.o
STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o
AR drivers/net/ethernet/natsemi/built-in.a
STUBCPY drivers/firmware/efi/libstub/relocate.stub.o
CC kernel/pid_namespace.o
STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o
STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o
STUBCPY drivers/firmware/efi/libstub/smbios.stub.o
STUBCPY drivers/firmware/efi/libstub/tpm.stub.o
STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o
CC kernel/stop_machine.o
STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o
CC net/ipv4/tcp_sigpool.o
AR drivers/firmware/efi/libstub/lib.a
CC fs/eventfd.o
CC [M] drivers/gpu/drm/xe/xe_gt_throttle.o
AR drivers/firmware/built-in.a
CC drivers/acpi/acpica/utdelete.o
CC drivers/gpu/drm/i915/gt/intel_gt.o
AR drivers/net/ethernet/neterion/built-in.a
CC kernel/audit.o
AR drivers/net/ethernet/netronome/built-in.a
CC fs/aio.o
CC drivers/acpi/acpica/uterror.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC drivers/net/ethernet/intel/e1000e/ptp.o
CC kernel/auditfilter.o
CC net/ipv4/cipso_ipv4.o
CC net/ipv4/xfrm4_policy.o
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
CC arch/x86/kernel/unwind_frame.o
CC drivers/hid/hid-lg-g15.o
CC drivers/gpu/drm/drm_print.o
CC fs/locks.o
CC kernel/auditsc.o
CC net/ipv4/xfrm4_state.o
CC drivers/hid/hid-microsoft.o
CC drivers/hid/hid-monterey.o
AR drivers/net/ethernet/ni/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc.o
CC drivers/net/ethernet/nvidia/forcedeth.o
CC kernel/audit_watch.o
CC fs/binfmt_misc.o
CC drivers/acpi/acpica/uteval.o
CC drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o
CC kernel/audit_fsnotify.o
AR drivers/net/ethernet/oki-semi/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC drivers/hid/hid-ntrig.o
CC drivers/acpi/acpica/utglobal.o
CC drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.o
CC net/ipv4/xfrm4_input.o
CC [M] drivers/gpu/drm/xe/xe_guc_buf.o
CC kernel/audit_tree.o
CC [M] drivers/gpu/drm/xe/xe_guc_capture.o
CC kernel/kprobes.o
CC drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o
AR drivers/net/ethernet/packetengines/built-in.a
CC kernel/seccomp.o
CC drivers/gpu/drm/i915/gt/intel_gt_debugfs.o
AR arch/x86/kernel/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
CC drivers/gpu/drm/drm_property.o
AR arch/x86/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o
CC drivers/hid/hid-pl.o
CC fs/binfmt_script.o
CC drivers/acpi/acpica/uthex.o
AR drivers/net/ethernet/qlogic/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_db_mgr.o
CC drivers/acpi/acpica/utids.o
CC fs/binfmt_elf.o
CC drivers/hid/hid-petalynx.o
CC kernel/relay.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC net/ipv4/xfrm4_output.o
AR drivers/net/ethernet/qualcomm/emac/built-in.a
AR drivers/net/ethernet/qualcomm/built-in.a
CC drivers/acpi/acpica/utinit.o
CC drivers/gpu/drm/drm_rect.o
CC drivers/gpu/drm/i915/gt/intel_gt_irq.o
CC drivers/hid/hid-redragon.o
CC net/ipv4/xfrm4_protocol.o
AR drivers/net/ethernet/marvell/built-in.a
CC kernel/utsname_sysctl.o
CC fs/mbcache.o
CC fs/posix_acl.o
CC drivers/gpu/drm/drm_syncobj.o
CC kernel/delayacct.o
CC drivers/gpu/drm/i915/gt/intel_gt_mcr.o
CC kernel/taskstats.o
CC fs/coredump.o
CC drivers/net/ethernet/realtek/8139too.o
CC kernel/tsacct.o
AR drivers/net/ethernet/renesas/built-in.a
CC drivers/gpu/drm/drm_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_guc_id_mgr.o
CC kernel/tracepoint.o
CC drivers/acpi/acpica/utlock.o
CC drivers/gpu/drm/drm_trace_points.o
CC drivers/hid/hid-samsung.o
CC [M] drivers/gpu/drm/xe/xe_guc_klv_helpers.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm.o
CC kernel/irq_work.o
CC drivers/net/ethernet/realtek/r8169_main.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o
CC drivers/hid/hid-sony.o
CC drivers/acpi/acpica/utmath.o
AR drivers/net/ethernet/rdc/built-in.a
CC drivers/net/ethernet/realtek/r8169_firmware.o
CC drivers/gpu/drm/drm_vblank.o
CC fs/drop_caches.o
CC drivers/gpu/drm/drm_vblank_work.o
CC drivers/hid/hid-sunplus.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC kernel/static_call.o
CC drivers/net/ethernet/realtek/r8169_phy_config.o
AR drivers/net/ethernet/rocker/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC kernel/padata.o
CC drivers/hid/hid-topseed.o
CC [M] drivers/gpu/drm/xe/xe_heci_gsc.o
CC drivers/gpu/drm/i915/gt/intel_gt_requests.o
CC drivers/gpu/drm/drm_vma_manager.o
CC kernel/jump_label.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs.o
CC kernel/context_tracking.o
CC drivers/acpi/acpica/utmisc.o
CC fs/sysctls.o
AR drivers/net/ethernet/samsung/built-in.a
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o
CC kernel/iomem.o
CC drivers/gpu/drm/i915/gt/intel_gtt.o
CC kernel/rseq.o
CC fs/fhandle.o
CC drivers/gpu/drm/drm_writeback.o
CC drivers/gpu/drm/i915/gt/intel_llc.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC drivers/gpu/drm/drm_panel.o
AR drivers/net/ethernet/seeq/built-in.a
CC drivers/acpi/acpica/utmutex.o
CC drivers/gpu/drm/i915/gt/intel_lrc.o
CC drivers/gpu/drm/drm_pci.o
AR drivers/net/ethernet/silan/built-in.a
AR net/ipv4/built-in.a
CC drivers/acpi/acpica/utnonansi.o
CC drivers/gpu/drm/i915/gt/intel_migrate.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
AR net/built-in.a
CC [M] drivers/gpu/drm/xe/xe_hw_engine_group.o
CC drivers/acpi/acpica/utobject.o
CC drivers/gpu/drm/drm_debugfs.o
AR drivers/net/ethernet/sis/built-in.a
CC drivers/gpu/drm/i915/gt/intel_mocs.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
AR drivers/net/ethernet/sfc/built-in.a
CC drivers/acpi/acpica/utosi.o
CC drivers/gpu/drm/drm_debugfs_crc.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC drivers/acpi/acpica/utownerid.o
AR drivers/net/ethernet/smsc/built-in.a
AR drivers/net/ethernet/socionext/built-in.a
CC drivers/gpu/drm/i915/gt/intel_ppgtt.o
CC drivers/gpu/drm/drm_panel_orientation_quirks.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC drivers/acpi/acpica/utpredef.o
AR drivers/net/ethernet/stmicro/built-in.a
CC drivers/gpu/drm/i915/gt/intel_rc6.o
CC drivers/gpu/drm/drm_buddy.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
CC drivers/gpu/drm/drm_gem_shmem_helper.o
AR drivers/net/ethernet/sun/built-in.a
CC drivers/gpu/drm/i915/gt/intel_region_lmem.o
CC drivers/acpi/acpica/utresdecode.o
AR drivers/net/ethernet/tehuti/built-in.a
AR drivers/net/ethernet/ti/built-in.a
CC drivers/gpu/drm/drm_atomic_helper.o
CC drivers/acpi/acpica/utresrc.o
AR drivers/net/ethernet/vertexcom/built-in.a
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC drivers/acpi/acpica/utstate.o
CC drivers/gpu/drm/drm_atomic_state_helper.o
AR drivers/hid/built-in.a
CC drivers/gpu/drm/drm_crtc_helper.o
CC drivers/gpu/drm/i915/gt/intel_renderstate.o
CC drivers/acpi/acpica/utstring.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
CC drivers/gpu/drm/i915/gt/intel_reset.o
AR drivers/net/ethernet/via/built-in.a
CC drivers/gpu/drm/drm_damage_helper.o
CC drivers/acpi/acpica/utstrsuppt.o
CC drivers/gpu/drm/i915/gt/intel_ring.o
CC drivers/gpu/drm/drm_flip_work.o
CC [M] drivers/gpu/drm/xe/xe_module.o
AR fs/built-in.a
CC drivers/acpi/acpica/utstrtoul64.o
CC [M] drivers/gpu/drm/xe/xe_oa.o
AR drivers/net/ethernet/wangxun/built-in.a
CC drivers/acpi/acpica/utxface.o
AR kernel/built-in.a
CC drivers/gpu/drm/drm_format_helper.o
CC drivers/gpu/drm/i915/gt/intel_ring_submission.o
CC [M] drivers/gpu/drm/xe/xe_observation.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
AR drivers/net/ethernet/wiznet/built-in.a
CC drivers/gpu/drm/i915/gt/intel_rps.o
CC drivers/acpi/acpica/utxfinit.o
CC drivers/acpi/acpica/utxferror.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC drivers/gpu/drm/i915/gt/intel_sa_media.o
CC drivers/acpi/acpica/utxfmutex.o
AR drivers/net/ethernet/xilinx/built-in.a
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC drivers/gpu/drm/i915/gt/intel_sseu.o
CC drivers/gpu/drm/drm_gem_atomic_helper.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
AR drivers/net/ethernet/nvidia/built-in.a
CC drivers/gpu/drm/drm_gem_framebuffer_helper.o
AR drivers/net/ethernet/xircom/built-in.a
CC drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o
CC drivers/gpu/drm/i915/gt/intel_timeline.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC drivers/gpu/drm/drm_kms_helper_common.o
CC drivers/gpu/drm/i915/gt/intel_tlb.o
AR drivers/net/ethernet/synopsys/built-in.a
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC drivers/gpu/drm/drm_modeset_helper.o
AR drivers/net/ethernet/pensando/built-in.a
CC drivers/gpu/drm/i915/gt/intel_wopcm.o
CC drivers/gpu/drm/drm_plane_helper.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
AR drivers/acpi/acpica/built-in.a
CC drivers/gpu/drm/drm_probe_helper.o
CC drivers/gpu/drm/i915/gt/intel_workarounds.o
CC drivers/gpu/drm/drm_self_refresh_helper.o
AR drivers/acpi/built-in.a
CC [M] drivers/gpu/drm/xe/xe_pxp.o
CC drivers/gpu/drm/drm_simple_kms_helper.o
CC drivers/gpu/drm/i915/gt/shmem_utils.o
CC drivers/gpu/drm/i915/gt/sysfs_engines.o
CC [M] drivers/gpu/drm/xe/xe_pxp_debugfs.o
CC drivers/gpu/drm/bridge/panel.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o
CC [M] drivers/gpu/drm/xe/xe_pxp_submit.o
CC drivers/gpu/drm/i915/gt/gen6_renderstate.o
CC drivers/gpu/drm/drm_mipi_dsi.o
CC drivers/gpu/drm/i915/gt/gen7_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC [M] drivers/gpu/drm/xe/xe_range_fence.o
CC [M] drivers/gpu/drm/drm_exec.o
AR drivers/net/ethernet/intel/e1000e/built-in.a
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
AR drivers/net/ethernet/intel/built-in.a
CC drivers/gpu/drm/i915/gt/gen8_renderstate.o
CC [M] drivers/gpu/drm/drm_gpuvm.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
CC drivers/gpu/drm/i915/gt/gen9_renderstate.o
CC drivers/gpu/drm/i915/gem/i915_gem_busy.o
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
CC drivers/gpu/drm/i915/gem/i915_gem_clflush.o
CC [M] drivers/gpu/drm/drm_suballoc.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC drivers/gpu/drm/i915/gem/i915_gem_context.o
CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
CC drivers/gpu/drm/i915/gem/i915_gem_create.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o
CC drivers/gpu/drm/i915/gem/i915_gem_domain.o
CC [M] drivers/gpu/drm/xe/xe_survivability_mode.o
CC drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC drivers/gpu/drm/i915/gem/i915_gem_internal.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC drivers/gpu/drm/i915/gem/i915_gem_lmem.o
CC [M] drivers/gpu/drm/xe/xe_trace_bo.o
CC drivers/gpu/drm/i915/gem/i915_gem_mman.o
AR drivers/net/ethernet/realtek/built-in.a
AR drivers/net/ethernet/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_object.o
CC drivers/gpu/drm/i915/gem/i915_gem_pages.o
CC [M] drivers/gpu/drm/xe/xe_trace_guc.o
CC drivers/gpu/drm/i915/gem/i915_gem_phys.o
CC drivers/gpu/drm/i915/gem/i915_gem_pm.o
CC [M] drivers/gpu/drm/xe/xe_trace_lrc.o
CC drivers/gpu/drm/i915/gem/i915_gem_region.o
AR drivers/net/built-in.a
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
CC drivers/gpu/drm/i915/gem/i915_gem_shmem.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC drivers/gpu/drm/i915/gem/i915_gem_shrinker.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_stolen.o
CC [M] drivers/gpu/drm/xe/xe_vm.o
CC [M] drivers/gpu/drm/xe/xe_vram.o
CC drivers/gpu/drm/i915/gem/i915_gem_throttle.o
LD [M] drivers/gpu/drm/drm_ttm_helper.o
CC [M] drivers/gpu/drm/xe/xe_vram_freq.o
CC drivers/gpu/drm/i915/gem/i915_gem_tiling.o
CC [M] drivers/gpu/drm/xe/xe_vsec.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o
CC drivers/gpu/drm/i915/gem/i915_gem_userptr.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC drivers/gpu/drm/i915/gem/i915_gem_wait.o
CC drivers/gpu/drm/i915/gem/i915_gemfs.o
CC [M] drivers/gpu/drm/xe/xe_hmm.o
CC [M] drivers/gpu/drm/xe/xe_hwmon.o
CC drivers/gpu/drm/i915/i915_active.o
CC [M] drivers/gpu/drm/xe/xe_pmu.o
CC drivers/gpu/drm/i915/i915_cmd_parser.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf.o
CC [M] drivers/gpu/drm/xe/xe_guc_relay.o
CC drivers/gpu/drm/i915/i915_deps.o
CC [M] drivers/gpu/drm/xe/xe_memirq.o
CC [M] drivers/gpu/drm/xe/xe_sriov.o
CC [M] drivers/gpu/drm/xe/xe_sriov_vf.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_utils.o
CC [M] drivers/gpu/drm/xe/display/intel_bo.o
CC drivers/gpu/drm/i915/i915_gem.o
CC [M] drivers/gpu/drm/xe/display/intel_fb_bo.o
CC [M] drivers/gpu/drm/xe/display/intel_fbdev_fb.o
CC drivers/gpu/drm/i915/i915_gem_evict.o
CC [M] drivers/gpu/drm/xe/display/xe_display.o
CC drivers/gpu/drm/i915/i915_gem_gtt.o
CC drivers/gpu/drm/i915/i915_gem_ww.o
CC [M] drivers/gpu/drm/xe/display/xe_display_misc.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rps.o
CC drivers/gpu/drm/i915/i915_query.o
CC [M] drivers/gpu/drm/xe/display/xe_display_wa.o
CC [M] drivers/gpu/drm/xe/display/xe_dsb_buffer.o
CC drivers/gpu/drm/i915/i915_request.o
CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o
CC drivers/gpu/drm/i915/i915_scheduler.o
CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o
CC drivers/gpu/drm/i915/i915_trace_points.o
CC drivers/gpu/drm/i915/i915_ttm_buddy_manager.o
CC drivers/gpu/drm/i915/i915_vma.o
CC [M] drivers/gpu/drm/xe/display/xe_tdf.o
CC drivers/gpu/drm/i915/i915_vma_resource.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_dram.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_pch.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_rom.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o
CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_alpm.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cmtg.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_conversion.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_irq.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_params.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o
CC drivers/gpu/drm/i915/gt/intel_gsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o
CC drivers/gpu/drm/i915/i915_hwmon.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
CC drivers/gpu/drm/i915/display/hsw_ips.o
CC drivers/gpu/drm/i915/display/i9xx_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_wa.o
CC drivers/gpu/drm/i915/display/i9xx_display_sr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o
CC drivers/gpu/drm/i915/display/i9xx_wm.o
CC drivers/gpu/drm/i915/display/intel_alpm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc_wl.o
CC drivers/gpu/drm/i915/display/intel_atomic.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o
CC drivers/gpu/drm/i915/display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/display/intel_audio.o
CC drivers/gpu/drm/i915/display/intel_bios.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_bo.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o
CC drivers/gpu/drm/i915/display/intel_bw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_test.o
CC drivers/gpu/drm/i915/display/intel_cdclk.o
CC drivers/gpu/drm/i915/display/intel_cmtg.o
CC drivers/gpu/drm/i915/display/intel_color.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o
CC drivers/gpu/drm/i915/display/intel_combo_phy.o
CC drivers/gpu/drm/i915/display/intel_connector.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt_common.o
CC drivers/gpu/drm/i915/display/intel_crtc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o
CC drivers/gpu/drm/i915/display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o
CC drivers/gpu/drm/i915/display/intel_cursor.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_display.o
CC drivers/gpu/drm/i915/display/intel_display_conversion.o
CC drivers/gpu/drm/i915/display/intel_display_driver.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_encoder.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o
CC drivers/gpu/drm/i915/display/intel_display_irq.o
CC drivers/gpu/drm/i915/display/intel_display_params.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o
CC drivers/gpu/drm/i915/display/intel_display_power.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_display_power_map.o
CC drivers/gpu/drm/i915/display/intel_display_power_well.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o
CC drivers/gpu/drm/i915/display/intel_display_reset.o
CC drivers/gpu/drm/i915/display/intel_display_rps.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp_gsc_message.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o
CC drivers/gpu/drm/i915/display/intel_display_snapshot.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o
CC drivers/gpu/drm/i915/display/intel_display_wa.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o
CC drivers/gpu/drm/i915/display/intel_dmc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_link_bw.o
CC drivers/gpu/drm/i915/display/intel_dmc_wl.o
CC drivers/gpu/drm/i915/display/intel_dpio_phy.o
CC drivers/gpu/drm/i915/display/intel_dpll.o
CC drivers/gpu/drm/i915/display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_lock.o
CC drivers/gpu/drm/i915/display/intel_dpt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o
CC drivers/gpu/drm/i915/display/intel_dpt_common.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o
CC drivers/gpu/drm/i915/display/intel_drrs.o
CC drivers/gpu/drm/i915/display/intel_dsb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_dsb_buffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pfit.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pmdemand.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_fb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_fb_bo.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o
CC drivers/gpu/drm/i915/display/intel_fb_pin.o
CC drivers/gpu/drm/i915/display/intel_fbc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_hdmi_pll.o
CC drivers/gpu/drm/i915/display/intel_fdi.o
CC drivers/gpu/drm/i915/display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o
CC drivers/gpu/drm/i915/display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o
CC drivers/gpu/drm/i915/display/intel_global_state.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o
CC drivers/gpu/drm/i915/display/intel_hdcp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o
CC drivers/gpu/drm/i915/display/intel_hotplug.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_hotplug_irq.o
CC drivers/gpu/drm/i915/display/intel_hti.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC drivers/gpu/drm/i915/display/intel_link_bw.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_stats.o
CC drivers/gpu/drm/i915/display/intel_load_detect.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC drivers/gpu/drm/i915/display/intel_lpe_audio.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC drivers/gpu/drm/i915/display/intel_modeset_lock.o
CC drivers/gpu/drm/i915/display/intel_modeset_setup.o
CC drivers/gpu/drm/i915/display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs_params.o
CC drivers/gpu/drm/i915/display/intel_overlay.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/intel_pch_display.o
CC drivers/gpu/drm/i915/display/intel_pch_refclk.o
CC drivers/gpu/drm/i915/display/intel_plane_initial.o
CC drivers/gpu/drm/i915/display/intel_pmdemand.o
CC drivers/gpu/drm/i915/display/intel_psr.o
CC drivers/gpu/drm/i915/display/intel_quirks.o
CC drivers/gpu/drm/i915/display/intel_sprite.o
CC drivers/gpu/drm/i915/display/intel_sprite_uapi.o
CC drivers/gpu/drm/i915/display/intel_tc.o
CC drivers/gpu/drm/i915/display/intel_vblank.o
CC drivers/gpu/drm/i915/display/intel_vga.o
CC drivers/gpu/drm/i915/display/intel_wm.o
CC drivers/gpu/drm/i915/display/skl_scaler.o
CC drivers/gpu/drm/i915/display/skl_universal_plane.o
CC drivers/gpu/drm/i915/display/skl_watermark.o
CC drivers/gpu/drm/i915/display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_opregion.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs_params.o
CC drivers/gpu/drm/i915/display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/dvo_ch7017.o
CC drivers/gpu/drm/i915/display/dvo_ch7xxx.o
CC drivers/gpu/drm/i915/display/dvo_ivch.o
CC drivers/gpu/drm/i915/display/dvo_ns2501.o
CC drivers/gpu/drm/i915/display/dvo_sil164.o
CC drivers/gpu/drm/i915/display/dvo_tfp410.o
CC drivers/gpu/drm/i915/display/g4x_dp.o
CC drivers/gpu/drm/i915/display/g4x_hdmi.o
CC drivers/gpu/drm/i915/display/icl_dsi.o
CC drivers/gpu/drm/i915/display/intel_backlight.o
CC drivers/gpu/drm/i915/display/intel_crt.o
CC drivers/gpu/drm/i915/display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/display/intel_ddi.o
CC drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/display/intel_display_device.o
CC drivers/gpu/drm/i915/display/intel_display_trace.o
CC drivers/gpu/drm/i915/display/intel_dkl_phy.o
CC drivers/gpu/drm/i915/display/intel_dp.o
CC drivers/gpu/drm/i915/display/intel_dp_aux.o
CC drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o
CC drivers/gpu/drm/i915/display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_dp_mst.o
CC drivers/gpu/drm/i915/display/intel_dp_test.o
CC drivers/gpu/drm/i915/display/intel_dsi.o
CC drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_dvo.o
CC drivers/gpu/drm/i915/display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_hdmi.o
CC drivers/gpu/drm/i915/display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_lvds.o
CC drivers/gpu/drm/i915/display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_pfit.o
CC drivers/gpu/drm/i915/display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_sdvo.o
CC drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.o
CC drivers/gpu/drm/i915/display/intel_snps_phy.o
CC drivers/gpu/drm/i915/display/intel_tv.o
CC drivers/gpu/drm/i915/display/intel_vdsc.o
CC drivers/gpu/drm/i915/display/intel_vrr.o
CC drivers/gpu/drm/i915/display/vlv_dsi.o
CC drivers/gpu/drm/i915/display/vlv_dsi_pll.o
CC drivers/gpu/drm/i915/i915_perf.o
CC drivers/gpu/drm/i915/pxp/intel_pxp.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_huc.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_tee.o
CC drivers/gpu/drm/i915/i915_gpu_error.o
CC drivers/gpu/drm/i915/i915_vgpu.o
LD [M] drivers/gpu/drm/xe/xe.o
AR drivers/gpu/drm/i915/built-in.a
AR drivers/gpu/drm/built-in.a
AR drivers/gpu/built-in.a
AR drivers/built-in.a
AR built-in.a
AR vmlinux.a
LD vmlinux.o
OBJCOPY modules.builtin.modinfo
GEN modules.builtin
MODPOST Module.symvers
CC .vmlinux.export.o
CC [M] fs/efivarfs/efivarfs.mod.o
CC [M] .module-common.o
CC [M] drivers/gpu/drm/drm_exec.mod.o
CC [M] drivers/gpu/drm/drm_gpuvm.mod.o
CC [M] drivers/gpu/drm/drm_suballoc_helper.mod.o
CC [M] drivers/gpu/drm/drm_ttm_helper.mod.o
CC [M] drivers/gpu/drm/scheduler/gpu-sched.mod.o
CC [M] drivers/gpu/drm/xe/xe.mod.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.mod.o
CC [M] net/netfilter/nf_log_syslog.mod.o
CC [M] net/netfilter/xt_mark.mod.o
CC [M] net/netfilter/xt_nat.mod.o
CC [M] net/netfilter/xt_LOG.mod.o
CC [M] net/netfilter/xt_MASQUERADE.mod.o
CC [M] net/netfilter/xt_addrtype.mod.o
CC [M] net/ipv4/netfilter/iptable_nat.mod.o
LD [M] fs/efivarfs/efivarfs.ko
LD [M] drivers/gpu/drm/drm_ttm_helper.ko
LD [M] drivers/gpu/drm/scheduler/gpu-sched.ko
LD [M] drivers/gpu/drm/xe/xe.ko
LD [M] drivers/thermal/intel/x86_pkg_temp_thermal.ko
LD [M] net/netfilter/nf_log_syslog.ko
LD [M] net/netfilter/xt_mark.ko
LD [M] net/netfilter/xt_nat.ko
LD [M] net/netfilter/xt_LOG.ko
LD [M] net/netfilter/xt_MASQUERADE.ko
LD [M] net/netfilter/xt_addrtype.ko
LD [M] net/ipv4/netfilter/iptable_nat.ko
LD [M] drivers/gpu/drm/drm_suballoc_helper.ko
LD [M] drivers/gpu/drm/drm_gpuvm.ko
LD [M] drivers/gpu/drm/drm_exec.ko
UPD include/generated/utsversion.h
CC init/version-timestamp.o
KSYMS .tmp_vmlinux0.kallsyms.S
AS .tmp_vmlinux0.kallsyms.o
LD .tmp_vmlinux1
NM .tmp_vmlinux1.syms
KSYMS .tmp_vmlinux1.kallsyms.S
AS .tmp_vmlinux1.kallsyms.o
LD .tmp_vmlinux2
NM .tmp_vmlinux2.syms
KSYMS .tmp_vmlinux2.kallsyms.S
AS .tmp_vmlinux2.kallsyms.o
LD vmlinux
NM System.map
SORTTAB vmlinux
RELOCS arch/x86/boot/compressed/vmlinux.relocs
RSTRIP vmlinux
CC arch/x86/boot/a20.o
AS arch/x86/boot/bioscall.o
CC arch/x86/boot/cmdline.o
AS arch/x86/boot/copy.o
HOSTCC arch/x86/boot/mkcpustr
CC arch/x86/boot/cpuflags.o
CC arch/x86/boot/cpucheck.o
CC arch/x86/boot/early_serial_console.o
CC arch/x86/boot/edd.o
CC arch/x86/boot/main.o
CC arch/x86/boot/memory.o
CC arch/x86/boot/pm.o
AS arch/x86/boot/pmjump.o
CC arch/x86/boot/printf.o
CC arch/x86/boot/regs.o
CC arch/x86/boot/string.o
CC arch/x86/boot/tty.o
CC arch/x86/boot/video.o
CC arch/x86/boot/video-mode.o
CC arch/x86/boot/version.o
CC arch/x86/boot/video-vga.o
CC arch/x86/boot/video-vesa.o
CC arch/x86/boot/video-bios.o
HOSTCC arch/x86/boot/tools/build
CPUSTR arch/x86/boot/cpustr.h
CC arch/x86/boot/cpu.o
LDS arch/x86/boot/compressed/vmlinux.lds
AS arch/x86/boot/compressed/kernel_info.o
AS arch/x86/boot/compressed/head_32.o
VOFFSET arch/x86/boot/compressed/../voffset.h
CC arch/x86/boot/compressed/string.o
CC arch/x86/boot/compressed/cmdline.o
CC arch/x86/boot/compressed/error.o
OBJCOPY arch/x86/boot/compressed/vmlinux.bin
HOSTCC arch/x86/boot/compressed/mkpiggy
CC arch/x86/boot/compressed/cpuflags.o
CC arch/x86/boot/compressed/early_serial_console.o
CC arch/x86/boot/compressed/kaslr.o
CC arch/x86/boot/compressed/acpi.o
CC arch/x86/boot/compressed/efi.o
GZIP arch/x86/boot/compressed/vmlinux.bin.gz
CC arch/x86/boot/compressed/misc.o
MKPIGGY arch/x86/boot/compressed/piggy.S
AS arch/x86/boot/compressed/piggy.o
LD arch/x86/boot/compressed/vmlinux
ZOFFSET arch/x86/boot/zoffset.h
OBJCOPY arch/x86/boot/vmlinux.bin
AS arch/x86/boot/header.o
LD arch/x86/boot/setup.elf
OBJCOPY arch/x86/boot/setup.bin
BUILD arch/x86/boot/bzImage
Kernel: arch/x86/boot/bzImage is ready (#1)
run-parts: executing /workspace/ci/hooks/20-kernel-doc
+ SRC_DIR=/workspace/kernel
+ cd /workspace/kernel
+ find drivers/gpu/drm/xe/ -name '*.[ch]' -not -path 'drivers/gpu/drm/xe/display/*'
+ xargs ./scripts/kernel-doc -Werror -none include/uapi/drm/xe_drm.h
All hooks done
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✗ CI.checksparse: warning for drm/i915/display: conversions to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (19 preceding siblings ...)
2025-02-12 20:53 ` ✓ CI.Hooks: " Patchwork
@ 2025-02-12 20:55 ` Patchwork
2025-02-12 21:17 ` ✓ Xe.CI.BAT: success " Patchwork
2025-02-13 5:55 ` ✗ Xe.CI.Full: failure " Patchwork
22 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-12 20:55 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: conversions to struct intel_display
URL : https://patchwork.freedesktop.org/series/144749/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 1e935d0d289627796230e9e1ca1451647fe9a2ad
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1970:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1983:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:1983:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c:106:17: warning: cast truncates bits from constant value (e8d4a51000 becomes d4a51000)
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/display: conversions to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (20 preceding siblings ...)
2025-02-12 20:55 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-02-12 21:17 ` Patchwork
2025-02-13 5:55 ` ✗ Xe.CI.Full: failure " Patchwork
22 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-12 21:17 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 3000 bytes --]
== Series Details ==
Series: drm/i915/display: conversions to struct intel_display
URL : https://patchwork.freedesktop.org/series/144749/
State : success
== Summary ==
CI Bug Log - changes from xe-2650-99733311410a5518dda4fd7bab11266f318a9453_BAT -> xe-pw-144749v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 8)
------------------------------
Missing (1): bat-adlp-vm
Known issues
------------
Here are the changes found in xe-pw-144749v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-adlp-vf: NOTRUN -> [SKIP][1] ([Intel XE#2229] / [Intel XE#455]) +1 other test skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/bat-adlp-vf/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- bat-adlp-vf: NOTRUN -> [SKIP][2] ([Intel XE#2229])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/bat-adlp-vf/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
#### Possible fixes ####
* igt@xe_intel_bb@intel-bb-blit-x:
- bat-adlp-vf: [DMESG-WARN][3] ([Intel XE#3970]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/bat-adlp-vf/igt@xe_intel_bb@intel-bb-blit-x.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/bat-adlp-vf/igt@xe_intel_bb@intel-bb-blit-x.html
* igt@xe_live_ktest@xe_migrate:
- bat-adlp-vf: [SKIP][5] ([Intel XE#1192]) -> [PASS][6] +1 other test pass
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/bat-adlp-vf/igt@xe_live_ktest@xe_migrate.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/bat-adlp-vf/igt@xe_live_ktest@xe_migrate.html
#### Warnings ####
* igt@xe_live_ktest@xe_bo:
- bat-adlp-vf: [SKIP][7] ([Intel XE#1192]) -> [SKIP][8] ([Intel XE#2229] / [Intel XE#455])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/bat-adlp-vf/igt@xe_live_ktest@xe_bo.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/bat-adlp-vf/igt@xe_live_ktest@xe_bo.html
[Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
Build changes
-------------
* Linux: xe-2650-99733311410a5518dda4fd7bab11266f318a9453 -> xe-pw-144749v1
IGT_8228: 8228
xe-2650-99733311410a5518dda4fd7bab11266f318a9453: 99733311410a5518dda4fd7bab11266f318a9453
xe-pw-144749v1: 144749v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/index.html
[-- Attachment #2: Type: text/html, Size: 3958 bytes --]
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✗ Xe.CI.Full: failure for drm/i915/display: conversions to struct intel_display
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
` (21 preceding siblings ...)
2025-02-12 21:17 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-02-13 5:55 ` Patchwork
22 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2025-02-13 5:55 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 50676 bytes --]
== Series Details ==
Series: drm/i915/display: conversions to struct intel_display
URL : https://patchwork.freedesktop.org/series/144749/
State : failure
== Summary ==
CI Bug Log - changes from xe-2650-99733311410a5518dda4fd7bab11266f318a9453_full -> xe-pw-144749v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-144749v1_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-144749v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-144749v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_joiner@basic-force-big-joiner:
- shard-dg2-set2: [PASS][1] -> [SKIP][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-466/igt@kms_joiner@basic-force-big-joiner.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_joiner@basic-force-big-joiner.html
* igt@xe_pm@d3hot-basic-exec:
- shard-bmg: [PASS][3] -> [TIMEOUT][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-5/igt@xe_pm@d3hot-basic-exec.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-7/igt@xe_pm@d3hot-basic-exec.html
#### Warnings ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-dg2-set2: [DMESG-WARN][5] ([Intel XE#1033]) -> [DMESG-WARN][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_async_flips@alternate-sync-async-flip.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@xe_pm@s4-basic-exec:
- shard-adlp: [ABORT][7] ([Intel XE#2953] / [Intel XE#4268]) -> [ABORT][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-9/igt@xe_pm@s4-basic-exec.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-2/igt@xe_pm@s4-basic-exec.html
Known issues
------------
Here are the changes found in xe-pw-144749v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_atomic_transition@plane-all-modeset-transition@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][9] ([Intel XE#1033]) +4 other tests dmesg-warn
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-b-dp-4.html
* igt@kms_atomic_transition@plane-all-transition@pipe-b-hdmi-a-3:
- shard-bmg: NOTRUN -> [DMESG-WARN][10] ([Intel XE#4172]) +2 other tests dmesg-warn
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@kms_atomic_transition@plane-all-transition@pipe-b-hdmi-a-3.html
* igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
- shard-bmg: [PASS][11] -> [SKIP][12] ([Intel XE#2314] / [Intel XE#2894])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-7/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#455] / [Intel XE#787]) +14 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-432/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs@pipe-d-dp-2.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-2:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#787]) +68 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-2.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [PASS][15] -> [INCOMPLETE][16] ([Intel XE#4010])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [PASS][17] -> [INCOMPLETE][18] ([Intel XE#1727] / [Intel XE#3124] / [Intel XE#4010])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6:
- shard-dg2-set2: [PASS][19] -> [INCOMPLETE][20] ([Intel XE#3113] / [Intel XE#4010])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4:
- shard-dg2-set2: [PASS][21] -> [DMESG-WARN][22] ([Intel XE#1727] / [Intel XE#3113])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6:
- shard-dg2-set2: [PASS][23] -> [INCOMPLETE][24] ([Intel XE#3124] / [Intel XE#4010])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2652] / [Intel XE#787]) +11 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-5/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html
* igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][26] ([Intel XE#1152]) +3 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-433/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [DMESG-FAIL][27] ([Intel XE#1033])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-bmg: [PASS][28] -> [SKIP][29] ([Intel XE#2291]) +7 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-dg2-set2: [PASS][30] -> [SKIP][31] ([Intel XE#309])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-466/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_dp_aux_dev:
- shard-bmg: [PASS][32] -> [SKIP][33] ([Intel XE#3009])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-4/igt@kms_dp_aux_dev.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@kms_dp_aux_dev.html
* igt@kms_flip@2x-blocking-wf_vblank@ab-hdmi-a6-dp4:
- shard-dg2-set2: [PASS][34] -> [FAIL][35] ([Intel XE#886]) +1 other test fail
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-436/igt@kms_flip@2x-blocking-wf_vblank@ab-hdmi-a6-dp4.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-466/igt@kms_flip@2x-blocking-wf_vblank@ab-hdmi-a6-dp4.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
- shard-bmg: [PASS][36] -> [SKIP][37] ([Intel XE#2316]) +4 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-5/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4:
- shard-dg2-set2: [PASS][38] -> [FAIL][39] ([Intel XE#301] / [Intel XE#3321])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-466/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-436/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3:
- shard-bmg: [PASS][40] -> [FAIL][41] ([Intel XE#3321]) +5 other tests fail
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4:
- shard-dg2-set2: [PASS][42] -> [FAIL][43] ([Intel XE#301]) +2 other tests fail
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-466/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-436/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@cd-hdmi-a6-dp4.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-dg2-set2: [PASS][44] -> [SKIP][45] ([Intel XE#310]) +3 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-466/igt@kms_flip@2x-nonexisting-fb.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@dpms-off-confusion-interruptible@c-dp4:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][46] ([Intel XE#2049])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-463/igt@kms_flip@dpms-off-confusion-interruptible@c-dp4.html
* igt@kms_flip@flip-vs-absolute-wf_vblank@c-hdmi-a3:
- shard-bmg: [PASS][47] -> [FAIL][48] ([Intel XE#2882]) +3 other tests fail
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-6/igt@kms_flip@flip-vs-absolute-wf_vblank@c-hdmi-a3.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@kms_flip@flip-vs-absolute-wf_vblank@c-hdmi-a3.html
* igt@kms_flip@flip-vs-expired-vblank@a-dp4:
- shard-dg2-set2: NOTRUN -> [FAIL][49] ([Intel XE#301] / [Intel XE#3321]) +2 other tests fail
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank@a-dp4.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6:
- shard-dg2-set2: NOTRUN -> [FAIL][50] ([Intel XE#301]) +3 other tests fail
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a6.html
* igt@kms_flip@flip-vs-expired-vblank@d-dp2:
- shard-bmg: NOTRUN -> [FAIL][51] ([Intel XE#3321]) +1 other test fail
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-7/igt@kms_flip@flip-vs-expired-vblank@d-dp2.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
- shard-lnl: [PASS][52] -> [FAIL][53] ([Intel XE#886]) +3 other tests fail
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-lnl-3/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-lnl-7/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@a-dp2:
- shard-bmg: NOTRUN -> [FAIL][54] ([Intel XE#2882]) +1 other test fail
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-5/igt@kms_flip@plain-flip-ts-check-interruptible@a-dp2.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling:
- shard-dg2-set2: [PASS][55] -> [DMESG-WARN][56] ([Intel XE#1033]) +11 other tests dmesg-warn
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-upscaling.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y:
- shard-adlp: [PASS][57] -> [DMESG-FAIL][58] ([Intel XE#1033])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-x-to-y.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt:
- shard-dg2-set2: [PASS][59] -> [SKIP][60] ([Intel XE#656])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-466/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [PASS][61] -> [SKIP][62] ([Intel XE#1503])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-7/igt@kms_hdr@invalid-hdr.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-1/igt@kms_hdr@invalid-hdr.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-dg2-set2: [PASS][63] -> [SKIP][64] ([Intel XE#836])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-434/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_properties@connector-properties-legacy:
- shard-bmg: [PASS][65] -> [DMESG-WARN][66] ([Intel XE#4172]) +15 other tests dmesg-warn
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-7/igt@kms_properties@connector-properties-legacy.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-1/igt@kms_properties@connector-properties-legacy.html
* igt@kms_rmfb@rmfb-ioctl:
- shard-adlp: [PASS][67] -> [DMESG-WARN][68] ([Intel XE#4173]) +2 other tests dmesg-warn
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-2/igt@kms_rmfb@rmfb-ioctl.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-2/igt@kms_rmfb@rmfb-ioctl.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate-race:
- shard-dg2-set2: [PASS][69] -> [SKIP][70] ([Intel XE#1392]) +1 other test skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-435/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate-race.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-432/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate-race.html
* igt@xe_live_ktest@xe_migrate:
- shard-bmg: [PASS][71] -> [SKIP][72] ([Intel XE#1192]) +1 other test skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-4/igt@xe_live_ktest@xe_migrate.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@xe_live_ktest@xe_migrate.html
* igt@xe_pm@s2idle-vm-bind-userptr:
- shard-dg2-set2: [PASS][73] -> [ABORT][74] ([Intel XE#1794])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@xe_pm@s2idle-vm-bind-userptr.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-432/igt@xe_pm@s2idle-vm-bind-userptr.html
#### Possible fixes ####
* igt@kms_async_flips@invalid-async-flip-atomic@pipe-c-hdmi-a-1:
- shard-adlp: [DMESG-WARN][75] ([Intel XE#1033]) -> [PASS][76] +1 other test pass
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-3/igt@kms_async_flips@invalid-async-flip-atomic@pipe-c-hdmi-a-1.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-8/igt@kms_async_flips@invalid-async-flip-atomic@pipe-c-hdmi-a-1.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: [DMESG-WARN][77] ([Intel XE#877]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
- shard-dg2-set2: [SKIP][79] ([Intel XE#2191]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-436/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [DMESG-WARN][81] -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_color@ctm-0-50@pipe-d-hdmi-a-6:
- shard-dg2-set2: [DMESG-WARN][83] ([Intel XE#1033]) -> [PASS][84] +11 other tests pass
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_color@ctm-0-50@pipe-d-hdmi-a-6.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_color@ctm-0-50@pipe-d-hdmi-a-6.html
* igt@kms_color@ctm-red-to-blue:
- shard-adlp: [DMESG-WARN][85] ([Intel XE#2953]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-6/igt@kms_color@ctm-red-to-blue.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-2/igt@kms_color@ctm-red-to-blue.html
* igt@kms_color@ctm-red-to-blue@pipe-a-hdmi-a-1:
- shard-adlp: [DMESG-WARN][87] ([Intel XE#4173]) -> [PASS][88] +1 other test pass
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-6/igt@kms_color@ctm-red-to-blue@pipe-a-hdmi-a-1.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-2/igt@kms_color@ctm-red-to-blue@pipe-a-hdmi-a-1.html
* igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
- shard-dg2-set2: [SKIP][89] ([Intel XE#309]) -> [PASS][90] +5 other tests pass
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-bmg: [SKIP][91] ([Intel XE#2291]) -> [PASS][92] +7 other tests pass
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_feature_discovery@display-2x:
- shard-bmg: [SKIP][93] ([Intel XE#2373]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-6/igt@kms_feature_discovery@display-2x.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-5/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ab-dp2-hdmi-a3:
- shard-bmg: [FAIL][95] ([Intel XE#3321]) -> [PASS][96] +1 other test pass
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank@ab-dp2-hdmi-a3.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank@ab-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-wf_vblank:
- shard-bmg: [FAIL][97] ([Intel XE#3098]) -> [PASS][98] +1 other test pass
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-5/igt@kms_flip@2x-flip-vs-wf_vblank.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-7/igt@kms_flip@2x-flip-vs-wf_vblank.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: [SKIP][99] ([Intel XE#2316]) -> [PASS][100] +5 other tests pass
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-1/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@dpms-off-confusion-interruptible@b-hdmi-a6:
- shard-dg2-set2: [INCOMPLETE][101] ([Intel XE#2049]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-463/igt@kms_flip@dpms-off-confusion-interruptible@b-hdmi-a6.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-463/igt@kms_flip@dpms-off-confusion-interruptible@b-hdmi-a6.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a6:
- shard-dg2-set2: [FAIL][103] ([Intel XE#301]) -> [PASS][104] +1 other test pass
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a6.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a6.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a1:
- shard-adlp: [FAIL][105] ([Intel XE#886]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-2/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a1.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-9/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a6:
- shard-dg2-set2: [FAIL][107] ([Intel XE#3098]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a6.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-hdmi-a6.html
* igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1:
- shard-adlp: [FAIL][109] ([Intel XE#2882]) -> [PASS][110] +2 other tests pass
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-9/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-6/igt@kms_flip@plain-flip-ts-check-interruptible@a-hdmi-a1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1:
- shard-lnl: [FAIL][111] ([Intel XE#886]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-lnl-2/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-lnl-4/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y:
- shard-adlp: [DMESG-FAIL][113] ([Intel XE#1033]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y:
- shard-adlp: [FAIL][115] ([Intel XE#1874]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt:
- shard-dg2-set2: [SKIP][117] ([Intel XE#656]) -> [PASS][118] +1 other test pass
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-bmg: [SKIP][119] ([Intel XE#3012]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-1/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1:
- shard-lnl: [FAIL][121] ([Intel XE#899]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-lnl-4/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-lnl-5/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
* igt@kms_vrr@negative-basic:
- shard-dg2-set2: [SKIP][123] ([Intel XE#455]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_vrr@negative-basic.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-436/igt@kms_vrr@negative-basic.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap:
- shard-dg2-set2: [SKIP][125] ([Intel XE#1392]) -> [PASS][126] +1 other test pass
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-433/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-mmap.html
* igt@xe_pm@s2idle-basic-exec:
- shard-bmg: [DMESG-WARN][127] ([Intel XE#4172]) -> [PASS][128] +29 other tests pass
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@xe_pm@s2idle-basic-exec.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@xe_pm@s2idle-basic-exec.html
#### Warnings ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [DMESG-WARN][129] -> [DMESG-WARN][130] ([Intel XE#4172])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-7/igt@kms_async_flips@alternate-sync-async-flip.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-4/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-adlp: [DMESG-WARN][131] ([Intel XE#1033]) -> [DMESG-WARN][132] ([Intel XE#1033] / [Intel XE#4173])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-adlp-2/igt@kms_async_flips@async-flip-suspend-resume.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-adlp-2/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-6:
- shard-dg2-set2: [SKIP][133] ([Intel XE#787]) -> [SKIP][134] ([Intel XE#455] / [Intel XE#787]) +4 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-466/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-6.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-6.html
* igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-6:
- shard-dg2-set2: [SKIP][135] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][136] ([Intel XE#787]) +8 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-6.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-436/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-d-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [DMESG-WARN][137] ([Intel XE#1033]) -> [INCOMPLETE][138] ([Intel XE#2705] / [Intel XE#4010])
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [DMESG-WARN][139] ([Intel XE#1033]) -> [INCOMPLETE][140] ([Intel XE#1727] / [Intel XE#4010])
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2-set2: [FAIL][141] -> [SKIP][142] ([Intel XE#314])
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_cdclk@mode-transition-all-outputs.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-436/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_content_protection@atomic-dpms:
- shard-bmg: [DMESG-FAIL][143] ([Intel XE#4172]) -> [SKIP][144] ([Intel XE#2341])
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@kms_content_protection@atomic-dpms.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2-set2: [SKIP][145] ([Intel XE#455]) -> [DMESG-FAIL][146] ([Intel XE#1033])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_content_protection@lic-type-0.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_content_protection@lic-type-0.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-bmg: [SKIP][147] ([Intel XE#2291]) -> [DMESG-WARN][148] ([Intel XE#877])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
- shard-bmg: [DMESG-WARN][149] ([Intel XE#877]) -> [SKIP][150] ([Intel XE#2291])
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-bmg: [DMESG-WARN][151] ([Intel XE#4172]) -> [SKIP][152] ([Intel XE#2291])
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
- shard-dg2-set2: [SKIP][153] ([Intel XE#309]) -> [DMESG-WARN][154] ([Intel XE#1033])
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
* igt@kms_flip@2x-absolute-wf_vblank-interruptible:
- shard-bmg: [DMESG-WARN][155] ([Intel XE#4172]) -> [SKIP][156] ([Intel XE#2316])
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-bmg: [SKIP][157] ([Intel XE#2316]) -> [FAIL][158] ([Intel XE#2882])
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-4/igt@kms_flip@2x-blocking-wf_vblank.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-5/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@2x-flip-vs-modeset-vs-hang:
- shard-dg2-set2: [DMESG-WARN][159] ([Intel XE#1033]) -> [SKIP][160] ([Intel XE#310])
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-434/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible:
- shard-bmg: [DMESG-WARN][161] ([Intel XE#2955]) -> [SKIP][162] ([Intel XE#2316])
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a6:
- shard-dg2-set2: [DMESG-FAIL][163] ([Intel XE#1033]) -> [FAIL][164] ([Intel XE#301])
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a6.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_flip@flip-vs-expired-vblank-interruptible@d-hdmi-a6.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-dg2-set2: [DMESG-FAIL][165] ([Intel XE#1033]) -> [DMESG-WARN][166] ([Intel XE#1033])
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
- shard-bmg: [SKIP][167] ([Intel XE#2312]) -> [SKIP][168] ([Intel XE#2311]) +24 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][169] ([Intel XE#2311]) -> [SKIP][170] ([Intel XE#2312]) +21 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
- shard-dg2-set2: [SKIP][171] ([Intel XE#651]) -> [SKIP][172] ([Intel XE#656]) +5 other tests skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt:
- shard-dg2-set2: [SKIP][173] ([Intel XE#656]) -> [DMESG-WARN][174] ([Intel XE#1033])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: [SKIP][175] ([Intel XE#4141]) -> [SKIP][176] ([Intel XE#2312]) +10 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][177] ([Intel XE#2312]) -> [SKIP][178] ([Intel XE#4141]) +8 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt:
- shard-dg2-set2: [SKIP][179] ([Intel XE#656]) -> [SKIP][180] ([Intel XE#651]) +9 other tests skip
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-dg2-set2: [SKIP][181] ([Intel XE#656]) -> [SKIP][182] ([Intel XE#653]) +8 other tests skip
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-wc.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
- shard-dg2-set2: [SKIP][183] ([Intel XE#653]) -> [SKIP][184] ([Intel XE#656]) +5 other tests skip
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: [SKIP][185] ([Intel XE#2312]) -> [SKIP][186] ([Intel XE#2313]) +20 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][187] ([Intel XE#2313]) -> [SKIP][188] ([Intel XE#2312]) +23 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][189] ([Intel XE#3544]) -> [SKIP][190] ([Intel XE#3374] / [Intel XE#3544])
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [DMESG-FAIL][191] ([Intel XE#4172]) -> [SKIP][192] ([Intel XE#2426])
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern.html
* igt@xe_pm@s3-basic:
- shard-dg2-set2: [DMESG-WARN][193] ([Intel XE#1033] / [Intel XE#569]) -> [ABORT][194] ([Intel XE#1033] / [Intel XE#1794])
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-435/igt@xe_pm@s3-basic.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-432/igt@xe_pm@s3-basic.html
* igt@xe_pm@s4-mocs:
- shard-bmg: [ABORT][195] ([Intel XE#4172] / [Intel XE#4268]) -> [ABORT][196] ([Intel XE#4268])
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-bmg-1/igt@xe_pm@s4-mocs.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-bmg-7/igt@xe_pm@s4-mocs.html
- shard-dg2-set2: [ABORT][197] ([Intel XE#4268]) -> [ABORT][198] ([Intel XE#4054] / [Intel XE#4268])
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2650-99733311410a5518dda4fd7bab11266f318a9453/shard-dg2-433/igt@xe_pm@s4-mocs.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/shard-dg2-463/igt@xe_pm@s4-mocs.html
[Intel XE#1033]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1033
[Intel XE#1152]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1152
[Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#2955]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2955
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/314
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#4010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4010
[Intel XE#4054]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4054
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4172]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4172
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4268]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4268
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899
Build changes
-------------
* Linux: xe-2650-99733311410a5518dda4fd7bab11266f318a9453 -> xe-pw-144749v1
IGT_8228: 8228
xe-2650-99733311410a5518dda4fd7bab11266f318a9453: 99733311410a5518dda4fd7bab11266f318a9453
xe-pw-144749v1: 144749v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-144749v1/index.html
[-- Attachment #2: Type: text/html, Size: 60680 bytes --]
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH 00/14] drm/i915/display: conversions to struct intel_display
2025-02-12 17:17 ` [PATCH 00/14] drm/i915/display: conversions " Ville Syrjälä
@ 2025-02-13 8:27 ` Jani Nikula
0 siblings, 0 replies; 39+ messages in thread
From: Jani Nikula @ 2025-02-13 8:27 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, intel-xe
On Wed, 12 Feb 2025, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Wed, Feb 12, 2025 at 06:36:29PM +0200, Jani Nikula wrote:
>> Convert a bunch of files and functions to struct intel display.
>>
>> The approach is to mostly convert a file, then see what the stragglers
>> are, convert those too, and repeat.
>>
>> The PCH checks are starting to become a big straggler for further
>> conversions.
>
> Aye. I wonder if we should in fact change all the HAS_PCH_FOO()
> stuff to some kind of "south display type" thing. The current
> situation is a bit of a mess due to:
> - DG1/2 declare some kind of fake PCH type
> - BXT/GLK don't declare one and yet we still use many
> PCH/south display registers
I'm also thinking most or all of the PCH checks outside of display
should be removed.
> Anyways, series is
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Thanks, pushed to din!
>
>>
>> BR,
>> Jani.
>>
>> Jani Nikula (14):
>> drm/i915/dp: convert g4x_dp.[ch] to struct intel display
>> drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display
>> drm/i915/ips: convert hsw_ips.c to struct intel_display
>> drm/i915/display: convert assert_transcoder*() to struct intel_display
>> drm/i915/display: convert assert_port_valid() to struct intel_display
>> drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default()
>> drm/i915/display: convert
>> intel_set_{cpu,pch}_fifo_underrun_reporting() to intel_display
>> drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display
>> drm/i915/display: convert intel_cpu_transcoder_mode_valid() to
>> intel_display
>> drm/i915/display: convert intel_mode_valid_max_plane_size() to
>> intel_display
>> drm/i915/dsi: convert platform checks to display->platform.<platform>
>> style
>> drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct
>> intel_display
>> drm/i915/display: convert intel_fifo_underrun.[ch] to struct
>> intel_display
>> drm/i915/display: convert i915_pipestat_enable_mask() to struct
>> intel_display
>>
>> drivers/gpu/drm/i915/display/g4x_dp.c | 99 +++---
>> drivers/gpu/drm/i915/display/g4x_dp.h | 14 +-
>> drivers/gpu/drm/i915/display/g4x_hdmi.c | 154 +++++----
>> drivers/gpu/drm/i915/display/g4x_hdmi.h | 6 +-
>> drivers/gpu/drm/i915/display/hsw_ips.c | 26 +-
>> drivers/gpu/drm/i915/display/icl_dsi.c | 21 +-
>> .../gpu/drm/i915/display/intel_combo_phy.c | 180 ++++++-----
>> .../gpu/drm/i915/display/intel_combo_phy.h | 8 +-
>> drivers/gpu/drm/i915/display/intel_crt.c | 21 +-
>> drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
>> drivers/gpu/drm/i915/display/intel_ddi.c | 11 +-
>> drivers/gpu/drm/i915/display/intel_display.c | 155 ++++-----
>> drivers/gpu/drm/i915/display/intel_display.h | 10 +-
>> .../gpu/drm/i915/display/intel_display_irq.c | 37 +--
>> .../gpu/drm/i915/display/intel_display_irq.h | 5 +-
>> .../drm/i915/display/intel_display_power.c | 5 +-
>> .../i915/display/intel_display_power_well.c | 3 +-
>> drivers/gpu/drm/i915/display/intel_dp.c | 5 +-
>> drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +-
>> drivers/gpu/drm/i915/display/intel_dpll.c | 30 +-
>> drivers/gpu/drm/i915/display/intel_dsi.c | 8 +-
>> drivers/gpu/drm/i915/display/intel_dvo.c | 8 +-
>> drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
>> .../drm/i915/display/intel_fifo_underrun.c | 181 ++++++-----
>> .../drm/i915/display/intel_fifo_underrun.h | 18 +-
>> drivers/gpu/drm/i915/display/intel_hdmi.c | 5 +-
>> drivers/gpu/drm/i915/display/intel_hotplug.c | 4 +-
>> drivers/gpu/drm/i915/display/intel_hotplug.h | 3 +-
>> drivers/gpu/drm/i915/display/intel_lvds.c | 6 +-
>> .../drm/i915/display/intel_modeset_setup.c | 6 +-
>> .../gpu/drm/i915/display/intel_pch_display.c | 4 +-
>> drivers/gpu/drm/i915/display/intel_pps.c | 11 +-
>> drivers/gpu/drm/i915/display/intel_sdvo.c | 293 +++++++++---------
>> drivers/gpu/drm/i915/display/intel_sdvo.h | 10 +-
>> drivers/gpu/drm/i915/display/intel_tv.c | 6 +-
>> drivers/gpu/drm/i915/display/vlv_dsi.c | 8 +-
>> 36 files changed, 671 insertions(+), 700 deletions(-)
>>
>> --
>> 2.39.5
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel display
2025-02-12 16:36 ` [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel display Jani Nikula
@ 2025-02-13 8:48 ` Kandpal, Suraj
2025-02-13 9:13 ` Jani Nikula
0 siblings, 1 reply; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 8:48 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel
> display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert as much as possible of g4x_dp.[ch] to struct intel_display.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 80 +++++++++----------
> drivers/gpu/drm/i915/display/g4x_dp.h | 14 ++--
> drivers/gpu/drm/i915/display/intel_display.c | 20 ++---
> .../gpu/drm/i915/display/intel_pch_display.c | 2 +-
> drivers/gpu/drm/i915/display/intel_pps.c | 11 ++-
> 5 files changed, 61 insertions(+), 66 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index d3b5ead188ba..cfc796607a78 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -51,28 +51,29 @@ static const struct dpll chv_dpll[] = {
> { .dot = 270000, .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 /*
> 27.0 */ }, };
>
> -const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
> +const struct dpll *vlv_get_dpll(struct intel_display *display)
> {
> - return IS_CHERRYVIEW(i915) ? &chv_dpll[0] : &vlv_dpll[0];
> + return display->platform.cherryview ? &chv_dpll[0] : &vlv_dpll[0];
> }
>
> static void g4x_dp_set_clock(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config) {
> + struct intel_display *display = to_intel_display(encoder);
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> const struct dpll *divisor = NULL;
> int i, count = 0;
>
> - if (IS_G4X(dev_priv)) {
> + if (display->platform.g4x) {
> divisor = g4x_dpll;
> count = ARRAY_SIZE(g4x_dpll);
> } else if (HAS_PCH_SPLIT(dev_priv)) {
> divisor = pch_dpll;
> count = ARRAY_SIZE(pch_dpll);
> - } else if (IS_CHERRYVIEW(dev_priv)) {
> + } else if (display->platform.cherryview) {
> divisor = chv_dpll;
> count = ARRAY_SIZE(chv_dpll);
> - } else if (IS_VALLEYVIEW(dev_priv)) {
> + } else if (display->platform.valleyview) {
> divisor = vlv_dpll;
> count = ARRAY_SIZE(vlv_dpll);
> }
> @@ -129,7 +130,7 @@ static void intel_dp_prepare(struct intel_encoder
> *encoder,
>
> /* Split out the IBX/CPU vs CPT settings */
>
> - if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) {
> + if (display->platform.ivybridge && port == PORT_A) {
> if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
> intel_dp->DP |= DP_SYNC_HS_HIGH;
> if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) @@
> -148,7 +149,7 @@ static void intel_dp_prepare(struct intel_encoder
> *encoder,
> pipe_config->enhanced_framing ?
> TRANS_DP_ENH_FRAMING : 0);
> } else {
> - if (IS_G4X(dev_priv) && pipe_config->limited_color_range)
> + if (display->platform.g4x && pipe_config-
> >limited_color_range)
> intel_dp->DP |= DP_COLOR_RANGE_16_235;
>
> if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) @@
> -160,7 +161,7 @@ static void intel_dp_prepare(struct intel_encoder
> *encoder,
> if (pipe_config->enhanced_framing)
> intel_dp->DP |= DP_ENHANCED_FRAMING;
>
> - if (IS_CHERRYVIEW(dev_priv))
> + if (display->platform.cherryview)
> intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe);
> else
> intel_dp->DP |= DP_PIPE_SEL(crtc->pipe); @@ -180,9
> +181,8 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool state)
> } #define assert_dp_port_disabled(d) assert_dp_port((d), false)
>
> -static void assert_edp_pll(struct drm_i915_private *dev_priv, bool state)
> +static void assert_edp_pll(struct intel_display *display, bool state)
> {
> - struct intel_display *display = &dev_priv->display;
> bool cur_state = intel_de_read(display, DP_A) & DP_PLL_ENABLE;
>
> INTEL_DISPLAY_STATE_WARN(display, cur_state != state, @@ -201,7
> +201,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
>
> assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
> assert_dp_port_disabled(intel_dp);
> - assert_edp_pll_disabled(dev_priv);
> + assert_edp_pll_disabled(display);
>
> drm_dbg_kms(display->drm, "enabling eDP PLL for clock %d\n",
> pipe_config->port_clock);
> @@ -223,7 +223,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
> * 1. Wait for the start of vertical blank on the enabled pipe going to
> FDI
> * 2. Program DP PLL enable
> */
> - if (IS_IRONLAKE(dev_priv))
> + if (display->platform.ironlake)
> intel_wait_for_vblank_if_active(display, !crtc->pipe);
>
> intel_dp->DP |= DP_PLL_ENABLE;
> @@ -242,7 +242,7 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
>
> assert_transcoder_disabled(dev_priv, old_crtc_state-
> >cpu_transcoder);
> assert_dp_port_disabled(intel_dp);
> - assert_edp_pll_enabled(dev_priv);
> + assert_edp_pll_enabled(display);
>
> drm_dbg_kms(display->drm, "disabling eDP PLL\n");
>
> @@ -253,10 +253,9 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
> udelay(200);
> }
>
> -static bool cpt_dp_port_selected(struct drm_i915_private *dev_priv,
> +static bool cpt_dp_port_selected(struct intel_display *display,
> enum port port, enum pipe *pipe)
> {
> - struct intel_display *display = &dev_priv->display;
> enum pipe p;
>
> for_each_pipe(display, p) {
> @@ -277,11 +276,11 @@ static bool cpt_dp_port_selected(struct
> drm_i915_private *dev_priv,
> return false;
> }
>
> -bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
> +bool g4x_dp_port_enabled(struct intel_display *display,
> i915_reg_t dp_reg, enum port port,
> enum pipe *pipe)
> {
> - struct intel_display *display = &dev_priv->display;
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> bool ret;
> u32 val;
>
> @@ -290,11 +289,11 @@ bool g4x_dp_port_enabled(struct
> drm_i915_private *dev_priv,
> ret = val & DP_PORT_EN;
>
> /* asserts want to know the pipe even if the port is disabled */
> - if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
> + if (display->platform.ivybridge && port == PORT_A)
> *pipe = (val & DP_PIPE_SEL_MASK_IVB) >>
> DP_PIPE_SEL_SHIFT_IVB;
> else if (HAS_PCH_CPT(dev_priv) && port != PORT_A)
> - ret &= cpt_dp_port_selected(dev_priv, port, pipe);
> - else if (IS_CHERRYVIEW(dev_priv))
> + ret &= cpt_dp_port_selected(display, port, pipe);
> + else if (display->platform.cherryview)
> *pipe = (val & DP_PIPE_SEL_MASK_CHV) >>
> DP_PIPE_SEL_SHIFT_CHV;
> else
> *pipe = (val & DP_PIPE_SEL_MASK) >> DP_PIPE_SEL_SHIFT;
> @@ -306,7 +305,6 @@ static bool intel_dp_get_hw_state(struct
> intel_encoder *encoder,
> enum pipe *pipe)
> {
> struct intel_display *display = to_intel_display(encoder);
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> intel_wakeref_t wakeref;
> bool ret;
> @@ -316,7 +314,7 @@ static bool intel_dp_get_hw_state(struct
> intel_encoder *encoder,
> if (!wakeref)
> return false;
>
> - ret = g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
> + ret = g4x_dp_port_enabled(display, intel_dp->output_reg,
> encoder->port, pipe);
>
> intel_display_power_put(display, encoder->power_domain,
> wakeref); @@ -391,7 +389,7 @@ static void intel_dp_get_config(struct
> intel_encoder *encoder,
>
> pipe_config->hw.adjusted_mode.flags |= flags;
>
> - if (IS_G4X(dev_priv) && tmp & DP_COLOR_RANGE_16_235)
> + if (display->platform.g4x && tmp & DP_COLOR_RANGE_16_235)
> pipe_config->limited_color_range = true;
>
> pipe_config->lane_count =
> @@ -433,7 +431,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
>
> drm_dbg_kms(display->drm, "\n");
>
> - if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
> + if ((display->platform.ivybridge && port == PORT_A) ||
> (HAS_PCH_CPT(dev_priv) && port != PORT_A)) {
> intel_dp->DP &= ~DP_LINK_TRAIN_MASK_CPT;
> intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE_CPT; @@ -479,7
> +477,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
>
> msleep(intel_dp->pps.panel_power_down_delay);
>
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> + if (display->platform.valleyview || display->platform.cherryview)
> vlv_pps_port_disable(encoder, old_crtc_state); }
>
> @@ -682,7 +680,6 @@ static void intel_enable_dp(struct intel_atomic_state
> *state,
> const struct drm_connector_state *conn_state) {
> struct intel_display *display = to_intel_display(state);
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> u32 dp_reg = intel_de_read(display, intel_dp->output_reg);
> intel_wakeref_t wakeref;
> @@ -691,7 +688,7 @@ static void intel_enable_dp(struct intel_atomic_state
> *state,
> return;
>
> with_intel_pps_lock(intel_dp, wakeref) {
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> + if (display->platform.valleyview || display-
> >platform.cherryview)
> vlv_pps_port_enable_unlocked(encoder,
> pipe_config);
>
> intel_dp_enable_port(intel_dp, pipe_config); @@ -701,10
> +698,10 @@ static void intel_enable_dp(struct intel_atomic_state *state,
> intel_pps_vdd_off_unlocked(intel_dp, true);
> }
>
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> + if (display->platform.valleyview || display->platform.cherryview) {
> unsigned int lane_mask = 0x0;
>
> - if (IS_CHERRYVIEW(dev_priv))
> + if (display->platform.cherryview)
> lane_mask =
> intel_dp_unused_lane_mask(pipe_config->lane_count);
>
> vlv_wait_port_ready(display, dp_to_dig_port(intel_dp),
> lane_mask); @@ -1264,7 +1261,6 @@ static void
> intel_dp_encoder_destroy(struct drm_encoder *encoder) static void
> intel_dp_encoder_reset(struct drm_encoder *encoder) {
> struct intel_display *display = to_intel_display(encoder->dev);
> - struct drm_i915_private *dev_priv = to_i915(encoder->dev);
I know this hasn't changed in this patch and is already there merged in code but a good chance to
Do to_intel_display(encoder) instead of encoder->dev
Otherwise
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> struct intel_dp *intel_dp =
> enc_to_intel_dp(to_intel_encoder(encoder));
>
> intel_dp->DP = intel_de_read(display, intel_dp->output_reg); @@ -
> 1272,7 +1268,7 @@ static void intel_dp_encoder_reset(struct drm_encoder
> *encoder)
> intel_dp->reset_link_params = true;
> intel_dp_invalidate_source_oui(intel_dp);
>
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> + if (display->platform.valleyview || display->platform.cherryview)
> vlv_pps_pipe_reset(intel_dp);
>
> intel_pps_encoder_reset(intel_dp);
> @@ -1283,10 +1279,10 @@ static const struct drm_encoder_funcs
> intel_dp_enc_funcs = {
> .destroy = intel_dp_encoder_destroy,
> };
>
> -bool g4x_dp_init(struct drm_i915_private *dev_priv,
> +bool g4x_dp_init(struct intel_display *display,
> i915_reg_t output_reg, enum port port) {
> - struct intel_display *display = &dev_priv->display;
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> const struct intel_bios_encoder_data *devdata;
> struct intel_digital_port *dig_port;
> struct intel_encoder *intel_encoder;
> @@ -1337,14 +1333,14 @@ bool g4x_dp_init(struct drm_i915_private
> *dev_priv,
> intel_encoder->suspend = intel_dp_encoder_suspend;
> intel_encoder->suspend_complete = g4x_dp_suspend_complete;
> intel_encoder->shutdown = intel_dp_encoder_shutdown;
> - if (IS_CHERRYVIEW(dev_priv)) {
> + if (display->platform.cherryview) {
> intel_encoder->pre_pll_enable = chv_dp_pre_pll_enable;
> intel_encoder->pre_enable = chv_pre_enable_dp;
> intel_encoder->enable = vlv_enable_dp;
> intel_encoder->disable = vlv_disable_dp;
> intel_encoder->post_disable = chv_post_disable_dp;
> intel_encoder->post_pll_disable = chv_dp_post_pll_disable;
> - } else if (IS_VALLEYVIEW(dev_priv)) {
> + } else if (display->platform.valleyview) {
> intel_encoder->pre_pll_enable = vlv_dp_pre_pll_enable;
> intel_encoder->pre_enable = vlv_pre_enable_dp;
> intel_encoder->enable = vlv_enable_dp; @@ -1359,24
> +1355,24 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
> intel_encoder->audio_enable = g4x_dp_audio_enable;
> intel_encoder->audio_disable = g4x_dp_audio_disable;
>
> - if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
> + if ((display->platform.ivybridge && port == PORT_A) ||
> (HAS_PCH_CPT(dev_priv) && port != PORT_A))
> dig_port->dp.set_link_train = cpt_set_link_train;
> else
> dig_port->dp.set_link_train = g4x_set_link_train;
>
> - if (IS_CHERRYVIEW(dev_priv))
> + if (display->platform.cherryview)
> intel_encoder->set_signal_levels = chv_set_signal_levels;
> - else if (IS_VALLEYVIEW(dev_priv))
> + else if (display->platform.valleyview)
> intel_encoder->set_signal_levels = vlv_set_signal_levels;
> - else if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
> + else if (display->platform.ivybridge && port == PORT_A)
> intel_encoder->set_signal_levels =
> ivb_cpu_edp_set_signal_levels;
> - else if (IS_SANDYBRIDGE(dev_priv) && port == PORT_A)
> + else if (display->platform.sandybridge && port == PORT_A)
> intel_encoder->set_signal_levels =
> snb_cpu_edp_set_signal_levels;
> else
> intel_encoder->set_signal_levels = g4x_set_signal_levels;
>
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv) ||
> + if (display->platform.valleyview || display->platform.cherryview ||
> (HAS_PCH_SPLIT(dev_priv) && port != PORT_A)) {
> dig_port->dp.preemph_max = intel_dp_preemph_max_3;
> dig_port->dp.voltage_max = intel_dp_voltage_max_3; @@ -
> 1390,7 +1386,7 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
>
> intel_encoder->type = INTEL_OUTPUT_DP;
> intel_encoder->power_domain =
> intel_display_power_ddi_lanes_domain(display, port);
> - if (IS_CHERRYVIEW(dev_priv)) {
> + if (display->platform.cherryview) {
> if (port == PORT_D)
> intel_encoder->pipe_mask = BIT(PIPE_C);
> else
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.h
> b/drivers/gpu/drm/i915/display/g4x_dp.h
> index 839a251dc069..0b28951b8365 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.h
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.h
> @@ -12,30 +12,30 @@
>
> enum pipe;
> enum port;
> -struct drm_i915_private;
> struct intel_crtc_state;
> +struct intel_display;
> struct intel_dp;
> struct intel_encoder;
>
> #ifdef I915
> -const struct dpll *vlv_get_dpll(struct drm_i915_private *i915); -bool
> g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
> +const struct dpll *vlv_get_dpll(struct intel_display *display); bool
> +g4x_dp_port_enabled(struct intel_display *display,
> i915_reg_t dp_reg, enum port port,
> enum pipe *pipe);
> -bool g4x_dp_init(struct drm_i915_private *dev_priv,
> +bool g4x_dp_init(struct intel_display *display,
> i915_reg_t output_reg, enum port port); #else -static inline
> const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
> +static inline const struct dpll *vlv_get_dpll(struct intel_display
> +*display)
> {
> return NULL;
> }
> -static inline bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
> +static inline bool g4x_dp_port_enabled(struct intel_display *display,
> i915_reg_t dp_reg, int port,
> enum pipe *pipe)
> {
> return false;
> }
> -static inline bool g4x_dp_init(struct drm_i915_private *dev_priv,
> +static inline bool g4x_dp_init(struct intel_display *display,
> i915_reg_t output_reg, int port) {
> return false;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 6c1e7441313e..e5ceedf56335 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8229,7 +8229,7 @@ void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
> dpd_is_edp = intel_dp_is_port_edp(display, PORT_D);
>
> if (ilk_has_edp_a(dev_priv))
> - g4x_dp_init(dev_priv, DP_A, PORT_A);
> + g4x_dp_init(display, DP_A, PORT_A);
>
> if (intel_de_read(dev_priv, PCH_HDMIB) & SDVO_DETECTED)
> {
> /* PCH SDVOB multiplex with HDMIB */ @@ -8237,7
> +8237,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
> if (!found)
> g4x_hdmi_init(dev_priv, PCH_HDMIB,
> PORT_B);
> if (!found && (intel_de_read(dev_priv, PCH_DP_B) &
> DP_DETECTED))
> - g4x_dp_init(dev_priv, PCH_DP_B, PORT_B);
> + g4x_dp_init(display, PCH_DP_B, PORT_B);
> }
>
> if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED)
> @@ -8247,10 +8247,10 @@ void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
> g4x_hdmi_init(dev_priv, PCH_HDMID, PORT_D);
>
> if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED)
> - g4x_dp_init(dev_priv, PCH_DP_C, PORT_C);
> + g4x_dp_init(display, PCH_DP_C, PORT_C);
>
> if (intel_de_read(dev_priv, PCH_DP_D) & DP_DETECTED)
> - g4x_dp_init(dev_priv, PCH_DP_D, PORT_D);
> + g4x_dp_init(display, PCH_DP_D, PORT_D);
> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> bool has_edp, has_port;
>
> @@ -8275,14 +8275,14 @@ void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
> has_edp = intel_dp_is_port_edp(display, PORT_B);
> has_port = intel_bios_is_port_present(display, PORT_B);
> if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED ||
> has_port)
> - has_edp &= g4x_dp_init(dev_priv, VLV_DP_B,
> PORT_B);
> + has_edp &= g4x_dp_init(display, VLV_DP_B,
> PORT_B);
> if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED
> || has_port) && !has_edp)
> g4x_hdmi_init(dev_priv, VLV_HDMIB, PORT_B);
>
> has_edp = intel_dp_is_port_edp(display, PORT_C);
> has_port = intel_bios_is_port_present(display, PORT_C);
> if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED ||
> has_port)
> - has_edp &= g4x_dp_init(dev_priv, VLV_DP_C,
> PORT_C);
> + has_edp &= g4x_dp_init(display, VLV_DP_C,
> PORT_C);
> if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED
> || has_port) && !has_edp)
> g4x_hdmi_init(dev_priv, VLV_HDMIC, PORT_C);
>
> @@ -8293,7 +8293,7 @@ void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
> */
> has_port = intel_bios_is_port_present(display,
> PORT_D);
> if (intel_de_read(dev_priv, CHV_DP_D) &
> DP_DETECTED || has_port)
> - g4x_dp_init(dev_priv, CHV_DP_D, PORT_D);
> + g4x_dp_init(display, CHV_DP_D, PORT_D);
> if (intel_de_read(dev_priv, CHV_HDMID) &
> SDVO_DETECTED || has_port)
> g4x_hdmi_init(dev_priv, CHV_HDMID,
> PORT_D);
> }
> @@ -8320,7 +8320,7 @@ void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
> }
>
> if (!found && IS_G4X(dev_priv))
> - g4x_dp_init(dev_priv, DP_B, PORT_B);
> + g4x_dp_init(display, DP_B, PORT_B);
> }
>
> /* Before G4X SDVOC doesn't have its own detect register */
> @@ -8338,11 +8338,11 @@ void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
> g4x_hdmi_init(dev_priv, GEN4_HDMIC,
> PORT_C);
> }
> if (IS_G4X(dev_priv))
> - g4x_dp_init(dev_priv, DP_C, PORT_C);
> + g4x_dp_init(display, DP_C, PORT_C);
> }
>
> if (IS_G4X(dev_priv) && (intel_de_read(dev_priv, DP_D) &
> DP_DETECTED))
> - g4x_dp_init(dev_priv, DP_D, PORT_D);
> + g4x_dp_init(display, DP_D, PORT_D);
>
> if (SUPPORTS_TV(dev_priv))
> intel_tv_init(display);
> diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c
> b/drivers/gpu/drm/i915/display/intel_pch_display.c
> index 75ff5592312f..98a6b57ac956 100644
> --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
> @@ -45,7 +45,7 @@ static void assert_pch_dp_disabled(struct
> drm_i915_private *dev_priv,
> enum pipe port_pipe;
> bool state;
>
> - state = g4x_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe);
> + state = g4x_dp_port_enabled(display, dp_reg, port, &port_pipe);
>
> INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe,
> "PCH DP %c enabled on transcoder %c,
> should be disabled\n", diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
> b/drivers/gpu/drm/i915/display/intel_pps.c
> index ef6effaf82e0..617ce4993172 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -134,7 +134,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
> release_cl_override = display->platform.cherryview &&
> !chv_phy_powergate_ch(display, phy, ch, true);
>
> - if (vlv_force_pll_on(dev_priv, pipe, vlv_get_dpll(dev_priv))) {
> + if (vlv_force_pll_on(dev_priv, pipe, vlv_get_dpll(display))) {
> drm_err(display->drm,
> "Failed to force on PLL for pipe %c!\n",
> pipe_name(pipe));
> @@ -1225,11 +1225,10 @@ static void vlv_steal_power_sequencer(struct
> intel_display *display, static enum pipe vlv_active_pipe(struct intel_dp
> *intel_dp) {
> struct intel_display *display = to_intel_display(intel_dp);
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> enum pipe pipe;
>
> - if (g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
> + if (g4x_dp_port_enabled(display, intel_dp->output_reg,
> encoder->port, &pipe))
> return pipe;
>
> @@ -1859,13 +1858,13 @@ void assert_pps_unlocked(struct intel_display
> *display, enum pipe pipe)
> intel_lvds_port_enabled(dev_priv, PCH_LVDS,
> &panel_pipe);
> break;
> case PANEL_PORT_SELECT_DPA:
> - g4x_dp_port_enabled(dev_priv, DP_A, PORT_A,
> &panel_pipe);
> + g4x_dp_port_enabled(display, DP_A, PORT_A,
> &panel_pipe);
> break;
> case PANEL_PORT_SELECT_DPC:
> - g4x_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C,
> &panel_pipe);
> + g4x_dp_port_enabled(display, PCH_DP_C, PORT_C,
> &panel_pipe);
> break;
> case PANEL_PORT_SELECT_DPD:
> - g4x_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D,
> &panel_pipe);
> + g4x_dp_port_enabled(display, PCH_DP_D, PORT_D,
> &panel_pipe);
> break;
> default:
> MISSING_CASE(port_sel);
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 02/14] drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display
2025-02-12 16:36 ` [PATCH 02/14] drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display Jani Nikula
@ 2025-02-13 8:55 ` Kandpal, Suraj
2025-02-13 9:15 ` Jani Nikula
0 siblings, 1 reply; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 8:55 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 02/14] drm/i915/hdmi: convert g4x_hdmi.[ch] to struct
> intel_display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert as much as possible of g4x_hdmi.[ch] to struct intel_display.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 139 +++++++++----------
> drivers/gpu/drm/i915/display/g4x_hdmi.h | 6 +-
> drivers/gpu/drm/i915/display/intel_display.c | 16 +--
> 3 files changed, 79 insertions(+), 82 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 9e1ca7767392..6670cf101b9a 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -27,8 +27,8 @@
> static void intel_hdmi_prepare(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state) {
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct intel_display *display = to_intel_display(encoder);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
Nit: If we are changing having a change here why not rename it to i915 too.
It's going to be useless in future since we want to remove drm_i915_private
Usage altogether but in the meantime why not follow the i915 naming convention.
Otherwise LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> const struct drm_display_mode *adjusted_mode = &crtc_state-
> >hw.adjusted_mode; @@ -54,13 +54,13 @@ static void
> intel_hdmi_prepare(struct intel_encoder *encoder,
>
> if (HAS_PCH_CPT(dev_priv))
> hdmi_val |= SDVO_PIPE_SEL_CPT(crtc->pipe);
> - else if (IS_CHERRYVIEW(dev_priv))
> + else if (display->platform.cherryview)
> hdmi_val |= SDVO_PIPE_SEL_CHV(crtc->pipe);
> else
> hdmi_val |= SDVO_PIPE_SEL(crtc->pipe);
>
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, hdmi_val);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, hdmi_val);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
> }
>
> static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder, @@ -
> 132,6 +132,7 @@ static int g4x_hdmi_compute_config(struct intel_encoder
> *encoder,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state *conn_state) {
> + struct intel_display *display = to_intel_display(encoder);
> struct intel_atomic_state *state = to_intel_atomic_state(crtc_state-
> >uapi.state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *i915 = to_i915(encoder->base.dev); @@ -
> 142,7 +143,7 @@ static int g4x_hdmi_compute_config(struct intel_encoder
> *encoder,
> return -EINVAL;
> }
>
> - if (IS_G4X(i915))
> + if (display->platform.g4x)
> crtc_state->has_hdmi_sink =
> g4x_compute_has_hdmi_sink(state, crtc);
> else
> crtc_state->has_hdmi_sink =
> @@ -154,15 +155,15 @@ static int g4x_hdmi_compute_config(struct
> intel_encoder *encoder, static void intel_hdmi_get_config(struct
> intel_encoder *encoder,
> struct intel_crtc_state *pipe_config) {
> + struct intel_display *display = to_intel_display(encoder);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> u32 tmp, flags = 0;
> int dotclock;
>
> pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI);
>
> - tmp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
> + tmp = intel_de_read(display, intel_hdmi->hdmi_reg);
>
> if (tmp & SDVO_HSYNC_ACTIVE_HIGH)
> flags |= DRM_MODE_FLAG_PHSYNC;
> @@ -222,33 +223,32 @@ static void intel_hdmi_get_config(struct
> intel_encoder *encoder, static void g4x_hdmi_enable_port(struct
> intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config) {
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct intel_display *display = to_intel_display(encoder);
> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> u32 temp;
>
> - temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
> + temp = intel_de_read(display, intel_hdmi->hdmi_reg);
>
> temp |= SDVO_ENABLE;
>
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
> }
>
> static void g4x_hdmi_audio_enable(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state) {
> - struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + struct intel_display *display = to_intel_display(encoder);
> struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
>
> if (!crtc_state->has_audio)
> return;
>
> - drm_WARN_ON(&i915->drm, !crtc_state->has_hdmi_sink);
> + drm_WARN_ON(display->drm, !crtc_state->has_hdmi_sink);
>
> /* Enable audio presence detect */
> - intel_de_rmw(i915, hdmi->hdmi_reg, 0, HDMI_AUDIO_ENABLE);
> + intel_de_rmw(display, hdmi->hdmi_reg, 0, HDMI_AUDIO_ENABLE);
>
> intel_audio_codec_enable(encoder, crtc_state, conn_state); } @@ -
> 257,7 +257,7 @@ static void g4x_hdmi_audio_disable(struct intel_encoder
> *encoder,
> const struct intel_crtc_state *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state) {
> - struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> + struct intel_display *display = to_intel_display(encoder);
> struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
>
> if (!old_crtc_state->has_audio)
> @@ -266,7 +266,7 @@ static void g4x_hdmi_audio_disable(struct
> intel_encoder *encoder,
> intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
>
> /* Disable audio presence detect */
> - intel_de_rmw(i915, hdmi->hdmi_reg, HDMI_AUDIO_ENABLE, 0);
> + intel_de_rmw(display, hdmi->hdmi_reg, HDMI_AUDIO_ENABLE, 0);
> }
>
> static void g4x_enable_hdmi(struct intel_atomic_state *state, @@ -282,12
> +282,11 @@ static void ibx_enable_hdmi(struct intel_atomic_state *state,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state) {
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct intel_display *display = to_intel_display(encoder);
> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> u32 temp;
>
> - temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
> + temp = intel_de_read(display, intel_hdmi->hdmi_reg);
>
> temp |= SDVO_ENABLE;
>
> @@ -295,10 +294,10 @@ static void ibx_enable_hdmi(struct
> intel_atomic_state *state,
> * HW workaround, need to write this twice for issue
> * that may result in first write getting masked.
> */
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>
> /*
> * HW workaround, need to toggle enable bit off and on @@ -
> 309,18 +308,18 @@ static void ibx_enable_hdmi(struct intel_atomic_state
> *state,
> */
> if (pipe_config->pipe_bpp > 24 &&
> pipe_config->pixel_multiplier > 1) {
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg,
> + intel_de_write(display, intel_hdmi->hdmi_reg,
> temp & ~SDVO_ENABLE);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>
> /*
> * HW workaround, need to write this twice for issue
> * that may result in first write getting masked.
> */
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
> }
> }
>
> @@ -329,14 +328,13 @@ static void cpt_enable_hdmi(struct
> intel_atomic_state *state,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state) {
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct intel_display *display = to_intel_display(encoder);
> struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> enum pipe pipe = crtc->pipe;
> u32 temp;
>
> - temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
> + temp = intel_de_read(display, intel_hdmi->hdmi_reg);
>
> temp |= SDVO_ENABLE;
>
> @@ -351,24 +349,24 @@ static void cpt_enable_hdmi(struct
> intel_atomic_state *state,
> */
>
> if (pipe_config->pipe_bpp > 24) {
> - intel_de_rmw(dev_priv, TRANS_CHICKEN1(pipe),
> + intel_de_rmw(display, TRANS_CHICKEN1(pipe),
> 0, TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE);
>
> temp &= ~SDVO_COLOR_FORMAT_MASK;
> temp |= SDVO_COLOR_FORMAT_8bpc;
> }
>
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>
> if (pipe_config->pipe_bpp > 24) {
> temp &= ~SDVO_COLOR_FORMAT_MASK;
> temp |= HDMI_COLOR_FORMAT_12bpc;
>
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>
> - intel_de_rmw(dev_priv, TRANS_CHICKEN1(pipe),
> + intel_de_rmw(display, TRANS_CHICKEN1(pipe),
> TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE, 0);
> }
> }
> @@ -386,19 +384,18 @@ static void intel_disable_hdmi(struct
> intel_atomic_state *state,
> const struct drm_connector_state
> *old_conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> struct intel_digital_port *dig_port =
> hdmi_to_dig_port(intel_hdmi);
> struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> u32 temp;
>
> - temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
> + temp = intel_de_read(display, intel_hdmi->hdmi_reg);
>
> temp &= ~SDVO_ENABLE;
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>
> /*
> * HW workaround for IBX, we need to move the port @@ -419,14
> +416,14 @@ static void intel_disable_hdmi(struct intel_atomic_state *state,
> * HW workaround, need to write this twice for issue
> * that may result in first write getting masked.
> */
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>
> temp &= ~SDVO_ENABLE;
> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>
> intel_wait_for_vblank_if_active(display, PIPE_A);
> intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A,
> true); @@ -544,8 +541,8 @@ static void chv_hdmi_post_disable(struct
> intel_atomic_state *state,
> const struct intel_crtc_state *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state) {
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct intel_display *display = to_intel_display(encoder);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>
> vlv_dpio_get(dev_priv);
>
> @@ -614,7 +611,7 @@ intel_hdmi_hotplug(struct intel_encoder *encoder,
> int g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
> struct drm_atomic_state *state) {
> - struct drm_i915_private *i915 = to_i915(state->dev);
> + struct intel_display *display = to_intel_display(connector->dev);
> struct drm_connector_list_iter conn_iter;
> struct drm_connector *conn;
> int ret;
> @@ -623,7 +620,7 @@ int g4x_hdmi_connector_atomic_check(struct
> drm_connector *connector,
> if (ret)
> return ret;
>
> - if (!IS_G4X(i915))
> + if (!display->platform.g4x)
> return 0;
>
> if (!intel_connector_needs_modeset(to_intel_atomic_state(state),
> connector)) @@ -637,7 +634,7 @@ int
> g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
> *
> * See also g4x_compute_has_hdmi_sink().
> */
> - drm_connector_list_iter_begin(&i915->drm, &conn_iter);
> + drm_connector_list_iter_begin(display->drm, &conn_iter);
> drm_for_each_connector_iter(conn, &conn_iter) {
> struct drm_connector_state *conn_state;
> struct drm_crtc_state *crtc_state;
> @@ -646,7 +643,7 @@ int g4x_hdmi_connector_atomic_check(struct
> drm_connector *connector,
> if (!connector_is_hdmi(conn))
> continue;
>
> - drm_dbg_kms(&i915->drm, "Adding
> [CONNECTOR:%d:%s]\n",
> + drm_dbg_kms(display->drm, "Adding
> [CONNECTOR:%d:%s]\n",
> conn->base.id, conn->name);
>
> conn_state = drm_atomic_get_connector_state(state, conn);
> @@ -671,24 +668,24 @@ int g4x_hdmi_connector_atomic_check(struct
> drm_connector *connector,
> return ret;
> }
>
> -static bool is_hdmi_port_valid(struct drm_i915_private *i915, enum port
> port)
> +static bool is_hdmi_port_valid(struct intel_display *display, enum port
> +port)
> {
> - if (IS_G4X(i915) || IS_VALLEYVIEW(i915))
> + if (display->platform.g4x || display->platform.valleyview)
> return port == PORT_B || port == PORT_C;
> else
> return port == PORT_B || port == PORT_C || port ==
> PORT_D; }
>
> -static bool assert_hdmi_port_valid(struct drm_i915_private *i915, enum
> port port)
> +static bool assert_hdmi_port_valid(struct intel_display *display, enum
> +port port)
> {
> - return !drm_WARN(&i915->drm, !is_hdmi_port_valid(i915, port),
> + return !drm_WARN(display->drm, !is_hdmi_port_valid(display,
> port),
> "Platform does not support HDMI %c\n",
> port_name(port)); }
>
> -bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
> +bool g4x_hdmi_init(struct intel_display *display,
> i915_reg_t hdmi_reg, enum port port) {
> - struct intel_display *display = &dev_priv->display;
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> const struct intel_bios_encoder_data *devdata;
> struct intel_digital_port *dig_port;
> struct intel_encoder *intel_encoder;
> @@ -697,14 +694,14 @@ bool g4x_hdmi_init(struct drm_i915_private
> *dev_priv,
> if (!assert_port_valid(dev_priv, port))
> return false;
>
> - if (!assert_hdmi_port_valid(dev_priv, port))
> + if (!assert_hdmi_port_valid(display, port))
> return false;
>
> devdata = intel_bios_encoder_data_lookup(display, port);
>
> /* FIXME bail? */
> if (!devdata)
> - drm_dbg_kms(&dev_priv->drm, "No VBT child device for
> HDMI-%c\n",
> + drm_dbg_kms(display->drm, "No VBT child device for HDMI-
> %c\n",
> port_name(port));
>
> dig_port = kzalloc(sizeof(*dig_port), GFP_KERNEL); @@ -723,7
> +720,7 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
>
> mutex_init(&dig_port->hdcp_mutex);
>
> - if (drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
> + if (drm_encoder_init(display->drm, &intel_encoder->base,
> &intel_hdmi_enc_funcs,
> DRM_MODE_ENCODER_TMDS,
> "HDMI %c", port_name(port)))
> goto err_encoder_init;
> @@ -738,13 +735,13 @@ bool g4x_hdmi_init(struct drm_i915_private
> *dev_priv,
> }
> intel_encoder->get_hw_state = intel_hdmi_get_hw_state;
> intel_encoder->get_config = intel_hdmi_get_config;
> - if (IS_CHERRYVIEW(dev_priv)) {
> + if (display->platform.cherryview) {
> intel_encoder->pre_pll_enable = chv_hdmi_pre_pll_enable;
> intel_encoder->pre_enable = chv_hdmi_pre_enable;
> intel_encoder->enable = vlv_enable_hdmi;
> intel_encoder->post_disable = chv_hdmi_post_disable;
> intel_encoder->post_pll_disable =
> chv_hdmi_post_pll_disable;
> - } else if (IS_VALLEYVIEW(dev_priv)) {
> + } else if (display->platform.valleyview) {
> intel_encoder->pre_pll_enable = vlv_hdmi_pre_pll_enable;
> intel_encoder->pre_enable = vlv_hdmi_pre_enable;
> intel_encoder->enable = vlv_enable_hdmi; @@ -765,7
> +762,7 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
> intel_encoder->type = INTEL_OUTPUT_HDMI;
> intel_encoder->power_domain =
> intel_display_power_ddi_lanes_domain(display, port);
> intel_encoder->port = port;
> - if (IS_CHERRYVIEW(dev_priv)) {
> + if (display->platform.cherryview) {
> if (port == PORT_D)
> intel_encoder->pipe_mask = BIT(PIPE_C);
> else
> @@ -780,7 +777,7 @@ bool g4x_hdmi_init(struct drm_i915_private
> *dev_priv,
> * to work on real hardware. And since g4x can send infoframes to
> * only one port anyway, nothing is lost by allowing it.
> */
> - if (IS_G4X(dev_priv))
> + if (display->platform.g4x)
> intel_encoder->cloneable |= BIT(INTEL_OUTPUT_HDMI);
>
> dig_port->hdmi.hdmi_reg = hdmi_reg;
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.h
> b/drivers/gpu/drm/i915/display/g4x_hdmi.h
> index a52e8986ec7a..039d2bdba06c 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.h
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.h
> @@ -13,15 +13,15 @@
> enum port;
> struct drm_atomic_state;
> struct drm_connector;
> -struct drm_i915_private;
> +struct intel_display;
>
> #ifdef I915
> -bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
> +bool g4x_hdmi_init(struct intel_display *display,
> i915_reg_t hdmi_reg, enum port port); int
> g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
> struct drm_atomic_state *state); #else -
> static inline bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
> +static inline bool g4x_hdmi_init(struct intel_display *display,
> i915_reg_t hdmi_reg, int port)
> {
> return false;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e5ceedf56335..b8c57a5d26a0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8235,16 +8235,16 @@ void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
> /* PCH SDVOB multiplex with HDMIB */
> found = intel_sdvo_init(dev_priv, PCH_SDVOB,
> PORT_B);
> if (!found)
> - g4x_hdmi_init(dev_priv, PCH_HDMIB,
> PORT_B);
> + g4x_hdmi_init(display, PCH_HDMIB,
> PORT_B);
> if (!found && (intel_de_read(dev_priv, PCH_DP_B) &
> DP_DETECTED))
> g4x_dp_init(display, PCH_DP_B, PORT_B);
> }
>
> if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED)
> - g4x_hdmi_init(dev_priv, PCH_HDMIC, PORT_C);
> + g4x_hdmi_init(display, PCH_HDMIC, PORT_C);
>
> if (!dpd_is_edp && intel_de_read(dev_priv, PCH_HDMID) &
> SDVO_DETECTED)
> - g4x_hdmi_init(dev_priv, PCH_HDMID, PORT_D);
> + g4x_hdmi_init(display, PCH_HDMID, PORT_D);
>
> if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED)
> g4x_dp_init(display, PCH_DP_C, PORT_C); @@ -
> 8277,14 +8277,14 @@ void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
> if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED ||
> has_port)
> has_edp &= g4x_dp_init(display, VLV_DP_B,
> PORT_B);
> if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED
> || has_port) && !has_edp)
> - g4x_hdmi_init(dev_priv, VLV_HDMIB, PORT_B);
> + g4x_hdmi_init(display, VLV_HDMIB, PORT_B);
>
> has_edp = intel_dp_is_port_edp(display, PORT_C);
> has_port = intel_bios_is_port_present(display, PORT_C);
> if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED ||
> has_port)
> has_edp &= g4x_dp_init(display, VLV_DP_C,
> PORT_C);
> if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED
> || has_port) && !has_edp)
> - g4x_hdmi_init(dev_priv, VLV_HDMIC, PORT_C);
> + g4x_hdmi_init(display, VLV_HDMIC, PORT_C);
>
> if (IS_CHERRYVIEW(dev_priv)) {
> /*
> @@ -8295,7 +8295,7 @@ void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
> if (intel_de_read(dev_priv, CHV_DP_D) &
> DP_DETECTED || has_port)
> g4x_dp_init(display, CHV_DP_D, PORT_D);
> if (intel_de_read(dev_priv, CHV_HDMID) &
> SDVO_DETECTED || has_port)
> - g4x_hdmi_init(dev_priv, CHV_HDMID,
> PORT_D);
> + g4x_hdmi_init(display, CHV_HDMID,
> PORT_D);
> }
>
> vlv_dsi_init(dev_priv);
> @@ -8316,7 +8316,7 @@ void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
> if (!found && IS_G4X(dev_priv)) {
> drm_dbg_kms(&dev_priv->drm,
> "probing HDMI on SDVOB\n");
> - g4x_hdmi_init(dev_priv, GEN4_HDMIB,
> PORT_B);
> + g4x_hdmi_init(display, GEN4_HDMIB,
> PORT_B);
> }
>
> if (!found && IS_G4X(dev_priv))
> @@ -8335,7 +8335,7 @@ void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
> if (IS_G4X(dev_priv)) {
> drm_dbg_kms(&dev_priv->drm,
> "probing HDMI on SDVOC\n");
> - g4x_hdmi_init(dev_priv, GEN4_HDMIC,
> PORT_C);
> + g4x_hdmi_init(display, GEN4_HDMIC,
> PORT_C);
> }
> if (IS_G4X(dev_priv))
> g4x_dp_init(display, DP_C, PORT_C);
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 03/14] drm/i915/ips: convert hsw_ips.c to struct intel_display
2025-02-12 16:36 ` [PATCH 03/14] drm/i915/ips: convert hsw_ips.c " Jani Nikula
@ 2025-02-13 8:56 ` Kandpal, Suraj
0 siblings, 0 replies; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 8:56 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 03/14] drm/i915/ips: convert hsw_ips.c to struct
> intel_display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert as much as possible of hsw_ips.c to struct intel_display.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 26 ++++++++++++--------------
> 1 file changed, 12 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c
> b/drivers/gpu/drm/i915/display/hsw_ips.c
> index d02c328bf902..674a0e5f0858 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -36,7 +36,7 @@ static void hsw_ips_enable(const struct intel_crtc_state
> *crtc_state)
> if (display->ips.false_color)
> val |= IPS_FALSE_COLOR;
>
> - if (IS_BROADWELL(i915)) {
> + if (display->platform.broadwell) {
> drm_WARN_ON(display->drm,
> snb_pcode_write(&i915->uncore,
> DISPLAY_IPS_CONTROL,
> val | IPS_PCODE_CONTROL));
> @@ -71,7 +71,7 @@ bool hsw_ips_disable(const struct intel_crtc_state
> *crtc_state)
> if (!crtc_state->ips_enabled)
> return need_vblank_wait;
>
> - if (IS_BROADWELL(i915)) {
> + if (display->platform.broadwell) {
> drm_WARN_ON(display->drm,
> snb_pcode_write(&i915->uncore,
> DISPLAY_IPS_CONTROL, 0));
> /*
> @@ -96,7 +96,7 @@ bool hsw_ips_disable(const struct intel_crtc_state
> *crtc_state) static bool hsw_ips_need_disable(struct intel_atomic_state
> *state,
> struct intel_crtc *crtc)
> {
> - struct drm_i915_private *i915 = to_i915(state->base.dev);
> + struct intel_display *display = to_intel_display(state);
> const struct intel_crtc_state *old_crtc_state =
> intel_atomic_get_old_crtc_state(state, crtc);
> const struct intel_crtc_state *new_crtc_state = @@ -114,7 +114,7
> @@ static bool hsw_ips_need_disable(struct intel_atomic_state *state,
> *
> * Disable IPS before we program the LUT.
> */
> - if (IS_HASWELL(i915) &&
> + if (display->platform.haswell &&
> intel_crtc_needs_color_update(new_crtc_state) &&
> new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
> return true;
> @@ -137,7 +137,7 @@ bool hsw_ips_pre_update(struct intel_atomic_state
> *state, static bool hsw_ips_need_enable(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> - struct drm_i915_private *i915 = to_i915(state->base.dev);
> + struct intel_display *display = to_intel_display(state);
> const struct intel_crtc_state *old_crtc_state =
> intel_atomic_get_old_crtc_state(state, crtc);
> const struct intel_crtc_state *new_crtc_state = @@ -155,7 +155,7
> @@ static bool hsw_ips_need_enable(struct intel_atomic_state *state,
> *
> * Re-enable IPS after the LUT has been programmed.
> */
> - if (IS_HASWELL(i915) &&
> + if (display->platform.haswell &&
> intel_crtc_needs_color_update(new_crtc_state) &&
> new_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
> return true;
> @@ -194,7 +194,6 @@ static bool hsw_crtc_state_ips_capable(const struct
> intel_crtc_state *crtc_state {
> struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>
> /* IPS only exists on ULT machines and is tied to pipe A. */
> if (!hsw_crtc_supports_ips(crtc))
> @@ -213,7 +212,7 @@ static bool hsw_crtc_state_ips_capable(const struct
> intel_crtc_state *crtc_state
> *
> * Should measure whether using a lower cdclk w/o IPS
> */
> - if (IS_BROADWELL(i915) &&
> + if (display->platform.broadwell &&
> crtc_state->pixel_rate > display->cdclk.max_cdclk_freq * 95 / 100)
> return false;
>
> @@ -222,9 +221,9 @@ static bool hsw_crtc_state_ips_capable(const struct
> intel_crtc_state *crtc_state
>
> int hsw_ips_min_cdclk(const struct intel_crtc_state *crtc_state) {
> - struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
> + struct intel_display *display = to_intel_display(crtc_state);
>
> - if (!IS_BROADWELL(i915))
> + if (!display->platform.broadwell)
> return 0;
>
> if (!hsw_crtc_state_ips_capable(crtc_state))
> @@ -237,7 +236,7 @@ int hsw_ips_min_cdclk(const struct intel_crtc_state
> *crtc_state) int hsw_ips_compute_config(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> - struct drm_i915_private *i915 = to_i915(state->base.dev);
> + struct intel_display *display = to_intel_display(state);
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
>
> @@ -259,7 +258,7 @@ int hsw_ips_compute_config(struct
> intel_atomic_state *state,
> if (!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)))
> return 0;
>
> - if (IS_BROADWELL(i915)) {
> + if (display->platform.broadwell) {
> const struct intel_cdclk_state *cdclk_state;
>
> cdclk_state = intel_atomic_get_cdclk_state(state);
> @@ -280,12 +279,11 @@ void hsw_ips_get_config(struct intel_crtc_state
> *crtc_state) {
> struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>
> if (!hsw_crtc_supports_ips(crtc))
> return;
>
> - if (IS_HASWELL(i915)) {
> + if (display->platform.haswell) {
> crtc_state->ips_enabled = intel_de_read(display, IPS_CTL) &
> IPS_ENABLE;
> } else {
> /*
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 04/14] drm/i915/display: convert assert_transcoder*() to struct intel_display
2025-02-12 16:36 ` [PATCH 04/14] drm/i915/display: convert assert_transcoder*() " Jani Nikula
@ 2025-02-13 8:58 ` Kandpal, Suraj
0 siblings, 0 replies; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 8:58 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 04/14] drm/i915/display: convert assert_transcoder*() to
> struct intel_display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert the assert_transcoder*() helpers to struct intel_display, allowing
> further conversions elsewhere.
>
> Do a few small opportunistic conversions right away.
>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 7 ++--
> drivers/gpu/drm/i915/display/intel_display.c | 34 +++++++++-----------
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dpll.c | 30 +++++++++--------
> drivers/gpu/drm/i915/display/intel_fdi.c | 3 +-
> drivers/gpu/drm/i915/display/intel_tv.c | 3 +-
> 6 files changed, 38 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index cfc796607a78..f50ab9a3f3e9 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -197,9 +197,8 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
> {
> struct intel_display *display = to_intel_display(intel_dp);
> struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>
> - assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
> + assert_transcoder_disabled(display, pipe_config->cpu_transcoder);
> assert_dp_port_disabled(intel_dp);
> assert_edp_pll_disabled(display);
>
> @@ -237,10 +236,8 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
> const struct intel_crtc_state *old_crtc_state) {
> struct intel_display *display = to_intel_display(intel_dp);
> - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>
> - assert_transcoder_disabled(dev_priv, old_crtc_state-
> >cpu_transcoder);
> + assert_transcoder_disabled(display, old_crtc_state-
> >cpu_transcoder);
> assert_dp_port_disabled(intel_dp);
> assert_edp_pll_enabled(display);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index b8c57a5d26a0..a95564b499ea 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -419,23 +419,22 @@ intel_wait_for_pipe_off(const struct
> intel_crtc_state *old_crtc_state)
> }
> }
>
> -void assert_transcoder(struct drm_i915_private *dev_priv,
> +void assert_transcoder(struct intel_display *display,
> enum transcoder cpu_transcoder, bool state) {
> - struct intel_display *display = &dev_priv->display;
> bool cur_state;
> enum intel_display_power_domain power_domain;
> intel_wakeref_t wakeref;
>
> /* we keep both pipes enabled on 830 */
> - if (IS_I830(dev_priv))
> + if (display->platform.i830)
> state = true;
>
> power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> wakeref = intel_display_power_get_if_enabled(display,
> power_domain);
> if (wakeref) {
> - u32 val = intel_de_read(dev_priv,
> - TRANSCONF(dev_priv,
> cpu_transcoder));
> + u32 val = intel_de_read(display,
> + TRANSCONF(display,
> cpu_transcoder));
> cur_state = !!(val & TRANSCONF_ENABLE);
>
> intel_display_power_put(display, power_domain, wakeref);
> @@ -1968,8 +1967,8 @@ static void hsw_crtc_disable(struct
> intel_atomic_state *state,
>
> static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state) {
> + struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>
> if (!crtc_state->gmch_pfit.control)
> return;
> @@ -1978,18 +1977,18 @@ static void i9xx_pfit_enable(const struct
> intel_crtc_state *crtc_state)
> * The panel fitter should only be adjusted whilst the pipe is
> disabled,
> * according to register description and PRM.
> */
> - drm_WARN_ON(&dev_priv->drm,
> - intel_de_read(dev_priv, PFIT_CONTROL(dev_priv)) &
> PFIT_ENABLE);
> - assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> + drm_WARN_ON(display->drm,
> + intel_de_read(display, PFIT_CONTROL(display)) &
> PFIT_ENABLE);
> + assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
>
> - intel_de_write(dev_priv, PFIT_PGM_RATIOS(dev_priv),
> + intel_de_write(display, PFIT_PGM_RATIOS(display),
> crtc_state->gmch_pfit.pgm_ratios);
> - intel_de_write(dev_priv, PFIT_CONTROL(dev_priv),
> + intel_de_write(display, PFIT_CONTROL(display),
> crtc_state->gmch_pfit.control);
>
> /* Border color in case we don't scale up to the full screen. Black by
> * default, change to something else for debugging. */
> - intel_de_write(dev_priv, BCLRPAT(dev_priv, crtc->pipe), 0);
> + intel_de_write(display, BCLRPAT(display, crtc->pipe), 0);
> }
>
> /* Prefer intel_encoder_is_combo() */
> @@ -2300,17 +2299,16 @@ static void i9xx_crtc_enable(struct
> intel_atomic_state *state,
>
> static void i9xx_pfit_disable(const struct intel_crtc_state *old_crtc_state) {
> - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + struct intel_display *display = to_intel_display(old_crtc_state);
>
> if (!old_crtc_state->gmch_pfit.control)
> return;
>
> - assert_transcoder_disabled(dev_priv, old_crtc_state-
> >cpu_transcoder);
> + assert_transcoder_disabled(display, old_crtc_state-
> >cpu_transcoder);
>
> - drm_dbg_kms(&dev_priv->drm, "disabling pfit, current: 0x%08x\n",
> - intel_de_read(dev_priv, PFIT_CONTROL(dev_priv)));
> - intel_de_write(dev_priv, PFIT_CONTROL(dev_priv), 0);
> + drm_dbg_kms(display->drm, "disabling pfit, current: 0x%08x\n",
> + intel_de_read(display, PFIT_CONTROL(display)));
> + intel_de_write(display, PFIT_CONTROL(display), 0);
> }
>
> static void i9xx_crtc_disable(struct intel_atomic_state *state, diff --git
> a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index e594492bade7..503e2ea1d029 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -574,7 +574,7 @@ int intel_atomic_commit(struct drm_device *dev,
> struct drm_atomic_state *_state, void intel_hpd_poll_fini(struct
> drm_i915_private *i915);
>
> /* modesetting asserts */
> -void assert_transcoder(struct drm_i915_private *dev_priv,
> +void assert_transcoder(struct intel_display *display,
> enum transcoder cpu_transcoder, bool state); #define
> assert_transcoder_enabled(d, t) assert_transcoder(d, t, true) #define
> assert_transcoder_disabled(d, t) assert_transcoder(d, t, false) diff --git
> a/drivers/gpu/drm/i915/display/intel_dpll.c
> b/drivers/gpu/drm/i915/display/intel_dpll.c
> index cc19cd51ab4d..08a30e5aafce 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -1843,7 +1843,7 @@ void i9xx_enable_pll(const struct intel_crtc_state
> *crtc_state)
> enum pipe pipe = crtc->pipe;
> int i;
>
> - assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> + assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
>
> /* PLL is protected by panel, make sure we can write it */
> if (i9xx_has_pps(dev_priv))
> @@ -2024,7 +2024,7 @@ void vlv_enable_pll(const struct intel_crtc_state
> *crtc_state)
> const struct i9xx_dpll_hw_state *hw_state = &crtc_state-
> >dpll_hw_state.i9xx;
> enum pipe pipe = crtc->pipe;
>
> - assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> + assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
>
> /* PLL is protected by panel, make sure we can write it */
> assert_pps_unlocked(display, pipe);
> @@ -2171,7 +2171,7 @@ void chv_enable_pll(const struct intel_crtc_state
> *crtc_state)
> const struct i9xx_dpll_hw_state *hw_state = &crtc_state-
> >dpll_hw_state.i9xx;
> enum pipe pipe = crtc->pipe;
>
> - assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> + assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
>
> /* PLL is protected by panel, make sure we can write it */
> assert_pps_unlocked(display, pipe);
> @@ -2253,36 +2253,38 @@ int vlv_force_pll_on(struct drm_i915_private
> *dev_priv, enum pipe pipe,
>
> void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) {
> + struct intel_display *display = &dev_priv->display;
> u32 val;
>
> /* Make sure the pipe isn't still relying on us */
> - assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
> + assert_transcoder_disabled(display, (enum transcoder)pipe);
>
> val = DPLL_INTEGRATED_REF_CLK_VLV |
> DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
> if (pipe != PIPE_A)
> val |= DPLL_INTEGRATED_CRI_CLK_VLV;
>
> - intel_de_write(dev_priv, DPLL(dev_priv, pipe), val);
> - intel_de_posting_read(dev_priv, DPLL(dev_priv, pipe));
> + intel_de_write(display, DPLL(display, pipe), val);
> + intel_de_posting_read(display, DPLL(display, pipe));
> }
>
> void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe) {
> + struct intel_display *display = &dev_priv->display;
> enum dpio_channel ch = vlv_pipe_to_channel(pipe);
> enum dpio_phy phy = vlv_pipe_to_phy(pipe);
> u32 val;
>
> /* Make sure the pipe isn't still relying on us */
> - assert_transcoder_disabled(dev_priv, (enum transcoder)pipe);
> + assert_transcoder_disabled(display, (enum transcoder)pipe);
>
> val = DPLL_SSC_REF_CLK_CHV |
> DPLL_REF_CLK_ENABLE_VLV | DPLL_VGA_MODE_DIS;
> if (pipe != PIPE_A)
> val |= DPLL_INTEGRATED_CRI_CLK_VLV;
>
> - intel_de_write(dev_priv, DPLL(dev_priv, pipe), val);
> - intel_de_posting_read(dev_priv, DPLL(dev_priv, pipe));
> + intel_de_write(display, DPLL(display, pipe), val);
> + intel_de_posting_read(display, DPLL(display, pipe));
>
> vlv_dpio_get(dev_priv);
>
> @@ -2296,19 +2298,19 @@ void chv_disable_pll(struct drm_i915_private
> *dev_priv, enum pipe pipe)
>
> void i9xx_disable_pll(const struct intel_crtc_state *crtc_state) {
> + struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
>
> /* Don't disable pipe or pipe PLLs if needed */
> - if (IS_I830(dev_priv))
> + if (display->platform.i830)
> return;
>
> /* Make sure the pipe isn't still relying on us */
> - assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder);
> + assert_transcoder_disabled(display, crtc_state->cpu_transcoder);
>
> - intel_de_write(dev_priv, DPLL(dev_priv, pipe),
> DPLL_VGA_MODE_DIS);
> - intel_de_posting_read(dev_priv, DPLL(dev_priv, pipe));
> + intel_de_write(display, DPLL(display, pipe), DPLL_VGA_MODE_DIS);
> + intel_de_posting_read(display, DPLL(display, pipe));
> }
>
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c
> b/drivers/gpu/drm/i915/display/intel_fdi.c
> index 9ebe80bfaab6..024d0c7e0a88 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -511,6 +511,7 @@ void intel_fdi_normal_train(struct intel_crtc *crtc)
> static void ilk_fdi_link_train(struct intel_crtc *crtc,
> const struct intel_crtc_state *crtc_state) {
> + struct intel_display *display = to_intel_display(crtc);
> struct drm_device *dev = crtc->base.dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> enum pipe pipe = crtc->pipe;
> @@ -525,7 +526,7 @@ static void ilk_fdi_link_train(struct intel_crtc *crtc,
> intel_de_read(dev_priv, PIPE_DATA_M1(dev_priv, pipe))
> & TU_SIZE_MASK);
>
> /* FDI needs bits from pipe first */
> - assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder);
> + assert_transcoder_enabled(display, crtc_state->cpu_transcoder);
>
> /* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
> for train result */
> diff --git a/drivers/gpu/drm/i915/display/intel_tv.c
> b/drivers/gpu/drm/i915/display/intel_tv.c
> index 1c50732a099d..7838c92f8ded 100644
> --- a/drivers/gpu/drm/i915/display/intel_tv.c
> +++ b/drivers/gpu/drm/i915/display/intel_tv.c
> @@ -1436,7 +1436,6 @@ static void intel_tv_pre_enable(struct
> intel_atomic_state *state,
> const struct drm_connector_state
> *conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> struct intel_tv *intel_tv = enc_to_tv(encoder);
> const struct intel_tv_connector_state *tv_conn_state = @@ -1543,7
> +1542,7 @@ static void intel_tv_pre_enable(struct intel_atomic_state *state,
> intel_de_write(display, TV_CLR_LEVEL,
> ((video_levels->black << TV_BLACK_LEVEL_SHIFT)
> | (video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
>
> - assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
> + assert_transcoder_disabled(display, pipe_config->cpu_transcoder);
>
> /* Filter ctl must be set before TV_WIN_SIZE */
> tv_filter_ctl = TV_AUTO_SCALE;
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 05/14] drm/i915/display: convert assert_port_valid() to struct intel_display
2025-02-12 16:36 ` [PATCH 05/14] drm/i915/display: convert assert_port_valid() " Jani Nikula
@ 2025-02-13 8:59 ` Kandpal, Suraj
0 siblings, 0 replies; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 8:59 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 05/14] drm/i915/display: convert assert_port_valid() to
> struct intel_display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert the assert_port_valid() helper to struct intel_display, allowing
> further conversions elsewhere.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_crt.c | 2 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dvo.c | 2 +-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 3 ++-
> 8 files changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index f50ab9a3f3e9..b6cb5c74a32e 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -1286,7 +1286,7 @@ bool g4x_dp_init(struct intel_display *display,
> struct drm_encoder *encoder;
> struct intel_connector *intel_connector;
>
> - if (!assert_port_valid(dev_priv, port))
> + if (!assert_port_valid(display, port))
> return false;
>
> devdata = intel_bios_encoder_data_lookup(display, port); diff --git
> a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 6670cf101b9a..5b2df1014c10 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -691,7 +691,7 @@ bool g4x_hdmi_init(struct intel_display *display,
> struct intel_encoder *intel_encoder;
> struct intel_connector *intel_connector;
>
> - if (!assert_port_valid(dev_priv, port))
> + if (!assert_port_valid(display, port))
> return false;
>
> if (!assert_hdmi_port_valid(display, port)) diff --git
> a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index aa46c14ce225..396846025922 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -1099,7 +1099,7 @@ void intel_crt_init(struct intel_display *display)
> connector->base.polled = connector->polled;
>
> if (HAS_DDI(display)) {
> - assert_port_valid(dev_priv, PORT_E);
> + assert_port_valid(display, PORT_E);
>
> crt->base.port = PORT_E;
> crt->base.get_config = hsw_crt_get_config; diff --git
> a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 2c05742d8fd1..ab382adaba56 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -5132,7 +5132,7 @@ void intel_ddi_init(struct intel_display *display,
> return;
> }
>
> - if (!assert_port_valid(dev_priv, port))
> + if (!assert_port_valid(display, port))
> return;
>
> if (port_in_use(dev_priv, port)) {
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index a95564b499ea..2a8f53f06463 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8188,9 +8188,9 @@ static bool intel_ddi_crt_present(struct
> drm_i915_private *dev_priv)
> return true;
> }
>
> -bool assert_port_valid(struct drm_i915_private *i915, enum port port)
> +bool assert_port_valid(struct intel_display *display, enum port port)
> {
> - return !drm_WARN(&i915->drm, !(DISPLAY_RUNTIME_INFO(i915)-
> >port_mask & BIT(port)),
> + return !drm_WARN(display->drm,
> +!(DISPLAY_RUNTIME_INFO(display)->port_mask & BIT(port)),
> "Platform does not support port %c\n",
> port_name(port)); }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 503e2ea1d029..9439da737f5b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -579,7 +579,7 @@ void assert_transcoder(struct intel_display *display,
> #define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true)
> #define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false)
>
> -bool assert_port_valid(struct drm_i915_private *i915, enum port port);
> +bool assert_port_valid(struct intel_display *display, enum port port);
>
> /*
> * Use INTEL_DISPLAY_STATE_WARN(x) (rather than WARN() and
> WARN_ON()) for hw diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c
> b/drivers/gpu/drm/i915/display/intel_dvo.c
> index c310698a1a86..29f8788fb26a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_dvo.c
> @@ -524,7 +524,7 @@ void intel_dvo_init(struct drm_i915_private *i915)
> return;
> }
>
> - assert_port_valid(i915, intel_dvo->dev.port);
> + assert_port_valid(display, intel_dvo->dev.port);
>
> encoder->type = INTEL_OUTPUT_DVO;
> encoder->power_domain = POWER_DOMAIN_PORT_OTHER; diff --git
> a/drivers/gpu/drm/i915/display/intel_sdvo.c
> b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 6ebd099d8861..0c3aa2e7b78b 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -3386,11 +3386,12 @@ static bool assert_sdvo_port_valid(struct
> drm_i915_private *dev_priv, bool intel_sdvo_init(struct drm_i915_private
> *dev_priv,
> i915_reg_t sdvo_reg, enum port port) {
> + struct intel_display *display = &dev_priv->display;
> struct intel_encoder *intel_encoder;
> struct intel_sdvo *intel_sdvo;
> int i;
>
> - if (!assert_port_valid(dev_priv, port))
> + if (!assert_port_valid(display, port))
> return false;
>
> if (!assert_sdvo_port_valid(dev_priv, port))
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 06/14] drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default()
2025-02-12 16:36 ` [PATCH 06/14] drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default() Jani Nikula
@ 2025-02-13 9:01 ` Kandpal, Suraj
0 siblings, 0 replies; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 9:01 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 06/14] drm/i915/hpd: drop dev_priv parameter from
> intel_hpd_pin_default()
>
> The function doesn't use the parameter for anything. Drop it.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_hotplug.c | 4 +---
> drivers/gpu/drm/i915/display/intel_hotplug.h | 3 +--
> 5 files changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index b6cb5c74a32e..4b51a4e47f63 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -1393,7 +1393,7 @@ bool g4x_dp_init(struct intel_display *display,
> }
> intel_encoder->cloneable = 0;
> intel_encoder->port = port;
> - intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
> + intel_encoder->hpd_pin = intel_hpd_pin_default(port);
>
> dig_port->hpd_pulse = intel_dp_hpd_pulse;
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 5b2df1014c10..1cd2e68e6ec5 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -771,7 +771,7 @@ bool g4x_hdmi_init(struct intel_display *display,
> intel_encoder->pipe_mask = ~0;
> }
> intel_encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG);
> - intel_encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
> + intel_encoder->hpd_pin = intel_hpd_pin_default(port);
> /*
> * BSpec is unclear about HDMI+HDMI cloning on g4x, but it seems
> * to work on real hardware. And since g4x can send infoframes to
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index ab382adaba56..ce7097937d70 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -5368,7 +5368,7 @@ void intel_ddi_init(struct intel_display *display,
> else if (DISPLAY_VER(dev_priv) == 9 && !IS_BROXTON(dev_priv))
> encoder->hpd_pin = skl_hpd_pin(dev_priv, port);
> else
> - encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
> + encoder->hpd_pin = intel_hpd_pin_default(port);
>
> ddi_buf_ctl = intel_de_read(dev_priv, DDI_BUF_CTL(port));
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c
> b/drivers/gpu/drm/i915/display/intel_hotplug.c
> index d2e0002c5dc3..9c935afc60aa 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> @@ -82,15 +82,13 @@
>
> /**
> * intel_hpd_pin_default - return default pin associated with certain port.
> - * @dev_priv: private driver data pointer
> * @port: the hpd port to get associated pin
> *
> * It is only valid and used by digital port encoder.
> *
> * Return pin that is associatade with @port.
> */
> -enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
> - enum port port)
> +enum hpd_pin intel_hpd_pin_default(enum port port)
> {
> return HPD_PORT_A + port - PORT_A;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.h
> b/drivers/gpu/drm/i915/display/intel_hotplug.h
> index a17253ddec83..d2ca9d2f1d39 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.h
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.h
> @@ -24,8 +24,7 @@ void intel_hpd_trigger_irq(struct intel_digital_port
> *dig_port); void intel_hpd_init(struct drm_i915_private *dev_priv); void
> intel_hpd_init_early(struct drm_i915_private *i915); void
> intel_hpd_cancel_work(struct drm_i915_private *dev_priv); -enum hpd_pin
> intel_hpd_pin_default(struct drm_i915_private *dev_priv,
> - enum port port);
> +enum hpd_pin intel_hpd_pin_default(enum port port);
> bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin
> pin); void intel_hpd_enable(struct drm_i915_private *dev_priv, enum
> hpd_pin pin); void intel_hpd_debugfs_register(struct drm_i915_private
> *i915);
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 07/14] drm/i915/display: convert intel_set_{cpu, pch}_fifo_underrun_reporting() to intel_display
2025-02-12 16:36 ` [PATCH 07/14] drm/i915/display: convert intel_set_{cpu, pch}_fifo_underrun_reporting() to intel_display Jani Nikula
@ 2025-02-13 9:03 ` Kandpal, Suraj
0 siblings, 0 replies; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 9:03 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 07/14] drm/i915/display: convert intel_set_{cpu,
> pch}_fifo_underrun_reporting() to intel_display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert intel_set_cpu_fifo_underrun_reporting() and
> intel_set_pch_fifo_underrun_reporting() to struct intel_display, along with
> some of the call chains from there.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 8 +-
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 8 +-
> drivers/gpu/drm/i915/display/intel_crt.c | 17 ++--
> drivers/gpu/drm/i915/display/intel_ddi.c | 3 +-
> drivers/gpu/drm/i915/display/intel_display.c | 43 +++++-----
> .../drm/i915/display/intel_fifo_underrun.c | 84 +++++++++----------
> .../drm/i915/display/intel_fifo_underrun.h | 7 +-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 8 +-
> drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +-
> 9 files changed, 89 insertions(+), 91 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 4b51a4e47f63..0cb98cb043c6 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -453,8 +453,8 @@ intel_dp_link_down(struct intel_encoder *encoder,
> * We get CPU/PCH FIFO underruns on the other pipe when
> * doing the workaround. Sweep them under the rug.
> */
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A,
> false);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A,
> false);
> + intel_set_cpu_fifo_underrun_reporting(display, PIPE_A,
> false);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A,
> false);
>
> /* always enable with pattern 1 (as per spec) */
> intel_dp->DP &= ~(DP_PIPE_SEL_MASK |
> DP_LINK_TRAIN_MASK); @@ -468,8 +468,8 @@ intel_dp_link_down(struct
> intel_encoder *encoder,
> intel_de_posting_read(display, intel_dp->output_reg);
>
> intel_wait_for_vblank_if_active(display, PIPE_A);
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A,
> true);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A,
> true);
> + intel_set_cpu_fifo_underrun_reporting(display, PIPE_A,
> true);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A,
> true);
> }
>
> msleep(intel_dp->pps.panel_power_down_delay);
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 1cd2e68e6ec5..089f1a4d7720 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -407,8 +407,8 @@ static void intel_disable_hdmi(struct
> intel_atomic_state *state,
> * We get CPU/PCH FIFO underruns on the other pipe when
> * doing the workaround. Sweep them under the rug.
> */
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A,
> false);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A,
> false);
> + intel_set_cpu_fifo_underrun_reporting(display, PIPE_A,
> false);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A,
> false);
>
> temp &= ~SDVO_PIPE_SEL_MASK;
> temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A); @@ -
> 426,8 +426,8 @@ static void intel_disable_hdmi(struct intel_atomic_state
> *state,
> intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>
> intel_wait_for_vblank_if_active(display, PIPE_A);
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A,
> true);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A,
> true);
> + intel_set_cpu_fifo_underrun_reporting(display, PIPE_A,
> true);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A,
> true);
> }
>
> dig_port->set_infoframes(encoder,
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index 396846025922..8eedae1d7684 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -250,11 +250,10 @@ static void hsw_disable_crt(struct
> intel_atomic_state *state,
> const struct drm_connector_state
> *old_conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>
> drm_WARN_ON(display->drm, !old_crtc_state->has_pch_encoder);
>
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A, false);
> }
>
> static void hsw_post_disable_crt(struct intel_atomic_state *state, @@ -
> 264,7 +263,6 @@ static void hsw_post_disable_crt(struct intel_atomic_state
> *state, {
> struct intel_display *display = to_intel_display(encoder);
> struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>
> intel_crtc_vblank_off(old_crtc_state);
>
> @@ -284,7 +282,7 @@ static void hsw_post_disable_crt(struct
> intel_atomic_state *state,
>
> drm_WARN_ON(display->drm, !old_crtc_state->has_pch_encoder);
>
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A, true);
> }
>
> static void hsw_pre_pll_enable_crt(struct intel_atomic_state *state, @@ -
> 293,11 +291,10 @@ static void hsw_pre_pll_enable_crt(struct
> intel_atomic_state *state,
> const struct drm_connector_state
> *conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>
> drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder);
>
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A, false);
> }
>
> static void hsw_pre_enable_crt(struct intel_atomic_state *state, @@ -
> 306,13 +303,12 @@ static void hsw_pre_enable_crt(struct
> intel_atomic_state *state,
> const struct drm_connector_state *conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> enum pipe pipe = crtc->pipe;
>
> drm_WARN_ON(display->drm, !crtc_state->has_pch_encoder);
>
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
>
> hsw_fdi_link_train(encoder, crtc_state);
>
> @@ -325,7 +321,6 @@ static void hsw_enable_crt(struct intel_atomic_state
> *state,
> const struct drm_connector_state *conn_state) {
> struct intel_display *display = to_intel_display(encoder);
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> enum pipe pipe = crtc->pipe;
>
> @@ -343,8 +338,8 @@ static void hsw_enable_crt(struct intel_atomic_state
> *state,
>
> intel_crtc_wait_for_next_vblank(crtc);
> intel_crtc_wait_for_next_vblank(crtc);
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A, true);
> }
>
> static void intel_enable_crt(struct intel_atomic_state *state, diff --git
> a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index ce7097937d70..900e066b2478 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3013,13 +3013,14 @@ static void intel_ddi_pre_enable(struct
> intel_atomic_state *state,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state) {
> + struct intel_display *display = to_intel_display(state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
>
> drm_WARN_ON(&dev_priv->drm, crtc_state->has_pch_encoder);
>
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
>
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> intel_ddi_pre_enable_hdmi(state, encoder, crtc_state, diff --
> git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 2a8f53f06463..9bcbd52f23cf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -774,6 +774,7 @@ void intel_plane_fixup_bitmasks(struct
> intel_crtc_state *crtc_state) void intel_plane_disable_noatomic(struct
> intel_crtc *crtc,
> struct intel_plane *plane)
> {
> + struct intel_display *display = to_intel_display(crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
> @@ -817,7 +818,7 @@ void intel_plane_disable_noatomic(struct intel_crtc
> *crtc,
> * So disable underrun reporting before all the planes get disabled.
> */
> if (DISPLAY_VER(dev_priv) == 2 && !crtc_state->active_planes)
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe,
> false);
> + intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe,
> false);
>
> intel_plane_disable_arm(NULL, plane, crtc_state);
> intel_plane_initial_vblank_wait(crtc);
> @@ -1305,6 +1306,7 @@ static void intel_crtc_async_flip_disable_wa(struct
> intel_atomic_state *state, static void intel_pre_plane_update(struct
> intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> + struct intel_display *display = to_intel_display(state);
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> const struct intel_crtc_state *old_crtc_state =
> intel_atomic_get_old_crtc_state(state, crtc); @@ -1406,7
> +1408,7 @@ static void intel_pre_plane_update(struct intel_atomic_state
> *state,
> * vs. the old plane configuration.
> */
> if (DISPLAY_VER(dev_priv) == 2 && planes_disabling(old_crtc_state,
> new_crtc_state))
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe,
> false);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
>
> /*
> * WA for platforms where async address update enable bit @@ -
> 1645,6 +1647,7 @@ static void ilk_configure_cpu_transcoder(const struct
> intel_crtc_state *crtc_sta static void ilk_crtc_enable(struct intel_atomic_state
> *state,
> struct intel_crtc *crtc)
> {
> + struct intel_display *display = to_intel_display(crtc);
> const struct intel_crtc_state *new_crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -
> 1663,8 +1666,8 @@ static void ilk_crtc_enable(struct intel_atomic_state
> *state,
> *
> * Spurious PCH underruns also occur during PCH enabling.
> */
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
> + intel_set_pch_fifo_underrun_reporting(display, pipe, false);
>
> ilk_configure_cpu_transcoder(new_crtc_state);
>
> @@ -1712,8 +1715,8 @@ static void ilk_crtc_enable(struct
> intel_atomic_state *state,
> intel_crtc_wait_for_next_vblank(crtc);
> intel_crtc_wait_for_next_vblank(crtc);
> }
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
> + intel_set_pch_fifo_underrun_reporting(display, pipe, true);
> }
>
> /* Display WA #1180: WaDisableScalarClockGating: glk */ @@ -1901,9
> +1904,9 @@ void ilk_pfit_disable(const struct intel_crtc_state
> *old_crtc_state) static void ilk_crtc_disable(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> + struct intel_display *display = to_intel_display(crtc);
> const struct intel_crtc_state *old_crtc_state =
> intel_atomic_get_old_crtc_state(state, crtc);
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum pipe pipe = crtc->pipe;
>
> /*
> @@ -1911,8 +1914,8 @@ static void ilk_crtc_disable(struct
> intel_atomic_state *state,
> * pipe is already disabled, but FDI RX/TX is still enabled.
> * Happens at least with VGA+HDMI cloning. Suppress them.
> */
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, false);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
> + intel_set_pch_fifo_underrun_reporting(display, pipe, false);
>
> intel_encoders_disable(state, crtc);
>
> @@ -1930,8 +1933,8 @@ static void ilk_crtc_disable(struct
> intel_atomic_state *state,
> if (old_crtc_state->has_pch_encoder)
> ilk_pch_post_disable(state, crtc);
>
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, pipe, true);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
> + intel_set_pch_fifo_underrun_reporting(display, pipe, true);
>
> intel_disable_shared_dpll(old_crtc_state);
> }
> @@ -2211,6 +2214,7 @@ static void i9xx_configure_cpu_transcoder(const
> struct intel_crtc_state *crtc_st static void valleyview_crtc_enable(struct
> intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> + struct intel_display *display = to_intel_display(crtc);
> const struct intel_crtc_state *new_crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -
> 2233,7 +2237,7 @@ static void valleyview_crtc_enable(struct
> intel_atomic_state *state,
>
> crtc->active = true;
>
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
>
> intel_encoders_pre_pll_enable(state, crtc);
>
> @@ -2259,6 +2263,7 @@ static void valleyview_crtc_enable(struct
> intel_atomic_state *state, static void i9xx_crtc_enable(struct
> intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> + struct intel_display *display = to_intel_display(crtc);
> const struct intel_crtc_state *new_crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); @@ -
> 2274,7 +2279,7 @@ static void i9xx_crtc_enable(struct intel_atomic_state
> *state,
> crtc->active = true;
>
> if (DISPLAY_VER(dev_priv) != 2)
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
>
> intel_encoders_pre_enable(state, crtc);
>
> @@ -2349,7 +2354,7 @@ static void i9xx_crtc_disable(struct
> intel_atomic_state *state,
> intel_encoders_post_pll_disable(state, crtc);
>
> if (DISPLAY_VER(dev_priv) != 2)
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe,
> false);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, false);
>
> if (!dev_priv->display.funcs.wm->initial_watermarks)
> intel_update_watermarks(dev_priv);
> @@ -7069,16 +7074,16 @@ static int intel_atomic_prepare_commit(struct
> intel_atomic_state *state) void intel_crtc_arm_fifo_underrun(struct
> intel_crtc *crtc,
> struct intel_crtc_state *crtc_state) {
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + struct intel_display *display = to_intel_display(crtc);
>
> - if (DISPLAY_VER(dev_priv) != 2 || crtc_state->active_planes)
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe,
> true);
> + if (DISPLAY_VER(display) != 2 || crtc_state->active_planes)
> + intel_set_cpu_fifo_underrun_reporting(display, crtc->pipe,
> true);
>
> if (crtc_state->has_pch_encoder) {
> enum pipe pch_transcoder =
> intel_crtc_pch_transcoder(crtc);
>
> - intel_set_pch_fifo_underrun_reporting(dev_priv,
> pch_transcoder, true);
> + intel_set_pch_fifo_underrun_reporting(display,
> pch_transcoder, true);
> }
> }
>
> @@ -7921,7 +7926,7 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> * vs. the new plane configuration.
> */
> if (DISPLAY_VER(dev_priv) == 2 &&
> planes_enabling(old_crtc_state, new_crtc_state))
> - intel_set_cpu_fifo_underrun_reporting(dev_priv,
> crtc->pipe, true);
> + intel_set_cpu_fifo_underrun_reporting(display, crtc-
> >pipe, true);
>
> intel_optimize_watermarks(state, crtc);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> index 18fcdbe1248a..cf70dab4881b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c
> @@ -55,10 +55,9 @@
> * The code also supports underrun detection on the PCH transcoder.
> */
>
> -static bool ivb_can_enable_err_int(struct drm_device *dev)
> +static bool ivb_can_enable_err_int(struct intel_display *display)
> {
> - struct intel_display *display = to_intel_display(dev);
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
I think the same Nit as before can we call it i915
But LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> struct intel_crtc *crtc;
> enum pipe pipe;
>
> @@ -74,10 +73,9 @@ static bool ivb_can_enable_err_int(struct drm_device
> *dev)
> return true;
> }
>
> -static bool cpt_can_enable_serr_int(struct drm_device *dev)
> +static bool cpt_can_enable_serr_int(struct intel_display *display)
> {
> - struct intel_display *display = to_intel_display(dev);
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> enum pipe pipe;
> struct intel_crtc *crtc;
>
> @@ -113,11 +111,11 @@ static void i9xx_check_fifo_underruns(struct
> intel_crtc *crtc)
> drm_err(&dev_priv->drm, "pipe %c underrun\n", pipe_name(crtc-
> >pipe)); }
>
> -static void i9xx_set_fifo_underrun_reporting(struct drm_device *dev,
> +static void i9xx_set_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pipe,
> bool enable, bool old)
> {
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> i915_reg_t reg = PIPESTAT(dev_priv, pipe);
>
> lockdep_assert_held(&dev_priv->irq_lock);
> @@ -135,10 +133,10 @@ static void
> i9xx_set_fifo_underrun_reporting(struct drm_device *dev,
> }
> }
>
> -static void ilk_set_fifo_underrun_reporting(struct drm_device *dev,
> +static void ilk_set_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pipe, bool enable)
> {
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 bit = (pipe == PIPE_A) ?
> DE_PIPEA_FIFO_UNDERRUN : DE_PIPEB_FIFO_UNDERRUN;
>
> @@ -167,16 +165,16 @@ static void ivb_check_fifo_underruns(struct
> intel_crtc *crtc)
> drm_err(&dev_priv->drm, "fifo underrun on pipe %c\n",
> pipe_name(pipe)); }
>
> -static void ivb_set_fifo_underrun_reporting(struct drm_device *dev,
> +static void ivb_set_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pipe, bool enable,
> bool old)
> {
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> if (enable) {
> intel_de_write(dev_priv, GEN7_ERR_INT,
> ERR_INT_FIFO_UNDERRUN(pipe));
>
> - if (!ivb_can_enable_err_int(dev))
> + if (!ivb_can_enable_err_int(display))
> return;
>
> ilk_enable_display_irq(dev_priv, DE_ERR_INT_IVB); @@ -
> 192,10 +190,10 @@ static void ivb_set_fifo_underrun_reporting(struct
> drm_device *dev,
> }
> }
>
> -static void bdw_set_fifo_underrun_reporting(struct drm_device *dev,
> +static void bdw_set_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pipe, bool enable)
> {
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>
> if (enable)
> bdw_enable_pipe_irq(dev_priv, pipe,
> GEN8_PIPE_FIFO_UNDERRUN); @@ -203,11 +201,11 @@ static void
> bdw_set_fifo_underrun_reporting(struct drm_device *dev,
> bdw_disable_pipe_irq(dev_priv, pipe,
> GEN8_PIPE_FIFO_UNDERRUN); }
>
> -static void ibx_set_fifo_underrun_reporting(struct drm_device *dev,
> +static void ibx_set_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pch_transcoder,
> bool enable)
> {
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 bit = (pch_transcoder == PIPE_A) ?
> SDE_TRANSA_FIFO_UNDER : SDE_TRANSB_FIFO_UNDER;
>
> @@ -238,17 +236,17 @@ static void cpt_check_pch_fifo_underruns(struct
> intel_crtc *crtc)
> pipe_name(pch_transcoder));
> }
>
> -static void cpt_set_fifo_underrun_reporting(struct drm_device *dev,
> +static void cpt_set_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pch_transcoder,
> bool enable, bool old)
> {
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>
> if (enable) {
> intel_de_write(dev_priv, SERR_INT,
>
> SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder));
>
> - if (!cpt_can_enable_serr_int(dev))
> + if (!cpt_can_enable_serr_int(display))
> return;
>
> ibx_enable_display_interrupt(dev_priv, SDE_ERROR_CPT);
> @@ -264,11 +262,10 @@ static void cpt_set_fifo_underrun_reporting(struct
> drm_device *dev,
> }
> }
>
> -static bool __intel_set_cpu_fifo_underrun_reporting(struct drm_device
> *dev,
> +static bool __intel_set_cpu_fifo_underrun_reporting(struct
> +intel_display *display,
> enum pipe pipe, bool
> enable)
> {
> - struct intel_display *display = to_intel_display(dev);
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
> bool old;
>
> @@ -277,21 +274,21 @@ static bool
> __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
> old = !crtc->cpu_fifo_underrun_disabled;
> crtc->cpu_fifo_underrun_disabled = !enable;
>
> - if (HAS_GMCH(dev_priv))
> - i9xx_set_fifo_underrun_reporting(dev, pipe, enable, old);
> - else if (IS_IRONLAKE(dev_priv) || IS_SANDYBRIDGE(dev_priv))
> - ilk_set_fifo_underrun_reporting(dev, pipe, enable);
> - else if (DISPLAY_VER(dev_priv) == 7)
> - ivb_set_fifo_underrun_reporting(dev, pipe, enable, old);
> - else if (DISPLAY_VER(dev_priv) >= 8)
> - bdw_set_fifo_underrun_reporting(dev, pipe, enable);
> + if (HAS_GMCH(display))
> + i9xx_set_fifo_underrun_reporting(display, pipe, enable, old);
> + else if (display->platform.ironlake || display->platform.sandybridge)
> + ilk_set_fifo_underrun_reporting(display, pipe, enable);
> + else if (DISPLAY_VER(display) == 7)
> + ivb_set_fifo_underrun_reporting(display, pipe, enable, old);
> + else if (DISPLAY_VER(display) >= 8)
> + bdw_set_fifo_underrun_reporting(display, pipe, enable);
>
> return old;
> }
>
> /**
> * intel_set_cpu_fifo_underrun_reporting - set cpu fifo underrun reporting
> state
> - * @dev_priv: i915 device instance
> + * @display: display device instance
> * @pipe: (CPU) pipe to set state for
> * @enable: whether underruns should be reported or not
> *
> @@ -305,15 +302,15 @@ static bool
> __intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
> *
> * Returns the previous state of underrun reporting.
> */
> -bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private
> *dev_priv,
> +bool intel_set_cpu_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pipe, bool enable)
> {
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> unsigned long flags;
> bool ret;
>
> spin_lock_irqsave(&dev_priv->irq_lock, flags);
> - ret = __intel_set_cpu_fifo_underrun_reporting(&dev_priv->drm,
> pipe,
> - enable);
> + ret = __intel_set_cpu_fifo_underrun_reporting(display, pipe,
> enable);
> spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
>
> return ret;
> @@ -321,7 +318,7 @@ bool intel_set_cpu_fifo_underrun_reporting(struct
> drm_i915_private *dev_priv,
>
> /**
> * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting
> state
> - * @dev_priv: i915 device instance
> + * @display: display device instance
> * @pch_transcoder: the PCH transcoder (same as pipe on IVB and older)
> * @enable: whether underruns should be reported or not
> *
> @@ -333,13 +330,12 @@ bool
> intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
> *
> * Returns the previous state of underrun reporting.
> */
> -bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private
> *dev_priv,
> +bool intel_set_pch_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pch_transcoder,
> bool enable)
> {
> - struct intel_display *display = &dev_priv->display;
> - struct intel_crtc *crtc =
> - intel_crtc_for_pipe(display, pch_transcoder);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> + struct intel_crtc *crtc = intel_crtc_for_pipe(display,
> +pch_transcoder);
> unsigned long flags;
> bool old;
>
> @@ -358,11 +354,11 @@ bool
> intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
> crtc->pch_fifo_underrun_disabled = !enable;
>
> if (HAS_PCH_IBX(dev_priv))
> - ibx_set_fifo_underrun_reporting(&dev_priv->drm,
> + ibx_set_fifo_underrun_reporting(display,
> pch_transcoder,
> enable);
> else
> - cpt_set_fifo_underrun_reporting(&dev_priv->drm,
> + cpt_set_fifo_underrun_reporting(display,
> pch_transcoder,
> enable, old);
>
> @@ -394,7 +390,7 @@ void intel_cpu_fifo_underrun_irq_handler(struct
> drm_i915_private *dev_priv,
> crtc->cpu_fifo_underrun_disabled)
> return;
>
> - if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) {
> + if (intel_set_cpu_fifo_underrun_reporting(display, pipe, false)) {
> trace_intel_cpu_fifo_underrun(display, pipe);
>
> drm_err(&dev_priv->drm, "CPU pipe %c FIFO underrun\n",
> pipe_name(pipe)); @@ -417,7 +413,7 @@ void
> intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, {
> struct intel_display *display = &dev_priv->display;
>
> - if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder,
> + if (intel_set_pch_fifo_underrun_reporting(display, pch_transcoder,
> false)) {
> trace_intel_pch_fifo_underrun(display, pch_transcoder);
> drm_err(&dev_priv->drm, "PCH transcoder %c FIFO
> underrun\n", diff --git
> a/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
> b/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
> index b00d8abebcf9..8302080c2313 100644
> --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
> +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.h
> @@ -8,15 +8,16 @@
>
> #include <linux/types.h>
>
> +enum pipe;
> struct drm_i915_private;
> struct intel_crtc;
> -enum pipe;
> +struct intel_display;
>
> void intel_init_fifo_underrun_reporting(struct drm_i915_private *i915,
> struct intel_crtc *crtc, bool enable); -
> bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private
> *dev_priv,
> +bool intel_set_cpu_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pipe, bool enable);
> -bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private
> *dev_priv,
> +bool intel_set_pch_fifo_underrun_reporting(struct intel_display
> +*display,
> enum pipe pch_transcoder,
> bool enable);
> void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private
> *dev_priv, diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
> b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 0c3aa2e7b78b..46203d796fcc 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -1864,8 +1864,8 @@ static void intel_disable_sdvo(struct
> intel_atomic_state *state,
> * We get CPU/PCH FIFO underruns on the other pipe when
> * doing the workaround. Sweep them under the rug.
> */
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A,
> false);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A,
> false);
> + intel_set_cpu_fifo_underrun_reporting(display, PIPE_A,
> false);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A,
> false);
>
> temp &= ~SDVO_PIPE_SEL_MASK;
> temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A); @@ -
> 1875,8 +1875,8 @@ static void intel_disable_sdvo(struct intel_atomic_state
> *state,
> intel_sdvo_write_sdvox(intel_sdvo, temp);
>
> intel_wait_for_vblank_if_active(display, PIPE_A);
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A,
> true);
> - intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A,
> true);
> + intel_set_cpu_fifo_underrun_reporting(display, PIPE_A,
> true);
> + intel_set_pch_fifo_underrun_reporting(display, PIPE_A,
> true);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index f6be1cd5d270..d68876fe782c 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -739,7 +739,7 @@ static void intel_dsi_pre_enable(struct
> intel_atomic_state *state,
>
> intel_dsi_wait_panel_power_cycle(intel_dsi);
>
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> + intel_set_cpu_fifo_underrun_reporting(display, pipe, true);
>
> /*
> * The BIOS may leave the PLL in a wonky state where it doesn't
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 08/14] drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display
2025-02-12 16:36 ` [PATCH 08/14] drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display Jani Nikula
@ 2025-02-13 9:13 ` Kandpal, Suraj
2025-02-13 11:16 ` Jani Nikula
0 siblings, 1 reply; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 9:13 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 08/14] drm/i915/sdvo: convert intel_sdvo.[ch] to struct
> intel_display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert as much as possible of intel_sdvo.[ch] to struct intel_display.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/g4x_hdmi.c | 3 +-
> drivers/gpu/drm/i915/display/intel_display.c | 6 +-
> .../gpu/drm/i915/display/intel_pch_display.c | 2 +-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 281 +++++++++---------
> drivers/gpu/drm/i915/display/intel_sdvo.h | 10 +-
> 5 files changed, 150 insertions(+), 152 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> index 089f1a4d7720..5c5eb3d621c8 100644
> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
> @@ -67,7 +67,6 @@ static bool intel_hdmi_get_hw_state(struct
> intel_encoder *encoder,
> enum pipe *pipe)
> {
> struct intel_display *display = to_intel_display(encoder);
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> intel_wakeref_t wakeref;
> bool ret;
> @@ -77,7 +76,7 @@ static bool intel_hdmi_get_hw_state(struct
> intel_encoder *encoder,
> if (!wakeref)
> return false;
>
> - ret = intel_sdvo_port_enabled(dev_priv, intel_hdmi->hdmi_reg,
> pipe);
> + ret = intel_sdvo_port_enabled(display, intel_hdmi->hdmi_reg, pipe);
>
> intel_display_power_put(display, encoder->power_domain,
> wakeref);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 9bcbd52f23cf..e1186f46088d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8236,7 +8236,7 @@ void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
>
> if (intel_de_read(dev_priv, PCH_HDMIB) & SDVO_DETECTED)
> {
> /* PCH SDVOB multiplex with HDMIB */
> - found = intel_sdvo_init(dev_priv, PCH_SDVOB,
> PORT_B);
> + found = intel_sdvo_init(display, PCH_SDVOB,
> PORT_B);
> if (!found)
> g4x_hdmi_init(display, PCH_HDMIB,
> PORT_B);
> if (!found && (intel_de_read(dev_priv, PCH_DP_B) &
> DP_DETECTED)) @@ -8315,7 +8315,7 @@ void intel_setup_outputs(struct
> drm_i915_private *dev_priv)
>
> if (intel_de_read(dev_priv, GEN3_SDVOB) &
> SDVO_DETECTED) {
> drm_dbg_kms(&dev_priv->drm, "probing SDVOB\n");
> - found = intel_sdvo_init(dev_priv, GEN3_SDVOB,
> PORT_B);
> + found = intel_sdvo_init(display, GEN3_SDVOB,
> PORT_B);
> if (!found && IS_G4X(dev_priv)) {
> drm_dbg_kms(&dev_priv->drm,
> "probing HDMI on SDVOB\n");
> @@ -8330,7 +8330,7 @@ void intel_setup_outputs(struct drm_i915_private
> *dev_priv)
>
> if (intel_de_read(dev_priv, GEN3_SDVOB) &
> SDVO_DETECTED) {
> drm_dbg_kms(&dev_priv->drm, "probing SDVOC\n");
> - found = intel_sdvo_init(dev_priv, GEN3_SDVOC,
> PORT_C);
> + found = intel_sdvo_init(display, GEN3_SDVOC,
> PORT_C);
> }
>
> if (!found && (intel_de_read(dev_priv, GEN3_SDVOC) &
> SDVO_DETECTED)) { diff --git
> a/drivers/gpu/drm/i915/display/intel_pch_display.c
> b/drivers/gpu/drm/i915/display/intel_pch_display.c
> index 98a6b57ac956..1abe0a784570 100644
> --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
> @@ -65,7 +65,7 @@ static void assert_pch_hdmi_disabled(struct
> drm_i915_private *dev_priv,
> enum pipe port_pipe;
> bool state;
>
> - state = intel_sdvo_port_enabled(dev_priv, hdmi_reg, &port_pipe);
> + state = intel_sdvo_port_enabled(display, hdmi_reg, &port_pipe);
>
> INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe,
> "PCH HDMI %c enabled on transcoder %c,
> should be disabled\n", diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
> b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 46203d796fcc..1ae766212e8a 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -213,29 +213,29 @@ intel_sdvo_create_enhance_property(struct
> intel_sdvo *intel_sdvo,
> */
> static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) {
> - struct drm_device *dev = intel_sdvo->base.base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 bval = val, cval = val;
> int i;
>
> if (HAS_PCH_SPLIT(dev_priv)) {
> - intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
> - intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
> + intel_de_write(display, intel_sdvo->sdvo_reg, val);
> + intel_de_posting_read(display, intel_sdvo->sdvo_reg);
> /*
> * HW workaround, need to write this twice for issue
> * that may result in first write getting masked.
> */
> if (HAS_PCH_IBX(dev_priv)) {
> - intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
> - intel_de_posting_read(dev_priv, intel_sdvo-
> >sdvo_reg);
> + intel_de_write(display, intel_sdvo->sdvo_reg, val);
> + intel_de_posting_read(display, intel_sdvo-
> >sdvo_reg);
> }
> return;
> }
>
> if (intel_sdvo->base.port == PORT_B)
> - cval = intel_de_read(dev_priv, GEN3_SDVOC);
> + cval = intel_de_read(display, GEN3_SDVOC);
> else
> - bval = intel_de_read(dev_priv, GEN3_SDVOB);
> + bval = intel_de_read(display, GEN3_SDVOB);
>
> /*
> * Write the registers twice for luck. Sometimes, @@ -243,17 +243,17
> @@ static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32
> val)
> * The BIOS does this too. Yay, magic
> */
> for (i = 0; i < 2; i++) {
> - intel_de_write(dev_priv, GEN3_SDVOB, bval);
> - intel_de_posting_read(dev_priv, GEN3_SDVOB);
> + intel_de_write(display, GEN3_SDVOB, bval);
> + intel_de_posting_read(display, GEN3_SDVOB);
>
> - intel_de_write(dev_priv, GEN3_SDVOC, cval);
> - intel_de_posting_read(dev_priv, GEN3_SDVOC);
> + intel_de_write(display, GEN3_SDVOC, cval);
> + intel_de_posting_read(display, GEN3_SDVOC);
> }
> }
>
> static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8
> *ch) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct i2c_msg msgs[] = {
> {
> .addr = intel_sdvo->target_addr,
> @@ -273,7 +273,7 @@ static bool intel_sdvo_read_byte(struct intel_sdvo
> *intel_sdvo, u8 addr, u8 *ch)
> if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
> return true;
>
> - drm_dbg_kms(&i915->drm, "i2c transfer returned %d\n", ret);
> + drm_dbg_kms(display->drm, "i2c transfer returned %d\n", ret);
> return false;
> }
>
> @@ -415,7 +415,7 @@ static const char *sdvo_cmd_name(u8 cmd) static
> void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
> const void *args, int args_len)
> {
> - struct drm_i915_private *dev_priv = to_i915(intel_sdvo-
> >base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> const char *cmd_name;
> int i, pos = 0;
> char buffer[64];
> @@ -436,10 +436,10 @@ static void intel_sdvo_debug_write(struct
> intel_sdvo *intel_sdvo, u8 cmd,
> else
> BUF_PRINT("(%02X)", cmd);
>
> - drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
> + drm_WARN_ON(display->drm, pos >= sizeof(buffer) - 1);
> #undef BUF_PRINT
>
> - drm_dbg_kms(&dev_priv->drm, "%s: W: %02X %s\n",
> SDVO_NAME(intel_sdvo),
> + drm_dbg_kms(display->drm, "%s: W: %02X %s\n",
> SDVO_NAME(intel_sdvo),
> cmd, buffer);
> }
>
> @@ -465,7 +465,7 @@ static bool __intel_sdvo_write_cmd(struct intel_sdvo
> *intel_sdvo, u8 cmd,
> const void *args, int args_len,
> bool unlocked)
> {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> u8 *buf, status;
> struct i2c_msg *msgs;
> int i, ret = true;
> @@ -515,13 +515,13 @@ static bool __intel_sdvo_write_cmd(struct
> intel_sdvo *intel_sdvo, u8 cmd,
> else
> ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
> if (ret < 0) {
> - drm_dbg_kms(&i915->drm, "I2c transfer returned %d\n",
> ret);
> + drm_dbg_kms(display->drm, "I2c transfer returned %d\n",
> ret);
> ret = false;
> goto out;
> }
> if (ret != i+3) {
> /* failure in I2C transfer */
> - drm_dbg_kms(&i915->drm, "I2c transfer returned
> %d/%d\n", ret, i+3);
> + drm_dbg_kms(display->drm, "I2c transfer returned
> %d/%d\n", ret, i +
> +3);
> ret = false;
> }
>
> @@ -540,7 +540,7 @@ static bool intel_sdvo_write_cmd(struct intel_sdvo
> *intel_sdvo, u8 cmd, static bool intel_sdvo_read_response(struct intel_sdvo
> *intel_sdvo,
> void *response, int response_len) {
> - struct drm_i915_private *dev_priv = to_i915(intel_sdvo-
> >base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> const char *cmd_status;
> u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
> u8 status;
> @@ -605,15 +605,15 @@ static bool intel_sdvo_read_response(struct
> intel_sdvo *intel_sdvo,
> BUF_PRINT(" %02X", ((u8 *)response)[i]);
> }
>
> - drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
> + drm_WARN_ON(display->drm, pos >= sizeof(buffer) - 1);
> #undef BUF_PRINT
>
> - drm_dbg_kms(&dev_priv->drm, "%s: R: %s\n",
> + drm_dbg_kms(display->drm, "%s: R: %s\n",
> SDVO_NAME(intel_sdvo), buffer);
> return true;
>
> log_fail:
> - drm_dbg_kms(&dev_priv->drm, "%s: R: ... failed %s\n",
> + drm_dbg_kms(display->drm, "%s: R: ... failed %s\n",
> SDVO_NAME(intel_sdvo), buffer);
> return false;
> }
> @@ -1009,7 +1009,7 @@ static bool intel_sdvo_write_infoframe(struct
> intel_sdvo *intel_sdvo,
> unsigned int if_index, u8 tx_rate,
> const u8 *data, unsigned int length) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> u8 set_buf_index[2] = { if_index, 0 };
> u8 hbuf_size, tmp[8];
> int i;
> @@ -1022,7 +1022,7 @@ static bool intel_sdvo_write_infoframe(struct
> intel_sdvo *intel_sdvo,
> if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
> return false;
>
> - drm_dbg_kms(&i915->drm,
> + drm_dbg_kms(display->drm,
> "writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
> if_index, length, hbuf_size);
>
> @@ -1049,7 +1049,7 @@ static ssize_t intel_sdvo_read_infoframe(struct
> intel_sdvo *intel_sdvo,
> unsigned int if_index,
> u8 *data, unsigned int length)
> {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> u8 set_buf_index[2] = { if_index, 0 };
> u8 hbuf_size, tx_rate, av_split;
> int i;
> @@ -1079,7 +1079,7 @@ static ssize_t intel_sdvo_read_infoframe(struct
> intel_sdvo *intel_sdvo,
> if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
> return false;
>
> - drm_dbg_kms(&i915->drm,
> + drm_dbg_kms(display->drm,
> "reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
> if_index, length, hbuf_size);
>
> @@ -1100,7 +1100,7 @@ static bool
> intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
> struct intel_crtc_state *crtc_state,
> struct drm_connector_state
> *conn_state) {
> - struct drm_i915_private *dev_priv = to_i915(intel_sdvo-
> >base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> @@ -1126,7 +1126,7 @@ static bool
> intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
>
> HDMI_QUANTIZATION_RANGE_FULL);
>
> ret = hdmi_avi_infoframe_check(frame);
> - if (drm_WARN_ON(&dev_priv->drm, ret))
> + if (drm_WARN_ON(display->drm, ret))
> return false;
>
> return true;
> @@ -1135,7 +1135,7 @@ static bool
> intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo, static bool
> intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
> const struct intel_crtc_state
> *crtc_state) {
> - struct drm_i915_private *dev_priv = to_i915(intel_sdvo-
> >base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
> const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
> ssize_t len;
> @@ -1144,12 +1144,12 @@ static bool intel_sdvo_set_avi_infoframe(struct
> intel_sdvo *intel_sdvo,
> intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) ==
> 0)
> return true;
>
> - if (drm_WARN_ON(&dev_priv->drm,
> + if (drm_WARN_ON(display->drm,
> frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
> return false;
>
> len = hdmi_infoframe_pack_only(frame, sdvo_data,
> sizeof(sdvo_data));
> - if (drm_WARN_ON(&dev_priv->drm, len < 0))
> + if (drm_WARN_ON(display->drm, len < 0))
> return false;
>
> return intel_sdvo_write_infoframe(intel_sdvo,
> SDVO_HBUF_INDEX_AVI_IF, @@ -1160,7 +1160,7 @@ static bool
> intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo, static void
> intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
> struct intel_crtc_state *crtc_state) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
> union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
> ssize_t len;
> @@ -1172,7 +1172,7 @@ static void intel_sdvo_get_avi_infoframe(struct
> intel_sdvo *intel_sdvo,
> len = intel_sdvo_read_infoframe(intel_sdvo,
> SDVO_HBUF_INDEX_AVI_IF,
> sdvo_data, sizeof(sdvo_data));
> if (len < 0) {
> - drm_dbg_kms(&i915->drm, "failed to read AVI
> infoframe\n");
> + drm_dbg_kms(display->drm, "failed to read AVI
> infoframe\n");
> return;
> } else if (len == 0) {
> return;
> @@ -1183,12 +1183,12 @@ static void intel_sdvo_get_avi_infoframe(struct
> intel_sdvo *intel_sdvo,
>
> ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
> if (ret) {
> - drm_dbg_kms(&i915->drm, "Failed to unpack AVI
> infoframe\n");
> + drm_dbg_kms(display->drm, "Failed to unpack AVI
> infoframe\n");
> return;
> }
>
> if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
> - drm_dbg_kms(&i915->drm,
> + drm_dbg_kms(display->drm,
> "Found the wrong infoframe type 0x%x (expected
> 0x%02x)\n",
> frame->any.type, HDMI_INFOFRAME_TYPE_AVI); }
> @@ -1196,7 +1196,7 @@ static void intel_sdvo_get_avi_infoframe(struct
> intel_sdvo *intel_sdvo, static void intel_sdvo_get_eld(struct intel_sdvo
> *intel_sdvo,
> struct intel_crtc_state *crtc_state) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> ssize_t len;
> u8 val;
>
> @@ -1212,7 +1212,7 @@ static void intel_sdvo_get_eld(struct intel_sdvo
> *intel_sdvo,
> len = intel_sdvo_read_infoframe(intel_sdvo,
> SDVO_HBUF_INDEX_ELD,
> crtc_state->eld, sizeof(crtc_state-
> >eld));
> if (len < 0)
> - drm_dbg_kms(&i915->drm, "failed to read ELD\n");
> + drm_dbg_kms(display->drm, "failed to read ELD\n");
> }
>
> static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo, @@ -
> 1282,7 +1282,7 @@ intel_sdvo_get_preferred_input_mode(struct
> intel_sdvo *intel_sdvo,
>
> static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) {
> - struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc-
> >dev);
> + struct intel_display *display = to_intel_display(pipe_config);
> unsigned int dotclock = pipe_config->hw.adjusted_mode.crtc_clock;
> struct dpll *clock = &pipe_config->dpll;
>
> @@ -1303,7 +1303,7 @@ static int i9xx_adjust_sdvo_tv_clock(struct
> intel_crtc_state *pipe_config)
> clock->m1 = 12;
> clock->m2 = 8;
> } else {
> - drm_dbg_kms(&dev_priv->drm,
> + drm_dbg_kms(display->drm,
> "SDVO TV clock out of range: %i\n", dotclock);
> return -EINVAL;
> }
> @@ -1359,6 +1359,7 @@ static int intel_sdvo_compute_config(struct
> intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state)
> {
> + struct intel_display *display = to_intel_display(encoder);
> struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
> struct intel_sdvo_connector *intel_sdvo_connector = @@ -1366,13
> +1367,13 @@ static int intel_sdvo_compute_config(struct intel_encoder
> *encoder,
> struct drm_display_mode *adjusted_mode = &pipe_config-
> >hw.adjusted_mode;
> struct drm_display_mode *mode = &pipe_config->hw.mode;
>
> - if (HAS_PCH_SPLIT(to_i915(encoder->base.dev))) {
> + if (HAS_PCH_SPLIT(i915)) {
> pipe_config->has_pch_encoder = true;
> if (!intel_fdi_compute_pipe_bpp(pipe_config))
> return -EINVAL;
> }
>
> - drm_dbg_kms(&i915->drm, "forcing bpc to 8 for SDVO\n");
> + drm_dbg_kms(display->drm, "forcing bpc to 8 for SDVO\n");
> /* FIXME: Don't increase pipe_bpp */
> pipe_config->pipe_bpp = 8*3;
> pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; @@ -
> 1451,7 +1452,7 @@ static int intel_sdvo_compute_config(struct
> intel_encoder *encoder,
>
> if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
> pipe_config, conn_state)) {
> - drm_dbg_kms(&i915->drm, "bad AVI infoframe\n");
> + drm_dbg_kms(display->drm, "bad AVI infoframe\n");
> return -EINVAL;
> }
>
> @@ -1525,6 +1526,7 @@ static void intel_sdvo_pre_enable(struct
> intel_atomic_state *state,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state) {
> + struct intel_display *display = to_intel_display(intel_encoder);
> struct drm_i915_private *dev_priv = to_i915(intel_encoder-
> >base.dev);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> const struct drm_display_mode *adjusted_mode = &crtc_state-
> >hw.adjusted_mode; @@ -1570,7 +1572,7 @@ static void
> intel_sdvo_pre_enable(struct intel_atomic_state *state,
> intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
> }
> if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
> - drm_info(&dev_priv->drm,
> + drm_info(display->drm,
> "Setting output timings on %s failed\n",
> SDVO_NAME(intel_sdvo));
>
> @@ -1600,13 +1602,13 @@ static void intel_sdvo_pre_enable(struct
> intel_atomic_state *state,
> if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
> input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
> if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
> - drm_info(&dev_priv->drm,
> + drm_info(display->drm,
> "Setting input timings on %s failed\n",
> SDVO_NAME(intel_sdvo));
>
> switch (crtc_state->pixel_multiplier) {
> default:
> - drm_WARN(&dev_priv->drm, 1,
> + drm_WARN(display->drm, 1,
> "unknown pixel multiplier specified\n");
> fallthrough;
> case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; @@ -1617,14
> +1619,14 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state
> *state,
> return;
>
> /* Set the SDVO control regs. */
> - if (DISPLAY_VER(dev_priv) >= 4) {
> + if (DISPLAY_VER(display) >= 4) {
> /* The real mode polarity is set by the SDVO commands,
> using
> * struct intel_sdvo_dtd. */
> sdvox = SDVO_VSYNC_ACTIVE_HIGH |
> SDVO_HSYNC_ACTIVE_HIGH;
> - if (DISPLAY_VER(dev_priv) < 5)
> + if (DISPLAY_VER(display) < 5)
> sdvox |= SDVO_BORDER_ENABLE;
> } else {
> - sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
> + sdvox = intel_de_read(display, intel_sdvo->sdvo_reg);
> if (intel_sdvo->base.port == PORT_B)
> sdvox &= SDVOB_PRESERVE_MASK;
> else
> @@ -1637,10 +1639,10 @@ static void intel_sdvo_pre_enable(struct
> intel_atomic_state *state,
> else
> sdvox |= SDVO_PIPE_SEL(crtc->pipe);
>
> - if (DISPLAY_VER(dev_priv) >= 4) {
> + if (DISPLAY_VER(display) >= 4) {
> /* done in crtc_mode_set as the dpll_md reg must be
> written early */
> - } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
> - IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
> + } else if (display->platform.i945g || display->platform.i945gm ||
> + display->platform.g33 || display->platform.pineview) {
> /* done in crtc_mode_set as it lives inside the dpll register
> */
> } else {
> sdvox |= (crtc_state->pixel_multiplier - 1) @@ -1648,7
> +1650,7 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state
> *state,
> }
>
> if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
> - DISPLAY_VER(dev_priv) < 5)
> + DISPLAY_VER(display) < 5)
> sdvox |= SDVO_STALL_SELECT;
> intel_sdvo_write_sdvox(intel_sdvo, sdvox); } @@ -1665,17 +1667,18
> @@ static bool intel_sdvo_connector_get_hw_state(struct intel_connector
> *connector)
> return active_outputs & intel_sdvo_connector->output_flag;
> }
>
> -bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
> +bool intel_sdvo_port_enabled(struct intel_display *display,
> i915_reg_t sdvo_reg, enum pipe *pipe) {
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 val;
>
> - val = intel_de_read(dev_priv, sdvo_reg);
> + val = intel_de_read(display, sdvo_reg);
>
> /* asserts want to know the pipe even if the port is disabled */
> if (HAS_PCH_CPT(dev_priv))
> *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >>
> SDVO_PIPE_SEL_SHIFT_CPT;
> - else if (IS_CHERRYVIEW(dev_priv))
> + else if (display->platform.cherryview)
> *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >>
> SDVO_PIPE_SEL_SHIFT_CHV;
> else
> *pipe = (val & SDVO_PIPE_SEL_MASK) >>
> SDVO_PIPE_SEL_SHIFT; @@ -1686,14 +1689,14 @@ bool
> intel_sdvo_port_enabled(struct drm_i915_private *dev_priv, static bool
> intel_sdvo_get_hw_state(struct intel_encoder *encoder,
> enum pipe *pipe)
> {
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> + struct intel_display *display = to_intel_display(encoder);
> struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
> u16 active_outputs = 0;
> bool ret;
>
> intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
>
> - ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg,
> pipe);
> + ret = intel_sdvo_port_enabled(display, intel_sdvo->sdvo_reg, pipe);
>
> return ret || active_outputs;
> }
> @@ -1701,8 +1704,7 @@ static bool intel_sdvo_get_hw_state(struct
> intel_encoder *encoder, static void intel_sdvo_get_config(struct
> intel_encoder *encoder,
> struct intel_crtc_state *pipe_config) {
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct intel_display *display = to_intel_display(encoder);
> struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
> struct intel_sdvo_dtd dtd;
> int encoder_pixel_multiplier = 0;
> @@ -1713,7 +1715,7 @@ static void intel_sdvo_get_config(struct
> intel_encoder *encoder,
>
> pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
>
> - sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
> + sdvox = intel_de_read(display, intel_sdvo->sdvo_reg);
>
> ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
> if (!ret) {
> @@ -1721,7 +1723,7 @@ static void intel_sdvo_get_config(struct
> intel_encoder *encoder,
> * Some sdvo encoders are not spec compliant and don't
> * implement the mandatory get_timings function.
> */
> - drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n");
> + drm_dbg_kms(display->drm, "failed to retrieve SDVO
> DTD\n");
> pipe_config->quirks |=
> PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
> } else {
> if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) @@ -
> 1744,7 +1746,7 @@ static void intel_sdvo_get_config(struct intel_encoder
> *encoder,
> * encoder->get_config we so already have a valid pixel multiplier on
> all
> * other platforms.
> */
> - if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
> + if (display->platform.i915g || display->platform.i915gm) {
> pipe_config->pixel_multiplier =
> ((sdvox & SDVO_PORT_MULTIPLY_MASK)
> >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
> @@ -1773,7 +1775,7 @@ static void intel_sdvo_get_config(struct
> intel_encoder *encoder,
> }
> }
>
> - drm_WARN(dev,
> + drm_WARN(display->drm,
> encoder_pixel_multiplier != pipe_config->pixel_multiplier,
> "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
> pipe_config->pixel_multiplier, encoder_pixel_multiplier);
> @@ -1849,7 +1851,7 @@ static void intel_disable_sdvo(struct
> intel_atomic_state *state,
> intel_sdvo_set_encoder_power_state(intel_sdvo,
> DRM_MODE_DPMS_OFF);
>
> - temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
> + temp = intel_de_read(display, intel_sdvo->sdvo_reg);
>
> temp &= ~SDVO_ENABLE;
> intel_sdvo_write_sdvox(intel_sdvo, temp); @@ -1900,8 +1902,7 @@
> static void intel_enable_sdvo(struct intel_atomic_state *state,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state) {
> - struct drm_device *dev = encoder->base.dev;
> - struct drm_i915_private *dev_priv = to_i915(dev);
> + struct intel_display *display = to_intel_display(encoder);
> struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
> struct intel_sdvo_connector *intel_sdvo_connector =
> to_intel_sdvo_connector(conn_state->connector);
> @@ -1911,7 +1912,7 @@ static void intel_enable_sdvo(struct
> intel_atomic_state *state,
> int i;
> bool success;
>
> - temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
> + temp = intel_de_read(display, intel_sdvo->sdvo_reg);
> temp |= SDVO_ENABLE;
> intel_sdvo_write_sdvox(intel_sdvo, temp);
>
> @@ -1926,7 +1927,7 @@ static void intel_enable_sdvo(struct
> intel_atomic_state *state,
> * a given it the status is a success, we succeeded.
> */
> if (success && !input1) {
> - drm_dbg_kms(&dev_priv->drm,
> + drm_dbg_kms(display->drm,
> "First %s output reported failure to sync\n",
> SDVO_NAME(intel_sdvo));
> }
> @@ -1941,12 +1942,13 @@ static enum drm_mode_status
> intel_sdvo_mode_valid(struct drm_connector *connector,
> const struct drm_display_mode *mode) {
> + struct intel_display *display = to_intel_display(connector->dev);
Why not &i915->display and declare this after i915 declaration
Otherwise LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> struct drm_i915_private *i915 = to_i915(connector->dev);
> struct intel_sdvo *intel_sdvo =
> intel_attached_sdvo(to_intel_connector(connector));
> struct intel_sdvo_connector *intel_sdvo_connector =
> to_intel_sdvo_connector(connector);
> bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector,
> connector->state);
> - int max_dotclk = i915->display.cdclk.max_dotclk_freq;
> + int max_dotclk = display->cdclk.max_dotclk_freq;
> enum drm_mode_status status;
> int clock = mode->clock;
>
> @@ -1982,14 +1984,15 @@ intel_sdvo_mode_valid(struct drm_connector
> *connector,
>
> static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct
> intel_sdvo_caps *caps) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> +
> BUILD_BUG_ON(sizeof(*caps) != 8);
> if (!intel_sdvo_get_value(intel_sdvo,
> SDVO_CMD_GET_DEVICE_CAPS,
> caps, sizeof(*caps)))
> return false;
>
> - drm_dbg_kms(&i915->drm, "SDVO capabilities:\n"
> + drm_dbg_kms(display->drm, "SDVO capabilities:\n"
> " vendor_id: %d\n"
> " device_id: %d\n"
> " device_rev_id: %d\n"
> @@ -2031,17 +2034,17 @@ static u8 intel_sdvo_get_colorimetry_cap(struct
> intel_sdvo *intel_sdvo)
>
> static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo) {
> - struct drm_i915_private *dev_priv = to_i915(intel_sdvo-
> >base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> u16 hotplug;
>
> - if (!I915_HAS_HOTPLUG(dev_priv))
> + if (!I915_HAS_HOTPLUG(display))
> return 0;
>
> /*
> * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's
> noise
> * on the line.
> */
> - if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
> + if (display->platform.i945g || display->platform.i945gm)
> return 0;
>
> if (!intel_sdvo_get_value(intel_sdvo,
> SDVO_CMD_GET_HOT_PLUG_SUPPORT, @@ -2138,13 +2141,12 @@ static
> enum drm_connector_status intel_sdvo_detect(struct drm_connector
> *connector, bool force) {
> struct intel_display *display = to_intel_display(connector->dev);
> - struct drm_i915_private *i915 = to_i915(connector->dev);
> struct intel_sdvo *intel_sdvo =
> intel_attached_sdvo(to_intel_connector(connector));
> struct intel_sdvo_connector *intel_sdvo_connector =
> to_intel_sdvo_connector(connector);
> enum drm_connector_status ret;
> u16 response;
>
> - drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
> + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
> connector->base.id, connector->name);
>
> if (!intel_display_device_enabled(display))
> @@ -2162,7 +2164,7 @@ intel_sdvo_detect(struct drm_connector
> *connector, bool force)
> &response, 2))
> return connector_status_unknown;
>
> - drm_dbg_kms(&i915->drm, "SDVO response %d %d [%x]\n",
> + drm_dbg_kms(display->drm, "SDVO response %d %d [%x]\n",
> response & 0xff, response >> 8,
> intel_sdvo_connector->output_flag);
>
> @@ -2301,7 +2303,6 @@ static int intel_sdvo_get_tv_modes(struct
> drm_connector *connector) {
> struct intel_display *display = to_intel_display(connector->dev);
> struct intel_sdvo *intel_sdvo =
> intel_attached_sdvo(to_intel_connector(connector));
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> struct intel_sdvo_connector *intel_sdvo_connector =
> to_intel_sdvo_connector(connector);
> const struct drm_connector_state *conn_state = connector->state;
> @@ -2310,7 +2311,7 @@ static int intel_sdvo_get_tv_modes(struct
> drm_connector *connector)
> int num_modes = 0;
> int i;
>
> - drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
> + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
> connector->base.id, connector->name);
>
> if (!intel_display_driver_check_access(display))
> @@ -2352,9 +2353,9 @@ static int intel_sdvo_get_tv_modes(struct
> drm_connector *connector)
>
> static int intel_sdvo_get_lvds_modes(struct drm_connector *connector) {
> - struct drm_i915_private *dev_priv = to_i915(connector->dev);
> + struct intel_display *display = to_intel_display(connector->dev);
>
> - drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
> + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s]\n",
> connector->base.id, connector->name);
>
> return intel_panel_get_modes(to_intel_connector(connector));
> @@ -2618,14 +2619,14 @@ static struct intel_sdvo_ddc *
> intel_sdvo_select_ddc_bus(struct intel_sdvo *sdvo,
> struct intel_sdvo_connector *connector) {
> - struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&sdvo->base);
> const struct sdvo_device_mapping *mapping;
> int ddc_bus;
>
> if (sdvo->base.port == PORT_B)
> - mapping = &dev_priv->display.vbt.sdvo_mappings[0];
> + mapping = &display->vbt.sdvo_mappings[0];
> else
> - mapping = &dev_priv->display.vbt.sdvo_mappings[1];
> + mapping = &display->vbt.sdvo_mappings[1];
>
> if (mapping->initialized)
> ddc_bus = (mapping->ddc_pin & 0xf0) >> 4; @@ -2642,14
> +2643,13 @@ static void intel_sdvo_select_i2c_bus(struct intel_sdvo *sdvo)
> {
> struct intel_display *display = to_intel_display(&sdvo->base);
> - struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
> const struct sdvo_device_mapping *mapping;
> u8 pin;
>
> if (sdvo->base.port == PORT_B)
> - mapping = &dev_priv->display.vbt.sdvo_mappings[0];
> + mapping = &display->vbt.sdvo_mappings[0];
> else
> - mapping = &dev_priv->display.vbt.sdvo_mappings[1];
> + mapping = &display->vbt.sdvo_mappings[1];
>
> if (mapping->initialized &&
> intel_gmbus_is_valid_pin(display, mapping->i2c_pin)) @@ -2657,7
> +2657,7 @@ intel_sdvo_select_i2c_bus(struct intel_sdvo *sdvo)
> else
> pin = GMBUS_PIN_DPB;
>
> - drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s] I2C pin %d,
> target addr 0x%x\n",
> + drm_dbg_kms(display->drm, "[ENCODER:%d:%s] I2C pin %d, target
> addr
> +0x%x\n",
> sdvo->base.base.base.id, sdvo->base.base.name,
> pin, sdvo->target_addr);
>
> @@ -2687,15 +2687,15 @@ intel_sdvo_is_hdmi_connector(struct intel_sdvo
> *intel_sdvo) static u8 intel_sdvo_get_target_addr(struct intel_sdvo *sdvo)
> {
> - struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&sdvo->base);
> const struct sdvo_device_mapping *my_mapping, *other_mapping;
>
> if (sdvo->base.port == PORT_B) {
> - my_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
> - other_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
> + my_mapping = &display->vbt.sdvo_mappings[0];
> + other_mapping = &display->vbt.sdvo_mappings[1];
> } else {
> - my_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
> - other_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
> + my_mapping = &display->vbt.sdvo_mappings[1];
> + other_mapping = &display->vbt.sdvo_mappings[0];
> }
>
> /* If the BIOS described our SDVO device, take advantage of it. */
> @@ -2731,7 +2731,7 @@ static int intel_sdvo_connector_init(struct
> intel_sdvo_connector *connector,
> struct intel_sdvo *encoder)
> {
> - struct drm_i915_private *i915 = to_i915(encoder->base.base.dev);
> + struct intel_display *display = to_intel_display(&encoder->base);
> struct intel_sdvo_ddc *ddc = NULL;
> int ret;
>
> @@ -2756,7 +2756,7 @@ intel_sdvo_connector_init(struct
> intel_sdvo_connector *connector,
> intel_connector_attach_encoder(&connector->base, &encoder-
> >base);
>
> if (ddc)
> - drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] using
> %s\n",
> + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] using
> %s\n",
> connector->base.base.base.id, connector-
> >base.base.name,
> ddc->ddc.name);
>
> @@ -2799,14 +2799,14 @@ static struct intel_sdvo_connector
> *intel_sdvo_connector_alloc(void) static bool intel_sdvo_dvi_init(struct
> intel_sdvo *intel_sdvo, u16 type) {
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct drm_encoder *encoder = &intel_sdvo->base.base;
> struct drm_connector *connector;
> struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
> - struct drm_i915_private *i915 = to_i915(intel_encoder->base.dev);
> struct intel_connector *intel_connector;
> struct intel_sdvo_connector *intel_sdvo_connector;
>
> - drm_dbg_kms(&i915->drm, "initialising DVI type 0x%x\n", type);
> + drm_dbg_kms(display->drm, "initialising DVI type 0x%x\n", type);
>
> intel_sdvo_connector = intel_sdvo_connector_alloc();
> if (!intel_sdvo_connector)
> @@ -2852,13 +2852,13 @@ intel_sdvo_dvi_init(struct intel_sdvo
> *intel_sdvo, u16 type) static bool intel_sdvo_tv_init(struct intel_sdvo
> *intel_sdvo, u16 type) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct drm_encoder *encoder = &intel_sdvo->base.base;
> struct drm_connector *connector;
> struct intel_connector *intel_connector;
> struct intel_sdvo_connector *intel_sdvo_connector;
>
> - drm_dbg_kms(&i915->drm, "initialising TV type 0x%x\n", type);
> + drm_dbg_kms(display->drm, "initialising TV type 0x%x\n", type);
>
> intel_sdvo_connector = intel_sdvo_connector_alloc();
> if (!intel_sdvo_connector)
> @@ -2892,13 +2892,13 @@ intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo,
> u16 type) static bool intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo,
> u16 type) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct drm_encoder *encoder = &intel_sdvo->base.base;
> struct drm_connector *connector;
> struct intel_connector *intel_connector;
> struct intel_sdvo_connector *intel_sdvo_connector;
>
> - drm_dbg_kms(&i915->drm, "initialising analog type 0x%x\n", type);
> + drm_dbg_kms(display->drm, "initialising analog type 0x%x\n", type);
>
> intel_sdvo_connector = intel_sdvo_connector_alloc();
> if (!intel_sdvo_connector)
> @@ -2926,12 +2926,11 @@ intel_sdvo_lvds_init(struct intel_sdvo
> *intel_sdvo, u16 type) {
> struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct drm_encoder *encoder = &intel_sdvo->base.base;
> - struct drm_i915_private *i915 = to_i915(encoder->dev);
> struct drm_connector *connector;
> struct intel_connector *intel_connector;
> struct intel_sdvo_connector *intel_sdvo_connector;
>
> - drm_dbg_kms(&i915->drm, "initialising LVDS type 0x%x\n", type);
> + drm_dbg_kms(display->drm, "initialising LVDS type 0x%x\n", type);
>
> intel_sdvo_connector = intel_sdvo_connector_alloc();
> if (!intel_sdvo_connector)
> @@ -2961,12 +2960,12 @@ intel_sdvo_lvds_init(struct intel_sdvo
> *intel_sdvo, u16 type)
> intel_panel_add_vbt_sdvo_fixed_mode(intel_connector);
>
> if (!intel_panel_preferred_fixed_mode(intel_connector)) {
> - mutex_lock(&i915->drm.mode_config.mutex);
> + mutex_lock(&display->drm->mode_config.mutex);
>
> intel_ddc_get_modes(connector, connector->ddc);
> intel_panel_add_edid_fixed_modes(intel_connector, false);
>
> - mutex_unlock(&i915->drm.mode_config.mutex);
> + mutex_unlock(&display->drm->mode_config.mutex);
> }
>
> intel_panel_init(intel_connector, NULL); @@ -3015,7 +3014,7 @@
> static bool intel_sdvo_output_init(struct intel_sdvo *sdvo, u16 type) static
> bool intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> static const u16 probe_order[] = {
> SDVO_OUTPUT_TMDS0,
> SDVO_OUTPUT_TMDS1,
> @@ -3034,7 +3033,7 @@ intel_sdvo_output_setup(struct intel_sdvo
> *intel_sdvo)
> flags = intel_sdvo_filter_output_flags(intel_sdvo-
> >caps.output_flags);
>
> if (flags == 0) {
> - drm_dbg_kms(&i915->drm,
> + drm_dbg_kms(display->drm,
> "%s: Unknown SDVO output type (0x%04x)\n",
> SDVO_NAME(intel_sdvo), intel_sdvo-
> >caps.output_flags);
> return false;
> @@ -3057,11 +3056,11 @@ intel_sdvo_output_setup(struct intel_sdvo
> *intel_sdvo)
>
> static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) {
> - struct drm_device *dev = intel_sdvo->base.base.dev;
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct drm_connector *connector, *tmp;
>
> list_for_each_entry_safe(connector, tmp,
> - &dev->mode_config.connector_list, head) {
> + &display->drm-
> >mode_config.connector_list, head) {
> if (intel_attached_encoder(to_intel_connector(connector))
> == &intel_sdvo->base) {
> drm_connector_unregister(connector);
> intel_connector_destroy(connector);
> @@ -3073,7 +3072,7 @@ static bool intel_sdvo_tv_create_property(struct
> intel_sdvo *intel_sdvo,
> struct intel_sdvo_connector
> *intel_sdvo_connector,
> int type)
> {
> - struct drm_device *dev = intel_sdvo->base.base.dev;
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct intel_sdvo_tv_format format;
> u32 format_map, i;
>
> @@ -3098,7 +3097,7 @@ static bool intel_sdvo_tv_create_property(struct
> intel_sdvo *intel_sdvo,
>
>
> intel_sdvo_connector->tv_format =
> - drm_property_create(dev, DRM_MODE_PROP_ENUM,
> + drm_property_create(display->drm,
> DRM_MODE_PROP_ENUM,
> "mode", intel_sdvo_connector-
> >format_supported_num);
> if (!intel_sdvo_connector->tv_format)
> return false;
> @@ -3120,12 +3119,12 @@ static bool intel_sdvo_tv_create_property(struct
> intel_sdvo *intel_sdvo,
> !intel_sdvo_get_value(intel_sdvo,
> SDVO_CMD_GET_##NAME, &response, 2)) \
> return false; \
> intel_sdvo_connector->name = \
> - drm_property_create_range(dev, 0, #name, 0,
> data_value[0]); \
> + drm_property_create_range(display->drm, 0, #name,
> 0, data_value[0]);
> +\
> if (!intel_sdvo_connector->name) return false; \
> state_assignment = response; \
> drm_object_attach_property(&connector->base, \
> intel_sdvo_connector->name, 0); \
> - drm_dbg_kms(dev, #name ": max %d, default %d, current
> %d\n", \
> + drm_dbg_kms(display->drm, #name ": max %d, default %d,
> current %d\n",
> +\
> data_value[0], data_value[1], response); \
> } \
> } while (0)
> @@ -3137,8 +3136,7 @@ intel_sdvo_create_enhance_property_tv(struct
> intel_sdvo *intel_sdvo,
> struct intel_sdvo_connector
> *intel_sdvo_connector,
> struct intel_sdvo_enhancements_reply
> enhancements) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> - struct drm_device *dev = intel_sdvo->base.base.dev;
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct drm_connector *connector = &intel_sdvo_connector-
> >base.base;
> struct drm_connector_state *conn_state = connector->state;
> struct intel_sdvo_connector_state *sdvo_state = @@ -3161,7
> +3159,7 @@ intel_sdvo_create_enhance_property_tv(struct intel_sdvo
> *intel_sdvo,
>
> intel_sdvo_connector->max_hscan = data_value[0];
> intel_sdvo_connector->left =
> - drm_property_create_range(dev, 0, "left_margin", 0,
> data_value[0]);
> + drm_property_create_range(display->drm, 0,
> "left_margin", 0,
> +data_value[0]);
> if (!intel_sdvo_connector->left)
> return false;
>
> @@ -3169,13 +3167,13 @@ intel_sdvo_create_enhance_property_tv(struct
> intel_sdvo *intel_sdvo,
> intel_sdvo_connector->left, 0);
>
> intel_sdvo_connector->right =
> - drm_property_create_range(dev, 0, "right_margin",
> 0, data_value[0]);
> + drm_property_create_range(display->drm, 0,
> "right_margin", 0,
> +data_value[0]);
> if (!intel_sdvo_connector->right)
> return false;
>
> drm_object_attach_property(&connector->base,
> intel_sdvo_connector->right, 0);
> - drm_dbg_kms(&i915->drm, "h_overscan: max %d, default
> %d, current %d\n",
> + drm_dbg_kms(display->drm, "h_overscan: max %d, default
> %d, current
> +%d\n",
> data_value[0], data_value[1], response);
> }
>
> @@ -3194,7 +3192,7 @@ intel_sdvo_create_enhance_property_tv(struct
> intel_sdvo *intel_sdvo,
>
> intel_sdvo_connector->max_vscan = data_value[0];
> intel_sdvo_connector->top =
> - drm_property_create_range(dev, 0,
> + drm_property_create_range(display->drm, 0,
> "top_margin", 0,
> data_value[0]);
> if (!intel_sdvo_connector->top)
> return false;
> @@ -3203,14 +3201,14 @@ intel_sdvo_create_enhance_property_tv(struct
> intel_sdvo *intel_sdvo,
> intel_sdvo_connector->top, 0);
>
> intel_sdvo_connector->bottom =
> - drm_property_create_range(dev, 0,
> + drm_property_create_range(display->drm, 0,
> "bottom_margin", 0,
> data_value[0]);
> if (!intel_sdvo_connector->bottom)
> return false;
>
> drm_object_attach_property(&connector->base,
> intel_sdvo_connector->bottom, 0);
> - drm_dbg_kms(&i915->drm, "v_overscan: max %d, default
> %d, current %d\n",
> + drm_dbg_kms(display->drm, "v_overscan: max %d, default
> %d, current
> +%d\n",
> data_value[0], data_value[1], response);
> }
>
> @@ -3233,13 +3231,13 @@ intel_sdvo_create_enhance_property_tv(struct
> intel_sdvo *intel_sdvo,
>
> sdvo_state->tv.dot_crawl = response & 0x1;
> intel_sdvo_connector->dot_crawl =
> - drm_property_create_range(dev, 0, "dot_crawl", 0,
> 1);
> + drm_property_create_range(display->drm, 0,
> "dot_crawl", 0, 1);
> if (!intel_sdvo_connector->dot_crawl)
> return false;
>
> drm_object_attach_property(&connector->base,
> intel_sdvo_connector->dot_crawl,
> 0);
> - drm_dbg_kms(&i915->drm, "dot crawl: current %d\n",
> response);
> + drm_dbg_kms(display->drm, "dot crawl: current %d\n",
> response);
> }
>
> return true;
> @@ -3250,7 +3248,7 @@ intel_sdvo_create_enhance_property_lvds(struct
> intel_sdvo *intel_sdvo,
> struct intel_sdvo_connector
> *intel_sdvo_connector,
> struct
> intel_sdvo_enhancements_reply enhancements) {
> - struct drm_device *dev = intel_sdvo->base.base.dev;
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> struct drm_connector *connector = &intel_sdvo_connector-
> >base.base;
> u16 response, data_value[2];
>
> @@ -3264,7 +3262,7 @@ intel_sdvo_create_enhance_property_lvds(struct
> intel_sdvo *intel_sdvo, static bool
> intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
> struct intel_sdvo_connector
> *intel_sdvo_connector) {
> - struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
> + struct intel_display *display = to_intel_display(&intel_sdvo->base);
> union {
> struct intel_sdvo_enhancements_reply reply;
> u16 response;
> @@ -3276,7 +3274,7 @@ static bool
> intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
>
> SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
> &enhancements, sizeof(enhancements)) ||
> enhancements.response == 0) {
> - drm_dbg_kms(&i915->drm, "No enhancement is
> supported\n");
> + drm_dbg_kms(display->drm, "No enhancement is
> supported\n");
> return true;
> }
>
> @@ -3351,8 +3349,8 @@ static int
> intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
> struct intel_sdvo *sdvo, int ddc_bus) {
> - struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
> - struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
> + struct intel_display *display = to_intel_display(&sdvo->base);
> + struct pci_dev *pdev = to_pci_dev(display->drm->dev);
>
> ddc->sdvo = sdvo;
> ddc->ddc_bus = ddc_bus;
> @@ -3368,25 +3366,26 @@ intel_sdvo_init_ddc_proxy(struct
> intel_sdvo_ddc *ddc,
> return i2c_add_adapter(&ddc->ddc);
> }
>
> -static bool is_sdvo_port_valid(struct drm_i915_private *dev_priv, enum
> port port)
> +static bool is_sdvo_port_valid(struct intel_display *display, enum port
> +port)
> {
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> +
> if (HAS_PCH_SPLIT(dev_priv))
> return port == PORT_B;
> else
> return port == PORT_B || port == PORT_C; }
>
> -static bool assert_sdvo_port_valid(struct drm_i915_private *dev_priv,
> - enum port port)
> +static bool assert_sdvo_port_valid(struct intel_display *display, enum
> +port port)
> {
> - return !drm_WARN(&dev_priv->drm, !is_sdvo_port_valid(dev_priv,
> port),
> + return !drm_WARN(display->drm, !is_sdvo_port_valid(display, port),
> "Platform does not support SDVO %c\n",
> port_name(port)); }
>
> -bool intel_sdvo_init(struct drm_i915_private *dev_priv,
> +bool intel_sdvo_init(struct intel_display *display,
> i915_reg_t sdvo_reg, enum port port) {
> - struct intel_display *display = &dev_priv->display;
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> struct intel_encoder *intel_encoder;
> struct intel_sdvo *intel_sdvo;
> int i;
> @@ -3394,7 +3393,7 @@ bool intel_sdvo_init(struct drm_i915_private
> *dev_priv,
> if (!assert_port_valid(display, port))
> return false;
>
> - if (!assert_sdvo_port_valid(dev_priv, port))
> + if (!assert_sdvo_port_valid(display, port))
> return false;
>
> intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL); @@ -3407,7
> +3406,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
> intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
> intel_encoder->port = port;
>
> - drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
> + drm_encoder_init(display->drm, &intel_encoder->base,
> &intel_sdvo_enc_funcs, 0,
> "SDVO %c", port_name(port));
>
> @@ -3421,7 +3420,7 @@ bool intel_sdvo_init(struct drm_i915_private
> *dev_priv,
> u8 byte;
>
> if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
> - drm_dbg_kms(&dev_priv->drm,
> + drm_dbg_kms(display->drm,
> "No SDVO device found on %s\n",
> SDVO_NAME(intel_sdvo));
> goto err;
> @@ -3459,7 +3458,7 @@ bool intel_sdvo_init(struct drm_i915_private
> *dev_priv,
> }
>
> if (!intel_sdvo_output_setup(intel_sdvo)) {
> - drm_dbg_kms(&dev_priv->drm,
> + drm_dbg_kms(display->drm,
> "SDVO output failed to setup on %s\n",
> SDVO_NAME(intel_sdvo));
> /* Output_setup can leave behind connectors! */ @@ -
> 3496,7 +3495,7 @@ bool intel_sdvo_init(struct drm_i915_private *dev_priv,
> &intel_sdvo-
> >pixel_clock_max))
> goto err_output;
>
> - drm_dbg_kms(&dev_priv->drm, "%s device VID/DID:
> %02X:%02X.%02X, "
> + drm_dbg_kms(display->drm, "%s device VID/DID: %02X:%02X.%02X, "
> "clock range %dMHz - %dMHz, "
> "num inputs: %d, "
> "output 1: %c, output 2: %c\n",
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.h
> b/drivers/gpu/drm/i915/display/intel_sdvo.h
> index d1815b4103d4..1a9e40fdd8a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.h
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.h
> @@ -10,22 +10,22 @@
>
> #include "i915_reg_defs.h"
>
> -struct drm_i915_private;
> enum pipe;
> enum port;
> +struct intel_display;
>
> #ifdef I915
> -bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
> +bool intel_sdvo_port_enabled(struct intel_display *display,
> i915_reg_t sdvo_reg, enum pipe *pipe); -bool
> intel_sdvo_init(struct drm_i915_private *dev_priv,
> +bool intel_sdvo_init(struct intel_display *display,
> i915_reg_t reg, enum port port); #else -static inline bool
> intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
> +static inline bool intel_sdvo_port_enabled(struct intel_display
> +*display,
> i915_reg_t sdvo_reg, enum pipe
> *pipe) {
> return false;
> }
> -static inline bool intel_sdvo_init(struct drm_i915_private *dev_priv,
> +static inline bool intel_sdvo_init(struct intel_display *display,
> i915_reg_t reg, enum port port)
> {
> return false;
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel display
2025-02-13 8:48 ` Kandpal, Suraj
@ 2025-02-13 9:13 ` Jani Nikula
2025-02-13 9:19 ` Kandpal, Suraj
0 siblings, 1 reply; 39+ messages in thread
From: Jani Nikula @ 2025-02-13 9:13 UTC (permalink / raw)
To: Kandpal, Suraj, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
On Thu, 13 Feb 2025, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
>> -----Original Message-----
>> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
>> Nikula
>> Sent: Wednesday, February 12, 2025 10:07 PM
>> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
>> Cc: Nikula, Jani <jani.nikula@intel.com>
>> Subject: [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel
>> display
>>
>> Going forward, struct intel_display is the main display device data pointer.
>> Convert as much as possible of g4x_dp.[ch] to struct intel_display.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/g4x_dp.c | 80 +++++++++----------
>> drivers/gpu/drm/i915/display/g4x_dp.h | 14 ++--
>> drivers/gpu/drm/i915/display/intel_display.c | 20 ++---
>> .../gpu/drm/i915/display/intel_pch_display.c | 2 +-
>> drivers/gpu/drm/i915/display/intel_pps.c | 11 ++-
>> 5 files changed, 61 insertions(+), 66 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
>> b/drivers/gpu/drm/i915/display/g4x_dp.c
>> index d3b5ead188ba..cfc796607a78 100644
>> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
>> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
>> @@ -51,28 +51,29 @@ static const struct dpll chv_dpll[] = {
>> { .dot = 270000, .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 /*
>> 27.0 */ }, };
>>
>> -const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
>> +const struct dpll *vlv_get_dpll(struct intel_display *display)
>> {
>> - return IS_CHERRYVIEW(i915) ? &chv_dpll[0] : &vlv_dpll[0];
>> + return display->platform.cherryview ? &chv_dpll[0] : &vlv_dpll[0];
>> }
>>
>> static void g4x_dp_set_clock(struct intel_encoder *encoder,
>> struct intel_crtc_state *pipe_config) {
>> + struct intel_display *display = to_intel_display(encoder);
>> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> const struct dpll *divisor = NULL;
>> int i, count = 0;
>>
>> - if (IS_G4X(dev_priv)) {
>> + if (display->platform.g4x) {
>> divisor = g4x_dpll;
>> count = ARRAY_SIZE(g4x_dpll);
>> } else if (HAS_PCH_SPLIT(dev_priv)) {
>> divisor = pch_dpll;
>> count = ARRAY_SIZE(pch_dpll);
>> - } else if (IS_CHERRYVIEW(dev_priv)) {
>> + } else if (display->platform.cherryview) {
>> divisor = chv_dpll;
>> count = ARRAY_SIZE(chv_dpll);
>> - } else if (IS_VALLEYVIEW(dev_priv)) {
>> + } else if (display->platform.valleyview) {
>> divisor = vlv_dpll;
>> count = ARRAY_SIZE(vlv_dpll);
>> }
>> @@ -129,7 +130,7 @@ static void intel_dp_prepare(struct intel_encoder
>> *encoder,
>>
>> /* Split out the IBX/CPU vs CPT settings */
>>
>> - if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) {
>> + if (display->platform.ivybridge && port == PORT_A) {
>> if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
>> intel_dp->DP |= DP_SYNC_HS_HIGH;
>> if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) @@
>> -148,7 +149,7 @@ static void intel_dp_prepare(struct intel_encoder
>> *encoder,
>> pipe_config->enhanced_framing ?
>> TRANS_DP_ENH_FRAMING : 0);
>> } else {
>> - if (IS_G4X(dev_priv) && pipe_config->limited_color_range)
>> + if (display->platform.g4x && pipe_config-
>> >limited_color_range)
>> intel_dp->DP |= DP_COLOR_RANGE_16_235;
>>
>> if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) @@
>> -160,7 +161,7 @@ static void intel_dp_prepare(struct intel_encoder
>> *encoder,
>> if (pipe_config->enhanced_framing)
>> intel_dp->DP |= DP_ENHANCED_FRAMING;
>>
>> - if (IS_CHERRYVIEW(dev_priv))
>> + if (display->platform.cherryview)
>> intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe);
>> else
>> intel_dp->DP |= DP_PIPE_SEL(crtc->pipe); @@ -180,9
>> +181,8 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool state)
>> } #define assert_dp_port_disabled(d) assert_dp_port((d), false)
>>
>> -static void assert_edp_pll(struct drm_i915_private *dev_priv, bool state)
>> +static void assert_edp_pll(struct intel_display *display, bool state)
>> {
>> - struct intel_display *display = &dev_priv->display;
>> bool cur_state = intel_de_read(display, DP_A) & DP_PLL_ENABLE;
>>
>> INTEL_DISPLAY_STATE_WARN(display, cur_state != state, @@ -201,7
>> +201,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
>>
>> assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
>> assert_dp_port_disabled(intel_dp);
>> - assert_edp_pll_disabled(dev_priv);
>> + assert_edp_pll_disabled(display);
>>
>> drm_dbg_kms(display->drm, "enabling eDP PLL for clock %d\n",
>> pipe_config->port_clock);
>> @@ -223,7 +223,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
>> * 1. Wait for the start of vertical blank on the enabled pipe going to
>> FDI
>> * 2. Program DP PLL enable
>> */
>> - if (IS_IRONLAKE(dev_priv))
>> + if (display->platform.ironlake)
>> intel_wait_for_vblank_if_active(display, !crtc->pipe);
>>
>> intel_dp->DP |= DP_PLL_ENABLE;
>> @@ -242,7 +242,7 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
>>
>> assert_transcoder_disabled(dev_priv, old_crtc_state-
>> >cpu_transcoder);
>> assert_dp_port_disabled(intel_dp);
>> - assert_edp_pll_enabled(dev_priv);
>> + assert_edp_pll_enabled(display);
>>
>> drm_dbg_kms(display->drm, "disabling eDP PLL\n");
>>
>> @@ -253,10 +253,9 @@ static void ilk_edp_pll_off(struct intel_dp *intel_dp,
>> udelay(200);
>> }
>>
>> -static bool cpt_dp_port_selected(struct drm_i915_private *dev_priv,
>> +static bool cpt_dp_port_selected(struct intel_display *display,
>> enum port port, enum pipe *pipe)
>> {
>> - struct intel_display *display = &dev_priv->display;
>> enum pipe p;
>>
>> for_each_pipe(display, p) {
>> @@ -277,11 +276,11 @@ static bool cpt_dp_port_selected(struct
>> drm_i915_private *dev_priv,
>> return false;
>> }
>>
>> -bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
>> +bool g4x_dp_port_enabled(struct intel_display *display,
>> i915_reg_t dp_reg, enum port port,
>> enum pipe *pipe)
>> {
>> - struct intel_display *display = &dev_priv->display;
>> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>> bool ret;
>> u32 val;
>>
>> @@ -290,11 +289,11 @@ bool g4x_dp_port_enabled(struct
>> drm_i915_private *dev_priv,
>> ret = val & DP_PORT_EN;
>>
>> /* asserts want to know the pipe even if the port is disabled */
>> - if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
>> + if (display->platform.ivybridge && port == PORT_A)
>> *pipe = (val & DP_PIPE_SEL_MASK_IVB) >>
>> DP_PIPE_SEL_SHIFT_IVB;
>> else if (HAS_PCH_CPT(dev_priv) && port != PORT_A)
>> - ret &= cpt_dp_port_selected(dev_priv, port, pipe);
>> - else if (IS_CHERRYVIEW(dev_priv))
>> + ret &= cpt_dp_port_selected(display, port, pipe);
>> + else if (display->platform.cherryview)
>> *pipe = (val & DP_PIPE_SEL_MASK_CHV) >>
>> DP_PIPE_SEL_SHIFT_CHV;
>> else
>> *pipe = (val & DP_PIPE_SEL_MASK) >> DP_PIPE_SEL_SHIFT;
>> @@ -306,7 +305,6 @@ static bool intel_dp_get_hw_state(struct
>> intel_encoder *encoder,
>> enum pipe *pipe)
>> {
>> struct intel_display *display = to_intel_display(encoder);
>> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>> intel_wakeref_t wakeref;
>> bool ret;
>> @@ -316,7 +314,7 @@ static bool intel_dp_get_hw_state(struct
>> intel_encoder *encoder,
>> if (!wakeref)
>> return false;
>>
>> - ret = g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
>> + ret = g4x_dp_port_enabled(display, intel_dp->output_reg,
>> encoder->port, pipe);
>>
>> intel_display_power_put(display, encoder->power_domain,
>> wakeref); @@ -391,7 +389,7 @@ static void intel_dp_get_config(struct
>> intel_encoder *encoder,
>>
>> pipe_config->hw.adjusted_mode.flags |= flags;
>>
>> - if (IS_G4X(dev_priv) && tmp & DP_COLOR_RANGE_16_235)
>> + if (display->platform.g4x && tmp & DP_COLOR_RANGE_16_235)
>> pipe_config->limited_color_range = true;
>>
>> pipe_config->lane_count =
>> @@ -433,7 +431,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
>>
>> drm_dbg_kms(display->drm, "\n");
>>
>> - if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
>> + if ((display->platform.ivybridge && port == PORT_A) ||
>> (HAS_PCH_CPT(dev_priv) && port != PORT_A)) {
>> intel_dp->DP &= ~DP_LINK_TRAIN_MASK_CPT;
>> intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE_CPT; @@ -479,7
>> +477,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
>>
>> msleep(intel_dp->pps.panel_power_down_delay);
>>
>> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>> + if (display->platform.valleyview || display->platform.cherryview)
>> vlv_pps_port_disable(encoder, old_crtc_state); }
>>
>> @@ -682,7 +680,6 @@ static void intel_enable_dp(struct intel_atomic_state
>> *state,
>> const struct drm_connector_state *conn_state) {
>> struct intel_display *display = to_intel_display(state);
>> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>> u32 dp_reg = intel_de_read(display, intel_dp->output_reg);
>> intel_wakeref_t wakeref;
>> @@ -691,7 +688,7 @@ static void intel_enable_dp(struct intel_atomic_state
>> *state,
>> return;
>>
>> with_intel_pps_lock(intel_dp, wakeref) {
>> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>> + if (display->platform.valleyview || display-
>> >platform.cherryview)
>> vlv_pps_port_enable_unlocked(encoder,
>> pipe_config);
>>
>> intel_dp_enable_port(intel_dp, pipe_config); @@ -701,10
>> +698,10 @@ static void intel_enable_dp(struct intel_atomic_state *state,
>> intel_pps_vdd_off_unlocked(intel_dp, true);
>> }
>>
>> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>> + if (display->platform.valleyview || display->platform.cherryview) {
>> unsigned int lane_mask = 0x0;
>>
>> - if (IS_CHERRYVIEW(dev_priv))
>> + if (display->platform.cherryview)
>> lane_mask =
>> intel_dp_unused_lane_mask(pipe_config->lane_count);
>>
>> vlv_wait_port_ready(display, dp_to_dig_port(intel_dp),
>> lane_mask); @@ -1264,7 +1261,6 @@ static void
>> intel_dp_encoder_destroy(struct drm_encoder *encoder) static void
>> intel_dp_encoder_reset(struct drm_encoder *encoder) {
>> struct intel_display *display = to_intel_display(encoder->dev);
>> - struct drm_i915_private *dev_priv = to_i915(encoder->dev);
>
> I know this hasn't changed in this patch and is already there merged in code but a good chance to
> Do to_intel_display(encoder) instead of encoder->dev
to_intel_display() intentionally doesn't handle drm_encoder, so can't.
> Otherwise
> LGTM,
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Thanks, but I've just merged the series with Ville's Reviewed-by.
BR,
Jani.
>
>> struct intel_dp *intel_dp =
>> enc_to_intel_dp(to_intel_encoder(encoder));
>>
>> intel_dp->DP = intel_de_read(display, intel_dp->output_reg); @@ -
>> 1272,7 +1268,7 @@ static void intel_dp_encoder_reset(struct drm_encoder
>> *encoder)
>> intel_dp->reset_link_params = true;
>> intel_dp_invalidate_source_oui(intel_dp);
>>
>> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>> + if (display->platform.valleyview || display->platform.cherryview)
>> vlv_pps_pipe_reset(intel_dp);
>>
>> intel_pps_encoder_reset(intel_dp);
>> @@ -1283,10 +1279,10 @@ static const struct drm_encoder_funcs
>> intel_dp_enc_funcs = {
>> .destroy = intel_dp_encoder_destroy,
>> };
>>
>> -bool g4x_dp_init(struct drm_i915_private *dev_priv,
>> +bool g4x_dp_init(struct intel_display *display,
>> i915_reg_t output_reg, enum port port) {
>> - struct intel_display *display = &dev_priv->display;
>> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>> const struct intel_bios_encoder_data *devdata;
>> struct intel_digital_port *dig_port;
>> struct intel_encoder *intel_encoder;
>> @@ -1337,14 +1333,14 @@ bool g4x_dp_init(struct drm_i915_private
>> *dev_priv,
>> intel_encoder->suspend = intel_dp_encoder_suspend;
>> intel_encoder->suspend_complete = g4x_dp_suspend_complete;
>> intel_encoder->shutdown = intel_dp_encoder_shutdown;
>> - if (IS_CHERRYVIEW(dev_priv)) {
>> + if (display->platform.cherryview) {
>> intel_encoder->pre_pll_enable = chv_dp_pre_pll_enable;
>> intel_encoder->pre_enable = chv_pre_enable_dp;
>> intel_encoder->enable = vlv_enable_dp;
>> intel_encoder->disable = vlv_disable_dp;
>> intel_encoder->post_disable = chv_post_disable_dp;
>> intel_encoder->post_pll_disable = chv_dp_post_pll_disable;
>> - } else if (IS_VALLEYVIEW(dev_priv)) {
>> + } else if (display->platform.valleyview) {
>> intel_encoder->pre_pll_enable = vlv_dp_pre_pll_enable;
>> intel_encoder->pre_enable = vlv_pre_enable_dp;
>> intel_encoder->enable = vlv_enable_dp; @@ -1359,24
>> +1355,24 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
>> intel_encoder->audio_enable = g4x_dp_audio_enable;
>> intel_encoder->audio_disable = g4x_dp_audio_disable;
>>
>> - if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
>> + if ((display->platform.ivybridge && port == PORT_A) ||
>> (HAS_PCH_CPT(dev_priv) && port != PORT_A))
>> dig_port->dp.set_link_train = cpt_set_link_train;
>> else
>> dig_port->dp.set_link_train = g4x_set_link_train;
>>
>> - if (IS_CHERRYVIEW(dev_priv))
>> + if (display->platform.cherryview)
>> intel_encoder->set_signal_levels = chv_set_signal_levels;
>> - else if (IS_VALLEYVIEW(dev_priv))
>> + else if (display->platform.valleyview)
>> intel_encoder->set_signal_levels = vlv_set_signal_levels;
>> - else if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
>> + else if (display->platform.ivybridge && port == PORT_A)
>> intel_encoder->set_signal_levels =
>> ivb_cpu_edp_set_signal_levels;
>> - else if (IS_SANDYBRIDGE(dev_priv) && port == PORT_A)
>> + else if (display->platform.sandybridge && port == PORT_A)
>> intel_encoder->set_signal_levels =
>> snb_cpu_edp_set_signal_levels;
>> else
>> intel_encoder->set_signal_levels = g4x_set_signal_levels;
>>
>> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv) ||
>> + if (display->platform.valleyview || display->platform.cherryview ||
>> (HAS_PCH_SPLIT(dev_priv) && port != PORT_A)) {
>> dig_port->dp.preemph_max = intel_dp_preemph_max_3;
>> dig_port->dp.voltage_max = intel_dp_voltage_max_3; @@ -
>> 1390,7 +1386,7 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
>>
>> intel_encoder->type = INTEL_OUTPUT_DP;
>> intel_encoder->power_domain =
>> intel_display_power_ddi_lanes_domain(display, port);
>> - if (IS_CHERRYVIEW(dev_priv)) {
>> + if (display->platform.cherryview) {
>> if (port == PORT_D)
>> intel_encoder->pipe_mask = BIT(PIPE_C);
>> else
>> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.h
>> b/drivers/gpu/drm/i915/display/g4x_dp.h
>> index 839a251dc069..0b28951b8365 100644
>> --- a/drivers/gpu/drm/i915/display/g4x_dp.h
>> +++ b/drivers/gpu/drm/i915/display/g4x_dp.h
>> @@ -12,30 +12,30 @@
>>
>> enum pipe;
>> enum port;
>> -struct drm_i915_private;
>> struct intel_crtc_state;
>> +struct intel_display;
>> struct intel_dp;
>> struct intel_encoder;
>>
>> #ifdef I915
>> -const struct dpll *vlv_get_dpll(struct drm_i915_private *i915); -bool
>> g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
>> +const struct dpll *vlv_get_dpll(struct intel_display *display); bool
>> +g4x_dp_port_enabled(struct intel_display *display,
>> i915_reg_t dp_reg, enum port port,
>> enum pipe *pipe);
>> -bool g4x_dp_init(struct drm_i915_private *dev_priv,
>> +bool g4x_dp_init(struct intel_display *display,
>> i915_reg_t output_reg, enum port port); #else -static inline
>> const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
>> +static inline const struct dpll *vlv_get_dpll(struct intel_display
>> +*display)
>> {
>> return NULL;
>> }
>> -static inline bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
>> +static inline bool g4x_dp_port_enabled(struct intel_display *display,
>> i915_reg_t dp_reg, int port,
>> enum pipe *pipe)
>> {
>> return false;
>> }
>> -static inline bool g4x_dp_init(struct drm_i915_private *dev_priv,
>> +static inline bool g4x_dp_init(struct intel_display *display,
>> i915_reg_t output_reg, int port) {
>> return false;
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index 6c1e7441313e..e5ceedf56335 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -8229,7 +8229,7 @@ void intel_setup_outputs(struct drm_i915_private
>> *dev_priv)
>> dpd_is_edp = intel_dp_is_port_edp(display, PORT_D);
>>
>> if (ilk_has_edp_a(dev_priv))
>> - g4x_dp_init(dev_priv, DP_A, PORT_A);
>> + g4x_dp_init(display, DP_A, PORT_A);
>>
>> if (intel_de_read(dev_priv, PCH_HDMIB) & SDVO_DETECTED)
>> {
>> /* PCH SDVOB multiplex with HDMIB */ @@ -8237,7
>> +8237,7 @@ void intel_setup_outputs(struct drm_i915_private *dev_priv)
>> if (!found)
>> g4x_hdmi_init(dev_priv, PCH_HDMIB,
>> PORT_B);
>> if (!found && (intel_de_read(dev_priv, PCH_DP_B) &
>> DP_DETECTED))
>> - g4x_dp_init(dev_priv, PCH_DP_B, PORT_B);
>> + g4x_dp_init(display, PCH_DP_B, PORT_B);
>> }
>>
>> if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED)
>> @@ -8247,10 +8247,10 @@ void intel_setup_outputs(struct
>> drm_i915_private *dev_priv)
>> g4x_hdmi_init(dev_priv, PCH_HDMID, PORT_D);
>>
>> if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED)
>> - g4x_dp_init(dev_priv, PCH_DP_C, PORT_C);
>> + g4x_dp_init(display, PCH_DP_C, PORT_C);
>>
>> if (intel_de_read(dev_priv, PCH_DP_D) & DP_DETECTED)
>> - g4x_dp_init(dev_priv, PCH_DP_D, PORT_D);
>> + g4x_dp_init(display, PCH_DP_D, PORT_D);
>> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>> bool has_edp, has_port;
>>
>> @@ -8275,14 +8275,14 @@ void intel_setup_outputs(struct
>> drm_i915_private *dev_priv)
>> has_edp = intel_dp_is_port_edp(display, PORT_B);
>> has_port = intel_bios_is_port_present(display, PORT_B);
>> if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED ||
>> has_port)
>> - has_edp &= g4x_dp_init(dev_priv, VLV_DP_B,
>> PORT_B);
>> + has_edp &= g4x_dp_init(display, VLV_DP_B,
>> PORT_B);
>> if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED
>> || has_port) && !has_edp)
>> g4x_hdmi_init(dev_priv, VLV_HDMIB, PORT_B);
>>
>> has_edp = intel_dp_is_port_edp(display, PORT_C);
>> has_port = intel_bios_is_port_present(display, PORT_C);
>> if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED ||
>> has_port)
>> - has_edp &= g4x_dp_init(dev_priv, VLV_DP_C,
>> PORT_C);
>> + has_edp &= g4x_dp_init(display, VLV_DP_C,
>> PORT_C);
>> if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED
>> || has_port) && !has_edp)
>> g4x_hdmi_init(dev_priv, VLV_HDMIC, PORT_C);
>>
>> @@ -8293,7 +8293,7 @@ void intel_setup_outputs(struct drm_i915_private
>> *dev_priv)
>> */
>> has_port = intel_bios_is_port_present(display,
>> PORT_D);
>> if (intel_de_read(dev_priv, CHV_DP_D) &
>> DP_DETECTED || has_port)
>> - g4x_dp_init(dev_priv, CHV_DP_D, PORT_D);
>> + g4x_dp_init(display, CHV_DP_D, PORT_D);
>> if (intel_de_read(dev_priv, CHV_HDMID) &
>> SDVO_DETECTED || has_port)
>> g4x_hdmi_init(dev_priv, CHV_HDMID,
>> PORT_D);
>> }
>> @@ -8320,7 +8320,7 @@ void intel_setup_outputs(struct drm_i915_private
>> *dev_priv)
>> }
>>
>> if (!found && IS_G4X(dev_priv))
>> - g4x_dp_init(dev_priv, DP_B, PORT_B);
>> + g4x_dp_init(display, DP_B, PORT_B);
>> }
>>
>> /* Before G4X SDVOC doesn't have its own detect register */
>> @@ -8338,11 +8338,11 @@ void intel_setup_outputs(struct
>> drm_i915_private *dev_priv)
>> g4x_hdmi_init(dev_priv, GEN4_HDMIC,
>> PORT_C);
>> }
>> if (IS_G4X(dev_priv))
>> - g4x_dp_init(dev_priv, DP_C, PORT_C);
>> + g4x_dp_init(display, DP_C, PORT_C);
>> }
>>
>> if (IS_G4X(dev_priv) && (intel_de_read(dev_priv, DP_D) &
>> DP_DETECTED))
>> - g4x_dp_init(dev_priv, DP_D, PORT_D);
>> + g4x_dp_init(display, DP_D, PORT_D);
>>
>> if (SUPPORTS_TV(dev_priv))
>> intel_tv_init(display);
>> diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c
>> b/drivers/gpu/drm/i915/display/intel_pch_display.c
>> index 75ff5592312f..98a6b57ac956 100644
>> --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
>> @@ -45,7 +45,7 @@ static void assert_pch_dp_disabled(struct
>> drm_i915_private *dev_priv,
>> enum pipe port_pipe;
>> bool state;
>>
>> - state = g4x_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe);
>> + state = g4x_dp_port_enabled(display, dp_reg, port, &port_pipe);
>>
>> INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe,
>> "PCH DP %c enabled on transcoder %c,
>> should be disabled\n", diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
>> b/drivers/gpu/drm/i915/display/intel_pps.c
>> index ef6effaf82e0..617ce4993172 100644
>> --- a/drivers/gpu/drm/i915/display/intel_pps.c
>> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
>> @@ -134,7 +134,7 @@ vlv_power_sequencer_kick(struct intel_dp *intel_dp)
>> release_cl_override = display->platform.cherryview &&
>> !chv_phy_powergate_ch(display, phy, ch, true);
>>
>> - if (vlv_force_pll_on(dev_priv, pipe, vlv_get_dpll(dev_priv))) {
>> + if (vlv_force_pll_on(dev_priv, pipe, vlv_get_dpll(display))) {
>> drm_err(display->drm,
>> "Failed to force on PLL for pipe %c!\n",
>> pipe_name(pipe));
>> @@ -1225,11 +1225,10 @@ static void vlv_steal_power_sequencer(struct
>> intel_display *display, static enum pipe vlv_active_pipe(struct intel_dp
>> *intel_dp) {
>> struct intel_display *display = to_intel_display(intel_dp);
>> - struct drm_i915_private *dev_priv = to_i915(display->drm);
>> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> enum pipe pipe;
>>
>> - if (g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
>> + if (g4x_dp_port_enabled(display, intel_dp->output_reg,
>> encoder->port, &pipe))
>> return pipe;
>>
>> @@ -1859,13 +1858,13 @@ void assert_pps_unlocked(struct intel_display
>> *display, enum pipe pipe)
>> intel_lvds_port_enabled(dev_priv, PCH_LVDS,
>> &panel_pipe);
>> break;
>> case PANEL_PORT_SELECT_DPA:
>> - g4x_dp_port_enabled(dev_priv, DP_A, PORT_A,
>> &panel_pipe);
>> + g4x_dp_port_enabled(display, DP_A, PORT_A,
>> &panel_pipe);
>> break;
>> case PANEL_PORT_SELECT_DPC:
>> - g4x_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C,
>> &panel_pipe);
>> + g4x_dp_port_enabled(display, PCH_DP_C, PORT_C,
>> &panel_pipe);
>> break;
>> case PANEL_PORT_SELECT_DPD:
>> - g4x_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D,
>> &panel_pipe);
>> + g4x_dp_port_enabled(display, PCH_DP_D, PORT_D,
>> &panel_pipe);
>> break;
>> default:
>> MISSING_CASE(port_sel);
>> --
>> 2.39.5
>
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 02/14] drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display
2025-02-13 8:55 ` Kandpal, Suraj
@ 2025-02-13 9:15 ` Jani Nikula
0 siblings, 0 replies; 39+ messages in thread
From: Jani Nikula @ 2025-02-13 9:15 UTC (permalink / raw)
To: Kandpal, Suraj, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
On Thu, 13 Feb 2025, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
>> -----Original Message-----
>> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
>> Nikula
>> Sent: Wednesday, February 12, 2025 10:07 PM
>> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
>> Cc: Nikula, Jani <jani.nikula@intel.com>
>> Subject: [PATCH 02/14] drm/i915/hdmi: convert g4x_hdmi.[ch] to struct
>> intel_display
>>
>> Going forward, struct intel_display is the main display device data pointer.
>> Convert as much as possible of g4x_hdmi.[ch] to struct intel_display.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/g4x_hdmi.c | 139 +++++++++----------
>> drivers/gpu/drm/i915/display/g4x_hdmi.h | 6 +-
>> drivers/gpu/drm/i915/display/intel_display.c | 16 +--
>> 3 files changed, 79 insertions(+), 82 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.c
>> b/drivers/gpu/drm/i915/display/g4x_hdmi.c
>> index 9e1ca7767392..6670cf101b9a 100644
>> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.c
>> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.c
>> @@ -27,8 +27,8 @@
>> static void intel_hdmi_prepare(struct intel_encoder *encoder,
>> const struct intel_crtc_state *crtc_state) {
>> - struct drm_device *dev = encoder->base.dev;
>> - struct drm_i915_private *dev_priv = to_i915(dev);
>> + struct intel_display *display = to_intel_display(encoder);
>> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>
> Nit: If we are changing having a change here why not rename it to i915 too.
> It's going to be useless in future since we want to remove drm_i915_private
> Usage altogether but in the meantime why not follow the i915 naming convention.
I'm keeping it dev_priv to avoid unrelated changes below. And as you
say, all of them will need to be removed anyway.
>
> Otherwise LGTM,
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
>
>> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
>> const struct drm_display_mode *adjusted_mode = &crtc_state-
>> >hw.adjusted_mode; @@ -54,13 +54,13 @@ static void
>> intel_hdmi_prepare(struct intel_encoder *encoder,
>>
>> if (HAS_PCH_CPT(dev_priv))
>> hdmi_val |= SDVO_PIPE_SEL_CPT(crtc->pipe);
>> - else if (IS_CHERRYVIEW(dev_priv))
>> + else if (display->platform.cherryview)
>> hdmi_val |= SDVO_PIPE_SEL_CHV(crtc->pipe);
>> else
>> hdmi_val |= SDVO_PIPE_SEL(crtc->pipe);
>>
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, hdmi_val);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, hdmi_val);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>> }
>>
>> static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder, @@ -
>> 132,6 +132,7 @@ static int g4x_hdmi_compute_config(struct intel_encoder
>> *encoder,
>> struct intel_crtc_state *crtc_state,
>> struct drm_connector_state *conn_state) {
>> + struct intel_display *display = to_intel_display(encoder);
>> struct intel_atomic_state *state = to_intel_atomic_state(crtc_state-
>> >uapi.state);
>> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>> struct drm_i915_private *i915 = to_i915(encoder->base.dev); @@ -
>> 142,7 +143,7 @@ static int g4x_hdmi_compute_config(struct intel_encoder
>> *encoder,
>> return -EINVAL;
>> }
>>
>> - if (IS_G4X(i915))
>> + if (display->platform.g4x)
>> crtc_state->has_hdmi_sink =
>> g4x_compute_has_hdmi_sink(state, crtc);
>> else
>> crtc_state->has_hdmi_sink =
>> @@ -154,15 +155,15 @@ static int g4x_hdmi_compute_config(struct
>> intel_encoder *encoder, static void intel_hdmi_get_config(struct
>> intel_encoder *encoder,
>> struct intel_crtc_state *pipe_config) {
>> + struct intel_display *display = to_intel_display(encoder);
>> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
>> - struct drm_device *dev = encoder->base.dev;
>> - struct drm_i915_private *dev_priv = to_i915(dev);
>> u32 tmp, flags = 0;
>> int dotclock;
>>
>> pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI);
>>
>> - tmp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>> + tmp = intel_de_read(display, intel_hdmi->hdmi_reg);
>>
>> if (tmp & SDVO_HSYNC_ACTIVE_HIGH)
>> flags |= DRM_MODE_FLAG_PHSYNC;
>> @@ -222,33 +223,32 @@ static void intel_hdmi_get_config(struct
>> intel_encoder *encoder, static void g4x_hdmi_enable_port(struct
>> intel_encoder *encoder,
>> const struct intel_crtc_state *pipe_config) {
>> - struct drm_device *dev = encoder->base.dev;
>> - struct drm_i915_private *dev_priv = to_i915(dev);
>> + struct intel_display *display = to_intel_display(encoder);
>> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
>> u32 temp;
>>
>> - temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>> + temp = intel_de_read(display, intel_hdmi->hdmi_reg);
>>
>> temp |= SDVO_ENABLE;
>>
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>> }
>>
>> static void g4x_hdmi_audio_enable(struct intel_encoder *encoder,
>> const struct intel_crtc_state *crtc_state,
>> const struct drm_connector_state
>> *conn_state) {
>> - struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>> + struct intel_display *display = to_intel_display(encoder);
>> struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
>>
>> if (!crtc_state->has_audio)
>> return;
>>
>> - drm_WARN_ON(&i915->drm, !crtc_state->has_hdmi_sink);
>> + drm_WARN_ON(display->drm, !crtc_state->has_hdmi_sink);
>>
>> /* Enable audio presence detect */
>> - intel_de_rmw(i915, hdmi->hdmi_reg, 0, HDMI_AUDIO_ENABLE);
>> + intel_de_rmw(display, hdmi->hdmi_reg, 0, HDMI_AUDIO_ENABLE);
>>
>> intel_audio_codec_enable(encoder, crtc_state, conn_state); } @@ -
>> 257,7 +257,7 @@ static void g4x_hdmi_audio_disable(struct intel_encoder
>> *encoder,
>> const struct intel_crtc_state *old_crtc_state,
>> const struct drm_connector_state
>> *old_conn_state) {
>> - struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>> + struct intel_display *display = to_intel_display(encoder);
>> struct intel_hdmi *hdmi = enc_to_intel_hdmi(encoder);
>>
>> if (!old_crtc_state->has_audio)
>> @@ -266,7 +266,7 @@ static void g4x_hdmi_audio_disable(struct
>> intel_encoder *encoder,
>> intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
>>
>> /* Disable audio presence detect */
>> - intel_de_rmw(i915, hdmi->hdmi_reg, HDMI_AUDIO_ENABLE, 0);
>> + intel_de_rmw(display, hdmi->hdmi_reg, HDMI_AUDIO_ENABLE, 0);
>> }
>>
>> static void g4x_enable_hdmi(struct intel_atomic_state *state, @@ -282,12
>> +282,11 @@ static void ibx_enable_hdmi(struct intel_atomic_state *state,
>> const struct intel_crtc_state *pipe_config,
>> const struct drm_connector_state *conn_state) {
>> - struct drm_device *dev = encoder->base.dev;
>> - struct drm_i915_private *dev_priv = to_i915(dev);
>> + struct intel_display *display = to_intel_display(encoder);
>> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
>> u32 temp;
>>
>> - temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>> + temp = intel_de_read(display, intel_hdmi->hdmi_reg);
>>
>> temp |= SDVO_ENABLE;
>>
>> @@ -295,10 +294,10 @@ static void ibx_enable_hdmi(struct
>> intel_atomic_state *state,
>> * HW workaround, need to write this twice for issue
>> * that may result in first write getting masked.
>> */
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>>
>> /*
>> * HW workaround, need to toggle enable bit off and on @@ -
>> 309,18 +308,18 @@ static void ibx_enable_hdmi(struct intel_atomic_state
>> *state,
>> */
>> if (pipe_config->pipe_bpp > 24 &&
>> pipe_config->pixel_multiplier > 1) {
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg,
>> + intel_de_write(display, intel_hdmi->hdmi_reg,
>> temp & ~SDVO_ENABLE);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>>
>> /*
>> * HW workaround, need to write this twice for issue
>> * that may result in first write getting masked.
>> */
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>> }
>> }
>>
>> @@ -329,14 +328,13 @@ static void cpt_enable_hdmi(struct
>> intel_atomic_state *state,
>> const struct intel_crtc_state *pipe_config,
>> const struct drm_connector_state *conn_state) {
>> - struct drm_device *dev = encoder->base.dev;
>> - struct drm_i915_private *dev_priv = to_i915(dev);
>> + struct intel_display *display = to_intel_display(encoder);
>> struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
>> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
>> enum pipe pipe = crtc->pipe;
>> u32 temp;
>>
>> - temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>> + temp = intel_de_read(display, intel_hdmi->hdmi_reg);
>>
>> temp |= SDVO_ENABLE;
>>
>> @@ -351,24 +349,24 @@ static void cpt_enable_hdmi(struct
>> intel_atomic_state *state,
>> */
>>
>> if (pipe_config->pipe_bpp > 24) {
>> - intel_de_rmw(dev_priv, TRANS_CHICKEN1(pipe),
>> + intel_de_rmw(display, TRANS_CHICKEN1(pipe),
>> 0, TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE);
>>
>> temp &= ~SDVO_COLOR_FORMAT_MASK;
>> temp |= SDVO_COLOR_FORMAT_8bpc;
>> }
>>
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>>
>> if (pipe_config->pipe_bpp > 24) {
>> temp &= ~SDVO_COLOR_FORMAT_MASK;
>> temp |= HDMI_COLOR_FORMAT_12bpc;
>>
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>>
>> - intel_de_rmw(dev_priv, TRANS_CHICKEN1(pipe),
>> + intel_de_rmw(display, TRANS_CHICKEN1(pipe),
>> TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE, 0);
>> }
>> }
>> @@ -386,19 +384,18 @@ static void intel_disable_hdmi(struct
>> intel_atomic_state *state,
>> const struct drm_connector_state
>> *old_conn_state) {
>> struct intel_display *display = to_intel_display(encoder);
>> - struct drm_device *dev = encoder->base.dev;
>> - struct drm_i915_private *dev_priv = to_i915(dev);
>> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
>> struct intel_digital_port *dig_port =
>> hdmi_to_dig_port(intel_hdmi);
>> struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
>> u32 temp;
>>
>> - temp = intel_de_read(dev_priv, intel_hdmi->hdmi_reg);
>> + temp = intel_de_read(display, intel_hdmi->hdmi_reg);
>>
>> temp &= ~SDVO_ENABLE;
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>>
>> /*
>> * HW workaround for IBX, we need to move the port @@ -419,14
>> +416,14 @@ static void intel_disable_hdmi(struct intel_atomic_state *state,
>> * HW workaround, need to write this twice for issue
>> * that may result in first write getting masked.
>> */
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>>
>> temp &= ~SDVO_ENABLE;
>> - intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp);
>> - intel_de_posting_read(dev_priv, intel_hdmi->hdmi_reg);
>> + intel_de_write(display, intel_hdmi->hdmi_reg, temp);
>> + intel_de_posting_read(display, intel_hdmi->hdmi_reg);
>>
>> intel_wait_for_vblank_if_active(display, PIPE_A);
>> intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A,
>> true); @@ -544,8 +541,8 @@ static void chv_hdmi_post_disable(struct
>> intel_atomic_state *state,
>> const struct intel_crtc_state *old_crtc_state,
>> const struct drm_connector_state
>> *old_conn_state) {
>> - struct drm_device *dev = encoder->base.dev;
>> - struct drm_i915_private *dev_priv = to_i915(dev);
>> + struct intel_display *display = to_intel_display(encoder);
>> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>>
>> vlv_dpio_get(dev_priv);
>>
>> @@ -614,7 +611,7 @@ intel_hdmi_hotplug(struct intel_encoder *encoder,
>> int g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
>> struct drm_atomic_state *state) {
>> - struct drm_i915_private *i915 = to_i915(state->dev);
>> + struct intel_display *display = to_intel_display(connector->dev);
>> struct drm_connector_list_iter conn_iter;
>> struct drm_connector *conn;
>> int ret;
>> @@ -623,7 +620,7 @@ int g4x_hdmi_connector_atomic_check(struct
>> drm_connector *connector,
>> if (ret)
>> return ret;
>>
>> - if (!IS_G4X(i915))
>> + if (!display->platform.g4x)
>> return 0;
>>
>> if (!intel_connector_needs_modeset(to_intel_atomic_state(state),
>> connector)) @@ -637,7 +634,7 @@ int
>> g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
>> *
>> * See also g4x_compute_has_hdmi_sink().
>> */
>> - drm_connector_list_iter_begin(&i915->drm, &conn_iter);
>> + drm_connector_list_iter_begin(display->drm, &conn_iter);
>> drm_for_each_connector_iter(conn, &conn_iter) {
>> struct drm_connector_state *conn_state;
>> struct drm_crtc_state *crtc_state;
>> @@ -646,7 +643,7 @@ int g4x_hdmi_connector_atomic_check(struct
>> drm_connector *connector,
>> if (!connector_is_hdmi(conn))
>> continue;
>>
>> - drm_dbg_kms(&i915->drm, "Adding
>> [CONNECTOR:%d:%s]\n",
>> + drm_dbg_kms(display->drm, "Adding
>> [CONNECTOR:%d:%s]\n",
>> conn->base.id, conn->name);
>>
>> conn_state = drm_atomic_get_connector_state(state, conn);
>> @@ -671,24 +668,24 @@ int g4x_hdmi_connector_atomic_check(struct
>> drm_connector *connector,
>> return ret;
>> }
>>
>> -static bool is_hdmi_port_valid(struct drm_i915_private *i915, enum port
>> port)
>> +static bool is_hdmi_port_valid(struct intel_display *display, enum port
>> +port)
>> {
>> - if (IS_G4X(i915) || IS_VALLEYVIEW(i915))
>> + if (display->platform.g4x || display->platform.valleyview)
>> return port == PORT_B || port == PORT_C;
>> else
>> return port == PORT_B || port == PORT_C || port ==
>> PORT_D; }
>>
>> -static bool assert_hdmi_port_valid(struct drm_i915_private *i915, enum
>> port port)
>> +static bool assert_hdmi_port_valid(struct intel_display *display, enum
>> +port port)
>> {
>> - return !drm_WARN(&i915->drm, !is_hdmi_port_valid(i915, port),
>> + return !drm_WARN(display->drm, !is_hdmi_port_valid(display,
>> port),
>> "Platform does not support HDMI %c\n",
>> port_name(port)); }
>>
>> -bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
>> +bool g4x_hdmi_init(struct intel_display *display,
>> i915_reg_t hdmi_reg, enum port port) {
>> - struct intel_display *display = &dev_priv->display;
>> + struct drm_i915_private *dev_priv = to_i915(display->drm);
>> const struct intel_bios_encoder_data *devdata;
>> struct intel_digital_port *dig_port;
>> struct intel_encoder *intel_encoder;
>> @@ -697,14 +694,14 @@ bool g4x_hdmi_init(struct drm_i915_private
>> *dev_priv,
>> if (!assert_port_valid(dev_priv, port))
>> return false;
>>
>> - if (!assert_hdmi_port_valid(dev_priv, port))
>> + if (!assert_hdmi_port_valid(display, port))
>> return false;
>>
>> devdata = intel_bios_encoder_data_lookup(display, port);
>>
>> /* FIXME bail? */
>> if (!devdata)
>> - drm_dbg_kms(&dev_priv->drm, "No VBT child device for
>> HDMI-%c\n",
>> + drm_dbg_kms(display->drm, "No VBT child device for HDMI-
>> %c\n",
>> port_name(port));
>>
>> dig_port = kzalloc(sizeof(*dig_port), GFP_KERNEL); @@ -723,7
>> +720,7 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
>>
>> mutex_init(&dig_port->hdcp_mutex);
>>
>> - if (drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
>> + if (drm_encoder_init(display->drm, &intel_encoder->base,
>> &intel_hdmi_enc_funcs,
>> DRM_MODE_ENCODER_TMDS,
>> "HDMI %c", port_name(port)))
>> goto err_encoder_init;
>> @@ -738,13 +735,13 @@ bool g4x_hdmi_init(struct drm_i915_private
>> *dev_priv,
>> }
>> intel_encoder->get_hw_state = intel_hdmi_get_hw_state;
>> intel_encoder->get_config = intel_hdmi_get_config;
>> - if (IS_CHERRYVIEW(dev_priv)) {
>> + if (display->platform.cherryview) {
>> intel_encoder->pre_pll_enable = chv_hdmi_pre_pll_enable;
>> intel_encoder->pre_enable = chv_hdmi_pre_enable;
>> intel_encoder->enable = vlv_enable_hdmi;
>> intel_encoder->post_disable = chv_hdmi_post_disable;
>> intel_encoder->post_pll_disable =
>> chv_hdmi_post_pll_disable;
>> - } else if (IS_VALLEYVIEW(dev_priv)) {
>> + } else if (display->platform.valleyview) {
>> intel_encoder->pre_pll_enable = vlv_hdmi_pre_pll_enable;
>> intel_encoder->pre_enable = vlv_hdmi_pre_enable;
>> intel_encoder->enable = vlv_enable_hdmi; @@ -765,7
>> +762,7 @@ bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
>> intel_encoder->type = INTEL_OUTPUT_HDMI;
>> intel_encoder->power_domain =
>> intel_display_power_ddi_lanes_domain(display, port);
>> intel_encoder->port = port;
>> - if (IS_CHERRYVIEW(dev_priv)) {
>> + if (display->platform.cherryview) {
>> if (port == PORT_D)
>> intel_encoder->pipe_mask = BIT(PIPE_C);
>> else
>> @@ -780,7 +777,7 @@ bool g4x_hdmi_init(struct drm_i915_private
>> *dev_priv,
>> * to work on real hardware. And since g4x can send infoframes to
>> * only one port anyway, nothing is lost by allowing it.
>> */
>> - if (IS_G4X(dev_priv))
>> + if (display->platform.g4x)
>> intel_encoder->cloneable |= BIT(INTEL_OUTPUT_HDMI);
>>
>> dig_port->hdmi.hdmi_reg = hdmi_reg;
>> diff --git a/drivers/gpu/drm/i915/display/g4x_hdmi.h
>> b/drivers/gpu/drm/i915/display/g4x_hdmi.h
>> index a52e8986ec7a..039d2bdba06c 100644
>> --- a/drivers/gpu/drm/i915/display/g4x_hdmi.h
>> +++ b/drivers/gpu/drm/i915/display/g4x_hdmi.h
>> @@ -13,15 +13,15 @@
>> enum port;
>> struct drm_atomic_state;
>> struct drm_connector;
>> -struct drm_i915_private;
>> +struct intel_display;
>>
>> #ifdef I915
>> -bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
>> +bool g4x_hdmi_init(struct intel_display *display,
>> i915_reg_t hdmi_reg, enum port port); int
>> g4x_hdmi_connector_atomic_check(struct drm_connector *connector,
>> struct drm_atomic_state *state); #else -
>> static inline bool g4x_hdmi_init(struct drm_i915_private *dev_priv,
>> +static inline bool g4x_hdmi_init(struct intel_display *display,
>> i915_reg_t hdmi_reg, int port)
>> {
>> return false;
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index e5ceedf56335..b8c57a5d26a0 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -8235,16 +8235,16 @@ void intel_setup_outputs(struct
>> drm_i915_private *dev_priv)
>> /* PCH SDVOB multiplex with HDMIB */
>> found = intel_sdvo_init(dev_priv, PCH_SDVOB,
>> PORT_B);
>> if (!found)
>> - g4x_hdmi_init(dev_priv, PCH_HDMIB,
>> PORT_B);
>> + g4x_hdmi_init(display, PCH_HDMIB,
>> PORT_B);
>> if (!found && (intel_de_read(dev_priv, PCH_DP_B) &
>> DP_DETECTED))
>> g4x_dp_init(display, PCH_DP_B, PORT_B);
>> }
>>
>> if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED)
>> - g4x_hdmi_init(dev_priv, PCH_HDMIC, PORT_C);
>> + g4x_hdmi_init(display, PCH_HDMIC, PORT_C);
>>
>> if (!dpd_is_edp && intel_de_read(dev_priv, PCH_HDMID) &
>> SDVO_DETECTED)
>> - g4x_hdmi_init(dev_priv, PCH_HDMID, PORT_D);
>> + g4x_hdmi_init(display, PCH_HDMID, PORT_D);
>>
>> if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED)
>> g4x_dp_init(display, PCH_DP_C, PORT_C); @@ -
>> 8277,14 +8277,14 @@ void intel_setup_outputs(struct drm_i915_private
>> *dev_priv)
>> if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED ||
>> has_port)
>> has_edp &= g4x_dp_init(display, VLV_DP_B,
>> PORT_B);
>> if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED
>> || has_port) && !has_edp)
>> - g4x_hdmi_init(dev_priv, VLV_HDMIB, PORT_B);
>> + g4x_hdmi_init(display, VLV_HDMIB, PORT_B);
>>
>> has_edp = intel_dp_is_port_edp(display, PORT_C);
>> has_port = intel_bios_is_port_present(display, PORT_C);
>> if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED ||
>> has_port)
>> has_edp &= g4x_dp_init(display, VLV_DP_C,
>> PORT_C);
>> if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED
>> || has_port) && !has_edp)
>> - g4x_hdmi_init(dev_priv, VLV_HDMIC, PORT_C);
>> + g4x_hdmi_init(display, VLV_HDMIC, PORT_C);
>>
>> if (IS_CHERRYVIEW(dev_priv)) {
>> /*
>> @@ -8295,7 +8295,7 @@ void intel_setup_outputs(struct drm_i915_private
>> *dev_priv)
>> if (intel_de_read(dev_priv, CHV_DP_D) &
>> DP_DETECTED || has_port)
>> g4x_dp_init(display, CHV_DP_D, PORT_D);
>> if (intel_de_read(dev_priv, CHV_HDMID) &
>> SDVO_DETECTED || has_port)
>> - g4x_hdmi_init(dev_priv, CHV_HDMID,
>> PORT_D);
>> + g4x_hdmi_init(display, CHV_HDMID,
>> PORT_D);
>> }
>>
>> vlv_dsi_init(dev_priv);
>> @@ -8316,7 +8316,7 @@ void intel_setup_outputs(struct drm_i915_private
>> *dev_priv)
>> if (!found && IS_G4X(dev_priv)) {
>> drm_dbg_kms(&dev_priv->drm,
>> "probing HDMI on SDVOB\n");
>> - g4x_hdmi_init(dev_priv, GEN4_HDMIB,
>> PORT_B);
>> + g4x_hdmi_init(display, GEN4_HDMIB,
>> PORT_B);
>> }
>>
>> if (!found && IS_G4X(dev_priv))
>> @@ -8335,7 +8335,7 @@ void intel_setup_outputs(struct drm_i915_private
>> *dev_priv)
>> if (IS_G4X(dev_priv)) {
>> drm_dbg_kms(&dev_priv->drm,
>> "probing HDMI on SDVOC\n");
>> - g4x_hdmi_init(dev_priv, GEN4_HDMIC,
>> PORT_C);
>> + g4x_hdmi_init(display, GEN4_HDMIC,
>> PORT_C);
>> }
>> if (IS_G4X(dev_priv))
>> g4x_dp_init(display, DP_C, PORT_C);
>> --
>> 2.39.5
>
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 09/14] drm/i915/display: convert intel_cpu_transcoder_mode_valid() to intel_display
2025-02-12 16:36 ` [PATCH 09/14] drm/i915/display: convert intel_cpu_transcoder_mode_valid() to intel_display Jani Nikula
@ 2025-02-13 9:15 ` Kandpal, Suraj
0 siblings, 0 replies; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 9:15 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 09/14] drm/i915/display: convert
> intel_cpu_transcoder_mode_valid() to intel_display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert the intel_cpu_transcoder_mode_valid()() helper to struct intel_display,
> allowing further conversions elsewhere.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_crt.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dvo.c | 6 +++---
> drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_lvds.c | 6 +++---
> drivers/gpu/drm/i915/display/intel_sdvo.c | 3 +--
> drivers/gpu/drm/i915/display/intel_tv.c | 3 +--
> drivers/gpu/drm/i915/display/vlv_dsi.c | 6 +++---
> 12 files changed, 21 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 0f2a19690c18..1f0ff4000658 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1460,10 +1460,10 @@ static void gen11_dsi_post_disable(struct
> intel_atomic_state *state, static enum drm_mode_status
> gen11_dsi_mode_valid(struct drm_connector *connector,
> const struct
> drm_display_mode *mode) {
> - struct drm_i915_private *i915 = to_i915(connector->dev);
> + struct intel_display *display = to_intel_display(connector->dev);
> enum drm_mode_status status;
>
> - status = intel_cpu_transcoder_mode_valid(i915, mode);
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> return status;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index 8eedae1d7684..321580b095e7 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -360,7 +360,7 @@ intel_crt_mode_valid(struct drm_connector
> *connector,
> enum drm_mode_status status;
> int max_clock;
>
> - status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> return status;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e1186f46088d..7a25c84bfbac 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8464,14 +8464,14 @@ enum drm_mode_status intel_mode_valid(struct
> drm_device *dev,
> return MODE_OK;
> }
>
> -enum drm_mode_status intel_cpu_transcoder_mode_valid(struct
> drm_i915_private *dev_priv,
> +enum drm_mode_status intel_cpu_transcoder_mode_valid(struct
> +intel_display *display,
> const struct
> drm_display_mode *mode) {
> /*
> * Additional transcoder timing limits,
> * excluding BXT/GLK DSI transcoders.
> */
> - if (DISPLAY_VER(dev_priv) >= 5) {
> + if (DISPLAY_VER(display) >= 5) {
> if (mode->hdisplay < 64 ||
> mode->htotal - mode->hdisplay < 32)
> return MODE_H_ILLEGAL;
> @@ -8490,7 +8490,7 @@ enum drm_mode_status
> intel_cpu_transcoder_mode_valid(struct drm_i915_private *de
> * Cantiga+ cannot handle modes with a hsync front porch of 0.
> * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
> */
> - if ((DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv)) &&
> + if ((DISPLAY_VER(display) >= 5 || display->platform.g4x) &&
> mode->hsync_start == mode->hdisplay)
> return MODE_H_ILLEGAL;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 9439da737f5b..08e28ea179d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -428,7 +428,7 @@ intel_mode_valid_max_plane_size(struct
> drm_i915_private *dev_priv,
> const struct drm_display_mode *mode,
> int num_joined_pipes);
> enum drm_mode_status
> -intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915,
> +intel_cpu_transcoder_mode_valid(struct intel_display *display,
> const struct drm_display_mode *mode);
> enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
> bool is_trans_port_sync_mode(const struct intel_crtc_state *state); diff --git
> a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9ed7d46143e9..61827b0fe95e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1407,7 +1407,7 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> bool dsc = false;
> int num_joined_pipes;
>
> - status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> return status;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 459440dd6e87..38804254980b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1481,7 +1481,7 @@ mst_connector_mode_valid_ctx(struct
> drm_connector *_connector,
> return 0;
> }
>
> - *status = intel_cpu_transcoder_mode_valid(i915, mode);
> + *status = intel_cpu_transcoder_mode_valid(display, mode);
> if (*status != MODE_OK)
> return 0;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c
> b/drivers/gpu/drm/i915/display/intel_dvo.c
> index 29f8788fb26a..c16fb34b737d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_dvo.c
> @@ -219,16 +219,16 @@ static enum drm_mode_status
> intel_dvo_mode_valid(struct drm_connector *_connector,
> const struct drm_display_mode *mode) {
> + struct intel_display *display = to_intel_display(_connector->dev);
> struct intel_connector *connector = to_intel_connector(_connector);
> - struct drm_i915_private *i915 = to_i915(connector->base.dev);
> struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
> const struct drm_display_mode *fixed_mode =
> intel_panel_fixed_mode(connector, mode);
> - int max_dotclk = to_i915(connector->base.dev)-
> >display.cdclk.max_dotclk_freq;
> + int max_dotclk = display->cdclk.max_dotclk_freq;
> int target_clock = mode->clock;
> enum drm_mode_status status;
>
> - status = intel_cpu_transcoder_mode_valid(i915, mode);
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> return status;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 015110fc57a2..60572deeffb3 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2023,7 +2023,7 @@ intel_hdmi_mode_valid(struct drm_connector
> *connector,
> bool ycbcr_420_only;
> enum intel_output_format sink_format;
>
> - status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> return status;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c
> b/drivers/gpu/drm/i915/display/intel_lvds.c
> index 6b05db2c10ba..7ed8625193fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -394,14 +394,14 @@ static enum drm_mode_status
> intel_lvds_mode_valid(struct drm_connector *_connector,
> const struct drm_display_mode *mode) {
> + struct intel_display *display = to_intel_display(_connector->dev);
> struct intel_connector *connector = to_intel_connector(_connector);
> - struct drm_i915_private *i915 = to_i915(connector->base.dev);
> const struct drm_display_mode *fixed_mode =
> intel_panel_fixed_mode(connector, mode);
> - int max_pixclk = to_i915(connector->base.dev)-
> >display.cdclk.max_dotclk_freq;
> + int max_pixclk = display->cdclk.max_dotclk_freq;
> enum drm_mode_status status;
>
> - status = intel_cpu_transcoder_mode_valid(i915, mode);
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> return status;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
> b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 1ae766212e8a..6e2d9929b4d7 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -1943,7 +1943,6 @@ intel_sdvo_mode_valid(struct drm_connector
> *connector,
> const struct drm_display_mode *mode) {
> struct intel_display *display = to_intel_display(connector->dev);
> - struct drm_i915_private *i915 = to_i915(connector->dev);
> struct intel_sdvo *intel_sdvo =
> intel_attached_sdvo(to_intel_connector(connector));
> struct intel_sdvo_connector *intel_sdvo_connector =
> to_intel_sdvo_connector(connector);
> @@ -1952,7 +1951,7 @@ intel_sdvo_mode_valid(struct drm_connector
> *connector,
> enum drm_mode_status status;
> int clock = mode->clock;
>
> - status = intel_cpu_transcoder_mode_valid(i915, mode);
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> return status;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tv.c
> b/drivers/gpu/drm/i915/display/intel_tv.c
> index 7838c92f8ded..5dbe857ea85b 100644
> --- a/drivers/gpu/drm/i915/display/intel_tv.c
> +++ b/drivers/gpu/drm/i915/display/intel_tv.c
> @@ -960,12 +960,11 @@ intel_tv_mode_valid(struct drm_connector
> *connector,
> const struct drm_display_mode *mode) {
> struct intel_display *display = to_intel_display(connector->dev);
> - struct drm_i915_private *i915 = to_i915(connector->dev);
> const struct tv_mode *tv_mode = intel_tv_mode_find(connector-
> >state);
> int max_dotclk = display->cdclk.max_dotclk_freq;
> enum drm_mode_status status;
>
> - status = intel_cpu_transcoder_mode_valid(i915, mode);
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> return status;
>
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index d68876fe782c..7414794889e9 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -1543,12 +1543,12 @@ static const struct drm_encoder_funcs
> intel_dsi_funcs = { static enum drm_mode_status vlv_dsi_mode_valid(struct
> drm_connector *connector,
> const struct drm_display_mode
> *mode) {
> - struct drm_i915_private *i915 = to_i915(connector->dev);
> + struct intel_display *display = to_intel_display(connector->dev);
>
> - if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
> + if (display->platform.valleyview || display->platform.cherryview) {
> enum drm_mode_status status;
>
> - status = intel_cpu_transcoder_mode_valid(i915, mode);
> + status = intel_cpu_transcoder_mode_valid(display, mode);
> if (status != MODE_OK)
> return status;
> }
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 10/14] drm/i915/display: convert intel_mode_valid_max_plane_size() to intel_display
2025-02-12 16:36 ` [PATCH 10/14] drm/i915/display: convert intel_mode_valid_max_plane_size() " Jani Nikula
@ 2025-02-13 9:16 ` Kandpal, Suraj
0 siblings, 0 replies; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 9:16 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Nikula, Jani
> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Wednesday, February 12, 2025 10:07 PM
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH 10/14] drm/i915/display: convert
> intel_mode_valid_max_plane_size() to intel_display
>
> Going forward, struct intel_display is the main display device data pointer.
> Convert the intel_mode_valid_max_plane_size() helper to struct intel_display,
> allowing further conversions elsewhere.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 8 ++++----
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 3 +--
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +--
> drivers/gpu/drm/i915/display/intel_dsi.c | 8 ++++----
> drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +--
> 6 files changed, 12 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 7a25c84bfbac..0450fdf9d4de 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8498,7 +8498,7 @@ enum drm_mode_status
> intel_cpu_transcoder_mode_valid(struct intel_display *displ }
>
> enum drm_mode_status
> -intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
> +intel_mode_valid_max_plane_size(struct intel_display *display,
> const struct drm_display_mode *mode,
> int num_joined_pipes)
> {
> @@ -8508,7 +8508,7 @@ intel_mode_valid_max_plane_size(struct
> drm_i915_private *dev_priv,
> * intel_mode_valid() should be
> * sufficient on older platforms.
> */
> - if (DISPLAY_VER(dev_priv) < 9)
> + if (DISPLAY_VER(display) < 9)
> return MODE_OK;
>
> /*
> @@ -8516,10 +8516,10 @@ intel_mode_valid_max_plane_size(struct
> drm_i915_private *dev_priv,
> * plane so let's not advertize modes that are
> * too big for that.
> */
> - if (DISPLAY_VER(dev_priv) >= 30) {
> + if (DISPLAY_VER(display) >= 30) {
> plane_width_max = 6144 * num_joined_pipes;
> plane_height_max = 4800;
> - } else if (DISPLAY_VER(dev_priv) >= 11) {
> + } else if (DISPLAY_VER(display) >= 11) {
> plane_width_max = 5120 * num_joined_pipes;
> plane_height_max = 4320;
> } else {
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 08e28ea179d2..f702425df305 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -424,7 +424,7 @@ void intel_link_compute_m_n(u16 bpp, int nlanes,
> u32 intel_plane_fb_max_stride(struct drm_device *drm,
> u32 pixel_format, u64 modifier); enum
> drm_mode_status -intel_mode_valid_max_plane_size(struct drm_i915_private
> *dev_priv,
> +intel_mode_valid_max_plane_size(struct intel_display *display,
> const struct drm_display_mode *mode,
> int num_joined_pipes);
> enum drm_mode_status
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 61827b0fe95e..29970baaf03e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1396,7 +1396,6 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> struct intel_display *display = to_intel_display(_connector->dev);
> struct intel_connector *connector = to_intel_connector(_connector);
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> - struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> const struct drm_display_mode *fixed_mode;
> int target_clock = mode->clock;
> int max_rate, mode_rate, max_lanes, max_link_clock; @@ -1496,7
> +1495,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> if (status != MODE_OK)
> return status;
>
> - return intel_mode_valid_max_plane_size(dev_priv, mode,
> num_joined_pipes);
> + return intel_mode_valid_max_plane_size(display, mode,
> +num_joined_pipes);
> }
>
> bool intel_dp_source_supports_tps3(struct intel_display *display) diff --git
> a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 38804254980b..73a0a0f9b3d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1462,7 +1462,6 @@ mst_connector_mode_valid_ctx(struct
> drm_connector *_connector, {
> struct intel_connector *connector = to_intel_connector(_connector);
> struct intel_display *display = to_intel_display(connector);
> - struct drm_i915_private *i915 = to_i915(display->drm);
> struct intel_dp *intel_dp = connector->mst_port;
> struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
> struct drm_dp_mst_port *port = connector->port; @@ -1565,7
> +1564,7 @@ mst_connector_mode_valid_ctx(struct drm_connector
> *_connector,
> return 0;
> }
>
> - *status = intel_mode_valid_max_plane_size(i915, mode,
> num_joined_pipes);
> + *status = intel_mode_valid_max_plane_size(display, mode,
> +num_joined_pipes);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c
> b/drivers/gpu/drm/i915/display/intel_dsi.c
> index c93a3cf75c52..403151175a87 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsi.c
> @@ -60,14 +60,14 @@ int intel_dsi_get_modes(struct drm_connector
> *connector) enum drm_mode_status intel_dsi_mode_valid(struct
> drm_connector *connector,
> const struct drm_display_mode
> *mode) {
> - struct drm_i915_private *dev_priv = to_i915(connector->dev);
> + struct intel_display *display = to_intel_display(connector->dev);
> struct intel_connector *intel_connector =
> to_intel_connector(connector);
> const struct drm_display_mode *fixed_mode =
> intel_panel_fixed_mode(intel_connector, mode);
> - int max_dotclk = to_i915(connector->dev)-
> >display.cdclk.max_dotclk_freq;
> + int max_dotclk = display->cdclk.max_dotclk_freq;
> enum drm_mode_status status;
>
> - drm_dbg_kms(&dev_priv->drm, "\n");
> + drm_dbg_kms(display->drm, "\n");
>
> status = intel_panel_mode_valid(intel_connector, mode);
> if (status != MODE_OK)
> @@ -76,7 +76,7 @@ enum drm_mode_status intel_dsi_mode_valid(struct
> drm_connector *connector,
> if (fixed_mode->clock > max_dotclk)
> return MODE_CLOCK_HIGH;
>
> - return intel_mode_valid_max_plane_size(dev_priv, mode, 1);
> + return intel_mode_valid_max_plane_size(display, mode, 1);
> }
>
> struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi, diff --git
> a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 60572deeffb3..ed017d9de920 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2015,7 +2015,6 @@ intel_hdmi_mode_valid(struct drm_connector
> *connector, {
> struct intel_display *display = to_intel_display(connector->dev);
> struct intel_hdmi *hdmi =
> intel_attached_hdmi(to_intel_connector(connector));
> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> enum drm_mode_status status;
> int clock = mode->clock;
> int max_dotclk = to_i915(connector->dev)-
> >display.cdclk.max_dotclk_freq;
> @@ -2068,7 +2067,7 @@ intel_hdmi_mode_valid(struct drm_connector
> *connector,
> return status;
> }
>
> - return intel_mode_valid_max_plane_size(dev_priv, mode, 1);
> + return intel_mode_valid_max_plane_size(display, mode, 1);
> }
>
> bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
> --
> 2.39.5
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel display
2025-02-13 9:13 ` Jani Nikula
@ 2025-02-13 9:19 ` Kandpal, Suraj
0 siblings, 0 replies; 39+ messages in thread
From: Kandpal, Suraj @ 2025-02-13 9:19 UTC (permalink / raw)
To: Nikula, Jani, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
> -----Original Message-----
> From: Nikula, Jani <jani.nikula@intel.com>
> Sent: Thursday, February 13, 2025 2:43 PM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>; intel-gfx@lists.freedesktop.org;
> intel-xe@lists.freedesktop.org
> Subject: RE: [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel
> display
>
> On Thu, 13 Feb 2025, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
> >> -----Original Message-----
> >> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf
> >> Of Jani Nikula
> >> Sent: Wednesday, February 12, 2025 10:07 PM
> >> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> >> Cc: Nikula, Jani <jani.nikula@intel.com>
> >> Subject: [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct
> >> intel display
> >>
> >> Going forward, struct intel_display is the main display device data pointer.
> >> Convert as much as possible of g4x_dp.[ch] to struct intel_display.
> >>
> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> ---
> >> drivers/gpu/drm/i915/display/g4x_dp.c | 80 +++++++++----------
> >> drivers/gpu/drm/i915/display/g4x_dp.h | 14 ++--
> >> drivers/gpu/drm/i915/display/intel_display.c | 20 ++---
> >> .../gpu/drm/i915/display/intel_pch_display.c | 2 +-
> >> drivers/gpu/drm/i915/display/intel_pps.c | 11 ++-
> >> 5 files changed, 61 insertions(+), 66 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
> >> b/drivers/gpu/drm/i915/display/g4x_dp.c
> >> index d3b5ead188ba..cfc796607a78 100644
> >> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> >> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> >> @@ -51,28 +51,29 @@ static const struct dpll chv_dpll[] = {
> >> { .dot = 270000, .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 =
> >> 0x6c00000 /*
> >> 27.0 */ }, };
> >>
> >> -const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
> >> +const struct dpll *vlv_get_dpll(struct intel_display *display)
> >> {
> >> - return IS_CHERRYVIEW(i915) ? &chv_dpll[0] : &vlv_dpll[0];
> >> + return display->platform.cherryview ? &chv_dpll[0] :
> >> + &vlv_dpll[0];
> >> }
> >>
> >> static void g4x_dp_set_clock(struct intel_encoder *encoder,
> >> struct intel_crtc_state *pipe_config) {
> >> + struct intel_display *display = to_intel_display(encoder);
> >> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >> const struct dpll *divisor = NULL;
> >> int i, count = 0;
> >>
> >> - if (IS_G4X(dev_priv)) {
> >> + if (display->platform.g4x) {
> >> divisor = g4x_dpll;
> >> count = ARRAY_SIZE(g4x_dpll);
> >> } else if (HAS_PCH_SPLIT(dev_priv)) {
> >> divisor = pch_dpll;
> >> count = ARRAY_SIZE(pch_dpll);
> >> - } else if (IS_CHERRYVIEW(dev_priv)) {
> >> + } else if (display->platform.cherryview) {
> >> divisor = chv_dpll;
> >> count = ARRAY_SIZE(chv_dpll);
> >> - } else if (IS_VALLEYVIEW(dev_priv)) {
> >> + } else if (display->platform.valleyview) {
> >> divisor = vlv_dpll;
> >> count = ARRAY_SIZE(vlv_dpll);
> >> }
> >> @@ -129,7 +130,7 @@ static void intel_dp_prepare(struct intel_encoder
> >> *encoder,
> >>
> >> /* Split out the IBX/CPU vs CPT settings */
> >>
> >> - if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) {
> >> + if (display->platform.ivybridge && port == PORT_A) {
> >> if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
> >> intel_dp->DP |= DP_SYNC_HS_HIGH;
> >> if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) @@
> >> -148,7 +149,7 @@ static void intel_dp_prepare(struct intel_encoder
> >> *encoder,
> >> pipe_config->enhanced_framing ?
> >> TRANS_DP_ENH_FRAMING : 0);
> >> } else {
> >> - if (IS_G4X(dev_priv) && pipe_config->limited_color_range)
> >> + if (display->platform.g4x && pipe_config-
> >> >limited_color_range)
> >> intel_dp->DP |= DP_COLOR_RANGE_16_235;
> >>
> >> if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) @@
> >> -160,7 +161,7 @@ static void intel_dp_prepare(struct intel_encoder
> >> *encoder,
> >> if (pipe_config->enhanced_framing)
> >> intel_dp->DP |= DP_ENHANCED_FRAMING;
> >>
> >> - if (IS_CHERRYVIEW(dev_priv))
> >> + if (display->platform.cherryview)
> >> intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe);
> >> else
> >> intel_dp->DP |= DP_PIPE_SEL(crtc->pipe); @@
> >> -180,9
> >> +181,8 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool
> >> +state)
> >> } #define assert_dp_port_disabled(d) assert_dp_port((d), false)
> >>
> >> -static void assert_edp_pll(struct drm_i915_private *dev_priv, bool
> >> state)
> >> +static void assert_edp_pll(struct intel_display *display, bool
> >> +state)
> >> {
> >> - struct intel_display *display = &dev_priv->display;
> >> bool cur_state = intel_de_read(display, DP_A) & DP_PLL_ENABLE;
> >>
> >> INTEL_DISPLAY_STATE_WARN(display, cur_state != state, @@ -201,7
> >> +201,7 @@ static void ilk_edp_pll_on(struct intel_dp *intel_dp,
> >>
> >> assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder);
> >> assert_dp_port_disabled(intel_dp);
> >> - assert_edp_pll_disabled(dev_priv);
> >> + assert_edp_pll_disabled(display);
> >>
> >> drm_dbg_kms(display->drm, "enabling eDP PLL for clock %d\n",
> >> pipe_config->port_clock); @@ -223,7 +223,7 @@
> >> static void ilk_edp_pll_on(struct intel_dp *intel_dp,
> >> * 1. Wait for the start of vertical blank on the enabled pipe
> >> going to FDI
> >> * 2. Program DP PLL enable
> >> */
> >> - if (IS_IRONLAKE(dev_priv))
> >> + if (display->platform.ironlake)
> >> intel_wait_for_vblank_if_active(display, !crtc->pipe);
> >>
> >> intel_dp->DP |= DP_PLL_ENABLE;
> >> @@ -242,7 +242,7 @@ static void ilk_edp_pll_off(struct intel_dp
> >> *intel_dp,
> >>
> >> assert_transcoder_disabled(dev_priv, old_crtc_state-
> >> >cpu_transcoder);
> >> assert_dp_port_disabled(intel_dp);
> >> - assert_edp_pll_enabled(dev_priv);
> >> + assert_edp_pll_enabled(display);
> >>
> >> drm_dbg_kms(display->drm, "disabling eDP PLL\n");
> >>
> >> @@ -253,10 +253,9 @@ static void ilk_edp_pll_off(struct intel_dp
> *intel_dp,
> >> udelay(200);
> >> }
> >>
> >> -static bool cpt_dp_port_selected(struct drm_i915_private *dev_priv,
> >> +static bool cpt_dp_port_selected(struct intel_display *display,
> >> enum port port, enum pipe *pipe) {
> >> - struct intel_display *display = &dev_priv->display;
> >> enum pipe p;
> >>
> >> for_each_pipe(display, p) {
> >> @@ -277,11 +276,11 @@ static bool cpt_dp_port_selected(struct
> >> drm_i915_private *dev_priv,
> >> return false;
> >> }
> >>
> >> -bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
> >> +bool g4x_dp_port_enabled(struct intel_display *display,
> >> i915_reg_t dp_reg, enum port port,
> >> enum pipe *pipe) {
> >> - struct intel_display *display = &dev_priv->display;
> >> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> >> bool ret;
> >> u32 val;
> >>
> >> @@ -290,11 +289,11 @@ bool g4x_dp_port_enabled(struct
> >> drm_i915_private *dev_priv,
> >> ret = val & DP_PORT_EN;
> >>
> >> /* asserts want to know the pipe even if the port is disabled */
> >> - if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
> >> + if (display->platform.ivybridge && port == PORT_A)
> >> *pipe = (val & DP_PIPE_SEL_MASK_IVB) >>
> >> DP_PIPE_SEL_SHIFT_IVB;
> >> else if (HAS_PCH_CPT(dev_priv) && port != PORT_A)
> >> - ret &= cpt_dp_port_selected(dev_priv, port, pipe);
> >> - else if (IS_CHERRYVIEW(dev_priv))
> >> + ret &= cpt_dp_port_selected(display, port, pipe);
> >> + else if (display->platform.cherryview)
> >> *pipe = (val & DP_PIPE_SEL_MASK_CHV) >>
> >> DP_PIPE_SEL_SHIFT_CHV;
> >> else
> >> *pipe = (val & DP_PIPE_SEL_MASK) >> DP_PIPE_SEL_SHIFT;
> >> @@ -306,7 +305,6 @@ static bool intel_dp_get_hw_state(struct
> >> intel_encoder *encoder,
> >> enum pipe *pipe) {
> >> struct intel_display *display = to_intel_display(encoder);
> >> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> >> intel_wakeref_t wakeref;
> >> bool ret;
> >> @@ -316,7 +314,7 @@ static bool intel_dp_get_hw_state(struct
> >> intel_encoder *encoder,
> >> if (!wakeref)
> >> return false;
> >>
> >> - ret = g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
> >> + ret = g4x_dp_port_enabled(display, intel_dp->output_reg,
> >> encoder->port, pipe);
> >>
> >> intel_display_power_put(display, encoder->power_domain,
> >> wakeref); @@ -391,7 +389,7 @@ static void intel_dp_get_config(struct
> >> intel_encoder *encoder,
> >>
> >> pipe_config->hw.adjusted_mode.flags |= flags;
> >>
> >> - if (IS_G4X(dev_priv) && tmp & DP_COLOR_RANGE_16_235)
> >> + if (display->platform.g4x && tmp & DP_COLOR_RANGE_16_235)
> >> pipe_config->limited_color_range = true;
> >>
> >> pipe_config->lane_count =
> >> @@ -433,7 +431,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
> >>
> >> drm_dbg_kms(display->drm, "\n");
> >>
> >> - if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
> >> + if ((display->platform.ivybridge && port == PORT_A) ||
> >> (HAS_PCH_CPT(dev_priv) && port != PORT_A)) {
> >> intel_dp->DP &= ~DP_LINK_TRAIN_MASK_CPT;
> >> intel_dp->DP |= DP_LINK_TRAIN_PAT_IDLE_CPT; @@ -479,7
> >> +477,7 @@ intel_dp_link_down(struct intel_encoder *encoder,
> >>
> >> msleep(intel_dp->pps.panel_power_down_delay);
> >>
> >> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> >> + if (display->platform.valleyview ||
> >> + display->platform.cherryview)
> >> vlv_pps_port_disable(encoder, old_crtc_state); }
> >>
> >> @@ -682,7 +680,6 @@ static void intel_enable_dp(struct
> >> intel_atomic_state *state,
> >> const struct drm_connector_state *conn_state) {
> >> struct intel_display *display = to_intel_display(state);
> >> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> >> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> >> u32 dp_reg = intel_de_read(display, intel_dp->output_reg);
> >> intel_wakeref_t wakeref;
> >> @@ -691,7 +688,7 @@ static void intel_enable_dp(struct
> >> intel_atomic_state *state,
> >> return;
> >>
> >> with_intel_pps_lock(intel_dp, wakeref) {
> >> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> >> + if (display->platform.valleyview || display-
> >> >platform.cherryview)
> >> vlv_pps_port_enable_unlocked(encoder,
> >> pipe_config);
> >>
> >> intel_dp_enable_port(intel_dp, pipe_config); @@ -701,10
> >> +698,10 @@ static void intel_enable_dp(struct intel_atomic_state
> >> +*state,
> >> intel_pps_vdd_off_unlocked(intel_dp, true);
> >> }
> >>
> >> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> >> + if (display->platform.valleyview ||
> >> + display->platform.cherryview) {
> >> unsigned int lane_mask = 0x0;
> >>
> >> - if (IS_CHERRYVIEW(dev_priv))
> >> + if (display->platform.cherryview)
> >> lane_mask =
> >> intel_dp_unused_lane_mask(pipe_config->lane_count);
> >>
> >> vlv_wait_port_ready(display, dp_to_dig_port(intel_dp),
> >> lane_mask); @@ -1264,7 +1261,6 @@ static void
> >> intel_dp_encoder_destroy(struct drm_encoder *encoder) static void
> >> intel_dp_encoder_reset(struct drm_encoder *encoder) {
> >> struct intel_display *display = to_intel_display(encoder->dev);
> >> - struct drm_i915_private *dev_priv = to_i915(encoder->dev);
> >
> > I know this hasn't changed in this patch and is already there merged
> > in code but a good chance to Do to_intel_display(encoder) instead of
> > encoder->dev
>
> to_intel_display() intentionally doesn't handle drm_encoder, so can't.
>
> > Otherwise
> > LGTM,
> > Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
>
> Thanks, but I've just merged the series with Ville's Reviewed-by.
Ohkay didn't read this till I got to the 10th patch
Regards,
Suraj Kandpal
>
> BR,
> Jani.
>
> >
> >> struct intel_dp *intel_dp =
> >> enc_to_intel_dp(to_intel_encoder(encoder));
> >>
> >> intel_dp->DP = intel_de_read(display, intel_dp->output_reg); @@
> >> -
> >> 1272,7 +1268,7 @@ static void intel_dp_encoder_reset(struct
> >> drm_encoder
> >> *encoder)
> >> intel_dp->reset_link_params = true;
> >> intel_dp_invalidate_source_oui(intel_dp);
> >>
> >> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> >> + if (display->platform.valleyview ||
> >> + display->platform.cherryview)
> >> vlv_pps_pipe_reset(intel_dp);
> >>
> >> intel_pps_encoder_reset(intel_dp);
> >> @@ -1283,10 +1279,10 @@ static const struct drm_encoder_funcs
> >> intel_dp_enc_funcs = {
> >> .destroy = intel_dp_encoder_destroy, };
> >>
> >> -bool g4x_dp_init(struct drm_i915_private *dev_priv,
> >> +bool g4x_dp_init(struct intel_display *display,
> >> i915_reg_t output_reg, enum port port) {
> >> - struct intel_display *display = &dev_priv->display;
> >> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> >> const struct intel_bios_encoder_data *devdata;
> >> struct intel_digital_port *dig_port;
> >> struct intel_encoder *intel_encoder; @@ -1337,14 +1333,14 @@
> >> bool g4x_dp_init(struct drm_i915_private *dev_priv,
> >> intel_encoder->suspend = intel_dp_encoder_suspend;
> >> intel_encoder->suspend_complete = g4x_dp_suspend_complete;
> >> intel_encoder->shutdown = intel_dp_encoder_shutdown;
> >> - if (IS_CHERRYVIEW(dev_priv)) {
> >> + if (display->platform.cherryview) {
> >> intel_encoder->pre_pll_enable = chv_dp_pre_pll_enable;
> >> intel_encoder->pre_enable = chv_pre_enable_dp;
> >> intel_encoder->enable = vlv_enable_dp;
> >> intel_encoder->disable = vlv_disable_dp;
> >> intel_encoder->post_disable = chv_post_disable_dp;
> >> intel_encoder->post_pll_disable = chv_dp_post_pll_disable;
> >> - } else if (IS_VALLEYVIEW(dev_priv)) {
> >> + } else if (display->platform.valleyview) {
> >> intel_encoder->pre_pll_enable = vlv_dp_pre_pll_enable;
> >> intel_encoder->pre_enable = vlv_pre_enable_dp;
> >> intel_encoder->enable = vlv_enable_dp; @@ -1359,24
> >> +1355,24 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
> >> intel_encoder->audio_enable = g4x_dp_audio_enable;
> >> intel_encoder->audio_disable = g4x_dp_audio_disable;
> >>
> >> - if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
> >> + if ((display->platform.ivybridge && port == PORT_A) ||
> >> (HAS_PCH_CPT(dev_priv) && port != PORT_A))
> >> dig_port->dp.set_link_train = cpt_set_link_train;
> >> else
> >> dig_port->dp.set_link_train = g4x_set_link_train;
> >>
> >> - if (IS_CHERRYVIEW(dev_priv))
> >> + if (display->platform.cherryview)
> >> intel_encoder->set_signal_levels = chv_set_signal_levels;
> >> - else if (IS_VALLEYVIEW(dev_priv))
> >> + else if (display->platform.valleyview)
> >> intel_encoder->set_signal_levels = vlv_set_signal_levels;
> >> - else if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
> >> + else if (display->platform.ivybridge && port == PORT_A)
> >> intel_encoder->set_signal_levels =
> >> ivb_cpu_edp_set_signal_levels;
> >> - else if (IS_SANDYBRIDGE(dev_priv) && port == PORT_A)
> >> + else if (display->platform.sandybridge && port == PORT_A)
> >> intel_encoder->set_signal_levels =
> >> snb_cpu_edp_set_signal_levels;
> >> else
> >> intel_encoder->set_signal_levels =
> >> g4x_set_signal_levels;
> >>
> >> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv) ||
> >> + if (display->platform.valleyview ||
> >> + display->platform.cherryview ||
> >> (HAS_PCH_SPLIT(dev_priv) && port != PORT_A)) {
> >> dig_port->dp.preemph_max = intel_dp_preemph_max_3;
> >> dig_port->dp.voltage_max = intel_dp_voltage_max_3; @@ -
> >> 1390,7 +1386,7 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
> >>
> >> intel_encoder->type = INTEL_OUTPUT_DP;
> >> intel_encoder->power_domain =
> >> intel_display_power_ddi_lanes_domain(display, port);
> >> - if (IS_CHERRYVIEW(dev_priv)) {
> >> + if (display->platform.cherryview) {
> >> if (port == PORT_D)
> >> intel_encoder->pipe_mask = BIT(PIPE_C);
> >> else
> >> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.h
> >> b/drivers/gpu/drm/i915/display/g4x_dp.h
> >> index 839a251dc069..0b28951b8365 100644
> >> --- a/drivers/gpu/drm/i915/display/g4x_dp.h
> >> +++ b/drivers/gpu/drm/i915/display/g4x_dp.h
> >> @@ -12,30 +12,30 @@
> >>
> >> enum pipe;
> >> enum port;
> >> -struct drm_i915_private;
> >> struct intel_crtc_state;
> >> +struct intel_display;
> >> struct intel_dp;
> >> struct intel_encoder;
> >>
> >> #ifdef I915
> >> -const struct dpll *vlv_get_dpll(struct drm_i915_private *i915);
> >> -bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
> >> +const struct dpll *vlv_get_dpll(struct intel_display *display); bool
> >> +g4x_dp_port_enabled(struct intel_display *display,
> >> i915_reg_t dp_reg, enum port port,
> >> enum pipe *pipe); -bool g4x_dp_init(struct
> >> drm_i915_private *dev_priv,
> >> +bool g4x_dp_init(struct intel_display *display,
> >> i915_reg_t output_reg, enum port port); #else -static
> >> inline const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
> >> +static inline const struct dpll *vlv_get_dpll(struct intel_display
> >> +*display)
> >> {
> >> return NULL;
> >> }
> >> -static inline bool g4x_dp_port_enabled(struct drm_i915_private
> >> *dev_priv,
> >> +static inline bool g4x_dp_port_enabled(struct intel_display
> >> +*display,
> >> i915_reg_t dp_reg, int port,
> >> enum pipe *pipe) {
> >> return false;
> >> }
> >> -static inline bool g4x_dp_init(struct drm_i915_private *dev_priv,
> >> +static inline bool g4x_dp_init(struct intel_display *display,
> >> i915_reg_t output_reg, int port) {
> >> return false;
> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> >> b/drivers/gpu/drm/i915/display/intel_display.c
> >> index 6c1e7441313e..e5ceedf56335 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> >> @@ -8229,7 +8229,7 @@ void intel_setup_outputs(struct
> >> drm_i915_private
> >> *dev_priv)
> >> dpd_is_edp = intel_dp_is_port_edp(display, PORT_D);
> >>
> >> if (ilk_has_edp_a(dev_priv))
> >> - g4x_dp_init(dev_priv, DP_A, PORT_A);
> >> + g4x_dp_init(display, DP_A, PORT_A);
> >>
> >> if (intel_de_read(dev_priv, PCH_HDMIB) & SDVO_DETECTED)
> >> {
> >> /* PCH SDVOB multiplex with HDMIB */ @@ -8237,7
> >> +8237,7 @@ void intel_setup_outputs(struct drm_i915_private
> >> +*dev_priv)
> >> if (!found)
> >> g4x_hdmi_init(dev_priv, PCH_HDMIB,
> >> PORT_B);
> >> if (!found && (intel_de_read(dev_priv,
> >> PCH_DP_B) &
> >> DP_DETECTED))
> >> - g4x_dp_init(dev_priv, PCH_DP_B, PORT_B);
> >> + g4x_dp_init(display, PCH_DP_B, PORT_B);
> >> }
> >>
> >> if (intel_de_read(dev_priv, PCH_HDMIC) & SDVO_DETECTED)
> >> @@ -8247,10 +8247,10 @@ void intel_setup_outputs(struct
> >> drm_i915_private *dev_priv)
> >> g4x_hdmi_init(dev_priv, PCH_HDMID, PORT_D);
> >>
> >> if (intel_de_read(dev_priv, PCH_DP_C) & DP_DETECTED)
> >> - g4x_dp_init(dev_priv, PCH_DP_C, PORT_C);
> >> + g4x_dp_init(display, PCH_DP_C, PORT_C);
> >>
> >> if (intel_de_read(dev_priv, PCH_DP_D) & DP_DETECTED)
> >> - g4x_dp_init(dev_priv, PCH_DP_D, PORT_D);
> >> + g4x_dp_init(display, PCH_DP_D, PORT_D);
> >> } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> >> bool has_edp, has_port;
> >>
> >> @@ -8275,14 +8275,14 @@ void intel_setup_outputs(struct
> >> drm_i915_private *dev_priv)
> >> has_edp = intel_dp_is_port_edp(display, PORT_B);
> >> has_port = intel_bios_is_port_present(display, PORT_B);
> >> if (intel_de_read(dev_priv, VLV_DP_B) & DP_DETECTED ||
> >> has_port)
> >> - has_edp &= g4x_dp_init(dev_priv, VLV_DP_B,
> >> PORT_B);
> >> + has_edp &= g4x_dp_init(display, VLV_DP_B,
> >> PORT_B);
> >> if ((intel_de_read(dev_priv, VLV_HDMIB) & SDVO_DETECTED
> >> || has_port) && !has_edp)
> >> g4x_hdmi_init(dev_priv, VLV_HDMIB, PORT_B);
> >>
> >> has_edp = intel_dp_is_port_edp(display, PORT_C);
> >> has_port = intel_bios_is_port_present(display, PORT_C);
> >> if (intel_de_read(dev_priv, VLV_DP_C) & DP_DETECTED ||
> >> has_port)
> >> - has_edp &= g4x_dp_init(dev_priv, VLV_DP_C,
> >> PORT_C);
> >> + has_edp &= g4x_dp_init(display, VLV_DP_C,
> >> PORT_C);
> >> if ((intel_de_read(dev_priv, VLV_HDMIC) & SDVO_DETECTED
> >> || has_port) && !has_edp)
> >> g4x_hdmi_init(dev_priv, VLV_HDMIC, PORT_C);
> >>
> >> @@ -8293,7 +8293,7 @@ void intel_setup_outputs(struct
> >> drm_i915_private
> >> *dev_priv)
> >> */
> >> has_port = intel_bios_is_port_present(display,
> >> PORT_D);
> >> if (intel_de_read(dev_priv, CHV_DP_D) &
> >> DP_DETECTED || has_port)
> >> - g4x_dp_init(dev_priv, CHV_DP_D, PORT_D);
> >> + g4x_dp_init(display, CHV_DP_D, PORT_D);
> >> if (intel_de_read(dev_priv, CHV_HDMID) &
> >> SDVO_DETECTED || has_port)
> >> g4x_hdmi_init(dev_priv, CHV_HDMID,
> >> PORT_D);
> >> }
> >> @@ -8320,7 +8320,7 @@ void intel_setup_outputs(struct
> >> drm_i915_private
> >> *dev_priv)
> >> }
> >>
> >> if (!found && IS_G4X(dev_priv))
> >> - g4x_dp_init(dev_priv, DP_B, PORT_B);
> >> + g4x_dp_init(display, DP_B, PORT_B);
> >> }
> >>
> >> /* Before G4X SDVOC doesn't have its own detect
> >> register */ @@ -8338,11 +8338,11 @@ void intel_setup_outputs(struct
> >> drm_i915_private *dev_priv)
> >> g4x_hdmi_init(dev_priv, GEN4_HDMIC,
> >> PORT_C);
> >> }
> >> if (IS_G4X(dev_priv))
> >> - g4x_dp_init(dev_priv, DP_C, PORT_C);
> >> + g4x_dp_init(display, DP_C, PORT_C);
> >> }
> >>
> >> if (IS_G4X(dev_priv) && (intel_de_read(dev_priv, DP_D)
> >> &
> >> DP_DETECTED))
> >> - g4x_dp_init(dev_priv, DP_D, PORT_D);
> >> + g4x_dp_init(display, DP_D, PORT_D);
> >>
> >> if (SUPPORTS_TV(dev_priv))
> >> intel_tv_init(display); diff --git
> >> a/drivers/gpu/drm/i915/display/intel_pch_display.c
> >> b/drivers/gpu/drm/i915/display/intel_pch_display.c
> >> index 75ff5592312f..98a6b57ac956 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
> >> @@ -45,7 +45,7 @@ static void assert_pch_dp_disabled(struct
> >> drm_i915_private *dev_priv,
> >> enum pipe port_pipe;
> >> bool state;
> >>
> >> - state = g4x_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe);
> >> + state = g4x_dp_port_enabled(display, dp_reg, port, &port_pipe);
> >>
> >> INTEL_DISPLAY_STATE_WARN(display, state && port_pipe == pipe,
> >> "PCH DP %c enabled on transcoder %c,
> >> should be disabled\n", diff --git
> >> a/drivers/gpu/drm/i915/display/intel_pps.c
> >> b/drivers/gpu/drm/i915/display/intel_pps.c
> >> index ef6effaf82e0..617ce4993172 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> >> @@ -134,7 +134,7 @@ vlv_power_sequencer_kick(struct intel_dp
> *intel_dp)
> >> release_cl_override = display->platform.cherryview &&
> >> !chv_phy_powergate_ch(display, phy, ch, true);
> >>
> >> - if (vlv_force_pll_on(dev_priv, pipe, vlv_get_dpll(dev_priv))) {
> >> + if (vlv_force_pll_on(dev_priv, pipe,
> >> + vlv_get_dpll(display))) {
> >> drm_err(display->drm,
> >> "Failed to force on PLL for pipe %c!\n",
> >> pipe_name(pipe)); @@ -1225,11 +1225,10
> >> @@ static void vlv_steal_power_sequencer(struct intel_display
> >> *display, static enum pipe vlv_active_pipe(struct intel_dp
> >> *intel_dp) {
> >> struct intel_display *display = to_intel_display(intel_dp);
> >> - struct drm_i915_private *dev_priv = to_i915(display->drm);
> >> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> >> enum pipe pipe;
> >>
> >> - if (g4x_dp_port_enabled(dev_priv, intel_dp->output_reg,
> >> + if (g4x_dp_port_enabled(display, intel_dp->output_reg,
> >> encoder->port, &pipe))
> >> return pipe;
> >>
> >> @@ -1859,13 +1858,13 @@ void assert_pps_unlocked(struct intel_display
> >> *display, enum pipe pipe)
> >> intel_lvds_port_enabled(dev_priv, PCH_LVDS,
> >> &panel_pipe);
> >> break;
> >> case PANEL_PORT_SELECT_DPA:
> >> - g4x_dp_port_enabled(dev_priv, DP_A, PORT_A,
> >> &panel_pipe);
> >> + g4x_dp_port_enabled(display, DP_A, PORT_A,
> >> &panel_pipe);
> >> break;
> >> case PANEL_PORT_SELECT_DPC:
> >> - g4x_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C,
> >> &panel_pipe);
> >> + g4x_dp_port_enabled(display, PCH_DP_C, PORT_C,
> >> &panel_pipe);
> >> break;
> >> case PANEL_PORT_SELECT_DPD:
> >> - g4x_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D,
> >> &panel_pipe);
> >> + g4x_dp_port_enabled(display, PCH_DP_D, PORT_D,
> >> &panel_pipe);
> >> break;
> >> default:
> >> MISSING_CASE(port_sel);
> >> --
> >> 2.39.5
> >
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 08/14] drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display
2025-02-13 9:13 ` Kandpal, Suraj
@ 2025-02-13 11:16 ` Jani Nikula
0 siblings, 0 replies; 39+ messages in thread
From: Jani Nikula @ 2025-02-13 11:16 UTC (permalink / raw)
To: Kandpal, Suraj, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
On Thu, 13 Feb 2025, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote:
>> @@ -1941,12 +1942,13 @@ static enum drm_mode_status
>> intel_sdvo_mode_valid(struct drm_connector *connector,
>> const struct drm_display_mode *mode) {
>> + struct intel_display *display = to_intel_display(connector->dev);
>
> Why not &i915->display and declare this after i915 declaration
Because i915 will go away eventually, and I don't want to have to change
this line again.
BR,
Jani.
>
> Otherwise LGTM,
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
>
>
>> struct drm_i915_private *i915 = to_i915(connector->dev);
>> struct intel_sdvo *intel_sdvo =
>> intel_attached_sdvo(to_intel_connector(connector));
>> struct intel_sdvo_connector *intel_sdvo_connector =
>> to_intel_sdvo_connector(connector);
>> bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector,
>> connector->state);
>> - int max_dotclk = i915->display.cdclk.max_dotclk_freq;
>> + int max_dotclk = display->cdclk.max_dotclk_freq;
>> enum drm_mode_status status;
>> int clock = mode->clock;
>>
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
end of thread, other threads:[~2025-02-13 11:16 UTC | newest]
Thread overview: 39+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-12 16:36 [PATCH 00/14] drm/i915/display: conversions to struct intel_display Jani Nikula
2025-02-12 16:36 ` [PATCH 01/14] drm/i915/dp: convert g4x_dp.[ch] to struct intel display Jani Nikula
2025-02-13 8:48 ` Kandpal, Suraj
2025-02-13 9:13 ` Jani Nikula
2025-02-13 9:19 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 02/14] drm/i915/hdmi: convert g4x_hdmi.[ch] to struct intel_display Jani Nikula
2025-02-13 8:55 ` Kandpal, Suraj
2025-02-13 9:15 ` Jani Nikula
2025-02-12 16:36 ` [PATCH 03/14] drm/i915/ips: convert hsw_ips.c " Jani Nikula
2025-02-13 8:56 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 04/14] drm/i915/display: convert assert_transcoder*() " Jani Nikula
2025-02-13 8:58 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 05/14] drm/i915/display: convert assert_port_valid() " Jani Nikula
2025-02-13 8:59 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 06/14] drm/i915/hpd: drop dev_priv parameter from intel_hpd_pin_default() Jani Nikula
2025-02-13 9:01 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 07/14] drm/i915/display: convert intel_set_{cpu, pch}_fifo_underrun_reporting() to intel_display Jani Nikula
2025-02-13 9:03 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 08/14] drm/i915/sdvo: convert intel_sdvo.[ch] to struct intel_display Jani Nikula
2025-02-13 9:13 ` Kandpal, Suraj
2025-02-13 11:16 ` Jani Nikula
2025-02-12 16:36 ` [PATCH 09/14] drm/i915/display: convert intel_cpu_transcoder_mode_valid() to intel_display Jani Nikula
2025-02-13 9:15 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 10/14] drm/i915/display: convert intel_mode_valid_max_plane_size() " Jani Nikula
2025-02-13 9:16 ` Kandpal, Suraj
2025-02-12 16:36 ` [PATCH 11/14] drm/i915/dsi: convert platform checks to display->platform.<platform> style Jani Nikula
2025-02-12 16:36 ` [PATCH 12/14] drm/i915/combo-phy: convert intel_combo_phy.[ch] to struct intel_display Jani Nikula
2025-02-12 16:36 ` [PATCH 13/14] drm/i915/display: convert intel_fifo_underrun.[ch] " Jani Nikula
2025-02-12 16:36 ` [PATCH 14/14] drm/i915/display: convert i915_pipestat_enable_mask() " Jani Nikula
2025-02-12 17:17 ` [PATCH 00/14] drm/i915/display: conversions " Ville Syrjälä
2025-02-13 8:27 ` Jani Nikula
2025-02-12 20:32 ` ✓ CI.Patch_applied: success for " Patchwork
2025-02-12 20:33 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-12 20:34 ` ✓ CI.KUnit: success " Patchwork
2025-02-12 20:51 ` ✓ CI.Build: " Patchwork
2025-02-12 20:53 ` ✓ CI.Hooks: " Patchwork
2025-02-12 20:55 ` ✗ CI.checksparse: warning " Patchwork
2025-02-12 21:17 ` ✓ Xe.CI.BAT: success " Patchwork
2025-02-13 5:55 ` ✗ Xe.CI.Full: failure " Patchwork
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