From: Andi Shyti <andi.shyti@linux.intel.com>
To: Badal Nilawar <badal.nilawar@intel.com>
Cc: linux-hwmon@vger.kernel.org, intel-xe@lists.freedesktop.org,
linux@roeck-us.net
Subject: Re: [Intel-xe] [PATCH v2 3/6] drm/xe/hwmon: Expose card reactive critical power
Date: Thu, 29 Jun 2023 16:40:00 +0200 [thread overview]
Message-ID: <ZJ2XwFlgq4DUTrZr@ashyti-mobl2.lan> (raw)
In-Reply-To: <20230627183043.2024530-4-badal.nilawar@intel.com>
Hi Badal,
> Expose the card reactive critical (I1) power. I1 is exposed as
> power1_crit in microwatts (typically for client products) or as
> curr1_crit in milliamperes (typically for server).
> This is port from i915 hwmon.
Should this, then be a more generic framework for more gpu
drivers? Now we are having some code duplication.
[...]
> hwm_power_is_visible(struct hwm_drvdata *ddat, u32 attr, int chan)
> {
> u32 reg_val;
> + u32 uval;
>
> switch (attr) {
> case hwmon_power_max:
> @@ -248,6 +274,9 @@ hwm_power_is_visible(struct hwm_drvdata *ddat, u32 attr, int chan)
> case hwmon_power_rated_max:
> return process_hwmon_reg(ddat, pkg_power_sku,
> reg_read, ®_val, 0, 0) ? 0 : 0444;
> + case hwmon_power_crit:
> + return (hwm_pcode_read_i1(ddat->gt, &uval) ||
> + !(uval & POWER_SETUP_I1_WATTS)) ? 0 : 0644;
I like better the form below, with
err = hwm_pcode_read...()
if (!err)
return 0;
return !(uval & ....
> default:
> return 0;
[...]
> +static umode_t
> +hwm_curr_is_visible(const struct hwm_drvdata *ddat, u32 attr)
> +{
> + u32 uval;
> +
> + switch (attr) {
> + case hwmon_curr_crit:
> + return (hwm_pcode_read_i1(ddat->gt, &uval) ||
> + (uval & POWER_SETUP_I1_WATTS)) ? 0 : 0644;
this is a pattern that is repeated quite often, should this be a
separate function, maybe?
Andi
[...]
next prev parent reply other threads:[~2023-06-29 14:40 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-27 18:30 [Intel-xe] [PATCH v2 0/6] Add HWMON support for DGFX Badal Nilawar
2023-06-27 18:27 ` [Intel-xe] ✓ CI.Patch_applied: success for Add HWMON support for DGFX (rev2) Patchwork
2023-06-27 18:27 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-06-27 18:29 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-06-27 18:30 ` [Intel-xe] [PATCH v2 1/6] drm/xe/hwmon: Add HWMON infrastructure Badal Nilawar
2023-06-28 22:50 ` Matthew Brost
2023-07-05 18:30 ` Nilawar, Badal
2023-06-29 13:49 ` Andi Shyti
2023-07-07 14:23 ` Nilawar, Badal
2023-06-27 18:30 ` [Intel-xe] [PATCH v2 2/6] drm/xe/hwmon: Expose power attributes Badal Nilawar
2023-06-29 0:18 ` Matthew Brost
2023-06-29 14:09 ` Andi Shyti
2023-08-15 23:20 ` Dixit, Ashutosh
2023-08-18 4:03 ` Nilawar, Badal
2023-08-18 13:55 ` Andi Shyti
2023-07-06 10:36 ` Nilawar, Badal
2023-06-27 18:30 ` [Intel-xe] [PATCH v2 3/6] drm/xe/hwmon: Expose card reactive critical power Badal Nilawar
2023-06-28 15:52 ` Nilawar, Badal
2023-06-29 14:40 ` Andi Shyti [this message]
2023-07-06 19:05 ` Dixit, Ashutosh
2023-06-27 18:30 ` [Intel-xe] [PATCH v2 4/6] drm/xe/hwmon: Expose input voltage attribute Badal Nilawar
2023-06-29 14:58 ` Andi Shyti
2023-06-27 18:30 ` [Intel-xe] [PATCH v2 5/6] drm/xe/hwmon: Expose hwmon energy attribute Badal Nilawar
2023-06-29 15:09 ` Andi Shyti
2023-06-27 18:30 ` [Intel-xe] [PATCH v2 6/6] drm/xe/hwmon: Expose power1_max_interval Badal Nilawar
2023-06-27 18:32 ` [Intel-xe] ✓ CI.Build: success for Add HWMON support for DGFX (rev2) Patchwork
2023-06-27 18:33 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
2023-07-02 1:31 ` [Intel-xe] [PATCH v2 0/6] Add HWMON support for DGFX Dixit, Ashutosh
2023-07-02 3:02 ` Guenter Roeck
2023-07-02 15:57 ` Dixit, Ashutosh
2023-07-02 17:01 ` Guenter Roeck
2023-07-02 20:29 ` Dixit, Ashutosh
2023-07-02 20:51 ` Guenter Roeck
2023-07-03 1:48 ` Dixit, Ashutosh
2023-07-03 2:37 ` Guenter Roeck
2023-07-14 20:21 ` Rodrigo Vivi
2023-07-14 22:26 ` Guenter Roeck
2023-07-19 17:01 ` Rodrigo Vivi
2023-07-03 8:55 ` Andi Shyti
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