From: Matthew Brost <matthew.brost@intel.com>
To: Matthew Auld <matthew.auld@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [PATCH v4 1/7] drm/xe: hold mem_access.ref for CT fast-path
Date: Thu, 6 Jul 2023 03:51:36 +0000 [thread overview]
Message-ID: <ZKY6SHpACikaNmET@DUT025-TGLU.fm.intel.com> (raw)
In-Reply-To: <20230705160602.237213-10-matthew.auld@intel.com>
On Wed, Jul 05, 2023 at 05:06:04PM +0100, Matthew Auld wrote:
> Just checking xe_device_mem_access_ongoing() is not enough, we also need
> to hold the reference otherwise the ref can transition from 1 -> 0 as we
> enter g2h_read(), leading to warnings. While we can't do a full rpm sync
> in the IRQ, we can keep the device awake if the ref is non-zero.
> Introduce a new helper for this and set it to work in for the CT
> fast-path.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/xe/xe_device.c | 5 +++++
> drivers/gpu/drm/xe/xe_device.h | 1 +
> drivers/gpu/drm/xe/xe_guc_ct.c | 5 ++++-
> 3 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 07ae208af809..94b0089b0dee 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -412,6 +412,11 @@ u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size)
> DIV_ROUND_UP(size, NUM_BYTES_PER_CCS_BYTE) : 0;
> }
>
> +bool xe_device_mem_access_get_if_ongoing(struct xe_device *xe)
> +{
> + return atomic_inc_not_zero(&xe->mem_access.ref);
> +}
> +
> void xe_device_mem_access_get(struct xe_device *xe)
> {
> bool resumed = xe_pm_runtime_resume_if_suspended(xe);
> diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
> index 779f71d066e6..8e01bbadb149 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -138,6 +138,7 @@ static inline struct xe_force_wake * gt_to_fw(struct xe_gt *gt)
> }
>
> void xe_device_mem_access_get(struct xe_device *xe);
> +bool xe_device_mem_access_get_if_ongoing(struct xe_device *xe);
> void xe_device_mem_access_put(struct xe_device *xe);
>
> static inline bool xe_device_mem_access_ongoing(struct xe_device *xe)
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> index 22bc9ce846db..b7aecc480098 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> @@ -1038,7 +1038,8 @@ void xe_guc_ct_fast_path(struct xe_guc_ct *ct)
> struct xe_device *xe = ct_to_xe(ct);
> int len;
>
> - if (!xe_device_in_fault_mode(xe) || !xe_device_mem_access_ongoing(xe))
> + if (!xe_device_in_fault_mode(xe) ||
> + !xe_device_mem_access_get_if_ongoing(xe))
> return;
>
> spin_lock(&ct->fast_lock);
> @@ -1048,6 +1049,8 @@ void xe_guc_ct_fast_path(struct xe_guc_ct *ct)
> g2h_fast_path(ct, ct->fast_msg, len);
> } while (len > 0);
> spin_unlock(&ct->fast_lock);
> +
> + xe_device_mem_access_put(xe);
Can't this sleep if would go from 1->0, i.e. can't xe_pm_runtime_put sleep?
Matt
> }
>
> /* Returns less than zero on error, 0 on done, 1 on more available */
> --
> 2.41.0
>
next prev parent reply other threads:[~2023-07-06 3:52 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-05 16:06 [Intel-xe] [PATCH v4 0/7] Try to handle TLB invalidations from CT fast-path Matthew Auld
2023-07-05 16:06 ` [Intel-xe] [PATCH v4 1/7] drm/xe: hold mem_access.ref for " Matthew Auld
2023-07-06 3:51 ` Matthew Brost [this message]
2023-07-06 8:29 ` Matthew Auld
2023-07-06 14:50 ` Matthew Brost
2023-07-05 16:06 ` [Intel-xe] [PATCH v4 2/7] drm/xe/ct: hold fast_lock when reserving space for g2h Matthew Auld
2023-07-06 3:43 ` Matthew Brost
2023-07-05 16:06 ` [Intel-xe] [PATCH v4 3/7] drm/xe/tlb: increment next seqno after successful CT send Matthew Auld
2023-07-06 3:59 ` Matthew Brost
2023-07-06 9:42 ` Matthew Auld
2023-07-06 15:15 ` Matthew Brost
2023-07-06 15:22 ` Matthew Auld
2023-07-05 16:06 ` [Intel-xe] [PATCH v4 4/7] drm/xe/ct: serialise fast_lock during CT disable Matthew Auld
2023-07-06 4:00 ` Matthew Brost
2023-07-05 16:06 ` [Intel-xe] [PATCH v4 5/7] drm/xe/gt: tweak placement for signalling TLB fences after GT reset Matthew Auld
2023-07-06 4:01 ` Matthew Brost
2023-07-05 16:06 ` [Intel-xe] [PATCH v4 6/7] drm/xe/tlb: also update seqno_recv during reset Matthew Auld
2023-07-06 4:05 ` Matthew Brost
2023-07-06 10:02 ` Matthew Auld
2023-07-05 16:06 ` [Intel-xe] [PATCH v4 7/7] drm/xe: handle TLB invalidations from CT fast-path Matthew Auld
2023-07-06 4:14 ` Matthew Brost
2023-07-05 16:10 ` [Intel-xe] ✓ CI.Patch_applied: success for Try to handle TLB invalidations from CT fast-path (rev2) Patchwork
2023-07-05 16:11 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
2023-07-05 16:12 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
2023-07-05 16:16 ` [Intel-xe] ✓ CI.Build: " Patchwork
2023-07-05 16:16 ` [Intel-xe] ✓ CI.Hooks: " Patchwork
2023-07-05 16:17 ` [Intel-xe] ✓ CI.checksparse: " Patchwork
2023-07-05 17:02 ` [Intel-xe] ○ CI.BAT: info " Patchwork
2023-07-06 15:23 ` [Intel-xe] [PATCH v4 0/7] Try to handle TLB invalidations from CT fast-path Souza, Jose
2023-07-06 15:48 ` Matthew Auld
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