* [Intel-xe] [PATCH v2 01/50] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-07 16:26 ` Lucas De Marchi
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 02/50] drm/xe/uapi: Add documentation for query Francois Dugast
` (55 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Remove checkpatch warning:
-:126: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#126: FILE: drivers/gpu/drm/xe/xe_query.c:108:
+query_engine_cycles(struct xe_device *xe,
+ struct drm_xe_device_query *query)
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 77499ad5ba56..10b9878ec95a 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -105,7 +105,7 @@ __read_timestamps(struct xe_gt *gt,
static int
query_engine_cycles(struct xe_device *xe,
- struct drm_xe_device_query *query)
+ struct drm_xe_device_query *query)
{
struct drm_xe_query_engine_cycles __user *query_ptr;
struct drm_xe_engine_class_instance *eci;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 01/50] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 01/50] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
@ 2023-11-07 16:26 ` Lucas De Marchi
0 siblings, 0 replies; 81+ messages in thread
From: Lucas De Marchi @ 2023-11-07 16:26 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
On Fri, Nov 03, 2023 at 02:34:07PM +0000, Francois Dugast wrote:
>Remove checkpatch warning:
>
> -:126: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
> #126: FILE: drivers/gpu/drm/xe/xe_query.c:108:
> +query_engine_cycles(struct xe_device *xe,
> + struct drm_xe_device_query *query)
>
>Signed-off-by: Francois Dugast <francois.dugast@intel.com>
not sure why this commit was bundled here... should be a trivial one
pushed asap.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
I needed a commit to test some branch protection rules in gitlab and
used this one. Pushed to drm-xe-next.
Lucas De Marchi
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 02/50] drm/xe/uapi: Add documentation for query
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 01/50] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 03/50] drm/xe: Extend drm_xe_vm_bind_op Francois Dugast
` (54 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
Provide a description of the keys used the struct
drm_xe_query_config info array. Document the behavior
of the driver for IOCTL DRM_IOCTL_XE_DEVICE_QUERY
depending on the size value provided in struct
drm_xe_device_query.
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/637
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
include/uapi/drm/xe_drm.h | 41 ++++++++++++++++++++++++++++++++++++---
1 file changed, 38 insertions(+), 3 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 9bd7092a7ea4..0b1482d5f709 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -321,14 +321,43 @@ struct drm_xe_query_config {
/** @pad: MBZ */
__u32 pad;
+ /*
+ * Device ID (lower 16 bits) and the device revision (next
+ * 8 bits)
+ */
#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
+ /*
+ * Flags describing the device configuration, see list below
+ */
#define XE_QUERY_CONFIG_FLAGS 1
+ /*
+ * Flag is set if the device has usable VRAM
+ */
#define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
+ /*
+ * Minimal memory alignment required by this device,
+ * typically SZ_4K or SZ_64K
+ */
#define XE_QUERY_CONFIG_MIN_ALIGNMENT 2
+ /*
+ * Maximum bits of a virtual address
+ */
#define XE_QUERY_CONFIG_VA_BITS 3
+ /*
+ * Total number of GTs for the entire device
+ */
#define XE_QUERY_CONFIG_GT_COUNT 4
+ /*
+ * Total number of accessible memory regions
+ */
#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
+ /*
+ * Value of the highest available exec queue priority
+ */
#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
+ /*
+ * Number of elements in the info array
+ */
#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
/** @info: array of elements containing the config info */
__u64 info[];
@@ -440,9 +469,15 @@ struct drm_xe_query_topology_mask {
/**
* struct drm_xe_device_query - main structure to query device information
*
- * If size is set to 0, the driver fills it with the required size for the
- * requested type of data to query. If size is equal to the required size,
- * the queried information is copied into data.
+ * The user selects the type of data to query among DRM_XE_DEVICE_QUERY_*
+ * and sets the value in the query member. This determines the type of
+ * the structure provided by the driver in data, among struct drm_xe_query_*.
+ *
+ * If size is set to 0, the driver fills it with the required size for
+ * the requested type of data to query. If size is equal to the required
+ * size, the queried information is copied into data. If size is set to
+ * a value different from 0 and different from the required size, the
+ * IOCTL call returns -EINVAL.
*
* For example the following code snippet allows retrieving and printing
* information about the device engines with DRM_XE_DEVICE_QUERY_ENGINES:
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 03/50] drm/xe: Extend drm_xe_vm_bind_op
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 01/50] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 02/50] drm/xe/uapi: Add documentation for query Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 04/50] drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
` (53 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Lucas De Marchi, Rodrigo Vivi
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
The bind api is extensible but for a single bind op, there
is not a mechanism to extend. Add extensions field to
struct drm_xe_vm_bind_op.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Francois Dugast <francois.dugast@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
include/uapi/drm/xe_drm.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 0b1482d5f709..edbc58a4769c 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -656,6 +656,9 @@ struct drm_xe_vm_destroy {
};
struct drm_xe_vm_bind_op {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
/**
* @obj: GEM object to operate on, MBZ for MAP_USERPTR, MBZ for UNMAP
*/
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 04/50] drm/xe: Add uAPI to query micro-controler firmware version
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (2 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 03/50] drm/xe: Extend drm_xe_vm_bind_op Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-09 15:37 ` Souza, Jose
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 05/50] drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG Francois Dugast
` (52 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: José Roberto de Souza <jose.souza@intel.com>
Due to a bug in GuC firmware, Mesa can't enable by default the usage of
compute engines in DG2 and newer.
A new GuC firmware fixed the issue but until now there was no way
for Mesa to know if KMD was running with the fixed GuC version or not,
so this uAPI is required.
It may be expanded in future to query other firmware versions too.
More information: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661
Mesa usage: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233
v2:
- changed to submission version
- added branch version to be future proof
- checking if pads and reserved are zero
v3:
- add braces around case XE_QUERY_UC_TYPE_GUC to make CI happy
v4:
- squashed commits
- make it very clear and documented that it is about the submission
version, and also what that actually means.
Cc: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 41 +++++++++++++++++++++++++++++++++
include/uapi/drm/xe_drm.h | 43 +++++++++++++++++++++++++++++++++++
2 files changed, 84 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 10b9878ec95a..063f9bf071a3 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -498,6 +498,46 @@ static int query_gt_topology(struct xe_device *xe,
return 0;
}
+static int
+query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
+{
+ struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
+ size_t size = sizeof(struct drm_xe_query_uc_fw_version);
+ struct drm_xe_query_uc_fw_version resp;
+
+ if (query->size == 0) {
+ query->size = size;
+ return 0;
+ } else if (XE_IOCTL_DBG(xe, query->size != size)) {
+ return -EINVAL;
+ }
+
+ if (copy_from_user(&resp, query_ptr, size))
+ return -EFAULT;
+
+ if (XE_IOCTL_DBG(xe, resp.reserved || resp.pad2 || resp.reserved2))
+ return -EINVAL;
+
+ switch (resp.uc_type) {
+ case DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
+ struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
+
+ resp.major_ver = guc->submission_state.version.major;
+ resp.minor_ver = guc->submission_state.version.minor;
+ resp.patch_ver = guc->submission_state.version.patch;
+ resp.branch_ver = 0;
+ break;
+ }
+ default:
+ return -EINVAL;
+ }
+
+ if (copy_to_user(query_ptr, &resp, size))
+ return -EFAULT;
+
+ return 0;
+}
+
static int (* const xe_query_funcs[])(struct xe_device *xe,
struct drm_xe_device_query *query) = {
query_engines,
@@ -507,6 +547,7 @@ static int (* const xe_query_funcs[])(struct xe_device *xe,
query_hwconfig,
query_gt_topology,
query_engine_cycles,
+ query_uc_fw_version,
};
int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index edbc58a4769c..2246a686672b 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -466,6 +466,48 @@ struct drm_xe_query_topology_mask {
__u8 mask[];
};
+/**
+ * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
+ *
+ * Given a uc_type this will return the major, minor, patch and branch version
+ * of the micro-controller firmware.
+ *
+ * The @uc_type can be:
+ * - %DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION - This is the GuC Submission Version,
+ * a.k.a 'VF version'. It is not the actual GuC blob version. A running GuC can
+ * support multiple VF APIs with different Submission Versions. This version is
+ * negotiated by the VF KMD with GuC during VF initialization. In most of the
+ * current available GuC blobs, this is a 1-1 relationship where the Submission
+ * version could be inferred from the running version and vice-versa. However,
+ * the submission version is the most useful information for the user space
+ * perspective and needs.
+ * - %DRM_XE_QUERY_TYPE_HUC - The actual HuC blob that is currently running
+ * in the platform. It returns 0 when HuC is not currently loaded.
+ */
+struct drm_xe_query_uc_fw_version {
+ /** @uc_type: The micro-controller type to query firmware version */
+#define DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION 0
+ __u16 uc_type;
+
+ /** @reserved: Reserved */
+ __u16 reserved;
+
+ /* @major_ver: major uc fw version */
+ __u32 major_ver;
+ /* @minor_ver: minor uc fw version */
+ __u32 minor_ver;
+ /* @patch_ver: patch uc fw version */
+ __u32 patch_ver;
+ /* @branch_ver: branch uc fw version */
+ __u32 branch_ver;
+
+ /** @pad2: MBZ */
+ __u32 pad2;
+
+ /** @reserved2: Reserved */
+ __u64 reserved2;
+};
+
/**
* struct drm_xe_device_query - main structure to query device information
*
@@ -518,6 +560,7 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
+#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7
/** @query: The type of data to query */
__u32 query;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 04/50] drm/xe: Add uAPI to query micro-controler firmware version
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 04/50] drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
@ 2023-11-09 15:37 ` Souza, Jose
0 siblings, 0 replies; 81+ messages in thread
From: Souza, Jose @ 2023-11-09 15:37 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Dugast, Francois
On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> From: José Roberto de Souza <jose.souza@intel.com>
>
> Due to a bug in GuC firmware, Mesa can't enable by default the usage of
> compute engines in DG2 and newer.
>
> A new GuC firmware fixed the issue but until now there was no way
> for Mesa to know if KMD was running with the fixed GuC version or not,
> so this uAPI is required.
>
> It may be expanded in future to query other firmware versions too.
>
> More information: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661
> Mesa usage: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233
>
> v2:
> - changed to submission version
> - added branch version to be future proof
> - checking if pads and reserved are zero
>
> v3:
> - add braces around case XE_QUERY_UC_TYPE_GUC to make CI happy
>
> v4:
> - squashed commits
> - make it very clear and documented that it is about the submission
> version, and also what that actually means.
>
> Cc: John Harrison <John.C.Harrison@Intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 41 +++++++++++++++++++++++++++++++++
> include/uapi/drm/xe_drm.h | 43 +++++++++++++++++++++++++++++++++++
> 2 files changed, 84 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 10b9878ec95a..063f9bf071a3 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -498,6 +498,46 @@ static int query_gt_topology(struct xe_device *xe,
> return 0;
> }
>
> +static int
> +query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
> +{
> + struct drm_xe_query_uc_fw_version __user *query_ptr = u64_to_user_ptr(query->data);
> + size_t size = sizeof(struct drm_xe_query_uc_fw_version);
> + struct drm_xe_query_uc_fw_version resp;
> +
> + if (query->size == 0) {
> + query->size = size;
> + return 0;
> + } else if (XE_IOCTL_DBG(xe, query->size != size)) {
> + return -EINVAL;
> + }
> +
> + if (copy_from_user(&resp, query_ptr, size))
> + return -EFAULT;
> +
> + if (XE_IOCTL_DBG(xe, resp.reserved || resp.pad2 || resp.reserved2))
> + return -EINVAL;
> +
> + switch (resp.uc_type) {
> + case DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION: {
> + struct xe_guc *guc = &xe->tiles[0].primary_gt->uc.guc;
> +
> + resp.major_ver = guc->submission_state.version.major;
> + resp.minor_ver = guc->submission_state.version.minor;
> + resp.patch_ver = guc->submission_state.version.patch;
> + resp.branch_ver = 0;
> + break;
> + }
> + default:
> + return -EINVAL;
> + }
> +
> + if (copy_to_user(query_ptr, &resp, size))
> + return -EFAULT;
> +
> + return 0;
> +}
> +
> static int (* const xe_query_funcs[])(struct xe_device *xe,
> struct drm_xe_device_query *query) = {
> query_engines,
> @@ -507,6 +547,7 @@ static int (* const xe_query_funcs[])(struct xe_device *xe,
> query_hwconfig,
> query_gt_topology,
> query_engine_cycles,
> + query_uc_fw_version,
> };
>
> int xe_query_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index edbc58a4769c..2246a686672b 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -466,6 +466,48 @@ struct drm_xe_query_topology_mask {
> __u8 mask[];
> };
>
> +/**
> + * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
> + *
> + * Given a uc_type this will return the major, minor, patch and branch version
> + * of the micro-controller firmware.
> + *
> + * The @uc_type can be:
> + * - %DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION - This is the GuC Submission Version,
> + * a.k.a 'VF version'. It is not the actual GuC blob version. A running GuC can
> + * support multiple VF APIs with different Submission Versions. This version is
> + * negotiated by the VF KMD with GuC during VF initialization. In most of the
> + * current available GuC blobs, this is a 1-1 relationship where the Submission
> + * version could be inferred from the running version and vice-versa. However,
> + * the submission version is the most useful information for the user space
> + * perspective and needs.
> + * - %DRM_XE_QUERY_TYPE_HUC - The actual HuC blob that is currently running
> + * in the platform. It returns 0 when HuC is not currently loaded.
DRM_XE_QUERY_TYPE_HUC is added in 'drm/xe: Extend uAPI to query HuC micro-controler firmware version'.
> + */
> +struct drm_xe_query_uc_fw_version {
> + /** @uc_type: The micro-controller type to query firmware version */
> +#define DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION 0
> + __u16 uc_type;
> +
> + /** @reserved: Reserved */
> + __u16 reserved;
> +
> + /* @major_ver: major uc fw version */
> + __u32 major_ver;
> + /* @minor_ver: minor uc fw version */
> + __u32 minor_ver;
> + /* @patch_ver: patch uc fw version */
> + __u32 patch_ver;
> + /* @branch_ver: branch uc fw version */
> + __u32 branch_ver;
> +
> + /** @pad2: MBZ */
> + __u32 pad2;
> +
> + /** @reserved2: Reserved */
> + __u64 reserved2;
> +};
> +
> /**
> * struct drm_xe_device_query - main structure to query device information
> *
> @@ -518,6 +560,7 @@ struct drm_xe_device_query {
> #define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
> #define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
> +#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION 7
> /** @query: The type of data to query */
> __u32 query;
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 05/50] drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (3 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 04/50] drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 06/50] drm/xe: Extend uAPI to query HuC micro-controler firmware version Francois Dugast
` (51 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Add a documentation on the content and format of when using query type
DRM_XE_DEVICE_QUERY_HWCONFIG. The list of keys can be found in IGT
under lib/intel_hwconfig_types.h.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 2246a686672b..783bda74bd79 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -557,6 +557,11 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
#define DRM_XE_DEVICE_QUERY_CONFIG 2
#define DRM_XE_DEVICE_QUERY_GT_LIST 3
+ /*
+ * Query type to retrieve the hardware configuration of the device
+ * such as information on slices, memory, caches, and so on. It is
+ * provided as a table of attributes (key / value).
+ */
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 06/50] drm/xe: Extend uAPI to query HuC micro-controler firmware version
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (4 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 05/50] drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 07/50] drm/xe: Remove useless query config num_params Francois Dugast
` (50 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
The infrastructure to query GuC firmware version is already in place. It
is extended with a new micro-controller type to query the HuC firmware
version. It can be used from user space to know if HuC is running.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 9 +++++++++
include/uapi/drm/xe_drm.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 063f9bf071a3..a7f34669bb9a 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -528,6 +528,15 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
resp.branch_ver = 0;
break;
}
+ case DRM_XE_QUERY_UC_TYPE_HUC: {
+ struct xe_huc *huc = &xe->tiles[0].primary_gt->uc.huc;
+
+ resp.major_ver = huc->fw.major_ver_found;
+ resp.minor_ver = huc->fw.minor_ver_found;
+ resp.patch_ver = huc->fw.patch_ver_found;
+ resp.branch_ver = 0;
+ break;
+ }
default:
return -EINVAL;
}
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 783bda74bd79..67f96d44d509 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -487,6 +487,7 @@ struct drm_xe_query_topology_mask {
struct drm_xe_query_uc_fw_version {
/** @uc_type: The micro-controller type to query firmware version */
#define DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION 0
+#define DRM_XE_QUERY_UC_TYPE_HUC 1
__u16 uc_type;
/** @reserved: Reserved */
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 07/50] drm/xe: Remove useless query config num_params
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (5 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 06/50] drm/xe: Extend uAPI to query HuC micro-controler firmware version Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-07 15:49 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 08/50] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
` (49 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
num_params is only used to represent the number of query types.
Removing it as it is useless and should not be used.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 6 +++---
include/uapi/drm/xe_drm.h | 7 -------
2 files changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index a7f34669bb9a..0dc72668f560 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -305,9 +305,10 @@ static int query_memory_usage(struct xe_device *xe,
static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
{
- u32 num_params = XE_QUERY_CONFIG_NUM_PARAM;
+#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
size_t size =
- sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
+ sizeof(struct drm_xe_query_config)
+ + XE_QUERY_CONFIG_NUM_PARAM * sizeof(u64);
struct drm_xe_query_config __user *query_ptr =
u64_to_user_ptr(query->data);
struct drm_xe_query_config *config;
@@ -323,7 +324,6 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
if (!config)
return -ENOMEM;
- config->num_params = num_params;
config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
xe->info.devid | (xe->info.revid << 16);
if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 67f96d44d509..0c106043827c 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -315,9 +315,6 @@ struct drm_xe_query_mem_usage {
* struct drm_xe_query_config in .data.
*/
struct drm_xe_query_config {
- /** @num_params: number of parameters returned in info */
- __u32 num_params;
-
/** @pad: MBZ */
__u32 pad;
@@ -355,10 +352,6 @@ struct drm_xe_query_config {
* Value of the highest available exec queue priority
*/
#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
- /*
- * Number of elements in the info array
- */
-#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
/** @info: array of elements containing the config info */
__u64 info[];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 07/50] drm/xe: Remove useless query config num_params
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 07/50] drm/xe: Remove useless query config num_params Francois Dugast
@ 2023-11-07 15:49 ` Francois Dugast
0 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-07 15:49 UTC (permalink / raw)
To: intel-xe
This will be updated to remove XE_QUERY_CONFIG_NUM_PARAM from the
uAPI but to keep num_params in order to make it easier for UMDs
to verify info[] index is in range when using an older kernel.
Francois
On Fri, Nov 03, 2023 at 02:34:13PM +0000, Francois Dugast wrote:
> num_params is only used to represent the number of query types.
> Removing it as it is useless and should not be used.
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 6 +++---
> include/uapi/drm/xe_drm.h | 7 -------
> 2 files changed, 3 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index a7f34669bb9a..0dc72668f560 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -305,9 +305,10 @@ static int query_memory_usage(struct xe_device *xe,
>
> static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> {
> - u32 num_params = XE_QUERY_CONFIG_NUM_PARAM;
> +#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
> size_t size =
> - sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
> + sizeof(struct drm_xe_query_config)
> + + XE_QUERY_CONFIG_NUM_PARAM * sizeof(u64);
> struct drm_xe_query_config __user *query_ptr =
> u64_to_user_ptr(query->data);
> struct drm_xe_query_config *config;
> @@ -323,7 +324,6 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> if (!config)
> return -ENOMEM;
>
> - config->num_params = num_params;
> config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
> xe->info.devid | (xe->info.revid << 16);
> if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 67f96d44d509..0c106043827c 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -315,9 +315,6 @@ struct drm_xe_query_mem_usage {
> * struct drm_xe_query_config in .data.
> */
> struct drm_xe_query_config {
> - /** @num_params: number of parameters returned in info */
> - __u32 num_params;
> -
> /** @pad: MBZ */
> __u32 pad;
>
> @@ -355,10 +352,6 @@ struct drm_xe_query_config {
> * Value of the highest available exec queue priority
> */
> #define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
> - /*
> - * Number of elements in the info array
> - */
> -#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
> /** @info: array of elements containing the config info */
> __u64 info[];
> };
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 08/50] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (6 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 07/50] drm/xe: Remove useless query config num_params Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-07 14:05 ` Matthew Brost
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 09/50] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
` (48 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Most constants defined in xe_drm.h use DRM_XE_ as prefix which is
helpful to identify the name space. Make this systematic and add
this prefix where it was missing.
v2:
- fix vertical alignment of define values
- remove double DRM_ in some variables (José Roberto de Souza)
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_bo.c | 14 +--
drivers/gpu/drm/xe/xe_exec_queue.c | 20 ++---
drivers/gpu/drm/xe/xe_gt.c | 2 +-
drivers/gpu/drm/xe/xe_pmu.c | 20 ++---
drivers/gpu/drm/xe/xe_query.c | 34 ++++----
drivers/gpu/drm/xe/xe_vm.c | 54 ++++++------
drivers/gpu/drm/xe/xe_vm_doc.h | 12 +--
drivers/gpu/drm/xe/xe_vm_madvise.c | 8 +-
include/uapi/drm/xe_drm.h | 136 ++++++++++++++---------------
9 files changed, 150 insertions(+), 150 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index cd043b1308ec..632f75a752c5 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -208,7 +208,7 @@ static int __xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo,
/* The order of placements should indicate preferred location */
- if (bo->props.preferred_mem_class == XE_MEM_REGION_CLASS_SYSMEM) {
+ if (bo->props.preferred_mem_class == DRM_XE_MEM_REGION_CLASS_SYSMEM) {
try_add_system(bo, places, bo_flags, &c);
try_add_vram(xe, bo, places, bo_flags, &c);
} else {
@@ -1804,9 +1804,9 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
if (XE_IOCTL_DBG(xe, args->flags &
- ~(XE_GEM_CREATE_FLAG_DEFER_BACKING |
- XE_GEM_CREATE_FLAG_SCANOUT |
- XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
+ ~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
+ DRM_XE_GEM_CREATE_FLAG_SCANOUT |
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
xe->info.mem_region_mask)))
return -EINVAL;
@@ -1826,15 +1826,15 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(xe, args->size & ~PAGE_MASK))
return -EINVAL;
- if (args->flags & XE_GEM_CREATE_FLAG_DEFER_BACKING)
+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING)
bo_flags |= XE_BO_DEFER_BACKING;
- if (args->flags & XE_GEM_CREATE_FLAG_SCANOUT)
+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
bo_flags |= XE_BO_SCANOUT_BIT;
bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
- if (args->flags & XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))
return -EINVAL;
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 4fd44a9203e4..59e8d1ed34f7 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -406,14 +406,14 @@ typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe,
u64 value, bool create);
static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = {
- [XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
- [XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
- [XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
- [XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
- [XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
- [XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
- [XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
- [XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
};
static int exec_queue_user_ext_set_property(struct xe_device *xe,
@@ -445,7 +445,7 @@ typedef int (*xe_exec_queue_user_extension_fn)(struct xe_device *xe,
bool create);
static const xe_exec_queue_set_property_fn exec_queue_user_extension_funcs[] = {
- [XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
+ [DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
};
#define MAX_USER_EXTENSIONS 16
@@ -764,7 +764,7 @@ int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data,
return -ENOENT;
switch (args->property) {
- case XE_EXEC_QUEUE_GET_PROPERTY_BAN:
+ case DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN:
args->value = !!(q->flags & EXEC_QUEUE_FLAG_BANNED);
ret = 0;
break;
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index d380f67b3365..206ae8d785b8 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -556,7 +556,7 @@ static void xe_uevent_gt_reset_failure(struct pci_dev *pdev, u8 tile_id, u8 gt_i
{
char *reset_event[4];
- reset_event[0] = XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
+ reset_event[0] = DRM_XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
reset_event[1] = kasprintf(GFP_KERNEL, "TILE_ID=%d", tile_id);
reset_event[2] = kasprintf(GFP_KERNEL, "GT_ID=%d", gt_id);
reset_event[3] = NULL;
diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
index abfc0b3aeac4..8378ca3007d9 100644
--- a/drivers/gpu/drm/xe/xe_pmu.c
+++ b/drivers/gpu/drm/xe/xe_pmu.c
@@ -114,17 +114,17 @@ config_status(struct xe_device *xe, u64 config)
return -ENOENT;
switch (config_counter(config)) {
- case XE_PMU_INTERRUPTS(0):
+ case DRM_XE_PMU_INTERRUPTS(0):
if (gt_id)
return -ENOENT;
break;
- case XE_PMU_RENDER_GROUP_BUSY(0):
- case XE_PMU_COPY_GROUP_BUSY(0):
- case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
+ case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
+ case DRM_XE_PMU_COPY_GROUP_BUSY(0):
+ case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
if (gt->info.type == XE_GT_TYPE_MEDIA)
return -ENOENT;
break;
- case XE_PMU_MEDIA_GROUP_BUSY(0):
+ case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
if (!(gt->info.engine_mask & (BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VECS0))))
return -ENOENT;
break;
@@ -185,13 +185,13 @@ static u64 __xe_pmu_event_read(struct perf_event *event)
u64 val;
switch (config_counter(config)) {
- case XE_PMU_INTERRUPTS(0):
+ case DRM_XE_PMU_INTERRUPTS(0):
val = READ_ONCE(pmu->irq_count);
break;
- case XE_PMU_RENDER_GROUP_BUSY(0):
- case XE_PMU_COPY_GROUP_BUSY(0):
- case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
- case XE_PMU_MEDIA_GROUP_BUSY(0):
+ case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
+ case DRM_XE_PMU_COPY_GROUP_BUSY(0):
+ case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
+ case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
val = engine_group_busyness_read(gt, config);
break;
default:
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 0dc72668f560..d8416fb93327 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -261,7 +261,7 @@ static int query_memory_usage(struct xe_device *xe,
return -ENOMEM;
man = ttm_manager_type(&xe->ttm, XE_PL_TT);
- usage->regions[0].mem_class = XE_MEM_REGION_CLASS_SYSMEM;
+ usage->regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
usage->regions[0].instance = 0;
usage->regions[0].min_page_size = PAGE_SIZE;
usage->regions[0].total_size = man->size << PAGE_SHIFT;
@@ -273,7 +273,7 @@ static int query_memory_usage(struct xe_device *xe,
man = ttm_manager_type(&xe->ttm, i);
if (man) {
usage->regions[usage->num_regions].mem_class =
- XE_MEM_REGION_CLASS_VRAM;
+ DRM_XE_MEM_REGION_CLASS_VRAM;
usage->regions[usage->num_regions].instance =
usage->num_regions;
usage->regions[usage->num_regions].min_page_size =
@@ -305,7 +305,7 @@ static int query_memory_usage(struct xe_device *xe,
static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
{
-#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
+#define XE_QUERY_CONFIG_NUM_PARAM (DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
size_t size =
sizeof(struct drm_xe_query_config)
+ XE_QUERY_CONFIG_NUM_PARAM * sizeof(u64);
@@ -324,18 +324,18 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
if (!config)
return -ENOMEM;
- config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
+ config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
xe->info.devid | (xe->info.revid << 16);
if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
- config->info[XE_QUERY_CONFIG_FLAGS] =
- XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
- config->info[XE_QUERY_CONFIG_MIN_ALIGNMENT] =
+ config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
+ DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
+ config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
- config->info[XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
- config->info[XE_QUERY_CONFIG_GT_COUNT] = xe->info.gt_count;
- config->info[XE_QUERY_CONFIG_MEM_REGION_COUNT] =
+ config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
+ config->info[DRM_XE_QUERY_CONFIG_GT_COUNT] = xe->info.gt_count;
+ config->info[DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT] =
hweight_long(xe->info.mem_region_mask);
- config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
+ config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
xe_exec_queue_device_get_max_priority(xe);
if (copy_to_user(query_ptr, config, size)) {
@@ -371,11 +371,11 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
gt_list->num_gt = xe->info.gt_count;
for_each_gt(gt, xe, id) {
if (xe_gt_is_media_type(gt))
- gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MEDIA;
+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
else if (gt_to_tile(gt)->id > 0)
- gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_REMOTE;
+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_REMOTE;
else
- gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MAIN;
+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
gt_list->gt_list[id].gt_id = gt->info.id;
gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
if (!IS_DGFX(xe))
@@ -473,21 +473,21 @@ static int query_gt_topology(struct xe_device *xe,
for_each_gt(gt, xe, id) {
topo.gt_id = id;
- topo.type = XE_TOPO_DSS_GEOMETRY;
+ topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
query_ptr = copy_mask(query_ptr, &topo,
gt->fuse_topo.g_dss_mask,
sizeof(gt->fuse_topo.g_dss_mask));
if (IS_ERR(query_ptr))
return PTR_ERR(query_ptr);
- topo.type = XE_TOPO_DSS_COMPUTE;
+ topo.type = DRM_XE_TOPO_DSS_COMPUTE;
query_ptr = copy_mask(query_ptr, &topo,
gt->fuse_topo.c_dss_mask,
sizeof(gt->fuse_topo.c_dss_mask));
if (IS_ERR(query_ptr))
return PTR_ERR(query_ptr);
- topo.type = XE_TOPO_EU_PER_DSS;
+ topo.type = DRM_XE_TOPO_EU_PER_DSS;
query_ptr = copy_mask(query_ptr, &topo,
gt->fuse_topo.eu_mask_per_dss,
sizeof(gt->fuse_topo.eu_mask_per_dss));
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 498c0b3e1d73..ad2f450f6c79 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2183,8 +2183,8 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
(ULL)bo_offset_or_userptr);
switch (operation) {
- case XE_VM_BIND_OP_MAP:
- case XE_VM_BIND_OP_MAP_USERPTR:
+ case DRM_XE_VM_BIND_OP_MAP:
+ case DRM_XE_VM_BIND_OP_MAP_USERPTR:
ops = drm_gpuvm_sm_map_ops_create(&vm->gpuvm, addr, range,
obj, bo_offset_or_userptr);
if (IS_ERR(ops))
@@ -2195,13 +2195,13 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
op->tile_mask = tile_mask;
op->map.immediate =
- flags & XE_VM_BIND_FLAG_IMMEDIATE;
+ flags & DRM_XE_VM_BIND_FLAG_IMMEDIATE;
op->map.read_only =
- flags & XE_VM_BIND_FLAG_READONLY;
- op->map.is_null = flags & XE_VM_BIND_FLAG_NULL;
+ flags & DRM_XE_VM_BIND_FLAG_READONLY;
+ op->map.is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
}
break;
- case XE_VM_BIND_OP_UNMAP:
+ case DRM_XE_VM_BIND_OP_UNMAP:
ops = drm_gpuvm_sm_unmap_ops_create(&vm->gpuvm, addr, range);
if (IS_ERR(ops))
return ops;
@@ -2212,7 +2212,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
op->tile_mask = tile_mask;
}
break;
- case XE_VM_BIND_OP_PREFETCH:
+ case DRM_XE_VM_BIND_OP_PREFETCH:
ops = drm_gpuvm_prefetch_ops_create(&vm->gpuvm, addr, range);
if (IS_ERR(ops))
return ops;
@@ -2224,7 +2224,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
op->prefetch.region = region;
}
break;
- case XE_VM_BIND_OP_UNMAP_ALL:
+ case DRM_XE_VM_BIND_OP_UNMAP_ALL:
xe_assert(vm->xe, bo);
err = xe_bo_lock(bo, true);
@@ -2817,13 +2817,13 @@ static int vm_bind_ioctl_ops_execute(struct xe_vm *vm,
#ifdef TEST_VM_ASYNC_OPS_ERROR
#define SUPPORTED_FLAGS \
- (FORCE_ASYNC_OP_ERROR | XE_VM_BIND_FLAG_ASYNC | \
- XE_VM_BIND_FLAG_READONLY | XE_VM_BIND_FLAG_IMMEDIATE | \
- XE_VM_BIND_FLAG_NULL | 0xffff)
+ (FORCE_ASYNC_OP_ERROR | DRM_XE_VM_BIND_FLAG_ASYNC | \
+ DRM_XE_VM_BIND_FLAG_READONLY | DRM_XE_VM_BIND_FLAG_IMMEDIATE | \
+ DRM_XE_VM_BIND_FLAG_NULL | 0xffff)
#else
#define SUPPORTED_FLAGS \
- (XE_VM_BIND_FLAG_ASYNC | XE_VM_BIND_FLAG_READONLY | \
- XE_VM_BIND_FLAG_IMMEDIATE | XE_VM_BIND_FLAG_NULL | \
+ (DRM_XE_VM_BIND_FLAG_ASYNC | DRM_XE_VM_BIND_FLAG_READONLY | \
+ DRM_XE_VM_BIND_FLAG_IMMEDIATE | DRM_XE_VM_BIND_FLAG_NULL | \
0xffff)
#endif
#define XE_64K_PAGE_MASK 0xffffull
@@ -2871,45 +2871,45 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
u32 obj = (*bind_ops)[i].obj;
u64 obj_offset = (*bind_ops)[i].obj_offset;
u32 region = (*bind_ops)[i].region;
- bool is_null = flags & XE_VM_BIND_FLAG_NULL;
+ bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
if (i == 0) {
- *async = !!(flags & XE_VM_BIND_FLAG_ASYNC);
+ *async = !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC);
if (XE_IOCTL_DBG(xe, !*async && args->num_syncs)) {
err = -EINVAL;
goto free_bind_ops;
}
} else if (XE_IOCTL_DBG(xe, *async !=
- !!(flags & XE_VM_BIND_FLAG_ASYNC))) {
+ !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC))) {
err = -EINVAL;
goto free_bind_ops;
}
- if (XE_IOCTL_DBG(xe, op > XE_VM_BIND_OP_PREFETCH) ||
+ if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) ||
XE_IOCTL_DBG(xe, obj && is_null) ||
XE_IOCTL_DBG(xe, obj_offset && is_null) ||
- XE_IOCTL_DBG(xe, op != XE_VM_BIND_OP_MAP &&
+ XE_IOCTL_DBG(xe, op != DRM_XE_VM_BIND_OP_MAP &&
is_null) ||
XE_IOCTL_DBG(xe, !obj &&
- op == XE_VM_BIND_OP_MAP &&
+ op == DRM_XE_VM_BIND_OP_MAP &&
!is_null) ||
XE_IOCTL_DBG(xe, !obj &&
- op == XE_VM_BIND_OP_UNMAP_ALL) ||
+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
XE_IOCTL_DBG(xe, addr &&
- op == XE_VM_BIND_OP_UNMAP_ALL) ||
+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
XE_IOCTL_DBG(xe, range &&
- op == XE_VM_BIND_OP_UNMAP_ALL) ||
+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
XE_IOCTL_DBG(xe, obj &&
- op == XE_VM_BIND_OP_MAP_USERPTR) ||
+ op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
XE_IOCTL_DBG(xe, obj &&
- op == XE_VM_BIND_OP_PREFETCH) ||
+ op == DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, region &&
- op != XE_VM_BIND_OP_PREFETCH) ||
+ op != DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, !(BIT(region) &
xe->info.mem_region_mask)) ||
XE_IOCTL_DBG(xe, obj &&
- op == XE_VM_BIND_OP_UNMAP)) {
+ op == DRM_XE_VM_BIND_OP_UNMAP)) {
err = -EINVAL;
goto free_bind_ops;
}
@@ -2918,7 +2918,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
XE_IOCTL_DBG(xe, addr & ~PAGE_MASK) ||
XE_IOCTL_DBG(xe, range & ~PAGE_MASK) ||
XE_IOCTL_DBG(xe, !range &&
- op != XE_VM_BIND_OP_UNMAP_ALL)) {
+ op != DRM_XE_VM_BIND_OP_UNMAP_ALL)) {
err = -EINVAL;
goto free_bind_ops;
}
diff --git a/drivers/gpu/drm/xe/xe_vm_doc.h b/drivers/gpu/drm/xe/xe_vm_doc.h
index b1b2dc4a6089..516f4dc97223 100644
--- a/drivers/gpu/drm/xe/xe_vm_doc.h
+++ b/drivers/gpu/drm/xe/xe_vm_doc.h
@@ -32,9 +32,9 @@
* Operations
* ----------
*
- * XE_VM_BIND_OP_MAP - Create mapping for a BO
- * XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
- * XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
+ * DRM_XE_VM_BIND_OP_MAP - Create mapping for a BO
+ * DRM_XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
+ * DRM_XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
*
* Implementation details
* ~~~~~~~~~~~~~~~~~~~~~~
@@ -113,7 +113,7 @@
* VM uses to report errors to. The ufence wait interface can be used to wait on
* a VM going into an error state. Once an error is reported the VM's async
* worker is paused. While the VM's async worker is paused sync,
- * XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
+ * DRM_XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
* uses believe the error state is fixed, the async worker can be resumed via
* XE_VM_BIND_OP_RESTART operation. When VM async bind work is restarted, the
* first operation processed is the operation that caused the original error.
@@ -193,7 +193,7 @@
* In a VM is in fault mode (TODO: link to fault mode), new bind operations that
* create mappings are by default are deferred to the page fault handler (first
* use). This behavior can be overriden by setting the flag
- * XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
+ * DRM_XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
* immediately.
*
* User pointer
@@ -322,7 +322,7 @@
*
* By default, on a faulting VM binds just allocate the VMA and the actual
* updating of the page tables is defered to the page fault handler. This
- * behavior can be overridden by setting the flag XE_VM_BIND_FLAG_IMMEDIATE in
+ * behavior can be overridden by setting the flag DRM_XE_VM_BIND_FLAG_IMMEDIATE in
* the VM bind which will then do the bind immediately.
*
* Page fault handler
diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
index 0ef7d483d050..72d051ecac5c 100644
--- a/drivers/gpu/drm/xe/xe_vm_madvise.c
+++ b/drivers/gpu/drm/xe/xe_vm_madvise.c
@@ -19,10 +19,10 @@ static int madvise_preferred_mem_class(struct xe_device *xe, struct xe_vm *vm,
{
int i, err;
- if (XE_IOCTL_DBG(xe, value > XE_MEM_REGION_CLASS_VRAM))
+ if (XE_IOCTL_DBG(xe, value > DRM_XE_MEM_REGION_CLASS_VRAM))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, value == XE_MEM_REGION_CLASS_VRAM &&
+ if (XE_IOCTL_DBG(xe, value == DRM_XE_MEM_REGION_CLASS_VRAM &&
!xe->info.is_dgfx))
return -EINVAL;
@@ -75,10 +75,10 @@ static int madvise_preferred_mem_class_gt(struct xe_device *xe,
u32 gt_id = upper_32_bits(value);
u32 mem_class = lower_32_bits(value);
- if (XE_IOCTL_DBG(xe, mem_class > XE_MEM_REGION_CLASS_VRAM))
+ if (XE_IOCTL_DBG(xe, mem_class > DRM_XE_MEM_REGION_CLASS_VRAM))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, mem_class == XE_MEM_REGION_CLASS_VRAM &&
+ if (XE_IOCTL_DBG(xe, mem_class == DRM_XE_MEM_REGION_CLASS_VRAM &&
!xe->info.is_dgfx))
return -EINVAL;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 0c106043827c..bd0b9d5682e0 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -19,12 +19,12 @@ extern "C" {
/**
* DOC: uevent generated by xe on it's pci node.
*
- * XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
+ * DRM_XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
* fails. The value supplied with the event is always "NEEDS_RESET".
* Additional information supplied is tile id and gt id of the gt unit for
* which reset has failed.
*/
-#define XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
+#define DRM_XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
/**
* struct xe_user_extension - Base class for defining a chain of extensions
@@ -103,8 +103,8 @@ struct xe_user_extension {
#define DRM_XE_VM_CREATE 0x03
#define DRM_XE_VM_DESTROY 0x04
#define DRM_XE_VM_BIND 0x05
-#define DRM_XE_EXEC_QUEUE_CREATE 0x06
-#define DRM_XE_EXEC_QUEUE_DESTROY 0x07
+#define DRM_XE_EXEC_QUEUE_CREATE 0x06
+#define DRM_XE_EXEC_QUEUE_DESTROY 0x07
#define DRM_XE_EXEC 0x08
#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x09
#define DRM_XE_WAIT_USER_FENCE 0x0a
@@ -150,14 +150,14 @@ struct drm_xe_engine_class_instance {
* enum drm_xe_memory_class - Supported memory classes.
*/
enum drm_xe_memory_class {
- /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
- XE_MEM_REGION_CLASS_SYSMEM = 0,
+ /** @DRM_XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
+ DRM_XE_MEM_REGION_CLASS_SYSMEM = 0,
/**
- * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
+ * @DRM_XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
* represents the memory that is local to the device, which we
* call VRAM. Not valid on integrated platforms.
*/
- XE_MEM_REGION_CLASS_VRAM
+ DRM_XE_MEM_REGION_CLASS_VRAM
};
/**
@@ -217,7 +217,7 @@ struct drm_xe_query_mem_region {
* always equal the @total_size, since all of it will be CPU
* accessible.
*
- * Note this is only tracked for XE_MEM_REGION_CLASS_VRAM
+ * Note this is only tracked for DRM_XE_MEM_REGION_CLASS_VRAM
* regions (for other types the value here will always equal
* zero).
*/
@@ -229,7 +229,7 @@ struct drm_xe_query_mem_region {
* Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
* accounting. Without this the value here will always equal
* zero. Note this is only currently tracked for
- * XE_MEM_REGION_CLASS_VRAM regions (for other types the value
+ * DRM_XE_MEM_REGION_CLASS_VRAM regions (for other types the value
* here will always be zero).
*/
__u64 cpu_visible_used;
@@ -322,36 +322,36 @@ struct drm_xe_query_config {
* Device ID (lower 16 bits) and the device revision (next
* 8 bits)
*/
-#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
+#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
/*
* Flags describing the device configuration, see list below
*/
-#define XE_QUERY_CONFIG_FLAGS 1
+#define DRM_XE_QUERY_CONFIG_FLAGS 1
/*
* Flag is set if the device has usable VRAM
*/
- #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
+ #define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
/*
* Minimal memory alignment required by this device,
* typically SZ_4K or SZ_64K
*/
-#define XE_QUERY_CONFIG_MIN_ALIGNMENT 2
+#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
/*
* Maximum bits of a virtual address
*/
-#define XE_QUERY_CONFIG_VA_BITS 3
+#define DRM_XE_QUERY_CONFIG_VA_BITS 3
/*
* Total number of GTs for the entire device
*/
-#define XE_QUERY_CONFIG_GT_COUNT 4
+#define DRM_XE_QUERY_CONFIG_GT_COUNT 4
/*
* Total number of accessible memory regions
*/
-#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
+#define DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT 5
/*
* Value of the highest available exec queue priority
*/
-#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
+#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
/** @info: array of elements containing the config info */
__u64 info[];
};
@@ -365,9 +365,9 @@ struct drm_xe_query_config {
* implementing graphics and/or media operations.
*/
struct drm_xe_query_gt {
-#define XE_QUERY_GT_TYPE_MAIN 0
-#define XE_QUERY_GT_TYPE_REMOTE 1
-#define XE_QUERY_GT_TYPE_MEDIA 2
+#define DRM_XE_QUERY_GT_TYPE_MAIN 0
+#define DRM_XE_QUERY_GT_TYPE_REMOTE 1
+#define DRM_XE_QUERY_GT_TYPE_MEDIA 2
/** @type: GT type: Main, Remote, or Media */
__u16 type;
/** @gt_id: Unique ID of this GT within the PCI Device */
@@ -432,7 +432,7 @@ struct drm_xe_query_topology_mask {
* DSS_GEOMETRY ff ff ff ff 00 00 00 00
* means 32 DSS are available for geometry.
*/
-#define XE_TOPO_DSS_GEOMETRY (1 << 0)
+#define DRM_XE_TOPO_DSS_GEOMETRY (1 << 0)
/*
* To query the mask of Dual Sub Slices (DSS) available for compute
* operations. For example a query response containing the following
@@ -440,7 +440,7 @@ struct drm_xe_query_topology_mask {
* DSS_COMPUTE ff ff ff ff 00 00 00 00
* means 32 DSS are available for compute.
*/
-#define XE_TOPO_DSS_COMPUTE (1 << 1)
+#define DRM_XE_TOPO_DSS_COMPUTE (1 << 1)
/*
* To query the mask of Execution Units (EU) available per Dual Sub
* Slices (DSS). For example a query response containing the following
@@ -448,7 +448,7 @@ struct drm_xe_query_topology_mask {
* EU_PER_DSS ff ff 00 00 00 00 00 00
* means each DSS has 16 EU.
*/
-#define XE_TOPO_EU_PER_DSS (1 << 2)
+#define DRM_XE_TOPO_EU_PER_DSS (1 << 2)
/** @type: type of mask */
__u16 type;
@@ -584,8 +584,8 @@ struct drm_xe_gem_create {
*/
__u64 size;
-#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
-#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
+#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
+#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
/*
* When using VRAM as a possible placement, ensure that the corresponding VRAM
* allocation will always use the CPU accessible part of VRAM. This is important
@@ -601,7 +601,7 @@ struct drm_xe_gem_create {
* display surfaces, therefore the kernel requires setting this flag for such
* objects, otherwise an error is thrown on small-bar systems.
*/
-#define XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
+#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
/**
* @flags: Flags, currently a mask of memory instances of where BO can
* be placed
@@ -668,14 +668,14 @@ struct drm_xe_ext_set_property {
};
struct drm_xe_vm_create {
-#define XE_VM_EXTENSION_SET_PROPERTY 0
+#define DRM_XE_VM_EXTENSION_SET_PROPERTY 0
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
-#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
-#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
-#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
+#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
+#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
+#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
+#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
/** @flags: Flags */
__u32 flags;
@@ -734,29 +734,29 @@ struct drm_xe_vm_bind_op {
*/
__u64 tile_mask;
-#define XE_VM_BIND_OP_MAP 0x0
-#define XE_VM_BIND_OP_UNMAP 0x1
-#define XE_VM_BIND_OP_MAP_USERPTR 0x2
-#define XE_VM_BIND_OP_UNMAP_ALL 0x3
-#define XE_VM_BIND_OP_PREFETCH 0x4
+#define DRM_XE_VM_BIND_OP_MAP 0x0
+#define DRM_XE_VM_BIND_OP_UNMAP 0x1
+#define DRM_XE_VM_BIND_OP_MAP_USERPTR 0x2
+#define DRM_XE_VM_BIND_OP_UNMAP_ALL 0x3
+#define DRM_XE_VM_BIND_OP_PREFETCH 0x4
/** @op: Bind operation to perform */
__u32 op;
-#define XE_VM_BIND_FLAG_READONLY (0x1 << 0)
-#define XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
+#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
+#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
/*
* Valid on a faulting VM only, do the MAP operation immediately rather
* than deferring the MAP to the page fault handler.
*/
-#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
+#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
/*
* When the NULL flag is set, the page tables are setup with a special
* bit which indicates writes are dropped and all reads return zero. In
- * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
+ * the future, the NULL flags will only be valid for DRM_XE_VM_BIND_OP_MAP
* operations, the BO handle MBZ, and the BO offset MBZ. This flag is
* intended to implement VK sparse bindings.
*/
-#define XE_VM_BIND_FLAG_NULL (0x1 << 3)
+#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
/** @flags: Bind flags */
__u32 flags;
@@ -837,14 +837,14 @@ struct drm_xe_exec_queue_set_property {
/** @exec_queue_id: Exec queue ID */
__u32 exec_queue_id;
-#define XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
-#define XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
-#define XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
-#define XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
-#define XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
-#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
-#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
-#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
/** @property: property to set */
__u32 property;
@@ -856,7 +856,7 @@ struct drm_xe_exec_queue_set_property {
};
struct drm_xe_exec_queue_create {
-#define XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
+#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -895,7 +895,7 @@ struct drm_xe_exec_queue_get_property {
/** @exec_queue_id: Exec queue ID */
__u32 exec_queue_id;
-#define XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
/** @property: property to get */
__u32 property;
@@ -1084,8 +1084,8 @@ struct drm_xe_vm_madvise {
* For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
* drm_xe_memory_class.
*/
-#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
-#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
+#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
+#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
/*
* In this case lower 32 bits are mem class, upper 32 are GT.
* Combination provides a single IOCTL plus migrate VMA to preferred
@@ -1096,25 +1096,25 @@ struct drm_xe_vm_madvise {
* The CPU will do atomic memory operations to this VMA. Must be set on
* some devices for atomics to behave correctly.
*/
-#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
+#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
/*
* The device will do atomic memory operations to this VMA. Must be set
* on some devices for atomics to behave correctly.
*/
-#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
+#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
/*
* Priority WRT to eviction (moving from preferred memory location due
* to memory pressure). The lower the priority, the more likely to be
* evicted.
*/
-#define DRM_XE_VM_MADVISE_PRIORITY 5
-#define DRM_XE_VMA_PRIORITY_LOW 0
+#define DRM_XE_VM_MADVISE_PRIORITY 5
+#define DRM_XE_VMA_PRIORITY_LOW 0
/* Default */
-#define DRM_XE_VMA_PRIORITY_NORMAL 1
+#define DRM_XE_VMA_PRIORITY_NORMAL 1
/* Must be user with elevated privileges */
-#define DRM_XE_VMA_PRIORITY_HIGH 2
+#define DRM_XE_VMA_PRIORITY_HIGH 2
/* Pin the VMA in memory, must be user with elevated privileges */
-#define DRM_XE_VM_MADVISE_PIN 6
+#define DRM_XE_VM_MADVISE_PIN 6
/** @property: property to set */
__u32 property;
@@ -1135,7 +1135,7 @@ struct drm_xe_vm_madvise {
* in 'struct perf_event_attr' as part of perf_event_open syscall to read a
* particular event.
*
- * For example to open the XE_PMU_INTERRUPTS(0):
+ * For example to open the DRM_XE_PMU_INTERRUPTS(0):
*
* .. code-block:: C
*
@@ -1149,7 +1149,7 @@ struct drm_xe_vm_madvise {
* attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
* attr.use_clockid = 1;
* attr.clockid = CLOCK_MONOTONIC;
- * attr.config = XE_PMU_INTERRUPTS(0);
+ * attr.config = DRM_XE_PMU_INTERRUPTS(0);
*
* fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
*/
@@ -1162,11 +1162,11 @@ struct drm_xe_vm_madvise {
#define ___XE_PMU_OTHER(gt, x) \
(((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))
-#define XE_PMU_INTERRUPTS(gt) ___XE_PMU_OTHER(gt, 0)
-#define XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
-#define XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
-#define XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
-#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
+#define DRM_XE_PMU_INTERRUPTS(gt) ___XE_PMU_OTHER(gt, 0)
+#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
+#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
+#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
+#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
#if defined(__cplusplus)
}
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 08/50] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 08/50] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
@ 2023-11-07 14:05 ` Matthew Brost
0 siblings, 0 replies; 81+ messages in thread
From: Matthew Brost @ 2023-11-07 14:05 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
On Fri, Nov 03, 2023 at 02:34:14PM +0000, Francois Dugast wrote:
> Most constants defined in xe_drm.h use DRM_XE_ as prefix which is
> helpful to identify the name space. Make this systematic and add
> this prefix where it was missing.
>
> v2:
> - fix vertical alignment of define values
> - remove double DRM_ in some variables (José Roberto de Souza)
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_bo.c | 14 +--
> drivers/gpu/drm/xe/xe_exec_queue.c | 20 ++---
> drivers/gpu/drm/xe/xe_gt.c | 2 +-
> drivers/gpu/drm/xe/xe_pmu.c | 20 ++---
> drivers/gpu/drm/xe/xe_query.c | 34 ++++----
> drivers/gpu/drm/xe/xe_vm.c | 54 ++++++------
> drivers/gpu/drm/xe/xe_vm_doc.h | 12 +--
> drivers/gpu/drm/xe/xe_vm_madvise.c | 8 +-
> include/uapi/drm/xe_drm.h | 136 ++++++++++++++---------------
> 9 files changed, 150 insertions(+), 150 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index cd043b1308ec..632f75a752c5 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -208,7 +208,7 @@ static int __xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo,
>
> /* The order of placements should indicate preferred location */
>
> - if (bo->props.preferred_mem_class == XE_MEM_REGION_CLASS_SYSMEM) {
> + if (bo->props.preferred_mem_class == DRM_XE_MEM_REGION_CLASS_SYSMEM) {
> try_add_system(bo, places, bo_flags, &c);
> try_add_vram(xe, bo, places, bo_flags, &c);
> } else {
> @@ -1804,9 +1804,9 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
>
> if (XE_IOCTL_DBG(xe, args->flags &
> - ~(XE_GEM_CREATE_FLAG_DEFER_BACKING |
> - XE_GEM_CREATE_FLAG_SCANOUT |
> - XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
> + ~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
> + DRM_XE_GEM_CREATE_FLAG_SCANOUT |
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
> xe->info.mem_region_mask)))
> return -EINVAL;
>
> @@ -1826,15 +1826,15 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
> if (XE_IOCTL_DBG(xe, args->size & ~PAGE_MASK))
> return -EINVAL;
>
> - if (args->flags & XE_GEM_CREATE_FLAG_DEFER_BACKING)
> + if (args->flags & DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING)
> bo_flags |= XE_BO_DEFER_BACKING;
>
> - if (args->flags & XE_GEM_CREATE_FLAG_SCANOUT)
> + if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
> bo_flags |= XE_BO_SCANOUT_BIT;
>
> bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
>
> - if (args->flags & XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
> + if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
> if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))
> return -EINVAL;
>
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 4fd44a9203e4..59e8d1ed34f7 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -406,14 +406,14 @@ typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe,
> u64 value, bool create);
>
> static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = {
> - [XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
> - [XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
> - [XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
> - [XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
> - [XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
> - [XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
> - [XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
> - [XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
> + [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
> + [DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
> + [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
> + [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
> + [DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
> + [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
> + [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
> + [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
> };
>
> static int exec_queue_user_ext_set_property(struct xe_device *xe,
> @@ -445,7 +445,7 @@ typedef int (*xe_exec_queue_user_extension_fn)(struct xe_device *xe,
> bool create);
>
> static const xe_exec_queue_set_property_fn exec_queue_user_extension_funcs[] = {
> - [XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
> + [DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
> };
>
> #define MAX_USER_EXTENSIONS 16
> @@ -764,7 +764,7 @@ int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data,
> return -ENOENT;
>
> switch (args->property) {
> - case XE_EXEC_QUEUE_GET_PROPERTY_BAN:
> + case DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN:
> args->value = !!(q->flags & EXEC_QUEUE_FLAG_BANNED);
> ret = 0;
> break;
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index d380f67b3365..206ae8d785b8 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -556,7 +556,7 @@ static void xe_uevent_gt_reset_failure(struct pci_dev *pdev, u8 tile_id, u8 gt_i
> {
> char *reset_event[4];
>
> - reset_event[0] = XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
> + reset_event[0] = DRM_XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
> reset_event[1] = kasprintf(GFP_KERNEL, "TILE_ID=%d", tile_id);
> reset_event[2] = kasprintf(GFP_KERNEL, "GT_ID=%d", gt_id);
> reset_event[3] = NULL;
> diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
> index abfc0b3aeac4..8378ca3007d9 100644
> --- a/drivers/gpu/drm/xe/xe_pmu.c
> +++ b/drivers/gpu/drm/xe/xe_pmu.c
> @@ -114,17 +114,17 @@ config_status(struct xe_device *xe, u64 config)
> return -ENOENT;
>
> switch (config_counter(config)) {
> - case XE_PMU_INTERRUPTS(0):
> + case DRM_XE_PMU_INTERRUPTS(0):
> if (gt_id)
> return -ENOENT;
> break;
> - case XE_PMU_RENDER_GROUP_BUSY(0):
> - case XE_PMU_COPY_GROUP_BUSY(0):
> - case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
> + case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
> + case DRM_XE_PMU_COPY_GROUP_BUSY(0):
> + case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
> if (gt->info.type == XE_GT_TYPE_MEDIA)
> return -ENOENT;
> break;
> - case XE_PMU_MEDIA_GROUP_BUSY(0):
> + case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
> if (!(gt->info.engine_mask & (BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VECS0))))
> return -ENOENT;
> break;
> @@ -185,13 +185,13 @@ static u64 __xe_pmu_event_read(struct perf_event *event)
> u64 val;
>
> switch (config_counter(config)) {
> - case XE_PMU_INTERRUPTS(0):
> + case DRM_XE_PMU_INTERRUPTS(0):
> val = READ_ONCE(pmu->irq_count);
> break;
> - case XE_PMU_RENDER_GROUP_BUSY(0):
> - case XE_PMU_COPY_GROUP_BUSY(0):
> - case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
> - case XE_PMU_MEDIA_GROUP_BUSY(0):
> + case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
> + case DRM_XE_PMU_COPY_GROUP_BUSY(0):
> + case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
> + case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
> val = engine_group_busyness_read(gt, config);
> break;
> default:
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 0dc72668f560..d8416fb93327 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -261,7 +261,7 @@ static int query_memory_usage(struct xe_device *xe,
> return -ENOMEM;
>
> man = ttm_manager_type(&xe->ttm, XE_PL_TT);
> - usage->regions[0].mem_class = XE_MEM_REGION_CLASS_SYSMEM;
> + usage->regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
> usage->regions[0].instance = 0;
> usage->regions[0].min_page_size = PAGE_SIZE;
> usage->regions[0].total_size = man->size << PAGE_SHIFT;
> @@ -273,7 +273,7 @@ static int query_memory_usage(struct xe_device *xe,
> man = ttm_manager_type(&xe->ttm, i);
> if (man) {
> usage->regions[usage->num_regions].mem_class =
> - XE_MEM_REGION_CLASS_VRAM;
> + DRM_XE_MEM_REGION_CLASS_VRAM;
> usage->regions[usage->num_regions].instance =
> usage->num_regions;
> usage->regions[usage->num_regions].min_page_size =
> @@ -305,7 +305,7 @@ static int query_memory_usage(struct xe_device *xe,
>
> static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> {
> -#define XE_QUERY_CONFIG_NUM_PARAM (XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
> +#define XE_QUERY_CONFIG_NUM_PARAM (DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1)
> size_t size =
> sizeof(struct drm_xe_query_config)
> + XE_QUERY_CONFIG_NUM_PARAM * sizeof(u64);
> @@ -324,18 +324,18 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> if (!config)
> return -ENOMEM;
>
> - config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
> + config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
> xe->info.devid | (xe->info.revid << 16);
> if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
> - config->info[XE_QUERY_CONFIG_FLAGS] =
> - XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
> - config->info[XE_QUERY_CONFIG_MIN_ALIGNMENT] =
> + config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
> + DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
> + config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
> xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
> - config->info[XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
> - config->info[XE_QUERY_CONFIG_GT_COUNT] = xe->info.gt_count;
> - config->info[XE_QUERY_CONFIG_MEM_REGION_COUNT] =
> + config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
> + config->info[DRM_XE_QUERY_CONFIG_GT_COUNT] = xe->info.gt_count;
> + config->info[DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT] =
> hweight_long(xe->info.mem_region_mask);
> - config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
> + config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
> xe_exec_queue_device_get_max_priority(xe);
>
> if (copy_to_user(query_ptr, config, size)) {
> @@ -371,11 +371,11 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> gt_list->num_gt = xe->info.gt_count;
> for_each_gt(gt, xe, id) {
> if (xe_gt_is_media_type(gt))
> - gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MEDIA;
> + gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
> else if (gt_to_tile(gt)->id > 0)
> - gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_REMOTE;
> + gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_REMOTE;
> else
> - gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MAIN;
> + gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> gt_list->gt_list[id].gt_id = gt->info.id;
> gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> if (!IS_DGFX(xe))
> @@ -473,21 +473,21 @@ static int query_gt_topology(struct xe_device *xe,
> for_each_gt(gt, xe, id) {
> topo.gt_id = id;
>
> - topo.type = XE_TOPO_DSS_GEOMETRY;
> + topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
> query_ptr = copy_mask(query_ptr, &topo,
> gt->fuse_topo.g_dss_mask,
> sizeof(gt->fuse_topo.g_dss_mask));
> if (IS_ERR(query_ptr))
> return PTR_ERR(query_ptr);
>
> - topo.type = XE_TOPO_DSS_COMPUTE;
> + topo.type = DRM_XE_TOPO_DSS_COMPUTE;
> query_ptr = copy_mask(query_ptr, &topo,
> gt->fuse_topo.c_dss_mask,
> sizeof(gt->fuse_topo.c_dss_mask));
> if (IS_ERR(query_ptr))
> return PTR_ERR(query_ptr);
>
> - topo.type = XE_TOPO_EU_PER_DSS;
> + topo.type = DRM_XE_TOPO_EU_PER_DSS;
> query_ptr = copy_mask(query_ptr, &topo,
> gt->fuse_topo.eu_mask_per_dss,
> sizeof(gt->fuse_topo.eu_mask_per_dss));
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 498c0b3e1d73..ad2f450f6c79 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -2183,8 +2183,8 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
> (ULL)bo_offset_or_userptr);
>
> switch (operation) {
> - case XE_VM_BIND_OP_MAP:
> - case XE_VM_BIND_OP_MAP_USERPTR:
> + case DRM_XE_VM_BIND_OP_MAP:
> + case DRM_XE_VM_BIND_OP_MAP_USERPTR:
> ops = drm_gpuvm_sm_map_ops_create(&vm->gpuvm, addr, range,
> obj, bo_offset_or_userptr);
> if (IS_ERR(ops))
> @@ -2195,13 +2195,13 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
>
> op->tile_mask = tile_mask;
> op->map.immediate =
> - flags & XE_VM_BIND_FLAG_IMMEDIATE;
> + flags & DRM_XE_VM_BIND_FLAG_IMMEDIATE;
> op->map.read_only =
> - flags & XE_VM_BIND_FLAG_READONLY;
> - op->map.is_null = flags & XE_VM_BIND_FLAG_NULL;
> + flags & DRM_XE_VM_BIND_FLAG_READONLY;
> + op->map.is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
> }
> break;
> - case XE_VM_BIND_OP_UNMAP:
> + case DRM_XE_VM_BIND_OP_UNMAP:
> ops = drm_gpuvm_sm_unmap_ops_create(&vm->gpuvm, addr, range);
> if (IS_ERR(ops))
> return ops;
> @@ -2212,7 +2212,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
> op->tile_mask = tile_mask;
> }
> break;
> - case XE_VM_BIND_OP_PREFETCH:
> + case DRM_XE_VM_BIND_OP_PREFETCH:
> ops = drm_gpuvm_prefetch_ops_create(&vm->gpuvm, addr, range);
> if (IS_ERR(ops))
> return ops;
> @@ -2224,7 +2224,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
> op->prefetch.region = region;
> }
> break;
> - case XE_VM_BIND_OP_UNMAP_ALL:
> + case DRM_XE_VM_BIND_OP_UNMAP_ALL:
> xe_assert(vm->xe, bo);
>
> err = xe_bo_lock(bo, true);
> @@ -2817,13 +2817,13 @@ static int vm_bind_ioctl_ops_execute(struct xe_vm *vm,
>
> #ifdef TEST_VM_ASYNC_OPS_ERROR
> #define SUPPORTED_FLAGS \
> - (FORCE_ASYNC_OP_ERROR | XE_VM_BIND_FLAG_ASYNC | \
> - XE_VM_BIND_FLAG_READONLY | XE_VM_BIND_FLAG_IMMEDIATE | \
> - XE_VM_BIND_FLAG_NULL | 0xffff)
> + (FORCE_ASYNC_OP_ERROR | DRM_XE_VM_BIND_FLAG_ASYNC | \
> + DRM_XE_VM_BIND_FLAG_READONLY | DRM_XE_VM_BIND_FLAG_IMMEDIATE | \
> + DRM_XE_VM_BIND_FLAG_NULL | 0xffff)
> #else
> #define SUPPORTED_FLAGS \
> - (XE_VM_BIND_FLAG_ASYNC | XE_VM_BIND_FLAG_READONLY | \
> - XE_VM_BIND_FLAG_IMMEDIATE | XE_VM_BIND_FLAG_NULL | \
> + (DRM_XE_VM_BIND_FLAG_ASYNC | DRM_XE_VM_BIND_FLAG_READONLY | \
> + DRM_XE_VM_BIND_FLAG_IMMEDIATE | DRM_XE_VM_BIND_FLAG_NULL | \
> 0xffff)
> #endif
> #define XE_64K_PAGE_MASK 0xffffull
> @@ -2871,45 +2871,45 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
> u32 obj = (*bind_ops)[i].obj;
> u64 obj_offset = (*bind_ops)[i].obj_offset;
> u32 region = (*bind_ops)[i].region;
> - bool is_null = flags & XE_VM_BIND_FLAG_NULL;
> + bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
>
> if (i == 0) {
> - *async = !!(flags & XE_VM_BIND_FLAG_ASYNC);
> + *async = !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC);
> if (XE_IOCTL_DBG(xe, !*async && args->num_syncs)) {
> err = -EINVAL;
> goto free_bind_ops;
> }
> } else if (XE_IOCTL_DBG(xe, *async !=
> - !!(flags & XE_VM_BIND_FLAG_ASYNC))) {
> + !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC))) {
> err = -EINVAL;
> goto free_bind_ops;
> }
>
> - if (XE_IOCTL_DBG(xe, op > XE_VM_BIND_OP_PREFETCH) ||
> + if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) ||
> XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) ||
> XE_IOCTL_DBG(xe, obj && is_null) ||
> XE_IOCTL_DBG(xe, obj_offset && is_null) ||
> - XE_IOCTL_DBG(xe, op != XE_VM_BIND_OP_MAP &&
> + XE_IOCTL_DBG(xe, op != DRM_XE_VM_BIND_OP_MAP &&
> is_null) ||
> XE_IOCTL_DBG(xe, !obj &&
> - op == XE_VM_BIND_OP_MAP &&
> + op == DRM_XE_VM_BIND_OP_MAP &&
> !is_null) ||
> XE_IOCTL_DBG(xe, !obj &&
> - op == XE_VM_BIND_OP_UNMAP_ALL) ||
> + op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
> XE_IOCTL_DBG(xe, addr &&
> - op == XE_VM_BIND_OP_UNMAP_ALL) ||
> + op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
> XE_IOCTL_DBG(xe, range &&
> - op == XE_VM_BIND_OP_UNMAP_ALL) ||
> + op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
> XE_IOCTL_DBG(xe, obj &&
> - op == XE_VM_BIND_OP_MAP_USERPTR) ||
> + op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
> XE_IOCTL_DBG(xe, obj &&
> - op == XE_VM_BIND_OP_PREFETCH) ||
> + op == DRM_XE_VM_BIND_OP_PREFETCH) ||
> XE_IOCTL_DBG(xe, region &&
> - op != XE_VM_BIND_OP_PREFETCH) ||
> + op != DRM_XE_VM_BIND_OP_PREFETCH) ||
> XE_IOCTL_DBG(xe, !(BIT(region) &
> xe->info.mem_region_mask)) ||
> XE_IOCTL_DBG(xe, obj &&
> - op == XE_VM_BIND_OP_UNMAP)) {
> + op == DRM_XE_VM_BIND_OP_UNMAP)) {
> err = -EINVAL;
> goto free_bind_ops;
> }
> @@ -2918,7 +2918,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
> XE_IOCTL_DBG(xe, addr & ~PAGE_MASK) ||
> XE_IOCTL_DBG(xe, range & ~PAGE_MASK) ||
> XE_IOCTL_DBG(xe, !range &&
> - op != XE_VM_BIND_OP_UNMAP_ALL)) {
> + op != DRM_XE_VM_BIND_OP_UNMAP_ALL)) {
> err = -EINVAL;
> goto free_bind_ops;
> }
> diff --git a/drivers/gpu/drm/xe/xe_vm_doc.h b/drivers/gpu/drm/xe/xe_vm_doc.h
> index b1b2dc4a6089..516f4dc97223 100644
> --- a/drivers/gpu/drm/xe/xe_vm_doc.h
> +++ b/drivers/gpu/drm/xe/xe_vm_doc.h
> @@ -32,9 +32,9 @@
> * Operations
> * ----------
> *
> - * XE_VM_BIND_OP_MAP - Create mapping for a BO
> - * XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
> - * XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
> + * DRM_XE_VM_BIND_OP_MAP - Create mapping for a BO
> + * DRM_XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
> + * DRM_XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
> *
> * Implementation details
> * ~~~~~~~~~~~~~~~~~~~~~~
> @@ -113,7 +113,7 @@
> * VM uses to report errors to. The ufence wait interface can be used to wait on
> * a VM going into an error state. Once an error is reported the VM's async
> * worker is paused. While the VM's async worker is paused sync,
> - * XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
> + * DRM_XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
> * uses believe the error state is fixed, the async worker can be resumed via
> * XE_VM_BIND_OP_RESTART operation. When VM async bind work is restarted, the
> * first operation processed is the operation that caused the original error.
> @@ -193,7 +193,7 @@
> * In a VM is in fault mode (TODO: link to fault mode), new bind operations that
> * create mappings are by default are deferred to the page fault handler (first
> * use). This behavior can be overriden by setting the flag
> - * XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
> + * DRM_XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
> * immediately.
> *
> * User pointer
> @@ -322,7 +322,7 @@
> *
> * By default, on a faulting VM binds just allocate the VMA and the actual
> * updating of the page tables is defered to the page fault handler. This
> - * behavior can be overridden by setting the flag XE_VM_BIND_FLAG_IMMEDIATE in
> + * behavior can be overridden by setting the flag DRM_XE_VM_BIND_FLAG_IMMEDIATE in
> * the VM bind which will then do the bind immediately.
> *
> * Page fault handler
> diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
> index 0ef7d483d050..72d051ecac5c 100644
> --- a/drivers/gpu/drm/xe/xe_vm_madvise.c
> +++ b/drivers/gpu/drm/xe/xe_vm_madvise.c
> @@ -19,10 +19,10 @@ static int madvise_preferred_mem_class(struct xe_device *xe, struct xe_vm *vm,
> {
> int i, err;
>
> - if (XE_IOCTL_DBG(xe, value > XE_MEM_REGION_CLASS_VRAM))
> + if (XE_IOCTL_DBG(xe, value > DRM_XE_MEM_REGION_CLASS_VRAM))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, value == XE_MEM_REGION_CLASS_VRAM &&
> + if (XE_IOCTL_DBG(xe, value == DRM_XE_MEM_REGION_CLASS_VRAM &&
> !xe->info.is_dgfx))
> return -EINVAL;
>
> @@ -75,10 +75,10 @@ static int madvise_preferred_mem_class_gt(struct xe_device *xe,
> u32 gt_id = upper_32_bits(value);
> u32 mem_class = lower_32_bits(value);
>
> - if (XE_IOCTL_DBG(xe, mem_class > XE_MEM_REGION_CLASS_VRAM))
> + if (XE_IOCTL_DBG(xe, mem_class > DRM_XE_MEM_REGION_CLASS_VRAM))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, mem_class == XE_MEM_REGION_CLASS_VRAM &&
> + if (XE_IOCTL_DBG(xe, mem_class == DRM_XE_MEM_REGION_CLASS_VRAM &&
> !xe->info.is_dgfx))
> return -EINVAL;
>
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 0c106043827c..bd0b9d5682e0 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -19,12 +19,12 @@ extern "C" {
> /**
> * DOC: uevent generated by xe on it's pci node.
> *
> - * XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
> + * DRM_XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
> * fails. The value supplied with the event is always "NEEDS_RESET".
> * Additional information supplied is tile id and gt id of the gt unit for
> * which reset has failed.
> */
> -#define XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
> +#define DRM_XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
>
> /**
> * struct xe_user_extension - Base class for defining a chain of extensions
> @@ -103,8 +103,8 @@ struct xe_user_extension {
> #define DRM_XE_VM_CREATE 0x03
> #define DRM_XE_VM_DESTROY 0x04
> #define DRM_XE_VM_BIND 0x05
> -#define DRM_XE_EXEC_QUEUE_CREATE 0x06
> -#define DRM_XE_EXEC_QUEUE_DESTROY 0x07
> +#define DRM_XE_EXEC_QUEUE_CREATE 0x06
> +#define DRM_XE_EXEC_QUEUE_DESTROY 0x07
> #define DRM_XE_EXEC 0x08
> #define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x09
> #define DRM_XE_WAIT_USER_FENCE 0x0a
> @@ -150,14 +150,14 @@ struct drm_xe_engine_class_instance {
> * enum drm_xe_memory_class - Supported memory classes.
> */
> enum drm_xe_memory_class {
> - /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
> - XE_MEM_REGION_CLASS_SYSMEM = 0,
> + /** @DRM_XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
> + DRM_XE_MEM_REGION_CLASS_SYSMEM = 0,
> /**
> - * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
> + * @DRM_XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
> * represents the memory that is local to the device, which we
> * call VRAM. Not valid on integrated platforms.
> */
> - XE_MEM_REGION_CLASS_VRAM
> + DRM_XE_MEM_REGION_CLASS_VRAM
> };
>
> /**
> @@ -217,7 +217,7 @@ struct drm_xe_query_mem_region {
> * always equal the @total_size, since all of it will be CPU
> * accessible.
> *
> - * Note this is only tracked for XE_MEM_REGION_CLASS_VRAM
> + * Note this is only tracked for DRM_XE_MEM_REGION_CLASS_VRAM
> * regions (for other types the value here will always equal
> * zero).
> */
> @@ -229,7 +229,7 @@ struct drm_xe_query_mem_region {
> * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
> * accounting. Without this the value here will always equal
> * zero. Note this is only currently tracked for
> - * XE_MEM_REGION_CLASS_VRAM regions (for other types the value
> + * DRM_XE_MEM_REGION_CLASS_VRAM regions (for other types the value
> * here will always be zero).
> */
> __u64 cpu_visible_used;
> @@ -322,36 +322,36 @@ struct drm_xe_query_config {
> * Device ID (lower 16 bits) and the device revision (next
> * 8 bits)
> */
> -#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
> +#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
> /*
> * Flags describing the device configuration, see list below
> */
> -#define XE_QUERY_CONFIG_FLAGS 1
> +#define DRM_XE_QUERY_CONFIG_FLAGS 1
> /*
> * Flag is set if the device has usable VRAM
> */
> - #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
> + #define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
> /*
> * Minimal memory alignment required by this device,
> * typically SZ_4K or SZ_64K
> */
> -#define XE_QUERY_CONFIG_MIN_ALIGNMENT 2
> +#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
> /*
> * Maximum bits of a virtual address
> */
> -#define XE_QUERY_CONFIG_VA_BITS 3
> +#define DRM_XE_QUERY_CONFIG_VA_BITS 3
> /*
> * Total number of GTs for the entire device
> */
> -#define XE_QUERY_CONFIG_GT_COUNT 4
> +#define DRM_XE_QUERY_CONFIG_GT_COUNT 4
> /*
> * Total number of accessible memory regions
> */
> -#define XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> +#define DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT 5
> /*
> * Value of the highest available exec queue priority
> */
> -#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
> +#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
> /** @info: array of elements containing the config info */
> __u64 info[];
> };
> @@ -365,9 +365,9 @@ struct drm_xe_query_config {
> * implementing graphics and/or media operations.
> */
> struct drm_xe_query_gt {
> -#define XE_QUERY_GT_TYPE_MAIN 0
> -#define XE_QUERY_GT_TYPE_REMOTE 1
> -#define XE_QUERY_GT_TYPE_MEDIA 2
> +#define DRM_XE_QUERY_GT_TYPE_MAIN 0
> +#define DRM_XE_QUERY_GT_TYPE_REMOTE 1
> +#define DRM_XE_QUERY_GT_TYPE_MEDIA 2
> /** @type: GT type: Main, Remote, or Media */
> __u16 type;
> /** @gt_id: Unique ID of this GT within the PCI Device */
> @@ -432,7 +432,7 @@ struct drm_xe_query_topology_mask {
> * DSS_GEOMETRY ff ff ff ff 00 00 00 00
> * means 32 DSS are available for geometry.
> */
> -#define XE_TOPO_DSS_GEOMETRY (1 << 0)
> +#define DRM_XE_TOPO_DSS_GEOMETRY (1 << 0)
> /*
> * To query the mask of Dual Sub Slices (DSS) available for compute
> * operations. For example a query response containing the following
> @@ -440,7 +440,7 @@ struct drm_xe_query_topology_mask {
> * DSS_COMPUTE ff ff ff ff 00 00 00 00
> * means 32 DSS are available for compute.
> */
> -#define XE_TOPO_DSS_COMPUTE (1 << 1)
> +#define DRM_XE_TOPO_DSS_COMPUTE (1 << 1)
> /*
> * To query the mask of Execution Units (EU) available per Dual Sub
> * Slices (DSS). For example a query response containing the following
> @@ -448,7 +448,7 @@ struct drm_xe_query_topology_mask {
> * EU_PER_DSS ff ff 00 00 00 00 00 00
> * means each DSS has 16 EU.
> */
> -#define XE_TOPO_EU_PER_DSS (1 << 2)
> +#define DRM_XE_TOPO_EU_PER_DSS (1 << 2)
> /** @type: type of mask */
> __u16 type;
>
> @@ -584,8 +584,8 @@ struct drm_xe_gem_create {
> */
> __u64 size;
>
> -#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> -#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
> +#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
> +#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
> /*
> * When using VRAM as a possible placement, ensure that the corresponding VRAM
> * allocation will always use the CPU accessible part of VRAM. This is important
> @@ -601,7 +601,7 @@ struct drm_xe_gem_create {
> * display surfaces, therefore the kernel requires setting this flag for such
> * objects, otherwise an error is thrown on small-bar systems.
> */
> -#define XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
> +#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
> /**
> * @flags: Flags, currently a mask of memory instances of where BO can
> * be placed
> @@ -668,14 +668,14 @@ struct drm_xe_ext_set_property {
> };
>
> struct drm_xe_vm_create {
> -#define XE_VM_EXTENSION_SET_PROPERTY 0
> +#define DRM_XE_VM_EXTENSION_SET_PROPERTY 0
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> -#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> -#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
> -#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
> -#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> +#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> +#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
> +#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
> +#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> /** @flags: Flags */
> __u32 flags;
>
> @@ -734,29 +734,29 @@ struct drm_xe_vm_bind_op {
> */
> __u64 tile_mask;
>
> -#define XE_VM_BIND_OP_MAP 0x0
> -#define XE_VM_BIND_OP_UNMAP 0x1
> -#define XE_VM_BIND_OP_MAP_USERPTR 0x2
> -#define XE_VM_BIND_OP_UNMAP_ALL 0x3
> -#define XE_VM_BIND_OP_PREFETCH 0x4
> +#define DRM_XE_VM_BIND_OP_MAP 0x0
> +#define DRM_XE_VM_BIND_OP_UNMAP 0x1
> +#define DRM_XE_VM_BIND_OP_MAP_USERPTR 0x2
> +#define DRM_XE_VM_BIND_OP_UNMAP_ALL 0x3
> +#define DRM_XE_VM_BIND_OP_PREFETCH 0x4
> /** @op: Bind operation to perform */
> __u32 op;
>
> -#define XE_VM_BIND_FLAG_READONLY (0x1 << 0)
> -#define XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
> +#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
> +#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
> /*
> * Valid on a faulting VM only, do the MAP operation immediately rather
> * than deferring the MAP to the page fault handler.
> */
> -#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
> +#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
> /*
> * When the NULL flag is set, the page tables are setup with a special
> * bit which indicates writes are dropped and all reads return zero. In
> - * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
> + * the future, the NULL flags will only be valid for DRM_XE_VM_BIND_OP_MAP
> * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
> * intended to implement VK sparse bindings.
> */
> -#define XE_VM_BIND_FLAG_NULL (0x1 << 3)
> +#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
> /** @flags: Bind flags */
> __u32 flags;
>
> @@ -837,14 +837,14 @@ struct drm_xe_exec_queue_set_property {
> /** @exec_queue_id: Exec queue ID */
> __u32 exec_queue_id;
>
> -#define XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
> -#define XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
> -#define XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
> -#define XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
> -#define XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
> -#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
> -#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
> -#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
> +#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
> +#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
> +#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
> +#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
> +#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
> +#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
> +#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
> +#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
> /** @property: property to set */
> __u32 property;
>
> @@ -856,7 +856,7 @@ struct drm_xe_exec_queue_set_property {
> };
>
> struct drm_xe_exec_queue_create {
> -#define XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
> +#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> @@ -895,7 +895,7 @@ struct drm_xe_exec_queue_get_property {
> /** @exec_queue_id: Exec queue ID */
> __u32 exec_queue_id;
>
> -#define XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
> +#define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
> /** @property: property to get */
> __u32 property;
>
> @@ -1084,8 +1084,8 @@ struct drm_xe_vm_madvise {
> * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
> * drm_xe_memory_class.
> */
> -#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
> -#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
> +#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
> +#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
> /*
> * In this case lower 32 bits are mem class, upper 32 are GT.
> * Combination provides a single IOCTL plus migrate VMA to preferred
> @@ -1096,25 +1096,25 @@ struct drm_xe_vm_madvise {
> * The CPU will do atomic memory operations to this VMA. Must be set on
> * some devices for atomics to behave correctly.
> */
> -#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
> +#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
> /*
> * The device will do atomic memory operations to this VMA. Must be set
> * on some devices for atomics to behave correctly.
> */
> -#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
> +#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
> /*
> * Priority WRT to eviction (moving from preferred memory location due
> * to memory pressure). The lower the priority, the more likely to be
> * evicted.
> */
> -#define DRM_XE_VM_MADVISE_PRIORITY 5
> -#define DRM_XE_VMA_PRIORITY_LOW 0
> +#define DRM_XE_VM_MADVISE_PRIORITY 5
> +#define DRM_XE_VMA_PRIORITY_LOW 0
> /* Default */
> -#define DRM_XE_VMA_PRIORITY_NORMAL 1
> +#define DRM_XE_VMA_PRIORITY_NORMAL 1
> /* Must be user with elevated privileges */
> -#define DRM_XE_VMA_PRIORITY_HIGH 2
> +#define DRM_XE_VMA_PRIORITY_HIGH 2
> /* Pin the VMA in memory, must be user with elevated privileges */
> -#define DRM_XE_VM_MADVISE_PIN 6
> +#define DRM_XE_VM_MADVISE_PIN 6
> /** @property: property to set */
> __u32 property;
>
> @@ -1135,7 +1135,7 @@ struct drm_xe_vm_madvise {
> * in 'struct perf_event_attr' as part of perf_event_open syscall to read a
> * particular event.
> *
> - * For example to open the XE_PMU_INTERRUPTS(0):
> + * For example to open the DRM_XE_PMU_INTERRUPTS(0):
> *
> * .. code-block:: C
> *
> @@ -1149,7 +1149,7 @@ struct drm_xe_vm_madvise {
> * attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
> * attr.use_clockid = 1;
> * attr.clockid = CLOCK_MONOTONIC;
> - * attr.config = XE_PMU_INTERRUPTS(0);
> + * attr.config = DRM_XE_PMU_INTERRUPTS(0);
> *
> * fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
> */
> @@ -1162,11 +1162,11 @@ struct drm_xe_vm_madvise {
> #define ___XE_PMU_OTHER(gt, x) \
> (((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))
>
> -#define XE_PMU_INTERRUPTS(gt) ___XE_PMU_OTHER(gt, 0)
> -#define XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
> -#define XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
> -#define XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
> -#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
> +#define DRM_XE_PMU_INTERRUPTS(gt) ___XE_PMU_OTHER(gt, 0)
> +#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
> +#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
> +#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
> +#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
>
> #if defined(__cplusplus)
> }
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 09/50] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (7 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 08/50] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 10/50] fixup! drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
` (47 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Most constants defined in xe_drm.h which can be used for flags are
named DRM_XE_*_FLAG_*, which is helpful to identify them. Make this
systematic and add _FLAG where it was missing.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_sync.c | 16 ++++++-------
drivers/gpu/drm/xe/xe_vm.c | 32 ++++++++++++-------------
drivers/gpu/drm/xe/xe_vm_doc.h | 2 +-
drivers/gpu/drm/xe/xe_wait_user_fence.c | 10 ++++----
include/uapi/drm/xe_drm.h | 30 +++++++++++------------
5 files changed, 45 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
index 73ef259aa387..eafe53c2f55d 100644
--- a/drivers/gpu/drm/xe/xe_sync.c
+++ b/drivers/gpu/drm/xe/xe_sync.c
@@ -110,14 +110,14 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
return -EFAULT;
if (XE_IOCTL_DBG(xe, sync_in.flags &
- ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_SIGNAL)) ||
+ ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_FLAG_SIGNAL)) ||
XE_IOCTL_DBG(xe, sync_in.pad) ||
XE_IOCTL_DBG(xe, sync_in.reserved[0] || sync_in.reserved[1]))
return -EINVAL;
- signal = sync_in.flags & DRM_XE_SYNC_SIGNAL;
+ signal = sync_in.flags & DRM_XE_SYNC_FLAG_SIGNAL;
switch (sync_in.flags & SYNC_FLAGS_TYPE_MASK) {
- case DRM_XE_SYNC_SYNCOBJ:
+ case DRM_XE_SYNC_FLAG_SYNCOBJ:
if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
return -EOPNOTSUPP;
@@ -135,7 +135,7 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
}
break;
- case DRM_XE_SYNC_TIMELINE_SYNCOBJ:
+ case DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ:
if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
return -EOPNOTSUPP;
@@ -165,12 +165,12 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
}
break;
- case DRM_XE_SYNC_DMA_BUF:
+ case DRM_XE_SYNC_FLAG_DMA_BUF:
if (XE_IOCTL_DBG(xe, "TODO"))
return -EINVAL;
break;
- case DRM_XE_SYNC_USER_FENCE:
+ case DRM_XE_SYNC_FLAG_USER_FENCE:
if (XE_IOCTL_DBG(xe, !signal))
return -EOPNOTSUPP;
@@ -225,7 +225,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry *sync, struct xe_sched_job *job)
void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
struct dma_fence *fence)
{
- if (!(sync->flags & DRM_XE_SYNC_SIGNAL))
+ if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
return;
if (sync->chain_fence) {
@@ -253,7 +253,7 @@ void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
dma_fence_put(fence);
}
} else if ((sync->flags & SYNC_FLAGS_TYPE_MASK) ==
- DRM_XE_SYNC_USER_FENCE) {
+ DRM_XE_SYNC_FLAG_USER_FENCE) {
job->user_fence.used = true;
job->user_fence.addr = sync->addr;
job->user_fence.value = sync->timeline_value;
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index ad2f450f6c79..447fecf3bd2d 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1918,10 +1918,10 @@ static int xe_vm_unbind(struct xe_vm *vm, struct xe_vma *vma,
return 0;
}
-#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_SCRATCH_PAGE | \
- DRM_XE_VM_CREATE_COMPUTE_MODE | \
- DRM_XE_VM_CREATE_ASYNC_DEFAULT | \
- DRM_XE_VM_CREATE_FAULT_MODE)
+#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE | \
+ DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE | \
+ DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT | \
+ DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
int xe_vm_create_ioctl(struct drm_device *dev, void *data,
struct drm_file *file)
@@ -1939,9 +1939,9 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
if (XE_WA(xe_root_mmio_gt(xe), 14016763929))
- args->flags |= DRM_XE_VM_CREATE_SCRATCH_PAGE;
+ args->flags |= DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
!xe->info.supports_usm))
return -EINVAL;
@@ -1951,32 +1951,32 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(xe, args->flags & ~ALL_DRM_XE_VM_CREATE_FLAGS))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE &&
- args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE &&
+ args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE &&
- args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE &&
+ args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
xe_device_in_non_fault_mode(xe)))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FAULT_MODE) &&
+ if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE) &&
xe_device_in_fault_mode(xe)))
return -EINVAL;
if (XE_IOCTL_DBG(xe, args->extensions))
return -EINVAL;
- if (args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE)
flags |= XE_VM_FLAG_SCRATCH_PAGE;
- if (args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE)
flags |= XE_VM_FLAG_COMPUTE_MODE;
- if (args->flags & DRM_XE_VM_CREATE_ASYNC_DEFAULT)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT)
flags |= XE_VM_FLAG_ASYNC_DEFAULT;
- if (args->flags & DRM_XE_VM_CREATE_FAULT_MODE)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
flags |= XE_VM_FLAG_FAULT_MODE;
vm = xe_vm_create(xe, flags);
diff --git a/drivers/gpu/drm/xe/xe_vm_doc.h b/drivers/gpu/drm/xe/xe_vm_doc.h
index 516f4dc97223..bdc6659891a5 100644
--- a/drivers/gpu/drm/xe/xe_vm_doc.h
+++ b/drivers/gpu/drm/xe/xe_vm_doc.h
@@ -18,7 +18,7 @@
* Scratch page
* ------------
*
- * If the VM is created with the flag, DRM_XE_VM_CREATE_SCRATCH_PAGE, set the
+ * If the VM is created with the flag, DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE, set the
* entire page table structure defaults pointing to blank page allocated by the
* VM. Invalid memory access rather than fault just read / write to this page.
*
diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
index 78686908f7fb..13562db6c07f 100644
--- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
+++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
@@ -79,8 +79,8 @@ static int check_hw_engines(struct xe_device *xe,
return 0;
}
-#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_SOFT_OP | \
- DRM_XE_UFENCE_WAIT_ABSTIME)
+#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
+ DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
#define MAX_OP DRM_XE_UFENCE_WAIT_LTE
static long to_jiffies_timeout(struct xe_device *xe,
@@ -107,7 +107,7 @@ static long to_jiffies_timeout(struct xe_device *xe,
* Save the timeout to an u64 variable because nsecs_to_jiffies
* might return a value that overflows s32 variable.
*/
- if (args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)
+ if (args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
t = drm_timeout_abs_to_jiffies(args->timeout);
else
t = nsecs_to_jiffies(args->timeout);
@@ -137,7 +137,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
u64_to_user_ptr(args->instances);
u64 addr = args->addr;
int err;
- bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_SOFT_OP;
+ bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP;
long timeout;
ktime_t start;
@@ -206,7 +206,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
}
remove_wait_queue(&xe->ufence_wq, &w_wait);
- if (!(args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)) {
+ if (!(args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)) {
args->timeout -= ktime_to_ns(ktime_sub(ktime_get(), start));
if (args->timeout < 0)
args->timeout = 0;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index bd0b9d5682e0..b53b3d9882a1 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -672,10 +672,10 @@ struct drm_xe_vm_create {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
-#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
-#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
-#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
+#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (0x1 << 0)
+#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (0x1 << 1)
+#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (0x1 << 2)
+#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (0x1 << 3)
/** @flags: Flags */
__u32 flags;
@@ -921,11 +921,11 @@ struct drm_xe_sync {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_SYNC_SYNCOBJ 0x0
-#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
-#define DRM_XE_SYNC_DMA_BUF 0x2
-#define DRM_XE_SYNC_USER_FENCE 0x3
-#define DRM_XE_SYNC_SIGNAL 0x10
+#define DRM_XE_SYNC_FLAG_SYNCOBJ 0x0
+#define DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ 0x1
+#define DRM_XE_SYNC_FLAG_DMA_BUF 0x2
+#define DRM_XE_SYNC_FLAG_USER_FENCE 0x3
+#define DRM_XE_SYNC_FLAG_SIGNAL 0x10
__u32 flags;
/** @pad: MBZ */
@@ -1011,8 +1011,8 @@ struct drm_xe_wait_user_fence {
/** @op: wait operation (type of comparison) */
__u16 op;
-#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
-#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
+#define DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
+#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 1)
/** @flags: wait flags */
__u16 flags;
@@ -1030,10 +1030,10 @@ struct drm_xe_wait_user_fence {
__u64 mask;
/**
* @timeout: how long to wait before bailing, value in nanoseconds.
- * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
+ * Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)
* it contains timeout expressed in nanoseconds to wait (fence will
* expire at now() + timeout).
- * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout) wait
+ * When DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flat is set (absolute timeout) wait
* will end at timeout (uses system MONOTONIC_CLOCK).
* Passing negative timeout leads to neverending wait.
*
@@ -1046,13 +1046,13 @@ struct drm_xe_wait_user_fence {
/**
* @num_engines: number of engine instances to wait on, must be zero
- * when DRM_XE_UFENCE_WAIT_SOFT_OP set
+ * when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
*/
__u64 num_engines;
/**
* @instances: user pointer to array of drm_xe_engine_class_instance to
- * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
+ * wait on, must be NULL when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
*/
__u64 instances;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 10/50] fixup! drm/xe: Add uAPI to query micro-controler firmware version
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (8 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 09/50] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-07 14:07 ` Matthew Brost
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 11/50] drm/xe/uapi: Make constant comments visible in kernel doc Francois Dugast
` (46 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Remove warnings below when building documentation:
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'uc_type' not described in 'drm_xe_query_uc_fw_version'
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'major_ver' not described in 'drm_xe_query_uc_fw_version'
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'minor_ver' not described in 'drm_xe_query_uc_fw_version'
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'patch_ver' not described in 'drm_xe_query_uc_fw_version'
./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'branch_ver' not described in 'drm_xe_query_uc_fw_version'
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index b53b3d9882a1..b1e9d8089d5f 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -486,13 +486,13 @@ struct drm_xe_query_uc_fw_version {
/** @reserved: Reserved */
__u16 reserved;
- /* @major_ver: major uc fw version */
+ /** @major_ver: major uc fw version */
__u32 major_ver;
- /* @minor_ver: minor uc fw version */
+ /** @minor_ver: minor uc fw version */
__u32 minor_ver;
- /* @patch_ver: patch uc fw version */
+ /** @patch_ver: patch uc fw version */
__u32 patch_ver;
- /* @branch_ver: branch uc fw version */
+ /** @branch_ver: branch uc fw version */
__u32 branch_ver;
/** @pad2: MBZ */
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 10/50] fixup! drm/xe: Add uAPI to query micro-controler firmware version
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 10/50] fixup! drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
@ 2023-11-07 14:07 ` Matthew Brost
0 siblings, 0 replies; 81+ messages in thread
From: Matthew Brost @ 2023-11-07 14:07 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
On Fri, Nov 03, 2023 at 02:34:16PM +0000, Francois Dugast wrote:
> Remove warnings below when building documentation:
>
> ./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'uc_type' not described in 'drm_xe_query_uc_fw_version'
> ./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'major_ver' not described in 'drm_xe_query_uc_fw_version'
> ./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'minor_ver' not described in 'drm_xe_query_uc_fw_version'
> ./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'patch_ver' not described in 'drm_xe_query_uc_fw_version'
> ./include/uapi/drm/xe_drm.h:491: warning: Function parameter or member 'branch_ver' not described in 'drm_xe_query_uc_fw_version'
>
The orignal patch isn't merged yet and include in this series, just
squash this fix into that patch.
Matt
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> include/uapi/drm/xe_drm.h | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index b53b3d9882a1..b1e9d8089d5f 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -486,13 +486,13 @@ struct drm_xe_query_uc_fw_version {
> /** @reserved: Reserved */
> __u16 reserved;
>
> - /* @major_ver: major uc fw version */
> + /** @major_ver: major uc fw version */
> __u32 major_ver;
> - /* @minor_ver: minor uc fw version */
> + /** @minor_ver: minor uc fw version */
> __u32 minor_ver;
> - /* @patch_ver: patch uc fw version */
> + /** @patch_ver: patch uc fw version */
> __u32 patch_ver;
> - /* @branch_ver: branch uc fw version */
> + /** @branch_ver: branch uc fw version */
> __u32 branch_ver;
>
> /** @pad2: MBZ */
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 11/50] drm/xe/uapi: Make constant comments visible in kernel doc
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (9 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 10/50] fixup! drm/xe: Add uAPI to query micro-controler firmware version Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 12/50] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
` (45 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
As there is no direct way to make comments of constants directly
visible in the kernel doc, move them to the description of the
structure where they can be used. By doing so they appear in the
"Description" section of the struct documentation.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 264 ++++++++++++++++++++++----------------
1 file changed, 150 insertions(+), 114 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index b1e9d8089d5f..8687ef7db71a 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -126,23 +126,40 @@ struct xe_user_extension {
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
-/** struct drm_xe_engine_class_instance - instance of an engine class */
+/**
+ * struct drm_xe_engine_class_instance - instance of an engine class
+ *
+ * The @engine_class can be:
+ * - %DRM_XE_ENGINE_CLASS_RENDER
+ * - %DRM_XE_ENGINE_CLASS_COPY
+ * - %DRM_XE_ENGINE_CLASS_VIDEO_DECODE
+ * - %DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE
+ * - %DRM_XE_ENGINE_CLASS_COMPUTE
+ * - %DRM_XE_ENGINE_CLASS_VM_BIND_ASYNC - Kernel only class (not actual
+ * hardware engine class) used for creating ordered queues of
+ * asynchronous VM bind operations.
+ * - %DRM_XE_ENGINE_CLASS_VM_BIND_SYNC - Kernel only class (not actual
+ * synchronous VM bind operations.
+ *
+ */
struct drm_xe_engine_class_instance {
#define DRM_XE_ENGINE_CLASS_RENDER 0
#define DRM_XE_ENGINE_CLASS_COPY 1
#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2
#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3
#define DRM_XE_ENGINE_CLASS_COMPUTE 4
- /*
- * Kernel only classes (not actual hardware engine class). Used for
- * creating ordered queues of VM bind operations.
- */
#define DRM_XE_ENGINE_CLASS_VM_BIND_ASYNC 5
#define DRM_XE_ENGINE_CLASS_VM_BIND_SYNC 6
+ /**
+ * @engine_class: Class of this instance among possible
+ * DRM_XE_ENGINE_CLASS_*
+ */
__u16 engine_class;
-
+ /** @engine_instance: Engine instance */
__u16 engine_instance;
+ /** @gt_id: GT ID the instance is associated with */
__u16 gt_id;
+ /** @rsvd: Reserved */
__u16 rsvd;
};
@@ -313,44 +330,36 @@ struct drm_xe_query_mem_usage {
* If a query is made with a struct drm_xe_device_query where .query
* is equal to DRM_XE_DEVICE_QUERY_CONFIG, then the reply uses
* struct drm_xe_query_config in .data.
+ *
+ * The index in @info can be:
+ * - %DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID - Device ID (lower 16 bits)
+ * and the device revision (next 8 bits)
+ * - %DRM_XE_QUERY_CONFIG_FLAGS - Flags describing the device
+ * configuration, see list below
+ *
+ * - %DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM - Flag is set if the device
+ * has usable VRAM
+ * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
+ * required by this device, typically SZ_4K or SZ_64K
+ * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
+ * - %DRM_XE_QUERY_CONFIG_GT_COUNT - Total number of GTs for the entire
+ * device
+ * - %DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT - Total number of accessible
+ * memory regions
+ * - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
+ * available exec queue priority
*/
struct drm_xe_query_config {
/** @pad: MBZ */
__u32 pad;
- /*
- * Device ID (lower 16 bits) and the device revision (next
- * 8 bits)
- */
#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
- /*
- * Flags describing the device configuration, see list below
- */
#define DRM_XE_QUERY_CONFIG_FLAGS 1
- /*
- * Flag is set if the device has usable VRAM
- */
#define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
- /*
- * Minimal memory alignment required by this device,
- * typically SZ_4K or SZ_64K
- */
#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
- /*
- * Maximum bits of a virtual address
- */
#define DRM_XE_QUERY_CONFIG_VA_BITS 3
- /*
- * Total number of GTs for the entire device
- */
#define DRM_XE_QUERY_CONFIG_GT_COUNT 4
- /*
- * Total number of accessible memory regions
- */
#define DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT 5
- /*
- * Value of the highest available exec queue priority
- */
#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
/** @info: array of elements containing the config info */
__u64 info[];
@@ -363,6 +372,7 @@ struct drm_xe_query_config {
* existing GT individual descriptions.
* Graphics Technology (GT) is a subset of a GPU/tile that is responsible for
* implementing graphics and/or media operations.
+ *
*/
struct drm_xe_query_gt {
#define DRM_XE_QUERY_GT_TYPE_MAIN 0
@@ -420,34 +430,31 @@ struct drm_xe_query_gt_list {
* If a query is made with a struct drm_xe_device_query where .query
* is equal to DRM_XE_DEVICE_QUERY_GT_TOPOLOGY, then the reply uses
* struct drm_xe_query_topology_mask in .data.
+ *
+ * The @type can be:
+ * - %DRM_XE_TOPO_DSS_GEOMETRY - To query the mask of Dual Sub Slices
+ * (DSS) available for geometry operations. For example a query response
+ * containing the following in mask:
+ * ``DSS_GEOMETRY ff ff ff ff 00 00 00 00``
+ * means 32 DSS are available for geometry.
+ * - %DRM_XE_TOPO_DSS_COMPUTE - To query the mask of Dual Sub Slices
+ * (DSS) available for compute operations. For example a query response
+ * containing the following in mask:
+ * ``DSS_COMPUTE ff ff ff ff 00 00 00 00``
+ * means 32 DSS are available for compute.
+ * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)
+ * available per Dual Sub Slices (DSS). For example a query response
+ * containing the following in mask:
+ * ``EU_PER_DSS ff ff 00 00 00 00 00 00``
+ * means each DSS has 16 EU.
+ *
*/
struct drm_xe_query_topology_mask {
/** @gt_id: GT ID the mask is associated with */
__u16 gt_id;
- /*
- * To query the mask of Dual Sub Slices (DSS) available for geometry
- * operations. For example a query response containing the following
- * in mask:
- * DSS_GEOMETRY ff ff ff ff 00 00 00 00
- * means 32 DSS are available for geometry.
- */
#define DRM_XE_TOPO_DSS_GEOMETRY (1 << 0)
- /*
- * To query the mask of Dual Sub Slices (DSS) available for compute
- * operations. For example a query response containing the following
- * in mask:
- * DSS_COMPUTE ff ff ff ff 00 00 00 00
- * means 32 DSS are available for compute.
- */
#define DRM_XE_TOPO_DSS_COMPUTE (1 << 1)
- /*
- * To query the mask of Execution Units (EU) available per Dual Sub
- * Slices (DSS). For example a query response containing the following
- * in mask:
- * EU_PER_DSS ff ff 00 00 00 00 00 00
- * means each DSS has 16 EU.
- */
#define DRM_XE_TOPO_EU_PER_DSS (1 << 2)
/** @type: type of mask */
__u16 type;
@@ -509,6 +516,19 @@ struct drm_xe_query_uc_fw_version {
* and sets the value in the query member. This determines the type of
* the structure provided by the driver in data, among struct drm_xe_query_*.
*
+ * The @query can be:
+ * - %DRM_XE_DEVICE_QUERY_ENGINES
+ * - %DRM_XE_DEVICE_QUERY_MEM_USAGE
+ * - %DRM_XE_DEVICE_QUERY_CONFIG
+ * - %DRM_XE_DEVICE_QUERY_GT_LIST - Query type to retrieve the hardware
+ * configuration of the device such as information on slices, memory,
+ * caches, and so on. It is provided as a table of key / value
+ * attributes.
+ * - %DRM_XE_DEVICE_QUERY_HWCONFIG
+ * - %DRM_XE_DEVICE_QUERY_GT_TOPOLOGY
+ * - %DRM_XE_DEVICE_QUERY_ENGINE_CYCLES
+ * - %DRM_XE_DEVICE_QUERY_UC_FW_VERSION
+ *
* If size is set to 0, the driver fills it with the required size for
* the requested type of data to query. If size is equal to the required
* size, the queried information is copied into data. If size is set to
@@ -551,11 +571,6 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
#define DRM_XE_DEVICE_QUERY_CONFIG 2
#define DRM_XE_DEVICE_QUERY_GT_LIST 3
- /*
- * Query type to retrieve the hardware configuration of the device
- * such as information on slices, memory, caches, and so on. It is
- * provided as a table of attributes (key / value).
- */
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
@@ -573,6 +588,29 @@ struct drm_xe_device_query {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_gem_create - structure for gem creation
+ *
+ * The @flags can be:
+ * - %DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING
+ * - %DRM_XE_GEM_CREATE_FLAG_SCANOUT
+ * - %DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM - When using VRAM as a
+ * possible placement, ensure that the corresponding VRAM allocation
+ * will always use the CPU accessible part of VRAM. This is important
+ * for small-bar systems (on full-bar systems this gets turned into a
+ * noop).
+ * Note1: System memory can be used as an extra placement if the kernel
+ * should spill the allocation to system memory, if space can't be made
+ * available in the CPU accessible part of VRAM (giving the same
+ * behaviour as the i915 interface, see
+ * I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS).
+ * Note2: For clear-color CCS surfaces the kernel needs to read the
+ * clear-color value stored in the buffer, and on discrete platforms we
+ * need to use VRAM for display surfaces, therefore the kernel requires
+ * setting this flag for such objects, otherwise an error is thrown on
+ * small-bar systems.
+ *
+ */
struct drm_xe_gem_create {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -586,21 +624,6 @@ struct drm_xe_gem_create {
#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
-/*
- * When using VRAM as a possible placement, ensure that the corresponding VRAM
- * allocation will always use the CPU accessible part of VRAM. This is important
- * for small-bar systems (on full-bar systems this gets turned into a noop).
- *
- * Note: System memory can be used as an extra placement if the kernel should
- * spill the allocation to system memory, if space can't be made available in
- * the CPU accessible part of VRAM (giving the same behaviour as the i915
- * interface, see I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS).
- *
- * Note: For clear-color CCS surfaces the kernel needs to read the clear-color
- * value stored in the buffer, and on discrete platforms we need to use VRAM for
- * display surfaces, therefore the kernel requires setting this flag for such
- * objects, otherwise an error is thrown on small-bar systems.
- */
#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
/**
* @flags: Flags, currently a mask of memory instances of where BO can
@@ -697,6 +720,30 @@ struct drm_xe_vm_destroy {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_vm_bind_op - run bind operations
+ *
+ * The @op can be:
+ * - %DRM_XE_VM_BIND_OP_MAP
+ * - %DRM_XE_VM_BIND_OP_UNMAP
+ * - %DRM_XE_VM_BIND_OP_MAP_USERPTR
+ * - %DRM_XE_VM_BIND_OP_UNMAP_ALL
+ * - %DRM_XE_VM_BIND_OP_PREFETCH
+ *
+ * and the @flags can be:
+ * - %DRM_XE_VM_BIND_FLAG_READONLY
+ * - %DRM_XE_VM_BIND_FLAG_ASYNC
+ * - %DRM_XE_VM_BIND_FLAG_IMMEDIATE - Valid on a faulting VM only, do the
+ * MAP operation immediately rather than deferring the MAP to the page
+ * fault handler.
+ * - %DRM_XE_VM_BIND_FLAG_NULL - When the NULL flag is set, the page
+ * tables are setup with a special bit which indicates writes are
+ * dropped and all reads return zero. In the future, the NULL flags
+ * will only be valid for DRM_XE_VM_BIND_OP_MAP operations, the BO
+ * handle MBZ, and the BO offset MBZ. This flag is intended to
+ * implement VK sparse bindings.
+ *
+ */
struct drm_xe_vm_bind_op {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -744,23 +791,12 @@ struct drm_xe_vm_bind_op {
#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
- /*
- * Valid on a faulting VM only, do the MAP operation immediately rather
- * than deferring the MAP to the page fault handler.
- */
#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
- /*
- * When the NULL flag is set, the page tables are setup with a special
- * bit which indicates writes are dropped and all reads return zero. In
- * the future, the NULL flags will only be valid for DRM_XE_VM_BIND_OP_MAP
- * operations, the BO handle MBZ, and the BO offset MBZ. This flag is
- * intended to implement VK sparse bindings.
- */
#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
/** @flags: Bind flags */
__u32 flags;
- /** @mem_region: Memory region to prefetch VMA to, instance not a mask */
+ /** @region: Memory region to prefetch VMA to, instance not a mask */
__u32 region;
/** @reserved: Reserved */
@@ -1060,6 +1096,35 @@ struct drm_xe_wait_user_fence {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_vm_madvise - give advice about use of memory
+ *
+ * The @property can be:
+ * - %DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS - Setting the preferred
+ * location will trigger a migrate of the VMA backing store to new
+ * location if the backing store is already allocated.
+ * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
+ * drm_xe_memory_class.
+ * - %DRM_XE_VM_MADVISE_PREFERRED_GT
+ * - %DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT - In this case lower 32 bits
+ * are mem class, upper 32 are GT. Combination provides a single IOCTL
+ * plus migrate VMA to preferred location.
+ * - %DRM_XE_VM_MADVISE_CPU_ATOMIC - The CPU will do atomic memory
+ * operations to this VMA. Must be set on some devices for atomics to
+ * behave correctly.
+ * - %DRM_XE_VM_MADVISE_DEVICE_ATOMIC - The device will do atomic memory
+ * operations to this VMA. Must be set on some devices for atomics to
+ * behave correctly.
+ * - %DRM_XE_VM_MADVISE_PRIORITY - Priority WRT to eviction (moving from
+ * preferred memory location due to memory pressure). The lower the
+ * priority, the more likely to be evicted.
+ *
+ * - %DRM_XE_VMA_PRIORITY_LOW
+ * - %DRM_XE_VMA_PRIORITY_NORMAL - Default
+ * - %DRM_XE_VMA_PRIORITY_HIGH - Must be user with elevated privileges
+ * - %DRM_XE_VM_MADVISE_PIN - Pin the VMA in memory, must be user with
+ * elevated privileges
+ */
struct drm_xe_vm_madvise {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -1076,44 +1141,15 @@ struct drm_xe_vm_madvise {
/** @addr: Address of the VMA to operation on */
__u64 addr;
- /*
- * Setting the preferred location will trigger a migrate of the VMA
- * backing store to new location if the backing store is already
- * allocated.
- *
- * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
- * drm_xe_memory_class.
- */
#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
- /*
- * In this case lower 32 bits are mem class, upper 32 are GT.
- * Combination provides a single IOCTL plus migrate VMA to preferred
- * location.
- */
#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
- /*
- * The CPU will do atomic memory operations to this VMA. Must be set on
- * some devices for atomics to behave correctly.
- */
#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
- /*
- * The device will do atomic memory operations to this VMA. Must be set
- * on some devices for atomics to behave correctly.
- */
#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
- /*
- * Priority WRT to eviction (moving from preferred memory location due
- * to memory pressure). The lower the priority, the more likely to be
- * evicted.
- */
#define DRM_XE_VM_MADVISE_PRIORITY 5
#define DRM_XE_VMA_PRIORITY_LOW 0
- /* Default */
#define DRM_XE_VMA_PRIORITY_NORMAL 1
- /* Must be user with elevated privileges */
#define DRM_XE_VMA_PRIORITY_HIGH 2
- /* Pin the VMA in memory, must be user with elevated privileges */
#define DRM_XE_VM_MADVISE_PIN 6
/** @property: property to set */
__u32 property;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 12/50] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (10 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 11/50] drm/xe/uapi: Make constant comments visible in kernel doc Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 13/50] drm/xe/uapi: Remove GT_TYPE_REMOTE Francois Dugast
` (44 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe
From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Change rsvd to pad in struct drm_xe_class_instance to prevent the field
from being used in future.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 5 ++++-
include/uapi/drm/xe_drm.h | 4 ++--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index d8416fb93327..3eef4160074e 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -215,7 +215,10 @@ static int query_engines(struct xe_device *xe,
xe_to_user_engine_class[hwe->class];
hw_engine_info[i].engine_instance =
hwe->logical_instance;
- hw_engine_info[i++].gt_id = gt->info.id;
+ hw_engine_info[i].gt_id = gt->info.id;
+ hw_engine_info[i].pad = 0;
+
+ i++;
}
if (copy_to_user(query_ptr, hw_engine_info, size)) {
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 8687ef7db71a..05714068c637 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -159,8 +159,8 @@ struct drm_xe_engine_class_instance {
__u16 engine_instance;
/** @gt_id: GT ID the instance is associated with */
__u16 gt_id;
- /** @rsvd: Reserved */
- __u16 rsvd;
+ /** @pad: MBZ */
+ __u16 pad;
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 13/50] drm/xe/uapi: Remove GT_TYPE_REMOTE
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (11 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 12/50] fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 23:35 ` Matt Roper
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 14/50] drm/xe/uapi: Kill VM_MADVISE IOCTL Francois Dugast
` (43 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Carl Zhang, Francois Dugast, Matt Roper, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
With the split between tile and gt, this is currently unused.
Also it is bringing confusion because main vs remote would be
more a concept of the tile itself and not about GT.
So, the MAIN one is the traditional GT used for every operation
in older platforms, and for render/graphics and compute on platforms
that contains the stand-alone Media GT.
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Francois Dugast <francois.dugast@intel.com>
Cc: Carl Zhang <carl.zhang@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 --
include/uapi/drm/xe_drm.h | 5 ++---
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 3eef4160074e..34b4082edec5 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -375,8 +375,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
for_each_gt(gt, xe, id) {
if (xe_gt_is_media_type(gt))
gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
- else if (gt_to_tile(gt)->id > 0)
- gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_REMOTE;
else
gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
gt_list->gt_list[id].gt_id = gt->info.id;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 05714068c637..1473dd29aa3f 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -376,9 +376,8 @@ struct drm_xe_query_config {
*/
struct drm_xe_query_gt {
#define DRM_XE_QUERY_GT_TYPE_MAIN 0
-#define DRM_XE_QUERY_GT_TYPE_REMOTE 1
-#define DRM_XE_QUERY_GT_TYPE_MEDIA 2
- /** @type: GT type: Main, Remote, or Media */
+#define DRM_XE_QUERY_GT_TYPE_MEDIA 1
+ /** @type: GT type: Main or Media */
__u16 type;
/** @gt_id: Unique ID of this GT within the PCI Device */
__u16 gt_id;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 13/50] drm/xe/uapi: Remove GT_TYPE_REMOTE
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 13/50] drm/xe/uapi: Remove GT_TYPE_REMOTE Francois Dugast
@ 2023-11-03 23:35 ` Matt Roper
0 siblings, 0 replies; 81+ messages in thread
From: Matt Roper @ 2023-11-03 23:35 UTC (permalink / raw)
To: Francois Dugast; +Cc: Carl Zhang, intel-xe, Rodrigo Vivi
On Fri, Nov 03, 2023 at 02:34:19PM +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> With the split between tile and gt, this is currently unused.
> Also it is bringing confusion because main vs remote would be
> more a concept of the tile itself and not about GT.
>
> So, the MAIN one is the traditional GT used for every operation
> in older platforms, and for render/graphics and compute on platforms
> that contains the stand-alone Media GT.
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Francois Dugast <francois.dugast@intel.com>
> Cc: Carl Zhang <carl.zhang@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Assuming the UMDs are prepared for the change to MEDIA's value (2 -> 1),
looks good to me.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 2 --
> include/uapi/drm/xe_drm.h | 5 ++---
> 2 files changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 3eef4160074e..34b4082edec5 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -375,8 +375,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> for_each_gt(gt, xe, id) {
> if (xe_gt_is_media_type(gt))
> gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
> - else if (gt_to_tile(gt)->id > 0)
> - gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_REMOTE;
> else
> gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> gt_list->gt_list[id].gt_id = gt->info.id;
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 05714068c637..1473dd29aa3f 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -376,9 +376,8 @@ struct drm_xe_query_config {
> */
> struct drm_xe_query_gt {
> #define DRM_XE_QUERY_GT_TYPE_MAIN 0
> -#define DRM_XE_QUERY_GT_TYPE_REMOTE 1
> -#define DRM_XE_QUERY_GT_TYPE_MEDIA 2
> - /** @type: GT type: Main, Remote, or Media */
> +#define DRM_XE_QUERY_GT_TYPE_MEDIA 1
> + /** @type: GT type: Main or Media */
> __u16 type;
> /** @gt_id: Unique ID of this GT within the PCI Device */
> __u16 gt_id;
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 14/50] drm/xe/uapi: Kill VM_MADVISE IOCTL
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (12 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 13/50] drm/xe/uapi: Remove GT_TYPE_REMOTE Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 15/50] drm/xe/uapi: Separate bo_create placement from flags Francois Dugast
` (42 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Remove unused IOCTL.
Without any userspace using it we need to remove before we
can be accepted upstream.
At this point we are breaking the compatibility for good,
so we don't need to break when we are in-tree. So, let's
also use this breakage to sort out the IOCTL entries and
fix all the small indentation and line issues.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 -
drivers/gpu/drm/xe/xe_bo.c | 2 +-
drivers/gpu/drm/xe/xe_bo_types.h | 3 +
drivers/gpu/drm/xe/xe_device.c | 8 +-
drivers/gpu/drm/xe/xe_vm_madvise.c | 299 -----------------------------
drivers/gpu/drm/xe/xe_vm_madvise.h | 15 --
include/uapi/drm/xe_drm.h | 92 ++-------
7 files changed, 18 insertions(+), 402 deletions(-)
delete mode 100644 drivers/gpu/drm/xe/xe_vm_madvise.c
delete mode 100644 drivers/gpu/drm/xe/xe_vm_madvise.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 776c31e73f29..6c18a9213851 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -114,7 +114,6 @@ xe-y += xe_bb.o \
xe_uc_debugfs.o \
xe_uc_fw.o \
xe_vm.o \
- xe_vm_madvise.o \
xe_wait_user_fence.o \
xe_wa.o \
xe_wopcm.o
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 632f75a752c5..9e6e8f77dd51 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1235,7 +1235,7 @@ struct xe_bo *__xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
bo->props.preferred_mem_class = XE_BO_PROPS_INVALID;
bo->props.preferred_gt = XE_BO_PROPS_INVALID;
bo->props.preferred_mem_type = XE_BO_PROPS_INVALID;
- bo->ttm.priority = DRM_XE_VMA_PRIORITY_NORMAL;
+ bo->ttm.priority = XE_BO_PRIORITY_NORMAL;
INIT_LIST_HEAD(&bo->pinned_link);
#ifdef CONFIG_PROC_FS
INIT_LIST_HEAD(&bo->client_link);
diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
index 051fe990c133..4bff60996168 100644
--- a/drivers/gpu/drm/xe/xe_bo_types.h
+++ b/drivers/gpu/drm/xe/xe_bo_types.h
@@ -19,6 +19,9 @@ struct xe_vm;
#define XE_BO_MAX_PLACEMENTS 3
+/* TODO: To be selected with VM_MADVISE */
+#define XE_BO_PRIORITY_NORMAL 1
+
/** @xe_bo: XE buffer object */
struct xe_bo {
/** @ttm: TTM base buffer object */
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 8341acf66e5f..350d52c54f7a 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -34,7 +34,6 @@
#include "xe_ttm_stolen_mgr.h"
#include "xe_ttm_sys_mgr.h"
#include "xe_vm.h"
-#include "xe_vm_madvise.h"
#include "xe_wait_user_fence.h"
#include "xe_hwmon.h"
@@ -115,18 +114,17 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
DRM_IOCTL_DEF_DRV(XE_VM_CREATE, xe_vm_create_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_VM_DESTROY, xe_vm_destroy_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_VM_BIND, xe_vm_bind_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(XE_EXEC, xe_exec_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_CREATE, xe_exec_queue_create_ioctl,
DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_GET_PROPERTY, xe_exec_queue_get_property_ioctl,
- DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_DESTROY, xe_exec_queue_destroy_ioctl,
DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_EXEC, xe_exec_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_SET_PROPERTY, xe_exec_queue_set_property_ioctl,
DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(XE_EXEC_QUEUE_GET_PROPERTY, xe_exec_queue_get_property_ioctl,
+ DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(XE_WAIT_USER_FENCE, xe_wait_user_fence_ioctl,
DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(XE_VM_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
};
static const struct file_operations xe_driver_fops = {
diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
deleted file mode 100644
index 72d051ecac5c..000000000000
--- a/drivers/gpu/drm/xe/xe_vm_madvise.c
+++ /dev/null
@@ -1,299 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2021 Intel Corporation
- */
-
-#include "xe_vm_madvise.h"
-
-#include <linux/nospec.h>
-
-#include <drm/ttm/ttm_tt.h>
-#include <drm/xe_drm.h>
-
-#include "xe_bo.h"
-#include "xe_vm.h"
-
-static int madvise_preferred_mem_class(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas,
- u64 value)
-{
- int i, err;
-
- if (XE_IOCTL_DBG(xe, value > DRM_XE_MEM_REGION_CLASS_VRAM))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, value == DRM_XE_MEM_REGION_CLASS_VRAM &&
- !xe->info.is_dgfx))
- return -EINVAL;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.preferred_mem_class = value;
- xe_bo_placement_for_flags(xe, bo, bo->flags);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_preferred_gt(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- int i, err;
-
- if (XE_IOCTL_DBG(xe, value > xe->info.tile_count))
- return -EINVAL;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.preferred_gt = value;
- xe_bo_placement_for_flags(xe, bo, bo->flags);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_preferred_mem_class_gt(struct xe_device *xe,
- struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas,
- u64 value)
-{
- int i, err;
- u32 gt_id = upper_32_bits(value);
- u32 mem_class = lower_32_bits(value);
-
- if (XE_IOCTL_DBG(xe, mem_class > DRM_XE_MEM_REGION_CLASS_VRAM))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, mem_class == DRM_XE_MEM_REGION_CLASS_VRAM &&
- !xe->info.is_dgfx))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, gt_id > xe->info.tile_count))
- return -EINVAL;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.preferred_mem_class = mem_class;
- bo->props.preferred_gt = gt_id;
- xe_bo_placement_for_flags(xe, bo, bo->flags);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_cpu_atomic(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- int i, err;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
- if (XE_IOCTL_DBG(xe, !(bo->flags & XE_BO_CREATE_SYSTEM_BIT)))
- return -EINVAL;
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.cpu_atomic = !!value;
-
- /*
- * All future CPU accesses must be from system memory only, we
- * just invalidate the CPU page tables which will trigger a
- * migration on next access.
- */
- if (bo->props.cpu_atomic)
- ttm_bo_unmap_virtual(&bo->ttm);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_device_atomic(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- int i, err;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
- if (XE_IOCTL_DBG(xe, !(bo->flags & XE_BO_CREATE_VRAM0_BIT) &&
- !(bo->flags & XE_BO_CREATE_VRAM1_BIT)))
- return -EINVAL;
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->props.device_atomic = !!value;
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_priority(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- int i, err;
-
- if (XE_IOCTL_DBG(xe, value > DRM_XE_VMA_PRIORITY_HIGH))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, value == DRM_XE_VMA_PRIORITY_HIGH &&
- !capable(CAP_SYS_NICE)))
- return -EPERM;
-
- for (i = 0; i < num_vmas; ++i) {
- struct xe_bo *bo;
-
- bo = xe_vma_bo(vmas[i]);
-
- err = xe_bo_lock(bo, true);
- if (err)
- return err;
- bo->ttm.priority = value;
- ttm_bo_move_to_lru_tail(&bo->ttm);
- xe_bo_unlock(bo);
- }
-
- return 0;
-}
-
-static int madvise_pin(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value)
-{
- drm_warn(&xe->drm, "NIY");
- return 0;
-}
-
-typedef int (*madvise_func)(struct xe_device *xe, struct xe_vm *vm,
- struct xe_vma **vmas, int num_vmas, u64 value);
-
-static const madvise_func madvise_funcs[] = {
- [DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS] = madvise_preferred_mem_class,
- [DRM_XE_VM_MADVISE_PREFERRED_GT] = madvise_preferred_gt,
- [DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT] =
- madvise_preferred_mem_class_gt,
- [DRM_XE_VM_MADVISE_CPU_ATOMIC] = madvise_cpu_atomic,
- [DRM_XE_VM_MADVISE_DEVICE_ATOMIC] = madvise_device_atomic,
- [DRM_XE_VM_MADVISE_PRIORITY] = madvise_priority,
- [DRM_XE_VM_MADVISE_PIN] = madvise_pin,
-};
-
-static struct xe_vma **
-get_vmas(struct xe_vm *vm, int *num_vmas, u64 addr, u64 range)
-{
- struct xe_vma **vmas, **__vmas;
- struct drm_gpuva *gpuva;
- int max_vmas = 8;
-
- lockdep_assert_held(&vm->lock);
-
- vmas = kmalloc(max_vmas * sizeof(*vmas), GFP_KERNEL);
- if (!vmas)
- return NULL;
-
- drm_gpuvm_for_each_va_range(gpuva, &vm->gpuvm, addr, addr + range) {
- struct xe_vma *vma = gpuva_to_vma(gpuva);
-
- if (xe_vma_is_userptr(vma))
- continue;
-
- if (*num_vmas == max_vmas) {
- max_vmas <<= 1;
- __vmas = krealloc(vmas, max_vmas * sizeof(*vmas),
- GFP_KERNEL);
- if (!__vmas)
- return NULL;
- vmas = __vmas;
- }
-
- vmas[*num_vmas] = vma;
- *num_vmas += 1;
- }
-
- return vmas;
-}
-
-int xe_vm_madvise_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file)
-{
- struct xe_device *xe = to_xe_device(dev);
- struct xe_file *xef = to_xe_file(file);
- struct drm_xe_vm_madvise *args = data;
- struct xe_vm *vm;
- struct xe_vma **vmas = NULL;
- int num_vmas = 0, err = 0, idx;
-
- if (XE_IOCTL_DBG(xe, args->extensions) ||
- XE_IOCTL_DBG(xe, args->pad || args->pad2) ||
- XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, args->property > ARRAY_SIZE(madvise_funcs)))
- return -EINVAL;
-
- vm = xe_vm_lookup(xef, args->vm_id);
- if (XE_IOCTL_DBG(xe, !vm))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, !xe_vm_in_fault_mode(vm))) {
- err = -EINVAL;
- goto put_vm;
- }
-
- down_read(&vm->lock);
-
- if (XE_IOCTL_DBG(xe, xe_vm_is_closed_or_banned(vm))) {
- err = -ENOENT;
- goto unlock_vm;
- }
-
- vmas = get_vmas(vm, &num_vmas, args->addr, args->range);
- if (XE_IOCTL_DBG(xe, err))
- goto unlock_vm;
-
- if (XE_IOCTL_DBG(xe, !vmas)) {
- err = -ENOMEM;
- goto unlock_vm;
- }
-
- if (XE_IOCTL_DBG(xe, !num_vmas)) {
- err = -EINVAL;
- goto unlock_vm;
- }
-
- idx = array_index_nospec(args->property, ARRAY_SIZE(madvise_funcs));
- err = madvise_funcs[idx](xe, vm, vmas, num_vmas, args->value);
-
-unlock_vm:
- up_read(&vm->lock);
-put_vm:
- xe_vm_put(vm);
- kfree(vmas);
- return err;
-}
diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.h b/drivers/gpu/drm/xe/xe_vm_madvise.h
deleted file mode 100644
index eecd33acd248..000000000000
--- a/drivers/gpu/drm/xe/xe_vm_madvise.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2021 Intel Corporation
- */
-
-#ifndef _XE_VM_MADVISE_H_
-#define _XE_VM_MADVISE_H_
-
-struct drm_device;
-struct drm_file;
-
-int xe_vm_madvise_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file);
-
-#endif
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 1473dd29aa3f..dcd4cdf167f3 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -103,28 +103,26 @@ struct xe_user_extension {
#define DRM_XE_VM_CREATE 0x03
#define DRM_XE_VM_DESTROY 0x04
#define DRM_XE_VM_BIND 0x05
-#define DRM_XE_EXEC_QUEUE_CREATE 0x06
-#define DRM_XE_EXEC_QUEUE_DESTROY 0x07
-#define DRM_XE_EXEC 0x08
+#define DRM_XE_EXEC 0x06
+#define DRM_XE_EXEC_QUEUE_CREATE 0x07
+#define DRM_XE_EXEC_QUEUE_DESTROY 0x08
#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x09
-#define DRM_XE_WAIT_USER_FENCE 0x0a
-#define DRM_XE_VM_MADVISE 0x0b
-#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0c
-
+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0a
+#define DRM_XE_WAIT_USER_FENCE 0x0b
/* Must be kept compact -- no holes */
+
#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
-#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
-#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
+#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
+#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
+#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
#define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
+#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
+#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
#define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
-#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
-#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
-#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
-#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise)
/**
* struct drm_xe_engine_class_instance - instance of an engine class
@@ -1095,74 +1093,6 @@ struct drm_xe_wait_user_fence {
__u64 reserved[2];
};
-/**
- * struct drm_xe_vm_madvise - give advice about use of memory
- *
- * The @property can be:
- * - %DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS - Setting the preferred
- * location will trigger a migrate of the VMA backing store to new
- * location if the backing store is already allocated.
- * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum
- * drm_xe_memory_class.
- * - %DRM_XE_VM_MADVISE_PREFERRED_GT
- * - %DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT - In this case lower 32 bits
- * are mem class, upper 32 are GT. Combination provides a single IOCTL
- * plus migrate VMA to preferred location.
- * - %DRM_XE_VM_MADVISE_CPU_ATOMIC - The CPU will do atomic memory
- * operations to this VMA. Must be set on some devices for atomics to
- * behave correctly.
- * - %DRM_XE_VM_MADVISE_DEVICE_ATOMIC - The device will do atomic memory
- * operations to this VMA. Must be set on some devices for atomics to
- * behave correctly.
- * - %DRM_XE_VM_MADVISE_PRIORITY - Priority WRT to eviction (moving from
- * preferred memory location due to memory pressure). The lower the
- * priority, the more likely to be evicted.
- *
- * - %DRM_XE_VMA_PRIORITY_LOW
- * - %DRM_XE_VMA_PRIORITY_NORMAL - Default
- * - %DRM_XE_VMA_PRIORITY_HIGH - Must be user with elevated privileges
- * - %DRM_XE_VM_MADVISE_PIN - Pin the VMA in memory, must be user with
- * elevated privileges
- */
-struct drm_xe_vm_madvise {
- /** @extensions: Pointer to the first extension struct, if any */
- __u64 extensions;
-
- /** @vm_id: The ID VM in which the VMA exists */
- __u32 vm_id;
-
- /** @pad: MBZ */
- __u32 pad;
-
- /** @range: Number of bytes in the VMA */
- __u64 range;
-
- /** @addr: Address of the VMA to operation on */
- __u64 addr;
-
-#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0
-#define DRM_XE_VM_MADVISE_PREFERRED_GT 1
-#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2
-#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3
-#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4
-#define DRM_XE_VM_MADVISE_PRIORITY 5
-#define DRM_XE_VMA_PRIORITY_LOW 0
-#define DRM_XE_VMA_PRIORITY_NORMAL 1
-#define DRM_XE_VMA_PRIORITY_HIGH 2
-#define DRM_XE_VM_MADVISE_PIN 6
- /** @property: property to set */
- __u32 property;
-
- /** @pad2: MBZ */
- __u32 pad2;
-
- /** @value: property value */
- __u64 value;
-
- /** @reserved: Reserved */
- __u64 reserved[2];
-};
-
/**
* DOC: XE PMU event config IDs
*
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 15/50] drm/xe/uapi: Separate bo_create placement from flags
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (13 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 14/50] drm/xe/uapi: Kill VM_MADVISE IOCTL Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 16/50] drm/xe/uapi: Remove unused inaccessible memory region Francois Dugast
` (41 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Although the flags are about the creation, the memory placement
of the BO deserves a proper dedicated field in the uapi.
Besides getting more clear, it also allows to remove the
'magic' shifts from the flags that was a concern during the
uapi reviews.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_bo.c | 15 +++++++--------
include/uapi/drm/xe_drm.h | 12 ++++++------
2 files changed, 13 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 9e6e8f77dd51..6ca02487addc 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1799,19 +1799,18 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
u32 handle;
int err;
- if (XE_IOCTL_DBG(xe, args->extensions) || XE_IOCTL_DBG(xe, args->pad) ||
+ if (XE_IOCTL_DBG(xe, args->extensions) ||
XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
return -EINVAL;
+ /* at least one valid memory placement must be specified */
+ if (XE_IOCTL_DBG(xe, !(args->placement & xe->info.mem_region_mask)))
+ return -EINVAL;
+
if (XE_IOCTL_DBG(xe, args->flags &
~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
DRM_XE_GEM_CREATE_FLAG_SCANOUT |
- DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
- xe->info.mem_region_mask)))
- return -EINVAL;
-
- /* at least one memory type must be specified */
- if (XE_IOCTL_DBG(xe, !(args->flags & xe->info.mem_region_mask)))
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM)))
return -EINVAL;
if (XE_IOCTL_DBG(xe, args->handle))
@@ -1832,7 +1831,7 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
bo_flags |= XE_BO_SCANOUT_BIT;
- bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
+ bo_flags |= args->placement << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index dcd4cdf167f3..a688691458f9 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -619,9 +619,12 @@ struct drm_xe_gem_create {
*/
__u64 size;
-#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
-#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
-#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
+ /** @placement: A mask of memory instances of where BO can be placed. */
+ __u32 placement;
+
+#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)
+#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1)
+#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)
/**
* @flags: Flags, currently a mask of memory instances of where BO can
* be placed
@@ -645,9 +648,6 @@ struct drm_xe_gem_create {
*/
__u32 handle;
- /** @pad: MBZ */
- __u32 pad;
-
/** @reserved: Reserved */
__u64 reserved[2];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 16/50] drm/xe/uapi: Remove unused inaccessible memory region
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (14 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 15/50] drm/xe/uapi: Separate bo_create placement from flags Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 17/50] drm/xe/uapi: Remove unused QUERY_CONFIG_MEM_REGION_COUNT Francois Dugast
` (40 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
This is not used and also the negative of the other 2 regions:
native_mem_regions and slow_mem_regions.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 5 -----
1 file changed, 5 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index a688691458f9..d8bc29c8f059 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -393,11 +393,6 @@ struct drm_xe_query_gt {
* they live on a different GPU/Tile.
*/
__u64 slow_mem_regions;
- /**
- * @inaccessible_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that is not accessible by this GT at all.
- */
- __u64 inaccessible_mem_regions;
/** @reserved: Reserved */
__u64 reserved[8];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 17/50] drm/xe/uapi: Remove unused QUERY_CONFIG_MEM_REGION_COUNT
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (15 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 16/50] drm/xe/uapi: Remove unused inaccessible memory region Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 18/50] drm/xe/uapi: Remove unused QUERY_CONFIG_GT_COUNT Francois Dugast
` (39 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
As part of uAPI cleanup, remove this constant which is not used. Memory
regions can be queried with DRM_XE_DEVICE_QUERY_MEM_USAGE.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 --
include/uapi/drm/xe_drm.h | 5 +----
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 34b4082edec5..d0995b0d4bdc 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -336,8 +336,6 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
config->info[DRM_XE_QUERY_CONFIG_GT_COUNT] = xe->info.gt_count;
- config->info[DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT] =
- hweight_long(xe->info.mem_region_mask);
config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
xe_exec_queue_device_get_max_priority(xe);
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index d8bc29c8f059..a7e9d7109a5f 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -342,8 +342,6 @@ struct drm_xe_query_mem_usage {
* - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
* - %DRM_XE_QUERY_CONFIG_GT_COUNT - Total number of GTs for the entire
* device
- * - %DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT - Total number of accessible
- * memory regions
* - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
* available exec queue priority
*/
@@ -357,8 +355,7 @@ struct drm_xe_query_config {
#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
#define DRM_XE_QUERY_CONFIG_VA_BITS 3
#define DRM_XE_QUERY_CONFIG_GT_COUNT 4
-#define DRM_XE_QUERY_CONFIG_MEM_REGION_COUNT 5
-#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 6
+#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 5
/** @info: array of elements containing the config info */
__u64 info[];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 18/50] drm/xe/uapi: Remove unused QUERY_CONFIG_GT_COUNT
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (16 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 17/50] drm/xe/uapi: Remove unused QUERY_CONFIG_MEM_REGION_COUNT Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 19/50] drm/xe/uapi: Rename *_mem_regions masks Francois Dugast
` (38 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
As part of uAPI cleanup, remove this constant which is not used. Number
of GTs are provided as num_gt in drm_xe_query_gt_list.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 1 -
include/uapi/drm/xe_drm.h | 5 +----
2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index d0995b0d4bdc..d292631fda59 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -335,7 +335,6 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
- config->info[DRM_XE_QUERY_CONFIG_GT_COUNT] = xe->info.gt_count;
config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
xe_exec_queue_device_get_max_priority(xe);
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index a7e9d7109a5f..3e130e9b44ff 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -340,8 +340,6 @@ struct drm_xe_query_mem_usage {
* - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
* required by this device, typically SZ_4K or SZ_64K
* - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
- * - %DRM_XE_QUERY_CONFIG_GT_COUNT - Total number of GTs for the entire
- * device
* - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
* available exec queue priority
*/
@@ -354,8 +352,7 @@ struct drm_xe_query_config {
#define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
#define DRM_XE_QUERY_CONFIG_VA_BITS 3
-#define DRM_XE_QUERY_CONFIG_GT_COUNT 4
-#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 5
+#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
/** @info: array of elements containing the config info */
__u64 info[];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 19/50] drm/xe/uapi: Rename *_mem_regions masks
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (17 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 18/50] drm/xe/uapi: Remove unused QUERY_CONFIG_GT_COUNT Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 20/50] drm/xe/uapi: Rename query's mem_usage to mem_regions Francois Dugast
` (37 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
- 'native' doesn't make much sense on integrated devices.
- 'slow' is not necessarily true and doesn't go well with opposition
to 'native'.
Instead, let's use 'near' vs 'far'. It makes sense with all the current
Intel GPUs and it is future proof. Right now, there's absolutely no need
to define among the 'far' memory, which ones are slower, either in terms
of latency, nunmber of hops or bandwidth.
In case of this might become a requirement in the future, a new query
could be added to indicate the certain 'distance' between a given engine
and a memory_region. But for now, this fulfill all of the current
requirements in the most straightforward way for the userspace drivers.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 8 ++++----
include/uapi/drm/xe_drm.h | 17 +++++++++--------
2 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index d292631fda59..c75f8f33a84e 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -377,12 +377,12 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
gt_list->gt_list[id].gt_id = gt->info.id;
gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
if (!IS_DGFX(xe))
- gt_list->gt_list[id].native_mem_regions = 0x1;
+ gt_list->gt_list[id].near_mem_regions = 0x1;
else
- gt_list->gt_list[id].native_mem_regions =
+ gt_list->gt_list[id].near_mem_regions =
BIT(gt_to_tile(gt)->id) << 1;
- gt_list->gt_list[id].slow_mem_regions = xe->info.mem_region_mask ^
- gt_list->gt_list[id].native_mem_regions;
+ gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
+ gt_list->gt_list[id].near_mem_regions;
}
if (copy_to_user(query_ptr, gt_list, size)) {
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 3e130e9b44ff..3b164f8e54b3 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -376,17 +376,18 @@ struct drm_xe_query_gt {
/** @clock_freq: A clock frequency for timestamp */
__u32 clock_freq;
/**
- * @native_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that lives on the same GPU/Tile and have
- * direct access.
+ * @near_mem_regions: Bit mask of instances from
+ * drm_xe_query_mem_usage that is near the current engines of this GT.
*/
- __u64 native_mem_regions;
+ __u64 near_mem_regions;
/**
- * @slow_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that this GT can indirectly access, although
- * they live on a different GPU/Tile.
+ * @far_mem_regions: Bit mask of instances from
+ * drm_xe_query_mem_usage that is far from the engines of this GT.
+ * In general, it has extra indirections when compared to the
+ * @near_mem_regions. For a discrete device this could mean system
+ * memory and memory living in a different Tile.
*/
- __u64 slow_mem_regions;
+ __u64 far_mem_regions;
/** @reserved: Reserved */
__u64 reserved[8];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 20/50] drm/xe/uapi: Rename query's mem_usage to mem_regions
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (18 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 19/50] drm/xe/uapi: Rename *_mem_regions masks Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 21/50] drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof Francois Dugast
` (36 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
'Usage' gives an impression of telemetry information where someone
would query to see how the memory is currently used and available
size, etc. However this API is more than this. It is about a global
view of all the memory regions available in the system and user
space needs to have this information so they can then use the
mem_region masks that are returned for the engine access.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 14 +++++++-------
include/uapi/drm/xe_drm.h | 16 ++++++++--------
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index c75f8f33a84e..c7cea81d8a95 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -230,7 +230,7 @@ static int query_engines(struct xe_device *xe,
return 0;
}
-static size_t calc_memory_usage_size(struct xe_device *xe)
+static size_t calc_mem_regions_size(struct xe_device *xe)
{
u32 num_managers = 1;
int i;
@@ -239,15 +239,15 @@ static size_t calc_memory_usage_size(struct xe_device *xe)
if (ttm_manager_type(&xe->ttm, i))
num_managers++;
- return offsetof(struct drm_xe_query_mem_usage, regions[num_managers]);
+ return offsetof(struct drm_xe_query_mem_regions, regions[num_managers]);
}
-static int query_memory_usage(struct xe_device *xe,
+static int query_mem_regions(struct xe_device *xe,
struct drm_xe_device_query *query)
{
- size_t size = calc_memory_usage_size(xe);
- struct drm_xe_query_mem_usage *usage;
- struct drm_xe_query_mem_usage __user *query_ptr =
+ size_t size = calc_mem_regions_size(xe);
+ struct drm_xe_query_mem_regions *usage;
+ struct drm_xe_query_mem_regions __user *query_ptr =
u64_to_user_ptr(query->data);
struct ttm_resource_manager *man;
int ret, i;
@@ -548,7 +548,7 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
static int (* const xe_query_funcs[])(struct xe_device *xe,
struct drm_xe_device_query *query) = {
query_engines,
- query_memory_usage,
+ query_mem_regions,
query_config,
query_gt_list,
query_hwconfig,
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 3b164f8e54b3..f6b7ebd8168a 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -307,13 +307,13 @@ struct drm_xe_query_engine_cycles {
};
/**
- * struct drm_xe_query_mem_usage - describe memory regions and usage
+ * struct drm_xe_query_mem_regions - describe memory regions
*
* If a query is made with a struct drm_xe_device_query where .query
- * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
- * struct drm_xe_query_mem_usage in .data.
+ * is equal to DRM_XE_DEVICE_QUERY_MEM_REGIONS, then the reply uses
+ * struct drm_xe_query_mem_regions in .data.
*/
-struct drm_xe_query_mem_usage {
+struct drm_xe_query_mem_regions {
/** @num_regions: number of memory regions returned in @regions */
__u32 num_regions;
/** @pad: MBZ */
@@ -377,12 +377,12 @@ struct drm_xe_query_gt {
__u32 clock_freq;
/**
* @near_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that is near the current engines of this GT.
+ * drm_xe_query_mem_regions that is near the current engines of this GT.
*/
__u64 near_mem_regions;
/**
* @far_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that is far from the engines of this GT.
+ * drm_xe_query_mem_regions that is far from the engines of this GT.
* In general, it has extra indirections when compared to the
* @near_mem_regions. For a discrete device this could mean system
* memory and memory living in a different Tile.
@@ -505,7 +505,7 @@ struct drm_xe_query_uc_fw_version {
*
* The @query can be:
* - %DRM_XE_DEVICE_QUERY_ENGINES
- * - %DRM_XE_DEVICE_QUERY_MEM_USAGE
+ * - %DRM_XE_DEVICE_QUERY_MEM_REGIONS
* - %DRM_XE_DEVICE_QUERY_CONFIG
* - %DRM_XE_DEVICE_QUERY_GT_LIST - Query type to retrieve the hardware
* configuration of the device such as information on slices, memory,
@@ -555,7 +555,7 @@ struct drm_xe_device_query {
__u64 extensions;
#define DRM_XE_DEVICE_QUERY_ENGINES 0
-#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
+#define DRM_XE_DEVICE_QUERY_MEM_REGIONS 1
#define DRM_XE_DEVICE_QUERY_CONFIG 2
#define DRM_XE_DEVICE_QUERY_GT_LIST 3
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 21/50] drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (19 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 20/50] drm/xe/uapi: Rename query's mem_usage to mem_regions Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 22/50] drm/xe/uapi: Replace BO with GEM in documentation Francois Dugast
` (35 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: José Roberto de Souza <jose.souza@intel.com>
We have at least 2 future features(OA and future media engines capabilities)
that will require Xe to provide more information about engines to UMDs.
But this information should not just be added to
drm_xe_engine_class_instance for a couple of reasons:
- drm_xe_engine_class_instance is used as input to other structs/uAPIs
and those uAPIs don't care about any of these future new engine fields
- those new fields are useless information after initialization for
some UMDs, so it should not need to carry that around
So here my proposal is to make DRM_XE_DEVICE_QUERY_ENGINES return an
array of drm_xe_query_engine_info that contain
drm_xe_engine_class_instance and 3 u64s to be used for future features.
Reference OA: https://patchwork.freedesktop.org/patch/558362/?series=121084&rev=6
Cc: Francois Dugast <francois.dugast@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
[Rodrigo Rebased]
---
drivers/gpu/drm/xe/xe_query.c | 15 ++++++++-------
include/uapi/drm/xe_drm.h | 12 ++++++++++++
2 files changed, 20 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index c7cea81d8a95..ec00e6f4f1ca 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -53,7 +53,7 @@ static size_t calc_hw_engine_info_size(struct xe_device *xe)
i++;
}
- return i * sizeof(struct drm_xe_engine_class_instance);
+ return i * sizeof(struct drm_xe_query_engine_info);
}
typedef u64 (*__ktime_func_t)(void);
@@ -186,9 +186,9 @@ static int query_engines(struct xe_device *xe,
struct drm_xe_device_query *query)
{
size_t size = calc_hw_engine_info_size(xe);
- struct drm_xe_engine_class_instance __user *query_ptr =
+ struct drm_xe_query_engine_info __user *query_ptr =
u64_to_user_ptr(query->data);
- struct drm_xe_engine_class_instance *hw_engine_info;
+ struct drm_xe_query_engine_info *hw_engine_info;
struct xe_hw_engine *hwe;
enum xe_hw_engine_id id;
struct xe_gt *gt;
@@ -211,12 +211,13 @@ static int query_engines(struct xe_device *xe,
if (xe_hw_engine_is_reserved(hwe))
continue;
- hw_engine_info[i].engine_class =
+ hw_engine_info[i].instance.engine_class =
xe_to_user_engine_class[hwe->class];
- hw_engine_info[i].engine_instance =
+ hw_engine_info[i].instance.engine_instance =
hwe->logical_instance;
- hw_engine_info[i].gt_id = gt->info.id;
- hw_engine_info[i].pad = 0;
+ hw_engine_info[i].instance.gt_id = gt->info.id;
+ hw_engine_info[i].instance.pad = 0;
+ memset(hw_engine_info->rsvd, 0, sizeof(hw_engine_info->rsvd));
i++;
}
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index f6b7ebd8168a..8dd3abfdb4ad 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -161,6 +161,18 @@ struct drm_xe_engine_class_instance {
__u16 pad;
};
+/**
+ * struct drm_xe_query_engine_info - describe hardware engine
+ *
+ * If a query is made with a struct drm_xe_device_query where .query
+ * is equal to DRM_XE_DEVICE_QUERY_ENGINES, then the reply uses an array of
+ * struct drm_xe_query_engine_info in .data.
+ */
+struct drm_xe_query_engine_info {
+ struct drm_xe_engine_class_instance instance;
+ __u64 rsvd[3];
+};
+
/**
* enum drm_xe_memory_class - Supported memory classes.
*/
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 22/50] drm/xe/uapi: Replace BO with GEM in documentation
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (20 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 21/50] drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 23/50] drm/xe/pmu: Drop interrupt pmu event Francois Dugast
` (34 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Align documentation with names of constants and structs, which
use GEM instead of BO.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 8dd3abfdb4ad..b39b1c2646de 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -621,14 +621,14 @@ struct drm_xe_gem_create {
*/
__u64 size;
- /** @placement: A mask of memory instances of where BO can be placed. */
+ /** @placement: A mask of memory instances of where GEM can be placed. */
__u32 placement;
#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)
#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1)
#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)
/**
- * @flags: Flags, currently a mask of memory instances of where BO can
+ * @flags: Flags, currently a mask of memory instances of where GEM can
* be placed
*/
__u32 flags;
@@ -636,7 +636,7 @@ struct drm_xe_gem_create {
/**
* @vm_id: Attached VM, if any
*
- * If a VM is specified, this BO must:
+ * If a VM is specified, this GEM must:
*
* 1. Only ever be bound to that VM.
* 2. Cannot be exported as a PRIME fd.
@@ -738,8 +738,8 @@ struct drm_xe_vm_destroy {
* - %DRM_XE_VM_BIND_FLAG_NULL - When the NULL flag is set, the page
* tables are setup with a special bit which indicates writes are
* dropped and all reads return zero. In the future, the NULL flags
- * will only be valid for DRM_XE_VM_BIND_OP_MAP operations, the BO
- * handle MBZ, and the BO offset MBZ. This flag is intended to
+ * will only be valid for DRM_XE_VM_BIND_OP_MAP operations, the GEM
+ * handle MBZ, and the GEM offset MBZ. This flag is intended to
* implement VK sparse bindings.
*
*/
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 23/50] drm/xe/pmu: Drop interrupt pmu event
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (21 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 22/50] drm/xe/uapi: Replace BO with GEM in documentation Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 24/50] xe/xe_bo: Reject bo creation of unaligned size Francois Dugast
` (33 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Tvrtko Ursulin, Francois Dugast, Rodrigo Vivi
From: Aravind Iddamsetty <aravind.iddamsetty@linux.intel.com>
Drop interrupt event from PMU as that is not useful and not being used
by any UMD.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Francois Dugast <francois.dugast@intel.com>
Signed-off-by: Aravind Iddamsetty <aravind.iddamsetty@linux.intel.com>
Reviewed-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_irq.c | 18 ------------------
drivers/gpu/drm/xe/xe_pmu.c | 9 ---------
drivers/gpu/drm/xe/xe_pmu_types.h | 8 --------
include/uapi/drm/xe_drm.h | 13 ++++++-------
4 files changed, 6 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 21d5273d7e61..205147511aa0 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -27,20 +27,6 @@
#define IIR(offset) XE_REG(offset + 0x8)
#define IER(offset) XE_REG(offset + 0xc)
-/*
- * Interrupt statistic for PMU. Increments the counter only if the
- * interrupt originated from the GPU so interrupts from a device which
- * shares the interrupt line are not accounted.
- */
-static __always_inline void xe_pmu_irq_stats(struct xe_device *xe)
-{
- /*
- * A clever compiler translates that into INC. A not so clever one
- * should at least prevent store tearing.
- */
- WRITE_ONCE(xe->pmu.irq_count, xe->pmu.irq_count + 1);
-}
-
static void assert_iir_is_zero(struct xe_gt *mmio, struct xe_reg reg)
{
u32 val = xe_mmio_read32(mmio, reg);
@@ -360,8 +346,6 @@ static irqreturn_t xelp_irq_handler(int irq, void *arg)
xe_display_irq_enable(xe, gu_misc_iir);
- xe_pmu_irq_stats(xe);
-
return IRQ_HANDLED;
}
@@ -458,8 +442,6 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
dg1_intr_enable(xe, false);
xe_display_irq_enable(xe, gu_misc_iir);
- xe_pmu_irq_stats(xe);
-
return IRQ_HANDLED;
}
diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
index 8378ca3007d9..3e13e48a4f45 100644
--- a/drivers/gpu/drm/xe/xe_pmu.c
+++ b/drivers/gpu/drm/xe/xe_pmu.c
@@ -114,10 +114,6 @@ config_status(struct xe_device *xe, u64 config)
return -ENOENT;
switch (config_counter(config)) {
- case DRM_XE_PMU_INTERRUPTS(0):
- if (gt_id)
- return -ENOENT;
- break;
case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
case DRM_XE_PMU_COPY_GROUP_BUSY(0):
case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
@@ -181,13 +177,9 @@ static u64 __xe_pmu_event_read(struct perf_event *event)
const unsigned int gt_id = config_gt_id(event->attr.config);
const u64 config = event->attr.config;
struct xe_gt *gt = xe_device_get_gt(xe, gt_id);
- struct xe_pmu *pmu = &xe->pmu;
u64 val;
switch (config_counter(config)) {
- case DRM_XE_PMU_INTERRUPTS(0):
- val = READ_ONCE(pmu->irq_count);
- break;
case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
case DRM_XE_PMU_COPY_GROUP_BUSY(0):
case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
@@ -361,7 +353,6 @@ create_event_attributes(struct xe_pmu *pmu)
const char *unit;
bool global;
} events[] = {
- __global_event(0, "interrupts", NULL),
__event(1, "render-group-busy", "ns"),
__event(2, "copy-group-busy", "ns"),
__event(3, "media-group-busy", "ns"),
diff --git a/drivers/gpu/drm/xe/xe_pmu_types.h b/drivers/gpu/drm/xe/xe_pmu_types.h
index 4ccc7e9042f6..9cadbd243f57 100644
--- a/drivers/gpu/drm/xe/xe_pmu_types.h
+++ b/drivers/gpu/drm/xe/xe_pmu_types.h
@@ -51,14 +51,6 @@ struct xe_pmu {
*
*/
u64 sample[XE_PMU_MAX_GT][__XE_NUM_PMU_SAMPLERS];
- /**
- * @irq_count: Number of interrupts
- *
- * Intentionally unsigned long to avoid atomics or heuristics on 32bit.
- * 4e9 interrupts are a lot and postprocessing can really deal with an
- * occasional wraparound easily. It's 32bit after all.
- */
- unsigned long irq_count;
/**
* @events_attr_group: Device events attribute group.
*/
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index b39b1c2646de..ec50007fef64 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1102,7 +1102,7 @@ struct drm_xe_wait_user_fence {
* in 'struct perf_event_attr' as part of perf_event_open syscall to read a
* particular event.
*
- * For example to open the DRM_XE_PMU_INTERRUPTS(0):
+ * For example to open the DRM_XE_PMU_RENDER_GROUP_BUSY(0):
*
* .. code-block:: C
*
@@ -1116,7 +1116,7 @@ struct drm_xe_wait_user_fence {
* attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
* attr.use_clockid = 1;
* attr.clockid = CLOCK_MONOTONIC;
- * attr.config = DRM_XE_PMU_INTERRUPTS(0);
+ * attr.config = DRM_XE_PMU_RENDER_GROUP_BUSY(0);
*
* fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
*/
@@ -1129,11 +1129,10 @@ struct drm_xe_wait_user_fence {
#define ___XE_PMU_OTHER(gt, x) \
(((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))
-#define DRM_XE_PMU_INTERRUPTS(gt) ___XE_PMU_OTHER(gt, 0)
-#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
-#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
-#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
-#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 4)
+#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 0)
+#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
+#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
+#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
#if defined(__cplusplus)
}
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 24/50] xe/xe_bo: Reject bo creation of unaligned size
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (22 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 23/50] drm/xe/pmu: Drop interrupt pmu event Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 25/50] fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof Francois Dugast
` (32 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
From: Mauro Carvalho Chehab <mauro.chehab@linux.intel.com>
For xe bo creation we request passing size which matches system or
vram minimum page alignment. This way we want to ensure userspace
is aware of region constraints and not aligned allocations will be
rejected returning EINVAL.
v2:
- Rebase, Update uAPI documentation. (Thomas)
v3:
- Adjust the dma-buf kunit test accordingly. (Thomas)
Signed-off-by: Mauro Carvalho Chehab <mauro.chehab@linux.intel.com>
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
[Francois fixed conflicts during a rebase]
---
drivers/gpu/drm/xe/tests/xe_dma_buf.c | 8 +++++++-
drivers/gpu/drm/xe/xe_bo.c | 24 ++++++++++++++++--------
include/uapi/drm/xe_drm.h | 25 +++++++++++++++++--------
3 files changed, 40 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/xe/tests/xe_dma_buf.c b/drivers/gpu/drm/xe/tests/xe_dma_buf.c
index 18c00bc03024..a6756b554069 100644
--- a/drivers/gpu/drm/xe/tests/xe_dma_buf.c
+++ b/drivers/gpu/drm/xe/tests/xe_dma_buf.c
@@ -109,14 +109,20 @@ static void xe_test_dmabuf_import_same_driver(struct xe_device *xe)
struct drm_gem_object *import;
struct dma_buf *dmabuf;
struct xe_bo *bo;
+ size_t size;
/* No VRAM on this device? */
if (!ttm_manager_type(&xe->ttm, XE_PL_VRAM0) &&
(params->mem_mask & XE_BO_CREATE_VRAM0_BIT))
return;
+ size = PAGE_SIZE;
+ if ((params->mem_mask & XE_BO_CREATE_VRAM0_BIT) &&
+ xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
+ size = SZ_64K;
+
kunit_info(test, "running %s\n", __func__);
- bo = xe_bo_create(xe, NULL, NULL, PAGE_SIZE, ttm_bo_type_device,
+ bo = xe_bo_create(xe, NULL, NULL, size, ttm_bo_type_device,
XE_BO_CREATE_USER_BIT | params->mem_mask);
if (IS_ERR(bo)) {
KUNIT_FAIL(test, "xe_bo_create() failed with err=%ld\n",
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 6ca02487addc..f2f22ec65bc0 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1201,6 +1201,7 @@ struct xe_bo *__xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
};
struct ttm_placement *placement;
uint32_t alignment;
+ size_t aligned_size;
int err;
/* Only kernel objects should set GT */
@@ -1211,23 +1212,30 @@ struct xe_bo *__xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
return ERR_PTR(-EINVAL);
}
- if (!bo) {
- bo = xe_bo_alloc();
- if (IS_ERR(bo))
- return bo;
- }
-
if (flags & (XE_BO_CREATE_VRAM_MASK | XE_BO_CREATE_STOLEN_BIT) &&
!(flags & XE_BO_CREATE_IGNORE_MIN_PAGE_SIZE_BIT) &&
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) {
- size = ALIGN(size, SZ_64K);
+ aligned_size = ALIGN(size, SZ_64K);
+ if (type != ttm_bo_type_device)
+ size = ALIGN(size, SZ_64K);
flags |= XE_BO_INTERNAL_64K;
alignment = SZ_64K >> PAGE_SHIFT;
+
} else {
- size = ALIGN(size, PAGE_SIZE);
+ aligned_size = ALIGN(size, SZ_4K);
+ flags &= ~XE_BO_INTERNAL_64K;
alignment = SZ_4K >> PAGE_SHIFT;
}
+ if (type == ttm_bo_type_device && aligned_size != size)
+ return ERR_PTR(-EINVAL);
+
+ if (!bo) {
+ bo = xe_bo_alloc();
+ if (IS_ERR(bo))
+ return bo;
+ }
+
bo->tile = tile;
bo->size = size;
bo->flags = flags;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index ec50007fef64..47fe9d1ccdce 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -212,11 +212,13 @@ struct drm_xe_query_mem_region {
*
* When the kernel allocates memory for this region, the
* underlying pages will be at least @min_page_size in size.
- *
- * Important note: When userspace allocates a GTT address which
- * can point to memory allocated from this region, it must also
- * respect this minimum alignment. This is enforced by the
- * kernel.
+ * Buffer objects with an allowable placement in this region must be
+ * created with a size aligned to this value.
+ * GPU virtual address mappings of (parts of) buffer objects that
+ * may be placed in this region must also have their GPU virtual
+ * address and range aligned to this value.
+ * Affected IOCTLS will return %-EINVAL if alignment restrictions are
+ * not met.
*/
__u32 min_page_size;
/**
@@ -362,6 +364,14 @@ struct drm_xe_query_config {
#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
#define DRM_XE_QUERY_CONFIG_FLAGS 1
#define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
+ /*
+ * DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - This returns the
+ * maximum value of the &min_page_size across all memory regions
+ * the device implements. User-space code that does not want
+ * to track @min_page_size per region can use this value for
+ * a buffer-object size and GPU virtual address and -range
+ * alignment value that is valid for all regions.
+ */
#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
#define DRM_XE_QUERY_CONFIG_VA_BITS 3
#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
@@ -615,9 +625,8 @@ struct drm_xe_gem_create {
__u64 extensions;
/**
- * @size: Requested size for the object
- *
- * The (page-aligned) allocated size for the object will be returned.
+ * @size: Size of the object to be created, must match region
+ * (system or vram) minimum alignment (&min_page_size).
*/
__u64 size;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 25/50] fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (23 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 24/50] xe/xe_bo: Reject bo creation of unaligned size Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 26/50] drm/xe/uapi: Fix indentation issues that sometimes causes build warning Francois Dugast
` (31 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
Fix these doc build issues:
./include/uapi/drm/xe_drm.h:179: warning: Function parameter or member \
'instance' not described in 'drm_xe_query_engine_info'
./include/uapi/drm/xe_drm.h:179: warning: Function parameter or member \
'rsvd' not described in 'drm_xe_query_engine_info'
Also s/rsvd/reserved to fully align with other entries.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 +-
include/uapi/drm/xe_drm.h | 15 +++++++++++----
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index ec00e6f4f1ca..ad587bc0a0d4 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -217,7 +217,7 @@ static int query_engines(struct xe_device *xe,
hwe->logical_instance;
hw_engine_info[i].instance.gt_id = gt->info.id;
hw_engine_info[i].instance.pad = 0;
- memset(hw_engine_info->rsvd, 0, sizeof(hw_engine_info->rsvd));
+ memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
i++;
}
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 47fe9d1ccdce..2541f0b6ddf6 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -127,6 +127,10 @@ struct xe_user_extension {
/**
* struct drm_xe_engine_class_instance - instance of an engine class
*
+ * It is returned as part of the @drm_xe_query_engine_info, but it also is
+ * used as the input of engine selection for both @drm_xe_exec_queue_create
+ * and @drm_xe_query_engine_cycles
+ *
* The @engine_class can be:
* - %DRM_XE_ENGINE_CLASS_RENDER
* - %DRM_XE_ENGINE_CLASS_COPY
@@ -164,13 +168,16 @@ struct drm_xe_engine_class_instance {
/**
* struct drm_xe_query_engine_info - describe hardware engine
*
- * If a query is made with a struct drm_xe_device_query where .query
- * is equal to DRM_XE_DEVICE_QUERY_ENGINES, then the reply uses an array of
- * struct drm_xe_query_engine_info in .data.
+ * If a query is made with a struct @drm_xe_device_query where .query
+ * is equal to %DRM_XE_DEVICE_QUERY_ENGINES, then the reply uses an array of
+ * struct @drm_xe_query_engine_info in .data.
*/
struct drm_xe_query_engine_info {
+ /** @instance: The @drm_xe_engine_class_instance */
struct drm_xe_engine_class_instance instance;
- __u64 rsvd[3];
+
+ /** @reserved: Reserved */
+ __u64 reserved[3];
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 26/50] drm/xe/uapi: Fix indentation issues that sometimes causes build warning
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (24 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 25/50] fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 27/50] drm/xe/uapi: Order sections Francois Dugast
` (30 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
These issues were not seeing every time, but once another error was hit
these were printed out:
./include/uapi/drm/xe_drm.h:493: WARNING: Definition list ends without \
a blank line; unexpected unindent.
./include/uapi/drm/xe_drm.h:500: ERROR: Unexpected indentation.
./include/uapi/drm/xe_drm.h:501: WARNING: Block quote ends without a \
blank line; unexpected unindent.
This patch fixes the build issues, but also the presentation of the
uc_type list in the build html doc.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
include/uapi/drm/xe_drm.h | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 2541f0b6ddf6..07472a64ff88 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -490,15 +490,16 @@ struct drm_xe_query_topology_mask {
*
* The @uc_type can be:
* - %DRM_XE_QUERY_UC_TYPE_GUC_SUBMISSION - This is the GuC Submission Version,
- * a.k.a 'VF version'. It is not the actual GuC blob version. A running GuC can
- * support multiple VF APIs with different Submission Versions. This version is
- * negotiated by the VF KMD with GuC during VF initialization. In most of the
- * current available GuC blobs, this is a 1-1 relationship where the Submission
- * version could be inferred from the running version and vice-versa. However,
- * the submission version is the most useful information for the user space
- * perspective and needs.
+ * a.k.a 'VF version'. It is not the actual GuC blob version. A running GuC can
+ * support multiple VF APIs with different Submission Versions. This version is
+ * negotiated by the VF KMD with GuC during VF initialization. In most of the
+ * current available GuC blobs, this is a 1-1 relationship where the Submission
+ * version could be inferred from the running version and vice-versa. However,
+ * the submission version is the most useful information for the user space
+ * perspective and needs.
* - %DRM_XE_QUERY_TYPE_HUC - The actual HuC blob that is currently running
- * in the platform. It returns 0 when HuC is not currently loaded.
+ * in the platform. It returns 0 when HuC is not currently loaded.
+ *
*/
struct drm_xe_query_uc_fw_version {
/** @uc_type: The micro-controller type to query firmware version */
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 27/50] drm/xe/uapi: Order sections
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (25 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 26/50] drm/xe/uapi: Fix indentation issues that sometimes causes build warning Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 28/50] drm/xe/uapi: More uAPI documentation additions and cosmetic updates Francois Dugast
` (29 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
This patch doesn't modify any text or uapi entries themselves.
It only move things up and down aiming a better organization of the uAPI.
While fixing the documentation I noticed that query_engine_cs_cycles
was in the middle of the memory_region info. Then I noticed more
mismatches on the order when compared to the order of the IOCTL
and QUERY entries declaration. So this patch aims to bring some
order to the uAPI so it gets easier to read and the documentation
generated in the end is able to tell a consistent story.
Overall order:
1. IOCTL definition
2. Extension definition and helper structs
3. IOCTL's Query structs in the order of the Query's entries.
4. The rest of IOCTL structs in the order of IOCTL declaration.
5. uEvents
6. PMU
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 398 +++++++++++++++++++-------------------
1 file changed, 204 insertions(+), 194 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 07472a64ff88..8a384916a82e 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -12,19 +12,53 @@
extern "C" {
#endif
-/* Please note that modifications to all structs defined here are
+/*
+ * Please note that modifications to all structs defined here are
* subject to backwards-compatibility constraints.
+ *
+ * Sections in this file are organized as follows:
+ * 1. IOCTL definition
+ * 2. Extension definition and helper structs
+ * 3. IOCTL's Query structs in the order of the Query's entries.
+ * 4. The rest of IOCTL structs in the order of IOCTL declaration.
+ * 5. uEvents
+ * 6. PMU
+ *
*/
-/**
- * DOC: uevent generated by xe on it's pci node.
+/*
+ * xe specific ioctls.
*
- * DRM_XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
- * fails. The value supplied with the event is always "NEEDS_RESET".
- * Additional information supplied is tile id and gt id of the gt unit for
- * which reset has failed.
+ * The device specific ioctl range is [DRM_COMMAND_BASE, DRM_COMMAND_END) ie
+ * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset
+ * against DRM_COMMAND_BASE and should be between [0x0, 0x60).
*/
-#define DRM_XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
+#define DRM_XE_DEVICE_QUERY 0x00
+#define DRM_XE_GEM_CREATE 0x01
+#define DRM_XE_GEM_MMAP_OFFSET 0x02
+#define DRM_XE_VM_CREATE 0x03
+#define DRM_XE_VM_DESTROY 0x04
+#define DRM_XE_VM_BIND 0x05
+#define DRM_XE_EXEC 0x06
+#define DRM_XE_EXEC_QUEUE_CREATE 0x07
+#define DRM_XE_EXEC_QUEUE_DESTROY 0x08
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x09
+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0a
+#define DRM_XE_WAIT_USER_FENCE 0x0b
+/* Must be kept compact -- no holes */
+
+#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
+#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
+#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
+#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
+#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
+#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
+#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
+#define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
+#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
+#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
+#define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
+#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
/**
* struct xe_user_extension - Base class for defining a chain of extensions
@@ -90,39 +124,23 @@ struct xe_user_extension {
__u32 pad;
};
-/*
- * xe specific ioctls.
- *
- * The device specific ioctl range is [DRM_COMMAND_BASE, DRM_COMMAND_END) ie
- * [0x40, 0xa0) (a0 is excluded). The numbers below are defined as offset
- * against DRM_COMMAND_BASE and should be between [0x0, 0x60).
- */
-#define DRM_XE_DEVICE_QUERY 0x00
-#define DRM_XE_GEM_CREATE 0x01
-#define DRM_XE_GEM_MMAP_OFFSET 0x02
-#define DRM_XE_VM_CREATE 0x03
-#define DRM_XE_VM_DESTROY 0x04
-#define DRM_XE_VM_BIND 0x05
-#define DRM_XE_EXEC 0x06
-#define DRM_XE_EXEC_QUEUE_CREATE 0x07
-#define DRM_XE_EXEC_QUEUE_DESTROY 0x08
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x09
-#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0a
-#define DRM_XE_WAIT_USER_FENCE 0x0b
-/* Must be kept compact -- no holes */
+/** struct drm_xe_ext_set_property - XE set property extension */
+struct drm_xe_ext_set_property {
+ /** @base: base user extension */
+ struct xe_user_extension base;
-#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
-#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
-#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
-#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
-#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
-#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
-#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
-#define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
-#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
-#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
-#define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
-#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
+ /** @property: property to set */
+ __u32 property;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ /** @value: property value */
+ __u64 value;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
/**
* struct drm_xe_engine_class_instance - instance of an engine class
@@ -273,60 +291,6 @@ struct drm_xe_query_mem_region {
__u64 reserved[6];
};
-/**
- * struct drm_xe_query_engine_cycles - correlate CPU and GPU timestamps
- *
- * If a query is made with a struct drm_xe_device_query where .query is equal to
- * DRM_XE_DEVICE_QUERY_ENGINE_CYCLES, then the reply uses struct drm_xe_query_engine_cycles
- * in .data. struct drm_xe_query_engine_cycles is allocated by the user and
- * .data points to this allocated structure.
- *
- * The query returns the engine cycles and the frequency that can
- * be used to calculate the engine timestamp. In addition the
- * query returns a set of cpu timestamps that indicate when the command
- * streamer cycle count was captured.
- */
-struct drm_xe_query_engine_cycles {
- /**
- * @eci: This is input by the user and is the engine for which command
- * streamer cycles is queried.
- */
- struct drm_xe_engine_class_instance eci;
-
- /**
- * @clockid: This is input by the user and is the reference clock id for
- * CPU timestamp. For definition, see clock_gettime(2) and
- * perf_event_open(2). Supported clock ids are CLOCK_MONOTONIC,
- * CLOCK_MONOTONIC_RAW, CLOCK_REALTIME, CLOCK_BOOTTIME, CLOCK_TAI.
- */
- __s32 clockid;
-
- /** @width: Width of the engine cycle counter in bits. */
- __u32 width;
-
- /**
- * @engine_cycles: Engine cycles as read from its register
- * at 0x358 offset.
- */
- __u64 engine_cycles;
-
- /** @engine_frequency: Frequency of the engine cycles in Hz. */
- __u64 engine_frequency;
-
- /**
- * @cpu_timestamp: CPU timestamp in ns. The timestamp is captured before
- * reading the engine_cycles register using the reference clockid set by the
- * user.
- */
- __u64 cpu_timestamp;
-
- /**
- * @cpu_delta: Time delta in ns captured around reading the lower dword
- * of the engine_cycles register.
- */
- __u64 cpu_delta;
-};
-
/**
* struct drm_xe_query_mem_regions - describe memory regions
*
@@ -482,6 +446,60 @@ struct drm_xe_query_topology_mask {
__u8 mask[];
};
+/**
+ * struct drm_xe_query_engine_cycles - correlate CPU and GPU timestamps
+ *
+ * If a query is made with a struct drm_xe_device_query where .query is equal to
+ * DRM_XE_DEVICE_QUERY_ENGINE_CYCLES, then the reply uses struct drm_xe_query_engine_cycles
+ * in .data. struct drm_xe_query_engine_cycles is allocated by the user and
+ * .data points to this allocated structure.
+ *
+ * The query returns the engine cycles and the frequency that can
+ * be used to calculate the engine timestamp. In addition the
+ * query returns a set of cpu timestamps that indicate when the command
+ * streamer cycle count was captured.
+ */
+struct drm_xe_query_engine_cycles {
+ /**
+ * @eci: This is input by the user and is the engine for which command
+ * streamer cycles is queried.
+ */
+ struct drm_xe_engine_class_instance eci;
+
+ /**
+ * @clockid: This is input by the user and is the reference clock id for
+ * CPU timestamp. For definition, see clock_gettime(2) and
+ * perf_event_open(2). Supported clock ids are CLOCK_MONOTONIC,
+ * CLOCK_MONOTONIC_RAW, CLOCK_REALTIME, CLOCK_BOOTTIME, CLOCK_TAI.
+ */
+ __s32 clockid;
+
+ /** @width: Width of the engine cycle counter in bits. */
+ __u32 width;
+
+ /**
+ * @engine_cycles: Engine cycles as read from its register
+ * at 0x358 offset.
+ */
+ __u64 engine_cycles;
+
+ /** @engine_frequency: Frequency of the engine cycles in Hz. */
+ __u64 engine_frequency;
+
+ /**
+ * @cpu_timestamp: CPU timestamp in ns. The timestamp is captured before
+ * reading the engine_cycles register using the reference clockid set by the
+ * user.
+ */
+ __u64 cpu_timestamp;
+
+ /**
+ * @cpu_delta: Time delta in ns captured around reading the lower dword
+ * of the engine_cycles register.
+ */
+ __u64 cpu_delta;
+};
+
/**
* struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
*
@@ -688,24 +706,6 @@ struct drm_xe_gem_mmap_offset {
__u64 reserved[2];
};
-/** struct drm_xe_ext_set_property - XE set property extension */
-struct drm_xe_ext_set_property {
- /** @base: base user extension */
- struct xe_user_extension base;
-
- /** @property: property to set */
- __u32 property;
-
- /** @pad: MBZ */
- __u32 pad;
-
- /** @value: property value */
- __u64 value;
-
- /** @reserved: Reserved */
- __u64 reserved[2];
-};
-
struct drm_xe_vm_create {
#define DRM_XE_VM_EXTENSION_SET_PROPERTY 0
/** @extensions: Pointer to the first extension struct, if any */
@@ -877,31 +877,67 @@ struct drm_xe_vm_bind {
/* Monitor 64MB contiguous region with 2M sub-granularity */
#define XE_ACC_GRANULARITY_64M 3
-/**
- * struct drm_xe_exec_queue_set_property - exec queue set property
- *
- * Same namespace for extensions as drm_xe_exec_queue_create
- */
-struct drm_xe_exec_queue_set_property {
+struct drm_xe_sync {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
- /** @exec_queue_id: Exec queue ID */
+#define DRM_XE_SYNC_FLAG_SYNCOBJ 0x0
+#define DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ 0x1
+#define DRM_XE_SYNC_FLAG_DMA_BUF 0x2
+#define DRM_XE_SYNC_FLAG_USER_FENCE 0x3
+#define DRM_XE_SYNC_FLAG_SIGNAL 0x10
+ __u32 flags;
+
+ /** @pad: MBZ */
+ __u32 pad;
+
+ union {
+ __u32 handle;
+
+ /**
+ * @addr: Address of user fence. When sync passed in via exec
+ * IOCTL this a GPU address in the VM. When sync passed in via
+ * VM bind IOCTL this is a user pointer. In either case, it is
+ * the users responsibility that this address is present and
+ * mapped when the user fence is signalled. Must be qword
+ * aligned.
+ */
+ __u64 addr;
+ };
+
+ __u64 timeline_value;
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
+struct drm_xe_exec {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @exec_queue_id: Exec queue ID for the batch buffer */
__u32 exec_queue_id;
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
- /** @property: property to set */
- __u32 property;
+ /** @num_syncs: Amount of struct drm_xe_sync in array. */
+ __u32 num_syncs;
- /** @value: property value */
- __u64 value;
+ /** @syncs: Pointer to struct drm_xe_sync array. */
+ __u64 syncs;
+
+ /**
+ * @address: address of batch buffer if num_batch_buffer == 1 or an
+ * array of batch buffer addresses
+ */
+ __u64 address;
+
+ /**
+ * @num_batch_buffer: number of batch buffer in this exec, must match
+ * the width of the engine
+ */
+ __u16 num_batch_buffer;
+
+ /** @pad: MBZ */
+ __u16 pad[3];
/** @reserved: Reserved */
__u64 reserved[2];
@@ -940,24 +976,6 @@ struct drm_xe_exec_queue_create {
__u64 reserved[2];
};
-struct drm_xe_exec_queue_get_property {
- /** @extensions: Pointer to the first extension struct, if any */
- __u64 extensions;
-
- /** @exec_queue_id: Exec queue ID */
- __u32 exec_queue_id;
-
-#define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
- /** @property: property to get */
- __u32 property;
-
- /** @value: property value */
- __u64 value;
-
- /** @reserved: Reserved */
- __u64 reserved[2];
-};
-
struct drm_xe_exec_queue_destroy {
/** @exec_queue_id: Exec queue ID */
__u32 exec_queue_id;
@@ -969,67 +987,49 @@ struct drm_xe_exec_queue_destroy {
__u64 reserved[2];
};
-struct drm_xe_sync {
+/**
+ * struct drm_xe_exec_queue_set_property - exec queue set property
+ *
+ * Same namespace for extensions as drm_xe_exec_queue_create
+ */
+struct drm_xe_exec_queue_set_property {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_SYNC_FLAG_SYNCOBJ 0x0
-#define DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ 0x1
-#define DRM_XE_SYNC_FLAG_DMA_BUF 0x2
-#define DRM_XE_SYNC_FLAG_USER_FENCE 0x3
-#define DRM_XE_SYNC_FLAG_SIGNAL 0x10
- __u32 flags;
-
- /** @pad: MBZ */
- __u32 pad;
-
- union {
- __u32 handle;
+ /** @exec_queue_id: Exec queue ID */
+ __u32 exec_queue_id;
- /**
- * @addr: Address of user fence. When sync passed in via exec
- * IOCTL this a GPU address in the VM. When sync passed in via
- * VM bind IOCTL this is a user pointer. In either case, it is
- * the users responsibility that this address is present and
- * mapped when the user fence is signalled. Must be qword
- * aligned.
- */
- __u64 addr;
- };
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
+ /** @property: property to set */
+ __u32 property;
- __u64 timeline_value;
+ /** @value: property value */
+ __u64 value;
/** @reserved: Reserved */
__u64 reserved[2];
};
-struct drm_xe_exec {
+struct drm_xe_exec_queue_get_property {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
- /** @exec_queue_id: Exec queue ID for the batch buffer */
+ /** @exec_queue_id: Exec queue ID */
__u32 exec_queue_id;
- /** @num_syncs: Amount of struct drm_xe_sync in array. */
- __u32 num_syncs;
-
- /** @syncs: Pointer to struct drm_xe_sync array. */
- __u64 syncs;
-
- /**
- * @address: address of batch buffer if num_batch_buffer == 1 or an
- * array of batch buffer addresses
- */
- __u64 address;
-
- /**
- * @num_batch_buffer: number of batch buffer in this exec, must match
- * the width of the engine
- */
- __u16 num_batch_buffer;
+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
+ /** @property: property to get */
+ __u32 property;
- /** @pad: MBZ */
- __u16 pad[3];
+ /** @value: property value */
+ __u64 value;
/** @reserved: Reserved */
__u64 reserved[2];
@@ -1112,6 +1112,16 @@ struct drm_xe_wait_user_fence {
__u64 reserved[2];
};
+/**
+ * DOC: uevent generated by xe on it's pci node.
+ *
+ * DRM_XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
+ * fails. The value supplied with the event is always "NEEDS_RESET".
+ * Additional information supplied is tile id and gt id of the gt unit for
+ * which reset has failed.
+ */
+#define DRM_XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
+
/**
* DOC: XE PMU event config IDs
*
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 28/50] drm/xe/uapi: More uAPI documentation additions and cosmetic updates
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (26 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 27/50] drm/xe/uapi: Order sections Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 29/50] drm/xe/uapi: Split xe_sync types from flags Francois Dugast
` (28 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
No functional change in this patch.
Let's ensure all of our structs are documented and with a certain
standard. Also, let's have an overview and list of IOCTLs as the
very beginning of the generated HTML doc.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
include/uapi/drm/xe_drm.h | 134 ++++++++++++++++++++++++++++++++++----
1 file changed, 122 insertions(+), 12 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 8a384916a82e..061e698f65d2 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -26,6 +26,29 @@ extern "C" {
*
*/
+/**
+ * DOC: Xe uAPI Overview
+ *
+ * This section aims to describe the Xe's IOCTL entries, its structs, and other
+ * Xe related uAPI such as uevents and PMU (Platform Monitoring Unit) related
+ * entries and usage.
+ *
+ * List of supported IOCTLs:
+ * - &DRM_IOCTL_XE_DEVICE_QUERY
+ * - &DRM_IOCTL_XE_GEM_CREATE
+ * - &DRM_IOCTL_XE_GEM_MMAP_OFFSET
+ * - &DRM_IOCTL_XE_VM_CREATE
+ * - &DRM_IOCTL_XE_VM_DESTROY
+ * - &DRM_IOCTL_XE_VM_BIND
+ * - &DRM_IOCTL_XE_EXEC
+ * - &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
+ * - &DRM_IOCTL_XE_EXEC_QUEUE_DESTROY
+ * - &DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY
+ * - &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY
+ * - &DRM_IOCTL_XE_WAIT_USER_FENCE
+ *
+ */
+
/*
* xe specific ioctls.
*
@@ -61,7 +84,10 @@ extern "C" {
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
/**
- * struct xe_user_extension - Base class for defining a chain of extensions
+ * DOC: Xe IOCT Extensions
+ *
+ * Before detailing the IOCTLs and its structs, it is important to highlight
+ * that every IOCTL in Xe is extensible.
*
* Many interfaces need to grow over time. In most cases we can simply
* extend the struct and have userspace pass in more data. Another option,
@@ -95,7 +121,10 @@ extern "C" {
* Typically the struct xe_user_extension would be embedded in some uAPI
* struct, and in this case we would feed it the head of the chain(i.e ext1),
* which would then apply all of the above extensions.
- *
+*/
+
+/**
+ * struct xe_user_extension - Base class for defining a chain of extensions
*/
struct xe_user_extension {
/**
@@ -124,7 +153,12 @@ struct xe_user_extension {
__u32 pad;
};
-/** struct drm_xe_ext_set_property - XE set property extension */
+/**
+ * struct drm_xe_ext_set_property - Generic set property extension
+ *
+ * A generic struct that could allow any of the Xe's IOCLT to be extended
+ * with a set_property operation.
+ */
struct drm_xe_ext_set_property {
/** @base: base user extension */
struct xe_user_extension base;
@@ -287,7 +321,7 @@ struct drm_xe_query_mem_region {
* here will always be zero).
*/
__u64 cpu_visible_used;
- /** @reserved: MBZ */
+ /** @reserved: Reserved */
__u64 reserved[6];
};
@@ -357,7 +391,6 @@ struct drm_xe_query_config {
* existing GT individual descriptions.
* Graphics Technology (GT) is a subset of a GPU/tile that is responsible for
* implementing graphics and/or media operations.
- *
*/
struct drm_xe_query_gt {
#define DRM_XE_QUERY_GT_TYPE_MAIN 0
@@ -545,7 +578,8 @@ struct drm_xe_query_uc_fw_version {
};
/**
- * struct drm_xe_device_query - main structure to query device information
+ * struct drm_xe_device_query - Input of &DRM_IOCLT_XE_DEVICE_QUERY - The
+ * main structure to query device information
*
* The user selects the type of data to query among DRM_XE_DEVICE_QUERY_*
* and sets the value in the query member. This determines the type of
@@ -624,7 +658,8 @@ struct drm_xe_device_query {
};
/**
- * struct drm_xe_gem_create - structure for gem creation
+ * struct drm_xe_gem_create - Input of &DRM_IOCLT_XE_GEM_CREATE - A structure for
+ * gem creation
*
* The @flags can be:
* - %DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING
@@ -689,6 +724,9 @@ struct drm_xe_gem_create {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_gem_mmap_offset - Input of &DRM_IOCTL_XE_GEM_MMAP_OFFSET
+ */
struct drm_xe_gem_mmap_offset {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -706,6 +744,9 @@ struct drm_xe_gem_mmap_offset {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_vm_create - Input of &DRM_IOCTL_XE_VM_CREATE
+ */
struct drm_xe_vm_create {
#define DRM_XE_VM_EXTENSION_SET_PROPERTY 0
/** @extensions: Pointer to the first extension struct, if any */
@@ -725,6 +766,9 @@ struct drm_xe_vm_create {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_vm_destroy - Input of &DRM_IOCTL_XE_VM_DESTROY
+ */
struct drm_xe_vm_destroy {
/** @vm_id: VM ID */
__u32 vm_id;
@@ -819,6 +863,9 @@ struct drm_xe_vm_bind_op {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_vm_bind - Input of &DRM_IOCTL_XE_VM_BIND
+ */
struct drm_xe_vm_bind {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -877,6 +924,19 @@ struct drm_xe_vm_bind {
/* Monitor 64MB contiguous region with 2M sub-granularity */
#define XE_ACC_GRANULARITY_64M 3
+/**
+ * struct drm_xe_sync - Main structure for sync objects and user fences
+ *
+ * This can be used with both @drm_xe_exec or with @drm_xe_vm_bind
+ *
+ * The @flags can be:
+ * - %DRM_XE_SYNC_FLAG_SYNCOBJ
+ * - %DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ
+ * - %DRM_XE_SYNC_FLAG_DMA_BUF
+ * - %DRM_XE_SYNC_FLAG_USER_FENCE
+ * - %DRM_XE_SYNC_FLAG_SIGNAL
+ *
+ */
struct drm_xe_sync {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -886,17 +946,19 @@ struct drm_xe_sync {
#define DRM_XE_SYNC_FLAG_DMA_BUF 0x2
#define DRM_XE_SYNC_FLAG_USER_FENCE 0x3
#define DRM_XE_SYNC_FLAG_SIGNAL 0x10
+ /** @flags: Sync Flags */
__u32 flags;
/** @pad: MBZ */
__u32 pad;
union {
+ /** @handle: Handle to the sync object */
__u32 handle;
/**
- * @addr: Address of user fence. When sync passed in via exec
- * IOCTL this a GPU address in the VM. When sync passed in via
+ * @addr: Address of user fence. When sync is passed in via exec
+ * IOCTL this is a GPU address in the VM. When sync passed in via
* VM bind IOCTL this is a user pointer. In either case, it is
* the users responsibility that this address is present and
* mapped when the user fence is signalled. Must be qword
@@ -905,12 +967,19 @@ struct drm_xe_sync {
__u64 addr;
};
+ /**
+ * @timeline_value: Input for the timeline sync object. Needs to be
+ * different than 0 when used with %DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ.
+ */
__u64 timeline_value;
/** @reserved: Reserved */
__u64 reserved[2];
};
+/**
+ * struct drm_xe_exec - Input of &DRM_IOCTL_XE_EXEC
+ */
struct drm_xe_exec {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -943,6 +1012,9 @@ struct drm_xe_exec {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
+ */
struct drm_xe_exec_queue_create {
#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
/** @extensions: Pointer to the first extension struct, if any */
@@ -976,6 +1048,9 @@ struct drm_xe_exec_queue_create {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_exec_queue_destroy - Input of &DRM_IOCTL_XE_EXEC_QUEUE_DESTROY
+ */
struct drm_xe_exec_queue_destroy {
/** @exec_queue_id: Exec queue ID */
__u32 exec_queue_id;
@@ -988,9 +1063,18 @@ struct drm_xe_exec_queue_destroy {
};
/**
- * struct drm_xe_exec_queue_set_property - exec queue set property
+ * struct drm_xe_exec_queue_set_property - Input of &DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY
+ *
+ * The @property can be:
+ * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY
+ * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE
+ * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT
+ * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE
+ * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT
+ * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER
+ * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY
+ * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY
*
- * Same namespace for extensions as drm_xe_exec_queue_create
*/
struct drm_xe_exec_queue_set_property {
/** @extensions: Pointer to the first extension struct, if any */
@@ -1017,6 +1101,13 @@ struct drm_xe_exec_queue_set_property {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_exec_queue_get_property - Input of &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY
+ *
+ * The @property can be:
+ * - %DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN
+ *
+ */
struct drm_xe_exec_queue_get_property {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -1036,7 +1127,7 @@ struct drm_xe_exec_queue_get_property {
};
/**
- * struct drm_xe_wait_user_fence - wait user fence
+ * struct drm_xe_wait_user_fence - Input of &DRM_IOCTL_XE_WAIT_USER_FENCE
*
* Wait on user fence, XE will wake-up on every HW engine interrupt in the
* instances list and check if user fence is complete::
@@ -1044,6 +1135,25 @@ struct drm_xe_exec_queue_get_property {
* (*addr & MASK) OP (VALUE & MASK)
*
* Returns to user on user fence completion or timeout.
+ *
+ * The wait @op can be:
+ * - %DRM_XE_UFENCE_WAIT_EQ
+ * - %DRM_XE_UFENCE_WAIT_NEQ
+ * - %DRM_XE_UFENCE_WAIT_GT
+ * - %DRM_XE_UFENCE_WAIT_GTE
+ * - %DRM_XE_UFENCE_WAIT_LT
+ * - %DRM_XE_UFENCE_WAIT_LTE
+ *
+ * The wait @flags can be:
+ * - %DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP
+ * - %DRM_XE_UFENCE_WAIT_FLAG_ABSTIME
+ *
+ * The wait @mask can be:
+ * - %DRM_XE_UFENCE_WAIT_U8
+ * - %DRM_XE_UFENCE_WAIT_U16
+ * - %DRM_XE_UFENCE_WAIT_U32
+ * - %DRM_XE_UFENCE_WAIT_U64
+ *
*/
struct drm_xe_wait_user_fence {
/** @extensions: Pointer to the first extension struct, if any */
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 29/50] drm/xe/uapi: Split xe_sync types from flags
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (27 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 28/50] drm/xe/uapi: More uAPI documentation additions and cosmetic updates Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 30/50] drm/xe/uapi: Standardize the FLAG naming and assignment Francois Dugast
` (27 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Let's continue on the uapi clean-up with more splits
with stuff into their own exclusive fields instead of
reusing stuff.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_sync.c | 23 +++++++----------------
drivers/gpu/drm/xe/xe_sync_types.h | 1 +
include/uapi/drm/xe_drm.h | 24 ++++++++++++------------
3 files changed, 20 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
index eafe53c2f55d..883987b27c4e 100644
--- a/drivers/gpu/drm/xe/xe_sync.c
+++ b/drivers/gpu/drm/xe/xe_sync.c
@@ -17,8 +17,6 @@
#include "xe_macros.h"
#include "xe_sched_job_types.h"
-#define SYNC_FLAGS_TYPE_MASK 0x3
-
struct user_fence {
struct xe_device *xe;
struct kref refcount;
@@ -109,15 +107,13 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
if (copy_from_user(&sync_in, sync_user, sizeof(*sync_user)))
return -EFAULT;
- if (XE_IOCTL_DBG(xe, sync_in.flags &
- ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_FLAG_SIGNAL)) ||
- XE_IOCTL_DBG(xe, sync_in.pad) ||
+ if (XE_IOCTL_DBG(xe, sync_in.flags & ~DRM_XE_SYNC_FLAG_SIGNAL) ||
XE_IOCTL_DBG(xe, sync_in.reserved[0] || sync_in.reserved[1]))
return -EINVAL;
signal = sync_in.flags & DRM_XE_SYNC_FLAG_SIGNAL;
- switch (sync_in.flags & SYNC_FLAGS_TYPE_MASK) {
- case DRM_XE_SYNC_FLAG_SYNCOBJ:
+ switch (sync_in.type) {
+ case DRM_XE_SYNC_TYPE_SYNCOBJ:
if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
return -EOPNOTSUPP;
@@ -135,7 +131,7 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
}
break;
- case DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ:
+ case DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ:
if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
return -EOPNOTSUPP;
@@ -165,12 +161,7 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
}
break;
- case DRM_XE_SYNC_FLAG_DMA_BUF:
- if (XE_IOCTL_DBG(xe, "TODO"))
- return -EINVAL;
- break;
-
- case DRM_XE_SYNC_FLAG_USER_FENCE:
+ case DRM_XE_SYNC_TYPE_USER_FENCE:
if (XE_IOCTL_DBG(xe, !signal))
return -EOPNOTSUPP;
@@ -192,6 +183,7 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
return -EINVAL;
}
+ sync->type = sync_in.type;
sync->flags = sync_in.flags;
sync->timeline_value = sync_in.timeline_value;
@@ -252,8 +244,7 @@ void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
user_fence_put(sync->ufence);
dma_fence_put(fence);
}
- } else if ((sync->flags & SYNC_FLAGS_TYPE_MASK) ==
- DRM_XE_SYNC_FLAG_USER_FENCE) {
+ } else if (sync->type == DRM_XE_SYNC_TYPE_USER_FENCE) {
job->user_fence.used = true;
job->user_fence.addr = sync->addr;
job->user_fence.value = sync->timeline_value;
diff --git a/drivers/gpu/drm/xe/xe_sync_types.h b/drivers/gpu/drm/xe/xe_sync_types.h
index 24fccc26cb53..852db5e7884f 100644
--- a/drivers/gpu/drm/xe/xe_sync_types.h
+++ b/drivers/gpu/drm/xe/xe_sync_types.h
@@ -21,6 +21,7 @@ struct xe_sync_entry {
struct user_fence *ufence;
u64 addr;
u64 timeline_value;
+ u32 type;
u32 flags;
};
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 061e698f65d2..4c7ee3828428 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -929,11 +929,12 @@ struct drm_xe_vm_bind {
*
* This can be used with both @drm_xe_exec or with @drm_xe_vm_bind
*
+ * The @type can be:
+ * - %DRM_XE_SYNC_TYPE_SYNCOBJ - A simple drm sync object
+ * - %DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ - A timelined sync object
+ * - %DRM_XE_SYNC_TYPE_USER_FENCE - An user fence
+ *
* The @flags can be:
- * - %DRM_XE_SYNC_FLAG_SYNCOBJ
- * - %DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ
- * - %DRM_XE_SYNC_FLAG_DMA_BUF
- * - %DRM_XE_SYNC_FLAG_USER_FENCE
* - %DRM_XE_SYNC_FLAG_SIGNAL
*
*/
@@ -941,17 +942,16 @@ struct drm_xe_sync {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_SYNC_FLAG_SYNCOBJ 0x0
-#define DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ 0x1
-#define DRM_XE_SYNC_FLAG_DMA_BUF 0x2
-#define DRM_XE_SYNC_FLAG_USER_FENCE 0x3
-#define DRM_XE_SYNC_FLAG_SIGNAL 0x10
+#define DRM_XE_SYNC_TYPE_SYNCOBJ 0x0
+#define DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ 0x1
+#define DRM_XE_SYNC_TYPE_USER_FENCE 0x2
+ /** @type: Type of the this sync object */
+ __u32 type;
+
+#define DRM_XE_SYNC_FLAG_SIGNAL (1 << 0)
/** @flags: Sync Flags */
__u32 flags;
- /** @pad: MBZ */
- __u32 pad;
-
union {
/** @handle: Handle to the sync object */
__u32 handle;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 30/50] drm/xe/uapi: Standardize the FLAG naming and assignment
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (28 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 29/50] drm/xe/uapi: Split xe_sync types from flags Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-09 14:56 ` Matthew Brost
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 31/50] drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK Francois Dugast
` (26 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Only cosmetic things. No functional change on this patch.
Define every flag with (1 << n) and use singular FLAG name.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 +-
include/uapi/drm/xe_drm.h | 20 ++++++++++----------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index ad587bc0a0d4..aa5743e2e4d0 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -332,7 +332,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
xe->info.devid | (xe->info.revid << 16);
if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
- DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
+ DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 4c7ee3828428..7d854c368336 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -354,7 +354,7 @@ struct drm_xe_query_mem_regions {
* - %DRM_XE_QUERY_CONFIG_FLAGS - Flags describing the device
* configuration, see list below
*
- * - %DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM - Flag is set if the device
+ * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM - Flag is set if the device
* has usable VRAM
* - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
* required by this device, typically SZ_4K or SZ_64K
@@ -368,7 +368,7 @@ struct drm_xe_query_config {
#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
#define DRM_XE_QUERY_CONFIG_FLAGS 1
- #define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
+ #define DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM (1 << 0)
/*
* DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - This returns the
* maximum value of the &min_page_size across all memory regions
@@ -752,10 +752,10 @@ struct drm_xe_vm_create {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (0x1 << 0)
-#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (0x1 << 1)
-#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (0x1 << 2)
-#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (0x1 << 3)
+#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (1 << 0)
+#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (1 << 1)
+#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (1 << 2)
+#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (1 << 3)
/** @flags: Flags */
__u32 flags;
@@ -849,10 +849,10 @@ struct drm_xe_vm_bind_op {
/** @op: Bind operation to perform */
__u32 op;
-#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
-#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
-#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
-#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
+#define DRM_XE_VM_BIND_FLAG_READONLY (1 << 0)
+#define DRM_XE_VM_BIND_FLAG_ASYNC (1 << 1)
+#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (1 << 2)
+#define DRM_XE_VM_BIND_FLAG_NULL (1 << 3)
/** @flags: Bind flags */
__u32 flags;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 30/50] drm/xe/uapi: Standardize the FLAG naming and assignment
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 30/50] drm/xe/uapi: Standardize the FLAG naming and assignment Francois Dugast
@ 2023-11-09 14:56 ` Matthew Brost
0 siblings, 0 replies; 81+ messages in thread
From: Matthew Brost @ 2023-11-09 14:56 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe, Rodrigo Vivi
On Fri, Nov 03, 2023 at 02:34:36PM +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Only cosmetic things. No functional change on this patch.
> Define every flag with (1 << n) and use singular FLAG name.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 2 +-
> include/uapi/drm/xe_drm.h | 20 ++++++++++----------
> 2 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index ad587bc0a0d4..aa5743e2e4d0 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -332,7 +332,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> xe->info.devid | (xe->info.revid << 16);
> if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
> config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
> - DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
> + DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
> config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
> xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
> config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 4c7ee3828428..7d854c368336 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -354,7 +354,7 @@ struct drm_xe_query_mem_regions {
> * - %DRM_XE_QUERY_CONFIG_FLAGS - Flags describing the device
> * configuration, see list below
> *
> - * - %DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM - Flag is set if the device
> + * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM - Flag is set if the device
> * has usable VRAM
> * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
> * required by this device, typically SZ_4K or SZ_64K
> @@ -368,7 +368,7 @@ struct drm_xe_query_config {
>
> #define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
> #define DRM_XE_QUERY_CONFIG_FLAGS 1
> - #define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
> + #define DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM (1 << 0)
> /*
> * DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - This returns the
> * maximum value of the &min_page_size across all memory regions
> @@ -752,10 +752,10 @@ struct drm_xe_vm_create {
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> -#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (0x1 << 0)
> -#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (0x1 << 1)
> -#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (0x1 << 2)
> -#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (0x1 << 3)
> +#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (1 << 0)
> +#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (1 << 1)
> +#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (1 << 2)
> +#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (1 << 3)
> /** @flags: Flags */
> __u32 flags;
>
> @@ -849,10 +849,10 @@ struct drm_xe_vm_bind_op {
> /** @op: Bind operation to perform */
> __u32 op;
>
> -#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
> -#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
> -#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
> -#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
> +#define DRM_XE_VM_BIND_FLAG_READONLY (1 << 0)
> +#define DRM_XE_VM_BIND_FLAG_ASYNC (1 << 1)
> +#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (1 << 2)
> +#define DRM_XE_VM_BIND_FLAG_NULL (1 << 3)
> /** @flags: Bind flags */
> __u32 flags;
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 31/50] drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (29 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 30/50] drm/xe/uapi: Standardize the FLAG naming and assignment Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 32/50] drm/xe/uapi: Move xe_exec after xe_exec_queue Francois Dugast
` (25 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
On one hand the WAIT_OP represents the operation use for waiting such
as ==, !=, > and so on. On the other hand, the mask is applied to the
value used for comparision. Split those two to bring clarity to the uapi.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_wait_user_fence.c | 14 ++++-----
include/uapi/drm/xe_drm.h | 41 +++++++++++++------------
2 files changed, 28 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
index 13562db6c07f..4d5c2555ce41 100644
--- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
+++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
@@ -25,22 +25,22 @@ static int do_compare(u64 addr, u64 value, u64 mask, u16 op)
return -EFAULT;
switch (op) {
- case DRM_XE_UFENCE_WAIT_EQ:
+ case DRM_XE_UFENCE_WAIT_OP_EQ:
passed = (rvalue & mask) == (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_NEQ:
+ case DRM_XE_UFENCE_WAIT_OP_NEQ:
passed = (rvalue & mask) != (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_GT:
+ case DRM_XE_UFENCE_WAIT_OP_GT:
passed = (rvalue & mask) > (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_GTE:
+ case DRM_XE_UFENCE_WAIT_OP_GTE:
passed = (rvalue & mask) >= (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_LT:
+ case DRM_XE_UFENCE_WAIT_OP_LT:
passed = (rvalue & mask) < (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_LTE:
+ case DRM_XE_UFENCE_WAIT_OP_LTE:
passed = (rvalue & mask) <= (value & mask);
break;
default:
@@ -81,7 +81,7 @@ static int check_hw_engines(struct xe_device *xe,
#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
-#define MAX_OP DRM_XE_UFENCE_WAIT_LTE
+#define MAX_OP DRM_XE_UFENCE_WAIT_OP_LTE
static long to_jiffies_timeout(struct xe_device *xe,
struct drm_xe_wait_user_fence *args)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 7d854c368336..659cc0a71f8c 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1137,22 +1137,22 @@ struct drm_xe_exec_queue_get_property {
* Returns to user on user fence completion or timeout.
*
* The wait @op can be:
- * - %DRM_XE_UFENCE_WAIT_EQ
- * - %DRM_XE_UFENCE_WAIT_NEQ
- * - %DRM_XE_UFENCE_WAIT_GT
- * - %DRM_XE_UFENCE_WAIT_GTE
- * - %DRM_XE_UFENCE_WAIT_LT
- * - %DRM_XE_UFENCE_WAIT_LTE
+ * - %DRM_XE_UFENCE_WAIT_OP_EQ
+ * - %DRM_XE_UFENCE_WAIT_OP_NEQ
+ * - %DRM_XE_UFENCE_WAIT_OP_GT
+ * - %DRM_XE_UFENCE_WAIT_OP_GTE
+ * - %DRM_XE_UFENCE_WAIT_OP_LT
+ * - %DRM_XE_UFENCE_WAIT_OP_LTE
*
* The wait @flags can be:
* - %DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP
* - %DRM_XE_UFENCE_WAIT_FLAG_ABSTIME
*
* The wait @mask can be:
- * - %DRM_XE_UFENCE_WAIT_U8
- * - %DRM_XE_UFENCE_WAIT_U16
- * - %DRM_XE_UFENCE_WAIT_U32
- * - %DRM_XE_UFENCE_WAIT_U64
+ * - %DRM_XE_UFENCE_WAIT_MASK_U8
+ * - %DRM_XE_UFENCE_WAIT_MASK_U16
+ * - %DRM_XE_UFENCE_WAIT_MASK_U32
+ * - %DRM_XE_UFENCE_WAIT_MASK_U64
*
*/
struct drm_xe_wait_user_fence {
@@ -1164,12 +1164,12 @@ struct drm_xe_wait_user_fence {
*/
__u64 addr;
-#define DRM_XE_UFENCE_WAIT_EQ 0
-#define DRM_XE_UFENCE_WAIT_NEQ 1
-#define DRM_XE_UFENCE_WAIT_GT 2
-#define DRM_XE_UFENCE_WAIT_GTE 3
-#define DRM_XE_UFENCE_WAIT_LT 4
-#define DRM_XE_UFENCE_WAIT_LTE 5
+#define DRM_XE_UFENCE_WAIT_OP_EQ 0x0
+#define DRM_XE_UFENCE_WAIT_OP_NEQ 0x1
+#define DRM_XE_UFENCE_WAIT_OP_GT 0x2
+#define DRM_XE_UFENCE_WAIT_OP_GTE 0x3
+#define DRM_XE_UFENCE_WAIT_OP_LT 0x4
+#define DRM_XE_UFENCE_WAIT_OP_LTE 0x5
/** @op: wait operation (type of comparison) */
__u16 op;
@@ -1184,12 +1184,13 @@ struct drm_xe_wait_user_fence {
/** @value: compare value */
__u64 value;
-#define DRM_XE_UFENCE_WAIT_U8 0xffu
-#define DRM_XE_UFENCE_WAIT_U16 0xffffu
-#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
-#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
+#define DRM_XE_UFENCE_WAIT_MASK_U8 0xffu
+#define DRM_XE_UFENCE_WAIT_MASK_U16 0xffffu
+#define DRM_XE_UFENCE_WAIT_MASK_U32 0xffffffffu
+#define DRM_XE_UFENCE_WAIT_MASK_U64 0xffffffffffffffffu
/** @mask: comparison mask */
__u64 mask;
+
/**
* @timeout: how long to wait before bailing, value in nanoseconds.
* Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 32/50] drm/xe/uapi: Move xe_exec after xe_exec_queue
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (30 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 31/50] drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 33/50] fixup! drm/xe/uapi: Split xe_sync types from flags Francois Dugast
` (24 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Although the exec ioctl is a very important one, it makes no sense
to explain xe_exec before explaining the exec_queue. So, let's
move this down to help bring a better flow on the documentation
and code readability.
It is important to highlight that this patch is changing all
the ioctl numbers in a non-backward compatible way. However, we
are doing this final uapi clean-up before we submit our first
pull-request to be part of the upstream Kernel. Once we get
there, no other change like this will ever happen and all the
backward compatibility will be respected.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
include/uapi/drm/xe_drm.h | 82 +++++++++++++++++++--------------------
1 file changed, 41 insertions(+), 41 deletions(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 659cc0a71f8c..eab8c8e3b6a3 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -62,11 +62,11 @@ extern "C" {
#define DRM_XE_VM_CREATE 0x03
#define DRM_XE_VM_DESTROY 0x04
#define DRM_XE_VM_BIND 0x05
-#define DRM_XE_EXEC 0x06
-#define DRM_XE_EXEC_QUEUE_CREATE 0x07
-#define DRM_XE_EXEC_QUEUE_DESTROY 0x08
-#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x09
-#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0a
+#define DRM_XE_EXEC_QUEUE_CREATE 0x06
+#define DRM_XE_EXEC_QUEUE_DESTROY 0x07
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x08
+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x09
+#define DRM_XE_EXEC 0x0a
#define DRM_XE_WAIT_USER_FENCE 0x0b
/* Must be kept compact -- no holes */
@@ -76,11 +76,11 @@ extern "C" {
#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
-#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
#define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
#define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
+#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
/**
@@ -977,41 +977,6 @@ struct drm_xe_sync {
__u64 reserved[2];
};
-/**
- * struct drm_xe_exec - Input of &DRM_IOCTL_XE_EXEC
- */
-struct drm_xe_exec {
- /** @extensions: Pointer to the first extension struct, if any */
- __u64 extensions;
-
- /** @exec_queue_id: Exec queue ID for the batch buffer */
- __u32 exec_queue_id;
-
- /** @num_syncs: Amount of struct drm_xe_sync in array. */
- __u32 num_syncs;
-
- /** @syncs: Pointer to struct drm_xe_sync array. */
- __u64 syncs;
-
- /**
- * @address: address of batch buffer if num_batch_buffer == 1 or an
- * array of batch buffer addresses
- */
- __u64 address;
-
- /**
- * @num_batch_buffer: number of batch buffer in this exec, must match
- * the width of the engine
- */
- __u16 num_batch_buffer;
-
- /** @pad: MBZ */
- __u16 pad[3];
-
- /** @reserved: Reserved */
- __u64 reserved[2];
-};
-
/**
* struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
*/
@@ -1126,6 +1091,41 @@ struct drm_xe_exec_queue_get_property {
__u64 reserved[2];
};
+/**
+ * struct drm_xe_exec - Input of &DRM_IOCTL_XE_EXEC
+ */
+struct drm_xe_exec {
+ /** @extensions: Pointer to the first extension struct, if any */
+ __u64 extensions;
+
+ /** @exec_queue_id: Exec queue ID for the batch buffer */
+ __u32 exec_queue_id;
+
+ /** @num_syncs: Amount of struct drm_xe_sync in array. */
+ __u32 num_syncs;
+
+ /** @syncs: Pointer to struct drm_xe_sync array. */
+ __u64 syncs;
+
+ /**
+ * @address: address of batch buffer if num_batch_buffer == 1 or an
+ * array of batch buffer addresses
+ */
+ __u64 address;
+
+ /**
+ * @num_batch_buffer: number of batch buffer in this exec, must match
+ * the width of the engine
+ */
+ __u16 num_batch_buffer;
+
+ /** @pad: MBZ */
+ __u16 pad[3];
+
+ /** @reserved: Reserved */
+ __u64 reserved[2];
+};
+
/**
* struct drm_xe_wait_user_fence - Input of &DRM_IOCTL_XE_WAIT_USER_FENCE
*
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 33/50] fixup! drm/xe/uapi: Split xe_sync types from flags
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (31 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 32/50] drm/xe/uapi: Move xe_exec after xe_exec_queue Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine Francois Dugast
` (23 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
include/uapi/drm/xe_drm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index eab8c8e3b6a3..5164ed150a2e 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -969,7 +969,7 @@ struct drm_xe_sync {
/**
* @timeline_value: Input for the timeline sync object. Needs to be
- * different than 0 when used with %DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ.
+ * different than 0 when used with %DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ.
*/
__u64 timeline_value;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (32 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 33/50] fixup! drm/xe/uapi: Split xe_sync types from flags Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-09 16:29 ` Souza, Jose
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 35/50] drm/xe/uapi: Document the memory_region bitmask Francois Dugast
` (22 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
In the Tiled platforms, the memory is more tied to the Tile
than to the GT.
The distance (near vs far) makes more sense from the Engine
perspective than from the GT perspective.
So, let's move this out from the GT and into the engine info.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 14 +++++++-------
include/uapi/drm/xe_drm.h | 27 ++++++++++++++-------------
2 files changed, 21 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index aa5743e2e4d0..49a9b36f1193 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -217,6 +217,13 @@ static int query_engines(struct xe_device *xe,
hwe->logical_instance;
hw_engine_info[i].instance.gt_id = gt->info.id;
hw_engine_info[i].instance.pad = 0;
+ if (!IS_DGFX(xe))
+ hw_engine_info[i].near_mem_regions = 0x1;
+ else
+ hw_engine_info[i].near_mem_regions =
+ BIT(gt_to_tile(gt)->id) << 1;
+ hw_engine_info[i].far_mem_regions = xe->info.mem_region_mask ^
+ hw_engine_info[i].near_mem_regions;
memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
i++;
@@ -377,13 +384,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
gt_list->gt_list[id].gt_id = gt->info.id;
gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
- if (!IS_DGFX(xe))
- gt_list->gt_list[id].near_mem_regions = 0x1;
- else
- gt_list->gt_list[id].near_mem_regions =
- BIT(gt_to_tile(gt)->id) << 1;
- gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
- gt_list->gt_list[id].near_mem_regions;
}
if (copy_to_user(query_ptr, gt_list, size)) {
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 5164ed150a2e..8e84ef6fd46e 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -228,6 +228,20 @@ struct drm_xe_query_engine_info {
/** @instance: The @drm_xe_engine_class_instance */
struct drm_xe_engine_class_instance instance;
+ /**
+ * @near_mem_regions: Bit mask of instances from
+ * drm_xe_query_mem_regions that is near this engine.
+ */
+ __u64 near_mem_regions;
+ /**
+ * @far_mem_regions: Bit mask of instances from
+ * drm_xe_query_mem_regions that is far from this engine.
+ * In general, it has extra indirections when compared to the
+ * @near_mem_regions. For a discrete device this could mean system
+ * memory and memory living in a different Tile.
+ */
+ __u64 far_mem_regions;
+
/** @reserved: Reserved */
__u64 reserved[3];
};
@@ -401,19 +415,6 @@ struct drm_xe_query_gt {
__u16 gt_id;
/** @clock_freq: A clock frequency for timestamp */
__u32 clock_freq;
- /**
- * @near_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_regions that is near the current engines of this GT.
- */
- __u64 near_mem_regions;
- /**
- * @far_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_regions that is far from the engines of this GT.
- * In general, it has extra indirections when compared to the
- * @near_mem_regions. For a discrete device this could mean system
- * memory and memory living in a different Tile.
- */
- __u64 far_mem_regions;
/** @reserved: Reserved */
__u64 reserved[8];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine Francois Dugast
@ 2023-11-09 16:29 ` Souza, Jose
2023-11-09 16:35 ` Souza, Jose
0 siblings, 1 reply; 81+ messages in thread
From: Souza, Jose @ 2023-11-09 16:29 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Dugast, Francois; +Cc: Vivi, Rodrigo
On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> In the Tiled platforms, the memory is more tied to the Tile
> than to the GT.
> The distance (near vs far) makes more sense from the Engine
> perspective than from the GT perspective.
why not add a uAPI to query tile information?
this is duplicating a tile information onto every engine of that tile.
we could leave reserved fields in the tile uAPI to include additional information that might be relevant in future.
>
> So, let's move this out from the GT and into the engine info.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 14 +++++++-------
> include/uapi/drm/xe_drm.h | 27 ++++++++++++++-------------
> 2 files changed, 21 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index aa5743e2e4d0..49a9b36f1193 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -217,6 +217,13 @@ static int query_engines(struct xe_device *xe,
> hwe->logical_instance;
> hw_engine_info[i].instance.gt_id = gt->info.id;
> hw_engine_info[i].instance.pad = 0;
> + if (!IS_DGFX(xe))
> + hw_engine_info[i].near_mem_regions = 0x1;
> + else
> + hw_engine_info[i].near_mem_regions =
> + BIT(gt_to_tile(gt)->id) << 1;
> + hw_engine_info[i].far_mem_regions = xe->info.mem_region_mask ^
> + hw_engine_info[i].near_mem_regions;
> memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
>
> i++;
> @@ -377,13 +384,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> gt_list->gt_list[id].gt_id = gt->info.id;
> gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> - if (!IS_DGFX(xe))
> - gt_list->gt_list[id].near_mem_regions = 0x1;
> - else
> - gt_list->gt_list[id].near_mem_regions =
> - BIT(gt_to_tile(gt)->id) << 1;
> - gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
> - gt_list->gt_list[id].near_mem_regions;
> }
>
> if (copy_to_user(query_ptr, gt_list, size)) {
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 5164ed150a2e..8e84ef6fd46e 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -228,6 +228,20 @@ struct drm_xe_query_engine_info {
> /** @instance: The @drm_xe_engine_class_instance */
> struct drm_xe_engine_class_instance instance;
>
> + /**
> + * @near_mem_regions: Bit mask of instances from
> + * drm_xe_query_mem_regions that is near this engine.
> + */
> + __u64 near_mem_regions;
> + /**
> + * @far_mem_regions: Bit mask of instances from
> + * drm_xe_query_mem_regions that is far from this engine.
> + * In general, it has extra indirections when compared to the
> + * @near_mem_regions. For a discrete device this could mean system
> + * memory and memory living in a different Tile.
> + */
> + __u64 far_mem_regions;
> +
> /** @reserved: Reserved */
> __u64 reserved[3];
> };
> @@ -401,19 +415,6 @@ struct drm_xe_query_gt {
> __u16 gt_id;
> /** @clock_freq: A clock frequency for timestamp */
> __u32 clock_freq;
> - /**
> - * @near_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_regions that is near the current engines of this GT.
> - */
> - __u64 near_mem_regions;
> - /**
> - * @far_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_regions that is far from the engines of this GT.
> - * In general, it has extra indirections when compared to the
> - * @near_mem_regions. For a discrete device this could mean system
> - * memory and memory living in a different Tile.
> - */
> - __u64 far_mem_regions;
> /** @reserved: Reserved */
> __u64 reserved[8];
> };
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine
2023-11-09 16:29 ` Souza, Jose
@ 2023-11-09 16:35 ` Souza, Jose
2023-11-09 18:46 ` Rodrigo Vivi
0 siblings, 1 reply; 81+ messages in thread
From: Souza, Jose @ 2023-11-09 16:35 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Dugast, Francois; +Cc: Vivi, Rodrigo
On Thu, 2023-11-09 at 08:29 -0800, José Roberto de Souza wrote:
> On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> > In the Tiled platforms, the memory is more tied to the Tile
> > than to the GT.
> > The distance (near vs far) makes more sense from the Engine
> > perspective than from the GT perspective.
>
> why not add a uAPI to query tile information?
> this is duplicating a tile information onto every engine of that tile.
> we could leave reserved fields in the tile uAPI to include additional information that might be relevant in future.
other issue here and in other patches of this huge patch series.
a previous patch in this series renamed near_mem_regions, then this one moves it to other struct... please drop the first patch and rename and move it
into a single patch.
a series as big as this one will cause reviews in KMD and UMD to take a while...
>
> >
> > So, let's move this out from the GT and into the engine info.
> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_query.c | 14 +++++++-------
> > include/uapi/drm/xe_drm.h | 27 ++++++++++++++-------------
> > 2 files changed, 21 insertions(+), 20 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > index aa5743e2e4d0..49a9b36f1193 100644
> > --- a/drivers/gpu/drm/xe/xe_query.c
> > +++ b/drivers/gpu/drm/xe/xe_query.c
> > @@ -217,6 +217,13 @@ static int query_engines(struct xe_device *xe,
> > hwe->logical_instance;
> > hw_engine_info[i].instance.gt_id = gt->info.id;
> > hw_engine_info[i].instance.pad = 0;
> > + if (!IS_DGFX(xe))
> > + hw_engine_info[i].near_mem_regions = 0x1;
> > + else
> > + hw_engine_info[i].near_mem_regions =
> > + BIT(gt_to_tile(gt)->id) << 1;
> > + hw_engine_info[i].far_mem_regions = xe->info.mem_region_mask ^
> > + hw_engine_info[i].near_mem_regions;
> > memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
> >
> > i++;
> > @@ -377,13 +384,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> > gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> > gt_list->gt_list[id].gt_id = gt->info.id;
> > gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> > - if (!IS_DGFX(xe))
> > - gt_list->gt_list[id].near_mem_regions = 0x1;
> > - else
> > - gt_list->gt_list[id].near_mem_regions =
> > - BIT(gt_to_tile(gt)->id) << 1;
> > - gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
> > - gt_list->gt_list[id].near_mem_regions;
> > }
> >
> > if (copy_to_user(query_ptr, gt_list, size)) {
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index 5164ed150a2e..8e84ef6fd46e 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -228,6 +228,20 @@ struct drm_xe_query_engine_info {
> > /** @instance: The @drm_xe_engine_class_instance */
> > struct drm_xe_engine_class_instance instance;
> >
> > + /**
> > + * @near_mem_regions: Bit mask of instances from
> > + * drm_xe_query_mem_regions that is near this engine.
> > + */
> > + __u64 near_mem_regions;
> > + /**
> > + * @far_mem_regions: Bit mask of instances from
> > + * drm_xe_query_mem_regions that is far from this engine.
> > + * In general, it has extra indirections when compared to the
> > + * @near_mem_regions. For a discrete device this could mean system
> > + * memory and memory living in a different Tile.
> > + */
> > + __u64 far_mem_regions;
> > +
> > /** @reserved: Reserved */
> > __u64 reserved[3];
> > };
> > @@ -401,19 +415,6 @@ struct drm_xe_query_gt {
> > __u16 gt_id;
> > /** @clock_freq: A clock frequency for timestamp */
> > __u32 clock_freq;
> > - /**
> > - * @near_mem_regions: Bit mask of instances from
> > - * drm_xe_query_mem_regions that is near the current engines of this GT.
> > - */
> > - __u64 near_mem_regions;
> > - /**
> > - * @far_mem_regions: Bit mask of instances from
> > - * drm_xe_query_mem_regions that is far from the engines of this GT.
> > - * In general, it has extra indirections when compared to the
> > - * @near_mem_regions. For a discrete device this could mean system
> > - * memory and memory living in a different Tile.
> > - */
> > - __u64 far_mem_regions;
> > /** @reserved: Reserved */
> > __u64 reserved[8];
> > };
>
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine
2023-11-09 16:35 ` Souza, Jose
@ 2023-11-09 18:46 ` Rodrigo Vivi
2023-11-09 19:50 ` Souza, Jose
0 siblings, 1 reply; 81+ messages in thread
From: Rodrigo Vivi @ 2023-11-09 18:46 UTC (permalink / raw)
To: Souza, Jose; +Cc: Dugast, Francois, intel-xe@lists.freedesktop.org
On Thu, Nov 09, 2023 at 04:35:19PM +0000, Souza, Jose wrote:
> On Thu, 2023-11-09 at 08:29 -0800, José Roberto de Souza wrote:
> > On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> > > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > >
> > > In the Tiled platforms, the memory is more tied to the Tile
> > > than to the GT.
> > > The distance (near vs far) makes more sense from the Engine
> > > perspective than from the GT perspective.
> >
> > why not add a uAPI to query tile information?
> > this is duplicating a tile information onto every engine of that tile.
> > we could leave reserved fields in the tile uAPI to include additional information that might be relevant in future.
This is not necessarily a tile information. In PVC, truly the mem_region is tied to the tile,
but we don't want to fix the uapi in only one platform.
Like in the previous, the mem_region was per GT. who knows the future?!
But the engine needs the information on which mem_region could be better,
regardless of if it lives along the same gt, or the same tile, or outside.
So, near and far sounded the most generic and future proof way.
>
> other issue here and in other patches of this huge patch series.
>
> a previous patch in this series renamed near_mem_regions, then this one moves it to other struct... please drop the first patch and rename and move it
> into a single patch.
okay, rename and move in the same patch kind of makes sense. and patches
could be squashed together. But when doing the IGT on the side, I felt
that small changes were better, so renames goes with sed commands and
the patch was small and clear. But I don't mind if they get squashed in
the end.
>
> a series as big as this one will cause reviews in KMD and UMD to take a while...
that's unfortunate indeed. But big patches also don't help much to speed up reviews.
>
> >
> > >
> > > So, let's move this out from the GT and into the engine info.
> > >
> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_query.c | 14 +++++++-------
> > > include/uapi/drm/xe_drm.h | 27 ++++++++++++++-------------
> > > 2 files changed, 21 insertions(+), 20 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > > index aa5743e2e4d0..49a9b36f1193 100644
> > > --- a/drivers/gpu/drm/xe/xe_query.c
> > > +++ b/drivers/gpu/drm/xe/xe_query.c
> > > @@ -217,6 +217,13 @@ static int query_engines(struct xe_device *xe,
> > > hwe->logical_instance;
> > > hw_engine_info[i].instance.gt_id = gt->info.id;
> > > hw_engine_info[i].instance.pad = 0;
> > > + if (!IS_DGFX(xe))
> > > + hw_engine_info[i].near_mem_regions = 0x1;
> > > + else
> > > + hw_engine_info[i].near_mem_regions =
> > > + BIT(gt_to_tile(gt)->id) << 1;
> > > + hw_engine_info[i].far_mem_regions = xe->info.mem_region_mask ^
> > > + hw_engine_info[i].near_mem_regions;
> > > memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
> > >
> > > i++;
> > > @@ -377,13 +384,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> > > gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> > > gt_list->gt_list[id].gt_id = gt->info.id;
> > > gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> > > - if (!IS_DGFX(xe))
> > > - gt_list->gt_list[id].near_mem_regions = 0x1;
> > > - else
> > > - gt_list->gt_list[id].near_mem_regions =
> > > - BIT(gt_to_tile(gt)->id) << 1;
> > > - gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
> > > - gt_list->gt_list[id].near_mem_regions;
> > > }
> > >
> > > if (copy_to_user(query_ptr, gt_list, size)) {
> > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > > index 5164ed150a2e..8e84ef6fd46e 100644
> > > --- a/include/uapi/drm/xe_drm.h
> > > +++ b/include/uapi/drm/xe_drm.h
> > > @@ -228,6 +228,20 @@ struct drm_xe_query_engine_info {
> > > /** @instance: The @drm_xe_engine_class_instance */
> > > struct drm_xe_engine_class_instance instance;
> > >
> > > + /**
> > > + * @near_mem_regions: Bit mask of instances from
> > > + * drm_xe_query_mem_regions that is near this engine.
> > > + */
> > > + __u64 near_mem_regions;
> > > + /**
> > > + * @far_mem_regions: Bit mask of instances from
> > > + * drm_xe_query_mem_regions that is far from this engine.
> > > + * In general, it has extra indirections when compared to the
> > > + * @near_mem_regions. For a discrete device this could mean system
> > > + * memory and memory living in a different Tile.
> > > + */
> > > + __u64 far_mem_regions;
> > > +
> > > /** @reserved: Reserved */
> > > __u64 reserved[3];
> > > };
> > > @@ -401,19 +415,6 @@ struct drm_xe_query_gt {
> > > __u16 gt_id;
> > > /** @clock_freq: A clock frequency for timestamp */
> > > __u32 clock_freq;
> > > - /**
> > > - * @near_mem_regions: Bit mask of instances from
> > > - * drm_xe_query_mem_regions that is near the current engines of this GT.
> > > - */
> > > - __u64 near_mem_regions;
> > > - /**
> > > - * @far_mem_regions: Bit mask of instances from
> > > - * drm_xe_query_mem_regions that is far from the engines of this GT.
> > > - * In general, it has extra indirections when compared to the
> > > - * @near_mem_regions. For a discrete device this could mean system
> > > - * memory and memory living in a different Tile.
> > > - */
> > > - __u64 far_mem_regions;
> > > /** @reserved: Reserved */
> > > __u64 reserved[8];
> > > };
> >
>
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine
2023-11-09 18:46 ` Rodrigo Vivi
@ 2023-11-09 19:50 ` Souza, Jose
2023-11-09 21:04 ` Rodrigo Vivi
0 siblings, 1 reply; 81+ messages in thread
From: Souza, Jose @ 2023-11-09 19:50 UTC (permalink / raw)
To: Vivi, Rodrigo; +Cc: Dugast, Francois, intel-xe@lists.freedesktop.org
On Thu, 2023-11-09 at 13:46 -0500, Rodrigo Vivi wrote:
> On Thu, Nov 09, 2023 at 04:35:19PM +0000, Souza, Jose wrote:
> > On Thu, 2023-11-09 at 08:29 -0800, José Roberto de Souza wrote:
> > > On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> > > > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > >
> > > > In the Tiled platforms, the memory is more tied to the Tile
> > > > than to the GT.
> > > > The distance (near vs far) makes more sense from the Engine
> > > > perspective than from the GT perspective.
> > >
> > > why not add a uAPI to query tile information?
> > > this is duplicating a tile information onto every engine of that tile.
> > > we could leave reserved fields in the tile uAPI to include additional information that might be relevant in future.
>
> This is not necessarily a tile information. In PVC, truly the mem_region is tied to the tile,
> but we don't want to fix the uapi in only one platform.
> Like in the previous, the mem_region was per GT. who knows the future?!
Older platforms had one gt and one tile, MTL has 1 tile and 2 gts and in both cases it matches with having a tile query.
>
> But the engine needs the information on which mem_region could be better,
> regardless of if it lives along the same gt, or the same tile, or outside.
> So, near and far sounded the most generic and future proof way.
Memory regions are also used here in drm_xe_vm_bind_op.tile_mask/pt_placement_hint.
To me it looks odd that I need to go trough all engines to know what are available tiles.
Other way to make it future prof is keep this information in gt query, each engine will always belong to one GT and each GT will always belong to one
tile.
This way it do not matters if the memory_region is tile specific information or a GT specific information the uAPI will be consistent with less
duplication than putting it in hw engine.
>
> >
> > other issue here and in other patches of this huge patch series.
> >
> > a previous patch in this series renamed near_mem_regions, then this one moves it to other struct... please drop the first patch and rename and move it
> > into a single patch.
>
> okay, rename and move in the same patch kind of makes sense. and patches
> could be squashed together. But when doing the IGT on the side, I felt
> that small changes were better, so renames goes with sed commands and
> the patch was small and clear. But I don't mind if they get squashed in
> the end.
>
> >
> > a series as big as this one will cause reviews in KMD and UMD to take a while...
>
> that's unfortunate indeed. But big patches also don't help much to speed up reviews.
>
> >
> > >
> > > >
> > > > So, let's move this out from the GT and into the engine info.
> > > >
> > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > ---
> > > > drivers/gpu/drm/xe/xe_query.c | 14 +++++++-------
> > > > include/uapi/drm/xe_drm.h | 27 ++++++++++++++-------------
> > > > 2 files changed, 21 insertions(+), 20 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > > > index aa5743e2e4d0..49a9b36f1193 100644
> > > > --- a/drivers/gpu/drm/xe/xe_query.c
> > > > +++ b/drivers/gpu/drm/xe/xe_query.c
> > > > @@ -217,6 +217,13 @@ static int query_engines(struct xe_device *xe,
> > > > hwe->logical_instance;
> > > > hw_engine_info[i].instance.gt_id = gt->info.id;
> > > > hw_engine_info[i].instance.pad = 0;
> > > > + if (!IS_DGFX(xe))
> > > > + hw_engine_info[i].near_mem_regions = 0x1;
> > > > + else
> > > > + hw_engine_info[i].near_mem_regions =
> > > > + BIT(gt_to_tile(gt)->id) << 1;
> > > > + hw_engine_info[i].far_mem_regions = xe->info.mem_region_mask ^
> > > > + hw_engine_info[i].near_mem_regions;
> > > > memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
> > > >
> > > > i++;
> > > > @@ -377,13 +384,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> > > > gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> > > > gt_list->gt_list[id].gt_id = gt->info.id;
> > > > gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> > > > - if (!IS_DGFX(xe))
> > > > - gt_list->gt_list[id].near_mem_regions = 0x1;
> > > > - else
> > > > - gt_list->gt_list[id].near_mem_regions =
> > > > - BIT(gt_to_tile(gt)->id) << 1;
> > > > - gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
> > > > - gt_list->gt_list[id].near_mem_regions;
> > > > }
> > > >
> > > > if (copy_to_user(query_ptr, gt_list, size)) {
> > > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > > > index 5164ed150a2e..8e84ef6fd46e 100644
> > > > --- a/include/uapi/drm/xe_drm.h
> > > > +++ b/include/uapi/drm/xe_drm.h
> > > > @@ -228,6 +228,20 @@ struct drm_xe_query_engine_info {
> > > > /** @instance: The @drm_xe_engine_class_instance */
> > > > struct drm_xe_engine_class_instance instance;
> > > >
> > > > + /**
> > > > + * @near_mem_regions: Bit mask of instances from
> > > > + * drm_xe_query_mem_regions that is near this engine.
> > > > + */
> > > > + __u64 near_mem_regions;
> > > > + /**
> > > > + * @far_mem_regions: Bit mask of instances from
> > > > + * drm_xe_query_mem_regions that is far from this engine.
> > > > + * In general, it has extra indirections when compared to the
> > > > + * @near_mem_regions. For a discrete device this could mean system
> > > > + * memory and memory living in a different Tile.
> > > > + */
> > > > + __u64 far_mem_regions;
> > > > +
> > > > /** @reserved: Reserved */
> > > > __u64 reserved[3];
> > > > };
> > > > @@ -401,19 +415,6 @@ struct drm_xe_query_gt {
> > > > __u16 gt_id;
> > > > /** @clock_freq: A clock frequency for timestamp */
> > > > __u32 clock_freq;
> > > > - /**
> > > > - * @near_mem_regions: Bit mask of instances from
> > > > - * drm_xe_query_mem_regions that is near the current engines of this GT.
> > > > - */
> > > > - __u64 near_mem_regions;
> > > > - /**
> > > > - * @far_mem_regions: Bit mask of instances from
> > > > - * drm_xe_query_mem_regions that is far from the engines of this GT.
> > > > - * In general, it has extra indirections when compared to the
> > > > - * @near_mem_regions. For a discrete device this could mean system
> > > > - * memory and memory living in a different Tile.
> > > > - */
> > > > - __u64 far_mem_regions;
> > > > /** @reserved: Reserved */
> > > > __u64 reserved[8];
> > > > };
> > >
> >
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine
2023-11-09 19:50 ` Souza, Jose
@ 2023-11-09 21:04 ` Rodrigo Vivi
2023-11-16 3:31 ` Rodrigo Vivi
0 siblings, 1 reply; 81+ messages in thread
From: Rodrigo Vivi @ 2023-11-09 21:04 UTC (permalink / raw)
To: Souza, Jose; +Cc: Dugast, Francois, intel-xe@lists.freedesktop.org
On Thu, Nov 09, 2023 at 02:50:04PM -0500, Souza, Jose wrote:
> On Thu, 2023-11-09 at 13:46 -0500, Rodrigo Vivi wrote:
> > On Thu, Nov 09, 2023 at 04:35:19PM +0000, Souza, Jose wrote:
> > > On Thu, 2023-11-09 at 08:29 -0800, José Roberto de Souza wrote:
> > > > On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> > > > > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > >
> > > > > In the Tiled platforms, the memory is more tied to the Tile
> > > > > than to the GT.
> > > > > The distance (near vs far) makes more sense from the Engine
> > > > > perspective than from the GT perspective.
> > > >
> > > > why not add a uAPI to query tile information?
> > > > this is duplicating a tile information onto every engine of that tile.
> > > > we could leave reserved fields in the tile uAPI to include additional information that might be relevant in future.
> >
> > This is not necessarily a tile information. In PVC, truly the mem_region is tied to the tile,
> > but we don't want to fix the uapi in only one platform.
> > Like in the previous, the mem_region was per GT. who knows the future?!
>
> Older platforms had one gt and one tile, MTL has 1 tile and 2 gts and in both cases it matches with having a tile query.
but we can have a platform with multiple tiles and no memory on any tile directly.
but adding the api there you are limiting your future. or sentenced to have a
version 2 of the uapi.
>
> >
> > But the engine needs the information on which mem_region could be better,
> > regardless of if it lives along the same gt, or the same tile, or outside.
> > So, near and far sounded the most generic and future proof way.
>
> Memory regions are also used here in drm_xe_vm_bind_op.tile_mask/pt_placement_hint.
> To me it looks odd that I need to go trough all engines to know what are available tiles.
that won't be the case. we are going to change that to the sched_group_mask.
>
> Other way to make it future prof is keep this information in gt query, each engine will always belong to one GT and each GT will always belong to one
> tile.
> This way it do not matters if the memory_region is tile specific information or a GT specific information the uAPI will be consistent with less
> duplication than putting it in hw engine.
Okay, with this I can agree. Although it might not be necessarily the most future
proof one, but since all engines live in the GT and the 'distance' to any memory
would likely be the same for every engine, then we could have this way.
Oh, I though about that. that was another reason why I kept the 2 patches separated ;)
So we can drop the second and keep the renaming.
It would be okay by me.
>
> >
> > >
> > > other issue here and in other patches of this huge patch series.
> > >
> > > a previous patch in this series renamed near_mem_regions, then this one moves it to other struct... please drop the first patch and rename and move it
> > > into a single patch.
> >
> > okay, rename and move in the same patch kind of makes sense. and patches
> > could be squashed together. But when doing the IGT on the side, I felt
> > that small changes were better, so renames goes with sed commands and
> > the patch was small and clear. But I don't mind if they get squashed in
> > the end.
> >
> > >
> > > a series as big as this one will cause reviews in KMD and UMD to take a while...
> >
> > that's unfortunate indeed. But big patches also don't help much to speed up reviews.
> >
> > >
> > > >
> > > > >
> > > > > So, let's move this out from the GT and into the engine info.
> > > > >
> > > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/xe/xe_query.c | 14 +++++++-------
> > > > > include/uapi/drm/xe_drm.h | 27 ++++++++++++++-------------
> > > > > 2 files changed, 21 insertions(+), 20 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > > > > index aa5743e2e4d0..49a9b36f1193 100644
> > > > > --- a/drivers/gpu/drm/xe/xe_query.c
> > > > > +++ b/drivers/gpu/drm/xe/xe_query.c
> > > > > @@ -217,6 +217,13 @@ static int query_engines(struct xe_device *xe,
> > > > > hwe->logical_instance;
> > > > > hw_engine_info[i].instance.gt_id = gt->info.id;
> > > > > hw_engine_info[i].instance.pad = 0;
> > > > > + if (!IS_DGFX(xe))
> > > > > + hw_engine_info[i].near_mem_regions = 0x1;
> > > > > + else
> > > > > + hw_engine_info[i].near_mem_regions =
> > > > > + BIT(gt_to_tile(gt)->id) << 1;
> > > > > + hw_engine_info[i].far_mem_regions = xe->info.mem_region_mask ^
> > > > > + hw_engine_info[i].near_mem_regions;
> > > > > memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
> > > > >
> > > > > i++;
> > > > > @@ -377,13 +384,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> > > > > gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> > > > > gt_list->gt_list[id].gt_id = gt->info.id;
> > > > > gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> > > > > - if (!IS_DGFX(xe))
> > > > > - gt_list->gt_list[id].near_mem_regions = 0x1;
> > > > > - else
> > > > > - gt_list->gt_list[id].near_mem_regions =
> > > > > - BIT(gt_to_tile(gt)->id) << 1;
> > > > > - gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
> > > > > - gt_list->gt_list[id].near_mem_regions;
> > > > > }
> > > > >
> > > > > if (copy_to_user(query_ptr, gt_list, size)) {
> > > > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > > > > index 5164ed150a2e..8e84ef6fd46e 100644
> > > > > --- a/include/uapi/drm/xe_drm.h
> > > > > +++ b/include/uapi/drm/xe_drm.h
> > > > > @@ -228,6 +228,20 @@ struct drm_xe_query_engine_info {
> > > > > /** @instance: The @drm_xe_engine_class_instance */
> > > > > struct drm_xe_engine_class_instance instance;
> > > > >
> > > > > + /**
> > > > > + * @near_mem_regions: Bit mask of instances from
> > > > > + * drm_xe_query_mem_regions that is near this engine.
> > > > > + */
> > > > > + __u64 near_mem_regions;
> > > > > + /**
> > > > > + * @far_mem_regions: Bit mask of instances from
> > > > > + * drm_xe_query_mem_regions that is far from this engine.
> > > > > + * In general, it has extra indirections when compared to the
> > > > > + * @near_mem_regions. For a discrete device this could mean system
> > > > > + * memory and memory living in a different Tile.
> > > > > + */
> > > > > + __u64 far_mem_regions;
> > > > > +
> > > > > /** @reserved: Reserved */
> > > > > __u64 reserved[3];
> > > > > };
> > > > > @@ -401,19 +415,6 @@ struct drm_xe_query_gt {
> > > > > __u16 gt_id;
> > > > > /** @clock_freq: A clock frequency for timestamp */
> > > > > __u32 clock_freq;
> > > > > - /**
> > > > > - * @near_mem_regions: Bit mask of instances from
> > > > > - * drm_xe_query_mem_regions that is near the current engines of this GT.
> > > > > - */
> > > > > - __u64 near_mem_regions;
> > > > > - /**
> > > > > - * @far_mem_regions: Bit mask of instances from
> > > > > - * drm_xe_query_mem_regions that is far from the engines of this GT.
> > > > > - * In general, it has extra indirections when compared to the
> > > > > - * @near_mem_regions. For a discrete device this could mean system
> > > > > - * memory and memory living in a different Tile.
> > > > > - */
> > > > > - __u64 far_mem_regions;
> > > > > /** @reserved: Reserved */
> > > > > __u64 reserved[8];
> > > > > };
> > > >
> > >
>
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine
2023-11-09 21:04 ` Rodrigo Vivi
@ 2023-11-16 3:31 ` Rodrigo Vivi
2023-11-16 16:15 ` Souza, Jose
0 siblings, 1 reply; 81+ messages in thread
From: Rodrigo Vivi @ 2023-11-16 3:31 UTC (permalink / raw)
To: Souza, Jose; +Cc: Dugast, Francois, intel-xe@lists.freedesktop.org
On Thu, Nov 09, 2023 at 04:04:33PM -0500, Rodrigo Vivi wrote:
> On Thu, Nov 09, 2023 at 02:50:04PM -0500, Souza, Jose wrote:
> > On Thu, 2023-11-09 at 13:46 -0500, Rodrigo Vivi wrote:
> > > On Thu, Nov 09, 2023 at 04:35:19PM +0000, Souza, Jose wrote:
> > > > On Thu, 2023-11-09 at 08:29 -0800, José Roberto de Souza wrote:
> > > > > On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> > > > > > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > >
> > > > > > In the Tiled platforms, the memory is more tied to the Tile
> > > > > > than to the GT.
> > > > > > The distance (near vs far) makes more sense from the Engine
> > > > > > perspective than from the GT perspective.
> > > > >
> > > > > why not add a uAPI to query tile information?
> > > > > this is duplicating a tile information onto every engine of that tile.
> > > > > we could leave reserved fields in the tile uAPI to include additional information that might be relevant in future.
> > >
> > > This is not necessarily a tile information. In PVC, truly the mem_region is tied to the tile,
> > > but we don't want to fix the uapi in only one platform.
> > > Like in the previous, the mem_region was per GT. who knows the future?!
> >
> > Older platforms had one gt and one tile, MTL has 1 tile and 2 gts and in both cases it matches with having a tile query.
>
> but we can have a platform with multiple tiles and no memory on any tile directly.
> but adding the api there you are limiting your future. or sentenced to have a
> version 2 of the uapi.
>
> >
> > >
> > > But the engine needs the information on which mem_region could be better,
> > > regardless of if it lives along the same gt, or the same tile, or outside.
> > > So, near and far sounded the most generic and future proof way.
> >
> > Memory regions are also used here in drm_xe_vm_bind_op.tile_mask/pt_placement_hint.
> > To me it looks odd that I need to go trough all engines to know what are available tiles.
>
> that won't be the case. we are going to change that to the sched_group_mask.
>
> >
> > Other way to make it future prof is keep this information in gt query, each engine will always belong to one GT and each GT will always belong to one
> > tile.
> > This way it do not matters if the memory_region is tile specific information or a GT specific information the uAPI will be consistent with less
> > duplication than putting it in hw engine.
>
> Okay, with this I can agree. Although it might not be necessarily the most future
> proof one, but since all engines live in the GT and the 'distance' to any memory
> would likely be the same for every engine, then we could have this way.
>
> Oh, I though about that. that was another reason why I kept the 2 patches separated ;)
> So we can drop the second and keep the renaming.
> It would be okay by me.
Jose, I was trying to drop this, but then it waterfalls to the next patches in
a very bad way.
I was planning to have engine info as the informational part of the engine:
tile, gt, memory "distance", and convert the eci's gt_id to a generic number
called sched_group.
In the current platforms and schema sched_group == gt_id, but I didn't want
to make that a hard tie.
Sched groups could be a group of engines that can be used in parallel execution
or virtual balance and it is a number 0..n regardless the tile where it lives.
gt_id could be per tile and not global for instance. Or even we could have
sched_groups that goes across different GTs.
So, I kept the patch that adds tile_id and gt_id to the info and
convert eci's gt_id to sched_group. However the IGT patch is becoming an
ugly monster with places using engine_info and other places using the eci
and even mixed cases.
IF we drop this patch here, I believe it is good to also drop the sched_group
one, but then the engine_info starts to not make sense at all anymore and
I would also drop that ad simply add all the information to inside eci.
What are your thoughts on this, since you were the first to envision the
engine_info anyway.
Thanks,
Rodrigo.
>
> >
> > >
> > > >
> > > > other issue here and in other patches of this huge patch series.
> > > >
> > > > a previous patch in this series renamed near_mem_regions, then this one moves it to other struct... please drop the first patch and rename and move it
> > > > into a single patch.
> > >
> > > okay, rename and move in the same patch kind of makes sense. and patches
> > > could be squashed together. But when doing the IGT on the side, I felt
> > > that small changes were better, so renames goes with sed commands and
> > > the patch was small and clear. But I don't mind if they get squashed in
> > > the end.
> > >
> > > >
> > > > a series as big as this one will cause reviews in KMD and UMD to take a while...
> > >
> > > that's unfortunate indeed. But big patches also don't help much to speed up reviews.
> > >
> > > >
> > > > >
> > > > > >
> > > > > > So, let's move this out from the GT and into the engine info.
> > > > > >
> > > > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > > ---
> > > > > > drivers/gpu/drm/xe/xe_query.c | 14 +++++++-------
> > > > > > include/uapi/drm/xe_drm.h | 27 ++++++++++++++-------------
> > > > > > 2 files changed, 21 insertions(+), 20 deletions(-)
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > > > > > index aa5743e2e4d0..49a9b36f1193 100644
> > > > > > --- a/drivers/gpu/drm/xe/xe_query.c
> > > > > > +++ b/drivers/gpu/drm/xe/xe_query.c
> > > > > > @@ -217,6 +217,13 @@ static int query_engines(struct xe_device *xe,
> > > > > > hwe->logical_instance;
> > > > > > hw_engine_info[i].instance.gt_id = gt->info.id;
> > > > > > hw_engine_info[i].instance.pad = 0;
> > > > > > + if (!IS_DGFX(xe))
> > > > > > + hw_engine_info[i].near_mem_regions = 0x1;
> > > > > > + else
> > > > > > + hw_engine_info[i].near_mem_regions =
> > > > > > + BIT(gt_to_tile(gt)->id) << 1;
> > > > > > + hw_engine_info[i].far_mem_regions = xe->info.mem_region_mask ^
> > > > > > + hw_engine_info[i].near_mem_regions;
> > > > > > memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
> > > > > >
> > > > > > i++;
> > > > > > @@ -377,13 +384,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> > > > > > gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> > > > > > gt_list->gt_list[id].gt_id = gt->info.id;
> > > > > > gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> > > > > > - if (!IS_DGFX(xe))
> > > > > > - gt_list->gt_list[id].near_mem_regions = 0x1;
> > > > > > - else
> > > > > > - gt_list->gt_list[id].near_mem_regions =
> > > > > > - BIT(gt_to_tile(gt)->id) << 1;
> > > > > > - gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
> > > > > > - gt_list->gt_list[id].near_mem_regions;
> > > > > > }
> > > > > >
> > > > > > if (copy_to_user(query_ptr, gt_list, size)) {
> > > > > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > > > > > index 5164ed150a2e..8e84ef6fd46e 100644
> > > > > > --- a/include/uapi/drm/xe_drm.h
> > > > > > +++ b/include/uapi/drm/xe_drm.h
> > > > > > @@ -228,6 +228,20 @@ struct drm_xe_query_engine_info {
> > > > > > /** @instance: The @drm_xe_engine_class_instance */
> > > > > > struct drm_xe_engine_class_instance instance;
> > > > > >
> > > > > > + /**
> > > > > > + * @near_mem_regions: Bit mask of instances from
> > > > > > + * drm_xe_query_mem_regions that is near this engine.
> > > > > > + */
> > > > > > + __u64 near_mem_regions;
> > > > > > + /**
> > > > > > + * @far_mem_regions: Bit mask of instances from
> > > > > > + * drm_xe_query_mem_regions that is far from this engine.
> > > > > > + * In general, it has extra indirections when compared to the
> > > > > > + * @near_mem_regions. For a discrete device this could mean system
> > > > > > + * memory and memory living in a different Tile.
> > > > > > + */
> > > > > > + __u64 far_mem_regions;
> > > > > > +
> > > > > > /** @reserved: Reserved */
> > > > > > __u64 reserved[3];
> > > > > > };
> > > > > > @@ -401,19 +415,6 @@ struct drm_xe_query_gt {
> > > > > > __u16 gt_id;
> > > > > > /** @clock_freq: A clock frequency for timestamp */
> > > > > > __u32 clock_freq;
> > > > > > - /**
> > > > > > - * @near_mem_regions: Bit mask of instances from
> > > > > > - * drm_xe_query_mem_regions that is near the current engines of this GT.
> > > > > > - */
> > > > > > - __u64 near_mem_regions;
> > > > > > - /**
> > > > > > - * @far_mem_regions: Bit mask of instances from
> > > > > > - * drm_xe_query_mem_regions that is far from the engines of this GT.
> > > > > > - * In general, it has extra indirections when compared to the
> > > > > > - * @near_mem_regions. For a discrete device this could mean system
> > > > > > - * memory and memory living in a different Tile.
> > > > > > - */
> > > > > > - __u64 far_mem_regions;
> > > > > > /** @reserved: Reserved */
> > > > > > __u64 reserved[8];
> > > > > > };
> > > > >
> > > >
> >
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine
2023-11-16 3:31 ` Rodrigo Vivi
@ 2023-11-16 16:15 ` Souza, Jose
0 siblings, 0 replies; 81+ messages in thread
From: Souza, Jose @ 2023-11-16 16:15 UTC (permalink / raw)
To: Vivi, Rodrigo; +Cc: Dugast, Francois, intel-xe@lists.freedesktop.org
On Wed, 2023-11-15 at 22:31 -0500, Rodrigo Vivi wrote:
> On Thu, Nov 09, 2023 at 04:04:33PM -0500, Rodrigo Vivi wrote:
> > On Thu, Nov 09, 2023 at 02:50:04PM -0500, Souza, Jose wrote:
> > > On Thu, 2023-11-09 at 13:46 -0500, Rodrigo Vivi wrote:
> > > > On Thu, Nov 09, 2023 at 04:35:19PM +0000, Souza, Jose wrote:
> > > > > On Thu, 2023-11-09 at 08:29 -0800, José Roberto de Souza wrote:
> > > > > > On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> > > > > > > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > > >
> > > > > > > In the Tiled platforms, the memory is more tied to the Tile
> > > > > > > than to the GT.
> > > > > > > The distance (near vs far) makes more sense from the Engine
> > > > > > > perspective than from the GT perspective.
> > > > > >
> > > > > > why not add a uAPI to query tile information?
> > > > > > this is duplicating a tile information onto every engine of that tile.
> > > > > > we could leave reserved fields in the tile uAPI to include additional information that might be relevant in future.
> > > >
> > > > This is not necessarily a tile information. In PVC, truly the mem_region is tied to the tile,
> > > > but we don't want to fix the uapi in only one platform.
> > > > Like in the previous, the mem_region was per GT. who knows the future?!
> > >
> > > Older platforms had one gt and one tile, MTL has 1 tile and 2 gts and in both cases it matches with having a tile query.
> >
> > but we can have a platform with multiple tiles and no memory on any tile directly.
> > but adding the api there you are limiting your future. or sentenced to have a
> > version 2 of the uapi.
> >
> > >
> > > >
> > > > But the engine needs the information on which mem_region could be better,
> > > > regardless of if it lives along the same gt, or the same tile, or outside.
> > > > So, near and far sounded the most generic and future proof way.
> > >
> > > Memory regions are also used here in drm_xe_vm_bind_op.tile_mask/pt_placement_hint.
> > > To me it looks odd that I need to go trough all engines to know what are available tiles.
> >
> > that won't be the case. we are going to change that to the sched_group_mask.
> >
> > >
> > > Other way to make it future prof is keep this information in gt query, each engine will always belong to one GT and each GT will always belong to one
> > > tile.
> > > This way it do not matters if the memory_region is tile specific information or a GT specific information the uAPI will be consistent with less
> > > duplication than putting it in hw engine.
> >
> > Okay, with this I can agree. Although it might not be necessarily the most future
> > proof one, but since all engines live in the GT and the 'distance' to any memory
> > would likely be the same for every engine, then we could have this way.
> >
> > Oh, I though about that. that was another reason why I kept the 2 patches separated ;)
> > So we can drop the second and keep the renaming.
> > It would be okay by me.
>
> Jose, I was trying to drop this, but then it waterfalls to the next patches in
> a very bad way.
>
> I was planning to have engine info as the informational part of the engine:
> tile, gt, memory "distance", and convert the eci's gt_id to a generic number
> called sched_group.
>
> In the current platforms and schema sched_group == gt_id, but I didn't want
> to make that a hard tie.
>
> Sched groups could be a group of engines that can be used in parallel execution
> or virtual balance and it is a number 0..n regardless the tile where it lives.
>
> gt_id could be per tile and not global for instance. Or even we could have
> sched_groups that goes across different GTs.
>
> So, I kept the patch that adds tile_id and gt_id to the info and
> convert eci's gt_id to sched_group. However the IGT patch is becoming an
> ugly monster with places using engine_info and other places using the eci
> and even mixed cases.
>
> IF we drop this patch here, I believe it is good to also drop the sched_group
> one, but then the engine_info starts to not make sense at all anymore and
> I would also drop that ad simply add all the information to inside eci.
>
> What are your thoughts on this, since you were the first to envision the
> engine_info anyway.
If I understood it correctly your suggestion is to drop this patch, drop sched_group and have gt_id and tile_id in
drm_xe_engine_class_instance but that would cause the engine_info uAPI to only return drm_xe_engine_class_instance, is that correct?
The usage that I had in mind for engine_info uAPI was the fields it will require for the OA/performance counter uAPI and the media engines
capabilities.
Comment on drm_xe_engine_class_instance having gt_id and tile_id, is it kinda of duplicated information as each gt_id belongs to one tile.
What about have tile_id in drm_xe_query_gt?
>
> Thanks,
> Rodrigo.
>
> >
> > >
> > > >
> > > > >
> > > > > other issue here and in other patches of this huge patch series.
> > > > >
> > > > > a previous patch in this series renamed near_mem_regions, then this one moves it to other struct... please drop the first patch and rename and move it
> > > > > into a single patch.
> > > >
> > > > okay, rename and move in the same patch kind of makes sense. and patches
> > > > could be squashed together. But when doing the IGT on the side, I felt
> > > > that small changes were better, so renames goes with sed commands and
> > > > the patch was small and clear. But I don't mind if they get squashed in
> > > > the end.
> > > >
> > > > >
> > > > > a series as big as this one will cause reviews in KMD and UMD to take a while...
> > > >
> > > > that's unfortunate indeed. But big patches also don't help much to speed up reviews.
> > > >
> > > > >
> > > > > >
> > > > > > >
> > > > > > > So, let's move this out from the GT and into the engine info.
> > > > > > >
> > > > > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > > > > ---
> > > > > > > drivers/gpu/drm/xe/xe_query.c | 14 +++++++-------
> > > > > > > include/uapi/drm/xe_drm.h | 27 ++++++++++++++-------------
> > > > > > > 2 files changed, 21 insertions(+), 20 deletions(-)
> > > > > > >
> > > > > > > diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> > > > > > > index aa5743e2e4d0..49a9b36f1193 100644
> > > > > > > --- a/drivers/gpu/drm/xe/xe_query.c
> > > > > > > +++ b/drivers/gpu/drm/xe/xe_query.c
> > > > > > > @@ -217,6 +217,13 @@ static int query_engines(struct xe_device *xe,
> > > > > > > hwe->logical_instance;
> > > > > > > hw_engine_info[i].instance.gt_id = gt->info.id;
> > > > > > > hw_engine_info[i].instance.pad = 0;
> > > > > > > + if (!IS_DGFX(xe))
> > > > > > > + hw_engine_info[i].near_mem_regions = 0x1;
> > > > > > > + else
> > > > > > > + hw_engine_info[i].near_mem_regions =
> > > > > > > + BIT(gt_to_tile(gt)->id) << 1;
> > > > > > > + hw_engine_info[i].far_mem_regions = xe->info.mem_region_mask ^
> > > > > > > + hw_engine_info[i].near_mem_regions;
> > > > > > > memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
> > > > > > >
> > > > > > > i++;
> > > > > > > @@ -377,13 +384,6 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> > > > > > > gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
> > > > > > > gt_list->gt_list[id].gt_id = gt->info.id;
> > > > > > > gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> > > > > > > - if (!IS_DGFX(xe))
> > > > > > > - gt_list->gt_list[id].near_mem_regions = 0x1;
> > > > > > > - else
> > > > > > > - gt_list->gt_list[id].near_mem_regions =
> > > > > > > - BIT(gt_to_tile(gt)->id) << 1;
> > > > > > > - gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
> > > > > > > - gt_list->gt_list[id].near_mem_regions;
> > > > > > > }
> > > > > > >
> > > > > > > if (copy_to_user(query_ptr, gt_list, size)) {
> > > > > > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > > > > > > index 5164ed150a2e..8e84ef6fd46e 100644
> > > > > > > --- a/include/uapi/drm/xe_drm.h
> > > > > > > +++ b/include/uapi/drm/xe_drm.h
> > > > > > > @@ -228,6 +228,20 @@ struct drm_xe_query_engine_info {
> > > > > > > /** @instance: The @drm_xe_engine_class_instance */
> > > > > > > struct drm_xe_engine_class_instance instance;
> > > > > > >
> > > > > > > + /**
> > > > > > > + * @near_mem_regions: Bit mask of instances from
> > > > > > > + * drm_xe_query_mem_regions that is near this engine.
> > > > > > > + */
> > > > > > > + __u64 near_mem_regions;
> > > > > > > + /**
> > > > > > > + * @far_mem_regions: Bit mask of instances from
> > > > > > > + * drm_xe_query_mem_regions that is far from this engine.
> > > > > > > + * In general, it has extra indirections when compared to the
> > > > > > > + * @near_mem_regions. For a discrete device this could mean system
> > > > > > > + * memory and memory living in a different Tile.
> > > > > > > + */
> > > > > > > + __u64 far_mem_regions;
> > > > > > > +
> > > > > > > /** @reserved: Reserved */
> > > > > > > __u64 reserved[3];
> > > > > > > };
> > > > > > > @@ -401,19 +415,6 @@ struct drm_xe_query_gt {
> > > > > > > __u16 gt_id;
> > > > > > > /** @clock_freq: A clock frequency for timestamp */
> > > > > > > __u32 clock_freq;
> > > > > > > - /**
> > > > > > > - * @near_mem_regions: Bit mask of instances from
> > > > > > > - * drm_xe_query_mem_regions that is near the current engines of this GT.
> > > > > > > - */
> > > > > > > - __u64 near_mem_regions;
> > > > > > > - /**
> > > > > > > - * @far_mem_regions: Bit mask of instances from
> > > > > > > - * drm_xe_query_mem_regions that is far from the engines of this GT.
> > > > > > > - * In general, it has extra indirections when compared to the
> > > > > > > - * @near_mem_regions. For a discrete device this could mean system
> > > > > > > - * memory and memory living in a different Tile.
> > > > > > > - */
> > > > > > > - __u64 far_mem_regions;
> > > > > > > /** @reserved: Reserved */
> > > > > > > __u64 reserved[8];
> > > > > > > };
> > > > > >
> > > > >
> > >
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 35/50] drm/xe/uapi: Document the memory_region bitmask
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (33 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 34/50] drm/xe/uapi: Move memory_region masks from GT to engine Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 36/50] drm/xe/uapi: Be more specific about the vm_bind prefetch region Francois Dugast
` (21 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
The uAPI should stay generic in regarding to the bitmask. It is
the userspace responsibility to check for the type/class of the
memory, without any assumption.
Also add comments inside the code to explain how it is actually
constructed so we don't accidentally change the assignment of
the instance and the masks.
No functional change in this patch. It only explains and document
the memory_region masks. A further follow-up work with the
organization of all memory regions around struct xe_mem_regions
is desired, but not part of this patch.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 19 +++++++++++++++++++
include/uapi/drm/xe_drm.h | 23 ++++++++++++++++++-----
2 files changed, 37 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 49a9b36f1193..4ee002b76f21 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -217,6 +217,20 @@ static int query_engines(struct xe_device *xe,
hwe->logical_instance;
hw_engine_info[i].instance.gt_id = gt->info.id;
hw_engine_info[i].instance.pad = 0;
+ /*
+ * The mem_regions indexes in the mask below need to
+ * directly identify the struct
+ * drm_xe_query_mem_regions' instance constructed at
+ * query_mem_regions()
+ *
+ * For our current platforms:
+ * Bit 0 -> System Memory
+ * Bit 1 -> VRAM0 on Tile0
+ * Bit 2 -> VRAM1 on Tile1
+ * However the uAPI is generic and it's userspace's
+ * responsibility to check the mem_class, without any
+ * assumption.
+ */
if (!IS_DGFX(xe))
hw_engine_info[i].near_mem_regions = 0x1;
else
@@ -273,6 +287,11 @@ static int query_mem_regions(struct xe_device *xe,
man = ttm_manager_type(&xe->ttm, XE_PL_TT);
usage->regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
+ /*
+ * The instance needs to be a unique number that represents the index
+ * in the placement mask used at xe_gem_create_ioctl() for the
+ * xe_bo_create() placement.
+ */
usage->regions[0].instance = 0;
usage->regions[0].min_page_size = PAGE_SIZE;
usage->regions[0].total_size = man->size << PAGE_SHIFT;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 8e84ef6fd46e..83832c40e614 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -231,6 +231,10 @@ struct drm_xe_query_engine_info {
/**
* @near_mem_regions: Bit mask of instances from
* drm_xe_query_mem_regions that is near this engine.
+ * Each index in this mask refers directly to the struct
+ * drm_xe_query_mem_regions' instance, no assumptions should
+ * be made about order. The type of each region is described
+ * by struct drm_xe_query_mem_regions' mem_class.
*/
__u64 near_mem_regions;
/**
@@ -239,6 +243,10 @@ struct drm_xe_query_engine_info {
* In general, it has extra indirections when compared to the
* @near_mem_regions. For a discrete device this could mean system
* memory and memory living in a different Tile.
+ * Each index in this mask refers directly to the struct
+ * drm_xe_query_mem_regions' instance, no assumptions should
+ * be made about order. The type of each region is described
+ * by struct drm_xe_query_mem_regions' mem_class.
*/
__u64 far_mem_regions;
@@ -272,10 +280,9 @@ struct drm_xe_query_mem_region {
*/
__u16 mem_class;
/**
- * @instance: The instance for this region.
- *
- * The @mem_class and @instance taken together will always give
- * a unique pair.
+ * @instance: The unique ID for this region, which serves as the
+ * index in the placement bitmask used as argument for
+ * &DRM_IOCTL_XE_GEM_CREATE
*/
__u16 instance;
/** @pad: MBZ */
@@ -692,7 +699,13 @@ struct drm_xe_gem_create {
*/
__u64 size;
- /** @placement: A mask of memory instances of where GEM can be placed. */
+ /**
+ * @placement: A mask of memory instances of where GEM can be placed.
+ * Each index in this mask refers directly to the struct
+ * drm_xe_query_mem_regions' instance, no assumptions should
+ * be made about order. The type of each region is described
+ * by struct drm_xe_query_mem_regions' mem_class.
+ */
__u32 placement;
#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 36/50] drm/xe/uapi: Be more specific about the vm_bind prefetch region
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (34 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 35/50] drm/xe/uapi: Document the memory_region bitmask Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 37/50] drm/xe/uapi: Convert tile_mask to a pt_placement_hint Francois Dugast
` (20 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Let's bring a bit of clarity on this 'region' field that is
part of vm_bind operation struct. Rename and document to make
it more than obvious that it is a region instance and not a
mask and also that it should only be used with the prefetch
operation itself.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_vm.c | 15 ++++++++-------
include/uapi/drm/xe_drm.h | 8 ++++++--
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 447fecf3bd2d..5538b0ed81e8 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2167,7 +2167,8 @@ static void print_op(struct xe_device *xe, struct drm_gpuva_op *op)
static struct drm_gpuva_ops *
vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
u64 bo_offset_or_userptr, u64 addr, u64 range,
- u32 operation, u32 flags, u8 tile_mask, u32 region)
+ u32 operation, u32 flags, u8 tile_mask,
+ u32 prefetch_region)
{
struct drm_gem_object *obj = bo ? &bo->ttm.base : NULL;
struct drm_gpuva_ops *ops;
@@ -2221,7 +2222,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
op->tile_mask = tile_mask;
- op->prefetch.region = region;
+ op->prefetch.region = prefetch_region;
}
break;
case DRM_XE_VM_BIND_OP_UNMAP_ALL:
@@ -2870,7 +2871,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
u32 flags = (*bind_ops)[i].flags;
u32 obj = (*bind_ops)[i].obj;
u64 obj_offset = (*bind_ops)[i].obj_offset;
- u32 region = (*bind_ops)[i].region;
+ u32 prefetch_region = (*bind_ops)[i].prefetch_mem_region_instance;
bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
if (i == 0) {
@@ -2904,9 +2905,9 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
XE_IOCTL_DBG(xe, obj &&
op == DRM_XE_VM_BIND_OP_PREFETCH) ||
- XE_IOCTL_DBG(xe, region &&
+ XE_IOCTL_DBG(xe, prefetch_region &&
op != DRM_XE_VM_BIND_OP_PREFETCH) ||
- XE_IOCTL_DBG(xe, !(BIT(region) &
+ XE_IOCTL_DBG(xe, !(BIT(prefetch_region) &
xe->info.mem_region_mask)) ||
XE_IOCTL_DBG(xe, obj &&
op == DRM_XE_VM_BIND_OP_UNMAP)) {
@@ -3088,11 +3089,11 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
u32 flags = bind_ops[i].flags;
u64 obj_offset = bind_ops[i].obj_offset;
u8 tile_mask = bind_ops[i].tile_mask;
- u32 region = bind_ops[i].region;
+ u32 prefetch_region = bind_ops[i].prefetch_mem_region_instance;
ops[i] = vm_bind_ioctl_ops_create(vm, bos[i], obj_offset,
addr, range, op, flags,
- tile_mask, region);
+ tile_mask, prefetch_region);
if (IS_ERR(ops[i])) {
err = PTR_ERR(ops[i]);
ops[i] = NULL;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 83832c40e614..35ce3605fc0b 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -870,8 +870,12 @@ struct drm_xe_vm_bind_op {
/** @flags: Bind flags */
__u32 flags;
- /** @region: Memory region to prefetch VMA to, instance not a mask */
- __u32 region;
+ /**
+ * @prefetch_mem_region_instance: Memory region to prefetch VMA to.
+ * It is a region instance, not a mask.
+ * To be used only with %DRM_XE_VM_BIND_OP_PREFETCH operation.
+ */
+ __u32 prefetch_mem_region_instance;
/** @reserved: Reserved */
__u64 reserved[2];
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 37/50] drm/xe/uapi: Convert tile_mask to a pt_placement_hint
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (35 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 36/50] drm/xe/uapi: Be more specific about the vm_bind prefetch region Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-08 0:17 ` Welty, Brian
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 38/50] drm/xe/uapi: Rename couple exec_queue items Francois Dugast
` (19 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
The previous tile_mask was also an optional hint, and only used
for the page-table tree placement. However, it was so tied
with the tile concept itself. Let's clarify things up and make
this generic enough. So accept any valid memory region mask.
It could even be a direct near_mem_region gotten from the engine_info.
pt stands for page table.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_vm.c | 14 ++++++++++----
include/uapi/drm/xe_drm.h | 16 +++++++++++++---
2 files changed, 23 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 5538b0ed81e8..c7eb8d43bf33 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -3007,11 +3007,16 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
goto release_vm_lock;
}
- if (bind_ops[i].tile_mask) {
+ if (bind_ops[i].pt_placement_hint) {
u64 valid_tiles = BIT(xe->info.tile_count) - 1;
+ /*
+ * System memory is currently ignored from this hint,
+ * which gets entirely converted to a tile_mask
+ */
+ u8 system_memory = 0x1;
- if (XE_IOCTL_DBG(xe, bind_ops[i].tile_mask &
- ~valid_tiles)) {
+ if (XE_IOCTL_DBG(xe, bind_ops[i].pt_placement_hint &
+ ~valid_tiles & ~system_memory)) {
err = -EINVAL;
goto release_vm_lock;
}
@@ -3088,7 +3093,8 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
u32 op = bind_ops[i].op;
u32 flags = bind_ops[i].flags;
u64 obj_offset = bind_ops[i].obj_offset;
- u8 tile_mask = bind_ops[i].tile_mask;
+ /* Remove the system memory bit when converting to tiles */
+ u8 tile_mask = bind_ops[i].pt_placement_hint & ~0x1;
u32 prefetch_region = bind_ops[i].prefetch_mem_region_instance;
ops[i] = vm_bind_ioctl_ops_create(vm, bos[i], obj_offset,
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 35ce3605fc0b..2d0fb4386a69 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -850,10 +850,20 @@ struct drm_xe_vm_bind_op {
__u64 addr;
/**
- * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
- * only applies to creating new VMAs
+ * @pt_placement_hint: An optional memory_region bit-mask hint, which
+ * only applies when creating new VMAs. Default value '0' is the
+ * recommended value.
+ *
+ * It hints the optimal placement for the page-table tree for this VMA.
+ * For instance, when userspace is using engines living in a secondary
+ * tile with allocated BOs near those engines, that same
+ * @near_mem_region could be used in this hint field.
+ *
+ * Since it is a hint, the Xe kernel driver is free to ignore this mask
+ * and choose the best location for the page-table, taking into
+ * consideration the running hardware and runtime constrains.
*/
- __u64 tile_mask;
+ __u64 pt_placement_hint;
#define DRM_XE_VM_BIND_OP_MAP 0x0
#define DRM_XE_VM_BIND_OP_UNMAP 0x1
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 37/50] drm/xe/uapi: Convert tile_mask to a pt_placement_hint
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 37/50] drm/xe/uapi: Convert tile_mask to a pt_placement_hint Francois Dugast
@ 2023-11-08 0:17 ` Welty, Brian
2023-11-09 18:55 ` Rodrigo Vivi
0 siblings, 1 reply; 81+ messages in thread
From: Welty, Brian @ 2023-11-08 0:17 UTC (permalink / raw)
To: Francois Dugast, intel-xe; +Cc: Rodrigo Vivi
On 11/3/2023 7:34 AM, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> The previous tile_mask was also an optional hint, and only used
> for the page-table tree placement. However, it was so tied
> with the tile concept itself. Let's clarify things up and make
> this generic enough. So accept any valid memory region mask.
> It could even be a direct near_mem_region gotten from the engine_info.
> pt stands for page table.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_vm.c | 14 ++++++++++----
> include/uapi/drm/xe_drm.h | 16 +++++++++++++---
> 2 files changed, 23 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 5538b0ed81e8..c7eb8d43bf33 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -3007,11 +3007,16 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> goto release_vm_lock;
> }
>
> - if (bind_ops[i].tile_mask) {
> + if (bind_ops[i].pt_placement_hint) {
> u64 valid_tiles = BIT(xe->info.tile_count) - 1;
> + /*
> + * System memory is currently ignored from this hint,
> + * which gets entirely converted to a tile_mask
> + */
> + u8 system_memory = 0x1;
>
> - if (XE_IOCTL_DBG(xe, bind_ops[i].tile_mask &
> - ~valid_tiles)) {
> + if (XE_IOCTL_DBG(xe, bind_ops[i].pt_placement_hint &
> + ~valid_tiles & ~system_memory)) {
But valid_tiles is not correct bitmask to use here as that is tiles, not
a mask of VRAM regions...
If pt_placement_hint is actually memory regions, I think you simply want:
if (XE_IOCTL_DBG(xe, bind_ops[i].pt_placement_hint &
~xe->info.mem_region_mask) {
> err = -EINVAL;
> goto release_vm_lock;
> }
> @@ -3088,7 +3093,8 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> u32 op = bind_ops[i].op;
> u32 flags = bind_ops[i].flags;
> u64 obj_offset = bind_ops[i].obj_offset;
> - u8 tile_mask = bind_ops[i].tile_mask;
> + /* Remove the system memory bit when converting to tiles */
> + u8 tile_mask = bind_ops[i].pt_placement_hint & ~0x1;
Same as above... conversion doesn't look right.
If you want a tile_mask, don't you need to shift the pt_placement_hint ?
So you want to convert XE_PL_VRAM0 and XE_PL_VRAM1 to a bitmask of
tiles? I think you need:
tile_mask = bind_ops[i].pt_placement_hint >> 1;
-Brian
> u32 prefetch_region = bind_ops[i].prefetch_mem_region_instance;
>
> ops[i] = vm_bind_ioctl_ops_create(vm, bos[i], obj_offset,
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 35ce3605fc0b..2d0fb4386a69 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -850,10 +850,20 @@ struct drm_xe_vm_bind_op {
> __u64 addr;
>
> /**
> - * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
> - * only applies to creating new VMAs
> + * @pt_placement_hint: An optional memory_region bit-mask hint, which
> + * only applies when creating new VMAs. Default value '0' is the
> + * recommended value.
> + *
> + * It hints the optimal placement for the page-table tree for this VMA.
> + * For instance, when userspace is using engines living in a secondary
> + * tile with allocated BOs near those engines, that same
> + * @near_mem_region could be used in this hint field.
> + *
> + * Since it is a hint, the Xe kernel driver is free to ignore this mask
> + * and choose the best location for the page-table, taking into
> + * consideration the running hardware and runtime constrains.
> */
> - __u64 tile_mask;
> + __u64 pt_placement_hint;
>
> #define DRM_XE_VM_BIND_OP_MAP 0x0
> #define DRM_XE_VM_BIND_OP_UNMAP 0x1
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 37/50] drm/xe/uapi: Convert tile_mask to a pt_placement_hint
2023-11-08 0:17 ` Welty, Brian
@ 2023-11-09 18:55 ` Rodrigo Vivi
0 siblings, 0 replies; 81+ messages in thread
From: Rodrigo Vivi @ 2023-11-09 18:55 UTC (permalink / raw)
To: Welty, Brian; +Cc: Francois Dugast, intel-xe
On Tue, Nov 07, 2023 at 04:17:51PM -0800, Welty, Brian wrote:
>
> On 11/3/2023 7:34 AM, Francois Dugast wrote:
> > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> > The previous tile_mask was also an optional hint, and only used
> > for the page-table tree placement. However, it was so tied
> > with the tile concept itself. Let's clarify things up and make
> > this generic enough. So accept any valid memory region mask.
> > It could even be a direct near_mem_region gotten from the engine_info.
> > pt stands for page table.
> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_vm.c | 14 ++++++++++----
> > include/uapi/drm/xe_drm.h | 16 +++++++++++++---
> > 2 files changed, 23 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> > index 5538b0ed81e8..c7eb8d43bf33 100644
> > --- a/drivers/gpu/drm/xe/xe_vm.c
> > +++ b/drivers/gpu/drm/xe/xe_vm.c
> > @@ -3007,11 +3007,16 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > goto release_vm_lock;
> > }
> > - if (bind_ops[i].tile_mask) {
> > + if (bind_ops[i].pt_placement_hint) {
> > u64 valid_tiles = BIT(xe->info.tile_count) - 1;
> > + /*
> > + * System memory is currently ignored from this hint,
> > + * which gets entirely converted to a tile_mask
> > + */
> > + u8 system_memory = 0x1;
> > - if (XE_IOCTL_DBG(xe, bind_ops[i].tile_mask &
> > - ~valid_tiles)) {
> > + if (XE_IOCTL_DBG(xe, bind_ops[i].pt_placement_hint &
> > + ~valid_tiles & ~system_memory)) {
>
> But valid_tiles is not correct bitmask to use here as that is tiles, not a
> mask of VRAM regions...
> If pt_placement_hint is actually memory regions, I think you simply want:
> if (XE_IOCTL_DBG(xe, bind_ops[i].pt_placement_hint &
> ~xe->info.mem_region_mask) {
yes, this is a better check indeed. let's change.
>
>
> > err = -EINVAL;
> > goto release_vm_lock;
> > }
> > @@ -3088,7 +3093,8 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > u32 op = bind_ops[i].op;
> > u32 flags = bind_ops[i].flags;
> > u64 obj_offset = bind_ops[i].obj_offset;
> > - u8 tile_mask = bind_ops[i].tile_mask;
> > + /* Remove the system memory bit when converting to tiles */
> > + u8 tile_mask = bind_ops[i].pt_placement_hint & ~0x1;
>
> Same as above... conversion doesn't look right.
> If you want a tile_mask, don't you need to shift the pt_placement_hint ?
> So you want to convert XE_PL_VRAM0 and XE_PL_VRAM1 to a bitmask of tiles?
> I think you need:
> tile_mask = bind_ops[i].pt_placement_hint >> 1;
good catch, so we don't need to change the rest of the internal code.
>
> -Brian
>
>
> > u32 prefetch_region = bind_ops[i].prefetch_mem_region_instance;
> > ops[i] = vm_bind_ioctl_ops_create(vm, bos[i], obj_offset,
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index 35ce3605fc0b..2d0fb4386a69 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -850,10 +850,20 @@ struct drm_xe_vm_bind_op {
> > __u64 addr;
> > /**
> > - * @tile_mask: Mask for which tiles to create binds for, 0 == All tiles,
> > - * only applies to creating new VMAs
> > + * @pt_placement_hint: An optional memory_region bit-mask hint, which
> > + * only applies when creating new VMAs. Default value '0' is the
> > + * recommended value.
> > + *
> > + * It hints the optimal placement for the page-table tree for this VMA.
> > + * For instance, when userspace is using engines living in a secondary
> > + * tile with allocated BOs near those engines, that same
> > + * @near_mem_region could be used in this hint field.
> > + *
> > + * Since it is a hint, the Xe kernel driver is free to ignore this mask
> > + * and choose the best location for the page-table, taking into
> > + * consideration the running hardware and runtime constrains.
> > */
> > - __u64 tile_mask;
> > + __u64 pt_placement_hint;
> > #define DRM_XE_VM_BIND_OP_MAP 0x0
> > #define DRM_XE_VM_BIND_OP_UNMAP 0x1
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 38/50] drm/xe/uapi: Rename couple exec_queue items
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (36 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 37/50] drm/xe/uapi: Convert tile_mask to a pt_placement_hint Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-09 17:14 ` Souza, Jose
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 39/50] drm/xe/uapi: Refactor engine information Francois Dugast
` (18 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
'Placement' is no used in many terms around the memory_region selection
where the BO or the page table will live. Also, the job itself deserves
a word of more action since it is dispatched to the engine.
'width' is so generic and in graphics world can mean many other different
things. Let's be more specific here on the intent of that.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_devcoredump.c | 8 ++--
drivers/gpu/drm/xe/xe_exec.c | 4 +-
drivers/gpu/drm/xe/xe_exec_queue.c | 49 ++++++++++++------------
drivers/gpu/drm/xe/xe_exec_queue.h | 4 +-
drivers/gpu/drm/xe/xe_exec_queue_types.h | 4 +-
drivers/gpu/drm/xe/xe_guc_submit.c | 32 ++++++++--------
drivers/gpu/drm/xe/xe_ring_ops.c | 8 ++--
drivers/gpu/drm/xe/xe_sched_job.c | 10 ++---
drivers/gpu/drm/xe/xe_trace.h | 8 ++--
include/uapi/drm/xe_drm.h | 20 ++++++----
10 files changed, 77 insertions(+), 70 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
index 68abc0b195be..b4e8de4903b9 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump.c
+++ b/drivers/gpu/drm/xe/xe_devcoredump.c
@@ -130,7 +130,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
struct xe_hw_engine *hwe;
enum xe_hw_engine_id id;
u32 adj_logical_mask = q->logical_mask;
- u32 width_mask = (0x1 << q->width) - 1;
+ u32 num_bb_per_exec_mask = (0x1 << q->num_bb_per_exec) - 1;
int i;
bool cookie;
@@ -138,10 +138,10 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
ss->boot_time = ktime_get_boottime();
cookie = dma_fence_begin_signalling();
- for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
+ for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
if (adj_logical_mask & BIT(i)) {
- adj_logical_mask |= width_mask << i;
- i += q->width;
+ adj_logical_mask |= num_bb_per_exec_mask << i;
+ i += q->num_bb_per_exec;
} else {
++i;
}
diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
index 28e84a0bbeb0..ca922635db89 100644
--- a/drivers/gpu/drm/xe/xe_exec.c
+++ b/drivers/gpu/drm/xe/xe_exec.c
@@ -161,7 +161,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_VM))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, q->width != args->num_batch_buffer))
+ if (XE_IOCTL_DBG(xe, q->num_bb_per_exec != args->num_batch_buffer))
return -EINVAL;
if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_BANNED)) {
@@ -189,7 +189,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
if (xe_exec_queue_is_parallel(q)) {
err = __copy_from_user(addresses, addresses_user, sizeof(u64) *
- q->width);
+ q->num_bb_per_exec);
if (err) {
err = -EFAULT;
goto err_syncs;
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 59e8d1ed34f7..849e463c4ed8 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -33,7 +33,8 @@ enum xe_exec_queue_sched_prop {
static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
struct xe_vm *vm,
u32 logical_mask,
- u16 width, struct xe_hw_engine *hwe,
+ u16 num_bb_per_exec,
+ struct xe_hw_engine *hwe,
u32 flags)
{
struct xe_exec_queue *q;
@@ -44,7 +45,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
/* only kernel queues can be permanent */
XE_WARN_ON((flags & EXEC_QUEUE_FLAG_PERMANENT) && !(flags & EXEC_QUEUE_FLAG_KERNEL));
- q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * width, GFP_KERNEL);
+ q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * num_bb_per_exec, GFP_KERNEL);
if (!q)
return ERR_PTR(-ENOMEM);
@@ -55,7 +56,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
if (vm)
q->vm = xe_vm_get(vm);
q->class = hwe->class;
- q->width = width;
+ q->num_bb_per_exec = num_bb_per_exec;
q->logical_mask = logical_mask;
q->fence_irq = >->fence_irq[hwe->class];
q->ring_ops = gt->ring_ops[hwe->class];
@@ -77,7 +78,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
q->bind.fence_seqno = XE_FENCE_INITIAL_SEQNO;
}
- for (i = 0; i < width; ++i) {
+ for (i = 0; i < num_bb_per_exec; ++i) {
err = xe_lrc_init(q->lrc + i, hwe, q, vm, SZ_16K);
if (err)
goto err_lrc;
@@ -108,7 +109,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
}
struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
- u32 logical_mask, u16 width,
+ u32 logical_mask, u16 num_bb_per_exec,
struct xe_hw_engine *hwe, u32 flags)
{
struct xe_exec_queue *q;
@@ -119,7 +120,7 @@ struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
if (err)
return ERR_PTR(err);
}
- q = __xe_exec_queue_create(xe, vm, logical_mask, width, hwe, flags);
+ q = __xe_exec_queue_create(xe, vm, logical_mask, num_bb_per_exec, hwe, flags);
if (vm)
xe_vm_unlock(vm);
@@ -170,7 +171,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
{
int i;
- for (i = 0; i < q->width; ++i)
+ for (i = 0; i < q->num_bb_per_exec; ++i)
xe_lrc_finish(q->lrc + i);
if (q->vm)
xe_vm_put(q->vm);
@@ -512,15 +513,15 @@ find_hw_engine(struct xe_device *xe,
static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
struct drm_xe_engine_class_instance *eci,
- u16 width, u16 num_placements)
+ u16 num_bb_per_exec, u16 num_dispositions)
{
struct xe_hw_engine *hwe;
enum xe_hw_engine_id id;
u32 logical_mask = 0;
- if (XE_IOCTL_DBG(xe, width != 1))
+ if (XE_IOCTL_DBG(xe, num_bb_per_exec != 1))
return 0;
- if (XE_IOCTL_DBG(xe, num_placements != 1))
+ if (XE_IOCTL_DBG(xe, num_dispositions != 1))
return 0;
if (XE_IOCTL_DBG(xe, eci[0].engine_instance != 0))
return 0;
@@ -541,9 +542,9 @@ static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
struct drm_xe_engine_class_instance *eci,
- u16 width, u16 num_placements)
+ u16 num_bb_per_exec, u16 num_dispositions)
{
- int len = width * num_placements;
+ int len = num_bb_per_exec * num_dispositions;
int i, j, n;
u16 class;
u16 gt_id;
@@ -553,13 +554,13 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
len > 1))
return 0;
- for (i = 0; i < width; ++i) {
+ for (i = 0; i < num_bb_per_exec; ++i) {
u32 current_mask = 0;
- for (j = 0; j < num_placements; ++j) {
+ for (j = 0; j < num_dispositions; ++j) {
struct xe_hw_engine *hwe;
- n = j * width + i;
+ n = j * num_bb_per_exec + i;
hwe = find_hw_engine(xe, eci[n]);
if (XE_IOCTL_DBG(xe, !hwe))
@@ -575,7 +576,7 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
class = eci[n].engine_class;
gt_id = eci[n].gt_id;
- if (width == 1 || !i)
+ if (num_bb_per_exec == 1 || !i)
return_mask |= BIT(eci[n].engine_instance);
current_mask |= BIT(eci[n].engine_instance);
}
@@ -612,7 +613,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
return -EINVAL;
- len = args->width * args->num_placements;
+ len = args->num_bb_per_exec * args->num_dispositions;
if (XE_IOCTL_DBG(xe, !len || len > XE_HW_ENGINE_MAX_INSTANCE))
return -EINVAL;
@@ -637,8 +638,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
eci[0].gt_id = gt->info.id;
logical_mask = bind_exec_queue_logical_mask(xe, gt, eci,
- args->width,
- args->num_placements);
+ args->num_bb_per_exec,
+ args->num_dispositions);
if (XE_IOCTL_DBG(xe, !logical_mask))
return -EINVAL;
@@ -651,7 +652,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
migrate_vm = xe_migrate_get_vm(gt_to_tile(gt)->migrate);
new = xe_exec_queue_create(xe, migrate_vm, logical_mask,
- args->width, hwe,
+ args->num_bb_per_exec, hwe,
EXEC_QUEUE_FLAG_PERSISTENT |
EXEC_QUEUE_FLAG_VM |
(sync ? 0 :
@@ -678,8 +679,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
} else {
gt = xe_device_get_gt(xe, eci[0].gt_id);
logical_mask = calc_validate_logical_mask(xe, gt, eci,
- args->width,
- args->num_placements);
+ args->num_bb_per_exec,
+ args->num_dispositions);
if (XE_IOCTL_DBG(xe, !logical_mask))
return -EINVAL;
@@ -704,7 +705,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
}
q = xe_exec_queue_create(xe, vm, logical_mask,
- args->width, hwe,
+ args->num_bb_per_exec, hwe,
xe_vm_no_dma_fences(vm) ? 0 :
EXEC_QUEUE_FLAG_PERSISTENT);
up_read(&vm->lock);
@@ -827,7 +828,7 @@ bool xe_exec_queue_is_idle(struct xe_exec_queue *q)
if (xe_exec_queue_is_parallel(q)) {
int i;
- for (i = 0; i < q->width; ++i) {
+ for (i = 0; i < q->num_bb_per_exec; ++i) {
if (xe_lrc_seqno(&q->lrc[i]) !=
q->lrc[i].fence_ctx.next_seqno - 1)
return false;
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index 59a54bfb9a8c..6782f3ce9faf 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -15,7 +15,7 @@ struct xe_device;
struct xe_file;
struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
- u32 logical_mask, u16 width,
+ u32 logical_mask, u16 num_bb_per_exec,
struct xe_hw_engine *hw_engine, u32 flags);
struct xe_exec_queue *xe_exec_queue_create_class(struct xe_device *xe, struct xe_gt *gt,
struct xe_vm *vm,
@@ -40,7 +40,7 @@ static inline void xe_exec_queue_put(struct xe_exec_queue *q)
static inline bool xe_exec_queue_is_parallel(struct xe_exec_queue *q)
{
- return q->width > 1;
+ return q->num_bb_per_exec > 1;
}
bool xe_exec_queue_is_lr(struct xe_exec_queue *q);
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index ecd761177567..eb924a3e5d98 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -47,8 +47,8 @@ struct xe_exec_queue {
u32 logical_mask;
/** @name: name of this exec queue */
char name[MAX_FENCE_NAME_LEN];
- /** @width: width (number BB submitted per exec) of this exec queue */
- u16 width;
+ /** @num_bb_per_exec: the width of this exec queue */
+ u16 num_bb_per_exec;
/** @fence_irq: fence IRQ used to signal job completion */
struct xe_hw_fence_irq *fence_irq;
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 870dc5c532fa..b5a41a772445 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -259,7 +259,7 @@ static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa
if (xe_exec_queue_is_parallel(q))
bitmap_release_region(guc->submission_state.guc_ids_bitmap,
q->guc->id - GUC_ID_START_MLRC,
- order_base_2(q->width));
+ order_base_2(q->num_bb_per_exec));
else
ida_simple_remove(&guc->submission_state.guc_ids, q->guc->id);
}
@@ -283,7 +283,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
void *bitmap = guc->submission_state.guc_ids_bitmap;
ret = bitmap_find_free_region(bitmap, GUC_ID_NUMBER_MLRC,
- order_base_2(q->width));
+ order_base_2(q->num_bb_per_exec));
} else {
ret = ida_simple_get(&guc->submission_state.guc_ids, 0,
GUC_ID_NUMBER_SLRC, GFP_NOWAIT);
@@ -295,7 +295,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
if (xe_exec_queue_is_parallel(q))
q->guc->id += GUC_ID_START_MLRC;
- for (i = 0; i < q->width; ++i) {
+ for (i = 0; i < q->num_bb_per_exec; ++i) {
ptr = xa_store(&guc->submission_state.exec_queue_lookup,
q->guc->id + i, q, GFP_NOWAIT);
if (IS_ERR(ptr)) {
@@ -315,7 +315,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
{
mutex_lock(&guc->submission_state.lock);
- __release_guc_id(guc, q, q->width);
+ __release_guc_id(guc, q, q->num_bb_per_exec);
mutex_unlock(&guc->submission_state.lock);
}
@@ -426,11 +426,11 @@ static void __register_mlrc_engine(struct xe_guc *guc,
action[len++] = info->wq_base_lo;
action[len++] = info->wq_base_hi;
action[len++] = info->wq_size;
- action[len++] = q->width;
+ action[len++] = q->num_bb_per_exec;
action[len++] = info->hwlrca_lo;
action[len++] = info->hwlrca_hi;
- for (i = 1; i < q->width; ++i) {
+ for (i = 1; i < q->num_bb_per_exec; ++i) {
struct xe_lrc *lrc = q->lrc + i;
action[len++] = lower_32_bits(xe_lrc_descriptor(lrc));
@@ -578,7 +578,7 @@ static void wq_item_append(struct xe_exec_queue *q)
struct iosys_map map = xe_lrc_parallel_map(q->lrc);
#define WQ_HEADER_SIZE 4 /* Includes 1 LRC address too */
u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)];
- u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
+ u32 wqi_size = (q->num_bb_per_exec + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
u32 len_dw = (wqi_size / sizeof(u32)) - 1;
int i = 0, j;
@@ -595,7 +595,7 @@ static void wq_item_append(struct xe_exec_queue *q)
wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc->ring.tail / sizeof(u64));
wqi[i++] = 0;
- for (j = 1; j < q->width; ++j) {
+ for (j = 1; j < q->num_bb_per_exec; ++j) {
struct xe_lrc *lrc = q->lrc + j;
wqi[i++] = lrc->ring.tail / sizeof(u64);
@@ -766,17 +766,17 @@ static void simple_error_capture(struct xe_exec_queue *q)
struct xe_hw_engine *hwe;
enum xe_hw_engine_id id;
u32 adj_logical_mask = q->logical_mask;
- u32 width_mask = (0x1 << q->width) - 1;
+ u32 width_mask = (0x1 << q->num_bb_per_exec) - 1;
int i;
bool cookie;
if (q->vm && !q->vm->error_capture.capture_once) {
q->vm->error_capture.capture_once = true;
cookie = dma_fence_begin_signalling();
- for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
+ for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
if (adj_logical_mask & BIT(i)) {
adj_logical_mask |= width_mask << i;
- i += q->width;
+ i += q->num_bb_per_exec;
} else {
++i;
}
@@ -1462,7 +1462,7 @@ static void guc_exec_queue_start(struct xe_exec_queue *q)
int i;
trace_xe_exec_queue_resubmit(q);
- for (i = 0; i < q->width; ++i)
+ for (i = 0; i < q->num_bb_per_exec; ++i)
xe_lrc_set_ring_head(q->lrc + i, q->lrc[i].ring.tail);
drm_sched_resubmit_jobs(sched);
}
@@ -1508,7 +1508,7 @@ g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
}
xe_assert(xe, guc_id >= q->guc->id);
- xe_assert(xe, guc_id < (q->guc->id + q->width));
+ xe_assert(xe, guc_id < (q->guc->id + q->num_bb_per_exec));
return q;
}
@@ -1768,20 +1768,20 @@ xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q)
memcpy(&snapshot->name, &q->name, sizeof(snapshot->name));
snapshot->class = q->class;
snapshot->logical_mask = q->logical_mask;
- snapshot->width = q->width;
+ snapshot->width = q->num_bb_per_exec;
snapshot->refcount = kref_read(&q->refcount);
snapshot->sched_timeout = sched->timeout;
snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us;
snapshot->sched_props.preempt_timeout_us =
q->sched_props.preempt_timeout_us;
- snapshot->lrc = kmalloc_array(q->width, sizeof(struct lrc_snapshot),
+ snapshot->lrc = kmalloc_array(q->num_bb_per_exec, sizeof(struct lrc_snapshot),
GFP_ATOMIC);
if (!snapshot->lrc) {
drm_err(&xe->drm, "Skipping GuC Engine LRC snapshot.\n");
} else {
- for (i = 0; i < q->width; ++i) {
+ for (i = 0; i < q->num_bb_per_exec; ++i) {
struct xe_lrc *lrc = q->lrc + i;
snapshot->lrc[i].context_desc =
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 59e0aa2d6a4c..d3d671784e8e 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -383,7 +383,7 @@ static void emit_job_gen12_gsc(struct xe_sched_job *job)
{
struct xe_gt *gt = job->q->gt;
- xe_gt_assert(gt, job->q->width <= 1); /* no parallel submission for GSCCS */
+ xe_gt_assert(gt, job->q->num_bb_per_exec <= 1); /* no parallel submission for GSCCS */
__emit_job_gen12_simple(job, job->q->lrc,
job->batch_addr[0],
@@ -400,7 +400,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
return;
}
- for (i = 0; i < job->q->width; ++i)
+ for (i = 0; i < job->q->num_bb_per_exec; ++i)
__emit_job_gen12_simple(job, job->q->lrc + i,
job->batch_addr[i],
xe_sched_job_seqno(job));
@@ -411,7 +411,7 @@ static void emit_job_gen12_video(struct xe_sched_job *job)
int i;
/* FIXME: Not doing parallel handshake for now */
- for (i = 0; i < job->q->width; ++i)
+ for (i = 0; i < job->q->num_bb_per_exec; ++i)
__emit_job_gen12_video(job, job->q->lrc + i,
job->batch_addr[i],
xe_sched_job_seqno(job));
@@ -421,7 +421,7 @@ static void emit_job_gen12_render_compute(struct xe_sched_job *job)
{
int i;
- for (i = 0; i < job->q->width; ++i)
+ for (i = 0; i < job->q->num_bb_per_exec; ++i)
__emit_job_gen12_render_compute(job, job->q->lrc + i,
job->batch_addr[i],
xe_sched_job_seqno(job));
diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c
index adbd82f8744e..1884b6b6b398 100644
--- a/drivers/gpu/drm/xe/xe_sched_job.c
+++ b/drivers/gpu/drm/xe/xe_sched_job.c
@@ -117,13 +117,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
} else {
struct dma_fence_array *cf;
- fences = kmalloc_array(q->width, sizeof(*fences), GFP_KERNEL);
+ fences = kmalloc_array(q->num_bb_per_exec, sizeof(*fences), GFP_KERNEL);
if (!fences) {
err = -ENOMEM;
goto err_sched_job;
}
- for (j = 0; j < q->width; ++j) {
+ for (j = 0; j < q->num_bb_per_exec; ++j) {
fences[j] = xe_lrc_create_seqno_fence(q->lrc + j);
if (IS_ERR(fences[j])) {
err = PTR_ERR(fences[j]);
@@ -131,7 +131,7 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
}
}
- cf = dma_fence_array_create(q->width, fences,
+ cf = dma_fence_array_create(q->num_bb_per_exec, fences,
q->parallel.composite_fence_ctx,
q->parallel.composite_fence_seqno++,
false);
@@ -142,13 +142,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
}
/* Sanity check */
- for (j = 0; j < q->width; ++j)
+ for (j = 0; j < q->num_bb_per_exec; ++j)
xe_assert(job_to_xe(job), cf->base.seqno == fences[j]->seqno);
job->fence = &cf->base;
}
- width = q->width;
+ width = q->num_bb_per_exec;
if (is_migration)
width = 2;
diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
index d55dd1521df3..dcf28aaeb78a 100644
--- a/drivers/gpu/drm/xe/xe_trace.h
+++ b/drivers/gpu/drm/xe/xe_trace.h
@@ -112,7 +112,7 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
__field(enum xe_engine_class, class)
__field(u32, logical_mask)
__field(u8, gt_id)
- __field(u16, width)
+ __field(u16, num_bb_per_exec)
__field(u16, guc_id)
__field(u32, guc_state)
__field(u32, flags)
@@ -122,15 +122,15 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
__entry->class = q->class;
__entry->logical_mask = q->logical_mask;
__entry->gt_id = q->gt->info.id;
- __entry->width = q->width;
+ __entry->num_bb_per_exec = q->num_bb_per_exec;
__entry->guc_id = q->guc->id;
__entry->guc_state = atomic_read(&q->guc->state);
__entry->flags = q->flags;
),
- TP_printk("%d:0x%x, gt=%d, width=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
+ TP_printk("%d:0x%x, gt=%d, num_bb_per_exec=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
__entry->class, __entry->logical_mask,
- __entry->gt_id, __entry->width, __entry->guc_id,
+ __entry->gt_id, __entry->num_bb_per_exec, __entry->guc_id,
__entry->guc_state, __entry->flags)
);
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 2d0fb4386a69..a6c70b8697c7 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1013,11 +1013,17 @@ struct drm_xe_exec_queue_create {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
- /** @width: submission width (number BB per exec) for this exec queue */
- __u16 width;
+ /**
+ * @num_bb_per_exec: Indicates a submission width for this exec queue,
+ * for how many batch buffers can be submitted in parallel.
+ */
+ __u16 num_bb_per_exec;
- /** @num_placements: number of valid placements for this exec queue */
- __u16 num_placements;
+ /**
+ * @num_dispositions: Indicates how the batch buffers will be
+ * distributed to the hardware engines listed on @instance.
+ */
+ __u16 num_dispositions;
/** @vm_id: VM to use for this exec queue */
__u32 vm_id;
@@ -1032,8 +1038,8 @@ struct drm_xe_exec_queue_create {
* @instances: user pointer to a 2-d array of struct
* drm_xe_engine_class_instance
*
- * length = width (i) * num_placements (j)
- * index = j + i * width
+ * length = num_bb_per_exec (i) * num_dispositions (j)
+ * index = j + i * num_bb_per_exec
*/
__u64 instances;
@@ -1143,7 +1149,7 @@ struct drm_xe_exec {
/**
* @num_batch_buffer: number of batch buffer in this exec, must match
- * the width of the engine
+ * the @num_bb_per_exec of the struct drm_xe_exec_queue_create
*/
__u16 num_batch_buffer;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 38/50] drm/xe/uapi: Rename couple exec_queue items
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 38/50] drm/xe/uapi: Rename couple exec_queue items Francois Dugast
@ 2023-11-09 17:14 ` Souza, Jose
2023-11-09 18:40 ` Rodrigo Vivi
0 siblings, 1 reply; 81+ messages in thread
From: Souza, Jose @ 2023-11-09 17:14 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Dugast, Francois; +Cc: Vivi, Rodrigo
On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> 'Placement' is no used in many terms around the memory_region selection
> where the BO or the page table will live. Also, the job itself deserves
> a word of more action since it is dispatched to the engine.
num_dispositions is a bad name, placement is better in my opinion.
it says exactly what is does, in what hw engines the batch buffers can be placed.
>
> 'width' is so generic and in graphics world can mean many other different
> things. Let's be more specific here on the intent of that.
This one sounds good.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_devcoredump.c | 8 ++--
> drivers/gpu/drm/xe/xe_exec.c | 4 +-
> drivers/gpu/drm/xe/xe_exec_queue.c | 49 ++++++++++++------------
> drivers/gpu/drm/xe/xe_exec_queue.h | 4 +-
> drivers/gpu/drm/xe/xe_exec_queue_types.h | 4 +-
> drivers/gpu/drm/xe/xe_guc_submit.c | 32 ++++++++--------
> drivers/gpu/drm/xe/xe_ring_ops.c | 8 ++--
> drivers/gpu/drm/xe/xe_sched_job.c | 10 ++---
> drivers/gpu/drm/xe/xe_trace.h | 8 ++--
> include/uapi/drm/xe_drm.h | 20 ++++++----
> 10 files changed, 77 insertions(+), 70 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> index 68abc0b195be..b4e8de4903b9 100644
> --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
> @@ -130,7 +130,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> struct xe_hw_engine *hwe;
> enum xe_hw_engine_id id;
> u32 adj_logical_mask = q->logical_mask;
> - u32 width_mask = (0x1 << q->width) - 1;
> + u32 num_bb_per_exec_mask = (0x1 << q->num_bb_per_exec) - 1;
> int i;
> bool cookie;
>
> @@ -138,10 +138,10 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> ss->boot_time = ktime_get_boottime();
>
> cookie = dma_fence_begin_signalling();
> - for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> + for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> if (adj_logical_mask & BIT(i)) {
> - adj_logical_mask |= width_mask << i;
> - i += q->width;
> + adj_logical_mask |= num_bb_per_exec_mask << i;
> + i += q->num_bb_per_exec;
> } else {
> ++i;
> }
> diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
> index 28e84a0bbeb0..ca922635db89 100644
> --- a/drivers/gpu/drm/xe/xe_exec.c
> +++ b/drivers/gpu/drm/xe/xe_exec.c
> @@ -161,7 +161,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_VM))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, q->width != args->num_batch_buffer))
> + if (XE_IOCTL_DBG(xe, q->num_bb_per_exec != args->num_batch_buffer))
> return -EINVAL;
>
> if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_BANNED)) {
> @@ -189,7 +189,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>
> if (xe_exec_queue_is_parallel(q)) {
> err = __copy_from_user(addresses, addresses_user, sizeof(u64) *
> - q->width);
> + q->num_bb_per_exec);
> if (err) {
> err = -EFAULT;
> goto err_syncs;
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 59e8d1ed34f7..849e463c4ed8 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -33,7 +33,8 @@ enum xe_exec_queue_sched_prop {
> static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> struct xe_vm *vm,
> u32 logical_mask,
> - u16 width, struct xe_hw_engine *hwe,
> + u16 num_bb_per_exec,
> + struct xe_hw_engine *hwe,
> u32 flags)
> {
> struct xe_exec_queue *q;
> @@ -44,7 +45,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> /* only kernel queues can be permanent */
> XE_WARN_ON((flags & EXEC_QUEUE_FLAG_PERMANENT) && !(flags & EXEC_QUEUE_FLAG_KERNEL));
>
> - q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * width, GFP_KERNEL);
> + q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * num_bb_per_exec, GFP_KERNEL);
> if (!q)
> return ERR_PTR(-ENOMEM);
>
> @@ -55,7 +56,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> if (vm)
> q->vm = xe_vm_get(vm);
> q->class = hwe->class;
> - q->width = width;
> + q->num_bb_per_exec = num_bb_per_exec;
> q->logical_mask = logical_mask;
> q->fence_irq = >->fence_irq[hwe->class];
> q->ring_ops = gt->ring_ops[hwe->class];
> @@ -77,7 +78,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> q->bind.fence_seqno = XE_FENCE_INITIAL_SEQNO;
> }
>
> - for (i = 0; i < width; ++i) {
> + for (i = 0; i < num_bb_per_exec; ++i) {
> err = xe_lrc_init(q->lrc + i, hwe, q, vm, SZ_16K);
> if (err)
> goto err_lrc;
> @@ -108,7 +109,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> }
>
> struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
> - u32 logical_mask, u16 width,
> + u32 logical_mask, u16 num_bb_per_exec,
> struct xe_hw_engine *hwe, u32 flags)
> {
> struct xe_exec_queue *q;
> @@ -119,7 +120,7 @@ struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
> if (err)
> return ERR_PTR(err);
> }
> - q = __xe_exec_queue_create(xe, vm, logical_mask, width, hwe, flags);
> + q = __xe_exec_queue_create(xe, vm, logical_mask, num_bb_per_exec, hwe, flags);
> if (vm)
> xe_vm_unlock(vm);
>
> @@ -170,7 +171,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
> {
> int i;
>
> - for (i = 0; i < q->width; ++i)
> + for (i = 0; i < q->num_bb_per_exec; ++i)
> xe_lrc_finish(q->lrc + i);
> if (q->vm)
> xe_vm_put(q->vm);
> @@ -512,15 +513,15 @@ find_hw_engine(struct xe_device *xe,
>
> static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> struct drm_xe_engine_class_instance *eci,
> - u16 width, u16 num_placements)
> + u16 num_bb_per_exec, u16 num_dispositions)
> {
> struct xe_hw_engine *hwe;
> enum xe_hw_engine_id id;
> u32 logical_mask = 0;
>
> - if (XE_IOCTL_DBG(xe, width != 1))
> + if (XE_IOCTL_DBG(xe, num_bb_per_exec != 1))
> return 0;
> - if (XE_IOCTL_DBG(xe, num_placements != 1))
> + if (XE_IOCTL_DBG(xe, num_dispositions != 1))
> return 0;
> if (XE_IOCTL_DBG(xe, eci[0].engine_instance != 0))
> return 0;
> @@ -541,9 +542,9 @@ static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
>
> static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> struct drm_xe_engine_class_instance *eci,
> - u16 width, u16 num_placements)
> + u16 num_bb_per_exec, u16 num_dispositions)
> {
> - int len = width * num_placements;
> + int len = num_bb_per_exec * num_dispositions;
> int i, j, n;
> u16 class;
> u16 gt_id;
> @@ -553,13 +554,13 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> len > 1))
> return 0;
>
> - for (i = 0; i < width; ++i) {
> + for (i = 0; i < num_bb_per_exec; ++i) {
> u32 current_mask = 0;
>
> - for (j = 0; j < num_placements; ++j) {
> + for (j = 0; j < num_dispositions; ++j) {
> struct xe_hw_engine *hwe;
>
> - n = j * width + i;
> + n = j * num_bb_per_exec + i;
>
> hwe = find_hw_engine(xe, eci[n]);
> if (XE_IOCTL_DBG(xe, !hwe))
> @@ -575,7 +576,7 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> class = eci[n].engine_class;
> gt_id = eci[n].gt_id;
>
> - if (width == 1 || !i)
> + if (num_bb_per_exec == 1 || !i)
> return_mask |= BIT(eci[n].engine_instance);
> current_mask |= BIT(eci[n].engine_instance);
> }
> @@ -612,7 +613,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
> return -EINVAL;
>
> - len = args->width * args->num_placements;
> + len = args->num_bb_per_exec * args->num_dispositions;
> if (XE_IOCTL_DBG(xe, !len || len > XE_HW_ENGINE_MAX_INSTANCE))
> return -EINVAL;
>
> @@ -637,8 +638,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
>
> eci[0].gt_id = gt->info.id;
> logical_mask = bind_exec_queue_logical_mask(xe, gt, eci,
> - args->width,
> - args->num_placements);
> + args->num_bb_per_exec,
> + args->num_dispositions);
> if (XE_IOCTL_DBG(xe, !logical_mask))
> return -EINVAL;
>
> @@ -651,7 +652,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
>
> migrate_vm = xe_migrate_get_vm(gt_to_tile(gt)->migrate);
> new = xe_exec_queue_create(xe, migrate_vm, logical_mask,
> - args->width, hwe,
> + args->num_bb_per_exec, hwe,
> EXEC_QUEUE_FLAG_PERSISTENT |
> EXEC_QUEUE_FLAG_VM |
> (sync ? 0 :
> @@ -678,8 +679,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> } else {
> gt = xe_device_get_gt(xe, eci[0].gt_id);
> logical_mask = calc_validate_logical_mask(xe, gt, eci,
> - args->width,
> - args->num_placements);
> + args->num_bb_per_exec,
> + args->num_dispositions);
> if (XE_IOCTL_DBG(xe, !logical_mask))
> return -EINVAL;
>
> @@ -704,7 +705,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> }
>
> q = xe_exec_queue_create(xe, vm, logical_mask,
> - args->width, hwe,
> + args->num_bb_per_exec, hwe,
> xe_vm_no_dma_fences(vm) ? 0 :
> EXEC_QUEUE_FLAG_PERSISTENT);
> up_read(&vm->lock);
> @@ -827,7 +828,7 @@ bool xe_exec_queue_is_idle(struct xe_exec_queue *q)
> if (xe_exec_queue_is_parallel(q)) {
> int i;
>
> - for (i = 0; i < q->width; ++i) {
> + for (i = 0; i < q->num_bb_per_exec; ++i) {
> if (xe_lrc_seqno(&q->lrc[i]) !=
> q->lrc[i].fence_ctx.next_seqno - 1)
> return false;
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
> index 59a54bfb9a8c..6782f3ce9faf 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> @@ -15,7 +15,7 @@ struct xe_device;
> struct xe_file;
>
> struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
> - u32 logical_mask, u16 width,
> + u32 logical_mask, u16 num_bb_per_exec,
> struct xe_hw_engine *hw_engine, u32 flags);
> struct xe_exec_queue *xe_exec_queue_create_class(struct xe_device *xe, struct xe_gt *gt,
> struct xe_vm *vm,
> @@ -40,7 +40,7 @@ static inline void xe_exec_queue_put(struct xe_exec_queue *q)
>
> static inline bool xe_exec_queue_is_parallel(struct xe_exec_queue *q)
> {
> - return q->width > 1;
> + return q->num_bb_per_exec > 1;
> }
>
> bool xe_exec_queue_is_lr(struct xe_exec_queue *q);
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> index ecd761177567..eb924a3e5d98 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> @@ -47,8 +47,8 @@ struct xe_exec_queue {
> u32 logical_mask;
> /** @name: name of this exec queue */
> char name[MAX_FENCE_NAME_LEN];
> - /** @width: width (number BB submitted per exec) of this exec queue */
> - u16 width;
> + /** @num_bb_per_exec: the width of this exec queue */
> + u16 num_bb_per_exec;
> /** @fence_irq: fence IRQ used to signal job completion */
> struct xe_hw_fence_irq *fence_irq;
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 870dc5c532fa..b5a41a772445 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -259,7 +259,7 @@ static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa
> if (xe_exec_queue_is_parallel(q))
> bitmap_release_region(guc->submission_state.guc_ids_bitmap,
> q->guc->id - GUC_ID_START_MLRC,
> - order_base_2(q->width));
> + order_base_2(q->num_bb_per_exec));
> else
> ida_simple_remove(&guc->submission_state.guc_ids, q->guc->id);
> }
> @@ -283,7 +283,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> void *bitmap = guc->submission_state.guc_ids_bitmap;
>
> ret = bitmap_find_free_region(bitmap, GUC_ID_NUMBER_MLRC,
> - order_base_2(q->width));
> + order_base_2(q->num_bb_per_exec));
> } else {
> ret = ida_simple_get(&guc->submission_state.guc_ids, 0,
> GUC_ID_NUMBER_SLRC, GFP_NOWAIT);
> @@ -295,7 +295,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> if (xe_exec_queue_is_parallel(q))
> q->guc->id += GUC_ID_START_MLRC;
>
> - for (i = 0; i < q->width; ++i) {
> + for (i = 0; i < q->num_bb_per_exec; ++i) {
> ptr = xa_store(&guc->submission_state.exec_queue_lookup,
> q->guc->id + i, q, GFP_NOWAIT);
> if (IS_ERR(ptr)) {
> @@ -315,7 +315,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> {
> mutex_lock(&guc->submission_state.lock);
> - __release_guc_id(guc, q, q->width);
> + __release_guc_id(guc, q, q->num_bb_per_exec);
> mutex_unlock(&guc->submission_state.lock);
> }
>
> @@ -426,11 +426,11 @@ static void __register_mlrc_engine(struct xe_guc *guc,
> action[len++] = info->wq_base_lo;
> action[len++] = info->wq_base_hi;
> action[len++] = info->wq_size;
> - action[len++] = q->width;
> + action[len++] = q->num_bb_per_exec;
> action[len++] = info->hwlrca_lo;
> action[len++] = info->hwlrca_hi;
>
> - for (i = 1; i < q->width; ++i) {
> + for (i = 1; i < q->num_bb_per_exec; ++i) {
> struct xe_lrc *lrc = q->lrc + i;
>
> action[len++] = lower_32_bits(xe_lrc_descriptor(lrc));
> @@ -578,7 +578,7 @@ static void wq_item_append(struct xe_exec_queue *q)
> struct iosys_map map = xe_lrc_parallel_map(q->lrc);
> #define WQ_HEADER_SIZE 4 /* Includes 1 LRC address too */
> u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)];
> - u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
> + u32 wqi_size = (q->num_bb_per_exec + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
> u32 len_dw = (wqi_size / sizeof(u32)) - 1;
> int i = 0, j;
>
> @@ -595,7 +595,7 @@ static void wq_item_append(struct xe_exec_queue *q)
> wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
> FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc->ring.tail / sizeof(u64));
> wqi[i++] = 0;
> - for (j = 1; j < q->width; ++j) {
> + for (j = 1; j < q->num_bb_per_exec; ++j) {
> struct xe_lrc *lrc = q->lrc + j;
>
> wqi[i++] = lrc->ring.tail / sizeof(u64);
> @@ -766,17 +766,17 @@ static void simple_error_capture(struct xe_exec_queue *q)
> struct xe_hw_engine *hwe;
> enum xe_hw_engine_id id;
> u32 adj_logical_mask = q->logical_mask;
> - u32 width_mask = (0x1 << q->width) - 1;
> + u32 width_mask = (0x1 << q->num_bb_per_exec) - 1;
> int i;
> bool cookie;
>
> if (q->vm && !q->vm->error_capture.capture_once) {
> q->vm->error_capture.capture_once = true;
> cookie = dma_fence_begin_signalling();
> - for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> + for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> if (adj_logical_mask & BIT(i)) {
> adj_logical_mask |= width_mask << i;
> - i += q->width;
> + i += q->num_bb_per_exec;
> } else {
> ++i;
> }
> @@ -1462,7 +1462,7 @@ static void guc_exec_queue_start(struct xe_exec_queue *q)
> int i;
>
> trace_xe_exec_queue_resubmit(q);
> - for (i = 0; i < q->width; ++i)
> + for (i = 0; i < q->num_bb_per_exec; ++i)
> xe_lrc_set_ring_head(q->lrc + i, q->lrc[i].ring.tail);
> drm_sched_resubmit_jobs(sched);
> }
> @@ -1508,7 +1508,7 @@ g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
> }
>
> xe_assert(xe, guc_id >= q->guc->id);
> - xe_assert(xe, guc_id < (q->guc->id + q->width));
> + xe_assert(xe, guc_id < (q->guc->id + q->num_bb_per_exec));
>
> return q;
> }
> @@ -1768,20 +1768,20 @@ xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q)
> memcpy(&snapshot->name, &q->name, sizeof(snapshot->name));
> snapshot->class = q->class;
> snapshot->logical_mask = q->logical_mask;
> - snapshot->width = q->width;
> + snapshot->width = q->num_bb_per_exec;
> snapshot->refcount = kref_read(&q->refcount);
> snapshot->sched_timeout = sched->timeout;
> snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us;
> snapshot->sched_props.preempt_timeout_us =
> q->sched_props.preempt_timeout_us;
>
> - snapshot->lrc = kmalloc_array(q->width, sizeof(struct lrc_snapshot),
> + snapshot->lrc = kmalloc_array(q->num_bb_per_exec, sizeof(struct lrc_snapshot),
> GFP_ATOMIC);
>
> if (!snapshot->lrc) {
> drm_err(&xe->drm, "Skipping GuC Engine LRC snapshot.\n");
> } else {
> - for (i = 0; i < q->width; ++i) {
> + for (i = 0; i < q->num_bb_per_exec; ++i) {
> struct xe_lrc *lrc = q->lrc + i;
>
> snapshot->lrc[i].context_desc =
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> index 59e0aa2d6a4c..d3d671784e8e 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> @@ -383,7 +383,7 @@ static void emit_job_gen12_gsc(struct xe_sched_job *job)
> {
> struct xe_gt *gt = job->q->gt;
>
> - xe_gt_assert(gt, job->q->width <= 1); /* no parallel submission for GSCCS */
> + xe_gt_assert(gt, job->q->num_bb_per_exec <= 1); /* no parallel submission for GSCCS */
>
> __emit_job_gen12_simple(job, job->q->lrc,
> job->batch_addr[0],
> @@ -400,7 +400,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
> return;
> }
>
> - for (i = 0; i < job->q->width; ++i)
> + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> __emit_job_gen12_simple(job, job->q->lrc + i,
> job->batch_addr[i],
> xe_sched_job_seqno(job));
> @@ -411,7 +411,7 @@ static void emit_job_gen12_video(struct xe_sched_job *job)
> int i;
>
> /* FIXME: Not doing parallel handshake for now */
> - for (i = 0; i < job->q->width; ++i)
> + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> __emit_job_gen12_video(job, job->q->lrc + i,
> job->batch_addr[i],
> xe_sched_job_seqno(job));
> @@ -421,7 +421,7 @@ static void emit_job_gen12_render_compute(struct xe_sched_job *job)
> {
> int i;
>
> - for (i = 0; i < job->q->width; ++i)
> + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> __emit_job_gen12_render_compute(job, job->q->lrc + i,
> job->batch_addr[i],
> xe_sched_job_seqno(job));
> diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c
> index adbd82f8744e..1884b6b6b398 100644
> --- a/drivers/gpu/drm/xe/xe_sched_job.c
> +++ b/drivers/gpu/drm/xe/xe_sched_job.c
> @@ -117,13 +117,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> } else {
> struct dma_fence_array *cf;
>
> - fences = kmalloc_array(q->width, sizeof(*fences), GFP_KERNEL);
> + fences = kmalloc_array(q->num_bb_per_exec, sizeof(*fences), GFP_KERNEL);
> if (!fences) {
> err = -ENOMEM;
> goto err_sched_job;
> }
>
> - for (j = 0; j < q->width; ++j) {
> + for (j = 0; j < q->num_bb_per_exec; ++j) {
> fences[j] = xe_lrc_create_seqno_fence(q->lrc + j);
> if (IS_ERR(fences[j])) {
> err = PTR_ERR(fences[j]);
> @@ -131,7 +131,7 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> }
> }
>
> - cf = dma_fence_array_create(q->width, fences,
> + cf = dma_fence_array_create(q->num_bb_per_exec, fences,
> q->parallel.composite_fence_ctx,
> q->parallel.composite_fence_seqno++,
> false);
> @@ -142,13 +142,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> }
>
> /* Sanity check */
> - for (j = 0; j < q->width; ++j)
> + for (j = 0; j < q->num_bb_per_exec; ++j)
> xe_assert(job_to_xe(job), cf->base.seqno == fences[j]->seqno);
>
> job->fence = &cf->base;
> }
>
> - width = q->width;
> + width = q->num_bb_per_exec;
> if (is_migration)
> width = 2;
>
> diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
> index d55dd1521df3..dcf28aaeb78a 100644
> --- a/drivers/gpu/drm/xe/xe_trace.h
> +++ b/drivers/gpu/drm/xe/xe_trace.h
> @@ -112,7 +112,7 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
> __field(enum xe_engine_class, class)
> __field(u32, logical_mask)
> __field(u8, gt_id)
> - __field(u16, width)
> + __field(u16, num_bb_per_exec)
> __field(u16, guc_id)
> __field(u32, guc_state)
> __field(u32, flags)
> @@ -122,15 +122,15 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
> __entry->class = q->class;
> __entry->logical_mask = q->logical_mask;
> __entry->gt_id = q->gt->info.id;
> - __entry->width = q->width;
> + __entry->num_bb_per_exec = q->num_bb_per_exec;
> __entry->guc_id = q->guc->id;
> __entry->guc_state = atomic_read(&q->guc->state);
> __entry->flags = q->flags;
> ),
>
> - TP_printk("%d:0x%x, gt=%d, width=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
> + TP_printk("%d:0x%x, gt=%d, num_bb_per_exec=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
> __entry->class, __entry->logical_mask,
> - __entry->gt_id, __entry->width, __entry->guc_id,
> + __entry->gt_id, __entry->num_bb_per_exec, __entry->guc_id,
> __entry->guc_state, __entry->flags)
> );
>
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 2d0fb4386a69..a6c70b8697c7 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -1013,11 +1013,17 @@ struct drm_xe_exec_queue_create {
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> - /** @width: submission width (number BB per exec) for this exec queue */
> - __u16 width;
> + /**
> + * @num_bb_per_exec: Indicates a submission width for this exec queue,
> + * for how many batch buffers can be submitted in parallel.
'can' sounds like 'up to' in here, would change that to 'will'.
> + */
> + __u16 num_bb_per_exec;
>
> - /** @num_placements: number of valid placements for this exec queue */
> - __u16 num_placements;
> + /**
> + * @num_dispositions: Indicates how the batch buffers will be
> + * distributed to the hardware engines listed on @instance.
> + */
> + __u16 num_dispositions;
>
> /** @vm_id: VM to use for this exec queue */
> __u32 vm_id;
> @@ -1032,8 +1038,8 @@ struct drm_xe_exec_queue_create {
> * @instances: user pointer to a 2-d array of struct
> * drm_xe_engine_class_instance
> *
> - * length = width (i) * num_placements (j)
> - * index = j + i * width
> + * length = num_bb_per_exec (i) * num_dispositions (j)
> + * index = j + i * num_bb_per_exec
> */
> __u64 instances;
>
> @@ -1143,7 +1149,7 @@ struct drm_xe_exec {
>
> /**
> * @num_batch_buffer: number of batch buffer in this exec, must match
> - * the width of the engine
> + * the @num_bb_per_exec of the struct drm_xe_exec_queue_create
> */
> __u16 num_batch_buffer;
>
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 38/50] drm/xe/uapi: Rename couple exec_queue items
2023-11-09 17:14 ` Souza, Jose
@ 2023-11-09 18:40 ` Rodrigo Vivi
2023-11-09 20:02 ` Souza, Jose
0 siblings, 1 reply; 81+ messages in thread
From: Rodrigo Vivi @ 2023-11-09 18:40 UTC (permalink / raw)
To: Souza, Jose; +Cc: Dugast, Francois, intel-xe@lists.freedesktop.org
On Thu, Nov 09, 2023 at 05:14:17PM +0000, Souza, Jose wrote:
> On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> > 'Placement' is no used in many terms around the memory_region selection
> > where the BO or the page table will live. Also, the job itself deserves
> > a word of more action since it is dispatched to the engine.
>
> num_dispositions is a bad name, placement is better in my opinion.
> it says exactly what is does, in what hw engines the batch buffers can be placed.
Please take a look to the patch 43 in this series or to the new squashed
version in the take2-v3 that Francois just sent.
[PATCH v2 43/50] squash! drm/xe/uapi: Rename couple exec_queue items
I don't like the 'placement' word exactly because it is not true that
the batch buffer is 'placed' in the engine. The batch buffer is placed
in memory and we now have 'placement' variables on memory regions.
So, double confusing.
After BB is placed in the memory, then the instruction with offset
of that placement is sent to the engines so the EUs can find that.
So, let's keep placement name in the memory and use something else
for the engine. Please take a look to the final patch and then we
continue the discussion there trying to find a better naming.
Thanks,
Rodrigo.
>
> >
> > 'width' is so generic and in graphics world can mean many other different
> > things. Let's be more specific here on the intent of that.
>
> This one sounds good.
>
> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_devcoredump.c | 8 ++--
> > drivers/gpu/drm/xe/xe_exec.c | 4 +-
> > drivers/gpu/drm/xe/xe_exec_queue.c | 49 ++++++++++++------------
> > drivers/gpu/drm/xe/xe_exec_queue.h | 4 +-
> > drivers/gpu/drm/xe/xe_exec_queue_types.h | 4 +-
> > drivers/gpu/drm/xe/xe_guc_submit.c | 32 ++++++++--------
> > drivers/gpu/drm/xe/xe_ring_ops.c | 8 ++--
> > drivers/gpu/drm/xe/xe_sched_job.c | 10 ++---
> > drivers/gpu/drm/xe/xe_trace.h | 8 ++--
> > include/uapi/drm/xe_drm.h | 20 ++++++----
> > 10 files changed, 77 insertions(+), 70 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> > index 68abc0b195be..b4e8de4903b9 100644
> > --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> > +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
> > @@ -130,7 +130,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> > struct xe_hw_engine *hwe;
> > enum xe_hw_engine_id id;
> > u32 adj_logical_mask = q->logical_mask;
> > - u32 width_mask = (0x1 << q->width) - 1;
> > + u32 num_bb_per_exec_mask = (0x1 << q->num_bb_per_exec) - 1;
> > int i;
> > bool cookie;
> >
> > @@ -138,10 +138,10 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> > ss->boot_time = ktime_get_boottime();
> >
> > cookie = dma_fence_begin_signalling();
> > - for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > + for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > if (adj_logical_mask & BIT(i)) {
> > - adj_logical_mask |= width_mask << i;
> > - i += q->width;
> > + adj_logical_mask |= num_bb_per_exec_mask << i;
> > + i += q->num_bb_per_exec;
> > } else {
> > ++i;
> > }
> > diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
> > index 28e84a0bbeb0..ca922635db89 100644
> > --- a/drivers/gpu/drm/xe/xe_exec.c
> > +++ b/drivers/gpu/drm/xe/xe_exec.c
> > @@ -161,7 +161,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_VM))
> > return -EINVAL;
> >
> > - if (XE_IOCTL_DBG(xe, q->width != args->num_batch_buffer))
> > + if (XE_IOCTL_DBG(xe, q->num_bb_per_exec != args->num_batch_buffer))
> > return -EINVAL;
> >
> > if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_BANNED)) {
> > @@ -189,7 +189,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> >
> > if (xe_exec_queue_is_parallel(q)) {
> > err = __copy_from_user(addresses, addresses_user, sizeof(u64) *
> > - q->width);
> > + q->num_bb_per_exec);
> > if (err) {
> > err = -EFAULT;
> > goto err_syncs;
> > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> > index 59e8d1ed34f7..849e463c4ed8 100644
> > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > @@ -33,7 +33,8 @@ enum xe_exec_queue_sched_prop {
> > static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > struct xe_vm *vm,
> > u32 logical_mask,
> > - u16 width, struct xe_hw_engine *hwe,
> > + u16 num_bb_per_exec,
> > + struct xe_hw_engine *hwe,
> > u32 flags)
> > {
> > struct xe_exec_queue *q;
> > @@ -44,7 +45,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > /* only kernel queues can be permanent */
> > XE_WARN_ON((flags & EXEC_QUEUE_FLAG_PERMANENT) && !(flags & EXEC_QUEUE_FLAG_KERNEL));
> >
> > - q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * width, GFP_KERNEL);
> > + q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * num_bb_per_exec, GFP_KERNEL);
> > if (!q)
> > return ERR_PTR(-ENOMEM);
> >
> > @@ -55,7 +56,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > if (vm)
> > q->vm = xe_vm_get(vm);
> > q->class = hwe->class;
> > - q->width = width;
> > + q->num_bb_per_exec = num_bb_per_exec;
> > q->logical_mask = logical_mask;
> > q->fence_irq = >->fence_irq[hwe->class];
> > q->ring_ops = gt->ring_ops[hwe->class];
> > @@ -77,7 +78,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > q->bind.fence_seqno = XE_FENCE_INITIAL_SEQNO;
> > }
> >
> > - for (i = 0; i < width; ++i) {
> > + for (i = 0; i < num_bb_per_exec; ++i) {
> > err = xe_lrc_init(q->lrc + i, hwe, q, vm, SZ_16K);
> > if (err)
> > goto err_lrc;
> > @@ -108,7 +109,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > }
> >
> > struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
> > - u32 logical_mask, u16 width,
> > + u32 logical_mask, u16 num_bb_per_exec,
> > struct xe_hw_engine *hwe, u32 flags)
> > {
> > struct xe_exec_queue *q;
> > @@ -119,7 +120,7 @@ struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
> > if (err)
> > return ERR_PTR(err);
> > }
> > - q = __xe_exec_queue_create(xe, vm, logical_mask, width, hwe, flags);
> > + q = __xe_exec_queue_create(xe, vm, logical_mask, num_bb_per_exec, hwe, flags);
> > if (vm)
> > xe_vm_unlock(vm);
> >
> > @@ -170,7 +171,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
> > {
> > int i;
> >
> > - for (i = 0; i < q->width; ++i)
> > + for (i = 0; i < q->num_bb_per_exec; ++i)
> > xe_lrc_finish(q->lrc + i);
> > if (q->vm)
> > xe_vm_put(q->vm);
> > @@ -512,15 +513,15 @@ find_hw_engine(struct xe_device *xe,
> >
> > static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > struct drm_xe_engine_class_instance *eci,
> > - u16 width, u16 num_placements)
> > + u16 num_bb_per_exec, u16 num_dispositions)
> > {
> > struct xe_hw_engine *hwe;
> > enum xe_hw_engine_id id;
> > u32 logical_mask = 0;
> >
> > - if (XE_IOCTL_DBG(xe, width != 1))
> > + if (XE_IOCTL_DBG(xe, num_bb_per_exec != 1))
> > return 0;
> > - if (XE_IOCTL_DBG(xe, num_placements != 1))
> > + if (XE_IOCTL_DBG(xe, num_dispositions != 1))
> > return 0;
> > if (XE_IOCTL_DBG(xe, eci[0].engine_instance != 0))
> > return 0;
> > @@ -541,9 +542,9 @@ static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> >
> > static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > struct drm_xe_engine_class_instance *eci,
> > - u16 width, u16 num_placements)
> > + u16 num_bb_per_exec, u16 num_dispositions)
> > {
> > - int len = width * num_placements;
> > + int len = num_bb_per_exec * num_dispositions;
> > int i, j, n;
> > u16 class;
> > u16 gt_id;
> > @@ -553,13 +554,13 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > len > 1))
> > return 0;
> >
> > - for (i = 0; i < width; ++i) {
> > + for (i = 0; i < num_bb_per_exec; ++i) {
> > u32 current_mask = 0;
> >
> > - for (j = 0; j < num_placements; ++j) {
> > + for (j = 0; j < num_dispositions; ++j) {
> > struct xe_hw_engine *hwe;
> >
> > - n = j * width + i;
> > + n = j * num_bb_per_exec + i;
> >
> > hwe = find_hw_engine(xe, eci[n]);
> > if (XE_IOCTL_DBG(xe, !hwe))
> > @@ -575,7 +576,7 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > class = eci[n].engine_class;
> > gt_id = eci[n].gt_id;
> >
> > - if (width == 1 || !i)
> > + if (num_bb_per_exec == 1 || !i)
> > return_mask |= BIT(eci[n].engine_instance);
> > current_mask |= BIT(eci[n].engine_instance);
> > }
> > @@ -612,7 +613,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
> > return -EINVAL;
> >
> > - len = args->width * args->num_placements;
> > + len = args->num_bb_per_exec * args->num_dispositions;
> > if (XE_IOCTL_DBG(xe, !len || len > XE_HW_ENGINE_MAX_INSTANCE))
> > return -EINVAL;
> >
> > @@ -637,8 +638,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> >
> > eci[0].gt_id = gt->info.id;
> > logical_mask = bind_exec_queue_logical_mask(xe, gt, eci,
> > - args->width,
> > - args->num_placements);
> > + args->num_bb_per_exec,
> > + args->num_dispositions);
> > if (XE_IOCTL_DBG(xe, !logical_mask))
> > return -EINVAL;
> >
> > @@ -651,7 +652,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> >
> > migrate_vm = xe_migrate_get_vm(gt_to_tile(gt)->migrate);
> > new = xe_exec_queue_create(xe, migrate_vm, logical_mask,
> > - args->width, hwe,
> > + args->num_bb_per_exec, hwe,
> > EXEC_QUEUE_FLAG_PERSISTENT |
> > EXEC_QUEUE_FLAG_VM |
> > (sync ? 0 :
> > @@ -678,8 +679,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > } else {
> > gt = xe_device_get_gt(xe, eci[0].gt_id);
> > logical_mask = calc_validate_logical_mask(xe, gt, eci,
> > - args->width,
> > - args->num_placements);
> > + args->num_bb_per_exec,
> > + args->num_dispositions);
> > if (XE_IOCTL_DBG(xe, !logical_mask))
> > return -EINVAL;
> >
> > @@ -704,7 +705,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > }
> >
> > q = xe_exec_queue_create(xe, vm, logical_mask,
> > - args->width, hwe,
> > + args->num_bb_per_exec, hwe,
> > xe_vm_no_dma_fences(vm) ? 0 :
> > EXEC_QUEUE_FLAG_PERSISTENT);
> > up_read(&vm->lock);
> > @@ -827,7 +828,7 @@ bool xe_exec_queue_is_idle(struct xe_exec_queue *q)
> > if (xe_exec_queue_is_parallel(q)) {
> > int i;
> >
> > - for (i = 0; i < q->width; ++i) {
> > + for (i = 0; i < q->num_bb_per_exec; ++i) {
> > if (xe_lrc_seqno(&q->lrc[i]) !=
> > q->lrc[i].fence_ctx.next_seqno - 1)
> > return false;
> > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
> > index 59a54bfb9a8c..6782f3ce9faf 100644
> > --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> > +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> > @@ -15,7 +15,7 @@ struct xe_device;
> > struct xe_file;
> >
> > struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
> > - u32 logical_mask, u16 width,
> > + u32 logical_mask, u16 num_bb_per_exec,
> > struct xe_hw_engine *hw_engine, u32 flags);
> > struct xe_exec_queue *xe_exec_queue_create_class(struct xe_device *xe, struct xe_gt *gt,
> > struct xe_vm *vm,
> > @@ -40,7 +40,7 @@ static inline void xe_exec_queue_put(struct xe_exec_queue *q)
> >
> > static inline bool xe_exec_queue_is_parallel(struct xe_exec_queue *q)
> > {
> > - return q->width > 1;
> > + return q->num_bb_per_exec > 1;
> > }
> >
> > bool xe_exec_queue_is_lr(struct xe_exec_queue *q);
> > diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > index ecd761177567..eb924a3e5d98 100644
> > --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > @@ -47,8 +47,8 @@ struct xe_exec_queue {
> > u32 logical_mask;
> > /** @name: name of this exec queue */
> > char name[MAX_FENCE_NAME_LEN];
> > - /** @width: width (number BB submitted per exec) of this exec queue */
> > - u16 width;
> > + /** @num_bb_per_exec: the width of this exec queue */
> > + u16 num_bb_per_exec;
> > /** @fence_irq: fence IRQ used to signal job completion */
> > struct xe_hw_fence_irq *fence_irq;
> >
> > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > index 870dc5c532fa..b5a41a772445 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > @@ -259,7 +259,7 @@ static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa
> > if (xe_exec_queue_is_parallel(q))
> > bitmap_release_region(guc->submission_state.guc_ids_bitmap,
> > q->guc->id - GUC_ID_START_MLRC,
> > - order_base_2(q->width));
> > + order_base_2(q->num_bb_per_exec));
> > else
> > ida_simple_remove(&guc->submission_state.guc_ids, q->guc->id);
> > }
> > @@ -283,7 +283,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > void *bitmap = guc->submission_state.guc_ids_bitmap;
> >
> > ret = bitmap_find_free_region(bitmap, GUC_ID_NUMBER_MLRC,
> > - order_base_2(q->width));
> > + order_base_2(q->num_bb_per_exec));
> > } else {
> > ret = ida_simple_get(&guc->submission_state.guc_ids, 0,
> > GUC_ID_NUMBER_SLRC, GFP_NOWAIT);
> > @@ -295,7 +295,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > if (xe_exec_queue_is_parallel(q))
> > q->guc->id += GUC_ID_START_MLRC;
> >
> > - for (i = 0; i < q->width; ++i) {
> > + for (i = 0; i < q->num_bb_per_exec; ++i) {
> > ptr = xa_store(&guc->submission_state.exec_queue_lookup,
> > q->guc->id + i, q, GFP_NOWAIT);
> > if (IS_ERR(ptr)) {
> > @@ -315,7 +315,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > {
> > mutex_lock(&guc->submission_state.lock);
> > - __release_guc_id(guc, q, q->width);
> > + __release_guc_id(guc, q, q->num_bb_per_exec);
> > mutex_unlock(&guc->submission_state.lock);
> > }
> >
> > @@ -426,11 +426,11 @@ static void __register_mlrc_engine(struct xe_guc *guc,
> > action[len++] = info->wq_base_lo;
> > action[len++] = info->wq_base_hi;
> > action[len++] = info->wq_size;
> > - action[len++] = q->width;
> > + action[len++] = q->num_bb_per_exec;
> > action[len++] = info->hwlrca_lo;
> > action[len++] = info->hwlrca_hi;
> >
> > - for (i = 1; i < q->width; ++i) {
> > + for (i = 1; i < q->num_bb_per_exec; ++i) {
> > struct xe_lrc *lrc = q->lrc + i;
> >
> > action[len++] = lower_32_bits(xe_lrc_descriptor(lrc));
> > @@ -578,7 +578,7 @@ static void wq_item_append(struct xe_exec_queue *q)
> > struct iosys_map map = xe_lrc_parallel_map(q->lrc);
> > #define WQ_HEADER_SIZE 4 /* Includes 1 LRC address too */
> > u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)];
> > - u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
> > + u32 wqi_size = (q->num_bb_per_exec + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
> > u32 len_dw = (wqi_size / sizeof(u32)) - 1;
> > int i = 0, j;
> >
> > @@ -595,7 +595,7 @@ static void wq_item_append(struct xe_exec_queue *q)
> > wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
> > FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc->ring.tail / sizeof(u64));
> > wqi[i++] = 0;
> > - for (j = 1; j < q->width; ++j) {
> > + for (j = 1; j < q->num_bb_per_exec; ++j) {
> > struct xe_lrc *lrc = q->lrc + j;
> >
> > wqi[i++] = lrc->ring.tail / sizeof(u64);
> > @@ -766,17 +766,17 @@ static void simple_error_capture(struct xe_exec_queue *q)
> > struct xe_hw_engine *hwe;
> > enum xe_hw_engine_id id;
> > u32 adj_logical_mask = q->logical_mask;
> > - u32 width_mask = (0x1 << q->width) - 1;
> > + u32 width_mask = (0x1 << q->num_bb_per_exec) - 1;
> > int i;
> > bool cookie;
> >
> > if (q->vm && !q->vm->error_capture.capture_once) {
> > q->vm->error_capture.capture_once = true;
> > cookie = dma_fence_begin_signalling();
> > - for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > + for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > if (adj_logical_mask & BIT(i)) {
> > adj_logical_mask |= width_mask << i;
> > - i += q->width;
> > + i += q->num_bb_per_exec;
> > } else {
> > ++i;
> > }
> > @@ -1462,7 +1462,7 @@ static void guc_exec_queue_start(struct xe_exec_queue *q)
> > int i;
> >
> > trace_xe_exec_queue_resubmit(q);
> > - for (i = 0; i < q->width; ++i)
> > + for (i = 0; i < q->num_bb_per_exec; ++i)
> > xe_lrc_set_ring_head(q->lrc + i, q->lrc[i].ring.tail);
> > drm_sched_resubmit_jobs(sched);
> > }
> > @@ -1508,7 +1508,7 @@ g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
> > }
> >
> > xe_assert(xe, guc_id >= q->guc->id);
> > - xe_assert(xe, guc_id < (q->guc->id + q->width));
> > + xe_assert(xe, guc_id < (q->guc->id + q->num_bb_per_exec));
> >
> > return q;
> > }
> > @@ -1768,20 +1768,20 @@ xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q)
> > memcpy(&snapshot->name, &q->name, sizeof(snapshot->name));
> > snapshot->class = q->class;
> > snapshot->logical_mask = q->logical_mask;
> > - snapshot->width = q->width;
> > + snapshot->width = q->num_bb_per_exec;
> > snapshot->refcount = kref_read(&q->refcount);
> > snapshot->sched_timeout = sched->timeout;
> > snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us;
> > snapshot->sched_props.preempt_timeout_us =
> > q->sched_props.preempt_timeout_us;
> >
> > - snapshot->lrc = kmalloc_array(q->width, sizeof(struct lrc_snapshot),
> > + snapshot->lrc = kmalloc_array(q->num_bb_per_exec, sizeof(struct lrc_snapshot),
> > GFP_ATOMIC);
> >
> > if (!snapshot->lrc) {
> > drm_err(&xe->drm, "Skipping GuC Engine LRC snapshot.\n");
> > } else {
> > - for (i = 0; i < q->width; ++i) {
> > + for (i = 0; i < q->num_bb_per_exec; ++i) {
> > struct xe_lrc *lrc = q->lrc + i;
> >
> > snapshot->lrc[i].context_desc =
> > diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> > index 59e0aa2d6a4c..d3d671784e8e 100644
> > --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> > +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> > @@ -383,7 +383,7 @@ static void emit_job_gen12_gsc(struct xe_sched_job *job)
> > {
> > struct xe_gt *gt = job->q->gt;
> >
> > - xe_gt_assert(gt, job->q->width <= 1); /* no parallel submission for GSCCS */
> > + xe_gt_assert(gt, job->q->num_bb_per_exec <= 1); /* no parallel submission for GSCCS */
> >
> > __emit_job_gen12_simple(job, job->q->lrc,
> > job->batch_addr[0],
> > @@ -400,7 +400,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
> > return;
> > }
> >
> > - for (i = 0; i < job->q->width; ++i)
> > + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> > __emit_job_gen12_simple(job, job->q->lrc + i,
> > job->batch_addr[i],
> > xe_sched_job_seqno(job));
> > @@ -411,7 +411,7 @@ static void emit_job_gen12_video(struct xe_sched_job *job)
> > int i;
> >
> > /* FIXME: Not doing parallel handshake for now */
> > - for (i = 0; i < job->q->width; ++i)
> > + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> > __emit_job_gen12_video(job, job->q->lrc + i,
> > job->batch_addr[i],
> > xe_sched_job_seqno(job));
> > @@ -421,7 +421,7 @@ static void emit_job_gen12_render_compute(struct xe_sched_job *job)
> > {
> > int i;
> >
> > - for (i = 0; i < job->q->width; ++i)
> > + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> > __emit_job_gen12_render_compute(job, job->q->lrc + i,
> > job->batch_addr[i],
> > xe_sched_job_seqno(job));
> > diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c
> > index adbd82f8744e..1884b6b6b398 100644
> > --- a/drivers/gpu/drm/xe/xe_sched_job.c
> > +++ b/drivers/gpu/drm/xe/xe_sched_job.c
> > @@ -117,13 +117,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> > } else {
> > struct dma_fence_array *cf;
> >
> > - fences = kmalloc_array(q->width, sizeof(*fences), GFP_KERNEL);
> > + fences = kmalloc_array(q->num_bb_per_exec, sizeof(*fences), GFP_KERNEL);
> > if (!fences) {
> > err = -ENOMEM;
> > goto err_sched_job;
> > }
> >
> > - for (j = 0; j < q->width; ++j) {
> > + for (j = 0; j < q->num_bb_per_exec; ++j) {
> > fences[j] = xe_lrc_create_seqno_fence(q->lrc + j);
> > if (IS_ERR(fences[j])) {
> > err = PTR_ERR(fences[j]);
> > @@ -131,7 +131,7 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> > }
> > }
> >
> > - cf = dma_fence_array_create(q->width, fences,
> > + cf = dma_fence_array_create(q->num_bb_per_exec, fences,
> > q->parallel.composite_fence_ctx,
> > q->parallel.composite_fence_seqno++,
> > false);
> > @@ -142,13 +142,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> > }
> >
> > /* Sanity check */
> > - for (j = 0; j < q->width; ++j)
> > + for (j = 0; j < q->num_bb_per_exec; ++j)
> > xe_assert(job_to_xe(job), cf->base.seqno == fences[j]->seqno);
> >
> > job->fence = &cf->base;
> > }
> >
> > - width = q->width;
> > + width = q->num_bb_per_exec;
> > if (is_migration)
> > width = 2;
> >
> > diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
> > index d55dd1521df3..dcf28aaeb78a 100644
> > --- a/drivers/gpu/drm/xe/xe_trace.h
> > +++ b/drivers/gpu/drm/xe/xe_trace.h
> > @@ -112,7 +112,7 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
> > __field(enum xe_engine_class, class)
> > __field(u32, logical_mask)
> > __field(u8, gt_id)
> > - __field(u16, width)
> > + __field(u16, num_bb_per_exec)
> > __field(u16, guc_id)
> > __field(u32, guc_state)
> > __field(u32, flags)
> > @@ -122,15 +122,15 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
> > __entry->class = q->class;
> > __entry->logical_mask = q->logical_mask;
> > __entry->gt_id = q->gt->info.id;
> > - __entry->width = q->width;
> > + __entry->num_bb_per_exec = q->num_bb_per_exec;
> > __entry->guc_id = q->guc->id;
> > __entry->guc_state = atomic_read(&q->guc->state);
> > __entry->flags = q->flags;
> > ),
> >
> > - TP_printk("%d:0x%x, gt=%d, width=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
> > + TP_printk("%d:0x%x, gt=%d, num_bb_per_exec=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
> > __entry->class, __entry->logical_mask,
> > - __entry->gt_id, __entry->width, __entry->guc_id,
> > + __entry->gt_id, __entry->num_bb_per_exec, __entry->guc_id,
> > __entry->guc_state, __entry->flags)
> > );
> >
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index 2d0fb4386a69..a6c70b8697c7 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -1013,11 +1013,17 @@ struct drm_xe_exec_queue_create {
> > /** @extensions: Pointer to the first extension struct, if any */
> > __u64 extensions;
> >
> > - /** @width: submission width (number BB per exec) for this exec queue */
> > - __u16 width;
> > + /**
> > + * @num_bb_per_exec: Indicates a submission width for this exec queue,
> > + * for how many batch buffers can be submitted in parallel.
>
> 'can' sounds like 'up to' in here, would change that to 'will'.
>
> > + */
> > + __u16 num_bb_per_exec;
> >
> > - /** @num_placements: number of valid placements for this exec queue */
> > - __u16 num_placements;
> > + /**
> > + * @num_dispositions: Indicates how the batch buffers will be
> > + * distributed to the hardware engines listed on @instance.
> > + */
> > + __u16 num_dispositions;
> >
> > /** @vm_id: VM to use for this exec queue */
> > __u32 vm_id;
> > @@ -1032,8 +1038,8 @@ struct drm_xe_exec_queue_create {
> > * @instances: user pointer to a 2-d array of struct
> > * drm_xe_engine_class_instance
> > *
> > - * length = width (i) * num_placements (j)
> > - * index = j + i * width
> > + * length = num_bb_per_exec (i) * num_dispositions (j)
> > + * index = j + i * num_bb_per_exec
> > */
> > __u64 instances;
> >
> > @@ -1143,7 +1149,7 @@ struct drm_xe_exec {
> >
> > /**
> > * @num_batch_buffer: number of batch buffer in this exec, must match
> > - * the width of the engine
> > + * the @num_bb_per_exec of the struct drm_xe_exec_queue_create
> > */
> > __u16 num_batch_buffer;
> >
>
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 38/50] drm/xe/uapi: Rename couple exec_queue items
2023-11-09 18:40 ` Rodrigo Vivi
@ 2023-11-09 20:02 ` Souza, Jose
2023-11-09 20:56 ` Rodrigo Vivi
0 siblings, 1 reply; 81+ messages in thread
From: Souza, Jose @ 2023-11-09 20:02 UTC (permalink / raw)
To: Vivi, Rodrigo; +Cc: Dugast, Francois, intel-xe@lists.freedesktop.org
On Thu, 2023-11-09 at 13:40 -0500, Rodrigo Vivi wrote:
> On Thu, Nov 09, 2023 at 05:14:17PM +0000, Souza, Jose wrote:
> > On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> > > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > >
> > > 'Placement' is no used in many terms around the memory_region selection
> > > where the BO or the page table will live. Also, the job itself deserves
> > > a word of more action since it is dispatched to the engine.
> >
> > num_dispositions is a bad name, placement is better in my opinion.
> > it says exactly what is does, in what hw engines the batch buffers can be placed.
>
> Please take a look to the patch 43 in this series or to the new squashed
> version in the take2-v3 that Francois just sent.
>
> [PATCH v2 43/50] squash! drm/xe/uapi: Rename couple exec_queue items
>
> I don't like the 'placement' word exactly because it is not true that
> the batch buffer is 'placed' in the engine. The batch buffer is placed
> in memory and we now have 'placement' variables on memory regions.
> So, double confusing.
> After BB is placed in the memory, then the instruction with offset
> of that placement is sent to the engines so the EUs can find that.
> So, let's keep placement name in the memory and use something else
> for the engine. Please take a look to the final patch and then we
> continue the discussion there trying to find a better naming.
num_eng_per_bb is also not a good name in my opinion.
I still believe placement is a better name.
Xe KMD will create drm_xe_exec_queue_create.num_bb_per_exec contexts and each context can be placed among drm_xe_exec_queue_create.num_placements hw
engines.
At the exec uAPI, scheduler will pick one of the hw engines allowed to execute a batch buffer and place the context to be executed in that hw engine.
>
> Thanks,
> Rodrigo.
>
> >
> > >
> > > 'width' is so generic and in graphics world can mean many other different
> > > things. Let's be more specific here on the intent of that.
> >
> > This one sounds good.
> >
> > >
> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_devcoredump.c | 8 ++--
> > > drivers/gpu/drm/xe/xe_exec.c | 4 +-
> > > drivers/gpu/drm/xe/xe_exec_queue.c | 49 ++++++++++++------------
> > > drivers/gpu/drm/xe/xe_exec_queue.h | 4 +-
> > > drivers/gpu/drm/xe/xe_exec_queue_types.h | 4 +-
> > > drivers/gpu/drm/xe/xe_guc_submit.c | 32 ++++++++--------
> > > drivers/gpu/drm/xe/xe_ring_ops.c | 8 ++--
> > > drivers/gpu/drm/xe/xe_sched_job.c | 10 ++---
> > > drivers/gpu/drm/xe/xe_trace.h | 8 ++--
> > > include/uapi/drm/xe_drm.h | 20 ++++++----
> > > 10 files changed, 77 insertions(+), 70 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> > > index 68abc0b195be..b4e8de4903b9 100644
> > > --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> > > +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
> > > @@ -130,7 +130,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> > > struct xe_hw_engine *hwe;
> > > enum xe_hw_engine_id id;
> > > u32 adj_logical_mask = q->logical_mask;
> > > - u32 width_mask = (0x1 << q->width) - 1;
> > > + u32 num_bb_per_exec_mask = (0x1 << q->num_bb_per_exec) - 1;
> > > int i;
> > > bool cookie;
> > >
> > > @@ -138,10 +138,10 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> > > ss->boot_time = ktime_get_boottime();
> > >
> > > cookie = dma_fence_begin_signalling();
> > > - for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > > + for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > > if (adj_logical_mask & BIT(i)) {
> > > - adj_logical_mask |= width_mask << i;
> > > - i += q->width;
> > > + adj_logical_mask |= num_bb_per_exec_mask << i;
> > > + i += q->num_bb_per_exec;
> > > } else {
> > > ++i;
> > > }
> > > diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
> > > index 28e84a0bbeb0..ca922635db89 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec.c
> > > +++ b/drivers/gpu/drm/xe/xe_exec.c
> > > @@ -161,7 +161,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > > if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_VM))
> > > return -EINVAL;
> > >
> > > - if (XE_IOCTL_DBG(xe, q->width != args->num_batch_buffer))
> > > + if (XE_IOCTL_DBG(xe, q->num_bb_per_exec != args->num_batch_buffer))
> > > return -EINVAL;
> > >
> > > if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_BANNED)) {
> > > @@ -189,7 +189,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > >
> > > if (xe_exec_queue_is_parallel(q)) {
> > > err = __copy_from_user(addresses, addresses_user, sizeof(u64) *
> > > - q->width);
> > > + q->num_bb_per_exec);
> > > if (err) {
> > > err = -EFAULT;
> > > goto err_syncs;
> > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > index 59e8d1ed34f7..849e463c4ed8 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > @@ -33,7 +33,8 @@ enum xe_exec_queue_sched_prop {
> > > static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > struct xe_vm *vm,
> > > u32 logical_mask,
> > > - u16 width, struct xe_hw_engine *hwe,
> > > + u16 num_bb_per_exec,
> > > + struct xe_hw_engine *hwe,
> > > u32 flags)
> > > {
> > > struct xe_exec_queue *q;
> > > @@ -44,7 +45,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > /* only kernel queues can be permanent */
> > > XE_WARN_ON((flags & EXEC_QUEUE_FLAG_PERMANENT) && !(flags & EXEC_QUEUE_FLAG_KERNEL));
> > >
> > > - q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * width, GFP_KERNEL);
> > > + q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * num_bb_per_exec, GFP_KERNEL);
> > > if (!q)
> > > return ERR_PTR(-ENOMEM);
> > >
> > > @@ -55,7 +56,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > if (vm)
> > > q->vm = xe_vm_get(vm);
> > > q->class = hwe->class;
> > > - q->width = width;
> > > + q->num_bb_per_exec = num_bb_per_exec;
> > > q->logical_mask = logical_mask;
> > > q->fence_irq = >->fence_irq[hwe->class];
> > > q->ring_ops = gt->ring_ops[hwe->class];
> > > @@ -77,7 +78,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > q->bind.fence_seqno = XE_FENCE_INITIAL_SEQNO;
> > > }
> > >
> > > - for (i = 0; i < width; ++i) {
> > > + for (i = 0; i < num_bb_per_exec; ++i) {
> > > err = xe_lrc_init(q->lrc + i, hwe, q, vm, SZ_16K);
> > > if (err)
> > > goto err_lrc;
> > > @@ -108,7 +109,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > }
> > >
> > > struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
> > > - u32 logical_mask, u16 width,
> > > + u32 logical_mask, u16 num_bb_per_exec,
> > > struct xe_hw_engine *hwe, u32 flags)
> > > {
> > > struct xe_exec_queue *q;
> > > @@ -119,7 +120,7 @@ struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
> > > if (err)
> > > return ERR_PTR(err);
> > > }
> > > - q = __xe_exec_queue_create(xe, vm, logical_mask, width, hwe, flags);
> > > + q = __xe_exec_queue_create(xe, vm, logical_mask, num_bb_per_exec, hwe, flags);
> > > if (vm)
> > > xe_vm_unlock(vm);
> > >
> > > @@ -170,7 +171,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
> > > {
> > > int i;
> > >
> > > - for (i = 0; i < q->width; ++i)
> > > + for (i = 0; i < q->num_bb_per_exec; ++i)
> > > xe_lrc_finish(q->lrc + i);
> > > if (q->vm)
> > > xe_vm_put(q->vm);
> > > @@ -512,15 +513,15 @@ find_hw_engine(struct xe_device *xe,
> > >
> > > static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > > struct drm_xe_engine_class_instance *eci,
> > > - u16 width, u16 num_placements)
> > > + u16 num_bb_per_exec, u16 num_dispositions)
> > > {
> > > struct xe_hw_engine *hwe;
> > > enum xe_hw_engine_id id;
> > > u32 logical_mask = 0;
> > >
> > > - if (XE_IOCTL_DBG(xe, width != 1))
> > > + if (XE_IOCTL_DBG(xe, num_bb_per_exec != 1))
> > > return 0;
> > > - if (XE_IOCTL_DBG(xe, num_placements != 1))
> > > + if (XE_IOCTL_DBG(xe, num_dispositions != 1))
> > > return 0;
> > > if (XE_IOCTL_DBG(xe, eci[0].engine_instance != 0))
> > > return 0;
> > > @@ -541,9 +542,9 @@ static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > >
> > > static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > > struct drm_xe_engine_class_instance *eci,
> > > - u16 width, u16 num_placements)
> > > + u16 num_bb_per_exec, u16 num_dispositions)
> > > {
> > > - int len = width * num_placements;
> > > + int len = num_bb_per_exec * num_dispositions;
> > > int i, j, n;
> > > u16 class;
> > > u16 gt_id;
> > > @@ -553,13 +554,13 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > > len > 1))
> > > return 0;
> > >
> > > - for (i = 0; i < width; ++i) {
> > > + for (i = 0; i < num_bb_per_exec; ++i) {
> > > u32 current_mask = 0;
> > >
> > > - for (j = 0; j < num_placements; ++j) {
> > > + for (j = 0; j < num_dispositions; ++j) {
> > > struct xe_hw_engine *hwe;
> > >
> > > - n = j * width + i;
> > > + n = j * num_bb_per_exec + i;
> > >
> > > hwe = find_hw_engine(xe, eci[n]);
> > > if (XE_IOCTL_DBG(xe, !hwe))
> > > @@ -575,7 +576,7 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > > class = eci[n].engine_class;
> > > gt_id = eci[n].gt_id;
> > >
> > > - if (width == 1 || !i)
> > > + if (num_bb_per_exec == 1 || !i)
> > > return_mask |= BIT(eci[n].engine_instance);
> > > current_mask |= BIT(eci[n].engine_instance);
> > > }
> > > @@ -612,7 +613,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > > XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
> > > return -EINVAL;
> > >
> > > - len = args->width * args->num_placements;
> > > + len = args->num_bb_per_exec * args->num_dispositions;
> > > if (XE_IOCTL_DBG(xe, !len || len > XE_HW_ENGINE_MAX_INSTANCE))
> > > return -EINVAL;
> > >
> > > @@ -637,8 +638,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > >
> > > eci[0].gt_id = gt->info.id;
> > > logical_mask = bind_exec_queue_logical_mask(xe, gt, eci,
> > > - args->width,
> > > - args->num_placements);
> > > + args->num_bb_per_exec,
> > > + args->num_dispositions);
> > > if (XE_IOCTL_DBG(xe, !logical_mask))
> > > return -EINVAL;
> > >
> > > @@ -651,7 +652,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > >
> > > migrate_vm = xe_migrate_get_vm(gt_to_tile(gt)->migrate);
> > > new = xe_exec_queue_create(xe, migrate_vm, logical_mask,
> > > - args->width, hwe,
> > > + args->num_bb_per_exec, hwe,
> > > EXEC_QUEUE_FLAG_PERSISTENT |
> > > EXEC_QUEUE_FLAG_VM |
> > > (sync ? 0 :
> > > @@ -678,8 +679,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > > } else {
> > > gt = xe_device_get_gt(xe, eci[0].gt_id);
> > > logical_mask = calc_validate_logical_mask(xe, gt, eci,
> > > - args->width,
> > > - args->num_placements);
> > > + args->num_bb_per_exec,
> > > + args->num_dispositions);
> > > if (XE_IOCTL_DBG(xe, !logical_mask))
> > > return -EINVAL;
> > >
> > > @@ -704,7 +705,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > > }
> > >
> > > q = xe_exec_queue_create(xe, vm, logical_mask,
> > > - args->width, hwe,
> > > + args->num_bb_per_exec, hwe,
> > > xe_vm_no_dma_fences(vm) ? 0 :
> > > EXEC_QUEUE_FLAG_PERSISTENT);
> > > up_read(&vm->lock);
> > > @@ -827,7 +828,7 @@ bool xe_exec_queue_is_idle(struct xe_exec_queue *q)
> > > if (xe_exec_queue_is_parallel(q)) {
> > > int i;
> > >
> > > - for (i = 0; i < q->width; ++i) {
> > > + for (i = 0; i < q->num_bb_per_exec; ++i) {
> > > if (xe_lrc_seqno(&q->lrc[i]) !=
> > > q->lrc[i].fence_ctx.next_seqno - 1)
> > > return false;
> > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
> > > index 59a54bfb9a8c..6782f3ce9faf 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> > > @@ -15,7 +15,7 @@ struct xe_device;
> > > struct xe_file;
> > >
> > > struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
> > > - u32 logical_mask, u16 width,
> > > + u32 logical_mask, u16 num_bb_per_exec,
> > > struct xe_hw_engine *hw_engine, u32 flags);
> > > struct xe_exec_queue *xe_exec_queue_create_class(struct xe_device *xe, struct xe_gt *gt,
> > > struct xe_vm *vm,
> > > @@ -40,7 +40,7 @@ static inline void xe_exec_queue_put(struct xe_exec_queue *q)
> > >
> > > static inline bool xe_exec_queue_is_parallel(struct xe_exec_queue *q)
> > > {
> > > - return q->width > 1;
> > > + return q->num_bb_per_exec > 1;
> > > }
> > >
> > > bool xe_exec_queue_is_lr(struct xe_exec_queue *q);
> > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > index ecd761177567..eb924a3e5d98 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > @@ -47,8 +47,8 @@ struct xe_exec_queue {
> > > u32 logical_mask;
> > > /** @name: name of this exec queue */
> > > char name[MAX_FENCE_NAME_LEN];
> > > - /** @width: width (number BB submitted per exec) of this exec queue */
> > > - u16 width;
> > > + /** @num_bb_per_exec: the width of this exec queue */
> > > + u16 num_bb_per_exec;
> > > /** @fence_irq: fence IRQ used to signal job completion */
> > > struct xe_hw_fence_irq *fence_irq;
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > index 870dc5c532fa..b5a41a772445 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > @@ -259,7 +259,7 @@ static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa
> > > if (xe_exec_queue_is_parallel(q))
> > > bitmap_release_region(guc->submission_state.guc_ids_bitmap,
> > > q->guc->id - GUC_ID_START_MLRC,
> > > - order_base_2(q->width));
> > > + order_base_2(q->num_bb_per_exec));
> > > else
> > > ida_simple_remove(&guc->submission_state.guc_ids, q->guc->id);
> > > }
> > > @@ -283,7 +283,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > > void *bitmap = guc->submission_state.guc_ids_bitmap;
> > >
> > > ret = bitmap_find_free_region(bitmap, GUC_ID_NUMBER_MLRC,
> > > - order_base_2(q->width));
> > > + order_base_2(q->num_bb_per_exec));
> > > } else {
> > > ret = ida_simple_get(&guc->submission_state.guc_ids, 0,
> > > GUC_ID_NUMBER_SLRC, GFP_NOWAIT);
> > > @@ -295,7 +295,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > > if (xe_exec_queue_is_parallel(q))
> > > q->guc->id += GUC_ID_START_MLRC;
> > >
> > > - for (i = 0; i < q->width; ++i) {
> > > + for (i = 0; i < q->num_bb_per_exec; ++i) {
> > > ptr = xa_store(&guc->submission_state.exec_queue_lookup,
> > > q->guc->id + i, q, GFP_NOWAIT);
> > > if (IS_ERR(ptr)) {
> > > @@ -315,7 +315,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > > static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > > {
> > > mutex_lock(&guc->submission_state.lock);
> > > - __release_guc_id(guc, q, q->width);
> > > + __release_guc_id(guc, q, q->num_bb_per_exec);
> > > mutex_unlock(&guc->submission_state.lock);
> > > }
> > >
> > > @@ -426,11 +426,11 @@ static void __register_mlrc_engine(struct xe_guc *guc,
> > > action[len++] = info->wq_base_lo;
> > > action[len++] = info->wq_base_hi;
> > > action[len++] = info->wq_size;
> > > - action[len++] = q->width;
> > > + action[len++] = q->num_bb_per_exec;
> > > action[len++] = info->hwlrca_lo;
> > > action[len++] = info->hwlrca_hi;
> > >
> > > - for (i = 1; i < q->width; ++i) {
> > > + for (i = 1; i < q->num_bb_per_exec; ++i) {
> > > struct xe_lrc *lrc = q->lrc + i;
> > >
> > > action[len++] = lower_32_bits(xe_lrc_descriptor(lrc));
> > > @@ -578,7 +578,7 @@ static void wq_item_append(struct xe_exec_queue *q)
> > > struct iosys_map map = xe_lrc_parallel_map(q->lrc);
> > > #define WQ_HEADER_SIZE 4 /* Includes 1 LRC address too */
> > > u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)];
> > > - u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
> > > + u32 wqi_size = (q->num_bb_per_exec + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
> > > u32 len_dw = (wqi_size / sizeof(u32)) - 1;
> > > int i = 0, j;
> > >
> > > @@ -595,7 +595,7 @@ static void wq_item_append(struct xe_exec_queue *q)
> > > wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
> > > FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc->ring.tail / sizeof(u64));
> > > wqi[i++] = 0;
> > > - for (j = 1; j < q->width; ++j) {
> > > + for (j = 1; j < q->num_bb_per_exec; ++j) {
> > > struct xe_lrc *lrc = q->lrc + j;
> > >
> > > wqi[i++] = lrc->ring.tail / sizeof(u64);
> > > @@ -766,17 +766,17 @@ static void simple_error_capture(struct xe_exec_queue *q)
> > > struct xe_hw_engine *hwe;
> > > enum xe_hw_engine_id id;
> > > u32 adj_logical_mask = q->logical_mask;
> > > - u32 width_mask = (0x1 << q->width) - 1;
> > > + u32 width_mask = (0x1 << q->num_bb_per_exec) - 1;
> > > int i;
> > > bool cookie;
> > >
> > > if (q->vm && !q->vm->error_capture.capture_once) {
> > > q->vm->error_capture.capture_once = true;
> > > cookie = dma_fence_begin_signalling();
> > > - for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > > + for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > > if (adj_logical_mask & BIT(i)) {
> > > adj_logical_mask |= width_mask << i;
> > > - i += q->width;
> > > + i += q->num_bb_per_exec;
> > > } else {
> > > ++i;
> > > }
> > > @@ -1462,7 +1462,7 @@ static void guc_exec_queue_start(struct xe_exec_queue *q)
> > > int i;
> > >
> > > trace_xe_exec_queue_resubmit(q);
> > > - for (i = 0; i < q->width; ++i)
> > > + for (i = 0; i < q->num_bb_per_exec; ++i)
> > > xe_lrc_set_ring_head(q->lrc + i, q->lrc[i].ring.tail);
> > > drm_sched_resubmit_jobs(sched);
> > > }
> > > @@ -1508,7 +1508,7 @@ g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
> > > }
> > >
> > > xe_assert(xe, guc_id >= q->guc->id);
> > > - xe_assert(xe, guc_id < (q->guc->id + q->width));
> > > + xe_assert(xe, guc_id < (q->guc->id + q->num_bb_per_exec));
> > >
> > > return q;
> > > }
> > > @@ -1768,20 +1768,20 @@ xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q)
> > > memcpy(&snapshot->name, &q->name, sizeof(snapshot->name));
> > > snapshot->class = q->class;
> > > snapshot->logical_mask = q->logical_mask;
> > > - snapshot->width = q->width;
> > > + snapshot->width = q->num_bb_per_exec;
> > > snapshot->refcount = kref_read(&q->refcount);
> > > snapshot->sched_timeout = sched->timeout;
> > > snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us;
> > > snapshot->sched_props.preempt_timeout_us =
> > > q->sched_props.preempt_timeout_us;
> > >
> > > - snapshot->lrc = kmalloc_array(q->width, sizeof(struct lrc_snapshot),
> > > + snapshot->lrc = kmalloc_array(q->num_bb_per_exec, sizeof(struct lrc_snapshot),
> > > GFP_ATOMIC);
> > >
> > > if (!snapshot->lrc) {
> > > drm_err(&xe->drm, "Skipping GuC Engine LRC snapshot.\n");
> > > } else {
> > > - for (i = 0; i < q->width; ++i) {
> > > + for (i = 0; i < q->num_bb_per_exec; ++i) {
> > > struct xe_lrc *lrc = q->lrc + i;
> > >
> > > snapshot->lrc[i].context_desc =
> > > diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> > > index 59e0aa2d6a4c..d3d671784e8e 100644
> > > --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> > > +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> > > @@ -383,7 +383,7 @@ static void emit_job_gen12_gsc(struct xe_sched_job *job)
> > > {
> > > struct xe_gt *gt = job->q->gt;
> > >
> > > - xe_gt_assert(gt, job->q->width <= 1); /* no parallel submission for GSCCS */
> > > + xe_gt_assert(gt, job->q->num_bb_per_exec <= 1); /* no parallel submission for GSCCS */
> > >
> > > __emit_job_gen12_simple(job, job->q->lrc,
> > > job->batch_addr[0],
> > > @@ -400,7 +400,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
> > > return;
> > > }
> > >
> > > - for (i = 0; i < job->q->width; ++i)
> > > + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> > > __emit_job_gen12_simple(job, job->q->lrc + i,
> > > job->batch_addr[i],
> > > xe_sched_job_seqno(job));
> > > @@ -411,7 +411,7 @@ static void emit_job_gen12_video(struct xe_sched_job *job)
> > > int i;
> > >
> > > /* FIXME: Not doing parallel handshake for now */
> > > - for (i = 0; i < job->q->width; ++i)
> > > + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> > > __emit_job_gen12_video(job, job->q->lrc + i,
> > > job->batch_addr[i],
> > > xe_sched_job_seqno(job));
> > > @@ -421,7 +421,7 @@ static void emit_job_gen12_render_compute(struct xe_sched_job *job)
> > > {
> > > int i;
> > >
> > > - for (i = 0; i < job->q->width; ++i)
> > > + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> > > __emit_job_gen12_render_compute(job, job->q->lrc + i,
> > > job->batch_addr[i],
> > > xe_sched_job_seqno(job));
> > > diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c
> > > index adbd82f8744e..1884b6b6b398 100644
> > > --- a/drivers/gpu/drm/xe/xe_sched_job.c
> > > +++ b/drivers/gpu/drm/xe/xe_sched_job.c
> > > @@ -117,13 +117,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> > > } else {
> > > struct dma_fence_array *cf;
> > >
> > > - fences = kmalloc_array(q->width, sizeof(*fences), GFP_KERNEL);
> > > + fences = kmalloc_array(q->num_bb_per_exec, sizeof(*fences), GFP_KERNEL);
> > > if (!fences) {
> > > err = -ENOMEM;
> > > goto err_sched_job;
> > > }
> > >
> > > - for (j = 0; j < q->width; ++j) {
> > > + for (j = 0; j < q->num_bb_per_exec; ++j) {
> > > fences[j] = xe_lrc_create_seqno_fence(q->lrc + j);
> > > if (IS_ERR(fences[j])) {
> > > err = PTR_ERR(fences[j]);
> > > @@ -131,7 +131,7 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> > > }
> > > }
> > >
> > > - cf = dma_fence_array_create(q->width, fences,
> > > + cf = dma_fence_array_create(q->num_bb_per_exec, fences,
> > > q->parallel.composite_fence_ctx,
> > > q->parallel.composite_fence_seqno++,
> > > false);
> > > @@ -142,13 +142,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> > > }
> > >
> > > /* Sanity check */
> > > - for (j = 0; j < q->width; ++j)
> > > + for (j = 0; j < q->num_bb_per_exec; ++j)
> > > xe_assert(job_to_xe(job), cf->base.seqno == fences[j]->seqno);
> > >
> > > job->fence = &cf->base;
> > > }
> > >
> > > - width = q->width;
> > > + width = q->num_bb_per_exec;
> > > if (is_migration)
> > > width = 2;
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
> > > index d55dd1521df3..dcf28aaeb78a 100644
> > > --- a/drivers/gpu/drm/xe/xe_trace.h
> > > +++ b/drivers/gpu/drm/xe/xe_trace.h
> > > @@ -112,7 +112,7 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
> > > __field(enum xe_engine_class, class)
> > > __field(u32, logical_mask)
> > > __field(u8, gt_id)
> > > - __field(u16, width)
> > > + __field(u16, num_bb_per_exec)
> > > __field(u16, guc_id)
> > > __field(u32, guc_state)
> > > __field(u32, flags)
> > > @@ -122,15 +122,15 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
> > > __entry->class = q->class;
> > > __entry->logical_mask = q->logical_mask;
> > > __entry->gt_id = q->gt->info.id;
> > > - __entry->width = q->width;
> > > + __entry->num_bb_per_exec = q->num_bb_per_exec;
> > > __entry->guc_id = q->guc->id;
> > > __entry->guc_state = atomic_read(&q->guc->state);
> > > __entry->flags = q->flags;
> > > ),
> > >
> > > - TP_printk("%d:0x%x, gt=%d, width=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
> > > + TP_printk("%d:0x%x, gt=%d, num_bb_per_exec=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
> > > __entry->class, __entry->logical_mask,
> > > - __entry->gt_id, __entry->width, __entry->guc_id,
> > > + __entry->gt_id, __entry->num_bb_per_exec, __entry->guc_id,
> > > __entry->guc_state, __entry->flags)
> > > );
> > >
> > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > > index 2d0fb4386a69..a6c70b8697c7 100644
> > > --- a/include/uapi/drm/xe_drm.h
> > > +++ b/include/uapi/drm/xe_drm.h
> > > @@ -1013,11 +1013,17 @@ struct drm_xe_exec_queue_create {
> > > /** @extensions: Pointer to the first extension struct, if any */
> > > __u64 extensions;
> > >
> > > - /** @width: submission width (number BB per exec) for this exec queue */
> > > - __u16 width;
> > > + /**
> > > + * @num_bb_per_exec: Indicates a submission width for this exec queue,
> > > + * for how many batch buffers can be submitted in parallel.
> >
> > 'can' sounds like 'up to' in here, would change that to 'will'.
> >
> > > + */
> > > + __u16 num_bb_per_exec;
> > >
> > > - /** @num_placements: number of valid placements for this exec queue */
> > > - __u16 num_placements;
> > > + /**
> > > + * @num_dispositions: Indicates how the batch buffers will be
> > > + * distributed to the hardware engines listed on @instance.
> > > + */
> > > + __u16 num_dispositions;
> > >
> > > /** @vm_id: VM to use for this exec queue */
> > > __u32 vm_id;
> > > @@ -1032,8 +1038,8 @@ struct drm_xe_exec_queue_create {
> > > * @instances: user pointer to a 2-d array of struct
> > > * drm_xe_engine_class_instance
> > > *
> > > - * length = width (i) * num_placements (j)
> > > - * index = j + i * width
> > > + * length = num_bb_per_exec (i) * num_dispositions (j)
> > > + * index = j + i * num_bb_per_exec
> > > */
> > > __u64 instances;
> > >
> > > @@ -1143,7 +1149,7 @@ struct drm_xe_exec {
> > >
> > > /**
> > > * @num_batch_buffer: number of batch buffer in this exec, must match
> > > - * the width of the engine
> > > + * the @num_bb_per_exec of the struct drm_xe_exec_queue_create
> > > */
> > > __u16 num_batch_buffer;
> > >
> >
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 38/50] drm/xe/uapi: Rename couple exec_queue items
2023-11-09 20:02 ` Souza, Jose
@ 2023-11-09 20:56 ` Rodrigo Vivi
0 siblings, 0 replies; 81+ messages in thread
From: Rodrigo Vivi @ 2023-11-09 20:56 UTC (permalink / raw)
To: Souza, Jose; +Cc: Dugast, Francois, intel-xe@lists.freedesktop.org
On Thu, Nov 09, 2023 at 03:02:12PM -0500, Souza, Jose wrote:
> On Thu, 2023-11-09 at 13:40 -0500, Rodrigo Vivi wrote:
> > On Thu, Nov 09, 2023 at 05:14:17PM +0000, Souza, Jose wrote:
> > > On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> > > > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > >
> > > > 'Placement' is no used in many terms around the memory_region selection
> > > > where the BO or the page table will live. Also, the job itself deserves
> > > > a word of more action since it is dispatched to the engine.
> > >
> > > num_dispositions is a bad name, placement is better in my opinion.
> > > it says exactly what is does, in what hw engines the batch buffers can be placed.
> >
> > Please take a look to the patch 43 in this series or to the new squashed
> > version in the take2-v3 that Francois just sent.
> >
> > [PATCH v2 43/50] squash! drm/xe/uapi: Rename couple exec_queue items
> >
> > I don't like the 'placement' word exactly because it is not true that
> > the batch buffer is 'placed' in the engine. The batch buffer is placed
> > in memory and we now have 'placement' variables on memory regions.
> > So, double confusing.
> > After BB is placed in the memory, then the instruction with offset
> > of that placement is sent to the engines so the EUs can find that.
> > So, let's keep placement name in the memory and use something else
> > for the engine. Please take a look to the final patch and then we
> > continue the discussion there trying to find a better naming.
>
> num_eng_per_bb is also not a good name in my opinion.
> I still believe placement is a better name.
>
> Xe KMD will create drm_xe_exec_queue_create.num_bb_per_exec contexts and each context can be placed among drm_xe_exec_queue_create.num_placements hw
> engines.
> At the exec uAPI, scheduler will pick one of the hw engines allowed to execute a batch buffer and place the context to be executed in that hw engine.
Well, I still see this as 'send-for-execution', submitted, dispatched, while it is placed in memory.
But also another thing is that it is not necessarily there anyway. what you do is that you
dispatch to guc, and guc can choose one of the listed engines to then actually send the execution.
On i915 uapi this is called 'num_siblings' because you give a choice of similar/brother/sister
engines where the work can be actually run, but you have no guarantee that the job is actually
running on all of them.
I don't like 'siblings', I don't like 'placement', and I also didn't like 'dispositions'
this is where I started to think what is this number really doing and this is only listing
a number of possible engines where each batch buffer can be sent for execution.
num_possible_engines_for_each_batch_buffer_in_exec :)
But well, at this point we don't have much time to keep arguing much.
One of the 'placement' variable will die anyway since it is going to be a sched_group_mask.
So, there will be only 1 conflict with the memory_region placement. And let's just drop
this patch and deal with the confusion of future readers to understand the placement is
memory and execution.
>
> >
> > Thanks,
> > Rodrigo.
> >
> > >
> > > >
> > > > 'width' is so generic and in graphics world can mean many other different
> > > > things. Let's be more specific here on the intent of that.
> > >
> > > This one sounds good.
> > >
> > > >
> > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > ---
> > > > drivers/gpu/drm/xe/xe_devcoredump.c | 8 ++--
> > > > drivers/gpu/drm/xe/xe_exec.c | 4 +-
> > > > drivers/gpu/drm/xe/xe_exec_queue.c | 49 ++++++++++++------------
> > > > drivers/gpu/drm/xe/xe_exec_queue.h | 4 +-
> > > > drivers/gpu/drm/xe/xe_exec_queue_types.h | 4 +-
> > > > drivers/gpu/drm/xe/xe_guc_submit.c | 32 ++++++++--------
> > > > drivers/gpu/drm/xe/xe_ring_ops.c | 8 ++--
> > > > drivers/gpu/drm/xe/xe_sched_job.c | 10 ++---
> > > > drivers/gpu/drm/xe/xe_trace.h | 8 ++--
> > > > include/uapi/drm/xe_drm.h | 20 ++++++----
> > > > 10 files changed, 77 insertions(+), 70 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> > > > index 68abc0b195be..b4e8de4903b9 100644
> > > > --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> > > > +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
> > > > @@ -130,7 +130,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> > > > struct xe_hw_engine *hwe;
> > > > enum xe_hw_engine_id id;
> > > > u32 adj_logical_mask = q->logical_mask;
> > > > - u32 width_mask = (0x1 << q->width) - 1;
> > > > + u32 num_bb_per_exec_mask = (0x1 << q->num_bb_per_exec) - 1;
> > > > int i;
> > > > bool cookie;
> > > >
> > > > @@ -138,10 +138,10 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> > > > ss->boot_time = ktime_get_boottime();
> > > >
> > > > cookie = dma_fence_begin_signalling();
> > > > - for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > > > + for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > > > if (adj_logical_mask & BIT(i)) {
> > > > - adj_logical_mask |= width_mask << i;
> > > > - i += q->width;
> > > > + adj_logical_mask |= num_bb_per_exec_mask << i;
> > > > + i += q->num_bb_per_exec;
> > > > } else {
> > > > ++i;
> > > > }
> > > > diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
> > > > index 28e84a0bbeb0..ca922635db89 100644
> > > > --- a/drivers/gpu/drm/xe/xe_exec.c
> > > > +++ b/drivers/gpu/drm/xe/xe_exec.c
> > > > @@ -161,7 +161,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > > > if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_VM))
> > > > return -EINVAL;
> > > >
> > > > - if (XE_IOCTL_DBG(xe, q->width != args->num_batch_buffer))
> > > > + if (XE_IOCTL_DBG(xe, q->num_bb_per_exec != args->num_batch_buffer))
> > > > return -EINVAL;
> > > >
> > > > if (XE_IOCTL_DBG(xe, q->flags & EXEC_QUEUE_FLAG_BANNED)) {
> > > > @@ -189,7 +189,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > > >
> > > > if (xe_exec_queue_is_parallel(q)) {
> > > > err = __copy_from_user(addresses, addresses_user, sizeof(u64) *
> > > > - q->width);
> > > > + q->num_bb_per_exec);
> > > > if (err) {
> > > > err = -EFAULT;
> > > > goto err_syncs;
> > > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > > index 59e8d1ed34f7..849e463c4ed8 100644
> > > > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > > @@ -33,7 +33,8 @@ enum xe_exec_queue_sched_prop {
> > > > static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > > struct xe_vm *vm,
> > > > u32 logical_mask,
> > > > - u16 width, struct xe_hw_engine *hwe,
> > > > + u16 num_bb_per_exec,
> > > > + struct xe_hw_engine *hwe,
> > > > u32 flags)
> > > > {
> > > > struct xe_exec_queue *q;
> > > > @@ -44,7 +45,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > > /* only kernel queues can be permanent */
> > > > XE_WARN_ON((flags & EXEC_QUEUE_FLAG_PERMANENT) && !(flags & EXEC_QUEUE_FLAG_KERNEL));
> > > >
> > > > - q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * width, GFP_KERNEL);
> > > > + q = kzalloc(sizeof(*q) + sizeof(struct xe_lrc) * num_bb_per_exec, GFP_KERNEL);
> > > > if (!q)
> > > > return ERR_PTR(-ENOMEM);
> > > >
> > > > @@ -55,7 +56,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > > if (vm)
> > > > q->vm = xe_vm_get(vm);
> > > > q->class = hwe->class;
> > > > - q->width = width;
> > > > + q->num_bb_per_exec = num_bb_per_exec;
> > > > q->logical_mask = logical_mask;
> > > > q->fence_irq = >->fence_irq[hwe->class];
> > > > q->ring_ops = gt->ring_ops[hwe->class];
> > > > @@ -77,7 +78,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > > q->bind.fence_seqno = XE_FENCE_INITIAL_SEQNO;
> > > > }
> > > >
> > > > - for (i = 0; i < width; ++i) {
> > > > + for (i = 0; i < num_bb_per_exec; ++i) {
> > > > err = xe_lrc_init(q->lrc + i, hwe, q, vm, SZ_16K);
> > > > if (err)
> > > > goto err_lrc;
> > > > @@ -108,7 +109,7 @@ static struct xe_exec_queue *__xe_exec_queue_create(struct xe_device *xe,
> > > > }
> > > >
> > > > struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
> > > > - u32 logical_mask, u16 width,
> > > > + u32 logical_mask, u16 num_bb_per_exec,
> > > > struct xe_hw_engine *hwe, u32 flags)
> > > > {
> > > > struct xe_exec_queue *q;
> > > > @@ -119,7 +120,7 @@ struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v
> > > > if (err)
> > > > return ERR_PTR(err);
> > > > }
> > > > - q = __xe_exec_queue_create(xe, vm, logical_mask, width, hwe, flags);
> > > > + q = __xe_exec_queue_create(xe, vm, logical_mask, num_bb_per_exec, hwe, flags);
> > > > if (vm)
> > > > xe_vm_unlock(vm);
> > > >
> > > > @@ -170,7 +171,7 @@ void xe_exec_queue_fini(struct xe_exec_queue *q)
> > > > {
> > > > int i;
> > > >
> > > > - for (i = 0; i < q->width; ++i)
> > > > + for (i = 0; i < q->num_bb_per_exec; ++i)
> > > > xe_lrc_finish(q->lrc + i);
> > > > if (q->vm)
> > > > xe_vm_put(q->vm);
> > > > @@ -512,15 +513,15 @@ find_hw_engine(struct xe_device *xe,
> > > >
> > > > static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > > > struct drm_xe_engine_class_instance *eci,
> > > > - u16 width, u16 num_placements)
> > > > + u16 num_bb_per_exec, u16 num_dispositions)
> > > > {
> > > > struct xe_hw_engine *hwe;
> > > > enum xe_hw_engine_id id;
> > > > u32 logical_mask = 0;
> > > >
> > > > - if (XE_IOCTL_DBG(xe, width != 1))
> > > > + if (XE_IOCTL_DBG(xe, num_bb_per_exec != 1))
> > > > return 0;
> > > > - if (XE_IOCTL_DBG(xe, num_placements != 1))
> > > > + if (XE_IOCTL_DBG(xe, num_dispositions != 1))
> > > > return 0;
> > > > if (XE_IOCTL_DBG(xe, eci[0].engine_instance != 0))
> > > > return 0;
> > > > @@ -541,9 +542,9 @@ static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > > >
> > > > static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > > > struct drm_xe_engine_class_instance *eci,
> > > > - u16 width, u16 num_placements)
> > > > + u16 num_bb_per_exec, u16 num_dispositions)
> > > > {
> > > > - int len = width * num_placements;
> > > > + int len = num_bb_per_exec * num_dispositions;
> > > > int i, j, n;
> > > > u16 class;
> > > > u16 gt_id;
> > > > @@ -553,13 +554,13 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > > > len > 1))
> > > > return 0;
> > > >
> > > > - for (i = 0; i < width; ++i) {
> > > > + for (i = 0; i < num_bb_per_exec; ++i) {
> > > > u32 current_mask = 0;
> > > >
> > > > - for (j = 0; j < num_placements; ++j) {
> > > > + for (j = 0; j < num_dispositions; ++j) {
> > > > struct xe_hw_engine *hwe;
> > > >
> > > > - n = j * width + i;
> > > > + n = j * num_bb_per_exec + i;
> > > >
> > > > hwe = find_hw_engine(xe, eci[n]);
> > > > if (XE_IOCTL_DBG(xe, !hwe))
> > > > @@ -575,7 +576,7 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
> > > > class = eci[n].engine_class;
> > > > gt_id = eci[n].gt_id;
> > > >
> > > > - if (width == 1 || !i)
> > > > + if (num_bb_per_exec == 1 || !i)
> > > > return_mask |= BIT(eci[n].engine_instance);
> > > > current_mask |= BIT(eci[n].engine_instance);
> > > > }
> > > > @@ -612,7 +613,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > > > XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
> > > > return -EINVAL;
> > > >
> > > > - len = args->width * args->num_placements;
> > > > + len = args->num_bb_per_exec * args->num_dispositions;
> > > > if (XE_IOCTL_DBG(xe, !len || len > XE_HW_ENGINE_MAX_INSTANCE))
> > > > return -EINVAL;
> > > >
> > > > @@ -637,8 +638,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > > >
> > > > eci[0].gt_id = gt->info.id;
> > > > logical_mask = bind_exec_queue_logical_mask(xe, gt, eci,
> > > > - args->width,
> > > > - args->num_placements);
> > > > + args->num_bb_per_exec,
> > > > + args->num_dispositions);
> > > > if (XE_IOCTL_DBG(xe, !logical_mask))
> > > > return -EINVAL;
> > > >
> > > > @@ -651,7 +652,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > > >
> > > > migrate_vm = xe_migrate_get_vm(gt_to_tile(gt)->migrate);
> > > > new = xe_exec_queue_create(xe, migrate_vm, logical_mask,
> > > > - args->width, hwe,
> > > > + args->num_bb_per_exec, hwe,
> > > > EXEC_QUEUE_FLAG_PERSISTENT |
> > > > EXEC_QUEUE_FLAG_VM |
> > > > (sync ? 0 :
> > > > @@ -678,8 +679,8 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > > > } else {
> > > > gt = xe_device_get_gt(xe, eci[0].gt_id);
> > > > logical_mask = calc_validate_logical_mask(xe, gt, eci,
> > > > - args->width,
> > > > - args->num_placements);
> > > > + args->num_bb_per_exec,
> > > > + args->num_dispositions);
> > > > if (XE_IOCTL_DBG(xe, !logical_mask))
> > > > return -EINVAL;
> > > >
> > > > @@ -704,7 +705,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
> > > > }
> > > >
> > > > q = xe_exec_queue_create(xe, vm, logical_mask,
> > > > - args->width, hwe,
> > > > + args->num_bb_per_exec, hwe,
> > > > xe_vm_no_dma_fences(vm) ? 0 :
> > > > EXEC_QUEUE_FLAG_PERSISTENT);
> > > > up_read(&vm->lock);
> > > > @@ -827,7 +828,7 @@ bool xe_exec_queue_is_idle(struct xe_exec_queue *q)
> > > > if (xe_exec_queue_is_parallel(q)) {
> > > > int i;
> > > >
> > > > - for (i = 0; i < q->width; ++i) {
> > > > + for (i = 0; i < q->num_bb_per_exec; ++i) {
> > > > if (xe_lrc_seqno(&q->lrc[i]) !=
> > > > q->lrc[i].fence_ctx.next_seqno - 1)
> > > > return false;
> > > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
> > > > index 59a54bfb9a8c..6782f3ce9faf 100644
> > > > --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> > > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> > > > @@ -15,7 +15,7 @@ struct xe_device;
> > > > struct xe_file;
> > > >
> > > > struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
> > > > - u32 logical_mask, u16 width,
> > > > + u32 logical_mask, u16 num_bb_per_exec,
> > > > struct xe_hw_engine *hw_engine, u32 flags);
> > > > struct xe_exec_queue *xe_exec_queue_create_class(struct xe_device *xe, struct xe_gt *gt,
> > > > struct xe_vm *vm,
> > > > @@ -40,7 +40,7 @@ static inline void xe_exec_queue_put(struct xe_exec_queue *q)
> > > >
> > > > static inline bool xe_exec_queue_is_parallel(struct xe_exec_queue *q)
> > > > {
> > > > - return q->width > 1;
> > > > + return q->num_bb_per_exec > 1;
> > > > }
> > > >
> > > > bool xe_exec_queue_is_lr(struct xe_exec_queue *q);
> > > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > > index ecd761177567..eb924a3e5d98 100644
> > > > --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > > +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > > @@ -47,8 +47,8 @@ struct xe_exec_queue {
> > > > u32 logical_mask;
> > > > /** @name: name of this exec queue */
> > > > char name[MAX_FENCE_NAME_LEN];
> > > > - /** @width: width (number BB submitted per exec) of this exec queue */
> > > > - u16 width;
> > > > + /** @num_bb_per_exec: the width of this exec queue */
> > > > + u16 num_bb_per_exec;
> > > > /** @fence_irq: fence IRQ used to signal job completion */
> > > > struct xe_hw_fence_irq *fence_irq;
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > > index 870dc5c532fa..b5a41a772445 100644
> > > > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > > > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > > @@ -259,7 +259,7 @@ static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa
> > > > if (xe_exec_queue_is_parallel(q))
> > > > bitmap_release_region(guc->submission_state.guc_ids_bitmap,
> > > > q->guc->id - GUC_ID_START_MLRC,
> > > > - order_base_2(q->width));
> > > > + order_base_2(q->num_bb_per_exec));
> > > > else
> > > > ida_simple_remove(&guc->submission_state.guc_ids, q->guc->id);
> > > > }
> > > > @@ -283,7 +283,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > > > void *bitmap = guc->submission_state.guc_ids_bitmap;
> > > >
> > > > ret = bitmap_find_free_region(bitmap, GUC_ID_NUMBER_MLRC,
> > > > - order_base_2(q->width));
> > > > + order_base_2(q->num_bb_per_exec));
> > > > } else {
> > > > ret = ida_simple_get(&guc->submission_state.guc_ids, 0,
> > > > GUC_ID_NUMBER_SLRC, GFP_NOWAIT);
> > > > @@ -295,7 +295,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > > > if (xe_exec_queue_is_parallel(q))
> > > > q->guc->id += GUC_ID_START_MLRC;
> > > >
> > > > - for (i = 0; i < q->width; ++i) {
> > > > + for (i = 0; i < q->num_bb_per_exec; ++i) {
> > > > ptr = xa_store(&guc->submission_state.exec_queue_lookup,
> > > > q->guc->id + i, q, GFP_NOWAIT);
> > > > if (IS_ERR(ptr)) {
> > > > @@ -315,7 +315,7 @@ static int alloc_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > > > static void release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q)
> > > > {
> > > > mutex_lock(&guc->submission_state.lock);
> > > > - __release_guc_id(guc, q, q->width);
> > > > + __release_guc_id(guc, q, q->num_bb_per_exec);
> > > > mutex_unlock(&guc->submission_state.lock);
> > > > }
> > > >
> > > > @@ -426,11 +426,11 @@ static void __register_mlrc_engine(struct xe_guc *guc,
> > > > action[len++] = info->wq_base_lo;
> > > > action[len++] = info->wq_base_hi;
> > > > action[len++] = info->wq_size;
> > > > - action[len++] = q->width;
> > > > + action[len++] = q->num_bb_per_exec;
> > > > action[len++] = info->hwlrca_lo;
> > > > action[len++] = info->hwlrca_hi;
> > > >
> > > > - for (i = 1; i < q->width; ++i) {
> > > > + for (i = 1; i < q->num_bb_per_exec; ++i) {
> > > > struct xe_lrc *lrc = q->lrc + i;
> > > >
> > > > action[len++] = lower_32_bits(xe_lrc_descriptor(lrc));
> > > > @@ -578,7 +578,7 @@ static void wq_item_append(struct xe_exec_queue *q)
> > > > struct iosys_map map = xe_lrc_parallel_map(q->lrc);
> > > > #define WQ_HEADER_SIZE 4 /* Includes 1 LRC address too */
> > > > u32 wqi[XE_HW_ENGINE_MAX_INSTANCE + (WQ_HEADER_SIZE - 1)];
> > > > - u32 wqi_size = (q->width + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
> > > > + u32 wqi_size = (q->num_bb_per_exec + (WQ_HEADER_SIZE - 1)) * sizeof(u32);
> > > > u32 len_dw = (wqi_size / sizeof(u32)) - 1;
> > > > int i = 0, j;
> > > >
> > > > @@ -595,7 +595,7 @@ static void wq_item_append(struct xe_exec_queue *q)
> > > > wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
> > > > FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc->ring.tail / sizeof(u64));
> > > > wqi[i++] = 0;
> > > > - for (j = 1; j < q->width; ++j) {
> > > > + for (j = 1; j < q->num_bb_per_exec; ++j) {
> > > > struct xe_lrc *lrc = q->lrc + j;
> > > >
> > > > wqi[i++] = lrc->ring.tail / sizeof(u64);
> > > > @@ -766,17 +766,17 @@ static void simple_error_capture(struct xe_exec_queue *q)
> > > > struct xe_hw_engine *hwe;
> > > > enum xe_hw_engine_id id;
> > > > u32 adj_logical_mask = q->logical_mask;
> > > > - u32 width_mask = (0x1 << q->width) - 1;
> > > > + u32 width_mask = (0x1 << q->num_bb_per_exec) - 1;
> > > > int i;
> > > > bool cookie;
> > > >
> > > > if (q->vm && !q->vm->error_capture.capture_once) {
> > > > q->vm->error_capture.capture_once = true;
> > > > cookie = dma_fence_begin_signalling();
> > > > - for (i = 0; q->width > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > > > + for (i = 0; q->num_bb_per_exec > 1 && i < XE_HW_ENGINE_MAX_INSTANCE;) {
> > > > if (adj_logical_mask & BIT(i)) {
> > > > adj_logical_mask |= width_mask << i;
> > > > - i += q->width;
> > > > + i += q->num_bb_per_exec;
> > > > } else {
> > > > ++i;
> > > > }
> > > > @@ -1462,7 +1462,7 @@ static void guc_exec_queue_start(struct xe_exec_queue *q)
> > > > int i;
> > > >
> > > > trace_xe_exec_queue_resubmit(q);
> > > > - for (i = 0; i < q->width; ++i)
> > > > + for (i = 0; i < q->num_bb_per_exec; ++i)
> > > > xe_lrc_set_ring_head(q->lrc + i, q->lrc[i].ring.tail);
> > > > drm_sched_resubmit_jobs(sched);
> > > > }
> > > > @@ -1508,7 +1508,7 @@ g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
> > > > }
> > > >
> > > > xe_assert(xe, guc_id >= q->guc->id);
> > > > - xe_assert(xe, guc_id < (q->guc->id + q->width));
> > > > + xe_assert(xe, guc_id < (q->guc->id + q->num_bb_per_exec));
> > > >
> > > > return q;
> > > > }
> > > > @@ -1768,20 +1768,20 @@ xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q)
> > > > memcpy(&snapshot->name, &q->name, sizeof(snapshot->name));
> > > > snapshot->class = q->class;
> > > > snapshot->logical_mask = q->logical_mask;
> > > > - snapshot->width = q->width;
> > > > + snapshot->width = q->num_bb_per_exec;
> > > > snapshot->refcount = kref_read(&q->refcount);
> > > > snapshot->sched_timeout = sched->timeout;
> > > > snapshot->sched_props.timeslice_us = q->sched_props.timeslice_us;
> > > > snapshot->sched_props.preempt_timeout_us =
> > > > q->sched_props.preempt_timeout_us;
> > > >
> > > > - snapshot->lrc = kmalloc_array(q->width, sizeof(struct lrc_snapshot),
> > > > + snapshot->lrc = kmalloc_array(q->num_bb_per_exec, sizeof(struct lrc_snapshot),
> > > > GFP_ATOMIC);
> > > >
> > > > if (!snapshot->lrc) {
> > > > drm_err(&xe->drm, "Skipping GuC Engine LRC snapshot.\n");
> > > > } else {
> > > > - for (i = 0; i < q->width; ++i) {
> > > > + for (i = 0; i < q->num_bb_per_exec; ++i) {
> > > > struct xe_lrc *lrc = q->lrc + i;
> > > >
> > > > snapshot->lrc[i].context_desc =
> > > > diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> > > > index 59e0aa2d6a4c..d3d671784e8e 100644
> > > > --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> > > > +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> > > > @@ -383,7 +383,7 @@ static void emit_job_gen12_gsc(struct xe_sched_job *job)
> > > > {
> > > > struct xe_gt *gt = job->q->gt;
> > > >
> > > > - xe_gt_assert(gt, job->q->width <= 1); /* no parallel submission for GSCCS */
> > > > + xe_gt_assert(gt, job->q->num_bb_per_exec <= 1); /* no parallel submission for GSCCS */
> > > >
> > > > __emit_job_gen12_simple(job, job->q->lrc,
> > > > job->batch_addr[0],
> > > > @@ -400,7 +400,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
> > > > return;
> > > > }
> > > >
> > > > - for (i = 0; i < job->q->width; ++i)
> > > > + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> > > > __emit_job_gen12_simple(job, job->q->lrc + i,
> > > > job->batch_addr[i],
> > > > xe_sched_job_seqno(job));
> > > > @@ -411,7 +411,7 @@ static void emit_job_gen12_video(struct xe_sched_job *job)
> > > > int i;
> > > >
> > > > /* FIXME: Not doing parallel handshake for now */
> > > > - for (i = 0; i < job->q->width; ++i)
> > > > + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> > > > __emit_job_gen12_video(job, job->q->lrc + i,
> > > > job->batch_addr[i],
> > > > xe_sched_job_seqno(job));
> > > > @@ -421,7 +421,7 @@ static void emit_job_gen12_render_compute(struct xe_sched_job *job)
> > > > {
> > > > int i;
> > > >
> > > > - for (i = 0; i < job->q->width; ++i)
> > > > + for (i = 0; i < job->q->num_bb_per_exec; ++i)
> > > > __emit_job_gen12_render_compute(job, job->q->lrc + i,
> > > > job->batch_addr[i],
> > > > xe_sched_job_seqno(job));
> > > > diff --git a/drivers/gpu/drm/xe/xe_sched_job.c b/drivers/gpu/drm/xe/xe_sched_job.c
> > > > index adbd82f8744e..1884b6b6b398 100644
> > > > --- a/drivers/gpu/drm/xe/xe_sched_job.c
> > > > +++ b/drivers/gpu/drm/xe/xe_sched_job.c
> > > > @@ -117,13 +117,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> > > > } else {
> > > > struct dma_fence_array *cf;
> > > >
> > > > - fences = kmalloc_array(q->width, sizeof(*fences), GFP_KERNEL);
> > > > + fences = kmalloc_array(q->num_bb_per_exec, sizeof(*fences), GFP_KERNEL);
> > > > if (!fences) {
> > > > err = -ENOMEM;
> > > > goto err_sched_job;
> > > > }
> > > >
> > > > - for (j = 0; j < q->width; ++j) {
> > > > + for (j = 0; j < q->num_bb_per_exec; ++j) {
> > > > fences[j] = xe_lrc_create_seqno_fence(q->lrc + j);
> > > > if (IS_ERR(fences[j])) {
> > > > err = PTR_ERR(fences[j]);
> > > > @@ -131,7 +131,7 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> > > > }
> > > > }
> > > >
> > > > - cf = dma_fence_array_create(q->width, fences,
> > > > + cf = dma_fence_array_create(q->num_bb_per_exec, fences,
> > > > q->parallel.composite_fence_ctx,
> > > > q->parallel.composite_fence_seqno++,
> > > > false);
> > > > @@ -142,13 +142,13 @@ struct xe_sched_job *xe_sched_job_create(struct xe_exec_queue *q,
> > > > }
> > > >
> > > > /* Sanity check */
> > > > - for (j = 0; j < q->width; ++j)
> > > > + for (j = 0; j < q->num_bb_per_exec; ++j)
> > > > xe_assert(job_to_xe(job), cf->base.seqno == fences[j]->seqno);
> > > >
> > > > job->fence = &cf->base;
> > > > }
> > > >
> > > > - width = q->width;
> > > > + width = q->num_bb_per_exec;
> > > > if (is_migration)
> > > > width = 2;
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_trace.h b/drivers/gpu/drm/xe/xe_trace.h
> > > > index d55dd1521df3..dcf28aaeb78a 100644
> > > > --- a/drivers/gpu/drm/xe/xe_trace.h
> > > > +++ b/drivers/gpu/drm/xe/xe_trace.h
> > > > @@ -112,7 +112,7 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
> > > > __field(enum xe_engine_class, class)
> > > > __field(u32, logical_mask)
> > > > __field(u8, gt_id)
> > > > - __field(u16, width)
> > > > + __field(u16, num_bb_per_exec)
> > > > __field(u16, guc_id)
> > > > __field(u32, guc_state)
> > > > __field(u32, flags)
> > > > @@ -122,15 +122,15 @@ DECLARE_EVENT_CLASS(xe_exec_queue,
> > > > __entry->class = q->class;
> > > > __entry->logical_mask = q->logical_mask;
> > > > __entry->gt_id = q->gt->info.id;
> > > > - __entry->width = q->width;
> > > > + __entry->num_bb_per_exec = q->num_bb_per_exec;
> > > > __entry->guc_id = q->guc->id;
> > > > __entry->guc_state = atomic_read(&q->guc->state);
> > > > __entry->flags = q->flags;
> > > > ),
> > > >
> > > > - TP_printk("%d:0x%x, gt=%d, width=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
> > > > + TP_printk("%d:0x%x, gt=%d, num_bb_per_exec=%d, guc_id=%d, guc_state=0x%x, flags=0x%x",
> > > > __entry->class, __entry->logical_mask,
> > > > - __entry->gt_id, __entry->width, __entry->guc_id,
> > > > + __entry->gt_id, __entry->num_bb_per_exec, __entry->guc_id,
> > > > __entry->guc_state, __entry->flags)
> > > > );
> > > >
> > > > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > > > index 2d0fb4386a69..a6c70b8697c7 100644
> > > > --- a/include/uapi/drm/xe_drm.h
> > > > +++ b/include/uapi/drm/xe_drm.h
> > > > @@ -1013,11 +1013,17 @@ struct drm_xe_exec_queue_create {
> > > > /** @extensions: Pointer to the first extension struct, if any */
> > > > __u64 extensions;
> > > >
> > > > - /** @width: submission width (number BB per exec) for this exec queue */
> > > > - __u16 width;
> > > > + /**
> > > > + * @num_bb_per_exec: Indicates a submission width for this exec queue,
> > > > + * for how many batch buffers can be submitted in parallel.
> > >
> > > 'can' sounds like 'up to' in here, would change that to 'will'.
> > >
> > > > + */
> > > > + __u16 num_bb_per_exec;
> > > >
> > > > - /** @num_placements: number of valid placements for this exec queue */
> > > > - __u16 num_placements;
> > > > + /**
> > > > + * @num_dispositions: Indicates how the batch buffers will be
> > > > + * distributed to the hardware engines listed on @instance.
> > > > + */
> > > > + __u16 num_dispositions;
> > > >
> > > > /** @vm_id: VM to use for this exec queue */
> > > > __u32 vm_id;
> > > > @@ -1032,8 +1038,8 @@ struct drm_xe_exec_queue_create {
> > > > * @instances: user pointer to a 2-d array of struct
> > > > * drm_xe_engine_class_instance
> > > > *
> > > > - * length = width (i) * num_placements (j)
> > > > - * index = j + i * width
> > > > + * length = num_bb_per_exec (i) * num_dispositions (j)
> > > > + * index = j + i * num_bb_per_exec
> > > > */
> > > > __u64 instances;
> > > >
> > > > @@ -1143,7 +1149,7 @@ struct drm_xe_exec {
> > > >
> > > > /**
> > > > * @num_batch_buffer: number of batch buffer in this exec, must match
> > > > - * the width of the engine
> > > > + * the @num_bb_per_exec of the struct drm_xe_exec_queue_create
> > > > */
> > > > __u16 num_batch_buffer;
> > > >
> > >
>
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 39/50] drm/xe/uapi: Refactor engine information
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (37 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 38/50] drm/xe/uapi: Rename couple exec_queue items Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 40/50] drm/xe/uapi: Add link to Xe documentation Francois Dugast
` (17 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
First of all, let's add the tile and gt IDs to the engine_info.
We originally tried to abstract tile from the uAPI, but it is
not future proof since the tile might be important info to the
user space in regarding cache line information.
Now that we have gt_id as part of the info, let's convert
the instance.gt_id into a generic scheduling group id number.
For all the current platforms, the scheduling group is the
GT ID underneath, but at least the API becomes flexible enough
to allow different kind of engine grouping without necessarily
get so tied to the GT ID.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_exec_queue.c | 17 +++++++++--------
drivers/gpu/drm/xe/xe_query.c | 13 ++++++++++---
drivers/gpu/drm/xe/xe_wait_user_fence.c | 4 ++--
include/uapi/drm/xe_drm.h | 12 ++++++++++--
4 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 849e463c4ed8..15fe709384e7 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -500,13 +500,13 @@ find_hw_engine(struct xe_device *xe,
if (eci.engine_class > ARRAY_SIZE(user_to_xe_engine_class))
return NULL;
- if (eci.gt_id >= xe->info.gt_count)
+ if (eci.sched_group_id >= xe->info.gt_count)
return NULL;
idx = array_index_nospec(eci.engine_class,
ARRAY_SIZE(user_to_xe_engine_class));
- return xe_gt_hw_engine(xe_device_get_gt(xe, eci.gt_id),
+ return xe_gt_hw_engine(xe_device_get_gt(xe, eci.sched_group_id),
user_to_xe_engine_class[idx],
eci.engine_instance, true);
}
@@ -547,7 +547,7 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
int len = num_bb_per_exec * num_dispositions;
int i, j, n;
u16 class;
- u16 gt_id;
+ u16 sched_group_id;
u32 return_mask = 0, prev_mask;
if (XE_IOCTL_DBG(xe, !xe_device_uc_enabled(xe) &&
@@ -569,12 +569,13 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
if (XE_IOCTL_DBG(xe, xe_hw_engine_is_reserved(hwe)))
return 0;
- if (XE_IOCTL_DBG(xe, n && eci[n].gt_id != gt_id) ||
+ if (XE_IOCTL_DBG(xe, n &&
+ eci[n].sched_group_id != sched_group_id) ||
XE_IOCTL_DBG(xe, n && eci[n].engine_class != class))
return 0;
class = eci[n].engine_class;
- gt_id = eci[n].gt_id;
+ sched_group_id = eci[n].sched_group_id;
if (num_bb_per_exec == 1 || !i)
return_mask |= BIT(eci[n].engine_instance);
@@ -623,7 +624,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(xe, err))
return -EFAULT;
- if (XE_IOCTL_DBG(xe, eci[0].gt_id >= xe->info.gt_count))
+ if (XE_IOCTL_DBG(xe, eci[0].sched_group_id >= xe->info.gt_count))
return -EINVAL;
if (eci[0].engine_class >= DRM_XE_ENGINE_CLASS_VM_BIND_ASYNC) {
@@ -636,7 +637,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
if (xe_gt_is_media_type(gt))
continue;
- eci[0].gt_id = gt->info.id;
+ eci[0].sched_group_id = gt->info.id;
logical_mask = bind_exec_queue_logical_mask(xe, gt, eci,
args->num_bb_per_exec,
args->num_dispositions);
@@ -677,7 +678,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
&q->multi_gt_link);
}
} else {
- gt = xe_device_get_gt(xe, eci[0].gt_id);
+ gt = xe_device_get_gt(xe, eci[0].sched_group_id);
logical_mask = calc_validate_logical_mask(xe, gt, eci,
args->num_bb_per_exec,
args->num_dispositions);
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 4ee002b76f21..e23c179c9cec 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -131,10 +131,10 @@ query_engine_cycles(struct xe_device *xe,
return -EINVAL;
eci = &resp.eci;
- if (eci->gt_id > XE_MAX_GT_PER_TILE)
+ if (eci->sched_group_id > XE_MAX_GT_PER_TILE)
return -EINVAL;
- gt = xe_device_get_gt(xe, eci->gt_id);
+ gt = xe_device_get_gt(xe, eci->sched_group_id);
if (!gt)
return -EINVAL;
@@ -215,8 +215,15 @@ static int query_engines(struct xe_device *xe,
xe_to_user_engine_class[hwe->class];
hw_engine_info[i].instance.engine_instance =
hwe->logical_instance;
- hw_engine_info[i].instance.gt_id = gt->info.id;
+ /*
+ * Scheduling Group ID is the global GT ID for the
+ * current hardware, although the API is flexible
+ */
+ hw_engine_info[i].instance.sched_group_id = gt->info.id;
hw_engine_info[i].instance.pad = 0;
+ hw_engine_info[i].tile_id = gt_to_tile(gt)->id;
+ hw_engine_info[i].gt_id = gt->info.id;
+
/*
* The mem_regions indexes in the mask below need to
* directly identify the struct
diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
index 4d5c2555ce41..dcbb1c578b22 100644
--- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
+++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
@@ -68,10 +68,10 @@ static int check_hw_engines(struct xe_device *xe,
enum xe_engine_class user_class =
user_to_xe_engine_class[eci[i].engine_class];
- if (eci[i].gt_id >= xe->info.tile_count)
+ if (eci[i].sched_group_id >= xe->info.tile_count)
return -EINVAL;
- if (!xe_gt_hw_engine(xe_device_get_gt(xe, eci[i].gt_id),
+ if (!xe_gt_hw_engine(xe_device_get_gt(xe, eci[i].sched_group_id),
user_class, eci[i].engine_instance, true))
return -EINVAL;
}
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index a6c70b8697c7..5b239c48f19d 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -211,8 +211,8 @@ struct drm_xe_engine_class_instance {
__u16 engine_class;
/** @engine_instance: Engine instance */
__u16 engine_instance;
- /** @gt_id: GT ID the instance is associated with */
- __u16 gt_id;
+ /** @sched_group_id: Scheduling Group ID for this engine instance */
+ __u16 sched_group_id;
/** @pad: MBZ */
__u16 pad;
};
@@ -228,6 +228,12 @@ struct drm_xe_query_engine_info {
/** @instance: The @drm_xe_engine_class_instance */
struct drm_xe_engine_class_instance instance;
+ /** @tile_id: Tile ID where this Engine lives */
+ __u16 tile_id;
+
+ /** @gt_id: GT ID where this Engine lives */
+ __u16 gt_id;
+
/**
* @near_mem_regions: Bit mask of instances from
* drm_xe_query_mem_regions that is near this engine.
@@ -1038,6 +1044,8 @@ struct drm_xe_exec_queue_create {
* @instances: user pointer to a 2-d array of struct
* drm_xe_engine_class_instance
*
+ * Every engine in the array needs to have the same @sched_group_id
+ *
* length = num_bb_per_exec (i) * num_dispositions (j)
* index = j + i * num_bb_per_exec
*/
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 40/50] drm/xe/uapi: Add link to Xe documentation
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (38 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 39/50] drm/xe/uapi: Refactor engine information Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 41/50] drm/xe/uapi: Crystal Reference Clock updates Francois Dugast
` (16 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Warn users of the uAPI about the existence of the Xe documentation, which
provides useful information to understand the uAPI. Currently linking to
the location of the documentation under gpu/rfc, will have to be updated
later.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 5b239c48f19d..3e119bb662f5 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -24,6 +24,8 @@ extern "C" {
* 5. uEvents
* 6. PMU
*
+ * Some concepts used here are explained in Documentation/gpu/rfc/xe.rst.
+ *
*/
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 41/50] drm/xe/uapi: Crystal Reference Clock updates
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (39 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 40/50] drm/xe/uapi: Add link to Xe documentation Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 42/50] drm/xe/uapi: Add Tile ID information to the GT info query Francois Dugast
` (15 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Matt Roper, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
First of all, let's remove the duplication.
But also, let's rename it to remove the word 'frequency'
out of it. In general, the first thing people think of frequency
is the frequency in which the GTs are operating to execute the
GPU instructions.
While this frequency here is a crystal reference clock frequency
which is the base of everything else, and in this case of this
uAPI it is used to calculate a better and precise timestamp.
v2: (Suggested by Jose) Remove the engine_cs and keep the GT info one
since it might be useful for other SRIOV cases where the engine_cs
will be zeroed. So, grabbing from the GT_LIST should be cleaner.
Cc: Matt Roper <matthew.d.roper@intel.com>
Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Cc: Jose Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_gt_clock.c | 4 ++--
drivers/gpu/drm/xe/xe_gt_types.h | 4 ++--
drivers/gpu/drm/xe/xe_query.c | 8 +-------
include/uapi/drm/xe_drm.h | 11 ++++-------
4 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_clock.c b/drivers/gpu/drm/xe/xe_gt_clock.c
index 25a18eaad9c4..937054e31d72 100644
--- a/drivers/gpu/drm/xe/xe_gt_clock.c
+++ b/drivers/gpu/drm/xe/xe_gt_clock.c
@@ -75,11 +75,11 @@ int xe_gt_clock_init(struct xe_gt *gt)
freq >>= 3 - REG_FIELD_GET(RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK, c0);
}
- gt->info.clock_freq = freq;
+ gt->info.reference_clock = freq;
return 0;
}
u64 xe_gt_clock_cycles_to_ns(const struct xe_gt *gt, u64 count)
{
- return DIV_ROUND_CLOSEST_ULL(count * NSEC_PER_SEC, gt->info.clock_freq);
+ return DIV_ROUND_CLOSEST_ULL(count * NSEC_PER_SEC, gt->info.reference_clock);
}
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index d3f2793684e2..56b0f22ee78d 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -107,8 +107,8 @@ struct xe_gt {
enum xe_gt_type type;
/** @id: Unique ID of this GT within the PCI Device */
u8 id;
- /** @clock_freq: clock frequency */
- u32 clock_freq;
+ /** @reference_clock: clock frequency */
+ u32 reference_clock;
/** @engine_mask: mask of engines present on GT */
u64 engine_mask;
/**
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index e23c179c9cec..733ef2404b01 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -146,8 +146,6 @@ query_engine_cycles(struct xe_device *xe,
if (!hwe)
return -EINVAL;
- resp.engine_frequency = gt->info.clock_freq;
-
xe_device_mem_access_get(xe);
xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
@@ -163,10 +161,6 @@ query_engine_cycles(struct xe_device *xe,
xe_device_mem_access_put(xe);
resp.width = 36;
- /* Only write to the output fields of user query */
- if (put_user(resp.engine_frequency, &query_ptr->engine_frequency))
- return -EFAULT;
-
if (put_user(resp.cpu_timestamp, &query_ptr->cpu_timestamp))
return -EFAULT;
@@ -409,7 +403,7 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
else
gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
gt_list->gt_list[id].gt_id = gt->info.id;
- gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
+ gt_list->gt_list[id].reference_clock = gt->info.reference_clock;
}
if (copy_to_user(query_ptr, gt_list, size)) {
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 3e119bb662f5..61ac0679e63d 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -428,8 +428,8 @@ struct drm_xe_query_gt {
__u16 type;
/** @gt_id: Unique ID of this GT within the PCI Device */
__u16 gt_id;
- /** @clock_freq: A clock frequency for timestamp */
- __u32 clock_freq;
+ /** @reference_clock: A clock frequency for timestamp */
+ __u32 reference_clock;
/** @reserved: Reserved */
__u64 reserved[8];
};
@@ -503,8 +503,8 @@ struct drm_xe_query_topology_mask {
* in .data. struct drm_xe_query_engine_cycles is allocated by the user and
* .data points to this allocated structure.
*
- * The query returns the engine cycles and the frequency that can
- * be used to calculate the engine timestamp. In addition the
+ * The query returns the engine cycles, which along with GT's @reference_clock,
+ * can be used to calculate the engine timestamp. In addition the
* query returns a set of cpu timestamps that indicate when the command
* streamer cycle count was captured.
*/
@@ -532,9 +532,6 @@ struct drm_xe_query_engine_cycles {
*/
__u64 engine_cycles;
- /** @engine_frequency: Frequency of the engine cycles in Hz. */
- __u64 engine_frequency;
-
/**
* @cpu_timestamp: CPU timestamp in ns. The timestamp is captured before
* reading the engine_cycles register using the reference clockid set by the
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 42/50] drm/xe/uapi: Add Tile ID information to the GT info query
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (40 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 41/50] drm/xe/uapi: Crystal Reference Clock updates Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 43/50] squash! drm/xe/uapi: Rename couple exec_queue items Francois Dugast
` (14 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
As an information only. So Userspace can use this information
and be able to correlate different GTs.
Make API symmetric between Engine and GT info.
There's no need right now to include a tile_query entry
since there's no other information that we need from tile
that is not already exposed through different queries.
However, this could be added later if we have different Tile
information that could matter to userspace. But let's keep
the API ready for a direct reference to Tile ID based on
the GT entry.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 1 +
include/uapi/drm/xe_drm.h | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 733ef2404b01..41e51c3f5aee 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -402,6 +402,7 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
else
gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
+ gt_list->gt_list[id].tile_id = gt_to_tile(gt)->id;
gt_list->gt_list[id].gt_id = gt->info.id;
gt_list->gt_list[id].reference_clock = gt->info.reference_clock;
}
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 61ac0679e63d..c541efc80e5d 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -426,6 +426,8 @@ struct drm_xe_query_gt {
#define DRM_XE_QUERY_GT_TYPE_MEDIA 1
/** @type: GT type: Main or Media */
__u16 type;
+ /** @tile_id: Tile ID where this GT lives (Information only) */
+ __u16 tile_id;
/** @gt_id: Unique ID of this GT within the PCI Device */
__u16 gt_id;
/** @reference_clock: A clock frequency for timestamp */
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 43/50] squash! drm/xe/uapi: Rename couple exec_queue items
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (41 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 42/50] drm/xe/uapi: Add Tile ID information to the GT info query Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 44/50] fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof Francois Dugast
` (13 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
(squash instead of the fixup so the commit message can be updated)
(new full commit message with new subject)
drm/xe/uapi: Exec queue documentation and variable renaming
Rename 'placement' to num_eng_per_bb and 'width' to num_bb_per_exec, and
give a graphical documentation to it.
Let's make it obvious and straight forward. Not only because it is important
to have variable names that are clear and descriptive, but also because
'placement' is now used in many terms around the memory_region selection
where the BO or the page table will live and 'width' is so generic and with
so many other common meaning in the graphics world.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_exec_queue.c | 16 +++----
include/uapi/drm/xe_drm.h | 70 ++++++++++++++++++++++++++++--
2 files changed, 74 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 15fe709384e7..e30363bb5152 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -513,7 +513,7 @@ find_hw_engine(struct xe_device *xe,
static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
struct drm_xe_engine_class_instance *eci,
- u16 num_bb_per_exec, u16 num_dispositions)
+ u16 num_bb_per_exec, u16 num_eng_per_bb)
{
struct xe_hw_engine *hwe;
enum xe_hw_engine_id id;
@@ -521,7 +521,7 @@ static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
if (XE_IOCTL_DBG(xe, num_bb_per_exec != 1))
return 0;
- if (XE_IOCTL_DBG(xe, num_dispositions != 1))
+ if (XE_IOCTL_DBG(xe, num_eng_per_bb != 1))
return 0;
if (XE_IOCTL_DBG(xe, eci[0].engine_instance != 0))
return 0;
@@ -542,9 +542,9 @@ static u32 bind_exec_queue_logical_mask(struct xe_device *xe, struct xe_gt *gt,
static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
struct drm_xe_engine_class_instance *eci,
- u16 num_bb_per_exec, u16 num_dispositions)
+ u16 num_bb_per_exec, u16 num_eng_per_bb)
{
- int len = num_bb_per_exec * num_dispositions;
+ int len = num_bb_per_exec * num_eng_per_bb;
int i, j, n;
u16 class;
u16 sched_group_id;
@@ -557,7 +557,7 @@ static u32 calc_validate_logical_mask(struct xe_device *xe, struct xe_gt *gt,
for (i = 0; i < num_bb_per_exec; ++i) {
u32 current_mask = 0;
- for (j = 0; j < num_dispositions; ++j) {
+ for (j = 0; j < num_eng_per_bb; ++j) {
struct xe_hw_engine *hwe;
n = j * num_bb_per_exec + i;
@@ -614,7 +614,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
return -EINVAL;
- len = args->num_bb_per_exec * args->num_dispositions;
+ len = args->num_bb_per_exec * args->num_eng_per_bb;
if (XE_IOCTL_DBG(xe, !len || len > XE_HW_ENGINE_MAX_INSTANCE))
return -EINVAL;
@@ -640,7 +640,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
eci[0].sched_group_id = gt->info.id;
logical_mask = bind_exec_queue_logical_mask(xe, gt, eci,
args->num_bb_per_exec,
- args->num_dispositions);
+ args->num_eng_per_bb);
if (XE_IOCTL_DBG(xe, !logical_mask))
return -EINVAL;
@@ -681,7 +681,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
gt = xe_device_get_gt(xe, eci[0].sched_group_id);
logical_mask = calc_validate_logical_mask(xe, gt, eci,
args->num_bb_per_exec,
- args->num_dispositions);
+ args->num_eng_per_bb);
if (XE_IOCTL_DBG(xe, !logical_mask))
return -EINVAL;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index c541efc80e5d..690d18e07650 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1012,6 +1012,68 @@ struct drm_xe_sync {
__u64 reserved[2];
};
+/**
+ * DOC: Execution Queue
+ *
+ * The Execution Queue abstracts the Hardware Engine that is going to be used
+ * with the execution of the Batch Buffers in &DRM_IOCTL_XE_EXEC
+ *
+ * In a regular usage of this execution queue, only one hardware engine pointer
+ * would be given as input of the @instances below and both @num_bb_per_exec and
+ * @num_eng_per_bb would be set to '1'.
+ *
+ * Regular execution example::
+ *
+ * ┌─────┐
+ * │ BB0 │
+ * └──┬──┘
+ * │ @num_bb_per_exec = 1
+ * │ @num_eng_per_bb = 1
+ * │ @instances = {Engine0}
+ * ▼
+ * ┌───────┐
+ * │Engine0│
+ * └───────┘
+ *
+ * However this execution queue is flexible to be used for parallel submission or
+ * for load balancing submission (a.k.a virtual load balancing).
+ *
+ * In a parallel submission, different batch buffers will be simultaneously
+ * dispatched to different engines listed in @instances, in a 1-1 relationship.
+ *
+ * Parallel execution example::
+ *
+ * ┌─────┐ ┌─────┐
+ * │ BB0 │ │ BB1 │
+ * └──┬──┘ └──┬──┘
+ * │ │ @num_bb_per_exec = 2
+ * │ │ @num_eng_per_bb = 1
+ * │ │ @instances = {Engine0, Engine1}
+ * ▼ ▼
+ * ┌───────┐ ┌───────┐
+ * │Engine0│ │Engine1│
+ * └───────┘ └───────┘
+ *
+ * On a load balancing submission, each batch buffer is virtually dispatched
+ * to all of the listed engine @instances. Then, underneath driver, firmware, or
+ * hardware can select the best available engine to actually run the job.
+ *
+ * Virtual Load Balancing example::
+ *
+ * ┌─────┐
+ * │ BB0 │
+ * └──┬──┘
+ * │ @num_bb_per_exec = 1
+ * │ @num_eng_per_bb = 2
+ * │ @instances = {Engine0, Engine1}
+ * ┌────┴────┐
+ * │ │
+ * ▼ ▼
+ * ┌───────┐ ┌───────┐
+ * │Engine0│ │Engine1│
+ * └───────┘ └───────┘
+ */
+
/**
* struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
*/
@@ -1027,10 +1089,10 @@ struct drm_xe_exec_queue_create {
__u16 num_bb_per_exec;
/**
- * @num_dispositions: Indicates how the batch buffers will be
- * distributed to the hardware engines listed on @instance.
+ * @num_eng_per_bb: Indicates how many possible engines are available
+ * at @instances for the Xe to distribute the load.
*/
- __u16 num_dispositions;
+ __u16 num_eng_per_bb;
/** @vm_id: VM to use for this exec queue */
__u32 vm_id;
@@ -1047,7 +1109,7 @@ struct drm_xe_exec_queue_create {
*
* Every engine in the array needs to have the same @sched_group_id
*
- * length = num_bb_per_exec (i) * num_dispositions (j)
+ * length = num_bb_per_exec (i) * num_eng_per_bb (j)
* index = j + i * num_bb_per_exec
*/
__u64 instances;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 44/50] fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (42 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 43/50] squash! drm/xe/uapi: Rename couple exec_queue items Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 45/50] drm/xe/uapi: Remove bogus engine list from the wait_user_fence IOCTL Francois Dugast
` (12 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Add more reserved space, since we already know in advance that we
will need to at least show capabilities, because not every engine
even within the same class is able to perform exactly the same actions.
We might also need flags and/or properties. So, let's give us a
bit more room to be really future proof.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
include/uapi/drm/xe_drm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 690d18e07650..757e6da97f87 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -259,7 +259,7 @@ struct drm_xe_query_engine_info {
__u64 far_mem_regions;
/** @reserved: Reserved */
- __u64 reserved[3];
+ __u64 reserved[5];
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 45/50] drm/xe/uapi: Remove bogus engine list from the wait_user_fence IOCTL
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (43 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 44/50] fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-08 0:05 ` Welty, Brian
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 46/50] drm/xe/uapi: Align on a common way to return arrays (memory regions) Francois Dugast
` (11 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Right now this is only checking if the engine list is sane and nothing
else. In the end every operation with this IOCTL is a soft check.
So, let's formalize that and only use this IOCTL to wait on the fence.
Upon timeout, userspace need then to inspect the engine properties
like BAN, in order to determine the reset status and any other
information that can be (or be added) there.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_wait_user_fence.c | 56 +------------------------
include/uapi/drm/xe_drm.h | 17 +-------
2 files changed, 3 insertions(+), 70 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
index dcbb1c578b22..a9d231548498 100644
--- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
+++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
@@ -58,29 +58,7 @@ static const enum xe_engine_class user_to_xe_engine_class[] = {
[DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
};
-static int check_hw_engines(struct xe_device *xe,
- struct drm_xe_engine_class_instance *eci,
- int num_engines)
-{
- int i;
-
- for (i = 0; i < num_engines; ++i) {
- enum xe_engine_class user_class =
- user_to_xe_engine_class[eci[i].engine_class];
-
- if (eci[i].sched_group_id >= xe->info.tile_count)
- return -EINVAL;
-
- if (!xe_gt_hw_engine(xe_device_get_gt(xe, eci[i].sched_group_id),
- user_class, eci[i].engine_instance, true))
- return -EINVAL;
- }
-
- return 0;
-}
-
-#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
- DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
+#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
#define MAX_OP DRM_XE_UFENCE_WAIT_OP_LTE
static long to_jiffies_timeout(struct xe_device *xe,
@@ -132,12 +110,8 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
struct xe_device *xe = to_xe_device(dev);
DEFINE_WAIT_FUNC(w_wait, woken_wake_function);
struct drm_xe_wait_user_fence *args = data;
- struct drm_xe_engine_class_instance eci[XE_HW_ENGINE_MAX_INSTANCE];
- struct drm_xe_engine_class_instance __user *user_eci =
- u64_to_user_ptr(args->instances);
u64 addr = args->addr;
int err;
- bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP;
long timeout;
ktime_t start;
@@ -151,41 +125,13 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(xe, args->op > MAX_OP))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, no_engines &&
- (args->num_engines || args->instances)))
- return -EINVAL;
-
- if (XE_IOCTL_DBG(xe, !no_engines && !args->num_engines))
- return -EINVAL;
-
if (XE_IOCTL_DBG(xe, addr & 0x7))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->num_engines > XE_HW_ENGINE_MAX_INSTANCE))
- return -EINVAL;
-
- if (!no_engines) {
- err = copy_from_user(eci, user_eci,
- sizeof(struct drm_xe_engine_class_instance) *
- args->num_engines);
- if (XE_IOCTL_DBG(xe, err))
- return -EFAULT;
-
- if (XE_IOCTL_DBG(xe, check_hw_engines(xe, eci,
- args->num_engines)))
- return -EINVAL;
- }
-
timeout = to_jiffies_timeout(xe, args);
start = ktime_get();
- /*
- * FIXME: Very simple implementation at the moment, single wait queue
- * for everything. Could be optimized to have a wait queue for every
- * hardware engine. Open coding as 'do_compare' can sleep which doesn't
- * work with the wait_event_* macros.
- */
add_wait_queue(&xe->ufence_wq, &w_wait);
for (;;) {
err = do_compare(addr, args->value, args->mask, args->op);
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 757e6da97f87..aada6f75b905 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -1278,8 +1278,7 @@ struct drm_xe_wait_user_fence {
/** @op: wait operation (type of comparison) */
__u16 op;
-#define DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
-#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 1)
+#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 0)
/** @flags: wait flags */
__u16 flags;
@@ -1312,20 +1311,8 @@ struct drm_xe_wait_user_fence {
*/
__s64 timeout;
- /**
- * @num_engines: number of engine instances to wait on, must be zero
- * when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
- */
- __u64 num_engines;
-
- /**
- * @instances: user pointer to array of drm_xe_engine_class_instance to
- * wait on, must be NULL when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
- */
- __u64 instances;
-
/** @reserved: Reserved */
- __u64 reserved[2];
+ __u64 reserved[4];
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 45/50] drm/xe/uapi: Remove bogus engine list from the wait_user_fence IOCTL
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 45/50] drm/xe/uapi: Remove bogus engine list from the wait_user_fence IOCTL Francois Dugast
@ 2023-11-08 0:05 ` Welty, Brian
2023-11-09 18:56 ` Rodrigo Vivi
0 siblings, 1 reply; 81+ messages in thread
From: Welty, Brian @ 2023-11-08 0:05 UTC (permalink / raw)
To: Francois Dugast, intel-xe; +Cc: Rodrigo Vivi
On 11/3/2023 7:34 AM, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Right now this is only checking if the engine list is sane and nothing
> else. In the end every operation with this IOCTL is a soft check.
> So, let's formalize that and only use this IOCTL to wait on the fence.
>
> Upon timeout, userspace need then to inspect the engine properties
> like BAN, in order to determine the reset status and any other
> information that can be (or be added) there.
I think the point of a per-engine wait was for long-running context?
In that case, a large timeout value would be specified... and then if
engine is reset (due to hang for example), it would abort the
wait_ufence early and return some error other than -ETIME.
But as you say, understand this is not even implemented right now so
makes sense to delete it.
If this is indeed needed in future, this can be restored again using
the drm_xe_wait_user_fence.extensions, correct?
-Brian
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_wait_user_fence.c | 56 +------------------------
> include/uapi/drm/xe_drm.h | 17 +-------
> 2 files changed, 3 insertions(+), 70 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> index dcbb1c578b22..a9d231548498 100644
> --- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
> +++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> @@ -58,29 +58,7 @@ static const enum xe_engine_class user_to_xe_engine_class[] = {
> [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
> };
>
> -static int check_hw_engines(struct xe_device *xe,
> - struct drm_xe_engine_class_instance *eci,
> - int num_engines)
> -{
> - int i;
> -
> - for (i = 0; i < num_engines; ++i) {
> - enum xe_engine_class user_class =
> - user_to_xe_engine_class[eci[i].engine_class];
> -
> - if (eci[i].sched_group_id >= xe->info.tile_count)
> - return -EINVAL;
> -
> - if (!xe_gt_hw_engine(xe_device_get_gt(xe, eci[i].sched_group_id),
> - user_class, eci[i].engine_instance, true))
> - return -EINVAL;
> - }
> -
> - return 0;
> -}
> -
> -#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
> - DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
> +#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
> #define MAX_OP DRM_XE_UFENCE_WAIT_OP_LTE
>
> static long to_jiffies_timeout(struct xe_device *xe,
> @@ -132,12 +110,8 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> struct xe_device *xe = to_xe_device(dev);
> DEFINE_WAIT_FUNC(w_wait, woken_wake_function);
> struct drm_xe_wait_user_fence *args = data;
> - struct drm_xe_engine_class_instance eci[XE_HW_ENGINE_MAX_INSTANCE];
> - struct drm_xe_engine_class_instance __user *user_eci =
> - u64_to_user_ptr(args->instances);
> u64 addr = args->addr;
> int err;
> - bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP;
> long timeout;
> ktime_t start;
>
> @@ -151,41 +125,13 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> if (XE_IOCTL_DBG(xe, args->op > MAX_OP))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, no_engines &&
> - (args->num_engines || args->instances)))
> - return -EINVAL;
> -
> - if (XE_IOCTL_DBG(xe, !no_engines && !args->num_engines))
> - return -EINVAL;
> -
> if (XE_IOCTL_DBG(xe, addr & 0x7))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, args->num_engines > XE_HW_ENGINE_MAX_INSTANCE))
> - return -EINVAL;
> -
> - if (!no_engines) {
> - err = copy_from_user(eci, user_eci,
> - sizeof(struct drm_xe_engine_class_instance) *
> - args->num_engines);
> - if (XE_IOCTL_DBG(xe, err))
> - return -EFAULT;
> -
> - if (XE_IOCTL_DBG(xe, check_hw_engines(xe, eci,
> - args->num_engines)))
> - return -EINVAL;
> - }
> -
> timeout = to_jiffies_timeout(xe, args);
>
> start = ktime_get();
>
> - /*
> - * FIXME: Very simple implementation at the moment, single wait queue
> - * for everything. Could be optimized to have a wait queue for every
> - * hardware engine. Open coding as 'do_compare' can sleep which doesn't
> - * work with the wait_event_* macros.
> - */
> add_wait_queue(&xe->ufence_wq, &w_wait);
> for (;;) {
> err = do_compare(addr, args->value, args->mask, args->op);
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 757e6da97f87..aada6f75b905 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -1278,8 +1278,7 @@ struct drm_xe_wait_user_fence {
> /** @op: wait operation (type of comparison) */
> __u16 op;
>
> -#define DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
> -#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 1)
> +#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 0)
> /** @flags: wait flags */
> __u16 flags;
>
> @@ -1312,20 +1311,8 @@ struct drm_xe_wait_user_fence {
> */
> __s64 timeout;
>
> - /**
> - * @num_engines: number of engine instances to wait on, must be zero
> - * when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
> - */
> - __u64 num_engines;
> -
> - /**
> - * @instances: user pointer to array of drm_xe_engine_class_instance to
> - * wait on, must be NULL when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
> - */
> - __u64 instances;
> -
> /** @reserved: Reserved */
> - __u64 reserved[2];
> + __u64 reserved[4];
> };
>
> /**
^ permalink raw reply [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 45/50] drm/xe/uapi: Remove bogus engine list from the wait_user_fence IOCTL
2023-11-08 0:05 ` Welty, Brian
@ 2023-11-09 18:56 ` Rodrigo Vivi
0 siblings, 0 replies; 81+ messages in thread
From: Rodrigo Vivi @ 2023-11-09 18:56 UTC (permalink / raw)
To: Welty, Brian; +Cc: Francois Dugast, intel-xe
On Tue, Nov 07, 2023 at 04:05:54PM -0800, Welty, Brian wrote:
>
>
> On 11/3/2023 7:34 AM, Francois Dugast wrote:
> > From: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> > Right now this is only checking if the engine list is sane and nothing
> > else. In the end every operation with this IOCTL is a soft check.
> > So, let's formalize that and only use this IOCTL to wait on the fence.
> >
> > Upon timeout, userspace need then to inspect the engine properties
> > like BAN, in order to determine the reset status and any other
> > information that can be (or be added) there.
>
> I think the point of a per-engine wait was for long-running context?
> In that case, a large timeout value would be specified... and then if
> engine is reset (due to hang for example), it would abort the wait_ufence
> early and return some error other than -ETIME.
> But as you say, understand this is not even implemented right now so
> makes sense to delete it.
>
> If this is indeed needed in future, this can be restored again using
> the drm_xe_wait_user_fence.extensions, correct?
yes, we could do that. or even returning earlier with a different error
wouldn't break the compatibility, and then the userspace inspecting the
engine status with the properties.
>
> -Brian
>
> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_wait_user_fence.c | 56 +------------------------
> > include/uapi/drm/xe_drm.h | 17 +-------
> > 2 files changed, 3 insertions(+), 70 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> > index dcbb1c578b22..a9d231548498 100644
> > --- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
> > +++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> > @@ -58,29 +58,7 @@ static const enum xe_engine_class user_to_xe_engine_class[] = {
> > [DRM_XE_ENGINE_CLASS_COMPUTE] = XE_ENGINE_CLASS_COMPUTE,
> > };
> > -static int check_hw_engines(struct xe_device *xe,
> > - struct drm_xe_engine_class_instance *eci,
> > - int num_engines)
> > -{
> > - int i;
> > -
> > - for (i = 0; i < num_engines; ++i) {
> > - enum xe_engine_class user_class =
> > - user_to_xe_engine_class[eci[i].engine_class];
> > -
> > - if (eci[i].sched_group_id >= xe->info.tile_count)
> > - return -EINVAL;
> > -
> > - if (!xe_gt_hw_engine(xe_device_get_gt(xe, eci[i].sched_group_id),
> > - user_class, eci[i].engine_instance, true))
> > - return -EINVAL;
> > - }
> > -
> > - return 0;
> > -}
> > -
> > -#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
> > - DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
> > +#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
> > #define MAX_OP DRM_XE_UFENCE_WAIT_OP_LTE
> > static long to_jiffies_timeout(struct xe_device *xe,
> > @@ -132,12 +110,8 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> > struct xe_device *xe = to_xe_device(dev);
> > DEFINE_WAIT_FUNC(w_wait, woken_wake_function);
> > struct drm_xe_wait_user_fence *args = data;
> > - struct drm_xe_engine_class_instance eci[XE_HW_ENGINE_MAX_INSTANCE];
> > - struct drm_xe_engine_class_instance __user *user_eci =
> > - u64_to_user_ptr(args->instances);
> > u64 addr = args->addr;
> > int err;
> > - bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP;
> > long timeout;
> > ktime_t start;
> > @@ -151,41 +125,13 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> > if (XE_IOCTL_DBG(xe, args->op > MAX_OP))
> > return -EINVAL;
> > - if (XE_IOCTL_DBG(xe, no_engines &&
> > - (args->num_engines || args->instances)))
> > - return -EINVAL;
> > -
> > - if (XE_IOCTL_DBG(xe, !no_engines && !args->num_engines))
> > - return -EINVAL;
> > -
> > if (XE_IOCTL_DBG(xe, addr & 0x7))
> > return -EINVAL;
> > - if (XE_IOCTL_DBG(xe, args->num_engines > XE_HW_ENGINE_MAX_INSTANCE))
> > - return -EINVAL;
> > -
> > - if (!no_engines) {
> > - err = copy_from_user(eci, user_eci,
> > - sizeof(struct drm_xe_engine_class_instance) *
> > - args->num_engines);
> > - if (XE_IOCTL_DBG(xe, err))
> > - return -EFAULT;
> > -
> > - if (XE_IOCTL_DBG(xe, check_hw_engines(xe, eci,
> > - args->num_engines)))
> > - return -EINVAL;
> > - }
> > -
> > timeout = to_jiffies_timeout(xe, args);
> > start = ktime_get();
> > - /*
> > - * FIXME: Very simple implementation at the moment, single wait queue
> > - * for everything. Could be optimized to have a wait queue for every
> > - * hardware engine. Open coding as 'do_compare' can sleep which doesn't
> > - * work with the wait_event_* macros.
> > - */
> > add_wait_queue(&xe->ufence_wq, &w_wait);
> > for (;;) {
> > err = do_compare(addr, args->value, args->mask, args->op);
> > diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> > index 757e6da97f87..aada6f75b905 100644
> > --- a/include/uapi/drm/xe_drm.h
> > +++ b/include/uapi/drm/xe_drm.h
> > @@ -1278,8 +1278,7 @@ struct drm_xe_wait_user_fence {
> > /** @op: wait operation (type of comparison) */
> > __u16 op;
> > -#define DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
> > -#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 1)
> > +#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 0)
> > /** @flags: wait flags */
> > __u16 flags;
> > @@ -1312,20 +1311,8 @@ struct drm_xe_wait_user_fence {
> > */
> > __s64 timeout;
> > - /**
> > - * @num_engines: number of engine instances to wait on, must be zero
> > - * when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
> > - */
> > - __u64 num_engines;
> > -
> > - /**
> > - * @instances: user pointer to array of drm_xe_engine_class_instance to
> > - * wait on, must be NULL when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
> > - */
> > - __u64 instances;
> > -
> > /** @reserved: Reserved */
> > - __u64 reserved[2];
> > + __u64 reserved[4];
> > };
> > /**
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 46/50] drm/xe/uapi: Align on a common way to return arrays (memory regions)
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (44 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 45/50] drm/xe/uapi: Remove bogus engine list from the wait_user_fence IOCTL Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 47/50] drm/xe/uapi: Align on a common way to return arrays (gt) Francois Dugast
` (10 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
The uAPI provides queries which return arrays of elements. As of now
the format used in the struct is different depending on which element
is queried. Fix this for memory regions by applying the pattern below:
struct drm_xe_query_X {
__u32 num_X;
struct drm_xe_X Xs[];
...
}
This removes "query" in the name of struct drm_xe_query_mem_region
as it is not returned from the query IOCTL. There is no functional
change.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 40 +++++++++++++++++------------------
include/uapi/drm/xe_drm.h | 38 ++++++++++++++++-----------------
2 files changed, 39 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 41e51c3f5aee..bdadbbdf5a90 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -262,15 +262,15 @@ static size_t calc_mem_regions_size(struct xe_device *xe)
if (ttm_manager_type(&xe->ttm, i))
num_managers++;
- return offsetof(struct drm_xe_query_mem_regions, regions[num_managers]);
+ return offsetof(struct drm_xe_query_mem_region, mem_regions[num_managers]);
}
-static int query_mem_regions(struct xe_device *xe,
+static int query_mem_region(struct xe_device *xe,
struct drm_xe_device_query *query)
{
size_t size = calc_mem_regions_size(xe);
- struct drm_xe_query_mem_regions *usage;
- struct drm_xe_query_mem_regions __user *query_ptr =
+ struct drm_xe_query_mem_region *usage;
+ struct drm_xe_query_mem_region __user *query_ptr =
u64_to_user_ptr(query->data);
struct ttm_resource_manager *man;
int ret, i;
@@ -287,41 +287,41 @@ static int query_mem_regions(struct xe_device *xe,
return -ENOMEM;
man = ttm_manager_type(&xe->ttm, XE_PL_TT);
- usage->regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
+ usage->mem_regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
/*
* The instance needs to be a unique number that represents the index
* in the placement mask used at xe_gem_create_ioctl() for the
* xe_bo_create() placement.
*/
- usage->regions[0].instance = 0;
- usage->regions[0].min_page_size = PAGE_SIZE;
- usage->regions[0].total_size = man->size << PAGE_SHIFT;
+ usage->mem_regions[0].instance = 0;
+ usage->mem_regions[0].min_page_size = PAGE_SIZE;
+ usage->mem_regions[0].total_size = man->size << PAGE_SHIFT;
if (perfmon_capable())
- usage->regions[0].used = ttm_resource_manager_usage(man);
- usage->num_regions = 1;
+ usage->mem_regions[0].used = ttm_resource_manager_usage(man);
+ usage->num_mem_regions = 1;
for (i = XE_PL_VRAM0; i <= XE_PL_VRAM1; ++i) {
man = ttm_manager_type(&xe->ttm, i);
if (man) {
- usage->regions[usage->num_regions].mem_class =
+ usage->mem_regions[usage->num_mem_regions].mem_class =
DRM_XE_MEM_REGION_CLASS_VRAM;
- usage->regions[usage->num_regions].instance =
- usage->num_regions;
- usage->regions[usage->num_regions].min_page_size =
+ usage->mem_regions[usage->num_mem_regions].instance =
+ usage->num_mem_regions;
+ usage->mem_regions[usage->num_mem_regions].min_page_size =
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ?
SZ_64K : PAGE_SIZE;
- usage->regions[usage->num_regions].total_size =
+ usage->mem_regions[usage->num_mem_regions].total_size =
man->size;
if (perfmon_capable()) {
xe_ttm_vram_get_used(man,
- &usage->regions[usage->num_regions].used,
- &usage->regions[usage->num_regions].cpu_visible_used);
+ &usage->mem_regions[usage->num_mem_regions].used,
+ &usage->mem_regions[usage->num_mem_regions].cpu_visible_used);
}
- usage->regions[usage->num_regions].cpu_visible_size =
+ usage->mem_regions[usage->num_mem_regions].cpu_visible_size =
xe_ttm_vram_get_cpu_visible_size(man);
- usage->num_regions++;
+ usage->num_mem_regions++;
}
}
@@ -570,7 +570,7 @@ query_uc_fw_version(struct xe_device *xe, struct drm_xe_device_query *query)
static int (* const xe_query_funcs[])(struct xe_device *xe,
struct drm_xe_device_query *query) = {
query_engines,
- query_mem_regions,
+ query_mem_region,
query_config,
query_gt_list,
query_hwconfig,
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index aada6f75b905..d416349bee77 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -238,23 +238,23 @@ struct drm_xe_query_engine_info {
/**
* @near_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_regions that is near this engine.
+ * drm_xe_query_mem_region that is near this engine.
* Each index in this mask refers directly to the struct
- * drm_xe_query_mem_regions' instance, no assumptions should
+ * drm_xe_query_mem_region's instance, no assumptions should
* be made about order. The type of each region is described
- * by struct drm_xe_query_mem_regions' mem_class.
+ * by struct drm_xe_mem_region's mem_class.
*/
__u64 near_mem_regions;
/**
* @far_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_regions that is far from this engine.
+ * drm_xe_query_mem_region that is far from this engine.
* In general, it has extra indirections when compared to the
* @near_mem_regions. For a discrete device this could mean system
* memory and memory living in a different Tile.
* Each index in this mask refers directly to the struct
- * drm_xe_query_mem_regions' instance, no assumptions should
+ * drm_xe_query_mem_region's instance, no assumptions should
* be made about order. The type of each region is described
- * by struct drm_xe_query_mem_regions' mem_class.
+ * by struct drm_xe_mem_region's mem_class.
*/
__u64 far_mem_regions;
@@ -277,10 +277,10 @@ enum drm_xe_memory_class {
};
/**
- * struct drm_xe_query_mem_region - Describes some region as known to
+ * struct drm_xe_mem_region - Describes some region as known to
* the driver.
*/
-struct drm_xe_query_mem_region {
+struct drm_xe_mem_region {
/**
* @mem_class: The memory class describing this region.
*
@@ -355,19 +355,19 @@ struct drm_xe_query_mem_region {
};
/**
- * struct drm_xe_query_mem_regions - describe memory regions
+ * struct drm_xe_query_mem_region - describe memory regions
*
* If a query is made with a struct drm_xe_device_query where .query
- * is equal to DRM_XE_DEVICE_QUERY_MEM_REGIONS, then the reply uses
- * struct drm_xe_query_mem_regions in .data.
+ * is equal to DRM_XE_DEVICE_QUERY_MEM_REGION, then the reply uses
+ * struct drm_xe_query_mem_region in .data.
*/
-struct drm_xe_query_mem_regions {
- /** @num_regions: number of memory regions returned in @regions */
- __u32 num_regions;
+struct drm_xe_query_mem_region {
+ /** @num_mem_regions: number of memory regions returned in @mem_regions */
+ __u32 num_mem_regions;
/** @pad: MBZ */
__u32 pad;
- /** @regions: The returned regions for this device */
- struct drm_xe_query_mem_region regions[];
+ /** @mem_regions: The returned memory regions for this device */
+ struct drm_xe_mem_region mem_regions[];
};
/**
@@ -652,7 +652,7 @@ struct drm_xe_device_query {
__u64 extensions;
#define DRM_XE_DEVICE_QUERY_ENGINES 0
-#define DRM_XE_DEVICE_QUERY_MEM_REGIONS 1
+#define DRM_XE_DEVICE_QUERY_MEM_REGION 1
#define DRM_XE_DEVICE_QUERY_CONFIG 2
#define DRM_XE_DEVICE_QUERY_GT_LIST 3
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
@@ -709,9 +709,9 @@ struct drm_xe_gem_create {
/**
* @placement: A mask of memory instances of where GEM can be placed.
* Each index in this mask refers directly to the struct
- * drm_xe_query_mem_regions' instance, no assumptions should
+ * drm_xe_query_mem_region's instance, no assumptions should
* be made about order. The type of each region is described
- * by struct drm_xe_query_mem_regions' mem_class.
+ * by struct drm_xe_mem_region's mem_class.
*/
__u32 placement;
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 47/50] drm/xe/uapi: Align on a common way to return arrays (gt)
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (45 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 46/50] drm/xe/uapi: Align on a common way to return arrays (memory regions) Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 48/50] drm/xe/uapi: Align on a common way to return arrays (engines) Francois Dugast
` (9 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
The uAPI provides queries which return arrays of elements. As of now
the format used in the struct is different depending on which element
is queried. Fix this for gt by applying the pattern below:
struct drm_xe_query_X {
__u32 num_X;
struct drm_xe_X Xs[];
...
}
However, strictly following this rule would bring back the name "gts"
which is avoided as per commit ("drm/xe/uapi: Rename gts to gt_list")
so leave exceptions in the case of gt with num_gt (singular) and
"gt_list". Also, this change removes "query" in the name of struct
drm_xe_query_gt as it is not returned from the query IOCTL. There is
no functional change.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 8 ++++----
include/uapi/drm/xe_drm.h | 20 ++++++++++----------
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index bdadbbdf5a90..184ecd9820d1 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -378,11 +378,11 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query)
{
struct xe_gt *gt;
- size_t size = sizeof(struct drm_xe_query_gt_list) +
- xe->info.gt_count * sizeof(struct drm_xe_query_gt);
- struct drm_xe_query_gt_list __user *query_ptr =
+ size_t size = sizeof(struct drm_xe_query_gt) +
+ xe->info.gt_count * sizeof(struct drm_xe_gt);
+ struct drm_xe_query_gt __user *query_ptr =
u64_to_user_ptr(query->data);
- struct drm_xe_query_gt_list *gt_list;
+ struct drm_xe_query_gt *gt_list;
u8 id;
if (query->size == 0) {
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index d416349bee77..e4ecd83ea5d7 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -414,14 +414,14 @@ struct drm_xe_query_config {
};
/**
- * struct drm_xe_query_gt - describe an individual GT.
+ * struct drm_xe_gt - describe an individual GT.
*
- * To be used with drm_xe_query_gt_list, which will return a list with all the
+ * To be used with drm_xe_query_gt, which will return a list with all the
* existing GT individual descriptions.
* Graphics Technology (GT) is a subset of a GPU/tile that is responsible for
* implementing graphics and/or media operations.
*/
-struct drm_xe_query_gt {
+struct drm_xe_gt {
#define DRM_XE_QUERY_GT_TYPE_MAIN 0
#define DRM_XE_QUERY_GT_TYPE_MEDIA 1
/** @type: GT type: Main or Media */
@@ -437,19 +437,19 @@ struct drm_xe_query_gt {
};
/**
- * struct drm_xe_query_gt_list - A list with GT description items.
+ * struct drm_xe_query_gt - A list with GT description items.
*
* If a query is made with a struct drm_xe_device_query where .query
- * is equal to DRM_XE_DEVICE_QUERY_GT_LIST, then the reply uses struct
- * drm_xe_query_gt_list in .data.
+ * is equal to DRM_XE_DEVICE_QUERY_GT, then the reply uses struct
+ * drm_xe_query_gt in .data.
*/
-struct drm_xe_query_gt_list {
+struct drm_xe_query_gt {
/** @num_gt: number of GT items returned in gt_list */
__u32 num_gt;
/** @pad: MBZ */
__u32 pad;
/** @gt_list: The GT list returned for this device */
- struct drm_xe_query_gt gt_list[];
+ struct drm_xe_gt gt_list[];
};
/**
@@ -604,7 +604,7 @@ struct drm_xe_query_uc_fw_version {
* - %DRM_XE_DEVICE_QUERY_ENGINES
* - %DRM_XE_DEVICE_QUERY_MEM_REGIONS
* - %DRM_XE_DEVICE_QUERY_CONFIG
- * - %DRM_XE_DEVICE_QUERY_GT_LIST - Query type to retrieve the hardware
+ * - %DRM_XE_DEVICE_QUERY_GT - Query type to retrieve the hardware
* configuration of the device such as information on slices, memory,
* caches, and so on. It is provided as a table of key / value
* attributes.
@@ -654,7 +654,7 @@ struct drm_xe_device_query {
#define DRM_XE_DEVICE_QUERY_ENGINES 0
#define DRM_XE_DEVICE_QUERY_MEM_REGION 1
#define DRM_XE_DEVICE_QUERY_CONFIG 2
-#define DRM_XE_DEVICE_QUERY_GT_LIST 3
+#define DRM_XE_DEVICE_QUERY_GT 3
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
#define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY 5
#define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES 6
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 48/50] drm/xe/uapi: Align on a common way to return arrays (engines)
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (46 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 47/50] drm/xe/uapi: Align on a common way to return arrays (gt) Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 49/50] drm/xe/uapi: Add block diagram of a device Francois Dugast
` (8 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
The uAPI provides queries which return arrays of elements. As of now
the format used in the struct is different depending on which element
is queried. Fix this for engines by applying the pattern below:
struct drm_xe_query_X {
__u32 num_X;
struct drm_xe_X Xs[];
...
}
Instead of directly returning an array of struct
drm_xe_query_engine_info, a new struct drm_xe_query_engine is
introduced. It contains itself an array of struct drm_xe_engine
which holds the information about each engine.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 41 +++++++++++---------
include/uapi/drm/xe_drm.h | 73 ++++++++++++++++++++---------------
2 files changed, 64 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 184ecd9820d1..93edb6c572ce 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -53,7 +53,8 @@ static size_t calc_hw_engine_info_size(struct xe_device *xe)
i++;
}
- return i * sizeof(struct drm_xe_query_engine_info);
+ return sizeof(struct drm_xe_query_engine) +
+ i * sizeof(struct drm_xe_engine);
}
typedef u64 (*__ktime_func_t)(void);
@@ -180,9 +181,9 @@ static int query_engines(struct xe_device *xe,
struct drm_xe_device_query *query)
{
size_t size = calc_hw_engine_info_size(xe);
- struct drm_xe_query_engine_info __user *query_ptr =
+ struct drm_xe_query_engine __user *query_ptr =
u64_to_user_ptr(query->data);
- struct drm_xe_query_engine_info *hw_engine_info;
+ struct drm_xe_query_engine *engines;
struct xe_hw_engine *hwe;
enum xe_hw_engine_id id;
struct xe_gt *gt;
@@ -196,8 +197,8 @@ static int query_engines(struct xe_device *xe,
return -EINVAL;
}
- hw_engine_info = kmalloc(size, GFP_KERNEL);
- if (!hw_engine_info)
+ engines = kmalloc(size, GFP_KERNEL);
+ if (!engines)
return -ENOMEM;
for_each_gt(gt, xe, gt_id)
@@ -205,18 +206,18 @@ static int query_engines(struct xe_device *xe,
if (xe_hw_engine_is_reserved(hwe))
continue;
- hw_engine_info[i].instance.engine_class =
+ engines->engines[i].instance.engine_class =
xe_to_user_engine_class[hwe->class];
- hw_engine_info[i].instance.engine_instance =
+ engines->engines[i].instance.engine_instance =
hwe->logical_instance;
/*
* Scheduling Group ID is the global GT ID for the
* current hardware, although the API is flexible
*/
- hw_engine_info[i].instance.sched_group_id = gt->info.id;
- hw_engine_info[i].instance.pad = 0;
- hw_engine_info[i].tile_id = gt_to_tile(gt)->id;
- hw_engine_info[i].gt_id = gt->info.id;
+ engines->engines[i].instance.sched_group_id = gt->info.id;
+ engines->engines[i].instance.pad = 0;
+ engines->engines[i].tile_id = gt_to_tile(gt)->id;
+ engines->engines[i].gt_id = gt->info.id;
/*
* The mem_regions indexes in the mask below need to
@@ -233,22 +234,24 @@ static int query_engines(struct xe_device *xe,
* assumption.
*/
if (!IS_DGFX(xe))
- hw_engine_info[i].near_mem_regions = 0x1;
+ engines->engines[i].near_mem_regions = 0x1;
else
- hw_engine_info[i].near_mem_regions =
+ engines->engines[i].near_mem_regions =
BIT(gt_to_tile(gt)->id) << 1;
- hw_engine_info[i].far_mem_regions = xe->info.mem_region_mask ^
- hw_engine_info[i].near_mem_regions;
- memset(hw_engine_info->reserved, 0, sizeof(hw_engine_info->reserved));
+ engines->engines[i].far_mem_regions = xe->info.mem_region_mask ^
+ engines->engines[i].near_mem_regions;
+ memset(engines->engines->reserved, 0, sizeof(engines->engines->reserved));
i++;
}
- if (copy_to_user(query_ptr, hw_engine_info, size)) {
- kfree(hw_engine_info);
+ engines->num_engines = i;
+
+ if (copy_to_user(query_ptr, engines, size)) {
+ kfree(engines);
return -EFAULT;
}
- kfree(hw_engine_info);
+ kfree(engines);
return 0;
}
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index e4ecd83ea5d7..85dc0d343ea8 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -181,9 +181,9 @@ struct drm_xe_ext_set_property {
/**
* struct drm_xe_engine_class_instance - instance of an engine class
*
- * It is returned as part of the @drm_xe_query_engine_info, but it also is
- * used as the input of engine selection for both @drm_xe_exec_queue_create
- * and @drm_xe_query_engine_cycles
+ * It is returned as part of the @drm_xe_engine, but it also is used as
+ * the input of engine selection for both @drm_xe_exec_queue_create and
+ * @drm_xe_query_engine_cycles
*
* The @engine_class can be:
* - %DRM_XE_ENGINE_CLASS_RENDER
@@ -220,13 +220,9 @@ struct drm_xe_engine_class_instance {
};
/**
- * struct drm_xe_query_engine_info - describe hardware engine
- *
- * If a query is made with a struct @drm_xe_device_query where .query
- * is equal to %DRM_XE_DEVICE_QUERY_ENGINES, then the reply uses an array of
- * struct @drm_xe_query_engine_info in .data.
+ * struct drm_xe_engine - describe hardware engine
*/
-struct drm_xe_query_engine_info {
+struct drm_xe_engine {
/** @instance: The @drm_xe_engine_class_instance */
struct drm_xe_engine_class_instance instance;
@@ -262,6 +258,22 @@ struct drm_xe_query_engine_info {
__u64 reserved[5];
};
+/**
+ * struct drm_xe_query_engine - describe engines
+ *
+ * If a query is made with a struct @drm_xe_device_query where .query
+ * is equal to %DRM_XE_DEVICE_QUERY_ENGINES, then the reply uses an array of
+ * struct @drm_xe_query_engine in .data.
+ */
+struct drm_xe_query_engine {
+ /** @num_engines: number of engines returned in @engines */
+ __u32 num_engines;
+ /** @pad: MBZ */
+ __u32 pad;
+ /** @engines: The returned engines for this device */
+ struct drm_xe_engine engines[];
+};
+
/**
* enum drm_xe_memory_class - Supported memory classes.
*/
@@ -624,28 +636,27 @@ struct drm_xe_query_uc_fw_version {
*
* .. code-block:: C
*
- * struct drm_xe_engine_class_instance *hwe;
- * struct drm_xe_device_query query = {
- * .extensions = 0,
- * .query = DRM_XE_DEVICE_QUERY_ENGINES,
- * .size = 0,
- * .data = 0,
- * };
- * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
- * hwe = malloc(query.size);
- * query.data = (uintptr_t)hwe;
- * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
- * int num_engines = query.size / sizeof(*hwe);
- * for (int i = 0; i < num_engines; i++) {
- * printf("Engine %d: %s\n", i,
- * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
- * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COPY ? "COPY":
- * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_DECODE ? "VIDEO_DECODE":
- * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ? "VIDEO_ENHANCE":
- * hwe[i].engine_class == DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
- * "UNKNOWN");
- * }
- * free(hwe);
+ * struct drm_xe_query_engine *engines;
+ * struct drm_xe_device_query query = {
+ * .extensions = 0,
+ * .query = DRM_XE_DEVICE_QUERY_ENGINES,
+ * .size = 0,
+ * .data = 0,
+ * };
+ * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
+ * engines = malloc(query.size);
+ * query.data = (uintptr_t)engines;
+ * ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query);
+ * for (int i = 0; i < engines->num_engines; i++) {
+ * printf("Engine %d: %s\n", i,
+ * engines->engines[i].instance.engine_class == DRM_XE_ENGINE_CLASS_RENDER ? "RENDER":
+ * engines->engines[i].instance.engine_class == DRM_XE_ENGINE_CLASS_COPY ? "COPY":
+ * engines->engines[i].instance.engine_class == DRM_XE_ENGINE_CLASS_VIDEO_DECODE ? "VIDEO_DECODE":
+ * engines->engines[i].instance.engine_class == DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ? "VIDEO_ENHANCE":
+ * engines->engines[i].instance.engine_class == DRM_XE_ENGINE_CLASS_COMPUTE ? "COMPUTE":
+ * "UNKNOWN");
+ * }
+ * free(engines);
*/
struct drm_xe_device_query {
/** @extensions: Pointer to the first extension struct, if any */
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] [PATCH v2 49/50] drm/xe/uapi: Add block diagram of a device
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (47 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 48/50] drm/xe/uapi: Align on a common way to return arrays (engines) Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-09 15:35 ` Souza, Jose
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 50/50] drm/xe/uapi: Add examples of user space code Francois Dugast
` (7 subsequent siblings)
56 siblings, 1 reply; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
In order to make proper use the uAPI, a prerequisite is to understand
some key concepts about the discrete GPU devices which are supported
by the Xe driver. For example, some structs defined in the uAPI are an
abstraction of a hardware component with a specific role.
This diagram helps to build a mental representation of a device how it
is seen by the Xe driver. As written in the documentation, it does not
intend to be a literal representation of an existing device. A lot
more information could be added but the intention for the overview is
to keep it simple, and go into detail as needed in other sections.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 41 +++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 85dc0d343ea8..0bab53f2bed9 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -28,6 +28,47 @@ extern "C" {
*
*/
+/**
+ * DOC: Xe Device Block Diagram
+ *
+ * The diagram below represents a high-level simplification of a discrete
+ * GPU supported by the Xe driver. It shows some device components which
+ * are necessary to understand this API, as well as how their relations
+ * to each other. This diagram does not represent real hardware::
+ *
+ * ┌──────────────────────────────────────────────────────────────────┐
+ * │ ┌──────────────────────────────────────────────────┐ ┌─────────┐ │
+ * │ │ ┌───────────────────────┐ │ │ ┌─────┐ │ │
+ * │ │ │ VRAM0 │ │ │ │VRAM1│ │ │
+ * │ │ └───────────┬───────────┘ │ │ └──┬──┘ │ │
+ * │ │ ┌────────────────────────┴─────────────────────┐ │ │ ┌──┴──┐ │ │
+ * │ │ │ ┌─────────────────────┐ ┌─────────────────┐ │ │ │ │ │ │ │
+ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
+ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │RCS0 │ │BCS0 │ │ │ │ │ │ │ │ │
+ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
+ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
+ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VCS0 │ │VCS1 │ │ │ │ │ │ │ │ │
+ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
+ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
+ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VECS0│ │VECS1│ │ │ │ │ │ ... │ │ │
+ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
+ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
+ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │CCS0 │ │CCS1 │ │ │ │ │ │ │ │ │
+ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
+ * │ │ │ └─────────DSS─────────┘ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
+ * │ │ │ │ │CCS2 │ │CCS3 │ │ │ │ │ │ │ │ │
+ * │ │ │ ┌─────┐ ┌─────┐ ┌─────┐ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
+ * │ │ │ │ ... │ │ ... │ │ ... │ │ │ │ │ │ │ │ │ │
+ * │ │ │ └─DSS─┘ └─DSS─┘ └─DSS─┘ └─────Engines─────┘ │ │ │ │ │ │ │
+ * │ │ └───────────────────────────GT0────────────────┘ │ │ └─GT1─┘ │ │
+ * │ └────────────────────────────Tile0─────────────────┘ └─ Tile1──┘ │
+ * └─────────────────────────────Device0───────┬──────────────────────┘
+ * │
+ * │
+ * ───────────────────────┴────────── PCI bus
+ *
+ */
+
/**
* DOC: Xe uAPI Overview
*
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* Re: [Intel-xe] [PATCH v2 49/50] drm/xe/uapi: Add block diagram of a device
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 49/50] drm/xe/uapi: Add block diagram of a device Francois Dugast
@ 2023-11-09 15:35 ` Souza, Jose
0 siblings, 0 replies; 81+ messages in thread
From: Souza, Jose @ 2023-11-09 15:35 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Dugast, Francois
On Fri, 2023-11-03 at 14:34 +0000, Francois Dugast wrote:
> In order to make proper use the uAPI, a prerequisite is to understand
> some key concepts about the discrete GPU devices which are supported
> by the Xe driver. For example, some structs defined in the uAPI are an
> abstraction of a hardware component with a specific role.
>
> This diagram helps to build a mental representation of a device how it
> is seen by the Xe driver. As written in the documentation, it does not
> intend to be a literal representation of an existing device. A lot
> more information could be added but the intention for the overview is
> to keep it simple, and go into detail as needed in other sections.
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> include/uapi/drm/xe_drm.h | 41 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 41 insertions(+)
>
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 85dc0d343ea8..0bab53f2bed9 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -28,6 +28,47 @@ extern "C" {
> *
> */
>
> +/**
> + * DOC: Xe Device Block Diagram
> + *
> + * The diagram below represents a high-level simplification of a discrete
> + * GPU supported by the Xe driver. It shows some device components which
> + * are necessary to understand this API, as well as how their relations
> + * to each other. This diagram does not represent real hardware::
> + *
> + * ┌──────────────────────────────────────────────────────────────────┐
> + * │ ┌──────────────────────────────────────────────────┐ ┌─────────┐ │
> + * │ │ ┌───────────────────────┐ │ │ ┌─────┐ │ │
> + * │ │ │ VRAM0 │ │ │ │VRAM1│ │ │
> + * │ │ └───────────┬───────────┘ │ │ └──┬──┘ │ │
> + * │ │ ┌────────────────────────┴─────────────────────┐ │ │ ┌──┴──┐ │ │
> + * │ │ │ ┌─────────────────────┐ ┌─────────────────┐ │ │ │ │ │ │ │
> + * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
> + * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │RCS0 │ │BCS0 │ │ │ │ │ │ │ │ │
> + * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
> + * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
> + * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VCS0 │ │VCS1 │ │ │ │ │ │ │ │ │
> + * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
> + * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
> + * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VECS0│ │VECS1│ │ │ │ │ │ ... │ │ │
> + * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
> + * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
> + * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │CCS0 │ │CCS1 │ │ │ │ │ │ │ │ │
> + * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
> + * │ │ │ └─────────DSS─────────┘ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
> + * │ │ │ │ │CCS2 │ │CCS3 │ │ │ │ │ │ │ │ │
> + * │ │ │ ┌─────┐ ┌─────┐ ┌─────┐ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
> + * │ │ │ │ ... │ │ ... │ │ ... │ │ │ │ │ │ │ │ │ │
> + * │ │ │ └─DSS─┘ └─DSS─┘ └─DSS─┘ └─────Engines─────┘ │ │ │ │ │ │ │
> + * │ │ └───────────────────────────GT0────────────────┘ │ │ └─GT1─┘ │ │
> + * │ └────────────────────────────Tile0─────────────────┘ └─ Tile1──┘ │
> + * └─────────────────────────────Device0───────┬──────────────────────┘
> + * │
> + * │
> + * ───────────────────────┴────────── PCI bus
> + *
> + */
> +
Why not also include a GT1 inside Tile0? To reflect the standalone media in MTL+.
> /**
> * DOC: Xe uAPI Overview
> *
^ permalink raw reply [flat|nested] 81+ messages in thread
* [Intel-xe] [PATCH v2 50/50] drm/xe/uapi: Add examples of user space code
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (48 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 49/50] drm/xe/uapi: Add block diagram of a device Francois Dugast
@ 2023-11-03 14:34 ` Francois Dugast
2023-11-03 14:38 ` [Intel-xe] ✓ CI.Patch_applied: success for uAPI Alignment - take 2 Patchwork
` (6 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Francois Dugast @ 2023-11-03 14:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Complete the documentation of some structs by adding functional
examples of user space code. Those examples are intentionally kept
very simple. Put together, they provide a foundation for a minimal
application that executes a job using the Xe driver.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
include/uapi/drm/xe_drm.h | 84 +++++++++++++++++++++++++++++++++++++++
1 file changed, 84 insertions(+)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 0bab53f2bed9..117544b7342c 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -952,6 +952,30 @@ struct drm_xe_vm_bind_op {
/**
* struct drm_xe_vm_bind - Input of &DRM_IOCTL_XE_VM_BIND
+ *
+ * Below is an example of a minimal use of @drm_xe_vm_bind to
+ * asynchronously bind the buffer `data` at address `BIND_ADDRESS` to
+ * illustrate `userptr`. It can be synchronized by using the example
+ * provided for @drm_xe_sync.
+ *
+ * .. code-block:: C
+ *
+ * data = aligned_alloc(ALIGNMENT, BO_SIZE);
+ * struct drm_xe_vm_bind bind = {
+ * .vm_id = vm,
+ * .num_binds = 1,
+ * .bind.obj = 0,
+ * .bind.obj_offset = to_user_pointer(data),
+ * .bind.range = BO_SIZE,
+ * .bind.addr = BIND_ADDRESS,
+ * .bind.op = DRM_XE_VM_BIND_OP_MAP_USERPTR,
+ * .bind.flags = DRM_XE_VM_BIND_FLAG_ASYNC,
+ * .num_syncs = 1,
+ * .syncs = &sync,
+ * .exec_queue_id = 0,
+ * };
+ * ioctl(fd, DRM_IOCTL_XE_VM_BIND, &bind);
+ *
*/
struct drm_xe_vm_bind {
/** @extensions: Pointer to the first extension struct, if any */
@@ -1024,6 +1048,30 @@ struct drm_xe_vm_bind {
* The @flags can be:
* - %DRM_XE_SYNC_FLAG_SIGNAL
*
+ * A minimal use of @drm_xe_sync looks like this:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_xe_sync sync = {
+ * .flags = DRM_XE_SYNC_FLAG_SIGNAL,
+ * .type = DRM_XE_SYNC_TYPE_SYNCOBJ,
+ * };
+ * struct drm_syncobj_create syncobj_create = { 0 };
+ * ioctl(fd, DRM_IOCTL_SYNCOBJ_CREATE, &syncobj_create);
+ * sync.handle = syncobj_create.handle;
+ * ...
+ * use of &sync in drm_xe_exec or drm_xe_vm_bind
+ * ...
+ * struct drm_syncobj_wait wait = {
+ * .handles = &sync.handle,
+ * .timeout_nsec = INT64_MAX,
+ * .count_handles = 1,
+ * .flags = 0,
+ * .first_signaled = 0,
+ * .pad = 0,
+ * };
+ * ioctl(fd, DRM_IOCTL_SYNCOBJ_WAIT, &wait);
+ *
*/
struct drm_xe_sync {
/** @extensions: Pointer to the first extension struct, if any */
@@ -1128,6 +1176,25 @@ struct drm_xe_sync {
/**
* struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
+ *
+ * The example below shows how to use @drm_xe_exec_queue_create to create
+ * a simple exec_queue (no parallel submission) of class
+ * &DRM_XE_ENGINE_CLASS_RENDER.
+ *
+ * .. code-block:: C
+ *
+ * struct drm_xe_engine_class_instance instance = {
+ * .engine_class = DRM_XE_ENGINE_CLASS_RENDER,
+ * };
+ * struct drm_xe_exec_queue_create exec_queue_create = {
+ * .extensions = 0,
+ * .vm_id = vm,
+ * .num_bb_per_exec = 1,
+ * .num_eng_per_bb = 1,
+ * .instances = to_user_pointer(&instance),
+ * };
+ * ioctl(fd, DRM_IOCTL_XE_EXEC_QUEUE_CREATE, &exec_queue_create);
+ *
*/
struct drm_xe_exec_queue_create {
#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
@@ -1250,6 +1317,23 @@ struct drm_xe_exec_queue_get_property {
/**
* struct drm_xe_exec - Input of &DRM_IOCTL_XE_EXEC
+ *
+ * This is an example to use @drm_xe_exec for execution of the object
+ * at BIND_ADDRESS (see example in @drm_xe_vm_bind) by an exec_queue
+ * (see example in @drm_xe_exec_queue_create). It can be synchronized
+ * by using the example provided for @drm_xe_sync.
+ *
+ * .. code-block:: C
+ *
+ * struct drm_xe_exec exec = {
+ * .exec_queue_id = exec_queue,
+ * .syncs = &sync,
+ * .num_syncs = 1,
+ * .address = BIND_ADDRESS,
+ * .num_batch_buffer = 1,
+ * };
+ * ioctl(fd, DRM_IOCTL_XE_EXEC, &exec);
+ *
*/
struct drm_xe_exec {
/** @extensions: Pointer to the first extension struct, if any */
--
2.34.1
^ permalink raw reply related [flat|nested] 81+ messages in thread* [Intel-xe] ✓ CI.Patch_applied: success for uAPI Alignment - take 2
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (49 preceding siblings ...)
2023-11-03 14:34 ` [Intel-xe] [PATCH v2 50/50] drm/xe/uapi: Add examples of user space code Francois Dugast
@ 2023-11-03 14:38 ` Patchwork
2023-11-03 14:39 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
` (5 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Patchwork @ 2023-11-03 14:38 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - take 2
URL : https://patchwork.freedesktop.org/series/125955/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: 58dfdb8dc drm/xe: Add Wa_14019821291
=== git am output follows ===
Applying: fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
Applying: drm/xe/uapi: Add documentation for query
Applying: drm/xe: Extend drm_xe_vm_bind_op
Applying: drm/xe: Add uAPI to query micro-controler firmware version
Applying: drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG
Applying: drm/xe: Extend uAPI to query HuC micro-controler firmware version
Applying: drm/xe: Remove useless query config num_params
Applying: drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
Applying: drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
Applying: fixup! drm/xe: Add uAPI to query micro-controler firmware version
Applying: drm/xe/uapi: Make constant comments visible in kernel doc
Applying: fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
Applying: drm/xe/uapi: Remove GT_TYPE_REMOTE
Applying: drm/xe/uapi: Kill VM_MADVISE IOCTL
Applying: drm/xe/uapi: Separate bo_create placement from flags
Applying: drm/xe/uapi: Remove unused inaccessible memory region
Applying: drm/xe/uapi: Remove unused QUERY_CONFIG_MEM_REGION_COUNT
Applying: drm/xe/uapi: Remove unused QUERY_CONFIG_GT_COUNT
Applying: drm/xe/uapi: Rename *_mem_regions masks
Applying: drm/xe/uapi: Rename query's mem_usage to mem_regions
Applying: drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
Applying: drm/xe/uapi: Replace BO with GEM in documentation
Applying: drm/xe/pmu: Drop interrupt pmu event
Applying: xe/xe_bo: Reject bo creation of unaligned size
Applying: fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
Applying: drm/xe/uapi: Fix indentation issues that sometimes causes build warning
Applying: drm/xe/uapi: Order sections
Applying: drm/xe/uapi: More uAPI documentation additions and cosmetic updates
Applying: drm/xe/uapi: Split xe_sync types from flags
Applying: drm/xe/uapi: Standardize the FLAG naming and assignment
Applying: drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK
Applying: drm/xe/uapi: Move xe_exec after xe_exec_queue
Applying: fixup! drm/xe/uapi: Split xe_sync types from flags
Applying: drm/xe/uapi: Move memory_region masks from GT to engine
Applying: drm/xe/uapi: Document the memory_region bitmask
Applying: drm/xe/uapi: Be more specific about the vm_bind prefetch region
Applying: drm/xe/uapi: Convert tile_mask to a pt_placement_hint
Applying: drm/xe/uapi: Rename couple exec_queue items
Applying: drm/xe/uapi: Refactor engine information
Applying: drm/xe/uapi: Add link to Xe documentation
Applying: drm/xe/uapi: Crystal Reference Clock updates
Applying: drm/xe/uapi: Add Tile ID information to the GT info query
Applying: squash! drm/xe/uapi: Rename couple exec_queue items
Applying: fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
Applying: drm/xe/uapi: Remove bogus engine list from the wait_user_fence IOCTL
Applying: drm/xe/uapi: Align on a common way to return arrays (memory regions)
Applying: drm/xe/uapi: Align on a common way to return arrays (gt)
Applying: drm/xe/uapi: Align on a common way to return arrays (engines)
Applying: drm/xe/uapi: Add block diagram of a device
Applying: drm/xe/uapi: Add examples of user space code
^ permalink raw reply [flat|nested] 81+ messages in thread* [Intel-xe] ✗ CI.checkpatch: warning for uAPI Alignment - take 2
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (50 preceding siblings ...)
2023-11-03 14:38 ` [Intel-xe] ✓ CI.Patch_applied: success for uAPI Alignment - take 2 Patchwork
@ 2023-11-03 14:39 ` Patchwork
2023-11-03 14:40 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
` (4 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Patchwork @ 2023-11-03 14:39 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - take 2
URL : https://patchwork.freedesktop.org/series/125955/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
63c2b6b160bca2df6efc7bc4cea6f442097d7854
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit f8ae8a8b6d5aa79787be3c14ac987d12f1f7657a
Author: Francois Dugast <francois.dugast@intel.com>
Date: Fri Nov 3 14:34:56 2023 +0000
drm/xe/uapi: Add examples of user space code
Complete the documentation of some structs by adding functional
examples of user space code. Those examples are intentionally kept
very simple. Put together, they provide a foundation for a minimal
application that executes a job using the Xe driver.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
+ /mt/dim checkpatch 58dfdb8dc78e5668f9891c798ec3191863c1e0d2 drm-intel
b71b984e7 fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
-:9: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#9:
-:126: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
total: 0 errors, 1 warnings, 0 checks, 8 lines checked
4eca559df drm/xe/uapi: Add documentation for query
f378f7b96 drm/xe: Extend drm_xe_vm_bind_op
a7beddc1c drm/xe: Add uAPI to query micro-controler firmware version
-:18: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#18:
More information: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23661
total: 0 errors, 1 warnings, 0 checks, 108 lines checked
04fed299a drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG
a74517063 drm/xe: Extend uAPI to query HuC micro-controler firmware version
e70f626ef drm/xe: Remove useless query config num_params
624448442 drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
1cd63ff52 drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
59b57dfeb fixup! drm/xe: Add uAPI to query micro-controler firmware version
b86e5314b drm/xe/uapi: Make constant comments visible in kernel doc
22b414069 fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
56d9994cd drm/xe/uapi: Remove GT_TYPE_REMOTE
fc52bae5f drm/xe/uapi: Kill VM_MADVISE IOCTL
-:91: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#91:
deleted file mode 100644
-:445: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#445: FILE: include/uapi/drm/xe_drm.h:118:
+#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
-:446: WARNING:LONG_LINE: line length of 113 exceeds 100 columns
#446: FILE: include/uapi/drm/xe_drm.h:119:
+#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
-:447: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#447: FILE: include/uapi/drm/xe_drm.h:120:
+#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
-:449: WARNING:LONG_LINE: line length of 135 exceeds 100 columns
#449: FILE: include/uapi/drm/xe_drm.h:122:
+#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
-:450: WARNING:LONG_LINE: line length of 145 exceeds 100 columns
#450: FILE: include/uapi/drm/xe_drm.h:123:
+#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
total: 0 errors, 6 warnings, 0 checks, 165 lines checked
bf686e6ff drm/xe/uapi: Separate bo_create placement from flags
7eac25575 drm/xe/uapi: Remove unused inaccessible memory region
17f0b60d9 drm/xe/uapi: Remove unused QUERY_CONFIG_MEM_REGION_COUNT
b5100554c drm/xe/uapi: Remove unused QUERY_CONFIG_GT_COUNT
4e622686c drm/xe/uapi: Rename *_mem_regions masks
03bc8b0ce drm/xe/uapi: Rename query's mem_usage to mem_regions
-:38: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#38: FILE: drivers/gpu/drm/xe/xe_query.c:246:
+static int query_mem_regions(struct xe_device *xe,
struct drm_xe_device_query *query)
total: 0 errors, 0 warnings, 1 checks, 83 lines checked
8da345c3e drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
-:9: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#9:
We have at least 2 future features(OA and future media engines capabilities)
total: 0 errors, 1 warnings, 0 checks, 54 lines checked
960fb8f4c drm/xe/uapi: Replace BO with GEM in documentation
8cde06fe3 drm/xe/pmu: Drop interrupt pmu event
558f04824 xe/xe_bo: Reject bo creation of unaligned size
0087d80c6 fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
487fa31c4 drm/xe/uapi: Fix indentation issues that sometimes causes build warning
4ed2965f7 drm/xe/uapi: Order sections
-:79: WARNING:LONG_LINE: line length of 124 exceeds 100 columns
#79: FILE: include/uapi/drm/xe_drm.h:50:
+#define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query)
-:80: WARNING:LONG_LINE: line length of 120 exceeds 100 columns
#80: FILE: include/uapi/drm/xe_drm.h:51:
+#define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create)
-:81: WARNING:LONG_LINE: line length of 130 exceeds 100 columns
#81: FILE: include/uapi/drm/xe_drm.h:52:
+#define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset)
-:82: WARNING:LONG_LINE: line length of 118 exceeds 100 columns
#82: FILE: include/uapi/drm/xe_drm.h:53:
+#define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create)
-:83: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#83: FILE: include/uapi/drm/xe_drm.h:54:
+#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy)
-:84: WARNING:LONG_LINE: line length of 113 exceeds 100 columns
#84: FILE: include/uapi/drm/xe_drm.h:55:
+#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind)
-:85: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#85: FILE: include/uapi/drm/xe_drm.h:56:
+#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
-:86: WARNING:LONG_LINE: line length of 134 exceeds 100 columns
#86: FILE: include/uapi/drm/xe_drm.h:57:
+#define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create)
-:87: WARNING:LONG_LINE: line length of 135 exceeds 100 columns
#87: FILE: include/uapi/drm/xe_drm.h:58:
+#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy)
-:88: WARNING:LONG_LINE: line length of 145 exceeds 100 columns
#88: FILE: include/uapi/drm/xe_drm.h:59:
+#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
-:89: WARNING:LONG_LINE: line length of 146 exceeds 100 columns
#89: FILE: include/uapi/drm/xe_drm.h:60:
+#define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property)
-:90: WARNING:LONG_LINE: line length of 130 exceeds 100 columns
#90: FILE: include/uapi/drm/xe_drm.h:61:
+#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
total: 0 errors, 12 warnings, 0 checks, 480 lines checked
09e8ed1a5 drm/xe/uapi: More uAPI documentation additions and cosmetic updates
f0fae092c drm/xe/uapi: Split xe_sync types from flags
-:108: WARNING:TYPO_SPELLING: 'An user' may be misspelled - perhaps 'A user'?
#108: FILE: include/uapi/drm/xe_drm.h:935:
+ * - %DRM_XE_SYNC_TYPE_USER_FENCE - An user fence
^^^^^^^
total: 0 errors, 1 warnings, 0 checks, 110 lines checked
88a27a444 drm/xe/uapi: Standardize the FLAG naming and assignment
20987be92 drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK
c80231c5b drm/xe/uapi: Move xe_exec after xe_exec_queue
-:50: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#50: FILE: include/uapi/drm/xe_drm.h:83:
+#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
total: 0 errors, 1 warnings, 0 checks, 110 lines checked
3df838d56 fixup! drm/xe/uapi: Split xe_sync types from flags
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:19: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s)
total: 1 errors, 1 warnings, 0 checks, 8 lines checked
178a3f189 drm/xe/uapi: Move memory_region masks from GT to engine
6a0270930 drm/xe/uapi: Document the memory_region bitmask
7c1d7e92e drm/xe/uapi: Be more specific about the vm_bind prefetch region
c9cec85b9 drm/xe/uapi: Convert tile_mask to a pt_placement_hint
dcdb17ac2 drm/xe/uapi: Rename couple exec_queue items
114ce04ba drm/xe/uapi: Refactor engine information
a86a87399 drm/xe/uapi: Add link to Xe documentation
dbf2478c6 drm/xe/uapi: Crystal Reference Clock updates
f09d891bb drm/xe/uapi: Add Tile ID information to the GT info query
72b3547e1 squash! drm/xe/uapi: Rename couple exec_queue items
-:15: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#15:
Let's make it obvious and straight forward. Not only because it is important
total: 0 errors, 1 warnings, 0 checks, 148 lines checked
cb371e714 fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
e0af430ad drm/xe/uapi: Remove bogus engine list from the wait_user_fence IOCTL
7f40430db drm/xe/uapi: Align on a common way to return arrays (memory regions)
-:37: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#37: FILE: drivers/gpu/drm/xe/xe_query.c:269:
+static int query_mem_region(struct xe_device *xe,
struct drm_xe_device_query *query)
-:92: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#92: FILE: drivers/gpu/drm/xe/xe_query.c:318:
+ &usage->mem_regions[usage->num_mem_regions].used,
-:93: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#93: FILE: drivers/gpu/drm/xe/xe_query.c:319:
+ &usage->mem_regions[usage->num_mem_regions].cpu_visible_used);
total: 0 errors, 2 warnings, 1 checks, 170 lines checked
a7c8e387c drm/xe/uapi: Align on a common way to return arrays (gt)
b75f3da14 drm/xe/uapi: Align on a common way to return arrays (engines)
-:215: WARNING:LONG_LINE_COMMENT: line length of 110 exceeds 100 columns
#215: FILE: include/uapi/drm/xe_drm.h:654:
+ * engines->engines[i].instance.engine_class == DRM_XE_ENGINE_CLASS_VIDEO_DECODE ? "VIDEO_DECODE":
-:216: WARNING:LONG_LINE_COMMENT: line length of 112 exceeds 100 columns
#216: FILE: include/uapi/drm/xe_drm.h:655:
+ * engines->engines[i].instance.engine_class == DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE ? "VIDEO_ENHANCE":
total: 0 errors, 2 warnings, 0 checks, 184 lines checked
cfa4f1f0f drm/xe/uapi: Add block diagram of a device
-:35: WARNING:LONG_LINE_COMMENT: line length of 209 exceeds 100 columns
#35: FILE: include/uapi/drm/xe_drm.h:39:
+ * ┌──────────────────────────────────────────────────────────────────┐
-:36: WARNING:LONG_LINE_COMMENT: line length of 203 exceeds 100 columns
#36: FILE: include/uapi/drm/xe_drm.h:40:
+ * │ ┌──────────────────────────────────────────────────┐ ┌─────────┐ │
-:37: WARNING:LONG_LINE_COMMENT: line length of 149 exceeds 100 columns
#37: FILE: include/uapi/drm/xe_drm.h:41:
+ * │ │ ┌───────────────────────┐ │ │ ┌─────┐ │ │
-:39: WARNING:LONG_LINE_COMMENT: line length of 149 exceeds 100 columns
#39: FILE: include/uapi/drm/xe_drm.h:43:
+ * │ │ └───────────┬───────────┘ │ │ └──┬──┘ │ │
-:40: WARNING:LONG_LINE_COMMENT: line length of 195 exceeds 100 columns
#40: FILE: include/uapi/drm/xe_drm.h:44:
+ * │ │ ┌────────────────────────┴─────────────────────┐ │ │ ┌──┴──┐ │ │
-:41: WARNING:LONG_LINE_COMMENT: line length of 177 exceeds 100 columns
#41: FILE: include/uapi/drm/xe_drm.h:45:
+ * │ │ │ ┌─────────────────────┐ ┌─────────────────┐ │ │ │ │ │ │ │
-:42: WARNING:LONG_LINE_COMMENT: line length of 161 exceeds 100 columns
#42: FILE: include/uapi/drm/xe_drm.h:46:
+ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
-:43: WARNING:LONG_LINE_COMMENT: line length of 125 exceeds 100 columns
#43: FILE: include/uapi/drm/xe_drm.h:47:
+ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │RCS0 │ │BCS0 │ │ │ │ │ │ │ │ │
-:44: WARNING:LONG_LINE_COMMENT: line length of 161 exceeds 100 columns
#44: FILE: include/uapi/drm/xe_drm.h:48:
+ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
-:45: WARNING:LONG_LINE_COMMENT: line length of 161 exceeds 100 columns
#45: FILE: include/uapi/drm/xe_drm.h:49:
+ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
-:46: WARNING:LONG_LINE_COMMENT: line length of 125 exceeds 100 columns
#46: FILE: include/uapi/drm/xe_drm.h:50:
+ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VCS0 │ │VCS1 │ │ │ │ │ │ │ │ │
-:47: WARNING:LONG_LINE_COMMENT: line length of 161 exceeds 100 columns
#47: FILE: include/uapi/drm/xe_drm.h:51:
+ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
-:48: WARNING:LONG_LINE_COMMENT: line length of 161 exceeds 100 columns
#48: FILE: include/uapi/drm/xe_drm.h:52:
+ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
-:49: WARNING:LONG_LINE_COMMENT: line length of 125 exceeds 100 columns
#49: FILE: include/uapi/drm/xe_drm.h:53:
+ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │VECS0│ │VECS1│ │ │ │ │ │ ... │ │ │
-:50: WARNING:LONG_LINE_COMMENT: line length of 161 exceeds 100 columns
#50: FILE: include/uapi/drm/xe_drm.h:54:
+ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
-:51: WARNING:LONG_LINE_COMMENT: line length of 161 exceeds 100 columns
#51: FILE: include/uapi/drm/xe_drm.h:55:
+ * │ │ │ │ ┌──┐ ┌──┐ ┌──┐ ┌──┐ │ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
-:52: WARNING:LONG_LINE_COMMENT: line length of 125 exceeds 100 columns
#52: FILE: include/uapi/drm/xe_drm.h:56:
+ * │ │ │ │ │EU│ │EU│ │EU│ │EU│ │ │ │CCS0 │ │CCS1 │ │ │ │ │ │ │ │ │
-:53: WARNING:LONG_LINE_COMMENT: line length of 161 exceeds 100 columns
#53: FILE: include/uapi/drm/xe_drm.h:57:
+ * │ │ │ │ └──┘ └──┘ └──┘ └──┘ │ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
-:54: WARNING:LONG_LINE_COMMENT: line length of 165 exceeds 100 columns
#54: FILE: include/uapi/drm/xe_drm.h:58:
+ * │ │ │ └─────────DSS─────────┘ │ ┌─────┐ ┌─────┐ │ │ │ │ │ │ │ │
-:55: WARNING:LONG_LINE_COMMENT: line length of 105 exceeds 100 columns
#55: FILE: include/uapi/drm/xe_drm.h:59:
+ * │ │ │ │ │CCS2 │ │CCS3 │ │ │ │ │ │ │ │ │
-:56: WARNING:LONG_LINE_COMMENT: line length of 167 exceeds 100 columns
#56: FILE: include/uapi/drm/xe_drm.h:60:
+ * │ │ │ ┌─────┐ ┌─────┐ ┌─────┐ │ └─────┘ └─────┘ │ │ │ │ │ │ │ │
-:57: WARNING:LONG_LINE_COMMENT: line length of 109 exceeds 100 columns
#57: FILE: include/uapi/drm/xe_drm.h:61:
+ * │ │ │ │ ... │ │ ... │ │ ... │ │ │ │ │ │ │ │ │ │
-:58: WARNING:LONG_LINE_COMMENT: line length of 141 exceeds 100 columns
#58: FILE: include/uapi/drm/xe_drm.h:62:
+ * │ │ │ └─DSS─┘ └─DSS─┘ └─DSS─┘ └─────Engines─────┘ │ │ │ │ │ │ │
-:59: WARNING:LONG_LINE_COMMENT: line length of 183 exceeds 100 columns
#59: FILE: include/uapi/drm/xe_drm.h:63:
+ * │ │ └───────────────────────────GT0────────────────┘ │ │ └─GT1─┘ │ │
-:60: WARNING:LONG_LINE_COMMENT: line length of 181 exceeds 100 columns
#60: FILE: include/uapi/drm/xe_drm.h:64:
+ * │ └────────────────────────────Tile0─────────────────┘ └─ Tile1──┘ │
-:61: WARNING:LONG_LINE_COMMENT: line length of 195 exceeds 100 columns
#61: FILE: include/uapi/drm/xe_drm.h:65:
+ * └─────────────────────────────Device0───────┬──────────────────────┘
-:64: WARNING:LONG_LINE_COMMENT: line length of 136 exceeds 100 columns
#64: FILE: include/uapi/drm/xe_drm.h:68:
+ * ───────────────────────┴────────── PCI bus
total: 0 errors, 27 warnings, 0 checks, 47 lines checked
f8ae8a8b6 drm/xe/uapi: Add examples of user space code
^ permalink raw reply [flat|nested] 81+ messages in thread* [Intel-xe] ✓ CI.KUnit: success for uAPI Alignment - take 2
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (51 preceding siblings ...)
2023-11-03 14:39 ` [Intel-xe] ✗ CI.checkpatch: warning " Patchwork
@ 2023-11-03 14:40 ` Patchwork
2023-11-03 14:47 ` [Intel-xe] ✓ CI.Build: " Patchwork
` (3 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Patchwork @ 2023-11-03 14:40 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - take 2
URL : https://patchwork.freedesktop.org/series/125955/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
stty: 'standard input': Inappropriate ioctl for device
[14:39:31] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:39:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
[14:39:56] Starting KUnit Kernel (1/1)...
[14:39:56] ============================================================
[14:39:56] ========================== xe_bo ==========================
[14:39:56] [SKIPPED] xe_ccs_migrate_kunit
[14:39:56] [SKIPPED] xe_bo_evict_kunit
[14:39:56] ===================== [SKIPPED] xe_bo ======================
[14:39:56] ======================= xe_dma_buf ========================
[14:39:56] [SKIPPED] xe_dma_buf_kunit
[14:39:56] =================== [SKIPPED] xe_dma_buf ===================
[14:39:56] ======================= xe_migrate ========================
[14:39:56] [SKIPPED] xe_migrate_sanity_kunit
[14:39:56] =================== [SKIPPED] xe_migrate ===================
[14:39:56] ========================= xe_pci ==========================
[14:39:56] [PASSED] xe_gmdid_graphics_ip
[14:39:56] [PASSED] xe_gmdid_media_ip
[14:39:56] ===================== [PASSED] xe_pci ======================
[14:39:56] ========================= xe_rtp ==========================
[14:39:56] ================== xe_rtp_process_tests ===================
[14:39:56] [PASSED] coalesce-same-reg
[14:39:56] [PASSED] no-match-no-add
[14:39:56] [PASSED] no-match-no-add-multiple-rules
[14:39:56] [PASSED] two-regs-two-entries
[14:39:56] [PASSED] clr-one-set-other
[14:39:56] [PASSED] set-field
[14:39:56] [PASSED] conflict-duplicate
[14:39:56] [PASSED] conflict-not-disjoint
[14:39:56] [PASSED] conflict-reg-type
[14:39:56] ============== [PASSED] xe_rtp_process_tests ===============
[14:39:56] ===================== [PASSED] xe_rtp ======================
[14:39:56] ========================== xe_wa ==========================
[14:39:56] ======================== xe_wa_gt =========================
[14:39:56] [PASSED] TIGERLAKE (B0)
[14:39:56] [PASSED] DG1 (A0)
[14:39:56] [PASSED] DG1 (B0)
[14:39:56] [PASSED] ALDERLAKE_S (A0)
[14:39:56] [PASSED] ALDERLAKE_S (B0)
[14:39:56] [PASSED] ALDERLAKE_S (C0)
[14:39:56] [PASSED] ALDERLAKE_S (D0)
[14:39:56] [PASSED] ALDERLAKE_P (A0)
[14:39:56] [PASSED] ALDERLAKE_P (B0)
[14:39:56] [PASSED] ALDERLAKE_P (C0)
[14:39:56] [PASSED] ALDERLAKE_S_RPLS (D0)
[14:39:56] [PASSED] ALDERLAKE_P_RPLU (E0)
[14:39:56] [PASSED] DG2_G10 (A0)
[14:39:56] [PASSED] DG2_G10 (A1)
[14:39:56] [PASSED] DG2_G10 (B0)
[14:39:56] [PASSED] DG2_G10 (C0)
[14:39:56] [PASSED] DG2_G11 (A0)
[14:39:56] [PASSED] DG2_G11 (B0)
[14:39:56] [PASSED] DG2_G11 (B1)
[14:39:56] [PASSED] DG2_G12 (A0)
[14:39:56] [PASSED] DG2_G12 (A1)
[14:39:56] [PASSED] PVC (B0)
[14:39:56] [PASSED] PVC (B1)
[14:39:56] [PASSED] PVC (C0)
[14:39:56] ==================== [PASSED] xe_wa_gt =====================
[14:39:56] ====================== [PASSED] xe_wa ======================
[14:39:56] ============================================================
[14:39:56] Testing complete. Ran 39 tests: passed: 35, skipped: 4
[14:39:56] Elapsed time: 24.480s total, 4.178s configuring, 20.133s building, 0.150s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[14:39:56] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:39:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
[14:40:17] Starting KUnit Kernel (1/1)...
[14:40:17] ============================================================
[14:40:17] ================== drm_test_pick_cmdline ==================
[14:40:17] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[14:40:17] =============== drm_test_pick_cmdline_named ===============
[14:40:17] [PASSED] NTSC
[14:40:17] [PASSED] NTSC-J
[14:40:17] [PASSED] PAL
[14:40:17] [PASSED] PAL-M
[14:40:17] =========== [PASSED] drm_test_pick_cmdline_named ===========
[14:40:17] ============== [PASSED] drm_test_pick_cmdline ==============
[14:40:17] ======================== drm_buddy ========================
[14:40:17] [PASSED] drm_test_buddy_alloc_limit
[14:40:17] [PASSED] drm_test_buddy_alloc_range
[14:40:17] [PASSED] drm_test_buddy_alloc_optimistic
[14:40:17] [PASSED] drm_test_buddy_alloc_pessimistic
[14:40:17] [PASSED] drm_test_buddy_alloc_smoke
[14:40:17] [PASSED] drm_test_buddy_alloc_pathological
[14:40:17] ==================== [PASSED] drm_buddy ====================
[14:40:17] =================== drm_cmdline_parser ====================
[14:40:17] [PASSED] drm_test_cmdline_force_d_only
[14:40:17] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:40:17] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:40:17] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:40:17] [PASSED] drm_test_cmdline_force_e_only
[14:40:17] [PASSED] drm_test_cmdline_res
[14:40:17] [PASSED] drm_test_cmdline_res_vesa
[14:40:17] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:40:17] [PASSED] drm_test_cmdline_res_rblank
[14:40:17] [PASSED] drm_test_cmdline_res_bpp
[14:40:17] [PASSED] drm_test_cmdline_res_refresh
[14:40:17] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:40:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:40:17] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:40:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:40:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:40:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:40:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:40:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:40:17] [PASSED] drm_test_cmdline_res_margins_force_on
[14:40:17] [PASSED] drm_test_cmdline_res_vesa_margins
[14:40:17] [PASSED] drm_test_cmdline_name
[14:40:17] [PASSED] drm_test_cmdline_name_bpp
[14:40:17] [PASSED] drm_test_cmdline_name_option
[14:40:17] [PASSED] drm_test_cmdline_name_bpp_option
[14:40:17] [PASSED] drm_test_cmdline_rotate_0
[14:40:17] [PASSED] drm_test_cmdline_rotate_90
[14:40:17] [PASSED] drm_test_cmdline_rotate_180
[14:40:17] [PASSED] drm_test_cmdline_rotate_270
[14:40:17] [PASSED] drm_test_cmdline_hmirror
[14:40:17] [PASSED] drm_test_cmdline_vmirror
[14:40:17] [PASSED] drm_test_cmdline_margin_options
[14:40:17] [PASSED] drm_test_cmdline_multiple_options
[14:40:17] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:40:17] [PASSED] drm_test_cmdline_extra_and_option
[14:40:17] [PASSED] drm_test_cmdline_freestanding_options
[14:40:17] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:40:17] [PASSED] drm_test_cmdline_panel_orientation
[14:40:17] ================ drm_test_cmdline_invalid =================
[14:40:17] [PASSED] margin_only
[14:40:17] [PASSED] interlace_only
[14:40:17] [PASSED] res_missing_x
[14:40:17] [PASSED] res_missing_y
[14:40:17] [PASSED] res_bad_y
[14:40:17] [PASSED] res_missing_y_bpp
[14:40:17] [PASSED] res_bad_bpp
[14:40:17] [PASSED] res_bad_refresh
[14:40:17] [PASSED] res_bpp_refresh_force_on_off
[14:40:17] [PASSED] res_invalid_mode
[14:40:17] [PASSED] res_bpp_wrong_place_mode
[14:40:17] [PASSED] name_bpp_refresh
[14:40:17] [PASSED] name_refresh
[14:40:17] [PASSED] name_refresh_wrong_mode
[14:40:17] [PASSED] name_refresh_invalid_mode
[14:40:17] [PASSED] rotate_multiple
[14:40:17] [PASSED] rotate_invalid_val
[14:40:17] [PASSED] rotate_truncated
[14:40:17] [PASSED] invalid_option
[14:40:17] [PASSED] invalid_tv_option
[14:40:17] [PASSED] truncated_tv_option
[14:40:17] ============ [PASSED] drm_test_cmdline_invalid =============
[14:40:17] =============== drm_test_cmdline_tv_options ===============
[14:40:17] [PASSED] NTSC
[14:40:17] [PASSED] NTSC_443
[14:40:17] [PASSED] NTSC_J
[14:40:17] [PASSED] PAL
[14:40:17] [PASSED] PAL_M
[14:40:17] [PASSED] PAL_N
[14:40:17] [PASSED] SECAM
[14:40:17] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:40:17] =============== [PASSED] drm_cmdline_parser ================
[14:40:17] ================ drm_get_tv_mode_from_name ================
[14:40:17] ========== drm_test_get_tv_mode_from_name_valid ===========
[14:40:17] [PASSED] NTSC
[14:40:17] [PASSED] NTSC-443
[14:40:17] [PASSED] NTSC-J
[14:40:17] [PASSED] PAL
[14:40:17] [PASSED] PAL-M
[14:40:17] [PASSED] PAL-N
[14:40:17] [PASSED] SECAM
[14:40:17] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:40:17] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:40:17] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:40:17] ==================== drm_damage_helper ====================
[14:40:17] [PASSED] drm_test_damage_iter_no_damage
[14:40:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:40:17] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:40:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:40:17] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:40:17] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:40:17] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:40:17] [PASSED] drm_test_damage_iter_simple_damage
[14:40:17] [PASSED] drm_test_damage_iter_single_damage
[14:40:17] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:40:17] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:40:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:40:17] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:40:17] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:40:17] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:40:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:40:17] [PASSED] drm_test_damage_iter_damage
[14:40:17] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:40:17] [PASSED] drm_test_damage_iter_damage_one_outside
[14:40:17] [PASSED] drm_test_damage_iter_damage_src_moved
[14:40:17] [PASSED] drm_test_damage_iter_damage_not_visible
[14:40:17] ================ [PASSED] drm_damage_helper ================
[14:40:17] ==================== drm_dp_mst_helper ====================
[14:40:17] ============== drm_test_dp_mst_calc_pbn_mode ==============
[14:40:17] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:40:17] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:40:17] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:40:17] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:40:17] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:40:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:40:17] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[14:40:17] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:40:17] [PASSED] DP_POWER_UP_PHY with port number
[14:40:17] [PASSED] DP_POWER_DOWN_PHY with port number
[14:40:17] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:40:17] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:40:17] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:40:17] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:40:17] [PASSED] DP_QUERY_PAYLOAD with port number
[14:40:17] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:40:17] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:40:17] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:40:17] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:40:17] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:40:17] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:40:17] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:40:17] [PASSED] DP_REMOTE_I2C_READ with port number
[14:40:17] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:40:17] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:40:17] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:40:17] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:40:17] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:40:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:40:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:40:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:40:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:40:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:40:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:40:17] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:40:17] ================ [PASSED] drm_dp_mst_helper ================
[14:40:17] ================= drm_format_helper_test ==================
[14:40:17] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:40:17] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:40:17] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:40:17] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:40:17] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:40:17] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:40:17] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:40:17] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:40:17] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:40:17] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:40:17] ============== drm_test_fb_xrgb8888_to_mono ===============
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:40:17] ==================== drm_test_fb_swab =====================
[14:40:17] [PASSED] single_pixel_source_buffer
[14:40:17] [PASSED] single_pixel_clip_rectangle
[14:40:17] [PASSED] well_known_colors
[14:40:17] [PASSED] destination_pitch
[14:40:17] ================ [PASSED] drm_test_fb_swab =================
[14:40:17] ================= drm_test_fb_clip_offset =================
[14:40:17] [PASSED] pass through
[14:40:17] [PASSED] horizontal offset
[14:40:17] [PASSED] vertical offset
[14:40:17] [PASSED] horizontal and vertical offset
[14:40:17] [PASSED] horizontal offset (custom pitch)
[14:40:17] [PASSED] vertical offset (custom pitch)
[14:40:17] [PASSED] horizontal and vertical offset (custom pitch)
[14:40:17] ============= [PASSED] drm_test_fb_clip_offset =============
[14:40:17] ============== drm_test_fb_build_fourcc_list ==============
[14:40:17] [PASSED] no native formats
[14:40:17] [PASSED] XRGB8888 as native format
[14:40:17] [PASSED] remove duplicates
[14:40:17] [PASSED] convert alpha formats
[14:40:17] [PASSED] random formats
[14:40:17] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[14:40:17] =================== drm_test_fb_memcpy ====================
[14:40:17] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:40:17] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:40:17] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:40:17] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:40:17] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:40:17] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:40:17] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:40:17] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:40:17] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:40:17] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:40:17] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:40:17] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:40:17] =============== [PASSED] drm_test_fb_memcpy ================
[14:40:17] ============= [PASSED] drm_format_helper_test ==============
[14:40:17] ======================= drm_format ========================
[14:40:17] [PASSED] drm_test_format_block_width_invalid
[14:40:17] [PASSED] drm_test_format_block_width_one_plane
[14:40:17] [PASSED] drm_test_format_block_width_two_plane
[14:40:17] [PASSED] drm_test_format_block_width_three_plane
[14:40:17] [PASSED] drm_test_format_block_width_tiled
[14:40:17] [PASSED] drm_test_format_block_height_invalid
[14:40:17] [PASSED] drm_test_format_block_height_one_plane
[14:40:17] [PASSED] drm_test_format_block_height_two_plane
[14:40:17] [PASSED] drm_test_format_block_height_three_plane
[14:40:17] [PASSED] drm_test_format_block_height_tiled
[14:40:17] [PASSED] drm_test_format_min_pitch_invalid
[14:40:17] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:40:17] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:40:17] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:40:17] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:40:17] [PASSED] drm_test_format_min_pitch_two_plane
[14:40:17] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:40:17] [PASSED] drm_test_format_min_pitch_tiled
[14:40:17] =================== [PASSED] drm_format ====================
[14:40:17] ===================== drm_framebuffer =====================
[14:40:17] =============== drm_test_framebuffer_create ===============
[14:40:17] [PASSED] ABGR8888 normal sizes
[14:40:17] [PASSED] ABGR8888 max sizes
[14:40:17] [PASSED] ABGR8888 pitch greater than min required
[14:40:17] [PASSED] ABGR8888 pitch less than min required
[14:40:17] [PASSED] ABGR8888 Invalid width
[14:40:17] [PASSED] ABGR8888 Invalid buffer handle
[14:40:17] [PASSED] No pixel format
[14:40:17] [PASSED] ABGR8888 Width 0
[14:40:17] [PASSED] ABGR8888 Height 0
[14:40:17] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:40:17] [PASSED] ABGR8888 Large buffer offset
[14:40:17] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:40:17] [PASSED] ABGR8888 Valid buffer modifier
[14:40:17] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:40:17] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:40:17] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:40:17] [PASSED] NV12 Normal sizes
[14:40:17] [PASSED] NV12 Max sizes
[14:40:17] [PASSED] NV12 Invalid pitch
[14:40:17] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:40:17] [PASSED] NV12 different modifier per-plane
[14:40:17] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:40:17] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:40:17] [PASSED] NV12 Modifier for inexistent plane
[14:40:17] [PASSED] NV12 Handle for inexistent plane
[14:40:17] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:40:17] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:40:17] [PASSED] YVU420 Normal sizes
[14:40:17] [PASSED] YVU420 Max sizes
[14:40:17] [PASSED] YVU420 Invalid pitch
[14:40:17] [PASSED] YVU420 Different pitches
[14:40:17] [PASSED] YVU420 Different buffer offsets/pitches
[14:40:17] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:40:17] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:40:17] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:40:17] [PASSED] YVU420 Valid modifier
[14:40:17] [PASSED] YVU420 Different modifiers per plane
[14:40:17] [PASSED] YVU420 Modifier for inexistent plane
[14:40:17] [PASSED] X0L2 Normal sizes
[14:40:17] [PASSED] X0L2 Max sizes
[14:40:17] [PASSED] X0L2 Invalid pitch
[14:40:17] [PASSED] X0L2 Pitch greater than minimum required
[14:40:17] [PASSED] X0L2 Handle for inexistent plane
[14:40:17] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:40:17] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:40:17] [PASSED] X0L2 Valid modifier
[14:40:17] [PASSED] X0L2 Modifier for inexistent plane
[14:40:17] =========== [PASSED] drm_test_framebuffer_create ===========
[14:40:17] ================= [PASSED] drm_framebuffer =================
[14:40:17] ==================== drm-test-managed =====================
[14:40:17] [PASSED] drm_test_managed_run_action
[14:40:17] ================ [PASSED] drm-test-managed =================
[14:40:17] ========================= drm_mm ==========================
[14:40:17] [PASSED] drm_test_mm_init
[14:40:17] [PASSED] drm_test_mm_debug
[14:40:27] [PASSED] drm_test_mm_reserve
[14:40:38] [PASSED] drm_test_mm_insert
[14:40:38] [PASSED] drm_test_mm_replace
[14:40:38] [PASSED] drm_test_mm_insert_range
[14:40:38] [PASSED] drm_test_mm_frag
[14:40:38] [PASSED] drm_test_mm_align
[14:40:38] [PASSED] drm_test_mm_align32
[14:40:39] [PASSED] drm_test_mm_align64
[14:40:39] [PASSED] drm_test_mm_evict
[14:40:39] [PASSED] drm_test_mm_evict_range
[14:40:39] [PASSED] drm_test_mm_topdown
[14:40:39] [PASSED] drm_test_mm_bottomup
[14:40:39] [PASSED] drm_test_mm_lowest
[14:40:39] [PASSED] drm_test_mm_highest
[14:40:40] [PASSED] drm_test_mm_color
[14:40:40] [PASSED] drm_test_mm_color_evict
[14:40:40] [PASSED] drm_test_mm_color_evict_range
[14:40:40] ===================== [PASSED] drm_mm ======================
[14:40:40] =================== drm_modes_analog_tv ===================
[14:40:40] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:40:40] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:40:40] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:40:40] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:40:40] =============== [PASSED] drm_modes_analog_tv ===============
[14:40:40] ==================== drm_plane_helper =====================
[14:40:40] =============== drm_test_check_plane_state ================
[14:40:40] [PASSED] clipping_simple
[14:40:40] [PASSED] clipping_rotate_reflect
[14:40:40] [PASSED] positioning_simple
[14:40:40] [PASSED] upscaling
[14:40:40] [PASSED] downscaling
[14:40:40] [PASSED] rounding1
[14:40:40] [PASSED] rounding2
[14:40:40] [PASSED] rounding3
[14:40:40] [PASSED] rounding4
[14:40:40] =========== [PASSED] drm_test_check_plane_state ============
[14:40:40] =========== drm_test_check_invalid_plane_state ============
[14:40:40] [PASSED] positioning_invalid
[14:40:40] [PASSED] upscaling_invalid
[14:40:40] [PASSED] downscaling_invalid
[14:40:40] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:40:40] ================ [PASSED] drm_plane_helper =================
[14:40:40] ============ drm_connector_helper_tv_get_modes ============
[14:40:40] ====== drm_test_connector_helper_tv_get_modes_check =======
[14:40:40] [PASSED] None
[14:40:40] [PASSED] PAL
[14:40:40] [PASSED] NTSC
[14:40:40] [PASSED] Both, NTSC Default
[14:40:40] [PASSED] Both, PAL Default
[14:40:40] [PASSED] Both, NTSC Default, with PAL on command-line
[14:40:40] [PASSED] Both, PAL Default, with NTSC on command-line
[14:40:41] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:40:41] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:40:41] ======================== drm_rect =========================
[14:40:41] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:40:41] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:40:41] [PASSED] drm_test_rect_clip_scaled_clipped
[14:40:41] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:40:41] ================= drm_test_rect_intersect =================
[14:40:41] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:40:41] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:40:41] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:40:41] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:40:41] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:40:41] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:40:41] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:40:41] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:40:41] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:40:41] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:40:41] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:40:41] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:40:41] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:40:41] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:40:41] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:40:41] ============= [PASSED] drm_test_rect_intersect =============
[14:40:41] ================ drm_test_rect_calc_hscale ================
[14:40:41] [PASSED] normal use
[14:40:41] [PASSED] out of max range
[14:40:41] [PASSED] out of min range
[14:40:41] [PASSED] zero dst
[14:40:41] [PASSED] negative src
[14:40:41] [PASSED] negative dst
[14:40:41] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:40:41] ================ drm_test_rect_calc_vscale ================
[14:40:41] [PASSED] normal use
[14:40:41] [PASSED] out of max range
[14:40:41] [PASSED] out of min range
[14:40:41] [PASSED] zero dst
[14:40:41] [PASSED] negative src
[14:40:41] [PASSED] negative dst
[14:40:41] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:40:41] ================== drm_test_rect_rotate ===================
[14:40:41] [PASSED] reflect-x
[14:40:41] [PASSED] reflect-y
[14:40:41] [PASSED] rotate-0
[14:40:41] [PASSED] rotate-90
[14:40:41] [PASSED] rotate-180
[14:40:41] [PASSED] rotate-270
[14:40:41] ============== [PASSED] drm_test_rect_rotate ===============
[14:40:41] ================ drm_test_rect_rotate_inv =================
[14:40:41] [PASSED] reflect-x
[14:40:41] [PASSED] reflect-y
[14:40:41] [PASSED] rotate-0
[14:40:41] [PASSED] rotate-90
[14:40:41] [PASSED] rotate-180
[14:40:41] [PASSED] rotate-270
[14:40:41] ============ [PASSED] drm_test_rect_rotate_inv =============
stty: 'standard input': Inappropriate ioctl for device
[14:40:41] ==================== [PASSED] drm_rect =====================
[14:40:41] ======================== drm_exec =========================
[14:40:41] [PASSED] sanitycheck
[14:40:41] [PASSED] test_lock
[14:40:41] [PASSED] test_lock_unlock
[14:40:41] [PASSED] test_duplicates
[14:40:41] [PASSED] test_prepare
[14:40:41] [PASSED] test_prepare_array
[14:40:41] [PASSED] test_multiple_loops
[14:40:41] ==================== [PASSED] drm_exec =====================
[14:40:41] ============================================================
[14:40:41] Testing complete. Ran 368 tests: passed: 368
[14:40:41] Elapsed time: 44.493s total, 1.665s configuring, 19.097s building, 23.724s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 81+ messages in thread* [Intel-xe] ✓ CI.Build: success for uAPI Alignment - take 2
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (52 preceding siblings ...)
2023-11-03 14:40 ` [Intel-xe] ✓ CI.KUnit: success " Patchwork
@ 2023-11-03 14:47 ` Patchwork
2023-11-03 14:48 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
` (2 subsequent siblings)
56 siblings, 0 replies; 81+ messages in thread
From: Patchwork @ 2023-11-03 14:47 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - take 2
URL : https://patchwork.freedesktop.org/series/125955/
State : success
== Summary ==
+ trap cleanup EXIT
+ cd /kernel
+ git clone https://gitlab.freedesktop.org/drm/xe/ci.git .ci
Cloning into '.ci'...
++ date +%s
+ echo -e '\e[0Ksection_start:1699022451:build_x86_64[collapsed=true]\r\e[0KBuild x86-64'
+ mkdir -p build64-default
^[[0Ksection_start:1699022451:build_x86_64[collapsed=true]
^[[0KBuild x86-64
+ cp .ci/kernel/kconfig build64-default/.config
+ make O=build64-default olddefconfig
make[1]: Entering directory '/kernel/build64-default'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTLD scripts/kconfig/conf
#
# configuration written to .config
#
make[1]: Leaving directory '/kernel/build64-default'
++ nproc
+ make O=build64-default -j48
make[1]: Entering directory '/kernel/build64-default'
GEN Makefile
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
GEN arch/x86/include/generated/asm/orc_hash.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
WRAP arch/x86/include/generated/uapi/asm/param.h
SYSHDR arch/x86/include/generated/asm/unistd_32_ia32.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
SYSHDR arch/x86/include/generated/asm/unistd_64_x32.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
SYSTBL arch/x86/include/generated/asm/syscalls_64.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
WRAP arch/x86/include/generated/uapi/asm/termbits.h
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/types.h
HOSTCC arch/x86/tools/relocs_32.o
HOSTCC arch/x86/tools/relocs_64.o
HOSTCC arch/x86/tools/relocs_common.o
WRAP arch/x86/include/generated/asm/early_ioremap.h
WRAP arch/x86/include/generated/asm/export.h
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
WRAP arch/x86/include/generated/asm/local64.h
WRAP arch/x86/include/generated/asm/module.lds.h
WRAP arch/x86/include/generated/asm/mmiowb.h
WRAP arch/x86/include/generated/asm/rwonce.h
WRAP arch/x86/include/generated/asm/unaligned.h
UPD include/generated/uapi/linux/version.h
UPD include/config/kernel.release
HOSTCC scripts/kallsyms
UPD include/generated/compile.h
HOSTCC scripts/sorttable
HOSTCC scripts/asn1_compiler
HOSTCC scripts/unifdef
UPD include/generated/utsrelease.h
DESCEND objtool
HOSTCC /kernel/build64-default/tools/objtool/fixdep.o
HOSTLD /kernel/build64-default/tools/objtool/fixdep-in.o
LINK /kernel/build64-default/tools/objtool/fixdep
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/exec-cmd.h
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/help.h
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/pager.h
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/parse-options.h
INSTALL /kernel/build64-default/tools/objtool/libsubcmd/include/subcmd/run-command.h
HOSTLD arch/x86/tools/relocs
CC /kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /kernel/build64-default/tools/objtool/libsubcmd/help.o
INSTALL libsubcmd_headers
CC /kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
CC /kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
HDRINST usr/include/video/edid.h
HDRINST usr/include/video/sisfb.h
HDRINST usr/include/drm/amdgpu_drm.h
HDRINST usr/include/video/uvesafb.h
HDRINST usr/include/drm/qaic_accel.h
HDRINST usr/include/drm/i915_drm.h
HDRINST usr/include/drm/vgem_drm.h
HDRINST usr/include/drm/virtgpu_drm.h
HDRINST usr/include/drm/xe_drm.h
HDRINST usr/include/drm/omap_drm.h
HDRINST usr/include/drm/tegra_drm.h
HDRINST usr/include/drm/radeon_drm.h
HDRINST usr/include/drm/drm_mode.h
HDRINST usr/include/drm/ivpu_accel.h
HDRINST usr/include/drm/exynos_drm.h
HDRINST usr/include/drm/drm_sarea.h
HDRINST usr/include/drm/v3d_drm.h
HDRINST usr/include/drm/qxl_drm.h
HDRINST usr/include/drm/drm_fourcc.h
HDRINST usr/include/drm/nouveau_drm.h
HDRINST usr/include/drm/habanalabs_accel.h
HDRINST usr/include/drm/vmwgfx_drm.h
HDRINST usr/include/drm/msm_drm.h
HDRINST usr/include/drm/etnaviv_drm.h
HDRINST usr/include/drm/vc4_drm.h
HDRINST usr/include/drm/panfrost_drm.h
HDRINST usr/include/drm/lima_drm.h
HDRINST usr/include/drm/drm.h
HDRINST usr/include/drm/armada_drm.h
HDRINST usr/include/mtd/inftl-user.h
HDRINST usr/include/mtd/nftl-user.h
HDRINST usr/include/mtd/mtd-user.h
HDRINST usr/include/mtd/ubi-user.h
HDRINST usr/include/mtd/mtd-abi.h
HDRINST usr/include/xen/gntdev.h
HDRINST usr/include/xen/gntalloc.h
HDRINST usr/include/xen/evtchn.h
HDRINST usr/include/xen/privcmd.h
HDRINST usr/include/asm-generic/auxvec.h
HDRINST usr/include/asm-generic/posix_types.h
HDRINST usr/include/asm-generic/bitsperlong.h
HDRINST usr/include/asm-generic/ioctls.h
HDRINST usr/include/asm-generic/mman.h
UPD scripts/mod/devicetable-offsets.h
HDRINST usr/include/asm-generic/shmbuf.h
HDRINST usr/include/asm-generic/bpf_perf_event.h
HDRINST usr/include/asm-generic/types.h
HDRINST usr/include/asm-generic/poll.h
HDRINST usr/include/asm-generic/msgbuf.h
HDRINST usr/include/asm-generic/swab.h
HDRINST usr/include/asm-generic/statfs.h
HDRINST usr/include/asm-generic/unistd.h
HDRINST usr/include/asm-generic/hugetlb_encode.h
HDRINST usr/include/asm-generic/resource.h
HDRINST usr/include/asm-generic/param.h
HDRINST usr/include/asm-generic/termbits-common.h
HDRINST usr/include/asm-generic/sockios.h
HDRINST usr/include/asm-generic/kvm_para.h
HDRINST usr/include/asm-generic/errno.h
HDRINST usr/include/asm-generic/termios.h
HDRINST usr/include/asm-generic/mman-common.h
HDRINST usr/include/asm-generic/ioctl.h
HDRINST usr/include/asm-generic/socket.h
HDRINST usr/include/asm-generic/signal-defs.h
HDRINST usr/include/asm-generic/termbits.h
HDRINST usr/include/asm-generic/int-ll64.h
HDRINST usr/include/asm-generic/signal.h
HDRINST usr/include/asm-generic/siginfo.h
HDRINST usr/include/asm-generic/stat.h
HDRINST usr/include/asm-generic/int-l64.h
HDRINST usr/include/asm-generic/errno-base.h
HDRINST usr/include/asm-generic/fcntl.h
HDRINST usr/include/asm-generic/setup.h
HDRINST usr/include/asm-generic/ipcbuf.h
HDRINST usr/include/asm-generic/sembuf.h
HDRINST usr/include/asm-generic/ucontext.h
HDRINST usr/include/rdma/mlx5_user_ioctl_cmds.h
HDRINST usr/include/rdma/irdma-abi.h
HDRINST usr/include/rdma/mana-abi.h
HDRINST usr/include/rdma/hfi/hfi1_user.h
HDRINST usr/include/rdma/hfi/hfi1_ioctl.h
HDRINST usr/include/rdma/rdma_user_rxe.h
HDRINST usr/include/rdma/rdma_user_ioctl.h
HDRINST usr/include/rdma/mlx5_user_ioctl_verbs.h
HDRINST usr/include/rdma/bnxt_re-abi.h
HDRINST usr/include/rdma/hns-abi.h
HDRINST usr/include/rdma/qedr-abi.h
HDRINST usr/include/rdma/ib_user_ioctl_cmds.h
HDRINST usr/include/rdma/vmw_pvrdma-abi.h
HDRINST usr/include/rdma/ib_user_sa.h
HDRINST usr/include/rdma/ib_user_ioctl_verbs.h
HDRINST usr/include/rdma/rvt-abi.h
HDRINST usr/include/rdma/mlx5-abi.h
HDRINST usr/include/rdma/rdma_netlink.h
HDRINST usr/include/rdma/erdma-abi.h
HDRINST usr/include/rdma/rdma_user_ioctl_cmds.h
HDRINST usr/include/rdma/rdma_user_cm.h
HDRINST usr/include/rdma/ib_user_verbs.h
HDRINST usr/include/rdma/efa-abi.h
HDRINST usr/include/rdma/siw-abi.h
HDRINST usr/include/rdma/mlx4-abi.h
HDRINST usr/include/rdma/mthca-abi.h
HDRINST usr/include/rdma/ib_user_mad.h
HDRINST usr/include/rdma/ocrdma-abi.h
HDRINST usr/include/rdma/cxgb4-abi.h
HDRINST usr/include/misc/xilinx_sdfec.h
MKELF scripts/mod/elfconfig.h
HDRINST usr/include/misc/uacce/hisi_qm.h
HDRINST usr/include/misc/uacce/uacce.h
HDRINST usr/include/misc/cxl.h
HDRINST usr/include/misc/ocxl.h
HDRINST usr/include/misc/fastrpc.h
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/file2alias.o
HDRINST usr/include/misc/pvpanic.h
HDRINST usr/include/linux/i8k.h
HOSTCC scripts/mod/sumversion.o
HDRINST usr/include/linux/acct.h
HDRINST usr/include/linux/atmmpc.h
HDRINST usr/include/linux/fs.h
HDRINST usr/include/linux/cifs/cifs_mount.h
HDRINST usr/include/linux/if_packet.h
HDRINST usr/include/linux/cifs/cifs_netlink.h
HDRINST usr/include/linux/route.h
HDRINST usr/include/linux/patchkey.h
HDRINST usr/include/linux/tc_ematch/tc_em_cmp.h
HDRINST usr/include/linux/tc_ematch/tc_em_ipt.h
HDRINST usr/include/linux/tc_ematch/tc_em_meta.h
HDRINST usr/include/linux/tc_ematch/tc_em_nbyte.h
HDRINST usr/include/linux/tc_ematch/tc_em_text.h
HDRINST usr/include/linux/virtio_pmem.h
HDRINST usr/include/linux/rkisp1-config.h
HDRINST usr/include/linux/vhost.h
HDRINST usr/include/linux/cec-funcs.h
HDRINST usr/include/linux/ppdev.h
HDRINST usr/include/linux/isdn/capicmd.h
HDRINST usr/include/linux/virtio_fs.h
HDRINST usr/include/linux/netfilter_ipv6.h
HDRINST usr/include/linux/lirc.h
HDRINST usr/include/linux/mroute6.h
HDRINST usr/include/linux/nl80211-vnd-intel.h
HDRINST usr/include/linux/ivtvfb.h
HDRINST usr/include/linux/auxvec.h
HDRINST usr/include/linux/dm-log-userspace.h
HDRINST usr/include/linux/virtio_scmi.h
HDRINST usr/include/linux/dccp.h
HDRINST usr/include/linux/atmarp.h
HDRINST usr/include/linux/arcfb.h
HDRINST usr/include/linux/nbd-netlink.h
HDRINST usr/include/linux/sched/types.h
HDRINST usr/include/linux/tcp.h
HDRINST usr/include/linux/neighbour.h
HDRINST usr/include/linux/dlm_device.h
HDRINST usr/include/linux/wmi.h
HDRINST usr/include/linux/btrfs_tree.h
HDRINST usr/include/linux/virtio_crypto.h
HDRINST usr/include/linux/vbox_err.h
HDRINST usr/include/linux/edd.h
HDRINST usr/include/linux/loop.h
HDRINST usr/include/linux/nvme_ioctl.h
HDRINST usr/include/linux/mmtimer.h
HDRINST usr/include/linux/if_pppol2tp.h
HDRINST usr/include/linux/mtio.h
HDRINST usr/include/linux/if_arcnet.h
HDRINST usr/include/linux/romfs_fs.h
HDRINST usr/include/linux/posix_types.h
HDRINST usr/include/linux/rtc.h
HDRINST usr/include/linux/landlock.h
HDRINST usr/include/linux/gpio.h
HDRINST usr/include/linux/selinux_netlink.h
HDRINST usr/include/linux/pps.h
HDRINST usr/include/linux/ndctl.h
HDRINST usr/include/linux/virtio_gpu.h
HDRINST usr/include/linux/android/binderfs.h
HDRINST usr/include/linux/android/binder.h
HDRINST usr/include/linux/virtio_vsock.h
HDRINST usr/include/linux/sound.h
HDRINST usr/include/linux/vtpm_proxy.h
HDRINST usr/include/linux/nfs_fs.h
HDRINST usr/include/linux/elf-fdpic.h
HDRINST usr/include/linux/adfs_fs.h
HDRINST usr/include/linux/target_core_user.h
HDRINST usr/include/linux/netlink_diag.h
HDRINST usr/include/linux/const.h
HDRINST usr/include/linux/firewire-cdev.h
HDRINST usr/include/linux/vdpa.h
HDRINST usr/include/linux/if_infiniband.h
HDRINST usr/include/linux/serial.h
HDRINST usr/include/linux/iio/types.h
HDRINST usr/include/linux/iio/buffer.h
HDRINST usr/include/linux/iio/events.h
HDRINST usr/include/linux/baycom.h
HDRINST usr/include/linux/major.h
HDRINST usr/include/linux/atmppp.h
HDRINST usr/include/linux/ipv6_route.h
HDRINST usr/include/linux/spi/spidev.h
HDRINST usr/include/linux/spi/spi.h
HDRINST usr/include/linux/virtio_ring.h
HDRINST usr/include/linux/hdlc/ioctl.h
HDRINST usr/include/linux/remoteproc_cdev.h
HDRINST usr/include/linux/hyperv.h
HDRINST usr/include/linux/rpl_iptunnel.h
HDRINST usr/include/linux/sync_file.h
HDRINST usr/include/linux/igmp.h
HDRINST usr/include/linux/v4l2-dv-timings.h
HDRINST usr/include/linux/virtio_i2c.h
HDRINST usr/include/linux/xfrm.h
HDRINST usr/include/linux/capability.h
HDRINST usr/include/linux/gtp.h
HDRINST usr/include/linux/xdp_diag.h
HDRINST usr/include/linux/pkt_cls.h
HDRINST usr/include/linux/suspend_ioctls.h
HDRINST usr/include/linux/vt.h
HDRINST usr/include/linux/loadpin.h
HDRINST usr/include/linux/dlm_plock.h
HDRINST usr/include/linux/fb.h
HDRINST usr/include/linux/max2175.h
HDRINST usr/include/linux/sunrpc/debug.h
HDRINST usr/include/linux/gsmmux.h
HDRINST usr/include/linux/watchdog.h
HDRINST usr/include/linux/vhost_types.h
HDRINST usr/include/linux/vduse.h
HDRINST usr/include/linux/ila.h
HDRINST usr/include/linux/tdx-guest.h
HDRINST usr/include/linux/close_range.h
HDRINST usr/include/linux/ivtv.h
HDRINST usr/include/linux/cryptouser.h
HDRINST usr/include/linux/netfilter/xt_string.h
HDRINST usr/include/linux/netfilter/nfnetlink_compat.h
HDRINST usr/include/linux/netfilter/nf_nat.h
HDRINST usr/include/linux/netfilter/xt_recent.h
HDRINST usr/include/linux/netfilter/xt_addrtype.h
HDRINST usr/include/linux/netfilter/nf_conntrack_tcp.h
HDRINST usr/include/linux/netfilter/xt_MARK.h
HDRINST usr/include/linux/netfilter/xt_SYNPROXY.h
HDRINST usr/include/linux/netfilter/xt_multiport.h
HDRINST usr/include/linux/netfilter/nfnetlink.h
HDRINST usr/include/linux/netfilter/xt_cgroup.h
HDRINST usr/include/linux/netfilter/nf_synproxy.h
HDRINST usr/include/linux/netfilter/xt_TCPOPTSTRIP.h
HDRINST usr/include/linux/netfilter/nfnetlink_log.h
HDRINST usr/include/linux/netfilter/xt_TPROXY.h
HDRINST usr/include/linux/netfilter/xt_u32.h
HDRINST usr/include/linux/netfilter/nfnetlink_osf.h
HDRINST usr/include/linux/netfilter/xt_ecn.h
HDRINST usr/include/linux/netfilter/xt_esp.h
HDRINST usr/include/linux/netfilter/nfnetlink_hook.h
HDRINST usr/include/linux/netfilter/xt_mac.h
HDRINST usr/include/linux/netfilter/xt_comment.h
HDRINST usr/include/linux/netfilter/xt_NFQUEUE.h
HDRINST usr/include/linux/netfilter/xt_osf.h
HDRINST usr/include/linux/netfilter/xt_hashlimit.h
HDRINST usr/include/linux/netfilter/nf_conntrack_sctp.h
HDRINST usr/include/linux/netfilter/xt_socket.h
HDRINST usr/include/linux/netfilter/xt_connmark.h
HDRINST usr/include/linux/netfilter/xt_sctp.h
HDRINST usr/include/linux/netfilter/xt_tcpudp.h
HDRINST usr/include/linux/netfilter/xt_DSCP.h
HDRINST usr/include/linux/netfilter/xt_time.h
HDRINST usr/include/linux/netfilter/xt_IDLETIMER.h
HDRINST usr/include/linux/netfilter/xt_policy.h
HDRINST usr/include/linux/netfilter/xt_rpfilter.h
HDRINST usr/include/linux/netfilter/xt_nfacct.h
HDRINST usr/include/linux/netfilter/xt_SECMARK.h
HDRINST usr/include/linux/netfilter/xt_length.h
HDRINST usr/include/linux/netfilter/nfnetlink_cthelper.h
HDRINST usr/include/linux/netfilter/xt_quota.h
HDRINST usr/include/linux/netfilter/xt_CLASSIFY.h
HDRINST usr/include/linux/netfilter/xt_ipcomp.h
HDRINST usr/include/linux/netfilter/xt_iprange.h
HDRINST usr/include/linux/netfilter/xt_bpf.h
HDRINST usr/include/linux/netfilter/xt_LOG.h
HDRINST usr/include/linux/netfilter/xt_rateest.h
HDRINST usr/include/linux/netfilter/xt_CONNSECMARK.h
HDRINST usr/include/linux/netfilter/xt_HMARK.h
HDRINST usr/include/linux/netfilter/xt_CONNMARK.h
HDRINST usr/include/linux/netfilter/xt_pkttype.h
HDRINST usr/include/linux/netfilter/xt_ipvs.h
HDRINST usr/include/linux/netfilter/xt_devgroup.h
HDRINST usr/include/linux/netfilter/xt_AUDIT.h
HDRINST usr/include/linux/netfilter/xt_realm.h
HDRINST usr/include/linux/netfilter/xt_set.h
HDRINST usr/include/linux/netfilter/nf_conntrack_common.h
HDRINST usr/include/linux/netfilter/xt_LED.h
HDRINST usr/include/linux/netfilter/xt_connlabel.h
HDRINST usr/include/linux/netfilter/xt_owner.h
HDRINST usr/include/linux/netfilter/xt_dccp.h
HDRINST usr/include/linux/netfilter/xt_limit.h
HDRINST usr/include/linux/netfilter/xt_conntrack.h
HDRINST usr/include/linux/netfilter/xt_TEE.h
HDRINST usr/include/linux/netfilter/xt_RATEEST.h
HDRINST usr/include/linux/netfilter/xt_connlimit.h
HDRINST usr/include/linux/netfilter/ipset/ip_set.h
HDRINST usr/include/linux/netfilter/ipset/ip_set_list.h
HDRINST usr/include/linux/netfilter/ipset/ip_set_hash.h
HDRINST usr/include/linux/netfilter/ipset/ip_set_bitmap.h
HDRINST usr/include/linux/netfilter/x_tables.h
HDRINST usr/include/linux/netfilter/xt_dscp.h
HDRINST usr/include/linux/netfilter/nf_conntrack_ftp.h
HDRINST usr/include/linux/netfilter/xt_cluster.h
HDRINST usr/include/linux/netfilter/nf_conntrack_tuple_common.h
HDRINST usr/include/linux/netfilter/nf_log.h
HDRINST usr/include/linux/netfilter/xt_tcpmss.h
HDRINST usr/include/linux/netfilter/xt_NFLOG.h
HDRINST usr/include/linux/netfilter/xt_l2tp.h
HDRINST usr/include/linux/netfilter/xt_helper.h
HDRINST usr/include/linux/netfilter/xt_statistic.h
HDRINST usr/include/linux/netfilter/nfnetlink_queue.h
HDRINST usr/include/linux/netfilter/nfnetlink_cttimeout.h
HDRINST usr/include/linux/netfilter/xt_CT.h
HDRINST usr/include/linux/netfilter/xt_CHECKSUM.h
HDRINST usr/include/linux/netfilter/xt_connbytes.h
HDRINST usr/include/linux/netfilter/xt_state.h
HDRINST usr/include/linux/netfilter/nf_tables.h
HDRINST usr/include/linux/netfilter/xt_mark.h
HDRINST usr/include/linux/netfilter/xt_cpu.h
HDRINST usr/include/linux/netfilter/nf_tables_compat.h
HDRINST usr/include/linux/netfilter/xt_physdev.h
HDRINST usr/include/linux/netfilter/nfnetlink_conntrack.h
HDRINST usr/include/linux/netfilter/nfnetlink_acct.h
HDRINST usr/include/linux/netfilter/xt_TCPMSS.h
HDRINST usr/include/linux/tty_flags.h
HDRINST usr/include/linux/if_phonet.h
HDRINST usr/include/linux/elf-em.h
HDRINST usr/include/linux/vm_sockets.h
HDRINST usr/include/linux/dlmconstants.h
HDRINST usr/include/linux/bsg.h
HDRINST usr/include/linux/matroxfb.h
HDRINST usr/include/linux/sysctl.h
HDRINST usr/include/linux/unix_diag.h
HDRINST usr/include/linux/pcitest.h
HDRINST usr/include/linux/mman.h
HDRINST usr/include/linux/if_plip.h
HDRINST usr/include/linux/virtio_balloon.h
HDRINST usr/include/linux/pidfd.h
HDRINST usr/include/linux/f2fs.h
HDRINST usr/include/linux/x25.h
HDRINST usr/include/linux/if_cablemodem.h
HDRINST usr/include/linux/utsname.h
HDRINST usr/include/linux/counter.h
HDRINST usr/include/linux/atm_tcp.h
HDRINST usr/include/linux/atalk.h
HDRINST usr/include/linux/virtio_rng.h
HDRINST usr/include/linux/vboxguest.h
HDRINST usr/include/linux/bpf_perf_event.h
HDRINST usr/include/linux/ipmi_ssif_bmc.h
HDRINST usr/include/linux/nfs_mount.h
HDRINST usr/include/linux/sonet.h
HDRINST usr/include/linux/netfilter.h
HDRINST usr/include/linux/keyctl.h
HDRINST usr/include/linux/nl80211.h
HDRINST usr/include/linux/misc/bcm_vk.h
HDRINST usr/include/linux/audit.h
HDRINST usr/include/linux/tipc_config.h
HDRINST usr/include/linux/tipc_sockets_diag.h
HDRINST usr/include/linux/futex.h
HDRINST usr/include/linux/sev-guest.h
HDRINST usr/include/linux/ublk_cmd.h
HDRINST usr/include/linux/types.h
HDRINST usr/include/linux/virtio_input.h
HDRINST usr/include/linux/if_slip.h
HDRINST usr/include/linux/personality.h
HDRINST usr/include/linux/openat2.h
HDRINST usr/include/linux/poll.h
HDRINST usr/include/linux/posix_acl.h
HDRINST usr/include/linux/smc_diag.h
HDRINST usr/include/linux/snmp.h
HDRINST usr/include/linux/errqueue.h
HDRINST usr/include/linux/if_tunnel.h
HDRINST usr/include/linux/fanotify.h
HDRINST usr/include/linux/kernel.h
HDRINST usr/include/linux/rtnetlink.h
HDRINST usr/include/linux/rpl.h
HDRINST usr/include/linux/memfd.h
HDRINST usr/include/linux/serial_core.h
HDRINST usr/include/linux/dns_resolver.h
HDRINST usr/include/linux/pr.h
HDRINST usr/include/linux/atm_eni.h
HDRINST usr/include/linux/lp.h
HDRINST usr/include/linux/virtio_mem.h
HDRINST usr/include/linux/ultrasound.h
HDRINST usr/include/linux/sctp.h
HDRINST usr/include/linux/uio.h
HDRINST usr/include/linux/tcp_metrics.h
HDRINST usr/include/linux/wwan.h
HDRINST usr/include/linux/atmbr2684.h
HDRINST usr/include/linux/in_route.h
HDRINST usr/include/linux/qemu_fw_cfg.h
HDRINST usr/include/linux/if_macsec.h
HDRINST usr/include/linux/usb/charger.h
HDRINST usr/include/linux/usb/g_uvc.h
HDRINST usr/include/linux/usb/gadgetfs.h
HDRINST usr/include/linux/usb/raw_gadget.h
HDRINST usr/include/linux/usb/cdc-wdm.h
HDRINST usr/include/linux/usb/g_printer.h
HDRINST usr/include/linux/usb/midi.h
HDRINST usr/include/linux/usb/tmc.h
HDRINST usr/include/linux/usb/video.h
HDRINST usr/include/linux/usb/functionfs.h
HDRINST usr/include/linux/usb/audio.h
HDRINST usr/include/linux/usb/ch11.h
HDRINST usr/include/linux/usb/ch9.h
HDRINST usr/include/linux/usb/cdc.h
HDRINST usr/include/linux/jffs2.h
HDRINST usr/include/linux/ax25.h
HDRINST usr/include/linux/auto_fs.h
HDRINST usr/include/linux/tiocl.h
HDRINST usr/include/linux/scc.h
HDRINST usr/include/linux/psci.h
HDRINST usr/include/linux/swab.h
HDRINST usr/include/linux/cec.h
HDRINST usr/include/linux/kfd_ioctl.h
HDRINST usr/include/linux/smc.h
HDRINST usr/include/linux/qrtr.h
HDRINST usr/include/linux/screen_info.h
HDRINST usr/include/linux/nfsacl.h
HDRINST usr/include/linux/seg6_hmac.h
HDRINST usr/include/linux/gameport.h
HDRINST usr/include/linux/wireless.h
HDRINST usr/include/linux/fdreg.h
HDRINST usr/include/linux/cciss_defs.h
HDRINST usr/include/linux/serial_reg.h
HDRINST usr/include/linux/perf_event.h
HDRINST usr/include/linux/in6.h
HDRINST usr/include/linux/hid.h
HDRINST usr/include/linux/netlink.h
HDRINST usr/include/linux/fuse.h
HDRINST usr/include/linux/magic.h
HDRINST usr/include/linux/ioam6_iptunnel.h
HDRINST usr/include/linux/stm.h
HDRINST usr/include/linux/vsockmon.h
HDRINST usr/include/linux/seg6.h
HDRINST usr/include/linux/idxd.h
HDRINST usr/include/linux/nitro_enclaves.h
HDRINST usr/include/linux/ptrace.h
HDRINST usr/include/linux/ioam6_genl.h
HDRINST usr/include/linux/qnx4_fs.h
HDRINST usr/include/linux/fsl_mc.h
HDRINST usr/include/linux/msg.h
HDRINST usr/include/linux/net_tstamp.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_TTL.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ttl.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ah.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ECN.h
HDRINST usr/include/linux/netfilter_ipv4/ip_tables.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_ecn.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_CLUSTERIP.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_REJECT.h
HDRINST usr/include/linux/netfilter_ipv4/ipt_LOG.h
HDRINST usr/include/linux/sem.h
HDRINST usr/include/linux/net_namespace.h
HDRINST usr/include/linux/radeonfb.h
HDRINST usr/include/linux/tee.h
HDRINST usr/include/linux/udp.h
HDRINST usr/include/linux/virtio_bt.h
HDRINST usr/include/linux/v4l2-subdev.h
HDRINST usr/include/linux/posix_acl_xattr.h
HDRINST usr/include/linux/v4l2-mediabus.h
HDRINST usr/include/linux/atmapi.h
HDRINST usr/include/linux/raid/md_p.h
HDRINST usr/include/linux/raid/md_u.h
HDRINST usr/include/linux/zorro_ids.h
HDRINST usr/include/linux/nbd.h
HDRINST usr/include/linux/isst_if.h
HDRINST usr/include/linux/rxrpc.h
HDRINST usr/include/linux/unistd.h
HDRINST usr/include/linux/if_arp.h
HDRINST usr/include/linux/atm_zatm.h
LD /kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
HDRINST usr/include/linux/io_uring.h
HDRINST usr/include/linux/if_fddi.h
HDRINST usr/include/linux/bpqether.h
HDRINST usr/include/linux/sysinfo.h
HDRINST usr/include/linux/auto_dev-ioctl.h
HDRINST usr/include/linux/nfs4_mount.h
HDRINST usr/include/linux/keyboard.h
HDRINST usr/include/linux/virtio_mmio.h
HDRINST usr/include/linux/input.h
HDRINST usr/include/linux/qnxtypes.h
HDRINST usr/include/linux/mdio.h
HDRINST usr/include/linux/lwtunnel.h
HDRINST usr/include/linux/gfs2_ondisk.h
HDRINST usr/include/linux/eventfd.h
HDRINST usr/include/linux/nfs4.h
HDRINST usr/include/linux/ptp_clock.h
HDRINST usr/include/linux/nubus.h
HDRINST usr/include/linux/if_bonding.h
HDRINST usr/include/linux/kcov.h
HDRINST usr/include/linux/fadvise.h
HDRINST usr/include/linux/taskstats.h
HDRINST usr/include/linux/veth.h
HDRINST usr/include/linux/atm.h
HDRINST usr/include/linux/ipmi.h
HDRINST usr/include/linux/kdev_t.h
HDRINST usr/include/linux/mount.h
HDRINST usr/include/linux/shm.h
HDRINST usr/include/linux/resource.h
HDRINST usr/include/linux/prctl.h
HDRINST usr/include/linux/watch_queue.h
AR /kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
HDRINST usr/include/linux/sched.h
HDRINST usr/include/linux/phonet.h
HDRINST usr/include/linux/random.h
HDRINST usr/include/linux/tty.h
HDRINST usr/include/linux/apm_bios.h
HDRINST usr/include/linux/fd.h
HDRINST usr/include/linux/um_timetravel.h
HDRINST usr/include/linux/tls.h
HDRINST usr/include/linux/rpmsg_types.h
HDRINST usr/include/linux/pfrut.h
HDRINST usr/include/linux/mei.h
HDRINST usr/include/linux/fsi.h
HDRINST usr/include/linux/rds.h
HDRINST usr/include/linux/if_x25.h
HDRINST usr/include/linux/param.h
HDRINST usr/include/linux/netdevice.h
HDRINST usr/include/linux/binfmts.h
HDRINST usr/include/linux/if_pppox.h
HDRINST usr/include/linux/sockios.h
HDRINST usr/include/linux/kcm.h
HDRINST usr/include/linux/virtio_9p.h
HDRINST usr/include/linux/genwqe/genwqe_card.h
HDRINST usr/include/linux/if_tun.h
HDRINST usr/include/linux/ext4.h
HDRINST usr/include/linux/if_ether.h
HDRINST usr/include/linux/kvm_para.h
HDRINST usr/include/linux/kernel-page-flags.h
HDRINST usr/include/linux/cdrom.h
HDRINST usr/include/linux/un.h
HDRINST usr/include/linux/module.h
HDRINST usr/include/linux/mqueue.h
HDRINST usr/include/linux/a.out.h
HDRINST usr/include/linux/input-event-codes.h
HDRINST usr/include/linux/coda.h
HDRINST usr/include/linux/rio_mport_cdev.h
HDRINST usr/include/linux/ipsec.h
HDRINST usr/include/linux/blkpg.h
HDRINST usr/include/linux/blkzoned.h
HDRINST usr/include/linux/netfilter_bridge/ebt_arpreply.h
HDRINST usr/include/linux/netfilter_bridge/ebt_redirect.h
HDRINST usr/include/linux/netfilter_bridge/ebt_nflog.h
HDRINST usr/include/linux/netfilter_bridge/ebt_802_3.h
HDRINST usr/include/linux/netfilter_bridge/ebt_mark_m.h
HDRINST usr/include/linux/netfilter_bridge/ebt_nat.h
HDRINST usr/include/linux/netfilter_bridge/ebtables.h
HDRINST usr/include/linux/netfilter_bridge/ebt_vlan.h
HDRINST usr/include/linux/netfilter_bridge/ebt_limit.h
HDRINST usr/include/linux/netfilter_bridge/ebt_log.h
HDRINST usr/include/linux/netfilter_bridge/ebt_stp.h
HDRINST usr/include/linux/netfilter_bridge/ebt_pkttype.h
HDRINST usr/include/linux/netfilter_bridge/ebt_ip.h
CC /kernel/build64-default/tools/objtool/weak.o
HDRINST usr/include/linux/netfilter_bridge/ebt_ip6.h
CC /kernel/build64-default/tools/objtool/check.o
HDRINST usr/include/linux/netfilter_bridge/ebt_arp.h
CC /kernel/build64-default/tools/objtool/special.o
HDRINST usr/include/linux/netfilter_bridge/ebt_mark_t.h
CC /kernel/build64-default/tools/objtool/builtin-check.o
HDRINST usr/include/linux/netfilter_bridge/ebt_among.h
CC /kernel/build64-default/tools/objtool/elf.o
MKDIR /kernel/build64-default/tools/objtool/arch/x86/
CC /kernel/build64-default/tools/objtool/objtool.o
HDRINST usr/include/linux/reiserfs_fs.h
CC /kernel/build64-default/tools/objtool/orc_gen.o
CC /kernel/build64-default/tools/objtool/orc_dump.o
HDRINST usr/include/linux/cciss_ioctl.h
MKDIR /kernel/build64-default/tools/objtool/arch/x86/lib/
HDRINST usr/include/linux/fsmap.h
CC /kernel/build64-default/tools/objtool/libstring.o
HDRINST usr/include/linux/smiapp.h
CC /kernel/build64-default/tools/objtool/arch/x86/special.o
HDRINST usr/include/linux/switchtec_ioctl.h
CC /kernel/build64-default/tools/objtool/libctype.o
GEN /kernel/build64-default/tools/objtool/arch/x86/lib/inat-tables.c
CC /kernel/build64-default/tools/objtool/str_error_r.o
HDRINST usr/include/linux/atmdev.h
HDRINST usr/include/linux/hpet.h
CC /kernel/build64-default/tools/objtool/librbtree.o
HDRINST usr/include/linux/virtio_config.h
HDRINST usr/include/linux/string.h
HDRINST usr/include/linux/kfd_sysfs.h
HDRINST usr/include/linux/inet_diag.h
HDRINST usr/include/linux/netdev.h
HDRINST usr/include/linux/xattr.h
HDRINST usr/include/linux/iommufd.h
HDRINST usr/include/linux/user_events.h
HDRINST usr/include/linux/errno.h
HDRINST usr/include/linux/icmp.h
HDRINST usr/include/linux/i2o-dev.h
HDRINST usr/include/linux/pg.h
HDRINST usr/include/linux/if_bridge.h
HDRINST usr/include/linux/thermal.h
HDRINST usr/include/linux/uinput.h
HDRINST usr/include/linux/handshake.h
HDRINST usr/include/linux/dqblk_xfs.h
HDRINST usr/include/linux/v4l2-common.h
HDRINST usr/include/linux/nvram.h
HDRINST usr/include/linux/if_vlan.h
HDRINST usr/include/linux/uhid.h
HDRINST usr/include/linux/omap3isp.h
HDRINST usr/include/linux/rose.h
HDRINST usr/include/linux/phantom.h
HDRINST usr/include/linux/ipmi_msgdefs.h
HDRINST usr/include/linux/bcm933xx_hcs.h
HDRINST usr/include/linux/bpf.h
HDRINST usr/include/linux/mempolicy.h
HDRINST usr/include/linux/efs_fs_sb.h
HDRINST usr/include/linux/nexthop.h
HDRINST usr/include/linux/net_dropmon.h
HDRINST usr/include/linux/surface_aggregator/cdev.h
HDRINST usr/include/linux/surface_aggregator/dtx.h
HDRINST usr/include/linux/net.h
HDRINST usr/include/linux/mii.h
HDRINST usr/include/linux/virtio_pcidev.h
HDRINST usr/include/linux/termios.h
HDRINST usr/include/linux/cgroupstats.h
HDRINST usr/include/linux/mpls.h
HDRINST usr/include/linux/iommu.h
HDRINST usr/include/linux/toshiba.h
HDRINST usr/include/linux/virtio_scsi.h
HDRINST usr/include/linux/zorro.h
HDRINST usr/include/linux/chio.h
HDRINST usr/include/linux/pkt_sched.h
HDRINST usr/include/linux/cramfs_fs.h
HDRINST usr/include/linux/nfs3.h
HDRINST usr/include/linux/vfio_ccw.h
HDRINST usr/include/linux/atm_nicstar.h
HDRINST usr/include/linux/ncsi.h
HDRINST usr/include/linux/virtio_net.h
CC /kernel/build64-default/tools/objtool/arch/x86/decode.o
HDRINST usr/include/linux/ioctl.h
HDRINST usr/include/linux/stddef.h
HDRINST usr/include/linux/limits.h
HDRINST usr/include/linux/ipmi_bmc.h
HDRINST usr/include/linux/netfilter_arp.h
HDRINST usr/include/linux/if_addr.h
HDRINST usr/include/linux/rpmsg.h
HDRINST usr/include/linux/media-bus-format.h
HDRINST usr/include/linux/kernelcapi.h
HDRINST usr/include/linux/ppp_defs.h
HDRINST usr/include/linux/ethtool.h
HDRINST usr/include/linux/aspeed-video.h
HDRINST usr/include/linux/hdlc.h
HDRINST usr/include/linux/fscrypt.h
HDRINST usr/include/linux/batadv_packet.h
HDRINST usr/include/linux/uuid.h
HDRINST usr/include/linux/capi.h
HDRINST usr/include/linux/mptcp.h
HDRINST usr/include/linux/hidraw.h
HDRINST usr/include/linux/virtio_console.h
HDRINST usr/include/linux/irqnr.h
HDRINST usr/include/linux/coresight-stm.h
HDRINST usr/include/linux/cxl_mem.h
HDRINST usr/include/linux/iso_fs.h
HDRINST usr/include/linux/virtio_blk.h
HDRINST usr/include/linux/udf_fs_i.h
HDRINST usr/include/linux/coff.h
HDRINST usr/include/linux/dma-buf.h
HDRINST usr/include/linux/ife.h
HDRINST usr/include/linux/agpgart.h
HDRINST usr/include/linux/socket.h
HDRINST usr/include/linux/nilfs2_ondisk.h
HDRINST usr/include/linux/connector.h
HDRINST usr/include/linux/auto_fs4.h
HDRINST usr/include/linux/bt-bmc.h
HDRINST usr/include/linux/map_to_7segment.h
HDRINST usr/include/linux/tc_act/tc_skbedit.h
HDRINST usr/include/linux/tc_act/tc_ctinfo.h
HDRINST usr/include/linux/tc_act/tc_defact.h
HDRINST usr/include/linux/tc_act/tc_gact.h
HDRINST usr/include/linux/tc_act/tc_vlan.h
HDRINST usr/include/linux/tc_act/tc_skbmod.h
HDRINST usr/include/linux/tc_act/tc_sample.h
HDRINST usr/include/linux/tc_act/tc_tunnel_key.h
HDRINST usr/include/linux/tc_act/tc_gate.h
HDRINST usr/include/linux/tc_act/tc_mirred.h
HDRINST usr/include/linux/tc_act/tc_nat.h
HDRINST usr/include/linux/tc_act/tc_csum.h
HDRINST usr/include/linux/tc_act/tc_connmark.h
HDRINST usr/include/linux/tc_act/tc_ife.h
HDRINST usr/include/linux/tc_act/tc_mpls.h
HDRINST usr/include/linux/tc_act/tc_ct.h
HDRINST usr/include/linux/tc_act/tc_pedit.h
HDRINST usr/include/linux/tc_act/tc_bpf.h
HDRINST usr/include/linux/tc_act/tc_ipt.h
HDRINST usr/include/linux/netrom.h
HDRINST usr/include/linux/joystick.h
HDRINST usr/include/linux/falloc.h
HDRINST usr/include/linux/cycx_cfm.h
HDRINST usr/include/linux/omapfb.h
HDRINST usr/include/linux/msdos_fs.h
HDRINST usr/include/linux/virtio_types.h
HDRINST usr/include/linux/mroute.h
HDRINST usr/include/linux/psample.h
HDRINST usr/include/linux/ipv6.h
HDRINST usr/include/linux/dw100.h
HDRINST usr/include/linux/psp-sev.h
HDRINST usr/include/linux/vfio.h
HDRINST usr/include/linux/if_ppp.h
HDRINST usr/include/linux/byteorder/big_endian.h
HDRINST usr/include/linux/byteorder/little_endian.h
HDRINST usr/include/linux/comedi.h
HDRINST usr/include/linux/scif_ioctl.h
HDRINST usr/include/linux/timerfd.h
HDRINST usr/include/linux/time_types.h
HDRINST usr/include/linux/firewire-constants.h
HDRINST usr/include/linux/virtio_snd.h
HDRINST usr/include/linux/ppp-ioctl.h
HDRINST usr/include/linux/fib_rules.h
HDRINST usr/include/linux/gen_stats.h
HDRINST usr/include/linux/virtio_iommu.h
HDRINST usr/include/linux/genetlink.h
HDRINST usr/include/linux/uvcvideo.h
HDRINST usr/include/linux/pfkeyv2.h
HDRINST usr/include/linux/soundcard.h
HDRINST usr/include/linux/times.h
HDRINST usr/include/linux/nfc.h
HDRINST usr/include/linux/affs_hardblocks.h
HDRINST usr/include/linux/nilfs2_api.h
HDRINST usr/include/linux/rseq.h
HDRINST usr/include/linux/caif/caif_socket.h
HDRINST usr/include/linux/caif/if_caif.h
HDRINST usr/include/linux/i2c-dev.h
HDRINST usr/include/linux/cuda.h
HDRINST usr/include/linux/mei_uuid.h
HDRINST usr/include/linux/cn_proc.h
HDRINST usr/include/linux/parport.h
HDRINST usr/include/linux/v4l2-controls.h
HDRINST usr/include/linux/hsi/cs-protocol.h
HDRINST usr/include/linux/hsi/hsi_char.h
HDRINST usr/include/linux/seg6_genl.h
HDRINST usr/include/linux/am437x-vpfe.h
HDRINST usr/include/linux/amt.h
HDRINST usr/include/linux/netconf.h
HDRINST usr/include/linux/erspan.h
HDRINST usr/include/linux/nsfs.h
HDRINST usr/include/linux/xilinx-v4l2-controls.h
HDRINST usr/include/linux/aspeed-p2a-ctrl.h
HDRINST usr/include/linux/vfio_zdev.h
HDRINST usr/include/linux/serio.h
HDRINST usr/include/linux/acrn.h
HDRINST usr/include/linux/nfs2.h
HDRINST usr/include/linux/virtio_pci.h
HDRINST usr/include/linux/ipc.h
HDRINST usr/include/linux/ethtool_netlink.h
HDRINST usr/include/linux/kd.h
HDRINST usr/include/linux/elf.h
HDRINST usr/include/linux/videodev2.h
HDRINST usr/include/linux/if_alg.h
HDRINST usr/include/linux/sonypi.h
HDRINST usr/include/linux/fsverity.h
HDRINST usr/include/linux/if.h
HDRINST usr/include/linux/btrfs.h
HDRINST usr/include/linux/vm_sockets_diag.h
HDRINST usr/include/linux/netfilter_bridge.h
HDRINST usr/include/linux/packet_diag.h
HDRINST usr/include/linux/netfilter_ipv4.h
HDRINST usr/include/linux/kvm.h
HDRINST usr/include/linux/pci.h
HDRINST usr/include/linux/if_addrlabel.h
HDRINST usr/include/linux/hdlcdrv.h
HDRINST usr/include/linux/cfm_bridge.h
HDRINST usr/include/linux/fiemap.h
HDRINST usr/include/linux/dm-ioctl.h
HDRINST usr/include/linux/aspeed-lpc-ctrl.h
HDRINST usr/include/linux/atmioc.h
HDRINST usr/include/linux/dlm.h
HDRINST usr/include/linux/pci_regs.h
HDRINST usr/include/linux/cachefiles.h
HDRINST usr/include/linux/membarrier.h
HDRINST usr/include/linux/nfs_idmap.h
HDRINST usr/include/linux/ip.h
HDRINST usr/include/linux/atm_he.h
HDRINST usr/include/linux/nfsd/export.h
HDRINST usr/include/linux/nfsd/stats.h
HDRINST usr/include/linux/nfsd/debug.h
HDRINST usr/include/linux/nfsd/cld.h
HDRINST usr/include/linux/ip_vs.h
HDRINST usr/include/linux/vmcore.h
HDRINST usr/include/linux/vbox_vmmdev_types.h
HDRINST usr/include/linux/dvb/osd.h
HDRINST usr/include/linux/dvb/dmx.h
HDRINST usr/include/linux/dvb/net.h
HDRINST usr/include/linux/dvb/frontend.h
HDRINST usr/include/linux/dvb/ca.h
HDRINST usr/include/linux/dvb/version.h
HDRINST usr/include/linux/dvb/video.h
HDRINST usr/include/linux/dvb/audio.h
HDRINST usr/include/linux/if_link.h
HDRINST usr/include/linux/nfs.h
HDRINST usr/include/linux/wait.h
HDRINST usr/include/linux/icmpv6.h
HDRINST usr/include/linux/media.h
HDRINST usr/include/linux/seg6_local.h
HDRINST usr/include/linux/tps6594_pfsm.h
HDRINST usr/include/linux/openvswitch.h
HDRINST usr/include/linux/atmsap.h
HDRINST usr/include/linux/bpfilter.h
HDRINST usr/include/linux/fpga-dfl.h
HDRINST usr/include/linux/userio.h
HDRINST usr/include/linux/signal.h
HDRINST usr/include/linux/map_to_14segment.h
HDRINST usr/include/linux/hdreg.h
HDRINST usr/include/linux/utime.h
HDRINST usr/include/linux/usbdevice_fs.h
HDRINST usr/include/linux/timex.h
HDRINST usr/include/linux/if_fc.h
HDRINST usr/include/linux/reiserfs_xattr.h
HDRINST usr/include/linux/hw_breakpoint.h
HDRINST usr/include/linux/quota.h
HDRINST usr/include/linux/ioprio.h
HDRINST usr/include/linux/eventpoll.h
HDRINST usr/include/linux/atmclip.h
HDRINST usr/include/linux/can.h
HDRINST usr/include/linux/if_team.h
HDRINST usr/include/linux/usbip.h
HDRINST usr/include/linux/stat.h
HDRINST usr/include/linux/fou.h
HDRINST usr/include/linux/hash_info.h
HDRINST usr/include/linux/ppp-comp.h
HDRINST usr/include/linux/ip6_tunnel.h
HDRINST usr/include/linux/tipc_netlink.h
HDRINST usr/include/linux/in.h
HDRINST usr/include/linux/wireguard.h
HDRINST usr/include/linux/btf.h
HDRINST usr/include/linux/batman_adv.h
HDRINST usr/include/linux/if_ltalk.h
HDRINST usr/include/linux/fcntl.h
HDRINST usr/include/linux/i2c.h
HDRINST usr/include/linux/atm_idt77105.h
HDRINST usr/include/linux/kexec.h
HDRINST usr/include/linux/arm_sdei.h
HDRINST usr/include/linux/netfilter_ipv6/ip6_tables.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_ah.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_NPT.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_rt.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_REJECT.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_opts.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_srh.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_LOG.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_mh.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_HL.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_hl.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_frag.h
HDRINST usr/include/linux/netfilter_ipv6/ip6t_ipv6header.h
HDRINST usr/include/linux/minix_fs.h
HDRINST usr/include/linux/aio_abi.h
HDRINST usr/include/linux/pktcdvd.h
HDRINST usr/include/linux/libc-compat.h
HDRINST usr/include/linux/atmlec.h
HDRINST usr/include/linux/signalfd.h
HDRINST usr/include/linux/bpf_common.h
HDRINST usr/include/linux/seg6_iptunnel.h
HDRINST usr/include/linux/synclink.h
HDRINST usr/include/linux/mpls_iptunnel.h
HDRINST usr/include/linux/mctp.h
HDRINST usr/include/linux/if_xdp.h
HDRINST usr/include/linux/llc.h
HDRINST usr/include/linux/atmsvc.h
HDRINST usr/include/linux/sed-opal.h
HDRINST usr/include/linux/sock_diag.h
HDRINST usr/include/linux/time.h
HDRINST usr/include/linux/securebits.h
HDRINST usr/include/linux/fsl_hypervisor.h
HDRINST usr/include/linux/if_hippi.h
HDRINST usr/include/linux/seccomp.h
HDRINST usr/include/linux/oom.h
HDRINST usr/include/linux/filter.h
HDRINST usr/include/linux/inotify.h
HDRINST usr/include/linux/rfkill.h
HDRINST usr/include/linux/reboot.h
HDRINST usr/include/linux/can/vxcan.h
HDRINST usr/include/linux/can/j1939.h
HDRINST usr/include/linux/can/netlink.h
HDRINST usr/include/linux/can/bcm.h
HDRINST usr/include/linux/can/raw.h
HDRINST usr/include/linux/can/gw.h
HDRINST usr/include/linux/can/error.h
HDRINST usr/include/linux/can/isotp.h
HDRINST usr/include/linux/if_eql.h
HDRINST usr/include/linux/psp-dbc.h
HDRINST usr/include/linux/hiddev.h
HDRINST usr/include/linux/blktrace_api.h
HDRINST usr/include/linux/ccs.h
HDRINST usr/include/linux/ioam6.h
HDRINST usr/include/linux/hsr_netlink.h
HDRINST usr/include/linux/mmc/ioctl.h
HDRINST usr/include/linux/bfs_fs.h
HDRINST usr/include/linux/rio_cm_cdev.h
HDRINST usr/include/linux/uleds.h
HDRINST usr/include/linux/mrp_bridge.h
HDRINST usr/include/linux/adb.h
HDRINST usr/include/linux/pmu.h
HDRINST usr/include/linux/udmabuf.h
HDRINST usr/include/linux/kcmp.h
HDRINST usr/include/linux/dma-heap.h
HDRINST usr/include/linux/userfaultfd.h
HDRINST usr/include/linux/netfilter_arp/arpt_mangle.h
HDRINST usr/include/linux/netfilter_arp/arp_tables.h
HDRINST usr/include/linux/tipc.h
HDRINST usr/include/linux/virtio_ids.h
HDRINST usr/include/linux/l2tp.h
HDRINST usr/include/linux/devlink.h
HDRINST usr/include/linux/virtio_gpio.h
HDRINST usr/include/linux/dcbnl.h
HDRINST usr/include/linux/cyclades.h
HDRINST usr/include/sound/intel/avs/tokens.h
HDRINST usr/include/sound/sof/fw.h
HDRINST usr/include/sound/sof/abi.h
HDRINST usr/include/sound/sof/tokens.h
HDRINST usr/include/sound/sof/header.h
HDRINST usr/include/sound/usb_stream.h
HDRINST usr/include/sound/sfnt_info.h
HDRINST usr/include/sound/asequencer.h
HDRINST usr/include/sound/tlv.h
HDRINST usr/include/sound/asound.h
HDRINST usr/include/sound/asoc.h
HDRINST usr/include/sound/sb16_csp.h
HDRINST usr/include/sound/compress_offload.h
HDRINST usr/include/sound/hdsp.h
HDRINST usr/include/sound/emu10k1.h
HDRINST usr/include/sound/snd_ar_tokens.h
HDRINST usr/include/sound/snd_sst_tokens.h
HDRINST usr/include/sound/asound_fm.h
HDRINST usr/include/sound/hdspm.h
HDRINST usr/include/sound/compress_params.h
HDRINST usr/include/sound/firewire.h
HDRINST usr/include/sound/skl-tplg-interface.h
HDRINST usr/include/scsi/scsi_bsg_ufs.h
HDRINST usr/include/scsi/scsi_netlink_fc.h
HDRINST usr/include/scsi/scsi_bsg_mpi3mr.h
HDRINST usr/include/scsi/fc/fc_ns.h
HDRINST usr/include/scsi/fc/fc_fs.h
HDRINST usr/include/scsi/fc/fc_els.h
HDRINST usr/include/scsi/fc/fc_gs.h
HDRINST usr/include/scsi/scsi_bsg_fc.h
HDRINST usr/include/scsi/cxlflash_ioctl.h
HDRINST usr/include/scsi/scsi_netlink.h
HDRINST usr/include/linux/version.h
HDRINST usr/include/asm/processor-flags.h
HDRINST usr/include/asm/auxvec.h
HDRINST usr/include/asm/svm.h
HDRINST usr/include/asm/bitsperlong.h
HDRINST usr/include/asm/kvm_perf.h
HDRINST usr/include/asm/mce.h
HDRINST usr/include/asm/posix_types.h
HDRINST usr/include/asm/msr.h
HDRINST usr/include/asm/sigcontext32.h
HDRINST usr/include/asm/mman.h
HDRINST usr/include/asm/shmbuf.h
HDRINST usr/include/asm/e820.h
HDRINST usr/include/asm/posix_types_64.h
HDRINST usr/include/asm/vsyscall.h
HDRINST usr/include/asm/msgbuf.h
HDRINST usr/include/asm/swab.h
HDRINST usr/include/asm/statfs.h
HDRINST usr/include/asm/posix_types_x32.h
HDRINST usr/include/asm/ptrace.h
HDRINST usr/include/asm/unistd.h
HDRINST usr/include/asm/ist.h
HDRINST usr/include/asm/prctl.h
HDRINST usr/include/asm/boot.h
HDRINST usr/include/asm/sigcontext.h
HDRINST usr/include/asm/posix_types_32.h
HDRINST usr/include/asm/kvm_para.h
HDRINST usr/include/asm/a.out.h
HDRINST usr/include/asm/mtrr.h
HDRINST usr/include/asm/amd_hsmp.h
HDRINST usr/include/asm/hwcap2.h
HDRINST usr/include/asm/ptrace-abi.h
HDRINST usr/include/asm/vm86.h
HDRINST usr/include/asm/vmx.h
HDRINST usr/include/asm/ldt.h
HDRINST usr/include/asm/perf_regs.h
HDRINST usr/include/asm/kvm.h
HDRINST usr/include/asm/debugreg.h
HDRINST usr/include/asm/signal.h
HDRINST usr/include/asm/bootparam.h
HDRINST usr/include/asm/siginfo.h
HDRINST usr/include/asm/hw_breakpoint.h
HDRINST usr/include/asm/stat.h
HDRINST usr/include/asm/setup.h
HDRINST usr/include/asm/sembuf.h
HDRINST usr/include/asm/sgx.h
HDRINST usr/include/asm/ucontext.h
HDRINST usr/include/asm/byteorder.h
HDRINST usr/include/asm/unistd_64.h
HDRINST usr/include/asm/ioctls.h
HDRINST usr/include/asm/types.h
HDRINST usr/include/asm/bpf_perf_event.h
HDRINST usr/include/asm/poll.h
HDRINST usr/include/asm/resource.h
HDRINST usr/include/asm/param.h
HDRINST usr/include/asm/sockios.h
HDRINST usr/include/asm/errno.h
HDRINST usr/include/asm/unistd_x32.h
HDRINST usr/include/asm/termios.h
HDRINST usr/include/asm/ioctl.h
HDRINST usr/include/asm/socket.h
HDRINST usr/include/asm/unistd_32.h
HDRINST usr/include/asm/termbits.h
HDRINST usr/include/asm/fcntl.h
HDRINST usr/include/asm/ipcbuf.h
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 ../include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 ../include/linux/atomic/atomic-instrumented.h
CHKSHA1 ../include/linux/atomic/atomic-long.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
LD /kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
UPD include/generated/asm-offsets.h
CALL ../scripts/checksyscalls.sh
LD /kernel/build64-default/tools/objtool/objtool-in.o
LINK /kernel/build64-default/tools/objtool/objtool
LDS scripts/module.lds
HOSTCC usr/gen_init_cpio
CC security/commoncap.o
AR certs/built-in.a
CC security/min_addr.o
CC init/main.o
CC security/inode.o
CC block/bdev.o
CC io_uring/io_uring.o
CC ipc/compat.o
AS arch/x86/lib/clear_page_64.o
CC security/device_cgroup.o
AR arch/x86/video/built-in.a
CC io_uring/xattr.o
CC arch/x86/lib/cmdline.o
UPD init/utsversion-tmp.h
CC block/fops.o
CC init/do_mounts.o
CC arch/x86/power/cpu.o
AS arch/x86/lib/cmpxchg16b_emu.o
CC ipc/util.o
CC arch/x86/pci/i386.o
CC io_uring/nop.o
AR virt/lib/built-in.a
AR drivers/cache/built-in.a
CC [M] arch/x86/video/fbdev.o
CC security/keys/gc.o
CC block/partitions/core.o
CC net/llc/llc_core.o
AR drivers/irqchip/built-in.a
CC arch/x86/realmode/init.o
CC net/ethernet/eth.o
CC fs/nfs_common/grace.o
CC net/core/sock.o
CC net/802/p8022.o
AS arch/x86/crypto/aesni-intel_asm.o
AR sound/i2c/other/built-in.a
CC [M] virt/lib/irqbypass.o
AR sound/ppc/built-in.a
CC arch/x86/events/amd/core.o
AR sound/isa/ad1816a/built-in.a
CC arch/x86/entry/vsyscall/vsyscall_64.o
CC fs/notify/dnotify/dnotify.o
CC arch/x86/kernel/fpu/init.o
AR sound/drivers/opl3/built-in.a
AR sound/pci/ac97/built-in.a
AR sound/drivers/opl4/built-in.a
CC sound/core/seq/seq.o
CC arch/x86/mm/pat/set_memory.o
AR sound/drivers/mpu401/built-in.a
AR sound/i2c/built-in.a
CC sound/core/seq/seq_lock.o
CC arch/x86/kernel/fpu/bugs.o
AR drivers/bus/mhi/built-in.a
AR sound/isa/ad1848/built-in.a
CC arch/x86/kernel/fpu/core.o
CC net/llc/llc_input.o
AR sound/pci/ali5451/built-in.a
CC lib/kunit/hooks.o
AR drivers/bus/built-in.a
CC arch/x86/entry/vdso/vma.o
AR sound/drivers/vx/built-in.a
AR sound/isa/es1688/built-in.a
CC mm/kasan/common.o
CC kernel/sched/core.o
CC arch/x86/crypto/aesni-intel_glue.o
AR sound/drivers/pcsp/built-in.a
AR sound/pci/asihpi/built-in.a
AR sound/isa/cs423x/built-in.a
CC net/core/request_sock.o
AR sound/drivers/built-in.a
AR drivers/phy/allwinner/built-in.a
AR sound/pci/au88x0/built-in.a
AR sound/isa/galaxy/built-in.a
CC crypto/api.o
AR drivers/phy/amlogic/built-in.a
CC crypto/cipher.o
AR sound/pci/aw2/built-in.a
AR sound/isa/gus/built-in.a
AR drivers/phy/broadcom/built-in.a
AR sound/pci/ctxfi/built-in.a
CC arch/x86/lib/copy_mc.o
AR sound/isa/msnd/built-in.a
AR sound/pci/ca0106/built-in.a
AR drivers/phy/cadence/built-in.a
AR sound/isa/opti9xx/built-in.a
AR sound/pci/cs46xx/built-in.a
AR drivers/phy/freescale/built-in.a
AR sound/isa/sb/built-in.a
AR drivers/phy/hisilicon/built-in.a
AR sound/pci/cs5535audio/built-in.a
AR sound/isa/wavefront/built-in.a
AS arch/x86/entry/entry.o
AR sound/isa/wss/built-in.a
AR drivers/phy/ingenic/built-in.a
AR sound/pci/lola/built-in.a
AR sound/isa/built-in.a
AR drivers/phy/intel/built-in.a
AR sound/pci/lx6464es/built-in.a
CC security/keys/key.o
AR drivers/phy/lantiq/built-in.a
AR sound/pci/echoaudio/built-in.a
CC arch/x86/entry/vdso/extable.o
AR drivers/phy/marvell/built-in.a
AR sound/pci/emu10k1/built-in.a
AR drivers/phy/mediatek/built-in.a
GEN usr/initramfs_data.cpio
AR sound/pci/hda/built-in.a
AR drivers/phy/microchip/built-in.a
COPY usr/initramfs_inc_data
CC [M] sound/pci/hda/hda_bind.o
AS usr/initramfs_data.o
AR drivers/phy/motorola/built-in.a
CC [M] lib/kunit/test.o
AR usr/built-in.a
AR drivers/phy/mscc/built-in.a
AR sound/pci/ice1712/built-in.a
AR drivers/phy/qualcomm/built-in.a
CC net/802/psnap.o
AR drivers/phy/ralink/built-in.a
AR drivers/phy/realtek/built-in.a
AR drivers/phy/renesas/built-in.a
AR drivers/phy/rockchip/built-in.a
CC mm/filemap.o
AR drivers/phy/samsung/built-in.a
AR drivers/phy/socionext/built-in.a
CC fs/notify/inotify/inotify_fsnotify.o
AR drivers/phy/st/built-in.a
AR drivers/phy/starfive/built-in.a
AS arch/x86/lib/copy_mc_64.o
AR drivers/phy/sunplus/built-in.a
AR virt/built-in.a
AR drivers/phy/tegra/built-in.a
AS arch/x86/lib/copy_page_64.o
CC fs/notify/inotify/inotify_user.o
AR drivers/phy/ti/built-in.a
CC drivers/phy/phy-core.o
AS arch/x86/lib/copy_user_64.o
AR drivers/phy/xilinx/built-in.a
AS arch/x86/lib/copy_user_uncached_64.o
CC fs/notify/fanotify/fanotify.o
CC arch/x86/lib/cpu.o
CC sound/core/seq/seq_clientmgr.o
AS arch/x86/realmode/rm/header.o
CC mm/mempool.o
AS arch/x86/realmode/rm/trampoline_64.o
CC fs/notify/fanotify/fanotify_user.o
CC fs/notify/fsnotify.o
CC arch/x86/kernel/fpu/regset.o
AS arch/x86/realmode/rm/stack.o
AR fs/notify/dnotify/built-in.a
CC arch/x86/power/hibernate_64.o
AS arch/x86/realmode/rm/reboot.o
CC io_uring/fs.o
CC arch/x86/pci/init.o
CC io_uring/splice.o
AS arch/x86/realmode/rm/wakeup_asm.o
AR fs/nfs_common/built-in.a
CC arch/x86/realmode/rm/wakemain.o
AS arch/x86/power/hibernate_asm_64.o
CC io_uring/sync.o
CC net/802/stp.o
CC arch/x86/entry/vdso/vdso32-setup.o
CC arch/x86/realmode/rm/video-mode.o
AS arch/x86/entry/vsyscall/vsyscall_emu_64.o
CC ipc/msgutil.o
CC net/llc/llc_output.o
AR arch/x86/entry/vsyscall/built-in.a
CC ipc/msg.o
CC fs/notify/notification.o
CC net/core/skbuff.o
CC fs/notify/group.o
CC mm/kasan/report.o
CC block/partitions/ldm.o
AS arch/x86/realmode/rm/copy.o
CC arch/x86/lib/delay.o
AS arch/x86/realmode/rm/bioscall.o
CC crypto/compress.o
CC arch/x86/realmode/rm/regs.o
CC ipc/sem.o
CC arch/x86/kernel/cpu/mce/core.o
CC [M] lib/kunit/resource.o
CC arch/x86/realmode/rm/video-vga.o
LDS arch/x86/entry/vdso/vdso.lds
CC arch/x86/kernel/cpu/mtrr/mtrr.o
CC [M] sound/pci/hda/hda_codec.o
CC arch/x86/kernel/cpu/mtrr/if.o
AS arch/x86/entry/vdso/vdso-note.o
AS arch/x86/crypto/aesni-intel_avx-x86_64.o
CC arch/x86/events/amd/lbr.o
CC arch/x86/entry/vdso/vclock_gettime.o
CC arch/x86/realmode/rm/video-vesa.o
CC security/keys/keyring.o
CC [M] sound/pci/hda/hda_jack.o
CC arch/x86/kernel/cpu/microcode/core.o
CC arch/x86/realmode/rm/video-bios.o
CC [M] sound/pci/hda/hda_auto_parser.o
CC ipc/shm.o
CC init/do_mounts_initrd.o
AR net/ethernet/built-in.a
AS arch/x86/lib/getuser.o
CC arch/x86/kernel/cpu/cacheinfo.o
PASYMS arch/x86/realmode/rm/pasyms.h
GEN arch/x86/lib/inat-tables.c
LDS arch/x86/realmode/rm/realmode.lds
LD arch/x86/realmode/rm/realmode.elf
RELOCS arch/x86/realmode/rm/realmode.relocs
OBJCOPY arch/x86/realmode/rm/realmode.bin
AS arch/x86/realmode/rmpiggy.o
CC arch/x86/lib/insn-eval.o
AR arch/x86/realmode/built-in.a
CC lib/math/div64.o
AS arch/x86/crypto/aes_ctrby8_avx-x86_64.o
CC arch/x86/pci/mmconfig_64.o
CC arch/x86/kernel/cpu/mce/severity.o
CC lib/math/gcd.o
AS [M] arch/x86/crypto/ghash-clmulni-intel_asm.o
CC arch/x86/power/hibernate.o
CC arch/x86/kernel/fpu/signal.o
CC [M] arch/x86/crypto/ghash-clmulni-intel_glue.o
CC block/bio.o
CC lib/math/lcm.o
AR drivers/pinctrl/actions/built-in.a
CC mm/oom_kill.o
AR drivers/pinctrl/bcm/built-in.a
AR fs/notify/inotify/built-in.a
AR drivers/pinctrl/cirrus/built-in.a
CC fs/notify/mark.o
AR drivers/pinctrl/freescale/built-in.a
CC arch/x86/pci/direct.o
CC crypto/algapi.o
AR drivers/phy/built-in.a
CC arch/x86/pci/mmconfig-shared.o
AR sound/pci/korg1212/built-in.a
CC lib/math/int_log.o
CC kernel/sched/fair.o
CC drivers/pinctrl/intel/pinctrl-baytrail.o
CC kernel/sched/build_policy.o
AR sound/pci/mixart/built-in.a
CC [M] lib/kunit/static_stub.o
CC lib/math/int_pow.o
CC arch/x86/entry/vdso/vgetcpu.o
AR sound/pci/nm256/built-in.a
AR net/802/built-in.a
HOSTCC arch/x86/entry/vdso/vdso2c
CC drivers/pinctrl/intel/pinctrl-intel.o
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
CC lib/math/int_sqrt.o
AR sound/pci/oxygen/built-in.a
CC [M] drivers/pinctrl/intel/pinctrl-cherryview.o
AR net/llc/built-in.a
CC mm/kasan/init.o
CC arch/x86/kernel/acpi/boot.o
CC arch/x86/mm/pat/memtype.o
CC drivers/gpio/gpiolib.o
CC arch/x86/mm/pat/memtype_interval.o
CC lib/math/reciprocal_div.o
CC [M] sound/pci/hda/hda_sysfs.o
CC lib/math/rational.o
CC drivers/gpio/gpiolib-devres.o
CC arch/x86/kernel/cpu/mtrr/generic.o
CC arch/x86/events/amd/ibs.o
CC arch/x86/kernel/cpu/microcode/intel.o
CC init/initramfs.o
AS arch/x86/entry/vdso/vdso32/note.o
AS arch/x86/entry/vdso/vdso32/system_call.o
CC sound/core/seq/seq_memory.o
AS [M] arch/x86/crypto/crc32-pclmul_asm.o
AS arch/x86/entry/vdso/vdso32/sigreturn.o
CC [M] arch/x86/crypto/crc32-pclmul_glue.o
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
CC [M] lib/kunit/string-stream.o
CC block/partitions/msdos.o
AR fs/notify/fanotify/built-in.a
CC block/partitions/efi.o
CC arch/x86/pci/fixup.o
CC arch/x86/kernel/cpu/mtrr/cleanup.o
CC [M] lib/math/prime_numbers.o
CC ipc/syscall.o
AR arch/x86/power/built-in.a
CC io_uring/advise.o
CC arch/x86/pci/acpi.o
CC [M] sound/pci/hda/hda_controller.o
CC arch/x86/lib/insn.o
CC [M] sound/pci/hda/hda_proc.o
CC arch/x86/kernel/apic/apic.o
CC arch/x86/kernel/fpu/xstate.o
CC [M] drivers/pinctrl/intel/pinctrl-broxton.o
CC drivers/gpio/gpiolib-legacy.o
CC security/keys/keyctl.o
CC arch/x86/pci/legacy.o
CC [M] sound/pci/hda/hda_hwdep.o
CC fs/notify/fdinfo.o
AR arch/x86/mm/pat/built-in.a
AS [M] arch/x86/crypto/crct10dif-pcl-asm_64.o
CC arch/x86/mm/init.o
CC arch/x86/pci/irq.o
CC [M] arch/x86/crypto/crct10dif-pclmul_glue.o
CC [M] lib/kunit/assert.o
AS arch/x86/lib/memcpy_64.o
AS arch/x86/lib/memmove_64.o
CC mm/kasan/generic.o
AS arch/x86/lib/memset_64.o
CC arch/x86/kernel/cpu/mce/genpool.o
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
CC arch/x86/lib/misc.o
CC arch/x86/lib/pc-conf-reg.o
CC crypto/scatterwalk.o
AR lib/math/built-in.a
CC mm/kasan/report_generic.o
CC lib/crypto/memneq.o
CC arch/x86/kernel/acpi/sleep.o
CC arch/x86/kernel/cpu/microcode/amd.o
CC [M] lib/kunit/try-catch.o
VDSO arch/x86/entry/vdso/vdso64.so.dbg
CC [M] drivers/pinctrl/intel/pinctrl-geminilake.o
CC sound/core/seq/seq_queue.o
CC init/calibrate.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
CC lib/crypto/utils.o
CC lib/crypto/chacha.o
OBJCOPY arch/x86/entry/vdso/vdso64.so
OBJCOPY arch/x86/entry/vdso/vdso32.so
VDSO2C arch/x86/entry/vdso/vdso-image-64.c
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
CC arch/x86/entry/vdso/vdso-image-64.o
AS arch/x86/kernel/acpi/wakeup_64.o
CC [M] drivers/pinctrl/intel/pinctrl-sunrisepoint.o
AS arch/x86/lib/putuser.o
CC io_uring/filetable.o
AS arch/x86/lib/retpoline.o
CC arch/x86/lib/usercopy.o
CC arch/x86/kernel/acpi/apei.o
CC arch/x86/kernel/acpi/cppc.o
AR block/partitions/built-in.a
CC arch/x86/kernel/acpi/cstate.o
CC arch/x86/lib/usercopy_64.o
CC arch/x86/events/amd/uncore.o
CC ipc/ipc_sysctl.o
AR sound/pci/pcxhr/built-in.a
LD [M] arch/x86/crypto/ghash-clmulni-intel.o
CC arch/x86/pci/common.o
LD [M] arch/x86/crypto/crc32-pclmul.o
LD [M] arch/x86/crypto/crct10dif-pclmul.o
AR arch/x86/crypto/built-in.a
AR sound/pci/riptide/built-in.a
CC arch/x86/pci/early.o
AR sound/pci/rme9652/built-in.a
AR drivers/pwm/built-in.a
CC arch/x86/entry/vdso/vdso-image-32.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
CC crypto/proc.o
AR sound/pci/trident/built-in.a
CC sound/core/seq/seq_fifo.o
AR fs/notify/built-in.a
CC arch/x86/mm/init_64.o
CC mm/fadvise.o
AS arch/x86/entry/entry_64.o
CC fs/iomap/trace.o
CC init/init_task.o
CC [M] lib/kunit/executor.o
CC block/elevator.o
CC fs/iomap/iter.o
CC lib/crypto/aes.o
CC kernel/locking/mutex.o
CC kernel/locking/semaphore.o
CC kernel/power/qos.o
CC arch/x86/kernel/cpu/mce/intel.o
CC kernel/power/main.o
CC mm/maccess.o
AR arch/x86/entry/vdso/built-in.a
CC arch/x86/entry/syscall_64.o
CC [M] lib/kunit/attributes.o
AR drivers/pinctrl/intel/built-in.a
CC arch/x86/entry/common.o
AR drivers/pinctrl/mediatek/built-in.a
AR drivers/pinctrl/mvebu/built-in.a
AR drivers/pinctrl/nomadik/built-in.a
AR drivers/pinctrl/nuvoton/built-in.a
CC drivers/pci/msi/pcidev_msi.o
AR drivers/pinctrl/nxp/built-in.a
CC drivers/pci/msi/api.o
CC arch/x86/lib/msr-smp.o
AR drivers/pinctrl/qcom/built-in.a
CC crypto/aead.o
CC fs/iomap/buffered-io.o
CC drivers/pci/pcie/portdrv.o
CC mm/kasan/shadow.o
AR drivers/pinctrl/sprd/built-in.a
AR arch/x86/kernel/fpu/built-in.a
AR drivers/pinctrl/sunplus/built-in.a
AR arch/x86/kernel/acpi/built-in.a
CC arch/x86/mm/fault.o
CC ipc/mqueue.o
AR drivers/pinctrl/ti/built-in.a
CC ipc/namespace.o
CC drivers/pinctrl/core.o
CC [M] sound/pci/hda/hda_generic.o
CC security/keys/permission.o
CC drivers/pci/hotplug/pci_hotplug_core.o
AR arch/x86/kernel/cpu/microcode/built-in.a
AR drivers/pci/controller/dwc/built-in.a
AR drivers/pci/switch/built-in.a
AR drivers/pci/controller/mobiveil/built-in.a
CC drivers/pci/controller/vmd.o
CC arch/x86/kernel/apic/apic_common.o
CC arch/x86/kernel/cpu/scattered.o
CC mm/page-writeback.o
CC security/keys/process_keys.o
CC sound/core/seq/seq_prioq.o
CC arch/x86/lib/cache-smp.o
CC ipc/mq_sysctl.o
CC arch/x86/pci/bus_numa.o
CC init/version.o
CC arch/x86/kernel/cpu/mce/threshold.o
CC lib/crypto/gf128mul.o
CC mm/folio-compat.o
CC lib/crypto/blake2s.o
AR arch/x86/events/amd/built-in.a
CC sound/core/seq/seq_timer.o
CC arch/x86/pci/amd_bus.o
CC arch/x86/events/intel/core.o
CC drivers/pci/access.o
AR lib/kunit/built-in.a
CC arch/x86/lib/msr.o
LD [M] lib/kunit/kunit.o
CC security/keys/request_key.o
AS arch/x86/entry/thunk_64.o
CC security/keys/request_key_auth.o
CC net/core/datagram.o
CC fs/iomap/direct-io.o
AR init/built-in.a
AS arch/x86/entry/entry_64_compat.o
AS arch/x86/lib/msr-reg.o
CC drivers/pci/msi/msi.o
CC arch/x86/entry/syscall_32.o
CC drivers/pci/bus.o
CC arch/x86/kernel/apic/apic_noop.o
CC arch/x86/events/intel/bts.o
CC mm/kasan/quarantine.o
CC arch/x86/lib/msr-reg-export.o
CC security/keys/user_defined.o
CC fs/iomap/fiemap.o
CC kernel/power/console.o
CC drivers/pci/probe.o
CC mm/readahead.o
CC crypto/geniv.o
CC fs/iomap/seek.o
CC block/blk-core.o
CC mm/swap.o
AR arch/x86/ia32/built-in.a
CC drivers/pci/pcie/rcec.o
CC drivers/pci/hotplug/acpi_pcihp.o
CC drivers/gpio/gpiolib-cdev.o
AR sound/pci/ymfpci/built-in.a
AR sound/pci/vx222/built-in.a
CC fs/iomap/swapfile.o
CC net/core/stream.o
CC lib/crypto/blake2s-generic.o
CC lib/crypto/blake2s-selftest.o
CC arch/x86/kernel/apic/ipi.o
AR arch/x86/pci/built-in.a
CC arch/x86/kernel/apic/vector.o
CC security/keys/compat.o
CC arch/x86/kernel/cpu/mce/apei.o
CC security/keys/proc.o
CC sound/core/seq/seq_system.o
AR drivers/pci/controller/built-in.a
CC drivers/pci/host-bridge.o
CC mm/truncate.o
CC io_uring/openclose.o
AR arch/x86/entry/built-in.a
AS arch/x86/lib/hweight.o
CC net/core/scm.o
CC arch/x86/mm/ioremap.o
CC arch/x86/lib/iomem.o
CC arch/x86/mm/mmap.o
CC arch/x86/mm/extable.o
CC drivers/gpio/gpiolib-sysfs.o
CC crypto/skcipher.o
CC drivers/pinctrl/pinctrl-utils.o
CC arch/x86/kernel/kprobes/core.o
CC sound/core/seq/seq_ports.o
CC lib/crypto/des.o
CC kernel/power/process.o
AR mm/kasan/built-in.a
CC sound/core/seq/seq_info.o
CC arch/x86/mm/pgtable.o
CC drivers/pci/remove.o
CC drivers/pci/pcie/aspm.o
CC drivers/pci/hotplug/pciehp_core.o
LDS arch/x86/kernel/vmlinux.lds
CC io_uring/uring_cmd.o
CC drivers/pci/msi/irqdomain.o
AS arch/x86/kernel/head_64.o
CC arch/x86/kernel/head64.o
CC block/blk-sysfs.o
CC kernel/locking/rwsem.o
CC drivers/idle/intel_idle.o
CC drivers/video/console/dummycon.o
AS arch/x86/lib/iomap_copy_64.o
CC arch/x86/lib/inat.o
CC drivers/video/logo/logo.o
AR ipc/built-in.a
CC drivers/video/console/vgacon.o
CC drivers/video/backlight/backlight.o
AR arch/x86/kernel/cpu/mce/built-in.a
CC arch/x86/kernel/cpu/topology.o
AR arch/x86/lib/built-in.a
AR arch/x86/lib/lib.a
CC arch/x86/events/intel/ds.o
CC drivers/pinctrl/pinmux.o
CC arch/x86/events/intel/knc.o
CC security/keys/sysctl.o
CC kernel/power/suspend.o
CC arch/x86/kernel/ebda.o
CC mm/vmscan.o
CC block/blk-flush.o
AR fs/iomap/built-in.a
AR fs/quota/built-in.a
AR drivers/char/ipmi/built-in.a
CC fs/kernfs/mount.o
CC net/core/gen_stats.o
CC drivers/acpi/acpica/dsargs.o
CC fs/proc/task_mmu.o
CC drivers/acpi/numa/srat.o
CC drivers/pnp/pnpacpi/core.o
HOSTCC drivers/video/logo/pnmtologo
AR sound/core/seq/built-in.a
CC sound/core/sound.o
CC drivers/pci/hotplug/pciehp_ctrl.o
CC drivers/pnp/pnpacpi/rsparser.o
CC arch/x86/kernel/cpu/common.o
CC net/core/gen_estimator.o
CC sound/core/init.o
CC kernel/locking/percpu-rwsem.o
CC mm/shmem.o
CC mm/util.o
CC arch/x86/kernel/kprobes/opt.o
AR drivers/pci/msi/built-in.a
CC fs/sysfs/file.o
CC net/core/net_namespace.o
CC kernel/power/hibernate.o
LOGO drivers/video/logo/logo_linux_clut224.c
CC arch/x86/mm/physaddr.o
CC drivers/video/logo/logo_linux_clut224.o
CC crypto/seqiv.o
AR security/keys/built-in.a
AR security/built-in.a
CC lib/crypto/sha1.o
AR drivers/video/logo/built-in.a
CC fs/sysfs/dir.o
AR drivers/amba/built-in.a
CC arch/x86/mm/tlb.o
CC arch/x86/mm/cpu_entry_area.o
CC drivers/video/fbdev/core/fb_notify.o
CC drivers/gpio/gpiolib-acpi.o
CC io_uring/epoll.o
CC drivers/acpi/acpica/dscontrol.o
CC block/blk-settings.o
CC fs/sysfs/symlink.o
CC drivers/pci/pcie/aer.o
CC drivers/pinctrl/pinconf.o
AR drivers/clk/actions/built-in.a
AR drivers/clk/analogbits/built-in.a
AR drivers/video/backlight/built-in.a
CC block/blk-ioc.o
CC net/core/secure_seq.o
AR drivers/clk/bcm/built-in.a
CC fs/kernfs/inode.o
AR drivers/clk/imgtec/built-in.a
AR drivers/clk/imx/built-in.a
CC arch/x86/kernel/apic/init.o
CC mm/mmzone.o
AR drivers/clk/ingenic/built-in.a
AR drivers/idle/built-in.a
AR drivers/clk/mediatek/built-in.a
CC mm/vmstat.o
AR drivers/clk/microchip/built-in.a
CC mm/backing-dev.o
AR drivers/clk/mstar/built-in.a
CC drivers/pci/hotplug/pciehp_pci.o
AR drivers/video/console/built-in.a
AR drivers/clk/mvebu/built-in.a
CC sound/core/memory.o
AR drivers/clk/ralink/built-in.a
AR drivers/clk/renesas/built-in.a
AR drivers/clk/socfpga/built-in.a
CC lib/crypto/sha256.o
AR drivers/clk/sprd/built-in.a
AR drivers/clk/starfive/built-in.a
AR drivers/acpi/numa/built-in.a
AR drivers/clk/sunxi-ng/built-in.a
CC drivers/video/aperture.o
AR sound/arm/built-in.a
AR drivers/clk/versatile/built-in.a
AR drivers/clk/ti/built-in.a
CC net/core/flow_dissector.o
CC drivers/pci/pci.o
CC kernel/power/snapshot.o
CC drivers/clk/x86/clk-lpss-atom.o
CC net/core/sysctl_net_core.o
CC kernel/locking/irqflag-debug.o
CC drivers/acpi/acpica/dsdebug.o
CC drivers/clk/x86/clk-pmc-atom.o
CC arch/x86/kernel/apic/hw_nmi.o
CC crypto/echainiv.o
CC fs/configfs/inode.o
CC kernel/locking/mutex-debug.o
CC fs/configfs/file.o
CC fs/sysfs/mount.o
CC drivers/pci/hotplug/pciehp_hpc.o
CC arch/x86/kernel/kprobes/ftrace.o
AR drivers/pnp/pnpacpi/built-in.a
CC fs/devpts/inode.o
CC drivers/pnp/core.o
CC kernel/sched/build_utility.o
CC block/blk-map.o
CC fs/configfs/dir.o
CC [M] drivers/video/fbdev/core/fb_info.o
AR sound/sh/built-in.a
CC io_uring/statx.o
CC drivers/pinctrl/pinconf-generic.o
CC sound/core/control.o
CC drivers/dma/dw/core.o
CC drivers/dma/hsu/hsu.o
CC mm/mm_init.o
CC drivers/pci/pcie/err.o
CC drivers/acpi/acpica/dsfield.o
CC block/blk-merge.o
CC fs/kernfs/dir.o
CC arch/x86/events/intel/lbr.o
CC arch/x86/mm/maccess.o
AR drivers/dma/idxd/built-in.a
CC drivers/acpi/acpica/dsinit.o
AR sound/synth/emux/built-in.a
CC lib/zlib_inflate/inffast.o
AR sound/synth/built-in.a
CC [M] lib/crypto/arc4.o
CC fs/kernfs/file.o
CC lib/zlib_inflate/inflate.o
CC drivers/gpio/gpiolib-swnode.o
CC arch/x86/kernel/apic/io_apic.o
AR drivers/clk/x86/built-in.a
AR drivers/clk/xilinx/built-in.a
CC drivers/clk/clk-devres.o
CC arch/x86/kernel/cpu/rdrand.o
CC kernel/locking/lockdep.o
CC crypto/ahash.o
CC fs/proc/inode.o
CC [M] sound/pci/hda/patch_realtek.o
CC kernel/power/swap.o
CC fs/configfs/symlink.o
AR arch/x86/kernel/kprobes/built-in.a
CC kernel/locking/lockdep_proc.o
CC crypto/shash.o
CC drivers/pci/pcie/aer_inject.o
CC arch/x86/mm/pgprot.o
CC crypto/akcipher.o
CC fs/sysfs/group.o
CC arch/x86/kernel/cpu/match.o
CC crypto/sig.o
AR drivers/pinctrl/built-in.a
CC drivers/pnp/card.o
CC drivers/pci/pcie/pme.o
AR lib/crypto/built-in.a
LD [M] lib/crypto/libarc4.o
CC [M] drivers/video/fbdev/core/fbmem.o
CC drivers/pci/hotplug/acpiphp_core.o
AR drivers/dma/mediatek/built-in.a
AR fs/devpts/built-in.a
CC drivers/acpi/acpica/dsmethod.o
CC drivers/pci/hotplug/acpiphp_glue.o
CC drivers/acpi/acpica/dsmthdat.o
CC io_uring/net.o
CC fs/configfs/mount.o
AR drivers/gpio/built-in.a
CC kernel/locking/spinlock.o
CC drivers/clk/clk-bulk.o
CC crypto/kpp.o
CC drivers/acpi/apei/apei-base.o
AR drivers/acpi/pmic/built-in.a
AR arch/x86/net/built-in.a
AR arch/x86/platform/atom/built-in.a
CC drivers/acpi/apei/hest.o
AR arch/x86/platform/ce4100/built-in.a
CC arch/x86/platform/efi/memmap.o
CC lib/zlib_inflate/infutil.o
CC mm/percpu.o
AR drivers/dma/hsu/built-in.a
CC drivers/acpi/apei/erst.o
CC arch/x86/kernel/cpu/bugs.o
AR drivers/dma/qcom/built-in.a
CC arch/x86/mm/hugetlbpage.o
CC io_uring/msg_ring.o
CC arch/x86/kernel/cpu/aperfmperf.o
CC io_uring/timeout.o
CC drivers/clk/clkdev.o
CC drivers/clk/clk.o
AR fs/sysfs/built-in.a
CC drivers/clk/clk-divider.o
AR drivers/video/fbdev/omap/built-in.a
CC drivers/pci/pcie/dpc.o
CC drivers/acpi/acpica/dsobject.o
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
CC drivers/dma/dw/dw.o
CC drivers/clk/clk-fixed-factor.o
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
CC drivers/dma/dw/idma32.o
AR drivers/video/fbdev/omap2/omapfb/built-in.a
CC fs/proc/root.o
AR drivers/video/fbdev/omap2/built-in.a
CC fs/proc/base.o
CC kernel/locking/osq_lock.o
CC drivers/clk/clk-fixed-rate.o
CC arch/x86/kernel/apic/msi.o
CC drivers/dma/dw/acpi.o
CC fs/kernfs/symlink.o
CC net/core/dev.o
CC lib/zlib_inflate/inftrees.o
CC fs/configfs/item.o
CC drivers/pnp/driver.o
CC drivers/clk/clk-gate.o
CC arch/x86/events/intel/p4.o
CC drivers/acpi/apei/bert.o
CC crypto/acompress.o
CC lib/zlib_inflate/inflate_syms.o
CC mm/slab_common.o
CC drivers/dma/dw/pci.o
CC block/blk-timeout.o
CC [M] drivers/video/fbdev/core/fbcmap.o
CC drivers/acpi/dptf/int340x_thermal.o
CC [M] drivers/video/fbdev/core/modedb.o
CC drivers/acpi/apei/ghes.o
CC sound/core/misc.o
CC [M] drivers/video/fbdev/uvesafb.o
CC arch/x86/platform/efi/quirks.o
CC drivers/acpi/acpica/dsopcode.o
CC kernel/power/user.o
CC arch/x86/events/intel/p6.o
CC drivers/clk/clk-multiplier.o
AR drivers/pci/hotplug/built-in.a
CC arch/x86/mm/kasan_init_64.o
CC drivers/acpi/acpica/dspkginit.o
CC mm/compaction.o
CC kernel/locking/qspinlock.o
CC net/core/dev_addr_lists.o
AR lib/zlib_inflate/built-in.a
CC lib/zlib_deflate/deflate.o
AR fs/configfs/built-in.a
CC net/core/dst.o
CC net/core/netevent.o
CC mm/show_mem.o
CC drivers/pnp/resource.o
AR fs/kernfs/built-in.a
CC drivers/pnp/manager.o
AR drivers/pci/pcie/built-in.a
CC lib/lz4/lz4_compress.o
CC lib/lzo/lzo1x_compress.o
CC lib/lzo/lzo1x_decompress_safe.o
CC lib/zstd/zstd_compress_module.o
CC drivers/acpi/acpica/dsutils.o
CC drivers/acpi/acpica/dswexec.o
CC drivers/pnp/support.o
CC lib/zstd/compress/fse_compress.o
AR drivers/acpi/dptf/built-in.a
CC fs/ext4/balloc.o
CC io_uring/sqpoll.o
CC arch/x86/kernel/apic/x2apic_phys.o
AR drivers/dma/dw/built-in.a
CC crypto/scompress.o
CC crypto/algboss.o
AR drivers/dma/ti/built-in.a
CC drivers/clk/clk-mux.o
CC block/blk-lib.o
AR drivers/dma/xilinx/built-in.a
CC io_uring/fdinfo.o
CC [M] drivers/dma/ioat/init.o
CC [M] drivers/dma/ioat/dma.o
CC sound/core/device.o
CC mm/shmem_quota.o
CC crypto/testmgr.o
CC drivers/dma/dmaengine.o
CC drivers/dma/virt-dma.o
CC arch/x86/events/intel/pt.o
CC lib/zstd/compress/hist.o
AR lib/lzo/built-in.a
CC drivers/dma/acpi-dma.o
CC drivers/pci/pci-driver.o
CC sound/core/info.o
CC arch/x86/kernel/cpu/cpuid-deps.o
CC kernel/power/poweroff.o
CC io_uring/tctx.o
CC drivers/acpi/acpica/dswload.o
CC arch/x86/kernel/platform-quirks.o
CC arch/x86/mm/numa.o
CC net/sched/sch_generic.o
CC lib/zstd/compress/huf_compress.o
CC [M] drivers/video/fbdev/core/fbcvt.o
CC arch/x86/platform/efi/efi.o
CC net/sched/sch_mq.o
CC mm/interval_tree.o
AR kernel/power/built-in.a
CC kernel/printk/printk.o
AR drivers/acpi/apei/built-in.a
CC net/core/neighbour.o
CC arch/x86/kernel/apic/x2apic_cluster.o
CC lib/zlib_deflate/deftree.o
CC kernel/printk/printk_safe.o
CC drivers/clk/clk-composite.o
CC drivers/acpi/tables.o
CC arch/x86/kernel/cpu/umwait.o
CC arch/x86/kernel/cpu/proc.o
CC drivers/pnp/interface.o
CC drivers/clk/clk-fractional-divider.o
CC [M] sound/pci/hda/patch_analog.o
CC kernel/irq/irqdesc.o
CC block/blk-mq.o
CC drivers/acpi/acpica/dswload2.o
CC kernel/irq/handle.o
CC kernel/rcu/update.o
CC crypto/cmac.o
CC net/core/rtnetlink.o
CC lib/zlib_deflate/deflate_syms.o
CC block/blk-mq-tag.o
CC drivers/clk/clk-gpio.o
CC [M] drivers/video/fbdev/simplefb.o
CC sound/core/isadma.o
CC drivers/acpi/acpica/dswscope.o
CC [M] drivers/video/fbdev/core/fb_cmdline.o
CC [M] drivers/dma/ioat/prep.o
CC io_uring/poll.o
CC block/blk-stat.o
CC mm/list_lru.o
CC lib/lz4/lz4hc_compress.o
CC drivers/pnp/quirks.o
AR lib/zlib_deflate/built-in.a
CC [M] drivers/dma/ioat/dca.o
AR kernel/livepatch/built-in.a
CC lib/xz/xz_dec_syms.o
CC lib/xz/xz_dec_stream.o
CC mm/workingset.o
CC arch/x86/platform/efi/efi_64.o
AS arch/x86/platform/efi/efi_stub_64.o
CC arch/x86/kernel/apic/apic_flat_64.o
CC block/blk-mq-sysfs.o
CC lib/xz/xz_dec_lzma2.o
CC fs/proc/generic.o
CC kernel/irq/manage.o
CC lib/xz/xz_dec_bcj.o
CC fs/proc/array.o
MKCAP arch/x86/kernel/cpu/capflags.c
CC arch/x86/mm/numa_64.o
CC drivers/pci/search.o
CC [M] drivers/dma/ioat/sysfs.o
CC arch/x86/kernel/process_64.o
CC fs/ext4/bitmap.o
CC arch/x86/events/intel/uncore.o
CC drivers/acpi/acpica/dswstate.o
CC arch/x86/mm/amdtopology.o
CC arch/x86/kernel/cpu/powerflags.o
CC arch/x86/kernel/apic/probe_64.o
CC sound/core/vmaster.o
CC net/sched/sch_frag.o
CC [M] sound/pci/hda/patch_hdmi.o
CC kernel/irq/spurious.o
CC drivers/pnp/system.o
CC lib/zstd/compress/zstd_compress.o
CC arch/x86/kernel/cpu/feat_ctl.o
CC arch/x86/events/intel/uncore_nhmex.o
CC drivers/acpi/acpica/evevent.o
CC [M] drivers/video/fbdev/core/fb_io_fops.o
CC kernel/irq/resend.o
CC drivers/acpi/acpica/evgpe.o
CC kernel/locking/rtmutex_api.o
AR arch/x86/kernel/apic/built-in.a
CC arch/x86/mm/srat.o
CC drivers/acpi/acpica/evgpeblk.o
CC [M] sound/pci/hda/hda_eld.o
CC kernel/irq/chip.o
CC block/blk-mq-cpumap.o
CC io_uring/cancel.o
AR lib/xz/built-in.a
AR drivers/soc/apple/built-in.a
CC drivers/pci/pci-sysfs.o
AR drivers/soc/aspeed/built-in.a
AR sound/usb/misc/built-in.a
AR drivers/soc/bcm/built-in.a
AR sound/usb/usx2y/built-in.a
AR drivers/soc/fsl/built-in.a
AR sound/usb/caiaq/built-in.a
AR drivers/pnp/built-in.a
AR arch/x86/platform/efi/built-in.a
AR drivers/soc/fujitsu/built-in.a
AR sound/usb/6fire/built-in.a
CC block/blk-mq-sched.o
AR drivers/soc/hisilicon/built-in.a
AR sound/usb/hiface/built-in.a
AR arch/x86/platform/geode/built-in.a
AR drivers/pmdomain/actions/built-in.a
AR drivers/clk/built-in.a
AR drivers/pmdomain/amlogic/built-in.a
AR drivers/soc/imx/built-in.a
AR drivers/soc/ixp4xx/built-in.a
CC net/core/utils.o
AR arch/x86/platform/iris/built-in.a
CC drivers/pci/rom.o
AR sound/usb/bcd2000/built-in.a
AR drivers/pmdomain/apple/built-in.a
CC sound/core/ctljack.o
AR drivers/soc/loongson/built-in.a
CC fs/ext4/block_validity.o
AR sound/usb/built-in.a
CC arch/x86/platform/intel/iosf_mbi.o
AR drivers/pmdomain/bcm/built-in.a
CC mm/debug.o
CC io_uring/kbuf.o
AR drivers/soc/mediatek/built-in.a
CC block/ioctl.o
AR drivers/pmdomain/imx/built-in.a
CC net/netlink/af_netlink.o
AR drivers/soc/microchip/built-in.a
CC fs/jbd2/transaction.o
AR drivers/pmdomain/mediatek/built-in.a
AR drivers/soc/nuvoton/built-in.a
AR drivers/pmdomain/qcom/built-in.a
AR drivers/soc/pxa/built-in.a
AR drivers/pmdomain/renesas/built-in.a
AR drivers/soc/amlogic/built-in.a
AR drivers/pmdomain/rockchip/built-in.a
AR drivers/soc/qcom/built-in.a
CC kernel/rcu/sync.o
AR drivers/pmdomain/samsung/built-in.a
AR drivers/soc/renesas/built-in.a
AR drivers/pmdomain/st/built-in.a
LD [M] drivers/dma/ioat/ioatdma.o
AR drivers/soc/rockchip/built-in.a
AR drivers/pmdomain/starfive/built-in.a
AR drivers/pmdomain/sunxi/built-in.a
AR drivers/soc/sifive/built-in.a
CC fs/jbd2/commit.o
AR drivers/soc/sunxi/built-in.a
AR drivers/pmdomain/tegra/built-in.a
AR drivers/dma/built-in.a
AR drivers/pmdomain/ti/built-in.a
CC fs/ramfs/inode.o
AR drivers/soc/ti/built-in.a
CC lib/lz4/lz4_decompress.o
CC kernel/rcu/srcutree.o
AR drivers/pmdomain/xilinx/built-in.a
AR drivers/soc/xilinx/built-in.a
AR drivers/pmdomain/built-in.a
AR drivers/soc/built-in.a
CC crypto/hmac.o
CC fs/ramfs/file-mmu.o
CC sound/core/jack.o
CC fs/jbd2/recovery.o
CC kernel/rcu/tree.o
CC kernel/irq/dummychip.o
CC mm/gup.o
CC sound/core/timer.o
CC drivers/acpi/acpica/evgpeinit.o
CC fs/proc/fd.o
CC kernel/printk/printk_ringbuffer.o
CC drivers/acpi/blacklist.o
CC drivers/acpi/osi.o
CC fs/proc/proc_tty.o
CC arch/x86/mm/pkeys.o
CC arch/x86/mm/pti.o
CC net/sched/sch_api.o
CC [M] drivers/video/fbdev/core/fb_backlight.o
CC block/genhd.o
CC drivers/pci/setup-res.o
CC [M] sound/pci/hda/hda_intel.o
CC mm/mmap_lock.o
AR arch/x86/platform/intel/built-in.a
AR arch/x86/platform/intel-mid/built-in.a
CC lib/raid6/algos.o
AR arch/x86/platform/intel-quark/built-in.a
AR arch/x86/platform/olpc/built-in.a
CC lib/raid6/recov.o
AR arch/x86/platform/scx200/built-in.a
CC drivers/acpi/acpica/evgpeutil.o
AR arch/x86/platform/uv/built-in.a
AR arch/x86/platform/ts5500/built-in.a
CC arch/x86/events/intel/uncore_snb.o
AR arch/x86/platform/built-in.a
CC kernel/irq/devres.o
AR kernel/sched/built-in.a
CC kernel/rcu/rcu_segcblist.o
CC kernel/irq/autoprobe.o
CC drivers/acpi/acpica/evglock.o
AR fs/ramfs/built-in.a
CC fs/ext4/dir.o
CC drivers/acpi/acpica/evhandler.o
CC mm/highmem.o
CC lib/fonts/fonts.o
CC mm/memory.o
CC lib/fonts/font_8x8.o
CC lib/argv_split.o
CC drivers/acpi/acpica/evmisc.o
CC kernel/printk/sysctl.o
CC crypto/vmac.o
CC crypto/xcbc.o
CC crypto/crypto_null.o
CC lib/fonts/font_8x16.o
CC kernel/locking/spinlock_debug.o
CC [M] arch/x86/kvm/../../../virt/kvm/kvm_main.o
CC fs/proc/cmdline.o
CC io_uring/rsrc.o
CC crypto/md5.o
CC [M] drivers/video/fbdev/core/fbmon.o
AR kernel/printk/built-in.a
CC drivers/pci/irq.o
AR arch/x86/mm/built-in.a
AR lib/lz4/built-in.a
CC drivers/pci/vpd.o
CC lib/bug.o
CC drivers/pci/setup-bus.o
CC drivers/acpi/osl.o
CC [M] arch/x86/kvm/../../../virt/kvm/eventfd.o
CC fs/proc/consoles.o
CC fs/jbd2/checkpoint.o
CC lib/buildid.o
CC fs/ext4/ext4_jbd2.o
CC fs/ext4/extents.o
CC drivers/pci/vc.o
CC kernel/irq/irqdomain.o
CC drivers/pci/mmap.o
CC drivers/acpi/acpica/evregion.o
AR lib/fonts/built-in.a
CC net/core/link_watch.o
HOSTCC lib/raid6/mktables
CC net/netlink/genetlink.o
CC crypto/sha1_generic.o
CC kernel/irq/proc.o
CC kernel/locking/qrwlock.o
CC fs/ext4/extents_status.o
CC crypto/sha256_generic.o
CC drivers/video/cmdline.o
CC crypto/sha512_generic.o
UNROLL lib/raid6/int1.c
UNROLL lib/raid6/int2.c
UNROLL lib/raid6/int4.c
UNROLL lib/raid6/int8.c
LD [M] sound/pci/hda/snd-hda-codec.o
UNROLL lib/raid6/int16.c
UNROLL lib/raid6/int32.c
CC lib/raid6/recov_ssse3.o
CC lib/raid6/recov_avx2.o
LD [M] sound/pci/hda/snd-hda-codec-generic.o
CC fs/proc/cpuinfo.o
CC lib/raid6/mmx.o
AR net/bpf/built-in.a
CC fs/ext4/file.o
CC drivers/video/nomodeset.o
CC arch/x86/events/intel/uncore_snbep.o
CC mm/mincore.o
CC fs/hugetlbfs/inode.o
CC lib/zstd/compress/zstd_compress_literals.o
CC sound/core/hrtimer.o
CC block/ioprio.o
CC arch/x86/events/intel/uncore_discovery.o
CC drivers/video/hdmi.o
CC lib/cmdline.o
CC lib/cpumask.o
CC drivers/acpi/acpica/evrgnini.o
AR kernel/locking/built-in.a
CC [M] drivers/video/fbdev/core/fb_defio.o
CC drivers/pci/setup-irq.o
CC sound/core/seq_device.o
CC arch/x86/events/intel/cstate.o
CC net/ethtool/ioctl.o
CC drivers/pci/proc.o
CC [M] drivers/video/fbdev/core/fb_chrdev.o
CC [M] net/netfilter/ipvs/ip_vs_conn.o
CC [M] net/netfilter/ipvs/ip_vs_core.o
CC fs/proc/devices.o
LD [M] sound/pci/hda/snd-hda-codec-realtek.o
CC [M] net/netfilter/ipvs/ip_vs_ctl.o
CC lib/raid6/sse1.o
CC fs/jbd2/revoke.o
LD [M] sound/pci/hda/snd-hda-codec-analog.o
LD [M] sound/pci/hda/snd-hda-codec-hdmi.o
CC lib/raid6/sse2.o
CC lib/raid6/avx2.o
CC crypto/sha3_generic.o
LD [M] sound/pci/hda/snd-hda-intel.o
CC lib/zstd/compress/zstd_compress_sequences.o
CC block/badblocks.o
AR sound/pci/built-in.a
CC drivers/acpi/utils.o
CC [M] sound/core/control_led.o
CC net/netfilter/core.o
CC lib/raid6/avx512.o
CC lib/zstd/compress/zstd_compress_superblock.o
CC drivers/acpi/acpica/evsci.o
CC [M] arch/x86/kvm/../../../virt/kvm/binary_stats.o
CC lib/ctype.o
CC kernel/irq/migration.o
CC net/sched/sch_blackhole.o
CC [M] arch/x86/kvm/../../../virt/kvm/vfio.o
CC crypto/blake2b_generic.o
CC [M] arch/x86/kvm/../../../virt/kvm/coalesced_mmio.o
CC crypto/ecb.o
CC lib/zstd/compress/zstd_double_fast.o
CC kernel/dma/mapping.o
CC crypto/cbc.o
CC kernel/dma/direct.o
CC kernel/entry/common.o
CC net/core/filter.o
AR sound/firewire/built-in.a
CC drivers/pci/slot.o
CC lib/zstd/compress/zstd_fast.o
CC net/core/sock_diag.o
CC crypto/pcbc.o
CC drivers/acpi/acpica/evxface.o
CC net/netfilter/nf_log.o
CC io_uring/rw.o
CC fs/jbd2/journal.o
CC arch/x86/events/zhaoxin/core.o
CC arch/x86/kernel/cpu/intel.o
CC fs/proc/interrupts.o
CC drivers/pci/pci-acpi.o
CC drivers/pci/quirks.o
CC [M] drivers/video/fbdev/core/fb_procfs.o
CC drivers/acpi/reboot.o
CC block/blk-rq-qos.o
CC kernel/irq/cpuhotplug.o
CC net/netlink/policy.o
CC net/core/dev_ioctl.o
CC lib/raid6/recov_avx512.o
CC [M] sound/core/hwdep.o
AR fs/hugetlbfs/built-in.a
CC crypto/cts.o
CC lib/zstd/compress/zstd_lazy.o
CC [M] sound/core/pcm.o
CC fs/fat/cache.o
CC fs/nfs/client.o
CC net/ethtool/common.o
CC fs/proc/loadavg.o
CC net/sched/sch_fifo.o
CC fs/proc/meminfo.o
CC [M] net/netfilter/ipvs/ip_vs_sched.o
CC drivers/acpi/acpica/evxfevnt.o
CC fs/proc/stat.o
CC mm/mlock.o
CC fs/exportfs/expfs.o
CC kernel/irq/pm.o
CC block/disk-events.o
CC io_uring/opdef.o
CC kernel/entry/syscall_user_dispatch.o
CC kernel/dma/ops_helpers.o
CC [M] drivers/video/fbdev/core/fbsysfs.o
CC kernel/entry/kvm.o
CC io_uring/notif.o
TABLE lib/raid6/tables.c
CC fs/ext4/fsmap.o
CC lib/raid6/int1.o
AR arch/x86/events/zhaoxin/built-in.a
CC mm/mmap.o
CC net/netlink/diag.o
CC drivers/acpi/acpica/evxfgpe.o
CC crypto/lrw.o
CC [M] sound/core/pcm_native.o
CC drivers/acpi/acpica/evxfregn.o
CC [M] sound/core/pcm_lib.o
CC mm/mmu_gather.o
CC [M] net/netfilter/ipvs/ip_vs_xmit.o
CC fs/fat/dir.o
CC arch/x86/kernel/cpu/intel_pconfig.o
AR arch/x86/events/intel/built-in.a
CC arch/x86/events/core.o
CC [M] drivers/video/fbdev/core/fbcon.o
CC [M] sound/core/pcm_misc.o
CC drivers/pci/ats.o
CC [M] drivers/video/fbdev/core/bitblit.o
CC arch/x86/kernel/cpu/tsx.o
CC fs/proc/uptime.o
AR fs/exportfs/built-in.a
CC fs/lockd/clntlock.o
CC net/ethtool/netlink.o
CC fs/proc/util.o
AR net/sched/built-in.a
CC arch/x86/events/probe.o
CC net/netfilter/nf_queue.o
CC fs/fat/fatent.o
CC net/core/tso.o
CC kernel/dma/dummy.o
CC kernel/irq/msi.o
CC net/netfilter/nf_sockopt.o
CC block/blk-ia-ranges.o
CC lib/raid6/int2.o
CC drivers/acpi/acpica/exconcat.o
CC net/netfilter/utils.o
CC crypto/xts.o
CC arch/x86/kernel/cpu/intel_epb.o
AR kernel/entry/built-in.a
CC arch/x86/kernel/cpu/amd.o
CC kernel/irq/affinity.o
CC kernel/module/main.o
CC [M] net/netfilter/ipvs/ip_vs_app.o
CC kernel/module/strict_rwx.o
CC net/core/sock_reuseport.o
CC fs/proc/version.o
CC kernel/module/kmod.o
AR kernel/rcu/built-in.a
CC io_uring/io-wq.o
CC net/core/fib_notifier.o
CC kernel/time/time.o
CC kernel/futex/core.o
AR net/netlink/built-in.a
CC fs/ext4/fsync.o
CC kernel/dma/contiguous.o
CC drivers/acpi/acpica/exconfig.o
CC fs/nfs/dir.o
CC arch/x86/kernel/cpu/hygon.o
CC [M] sound/core/pcm_memory.o
CC fs/proc/softirqs.o
CC kernel/time/timer.o
CC fs/nls/nls_base.o
CC lib/raid6/int4.o
CC fs/ext4/hash.o
CC block/early-lookup.o
CC drivers/pci/iov.o
CC net/ethtool/bitset.o
CC kernel/irq/matrix.o
CC arch/x86/events/utils.o
CC fs/lockd/clntproc.o
CC fs/lockd/clntxdr.o
CC crypto/ctr.o
CC drivers/acpi/nvs.o
CC kernel/time/hrtimer.o
CC drivers/pci/pci-label.o
CC fs/fat/file.o
CC drivers/acpi/acpica/exconvrt.o
CC fs/fat/inode.o
CC fs/ext4/ialloc.o
AR fs/jbd2/built-in.a
CC crypto/gcm.o
CC kernel/dma/swiotlb.o
CC net/ethtool/strset.o
CC [M] sound/core/memalloc.o
CC fs/nfs/file.o
CC arch/x86/kernel/cpu/centaur.o
CC drivers/acpi/wakeup.o
CC fs/proc/namespaces.o
CC fs/nls/nls_cp437.o
CC [M] net/netfilter/nfnetlink.o
CC [M] arch/x86/kvm/../../../virt/kvm/async_pf.o
CC kernel/dma/remap.o
CC drivers/acpi/sleep.o
AR net/ipv4/netfilter/built-in.a
CC net/ipv4/route.o
CC [M] net/ipv4/netfilter/nf_defrag_ipv4.o
CC lib/raid6/int8.o
CC kernel/futex/syscalls.o
CC [M] drivers/video/fbdev/core/softcursor.o
CC [M] net/ipv4/netfilter/nf_reject_ipv4.o
CC block/bsg.o
CC drivers/acpi/acpica/excreate.o
CC [M] net/netfilter/ipvs/ip_vs_sync.o
CC net/ethtool/linkinfo.o
CC kernel/module/tree_lookup.o
CC arch/x86/events/rapl.o
CC arch/x86/events/msr.o
CC fs/nls/nls_ascii.o
CC kernel/futex/pi.o
CC lib/zstd/compress/zstd_ldm.o
CC fs/proc/self.o
CC block/bsg-lib.o
CC fs/fat/misc.o
CC arch/x86/kernel/cpu/zhaoxin.o
CC drivers/pci/pci-stub.o
AR io_uring/built-in.a
CC drivers/pci/vgaarb.o
CC net/ipv4/inetpeer.o
CC fs/nls/nls_iso8859-1.o
CC [M] net/netfilter/ipvs/ip_vs_est.o
CC fs/fat/nfs.o
CC fs/nls/nls_utf8.o
CC drivers/acpi/acpica/exdebug.o
CC net/ethtool/linkmodes.o
CC lib/zstd/compress/zstd_opt.o
AR kernel/irq/built-in.a
CC [M] drivers/video/fbdev/core/tileblit.o
CC lib/raid6/int16.o
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC [M] arch/x86/kvm/../../../virt/kvm/irqchip.o
CC net/ethtool/rss.o
CC crypto/pcrypt.o
CC crypto/cryptd.o
CC net/ethtool/linkstate.o
CC fs/lockd/host.o
CC drivers/virtio/virtio.o
CC crypto/des_generic.o
CC fs/proc/thread_self.o
CC drivers/tty/vt/vt_ioctl.o
CC [M] sound/core/pcm_timer.o
CC drivers/tty/vt/vc_screen.o
CC [M] fs/nls/nls_ucs2_utils.o
CC kernel/futex/requeue.o
CC kernel/futex/waitwake.o
AR kernel/dma/built-in.a
CC kernel/cgroup/cgroup.o
AR fs/nls/built-in.a
CC crypto/aes_generic.o
CC mm/mprotect.o
CC kernel/cgroup/rstat.o
AR arch/x86/events/built-in.a
CC drivers/tty/hvc/hvc_console.o
CC net/core/xdp.o
CC drivers/tty/serial/serial_core.o
CC net/core/flow_offload.o
CC kernel/time/timekeeping.o
CC drivers/acpi/acpica/exdump.o
CC drivers/tty/serial/8250/8250_core.o
CC drivers/acpi/acpica/exfield.o
CC block/blk-cgroup.o
CC kernel/module/debug_kmemleak.o
CC drivers/tty/serial/8250/8250_pnp.o
CC fs/fat/namei_vfat.o
CC crypto/crc32c_generic.o
CC lib/raid6/int32.o
CC [M] net/ipv4/netfilter/ip_tables.o
CC drivers/tty/serial/serial_base_bus.o
AR drivers/tty/ipwireless/built-in.a
CC kernel/time/ntp.o
CC drivers/tty/tty_io.o
CC drivers/acpi/acpica/exfldio.o
CC arch/x86/kernel/cpu/vmware.o
CC fs/proc/proc_sysctl.o
LD [M] sound/core/snd-ctl-led.o
CC arch/x86/kernel/cpu/hypervisor.o
LD [M] sound/core/snd-hwdep.o
CC fs/fat/namei_msdos.o
LD [M] sound/core/snd-pcm.o
CC [M] drivers/video/fbdev/core/fb_logo.o
AR kernel/futex/built-in.a
CC net/ipv4/protocol.o
AR fs/unicode/built-in.a
CC arch/x86/kernel/cpu/mshyperv.o
AR sound/core/built-in.a
CC crypto/crct10dif_common.o
CC drivers/virtio/virtio_ring.o
AR sound/sparc/built-in.a
AR sound/spi/built-in.a
AR drivers/pci/built-in.a
CC kernel/time/clocksource.o
AR sound/parisc/built-in.a
CC [M] drivers/video/fbdev/core/cfbfillrect.o
AR sound/pcmcia/vx/built-in.a
AR sound/pcmcia/pdaudiocf/built-in.a
AR sound/pcmcia/built-in.a
AR sound/mips/built-in.a
CC [M] arch/x86/kvm/../../../virt/kvm/dirty_ring.o
AR sound/soc/built-in.a
CC [M] arch/x86/kvm/../../../virt/kvm/pfncache.o
AR sound/atmel/built-in.a
CC kernel/module/kallsyms.o
AR sound/hda/built-in.a
CC fs/ext4/indirect.o
CC [M] sound/hda/hda_bus_type.o
CC [M] drivers/video/fbdev/core/cfbcopyarea.o
CC crypto/crct10dif_generic.o
CC net/ethtool/debug.o
CC drivers/acpi/device_sysfs.o
CC fs/lockd/svc.o
CC net/ipv4/ip_input.o
CC crypto/authenc.o
CC drivers/tty/vt/selection.o
CC lib/raid6/tables.o
CC net/ipv4/ip_fragment.o
CC [M] net/netfilter/ipvs/ip_vs_proto.o
AR drivers/tty/hvc/built-in.a
CC [M] net/netfilter/ipvs/ip_vs_pe.o
CC drivers/acpi/acpica/exmisc.o
CC [M] net/netfilter/nf_conntrack_core.o
CC [M] net/netfilter/ipvs/ip_vs_proto_tcp.o
CC arch/x86/kernel/signal.o
CC net/core/gro.o
CC drivers/tty/n_tty.o
CC fs/nfs/getroot.o
CC drivers/tty/serial/8250/8250_port.o
CC drivers/tty/serial/8250/8250_dma.o
CC net/core/netdev-genl.o
CC [M] net/netfilter/nf_conntrack_standalone.o
CC [M] net/netfilter/nf_conntrack_expect.o
AR fs/fat/built-in.a
CC fs/ntfs/aops.o
CC [M] sound/hda/hdac_bus.o
CC arch/x86/kernel/cpu/capflags.o
CC [M] drivers/video/fbdev/core/cfbimgblt.o
AR fs/hostfs/built-in.a
CC mm/mremap.o
CC fs/debugfs/inode.o
CC drivers/acpi/acpica/exmutex.o
CC [M] sound/hda/hdac_device.o
AR arch/x86/kernel/cpu/built-in.a
CC [M] drivers/video/fbdev/core/sysfillrect.o
CC kernel/time/jiffies.o
CC arch/x86/kernel/signal_64.o
CC kernel/time/timer_list.o
CC kernel/module/procfs.o
CC [M] net/netfilter/nf_conntrack_helper.o
AR lib/raid6/built-in.a
AR sound/x86/built-in.a
CC drivers/tty/vt/keyboard.o
AR sound/xen/built-in.a
CC [M] arch/x86/kvm/x86.o
CC drivers/tty/vt/consolemap.o
CC mm/msync.o
CC [M] arch/x86/kvm/emulate.o
CC net/ethtool/wol.o
CC [M] net/ipv4/netfilter/iptable_filter.o
CC arch/x86/kernel/traps.o
CC crypto/authencesn.o
CC kernel/time/timeconv.o
CC drivers/acpi/acpica/exnames.o
CC block/blk-cgroup-rwstat.o
CC kernel/time/timecounter.o
CC fs/lockd/svclock.o
CC fs/proc/proc_net.o
CC [M] net/ipv4/netfilter/iptable_mangle.o
CC [M] net/netfilter/nf_conntrack_proto.o
CC drivers/tty/serial/serial_ctrl.o
CC kernel/module/sysfs.o
CC fs/nfs/inode.o
CC fs/nfs/super.o
CC drivers/acpi/acpica/exoparg1.o
CC fs/proc/kcore.o
CC drivers/tty/tty_ioctl.o
CC fs/proc/kmsg.o
CC drivers/tty/tty_ldisc.o
CC [M] sound/hda/hdac_sysfs.o
CC drivers/virtio/virtio_anchor.o
CC block/blk-throttle.o
CC kernel/time/alarmtimer.o
CC fs/debugfs/file.o
CC drivers/tty/serial/serial_port.o
CC [M] drivers/video/fbdev/core/syscopyarea.o
CC [M] net/netfilter/ipvs/ip_vs_proto_udp.o
CC fs/ext4/inline.o
CC fs/ext4/inode.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC fs/ntfs/attrib.o
CC drivers/tty/serial/earlycon.o
CC drivers/tty/tty_buffer.o
HOSTCC drivers/tty/vt/conmakehash
CC [M] net/netfilter/nf_conntrack_proto_generic.o
CC net/ethtool/features.o
CC drivers/tty/vt/vt.o
CC drivers/acpi/device_pm.o
AR sound/virtio/built-in.a
CC block/mq-deadline.o
CC [M] sound/hda/hdac_regmap.o
CC fs/nfs/io.o
CC drivers/acpi/acpica/exoparg2.o
CC kernel/trace/trace_clock.o
CC [M] net/ipv4/netfilter/iptable_nat.o
CC [M] net/netfilter/nf_conntrack_proto_tcp.o
CC drivers/virtio/virtio_pci_legacy_dev.o
CC mm/page_vma_mapped.o
CC crypto/lzo.o
CC drivers/virtio/virtio_pci_modern.o
AR kernel/module/built-in.a
CC lib/zstd/zstd_decompress_module.o
CC fs/nfs/direct.o
CC [M] arch/x86/kvm/i8259.o
CC kernel/bpf/core.o
CC arch/x86/kernel/idt.o
CC drivers/virtio/virtio_pci_common.o
CC [M] sound/hda/hdac_controller.o
CC net/ipv4/ip_forward.o
CC drivers/tty/serial/8250/8250_dwlib.o
CC block/kyber-iosched.o
CC fs/proc/page.o
COPY drivers/tty/vt/defkeymap.c
CONMK drivers/tty/vt/consolemap_deftbl.c
CC drivers/tty/vt/defkeymap.o
CC kernel/trace/ftrace.o
CC lib/zstd/decompress/huf_decompress.o
CC fs/nfs/pagelist.o
CC drivers/tty/serial/serial_mctrl_gpio.o
CC [M] drivers/video/fbdev/core/sysimgblt.o
CC drivers/acpi/acpica/exoparg3.o
AR fs/debugfs/built-in.a
CC fs/lockd/svcshare.o
CC fs/ntfs/collate.o
CC [M] net/netfilter/nf_conntrack_proto_udp.o
CC net/core/netdev-genl-gen.o
CC lib/zstd/decompress/zstd_ddict.o
CC [M] net/netfilter/nf_conntrack_proto_icmp.o
CC kernel/time/posix-timers.o
CC lib/zstd/decompress/zstd_decompress.o
CC crypto/lzo-rle.o
CC block/bfq-iosched.o
CC fs/tracefs/inode.o
CC [M] sound/hda/hdac_stream.o
CC [M] net/netfilter/nf_conntrack_extend.o
CC [M] net/netfilter/ipvs/ip_vs_nfct.o
CC kernel/trace/ring_buffer.o
CC net/ethtool/privflags.o
CC kernel/trace/trace.o
CC block/bfq-wf2q.o
CC arch/x86/kernel/irq.o
CC drivers/acpi/acpica/exoparg6.o
CC drivers/virtio/virtio_pci_legacy.o
CC drivers/char/hw_random/core.o
CC drivers/tty/serial/8250/8250_pcilib.o
CC mm/pagewalk.o
CC drivers/char/agp/backend.o
CC [M] net/ipv4/netfilter/ipt_REJECT.o
CC drivers/char/agp/generic.o
CC drivers/tty/serial/8250/8250_pci.o
CC fs/ntfs/compress.o
CC fs/nfs/read.o
CC net/core/gso.o
CC net/ethtool/rings.o
CC crypto/lz4.o
AR fs/proc/built-in.a
CC net/ethtool/channels.o
CC drivers/acpi/acpica/exprep.o
CC [M] drivers/video/fbdev/core/fb_sys_fops.o
CC kernel/time/posix-cpu-timers.o
CC drivers/tty/vt/consolemap_deftbl.o
CC [M] sound/hda/array.o
CC [M] net/netfilter/nf_conntrack_acct.o
CC fs/lockd/svcproc.o
CC fs/tracefs/event_inode.o
CC net/ipv4/ip_options.o
CC [M] drivers/virtio/virtio_mem.o
CC [M] sound/hda/hdmi_chmap.o
CC [M] net/netfilter/nf_conntrack_seqadj.o
CC [M] net/netfilter/nf_conntrack_proto_icmpv6.o
CC [M] sound/hda/trace.o
CC crypto/lz4hc.o
CC fs/lockd/svcsubs.o
CC net/ipv4/ip_output.o
CC drivers/acpi/acpica/exregion.o
CC drivers/tty/serial/8250/8250_exar.o
CC drivers/char/hw_random/intel-rng.o
CC drivers/char/agp/isoch.o
CC drivers/char/tpm/tpm-chip.o
CC lib/dec_and_lock.o
CC [M] net/netfilter/ipvs/ip_vs_rr.o
CC drivers/char/tpm/tpm-dev-common.o
CC kernel/cgroup/namespace.o
CC net/ipv4/ip_sockglue.o
CC mm/pgtable-generic.o
CC lib/decompress.o
CC net/ipv4/inet_hashtables.o
CC crypto/xxhash_generic.o
CC fs/nfs/symlink.o
LD [M] drivers/video/fbdev/core/fb.o
CC drivers/acpi/acpica/exresnte.o
AR drivers/video/fbdev/core/built-in.a
AR drivers/video/fbdev/built-in.a
AR drivers/virtio/built-in.a
CC lib/decompress_bunzip2.o
AR drivers/video/built-in.a
CC kernel/time/posix-clock.o
CC net/core/net-sysfs.o
CC drivers/char/tpm/tpm-dev.o
CC net/ethtool/coalesce.o
CC [M] sound/hda/hdac_component.o
CC fs/ntfs/debug.o
AR fs/tracefs/built-in.a
AR drivers/tty/vt/built-in.a
CC kernel/time/itimer.o
CC fs/pstore/inode.o
CC drivers/tty/tty_port.o
CC net/ethtool/pause.o
CC fs/btrfs/super.o
AR drivers/char/hw_random/built-in.a
CC [M] net/netfilter/nf_conntrack_proto_dccp.o
CC fs/efivarfs/inode.o
CC drivers/tty/tty_mutex.o
CC drivers/char/agp/intel-agp.o
CC crypto/rng.o
CC drivers/acpi/acpica/exresolv.o
CC fs/pstore/platform.o
CC fs/ntfs/dir.o
CC [M] sound/hda/hdac_i915.o
CC kernel/cgroup/cgroup-v1.o
CC kernel/cgroup/freezer.o
CC kernel/time/clockevents.o
CC arch/x86/kernel/irq_64.o
CC drivers/char/tpm/tpm-interface.o
CC drivers/tty/serial/8250/8250_early.o
AR kernel/bpf/built-in.a
CC fs/ext4/ioctl.o
CC fs/lockd/mon.o
CC kernel/events/core.o
CC drivers/char/tpm/tpm1-cmd.o
CC drivers/acpi/proc.o
CC [M] net/netfilter/nf_conntrack_proto_sctp.o
CC fs/pstore/pmsg.o
LD [M] net/netfilter/ipvs/ip_vs.o
CC kernel/fork.o
CC mm/rmap.o
CC net/ipv4/inet_timewait_sock.o
CC fs/nfs/unlink.o
CC lib/decompress_inflate.o
CC [M] net/netfilter/nf_conntrack_netlink.o
CC drivers/char/agp/intel-gtt.o
CC fs/efivarfs/file.o
CC drivers/acpi/acpica/exresop.o
CC crypto/drbg.o
CC drivers/tty/tty_ldsem.o
CC lib/zstd/decompress/zstd_decompress_block.o
CC net/ethtool/eee.o
CC net/xfrm/xfrm_policy.o
CC arch/x86/kernel/dumpstack_64.o
CC [M] sound/hda/intel-dsp-config.o
CC kernel/time/tick-common.o
CC drivers/tty/serial/8250/8250_dw.o
CC net/xfrm/xfrm_state.o
CC kernel/exec_domain.o
CC kernel/trace/trace_output.o
CC net/ethtool/tsinfo.o
AR drivers/iommu/amd/built-in.a
AR drivers/gpu/host1x/built-in.a
AR fs/pstore/built-in.a
CC drivers/iommu/intel/dmar.o
AR drivers/gpu/vga/built-in.a
CC lib/zstd/zstd_common_module.o
AR drivers/gpu/drm/tests/built-in.a
AR drivers/gpu/drm/arm/built-in.a
CC [M] drivers/gpu/drm/tests/drm_kunit_helpers.o
CC net/ethtool/cabletest.o
CC [M] fs/netfs/buffered_read.o
CC net/ethtool/tunnels.o
CC drivers/char/tpm/tpm2-cmd.o
CC drivers/acpi/acpica/exserial.o
CC kernel/trace/trace_seq.o
CC lib/decompress_unlz4.o
CC fs/efivarfs/super.o
CC block/bfq-cgroup.o
CC lib/zstd/common/debug.o
CC fs/nfs/write.o
CC fs/ntfs/file.o
CC kernel/trace/trace_stat.o
CC crypto/jitterentropy.o
CC arch/x86/kernel/time.o
CC drivers/tty/tty_baudrate.o
CC fs/lockd/trace.o
CC fs/lockd/xdr.o
CC fs/ext4/mballoc.o
CC kernel/cgroup/legacy_freezer.o
CC [M] sound/hda/intel-nhlt.o
CC fs/lockd/clnt4xdr.o
CC block/blk-mq-pci.o
CC net/core/page_pool.o
CC drivers/acpi/acpica/exstore.o
AR drivers/char/agp/built-in.a
CC drivers/char/mem.o
CC net/ipv4/inet_connection_sock.o
CC kernel/panic.o
CC kernel/cgroup/pids.o
CC [M] drivers/gpu/drm/tests/drm_buddy_test.o
CC arch/x86/kernel/ioport.o
CC [M] sound/hda/intel-sdw-acpi.o
CC drivers/acpi/acpica/exstoren.o
CC kernel/time/tick-broadcast.o
CC drivers/tty/serial/8250/8250_lpss.o
CC drivers/acpi/acpica/exstorob.o
CC arch/x86/kernel/dumpstack.o
CC fs/efivarfs/vars.o
CC net/ethtool/fec.o
CC fs/nfs/namespace.o
CC fs/ntfs/index.o
CC [M] fs/netfs/io.o
CC crypto/jitterentropy-kcapi.o
CC fs/ntfs/inode.o
CC sound/sound_core.o
CC drivers/char/tpm/tpmrm-dev.o
CC kernel/time/tick-broadcast-hrtimer.o
CC net/ipv4/tcp.o
CC fs/nfs/mount_clnt.o
CC kernel/trace/trace_printk.o
CC fs/ntfs/mft.o
CC block/blk-mq-virtio.o
CC kernel/time/tick-oneshot.o
CC fs/ntfs/mst.o
CC block/blk-mq-debugfs.o
CC lib/decompress_unlzma.o
CC drivers/acpi/acpica/exsystem.o
LD [M] sound/hda/snd-hda-core.o
CC kernel/cgroup/cpuset.o
CC kernel/trace/pid_list.o
LD [M] sound/hda/snd-intel-dspcfg.o
LD [M] sound/hda/snd-intel-sdw-acpi.o
CC block/blk-pm.o
CC sound/last.o
CC kernel/cpu.o
CC arch/x86/kernel/nmi.o
CC drivers/tty/serial/8250/8250_mid.o
CC kernel/time/tick-sched.o
CC fs/btrfs/ctree.o
CC block/holder.o
CC net/ethtool/eeprom.o
CC fs/btrfs/extent-tree.o
CC crypto/ghash-generic.o
CC [M] fs/netfs/iterator.o
CC fs/lockd/xdr4.o
CC kernel/trace/trace_sched_switch.o
CC drivers/acpi/acpica/extrace.o
CC drivers/iommu/intel/iommu.o
CC [M] drivers/gpu/drm/tests/drm_cmdline_parser_test.o
AR fs/efivarfs/built-in.a
CC drivers/char/tpm/tpm2-space.o
CC fs/ext4/migrate.o
CC kernel/time/vsyscall.o
CC kernel/time/timekeeping_debug.o
CC fs/ntfs/namei.o
AR sound/built-in.a
CC [M] net/netfilter/nf_nat_core.o
CC net/core/net-procfs.o
CC mm/vmalloc.o
AR drivers/gpu/drm/display/built-in.a
CC [M] fs/fscache/cache.o
CC [M] drivers/gpu/drm/display/drm_display_helper_mod.o
CC [M] fs/smb/common/cifs_arc4.o
CC [M] drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
CC [M] fs/smb/common/cifs_md4.o
CC [M] fs/smb/client/trace.o
CC [M] drivers/gpu/drm/display/drm_dp_helper.o
CC crypto/af_alg.o
CC [M] fs/smb/client/cifsfs.o
CC mm/page_alloc.o
CC drivers/acpi/bus.o
CC fs/lockd/svc4proc.o
CC lib/decompress_unlzo.o
CC kernel/exit.o
AR block/built-in.a
CC drivers/acpi/acpica/exutils.o
CC drivers/acpi/acpica/hwacpi.o
CC [M] fs/netfs/main.o
CC drivers/tty/serial/8250/8250_pericom.o
CC drivers/acpi/acpica/hwesleep.o
CC drivers/acpi/acpica/hwgpe.o
CC arch/x86/kernel/ldt.o
CC net/core/netpoll.o
CC fs/ntfs/runlist.o
CC fs/ntfs/super.o
CC kernel/trace/trace_functions.o
CC fs/lockd/procfs.o
CC net/ethtool/stats.o
CC drivers/char/tpm/tpm-sysfs.o
CC kernel/time/namespace.o
CC fs/ext4/mmp.o
AS arch/x86/kernel/ibt_selftest.o
CC drivers/char/tpm/eventlog/common.o
CC drivers/char/tpm/eventlog/tpm1.o
CC drivers/acpi/acpica/hwregs.o
CC lib/decompress_unxz.o
CC drivers/acpi/acpica/hwsleep.o
CC fs/ntfs/sysctl.o
CC fs/ext4/move_extent.o
CC fs/nfs/nfstrace.o
CC lib/zstd/common/entropy_common.o
CC [M] fs/fscache/cookie.o
CC drivers/acpi/acpica/hwvalid.o
CC net/xfrm/xfrm_hash.o
CC lib/zstd/common/error_private.o
CC drivers/acpi/acpica/hwxface.o
CC drivers/acpi/acpica/hwxfsleep.o
AR drivers/tty/serial/8250/built-in.a
AR drivers/tty/serial/built-in.a
CC lib/zstd/common/fse_decompress.o
CC drivers/tty/tty_jobctrl.o
CC kernel/softirq.o
CC drivers/acpi/glue.o
CC drivers/tty/n_null.o
AR fs/lockd/built-in.a
CC drivers/connector/cn_queue.o
CC [M] fs/fuse/dev.o
CC drivers/connector/connector.o
CC [M] fs/netfs/objects.o
CC drivers/connector/cn_proc.o
CC drivers/acpi/acpica/hwpci.o
AR kernel/time/built-in.a
CC drivers/tty/pty.o
CC net/core/fib_rules.o
CC lib/zstd/common/zstd_common.o
CC kernel/trace/trace_preemptirq.o
CC net/xfrm/xfrm_input.o
CC drivers/char/tpm/eventlog/tpm2.o
CC arch/x86/kernel/setup.o
CC [M] net/netfilter/nf_nat_proto.o
CC [M] drivers/gpu/drm/tests/drm_connector_test.o
CC drivers/char/tpm/tpm_ppi.o
CC net/core/net-traces.o
CC drivers/char/tpm/eventlog/acpi.o
CC drivers/acpi/acpica/nsaccess.o
CC fs/ext4/namei.o
CC [M] fs/overlayfs/super.o
CC crypto/algif_hash.o
CC net/ethtool/phc_vclocks.o
CC [M] fs/overlayfs/namei.o
CC [M] fs/overlayfs/util.o
CC fs/ext4/page-io.o
CC fs/ntfs/unistr.o
CC net/core/selftests.o
AR lib/zstd/built-in.a
CC lib/decompress_unzstd.o
CC [M] drivers/gpu/drm/display/drm_dp_mst_topology.o
CC [M] drivers/gpu/drm/display/drm_dsc_helper.o
CC drivers/acpi/acpica/nsalloc.o
CC drivers/acpi/scan.o
CC drivers/char/tpm/eventlog/efi.o
CC net/xfrm/xfrm_output.o
LD [M] fs/netfs/netfs.o
CC [M] drivers/gpu/drm/tests/drm_damage_helper_test.o
AR kernel/cgroup/built-in.a
CC [M] fs/fuse/dir.o
CC kernel/trace/trace_nop.o
CC [M] fs/fuse/file.o
CC fs/ntfs/upcase.o
CC drivers/acpi/acpica/nsarguments.o
CC drivers/tty/sysrq.o
CC drivers/acpi/resource.o
CC kernel/events/ring_buffer.o
CC kernel/events/callchain.o
CC [M] fs/fscache/io.o
CC [M] fs/smb/client/cifs_debug.o
CC kernel/resource.o
CC lib/dump_stack.o
CC [M] fs/smb/client/connect.o
AR drivers/connector/built-in.a
CC arch/x86/kernel/x86_init.o
CC fs/btrfs/print-tree.o
CC drivers/acpi/acpica/nsconvert.o
CC drivers/acpi/acpica/nsdump.o
CC net/ethtool/mm.o
CC drivers/acpi/acpica/nseval.o
CC drivers/char/tpm/tpm_crb.o
CC net/ipv4/tcp_input.o
CC crypto/algif_skcipher.o
AR fs/ntfs/built-in.a
CC kernel/trace/trace_functions_graph.o
CC fs/open.o
CC drivers/iommu/intel/pasid.o
CC drivers/base/power/sysfs.o
CC drivers/block/loop.o
CC drivers/base/firmware_loader/builtin/main.o
CC drivers/base/regmap/regmap.o
AR drivers/misc/eeprom/built-in.a
CC [M] net/netfilter/nf_nat_helper.o
AR drivers/misc/cb710/built-in.a
CC drivers/acpi/acpi_processor.o
CC fs/read_write.o
CC drivers/acpi/acpica/nsinit.o
AR drivers/misc/ti-st/built-in.a
AR drivers/base/test/built-in.a
CC drivers/acpi/acpica/nsload.o
AR drivers/misc/lis3lv02d/built-in.a
AR drivers/misc/cardreader/built-in.a
CC net/xfrm/xfrm_sysctl.o
CC [M] drivers/misc/mei/hdcp/mei_hdcp.o
AR drivers/misc/built-in.a
CC drivers/acpi/acpica/nsnames.o
CC kernel/sysctl.o
CC lib/earlycpio.o
CC [M] fs/overlayfs/inode.o
CC drivers/base/regmap/regcache.o
CC [M] fs/smb/client/dir.o
CC [M] fs/fscache/main.o
CC drivers/base/regmap/regcache-rbtree.o
CC [M] drivers/gpu/drm/tests/drm_dp_mst_helper_test.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC lib/extable.o
CC drivers/base/firmware_loader/main.o
AR drivers/tty/built-in.a
CC [M] drivers/misc/mei/pxp/mei_pxp.o
CC fs/btrfs/root-tree.o
CC arch/x86/kernel/i8259.o
CC kernel/events/hw_breakpoint.o
CC fs/ext4/readpage.o
CC drivers/base/power/generic_ops.o
CC [M] net/netfilter/nf_nat_redirect.o
CC [M] drivers/gpu/drm/tests/drm_format_helper_test.o
CC [M] drivers/gpu/drm/display/drm_hdcp_helper.o
CC mm/init-mm.o
CC drivers/acpi/acpica/nsobject.o
CC kernel/trace/fgraph.o
AR drivers/char/tpm/built-in.a
CC drivers/acpi/processor_core.o
CC net/ethtool/module.o
CC drivers/char/random.o
CC lib/flex_proportions.o
CC crypto/xor.o
CC fs/btrfs/dir-item.o
CC kernel/capability.o
CC drivers/iommu/intel/trace.o
CC arch/x86/kernel/irqinit.o
CC [M] fs/smb/client/file.o
CC [M] fs/smb/client/inode.o
CC drivers/char/misc.o
CC [M] drivers/misc/mei/init.o
CC drivers/base/power/common.o
CC arch/x86/kernel/jump_label.o
CC net/xfrm/xfrm_replay.o
CC kernel/ptrace.o
CC crypto/hash_info.o
CC drivers/acpi/acpica/nsparse.o
CC crypto/simd.o
CC drivers/base/component.o
CC lib/idr.o
CC [M] net/netfilter/nf_nat_masquerade.o
CC net/ethtool/pse-pd.o
CC [M] fs/overlayfs/file.o
CC net/core/ptp_classifier.o
CC drivers/char/virtio_console.o
AR drivers/base/firmware_loader/built-in.a
CC drivers/base/power/qos.o
CC kernel/user.o
CC mm/memblock.o
CC [M] fs/fscache/volume.o
CC [M] arch/x86/kvm/irq.o
AR drivers/gpu/drm/renesas/rcar-du/built-in.a
AR drivers/gpu/drm/renesas/built-in.a
CC lib/irq_regs.o
CC drivers/base/regmap/regcache-flat.o
CC [M] fs/fuse/inode.o
CC fs/file_table.o
CC drivers/acpi/acpica/nspredef.o
CC [M] crypto/md4.o
CC [M] crypto/ccm.o
CC [M] drivers/gpu/drm/tests/drm_format_test.o
CC arch/x86/kernel/irq_work.o
CC [M] drivers/block/nbd.o
CC net/ethtool/plca.o
CC [M] net/netfilter/x_tables.o
CC drivers/base/power/runtime.o
CC drivers/char/hpet.o
CC [M] drivers/misc/mei/hbm.o
CC fs/ext4/resize.o
CC [M] drivers/misc/mei/interrupt.o
CC kernel/trace/blktrace.o
CC [M] crypto/arc4.o
CC [M] fs/smb/client/link.o
CC [M] crypto/ecc.o
CC kernel/events/uprobes.o
CC drivers/iommu/intel/cap_audit.o
CC lib/is_single_threaded.o
CC drivers/acpi/acpica/nsprepkg.o
CC arch/x86/kernel/probe_roms.o
CC drivers/base/core.o
CC drivers/base/bus.o
CC fs/nfs/export.o
CC drivers/acpi/acpica/nsrepair.o
CC fs/btrfs/file-item.o
CC [M] drivers/gpu/drm/display/drm_hdmi_helper.o
CC drivers/acpi/acpica/nsrepair2.o
CC [M] crypto/essiv.o
CC [M] crypto/ecdh.o
CC fs/super.o
CC kernel/signal.o
CC lib/klist.o
CC [M] fs/overlayfs/dir.o
CC drivers/acpi/acpica/nssearch.o
CC net/core/netprio_cgroup.o
CC [M] arch/x86/kvm/lapic.o
CC [M] net/netfilter/xt_tcpudp.o
CC [M] drivers/misc/mei/client.o
CC net/xfrm/xfrm_device.o
CC [M] fs/fscache/proc.o
CC drivers/base/power/wakeirq.o
CC [M] net/netfilter/xt_mark.o
CC fs/btrfs/inode-item.o
CC arch/x86/kernel/sys_ia32.o
CC [M] drivers/gpu/drm/tests/drm_framebuffer_test.o
CC kernel/trace/trace_events.o
CC fs/nfs/sysfs.o
CC [M] drivers/misc/mei/main.o
AR net/ethtool/built-in.a
CC fs/nfs/fs_context.o
CC drivers/acpi/acpica/nsutils.o
CC drivers/base/regmap/regcache-maple.o
CC lib/kobject.o
CC net/core/dst_cache.o
CC mm/memory_hotplug.o
CC drivers/char/nvram.o
CC [M] drivers/gpu/drm/display/drm_scdc_helper.o
CC [M] arch/x86/kvm/i8254.o
CC net/xfrm/xfrm_algo.o
CC [M] crypto/ecdh_helper.o
CC fs/char_dev.o
CC mm/madvise.o
CC net/ipv4/tcp_output.o
CC drivers/iommu/intel/irq_remapping.o
CC drivers/base/dd.o
AR crypto/built-in.a
CC drivers/base/syscore.o
CC [M] fs/fuse/control.o
CC drivers/base/power/main.o
LD [M] fs/fscache/fscache.o
CC [M] net/netfilter/xt_nat.o
CC [M] drivers/misc/mei/dma-ring.o
CC [M] drivers/gpu/drm/tests/drm_managed_test.o
CC drivers/acpi/acpica/nswalk.o
CC [M] net/netfilter/xt_REDIRECT.o
CC net/unix/af_unix.o
CC [M] fs/smb/client/misc.o
CC [M] drivers/misc/mei/bus.o
CC drivers/base/regmap/regmap-debugfs.o
AR net/ipv6/netfilter/built-in.a
CC arch/x86/kernel/signal_32.o
CC [M] fs/overlayfs/readdir.o
CC [M] net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
CC lib/kobject_uevent.o
CC net/ipv6/af_inet6.o
LD [M] crypto/ecdh_generic.o
AR drivers/char/built-in.a
CC [M] net/ipv6/netfilter/nf_conntrack_reasm.o
CC net/ipv4/tcp_timer.o
CC [M] drivers/gpu/drm/display/drm_dp_aux_dev.o
CC net/ipv6/anycast.o
CC net/ipv4/tcp_ipv4.o
AR kernel/events/built-in.a
CC [M] drivers/misc/mei/bus-fixup.o
CC fs/nfs/sysctl.o
CC [M] fs/overlayfs/copy_up.o
CC fs/ext4/super.o
CC drivers/acpi/acpica/nsxfeval.o
CC arch/x86/kernel/sys_x86_64.o
CC [M] drivers/gpu/drm/tests/drm_mm_test.o
CC net/core/gro_cells.o
CC drivers/mfd/mfd-core.o
CC drivers/mfd/intel-lpss.o
AR drivers/nfc/built-in.a
CC kernel/trace/trace_export.o
CC net/ipv4/tcp_minisocks.o
CC [M] fs/fuse/xattr.o
CC drivers/base/driver.o
CC net/xfrm/xfrm_user.o
CC fs/btrfs/disk-io.o
CC drivers/base/class.o
CC [M] fs/smb/client/netmisc.o
CC drivers/iommu/intel/perfmon.o
AR drivers/block/built-in.a
AR drivers/dax/hmem/built-in.a
CC drivers/dax/super.o
CC [M] drivers/misc/mei/debugfs.o
CC drivers/base/regmap/regmap-i2c.o
CC drivers/base/regmap/regmap-irq.o
CC drivers/dax/bus.o
CC drivers/acpi/acpica/nsxfname.o
CC mm/page_io.o
CC [M] fs/smb/client/smbencrypt.o
CC drivers/dma-buf/dma-buf.o
CC [M] net/netfilter/xt_MASQUERADE.o
CC arch/x86/kernel/espfix_64.o
CC drivers/dma-buf/dma-fence.o
CC arch/x86/kernel/ksysfs.o
LD [M] drivers/gpu/drm/display/drm_display_helper.o
CC drivers/mfd/intel-lpss-pci.o
CC drivers/base/platform.o
AR drivers/cxl/core/built-in.a
AR drivers/cxl/built-in.a
AR net/core/built-in.a
CC fs/nfs/nfs2super.o
CC net/unix/garbage.o
CC [M] fs/fuse/acl.o
CC [M] fs/fuse/readdir.o
CC fs/nfs/proc.o
CC net/packet/af_packet.o
CC lib/logic_pio.o
CC drivers/base/cpu.o
CC net/packet/diag.o
CC drivers/base/firmware.o
CC net/ipv4/tcp_cong.o
CC [M] drivers/misc/mei/mei-trace.o
CC drivers/acpi/acpica/nsxfobj.o
CC [M] fs/overlayfs/export.o
CC [M] fs/overlayfs/params.o
CC kernel/trace/trace_event_perf.o
CC net/ipv6/ip6_output.o
LD [M] net/ipv6/netfilter/nf_defrag_ipv6.o
CC net/ipv6/ip6_input.o
CC kernel/trace/trace_events_filter.o
CC [M] arch/x86/kvm/ioapic.o
CC drivers/base/power/wakeup.o
CC kernel/trace/trace_events_trigger.o
CC [M] fs/smb/client/transport.o
CC mm/swap_state.o
CC drivers/mfd/intel-lpss-acpi.o
CC drivers/acpi/processor_pdc.o
CC [M] fs/smb/client/cached_dir.o
CC net/ipv6/addrconf.o
CC lib/maple_tree.o
CC drivers/acpi/acpica/psargs.o
CC drivers/dma-buf/dma-fence-array.o
CC arch/x86/kernel/bootflag.o
CC drivers/dma-buf/dma-fence-chain.o
CC fs/stat.o
AR drivers/base/regmap/built-in.a
CC [M] arch/x86/kvm/irq_comm.o
AR drivers/iommu/intel/built-in.a
CC [M] fs/fuse/ioctl.o
AR drivers/iommu/arm/arm-smmu/built-in.a
AR drivers/dax/built-in.a
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
CC kernel/sys.o
AR drivers/iommu/arm/built-in.a
AR drivers/macintosh/built-in.a
CC kernel/umh.o
CC [M] net/netfilter/xt_addrtype.o
AR drivers/iommu/iommufd/built-in.a
CC drivers/scsi/scsi.o
CC drivers/iommu/iommu.o
CC arch/x86/kernel/e820.o
CC mm/swapfile.o
CC fs/nfs/nfs2xdr.o
CC net/key/af_key.o
CC [M] drivers/gpu/drm/tests/drm_modes_test.o
CC [M] fs/smb/client/cifs_unicode.o
CC fs/nfs/nfs3super.o
CC [M] drivers/gpu/drm/tests/drm_plane_helper_test.o
CC [M] drivers/misc/mei/pci-me.o
CC mm/swap_slots.o
CC [M] fs/smb/client/nterr.o
CC drivers/mfd/intel_soc_pmic_crc.o
LD [M] fs/overlayfs/overlay.o
CC drivers/acpi/acpica/psloop.o
CC net/ipv6/addrlabel.o
CC fs/exec.o
CC [M] arch/x86/kvm/cpuid.o
CC [M] drivers/gpu/drm/tests/drm_probe_helper_test.o
CC [M] arch/x86/kvm/pmu.o
CC fs/btrfs/transaction.o
CC net/unix/sysctl_net_unix.o
CC drivers/dma-buf/dma-fence-unwrap.o
CC [M] arch/x86/kvm/mtrr.o
CC [M] fs/smb/client/cifsencrypt.o
CC [M] arch/x86/kvm/hyperv.o
CC drivers/base/power/wakeup_stats.o
CC fs/pipe.o
LD [M] fs/fuse/fuse.o
CC drivers/acpi/acpica/psobject.o
CC kernel/trace/trace_eprobe.o
CC fs/btrfs/inode.o
CC fs/namei.o
CC arch/x86/kernel/pci-dma.o
CC arch/x86/kernel/quirks.o
CC net/unix/diag.o
CC kernel/trace/trace_kprobe.o
AR net/xfrm/built-in.a
CC [M] drivers/misc/mei/hw-me.o
CC fs/ext4/symlink.o
CC kernel/workqueue.o
CC [M] drivers/mfd/lpc_sch.o
AR net/bridge/netfilter/built-in.a
CC net/bridge/br.o
CC fs/nfs/nfs3client.o
CC net/ipv4/tcp_metrics.o
CC [M] arch/x86/kvm/debugfs.o
CC [M] drivers/gpu/drm/tests/drm_rect_test.o
CC drivers/dma-buf/dma-resv.o
CC drivers/iommu/iommu-traces.o
CC [M] net/netfilter/xt_conntrack.o
CC kernel/pid.o
CC [M] fs/smb/client/readdir.o
CC drivers/base/init.o
CC drivers/base/power/domain.o
AR net/dsa/built-in.a
CC net/unix/scm.o
CC [M] net/sunrpc/auth_gss/auth_gss.o
CC drivers/scsi/hosts.o
CC drivers/acpi/acpica/psopcode.o
CC [M] net/sunrpc/auth_gss/gss_generic_token.o
CC fs/nfs/nfs3proc.o
CC [M] drivers/mfd/lpc_ich.o
CC kernel/trace/error_report-traces.o
CC arch/x86/kernel/topology.o
CC fs/ext4/sysfs.o
CC drivers/iommu/iommu-sysfs.o
CC drivers/dma-buf/sync_file.o
CC [M] drivers/gpu/drm/tests/drm_exec_test.o
CC drivers/acpi/acpica/psopinfo.o
CC [M] fs/smb/client/ioctl.o
CC drivers/scsi/scsi_ioctl.o
CC drivers/scsi/scsicam.o
CC drivers/base/power/domain_governor.o
CC fs/ext4/xattr.o
CC net/sunrpc/clnt.o
CC drivers/iommu/dma-iommu.o
CC drivers/iommu/iova.o
AR drivers/mfd/built-in.a
CC fs/fcntl.o
CC drivers/dma-buf/sw_sync.o
CC arch/x86/kernel/kdebugfs.o
CC [M] net/sunrpc/auth_gss/gss_mech_switch.o
CC fs/ioctl.o
CC net/bridge/br_device.o
CC fs/readdir.o
CC [M] net/netfilter/xt_ipvs.o
CC fs/btrfs/file.o
CC drivers/acpi/acpica/psparse.o
AR net/unix/built-in.a
CC drivers/acpi/acpica/psscope.o
CC [M] fs/smb/client/sess.o
CC drivers/iommu/irq_remapping.o
CC [M] drivers/misc/mei/gsc-me.o
CC lib/memcat_p.o
LD [M] drivers/misc/mei/mei.o
CC kernel/task_work.o
CC [M] arch/x86/kvm/mmu/mmu.o
CC [M] arch/x86/kvm/mmu/page_track.o
CC kernel/extable.o
CC fs/select.o
CC drivers/base/power/clock_ops.o
AR net/packet/built-in.a
CC drivers/dma-buf/sync_debug.o
CC [M] fs/smb/client/export.o
AR net/key/built-in.a
AR drivers/gpu/drm/omapdrm/built-in.a
CC [M] fs/smb/client/unc.o
AR drivers/gpu/drm/tilcdc/built-in.a
CC drivers/scsi/scsi_error.o
AR drivers/gpu/drm/imx/built-in.a
CC drivers/scsi/scsi_lib.o
AR drivers/gpu/drm/i2c/built-in.a
AR drivers/gpu/drm/panel/built-in.a
CC mm/dmapool.o
AR drivers/gpu/drm/bridge/analogix/built-in.a
AR drivers/gpu/drm/bridge/cadence/built-in.a
CC net/ipv6/route.o
AR drivers/gpu/drm/bridge/imx/built-in.a
AR drivers/gpu/drm/bridge/synopsys/built-in.a
CC kernel/trace/power-traces.o
CC net/ipv4/tcp_fastopen.o
AR drivers/gpu/drm/bridge/built-in.a
CC lib/nmi_backtrace.o
CC arch/x86/kernel/alternative.o
AR drivers/gpu/drm/hisilicon/built-in.a
CC drivers/acpi/acpica/pstree.o
AR drivers/gpu/drm/mxsfb/built-in.a
AR drivers/gpu/drm/tiny/built-in.a
AR drivers/gpu/drm/xlnx/built-in.a
CC fs/ext4/xattr_hurd.o
CC kernel/trace/rpm-traces.o
AR drivers/gpu/drm/gud/built-in.a
AR drivers/gpu/drm/solomon/built-in.a
CC [M] drivers/gpu/drm/ttm/ttm_tt.o
CC [M] drivers/gpu/drm/scheduler/sched_main.o
CC fs/nfs/nfs3xdr.o
CC [M] drivers/gpu/drm/scheduler/sched_fence.o
CC fs/ext4/xattr_trusted.o
CC net/ipv6/ip6_fib.o
CC mm/hugetlb.o
CC arch/x86/kernel/i8253.o
LD [M] drivers/misc/mei/mei-me.o
LD [M] drivers/misc/mei/mei-gsc.o
CC drivers/nvme/host/core.o
CC mm/hugetlb_vmemmap.o
CC arch/x86/kernel/hw_breakpoint.o
CC [M] drivers/dma-buf/selftest.o
CC fs/dcache.o
AR drivers/base/power/built-in.a
CC drivers/base/map.o
CC fs/inode.o
CC drivers/acpi/acpica/psutils.o
AR drivers/nvme/target/built-in.a
CC drivers/nvme/host/ioctl.o
CC mm/mempolicy.o
CC [M] net/sunrpc/auth_gss/svcauth_gss.o
CC kernel/params.o
AR drivers/iommu/built-in.a
CC drivers/ata/libata-core.o
CC drivers/ata/libata-scsi.o
CC mm/sparse.o
LD [M] net/netfilter/nf_conntrack.o
CC mm/sparse-vmemmap.o
CC net/bridge/br_fdb.o
CC drivers/acpi/acpica/pswalk.o
LD [M] net/netfilter/nf_nat.o
CC drivers/spi/spi.o
AR net/netfilter/built-in.a
CC net/ipv6/ipv6_sockglue.o
CC drivers/net/phy/mdio-boardinfo.o
CC [M] net/sunrpc/auth_gss/gss_rpc_upcall.o
CC arch/x86/kernel/tsc.o
CC [M] net/sunrpc/auth_gss/gss_rpc_xdr.o
CC net/bridge/br_forward.o
CC drivers/base/devres.o
CC mm/mmu_notifier.o
CC [M] drivers/dma-buf/st-dma-fence.o
CC [M] drivers/gpu/drm/ttm/ttm_bo.o
CC drivers/acpi/acpica/psxface.o
CC arch/x86/kernel/tsc_msr.o
CC fs/ext4/xattr_user.o
CC drivers/base/attribute_container.o
CC mm/ksm.o
CC [M] net/sunrpc/auth_gss/trace.o
CC drivers/scsi/scsi_lib_dma.o
CC net/ipv4/tcp_rate.o
CC net/bridge/br_if.o
CC [M] drivers/gpu/drm/scheduler/sched_entity.o
CC kernel/trace/trace_dynevent.o
CC net/bridge/br_input.o
CC kernel/kthread.o
CC drivers/net/phy/stubs.o
CC net/ipv6/ndisc.o
CC drivers/nvme/host/sysfs.o
CC drivers/acpi/acpica/rsaddr.o
CC kernel/trace/trace_probe.o
CC [M] fs/smb/client/winucase.o
CC mm/slub.o
CC net/ipv4/tcp_recovery.o
CC [M] fs/smb/client/smb2ops.o
CC [M] drivers/dma-buf/st-dma-fence-chain.o
CC drivers/scsi/scsi_scan.o
CC drivers/base/transport_class.o
CC drivers/base/topology.o
CC drivers/net/phy/mdio_devres.o
CC arch/x86/kernel/io_delay.o
GEN drivers/scsi/scsi_devinfo_tbl.c
CC arch/x86/kernel/rtc.o
CC [M] fs/smb/client/smb2maperror.o
AR fs/nfs/built-in.a
CC drivers/nvme/host/pr.o
CC drivers/acpi/acpica/rscalc.o
CC [M] net/sunrpc/auth_gss/gss_krb5_mech.o
CC drivers/acpi/acpica/rscreate.o
CC [M] drivers/gpu/drm/ttm/ttm_bo_util.o
CC fs/btrfs/defrag.o
CC arch/x86/kernel/resource.o
CC [M] drivers/gpu/drm/ttm/ttm_bo_vm.o
AR drivers/firewire/built-in.a
CC net/sunrpc/xprt.o
CC fs/attr.o
CC lib/plist.o
CC [M] drivers/dma-buf/st-dma-fence-unwrap.o
CC net/sunrpc/socklib.o
CC [M] net/sunrpc/auth_gss/gss_krb5_seal.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.o
AS arch/x86/kernel/irqflags.o
CC lib/radix-tree.o
CC kernel/trace/trace_uprobe.o
CC kernel/trace/rethook.o
CC drivers/ata/libata-eh.o
CC net/ipv6/udp.o
CC drivers/acpi/acpica/rsdumpinfo.o
CC drivers/base/container.o
AR drivers/cdrom/built-in.a
CC net/ipv6/udplite.o
CC net/sunrpc/xprtsock.o
CC drivers/net/phy/phy.o
CC arch/x86/kernel/static_call.o
CC [M] drivers/gpu/drm/ttm/ttm_module.o
CC [M] net/sunrpc/auth_gss/gss_krb5_unseal.o
CC drivers/acpi/acpica/rsinfo.o
CC net/sunrpc/sched.o
AR drivers/auxdisplay/built-in.a
CC drivers/base/property.o
CC net/ipv6/raw.o
CC net/ipv4/tcp_ulp.o
CC [M] net/sunrpc/auth_gss/gss_krb5_wrap.o
CC fs/bad_inode.o
CC [M] arch/x86/kvm/mmu/spte.o
CC drivers/ata/libata-transport.o
CC drivers/scsi/scsi_devinfo.o
CC [M] drivers/dma-buf/st-dma-resv.o
CC net/bridge/br_ioctl.o
CC net/bridge/br_stp.o
CC net/sunrpc/auth.o
CC drivers/usb/common/common.o
CC drivers/input/serio/serio.o
CC drivers/acpi/ec.o
CC drivers/input/serio/i8042.o
CC lib/ratelimit.o
CC drivers/usb/common/debug.o
CC arch/x86/kernel/process.o
CC drivers/acpi/acpica/rsio.o
CC [M] drivers/gpu/drm/ttm/ttm_execbuf_util.o
CC net/sunrpc/auth_null.o
CC drivers/input/serio/libps2.o
CC [M] fs/smb/client/smb2transport.o
CC net/sunrpc/auth_tls.o
CC lib/rbtree.o
CC [M] net/sunrpc/auth_gss/gss_krb5_crypto.o
CC [M] arch/x86/kvm/mmu/tdp_iter.o
CC lib/seq_buf.o
AR drivers/dma-buf/built-in.a
LD [M] drivers/dma-buf/dmabuf_selftests.o
CC [M] net/sunrpc/auth_gss/gss_krb5_keys.o
LD [M] net/sunrpc/auth_gss/auth_rpcgss.o
CC drivers/acpi/acpica/rsirq.o
CC [M] arch/x86/kvm/mmu/tdp_mmu.o
CC drivers/acpi/dock.o
AR drivers/spi/built-in.a
CC net/bridge/br_stp_bpdu.o
CC drivers/nvme/host/trace.o
CC drivers/input/keyboard/atkbd.o
AR drivers/usb/common/built-in.a
CC drivers/scsi/scsi_sysctl.o
CC drivers/usb/core/usb.o
CC drivers/base/cacheinfo.o
CC drivers/rtc/lib.o
CC drivers/rtc/class.o
CC [M] drivers/gpu/drm/ttm/ttm_range_manager.o
AR drivers/input/mouse/built-in.a
CC fs/btrfs/extent_map.o
CC drivers/rtc/interface.o
CC net/ipv4/tcp_offload.o
CC drivers/scsi/scsi_debugfs.o
CC drivers/ata/libata-trace.o
CC drivers/rtc/nvmem.o
CC drivers/acpi/acpica/rslist.o
AR drivers/i2c/algos/built-in.a
CC [M] drivers/i2c/algos/i2c-algo-bit.o
CC lib/siphash.o
CC net/sunrpc/auth_unix.o
CC net/bridge/br_stp_if.o
CC drivers/net/phy/phy-c45.o
CC fs/ext4/fast_commit.o
CC drivers/ata/libata-sata.o
CC drivers/ata/libata-sff.o
AR kernel/trace/built-in.a
CC kernel/sys_ni.o
CC [M] drivers/gpu/drm/ttm/ttm_resource.o
AR drivers/input/serio/built-in.a
AR drivers/i3c/built-in.a
CC lib/string.o
CC [M] arch/x86/kvm/smm.o
CC net/sunrpc/svc.o
AR drivers/media/i2c/built-in.a
AR drivers/media/tuners/built-in.a
AR drivers/ptp/built-in.a
CC [M] drivers/ptp/ptp_clock.o
AR drivers/media/rc/keymaps/built-in.a
CC drivers/acpi/acpica/rsmemory.o
AR drivers/media/rc/built-in.a
AR drivers/media/common/b2c2/built-in.a
AR drivers/media/common/saa7146/built-in.a
CC arch/x86/kernel/ptrace.o
AR drivers/media/common/siano/built-in.a
CC drivers/nvme/host/fault_inject.o
CC drivers/nvme/host/pci.o
AR drivers/media/common/v4l2-tpg/built-in.a
AR drivers/net/pse-pd/built-in.a
LD [M] net/sunrpc/auth_gss/rpcsec_gss_krb5.o
AR drivers/media/common/videobuf2/built-in.a
CC net/bridge/br_stp_timer.o
CC drivers/net/mdio/acpi_mdio.o
AR drivers/media/common/built-in.a
CC drivers/rtc/dev.o
AR drivers/net/pcs/built-in.a
AR drivers/media/platform/allegro-dvt/built-in.a
CC drivers/rtc/proc.o
AR drivers/net/ethernet/adi/built-in.a
CC drivers/scsi/scsi_trace.o
AR drivers/media/platform/amphion/built-in.a
AR drivers/media/platform/amlogic/meson-ge2d/built-in.a
AR drivers/media/platform/amlogic/built-in.a
AR drivers/media/platform/aspeed/built-in.a
AR drivers/net/ethernet/alacritech/built-in.a
CC drivers/base/swnode.o
CC [M] drivers/gpu/drm/ttm/ttm_pool.o
AR drivers/net/ethernet/amazon/built-in.a
AR drivers/media/platform/atmel/built-in.a
AR drivers/media/platform/cadence/built-in.a
AR drivers/net/ethernet/aquantia/built-in.a
AR drivers/media/platform/chips-media/built-in.a
AR drivers/net/ethernet/asix/built-in.a
AR drivers/media/platform/intel/built-in.a
AR drivers/net/ethernet/cadence/built-in.a
AR drivers/media/platform/marvell/built-in.a
AR drivers/net/ethernet/broadcom/built-in.a
CC [M] drivers/net/ethernet/broadcom/b44.o
AR drivers/media/platform/mediatek/jpeg/built-in.a
AR drivers/media/platform/mediatek/mdp/built-in.a
AR drivers/input/keyboard/built-in.a
CC drivers/rtc/sysfs.o
CC drivers/usb/core/hub.o
CC drivers/input/input.o
AR drivers/power/reset/built-in.a
AR drivers/media/platform/mediatek/vcodec/common/built-in.a
CC [M] drivers/net/ethernet/broadcom/bnx2.o
CC drivers/power/supply/power_supply_core.o
AR drivers/media/platform/mediatek/vcodec/encoder/built-in.a
CC [M] drivers/net/ethernet/broadcom/cnic.o
AR drivers/media/platform/mediatek/vcodec/decoder/built-in.a
AR drivers/media/platform/mediatek/vcodec/built-in.a
CC [M] drivers/net/ethernet/broadcom/tg3.o
CC drivers/usb/core/hcd.o
AR drivers/media/platform/mediatek/vpu/built-in.a
AR drivers/media/platform/mediatek/mdp3/built-in.a
CC net/ipv4/tcp_plb.o
CC drivers/acpi/acpica/rsmisc.o
AR drivers/media/platform/mediatek/built-in.a
AR drivers/media/platform/microchip/built-in.a
CC drivers/net/phy/phy-core.o
AR drivers/media/platform/nvidia/tegra-vde/built-in.a
AR drivers/media/platform/nvidia/built-in.a
CC lib/timerqueue.o
CC kernel/nsproxy.o
CC drivers/i2c/busses/i2c-designware-common.o
AR drivers/media/platform/nxp/dw100/built-in.a
AR drivers/media/platform/nxp/imx-jpeg/built-in.a
AR drivers/media/platform/nxp/imx8-isi/built-in.a
AR drivers/media/platform/nxp/built-in.a
AR drivers/media/platform/qcom/camss/built-in.a
AR drivers/media/platform/qcom/venus/built-in.a
AR drivers/media/platform/qcom/built-in.a
AR drivers/media/platform/renesas/rcar-vin/built-in.a
AR drivers/media/platform/renesas/rzg2l-cru/built-in.a
AR drivers/media/platform/renesas/vsp1/built-in.a
AR drivers/media/platform/renesas/built-in.a
CC mm/migrate.o
CC net/bridge/br_netlink.o
CC [M] drivers/gpu/drm/ttm/ttm_device.o
AR drivers/media/platform/rockchip/rga/built-in.a
AR drivers/media/platform/rockchip/rkisp1/built-in.a
AR drivers/media/platform/rockchip/built-in.a
CC lib/vsprintf.o
AR drivers/media/platform/samsung/exynos-gsc/built-in.a
AR drivers/media/platform/samsung/exynos4-is/built-in.a
AR drivers/media/platform/samsung/s3c-camif/built-in.a
AR drivers/media/platform/samsung/s5p-g2d/built-in.a
CC net/ipv6/icmp.o
CC [M] drivers/gpu/drm/ttm/ttm_sys_manager.o
AR drivers/media/platform/samsung/s5p-jpeg/built-in.a
AR drivers/media/platform/st/sti/bdisp/built-in.a
CC net/ipv6/mcast.o
AR drivers/media/platform/samsung/s5p-mfc/built-in.a
AR drivers/media/platform/st/sti/c8sectpfe/built-in.a
CC drivers/net/mdio/fwnode_mdio.o
AR drivers/media/platform/samsung/built-in.a
AR drivers/media/platform/st/sti/delta/built-in.a
CC [M] drivers/gpu/drm/ttm/ttm_agp_backend.o
AR drivers/media/platform/st/sti/hva/built-in.a
CC [M] drivers/ptp/ptp_chardev.o
CC drivers/scsi/scsi_logging.o
AR drivers/media/platform/st/stm32/built-in.a
AR drivers/media/platform/sunxi/sun4i-csi/built-in.a
CC drivers/hwmon/hwmon.o
AR drivers/media/platform/st/built-in.a
AR drivers/media/platform/sunxi/sun6i-csi/built-in.a
CC [M] fs/smb/client/smb2misc.o
CC drivers/ata/libata-pmp.o
AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a
CC fs/btrfs/sysfs.o
AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a
CC [M] fs/smb/client/smb2pdu.o
AR drivers/media/platform/sunxi/sun8i-di/built-in.a
CC fs/ext4/orphan.o
CC drivers/ata/libata-acpi.o
AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a
CC net/sunrpc/svcsock.o
CC drivers/rtc/rtc-mc146818-lib.o
AR drivers/media/platform/sunxi/built-in.a
CC drivers/acpi/acpica/rsserial.o
CC drivers/base/auxiliary.o
AR drivers/media/platform/ti/am437x/built-in.a
AR drivers/media/platform/ti/cal/built-in.a
AR drivers/media/platform/verisilicon/built-in.a
AR drivers/media/platform/ti/vpe/built-in.a
AR drivers/media/platform/via/built-in.a
CC fs/btrfs/accessors.o
AR drivers/media/platform/ti/davinci/built-in.a
AR drivers/media/platform/ti/omap/built-in.a
CC [M] drivers/hwmon/acpi_power_meter.o
AR drivers/media/platform/xilinx/built-in.a
AR drivers/media/platform/ti/omap3isp/built-in.a
CC arch/x86/kernel/tls.o
CC arch/x86/kernel/step.o
AR drivers/media/platform/ti/built-in.a
AR drivers/media/platform/built-in.a
CC arch/x86/kernel/i8237.o
AR drivers/media/pci/ttpci/built-in.a
AR drivers/media/pci/b2c2/built-in.a
AR drivers/media/pci/pluto2/built-in.a
CC drivers/power/supply/power_supply_sysfs.o
AR drivers/media/pci/dm1105/built-in.a
CC drivers/power/supply/power_supply_leds.o
AR drivers/media/pci/pt1/built-in.a
AR drivers/media/pci/pt3/built-in.a
AR drivers/media/pci/mantis/built-in.a
AR drivers/media/pci/ngene/built-in.a
AR drivers/media/pci/ddbridge/built-in.a
CC drivers/scsi/scsi_pm.o
AR drivers/media/pci/saa7146/built-in.a
AR drivers/media/pci/smipcie/built-in.a
AR drivers/media/pci/netup_unidvb/built-in.a
CC drivers/net/phy/phy_device.o
AR drivers/media/pci/intel/ipu3/built-in.a
AR drivers/media/pci/intel/ivsc/built-in.a
AR drivers/media/pci/intel/built-in.a
AR drivers/media/pci/built-in.a
CC drivers/acpi/acpica/rsutils.o
AR drivers/net/usb/built-in.a
CC [M] drivers/net/usb/pegasus.o
CC drivers/i2c/busses/i2c-designware-master.o
CC net/ipv4/datagram.o
AR drivers/media/usb/b2c2/built-in.a
LD [M] drivers/gpu/drm/ttm/ttm.o
AR drivers/media/usb/dvb-usb/built-in.a
AR drivers/media/usb/dvb-usb-v2/built-in.a
CC net/8021q/vlan_core.o
AR drivers/media/usb/s2255/built-in.a
CC kernel/notifier.o
AR drivers/media/usb/siano/built-in.a
CC drivers/i2c/busses/i2c-designware-platdrv.o
AR drivers/media/usb/ttusb-budget/built-in.a
AR drivers/net/mdio/built-in.a
CC drivers/base/devtmpfs.o
AR drivers/media/usb/ttusb-dec/built-in.a
CC drivers/base/node.o
AR drivers/media/usb/built-in.a
CC drivers/rtc/rtc-cmos.o
AR drivers/media/mmc/siano/built-in.a
AR drivers/media/mmc/built-in.a
CC [M] drivers/net/usb/rtl8150.o
AR drivers/media/firewire/built-in.a
CC [M] arch/x86/kvm/vmx/vmx.o
AR drivers/media/spi/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o
AR drivers/media/test-drivers/built-in.a
CC [M] drivers/ptp/ptp_sysfs.o
AR drivers/media/built-in.a
AR drivers/thermal/broadcom/built-in.a
CC lib/win_minmax.o
CC lib/xarray.o
AR drivers/thermal/samsung/built-in.a
CC drivers/thermal/intel/intel_tcc.o
CC drivers/power/supply/power_supply_hwmon.o
CC [M] fs/smb/client/smb2inode.o
CC arch/x86/kernel/stacktrace.o
CC [M] arch/x86/kvm/kvm-asm-offsets.s
CC drivers/input/input-compat.o
CC drivers/acpi/acpica/rsxface.o
CC [M] arch/x86/kvm/vmx/pmu_intel.o
CC drivers/thermal/intel/therm_throt.o
AR fs/ext4/built-in.a
CC drivers/base/memory.o
CC drivers/ata/libata-pata-timings.o
CC fs/file.o
CC drivers/ata/ahci.o
CC [M] drivers/hwmon/coretemp.o
CC drivers/scsi/scsi_bsg.o
CC drivers/ata/libahci.o
CC drivers/ata/ata_piix.o
CC lib/lockref.o
CC fs/btrfs/xattr.o
CC net/ipv6/reassembly.o
AR drivers/nvme/host/built-in.a
AR drivers/power/supply/built-in.a
CC drivers/i2c/busses/i2c-designware-baytrail.o
AR drivers/nvme/built-in.a
CC mm/memory-tiers.o
AR drivers/power/built-in.a
CC net/sunrpc/svcauth.o
CC net/ipv4/raw.o
CC net/ipv4/udp.o
CC kernel/ksysfs.o
CC drivers/acpi/acpica/tbdata.o
CC drivers/input/input-mt.o
CC arch/x86/kernel/reboot.o
CC drivers/watchdog/watchdog_core.o
CC net/bridge/br_netlink_tunnel.o
CC [M] drivers/ptp/ptp_vclock.o
CC [M] fs/smb/client/smb2file.o
CC drivers/acpi/acpica/tbfadt.o
CC [M] fs/smb/client/cifsacl.o
AR drivers/rtc/built-in.a
CC net/dcb/dcbnl.o
CC drivers/base/module.o
CC drivers/scsi/scsi_common.o
CC [M] net/8021q/vlan.o
CC [M] drivers/net/usb/r8152.o
CC drivers/usb/core/urb.o
CC fs/btrfs/ordered-data.o
CC net/dcb/dcbevent.o
CC drivers/base/pinctrl.o
CC mm/migrate_device.o
AR drivers/hwmon/built-in.a
CC drivers/watchdog/watchdog_dev.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_device.o
CC kernel/cred.o
CC drivers/acpi/acpica/tbfind.o
CC drivers/acpi/acpica/tbinstal.o
CC [M] drivers/i2c/busses/i2c-scmi.o
CC [M] drivers/md/persistent-data/dm-array.o
CC drivers/md/md.o
CC drivers/scsi/sd.o
CC drivers/input/input-poller.o
CC drivers/md/md-bitmap.o
CC drivers/net/phy/linkmode.o
CC [M] drivers/ptp/ptp_kvm_x86.o
CC [M] drivers/md/persistent-data/dm-bitset.o
CC drivers/base/devcoredump.o
CC fs/btrfs/extent_io.o
CC lib/bcd.o
CC drivers/scsi/sg.o
CC arch/x86/kernel/msr.o
CC lib/sort.o
CC drivers/acpi/pci_root.o
CC drivers/acpi/acpica/tbprint.o
CC lib/parser.o
CC [M] drivers/i2c/busses/i2c-ccgx-ucsi.o
CC lib/debug_locks.o
CC arch/x86/kernel/cpuid.o
CC drivers/base/platform-msi.o
CC fs/filesystems.o
CC fs/namespace.o
AR drivers/thermal/intel/built-in.a
AR drivers/thermal/st/built-in.a
AR drivers/thermal/qcom/built-in.a
CC net/bridge/br_arp_nd_proxy.o
AR drivers/thermal/tegra/built-in.a
AR drivers/thermal/mediatek/built-in.a
CC net/ipv6/tcp_ipv6.o
CC drivers/thermal/thermal_core.o
CC drivers/usb/core/message.o
CC drivers/watchdog/softdog.o
CC fs/btrfs/volumes.o
AR drivers/ata/built-in.a
CC drivers/input/ff-core.o
CC drivers/input/touchscreen.o
CC drivers/input/ff-memless.o
CC drivers/acpi/acpica/tbutils.o
CC drivers/md/md-autodetect.o
CC drivers/net/phy/mdio_bus.o
CC [M] net/8021q/vlan_dev.o
CC [M] net/8021q/vlan_netlink.o
CC lib/random32.o
CC [M] drivers/ptp/ptp_kvm_common.o
CC drivers/net/phy/mdio_device.o
CC drivers/opp/core.o
CC drivers/input/vivaldi-fmap.o
CC kernel/reboot.o
CC [M] drivers/md/persistent-data/dm-block-manager.o
CC [M] drivers/i2c/busses/i2c-i801.o
CC drivers/base/physical_location.o
CC arch/x86/kernel/early-quirks.o
CC drivers/net/phy/swphy.o
AR drivers/watchdog/built-in.a
CC arch/x86/kernel/smp.o
CC drivers/cpufreq/cpufreq.o
CC arch/x86/kernel/smpboot.o
CC fs/seq_file.o
CC lib/bust_spinlocks.o
CC mm/huge_memory.o
CC drivers/acpi/acpica/tbxface.o
CC mm/khugepaged.o
CC fs/xattr.o
AR net/dcb/built-in.a
CC net/l3mdev/l3mdev.o
CC net/handshake/alert.o
CC [M] net/bluetooth/af_bluetooth.o
CC net/sunrpc/svcauth_unix.o
CC [M] net/bluetooth/hci_core.o
CC drivers/base/trace.o
CC drivers/opp/cpu.o
LD [M] drivers/ptp/ptp.o
CC drivers/input/input-leds.o
LD [M] drivers/ptp/ptp_kvm.o
CC [M] net/dns_resolver/dns_key.o
CC drivers/acpi/acpica/tbxfload.o
CC [M] fs/smb/client/fs_context.o
CC [M] drivers/md/persistent-data/dm-space-map-common.o
CC [M] drivers/md/persistent-data/dm-space-map-disk.o
CC drivers/net/phy/fixed_phy.o
CC mm/page_counter.o
CC fs/btrfs/async-thread.o
CC drivers/cpuidle/governors/menu.o
CC lib/kasprintf.o
CC net/bridge/br_sysfs_if.o
CC drivers/cpuidle/governors/haltpoll.o
CC drivers/cpuidle/cpuidle.o
CC kernel/async.o
CC [M] net/8021q/vlanproc.o
CC [M] fs/smb/client/dns_resolve.o
CC drivers/input/mousedev.o
CC drivers/acpi/acpica/tbxfroot.o
CC arch/x86/kernel/tsc_sync.o
CC drivers/thermal/thermal_sysfs.o
CC drivers/acpi/acpica/utaddress.o
CC [M] drivers/net/phy/phylink.o
CC lib/bitmap.o
CC drivers/usb/core/driver.o
CC [M] net/dns_resolver/dns_query.o
CC net/ipv4/udplite.o
AR drivers/base/built-in.a
CC fs/libfs.o
AR net/l3mdev/built-in.a
CC [M] drivers/i2c/busses/i2c-isch.o
CC drivers/mmc/core/core.o
CC net/devres.o
AR drivers/ufs/built-in.a
CC drivers/md/dm-uevent.o
CC drivers/mmc/core/bus.o
CC [M] drivers/md/persistent-data/dm-space-map-metadata.o
CC drivers/scsi/scsi_sysfs.o
CC drivers/opp/debugfs.o
CC kernel/range.o
CC drivers/md/dm.o
CC [M] drivers/gpu/drm/amd/amdxcp/amdgpu_xcp_drv.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.o
CC net/socket.o
CC kernel/smpboot.o
CC drivers/acpi/acpica/utalloc.o
CC net/handshake/genl.o
CC [M] drivers/md/persistent-data/dm-transaction-manager.o
AR drivers/cpuidle/governors/built-in.a
CC arch/x86/kernel/setup_percpu.o
CC drivers/mmc/host/sdhci.o
CC [M] drivers/gpu/drm/i915/i915_driver.o
CC drivers/thermal/thermal_trip.o
LD [M] net/dns_resolver/dns_resolver.o
CC net/sunrpc/addr.o
AR net/8021q/built-in.a
LD [M] net/8021q/8021q.o
LD [M] drivers/gpu/drm/amd/amdxcp/amdxcp.o
CC drivers/cpuidle/driver.o
CC drivers/input/evdev.o
CC [M] drivers/net/ipvlan/ipvlan_core.o
CC arch/x86/kernel/ftrace.o
CC fs/btrfs/ioctl.o
CC net/handshake/netlink.o
CC drivers/cpufreq/freq_table.o
CC drivers/acpi/acpica/utascii.o
CC net/bridge/br_sysfs_br.o
CC drivers/md/dm-table.o
AR drivers/opp/built-in.a
CC [M] drivers/gpu/drm/xe/tests/xe_bo_test.o
CC net/bridge/br_nf_core.o
CC net/handshake/request.o
CC [M] drivers/i2c/busses/i2c-ismt.o
CC net/ipv4/udp_offload.o
CC [M] drivers/gpu/drm/xe/tests/xe_dma_buf_test.o
CC net/ipv6/ping.o
CC kernel/ucount.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_kms.o
CC lib/scatterlist.o
ASN.1 fs/smb/client/cifs_spnego_negtokeninit.asn1.[ch]
CC drivers/cpufreq/cpufreq_performance.o
CC drivers/mmc/core/host.o
CC drivers/thermal/thermal_helpers.o
CC drivers/usb/core/config.o
CC net/handshake/tlshd.o
CC [M] fs/smb/client/namespace.o
CC [M] drivers/md/persistent-data/dm-btree.o
CC drivers/cpuidle/governor.o
CC drivers/acpi/acpica/utbuffer.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.o
CC [M] drivers/gpu/drm/xe/tests/xe_migrate_test.o
CC drivers/usb/core/file.o
CC drivers/thermal/thermal_hwmon.o
CC [M] drivers/i2c/busses/i2c-piix4.o
CC fs/fs-writeback.o
AR drivers/leds/trigger/built-in.a
CC [M] drivers/leds/trigger/ledtrig-audio.o
CC [M] net/bluetooth/hci_conn.o
CC drivers/cpufreq/cpufreq_ondemand.o
AR drivers/scsi/built-in.a
CC kernel/regset.o
AS arch/x86/kernel/ftrace_64.o
AR drivers/firmware/arm_ffa/built-in.a
AR drivers/firmware/arm_scmi/built-in.a
CC arch/x86/kernel/trace_clock.o
AR drivers/firmware/broadcom/built-in.a
CC arch/x86/kernel/trace.o
CC drivers/cpuidle/sysfs.o
CC net/sunrpc/rpcb_clnt.o
AR drivers/firmware/cirrus/built-in.a
CC drivers/acpi/acpica/utcksum.o
AR drivers/firmware/meson/built-in.a
CC [M] drivers/gpu/drm/xe/tests/xe_pci_test.o
CC drivers/firmware/efi/efi-bgrt.o
CC drivers/firmware/efi/libstub/efi-stub-helper.o
AR drivers/leds/blink/built-in.a
AR drivers/leds/simple/built-in.a
CC drivers/leds/led-core.o
AR drivers/input/built-in.a
CC fs/pnode.o
CC [M] drivers/net/ipvlan/ipvlan_main.o
CC arch/x86/kernel/rethook.o
CC drivers/thermal/gov_fair_share.o
CC arch/x86/kernel/crash_core_64.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_crtc.o
CC kernel/ksyms_common.o
CC [M] arch/x86/kvm/vmx/vmcs12.o
CC [M] arch/x86/kvm/vmx/hyperv.o
CC [M] drivers/net/phy/aquantia_main.o
CC drivers/mmc/core/mmc.o
CC fs/btrfs/locking.o
CC net/ipv6/exthdrs.o
CC drivers/acpi/acpica/utcopy.o
AR drivers/i2c/muxes/built-in.a
CC net/bridge/br_multicast.o
CC [M] drivers/i2c/muxes/i2c-mux-gpio.o
CC lib/list_sort.o
CC arch/x86/kernel/module.o
CC [M] arch/x86/kvm/vmx/nested.o
CC [M] drivers/gpu/drm/i915/i915_drm_client.o
CC lib/uuid.o
CC net/handshake/trace.o
CC drivers/usb/core/buffer.o
CC drivers/cpufreq/cpufreq_governor.o
CC drivers/cpuidle/poll_state.o
CC mm/memcontrol.o
CC [M] arch/x86/kvm/vmx/posted_intr.o
LD [M] arch/x86/kvm/kvm.o
CC [M] fs/smb/client/smb1ops.o
CC drivers/thermal/gov_step_wise.o
CC [M] drivers/gpu/drm/i915/i915_config.o
CC net/ipv4/arp.o
CC [M] drivers/md/persistent-data/dm-btree-remove.o
CC [M] drivers/i2c/busses/i2c-designware-pcidrv.o
CC [M] drivers/net/usb/asix_devices.o
CC net/sunrpc/timer.o
CC drivers/cpuidle/cpuidle-haltpoll.o
CC [M] drivers/gpu/drm/xe/tests/xe_rtp_test.o
CC lib/iov_iter.o
CC drivers/leds/led-class.o
CC net/ipv6/datagram.o
CC drivers/firmware/efi/libstub/gop.o
AR drivers/net/ethernet/cavium/common/built-in.a
CC kernel/groups.o
AR drivers/net/ethernet/cavium/thunder/built-in.a
AR drivers/net/ethernet/cavium/liquidio/built-in.a
AR drivers/net/ethernet/cavium/octeon/built-in.a
CC drivers/firmware/efi/libstub/secureboot.o
AR drivers/net/ethernet/cavium/built-in.a
AR drivers/net/ethernet/cortina/built-in.a
CC mm/vmpressure.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.o
CC drivers/firmware/efi/libstub/tpm.o
CC drivers/acpi/acpica/utexcep.o
CC net/sunrpc/xdr.o
CC [M] fs/smb/client/cifssmb.o
CC drivers/leds/led-triggers.o
CC drivers/thermal/gov_user_space.o
CC drivers/md/dm-target.o
CC arch/x86/kernel/early_printk.o
AR drivers/cpuidle/built-in.a
AR drivers/crypto/stm32/built-in.a
CC drivers/usb/core/sysfs.o
AR drivers/crypto/xilinx/built-in.a
CC drivers/mmc/core/mmc_ops.o
AR drivers/crypto/hisilicon/built-in.a
CC [M] drivers/net/phy/aquantia_hwmon.o
CC drivers/cpufreq/cpufreq_governor_attr_set.o
CC [M] drivers/net/phy/ax88796b.o
AR drivers/crypto/intel/keembay/built-in.a
AR drivers/crypto/intel/ixp4xx/built-in.a
AR drivers/crypto/intel/built-in.a
AR drivers/crypto/starfive/built-in.a
AR drivers/crypto/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/atom.o
CC drivers/acpi/pci_link.o
CC drivers/acpi/acpica/utdebug.o
CC drivers/usb/core/endpoint.o
CC drivers/acpi/pci_irq.o
CC [M] drivers/md/persistent-data/dm-btree-spine.o
CC [M] drivers/gpu/drm/i915/i915_getparam.o
LD [M] drivers/i2c/busses/i2c-designware-pci.o
CC [M] drivers/gpu/drm/xe/tests/xe_wa_test.o
CC mm/swap_cgroup.o
AR drivers/i2c/busses/built-in.a
CC arch/x86/kernel/hpet.o
CC drivers/i2c/i2c-boardinfo.o
AR drivers/thermal/built-in.a
CC kernel/vhost_task.o
CC fs/btrfs/orphan.o
CC drivers/mmc/core/sd.o
CC [M] drivers/net/ipvlan/ipvlan_l3s.o
CC drivers/acpi/acpica/utdecode.o
CC net/sunrpc/sunrpc_syms.o
CC mm/hugetlb_cgroup.o
CC drivers/firmware/efi/libstub/file.o
CC kernel/kcmp.o
CC drivers/cpufreq/acpi-cpufreq.o
CC drivers/mmc/host/sdhci-pci-core.o
CC net/ipv4/icmp.o
CC drivers/acpi/acpica/utdelete.o
AR drivers/leds/built-in.a
CC drivers/firmware/efi/libstub/mem.o
AR net/handshake/built-in.a
CC net/compat.o
CC [M] drivers/net/usb/asix_common.o
CC net/sunrpc/cache.o
UPD arch/x86/kvm/kvm-asm-offsets.h
CC drivers/i2c/i2c-core-base.o
CC [M] drivers/net/phy/bcm7xxx.o
CC arch/x86/kernel/amd_nb.o
CC drivers/mmc/host/sdhci-pci-o2micro.o
CC kernel/freezer.o
CC drivers/mmc/core/sd_ops.o
CC drivers/clocksource/acpi_pm.o
CC drivers/acpi/acpica/uterror.o
CC drivers/usb/core/devio.o
LD [M] drivers/md/persistent-data/dm-persistent-data.o
CC drivers/acpi/acpi_lpss.o
CC drivers/acpi/acpica/uteval.o
CC drivers/acpi/acpica/utglobal.o
CC drivers/usb/core/notify.o
CC [M] fs/smb/client/cifs_spnego_negtokeninit.asn1.o
CC lib/clz_ctz.o
CC [M] net/bluetooth/hci_event.o
CC drivers/clocksource/i8253.o
AR drivers/usb/phy/built-in.a
CC drivers/hid/hid-core.o
CC drivers/hid/usbhid/hid-core.o
CC lib/bsearch.o
CC net/ipv6/ip6_flowlabel.o
AR drivers/staging/media/built-in.a
AR drivers/staging/built-in.a
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC drivers/hid/usbhid/hiddev.o
AR drivers/platform/x86/amd/built-in.a
CC drivers/firmware/efi/libstub/random.o
CC drivers/platform/x86/intel/pmc/core.o
CC [M] drivers/gpu/drm/i915/i915_ioctl.o
CC drivers/md/dm-linear.o
CC [M] drivers/platform/x86/intel/pmt/class.o
CC [M] net/bluetooth/mgmt.o
CC drivers/mailbox/mailbox.o
CC fs/btrfs/export.o
AR drivers/platform/surface/built-in.a
CC [M] fs/smb/client/asn1.o
CC lib/find_bit.o
CC drivers/firmware/efi/libstub/randomalloc.o
LD [M] drivers/net/ipvlan/ipvlan.o
CC drivers/acpi/acpica/uthex.o
CC drivers/mailbox/pcc.o
CC drivers/devfreq/devfreq.o
AR drivers/clocksource/built-in.a
CC drivers/cpufreq/intel_pstate.o
CC lib/llist.o
CC arch/x86/kernel/kvm.o
CC drivers/platform/x86/intel/pmc/core_ssram.o
CC [M] net/bluetooth/hci_sock.o
CC kernel/stacktrace.o
CC [M] drivers/net/phy/bcm87xx.o
CC [M] drivers/net/phy/bcm-phy-lib.o
CC [M] drivers/devfreq/governor_simpleondemand.o
CC drivers/mmc/core/sdio.o
CC drivers/mmc/host/sdhci-pci-arasan.o
CC [M] drivers/devfreq/governor_performance.o
CC [M] drivers/net/usb/ax88172a.o
CC drivers/mmc/host/sdhci-pci-dwc-mshc.o
CC drivers/mmc/core/sdio_ops.o
CC net/sysctl_net.o
CC drivers/acpi/acpica/utids.o
CC drivers/md/dm-stripe.o
CC lib/memweight.o
CC lib/kfifo.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
AR drivers/net/ethernet/engleder/built-in.a
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
AR drivers/net/ethernet/ezchip/built-in.a
CC [M] drivers/platform/x86/intel/pmt/telemetry.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fence.o
AR drivers/net/ethernet/fungible/built-in.a
AR drivers/net/ethernet/huawei/built-in.a
CC [M] drivers/net/ethernet/intel/e1000/e1000_main.o
AR drivers/net/ethernet/i825xx/built-in.a
CC fs/splice.o
CC drivers/firmware/efi/libstub/pci.o
CC drivers/platform/x86/intel/pmc/spt.o
AR drivers/net/ethernet/microsoft/built-in.a
CC lib/percpu-refcount.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.o
CC drivers/firmware/efi/libstub/skip_spaces.o
AR drivers/mailbox/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_object.o
CC drivers/usb/core/generic.o
CC [M] drivers/gpu/drm/i915/i915_irq.o
CC drivers/platform/x86/intel/turbo_max_3.o
CC kernel/dma.o
CC drivers/platform/x86/intel/pmc/cnp.o
CC [M] drivers/net/phy/broadcom.o
CC drivers/acpi/acpica/utinit.o
CC net/ipv4/devinet.o
CC drivers/mmc/host/sdhci-pci-gli.o
CC fs/btrfs/tree-log.o
CC net/sunrpc/rpc_pipe.o
CC [M] drivers/net/phy/lxt.o
CC drivers/usb/core/quirks.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gart.o
CC net/ipv6/inet6_connection_sock.o
CC drivers/firmware/efi/efi.o
AS [M] arch/x86/kvm/vmx/vmenter.o
AR drivers/hid/usbhid/built-in.a
CC drivers/mmc/core/sdio_bus.o
CC drivers/mmc/core/sdio_cis.o
CC [M] drivers/platform/x86/intel/pmt/crashlog.o
CC lib/rhashtable.o
CC [M] drivers/net/usb/ax88179_178a.o
CC drivers/i2c/i2c-core-smbus.o
CC kernel/smp.o
CC drivers/md/dm-ioctl.o
CC drivers/i2c/i2c-core-acpi.o
CC drivers/firmware/efi/libstub/lib-cmdline.o
CC arch/x86/kernel/kvmclock.o
CC drivers/platform/x86/intel/pmc/icl.o
CC lib/base64.o
CC drivers/i2c/i2c-core-slave.o
CC arch/x86/kernel/paravirt.o
CC drivers/acpi/acpica/utlock.o
CC drivers/hid/hid-input.o
CC drivers/acpi/acpi_apd.o
CC drivers/usb/core/devices.o
CC drivers/firmware/efi/libstub/lib-ctype.o
CC drivers/usb/core/phy.o
CC lib/once.o
CC drivers/firmware/efi/libstub/alignedmem.o
AR drivers/devfreq/built-in.a
CC drivers/powercap/powercap_sys.o
CC drivers/powercap/intel_rapl_common.o
CC drivers/hid/hid-quirks.o
CC drivers/usb/core/port.o
CC drivers/platform/x86/intel/pmc/tgl.o
CC drivers/acpi/acpica/utmath.o
CC [M] drivers/net/phy/realtek.o
CC [M] drivers/net/phy/smsc.o
CC lib/refcount.o
CC lib/rcuref.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC net/bridge/br_mdb.o
CC drivers/mmc/core/sdio_io.o
LD [M] drivers/platform/x86/intel/pmt/pmt_class.o
CC fs/sync.o
LD [M] drivers/platform/x86/intel/pmt/pmt_telemetry.o
LD [M] drivers/platform/x86/intel/pmt/pmt_crashlog.o
CC mm/kmemleak.o
CC drivers/acpi/acpica/utmisc.o
CC drivers/platform/x86/p2sb.o
AR drivers/cpufreq/built-in.a
CC drivers/acpi/acpica/utmutex.o
CC arch/x86/kernel/pvclock.o
CC drivers/firmware/efi/libstub/relocate.o
LD [M] fs/smb/client/cifs.o
CC drivers/acpi/acpica/utnonansi.o
AR drivers/perf/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.o
CC net/ipv6/udp_offload.o
AR drivers/firmware/imx/built-in.a
AR drivers/firmware/psci/built-in.a
CC fs/btrfs/free-space-cache.o
CC drivers/platform/x86/pmc_atom.o
CC drivers/i2c/i2c-dev.o
CC net/bridge/br_multicast_eht.o
CC drivers/usb/core/hcd-pci.o
CC drivers/acpi/acpi_platform.o
CC [M] drivers/i2c/i2c-smbus.o
CC drivers/acpi/acpica/utobject.o
CC drivers/ras/ras.o
CC [M] drivers/gpu/drm/i915/i915_mitigations.o
CC drivers/platform/x86/intel/pmc/adl.o
CC drivers/mmc/host/sdhci-acpi.o
CC drivers/powercap/intel_rapl_msr.o
AR drivers/hwtracing/intel_th/built-in.a
CC fs/utimes.o
CC [M] drivers/i2c/i2c-mux.o
CC net/bridge/br_vlan.o
CC drivers/acpi/acpica/utosi.o
CC drivers/usb/core/usb-acpi.o
CC kernel/uid16.o
CC net/sunrpc/sysfs.o
CC lib/usercopy.o
CC [M] drivers/net/usb/cdc_ether.o
CC fs/btrfs/zlib.o
CC [M] drivers/gpu/drm/xe/xe_device.o
AR drivers/firmware/smccc/built-in.a
CC drivers/firmware/efi/vars.o
CC arch/x86/kernel/pcspeaker.o
CC drivers/ras/debugfs.o
CC [M] drivers/gpu/drm/i915/i915_module.o
LD [M] arch/x86/kvm/kvm-intel.o
CC drivers/platform/x86/intel/pmc/mtl.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_display.o
CC drivers/firmware/efi/libstub/printk.o
CC drivers/platform/x86/intel/pmc/pltdrv.o
CC [M] drivers/platform/x86/wmi.o
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
CC drivers/md/dm-io.o
CC drivers/mmc/core/sdio_irq.o
CC drivers/md/dm-kcopyd.o
CC [M] drivers/net/usb/cdc_eem.o
CC drivers/firmware/efi/libstub/vsprintf.o
CC [M] drivers/gpu/drm/i915/i915_params.o
AR drivers/firmware/tegra/built-in.a
AR drivers/firmware/xilinx/built-in.a
CC lib/errseq.o
LD [M] drivers/net/phy/aquantia.o
CC lib/bucket_locks.o
AR drivers/net/phy/built-in.a
CC drivers/acpi/acpica/utownerid.o
CC [M] drivers/net/vxlan/vxlan_core.o
AR drivers/powercap/built-in.a
CC drivers/acpi/acpica/utpredef.o
CC [M] net/bluetooth/hci_sysfs.o
CC arch/x86/kernel/check.o
CC drivers/acpi/acpi_pnp.o
CC [M] drivers/net/usb/smsc75xx.o
CC drivers/firmware/efi/libstub/x86-stub.o
CC drivers/android/binderfs.o
CC drivers/android/binder.o
CC drivers/mmc/core/slot-gpio.o
CC drivers/acpi/acpica/utresdecode.o
CC net/ipv6/seg6.o
CC drivers/android/binder_alloc.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC drivers/mmc/host/cqhci-core.o
CC [M] drivers/gpu/drm/xe/xe_drm_client.o
AR drivers/usb/core/built-in.a
CC net/ipv4/af_inet.o
AR drivers/ras/built-in.a
AR drivers/i2c/built-in.a
CC drivers/usb/host/pci-quirks.o
CC drivers/acpi/acpica/utresrc.o
CC drivers/usb/storage/scsiglue.o
CC mm/page_isolation.o
CC drivers/usb/storage/protocol.o
CC [M] drivers/gpu/drm/i915/i915_pci.o
AR drivers/platform/x86/intel/pmc/built-in.a
CC [M] drivers/platform/x86/intel/vsec.o
CC drivers/md/dm-sysfs.o
CC kernel/kallsyms.o
CC lib/generic-radix-tree.o
CC net/ipv4/igmp.o
AR drivers/nvmem/layouts/built-in.a
CC drivers/nvmem/core.o
CC drivers/usb/storage/transport.o
CC drivers/acpi/acpica/utstate.o
CC drivers/mmc/core/regulator.o
CC drivers/acpi/power.o
CC net/bridge/br_vlan_tunnel.o
CC net/sunrpc/svc_xprt.o
CC [M] drivers/net/ethernet/intel/e1000/e1000_hw.o
AR drivers/net/ethernet/litex/built-in.a
CC arch/x86/kernel/uprobes.o
CC [M] drivers/gpu/drm/i915/i915_scatterlist.o
CC net/sunrpc/xprtmultipath.o
CC [M] drivers/gpu/drm/i915/i915_suspend.o
CC drivers/hid/hid-debug.o
CC [M] drivers/net/ethernet/intel/e1000/e1000_ethtool.o
CC kernel/acct.o
CC [M] drivers/mtd/chips/chipreg.o
CC [M] drivers/net/ethernet/intel/e1000/e1000_param.o
CC [M] drivers/uio/uio.o
CC [M] drivers/gpu/drm/vgem/vgem_drv.o
CC drivers/mmc/core/debugfs.o
CC lib/string_helpers.o
CC drivers/firmware/efi/libstub/x86-5lvl.o
CC [M] drivers/gpu/drm/vgem/vgem_fence.o
CC drivers/acpi/acpica/utstring.o
STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o
STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o
STUBCPY drivers/firmware/efi/libstub/file.stub.o
STUBCPY drivers/firmware/efi/libstub/gop.stub.o
STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o
CC [M] net/bluetooth/l2cap_core.o
STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o
CC drivers/usb/storage/usb.o
CC [M] drivers/platform/x86/wmi-bmof.o
CC [M] drivers/platform/x86/intel/rst.o
CC drivers/usb/storage/initializers.o
CC net/ipv6/fib6_notifier.o
CC drivers/usb/host/ehci-hcd.o
CC drivers/md/dm-stats.o
CC drivers/mmc/core/block.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_i2c.o
CC [M] drivers/mtd/mtdcore.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gem.o
CC drivers/acpi/acpica/utstrsuppt.o
LD [M] drivers/platform/x86/intel/intel_vsec.o
CC mm/early_ioremap.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC net/ipv6/rpl.o
CC arch/x86/kernel/perf_regs.o
CC [M] drivers/mmc/host/sdhci-pltfm.o
STUBCPY drivers/firmware/efi/libstub/mem.stub.o
STUBCPY drivers/firmware/efi/libstub/pci.stub.o
STUBCPY drivers/firmware/efi/libstub/printk.stub.o
CC [M] drivers/net/usb/smsc95xx.o
STUBCPY drivers/firmware/efi/libstub/random.stub.o
STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o
CC mm/cma.o
STUBCPY drivers/firmware/efi/libstub/relocate.stub.o
CC [M] drivers/gpu/drm/i915/i915_switcheroo.o
AR drivers/nvmem/built-in.a
STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o
CC net/bridge/br_vlan_options.o
STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o
STUBCPY drivers/firmware/efi/libstub/tpm.stub.o
CC net/ipv6/ioam6.o
CC lib/hexdump.o
STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o
LD [M] drivers/gpu/drm/vgem/vgem.o
STUBCPY drivers/firmware/efi/libstub/x86-5lvl.stub.o
CC mm/secretmem.o
STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o
AR drivers/platform/x86/intel/built-in.a
AR drivers/firmware/efi/libstub/lib.a
CC drivers/firmware/efi/reboot.o
LD [M] drivers/platform/x86/intel/intel-rst.o
CC mm/userfaultfd.o
CC drivers/hid/hidraw.o
CC drivers/acpi/event.o
CC kernel/crash_core.o
CC [M] drivers/platform/x86/mxm-wmi.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ring.o
CC net/sunrpc/stats.o
CC drivers/hid/hid-generic.o
CC drivers/usb/serial/usb-serial.o
CC [M] drivers/gpu/drm/nouveau/nvif/object.o
CC lib/kstrtox.o
AR drivers/usb/misc/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvif/client.o
CC drivers/acpi/acpica/utstrtoul64.o
CC drivers/acpi/acpica/utxface.o
CC net/sunrpc/sysctl.o
CC drivers/usb/serial/generic.o
CC fs/btrfs/lzo.o
CC arch/x86/kernel/tracepoint.o
CC drivers/usb/storage/sierra_ms.o
CC [M] drivers/net/vxlan/vxlan_multicast.o
CC mm/memremap.o
CC drivers/acpi/acpica/utxfinit.o
CC [M] drivers/platform/x86/intel_ips.o
CC drivers/firmware/efi/memattr.o
AR drivers/mmc/host/built-in.a
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
CC net/ipv6/sysctl_net_ipv6.o
CC net/ipv4/fib_frontend.o
CC lib/debug_info.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_cs.o
CC fs/btrfs/zstd.o
CC arch/x86/kernel/itmt.o
CC [M] net/bluetooth/l2cap_sock.o
CC [M] drivers/net/vxlan/vxlan_vnifilter.o
CC [M] drivers/vfio/vfio_main.o
CC drivers/hid/hid-a4tech.o
CC [M] drivers/vfio/pci/vfio_pci_core.o
CC drivers/acpi/evged.o
CC [M] drivers/vfio/iova_bitmap.o
CC drivers/acpi/sysfs.o
CC kernel/compat.o
CC [M] drivers/vfio/pci/vfio_pci_intrs.o
CC drivers/md/dm-rq.o
CC [M] drivers/gpu/drm/i915/i915_sysfs.o
CC [M] drivers/mtd/mtdsuper.o
CC drivers/acpi/acpica/utxferror.o
CC drivers/usb/host/ehci-pci.o
AR drivers/net/ethernet/microchip/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvif/conn.o
CC drivers/usb/gadget/udc/core.o
CC [M] drivers/usb/class/usbtmc.o
CC [M] drivers/net/usb/mcs7830.o
CC drivers/usb/storage/option_ms.o
CC [M] drivers/vfio/group.o
CC drivers/firmware/efi/tpm.o
CC drivers/usb/serial/bus.o
CC net/ipv4/fib_semantics.o
LD [M] drivers/net/ethernet/intel/e1000/e1000.o
CC net/bridge/br_mst.o
CC drivers/hid/hid-apple.o
CC arch/x86/kernel/umip.o
CC drivers/mmc/core/queue.o
CC [M] drivers/net/ethernet/intel/e1000e/82571.o
CC arch/x86/kernel/unwind_orc.o
CC arch/x86/kernel/callthunks.o
CC drivers/gpu/drm/drm_mipi_dsi.o
CC drivers/acpi/acpica/utxfmutex.o
CC [M] drivers/gpu/drm/ast/ast_drv.o
CC [M] drivers/net/ethernet/intel/e1000e/ich8lan.o
CC arch/x86/kernel/cet.o
CC fs/btrfs/compression.o
CC drivers/hid/hid-belkin.o
CC mm/hmm.o
CC [M] drivers/gpu/drm/ast/ast_i2c.o
AR drivers/platform/x86/built-in.a
AR drivers/platform/built-in.a
CC [M] drivers/mtd/mtdconcat.o
CC [M] drivers/gpu/drm/ast/ast_main.o
AR net/sunrpc/built-in.a
CC lib/iomap.o
CC [M] net/bridge/br_netfilter_hooks.o
CC kernel/utsname.o
CC mm/memfd.o
CC [M] drivers/gpu/drm/i915/i915_utils.o
CC net/ipv6/xfrm6_policy.o
CC drivers/usb/storage/usual-tables.o
CC [M] drivers/gpu/drm/nouveau/nvif/device.o
CC drivers/md/dm-io-rewind.o
CC [M] drivers/net/ethernet/intel/igb/igb_main.o
AR drivers/acpi/acpica/built-in.a
CC lib/pci_iomap.o
CC drivers/usb/serial/console.o
CC drivers/acpi/property.o
CC drivers/firmware/efi/memmap.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC [M] drivers/vfio/container.o
CC [M] drivers/net/usb/usbnet.o
CC mm/bootmem_info.o
CC [M] drivers/vfio/virqfd.o
CC kernel/user_namespace.o
CC fs/btrfs/delayed-ref.o
CC lib/iomap_copy.o
CC [M] drivers/net/vxlan/vxlan_mdb.o
AR drivers/net/ethernet/mscc/built-in.a
CC arch/x86/kernel/mmconf-fam10h_64.o
CC fs/d_path.o
AR drivers/mmc/core/built-in.a
AR drivers/mmc/built-in.a
CC kernel/pid_namespace.o
AR drivers/net/ethernet/neterion/built-in.a
UPD kernel/config_data
CC kernel/stop_machine.o
CC drivers/hid/hid-cherry.o
CC [M] drivers/pps/pps.o
AR drivers/usb/storage/built-in.a
CC [M] drivers/bluetooth/btusb.o
CC [M] drivers/vfio/pci/vfio_pci_rdwr.o
CC [M] drivers/pps/kapi.o
CC kernel/kprobes.o
CC drivers/usb/host/ohci-hcd.o
CC drivers/usb/gadget/udc/trace.o
CC [M] drivers/gpu/drm/drm_aperture.o
CC lib/devres.o
CC [M] drivers/net/ethernet/intel/igc/igc_main.o
CC [M] drivers/gpu/drm/ast/ast_mm.o
CC [M] drivers/net/ethernet/intel/igc/igc_mac.o
CC drivers/md/dm-builtin.o
CC [M] drivers/gpu/drm/nouveau/nvif/disp.o
CC [M] drivers/md/dm-bufio.o
CC drivers/usb/serial/ftdi_sio.o
CC [M] drivers/net/ethernet/intel/igbvf/vf.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_bios.o
CC [M] drivers/mtd/mtdpart.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_main.o
CC drivers/firmware/efi/esrt.o
CC drivers/firmware/efi/efi-pstore.o
AR drivers/net/ethernet/netronome/built-in.a
AR mm/built-in.a
CC drivers/usb/host/ohci-pci.o
CC [M] drivers/gpu/drm/i915/intel_clock_gating.o
AR drivers/net/ethernet/ni/built-in.a
CC [M] drivers/gpu/drm/i915/intel_device_info.o
CC drivers/firmware/efi/cper.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_common.o
CC [M] drivers/gpu/drm/drm_atomic.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC arch/x86/kernel/vsmp_64.o
CC net/ipv6/xfrm6_state.o
CC [M] drivers/gpu/drm/drm_atomic_uapi.o
CC drivers/acpi/acpi_cmos_rtc.o
CC [M] drivers/gpu/drm/drm_auth.o
CC drivers/hid/hid-chicony.o
CC [M] drivers/pps/sysfs.o
AR drivers/android/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt.o
CC [M] drivers/mtd/mtdchar.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.o
CC [M] drivers/vfio/pci/vfio_pci_config.o
CC fs/stack.o
CC [M] drivers/dca/dca-core.o
CC [M] drivers/ssb/main.o
CC lib/check_signature.o
CC [M] drivers/dca/dca-sysfs.o
CC drivers/acpi/x86/apple.o
CC net/ipv4/fib_trie.o
CC [M] drivers/gpu/drm/ast/ast_mode.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC [M] drivers/gpu/drm/i915/intel_memory_region.o
CC [M] drivers/gpu/drm/nouveau/nvif/driver.o
CC fs/fs_struct.o
CC lib/interval_tree.o
CC fs/statfs.o
LD [M] drivers/pps/pps_core.o
AR arch/x86/kernel/built-in.a
CC [M] drivers/ssb/scan.o
AR arch/x86/built-in.a
CC [M] drivers/net/ethernet/intel/igbvf/mbx.o
CC [M] drivers/gpu/drm/i915/intel_pcode.o
CC [M] drivers/net/usb/cdc_ncm.o
AR drivers/usb/gadget/udc/built-in.a
AR drivers/usb/gadget/function/built-in.a
CC [M] drivers/net/ethernet/intel/e1000e/80003es2lan.o
AR drivers/usb/gadget/legacy/built-in.a
CC drivers/usb/gadget/usbstring.o
CC fs/btrfs/relocation.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_dp.o
CC lib/assoc_array.o
CC drivers/firmware/efi/cper_cxl.o
CC [M] drivers/ssb/sprom.o
CC [M] net/bridge/br_netfilter_ipv6.o
CC fs/fs_pin.o
CC drivers/hid/hid-cypress.o
CC drivers/usb/host/uhci-hcd.o
CC net/ipv6/xfrm6_input.o
CC drivers/usb/serial/pl2303.o
CC drivers/acpi/x86/utils.o
CC drivers/acpi/x86/s2idle.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_afmt.o
CC [M] drivers/gpu/drm/ast/ast_post.o
LD [M] drivers/dca/dca.o
CC drivers/usb/gadget/config.o
CC lib/list_debug.o
CC drivers/firmware/efi/runtime-wrappers.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_trace_points.o
CC kernel/hung_task.o
CC [M] drivers/gpu/drm/nouveau/nvif/event.o
CC [M] drivers/vhost/net.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC [M] drivers/vhost/vhost.o
CC [M] drivers/gpu/drm/nouveau/nvif/fifo.o
CC drivers/firmware/efi/dev-path-parser.o
LD [M] drivers/net/vxlan/vxlan.o
CC lib/debugobjects.o
LD [M] drivers/mtd/mtd.o
CC drivers/firmware/efi/apple-properties.o
CC [M] drivers/md/dm-bio-prison-v1.o
CC [M] drivers/net/ethernet/intel/igbvf/ethtool.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
CC [M] drivers/gpu/drm/drm_blend.o
CC [M] drivers/net/ethernet/intel/igbvf/netdev.o
CC [M] drivers/gpu/drm/drm_bridge.o
CC drivers/firmware/efi/earlycon.o
CC [M] net/bluetooth/smp.o
CC [M] drivers/gpu/drm/drm_cache.o
CC [M] drivers/ssb/pci.o
CC drivers/usb/host/xhci.o
CC [M] drivers/vfio/pci/vfio_pci.o
CC [M] drivers/gpu/drm/i915/intel_region_ttm.o
CC drivers/hid/hid-ezkey.o
CC [M] drivers/vfio/vfio_iommu_type1.o
CC [M] drivers/bluetooth/btintel.o
CC drivers/hid/hid-kensington.o
CC drivers/usb/gadget/epautoconf.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_encoders.o
CC [M] drivers/net/ethernet/intel/e1000e/mac.o
LD [M] drivers/vfio/pci/vfio-pci-core.o
CC drivers/acpi/debugfs.o
CC [M] drivers/net/ethernet/intel/e1000e/manage.o
CC [M] drivers/net/ethernet/intel/e1000e/nvm.o
AR drivers/usb/serial/built-in.a
CC [M] drivers/ssb/pcihost_wrapper.o
CC [M] drivers/gpu/drm/ast/ast_dp501.o
CC [M] drivers/gpu/drm/ast/ast_dp.o
CC drivers/firmware/efi/cper-x86.o
CC drivers/acpi/acpi_lpat.o
CC fs/nsfs.o
CC drivers/usb/host/xhci-mem.o
AR net/bridge/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvif/head.o
LD [M] net/bridge/br_netfilter.o
CC drivers/usb/host/xhci-ext-caps.o
CC drivers/usb/host/xhci-ring.o
CC drivers/acpi/acpi_lpit.o
CC [M] drivers/ssb/driver_chipcommon.o
CC kernel/watchdog.o
CC [M] drivers/md/dm-bio-prison-v2.o
CC [M] drivers/ssb/driver_chipcommon_pmu.o
CC net/ipv6/xfrm6_output.o
CC [M] drivers/vhost/iotlb.o
CC [M] drivers/net/usb/r8153_ecm.o
CC [M] drivers/net/ethernet/intel/e1000e/phy.o
LD [M] drivers/vfio/pci/vfio-pci.o
CC drivers/acpi/prmt.o
CC lib/bitrev.o
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC drivers/hid/hid-lg.o
CC drivers/usb/gadget/composite.o
CC [M] drivers/gpu/drm/nouveau/nvif/mem.o
CC [M] drivers/gpu/drm/i915/intel_runtime_pm.o
CC [M] drivers/ssb/driver_pcicore.o
CC drivers/usb/gadget/functions.o
CC drivers/acpi/acpi_pcc.o
CC kernel/watchdog_perf.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.o
CC [M] drivers/net/ethernet/intel/igc/igc_i225.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_82599.o
AR drivers/firmware/efi/built-in.a
CC drivers/firmware/dmi_scan.o
CC lib/crc16.o
CC [M] drivers/gpu/drm/i915/intel_sbi.o
CC [M] drivers/md/dm-crypt.o
CC [M] drivers/net/ethernet/intel/igc/igc_base.o
CC [M] drivers/gpu/drm/drm_client.o
CC [M] drivers/md/dm-thin.o
CC [M] drivers/md/dm-thin-metadata.o
LD [M] drivers/gpu/drm/ast/ast.o
CC fs/fs_types.o
CC net/ipv4/fib_notifier.o
CC [M] drivers/net/ethernet/intel/e1000e/param.o
LD [M] drivers/vhost/vhost_iotlb.o
CC [M] drivers/net/ethernet/intel/igc/igc_nvm.o
CC kernel/seccomp.o
CC [M] drivers/gpu/drm/drm_client_modeset.o
CC [M] drivers/net/ethernet/intel/e1000e/ethtool.o
CC [M] drivers/net/ethernet/intel/e1000e/netdev.o
CC lib/crc-t10dif.o
CC fs/fs_context.o
CC drivers/acpi/ac.o
LD [M] drivers/net/usb/asix.o
CC [M] drivers/bluetooth/btbcm.o
CC drivers/net/loopback.o
LD [M] drivers/ssb/ssb.o
CC [M] drivers/gpu/drm/nouveau/nvif/mmu.o
LD [M] drivers/vhost/vhost_net.o
CC drivers/net/netconsole.o
AR drivers/net/ethernet/packetengines/built-in.a
CC fs/fs_parser.o
CC fs/fsopen.o
AR drivers/net/ethernet/realtek/built-in.a
CC [M] drivers/net/ethernet/realtek/8139cp.o
CC drivers/usb/host/xhci-hub.o
CC [M] drivers/gpu/drm/nouveau/nvif/outp.o
LD [M] drivers/net/ethernet/intel/igbvf/igbvf.o
CC net/ipv6/xfrm6_protocol.o
CC [M] drivers/gpu/drm/nouveau/nvif/timer.o
HOSTCC lib/gen_crc32table
CC drivers/hid/hid-lg-g15.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sa.o
CC [M] drivers/net/ethernet/intel/igc/igc_phy.o
CC [M] drivers/bluetooth/btrtl.o
CC fs/init.o
CC lib/libcrc32c.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC [M] net/bluetooth/lib.o
CC drivers/usb/host/xhci-dbg.o
CC drivers/firmware/dmi-sysfs.o
CC drivers/acpi/button.o
CC [M] drivers/gpu/drm/i915/intel_step.o
CC [M] drivers/net/ethernet/intel/igc/igc_diag.o
LD [M] drivers/vfio/vfio.o
CC [M] drivers/net/ethernet/intel/igc/igc_ethtool.o
CC [M] drivers/net/ethernet/intel/ixgbevf/vf.o
CC net/ipv4/inet_fragment.o
CC [M] drivers/net/ethernet/intel/ixgbevf/mbx.o
CC [M] drivers/net/ethernet/intel/e1000e/ptp.o
AR drivers/net/ethernet/renesas/built-in.a
CC fs/btrfs/delayed-inode.o
CC net/ipv4/ping.o
CC fs/kernel_read_file.o
CC lib/xxhash.o
CC [M] drivers/gpu/drm/i915/intel_uncore.o
CC [M] drivers/net/ethernet/intel/igc/igc_ptp.o
AR drivers/net/ethernet/intel/built-in.a
CC drivers/usb/host/xhci-trace.o
CC net/ipv4/ip_tunnel_core.o
CC [M] drivers/gpu/drm/nouveau/nvif/vmm.o
CC drivers/acpi/fan_core.o
CC [M] drivers/net/ethernet/intel/igb/igb_ethtool.o
AR drivers/net/ethernet/sfc/built-in.a
CC [M] drivers/net/dummy.o
AR drivers/net/ethernet/smsc/built-in.a
CC drivers/usb/host/xhci-debugfs.o
CC [M] drivers/net/ethernet/smsc/smsc9420.o
CC drivers/usb/host/xhci-pci.o
CC drivers/firmware/dmi-id.o
CC [M] drivers/net/macvlan.o
CC [M] drivers/net/mii.o
CC drivers/usb/gadget/configfs.o
CC drivers/usb/gadget/u_f.o
CC [M] drivers/gpu/drm/amd/amdgpu/atombios_i2c.o
CC lib/genalloc.o
CC [M] drivers/gpu/drm/nouveau/nvif/user.o
CC drivers/acpi/fan_attr.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.o
CC drivers/hid/hid-microsoft.o
CC [M] net/bluetooth/ecdh_helper.o
CC net/ipv6/netfilter.o
CC net/ipv6/fib6_rules.o
CC [M] drivers/gpu/drm/nouveau/nvif/userc361.o
CC fs/mnt_idmapping.o
CC kernel/relay.o
CC [M] drivers/net/ethernet/intel/igc/igc_dump.o
CC drivers/firmware/memmap.o
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
CC [M] drivers/net/ethernet/intel/igb/e1000_82575.o
CC [M] drivers/net/ethernet/intel/igb/e1000_mac.o
AR drivers/net/ethernet/socionext/built-in.a
CC drivers/hid/hid-monterey.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC [M] drivers/net/ethernet/intel/ixgbevf/ethtool.o
CC [M] drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.o
CC [M] drivers/net/ethernet/intel/igb/e1000_nvm.o
CC [M] drivers/net/ethernet/intel/ixgbevf/ipsec.o
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC drivers/acpi/processor_driver.o
AR drivers/net/ethernet/vertexcom/built-in.a
CC [M] drivers/net/mdio.o
CC [M] drivers/net/ethernet/realtek/8139too.o
CC [M] drivers/net/ethernet/intel/igb/e1000_phy.o
CC [M] drivers/net/ethernet/intel/e100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/client.o
CC [M] net/bluetooth/hci_request.o
CC lib/percpu_counter.o
CC lib/fault-inject.o
CC lib/syscall.o
CC fs/remap_range.o
CC [M] drivers/net/tun.o
CC fs/btrfs/scrub.o
CC [M] drivers/net/veth.o
CC [M] drivers/gpu/drm/i915/intel_wakeref.o
CC fs/buffer.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm.o
AR drivers/firmware/built-in.a
CC [M] drivers/gpu/drm/drm_color_mgmt.o
CC [M] drivers/net/ethernet/realtek/r8169_main.o
CC [M] drivers/net/ethernet/intel/igc/igc_tsn.o
LD [M] drivers/md/dm-bio-prison.o
LD [M] drivers/md/dm-thin-pool.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
AR drivers/md/built-in.a
CC [M] net/bluetooth/mgmt_util.o
CC [M] drivers/net/ethernet/intel/igc/igc_xdp.o
CC net/ipv4/gre_offload.o
CC [M] drivers/net/ethernet/intel/igb/e1000_mbx.o
AR drivers/net/ethernet/wangxun/built-in.a
CC fs/mpage.o
AR drivers/net/ethernet/xilinx/built-in.a
CC [M] drivers/gpu/drm/drm_connector.o
CC drivers/acpi/processor_thermal.o
AR drivers/hid/built-in.a
CC [M] drivers/net/ethernet/realtek/r8169_firmware.o
AR drivers/usb/gadget/built-in.a
CC [M] drivers/net/ethernet/realtek/r8169_phy_config.o
CC lib/dynamic_debug.o
CC [M] drivers/net/ethernet/intel/igb/e1000_i210.o
CC kernel/utsname_sysctl.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_82598.o
CC lib/errname.o
AR drivers/net/ethernet/synopsys/built-in.a
AR drivers/net/ethernet/pensando/built-in.a
CC lib/nlattr.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_phy.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/engine.o
CC [M] drivers/net/ethernet/intel/igb/igb_ptp.o
CC net/ipv6/proc.o
CC fs/proc_namespace.o
CC drivers/acpi/processor_idle.o
CC kernel/delayacct.o
CC fs/btrfs/backref.o
CC fs/btrfs/ulist.o
AR drivers/usb/host/built-in.a
AR drivers/usb/built-in.a
CC fs/direct-io.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.o
CC [M] drivers/gpu/drm/drm_crtc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/enum.o
CC fs/btrfs/qgroup.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC [M] drivers/gpu/drm/i915/vlv_sideband.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
CC [M] drivers/net/ethernet/intel/igb/igb_hwmon.o
CC [M] drivers/gpu/drm/drm_displayid.o
CC lib/checksum.o
CC lib/cpu_rmap.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/event.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/firmware.o
LD [M] drivers/net/ethernet/intel/igc/igc.o
CC [M] drivers/gpu/drm/i915/vlv_suspend.o
CC [M] net/bluetooth/mgmt_config.o
CC [M] net/bluetooth/hci_codec.o
CC [M] drivers/gpu/drm/drm_drv.o
CC kernel/taskstats.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/gpuobj.o
CC [M] drivers/gpu/drm/drm_dumb_buffers.o
CC kernel/tsacct.o
CC [M] drivers/gpu/drm/drm_edid.o
CC kernel/tracepoint.o
CC net/ipv4/metrics.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.o
CC fs/eventpoll.o
CC net/ipv4/netlink.o
CC lib/dynamic_queue_limits.o
CC lib/glob.o
CC [M] drivers/gpu/drm/drm_encoder.o
CC [M] drivers/gpu/drm/drm_file.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_mbx.o
CC lib/strncpy_from_user.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_x540.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/intr.o
CC [M] net/bluetooth/eir.o
CC fs/btrfs/send.o
CC net/ipv6/syncookies.o
CC fs/btrfs/dev-replace.o
CC [M] drivers/gpu/drm/drm_fourcc.o
CC net/ipv4/nexthop.o
CC drivers/acpi/processor_throttling.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC kernel/latencytop.o
CC [M] drivers/gpu/drm/drm_framebuffer.o
CC [M] net/bluetooth/hci_sync.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/ioctl.o
CC lib/strnlen_user.o
CC net/ipv6/mip6.o
CC drivers/acpi/processor_perflib.o
CC kernel/irq_work.o
LD [M] drivers/net/ethernet/intel/e1000e/e1000e.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/memory.o
CC fs/anon_inodes.o
LD [M] drivers/net/ethernet/intel/igb/igb.o
CC [M] drivers/gpu/drm/i915/soc/intel_dram.o
CC lib/net_utils.o
CC [M] drivers/gpu/drm/drm_gem.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_x550.o
CC kernel/static_call.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ib.o
CC kernel/static_call_inline.o
CC net/ipv6/addrconf_core.o
CC fs/signalfd.o
CC drivers/acpi/container.o
CC [M] drivers/gpu/drm/drm_ioctl.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC net/ipv4/udp_tunnel_stub.o
CC [M] drivers/gpu/drm/drm_lease.o
CC kernel/user-return-notifier.o
CC fs/btrfs/raid56.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_pll.o
CC fs/timerfd.o
CC [M] drivers/gpu/drm/drm_managed.o
CC kernel/padata.o
CC [M] drivers/gpu/drm/i915/soc/intel_gmch.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_lib.o
CC [M] drivers/gpu/drm/drm_mm.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.o
CC [M] net/bluetooth/coredump.o
CC kernel/jump_label.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.o
CC fs/eventfd.o
CC [M] net/bluetooth/sco.o
CC [M] drivers/gpu/drm/i915/soc/intel_pch.o
LD [M] drivers/net/ethernet/intel/ixgbevf/ixgbevf.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb.o
LD [M] drivers/net/ethernet/realtek/r8169.o
CC lib/sg_pool.o
CC [M] drivers/gpu/drm/drm_mode_config.o
CC kernel/context_tracking.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/mm.o
CC net/ipv6/exthdrs_core.o
CC drivers/acpi/thermal.o
CC lib/stackdepot.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/object.o
CC net/ipv6/ip6_checksum.o
CC fs/btrfs/uuid-tree.o
CC [M] drivers/gpu/drm/drm_mode_object.o
CC [M] drivers/gpu/drm/drm_modes.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82598.o
CC [M] drivers/gpu/drm/drm_modeset_lock.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.o
CC [M] drivers/gpu/drm/drm_plane.o
CC net/ipv6/ip6_icmp.o
CC [M] drivers/gpu/drm/drm_prime.o
CC fs/btrfs/props.o
CC [M] drivers/gpu/drm/drm_print.o
CC net/ipv4/sysctl_net_ipv4.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.o
CC [M] drivers/gpu/drm/xe/xe_heci_gsc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/oproxy.o
CC [M] net/bluetooth/iso.o
CC lib/ucs2_string.o
CC [M] drivers/gpu/drm/drm_property.o
CC fs/userfaultfd.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC kernel/iomem.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/option.o
CC lib/sbitmap.o
CC lib/group_cpus.o
CC [M] drivers/gpu/drm/i915/i915_memcpy.o
CC kernel/rseq.o
CC fs/btrfs/free-space-tree.o
CC [M] net/bluetooth/a2mp.o
CC net/ipv6/output_core.o
CC drivers/acpi/acpi_memhotplug.o
CC [M] drivers/gpu/drm/drm_syncobj.o
CC [M] lib/asn1_decoder.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_82599.o
CC net/ipv6/protocol.o
CC [M] drivers/gpu/drm/i915/i915_mm.o
CC net/ipv6/ip6_offload.o
CC [M] drivers/gpu/drm/i915/i915_sw_fence.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.o
CC fs/btrfs/tree-checker.o
CC fs/btrfs/space-info.o
CC [M] net/bluetooth/amp.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_dcb_nl.o
CC fs/aio.o
CC [M] drivers/gpu/drm/drm_sysfs.o
GZIP kernel/config_data.gz
CC kernel/configs.o
GEN lib/oid_registry_data.c
CC drivers/acpi/ioapic.o
CC [M] lib/oid_registry.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sync.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_sysfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/ramht.o
AR lib/lib.a
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_debugfs.o
GEN lib/crc32table.h
CC fs/btrfs/block-rsv.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.o
CC [M] net/bluetooth/hci_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_preempt_mgr.o
CC net/ipv6/tcpv6_offload.o
CC net/ipv6/exthdrs_offload.o
CC [M] drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.o
CC [M] drivers/gpu/drm/drm_trace_points.o
CC lib/crc32.o
CC fs/btrfs/delalloc-space.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.o
CC [M] drivers/gpu/drm/drm_vblank.o
CC [M] drivers/gpu/drm/drm_vblank_work.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_virt.o
CC [M] drivers/gpu/drm/drm_vma_manager.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.o
AR kernel/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vf_error.o
CC net/ipv4/proc.o
CC fs/btrfs/block-group.o
CC fs/locks.o
CC net/ipv6/inet6_hashtables.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
CC net/ipv6/mcast_snoop.o
CC drivers/acpi/battery.o
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sched.o
CC [M] drivers/gpu/drm/drm_writeback.o
CC [M] drivers/gpu/drm/lib/drm_random.o
AR lib/built-in.a
CC [M] drivers/gpu/drm/drm_ioc32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/subdev.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC [M] drivers/gpu/drm/i915/i915_sw_fence_work.o
CC [M] drivers/gpu/drm/drm_panel.o
CC net/ipv4/syncookies.o
CC net/ipv4/esp4.o
CC net/ipv4/esp4_offload.o
CC net/ipv4/netfilter.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.o
CC net/ipv4/inet_diag.o
CC [M] drivers/gpu/drm/nouveau/nvkm/core/uevent.o
CC [M] drivers/gpu/drm/i915/i915_syncmap.o
CC fs/binfmt_script.o
CC drivers/acpi/hed.o
CC [M] net/ipv6/ip6_udp_tunnel.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ids.o
CC net/ipv4/tcp_diag.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.o
CC drivers/acpi/bgrt.o
CC [M] drivers/gpu/drm/drm_pci.o
CC [M] drivers/gpu/drm/drm_debugfs.o
CC [M] drivers/gpu/drm/drm_debugfs_crc.o
CC fs/binfmt_elf.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.o
CC drivers/acpi/cppc_acpi.o
CC drivers/acpi/spcr.o
CC [M] drivers/gpu/drm/drm_edid_load.o
CC [M] drivers/gpu/drm/drm_panel_orientation_quirks.o
CC fs/btrfs/discard.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/fw.o
CC [M] drivers/gpu/drm/drm_exec.o
CC drivers/acpi/acpi_pad.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.o
CC fs/btrfs/reflink.o
CC fs/btrfs/subpage.o
CC [M] drivers/gpu/drm/drm_gpuvm.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/hs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/ls.o
CC fs/btrfs/tree-mod-log.o
CC [M] drivers/acpi/acpi_video.o
LD [M] net/bluetooth/bluetooth.o
CC fs/compat_binfmt_elf.o
CC net/ipv4/udp_diag.o
CC [M] drivers/gpu/drm/drm_buddy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/acr.o
CC [M] drivers/gpu/drm/i915/i915_user_extensions.o
CC net/ipv4/tcp_cubic.o
LD [M] drivers/net/ethernet/intel/ixgbe/ixgbe.o
CC net/ipv4/xfrm4_policy.o
CC net/ipv4/xfrm4_state.o
CC net/ipv4/xfrm4_input.o
CC [M] drivers/gpu/drm/nouveau/nvkm/nvfw/flcn.o
AR drivers/net/ethernet/built-in.a
CC [M] drivers/gpu/drm/drm_gem_shmem_helper.o
AR net/ipv6/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/base.o
AR drivers/net/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/cmdq.o
CC [M] drivers/gpu/drm/drm_suballoc.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/fw.o
CC [M] drivers/acpi/video_detect.o
CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o
CC fs/btrfs/extent-io-tree.o
CC [M] drivers/gpu/drm/drm_atomic_helper.o
CC fs/btrfs/fs.o
CC net/ipv4/xfrm4_output.o
CC net/ipv4/xfrm4_protocol.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.o
CC [M] drivers/gpu/drm/i915/i915_ioc32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/msgq.o
CC [M] drivers/gpu/drm/drm_atomic_state_helper.o
CC [M] net/ipv4/ip_tunnel.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_csa.o
CC [M] drivers/gpu/drm/i915/i915_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ras.o
GEN xe_wa_oob.c xe_wa_oob.h
GEN xe_wa_oob.c xe_wa_oob.h
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC fs/mbcache.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/qmgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/v1.o
CC [M] drivers/gpu/drm/drm_bridge_connector.o
CC [M] net/ipv4/udp_tunnel_core.o
CC [M] net/ipv4/udp_tunnel_nic.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/gm200.o
CC [M] drivers/gpu/drm/drm_crtc_helper.o
CC [M] drivers/gpu/drm/drm_damage_helper.o
CC fs/posix_acl.o
CC fs/btrfs/messages.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm_cpu.o
CC fs/btrfs/bio.o
CC fs/btrfs/lru_cache.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC fs/coredump.o
AR drivers/acpi/built-in.a
CC fs/drop_caches.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC fs/sysctls.o
CC [M] drivers/gpu/drm/i915/i915_debugfs_params.o
CC fs/btrfs/acl.o
CC [M] drivers/gpu/drm/drm_encoder_slave.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/gp102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/ga100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/falcon/ga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/base.o
CC fs/fhandle.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm200.o
LD [M] drivers/acpi/video.o
CC [M] drivers/gpu/drm/i915/display/intel_display_debugfs.o
CC [M] drivers/gpu/drm/i915/display/intel_display_debugfs_params.o
CC [M] drivers/gpu/drm/i915/display/intel_pipe_crc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gm20b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp102.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp108.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.o
CC [M] drivers/gpu/drm/i915/i915_pmu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/gp10b.o
CC [M] drivers/gpu/drm/i915/gt/gen2_engine_cs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/tu102.o
CC [M] drivers/gpu/drm/drm_flip_work.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.o
CC [M] drivers/gpu/drm/i915/gt/gen6_engine_cs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_umc.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC [M] drivers/gpu/drm/drm_format_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.o
CC [M] drivers/gpu/drm/i915/gt/gen6_ppgtt.o
CC [M] drivers/gpu/drm/drm_gem_atomic_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga100.o
AR net/ipv4/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/acr/ga102.o
CC [M] drivers/gpu/drm/drm_gem_framebuffer_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.o
CC [M] drivers/gpu/drm/i915/gt/gen7_renderclear.o
CC [M] drivers/gpu/drm/i915/gt/gen8_engine_cs.o
CC [M] drivers/gpu/drm/i915/gt/gen8_ppgtt.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.o
CC [M] drivers/gpu/drm/i915/gt/intel_breadcrumbs.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_rap.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fw_attestation.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
CC [M] drivers/gpu/drm/drm_kms_helper_common.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm107.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC [M] drivers/gpu/drm/drm_modeset_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/gm20b.o
AR fs/btrfs/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bar/tu102.o
CC [M] drivers/gpu/drm/xe/xe_range_fence.o
CC [M] drivers/gpu/drm/drm_plane_helper.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_eeprom.o
AR fs/built-in.a
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_mca.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_lsdma.o
CC [M] drivers/gpu/drm/drm_probe_helper.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC [M] drivers/gpu/drm/i915/gt/intel_context.o
LD [M] net/ipv4/udp_tunnel.o
AR net/built-in.a
CC [M] drivers/gpu/drm/i915/gt/intel_context_sseu.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ring_mux.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/bit.o
CC [M] drivers/gpu/drm/drm_rect.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_cs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/boost.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/conn.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/cstep.o
CC [M] drivers/gpu/drm/drm_self_refresh_helper.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_pm.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/dcb.o
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
CC [M] drivers/gpu/drm/amd/amdgpu/cik.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.o
CC [M] drivers/gpu/drm/amd/amdgpu/cik_ih.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v8_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/dp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/extdev.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/fan.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v7_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/gpio.o
CC [M] drivers/gpu/drm/amd/amdgpu/cik_sdma.o
CC [M] drivers/gpu/drm/drm_simple_kms_helper.o
CC [M] drivers/gpu/drm/i915/gt/intel_engine_user.o
CC [M] drivers/gpu/drm/i915/gt/intel_execlists_submission.o
CC [M] drivers/gpu/drm/bridge/panel.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v4_2.o
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v2_0.o
CC [M] drivers/gpu/drm/drm_fbdev_generic.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
CC [M] drivers/gpu/drm/i915/gt/intel_ggtt.o
CC [M] drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o
CC [M] drivers/gpu/drm/amd/amdgpu/si.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v6_0.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/iccsense.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/image.o
CC [M] drivers/gpu/drm/drm_fb_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/mxm.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v6_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/si_ih.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC [M] drivers/gpu/drm/amd/amdgpu/si_dma.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/npde.o
LD [M] drivers/gpu/drm/drm.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/pcir.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/perf.o
LD [M] drivers/gpu/drm/drm_shmem_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/pll.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/pmu.o
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v6_0.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.o
LD [M] drivers/gpu/drm/drm_ttm_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/power_budget.o
AR drivers/gpu/drm/built-in.a
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/ramcfg.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v3_1.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_irq.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_mcr.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadow.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_pm.o
CC [M] drivers/gpu/drm/amd/amdgpu/vi.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_requests.o
CC [M] drivers/gpu/drm/amd/amdgpu/mxgpu_vi.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v6_1.o
CC [M] drivers/gpu/drm/xe/xe_vm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowacpi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowof.o
CC [M] drivers/gpu/drm/amd/amdgpu/soc15.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
CC [M] drivers/gpu/drm/amd/amdgpu/emu_soc.o
CC [M] drivers/gpu/drm/amd/amdgpu/mxgpu_ai.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowpci.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_sysfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowramin.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowrom.o
CC [M] drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o
CC [M] drivers/gpu/drm/i915/gt/intel_gtt.o
CC [M] drivers/gpu/drm/i915/gt/intel_llc.o
CC [M] drivers/gpu/drm/i915/gt/intel_lrc.o
CC [M] drivers/gpu/drm/i915/gt/intel_migrate.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.o
CC [M] drivers/gpu/drm/xe/xe_hwmon.o
CC [M] drivers/gpu/drm/xe/xe_display.o
CC [M] drivers/gpu/drm/i915/gt/intel_mocs.o
CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o
LD [M] drivers/gpu/drm/drm_kms_helper.o
CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega10_reg_init.o
CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega20_reg_init.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/therm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/vmap.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rps.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/volt.o
CC [M] drivers/gpu/drm/i915/gt/intel_ppgtt.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_4.o
CC [M] drivers/gpu/drm/xe/display/xe_display_misc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/vpstate.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v2_3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/xpio.o
CC [M] drivers/gpu/drm/i915/gt/intel_rc6.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o
CC [M] drivers/gpu/drm/amd/amdgpu/nv.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_utils.o
CC [M] drivers/gpu/drm/amd/amdgpu/arct_reg_init.o
CC [M] drivers/gpu/drm/amd/amdgpu/mxgpu_nv.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0203.o
CC [M] drivers/gpu/drm/i915/gt/intel_region_lmem.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0205.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_dram.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_pch.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.o
CC [M] drivers/gpu/drm/i915/gt/intel_renderstate.o
CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o
CC [M] drivers/gpu/drm/i915/gt/intel_reset.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v4_0.o
CC [M] drivers/gpu/drm/i915/gt/intel_ring.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v5_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o
CC [M] drivers/gpu/drm/amd/amdgpu/aldebaran_reg_init.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/amd/amdgpu/aldebaran.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bios/P0260.o
CC [M] drivers/gpu/drm/amd/amdgpu/soc21.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o
CC [M] drivers/gpu/drm/amd/amdgpu/sienna_cichlid.o
CC [M] drivers/gpu/drm/i915/gt/intel_ring_submission.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv50.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/g94.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o
CC [M] drivers/gpu/drm/amd/amdgpu/smu_v13_0_10.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o
CC [M] drivers/gpu/drm/i915/gt/intel_rps.o
CC [M] drivers/gpu/drm/i915/gt/intel_sa_media.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/bus/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v4_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v6_0.o
CC [M] drivers/gpu/drm/i915/gt/intel_sseu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv04.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o
CC [M] drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_7.o
CC [M] drivers/gpu/drm/amd/amdgpu/hdp_v5_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/lsdma_v6_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/nbio_v7_9.o
CC [M] drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.o
CC [M] drivers/gpu/drm/amd/amdgpu/df_v1_7.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/df_v3_6.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gt215.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/mcp77.o
CC [M] drivers/gpu/drm/i915/gt/intel_timeline.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/df_v4_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v7_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v8_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk104.o
CC [M] drivers/gpu/drm/i915/gt/intel_tlb.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.o
CC [M] drivers/gpu/drm/i915/gt/intel_wopcm.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v9_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/gm20b.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllnv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/clk/pllgt215.o
CC [M] drivers/gpu/drm/i915/gt/intel_workarounds.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o
CC [M] drivers/gpu/drm/i915/gt/shmem_utils.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs_params.o
CC [M] drivers/gpu/drm/i915/gt/sysfs_engines.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v10_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.o
CC [M] drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv05.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv10.o
CC [M] drivers/gpu/drm/i915/gt/gen6_renderstate.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv1a.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_params.o
CC [M] drivers/gpu/drm/i915/gt/gen7_renderstate.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv20.o
CC [M] drivers/gpu/drm/i915/gt/gen8_renderstate.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.o
CC [M] drivers/gpu/drm/i915/gt/gen9_renderstate.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v11_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_busy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_clflush.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_wa.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_context.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/tu102.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_create.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ga100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/base.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/user.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o
CC [M] drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v6_0.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_domain.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/gp10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v6_1.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_internal.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_object.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_lmem.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v6_7.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/gv100.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v8_7.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o
CC [M] drivers/gpu/drm/amd/amdgpu/umc_v8_10.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fault/tu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_mman.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv10.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_pages.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_phys.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ih.o
CC [M] drivers/gpu/drm/amd/amdgpu/iceland_ih.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv1a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv20.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv25.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_pm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv30.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o
CC [M] drivers/gpu/drm/amd/amdgpu/tonga_ih.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o
CC [M] drivers/gpu/drm/amd/amdgpu/cz_ih.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_region.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv35.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_shmem.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv36.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_shrinker.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega10_ih.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv40.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv41.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv44.o
CC [M] drivers/gpu/drm/amd/amdgpu/vega20_ih.o
CC [M] drivers/gpu/drm/amd/amdgpu/navi10_ih.o
CC [M] drivers/gpu/drm/amd/amdgpu/ih_v6_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/ih_v6_1.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv46.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_psp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv47.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_stolen.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv49.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v3_1.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v10_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v11_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv4e.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_throttle.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_tiling.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v11_0_8.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_ttm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v12_0.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/g84.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v13_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/psp_v13_0_4.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v10_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gt215.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o
CC [M] drivers/gpu/drm/amd/amdgpu/dce_v11_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/mcp77.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/mcp89.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_userptr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v8_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o
CC [M] drivers/gpu/drm/i915/gem/i915_gem_wait.o
CC [M] drivers/gpu/drm/i915/gem/i915_gemfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_4.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_link_bw.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.o
CC [M] drivers/gpu/drm/i915/i915_active.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf108.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o
CC [M] drivers/gpu/drm/i915/i915_cmd_parser.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk104.o
CC [M] drivers/gpu/drm/i915/i915_deps.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk110.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.o
CC [M] drivers/gpu/drm/i915/i915_gem_evict.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v10_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/imu_v11_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_lock.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.o
CC [M] drivers/gpu/drm/i915/i915_gem_gtt.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v11_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pmdemand.o
CC [M] drivers/gpu/drm/i915/i915_gem_ww.o
CC [M] drivers/gpu/drm/i915/i915_gem.o
CC [M] drivers/gpu/drm/i915/i915_query.o
CC [M] drivers/gpu/drm/amd/amdgpu/imu_v11_0_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.o
CC [M] drivers/gpu/drm/i915/i915_request.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm200.o
CC [M] drivers/gpu/drm/i915/i915_scheduler.o
CC [M] drivers/gpu/drm/i915/i915_trace_points.o
CC [M] drivers/gpu/drm/i915/i915_ttm_buddy_manager.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o
CC [M] drivers/gpu/drm/i915/i915_vma.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gm20b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp102.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v2_4.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v3_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v4_0.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp10b.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v4_4.o
CC [M] drivers/gpu/drm/i915/i915_vma_resource.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gv100.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/tu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v5_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v5_2.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o
CC [M] drivers/gpu/drm/amd/amdgpu/sdma_v6_0.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ga102.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_mes.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o
CC [M] drivers/gpu/drm/amd/amdgpu/mes_v10_1.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ram.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_pmu.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv04.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv10.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv1a.o
CC [M] drivers/gpu/drm/amd/amdgpu/mes_v11_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbdev.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv20.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v5_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv40.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv41.o
CC [M] drivers/gpu/drm/xe/xe_guc.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv44.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv49.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_log.o
HDRTEST drivers/gpu/drm/xe/abi/guc_klvs_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_errors_abi.h
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v6_0.o
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_slpc_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_mmio_abi.h
CC [M] drivers/gpu/drm/amd/amdgpu/uvd_v7_0.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv4e.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vce.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramnv50.o
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_abi.h
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.o
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v3_0.o
HDRTEST drivers/gpu/drm/xe/abi/guc_messages_abi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/rammcp77.o
CC [M] drivers/gpu/drm/amd/amdgpu/vce_v4_0.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_gem.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_sw_ring.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_vma_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v1_0.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_irq.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband_reg.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_pcode.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf108.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v2_0.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v2_5.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_reg_defs.h
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgp100.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_trace.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgp102.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_reg.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr2.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v3_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/sddr3.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_huc.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v4_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr3.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_uc.o
CC [M] drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_active_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
CC [M] drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_config.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fb/gddr5.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_vma.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/nv50.o
CC [M] drivers/gpu/drm/i915/gt/intel_gsc.o
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_gem_stolen.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_mchbar_regs.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_debugfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gf100.o
CC [M] drivers/gpu/drm/i915/i915_hwmon.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_gpu_error.h
CC [M] drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v1_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/fuse/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v2_0.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/soc/intel_pch.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_vgpu.h
CC [M] drivers/gpu/drm/i915/display/hsw_ips.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.o
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v2_1.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.o
CC [M] drivers/gpu/drm/i915/display/intel_atomic.o
CC [M] drivers/gpu/drm/i915/display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf119.o
CC [M] drivers/gpu/drm/amd/amdgpu/athub_v3_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.o
CC [M] drivers/gpu/drm/i915/display/intel_audio.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/base.o
CC [M] drivers/gpu/drm/i915/display/intel_bios.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h
CC [M] drivers/gpu/drm/i915/display/intel_bw.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_runtime_pm.h
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v9_0.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_step.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/gv100.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_uc_fw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_pci_config.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/base.o
CC [M] drivers/gpu/drm/i915/display/intel_cdclk.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v11_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv04.o
CC [M] drivers/gpu/drm/i915/display/intel_color.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v11_0_6.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v13_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v13_0_3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv4e.o
CC [M] drivers/gpu/drm/amd/amdgpu/smuio_v13_0_6.o
CC [M] drivers/gpu/drm/i915/display/intel_combo_phy.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_reset.o
CC [M] drivers/gpu/drm/amd/amdgpu/mca_v3_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_module.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/g94.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gf117.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gf119.o
CC [M] drivers/gpu/drm/i915/display/intel_connector.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk104.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object_frontbuffer.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gk110.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/gm200.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/gt/intel_rps.h
CC [M] drivers/gpu/drm/i915/display/intel_crtc.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_clock_gating.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_chardev.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_topology.o
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/intel_gt_types.h
HDRTEST drivers/gpu/drm/xe/compat-i915-headers/i915_active.h
HDRTEST drivers/gpu/drm/xe/instructions/xe_instr_defs.h
CC [M] drivers/gpu/drm/i915/display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_pasid.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/pad.o
HDRTEST drivers/gpu/drm/xe/instructions/xe_gfxpipe_commands.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_doorbell.o
HDRTEST drivers/gpu/drm/xe/instructions/xe_mi_commands.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_flat_memory.o
HDRTEST drivers/gpu/drm/xe/regs/xe_reg_defs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_guc_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_gt_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv4e.o
HDRTEST drivers/gpu/drm/xe/regs/xe_gpu_commands.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv50.o
HDRTEST drivers/gpu/drm/xe/regs/xe_lrc_layout.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padg94.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.o
HDRTEST drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_queue.o
HDRTEST drivers/gpu/drm/xe/regs/xe_engine_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgf119.o
CC [M] drivers/gpu/drm/i915/display/intel_cursor.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_cik.o
HDRTEST drivers/gpu/drm/xe/tests/xe_test.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_vi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v9.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v10.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_mqd_manager_v11.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_kernel_queue.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bus.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager.o
CC [M] drivers/gpu/drm/i915/display/intel_display.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busnv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_vi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busnv4e.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busnv50.o
CC [M] drivers/gpu/drm/i915/display/intel_display_driver.o
HDRTEST drivers/gpu/drm/xe/tests/xe_pci_test.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/busgf119.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bit.o
CC [M] drivers/gpu/drm/i915/display/intel_display_irq.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_packet_manager_v9.o
HDRTEST drivers/gpu/drm/xe/tests/xe_migrate_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_dma_buf_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_bo_test.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process_queue_manager.o
HDRTEST drivers/gpu/drm/xe/xe_assert.h
CC [M] drivers/gpu/drm/i915/display/intel_display_params.o
CC [M] drivers/gpu/drm/i915/display/intel_display_power.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.o
HDRTEST drivers/gpu/drm/xe/xe_bb.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgf119.o
HDRTEST drivers/gpu/drm/xe/xe_bb_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_cik.o
HDRTEST drivers/gpu/drm/xe/xe_bo.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/i2c/anx9805.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_vi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v9.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v10.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/gf100.o
CC [M] drivers/gpu/drm/i915/display/intel_display_power_map.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager_v11.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_interrupt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_events.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/cik_event_interrupt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv40.o
CC [M] drivers/gpu/drm/i915/display/intel_display_power_well.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_int_process_v9.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_int_process_v10.o
CC [M] drivers/gpu/drm/i915/display/intel_display_reset.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_int_process_v11.o
CC [M] drivers/gpu/drm/i915/display/intel_display_rps.o
CC [M] drivers/gpu/drm/i915/display/intel_display_wa.o
HDRTEST drivers/gpu/drm/xe/xe_bo_doc.h
CC [M] drivers/gpu/drm/i915/display/intel_dmc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/base.o
HDRTEST drivers/gpu/drm/xe/xe_bo_evict.h
HDRTEST drivers/gpu/drm/xe/xe_bo_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_smi_events.o
HDRTEST drivers/gpu/drm/xe/xe_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_devcoredump.h
HDRTEST drivers/gpu/drm/xe/xe_devcoredump_types.h
CC [M] drivers/gpu/drm/i915/display/intel_dpio_phy.o
CC [M] drivers/gpu/drm/i915/display/intel_dpll.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gk104.o
CC [M] drivers/gpu/drm/i915/display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_crat.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_debug.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp102.o
HDRTEST drivers/gpu/drm/xe/xe_device.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gp10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.o
CC [M] drivers/gpu/drm/i915/display/intel_dpt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/ltc/ga102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_fence.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.o
HDRTEST drivers/gpu/drm/xe/xe_device_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_device_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.o
HDRTEST drivers/gpu/drm/xe/xe_display.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.o
HDRTEST drivers/gpu/drm/xe/xe_dma_buf.h
CC [M] drivers/gpu/drm/i915/display/intel_drrs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv17.o
CC [M] drivers/gpu/drm/i915/display/intel_dsb.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv44.o
CC [M] drivers/gpu/drm/i915/display/intel_fb.o
CC [M] drivers/gpu/drm/i915/display/intel_fb_pin.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv50.o
CC [M] drivers/gpu/drm/i915/display/intel_fbc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/g98.o
HDRTEST drivers/gpu/drm/xe/xe_drm_client.h
CC [M] drivers/gpu/drm/i915/display/intel_fdi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gt215.o
CC [M] drivers/gpu/drm/i915/display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk104.o
HDRTEST drivers/gpu/drm/xe/xe_drv.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.o
CC [M] drivers/gpu/drm/i915/display/intel_frontbuffer.o
HDRTEST drivers/gpu/drm/xe/xe_exec.h
HDRTEST drivers/gpu/drm/xe/xe_exec_queue.h
HDRTEST drivers/gpu/drm/xe/xe_exec_queue_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp100.o
HDRTEST drivers/gpu/drm/xe/xe_execlist.h
CC [M] drivers/gpu/drm/i915/display/intel_global_state.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/gp10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_job.o
HDRTEST drivers/gpu/drm/xe/xe_execlist_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_acp.o
CC [M] drivers/gpu/drm/i915/display/intel_hdcp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.o
HDRTEST drivers/gpu/drm/xe/xe_force_wake.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv04.o
HDRTEST drivers/gpu/drm/xe/xe_force_wake_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../acp/acp_hw.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv41.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv44.o
CC [M] drivers/gpu/drm/i915/display/intel_hdcp_gsc.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_ioc32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/nv50.o
CC [M] drivers/gpu/drm/i915/display/intel_hotplug.o
HDRTEST drivers/gpu/drm/xe/xe_ggtt.h
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/g84.o
HDRTEST drivers/gpu/drm/xe/xe_ggtt_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mcp77.o
HDRTEST drivers/gpu/drm/xe/xe_gt.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.o
HDRTEST drivers/gpu/drm/xe/xe_gt_clock.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/arcturus_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/navi10_ppt.o
CC [M] drivers/gpu/drm/i915/display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/sienna_cichlid_ppt.o
CC [M] drivers/gpu/drm/i915/display/intel_hti.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/vangogh_ppt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm20b.o
CC [M] drivers/gpu/drm/i915/display/intel_link_bw.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/cyan_skillfish_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu11/smu_v11_0.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu12/renoir_ppt.o
HDRTEST drivers/gpu/drm/xe/xe_gt_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_mcr.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu12/smu_v12_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0.o
CC [M] drivers/gpu/drm/i915/display/intel_load_detect.o
HDRTEST drivers/gpu/drm/xe/xe_gt_pagefault.h
CC [M] drivers/gpu/drm/i915/display/intel_lpe_audio.o
HDRTEST drivers/gpu/drm/xe/xe_gt_printk.h
CC [M] drivers/gpu/drm/i915/display/intel_modeset_lock.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/aldebaran_ppt.o
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gv100.o
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs_types.h
CC [M] drivers/gpu/drm/i915/display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/yellow_carp_ppt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_0_ppt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/tu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/mem.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_4_ppt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv04.o
CC [M] drivers/gpu/drm/i915/display/intel_modeset_setup.o
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memnv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/memgf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv04.o
CC [M] drivers/gpu/drm/i915/display/intel_overlay.o
CC [M] drivers/gpu/drm/i915/display/intel_pch_display.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv41.o
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_topology.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_5_ppt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv44.o
CC [M] drivers/gpu/drm/i915/display/intel_pch_refclk.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmnv50.o
CC [M] drivers/gpu/drm/i915/display/intel_plane_initial.o
CC [M] drivers/gpu/drm/i915/display/intel_pmdemand.o
HDRTEST drivers/gpu/drm/xe/xe_gt_types.h
CC [M] drivers/gpu/drm/i915/display/intel_psr.o
HDRTEST drivers/gpu/drm/xe/xe_guc.h
HDRTEST drivers/gpu/drm/xe/xe_guc_ads.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_7_ppt.o
HDRTEST drivers/gpu/drm/xe/xe_guc_ads_types.h
CC [M] drivers/gpu/drm/i915/display/intel_quirks.o
HDRTEST drivers/gpu/drm/xe/xe_guc_ct.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmmcp77.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_6_ppt.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk104.o
CC [M] drivers/gpu/drm/i915/display/intel_sprite.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgk20a.o
HDRTEST drivers/gpu/drm/xe/xe_guc_ct_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/amdgpu_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.o
HDRTEST drivers/gpu/drm/xe/xe_guc_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgm20b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smumgr.o
CC [M] drivers/gpu/drm/i915/display/intel_sprite_uapi.o
CC [M] drivers/gpu/drm/i915/display/intel_tc.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu8_smumgr.o
CC [M] drivers/gpu/drm/i915/display/intel_vblank.o
HDRTEST drivers/gpu/drm/xe/xe_guc_fwif.h
HDRTEST drivers/gpu/drm/xe/xe_guc_hwconfig.h
HDRTEST drivers/gpu/drm/xe/xe_guc_log.h
HDRTEST drivers/gpu/drm/xe/xe_guc_log_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/tonga_smumgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/fiji_smumgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/polaris10_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.o
HDRTEST drivers/gpu/drm/xe/xe_guc_pc.h
CC [M] drivers/gpu/drm/i915/display/intel_vga.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/iceland_smumgr.o
CC [M] drivers/gpu/drm/i915/display/intel_wm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu7_smumgr.o
HDRTEST drivers/gpu/drm/xe/xe_guc_pc_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vega10_smumgr.o
HDRTEST drivers/gpu/drm/xe/xe_guc_submit.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu10_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp10b.o
CC [M] drivers/gpu/drm/i915/display/i9xx_plane.o
CC [M] drivers/gpu/drm/i915/display/i9xx_wm.o
HDRTEST drivers/gpu/drm/xe/xe_guc_submit_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgv100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/ci_smumgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vega12_smumgr.o
HDRTEST drivers/gpu/drm/xe/xe_guc_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/umem.o
CC [M] drivers/gpu/drm/i915/display/skl_scaler.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vegam_smumgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ummu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mmu/uvmm.o
CC [M] drivers/gpu/drm/i915/display/skl_universal_plane.o
CC [M] drivers/gpu/drm/i915/display/skl_watermark.o
CC [M] drivers/gpu/drm/i915/display/intel_acpi.o
CC [M] drivers/gpu/drm/i915/display/intel_opregion.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mxm/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/smu9_smumgr.o
HDRTEST drivers/gpu/drm/xe/xe_heci_gsc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/smumgr/vega20_smumgr.o
HDRTEST drivers/gpu/drm/xe/xe_huc.h
HDRTEST drivers/gpu/drm/xe/xe_huc_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_huc_types.h
HDRTEST drivers/gpu/drm/xe/xe_hw_engine.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/hwmgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/processpptables.o
HDRTEST drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mxm/mxms.o
CC [M] drivers/gpu/drm/i915/display/intel_fbdev.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/mxm/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/agp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/hardwaremanager.o
CC [M] drivers/gpu/drm/i915/display/dvo_ch7017.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu8_hwmgr.o
CC [M] drivers/gpu/drm/i915/display/dvo_ch7xxx.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.o
HDRTEST drivers/gpu/drm/xe/xe_hw_engine_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/pcie.o
HDRTEST drivers/gpu/drm/xe/xe_hw_fence.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/pppcielanes.o
CC [M] drivers/gpu/drm/i915/display/dvo_ivch.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/process_pptables_v1_0.o
CC [M] drivers/gpu/drm/i915/display/dvo_ns2501.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomctrl.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv46.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ppatomfwctrl.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_hwmgr.o
HDRTEST drivers/gpu/drm/xe/xe_hw_fence_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv4c.o
HDRTEST drivers/gpu/drm/xe/xe_hwmon.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_powertune.o
HDRTEST drivers/gpu/drm/xe/xe_irq.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/g84.o
CC [M] drivers/gpu/drm/i915/display/dvo_sil164.o
CC [M] drivers/gpu/drm/i915/display/dvo_tfp410.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/g92.o
CC [M] drivers/gpu/drm/i915/display/g4x_dp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/g94.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.o
CC [M] drivers/gpu/drm/i915/display/g4x_hdmi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_thermal.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_clockpowergating.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_processpptables.o
HDRTEST drivers/gpu/drm/xe/xe_lrc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf106.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_powertune.o
CC [M] drivers/gpu/drm/i915/display/icl_dsi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_thermal.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gk104.o
CC [M] drivers/gpu/drm/i915/display/intel_backlight.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu10_hwmgr.o
HDRTEST drivers/gpu/drm/xe/xe_lrc_types.h
HDRTEST drivers/gpu/drm/xe/xe_macros.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pci/gp100.o
CC [M] drivers/gpu/drm/i915/display/intel_crt.o
HDRTEST drivers/gpu/drm/xe/xe_map.h
HDRTEST drivers/gpu/drm/xe/xe_migrate.h
CC [M] drivers/gpu/drm/i915/display/intel_cx0_phy.o
HDRTEST drivers/gpu/drm/xe/xe_migrate_doc.h
CC [M] drivers/gpu/drm/i915/display/intel_ddi.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/pp_psm.o
CC [M] drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_processpptables.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_hwmgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/memx.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_thermal.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gt215.o
CC [M] drivers/gpu/drm/i915/display/intel_display_device.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/pp_overdriver.o
HDRTEST drivers/gpu/drm/xe/xe_mmio.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu_helper.o
CC [M] drivers/gpu/drm/i915/display/intel_display_trace.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gf119.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_processpptables.o
CC [M] drivers/gpu/drm/i915/display/intel_dkl_phy.o
HDRTEST drivers/gpu/drm/xe/xe_mocs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_hwmgr.o
HDRTEST drivers/gpu/drm/xe/xe_module.h
HDRTEST drivers/gpu/drm/xe/xe_pat.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk104.o
HDRTEST drivers/gpu/drm/xe/xe_pci.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_powertune.o
HDRTEST drivers/gpu/drm/xe/xe_pci_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk110.o
HDRTEST drivers/gpu/drm/xe/xe_pcode.h
HDRTEST drivers/gpu/drm/xe/xe_pcode_api.h
HDRTEST drivers/gpu/drm/xe/xe_platform_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_thermal.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/common_baco.o
HDRTEST drivers/gpu/drm/xe/xe_pm.h
CC [M] drivers/gpu/drm/i915/display/intel_dp.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_aux.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk208.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_baco.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gk20a.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega20_baco.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega12_baco.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu9_baco.o
HDRTEST drivers/gpu/drm/xe/xe_pmu.h
HDRTEST drivers/gpu/drm/xe/xe_pmu_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/tonga_baco.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_hdcp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm200.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_link_training.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.o
CC [M] drivers/gpu/drm/i915/display/intel_dp_mst.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/polaris_baco.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/fiji_baco.o
CC [M] drivers/gpu/drm/i915/display/intel_dsi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.o
CC [M] drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/ci_baco.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/smu7_baco.o
CC [M] drivers/gpu/drm/i915/display/intel_dsi_vbt.o
CC [M] drivers/gpu/drm/i915/display/intel_dvo.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/powerplay/amd_powerplay.o
CC [M] drivers/gpu/drm/i915/display/intel_gmbus.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf100.o
HDRTEST drivers/gpu/drm/xe/xe_preempt_fence.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/legacy_dpm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/kv_dpm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/kv_smc.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.o
HDRTEST drivers/gpu/drm/xe/xe_preempt_fence_types.h
CC [M] drivers/gpu/drm/i915/display/intel_hdmi.o
HDRTEST drivers/gpu/drm/xe/xe_pt.h
HDRTEST drivers/gpu/drm/xe/xe_pt_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_smc.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gf117.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk104.o
HDRTEST drivers/gpu/drm/xe/xe_pt_walk.h
CC [M] drivers/gpu/drm/i915/display/intel_lspcon.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_pm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gk20a.o
CC [M] drivers/gpu/drm/i915/display/intel_lvds.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_dpm_internal.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/privring/gp10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_plane.o
HDRTEST drivers/gpu/drm/xe/xe_query.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.o
HDRTEST drivers/gpu/drm/xe/xe_range_fence.h
HDRTEST drivers/gpu/drm/xe/xe_reg_sr.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_crtc.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_irq.o
CC [M] drivers/gpu/drm/i915/display/intel_panel.o
HDRTEST drivers/gpu/drm/xe/xe_reg_sr_types.h
CC [M] drivers/gpu/drm/i915/display/intel_pps.o
CC [M] drivers/gpu/drm/i915/display/intel_qp_tables.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fan.o
HDRTEST drivers/gpu/drm/xe/xe_reg_whitelist.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_color.o
CC [M] drivers/gpu/drm/i915/display/intel_sdvo.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fannil.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fanpwm.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/dc_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_services.o
HDRTEST drivers/gpu/drm/xe/xe_res_cursor.h
CC [M] drivers/gpu/drm/i915/display/intel_snps_phy.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.o
CC [M] drivers/gpu/drm/i915/display/intel_tv.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/fantog.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/ic.o
CC [M] drivers/gpu/drm/i915/display/intel_vdsc.o
CC [M] drivers/gpu/drm/i915/display/intel_vrr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/temp.o
CC [M] drivers/gpu/drm/i915/display/vlv_dsi.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.o
CC [M] drivers/gpu/drm/i915/display/vlv_dsi_pll.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_psr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_replay.o
CC [M] drivers/gpu/drm/i915/i915_perf.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_hdcp.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_crc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf119.o
HDRTEST drivers/gpu/drm/xe/xe_ring_ops.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_tee.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_huc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/conversion.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/fixpt31_32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/vector.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/basics/dc_common.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_cmd.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser_interface.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser_helper.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.o
HDRTEST drivers/gpu/drm/xe/xe_ring_ops_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/base.o
HDRTEST drivers/gpu/drm/xe/xe_rtp.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv04.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table_helper.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser_common.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table2.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/command_table_helper2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv40.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/nv41.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/bios_parser2.o
HDRTEST drivers/gpu/drm/xe/xe_rtp_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/timer/gk20a.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/top/base.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_irq.o
HDRTEST drivers/gpu/drm/xe/xe_sa.h
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_pm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/top/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/top/ga100.o
CC [M] drivers/gpu/drm/i915/pxp/intel_pxp_session.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/uvfn.o
CC [M] drivers/gpu/drm/i915/i915_gpu_error.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce60/command_table_helper_dce60.o
CC [M] drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.o
CC [M] drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.o
CC [M] drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce112/command_table_helper_dce112.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce112/command_table_helper2_dce112.o
CC [M] drivers/gpu/drm/i915/selftests/i915_random.o
HDRTEST drivers/gpu/drm/xe/xe_sa_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dce_calcs.o
CC [M] drivers/gpu/drm/i915/selftests/i915_selftest.o
HDRTEST drivers/gpu/drm/xe/xe_sched_job.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/tu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/custom_float.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/vfn/ga100.o
HDRTEST drivers/gpu/drm/xe/xe_sched_job_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/base.o
CC [M] drivers/gpu/drm/i915/selftests/igt_atomic.o
CC [M] drivers/gpu/drm/i915/selftests/igt_flush_test.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/bw_fixed.o
CC [M] drivers/gpu/drm/i915/selftests/igt_live_test.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gpio.o
HDRTEST drivers/gpu/drm/xe/xe_step.h
HDRTEST drivers/gpu/drm/xe/xe_step_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_rq_dlg_helpers.o
HDRTEST drivers/gpu/drm/xe/xe_sync.h
CC [M] drivers/gpu/drm/i915/selftests/igt_mmap.o
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gf117.o
HDRTEST drivers/gpu/drm/xe/xe_sync_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.o
HDRTEST drivers/gpu/drm/xe/xe_tile.h
HDRTEST drivers/gpu/drm/xe/xe_tile_sysfs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk20a.o
HDRTEST drivers/gpu/drm/xe/xe_tile_sysfs_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/volt/gm20b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/falcon.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/xtensa.o
CC [M] drivers/gpu/drm/i915/selftests/igt_reset.o
CC [M] drivers/gpu/drm/i915/selftests/igt_spinner.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dml1_display_rq_dlg_calc.o
CC [M] drivers/gpu/drm/i915/selftests/librapl.o
CC [M] drivers/gpu/drm/i915/i915_vgpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn10/dcn10_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/dcn20_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_vba.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_rq_dlg_calc_20.o
HDRTEST drivers/gpu/drm/xe/xe_trace.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_stolen_mgr.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.o
HDRTEST drivers/gpu/drm/i915/display/intel_dkl_phy_regs.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_sys_mgr.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_vram_mgr.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_rq_dlg_calc_20v2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.o
HDRTEST drivers/gpu/drm/i915/display/intel_crtc_state_dump.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn20/display_mode_vba_20v2.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gp102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_rq_dlg_calc_21.o
HDRTEST drivers/gpu/drm/i915/display/hsw_ips.h
HDRTEST drivers/gpu/drm/i915/display/g4x_hdmi.h
HDRTEST drivers/gpu/drm/xe/xe_ttm_vram_mgr_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/gv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/tu102.o
HDRTEST drivers/gpu/drm/i915/display/intel_hdcp_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/ga100.o
HDRTEST drivers/gpu/drm/i915/display/intel_overlay.h
HDRTEST drivers/gpu/drm/xe/xe_tuning.h
HDRTEST drivers/gpu/drm/i915/display/intel_display.h
HDRTEST drivers/gpu/drm/i915/display/skl_watermark_regs.h
HDRTEST drivers/gpu/drm/xe/xe_uc.h
HDRTEST drivers/gpu/drm/i915/display/intel_dmc.h
HDRTEST drivers/gpu/drm/xe/xe_uc_debugfs.h
HDRTEST drivers/gpu/drm/i915/display/intel_vga.h
HDRTEST drivers/gpu/drm/xe/xe_uc_fw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/ce/ga102.o
HDRTEST drivers/gpu/drm/xe/xe_uc_fw_abi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/cipher/g84.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/acpi.o
HDRTEST drivers/gpu/drm/i915/display/intel_audio.h
HDRTEST drivers/gpu/drm/i915/display/intel_lvds.h
HDRTEST drivers/gpu/drm/xe/xe_uc_fw_types.h
HDRTEST drivers/gpu/drm/i915/display/intel_modeset_setup.h
HDRTEST drivers/gpu/drm/i915/display/intel_cdclk.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/base.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_limits.h
HDRTEST drivers/gpu/drm/xe/xe_uc_types.h
HDRTEST drivers/gpu/drm/i915/display/intel_hotplug.h
HDRTEST drivers/gpu/drm/i915/display/intel_dkl_phy.h
HDRTEST drivers/gpu/drm/i915/display/intel_atomic.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_mode_vba_21.o
HDRTEST drivers/gpu/drm/i915/display/intel_color_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_driver.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.o
HDRTEST drivers/gpu/drm/xe/xe_vm.h
HDRTEST drivers/gpu/drm/xe/xe_vm_doc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_rq_dlg_calc_30.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/pci.o
HDRTEST drivers/gpu/drm/i915/display/intel_dpll.h
HDRTEST drivers/gpu/drm/xe/xe_vm_types.h
HDRTEST drivers/gpu/drm/xe/xe_wa.h
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi_pll_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp_mst.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/device/user.o
HDRTEST drivers/gpu/drm/i915/display/intel_fdi_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/base.o
HDRTEST drivers/gpu/drm/xe/xe_wait_user_fence.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.o
HDRTEST drivers/gpu/drm/i915/display/g4x_dp.h
HDRTEST drivers/gpu/drm/i915/display/intel_tc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_rq_dlg_calc_31.o
HDRTEST drivers/gpu/drm/xe/xe_wopcm.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/conn.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_mode_vba_314.o
HDRTEST drivers/gpu/drm/xe/xe_wopcm_types.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_params.h
HDRTEST drivers/gpu/drm/i915/display/intel_frontbuffer.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsi_vbt.h
HDRTEST drivers/gpu/drm/i915/display/intel_psr.h
HDRTEST drivers/gpu/drm/i915/display/intel_crt.h
HDRTEST drivers/gpu/drm/i915/display/intel_opregion.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmi.o
HDRTEST drivers/gpu/drm/i915/display/intel_snps_phy_regs.h
LD [M] drivers/gpu/drm/xe/xe.o
HDRTEST drivers/gpu/drm/i915/display/i9xx_wm.h
HDRTEST drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_global_state.h
HDRTEST drivers/gpu/drm/i915/display/intel_lpe_audio.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/head.o
HDRTEST drivers/gpu/drm/i915/display/intel_drrs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_rps.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/display_rq_dlg_calc_314.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/vga.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.o
HDRTEST drivers/gpu/drm/i915/display/intel_fbdev.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.o
HDRTEST drivers/gpu/drm/i915/display/intel_pps_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.o
HDRTEST drivers/gpu/drm/i915/display/intel_hdmi.h
HDRTEST drivers/gpu/drm/i915/display/intel_fdi.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.o
HDRTEST drivers/gpu/drm/i915/display/intel_fb.h
HDRTEST drivers/gpu/drm/i915/display/intel_qp_tables.h
HDRTEST drivers/gpu/drm/i915/display/intel_dsb_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/dcn31_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn321/dcn321_fpu.o
HDRTEST drivers/gpu/drm/i915/display/intel_vdsc.h
HDRTEST drivers/gpu/drm/i915/display/intel_snps_phy.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_core.h
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi_pll.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.o
HDRTEST drivers/gpu/drm/i915/display/intel_dvo_dev.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.o
HDRTEST drivers/gpu/drm/i915/display/intel_hdcp.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.o
HDRTEST drivers/gpu/drm/i915/display/intel_sdvo_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_pch_refclk.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.o
HDRTEST drivers/gpu/drm/i915/display/intel_modeset_lock.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_trace.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_power.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn301/dcn301_fpu.o
HDRTEST drivers/gpu/drm/i915/display/intel_dp_aux_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn302/dcn302_fpu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.o
HDRTEST drivers/gpu/drm/i915/display/i9xx_plane.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.o
HDRTEST drivers/gpu/drm/i915/display/intel_dp_aux_backlight.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn314/dcn314_fpu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.o
HDRTEST drivers/gpu/drm/i915/display/intel_dpll_mgr.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/udisp.o
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/disp/uhead.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dsc/rc_calc_fpu.o
HDRTEST drivers/gpu/drm/i915/display/intel_plane_initial.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dcn_calcs.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/nv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dcn_calc_math.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_device.h
HDRTEST drivers/gpu/drm/i915/display/intel_fifo_underrun.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/gf119.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dml/calcs/dcn_calc_auto.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce60/dce60_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce100/dce_clk_mgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_cursor.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/gv100.o
HDRTEST drivers/gpu/drm/i915/display/vlv_dsi_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/user.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv04.o
HDRTEST drivers/gpu/drm/i915/display/intel_cx0_phy.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce110/dce110_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.o
HDRTEST drivers/gpu/drm/i915/display/skl_scaler.h
HDRTEST drivers/gpu/drm/i915/display/intel_hti.h
HDRTEST drivers/gpu/drm/i915/display/icl_dsi_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce112/dce112_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dce120/dce120_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/dma/usergv100.o
HDRTEST drivers/gpu/drm/i915/display/intel_atomic_plane.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv1_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn10/rv2_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.o
HDRTEST drivers/gpu/drm/i915/display/skl_watermark.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/cgrp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_fbc.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_reg_defs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/chid.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/runl.o
HDRTEST drivers/gpu/drm/i915/display/intel_acpi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/runq.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.o
HDRTEST drivers/gpu/drm/i915/display/intel_connector.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_dpt.h
HDRTEST drivers/gpu/drm/i915/display/intel_quirks.h
HDRTEST drivers/gpu/drm/i915/display/intel_dp_link_training.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.o
HDRTEST drivers/gpu/drm/i915/display/intel_color.h
HDRTEST drivers/gpu/drm/i915/display/intel_crtc.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_debugfs.h
HDRTEST drivers/gpu/drm/i915/display/intel_modeset_verify.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_power_well.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_psr_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/g98.o
HDRTEST drivers/gpu/drm/i915/display/intel_wm.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn30/dcn30_clk_mgr_smu_msg.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.o
HDRTEST drivers/gpu/drm/i915/display/intel_pipe_crc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/vg_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk110.o
HDRTEST drivers/gpu/drm/i915/display/intel_audio_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_panel.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn301/dcn301_smu.o
HDRTEST drivers/gpu/drm/i915/display/intel_sprite.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk208.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_smu.o
HDRTEST drivers/gpu/drm/i915/display/intel_wm_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_smu.o
HDRTEST drivers/gpu/drm/i915/display/intel_tv.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_clk_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_smu.o
HDRTEST drivers/gpu/drm/i915/display/intel_hti_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_vrr.h
HDRTEST drivers/gpu/drm/i915/display/intel_load_detect.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_clk_mgr.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn316/dcn316_smu.o
HDRTEST drivers/gpu/drm/i915/display/skl_universal_plane.h
HDRTEST drivers/gpu/drm/i915/display/intel_mg_phy_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn316/dcn316_clk_mgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_bw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm200.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_irq.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.o
HDRTEST drivers/gpu/drm/i915/display/intel_de.h
HDRTEST drivers/gpu/drm/i915/display/intel_lvds_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp100.o
HDRTEST drivers/gpu/drm/i915/display/intel_gmbus_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/gv100.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn32/dcn32_clk_mgr_smu_msg.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/ga102.o
HDRTEST drivers/gpu/drm/i915/display/intel_dvo.h
HDRTEST drivers/gpu/drm/i915/display/intel_sdvo.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/ucgrp.o
HDRTEST drivers/gpu/drm/i915/display/intel_dp_aux.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_audio.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_stream_encoder.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/fifo/uchan.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_link_encoder.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_hwseq.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_mem_input.o
HDRTEST drivers/gpu/drm/i915/display/intel_vdsc_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.o
HDRTEST drivers/gpu/drm/i915/display/intel_combo_phy.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv15.o
HDRTEST drivers/gpu/drm/i915/display/intel_dvo_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv17.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_scl_filters.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.o
HDRTEST drivers/gpu/drm/i915/display/intel_gmbus.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_transform.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_dmcu.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv44.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_abm.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_ipp.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_aux.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/g84.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gt200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/mcp79.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gt215.o
HDRTEST drivers/gpu/drm/i915/display/intel_hdcp_gsc.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_i2c.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/mcp89.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_i2c_hw.o
HDRTEST drivers/gpu/drm/i915/display/intel_dsi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_i2c_sw.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.o
HDRTEST drivers/gpu/drm/i915/display/intel_dmc_regs.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_psr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_abm.o
HDRTEST drivers/gpu/drm/i915/display/intel_ddi.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gf119.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk104.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_abm_lcd.o
HDRTEST drivers/gpu/drm/i915/display/intel_hotplug_irq.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk208.o
HDRTEST drivers/gpu/drm/i915/display/intel_tv_regs.h
HDRTEST drivers/gpu/drm/i915/display/intel_dsb.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_panel_cntl.o
HDRTEST drivers/gpu/drm/i915/display/intel_bios.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_hw_lock_mgr.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_outbox.o
HDRTEST drivers/gpu/drm/i915/display/intel_pch_display.h
HDRTEST drivers/gpu/drm/i915/display/intel_display_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.o
HDRTEST drivers/gpu/drm/i915/display/intel_backlight.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dmub_replay.o
HDRTEST drivers/gpu/drm/i915/display/intel_vblank.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/gpio_base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gm20b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/gpio_service.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp102.o
HDRTEST drivers/gpu/drm/i915/display/intel_dp.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_factory.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_gpio.o
HDRTEST drivers/gpu/drm/i915/display/intel_pmdemand.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_hpd.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_ddc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp107.o
HDRTEST drivers/gpu/drm/i915/display/intel_backlight_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_generic.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp108.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/gv100.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/hw_translate.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce60/hw_translate_dce60.o
HDRTEST drivers/gpu/drm/i915/display/intel_combo_phy_regs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce60/hw_factory_dce60.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_reset.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce80/hw_translate_dce80.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce80/hw_factory_dce80.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_power_map.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce110/hw_translate_dce110.o
HDRTEST drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce110/hw_factory_dce110.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv50.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_wa.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce120/hw_translate_dce120.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf104.o
HDRTEST drivers/gpu/drm/i915/display/icl_dsi.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dce120/hw_factory_dce120.o
HDRTEST drivers/gpu/drm/i915/display/intel_lspcon.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn10/hw_translate_dcn10.o
HDRTEST drivers/gpu/drm/i915/display/intel_dpio_phy.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn10/hw_factory_dcn10.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn20/hw_translate_dcn20.o
HDRTEST drivers/gpu/drm/i915/display/intel_dp_hdcp.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf108.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf110.o
HDRTEST drivers/gpu/drm/i915/display/intel_fb_pin.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn20/hw_factory_dcn20.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn21/hw_translate_dcn21.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn21/hw_factory_dcn21.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf119.o
HDRTEST drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
HDRTEST drivers/gpu/drm/i915/display/intel_link_bw.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn30/hw_translate_dcn30.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn30/hw_factory_dcn30.o
HDRTEST drivers/gpu/drm/i915/display/intel_pps.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk110.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn315/hw_translate_dcn315.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn315/hw_factory_dcn315.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn32/hw_translate_dcn32.o
HDRTEST drivers/gpu/drm/i915/display/intel_sprite_uapi.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ttm.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/gpio/dcn32/hw_factory_dcn32.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_region.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/irq_service.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dce60/irq_service_dce60.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dce80/irq_service_dce80.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk110b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dce110/irq_service_dce110.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_context_types.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk208.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_lmem.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dce120/irq_service_dce120.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn10/irq_service_dcn10.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn20/irq_service_dcn20.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn21/irq_service_dcn21.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk20a.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_mman.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn201/irq_service_dcn201.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_object_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn30/irq_service_dcn30.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm200.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn302/irq_service_dcn302.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm20b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn303/irq_service_dcn303.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp100.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_context.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn31/irq_service_dcn31.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgp107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn314/irq_service_dcn314.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn315/irq_service_dcn315.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxtu102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxga102.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/irq/dcn32/irq_service_dcn32.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_detection.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_clflush.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_tiling.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv40.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_resource.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_stolen.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_validation.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_trace.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_cts.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_fpga.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_create.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv50.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ttm_move.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_ioctls.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dpia.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_domain.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mpeg/g84.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_internal.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_hpo_dp.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_dio_fixed_vs_pe_retimer.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gt215.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/mock_context.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_hpd.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/huge_gem_object.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/mock_gem_object.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_ddc.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msppp/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dpcd.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_dpia.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/mock_dmabuf.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msppp/gt215.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msvld/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msvld/gt215.o
HDRTEST drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_userptr.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msvld/mcp89.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_8b_10b.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_128b_132b.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_pm.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_dpia.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_shrinker.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gemfs.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_auxless.o
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_object.h
HDRTEST drivers/gpu/drm/i915/gem/i915_gem_object_frontbuffer.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.o
HDRTEST drivers/gpu/drm/i915/gt/intel_timeline_types.h
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_phy.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/nvenc/gm107.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/nvdec/base.o
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/nvdec/gm107.o
HDRTEST drivers/gpu/drm/i915/gt/selftest_engine.h
CC [M] drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga102.o
CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_irq_handler.o
HDRTEST drivers/gpu/drm/i915/gt/intel_breadcrumbs.h
HDRTEST drivers/gpu/dr
^ permalink raw reply [flat|nested] 81+ messages in thread* [Intel-xe] ✗ CI.Hooks: failure for uAPI Alignment - take 2
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (53 preceding siblings ...)
2023-11-03 14:47 ` [Intel-xe] ✓ CI.Build: " Patchwork
@ 2023-11-03 14:48 ` Patchwork
2023-11-03 14:49 ` [Intel-xe] ✓ CI.checksparse: success " Patchwork
2023-11-03 15:24 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
56 siblings, 0 replies; 81+ messages in thread
From: Patchwork @ 2023-11-03 14:48 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - take 2
URL : https://patchwork.freedesktop.org/series/125955/
State : failure
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
+ pwd
+ ls -la
/workspace
total 1192
drwxrwxr-x 12 1003 1003 4096 Nov 3 14:48 .
drwxr-xr-x 1 root root 4096 Nov 3 14:48 ..
-rw-rw-r-- 1 1003 1003 797466 Nov 3 14:47 build.log
-rw-rw-r-- 1 1003 1003 18721 Nov 3 14:39 checkpatch.log
drwxrwxr-x 5 1003 1003 4096 Nov 3 14:36 ci
drwxrwxr-x 9 1003 1003 4096 Nov 3 14:36 docker
drwxrwxr-x 8 1003 1003 4096 Nov 3 14:36 .git
-rw-rw-r-- 1 1003 1003 3275 Nov 3 14:38 git_apply.log
drwxrwxr-x 4 1003 1003 4096 Nov 3 14:36 .github
-rw-rw-r-- 1 1003 1003 233 Nov 3 14:36 .groovylintrc.json
-rw-rw-r-- 1 1003 1003 78 Nov 3 14:48 hooks.log
drwxrwxr-x 31 1003 1003 4096 Nov 3 14:47 kernel
-rw-rw-r-- 1 1003 1003 295199 Nov 3 14:38 kernel.mbox
-rw-rw-r-- 1 1003 1003 28749 Nov 3 14:40 kunit.log
-rw-rw-r-- 1 1003 1003 48 Nov 3 14:38 parent.tag
drwxrwxr-x 44 1003 1003 4096 Nov 3 14:36 pipelines
-rw-rw-r-- 1 1003 1003 793 Nov 3 14:36 README.adoc
drwxrwxr-x 3 1003 1003 4096 Nov 3 14:36 scripts
drwxrwxr-x 3 1003 1003 4096 Nov 3 14:36 src
drwxrwxr-x 2 1003 1003 4096 Nov 3 14:36 vars
drwxrwxr-x 2 1003 1003 4096 Nov 3 14:36 .vscode
+ uname -a
Linux d31cfece0d3e 5.4.0-164-generic #181-Ubuntu SMP Fri Sep 1 13:41:22 UTC 2023 x86_64 x86_64 x86_64 GNU/Linux
+ export
+ grep -Ei '(^|\W)CI_'
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-default"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
+ '[' -n /workspace ']'
+ git_args='-C /workspace/kernel'
+ git_log_args=
+ git --no-pager -C /workspace/kernel log --format=oneline --abbrev-commit
f8ae8a8b6 drm/xe/uapi: Add examples of user space code
cfa4f1f0f drm/xe/uapi: Add block diagram of a device
b75f3da14 drm/xe/uapi: Align on a common way to return arrays (engines)
a7c8e387c drm/xe/uapi: Align on a common way to return arrays (gt)
7f40430db drm/xe/uapi: Align on a common way to return arrays (memory regions)
e0af430ad drm/xe/uapi: Remove bogus engine list from the wait_user_fence IOCTL
cb371e714 fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
72b3547e1 squash! drm/xe/uapi: Rename couple exec_queue items
f09d891bb drm/xe/uapi: Add Tile ID information to the GT info query
dbf2478c6 drm/xe/uapi: Crystal Reference Clock updates
a86a87399 drm/xe/uapi: Add link to Xe documentation
114ce04ba drm/xe/uapi: Refactor engine information
dcdb17ac2 drm/xe/uapi: Rename couple exec_queue items
c9cec85b9 drm/xe/uapi: Convert tile_mask to a pt_placement_hint
7c1d7e92e drm/xe/uapi: Be more specific about the vm_bind prefetch region
6a0270930 drm/xe/uapi: Document the memory_region bitmask
178a3f189 drm/xe/uapi: Move memory_region masks from GT to engine
3df838d56 fixup! drm/xe/uapi: Split xe_sync types from flags
c80231c5b drm/xe/uapi: Move xe_exec after xe_exec_queue
20987be92 drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK
88a27a444 drm/xe/uapi: Standardize the FLAG naming and assignment
f0fae092c drm/xe/uapi: Split xe_sync types from flags
09e8ed1a5 drm/xe/uapi: More uAPI documentation additions and cosmetic updates
4ed2965f7 drm/xe/uapi: Order sections
487fa31c4 drm/xe/uapi: Fix indentation issues that sometimes causes build warning
0087d80c6 fixup! drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
558f04824 xe/xe_bo: Reject bo creation of unaligned size
8cde06fe3 drm/xe/pmu: Drop interrupt pmu event
960fb8f4c drm/xe/uapi: Replace BO with GEM in documentation
8da345c3e drm/xe: Make DRM_XE_DEVICE_QUERY_ENGINES future proof
03bc8b0ce drm/xe/uapi: Rename query's mem_usage to mem_regions
4e622686c drm/xe/uapi: Rename *_mem_regions masks
b5100554c drm/xe/uapi: Remove unused QUERY_CONFIG_GT_COUNT
17f0b60d9 drm/xe/uapi: Remove unused QUERY_CONFIG_MEM_REGION_COUNT
7eac25575 drm/xe/uapi: Remove unused inaccessible memory region
bf686e6ff drm/xe/uapi: Separate bo_create placement from flags
fc52bae5f drm/xe/uapi: Kill VM_MADVISE IOCTL
56d9994cd drm/xe/uapi: Remove GT_TYPE_REMOTE
22b414069 fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
b86e5314b drm/xe/uapi: Make constant comments visible in kernel doc
59b57dfeb fixup! drm/xe: Add uAPI to query micro-controler firmware version
1cd63ff52 drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
624448442 drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
e70f626ef drm/xe: Remove useless query config num_params
a74517063 drm/xe: Extend uAPI to query HuC micro-controler firmware version
04fed299a drm/xe/uapi: Document DRM_XE_DEVICE_QUERY_HWCONFIG
a7beddc1c drm/xe: Add uAPI to query micro-controler firmware version
f378f7b96 drm/xe: Extend drm_xe_vm_bind_op
4eca559df drm/xe/uapi: Add documentation for query
b71b984e7 fixup! drm/xe: Correlate engine and cpu timestamps with better accuracy
58dfdb8dc drm/xe: Add Wa_14019821291
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ cd /workspace/kernel
+ grep -q -e '^CONFIG_DRM_XE_DISPLAY=[yY]' /workspace/kernel/build64-default/.config
+ RESTORE_DISPLAY_CONFIG=1
+ trap cleanup EXIT
+ ./scripts/config --file /workspace/kernel/build64-default/.config --disable CONFIG_DRM_XE_DISPLAY
++ nproc
+ make -j48 O=/workspace/kernel/build64-default modules_prepare
make[1]: Entering directory '/workspace/kernel/build64-default'
SYNC include/config/auto.conf.cmd
GEN Makefile
GEN Makefile
UPD include/generated/compile.h
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
DESCEND objtool
CALL ../scripts/checksyscalls.sh
HOSTCC /workspace/kernel/build64-default/tools/objtool/fixdep.o
HOSTLD /workspace/kernel/build64-default/tools/objtool/fixdep-in.o
LINK /workspace/kernel/build64-default/tools/objtool/fixdep
INSTALL libsubcmd_headers
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64-default/tools/objtool/weak.o
CC /workspace/kernel/build64-default/tools/objtool/check.o
CC /workspace/kernel/build64-default/tools/objtool/special.o
CC /workspace/kernel/build64-default/tools/objtool/builtin-check.o
CC /workspace/kernel/build64-default/tools/objtool/elf.o
CC /workspace/kernel/build64-default/tools/objtool/orc_gen.o
CC /workspace/kernel/build64-default/tools/objtool/objtool.o
CC /workspace/kernel/build64-default/tools/objtool/orc_dump.o
CC /workspace/kernel/build64-default/tools/objtool/libstring.o
CC /workspace/kernel/build64-default/tools/objtool/libctype.o
CC /workspace/kernel/build64-default/tools/objtool/str_error_r.o
CC /workspace/kernel/build64-default/tools/objtool/librbtree.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/decode.o
LD /workspace/kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64-default/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64-default/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64-default'
++ nproc
+ make -j48 O=/workspace/kernel/build64-default M=drivers/gpu/drm/xe W=1
make[1]: Entering directory '/workspace/kernel/build64-default'
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC [M] drivers/gpu/drm/xe/xe_device.o
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC [M] drivers/gpu/drm/xe/xe_drm_client.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC [M] drivers/gpu/drm/xe/xe_gt.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC [M] drivers/gpu/drm/xe/xe_heci_gsc.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC [M] drivers/gpu/drm/xe/xe_range_fence.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC [M] drivers/gpu/drm/xe/xe_hwmon.o
CC [M] drivers/gpu/drm/xe/xe_pmu.o
HDRTEST drivers/gpu/drm/xe/abi/guc_klvs_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_errors_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_slpc_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_mmio_abi.h
CC [M] drivers/gpu/drm/xe/tests/xe_bo_test.o
HDRTEST drivers/gpu/drm/xe/abi/guc_actions_abi.h
HDRTEST drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h
CC [M] drivers/gpu/drm/xe/tests/xe_dma_buf_test.o
HDRTEST drivers/gpu/drm/xe/abi/guc_messages_abi.h
CC [M] drivers/gpu/drm/xe/tests/xe_migrate_test.o
HDRTEST drivers/gpu/drm/xe/instructions/xe_instr_defs.h
CC [M] drivers/gpu/drm/xe/tests/xe_pci_test.o
HDRTEST drivers/gpu/drm/xe/instructions/xe_gfxpipe_commands.h
CC [M] drivers/gpu/drm/xe/tests/xe_rtp_test.o
HDRTEST drivers/gpu/drm/xe/instructions/xe_mi_commands.h
HDRTEST drivers/gpu/drm/xe/regs/xe_reg_defs.h
CC [M] drivers/gpu/drm/xe/tests/xe_wa_test.o
HDRTEST drivers/gpu/drm/xe/regs/xe_guc_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_gt_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_gpu_commands.h
HDRTEST drivers/gpu/drm/xe/regs/xe_lrc_layout.h
HDRTEST drivers/gpu/drm/xe/regs/xe_mchbar_regs.h
HDRTEST drivers/gpu/drm/xe/regs/xe_engine_regs.h
HDRTEST drivers/gpu/drm/xe/tests/xe_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_pci_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_migrate_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_dma_buf_test.h
HDRTEST drivers/gpu/drm/xe/tests/xe_bo_test.h
HDRTEST drivers/gpu/drm/xe/xe_assert.h
HDRTEST drivers/gpu/drm/xe/xe_bb.h
HDRTEST drivers/gpu/drm/xe/xe_bb_types.h
HDRTEST drivers/gpu/drm/xe/xe_bo.h
HDRTEST drivers/gpu/drm/xe/xe_bo_doc.h
HDRTEST drivers/gpu/drm/xe/xe_bo_evict.h
HDRTEST drivers/gpu/drm/xe/xe_bo_types.h
HDRTEST drivers/gpu/drm/xe/xe_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_devcoredump.h
HDRTEST drivers/gpu/drm/xe/xe_devcoredump_types.h
HDRTEST drivers/gpu/drm/xe/xe_device.h
HDRTEST drivers/gpu/drm/xe/xe_device_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_device_types.h
HDRTEST drivers/gpu/drm/xe/xe_dma_buf.h
HDRTEST drivers/gpu/drm/xe/xe_drm_client.h
HDRTEST drivers/gpu/drm/xe/xe_drv.h
HDRTEST drivers/gpu/drm/xe/xe_exec.h
HDRTEST drivers/gpu/drm/xe/xe_exec_queue.h
HDRTEST drivers/gpu/drm/xe/xe_exec_queue_types.h
HDRTEST drivers/gpu/drm/xe/xe_execlist.h
HDRTEST drivers/gpu/drm/xe/xe_execlist_types.h
HDRTEST drivers/gpu/drm/xe/xe_force_wake.h
HDRTEST drivers/gpu/drm/xe/xe_force_wake_types.h
HDRTEST drivers/gpu/drm/xe/xe_ggtt.h
HDRTEST drivers/gpu/drm/xe/xe_ggtt_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt.h
HDRTEST drivers/gpu/drm/xe/xe_gt_clock.h
HDRTEST drivers/gpu/drm/xe/xe_gt_debugfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_idle_sysfs_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_mcr.h
../drivers/gpu/drm/xe/xe_wait_user_fence.c:53:35: error: ‘user_to_xe_engine_class’ defined but not used [-Werror=unused-const-variable=]
53 | static const enum xe_engine_class user_to_xe_engine_class[] = {
| ^~~~~~~~~~~~~~~~~~~~~~~
HDRTEST drivers/gpu/drm/xe/xe_gt_pagefault.h
HDRTEST drivers/gpu/drm/xe/xe_gt_printk.h
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs.h
HDRTEST drivers/gpu/drm/xe/xe_gt_sysfs_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
HDRTEST drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h
HDRTEST drivers/gpu/drm/xe/xe_gt_topology.h
HDRTEST drivers/gpu/drm/xe/xe_gt_types.h
HDRTEST drivers/gpu/drm/xe/xe_guc.h
HDRTEST drivers/gpu/drm/xe/xe_guc_ads.h
cc1: all warnings being treated as errors
make[3]: *** [../scripts/Makefile.build:243: drivers/gpu/drm/xe/xe_wait_user_fence.o] Error 1
make[3]: *** Waiting for unfinished jobs....
make[2]: *** [/workspace/kernel/Makefile:1913: drivers/gpu/drm/xe] Error 2
make[1]: Leaving directory '/workspace/kernel/build64-default'
make[1]: *** [/workspace/kernel/Makefile:234: __sub-make] Error 2
make: *** [Makefile:234: __sub-make] Error 2
+ cleanup
+ '[' 1 -eq 1 ']'
+ ./scripts/config --file /workspace/kernel/build64-default/.config --enable CONFIG_DRM_XE_DISPLAY
run-parts: /workspace/ci/hooks/10-build-W1 exited with return code 2
^ permalink raw reply [flat|nested] 81+ messages in thread* [Intel-xe] ✓ CI.checksparse: success for uAPI Alignment - take 2
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (54 preceding siblings ...)
2023-11-03 14:48 ` [Intel-xe] ✗ CI.Hooks: failure " Patchwork
@ 2023-11-03 14:49 ` Patchwork
2023-11-03 15:24 ` [Intel-xe] ✗ CI.BAT: failure " Patchwork
56 siblings, 0 replies; 81+ messages in thread
From: Patchwork @ 2023-11-03 14:49 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - take 2
URL : https://patchwork.freedesktop.org/series/125955/
State : success
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 58dfdb8dc78e5668f9891c798ec3191863c1e0d2
Sparse version: 0.6.1 (Ubuntu: 0.6.1-2build1)
Fast mode used, each commit won't be checked separately.
Okay!
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 81+ messages in thread* [Intel-xe] ✗ CI.BAT: failure for uAPI Alignment - take 2
2023-11-03 14:34 [Intel-xe] [PATCH v2 00/50] uAPI Alignment - take 2 Francois Dugast
` (55 preceding siblings ...)
2023-11-03 14:49 ` [Intel-xe] ✓ CI.checksparse: success " Patchwork
@ 2023-11-03 15:24 ` Patchwork
56 siblings, 0 replies; 81+ messages in thread
From: Patchwork @ 2023-11-03 15:24 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 16365 bytes --]
== Series Details ==
Series: uAPI Alignment - take 2
URL : https://patchwork.freedesktop.org/series/125955/
State : failure
== Summary ==
CI Bug Log - changes from xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2_BAT -> xe-pw-125955v1_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-125955v1_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-125955v1_BAT, please notify your bug team (lgci.bug.filing@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (3 -> 4)
------------------------------
Additional (1): bat-dg2-oem2
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-125955v1_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_dma_buf_sync@export-dma-buf-once:
- bat-pvc-2: [PASS][1] -> [FAIL][2] +14 other tests fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-pvc-2/igt@xe_dma_buf_sync@export-dma-buf-once.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-pvc-2/igt@xe_dma_buf_sync@export-dma-buf-once.html
* igt@xe_exec_compute_mode@twice-userptr-invalidate:
- bat-atsm-2: [PASS][3] -> [FAIL][4] +127 other tests fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@xe_exec_compute_mode@twice-userptr-invalidate.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@xe_exec_compute_mode@twice-userptr-invalidate.html
* igt@xe_exec_fault_mode@twice-userptr-invalidate-prefetch:
- bat-pvc-2: NOTRUN -> [FAIL][5] +183 other tests fail
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-pvc-2/igt@xe_exec_fault_mode@twice-userptr-invalidate-prefetch.html
* igt@xe_intel_bb@create-in-region:
- bat-dg2-oem2: NOTRUN -> [FAIL][6] +208 other tests fail
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-dg2-oem2/igt@xe_intel_bb@create-in-region.html
- bat-adlp-7: [PASS][7] -> [FAIL][8] +168 other tests fail
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-adlp-7/igt@xe_intel_bb@create-in-region.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-adlp-7/igt@xe_intel_bb@create-in-region.html
#### Warnings ####
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-adlp-7: [FAIL][9] ([Intel XE#609]) -> [FAIL][10] +2 other tests fail
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-adlp-7/igt@kms_addfb_basic@basic-y-tiled-legacy.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-adlp-7/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@invalid-set-prop-any:
- bat-atsm-2: [SKIP][11] ([i915#6077]) -> [FAIL][12] +33 other tests fail
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@kms_addfb_basic@invalid-set-prop-any.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@kms_addfb_basic@invalid-set-prop-any.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
- bat-atsm-2: [SKIP][13] ([Intel XE#782]) -> [FAIL][14] +5 other tests fail
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@kms_cursor_legacy@basic-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-atsm-2: [SKIP][15] ([Intel XE#784]) -> [FAIL][16]
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@kms_dsc@dsc-basic.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@kms_dsc@dsc-basic.html
- bat-adlp-7: [SKIP][17] ([Intel XE#423]) -> [FAIL][18]
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-adlp-7/igt@kms_dsc@dsc-basic.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-adlp-7/igt@kms_dsc@dsc-basic.html
* igt@kms_flip@basic-flip-vs-modeset:
- bat-atsm-2: [SKIP][19] ([Intel XE#541]) -> [FAIL][20] +3 other tests fail
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@kms_flip@basic-flip-vs-modeset.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_force_connector_basic@force-connector-state:
- bat-atsm-2: [SKIP][21] ([Intel XE#540]) -> [FAIL][22] +3 other tests fail
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@kms_force_connector_basic@force-connector-state.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@basic:
- bat-adlp-7: [DMESG-FAIL][23] ([Intel XE#282] / [i915#2017]) -> [FAIL][24]
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-adlp-7/igt@kms_frontbuffer_tracking@basic.html
- bat-atsm-2: [SKIP][25] ([Intel XE#783]) -> [FAIL][26]
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@kms_frontbuffer_tracking@basic.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24:
- bat-atsm-2: [SKIP][27] ([i915#1836]) -> [FAIL][28] +6 other tests fail
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24.html
* igt@kms_prop_blob@basic:
- bat-atsm-2: [SKIP][29] ([Intel XE#780]) -> [FAIL][30]
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@kms_prop_blob@basic.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@kms_prop_blob@basic.html
* igt@kms_psr@cursor_plane_move:
- bat-atsm-2: [SKIP][31] ([Intel XE#535]) -> [FAIL][32] +2 other tests fail
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@kms_psr@cursor_plane_move.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@kms_psr@cursor_plane_move.html
* igt@xe_compute@compute-square:
- bat-atsm-2: [SKIP][33] ([Intel XE#672]) -> [FAIL][34]
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@xe_compute@compute-square.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@xe_compute@compute-square.html
* igt@xe_evict@evict-beng-small-external:
- bat-pvc-2: [FAIL][35] ([Intel XE#389]) -> [FAIL][36] +3 other tests fail
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-pvc-2/igt@xe_evict@evict-beng-small-external.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-pvc-2/igt@xe_evict@evict-beng-small-external.html
- bat-adlp-7: [SKIP][37] ([Intel XE#261] / [Intel XE#688]) -> [FAIL][38] +15 other tests fail
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-adlp-7/igt@xe_evict@evict-beng-small-external.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-adlp-7/igt@xe_evict@evict-beng-small-external.html
* igt@xe_evict@evict-small-cm:
- bat-pvc-2: [DMESG-FAIL][39] ([Intel XE#482]) -> [FAIL][40] +3 other tests fail
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-pvc-2/igt@xe_evict@evict-small-cm.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-pvc-2/igt@xe_evict@evict-small-cm.html
* igt@xe_exec_fault_mode@twice-userptr-invalidate-imm:
- bat-atsm-2: [SKIP][41] ([Intel XE#288]) -> [FAIL][42] +17 other tests fail
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@xe_exec_fault_mode@twice-userptr-invalidate-imm.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@xe_exec_fault_mode@twice-userptr-invalidate-imm.html
* igt@xe_huc_copy@huc_copy:
- bat-atsm-2: [SKIP][43] ([Intel XE#255]) -> [FAIL][44]
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@xe_huc_copy@huc_copy.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@xe_huc_copy@huc_copy.html
* igt@xe_mmap@vram:
- bat-adlp-7: [SKIP][45] ([Intel XE#263]) -> [FAIL][46]
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-adlp-7/igt@xe_mmap@vram.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-adlp-7/igt@xe_mmap@vram.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@xe_create@create-execqueues-leak}:
- bat-atsm-2: [FAIL][47] ([Intel XE#524]) -> [FAIL][48] +1 other test fail
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@xe_create@create-execqueues-leak.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@xe_create@create-execqueues-leak.html
* {igt@xe_create@create-execqueues-noleak}:
- bat-adlp-7: [FAIL][49] ([Intel XE#524]) -> [FAIL][50]
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-adlp-7/igt@xe_create@create-execqueues-noleak.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-adlp-7/igt@xe_create@create-execqueues-noleak.html
* {igt@xe_evict_ccs@evict-ccs-overcommit-parallel-nofree-samefd}:
- bat-pvc-2: [INCOMPLETE][51] ([Intel XE#854]) -> [FAIL][52]
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-pvc-2/igt@xe_evict_ccs@evict-ccs-overcommit-parallel-nofree-samefd.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-pvc-2/igt@xe_evict_ccs@evict-ccs-overcommit-parallel-nofree-samefd.html
- bat-adlp-7: [SKIP][53] ([Intel XE#688]) -> [FAIL][54] +1 other test fail
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-adlp-7/igt@xe_evict_ccs@evict-ccs-overcommit-parallel-nofree-samefd.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-adlp-7/igt@xe_evict_ccs@evict-ccs-overcommit-parallel-nofree-samefd.html
* {igt@xe_evict_ccs@evict-ccs-overcommit-simple}:
- bat-pvc-2: [PASS][55] -> [FAIL][56] +2 other tests fail
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-pvc-2/igt@xe_evict_ccs@evict-ccs-overcommit-simple.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-pvc-2/igt@xe_evict_ccs@evict-ccs-overcommit-simple.html
* {igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-rebind}:
- bat-atsm-2: [PASS][57] -> [FAIL][58] +14 other tests fail
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-rebind.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@xe_exec_compute_mode@twice-bindexecqueue-userptr-rebind.html
* {igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate}:
- bat-pvc-2: NOTRUN -> [FAIL][59] +27 other tests fail
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-pvc-2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate.html
- bat-dg2-oem2: NOTRUN -> [FAIL][60] +31 other tests fail
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-dg2-oem2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate.html
* {igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind}:
- bat-atsm-2: [SKIP][61] ([Intel XE#288]) -> [FAIL][62] +14 other tests fail
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-atsm-2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-atsm-2/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind.html
* {igt@xe_vm@bind-execqueues-independent}:
- bat-adlp-7: [PASS][63] -> [FAIL][64] +13 other tests fail
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2/bat-adlp-7/igt@xe_vm@bind-execqueues-independent.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/bat-adlp-7/igt@xe_vm@bind-execqueues-independent.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#263]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/263
[Intel XE#282]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/282
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#389]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/389
[Intel XE#423]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/423
[Intel XE#482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/482
[Intel XE#524]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/524
[Intel XE#535]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/535
[Intel XE#540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/540
[Intel XE#541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/541
[Intel XE#609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/609
[Intel XE#672]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/672
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/780
[Intel XE#782]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/782
[Intel XE#783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/783
[Intel XE#784]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/784
[Intel XE#854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/854
[i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
[i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
[i915#6077]: https://gitlab.freedesktop.org/drm/intel/issues/6077
Build changes
-------------
* IGT: IGT_7570 -> IGT_7573
* Linux: xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2 -> xe-pw-125955v1
IGT_7570: 1cd44e96b0419e00b9a09f8ead1369eab432d4f9 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_7573: 69485d223b256208614e9949a4a7e84bde52d5f5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-467-58dfdb8dc78e5668f9891c798ec3191863c1e0d2: 58dfdb8dc78e5668f9891c798ec3191863c1e0d2
xe-pw-125955v1: 125955v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-125955v1/index.html
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