* [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming
@ 2023-11-14 13:34 Francois Dugast
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 1/8] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
` (10 more replies)
0 siblings, 11 replies; 22+ messages in thread
From: Francois Dugast @ 2023-11-14 13:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
The series "uAPI Alignment - take 2 v3" [1] has grown too much which makes
it difficult to review and to digest by UMDs. This new series is a second
break down which focuses only on renaming in the uAPI, which does not break
binary compatibility. It is to be applied on top of [2].
[1] https://patchwork.freedesktop.org/series/126203/
[2] https://patchwork.freedesktop.org/series/126278/
Francois Dugast (3):
drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
drm/xe/uapi: Change rsvd to pad in struct drm_xe_class_instance
Rodrigo Vivi (5):
drm/xe/uapi: Rename *_mem_regions masks
drm/xe/uapi: Rename query's mem_usage to mem_regions
drm/xe/uapi: Standardize the FLAG naming and assignment
drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK
drm/xe/uapi: Be more specific about the vm_bind prefetch region
drivers/gpu/drm/xe/xe_bo.c | 14 +-
drivers/gpu/drm/xe/xe_exec_queue.c | 22 +--
drivers/gpu/drm/xe/xe_gt.c | 2 +-
drivers/gpu/drm/xe/xe_pmu.c | 24 +--
drivers/gpu/drm/xe/xe_query.c | 57 +++----
drivers/gpu/drm/xe/xe_sync.c | 16 +-
drivers/gpu/drm/xe/xe_vm.c | 101 ++++++------
drivers/gpu/drm/xe/xe_vm_doc.h | 14 +-
drivers/gpu/drm/xe/xe_wait_user_fence.c | 24 +--
include/uapi/drm/xe_drm.h | 205 ++++++++++++------------
10 files changed, 245 insertions(+), 234 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-xe] [PATCH v1 1/8] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
@ 2023-11-14 13:34 ` Francois Dugast
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 2/8] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
` (9 subsequent siblings)
10 siblings, 0 replies; 22+ messages in thread
From: Francois Dugast @ 2023-11-14 13:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Most constants defined in xe_drm.h use DRM_XE_ as prefix which is
helpful to identify the name space. Make this systematic and add
this prefix where it was missing.
v2:
- fix vertical alignment of define values
- remove double DRM_ in some variables (José Roberto de Souza)
v3: Rebase
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_bo.c | 14 ++--
drivers/gpu/drm/xe/xe_exec_queue.c | 22 ++---
drivers/gpu/drm/xe/xe_gt.c | 2 +-
drivers/gpu/drm/xe/xe_pmu.c | 24 +++---
drivers/gpu/drm/xe/xe_query.c | 28 +++----
drivers/gpu/drm/xe/xe_vm.c | 54 ++++++-------
drivers/gpu/drm/xe/xe_vm_doc.h | 12 +--
include/uapi/drm/xe_drm.h | 124 ++++++++++++++---------------
8 files changed, 140 insertions(+), 140 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 94fd5fdcb9c4..b955c89da42c 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -209,7 +209,7 @@ static int __xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo,
/* The order of placements should indicate preferred location */
- if (bo->props.preferred_mem_class == XE_MEM_REGION_CLASS_SYSMEM) {
+ if (bo->props.preferred_mem_class == DRM_XE_MEM_REGION_CLASS_SYSMEM) {
try_add_system(bo, places, bo_flags, &c);
try_add_vram(xe, bo, places, bo_flags, &c);
} else {
@@ -1804,9 +1804,9 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
if (XE_IOCTL_DBG(xe, args->flags &
- ~(XE_GEM_CREATE_FLAG_DEFER_BACKING |
- XE_GEM_CREATE_FLAG_SCANOUT |
- XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
+ ~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
+ DRM_XE_GEM_CREATE_FLAG_SCANOUT |
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
xe->info.mem_region_mask)))
return -EINVAL;
@@ -1826,15 +1826,15 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(xe, args->size & ~PAGE_MASK))
return -EINVAL;
- if (args->flags & XE_GEM_CREATE_FLAG_DEFER_BACKING)
+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING)
bo_flags |= XE_BO_DEFER_BACKING;
- if (args->flags & XE_GEM_CREATE_FLAG_SCANOUT)
+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
bo_flags |= XE_BO_SCANOUT_BIT;
bo_flags |= args->flags << (ffs(XE_BO_CREATE_SYSTEM_BIT) - 1);
- if (args->flags & XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
+ if (args->flags & DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM) {
if (XE_IOCTL_DBG(xe, !(bo_flags & XE_BO_CREATE_VRAM_MASK)))
return -EINVAL;
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 4fd44a9203e4..62d0237e724e 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -393,7 +393,7 @@ static int exec_queue_set_acc_granularity(struct xe_device *xe, struct xe_exec_q
if (XE_IOCTL_DBG(xe, !xe->info.supports_usm))
return -EINVAL;
- if (value > XE_ACC_GRANULARITY_64M)
+ if (value > DRM_XE_ACC_GRANULARITY_64M)
return -EINVAL;
q->usm.acc_granularity = value;
@@ -406,14 +406,14 @@ typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe,
u64 value, bool create);
static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = {
- [XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
- [XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
- [XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
- [XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
- [XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
- [XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
- [XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
- [XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT] = exec_queue_set_preemption_timeout,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE] = exec_queue_set_persistence,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT] = exec_queue_set_job_timeout,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER] = exec_queue_set_acc_trigger,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY] = exec_queue_set_acc_notify,
+ [DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY] = exec_queue_set_acc_granularity,
};
static int exec_queue_user_ext_set_property(struct xe_device *xe,
@@ -445,7 +445,7 @@ typedef int (*xe_exec_queue_user_extension_fn)(struct xe_device *xe,
bool create);
static const xe_exec_queue_set_property_fn exec_queue_user_extension_funcs[] = {
- [XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
+ [DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
};
#define MAX_USER_EXTENSIONS 16
@@ -764,7 +764,7 @@ int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data,
return -ENOENT;
switch (args->property) {
- case XE_EXEC_QUEUE_GET_PROPERTY_BAN:
+ case DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN:
args->value = !!(q->flags & EXEC_QUEUE_FLAG_BANNED);
ret = 0;
break;
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 73c090762771..80fa48c95e60 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -556,7 +556,7 @@ static void xe_uevent_gt_reset_failure(struct pci_dev *pdev, u8 tile_id, u8 gt_i
{
char *reset_event[4];
- reset_event[0] = XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
+ reset_event[0] = DRM_XE_RESET_FAILED_UEVENT "=NEEDS_RESET";
reset_event[1] = kasprintf(GFP_KERNEL, "TILE_ID=%d", tile_id);
reset_event[2] = kasprintf(GFP_KERNEL, "GT_ID=%d", gt_id);
reset_event[3] = NULL;
diff --git a/drivers/gpu/drm/xe/xe_pmu.c b/drivers/gpu/drm/xe/xe_pmu.c
index 318bbc9c1c9b..b4c69046d90d 100644
--- a/drivers/gpu/drm/xe/xe_pmu.c
+++ b/drivers/gpu/drm/xe/xe_pmu.c
@@ -17,12 +17,12 @@ static unsigned int xe_pmu_target_cpu = -1;
static unsigned int config_gt_id(const u64 config)
{
- return config >> __XE_PMU_GT_SHIFT;
+ return config >> __DRM_XE_PMU_GT_SHIFT;
}
static u64 config_counter(const u64 config)
{
- return config & ~(~0ULL << __XE_PMU_GT_SHIFT);
+ return config & ~(~0ULL << __DRM_XE_PMU_GT_SHIFT);
}
static void xe_pmu_event_destroy(struct perf_event *event)
@@ -114,13 +114,13 @@ config_status(struct xe_device *xe, u64 config)
return -ENOENT;
switch (config_counter(config)) {
- case XE_PMU_RENDER_GROUP_BUSY(0):
- case XE_PMU_COPY_GROUP_BUSY(0):
- case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
+ case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
+ case DRM_XE_PMU_COPY_GROUP_BUSY(0):
+ case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
if (gt->info.type == XE_GT_TYPE_MEDIA)
return -ENOENT;
break;
- case XE_PMU_MEDIA_GROUP_BUSY(0):
+ case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
if (!(gt->info.engine_mask & (BIT(XE_HW_ENGINE_VCS0) | BIT(XE_HW_ENGINE_VECS0))))
return -ENOENT;
break;
@@ -180,10 +180,10 @@ static u64 __xe_pmu_event_read(struct perf_event *event)
u64 val;
switch (config_counter(config)) {
- case XE_PMU_RENDER_GROUP_BUSY(0):
- case XE_PMU_COPY_GROUP_BUSY(0):
- case XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
- case XE_PMU_MEDIA_GROUP_BUSY(0):
+ case DRM_XE_PMU_RENDER_GROUP_BUSY(0):
+ case DRM_XE_PMU_COPY_GROUP_BUSY(0):
+ case DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(0):
+ case DRM_XE_PMU_MEDIA_GROUP_BUSY(0):
val = engine_group_busyness_read(gt, config);
break;
default:
@@ -369,7 +369,7 @@ create_event_attributes(struct xe_pmu *pmu)
/* Count how many counters we will be exposing. */
for_each_gt(gt, xe, j) {
for (i = 0; i < ARRAY_SIZE(events); i++) {
- u64 config = ___XE_PMU_OTHER(j, events[i].counter);
+ u64 config = ___DRM_XE_PMU_OTHER(j, events[i].counter);
if (!config_status(xe, config))
count++;
@@ -396,7 +396,7 @@ create_event_attributes(struct xe_pmu *pmu)
for_each_gt(gt, xe, j) {
for (i = 0; i < ARRAY_SIZE(events); i++) {
- u64 config = ___XE_PMU_OTHER(j, events[i].counter);
+ u64 config = ___DRM_XE_PMU_OTHER(j, events[i].counter);
char *str;
if (config_status(xe, config))
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index e9c8c97a030f..565a716302bb 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -261,7 +261,7 @@ static int query_memory_usage(struct xe_device *xe,
return -ENOMEM;
man = ttm_manager_type(&xe->ttm, XE_PL_TT);
- usage->regions[0].mem_class = XE_MEM_REGION_CLASS_SYSMEM;
+ usage->regions[0].mem_class = DRM_XE_MEM_REGION_CLASS_SYSMEM;
usage->regions[0].instance = 0;
usage->regions[0].min_page_size = PAGE_SIZE;
usage->regions[0].total_size = man->size << PAGE_SHIFT;
@@ -273,7 +273,7 @@ static int query_memory_usage(struct xe_device *xe,
man = ttm_manager_type(&xe->ttm, i);
if (man) {
usage->regions[usage->num_regions].mem_class =
- XE_MEM_REGION_CLASS_VRAM;
+ DRM_XE_MEM_REGION_CLASS_VRAM;
usage->regions[usage->num_regions].instance =
usage->num_regions;
usage->regions[usage->num_regions].min_page_size =
@@ -305,7 +305,7 @@ static int query_memory_usage(struct xe_device *xe,
static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
{
- const u32 num_params = XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
+ const u32 num_params = DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY + 1;
size_t size =
sizeof(struct drm_xe_query_config) + num_params * sizeof(u64);
struct drm_xe_query_config __user *query_ptr =
@@ -324,15 +324,15 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
return -ENOMEM;
config->num_params = num_params;
- config->info[XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
+ config->info[DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID] =
xe->info.devid | (xe->info.revid << 16);
if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
- config->info[XE_QUERY_CONFIG_FLAGS] =
- XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
- config->info[XE_QUERY_CONFIG_MIN_ALIGNMENT] =
+ config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
+ DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
+ config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
- config->info[XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
- config->info[XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
+ config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
+ config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
xe_exec_queue_device_get_max_priority(xe);
if (copy_to_user(query_ptr, config, size)) {
@@ -368,9 +368,9 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
gt_list->num_gt = xe->info.gt_count;
for_each_gt(gt, xe, id) {
if (xe_gt_is_media_type(gt))
- gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MEDIA;
+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MEDIA;
else
- gt_list->gt_list[id].type = XE_QUERY_GT_TYPE_MAIN;
+ gt_list->gt_list[id].type = DRM_XE_QUERY_GT_TYPE_MAIN;
gt_list->gt_list[id].gt_id = gt->info.id;
gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
if (!IS_DGFX(xe))
@@ -468,21 +468,21 @@ static int query_gt_topology(struct xe_device *xe,
for_each_gt(gt, xe, id) {
topo.gt_id = id;
- topo.type = XE_TOPO_DSS_GEOMETRY;
+ topo.type = DRM_XE_TOPO_DSS_GEOMETRY;
query_ptr = copy_mask(query_ptr, &topo,
gt->fuse_topo.g_dss_mask,
sizeof(gt->fuse_topo.g_dss_mask));
if (IS_ERR(query_ptr))
return PTR_ERR(query_ptr);
- topo.type = XE_TOPO_DSS_COMPUTE;
+ topo.type = DRM_XE_TOPO_DSS_COMPUTE;
query_ptr = copy_mask(query_ptr, &topo,
gt->fuse_topo.c_dss_mask,
sizeof(gt->fuse_topo.c_dss_mask));
if (IS_ERR(query_ptr))
return PTR_ERR(query_ptr);
- topo.type = XE_TOPO_EU_PER_DSS;
+ topo.type = DRM_XE_TOPO_EU_PER_DSS;
query_ptr = copy_mask(query_ptr, &topo,
gt->fuse_topo.eu_mask_per_dss,
sizeof(gt->fuse_topo.eu_mask_per_dss));
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index d45f4f1d490f..ca4abbb86585 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2183,8 +2183,8 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
(ULL)bo_offset_or_userptr);
switch (operation) {
- case XE_VM_BIND_OP_MAP:
- case XE_VM_BIND_OP_MAP_USERPTR:
+ case DRM_XE_VM_BIND_OP_MAP:
+ case DRM_XE_VM_BIND_OP_MAP_USERPTR:
ops = drm_gpuvm_sm_map_ops_create(&vm->gpuvm, addr, range,
obj, bo_offset_or_userptr);
if (IS_ERR(ops))
@@ -2195,13 +2195,13 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
op->tile_mask = tile_mask;
op->map.immediate =
- flags & XE_VM_BIND_FLAG_IMMEDIATE;
+ flags & DRM_XE_VM_BIND_FLAG_IMMEDIATE;
op->map.read_only =
- flags & XE_VM_BIND_FLAG_READONLY;
- op->map.is_null = flags & XE_VM_BIND_FLAG_NULL;
+ flags & DRM_XE_VM_BIND_FLAG_READONLY;
+ op->map.is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
}
break;
- case XE_VM_BIND_OP_UNMAP:
+ case DRM_XE_VM_BIND_OP_UNMAP:
ops = drm_gpuvm_sm_unmap_ops_create(&vm->gpuvm, addr, range);
if (IS_ERR(ops))
return ops;
@@ -2212,7 +2212,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
op->tile_mask = tile_mask;
}
break;
- case XE_VM_BIND_OP_PREFETCH:
+ case DRM_XE_VM_BIND_OP_PREFETCH:
ops = drm_gpuvm_prefetch_ops_create(&vm->gpuvm, addr, range);
if (IS_ERR(ops))
return ops;
@@ -2224,7 +2224,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
op->prefetch.region = region;
}
break;
- case XE_VM_BIND_OP_UNMAP_ALL:
+ case DRM_XE_VM_BIND_OP_UNMAP_ALL:
xe_assert(vm->xe, bo);
err = xe_bo_lock(bo, true);
@@ -2828,13 +2828,13 @@ static int vm_bind_ioctl_ops_execute(struct xe_vm *vm,
#ifdef TEST_VM_ASYNC_OPS_ERROR
#define SUPPORTED_FLAGS \
- (FORCE_ASYNC_OP_ERROR | XE_VM_BIND_FLAG_ASYNC | \
- XE_VM_BIND_FLAG_READONLY | XE_VM_BIND_FLAG_IMMEDIATE | \
- XE_VM_BIND_FLAG_NULL | 0xffff)
+ (FORCE_ASYNC_OP_ERROR | DRM_XE_VM_BIND_FLAG_ASYNC | \
+ DRM_XE_VM_BIND_FLAG_READONLY | DRM_XE_VM_BIND_FLAG_IMMEDIATE | \
+ DRM_XE_VM_BIND_FLAG_NULL | 0xffff)
#else
#define SUPPORTED_FLAGS \
- (XE_VM_BIND_FLAG_ASYNC | XE_VM_BIND_FLAG_READONLY | \
- XE_VM_BIND_FLAG_IMMEDIATE | XE_VM_BIND_FLAG_NULL | \
+ (DRM_XE_VM_BIND_FLAG_ASYNC | DRM_XE_VM_BIND_FLAG_READONLY | \
+ DRM_XE_VM_BIND_FLAG_IMMEDIATE | DRM_XE_VM_BIND_FLAG_NULL | \
0xffff)
#endif
#define XE_64K_PAGE_MASK 0xffffull
@@ -2882,45 +2882,45 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
u32 obj = (*bind_ops)[i].obj;
u64 obj_offset = (*bind_ops)[i].obj_offset;
u32 region = (*bind_ops)[i].region;
- bool is_null = flags & XE_VM_BIND_FLAG_NULL;
+ bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
if (i == 0) {
- *async = !!(flags & XE_VM_BIND_FLAG_ASYNC);
+ *async = !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC);
if (XE_IOCTL_DBG(xe, !*async && args->num_syncs)) {
err = -EINVAL;
goto free_bind_ops;
}
} else if (XE_IOCTL_DBG(xe, *async !=
- !!(flags & XE_VM_BIND_FLAG_ASYNC))) {
+ !!(flags & DRM_XE_VM_BIND_FLAG_ASYNC))) {
err = -EINVAL;
goto free_bind_ops;
}
- if (XE_IOCTL_DBG(xe, op > XE_VM_BIND_OP_PREFETCH) ||
+ if (XE_IOCTL_DBG(xe, op > DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, flags & ~SUPPORTED_FLAGS) ||
XE_IOCTL_DBG(xe, obj && is_null) ||
XE_IOCTL_DBG(xe, obj_offset && is_null) ||
- XE_IOCTL_DBG(xe, op != XE_VM_BIND_OP_MAP &&
+ XE_IOCTL_DBG(xe, op != DRM_XE_VM_BIND_OP_MAP &&
is_null) ||
XE_IOCTL_DBG(xe, !obj &&
- op == XE_VM_BIND_OP_MAP &&
+ op == DRM_XE_VM_BIND_OP_MAP &&
!is_null) ||
XE_IOCTL_DBG(xe, !obj &&
- op == XE_VM_BIND_OP_UNMAP_ALL) ||
+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
XE_IOCTL_DBG(xe, addr &&
- op == XE_VM_BIND_OP_UNMAP_ALL) ||
+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
XE_IOCTL_DBG(xe, range &&
- op == XE_VM_BIND_OP_UNMAP_ALL) ||
+ op == DRM_XE_VM_BIND_OP_UNMAP_ALL) ||
XE_IOCTL_DBG(xe, obj &&
- op == XE_VM_BIND_OP_MAP_USERPTR) ||
+ op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
XE_IOCTL_DBG(xe, obj &&
- op == XE_VM_BIND_OP_PREFETCH) ||
+ op == DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, region &&
- op != XE_VM_BIND_OP_PREFETCH) ||
+ op != DRM_XE_VM_BIND_OP_PREFETCH) ||
XE_IOCTL_DBG(xe, !(BIT(region) &
xe->info.mem_region_mask)) ||
XE_IOCTL_DBG(xe, obj &&
- op == XE_VM_BIND_OP_UNMAP)) {
+ op == DRM_XE_VM_BIND_OP_UNMAP)) {
err = -EINVAL;
goto free_bind_ops;
}
@@ -2929,7 +2929,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
XE_IOCTL_DBG(xe, addr & ~PAGE_MASK) ||
XE_IOCTL_DBG(xe, range & ~PAGE_MASK) ||
XE_IOCTL_DBG(xe, !range &&
- op != XE_VM_BIND_OP_UNMAP_ALL)) {
+ op != DRM_XE_VM_BIND_OP_UNMAP_ALL)) {
err = -EINVAL;
goto free_bind_ops;
}
diff --git a/drivers/gpu/drm/xe/xe_vm_doc.h b/drivers/gpu/drm/xe/xe_vm_doc.h
index b1b2dc4a6089..516f4dc97223 100644
--- a/drivers/gpu/drm/xe/xe_vm_doc.h
+++ b/drivers/gpu/drm/xe/xe_vm_doc.h
@@ -32,9 +32,9 @@
* Operations
* ----------
*
- * XE_VM_BIND_OP_MAP - Create mapping for a BO
- * XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
- * XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
+ * DRM_XE_VM_BIND_OP_MAP - Create mapping for a BO
+ * DRM_XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
+ * DRM_XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
*
* Implementation details
* ~~~~~~~~~~~~~~~~~~~~~~
@@ -113,7 +113,7 @@
* VM uses to report errors to. The ufence wait interface can be used to wait on
* a VM going into an error state. Once an error is reported the VM's async
* worker is paused. While the VM's async worker is paused sync,
- * XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
+ * DRM_XE_VM_BIND_OP_UNMAP operations are allowed (this can free memory). Once the
* uses believe the error state is fixed, the async worker can be resumed via
* XE_VM_BIND_OP_RESTART operation. When VM async bind work is restarted, the
* first operation processed is the operation that caused the original error.
@@ -193,7 +193,7 @@
* In a VM is in fault mode (TODO: link to fault mode), new bind operations that
* create mappings are by default are deferred to the page fault handler (first
* use). This behavior can be overriden by setting the flag
- * XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
+ * DRM_XE_VM_BIND_FLAG_IMMEDIATE which indicates to creating the mapping
* immediately.
*
* User pointer
@@ -322,7 +322,7 @@
*
* By default, on a faulting VM binds just allocate the VMA and the actual
* updating of the page tables is defered to the page fault handler. This
- * behavior can be overridden by setting the flag XE_VM_BIND_FLAG_IMMEDIATE in
+ * behavior can be overridden by setting the flag DRM_XE_VM_BIND_FLAG_IMMEDIATE in
* the VM bind which will then do the bind immediately.
*
* Page fault handler
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index e007dbefd627..3ef49e3baaed 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -19,12 +19,12 @@ extern "C" {
/**
* DOC: uevent generated by xe on it's pci node.
*
- * XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
+ * DRM_XE_RESET_FAILED_UEVENT - Event is generated when attempt to reset gt
* fails. The value supplied with the event is always "NEEDS_RESET".
* Additional information supplied is tile id and gt id of the gt unit for
* which reset has failed.
*/
-#define XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
+#define DRM_XE_RESET_FAILED_UEVENT "DEVICE_STATUS"
/**
* struct xe_user_extension - Base class for defining a chain of extensions
@@ -148,14 +148,14 @@ struct drm_xe_engine_class_instance {
* enum drm_xe_memory_class - Supported memory classes.
*/
enum drm_xe_memory_class {
- /** @XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
- XE_MEM_REGION_CLASS_SYSMEM = 0,
+ /** @DRM_XE_MEM_REGION_CLASS_SYSMEM: Represents system memory. */
+ DRM_XE_MEM_REGION_CLASS_SYSMEM = 0,
/**
- * @XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
+ * @DRM_XE_MEM_REGION_CLASS_VRAM: On discrete platforms, this
* represents the memory that is local to the device, which we
* call VRAM. Not valid on integrated platforms.
*/
- XE_MEM_REGION_CLASS_VRAM
+ DRM_XE_MEM_REGION_CLASS_VRAM
};
/**
@@ -215,7 +215,7 @@ struct drm_xe_query_mem_region {
* always equal the @total_size, since all of it will be CPU
* accessible.
*
- * Note this is only tracked for XE_MEM_REGION_CLASS_VRAM
+ * Note this is only tracked for DRM_XE_MEM_REGION_CLASS_VRAM
* regions (for other types the value here will always equal
* zero).
*/
@@ -227,7 +227,7 @@ struct drm_xe_query_mem_region {
* Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable
* accounting. Without this the value here will always equal
* zero. Note this is only currently tracked for
- * XE_MEM_REGION_CLASS_VRAM regions (for other types the value
+ * DRM_XE_MEM_REGION_CLASS_VRAM regions (for other types the value
* here will always be zero).
*/
__u64 cpu_visible_used;
@@ -320,12 +320,12 @@ struct drm_xe_query_config {
/** @pad: MBZ */
__u32 pad;
-#define XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
-#define XE_QUERY_CONFIG_FLAGS 1
- #define XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
-#define XE_QUERY_CONFIG_MIN_ALIGNMENT 2
-#define XE_QUERY_CONFIG_VA_BITS 3
-#define XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
+#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
+#define DRM_XE_QUERY_CONFIG_FLAGS 1
+ #define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
+#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
+#define DRM_XE_QUERY_CONFIG_VA_BITS 3
+#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
/** @info: array of elements containing the config info */
__u64 info[];
};
@@ -339,8 +339,8 @@ struct drm_xe_query_config {
* implementing graphics and/or media operations.
*/
struct drm_xe_query_gt {
-#define XE_QUERY_GT_TYPE_MAIN 0
-#define XE_QUERY_GT_TYPE_MEDIA 1
+#define DRM_XE_QUERY_GT_TYPE_MAIN 0
+#define DRM_XE_QUERY_GT_TYPE_MEDIA 1
/** @type: GT type: Main or Media */
__u16 type;
/** @gt_id: Unique ID of this GT within the PCI Device */
@@ -400,7 +400,7 @@ struct drm_xe_query_topology_mask {
* DSS_GEOMETRY ff ff ff ff 00 00 00 00
* means 32 DSS are available for geometry.
*/
-#define XE_TOPO_DSS_GEOMETRY (1 << 0)
+#define DRM_XE_TOPO_DSS_GEOMETRY (1 << 0)
/*
* To query the mask of Dual Sub Slices (DSS) available for compute
* operations. For example a query response containing the following
@@ -408,7 +408,7 @@ struct drm_xe_query_topology_mask {
* DSS_COMPUTE ff ff ff ff 00 00 00 00
* means 32 DSS are available for compute.
*/
-#define XE_TOPO_DSS_COMPUTE (1 << 1)
+#define DRM_XE_TOPO_DSS_COMPUTE (1 << 1)
/*
* To query the mask of Execution Units (EU) available per Dual Sub
* Slices (DSS). For example a query response containing the following
@@ -416,7 +416,7 @@ struct drm_xe_query_topology_mask {
* EU_PER_DSS ff ff 00 00 00 00 00 00
* means each DSS has 16 EU.
*/
-#define XE_TOPO_EU_PER_DSS (1 << 2)
+#define DRM_XE_TOPO_EU_PER_DSS (1 << 2)
/** @type: type of mask */
__u16 type;
@@ -497,8 +497,8 @@ struct drm_xe_gem_create {
*/
__u64 size;
-#define XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
-#define XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
+#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (0x1 << 24)
+#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (0x1 << 25)
/*
* When using VRAM as a possible placement, ensure that the corresponding VRAM
* allocation will always use the CPU accessible part of VRAM. This is important
@@ -514,7 +514,7 @@ struct drm_xe_gem_create {
* display surfaces, therefore the kernel requires setting this flag for such
* objects, otherwise an error is thrown on small-bar systems.
*/
-#define XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
+#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (0x1 << 26)
/**
* @flags: Flags, currently a mask of memory instances of where BO can
* be placed
@@ -581,14 +581,14 @@ struct drm_xe_ext_set_property {
};
struct drm_xe_vm_create {
-#define XE_VM_EXTENSION_SET_PROPERTY 0
+#define DRM_XE_VM_EXTENSION_SET_PROPERTY 0
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
-#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
-#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
-#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
+#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
+#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
+#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
+#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
/** @flags: Flags */
__u32 flags;
@@ -644,29 +644,29 @@ struct drm_xe_vm_bind_op {
*/
__u64 tile_mask;
-#define XE_VM_BIND_OP_MAP 0x0
-#define XE_VM_BIND_OP_UNMAP 0x1
-#define XE_VM_BIND_OP_MAP_USERPTR 0x2
-#define XE_VM_BIND_OP_UNMAP_ALL 0x3
-#define XE_VM_BIND_OP_PREFETCH 0x4
+#define DRM_XE_VM_BIND_OP_MAP 0x0
+#define DRM_XE_VM_BIND_OP_UNMAP 0x1
+#define DRM_XE_VM_BIND_OP_MAP_USERPTR 0x2
+#define DRM_XE_VM_BIND_OP_UNMAP_ALL 0x3
+#define DRM_XE_VM_BIND_OP_PREFETCH 0x4
/** @op: Bind operation to perform */
__u32 op;
-#define XE_VM_BIND_FLAG_READONLY (0x1 << 0)
-#define XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
+#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
+#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
/*
* Valid on a faulting VM only, do the MAP operation immediately rather
* than deferring the MAP to the page fault handler.
*/
-#define XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
+#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
/*
* When the NULL flag is set, the page tables are setup with a special
* bit which indicates writes are dropped and all reads return zero. In
- * the future, the NULL flags will only be valid for XE_VM_BIND_OP_MAP
+ * the future, the NULL flags will only be valid for DRM_XE_VM_BIND_OP_MAP
* operations, the BO handle MBZ, and the BO offset MBZ. This flag is
* intended to implement VK sparse bindings.
*/
-#define XE_VM_BIND_FLAG_NULL (0x1 << 3)
+#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
/** @flags: Bind flags */
__u32 flags;
@@ -721,19 +721,19 @@ struct drm_xe_vm_bind {
__u64 reserved[2];
};
-/* For use with XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY */
+/* For use with DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY */
/* Monitor 128KB contiguous region with 4K sub-granularity */
-#define XE_ACC_GRANULARITY_128K 0
+#define DRM_XE_ACC_GRANULARITY_128K 0
/* Monitor 2MB contiguous region with 64KB sub-granularity */
-#define XE_ACC_GRANULARITY_2M 1
+#define DRM_XE_ACC_GRANULARITY_2M 1
/* Monitor 16MB contiguous region with 512KB sub-granularity */
-#define XE_ACC_GRANULARITY_16M 2
+#define DRM_XE_ACC_GRANULARITY_16M 2
/* Monitor 64MB contiguous region with 2M sub-granularity */
-#define XE_ACC_GRANULARITY_64M 3
+#define DRM_XE_ACC_GRANULARITY_64M 3
/**
* struct drm_xe_exec_queue_set_property - exec queue set property
@@ -747,14 +747,14 @@ struct drm_xe_exec_queue_set_property {
/** @exec_queue_id: Exec queue ID */
__u32 exec_queue_id;
-#define XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
-#define XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
-#define XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
-#define XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
-#define XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
-#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
-#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
-#define XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PREEMPTION_TIMEOUT 2
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PERSISTENCE 3
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_JOB_TIMEOUT 4
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_TRIGGER 5
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_NOTIFY 6
+#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_ACC_GRANULARITY 7
/** @property: property to set */
__u32 property;
@@ -766,7 +766,7 @@ struct drm_xe_exec_queue_set_property {
};
struct drm_xe_exec_queue_create {
-#define XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
+#define DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY 0
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
@@ -805,7 +805,7 @@ struct drm_xe_exec_queue_get_property {
/** @exec_queue_id: Exec queue ID */
__u32 exec_queue_id;
-#define XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
+#define DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN 0
/** @property: property to get */
__u32 property;
@@ -973,11 +973,11 @@ struct drm_xe_wait_user_fence {
/**
* DOC: XE PMU event config IDs
*
- * Check 'man perf_event_open' to use the ID's XE_PMU_XXXX listed in xe_drm.h
+ * Check 'man perf_event_open' to use the ID's DRM_XE_PMU_XXXX listed in xe_drm.h
* in 'struct perf_event_attr' as part of perf_event_open syscall to read a
* particular event.
*
- * For example to open the XE_PMU_RENDER_GROUP_BUSY(0):
+ * For example to open the DRMXE_PMU_RENDER_GROUP_BUSY(0):
*
* .. code-block:: C
*
@@ -991,7 +991,7 @@ struct drm_xe_wait_user_fence {
* attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED;
* attr.use_clockid = 1;
* attr.clockid = CLOCK_MONOTONIC;
- * attr.config = XE_PMU_RENDER_GROUP_BUSY(0);
+ * attr.config = DRM_XE_PMU_RENDER_GROUP_BUSY(0);
*
* fd = syscall(__NR_perf_event_open, &attr, -1, cpu, -1, 0);
*/
@@ -999,15 +999,15 @@ struct drm_xe_wait_user_fence {
/*
* Top bits of every counter are GT id.
*/
-#define __XE_PMU_GT_SHIFT (56)
+#define __DRM_XE_PMU_GT_SHIFT (56)
-#define ___XE_PMU_OTHER(gt, x) \
- (((__u64)(x)) | ((__u64)(gt) << __XE_PMU_GT_SHIFT))
+#define ___DRM_XE_PMU_OTHER(gt, x) \
+ (((__u64)(x)) | ((__u64)(gt) << __DRM_XE_PMU_GT_SHIFT))
-#define XE_PMU_RENDER_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 0)
-#define XE_PMU_COPY_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 1)
-#define XE_PMU_MEDIA_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 2)
-#define XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___XE_PMU_OTHER(gt, 3)
+#define DRM_XE_PMU_RENDER_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 0)
+#define DRM_XE_PMU_COPY_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 1)
+#define DRM_XE_PMU_MEDIA_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 2)
+#define DRM_XE_PMU_ANY_ENGINE_GROUP_BUSY(gt) ___DRM_XE_PMU_OTHER(gt, 3)
#if defined(__cplusplus)
}
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-xe] [PATCH v1 2/8] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 1/8] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
@ 2023-11-14 13:34 ` Francois Dugast
2023-11-14 13:45 ` Rodrigo Vivi
2023-11-16 15:37 ` Souza, Jose
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 3/8] drm/xe/uapi: Change rsvd to pad in struct drm_xe_class_instance Francois Dugast
` (8 subsequent siblings)
10 siblings, 2 replies; 22+ messages in thread
From: Francois Dugast @ 2023-11-14 13:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Most constants defined in xe_drm.h which can be used for flags are
named DRM_XE_*_FLAG_*, which is helpful to identify them. Make this
systematic and add _FLAG where it was missing.
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_sync.c | 16 ++++++-------
drivers/gpu/drm/xe/xe_vm.c | 32 ++++++++++++-------------
drivers/gpu/drm/xe/xe_vm_doc.h | 2 +-
drivers/gpu/drm/xe/xe_wait_user_fence.c | 10 ++++----
include/uapi/drm/xe_drm.h | 30 +++++++++++------------
5 files changed, 45 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
index 73ef259aa387..eafe53c2f55d 100644
--- a/drivers/gpu/drm/xe/xe_sync.c
+++ b/drivers/gpu/drm/xe/xe_sync.c
@@ -110,14 +110,14 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
return -EFAULT;
if (XE_IOCTL_DBG(xe, sync_in.flags &
- ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_SIGNAL)) ||
+ ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_FLAG_SIGNAL)) ||
XE_IOCTL_DBG(xe, sync_in.pad) ||
XE_IOCTL_DBG(xe, sync_in.reserved[0] || sync_in.reserved[1]))
return -EINVAL;
- signal = sync_in.flags & DRM_XE_SYNC_SIGNAL;
+ signal = sync_in.flags & DRM_XE_SYNC_FLAG_SIGNAL;
switch (sync_in.flags & SYNC_FLAGS_TYPE_MASK) {
- case DRM_XE_SYNC_SYNCOBJ:
+ case DRM_XE_SYNC_FLAG_SYNCOBJ:
if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
return -EOPNOTSUPP;
@@ -135,7 +135,7 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
}
break;
- case DRM_XE_SYNC_TIMELINE_SYNCOBJ:
+ case DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ:
if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
return -EOPNOTSUPP;
@@ -165,12 +165,12 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
}
break;
- case DRM_XE_SYNC_DMA_BUF:
+ case DRM_XE_SYNC_FLAG_DMA_BUF:
if (XE_IOCTL_DBG(xe, "TODO"))
return -EINVAL;
break;
- case DRM_XE_SYNC_USER_FENCE:
+ case DRM_XE_SYNC_FLAG_USER_FENCE:
if (XE_IOCTL_DBG(xe, !signal))
return -EOPNOTSUPP;
@@ -225,7 +225,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry *sync, struct xe_sched_job *job)
void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
struct dma_fence *fence)
{
- if (!(sync->flags & DRM_XE_SYNC_SIGNAL))
+ if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
return;
if (sync->chain_fence) {
@@ -253,7 +253,7 @@ void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
dma_fence_put(fence);
}
} else if ((sync->flags & SYNC_FLAGS_TYPE_MASK) ==
- DRM_XE_SYNC_USER_FENCE) {
+ DRM_XE_SYNC_FLAG_USER_FENCE) {
job->user_fence.used = true;
job->user_fence.addr = sync->addr;
job->user_fence.value = sync->timeline_value;
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index ca4abbb86585..76926ee756c7 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1918,10 +1918,10 @@ static int xe_vm_unbind(struct xe_vm *vm, struct xe_vma *vma,
return 0;
}
-#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_SCRATCH_PAGE | \
- DRM_XE_VM_CREATE_COMPUTE_MODE | \
- DRM_XE_VM_CREATE_ASYNC_DEFAULT | \
- DRM_XE_VM_CREATE_FAULT_MODE)
+#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE | \
+ DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE | \
+ DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT | \
+ DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
int xe_vm_create_ioctl(struct drm_device *dev, void *data,
struct drm_file *file)
@@ -1939,9 +1939,9 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
return -EINVAL;
if (XE_WA(xe_root_mmio_gt(xe), 14016763929))
- args->flags |= DRM_XE_VM_CREATE_SCRATCH_PAGE;
+ args->flags |= DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
!xe->info.supports_usm))
return -EINVAL;
@@ -1951,32 +1951,32 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
if (XE_IOCTL_DBG(xe, args->flags & ~ALL_DRM_XE_VM_CREATE_FLAGS))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE &&
- args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE &&
+ args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE &&
- args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE &&
+ args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
+ if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
xe_device_in_non_fault_mode(xe)))
return -EINVAL;
- if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FAULT_MODE) &&
+ if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE) &&
xe_device_in_fault_mode(xe)))
return -EINVAL;
if (XE_IOCTL_DBG(xe, args->extensions))
return -EINVAL;
- if (args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE)
flags |= XE_VM_FLAG_SCRATCH_PAGE;
- if (args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE)
flags |= XE_VM_FLAG_COMPUTE_MODE;
- if (args->flags & DRM_XE_VM_CREATE_ASYNC_DEFAULT)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT)
flags |= XE_VM_FLAG_ASYNC_DEFAULT;
- if (args->flags & DRM_XE_VM_CREATE_FAULT_MODE)
+ if (args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
flags |= XE_VM_FLAG_FAULT_MODE;
vm = xe_vm_create(xe, flags);
diff --git a/drivers/gpu/drm/xe/xe_vm_doc.h b/drivers/gpu/drm/xe/xe_vm_doc.h
index 516f4dc97223..bdc6659891a5 100644
--- a/drivers/gpu/drm/xe/xe_vm_doc.h
+++ b/drivers/gpu/drm/xe/xe_vm_doc.h
@@ -18,7 +18,7 @@
* Scratch page
* ------------
*
- * If the VM is created with the flag, DRM_XE_VM_CREATE_SCRATCH_PAGE, set the
+ * If the VM is created with the flag, DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE, set the
* entire page table structure defaults pointing to blank page allocated by the
* VM. Invalid memory access rather than fault just read / write to this page.
*
diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
index 78686908f7fb..13562db6c07f 100644
--- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
+++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
@@ -79,8 +79,8 @@ static int check_hw_engines(struct xe_device *xe,
return 0;
}
-#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_SOFT_OP | \
- DRM_XE_UFENCE_WAIT_ABSTIME)
+#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
+ DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
#define MAX_OP DRM_XE_UFENCE_WAIT_LTE
static long to_jiffies_timeout(struct xe_device *xe,
@@ -107,7 +107,7 @@ static long to_jiffies_timeout(struct xe_device *xe,
* Save the timeout to an u64 variable because nsecs_to_jiffies
* might return a value that overflows s32 variable.
*/
- if (args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)
+ if (args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
t = drm_timeout_abs_to_jiffies(args->timeout);
else
t = nsecs_to_jiffies(args->timeout);
@@ -137,7 +137,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
u64_to_user_ptr(args->instances);
u64 addr = args->addr;
int err;
- bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_SOFT_OP;
+ bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP;
long timeout;
ktime_t start;
@@ -206,7 +206,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
}
remove_wait_queue(&xe->ufence_wq, &w_wait);
- if (!(args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)) {
+ if (!(args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)) {
args->timeout -= ktime_to_ns(ktime_sub(ktime_get(), start));
if (args->timeout < 0)
args->timeout = 0;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 3ef49e3baaed..f6346a8351e4 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -585,10 +585,10 @@ struct drm_xe_vm_create {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
-#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
-#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
-#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
+#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (0x1 << 0)
+#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (0x1 << 1)
+#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (0x1 << 2)
+#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (0x1 << 3)
/** @flags: Flags */
__u32 flags;
@@ -831,11 +831,11 @@ struct drm_xe_sync {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_SYNC_SYNCOBJ 0x0
-#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
-#define DRM_XE_SYNC_DMA_BUF 0x2
-#define DRM_XE_SYNC_USER_FENCE 0x3
-#define DRM_XE_SYNC_SIGNAL 0x10
+#define DRM_XE_SYNC_FLAG_SYNCOBJ 0x0
+#define DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ 0x1
+#define DRM_XE_SYNC_FLAG_DMA_BUF 0x2
+#define DRM_XE_SYNC_FLAG_USER_FENCE 0x3
+#define DRM_XE_SYNC_FLAG_SIGNAL 0x10
__u32 flags;
/** @pad: MBZ */
@@ -921,8 +921,8 @@ struct drm_xe_wait_user_fence {
/** @op: wait operation (type of comparison) */
__u16 op;
-#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
-#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
+#define DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
+#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 1)
/** @flags: wait flags */
__u16 flags;
@@ -940,10 +940,10 @@ struct drm_xe_wait_user_fence {
__u64 mask;
/**
* @timeout: how long to wait before bailing, value in nanoseconds.
- * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
+ * Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)
* it contains timeout expressed in nanoseconds to wait (fence will
* expire at now() + timeout).
- * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout) wait
+ * When DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flat is set (absolute timeout) wait
* will end at timeout (uses system MONOTONIC_CLOCK).
* Passing negative timeout leads to neverending wait.
*
@@ -956,13 +956,13 @@ struct drm_xe_wait_user_fence {
/**
* @num_engines: number of engine instances to wait on, must be zero
- * when DRM_XE_UFENCE_WAIT_SOFT_OP set
+ * when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
*/
__u64 num_engines;
/**
* @instances: user pointer to array of drm_xe_engine_class_instance to
- * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
+ * wait on, must be NULL when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
*/
__u64 instances;
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-xe] [PATCH v1 3/8] drm/xe/uapi: Change rsvd to pad in struct drm_xe_class_instance
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 1/8] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 2/8] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
@ 2023-11-14 13:34 ` Francois Dugast
2023-11-14 13:44 ` Rodrigo Vivi
2023-11-16 15:30 ` Souza, Jose
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 4/8] drm/xe/uapi: Rename *_mem_regions masks Francois Dugast
` (7 subsequent siblings)
10 siblings, 2 replies; 22+ messages in thread
From: Francois Dugast @ 2023-11-14 13:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast
Change rsvd to pad in struct drm_xe_class_instance to prevent the field
from being used in future.
v2: Change from fixup to regular commit because this touches the
uAPI (Francois Dugast)
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 5 ++++-
include/uapi/drm/xe_drm.h | 3 ++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 565a716302bb..48befd9f0812 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -215,7 +215,10 @@ static int query_engines(struct xe_device *xe,
xe_to_user_engine_class[hwe->class];
hw_engine_info[i].engine_instance =
hwe->logical_instance;
- hw_engine_info[i++].gt_id = gt->info.id;
+ hw_engine_info[i].gt_id = gt->info.id;
+ hw_engine_info[i].pad = 0;
+
+ i++;
}
if (copy_to_user(query_ptr, hw_engine_info, size)) {
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index f6346a8351e4..a8d351c9fa7c 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -141,7 +141,8 @@ struct drm_xe_engine_class_instance {
__u16 engine_instance;
__u16 gt_id;
- __u16 rsvd;
+ /** @pad: MBZ */
+ __u16 pad;
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-xe] [PATCH v1 4/8] drm/xe/uapi: Rename *_mem_regions masks
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
` (2 preceding siblings ...)
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 3/8] drm/xe/uapi: Change rsvd to pad in struct drm_xe_class_instance Francois Dugast
@ 2023-11-14 13:34 ` Francois Dugast
2023-11-15 18:53 ` Matt Roper
2023-11-16 15:34 ` Souza, Jose
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 5/8] drm/xe/uapi: Rename query's mem_usage to mem_regions Francois Dugast
` (6 subsequent siblings)
10 siblings, 2 replies; 22+ messages in thread
From: Francois Dugast @ 2023-11-14 13:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
- 'native' doesn't make much sense on integrated devices.
- 'slow' is not necessarily true and doesn't go well with opposition
to 'native'.
Instead, let's use 'near' vs 'far'. It makes sense with all the current
Intel GPUs and it is future proof. Right now, there's absolutely no need
to define among the 'far' memory, which ones are slower, either in terms
of latency, nunmber of hops or bandwidth.
In case of this might become a requirement in the future, a new query
could be added to indicate the certain 'distance' between a given engine
and a memory_region. But for now, this fulfill all of the current
requirements in the most straightforward way for the userspace drivers.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 8 ++++----
include/uapi/drm/xe_drm.h | 17 +++++++++--------
2 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 48befd9f0812..8b5136460ea6 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -377,12 +377,12 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
gt_list->gt_list[id].gt_id = gt->info.id;
gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
if (!IS_DGFX(xe))
- gt_list->gt_list[id].native_mem_regions = 0x1;
+ gt_list->gt_list[id].near_mem_regions = 0x1;
else
- gt_list->gt_list[id].native_mem_regions =
+ gt_list->gt_list[id].near_mem_regions =
BIT(gt_to_tile(gt)->id) << 1;
- gt_list->gt_list[id].slow_mem_regions = xe->info.mem_region_mask ^
- gt_list->gt_list[id].native_mem_regions;
+ gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
+ gt_list->gt_list[id].near_mem_regions;
}
if (copy_to_user(query_ptr, gt_list, size)) {
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index a8d351c9fa7c..fd51d4444119 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -349,17 +349,18 @@ struct drm_xe_query_gt {
/** @clock_freq: A clock frequency for timestamp */
__u32 clock_freq;
/**
- * @native_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that lives on the same GPU/Tile and have
- * direct access.
+ * @near_mem_regions: Bit mask of instances from
+ * drm_xe_query_mem_usage that is near the current engines of this GT.
*/
- __u64 native_mem_regions;
+ __u64 near_mem_regions;
/**
- * @slow_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that this GT can indirectly access, although
- * they live on a different GPU/Tile.
+ * @far_mem_regions: Bit mask of instances from
+ * drm_xe_query_mem_usage that is far from the engines of this GT.
+ * In general, it has extra indirections when compared to the
+ * @near_mem_regions. For a discrete device this could mean system
+ * memory and memory living in a different Tile.
*/
- __u64 slow_mem_regions;
+ __u64 far_mem_regions;
/** @reserved: Reserved */
__u64 reserved[8];
};
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-xe] [PATCH v1 5/8] drm/xe/uapi: Rename query's mem_usage to mem_regions
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
` (3 preceding siblings ...)
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 4/8] drm/xe/uapi: Rename *_mem_regions masks Francois Dugast
@ 2023-11-14 13:34 ` Francois Dugast
2023-11-15 18:54 ` Matt Roper
2023-11-16 15:34 ` Souza, Jose
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 6/8] drm/xe/uapi: Standardize the FLAG naming and assignment Francois Dugast
` (5 subsequent siblings)
10 siblings, 2 replies; 22+ messages in thread
From: Francois Dugast @ 2023-11-14 13:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
'Usage' gives an impression of telemetry information where someone
would query to see how the memory is currently used and available
size, etc. However this API is more than this. It is about a global
view of all the memory regions available in the system and user
space needs to have this information so they can then use the
mem_region masks that are returned for the engine access.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 16 ++++++++--------
include/uapi/drm/xe_drm.h | 14 +++++++-------
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 8b5136460ea6..d495716b2c96 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -230,7 +230,7 @@ static int query_engines(struct xe_device *xe,
return 0;
}
-static size_t calc_memory_usage_size(struct xe_device *xe)
+static size_t calc_mem_regions_size(struct xe_device *xe)
{
u32 num_managers = 1;
int i;
@@ -239,15 +239,15 @@ static size_t calc_memory_usage_size(struct xe_device *xe)
if (ttm_manager_type(&xe->ttm, i))
num_managers++;
- return offsetof(struct drm_xe_query_mem_usage, regions[num_managers]);
+ return offsetof(struct drm_xe_query_mem_regions, regions[num_managers]);
}
-static int query_memory_usage(struct xe_device *xe,
- struct drm_xe_device_query *query)
+static int query_mem_regions(struct xe_device *xe,
+ struct drm_xe_device_query *query)
{
- size_t size = calc_memory_usage_size(xe);
- struct drm_xe_query_mem_usage *usage;
- struct drm_xe_query_mem_usage __user *query_ptr =
+ size_t size = calc_mem_regions_size(xe);
+ struct drm_xe_query_mem_regions *usage;
+ struct drm_xe_query_mem_regions __user *query_ptr =
u64_to_user_ptr(query->data);
struct ttm_resource_manager *man;
int ret, i;
@@ -499,7 +499,7 @@ static int query_gt_topology(struct xe_device *xe,
static int (* const xe_query_funcs[])(struct xe_device *xe,
struct drm_xe_device_query *query) = {
query_engines,
- query_memory_usage,
+ query_mem_regions,
query_config,
query_gt_list,
query_hwconfig,
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index fd51d4444119..c627e35bddb8 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -291,13 +291,13 @@ struct drm_xe_query_engine_cycles {
};
/**
- * struct drm_xe_query_mem_usage - describe memory regions and usage
+ * struct drm_xe_query_mem_regions - describe memory regions
*
* If a query is made with a struct drm_xe_device_query where .query
- * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
- * struct drm_xe_query_mem_usage in .data.
+ * is equal to DRM_XE_DEVICE_QUERY_MEM_REGIONS, then the reply uses
+ * struct drm_xe_query_mem_regions in .data.
*/
-struct drm_xe_query_mem_usage {
+struct drm_xe_query_mem_regions {
/** @num_regions: number of memory regions returned in @regions */
__u32 num_regions;
/** @pad: MBZ */
@@ -350,12 +350,12 @@ struct drm_xe_query_gt {
__u32 clock_freq;
/**
* @near_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that is near the current engines of this GT.
+ * drm_xe_query_mem_regions that is near the current engines of this GT.
*/
__u64 near_mem_regions;
/**
* @far_mem_regions: Bit mask of instances from
- * drm_xe_query_mem_usage that is far from the engines of this GT.
+ * drm_xe_query_mem_regions that is far from the engines of this GT.
* In general, it has extra indirections when compared to the
* @near_mem_regions. For a discrete device this could mean system
* memory and memory living in a different Tile.
@@ -469,7 +469,7 @@ struct drm_xe_device_query {
__u64 extensions;
#define DRM_XE_DEVICE_QUERY_ENGINES 0
-#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
+#define DRM_XE_DEVICE_QUERY_MEM_REGIONS 1
#define DRM_XE_DEVICE_QUERY_CONFIG 2
#define DRM_XE_DEVICE_QUERY_GT_LIST 3
#define DRM_XE_DEVICE_QUERY_HWCONFIG 4
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-xe] [PATCH v1 6/8] drm/xe/uapi: Standardize the FLAG naming and assignment
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
` (4 preceding siblings ...)
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 5/8] drm/xe/uapi: Rename query's mem_usage to mem_regions Francois Dugast
@ 2023-11-14 13:34 ` Francois Dugast
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 7/8] drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK Francois Dugast
` (4 subsequent siblings)
10 siblings, 0 replies; 22+ messages in thread
From: Francois Dugast @ 2023-11-14 13:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Only cosmetic things. No functional change on this patch.
Define every flag with (1 << n) and use singular FLAG name.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_query.c | 2 +-
include/uapi/drm/xe_drm.h | 18 +++++++++---------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index d495716b2c96..61a7d92b7e88 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -331,7 +331,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
xe->info.devid | (xe->info.revid << 16);
if (xe_device_get_root_tile(xe)->mem.vram.usable_size)
config->info[DRM_XE_QUERY_CONFIG_FLAGS] =
- DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM;
+ DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM;
config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index c627e35bddb8..b3df99dd1023 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -323,7 +323,7 @@ struct drm_xe_query_config {
#define DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID 0
#define DRM_XE_QUERY_CONFIG_FLAGS 1
- #define DRM_XE_QUERY_CONFIG_FLAGS_HAS_VRAM (0x1 << 0)
+ #define DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM (1 << 0)
#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
#define DRM_XE_QUERY_CONFIG_VA_BITS 3
#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
@@ -587,10 +587,10 @@ struct drm_xe_vm_create {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
-#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (0x1 << 0)
-#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (0x1 << 1)
-#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (0x1 << 2)
-#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (0x1 << 3)
+#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (1 << 0)
+#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (1 << 1)
+#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (1 << 2)
+#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (1 << 3)
/** @flags: Flags */
__u32 flags;
@@ -654,13 +654,13 @@ struct drm_xe_vm_bind_op {
/** @op: Bind operation to perform */
__u32 op;
-#define DRM_XE_VM_BIND_FLAG_READONLY (0x1 << 0)
-#define DRM_XE_VM_BIND_FLAG_ASYNC (0x1 << 1)
+#define DRM_XE_VM_BIND_FLAG_READONLY (1 << 0)
+#define DRM_XE_VM_BIND_FLAG_ASYNC (1 << 1)
/*
* Valid on a faulting VM only, do the MAP operation immediately rather
* than deferring the MAP to the page fault handler.
*/
-#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (0x1 << 2)
+#define DRM_XE_VM_BIND_FLAG_IMMEDIATE (1 << 2)
/*
* When the NULL flag is set, the page tables are setup with a special
* bit which indicates writes are dropped and all reads return zero. In
@@ -668,7 +668,7 @@ struct drm_xe_vm_bind_op {
* operations, the BO handle MBZ, and the BO offset MBZ. This flag is
* intended to implement VK sparse bindings.
*/
-#define DRM_XE_VM_BIND_FLAG_NULL (0x1 << 3)
+#define DRM_XE_VM_BIND_FLAG_NULL (1 << 3)
/** @flags: Bind flags */
__u32 flags;
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-xe] [PATCH v1 7/8] drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
` (5 preceding siblings ...)
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 6/8] drm/xe/uapi: Standardize the FLAG naming and assignment Francois Dugast
@ 2023-11-14 13:34 ` Francois Dugast
2023-11-15 19:03 ` Matt Roper
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 8/8] drm/xe/uapi: Be more specific about the vm_bind prefetch region Francois Dugast
` (3 subsequent siblings)
10 siblings, 1 reply; 22+ messages in thread
From: Francois Dugast @ 2023-11-14 13:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
On one hand the WAIT_OP represents the operation use for waiting such
as ==, !=, > and so on. On the other hand, the mask is applied to the
value used for comparision. Split those two to bring clarity to the uapi.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_wait_user_fence.c | 14 +++++++-------
include/uapi/drm/xe_drm.h | 21 +++++++++++----------
2 files changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
index 13562db6c07f..4d5c2555ce41 100644
--- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
+++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
@@ -25,22 +25,22 @@ static int do_compare(u64 addr, u64 value, u64 mask, u16 op)
return -EFAULT;
switch (op) {
- case DRM_XE_UFENCE_WAIT_EQ:
+ case DRM_XE_UFENCE_WAIT_OP_EQ:
passed = (rvalue & mask) == (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_NEQ:
+ case DRM_XE_UFENCE_WAIT_OP_NEQ:
passed = (rvalue & mask) != (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_GT:
+ case DRM_XE_UFENCE_WAIT_OP_GT:
passed = (rvalue & mask) > (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_GTE:
+ case DRM_XE_UFENCE_WAIT_OP_GTE:
passed = (rvalue & mask) >= (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_LT:
+ case DRM_XE_UFENCE_WAIT_OP_LT:
passed = (rvalue & mask) < (value & mask);
break;
- case DRM_XE_UFENCE_WAIT_LTE:
+ case DRM_XE_UFENCE_WAIT_OP_LTE:
passed = (rvalue & mask) <= (value & mask);
break;
default:
@@ -81,7 +81,7 @@ static int check_hw_engines(struct xe_device *xe,
#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
-#define MAX_OP DRM_XE_UFENCE_WAIT_LTE
+#define MAX_OP DRM_XE_UFENCE_WAIT_OP_LTE
static long to_jiffies_timeout(struct xe_device *xe,
struct drm_xe_wait_user_fence *args)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index b3df99dd1023..675194886851 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -914,12 +914,12 @@ struct drm_xe_wait_user_fence {
*/
__u64 addr;
-#define DRM_XE_UFENCE_WAIT_EQ 0
-#define DRM_XE_UFENCE_WAIT_NEQ 1
-#define DRM_XE_UFENCE_WAIT_GT 2
-#define DRM_XE_UFENCE_WAIT_GTE 3
-#define DRM_XE_UFENCE_WAIT_LT 4
-#define DRM_XE_UFENCE_WAIT_LTE 5
+#define DRM_XE_UFENCE_WAIT_OP_EQ 0x0
+#define DRM_XE_UFENCE_WAIT_OP_NEQ 0x1
+#define DRM_XE_UFENCE_WAIT_OP_GT 0x2
+#define DRM_XE_UFENCE_WAIT_OP_GTE 0x3
+#define DRM_XE_UFENCE_WAIT_OP_LT 0x4
+#define DRM_XE_UFENCE_WAIT_OP_LTE 0x5
/** @op: wait operation (type of comparison) */
__u16 op;
@@ -934,12 +934,13 @@ struct drm_xe_wait_user_fence {
/** @value: compare value */
__u64 value;
-#define DRM_XE_UFENCE_WAIT_U8 0xffu
-#define DRM_XE_UFENCE_WAIT_U16 0xffffu
-#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
-#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
+#define DRM_XE_UFENCE_WAIT_MASK_U8 0xffu
+#define DRM_XE_UFENCE_WAIT_MASK_U16 0xffffu
+#define DRM_XE_UFENCE_WAIT_MASK_U32 0xffffffffu
+#define DRM_XE_UFENCE_WAIT_MASK_U64 0xffffffffffffffffu
/** @mask: comparison mask */
__u64 mask;
+
/**
* @timeout: how long to wait before bailing, value in nanoseconds.
* Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [Intel-xe] [PATCH v1 8/8] drm/xe/uapi: Be more specific about the vm_bind prefetch region
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
` (6 preceding siblings ...)
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 7/8] drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK Francois Dugast
@ 2023-11-14 13:34 ` Francois Dugast
2023-11-15 19:04 ` Matt Roper
2023-11-14 16:28 ` [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Renaming Patchwork
` (2 subsequent siblings)
10 siblings, 1 reply; 22+ messages in thread
From: Francois Dugast @ 2023-11-14 13:34 UTC (permalink / raw)
To: intel-xe; +Cc: Francois Dugast, Rodrigo Vivi
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Let's bring a bit of clarity on this 'region' field that is
part of vm_bind operation struct. Rename and document to make
it more than obvious that it is a region instance and not a
mask and also that it should only be used with the prefetch
operation itself.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
---
drivers/gpu/drm/xe/xe_vm.c | 15 ++++++++-------
include/uapi/drm/xe_drm.h | 8 ++++++--
2 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 76926ee756c7..f8559ebad9bc 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2167,7 +2167,8 @@ static void print_op(struct xe_device *xe, struct drm_gpuva_op *op)
static struct drm_gpuva_ops *
vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
u64 bo_offset_or_userptr, u64 addr, u64 range,
- u32 operation, u32 flags, u8 tile_mask, u32 region)
+ u32 operation, u32 flags, u8 tile_mask,
+ u32 prefetch_region)
{
struct drm_gem_object *obj = bo ? &bo->ttm.base : NULL;
struct drm_gpuva_ops *ops;
@@ -2221,7 +2222,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
op->tile_mask = tile_mask;
- op->prefetch.region = region;
+ op->prefetch.region = prefetch_region;
}
break;
case DRM_XE_VM_BIND_OP_UNMAP_ALL:
@@ -2881,7 +2882,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
u32 flags = (*bind_ops)[i].flags;
u32 obj = (*bind_ops)[i].obj;
u64 obj_offset = (*bind_ops)[i].obj_offset;
- u32 region = (*bind_ops)[i].region;
+ u32 prefetch_region = (*bind_ops)[i].prefetch_mem_region_instance;
bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
if (i == 0) {
@@ -2915,9 +2916,9 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
XE_IOCTL_DBG(xe, obj &&
op == DRM_XE_VM_BIND_OP_PREFETCH) ||
- XE_IOCTL_DBG(xe, region &&
+ XE_IOCTL_DBG(xe, prefetch_region &&
op != DRM_XE_VM_BIND_OP_PREFETCH) ||
- XE_IOCTL_DBG(xe, !(BIT(region) &
+ XE_IOCTL_DBG(xe, !(BIT(prefetch_region) &
xe->info.mem_region_mask)) ||
XE_IOCTL_DBG(xe, obj &&
op == DRM_XE_VM_BIND_OP_UNMAP)) {
@@ -3099,11 +3100,11 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
u32 flags = bind_ops[i].flags;
u64 obj_offset = bind_ops[i].obj_offset;
u8 tile_mask = bind_ops[i].tile_mask;
- u32 region = bind_ops[i].region;
+ u32 prefetch_region = bind_ops[i].prefetch_mem_region_instance;
ops[i] = vm_bind_ioctl_ops_create(vm, bos[i], obj_offset,
addr, range, op, flags,
- tile_mask, region);
+ tile_mask, prefetch_region);
if (IS_ERR(ops[i])) {
err = PTR_ERR(ops[i]);
ops[i] = NULL;
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 675194886851..d66e8dc72e96 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -672,8 +672,12 @@ struct drm_xe_vm_bind_op {
/** @flags: Bind flags */
__u32 flags;
- /** @mem_region: Memory region to prefetch VMA to, instance not a mask */
- __u32 region;
+ /**
+ * @prefetch_mem_region_instance: Memory region to prefetch VMA to.
+ * It is a region instance, not a mask.
+ * To be used only with %DRM_XE_VM_BIND_OP_PREFETCH operation.
+ */
+ __u32 prefetch_mem_region_instance;
/** @reserved: Reserved */
__u64 reserved[2];
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 3/8] drm/xe/uapi: Change rsvd to pad in struct drm_xe_class_instance
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 3/8] drm/xe/uapi: Change rsvd to pad in struct drm_xe_class_instance Francois Dugast
@ 2023-11-14 13:44 ` Rodrigo Vivi
2023-11-16 15:30 ` Souza, Jose
1 sibling, 0 replies; 22+ messages in thread
From: Rodrigo Vivi @ 2023-11-14 13:44 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
On Tue, Nov 14, 2023 at 01:34:29PM +0000, Francois Dugast wrote:
> Change rsvd to pad in struct drm_xe_class_instance to prevent the field
> from being used in future.
>
> v2: Change from fixup to regular commit because this touches the
> uAPI (Francois Dugast)
>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 5 ++++-
> include/uapi/drm/xe_drm.h | 3 ++-
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 565a716302bb..48befd9f0812 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -215,7 +215,10 @@ static int query_engines(struct xe_device *xe,
> xe_to_user_engine_class[hwe->class];
> hw_engine_info[i].engine_instance =
> hwe->logical_instance;
> - hw_engine_info[i++].gt_id = gt->info.id;
> + hw_engine_info[i].gt_id = gt->info.id;
> + hw_engine_info[i].pad = 0;
> +
> + i++;
> }
>
> if (copy_to_user(query_ptr, hw_engine_info, size)) {
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index f6346a8351e4..a8d351c9fa7c 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -141,7 +141,8 @@ struct drm_xe_engine_class_instance {
>
> __u16 engine_instance;
> __u16 gt_id;
> - __u16 rsvd;
> + /** @pad: MBZ */
> + __u16 pad;
> };
>
> /**
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 2/8] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 2/8] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
@ 2023-11-14 13:45 ` Rodrigo Vivi
2023-11-16 15:37 ` Souza, Jose
1 sibling, 0 replies; 22+ messages in thread
From: Rodrigo Vivi @ 2023-11-14 13:45 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
On Tue, Nov 14, 2023 at 01:34:28PM +0000, Francois Dugast wrote:
> Most constants defined in xe_drm.h which can be used for flags are
> named DRM_XE_*_FLAG_*, which is helpful to identify them. Make this
> systematic and add _FLAG where it was missing.
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_sync.c | 16 ++++++-------
> drivers/gpu/drm/xe/xe_vm.c | 32 ++++++++++++-------------
> drivers/gpu/drm/xe/xe_vm_doc.h | 2 +-
> drivers/gpu/drm/xe/xe_wait_user_fence.c | 10 ++++----
> include/uapi/drm/xe_drm.h | 30 +++++++++++------------
> 5 files changed, 45 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
> index 73ef259aa387..eafe53c2f55d 100644
> --- a/drivers/gpu/drm/xe/xe_sync.c
> +++ b/drivers/gpu/drm/xe/xe_sync.c
> @@ -110,14 +110,14 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
> return -EFAULT;
>
> if (XE_IOCTL_DBG(xe, sync_in.flags &
> - ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_SIGNAL)) ||
> + ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_FLAG_SIGNAL)) ||
> XE_IOCTL_DBG(xe, sync_in.pad) ||
> XE_IOCTL_DBG(xe, sync_in.reserved[0] || sync_in.reserved[1]))
> return -EINVAL;
>
> - signal = sync_in.flags & DRM_XE_SYNC_SIGNAL;
> + signal = sync_in.flags & DRM_XE_SYNC_FLAG_SIGNAL;
> switch (sync_in.flags & SYNC_FLAGS_TYPE_MASK) {
> - case DRM_XE_SYNC_SYNCOBJ:
> + case DRM_XE_SYNC_FLAG_SYNCOBJ:
> if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
> return -EOPNOTSUPP;
>
> @@ -135,7 +135,7 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
> }
> break;
>
> - case DRM_XE_SYNC_TIMELINE_SYNCOBJ:
> + case DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ:
> if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
> return -EOPNOTSUPP;
>
> @@ -165,12 +165,12 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
> }
> break;
>
> - case DRM_XE_SYNC_DMA_BUF:
> + case DRM_XE_SYNC_FLAG_DMA_BUF:
> if (XE_IOCTL_DBG(xe, "TODO"))
> return -EINVAL;
> break;
>
> - case DRM_XE_SYNC_USER_FENCE:
> + case DRM_XE_SYNC_FLAG_USER_FENCE:
> if (XE_IOCTL_DBG(xe, !signal))
> return -EOPNOTSUPP;
>
> @@ -225,7 +225,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry *sync, struct xe_sched_job *job)
> void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
> struct dma_fence *fence)
> {
> - if (!(sync->flags & DRM_XE_SYNC_SIGNAL))
> + if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
> return;
>
> if (sync->chain_fence) {
> @@ -253,7 +253,7 @@ void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
> dma_fence_put(fence);
> }
> } else if ((sync->flags & SYNC_FLAGS_TYPE_MASK) ==
> - DRM_XE_SYNC_USER_FENCE) {
> + DRM_XE_SYNC_FLAG_USER_FENCE) {
> job->user_fence.used = true;
> job->user_fence.addr = sync->addr;
> job->user_fence.value = sync->timeline_value;
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index ca4abbb86585..76926ee756c7 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -1918,10 +1918,10 @@ static int xe_vm_unbind(struct xe_vm *vm, struct xe_vma *vma,
> return 0;
> }
>
> -#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_SCRATCH_PAGE | \
> - DRM_XE_VM_CREATE_COMPUTE_MODE | \
> - DRM_XE_VM_CREATE_ASYNC_DEFAULT | \
> - DRM_XE_VM_CREATE_FAULT_MODE)
> +#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE | \
> + DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE | \
> + DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT | \
> + DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
>
> int xe_vm_create_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file)
> @@ -1939,9 +1939,9 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
>
> if (XE_WA(xe_root_mmio_gt(xe), 14016763929))
> - args->flags |= DRM_XE_VM_CREATE_SCRATCH_PAGE;
> + args->flags |= DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE;
>
> - if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
> + if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
> !xe->info.supports_usm))
> return -EINVAL;
>
> @@ -1951,32 +1951,32 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
> if (XE_IOCTL_DBG(xe, args->flags & ~ALL_DRM_XE_VM_CREATE_FLAGS))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE &&
> - args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
> + if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE &&
> + args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE &&
> - args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
> + if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE &&
> + args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
> + if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
> xe_device_in_non_fault_mode(xe)))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FAULT_MODE) &&
> + if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE) &&
> xe_device_in_fault_mode(xe)))
> return -EINVAL;
>
> if (XE_IOCTL_DBG(xe, args->extensions))
> return -EINVAL;
>
> - if (args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE)
> + if (args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE)
> flags |= XE_VM_FLAG_SCRATCH_PAGE;
> - if (args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE)
> + if (args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE)
> flags |= XE_VM_FLAG_COMPUTE_MODE;
> - if (args->flags & DRM_XE_VM_CREATE_ASYNC_DEFAULT)
> + if (args->flags & DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT)
> flags |= XE_VM_FLAG_ASYNC_DEFAULT;
> - if (args->flags & DRM_XE_VM_CREATE_FAULT_MODE)
> + if (args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
> flags |= XE_VM_FLAG_FAULT_MODE;
>
> vm = xe_vm_create(xe, flags);
> diff --git a/drivers/gpu/drm/xe/xe_vm_doc.h b/drivers/gpu/drm/xe/xe_vm_doc.h
> index 516f4dc97223..bdc6659891a5 100644
> --- a/drivers/gpu/drm/xe/xe_vm_doc.h
> +++ b/drivers/gpu/drm/xe/xe_vm_doc.h
> @@ -18,7 +18,7 @@
> * Scratch page
> * ------------
> *
> - * If the VM is created with the flag, DRM_XE_VM_CREATE_SCRATCH_PAGE, set the
> + * If the VM is created with the flag, DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE, set the
> * entire page table structure defaults pointing to blank page allocated by the
> * VM. Invalid memory access rather than fault just read / write to this page.
> *
> diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> index 78686908f7fb..13562db6c07f 100644
> --- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
> +++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> @@ -79,8 +79,8 @@ static int check_hw_engines(struct xe_device *xe,
> return 0;
> }
>
> -#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_SOFT_OP | \
> - DRM_XE_UFENCE_WAIT_ABSTIME)
> +#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
> + DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
> #define MAX_OP DRM_XE_UFENCE_WAIT_LTE
>
> static long to_jiffies_timeout(struct xe_device *xe,
> @@ -107,7 +107,7 @@ static long to_jiffies_timeout(struct xe_device *xe,
> * Save the timeout to an u64 variable because nsecs_to_jiffies
> * might return a value that overflows s32 variable.
> */
> - if (args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)
> + if (args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
> t = drm_timeout_abs_to_jiffies(args->timeout);
> else
> t = nsecs_to_jiffies(args->timeout);
> @@ -137,7 +137,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> u64_to_user_ptr(args->instances);
> u64 addr = args->addr;
> int err;
> - bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_SOFT_OP;
> + bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP;
> long timeout;
> ktime_t start;
>
> @@ -206,7 +206,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> }
> remove_wait_queue(&xe->ufence_wq, &w_wait);
>
> - if (!(args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)) {
> + if (!(args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)) {
> args->timeout -= ktime_to_ns(ktime_sub(ktime_get(), start));
> if (args->timeout < 0)
> args->timeout = 0;
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 3ef49e3baaed..f6346a8351e4 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -585,10 +585,10 @@ struct drm_xe_vm_create {
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> -#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> -#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
> -#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
> -#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> +#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (0x1 << 0)
> +#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (0x1 << 1)
> +#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (0x1 << 2)
> +#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (0x1 << 3)
> /** @flags: Flags */
> __u32 flags;
>
> @@ -831,11 +831,11 @@ struct drm_xe_sync {
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> -#define DRM_XE_SYNC_SYNCOBJ 0x0
> -#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
> -#define DRM_XE_SYNC_DMA_BUF 0x2
> -#define DRM_XE_SYNC_USER_FENCE 0x3
> -#define DRM_XE_SYNC_SIGNAL 0x10
> +#define DRM_XE_SYNC_FLAG_SYNCOBJ 0x0
> +#define DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ 0x1
> +#define DRM_XE_SYNC_FLAG_DMA_BUF 0x2
> +#define DRM_XE_SYNC_FLAG_USER_FENCE 0x3
> +#define DRM_XE_SYNC_FLAG_SIGNAL 0x10
> __u32 flags;
>
> /** @pad: MBZ */
> @@ -921,8 +921,8 @@ struct drm_xe_wait_user_fence {
> /** @op: wait operation (type of comparison) */
> __u16 op;
>
> -#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
> -#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
> +#define DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
> +#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 1)
> /** @flags: wait flags */
> __u16 flags;
>
> @@ -940,10 +940,10 @@ struct drm_xe_wait_user_fence {
> __u64 mask;
> /**
> * @timeout: how long to wait before bailing, value in nanoseconds.
> - * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
> + * Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)
> * it contains timeout expressed in nanoseconds to wait (fence will
> * expire at now() + timeout).
> - * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout) wait
> + * When DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flat is set (absolute timeout) wait
> * will end at timeout (uses system MONOTONIC_CLOCK).
> * Passing negative timeout leads to neverending wait.
> *
> @@ -956,13 +956,13 @@ struct drm_xe_wait_user_fence {
>
> /**
> * @num_engines: number of engine instances to wait on, must be zero
> - * when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + * when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
> */
> __u64 num_engines;
>
> /**
> * @instances: user pointer to array of drm_xe_engine_class_instance to
> - * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + * wait on, must be NULL when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
> */
> __u64 instances;
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Renaming
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
` (7 preceding siblings ...)
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 8/8] drm/xe/uapi: Be more specific about the vm_bind prefetch region Francois Dugast
@ 2023-11-14 16:28 ` Patchwork
2023-11-15 23:25 ` [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Renaming (rev2) Patchwork
2023-11-17 21:32 ` Patchwork
10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2023-11-14 16:28 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - Renaming
URL : https://patchwork.freedesktop.org/series/126399/
State : failure
== Summary ==
=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: 7dc3dda9b drm/xe: Raise GT frequency before GuC/HuC load
=== git am output follows ===
error: patch failed: drivers/gpu/drm/xe/xe_pmu.c:114
error: drivers/gpu/drm/xe/xe_pmu.c: patch does not apply
error: patch failed: drivers/gpu/drm/xe/xe_query.c:305
error: drivers/gpu/drm/xe/xe_query.c: patch does not apply
error: patch failed: include/uapi/drm/xe_drm.h:320
error: include/uapi/drm/xe_drm.h: patch does not apply
hint: Use 'git am --show-current-patch' to see the failed patch
Applying: drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
Patch failed at 0001 drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 4/8] drm/xe/uapi: Rename *_mem_regions masks
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 4/8] drm/xe/uapi: Rename *_mem_regions masks Francois Dugast
@ 2023-11-15 18:53 ` Matt Roper
2023-11-16 15:34 ` Souza, Jose
1 sibling, 0 replies; 22+ messages in thread
From: Matt Roper @ 2023-11-15 18:53 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe, Rodrigo Vivi
On Tue, Nov 14, 2023 at 01:34:30PM +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> - 'native' doesn't make much sense on integrated devices.
> - 'slow' is not necessarily true and doesn't go well with opposition
> to 'native'.
>
> Instead, let's use 'near' vs 'far'. It makes sense with all the current
> Intel GPUs and it is future proof. Right now, there's absolutely no need
> to define among the 'far' memory, which ones are slower, either in terms
> of latency, nunmber of hops or bandwidth.
>
> In case of this might become a requirement in the future, a new query
> could be added to indicate the certain 'distance' between a given engine
> and a memory_region. But for now, this fulfill all of the current
> requirements in the most straightforward way for the userspace drivers.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 8 ++++----
> include/uapi/drm/xe_drm.h | 17 +++++++++--------
> 2 files changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 48befd9f0812..8b5136460ea6 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -377,12 +377,12 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> gt_list->gt_list[id].gt_id = gt->info.id;
> gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> if (!IS_DGFX(xe))
> - gt_list->gt_list[id].native_mem_regions = 0x1;
> + gt_list->gt_list[id].near_mem_regions = 0x1;
> else
> - gt_list->gt_list[id].native_mem_regions =
> + gt_list->gt_list[id].near_mem_regions =
> BIT(gt_to_tile(gt)->id) << 1;
> - gt_list->gt_list[id].slow_mem_regions = xe->info.mem_region_mask ^
> - gt_list->gt_list[id].native_mem_regions;
> + gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
> + gt_list->gt_list[id].near_mem_regions;
> }
>
> if (copy_to_user(query_ptr, gt_list, size)) {
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index a8d351c9fa7c..fd51d4444119 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -349,17 +349,18 @@ struct drm_xe_query_gt {
> /** @clock_freq: A clock frequency for timestamp */
> __u32 clock_freq;
> /**
> - * @native_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_usage that lives on the same GPU/Tile and have
> - * direct access.
> + * @near_mem_regions: Bit mask of instances from
> + * drm_xe_query_mem_usage that is near the current engines of this GT.
s/is/are/. And although "near" is good in the field name, I wonder if
the kerneldoc's explanation text should say "nearest" rather than "near"
to help clarify that this is a relative rather than based on some
absolute metric.
> */
> - __u64 native_mem_regions;
> + __u64 near_mem_regions;
> /**
> - * @slow_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_usage that this GT can indirectly access, although
> - * they live on a different GPU/Tile.
> + * @far_mem_regions: Bit mask of instances from
> + * drm_xe_query_mem_usage that is far from the engines of this GT.
s/is/are/ again.
> + * In general, it has extra indirections when compared to the
And since instances was plural, also s/it has/they have/.
> + * @near_mem_regions. For a discrete device this could mean system
> + * memory and memory living in a different Tile.
No need to capitalize "tile."
Aside from those minor nitpicks,
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> */
> - __u64 slow_mem_regions;
> + __u64 far_mem_regions;
> /** @reserved: Reserved */
> __u64 reserved[8];
> };
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 5/8] drm/xe/uapi: Rename query's mem_usage to mem_regions
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 5/8] drm/xe/uapi: Rename query's mem_usage to mem_regions Francois Dugast
@ 2023-11-15 18:54 ` Matt Roper
2023-11-16 15:34 ` Souza, Jose
1 sibling, 0 replies; 22+ messages in thread
From: Matt Roper @ 2023-11-15 18:54 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe, Rodrigo Vivi
On Tue, Nov 14, 2023 at 01:34:31PM +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> 'Usage' gives an impression of telemetry information where someone
> would query to see how the memory is currently used and available
> size, etc. However this API is more than this. It is about a global
> view of all the memory regions available in the system and user
> space needs to have this information so they can then use the
> mem_region masks that are returned for the engine access.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 16 ++++++++--------
> include/uapi/drm/xe_drm.h | 14 +++++++-------
> 2 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 8b5136460ea6..d495716b2c96 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -230,7 +230,7 @@ static int query_engines(struct xe_device *xe,
> return 0;
> }
>
> -static size_t calc_memory_usage_size(struct xe_device *xe)
> +static size_t calc_mem_regions_size(struct xe_device *xe)
> {
> u32 num_managers = 1;
> int i;
> @@ -239,15 +239,15 @@ static size_t calc_memory_usage_size(struct xe_device *xe)
> if (ttm_manager_type(&xe->ttm, i))
> num_managers++;
>
> - return offsetof(struct drm_xe_query_mem_usage, regions[num_managers]);
> + return offsetof(struct drm_xe_query_mem_regions, regions[num_managers]);
> }
>
> -static int query_memory_usage(struct xe_device *xe,
> - struct drm_xe_device_query *query)
> +static int query_mem_regions(struct xe_device *xe,
> + struct drm_xe_device_query *query)
> {
> - size_t size = calc_memory_usage_size(xe);
> - struct drm_xe_query_mem_usage *usage;
> - struct drm_xe_query_mem_usage __user *query_ptr =
> + size_t size = calc_mem_regions_size(xe);
> + struct drm_xe_query_mem_regions *usage;
> + struct drm_xe_query_mem_regions __user *query_ptr =
> u64_to_user_ptr(query->data);
> struct ttm_resource_manager *man;
> int ret, i;
> @@ -499,7 +499,7 @@ static int query_gt_topology(struct xe_device *xe,
> static int (* const xe_query_funcs[])(struct xe_device *xe,
> struct drm_xe_device_query *query) = {
> query_engines,
> - query_memory_usage,
> + query_mem_regions,
> query_config,
> query_gt_list,
> query_hwconfig,
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index fd51d4444119..c627e35bddb8 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -291,13 +291,13 @@ struct drm_xe_query_engine_cycles {
> };
>
> /**
> - * struct drm_xe_query_mem_usage - describe memory regions and usage
> + * struct drm_xe_query_mem_regions - describe memory regions
> *
> * If a query is made with a struct drm_xe_device_query where .query
> - * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
> - * struct drm_xe_query_mem_usage in .data.
> + * is equal to DRM_XE_DEVICE_QUERY_MEM_REGIONS, then the reply uses
> + * struct drm_xe_query_mem_regions in .data.
> */
> -struct drm_xe_query_mem_usage {
> +struct drm_xe_query_mem_regions {
> /** @num_regions: number of memory regions returned in @regions */
> __u32 num_regions;
> /** @pad: MBZ */
> @@ -350,12 +350,12 @@ struct drm_xe_query_gt {
> __u32 clock_freq;
> /**
> * @near_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_usage that is near the current engines of this GT.
> + * drm_xe_query_mem_regions that is near the current engines of this GT.
> */
> __u64 near_mem_regions;
> /**
> * @far_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_usage that is far from the engines of this GT.
> + * drm_xe_query_mem_regions that is far from the engines of this GT.
> * In general, it has extra indirections when compared to the
> * @near_mem_regions. For a discrete device this could mean system
> * memory and memory living in a different Tile.
> @@ -469,7 +469,7 @@ struct drm_xe_device_query {
> __u64 extensions;
>
> #define DRM_XE_DEVICE_QUERY_ENGINES 0
> -#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
> +#define DRM_XE_DEVICE_QUERY_MEM_REGIONS 1
> #define DRM_XE_DEVICE_QUERY_CONFIG 2
> #define DRM_XE_DEVICE_QUERY_GT_LIST 3
> #define DRM_XE_DEVICE_QUERY_HWCONFIG 4
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 7/8] drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 7/8] drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK Francois Dugast
@ 2023-11-15 19:03 ` Matt Roper
0 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2023-11-15 19:03 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe, Rodrigo Vivi
On Tue, Nov 14, 2023 at 01:34:33PM +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> On one hand the WAIT_OP represents the operation use for waiting such
> as ==, !=, > and so on. On the other hand, the mask is applied to the
> value used for comparision. Split those two to bring clarity to the uapi.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_wait_user_fence.c | 14 +++++++-------
> include/uapi/drm/xe_drm.h | 21 +++++++++++----------
> 2 files changed, 18 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> index 13562db6c07f..4d5c2555ce41 100644
> --- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
> +++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> @@ -25,22 +25,22 @@ static int do_compare(u64 addr, u64 value, u64 mask, u16 op)
> return -EFAULT;
>
> switch (op) {
> - case DRM_XE_UFENCE_WAIT_EQ:
> + case DRM_XE_UFENCE_WAIT_OP_EQ:
> passed = (rvalue & mask) == (value & mask);
> break;
> - case DRM_XE_UFENCE_WAIT_NEQ:
> + case DRM_XE_UFENCE_WAIT_OP_NEQ:
> passed = (rvalue & mask) != (value & mask);
> break;
> - case DRM_XE_UFENCE_WAIT_GT:
> + case DRM_XE_UFENCE_WAIT_OP_GT:
> passed = (rvalue & mask) > (value & mask);
> break;
> - case DRM_XE_UFENCE_WAIT_GTE:
> + case DRM_XE_UFENCE_WAIT_OP_GTE:
> passed = (rvalue & mask) >= (value & mask);
> break;
> - case DRM_XE_UFENCE_WAIT_LT:
> + case DRM_XE_UFENCE_WAIT_OP_LT:
> passed = (rvalue & mask) < (value & mask);
> break;
> - case DRM_XE_UFENCE_WAIT_LTE:
> + case DRM_XE_UFENCE_WAIT_OP_LTE:
> passed = (rvalue & mask) <= (value & mask);
> break;
> default:
> @@ -81,7 +81,7 @@ static int check_hw_engines(struct xe_device *xe,
>
> #define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
> DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
> -#define MAX_OP DRM_XE_UFENCE_WAIT_LTE
> +#define MAX_OP DRM_XE_UFENCE_WAIT_OP_LTE
>
> static long to_jiffies_timeout(struct xe_device *xe,
> struct drm_xe_wait_user_fence *args)
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index b3df99dd1023..675194886851 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -914,12 +914,12 @@ struct drm_xe_wait_user_fence {
> */
> __u64 addr;
>
> -#define DRM_XE_UFENCE_WAIT_EQ 0
> -#define DRM_XE_UFENCE_WAIT_NEQ 1
> -#define DRM_XE_UFENCE_WAIT_GT 2
> -#define DRM_XE_UFENCE_WAIT_GTE 3
> -#define DRM_XE_UFENCE_WAIT_LT 4
> -#define DRM_XE_UFENCE_WAIT_LTE 5
> +#define DRM_XE_UFENCE_WAIT_OP_EQ 0x0
> +#define DRM_XE_UFENCE_WAIT_OP_NEQ 0x1
> +#define DRM_XE_UFENCE_WAIT_OP_GT 0x2
> +#define DRM_XE_UFENCE_WAIT_OP_GTE 0x3
> +#define DRM_XE_UFENCE_WAIT_OP_LT 0x4
> +#define DRM_XE_UFENCE_WAIT_OP_LTE 0x5
> /** @op: wait operation (type of comparison) */
> __u16 op;
>
> @@ -934,12 +934,13 @@ struct drm_xe_wait_user_fence {
> /** @value: compare value */
> __u64 value;
>
> -#define DRM_XE_UFENCE_WAIT_U8 0xffu
> -#define DRM_XE_UFENCE_WAIT_U16 0xffffu
> -#define DRM_XE_UFENCE_WAIT_U32 0xffffffffu
> -#define DRM_XE_UFENCE_WAIT_U64 0xffffffffffffffffu
> +#define DRM_XE_UFENCE_WAIT_MASK_U8 0xffu
> +#define DRM_XE_UFENCE_WAIT_MASK_U16 0xffffu
> +#define DRM_XE_UFENCE_WAIT_MASK_U32 0xffffffffu
> +#define DRM_XE_UFENCE_WAIT_MASK_U64 0xffffffffffffffffu
Do we even really need these mask defines in the uapi? It's not that
these are the only mask values accepted by the ioctl, and it should be
easy enough for userspace to figure out how to build an appropriate mask
without these defines.
Regardless, the renames look fine so
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Matt
> /** @mask: comparison mask */
> __u64 mask;
> +
> /**
> * @timeout: how long to wait before bailing, value in nanoseconds.
> * Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 8/8] drm/xe/uapi: Be more specific about the vm_bind prefetch region
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 8/8] drm/xe/uapi: Be more specific about the vm_bind prefetch region Francois Dugast
@ 2023-11-15 19:04 ` Matt Roper
0 siblings, 0 replies; 22+ messages in thread
From: Matt Roper @ 2023-11-15 19:04 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe, Rodrigo Vivi
On Tue, Nov 14, 2023 at 01:34:34PM +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Let's bring a bit of clarity on this 'region' field that is
> part of vm_bind operation struct. Rename and document to make
> it more than obvious that it is a region instance and not a
> mask and also that it should only be used with the prefetch
> operation itself.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/xe/xe_vm.c | 15 ++++++++-------
> include/uapi/drm/xe_drm.h | 8 ++++++--
> 2 files changed, 14 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 76926ee756c7..f8559ebad9bc 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -2167,7 +2167,8 @@ static void print_op(struct xe_device *xe, struct drm_gpuva_op *op)
> static struct drm_gpuva_ops *
> vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
> u64 bo_offset_or_userptr, u64 addr, u64 range,
> - u32 operation, u32 flags, u8 tile_mask, u32 region)
> + u32 operation, u32 flags, u8 tile_mask,
> + u32 prefetch_region)
> {
> struct drm_gem_object *obj = bo ? &bo->ttm.base : NULL;
> struct drm_gpuva_ops *ops;
> @@ -2221,7 +2222,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_bo *bo,
> struct xe_vma_op *op = gpuva_op_to_vma_op(__op);
>
> op->tile_mask = tile_mask;
> - op->prefetch.region = region;
> + op->prefetch.region = prefetch_region;
> }
> break;
> case DRM_XE_VM_BIND_OP_UNMAP_ALL:
> @@ -2881,7 +2882,7 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
> u32 flags = (*bind_ops)[i].flags;
> u32 obj = (*bind_ops)[i].obj;
> u64 obj_offset = (*bind_ops)[i].obj_offset;
> - u32 region = (*bind_ops)[i].region;
> + u32 prefetch_region = (*bind_ops)[i].prefetch_mem_region_instance;
> bool is_null = flags & DRM_XE_VM_BIND_FLAG_NULL;
>
> if (i == 0) {
> @@ -2915,9 +2916,9 @@ static int vm_bind_ioctl_check_args(struct xe_device *xe,
> op == DRM_XE_VM_BIND_OP_MAP_USERPTR) ||
> XE_IOCTL_DBG(xe, obj &&
> op == DRM_XE_VM_BIND_OP_PREFETCH) ||
> - XE_IOCTL_DBG(xe, region &&
> + XE_IOCTL_DBG(xe, prefetch_region &&
> op != DRM_XE_VM_BIND_OP_PREFETCH) ||
> - XE_IOCTL_DBG(xe, !(BIT(region) &
> + XE_IOCTL_DBG(xe, !(BIT(prefetch_region) &
> xe->info.mem_region_mask)) ||
> XE_IOCTL_DBG(xe, obj &&
> op == DRM_XE_VM_BIND_OP_UNMAP)) {
> @@ -3099,11 +3100,11 @@ int xe_vm_bind_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> u32 flags = bind_ops[i].flags;
> u64 obj_offset = bind_ops[i].obj_offset;
> u8 tile_mask = bind_ops[i].tile_mask;
> - u32 region = bind_ops[i].region;
> + u32 prefetch_region = bind_ops[i].prefetch_mem_region_instance;
>
> ops[i] = vm_bind_ioctl_ops_create(vm, bos[i], obj_offset,
> addr, range, op, flags,
> - tile_mask, region);
> + tile_mask, prefetch_region);
> if (IS_ERR(ops[i])) {
> err = PTR_ERR(ops[i]);
> ops[i] = NULL;
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 675194886851..d66e8dc72e96 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -672,8 +672,12 @@ struct drm_xe_vm_bind_op {
> /** @flags: Bind flags */
> __u32 flags;
>
> - /** @mem_region: Memory region to prefetch VMA to, instance not a mask */
> - __u32 region;
> + /**
> + * @prefetch_mem_region_instance: Memory region to prefetch VMA to.
> + * It is a region instance, not a mask.
> + * To be used only with %DRM_XE_VM_BIND_OP_PREFETCH operation.
> + */
> + __u32 prefetch_mem_region_instance;
>
> /** @reserved: Reserved */
> __u64 reserved[2];
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Renaming (rev2)
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
` (8 preceding siblings ...)
2023-11-14 16:28 ` [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Renaming Patchwork
@ 2023-11-15 23:25 ` Patchwork
2023-11-17 21:32 ` Patchwork
10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2023-11-15 23:25 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - Renaming (rev2)
URL : https://patchwork.freedesktop.org/series/126399/
State : failure
== Summary ==
=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: eba8bfb1d fixup! drm/xe/display: Implement display support
=== git am output follows ===
error: patch failed: drivers/gpu/drm/xe/xe_pmu.c:114
error: drivers/gpu/drm/xe/xe_pmu.c: patch does not apply
error: patch failed: drivers/gpu/drm/xe/xe_query.c:305
error: drivers/gpu/drm/xe/xe_query.c: patch does not apply
error: patch failed: include/uapi/drm/xe_drm.h:320
error: include/uapi/drm/xe_drm.h: patch does not apply
hint: Use 'git am --show-current-patch' to see the failed patch
Applying: drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
Patch failed at 0001 drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 3/8] drm/xe/uapi: Change rsvd to pad in struct drm_xe_class_instance
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 3/8] drm/xe/uapi: Change rsvd to pad in struct drm_xe_class_instance Francois Dugast
2023-11-14 13:44 ` Rodrigo Vivi
@ 2023-11-16 15:30 ` Souza, Jose
1 sibling, 0 replies; 22+ messages in thread
From: Souza, Jose @ 2023-11-16 15:30 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Dugast, Francois
On Tue, 2023-11-14 at 13:34 +0000, Francois Dugast wrote:
> Change rsvd to pad in struct drm_xe_class_instance to prevent the field
> from being used in future.
>
> v2: Change from fixup to regular commit because this touches the
> uAPI (Francois Dugast)
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 5 ++++-
> include/uapi/drm/xe_drm.h | 3 ++-
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 565a716302bb..48befd9f0812 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -215,7 +215,10 @@ static int query_engines(struct xe_device *xe,
> xe_to_user_engine_class[hwe->class];
> hw_engine_info[i].engine_instance =
> hwe->logical_instance;
> - hw_engine_info[i++].gt_id = gt->info.id;
> + hw_engine_info[i].gt_id = gt->info.id;
> + hw_engine_info[i].pad = 0;
> +
> + i++;
> }
>
> if (copy_to_user(query_ptr, hw_engine_info, size)) {
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index f6346a8351e4..a8d351c9fa7c 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -141,7 +141,8 @@ struct drm_xe_engine_class_instance {
>
> __u16 engine_instance;
> __u16 gt_id;
> - __u16 rsvd;
> + /** @pad: MBZ */
> + __u16 pad;
> };
>
> /**
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 4/8] drm/xe/uapi: Rename *_mem_regions masks
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 4/8] drm/xe/uapi: Rename *_mem_regions masks Francois Dugast
2023-11-15 18:53 ` Matt Roper
@ 2023-11-16 15:34 ` Souza, Jose
1 sibling, 0 replies; 22+ messages in thread
From: Souza, Jose @ 2023-11-16 15:34 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Dugast, Francois; +Cc: Vivi, Rodrigo
On Tue, 2023-11-14 at 13:34 +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> - 'native' doesn't make much sense on integrated devices.
> - 'slow' is not necessarily true and doesn't go well with opposition
> to 'native'.
>
> Instead, let's use 'near' vs 'far'. It makes sense with all the current
> Intel GPUs and it is future proof. Right now, there's absolutely no need
> to define among the 'far' memory, which ones are slower, either in terms
> of latency, nunmber of hops or bandwidth.
>
> In case of this might become a requirement in the future, a new query
> could be added to indicate the certain 'distance' between a given engine
> and a memory_region. But for now, this fulfill all of the current
> requirements in the most straightforward way for the userspace drivers.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 8 ++++----
> include/uapi/drm/xe_drm.h | 17 +++++++++--------
> 2 files changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 48befd9f0812..8b5136460ea6 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -377,12 +377,12 @@ static int query_gt_list(struct xe_device *xe, struct drm_xe_device_query *query
> gt_list->gt_list[id].gt_id = gt->info.id;
> gt_list->gt_list[id].clock_freq = gt->info.clock_freq;
> if (!IS_DGFX(xe))
> - gt_list->gt_list[id].native_mem_regions = 0x1;
> + gt_list->gt_list[id].near_mem_regions = 0x1;
> else
> - gt_list->gt_list[id].native_mem_regions =
> + gt_list->gt_list[id].near_mem_regions =
> BIT(gt_to_tile(gt)->id) << 1;
> - gt_list->gt_list[id].slow_mem_regions = xe->info.mem_region_mask ^
> - gt_list->gt_list[id].native_mem_regions;
> + gt_list->gt_list[id].far_mem_regions = xe->info.mem_region_mask ^
> + gt_list->gt_list[id].near_mem_regions;
> }
>
> if (copy_to_user(query_ptr, gt_list, size)) {
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index a8d351c9fa7c..fd51d4444119 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -349,17 +349,18 @@ struct drm_xe_query_gt {
> /** @clock_freq: A clock frequency for timestamp */
> __u32 clock_freq;
> /**
> - * @native_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_usage that lives on the same GPU/Tile and have
> - * direct access.
> + * @near_mem_regions: Bit mask of instances from
> + * drm_xe_query_mem_usage that is near the current engines of this GT.
> */
> - __u64 native_mem_regions;
> + __u64 near_mem_regions;
> /**
> - * @slow_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_usage that this GT can indirectly access, although
> - * they live on a different GPU/Tile.
> + * @far_mem_regions: Bit mask of instances from
> + * drm_xe_query_mem_usage that is far from the engines of this GT.
> + * In general, it has extra indirections when compared to the
> + * @near_mem_regions. For a discrete device this could mean system
> + * memory and memory living in a different Tile.
> */
> - __u64 slow_mem_regions;
> + __u64 far_mem_regions;
> /** @reserved: Reserved */
> __u64 reserved[8];
> };
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 5/8] drm/xe/uapi: Rename query's mem_usage to mem_regions
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 5/8] drm/xe/uapi: Rename query's mem_usage to mem_regions Francois Dugast
2023-11-15 18:54 ` Matt Roper
@ 2023-11-16 15:34 ` Souza, Jose
1 sibling, 0 replies; 22+ messages in thread
From: Souza, Jose @ 2023-11-16 15:34 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Dugast, Francois; +Cc: Vivi, Rodrigo
On Tue, 2023-11-14 at 13:34 +0000, Francois Dugast wrote:
> From: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> 'Usage' gives an impression of telemetry information where someone
> would query to see how the memory is currently used and available
> size, etc. However this API is more than this. It is about a global
> view of all the memory regions available in the system and user
> space needs to have this information so they can then use the
> mem_region masks that are returned for the engine access.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_query.c | 16 ++++++++--------
> include/uapi/drm/xe_drm.h | 14 +++++++-------
> 2 files changed, 15 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 8b5136460ea6..d495716b2c96 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -230,7 +230,7 @@ static int query_engines(struct xe_device *xe,
> return 0;
> }
>
> -static size_t calc_memory_usage_size(struct xe_device *xe)
> +static size_t calc_mem_regions_size(struct xe_device *xe)
> {
> u32 num_managers = 1;
> int i;
> @@ -239,15 +239,15 @@ static size_t calc_memory_usage_size(struct xe_device *xe)
> if (ttm_manager_type(&xe->ttm, i))
> num_managers++;
>
> - return offsetof(struct drm_xe_query_mem_usage, regions[num_managers]);
> + return offsetof(struct drm_xe_query_mem_regions, regions[num_managers]);
> }
>
> -static int query_memory_usage(struct xe_device *xe,
> - struct drm_xe_device_query *query)
> +static int query_mem_regions(struct xe_device *xe,
> + struct drm_xe_device_query *query)
> {
> - size_t size = calc_memory_usage_size(xe);
> - struct drm_xe_query_mem_usage *usage;
> - struct drm_xe_query_mem_usage __user *query_ptr =
> + size_t size = calc_mem_regions_size(xe);
> + struct drm_xe_query_mem_regions *usage;
> + struct drm_xe_query_mem_regions __user *query_ptr =
> u64_to_user_ptr(query->data);
> struct ttm_resource_manager *man;
> int ret, i;
> @@ -499,7 +499,7 @@ static int query_gt_topology(struct xe_device *xe,
> static int (* const xe_query_funcs[])(struct xe_device *xe,
> struct drm_xe_device_query *query) = {
> query_engines,
> - query_memory_usage,
> + query_mem_regions,
> query_config,
> query_gt_list,
> query_hwconfig,
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index fd51d4444119..c627e35bddb8 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -291,13 +291,13 @@ struct drm_xe_query_engine_cycles {
> };
>
> /**
> - * struct drm_xe_query_mem_usage - describe memory regions and usage
> + * struct drm_xe_query_mem_regions - describe memory regions
> *
> * If a query is made with a struct drm_xe_device_query where .query
> - * is equal to DRM_XE_DEVICE_QUERY_MEM_USAGE, then the reply uses
> - * struct drm_xe_query_mem_usage in .data.
> + * is equal to DRM_XE_DEVICE_QUERY_MEM_REGIONS, then the reply uses
> + * struct drm_xe_query_mem_regions in .data.
> */
> -struct drm_xe_query_mem_usage {
> +struct drm_xe_query_mem_regions {
> /** @num_regions: number of memory regions returned in @regions */
> __u32 num_regions;
> /** @pad: MBZ */
> @@ -350,12 +350,12 @@ struct drm_xe_query_gt {
> __u32 clock_freq;
> /**
> * @near_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_usage that is near the current engines of this GT.
> + * drm_xe_query_mem_regions that is near the current engines of this GT.
> */
> __u64 near_mem_regions;
> /**
> * @far_mem_regions: Bit mask of instances from
> - * drm_xe_query_mem_usage that is far from the engines of this GT.
> + * drm_xe_query_mem_regions that is far from the engines of this GT.
> * In general, it has extra indirections when compared to the
> * @near_mem_regions. For a discrete device this could mean system
> * memory and memory living in a different Tile.
> @@ -469,7 +469,7 @@ struct drm_xe_device_query {
> __u64 extensions;
>
> #define DRM_XE_DEVICE_QUERY_ENGINES 0
> -#define DRM_XE_DEVICE_QUERY_MEM_USAGE 1
> +#define DRM_XE_DEVICE_QUERY_MEM_REGIONS 1
> #define DRM_XE_DEVICE_QUERY_CONFIG 2
> #define DRM_XE_DEVICE_QUERY_GT_LIST 3
> #define DRM_XE_DEVICE_QUERY_HWCONFIG 4
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-xe] [PATCH v1 2/8] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 2/8] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
2023-11-14 13:45 ` Rodrigo Vivi
@ 2023-11-16 15:37 ` Souza, Jose
1 sibling, 0 replies; 22+ messages in thread
From: Souza, Jose @ 2023-11-16 15:37 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Dugast, Francois
On Tue, 2023-11-14 at 13:34 +0000, Francois Dugast wrote:
> Most constants defined in xe_drm.h which can be used for flags are
> named DRM_XE_*_FLAG_*, which is helpful to identify them. Make this
> systematic and add _FLAG where it was missing.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_sync.c | 16 ++++++-------
> drivers/gpu/drm/xe/xe_vm.c | 32 ++++++++++++-------------
> drivers/gpu/drm/xe/xe_vm_doc.h | 2 +-
> drivers/gpu/drm/xe/xe_wait_user_fence.c | 10 ++++----
> include/uapi/drm/xe_drm.h | 30 +++++++++++------------
> 5 files changed, 45 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
> index 73ef259aa387..eafe53c2f55d 100644
> --- a/drivers/gpu/drm/xe/xe_sync.c
> +++ b/drivers/gpu/drm/xe/xe_sync.c
> @@ -110,14 +110,14 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
> return -EFAULT;
>
> if (XE_IOCTL_DBG(xe, sync_in.flags &
> - ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_SIGNAL)) ||
> + ~(SYNC_FLAGS_TYPE_MASK | DRM_XE_SYNC_FLAG_SIGNAL)) ||
> XE_IOCTL_DBG(xe, sync_in.pad) ||
> XE_IOCTL_DBG(xe, sync_in.reserved[0] || sync_in.reserved[1]))
> return -EINVAL;
>
> - signal = sync_in.flags & DRM_XE_SYNC_SIGNAL;
> + signal = sync_in.flags & DRM_XE_SYNC_FLAG_SIGNAL;
> switch (sync_in.flags & SYNC_FLAGS_TYPE_MASK) {
> - case DRM_XE_SYNC_SYNCOBJ:
> + case DRM_XE_SYNC_FLAG_SYNCOBJ:
> if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
> return -EOPNOTSUPP;
>
> @@ -135,7 +135,7 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
> }
> break;
>
> - case DRM_XE_SYNC_TIMELINE_SYNCOBJ:
> + case DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ:
> if (XE_IOCTL_DBG(xe, no_dma_fences && signal))
> return -EOPNOTSUPP;
>
> @@ -165,12 +165,12 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef,
> }
> break;
>
> - case DRM_XE_SYNC_DMA_BUF:
> + case DRM_XE_SYNC_FLAG_DMA_BUF:
> if (XE_IOCTL_DBG(xe, "TODO"))
> return -EINVAL;
> break;
>
> - case DRM_XE_SYNC_USER_FENCE:
> + case DRM_XE_SYNC_FLAG_USER_FENCE:
> if (XE_IOCTL_DBG(xe, !signal))
> return -EOPNOTSUPP;
>
> @@ -225,7 +225,7 @@ int xe_sync_entry_add_deps(struct xe_sync_entry *sync, struct xe_sched_job *job)
> void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
> struct dma_fence *fence)
> {
> - if (!(sync->flags & DRM_XE_SYNC_SIGNAL))
> + if (!(sync->flags & DRM_XE_SYNC_FLAG_SIGNAL))
> return;
>
> if (sync->chain_fence) {
> @@ -253,7 +253,7 @@ void xe_sync_entry_signal(struct xe_sync_entry *sync, struct xe_sched_job *job,
> dma_fence_put(fence);
> }
> } else if ((sync->flags & SYNC_FLAGS_TYPE_MASK) ==
> - DRM_XE_SYNC_USER_FENCE) {
> + DRM_XE_SYNC_FLAG_USER_FENCE) {
> job->user_fence.used = true;
> job->user_fence.addr = sync->addr;
> job->user_fence.value = sync->timeline_value;
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index ca4abbb86585..76926ee756c7 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -1918,10 +1918,10 @@ static int xe_vm_unbind(struct xe_vm *vm, struct xe_vma *vma,
> return 0;
> }
>
> -#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_SCRATCH_PAGE | \
> - DRM_XE_VM_CREATE_COMPUTE_MODE | \
> - DRM_XE_VM_CREATE_ASYNC_DEFAULT | \
> - DRM_XE_VM_CREATE_FAULT_MODE)
> +#define ALL_DRM_XE_VM_CREATE_FLAGS (DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE | \
> + DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE | \
> + DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT | \
> + DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
>
> int xe_vm_create_ioctl(struct drm_device *dev, void *data,
> struct drm_file *file)
> @@ -1939,9 +1939,9 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
> return -EINVAL;
>
> if (XE_WA(xe_root_mmio_gt(xe), 14016763929))
> - args->flags |= DRM_XE_VM_CREATE_SCRATCH_PAGE;
> + args->flags |= DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE;
>
> - if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
> + if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
> !xe->info.supports_usm))
> return -EINVAL;
>
> @@ -1951,32 +1951,32 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data,
> if (XE_IOCTL_DBG(xe, args->flags & ~ALL_DRM_XE_VM_CREATE_FLAGS))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE &&
> - args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
> + if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE &&
> + args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE &&
> - args->flags & DRM_XE_VM_CREATE_FAULT_MODE))
> + if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE &&
> + args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FAULT_MODE &&
> + if (XE_IOCTL_DBG(xe, args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE &&
> xe_device_in_non_fault_mode(xe)))
> return -EINVAL;
>
> - if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FAULT_MODE) &&
> + if (XE_IOCTL_DBG(xe, !(args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE) &&
> xe_device_in_fault_mode(xe)))
> return -EINVAL;
>
> if (XE_IOCTL_DBG(xe, args->extensions))
> return -EINVAL;
>
> - if (args->flags & DRM_XE_VM_CREATE_SCRATCH_PAGE)
> + if (args->flags & DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE)
> flags |= XE_VM_FLAG_SCRATCH_PAGE;
> - if (args->flags & DRM_XE_VM_CREATE_COMPUTE_MODE)
> + if (args->flags & DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE)
> flags |= XE_VM_FLAG_COMPUTE_MODE;
> - if (args->flags & DRM_XE_VM_CREATE_ASYNC_DEFAULT)
> + if (args->flags & DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT)
> flags |= XE_VM_FLAG_ASYNC_DEFAULT;
> - if (args->flags & DRM_XE_VM_CREATE_FAULT_MODE)
> + if (args->flags & DRM_XE_VM_CREATE_FLAG_FAULT_MODE)
> flags |= XE_VM_FLAG_FAULT_MODE;
>
> vm = xe_vm_create(xe, flags);
> diff --git a/drivers/gpu/drm/xe/xe_vm_doc.h b/drivers/gpu/drm/xe/xe_vm_doc.h
> index 516f4dc97223..bdc6659891a5 100644
> --- a/drivers/gpu/drm/xe/xe_vm_doc.h
> +++ b/drivers/gpu/drm/xe/xe_vm_doc.h
> @@ -18,7 +18,7 @@
> * Scratch page
> * ------------
> *
> - * If the VM is created with the flag, DRM_XE_VM_CREATE_SCRATCH_PAGE, set the
> + * If the VM is created with the flag, DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE, set the
> * entire page table structure defaults pointing to blank page allocated by the
> * VM. Invalid memory access rather than fault just read / write to this page.
> *
> diff --git a/drivers/gpu/drm/xe/xe_wait_user_fence.c b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> index 78686908f7fb..13562db6c07f 100644
> --- a/drivers/gpu/drm/xe/xe_wait_user_fence.c
> +++ b/drivers/gpu/drm/xe/xe_wait_user_fence.c
> @@ -79,8 +79,8 @@ static int check_hw_engines(struct xe_device *xe,
> return 0;
> }
>
> -#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_SOFT_OP | \
> - DRM_XE_UFENCE_WAIT_ABSTIME)
> +#define VALID_FLAGS (DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP | \
> + DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
> #define MAX_OP DRM_XE_UFENCE_WAIT_LTE
>
> static long to_jiffies_timeout(struct xe_device *xe,
> @@ -107,7 +107,7 @@ static long to_jiffies_timeout(struct xe_device *xe,
> * Save the timeout to an u64 variable because nsecs_to_jiffies
> * might return a value that overflows s32 variable.
> */
> - if (args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)
> + if (args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)
> t = drm_timeout_abs_to_jiffies(args->timeout);
> else
> t = nsecs_to_jiffies(args->timeout);
> @@ -137,7 +137,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> u64_to_user_ptr(args->instances);
> u64 addr = args->addr;
> int err;
> - bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_SOFT_OP;
> + bool no_engines = args->flags & DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP;
> long timeout;
> ktime_t start;
>
> @@ -206,7 +206,7 @@ int xe_wait_user_fence_ioctl(struct drm_device *dev, void *data,
> }
> remove_wait_queue(&xe->ufence_wq, &w_wait);
>
> - if (!(args->flags & DRM_XE_UFENCE_WAIT_ABSTIME)) {
> + if (!(args->flags & DRM_XE_UFENCE_WAIT_FLAG_ABSTIME)) {
> args->timeout -= ktime_to_ns(ktime_sub(ktime_get(), start));
> if (args->timeout < 0)
> args->timeout = 0;
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index 3ef49e3baaed..f6346a8351e4 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -585,10 +585,10 @@ struct drm_xe_vm_create {
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> -#define DRM_XE_VM_CREATE_SCRATCH_PAGE (0x1 << 0)
> -#define DRM_XE_VM_CREATE_COMPUTE_MODE (0x1 << 1)
> -#define DRM_XE_VM_CREATE_ASYNC_DEFAULT (0x1 << 2)
> -#define DRM_XE_VM_CREATE_FAULT_MODE (0x1 << 3)
> +#define DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE (0x1 << 0)
> +#define DRM_XE_VM_CREATE_FLAG_COMPUTE_MODE (0x1 << 1)
> +#define DRM_XE_VM_CREATE_FLAG_ASYNC_DEFAULT (0x1 << 2)
> +#define DRM_XE_VM_CREATE_FLAG_FAULT_MODE (0x1 << 3)
> /** @flags: Flags */
> __u32 flags;
>
> @@ -831,11 +831,11 @@ struct drm_xe_sync {
> /** @extensions: Pointer to the first extension struct, if any */
> __u64 extensions;
>
> -#define DRM_XE_SYNC_SYNCOBJ 0x0
> -#define DRM_XE_SYNC_TIMELINE_SYNCOBJ 0x1
> -#define DRM_XE_SYNC_DMA_BUF 0x2
> -#define DRM_XE_SYNC_USER_FENCE 0x3
> -#define DRM_XE_SYNC_SIGNAL 0x10
> +#define DRM_XE_SYNC_FLAG_SYNCOBJ 0x0
> +#define DRM_XE_SYNC_FLAG_TIMELINE_SYNCOBJ 0x1
> +#define DRM_XE_SYNC_FLAG_DMA_BUF 0x2
> +#define DRM_XE_SYNC_FLAG_USER_FENCE 0x3
> +#define DRM_XE_SYNC_FLAG_SIGNAL 0x10
> __u32 flags;
>
> /** @pad: MBZ */
> @@ -921,8 +921,8 @@ struct drm_xe_wait_user_fence {
> /** @op: wait operation (type of comparison) */
> __u16 op;
>
> -#define DRM_XE_UFENCE_WAIT_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
> -#define DRM_XE_UFENCE_WAIT_ABSTIME (1 << 1)
> +#define DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP (1 << 0) /* e.g. Wait on VM bind */
> +#define DRM_XE_UFENCE_WAIT_FLAG_ABSTIME (1 << 1)
> /** @flags: wait flags */
> __u16 flags;
>
> @@ -940,10 +940,10 @@ struct drm_xe_wait_user_fence {
> __u64 mask;
> /**
> * @timeout: how long to wait before bailing, value in nanoseconds.
> - * Without DRM_XE_UFENCE_WAIT_ABSTIME flag set (relative timeout)
> + * Without DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flag set (relative timeout)
> * it contains timeout expressed in nanoseconds to wait (fence will
> * expire at now() + timeout).
> - * When DRM_XE_UFENCE_WAIT_ABSTIME flat is set (absolute timeout) wait
> + * When DRM_XE_UFENCE_WAIT_FLAG_ABSTIME flat is set (absolute timeout) wait
> * will end at timeout (uses system MONOTONIC_CLOCK).
> * Passing negative timeout leads to neverending wait.
> *
> @@ -956,13 +956,13 @@ struct drm_xe_wait_user_fence {
>
> /**
> * @num_engines: number of engine instances to wait on, must be zero
> - * when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + * when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
> */
> __u64 num_engines;
>
> /**
> * @instances: user pointer to array of drm_xe_engine_class_instance to
> - * wait on, must be NULL when DRM_XE_UFENCE_WAIT_SOFT_OP set
> + * wait on, must be NULL when DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP set
> */
> __u64 instances;
>
^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Renaming (rev2)
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
` (9 preceding siblings ...)
2023-11-15 23:25 ` [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Renaming (rev2) Patchwork
@ 2023-11-17 21:32 ` Patchwork
10 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2023-11-17 21:32 UTC (permalink / raw)
To: Francois Dugast; +Cc: intel-xe
== Series Details ==
Series: uAPI Alignment - Renaming (rev2)
URL : https://patchwork.freedesktop.org/series/126399/
State : failure
== Summary ==
=== Applying kernel patches on branch 'drm-xe-next' with base: ===
Base commit: 3b8183b7e drm/xe/uapi: Be more specific about the vm_bind prefetch region
=== git am output follows ===
error: patch failed: drivers/gpu/drm/xe/xe_bo.c:209
error: drivers/gpu/drm/xe/xe_bo.c: patch does not apply
error: patch failed: drivers/gpu/drm/xe/xe_exec_queue.c:393
error: drivers/gpu/drm/xe/xe_exec_queue.c: patch does not apply
error: patch failed: drivers/gpu/drm/xe/xe_gt.c:556
error: drivers/gpu/drm/xe/xe_gt.c: patch does not apply
error: patch failed: drivers/gpu/drm/xe/xe_pmu.c:17
error: drivers/gpu/drm/xe/xe_pmu.c: patch does not apply
error: patch failed: drivers/gpu/drm/xe/xe_query.c:261
error: drivers/gpu/drm/xe/xe_query.c: patch does not apply
error: patch failed: drivers/gpu/drm/xe/xe_vm.c:2183
error: drivers/gpu/drm/xe/xe_vm.c: patch does not apply
error: patch failed: drivers/gpu/drm/xe/xe_vm_doc.h:32
error: drivers/gpu/drm/xe/xe_vm_doc.h: patch does not apply
error: patch failed: include/uapi/drm/xe_drm.h:19
error: include/uapi/drm/xe_drm.h: patch does not apply
hint: Use 'git am --show-current-patch' to see the failed patch
Applying: drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
Patch failed at 0001 drm/xe/uapi: Add missing DRM_ prefix in uAPI constants
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2023-11-17 21:32 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-11-14 13:34 [Intel-xe] [PATCH v1 0/8] uAPI Alignment - Renaming Francois Dugast
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 1/8] drm/xe/uapi: Add missing DRM_ prefix in uAPI constants Francois Dugast
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 2/8] drm/xe/uapi: Add _FLAG to uAPI constants usable for flags Francois Dugast
2023-11-14 13:45 ` Rodrigo Vivi
2023-11-16 15:37 ` Souza, Jose
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 3/8] drm/xe/uapi: Change rsvd to pad in struct drm_xe_class_instance Francois Dugast
2023-11-14 13:44 ` Rodrigo Vivi
2023-11-16 15:30 ` Souza, Jose
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 4/8] drm/xe/uapi: Rename *_mem_regions masks Francois Dugast
2023-11-15 18:53 ` Matt Roper
2023-11-16 15:34 ` Souza, Jose
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 5/8] drm/xe/uapi: Rename query's mem_usage to mem_regions Francois Dugast
2023-11-15 18:54 ` Matt Roper
2023-11-16 15:34 ` Souza, Jose
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 6/8] drm/xe/uapi: Standardize the FLAG naming and assignment Francois Dugast
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 7/8] drm/xe/uapi: Differentiate WAIT_OP from WAIT_MASK Francois Dugast
2023-11-15 19:03 ` Matt Roper
2023-11-14 13:34 ` [Intel-xe] [PATCH v1 8/8] drm/xe/uapi: Be more specific about the vm_bind prefetch region Francois Dugast
2023-11-15 19:04 ` Matt Roper
2023-11-14 16:28 ` [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Renaming Patchwork
2023-11-15 23:25 ` [Intel-xe] ✗ CI.Patch_applied: failure for uAPI Alignment - Renaming (rev2) Patchwork
2023-11-17 21:32 ` Patchwork
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