From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
ankit.k.nautiyal@intel.com, matthew.d.roper@intel.com
Subject: Re: [PATCH 1/5] drm/i915/display: Fix the plane max height and width limits
Date: Fri, 25 Oct 2024 09:21:07 +0300 [thread overview]
Message-ID: <Zxs40xP4Bo33fqe8@intel.com> (raw)
In-Reply-To: <20241025060136.9884-2-suraj.kandpal@intel.com>
On Fri, Oct 25, 2024 at 11:31:32AM +0530, Suraj Kandpal wrote:
> Fix the plane max height and width limits taking into account the
> joined pipe limits too.
>
> Bspec: 28692, 49199, 68858
> Fixes: 63dc014e37b9 ("drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.")
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 19 ++++++++++++++++---
> 1 file changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ef1436146325..fc578af4f394 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8450,9 +8450,22 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
> * plane so let's not advertize modes that are
> * too big for that.
> */
> - if (DISPLAY_VER(dev_priv) >= 11) {
> - plane_width_max = 5120 * num_joined_pipes;
> - plane_height_max = 4320;
> + if (DISPLAY_VER(dev_priv) >= 20) {
> + if (num_joined_pipes > 1) {
> + plane_width_max = 8192;
> + plane_height_max = 4800;
> + } else {
> + plane_width_max = 5120;
> + plane_height_max = 4096;
The joiner operates on horizontal lines. Why would the
vertical resolution change here?
And this is breaking ultrajoiner now.
Frankly I have a hard time believing that there are any extra
limits on plane size imposed by the hardware for joined pipes.
If there is some kind of maximum width limit then it must be
coming from the joiner itself (eg. max line buffer width) and
not from the planes. So I think this is the wrong place to
handle that.
> + }
> + } else if (DISPLAY_VER(dev_priv) >= 11) {
> + if (num_joined_pipes > 1) {
> + plane_width_max = 7680;
> + plane_height_max = 4320;
> + } else {
> + plane_width_max = 5120;
> + plane_height_max = 4096;
> + }
> } else {
> plane_width_max = 5120;
> plane_height_max = 4096;
> --
> 2.34.1
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2024-10-25 6:21 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-25 6:01 [PATCH 0/5] Add 6k resolution support for a single CRTC Suraj Kandpal
2024-10-25 6:01 ` [PATCH 1/5] drm/i915/display: Fix the plane max height and width limits Suraj Kandpal
2024-10-25 6:21 ` Ville Syrjälä [this message]
2024-10-25 6:26 ` Kandpal, Suraj
2024-10-25 7:15 ` Ville Syrjälä
2024-10-25 7:24 ` Nautiyal, Ankit K
2024-10-25 8:04 ` Ville Syrjälä
2024-10-28 4:13 ` Kandpal, Suraj
2024-10-25 6:01 ` [PATCH 2/5] drm/i915/xe3lpd: Increase resolution for plane to support 6k Suraj Kandpal
2024-10-25 6:01 ` [PATCH 3/5] drm/i915/psr: Increase psr size limits for Xe2 Suraj Kandpal
2024-10-25 22:01 ` Matt Roper
2024-10-28 3:51 ` Kandpal, Suraj
2024-10-28 7:22 ` Hogander, Jouni
2024-10-28 5:00 ` Kandpal, Suraj
2024-10-25 6:01 ` [PATCH 4/5] drm/i915/xe3lpd: Increase max_h max_v for PSR Suraj Kandpal
2024-10-25 6:01 ` [PATCH 5/5] drm/i914/xe3lpd: Increase bigjoiner limitations Suraj Kandpal
2024-10-25 6:07 ` ✓ CI.Patch_applied: success for Add 6k resolution support for a single CRTC (rev3) Patchwork
2024-10-25 6:08 ` ✓ CI.checkpatch: " Patchwork
2024-10-25 6:09 ` ✓ CI.KUnit: " Patchwork
2024-10-25 6:20 ` ✓ CI.Build: " Patchwork
2024-10-25 6:23 ` ✓ CI.Hooks: " Patchwork
2024-10-25 6:24 ` ✗ CI.checksparse: warning " Patchwork
2024-10-25 6:46 ` ✓ CI.BAT: success " Patchwork
2024-10-26 16:11 ` ✗ CI.FULL: failure " Patchwork
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