* [PATCH v4 1/3] drm/i915/display: Use a sub-struct for fbc operations in intel_display
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
@ 2025-11-27 11:53 ` Vinod Govindapillai
2025-11-27 11:53 ` [PATCH v4 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC Vinod Govindapillai
` (11 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Vinod Govindapillai @ 2025-11-27 11:53 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: vinod.govindapillai, matthew.d.roper, gustavo.sousa,
ville.syrjala, jani.nikula
As FBC can utilize the system cache in xe3p_lpd onwards, we need
a provision to track which fbc instance is utilizing this cache.
A sub-struct at intel_display level to group all the fbc ops will
make fbc handling much easier. Introduce a fbc sub-struct and move
the fbc instance array into that.
v2: changes in commit message
Suggested-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_core.h | 5 ++++-
drivers/gpu/drm/i915/display/intel_fbc.c | 6 +++---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 +-
4 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 51ccc6bd5f21..2c40bc632b3d 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -134,7 +134,7 @@ static struct intel_fbc *i9xx_plane_fbc(struct intel_display *display,
enum i9xx_plane_id i9xx_plane)
{
if (i9xx_plane_has_fbc(display, i9xx_plane))
- return display->fbc[INTEL_FBC_A];
+ return display->fbc.instances[INTEL_FBC_A];
else
return NULL;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 9b36654b593d..58325f530670 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -398,6 +398,10 @@ struct intel_display {
const struct dram_info *info;
} dram;
+ struct {
+ struct intel_fbc *instances[I915_MAX_FBCS];
+ } fbc;
+
struct {
/* list of fbdev register on this device */
struct intel_fbdev *fbdev;
@@ -615,7 +619,6 @@ struct intel_display {
struct drm_dp_tunnel_mgr *dp_tunnel_mgr;
struct intel_audio audio;
struct intel_dpll_global dpll;
- struct intel_fbc *fbc[I915_MAX_FBCS];
struct intel_frontbuffer_tracking fb_tracking;
struct intel_hotplug hotplug;
struct intel_opregion *opregion;
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index d9cab25d414a..dcdfcff80de3 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -69,7 +69,7 @@
#define for_each_intel_fbc(__display, __fbc, __fbc_id) \
for_each_fbc_id((__display), (__fbc_id)) \
- for_each_if((__fbc) = (__display)->fbc[(__fbc_id)])
+ for_each_if((__fbc) = (__display)->fbc.instances[(__fbc_id)])
struct intel_fbc_funcs {
void (*activate)(struct intel_fbc *fbc);
@@ -2211,7 +2211,7 @@ void intel_fbc_init(struct intel_display *display)
display->params.enable_fbc);
for_each_fbc_id(display, fbc_id)
- display->fbc[fbc_id] = intel_fbc_create(display, fbc_id);
+ display->fbc.instances[fbc_id] = intel_fbc_create(display, fbc_id);
}
/**
@@ -2330,7 +2330,7 @@ void intel_fbc_debugfs_register(struct intel_display *display)
{
struct intel_fbc *fbc;
- fbc = display->fbc[INTEL_FBC_A];
+ fbc = display->fbc.instances[INTEL_FBC_A];
if (fbc)
intel_fbc_debugfs_add(fbc, display->drm->debugfs_root);
}
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 89c8003ccfe7..48af74963e74 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2444,7 +2444,7 @@ static struct intel_fbc *skl_plane_fbc(struct intel_display *display,
enum intel_fbc_id fbc_id = skl_fbc_id_for_pipe(pipe);
if (skl_plane_has_fbc(display, fbc_id, plane_id))
- return display->fbc[fbc_id];
+ return display->fbc.instances[fbc_id];
else
return NULL;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v4 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
2025-11-27 11:53 ` [PATCH v4 1/3] drm/i915/display: Use a sub-struct for fbc operations in intel_display Vinod Govindapillai
@ 2025-11-27 11:53 ` Vinod Govindapillai
2025-11-27 13:29 ` Govindapillai, Vinod
2025-11-28 11:35 ` [PATCH v5 " Vinod Govindapillai
2025-11-27 11:53 ` [PATCH v4 3/3] drm/i915/fbc: Apply Wa_14025769978 Vinod Govindapillai
` (10 subsequent siblings)
12 siblings, 2 replies; 21+ messages in thread
From: Vinod Govindapillai @ 2025-11-27 11:53 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: vinod.govindapillai, matthew.d.roper, gustavo.sousa,
ville.syrjala, jani.nikula
One of the FBC instances can utilize the reserved area of SoC
level cache for the fbc transactions to benefit reduced memory
system power especially in idle scenarios. Reserved area of the
system cache can be assigned to an fbc instance by configuring
the cacheability configuration register with offset of the
compressed frame buffer in stolen memoty of that fbc. There is
a limit to this reserved area which is programmable and for
xe3p_lpd the limit is defined as 2MB.
v2: - better to track fbc sys cache usage from intel_display level,
sanitize the cacheability config register on probe (Matt)
- limit this for integrated graphics solutions, confirmed that
no default value set for cache range by hw (Gustavo)
v3: - changes related to the use of fbc substruct in intel_display
- use intel_de_write() instead of intel_rmw() by hardcoding the
default value fields
v4: - protect sys cache config accesses, sys cache usage status in
debugfs per fbc instance (Jani)
Bspec: 68881, 74722
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
.../gpu/drm/i915/display/intel_display_core.h | 6 ++
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_fbc.c | 86 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_fbc_regs.h | 10 +++
4 files changed, 103 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 58325f530670..3e4bde7fa205 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -400,6 +400,12 @@ struct intel_display {
struct {
struct intel_fbc *instances[I915_MAX_FBCS];
+
+ /* xe3p_lpd+: FBC instance utilizing the system cache */
+ struct sys_cache_cfg {
+ struct mutex lock;
+ enum intel_fbc_id id;
+ } sys_cache;
} fbc;
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index b559ef43d547..b74cb69ccc85 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -173,6 +173,7 @@ struct intel_display_platforms {
#define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))
#define HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
#define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >= 30)
+#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >= 35 && !(__display)->platform.dgfx)
#define HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)->has_fpga_dbg)
#define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >= 3)
#define HAS_GMBUS_BURST_READ(__display) (DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index dcdfcff80de3..85978196b607 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -71,6 +71,8 @@
for_each_fbc_id((__display), (__fbc_id)) \
for_each_if((__fbc) = (__display)->fbc.instances[(__fbc_id)])
+#define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
+
struct intel_fbc_funcs {
void (*activate)(struct intel_fbc *fbc);
void (*deactivate)(struct intel_fbc *fbc);
@@ -941,6 +943,69 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
fbc_compressor_clkgate_disable_wa(fbc, true);
}
+static void fbc_sys_cache_update_config(struct intel_display *display, u32 reg,
+ enum intel_fbc_id id)
+{
+ if (!HAS_FBC_SYS_CACHE(display))
+ return;
+
+ lockdep_assert_held(&display->fbc.sys_cache.lock);
+
+ /* Cache read enable is set by default */
+ reg |= FBC_SYS_CACHE_READ_ENABLE;
+
+ intel_de_write(display, XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG, reg);
+
+ display->fbc.sys_cache.id = id;
+}
+
+static void fbc_sys_cache_disable(const struct intel_fbc *fbc)
+{
+ struct intel_display *display = fbc->display;
+ struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
+
+ mutex_lock(&sys_cache->lock);
+ /* clear only if "fbc" reserved the cache */
+ if (sys_cache->id == fbc->id)
+ fbc_sys_cache_update_config(display, 0, FBC_SYS_CACHE_ID_NONE);
+ mutex_unlock(&sys_cache->lock);
+}
+
+static int fbc_sys_cache_limit(struct intel_display *display)
+{
+ /* Default 2MB for xe3p_lpd */
+ if (DISPLAY_VER(display) == 35)
+ return 2 * 1024 * 1024;
+
+ return 0;
+}
+
+static void fbc_sys_cache_enable(const struct intel_fbc *fbc)
+{
+ struct intel_display *display = fbc->display;
+ struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
+ int range, offset;
+ u32 cfg;
+
+ if (!HAS_FBC_SYS_CACHE(display))
+ return;
+
+ /* limit to be configured to the register in 64k byte chunks */
+ range = fbc_sys_cache_limit(display) / (64 * 1024);
+
+ /* offset to be configured to the register in 4K byte chunks */
+ offset = i915_gem_stolen_node_offset(fbc->compressed_fb) / (4 * 1024);
+
+ cfg = FBC_SYS_CACHE_TAG_USE_RES_SPACE | FBC_SYS_CACHEABLE_RANGE(range) |
+ FBC_SYS_CACHE_START_BASE(offset);
+
+ mutex_lock(&sys_cache->lock);
+ /* update sys cache config only if sys cache is unassigned */
+ if (sys_cache->id == FBC_SYS_CACHE_ID_NONE)
+ fbc_sys_cache_update_config(display, cfg, fbc->id);
+ mutex_unlock(&sys_cache->lock);
+}
+
static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
{
if (WARN_ON(intel_fbc_hw_is_active(fbc)))
@@ -967,6 +1032,11 @@ void intel_fbc_cleanup(struct intel_display *display)
kfree(fbc);
}
+
+ mutex_lock(&display->fbc.sys_cache.lock);
+ drm_WARN_ON(display->drm,
+ display->fbc.sys_cache.id != FBC_SYS_CACHE_ID_NONE);
+ mutex_unlock(&display->fbc.sys_cache.lock);
}
static bool i8xx_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
@@ -1780,6 +1850,8 @@ static void __intel_fbc_disable(struct intel_fbc *fbc)
__intel_fbc_cleanup_cfb(fbc);
+ fbc_sys_cache_disable(fbc);
+
/* wa_18038517565 Enable DPFC clock gating after FBC disable */
if (display->platform.dg2 || DISPLAY_VER(display) >= 14)
fbc_compressor_clkgate_disable_wa(fbc, false);
@@ -1972,6 +2044,8 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
intel_fbc_program_workarounds(fbc);
intel_fbc_program_cfb(fbc);
+
+ fbc_sys_cache_enable(fbc);
}
/**
@@ -2212,6 +2286,10 @@ void intel_fbc_init(struct intel_display *display)
for_each_fbc_id(display, fbc_id)
display->fbc.instances[fbc_id] = intel_fbc_create(display, fbc_id);
+
+ mutex_lock(&display->fbc.sys_cache.lock);
+ display->fbc.sys_cache.id = FBC_SYS_CACHE_ID_NONE;
+ mutex_unlock(&display->fbc.sys_cache.lock);
}
/**
@@ -2231,6 +2309,9 @@ void intel_fbc_sanitize(struct intel_display *display)
if (intel_fbc_hw_is_active(fbc))
intel_fbc_hw_deactivate(fbc);
}
+
+ /* Ensure the sys cache usage config is clear as well */
+ fbc_sys_cache_update_config(display, 0, FBC_SYS_CACHE_ID_NONE);
}
static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
@@ -2249,6 +2330,11 @@ static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
seq_puts(m, "FBC enabled\n");
seq_printf(m, "Compressing: %s\n",
str_yes_no(intel_fbc_is_compressing(fbc)));
+
+ mutex_lock(&display->fbc.sys_cache.lock);
+ seq_printf(m, "Using system cache: %s\n",
+ str_yes_no(display->fbc.sys_cache.id == fbc->id));
+ mutex_unlock(&display->fbc.sys_cache.lock);
} else {
seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
}
diff --git a/drivers/gpu/drm/i915/display/intel_fbc_regs.h b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
index b1d0161a3196..d2d889fa4bed 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
@@ -126,4 +126,14 @@
#define FBC_REND_NUKE REG_BIT(2)
#define FBC_REND_CACHE_CLEAN REG_BIT(1)
+#define XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG _MMIO(0x1344E0)
+#define FBC_SYS_CACHE_START_BASE_MASK REG_GENMASK(31, 16)
+#define FBC_SYS_CACHE_START_BASE(base) REG_FIELD_PREP(FBC_SYS_CACHE_START_BASE_MASK, (base))
+#define FBC_SYS_CACHEABLE_RANGE_MASK REG_GENMASK(15, 4)
+#define FBC_SYS_CACHEABLE_RANGE(range) REG_FIELD_PREP(FBC_SYS_CACHEABLE_RANGE_MASK, (range))
+#define FBC_SYS_CACHE_TAG_MASK REG_GENMASK(3, 2)
+#define FBC_SYS_CACHE_TAG_DONT_CACHE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK, 0)
+#define FBC_SYS_CACHE_TAG_USE_RES_SPACE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK, 3)
+#define FBC_SYS_CACHE_READ_ENABLE REG_BIT(0)
+
#endif /* __INTEL_FBC_REGS__ */
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v4 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC
2025-11-27 11:53 ` [PATCH v4 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC Vinod Govindapillai
@ 2025-11-27 13:29 ` Govindapillai, Vinod
2025-11-27 13:49 ` Jani Nikula
2025-11-28 11:35 ` [PATCH v5 " Vinod Govindapillai
1 sibling, 1 reply; 21+ messages in thread
From: Govindapillai, Vinod @ 2025-11-27 13:29 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Sousa, Gustavo, Nikula, Jani, Roper, Matthew D, Syrjala, Ville
Hi,
Ah.. :( Looks like I forgot to git add
drivers/gpu/drm/i915/display/intel_display_driver.c while commit this
patch. This patch now miss the mutex init part.
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 7e000ba3e08b..4f82b267b086 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -184,6 +184,7 @@ void intel_display_driver_early_probe(struct
intel_display *display)
mutex_init(&display->wm.wm_mutex);
mutex_init(&display->pps.mutex);
mutex_init(&display->hdcp.hdcp_mutex);
+ mutex_init(&display->fbc.sys_cache.lock);
intel_display_irq_init(display);
intel_dkl_phy_init(display);
Will wait for comments before I update this commit with the above
change. Sorry about that.
BR
Vinod
On Thu, 2025-11-27 at 13:53 +0200, Vinod Govindapillai wrote:
> One of the FBC instances can utilize the reserved area of SoC
> level cache for the fbc transactions to benefit reduced memory
> system power especially in idle scenarios. Reserved area of the
> system cache can be assigned to an fbc instance by configuring
> the cacheability configuration register with offset of the
> compressed frame buffer in stolen memoty of that fbc. There is
> a limit to this reserved area which is programmable and for
> xe3p_lpd the limit is defined as 2MB.
>
> v2: - better to track fbc sys cache usage from intel_display level,
> sanitize the cacheability config register on probe (Matt)
> - limit this for integrated graphics solutions, confirmed that
> no default value set for cache range by hw (Gustavo)
>
> v3: - changes related to the use of fbc substruct in intel_display
> - use intel_de_write() instead of intel_rmw() by hardcoding the
> default value fields
>
> v4: - protect sys cache config accesses, sys cache usage status in
> debugfs per fbc instance (Jani)
>
> Bspec: 68881, 74722
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> ---
> .../gpu/drm/i915/display/intel_display_core.h | 6 ++
> .../drm/i915/display/intel_display_device.h | 1 +
> drivers/gpu/drm/i915/display/intel_fbc.c | 86
> +++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_fbc_regs.h | 10 +++
> 4 files changed, 103 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 58325f530670..3e4bde7fa205 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -400,6 +400,12 @@ struct intel_display {
>
> struct {
> struct intel_fbc *instances[I915_MAX_FBCS];
> +
> + /* xe3p_lpd+: FBC instance utilizing the system
> cache */
> + struct sys_cache_cfg {
> + struct mutex lock;
> + enum intel_fbc_id id;
> + } sys_cache;
> } fbc;
>
> struct {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index b559ef43d547..b74cb69ccc85 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -173,6 +173,7 @@ struct intel_display_platforms {
> #define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >=
> 12 && HAS_DSC(__display))
> #define
> HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
> #define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >=
> 30)
> +#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >=
> 35 && !(__display)->platform.dgfx)
> #define
> HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)->has_fpga_dbg)
> #define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >=
> 3)
> #define
> HAS_GMBUS_BURST_READ(__display) (DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index dcdfcff80de3..85978196b607 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -71,6 +71,8 @@
> for_each_fbc_id((__display), (__fbc_id)) \
> for_each_if((__fbc) = (__display)-
> >fbc.instances[(__fbc_id)])
>
> +#define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
> +
> struct intel_fbc_funcs {
> void (*activate)(struct intel_fbc *fbc);
> void (*deactivate)(struct intel_fbc *fbc);
> @@ -941,6 +943,69 @@ static void intel_fbc_program_workarounds(struct
> intel_fbc *fbc)
> fbc_compressor_clkgate_disable_wa(fbc, true);
> }
>
> +static void fbc_sys_cache_update_config(struct intel_display
> *display, u32 reg,
> + enum intel_fbc_id id)
> +{
> + if (!HAS_FBC_SYS_CACHE(display))
> + return;
> +
> + lockdep_assert_held(&display->fbc.sys_cache.lock);
> +
> + /* Cache read enable is set by default */
> + reg |= FBC_SYS_CACHE_READ_ENABLE;
> +
> + intel_de_write(display, XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG,
> reg);
> +
> + display->fbc.sys_cache.id = id;
> +}
> +
> +static void fbc_sys_cache_disable(const struct intel_fbc *fbc)
> +{
> + struct intel_display *display = fbc->display;
> + struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
> +
> + mutex_lock(&sys_cache->lock);
> + /* clear only if "fbc" reserved the cache */
> + if (sys_cache->id == fbc->id)
> + fbc_sys_cache_update_config(display, 0,
> FBC_SYS_CACHE_ID_NONE);
> + mutex_unlock(&sys_cache->lock);
> +}
> +
> +static int fbc_sys_cache_limit(struct intel_display *display)
> +{
> + /* Default 2MB for xe3p_lpd */
> + if (DISPLAY_VER(display) == 35)
> + return 2 * 1024 * 1024;
> +
> + return 0;
> +}
> +
> +static void fbc_sys_cache_enable(const struct intel_fbc *fbc)
> +{
> + struct intel_display *display = fbc->display;
> + struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
> + int range, offset;
> + u32 cfg;
> +
> + if (!HAS_FBC_SYS_CACHE(display))
> + return;
> +
> + /* limit to be configured to the register in 64k byte chunks
> */
> + range = fbc_sys_cache_limit(display) / (64 * 1024);
> +
> + /* offset to be configured to the register in 4K byte chunks
> */
> + offset = i915_gem_stolen_node_offset(fbc->compressed_fb) /
> (4 * 1024);
> +
> + cfg = FBC_SYS_CACHE_TAG_USE_RES_SPACE |
> FBC_SYS_CACHEABLE_RANGE(range) |
> + FBC_SYS_CACHE_START_BASE(offset);
> +
> + mutex_lock(&sys_cache->lock);
> + /* update sys cache config only if sys cache is unassigned
> */
> + if (sys_cache->id == FBC_SYS_CACHE_ID_NONE)
> + fbc_sys_cache_update_config(display, cfg, fbc->id);
> + mutex_unlock(&sys_cache->lock);
> +}
> +
> static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
> {
> if (WARN_ON(intel_fbc_hw_is_active(fbc)))
> @@ -967,6 +1032,11 @@ void intel_fbc_cleanup(struct intel_display
> *display)
>
> kfree(fbc);
> }
> +
> + mutex_lock(&display->fbc.sys_cache.lock);
> + drm_WARN_ON(display->drm,
> + display->fbc.sys_cache.id !=
> FBC_SYS_CACHE_ID_NONE);
> + mutex_unlock(&display->fbc.sys_cache.lock);
> }
>
> static bool i8xx_fbc_stride_is_valid(const struct intel_plane_state
> *plane_state)
> @@ -1780,6 +1850,8 @@ static void __intel_fbc_disable(struct
> intel_fbc *fbc)
>
> __intel_fbc_cleanup_cfb(fbc);
>
> + fbc_sys_cache_disable(fbc);
> +
> /* wa_18038517565 Enable DPFC clock gating after FBC disable
> */
> if (display->platform.dg2 || DISPLAY_VER(display) >= 14)
> fbc_compressor_clkgate_disable_wa(fbc, false);
> @@ -1972,6 +2044,8 @@ static void __intel_fbc_enable(struct
> intel_atomic_state *state,
>
> intel_fbc_program_workarounds(fbc);
> intel_fbc_program_cfb(fbc);
> +
> + fbc_sys_cache_enable(fbc);
> }
>
> /**
> @@ -2212,6 +2286,10 @@ void intel_fbc_init(struct intel_display
> *display)
>
> for_each_fbc_id(display, fbc_id)
> display->fbc.instances[fbc_id] =
> intel_fbc_create(display, fbc_id);
> +
> + mutex_lock(&display->fbc.sys_cache.lock);
> + display->fbc.sys_cache.id = FBC_SYS_CACHE_ID_NONE;
> + mutex_unlock(&display->fbc.sys_cache.lock);
> }
>
> /**
> @@ -2231,6 +2309,9 @@ void intel_fbc_sanitize(struct intel_display
> *display)
> if (intel_fbc_hw_is_active(fbc))
> intel_fbc_hw_deactivate(fbc);
> }
> +
> + /* Ensure the sys cache usage config is clear as well */
> + fbc_sys_cache_update_config(display, 0,
> FBC_SYS_CACHE_ID_NONE);
> }
>
> static int intel_fbc_debugfs_status_show(struct seq_file *m, void
> *unused)
> @@ -2249,6 +2330,11 @@ static int
> intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
> seq_puts(m, "FBC enabled\n");
> seq_printf(m, "Compressing: %s\n",
>
> str_yes_no(intel_fbc_is_compressing(fbc)));
> +
> + mutex_lock(&display->fbc.sys_cache.lock);
> + seq_printf(m, "Using system cache: %s\n",
> + str_yes_no(display->fbc.sys_cache.id ==
> fbc->id));
> + mutex_unlock(&display->fbc.sys_cache.lock);
> } else {
> seq_printf(m, "FBC disabled: %s\n", fbc-
> >no_fbc_reason);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> index b1d0161a3196..d2d889fa4bed 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> @@ -126,4 +126,14 @@
> #define FBC_REND_NUKE REG_BIT(2)
> #define FBC_REND_CACHE_CLEAN REG_BIT(1)
>
> +#define XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG _MMIO(0x1344E0)
> +#define
> FBC_SYS_CACHE_START_BASE_MASK REG_GENMASK(31, 16)
> +#define
> FBC_SYS_CACHE_START_BASE(base) REG_FIELD_PREP(FBC_SYS_CACHE_START_BASE_MASK,(base))
> +#define FBC_SYS_CACHEABLE_RANGE_MASK REG_GENMASK(15, 4)
> +#define
> FBC_SYS_CACHEABLE_RANGE(range) REG_FIELD_PREP(FBC_SYS_CACHEABLE_RANGE_MASK,(range))
> +#define FBC_SYS_CACHE_TAG_MASK REG_GENMASK(3, 2)
> +#define
> FBC_SYS_CACHE_TAG_DONT_CACHE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK, 0)
> +#define
> FBC_SYS_CACHE_TAG_USE_RES_SPACE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK,3)
> +#define FBC_SYS_CACHE_READ_ENABLE REG_BIT(0)
> +
> #endif /* __INTEL_FBC_REGS__ */
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v4 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC
2025-11-27 13:29 ` Govindapillai, Vinod
@ 2025-11-27 13:49 ` Jani Nikula
2025-11-27 14:09 ` Govindapillai, Vinod
0 siblings, 1 reply; 21+ messages in thread
From: Jani Nikula @ 2025-11-27 13:49 UTC (permalink / raw)
To: Govindapillai, Vinod, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Sousa, Gustavo, Roper, Matthew D, Syrjala, Ville
On Thu, 27 Nov 2025, "Govindapillai, Vinod" <vinod.govindapillai@intel.com> wrote:
> Hi,
>
> Ah.. :( Looks like I forgot to git add
> drivers/gpu/drm/i915/display/intel_display_driver.c while commit this
> patch. This patch now miss the mutex init part.
IMO the mutex init should be in intel_fbc_init() anyway.
BR,
Jani.
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
> b/drivers/gpu/drm/i915/display/intel_display_driver.c
> index 7e000ba3e08b..4f82b267b086 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_driver.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
> @@ -184,6 +184,7 @@ void intel_display_driver_early_probe(struct
> intel_display *display)
> mutex_init(&display->wm.wm_mutex);
> mutex_init(&display->pps.mutex);
> mutex_init(&display->hdcp.hdcp_mutex);
> + mutex_init(&display->fbc.sys_cache.lock);
>
> intel_display_irq_init(display);
> intel_dkl_phy_init(display);
>
> Will wait for comments before I update this commit with the above
> change. Sorry about that.
>
> BR
> Vinod
>
>
>
> On Thu, 2025-11-27 at 13:53 +0200, Vinod Govindapillai wrote:
>> One of the FBC instances can utilize the reserved area of SoC
>> level cache for the fbc transactions to benefit reduced memory
>> system power especially in idle scenarios. Reserved area of the
>> system cache can be assigned to an fbc instance by configuring
>> the cacheability configuration register with offset of the
>> compressed frame buffer in stolen memoty of that fbc. There is
>> a limit to this reserved area which is programmable and for
>> xe3p_lpd the limit is defined as 2MB.
>>
>> v2: - better to track fbc sys cache usage from intel_display level,
>> sanitize the cacheability config register on probe (Matt)
>> - limit this for integrated graphics solutions, confirmed that
>> no default value set for cache range by hw (Gustavo)
>>
>> v3: - changes related to the use of fbc substruct in intel_display
>> - use intel_de_write() instead of intel_rmw() by hardcoding the
>> default value fields
>>
>> v4: - protect sys cache config accesses, sys cache usage status in
>> debugfs per fbc instance (Jani)
>>
>> Bspec: 68881, 74722
>> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
>> ---
>> .../gpu/drm/i915/display/intel_display_core.h | 6 ++
>> .../drm/i915/display/intel_display_device.h | 1 +
>> drivers/gpu/drm/i915/display/intel_fbc.c | 86
>> +++++++++++++++++++
>> drivers/gpu/drm/i915/display/intel_fbc_regs.h | 10 +++
>> 4 files changed, 103 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
>> b/drivers/gpu/drm/i915/display/intel_display_core.h
>> index 58325f530670..3e4bde7fa205 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
>> @@ -400,6 +400,12 @@ struct intel_display {
>>
>> struct {
>> struct intel_fbc *instances[I915_MAX_FBCS];
>> +
>> + /* xe3p_lpd+: FBC instance utilizing the system
>> cache */
>> + struct sys_cache_cfg {
>> + struct mutex lock;
>> + enum intel_fbc_id id;
>> + } sys_cache;
>> } fbc;
>>
>> struct {
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
>> b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index b559ef43d547..b74cb69ccc85 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -173,6 +173,7 @@ struct intel_display_platforms {
>> #define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >=
>> 12 && HAS_DSC(__display))
>> #define
>> HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
>> #define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >=
>> 30)
>> +#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >=
>> 35 && !(__display)->platform.dgfx)
>> #define
>> HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)->has_fpga_dbg)
>> #define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >=
>> 3)
>> #define
>> HAS_GMBUS_BURST_READ(__display) (DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
>> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
>> b/drivers/gpu/drm/i915/display/intel_fbc.c
>> index dcdfcff80de3..85978196b607 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
>> @@ -71,6 +71,8 @@
>> for_each_fbc_id((__display), (__fbc_id)) \
>> for_each_if((__fbc) = (__display)-
>> >fbc.instances[(__fbc_id)])
>>
>> +#define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
>> +
>> struct intel_fbc_funcs {
>> void (*activate)(struct intel_fbc *fbc);
>> void (*deactivate)(struct intel_fbc *fbc);
>> @@ -941,6 +943,69 @@ static void intel_fbc_program_workarounds(struct
>> intel_fbc *fbc)
>> fbc_compressor_clkgate_disable_wa(fbc, true);
>> }
>>
>> +static void fbc_sys_cache_update_config(struct intel_display
>> *display, u32 reg,
>> + enum intel_fbc_id id)
>> +{
>> + if (!HAS_FBC_SYS_CACHE(display))
>> + return;
>> +
>> + lockdep_assert_held(&display->fbc.sys_cache.lock);
>> +
>> + /* Cache read enable is set by default */
>> + reg |= FBC_SYS_CACHE_READ_ENABLE;
>> +
>> + intel_de_write(display, XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG,
>> reg);
>> +
>> + display->fbc.sys_cache.id = id;
>> +}
>> +
>> +static void fbc_sys_cache_disable(const struct intel_fbc *fbc)
>> +{
>> + struct intel_display *display = fbc->display;
>> + struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
>> +
>> + mutex_lock(&sys_cache->lock);
>> + /* clear only if "fbc" reserved the cache */
>> + if (sys_cache->id == fbc->id)
>> + fbc_sys_cache_update_config(display, 0,
>> FBC_SYS_CACHE_ID_NONE);
>> + mutex_unlock(&sys_cache->lock);
>> +}
>> +
>> +static int fbc_sys_cache_limit(struct intel_display *display)
>> +{
>> + /* Default 2MB for xe3p_lpd */
>> + if (DISPLAY_VER(display) == 35)
>> + return 2 * 1024 * 1024;
>> +
>> + return 0;
>> +}
>> +
>> +static void fbc_sys_cache_enable(const struct intel_fbc *fbc)
>> +{
>> + struct intel_display *display = fbc->display;
>> + struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
>> + int range, offset;
>> + u32 cfg;
>> +
>> + if (!HAS_FBC_SYS_CACHE(display))
>> + return;
>> +
>> + /* limit to be configured to the register in 64k byte chunks
>> */
>> + range = fbc_sys_cache_limit(display) / (64 * 1024);
>> +
>> + /* offset to be configured to the register in 4K byte chunks
>> */
>> + offset = i915_gem_stolen_node_offset(fbc->compressed_fb) /
>> (4 * 1024);
>> +
>> + cfg = FBC_SYS_CACHE_TAG_USE_RES_SPACE |
>> FBC_SYS_CACHEABLE_RANGE(range) |
>> + FBC_SYS_CACHE_START_BASE(offset);
>> +
>> + mutex_lock(&sys_cache->lock);
>> + /* update sys cache config only if sys cache is unassigned
>> */
>> + if (sys_cache->id == FBC_SYS_CACHE_ID_NONE)
>> + fbc_sys_cache_update_config(display, cfg, fbc->id);
>> + mutex_unlock(&sys_cache->lock);
>> +}
>> +
>> static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
>> {
>> if (WARN_ON(intel_fbc_hw_is_active(fbc)))
>> @@ -967,6 +1032,11 @@ void intel_fbc_cleanup(struct intel_display
>> *display)
>>
>> kfree(fbc);
>> }
>> +
>> + mutex_lock(&display->fbc.sys_cache.lock);
>> + drm_WARN_ON(display->drm,
>> + display->fbc.sys_cache.id !=
>> FBC_SYS_CACHE_ID_NONE);
>> + mutex_unlock(&display->fbc.sys_cache.lock);
>> }
>>
>> static bool i8xx_fbc_stride_is_valid(const struct intel_plane_state
>> *plane_state)
>> @@ -1780,6 +1850,8 @@ static void __intel_fbc_disable(struct
>> intel_fbc *fbc)
>>
>> __intel_fbc_cleanup_cfb(fbc);
>>
>> + fbc_sys_cache_disable(fbc);
>> +
>> /* wa_18038517565 Enable DPFC clock gating after FBC disable
>> */
>> if (display->platform.dg2 || DISPLAY_VER(display) >= 14)
>> fbc_compressor_clkgate_disable_wa(fbc, false);
>> @@ -1972,6 +2044,8 @@ static void __intel_fbc_enable(struct
>> intel_atomic_state *state,
>>
>> intel_fbc_program_workarounds(fbc);
>> intel_fbc_program_cfb(fbc);
>> +
>> + fbc_sys_cache_enable(fbc);
>> }
>>
>> /**
>> @@ -2212,6 +2286,10 @@ void intel_fbc_init(struct intel_display
>> *display)
>>
>> for_each_fbc_id(display, fbc_id)
>> display->fbc.instances[fbc_id] =
>> intel_fbc_create(display, fbc_id);
>> +
>> + mutex_lock(&display->fbc.sys_cache.lock);
>> + display->fbc.sys_cache.id = FBC_SYS_CACHE_ID_NONE;
>> + mutex_unlock(&display->fbc.sys_cache.lock);
>> }
>>
>> /**
>> @@ -2231,6 +2309,9 @@ void intel_fbc_sanitize(struct intel_display
>> *display)
>> if (intel_fbc_hw_is_active(fbc))
>> intel_fbc_hw_deactivate(fbc);
>> }
>> +
>> + /* Ensure the sys cache usage config is clear as well */
>> + fbc_sys_cache_update_config(display, 0,
>> FBC_SYS_CACHE_ID_NONE);
>> }
>>
>> static int intel_fbc_debugfs_status_show(struct seq_file *m, void
>> *unused)
>> @@ -2249,6 +2330,11 @@ static int
>> intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
>> seq_puts(m, "FBC enabled\n");
>> seq_printf(m, "Compressing: %s\n",
>>
>> str_yes_no(intel_fbc_is_compressing(fbc)));
>> +
>> + mutex_lock(&display->fbc.sys_cache.lock);
>> + seq_printf(m, "Using system cache: %s\n",
>> + str_yes_no(display->fbc.sys_cache.id ==
>> fbc->id));
>> + mutex_unlock(&display->fbc.sys_cache.lock);
>> } else {
>> seq_printf(m, "FBC disabled: %s\n", fbc-
>> >no_fbc_reason);
>> }
>> diff --git a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
>> b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
>> index b1d0161a3196..d2d889fa4bed 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
>> +++ b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
>> @@ -126,4 +126,14 @@
>> #define FBC_REND_NUKE REG_BIT(2)
>> #define FBC_REND_CACHE_CLEAN REG_BIT(1)
>>
>> +#define XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG _MMIO(0x1344E0)
>> +#define
>> FBC_SYS_CACHE_START_BASE_MASK REG_GENMASK(31, 16)
>> +#define
>> FBC_SYS_CACHE_START_BASE(base) REG_FIELD_PREP(FBC_SYS_CACHE_START_BASE_MASK,(base))
>> +#define FBC_SYS_CACHEABLE_RANGE_MASK REG_GENMASK(15, 4)
>> +#define
>> FBC_SYS_CACHEABLE_RANGE(range) REG_FIELD_PREP(FBC_SYS_CACHEABLE_RANGE_MASK,(range))
>> +#define FBC_SYS_CACHE_TAG_MASK REG_GENMASK(3, 2)
>> +#define
>> FBC_SYS_CACHE_TAG_DONT_CACHE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK, 0)
>> +#define
>> FBC_SYS_CACHE_TAG_USE_RES_SPACE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK,3)
>> +#define FBC_SYS_CACHE_READ_ENABLE REG_BIT(0)
>> +
>> #endif /* __INTEL_FBC_REGS__ */
>
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v4 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC
2025-11-27 13:49 ` Jani Nikula
@ 2025-11-27 14:09 ` Govindapillai, Vinod
0 siblings, 0 replies; 21+ messages in thread
From: Govindapillai, Vinod @ 2025-11-27 14:09 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Nikula, Jani,
intel-gfx@lists.freedesktop.org
Cc: Sousa, Gustavo, Roper, Matthew D, Syrjala, Ville
On Thu, 2025-11-27 at 15:49 +0200, Jani Nikula wrote:
> On Thu, 27 Nov 2025, "Govindapillai, Vinod"
> <vinod.govindapillai@intel.com> wrote:
> > Hi,
> >
> > Ah.. :( Looks like I forgot to git add
> > drivers/gpu/drm/i915/display/intel_display_driver.c while commit
> > this
> > patch. This patch now miss the mutex init part.
>
> IMO the mutex init should be in intel_fbc_init() anyway.
Okay. Thanks Jani. I will change that.
How about the rest of the changes. Are you ok with those?
BR
Vinod
>
> BR,
> Jani.
>
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
> > b/drivers/gpu/drm/i915/display/intel_display_driver.c
> > index 7e000ba3e08b..4f82b267b086 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_driver.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
> > @@ -184,6 +184,7 @@ void intel_display_driver_early_probe(struct
> > intel_display *display)
> > mutex_init(&display->wm.wm_mutex);
> > mutex_init(&display->pps.mutex);
> > mutex_init(&display->hdcp.hdcp_mutex);
> > + mutex_init(&display->fbc.sys_cache.lock);
> >
> > intel_display_irq_init(display);
> > intel_dkl_phy_init(display);
> >
> > Will wait for comments before I update this commit with the above
> > change. Sorry about that.
> >
> > BR
> > Vinod
> >
> >
> >
> > On Thu, 2025-11-27 at 13:53 +0200, Vinod Govindapillai wrote:
> > > One of the FBC instances can utilize the reserved area of SoC
> > > level cache for the fbc transactions to benefit reduced memory
> > > system power especially in idle scenarios. Reserved area of the
> > > system cache can be assigned to an fbc instance by configuring
> > > the cacheability configuration register with offset of the
> > > compressed frame buffer in stolen memoty of that fbc. There is
> > > a limit to this reserved area which is programmable and for
> > > xe3p_lpd the limit is defined as 2MB.
> > >
> > > v2: - better to track fbc sys cache usage from intel_display
> > > level,
> > > sanitize the cacheability config register on probe (Matt)
> > > - limit this for integrated graphics solutions, confirmed
> > > that
> > > no default value set for cache range by hw (Gustavo)
> > >
> > > v3: - changes related to the use of fbc substruct in
> > > intel_display
> > > - use intel_de_write() instead of intel_rmw() by hardcoding
> > > the
> > > default value fields
> > >
> > > v4: - protect sys cache config accesses, sys cache usage status
> > > in
> > > debugfs per fbc instance (Jani)
> > >
> > > Bspec: 68881, 74722
> > > Signed-off-by: Vinod Govindapillai
> > > <vinod.govindapillai@intel.com>
> > > ---
> > > .../gpu/drm/i915/display/intel_display_core.h | 6 ++
> > > .../drm/i915/display/intel_display_device.h | 1 +
> > > drivers/gpu/drm/i915/display/intel_fbc.c | 86
> > > +++++++++++++++++++
> > > drivers/gpu/drm/i915/display/intel_fbc_regs.h | 10 +++
> > > 4 files changed, 103 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> > > b/drivers/gpu/drm/i915/display/intel_display_core.h
> > > index 58325f530670..3e4bde7fa205 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> > > @@ -400,6 +400,12 @@ struct intel_display {
> > >
> > > struct {
> > > struct intel_fbc *instances[I915_MAX_FBCS];
> > > +
> > > + /* xe3p_lpd+: FBC instance utilizing the system
> > > cache */
> > > + struct sys_cache_cfg {
> > > + struct mutex lock;
> > > + enum intel_fbc_id id;
> > > + } sys_cache;
> > > } fbc;
> > >
> > > struct {
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> > > b/drivers/gpu/drm/i915/display/intel_display_device.h
> > > index b559ef43d547..b74cb69ccc85 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> > > @@ -173,6 +173,7 @@ struct intel_display_platforms {
> > > #define HAS_DSC_MST(__display) (DISPLAY_VER(__display)
> > > >=
> > > 12 && HAS_DSC(__display))
> > > #define
> > > HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)
> > > ->fbc_mask != 0)
> > > #define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display)
> > > >=
> > > 30)
> > > +#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display)
> > > >=
> > > 35 && !(__display)->platform.dgfx)
> > > #define
> > > HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)
> > > ->has_fpga_dbg)
> > > #define HAS_FW_BLC(__display) (DISPLAY_VER(__display)
> > > >=
> > > 3)
> > > #define
> > > HAS_GMBUS_BURST_READ(__display) (DISPLAY_VER(__display) >= 10 ||
> > > (__display)->platform.kabylake)
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > index dcdfcff80de3..85978196b607 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > @@ -71,6 +71,8 @@
> > > for_each_fbc_id((__display), (__fbc_id)) \
> > > for_each_if((__fbc) = (__display)-
> > > > fbc.instances[(__fbc_id)])
> > >
> > > +#define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
> > > +
> > > struct intel_fbc_funcs {
> > > void (*activate)(struct intel_fbc *fbc);
> > > void (*deactivate)(struct intel_fbc *fbc);
> > > @@ -941,6 +943,69 @@ static void
> > > intel_fbc_program_workarounds(struct
> > > intel_fbc *fbc)
> > > fbc_compressor_clkgate_disable_wa(fbc, true);
> > > }
> > >
> > > +static void fbc_sys_cache_update_config(struct intel_display
> > > *display, u32 reg,
> > > + enum intel_fbc_id id)
> > > +{
> > > + if (!HAS_FBC_SYS_CACHE(display))
> > > + return;
> > > +
> > > + lockdep_assert_held(&display->fbc.sys_cache.lock);
> > > +
> > > + /* Cache read enable is set by default */
> > > + reg |= FBC_SYS_CACHE_READ_ENABLE;
> > > +
> > > + intel_de_write(display,
> > > XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG,
> > > reg);
> > > +
> > > + display->fbc.sys_cache.id = id;
> > > +}
> > > +
> > > +static void fbc_sys_cache_disable(const struct intel_fbc *fbc)
> > > +{
> > > + struct intel_display *display = fbc->display;
> > > + struct sys_cache_cfg *sys_cache = &display-
> > > >fbc.sys_cache;
> > > +
> > > + mutex_lock(&sys_cache->lock);
> > > + /* clear only if "fbc" reserved the cache */
> > > + if (sys_cache->id == fbc->id)
> > > + fbc_sys_cache_update_config(display, 0,
> > > FBC_SYS_CACHE_ID_NONE);
> > > + mutex_unlock(&sys_cache->lock);
> > > +}
> > > +
> > > +static int fbc_sys_cache_limit(struct intel_display *display)
> > > +{
> > > + /* Default 2MB for xe3p_lpd */
> > > + if (DISPLAY_VER(display) == 35)
> > > + return 2 * 1024 * 1024;
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static void fbc_sys_cache_enable(const struct intel_fbc *fbc)
> > > +{
> > > + struct intel_display *display = fbc->display;
> > > + struct sys_cache_cfg *sys_cache = &display-
> > > >fbc.sys_cache;
> > > + int range, offset;
> > > + u32 cfg;
> > > +
> > > + if (!HAS_FBC_SYS_CACHE(display))
> > > + return;
> > > +
> > > + /* limit to be configured to the register in 64k byte
> > > chunks
> > > */
> > > + range = fbc_sys_cache_limit(display) / (64 * 1024);
> > > +
> > > + /* offset to be configured to the register in 4K byte
> > > chunks
> > > */
> > > + offset = i915_gem_stolen_node_offset(fbc->compressed_fb)
> > > /
> > > (4 * 1024);
> > > +
> > > + cfg = FBC_SYS_CACHE_TAG_USE_RES_SPACE |
> > > FBC_SYS_CACHEABLE_RANGE(range) |
> > > + FBC_SYS_CACHE_START_BASE(offset);
> > > +
> > > + mutex_lock(&sys_cache->lock);
> > > + /* update sys cache config only if sys cache is
> > > unassigned
> > > */
> > > + if (sys_cache->id == FBC_SYS_CACHE_ID_NONE)
> > > + fbc_sys_cache_update_config(display, cfg, fbc-
> > > >id);
> > > + mutex_unlock(&sys_cache->lock);
> > > +}
> > > +
> > > static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
> > > {
> > > if (WARN_ON(intel_fbc_hw_is_active(fbc)))
> > > @@ -967,6 +1032,11 @@ void intel_fbc_cleanup(struct intel_display
> > > *display)
> > >
> > > kfree(fbc);
> > > }
> > > +
> > > + mutex_lock(&display->fbc.sys_cache.lock);
> > > + drm_WARN_ON(display->drm,
> > > + display->fbc.sys_cache.id !=
> > > FBC_SYS_CACHE_ID_NONE);
> > > + mutex_unlock(&display->fbc.sys_cache.lock);
> > > }
> > >
> > > static bool i8xx_fbc_stride_is_valid(const struct
> > > intel_plane_state
> > > *plane_state)
> > > @@ -1780,6 +1850,8 @@ static void __intel_fbc_disable(struct
> > > intel_fbc *fbc)
> > >
> > > __intel_fbc_cleanup_cfb(fbc);
> > >
> > > + fbc_sys_cache_disable(fbc);
> > > +
> > > /* wa_18038517565 Enable DPFC clock gating after FBC
> > > disable
> > > */
> > > if (display->platform.dg2 || DISPLAY_VER(display) >= 14)
> > > fbc_compressor_clkgate_disable_wa(fbc, false);
> > > @@ -1972,6 +2044,8 @@ static void __intel_fbc_enable(struct
> > > intel_atomic_state *state,
> > >
> > > intel_fbc_program_workarounds(fbc);
> > > intel_fbc_program_cfb(fbc);
> > > +
> > > + fbc_sys_cache_enable(fbc);
> > > }
> > >
> > > /**
> > > @@ -2212,6 +2286,10 @@ void intel_fbc_init(struct intel_display
> > > *display)
> > >
> > > for_each_fbc_id(display, fbc_id)
> > > display->fbc.instances[fbc_id] =
> > > intel_fbc_create(display, fbc_id);
> > > +
> > > + mutex_lock(&display->fbc.sys_cache.lock);
> > > + display->fbc.sys_cache.id = FBC_SYS_CACHE_ID_NONE;
> > > + mutex_unlock(&display->fbc.sys_cache.lock);
> > > }
> > >
> > > /**
> > > @@ -2231,6 +2309,9 @@ void intel_fbc_sanitize(struct
> > > intel_display
> > > *display)
> > > if (intel_fbc_hw_is_active(fbc))
> > > intel_fbc_hw_deactivate(fbc);
> > > }
> > > +
> > > + /* Ensure the sys cache usage config is clear as well */
> > > + fbc_sys_cache_update_config(display, 0,
> > > FBC_SYS_CACHE_ID_NONE);
> > > }
> > >
> > > static int intel_fbc_debugfs_status_show(struct seq_file *m,
> > > void
> > > *unused)
> > > @@ -2249,6 +2330,11 @@ static int
> > > intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
> > > seq_puts(m, "FBC enabled\n");
> > > seq_printf(m, "Compressing: %s\n",
> > >
> > > str_yes_no(intel_fbc_is_compressing(fbc)));
> > > +
> > > + mutex_lock(&display->fbc.sys_cache.lock);
> > > + seq_printf(m, "Using system cache: %s\n",
> > > + str_yes_no(display->fbc.sys_cache.id
> > > ==
> > > fbc->id));
> > > + mutex_unlock(&display->fbc.sys_cache.lock);
> > > } else {
> > > seq_printf(m, "FBC disabled: %s\n", fbc-
> > > > no_fbc_reason);
> > > }
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> > > b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> > > index b1d0161a3196..d2d889fa4bed 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> > > @@ -126,4 +126,14 @@
> > > #define FBC_REND_NUKE REG_BIT(2)
> > > #define FBC_REND_CACHE_CLEAN REG_BIT(1)
> > >
> > > +#define XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG _MMIO(0x1344E0)
> > > +#define
> > > FBC_SYS_CACHE_START_BASE_MASK REG_GENMASK(31, 16)
> > > +#define
> > > FBC_SYS_CACHE_START_BASE(base) REG_FIELD_PREP(FBC_SYS_CACHE_STA
> > > RT_BASE_MASK,(base))
> > > +#define FBC_SYS_CACHEABLE_RANGE_MASK REG_GENMASK(15,
> > > 4)
> > > +#define
> > > FBC_SYS_CACHEABLE_RANGE(range) REG_FIELD_PREP(FBC_SYS_CACHEABLE
> > > _RANGE_MASK,(range))
> > > +#define FBC_SYS_CACHE_TAG_MASK REG_GENMASK(3,
> > > 2)
> > > +#define
> > > FBC_SYS_CACHE_TAG_DONT_CACHE REG_FIELD_PREP(FBC_SYS_C
> > > ACHE_TAG_MASK, 0)
> > > +#define
> > > FBC_SYS_CACHE_TAG_USE_RES_SPACE REG_FIELD_PREP(FBC_SYS_CACHE_TAG
> > > _MASK,3)
> > > +#define FBC_SYS_CACHE_READ_ENABLE REG_BIT(0)
> > > +
> > > #endif /* __INTEL_FBC_REGS__ */
> >
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v5 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC
2025-11-27 11:53 ` [PATCH v4 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC Vinod Govindapillai
2025-11-27 13:29 ` Govindapillai, Vinod
@ 2025-11-28 11:35 ` Vinod Govindapillai
2025-12-03 13:12 ` Hogander, Jouni
1 sibling, 1 reply; 21+ messages in thread
From: Vinod Govindapillai @ 2025-11-28 11:35 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: vinod.govindapillai, matthew.d.roper, gustavo.sousa,
ville.syrjala, jani.nikula
One of the FBC instances can utilize the reserved area of SoC
level cache for the fbc transactions to benefit reduced memory
system power especially in idle scenarios. Reserved area of the
system cache can be assigned to an fbc instance by configuring
the cacheability configuration register with offset of the
compressed frame buffer in stolen memoty of that fbc. There is
a limit to this reserved area which is programmable and for
xe3p_lpd the limit is defined as 2MB.
v2: - better to track fbc sys cache usage from intel_display level,
sanitize the cacheability config register on probe (Matt)
- limit this for integrated graphics solutions, confirmed that
no default value set for cache range by hw (Gustavo)
v3: - changes related to the use of fbc substruct in intel_display
- use intel_de_write() instead of intel_rmw() by hardcoding the
default value fields
v4: - protect sys cache config accesses, sys cache usage status in
debugfs per fbc instance (Jani)
v5: - mutex_init and missing mutex_lock in sanitize call
Bspec: 68881, 74722
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
.../gpu/drm/i915/display/intel_display_core.h | 7 ++
.../drm/i915/display/intel_display_device.h | 1 +
drivers/gpu/drm/i915/display/intel_fbc.c | 87 +++++++++++++++++++
drivers/gpu/drm/i915/display/intel_fbc_regs.h | 10 +++
4 files changed, 105 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 58325f530670..0a1744b3b440 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -400,6 +400,13 @@ struct intel_display {
struct {
struct intel_fbc *instances[I915_MAX_FBCS];
+
+ /* xe3p_lpd+: FBC instance utilizing the system cache */
+ struct sys_cache_cfg {
+ /* Protect concurrecnt access to system cache configuration */
+ struct mutex lock;
+ enum intel_fbc_id id;
+ } sys_cache;
} fbc;
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index b559ef43d547..b74cb69ccc85 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -173,6 +173,7 @@ struct intel_display_platforms {
#define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))
#define HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
#define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >= 30)
+#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >= 35 && !(__display)->platform.dgfx)
#define HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)->has_fpga_dbg)
#define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >= 3)
#define HAS_GMBUS_BURST_READ(__display) (DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index dcdfcff80de3..cebde5db3dd7 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -71,6 +71,8 @@
for_each_fbc_id((__display), (__fbc_id)) \
for_each_if((__fbc) = (__display)->fbc.instances[(__fbc_id)])
+#define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
+
struct intel_fbc_funcs {
void (*activate)(struct intel_fbc *fbc);
void (*deactivate)(struct intel_fbc *fbc);
@@ -941,6 +943,69 @@ static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
fbc_compressor_clkgate_disable_wa(fbc, true);
}
+static void fbc_sys_cache_update_config(struct intel_display *display, u32 reg,
+ enum intel_fbc_id id)
+{
+ if (!HAS_FBC_SYS_CACHE(display))
+ return;
+
+ lockdep_assert_held(&display->fbc.sys_cache.lock);
+
+ /* Cache read enable is set by default */
+ reg |= FBC_SYS_CACHE_READ_ENABLE;
+
+ intel_de_write(display, XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG, reg);
+
+ display->fbc.sys_cache.id = id;
+}
+
+static void fbc_sys_cache_disable(const struct intel_fbc *fbc)
+{
+ struct intel_display *display = fbc->display;
+ struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
+
+ mutex_lock(&sys_cache->lock);
+ /* clear only if "fbc" reserved the cache */
+ if (sys_cache->id == fbc->id)
+ fbc_sys_cache_update_config(display, 0, FBC_SYS_CACHE_ID_NONE);
+ mutex_unlock(&sys_cache->lock);
+}
+
+static int fbc_sys_cache_limit(struct intel_display *display)
+{
+ /* Default 2MB for xe3p_lpd */
+ if (DISPLAY_VER(display) == 35)
+ return 2 * 1024 * 1024;
+
+ return 0;
+}
+
+static void fbc_sys_cache_enable(const struct intel_fbc *fbc)
+{
+ struct intel_display *display = fbc->display;
+ struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
+ int range, offset;
+ u32 cfg;
+
+ if (!HAS_FBC_SYS_CACHE(display))
+ return;
+
+ /* limit to be configured to the register in 64k byte chunks */
+ range = fbc_sys_cache_limit(display) / (64 * 1024);
+
+ /* offset to be configured to the register in 4K byte chunks */
+ offset = i915_gem_stolen_node_offset(fbc->compressed_fb) / (4 * 1024);
+
+ cfg = FBC_SYS_CACHE_TAG_USE_RES_SPACE | FBC_SYS_CACHEABLE_RANGE(range) |
+ FBC_SYS_CACHE_START_BASE(offset);
+
+ mutex_lock(&sys_cache->lock);
+ /* update sys cache config only if sys cache is unassigned */
+ if (sys_cache->id == FBC_SYS_CACHE_ID_NONE)
+ fbc_sys_cache_update_config(display, cfg, fbc->id);
+ mutex_unlock(&sys_cache->lock);
+}
+
static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
{
if (WARN_ON(intel_fbc_hw_is_active(fbc)))
@@ -967,6 +1032,11 @@ void intel_fbc_cleanup(struct intel_display *display)
kfree(fbc);
}
+
+ mutex_lock(&display->fbc.sys_cache.lock);
+ drm_WARN_ON(display->drm,
+ display->fbc.sys_cache.id != FBC_SYS_CACHE_ID_NONE);
+ mutex_unlock(&display->fbc.sys_cache.lock);
}
static bool i8xx_fbc_stride_is_valid(const struct intel_plane_state *plane_state)
@@ -1780,6 +1850,8 @@ static void __intel_fbc_disable(struct intel_fbc *fbc)
__intel_fbc_cleanup_cfb(fbc);
+ fbc_sys_cache_disable(fbc);
+
/* wa_18038517565 Enable DPFC clock gating after FBC disable */
if (display->platform.dg2 || DISPLAY_VER(display) >= 14)
fbc_compressor_clkgate_disable_wa(fbc, false);
@@ -1972,6 +2044,8 @@ static void __intel_fbc_enable(struct intel_atomic_state *state,
intel_fbc_program_workarounds(fbc);
intel_fbc_program_cfb(fbc);
+
+ fbc_sys_cache_enable(fbc);
}
/**
@@ -2212,6 +2286,9 @@ void intel_fbc_init(struct intel_display *display)
for_each_fbc_id(display, fbc_id)
display->fbc.instances[fbc_id] = intel_fbc_create(display, fbc_id);
+
+ mutex_init(&display->fbc.sys_cache.lock);
+ display->fbc.sys_cache.id = FBC_SYS_CACHE_ID_NONE;
}
/**
@@ -2231,6 +2308,11 @@ void intel_fbc_sanitize(struct intel_display *display)
if (intel_fbc_hw_is_active(fbc))
intel_fbc_hw_deactivate(fbc);
}
+
+ /* Ensure the sys cache usage config is clear as well */
+ mutex_lock(&display->fbc.sys_cache.lock);
+ fbc_sys_cache_update_config(display, 0, FBC_SYS_CACHE_ID_NONE);
+ mutex_unlock(&display->fbc.sys_cache.lock);
}
static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
@@ -2249,6 +2331,11 @@ static int intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
seq_puts(m, "FBC enabled\n");
seq_printf(m, "Compressing: %s\n",
str_yes_no(intel_fbc_is_compressing(fbc)));
+
+ mutex_lock(&display->fbc.sys_cache.lock);
+ seq_printf(m, "Using system cache: %s\n",
+ str_yes_no(display->fbc.sys_cache.id == fbc->id));
+ mutex_unlock(&display->fbc.sys_cache.lock);
} else {
seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
}
diff --git a/drivers/gpu/drm/i915/display/intel_fbc_regs.h b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
index b1d0161a3196..d2d889fa4bed 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
@@ -126,4 +126,14 @@
#define FBC_REND_NUKE REG_BIT(2)
#define FBC_REND_CACHE_CLEAN REG_BIT(1)
+#define XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG _MMIO(0x1344E0)
+#define FBC_SYS_CACHE_START_BASE_MASK REG_GENMASK(31, 16)
+#define FBC_SYS_CACHE_START_BASE(base) REG_FIELD_PREP(FBC_SYS_CACHE_START_BASE_MASK, (base))
+#define FBC_SYS_CACHEABLE_RANGE_MASK REG_GENMASK(15, 4)
+#define FBC_SYS_CACHEABLE_RANGE(range) REG_FIELD_PREP(FBC_SYS_CACHEABLE_RANGE_MASK, (range))
+#define FBC_SYS_CACHE_TAG_MASK REG_GENMASK(3, 2)
+#define FBC_SYS_CACHE_TAG_DONT_CACHE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK, 0)
+#define FBC_SYS_CACHE_TAG_USE_RES_SPACE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK, 3)
+#define FBC_SYS_CACHE_READ_ENABLE REG_BIT(0)
+
#endif /* __INTEL_FBC_REGS__ */
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v5 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC
2025-11-28 11:35 ` [PATCH v5 " Vinod Govindapillai
@ 2025-12-03 13:12 ` Hogander, Jouni
2025-12-03 13:43 ` Govindapillai, Vinod
0 siblings, 1 reply; 21+ messages in thread
From: Hogander, Jouni @ 2025-12-03 13:12 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Govindapillai, Vinod
Cc: Sousa, Gustavo, Nikula, Jani, Roper, Matthew D, Syrjala, Ville
On Fri, 2025-11-28 at 13:35 +0200, Vinod Govindapillai wrote:
> One of the FBC instances can utilize the reserved area of SoC
> level cache for the fbc transactions to benefit reduced memory
> system power especially in idle scenarios. Reserved area of the
> system cache can be assigned to an fbc instance by configuring
> the cacheability configuration register with offset of the
> compressed frame buffer in stolen memoty of that fbc. There is
> a limit to this reserved area which is programmable and for
> xe3p_lpd the limit is defined as 2MB.
Maybe you could mention here wow it is decided which instance can use
the cache?
>
> v2: - better to track fbc sys cache usage from intel_display level,
> sanitize the cacheability config register on probe (Matt)
> - limit this for integrated graphics solutions, confirmed that
> no default value set for cache range by hw (Gustavo)
>
> v3: - changes related to the use of fbc substruct in intel_display
> - use intel_de_write() instead of intel_rmw() by hardcoding the
> default value fields
>
> v4: - protect sys cache config accesses, sys cache usage status in
> debugfs per fbc instance (Jani)
>
> v5: - mutex_init and missing mutex_lock in sanitize call
>
> Bspec: 68881, 74722
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> ---
> .../gpu/drm/i915/display/intel_display_core.h | 7 ++
> .../drm/i915/display/intel_display_device.h | 1 +
> drivers/gpu/drm/i915/display/intel_fbc.c | 87
> +++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_fbc_regs.h | 10 +++
> 4 files changed, 105 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 58325f530670..0a1744b3b440 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -400,6 +400,13 @@ struct intel_display {
>
> struct {
> struct intel_fbc *instances[I915_MAX_FBCS];
> +
> + /* xe3p_lpd+: FBC instance utilizing the system
> cache */
> + struct sys_cache_cfg {
> + /* Protect concurrecnt access to system
> cache configuration */
> + struct mutex lock;
> + enum intel_fbc_id id;
> + } sys_cache;
> } fbc;
>
> struct {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index b559ef43d547..b74cb69ccc85 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -173,6 +173,7 @@ struct intel_display_platforms {
> #define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >=
> 12 && HAS_DSC(__display))
> #define
> HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)->fbc_mask != 0)
> #define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >=
> 30)
> +#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >=
> 35 && !(__display)->platform.dgfx)
> #define
> HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)->has_fpga_dbg)
> #define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >=
> 3)
> #define
> HAS_GMBUS_BURST_READ(__display) (DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index dcdfcff80de3..cebde5db3dd7 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -71,6 +71,8 @@
> for_each_fbc_id((__display), (__fbc_id)) \
> for_each_if((__fbc) = (__display)-
> >fbc.instances[(__fbc_id)])
>
> +#define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
> +
> struct intel_fbc_funcs {
> void (*activate)(struct intel_fbc *fbc);
> void (*deactivate)(struct intel_fbc *fbc);
> @@ -941,6 +943,69 @@ static void intel_fbc_program_workarounds(struct
> intel_fbc *fbc)
> fbc_compressor_clkgate_disable_wa(fbc, true);
> }
>
> +static void fbc_sys_cache_update_config(struct intel_display
> *display, u32 reg,
> + enum intel_fbc_id id)
> +{
> + if (!HAS_FBC_SYS_CACHE(display))
> + return;
> +
> + lockdep_assert_held(&display->fbc.sys_cache.lock);
> +
> + /* Cache read enable is set by default */
> + reg |= FBC_SYS_CACHE_READ_ENABLE;
> +
> + intel_de_write(display, XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG,
> reg);
> +
> + display->fbc.sys_cache.id = id;
> +}
> +
> +static void fbc_sys_cache_disable(const struct intel_fbc *fbc)
> +{
> + struct intel_display *display = fbc->display;
> + struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
How about early return in here as well? :
if (!HAS_FBC_SYS_CACHE(display))
return;
> +
> + mutex_lock(&sys_cache->lock);
> + /* clear only if "fbc" reserved the cache */
> + if (sys_cache->id == fbc->id)
> + fbc_sys_cache_update_config(display, 0,
> FBC_SYS_CACHE_ID_NONE);
> + mutex_unlock(&sys_cache->lock);
> +}
> +
> +static int fbc_sys_cache_limit(struct intel_display *display)
> +{
> + /* Default 2MB for xe3p_lpd */
You could review all added comments in this patch and consider dropping
if not all but at least some of them. E.g. Do we really need
clarification saying 2 * 1024 * 1024 is 2MB? On the other hand you are
saying xe3p_lpd but then checking display version below. How xe3p_lpd
is related to display version 35?
Anyways the patch looks ok to me:
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> + if (DISPLAY_VER(display) == 35)
> + return 2 * 1024 * 1024;
> +
> + return 0;
> +}
> +
> +static void fbc_sys_cache_enable(const struct intel_fbc *fbc)
> +{
> + struct intel_display *display = fbc->display;
> + struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
> + int range, offset;
> + u32 cfg;
> +
> + if (!HAS_FBC_SYS_CACHE(display))
> + return;
> +
> + /* limit to be configured to the register in 64k byte chunks
> */
> + range = fbc_sys_cache_limit(display) / (64 * 1024);
> +
> + /* offset to be configured to the register in 4K byte chunks
> */
> + offset = i915_gem_stolen_node_offset(fbc->compressed_fb) /
> (4 * 1024);
> +
> + cfg = FBC_SYS_CACHE_TAG_USE_RES_SPACE |
> FBC_SYS_CACHEABLE_RANGE(range) |
> + FBC_SYS_CACHE_START_BASE(offset);
> +
> + mutex_lock(&sys_cache->lock);
> + /* update sys cache config only if sys cache is unassigned
> */
> + if (sys_cache->id == FBC_SYS_CACHE_ID_NONE)
> + fbc_sys_cache_update_config(display, cfg, fbc->id);
> + mutex_unlock(&sys_cache->lock);
> +}
> +
> static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
> {
> if (WARN_ON(intel_fbc_hw_is_active(fbc)))
> @@ -967,6 +1032,11 @@ void intel_fbc_cleanup(struct intel_display
> *display)
>
> kfree(fbc);
> }
> +
> + mutex_lock(&display->fbc.sys_cache.lock);
> + drm_WARN_ON(display->drm,
> + display->fbc.sys_cache.id !=
> FBC_SYS_CACHE_ID_NONE);
> + mutex_unlock(&display->fbc.sys_cache.lock);
> }
>
> static bool i8xx_fbc_stride_is_valid(const struct intel_plane_state
> *plane_state)
> @@ -1780,6 +1850,8 @@ static void __intel_fbc_disable(struct
> intel_fbc *fbc)
>
> __intel_fbc_cleanup_cfb(fbc);
>
> + fbc_sys_cache_disable(fbc);
> +
> /* wa_18038517565 Enable DPFC clock gating after FBC disable
> */
> if (display->platform.dg2 || DISPLAY_VER(display) >= 14)
> fbc_compressor_clkgate_disable_wa(fbc, false);
> @@ -1972,6 +2044,8 @@ static void __intel_fbc_enable(struct
> intel_atomic_state *state,
>
> intel_fbc_program_workarounds(fbc);
> intel_fbc_program_cfb(fbc);
> +
> + fbc_sys_cache_enable(fbc);
> }
>
> /**
> @@ -2212,6 +2286,9 @@ void intel_fbc_init(struct intel_display
> *display)
>
> for_each_fbc_id(display, fbc_id)
> display->fbc.instances[fbc_id] =
> intel_fbc_create(display, fbc_id);
> +
> + mutex_init(&display->fbc.sys_cache.lock);
> + display->fbc.sys_cache.id = FBC_SYS_CACHE_ID_NONE;
> }
>
> /**
> @@ -2231,6 +2308,11 @@ void intel_fbc_sanitize(struct intel_display
> *display)
> if (intel_fbc_hw_is_active(fbc))
> intel_fbc_hw_deactivate(fbc);
> }
> +
> + /* Ensure the sys cache usage config is clear as well */
> + mutex_lock(&display->fbc.sys_cache.lock);
> + fbc_sys_cache_update_config(display, 0,
> FBC_SYS_CACHE_ID_NONE);
> + mutex_unlock(&display->fbc.sys_cache.lock);
> }
>
> static int intel_fbc_debugfs_status_show(struct seq_file *m, void
> *unused)
> @@ -2249,6 +2331,11 @@ static int
> intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
> seq_puts(m, "FBC enabled\n");
> seq_printf(m, "Compressing: %s\n",
>
> str_yes_no(intel_fbc_is_compressing(fbc)));
> +
> + mutex_lock(&display->fbc.sys_cache.lock);
> + seq_printf(m, "Using system cache: %s\n",
> + str_yes_no(display->fbc.sys_cache.id ==
> fbc->id));
> + mutex_unlock(&display->fbc.sys_cache.lock);
> } else {
> seq_printf(m, "FBC disabled: %s\n", fbc-
> >no_fbc_reason);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> index b1d0161a3196..d2d889fa4bed 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> @@ -126,4 +126,14 @@
> #define FBC_REND_NUKE REG_BIT(2)
> #define FBC_REND_CACHE_CLEAN REG_BIT(1)
>
> +#define XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG _MMIO(0x1344E0)
> +#define
> FBC_SYS_CACHE_START_BASE_MASK REG_GENMASK(31, 16)
> +#define
> FBC_SYS_CACHE_START_BASE(base) REG_FIELD_PREP(FBC_SYS_CACHE_START_BASE_MASK,(base))
> +#define FBC_SYS_CACHEABLE_RANGE_MASK REG_GENMASK(15, 4)
> +#define
> FBC_SYS_CACHEABLE_RANGE(range) REG_FIELD_PREP(FBC_SYS_CACHEABLE_RANGE_MASK,(range))
> +#define FBC_SYS_CACHE_TAG_MASK REG_GENMASK(3, 2)
> +#define
> FBC_SYS_CACHE_TAG_DONT_CACHE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK, 0)
> +#define
> FBC_SYS_CACHE_TAG_USE_RES_SPACE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_MASK,3)
> +#define FBC_SYS_CACHE_READ_ENABLE REG_BIT(0)
> +
> #endif /* __INTEL_FBC_REGS__ */
^ permalink raw reply [flat|nested] 21+ messages in thread* Re: [PATCH v5 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC
2025-12-03 13:12 ` Hogander, Jouni
@ 2025-12-03 13:43 ` Govindapillai, Vinod
0 siblings, 0 replies; 21+ messages in thread
From: Govindapillai, Vinod @ 2025-12-03 13:43 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Hogander, Jouni
Cc: Sousa, Gustavo, Nikula, Jani, Roper, Matthew D, Syrjala, Ville
Hi Jouni
Thanks for the review.
On Wed, 2025-12-03 at 13:12 +0000, Hogander, Jouni wrote:
> On Fri, 2025-11-28 at 13:35 +0200, Vinod Govindapillai wrote:
> > One of the FBC instances can utilize the reserved area of SoC
> > level cache for the fbc transactions to benefit reduced memory
> > system power especially in idle scenarios. Reserved area of the
> > system cache can be assigned to an fbc instance by configuring
> > the cacheability configuration register with offset of the
> > compressed frame buffer in stolen memoty of that fbc. There is
> > a limit to this reserved area which is programmable and for
> > xe3p_lpd the limit is defined as 2MB.
>
> Maybe you could mention here wow it is decided which instance can use
> the cache?
>
Ack
> >
> > v2: - better to track fbc sys cache usage from intel_display level,
> > sanitize the cacheability config register on probe (Matt)
> > - limit this for integrated graphics solutions, confirmed that
> > no default value set for cache range by hw (Gustavo)
> >
> > v3: - changes related to the use of fbc substruct in intel_display
> > - use intel_de_write() instead of intel_rmw() by hardcoding the
> > default value fields
> >
> > v4: - protect sys cache config accesses, sys cache usage status in
> > debugfs per fbc instance (Jani)
> >
> > v5: - mutex_init and missing mutex_lock in sanitize call
> >
> > Bspec: 68881, 74722
> > Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> > ---
> > .../gpu/drm/i915/display/intel_display_core.h | 7 ++
> > .../drm/i915/display/intel_display_device.h | 1 +
> > drivers/gpu/drm/i915/display/intel_fbc.c | 87
> > +++++++++++++++++++
> > drivers/gpu/drm/i915/display/intel_fbc_regs.h | 10 +++
> > 4 files changed, 105 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> > b/drivers/gpu/drm/i915/display/intel_display_core.h
> > index 58325f530670..0a1744b3b440 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> > @@ -400,6 +400,13 @@ struct intel_display {
> >
> > struct {
> > struct intel_fbc *instances[I915_MAX_FBCS];
> > +
> > + /* xe3p_lpd+: FBC instance utilizing the system
> > cache */
> > + struct sys_cache_cfg {
> > + /* Protect concurrecnt access to system
> > cache configuration */
> > + struct mutex lock;
> > + enum intel_fbc_id id;
> > + } sys_cache;
> > } fbc;
> >
> > struct {
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> > b/drivers/gpu/drm/i915/display/intel_display_device.h
> > index b559ef43d547..b74cb69ccc85 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> > @@ -173,6 +173,7 @@ struct intel_display_platforms {
> > #define HAS_DSC_MST(__display) (DISPLAY_VER(__display) >=
> > 12 && HAS_DSC(__display))
> > #define
> > HAS_FBC(__display) (DISPLAY_RUNTIME_INFO(__display)-
> > >fbc_mask != 0)
> > #define HAS_FBC_DIRTY_RECT(__display) (DISPLAY_VER(__display) >=
> > 30)
> > +#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >=
> > 35 && !(__display)->platform.dgfx)
> > #define
> > HAS_FPGA_DBG_UNCLAIMED(__display) (DISPLAY_INFO(__display)-
> > >has_fpga_dbg)
> > #define HAS_FW_BLC(__display) (DISPLAY_VER(__display) >=
> > 3)
> > #define
> > HAS_GMBUS_BURST_READ(__display) (DISPLAY_VER(__display) >= 10 ||
> > (__display)->platform.kabylake)
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index dcdfcff80de3..cebde5db3dd7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -71,6 +71,8 @@
> > for_each_fbc_id((__display), (__fbc_id)) \
> > for_each_if((__fbc) = (__display)-
> > > fbc.instances[(__fbc_id)])
> >
> > +#define FBC_SYS_CACHE_ID_NONE I915_MAX_FBCS
> > +
> > struct intel_fbc_funcs {
> > void (*activate)(struct intel_fbc *fbc);
> > void (*deactivate)(struct intel_fbc *fbc);
> > @@ -941,6 +943,69 @@ static void
> > intel_fbc_program_workarounds(struct
> > intel_fbc *fbc)
> > fbc_compressor_clkgate_disable_wa(fbc, true);
> > }
> >
> > +static void fbc_sys_cache_update_config(struct intel_display
> > *display, u32 reg,
> > + enum intel_fbc_id id)
> > +{
> > + if (!HAS_FBC_SYS_CACHE(display))
> > + return;
> > +
> > + lockdep_assert_held(&display->fbc.sys_cache.lock);
> > +
> > + /* Cache read enable is set by default */
> > + reg |= FBC_SYS_CACHE_READ_ENABLE;
> > +
> > + intel_de_write(display, XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG,
> > reg);
> > +
> > + display->fbc.sys_cache.id = id;
> > +}
> > +
> > +static void fbc_sys_cache_disable(const struct intel_fbc *fbc)
> > +{
> > + struct intel_display *display = fbc->display;
> > + struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
>
> How about early return in here as well? :
>
> if (!HAS_FBC_SYS_CACHE(display))
> return;
Here (sys_cache->id == fbc->id) check should handle the same condition
as sys_cache->id will never be fbc-id if FBC_SYS_CACHE feature is not
supported. Jani was suggesting this in his comments in the previous
iteration.
> > +
> > + mutex_lock(&sys_cache->lock);
> > + /* clear only if "fbc" reserved the cache */
> > + if (sys_cache->id == fbc->id)
> > + fbc_sys_cache_update_config(display, 0,
> > FBC_SYS_CACHE_ID_NONE);
> > + mutex_unlock(&sys_cache->lock);
> > +}
> > +
> > +static int fbc_sys_cache_limit(struct intel_display *display)
> > +{
> > + /* Default 2MB for xe3p_lpd */
>
> You could review all added comments in this patch and consider
> dropping
> if not all but at least some of them. E.g. Do we really need
> clarification saying 2 * 1024 * 1024 is 2MB? On the other hand you
> are
> saying xe3p_lpd but then checking display version below. How xe3p_lpd
> is related to display version 35?
Yeah.. my intention was to explain that magic number 2MB as the default
for NVL. But you are right I could remove some of those comments as
those are anyway found from bspec.
Thanks
Vinod
>
> Anyways the patch looks ok to me:
>
> Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
>
> > + if (DISPLAY_VER(display) == 35)
> > + return 2 * 1024 * 1024;
> > +
> > + return 0;
> > +}
> > +
> > +static void fbc_sys_cache_enable(const struct intel_fbc *fbc)
> > +{
> > + struct intel_display *display = fbc->display;
> > + struct sys_cache_cfg *sys_cache = &display->fbc.sys_cache;
> > + int range, offset;
> > + u32 cfg;
> > +
> > + if (!HAS_FBC_SYS_CACHE(display))
> > + return;
> > +
> > + /* limit to be configured to the register in 64k byte
> > chunks
> > */
> > + range = fbc_sys_cache_limit(display) / (64 * 1024);
> > +
> > + /* offset to be configured to the register in 4K byte
> > chunks
> > */
> > + offset = i915_gem_stolen_node_offset(fbc->compressed_fb) /
> > (4 * 1024);
> > +
> > + cfg = FBC_SYS_CACHE_TAG_USE_RES_SPACE |
> > FBC_SYS_CACHEABLE_RANGE(range) |
> > + FBC_SYS_CACHE_START_BASE(offset);
> > +
> > + mutex_lock(&sys_cache->lock);
> > + /* update sys cache config only if sys cache is unassigned
> > */
> > + if (sys_cache->id == FBC_SYS_CACHE_ID_NONE)
> > + fbc_sys_cache_update_config(display, cfg, fbc-
> > >id);
> > + mutex_unlock(&sys_cache->lock);
> > +}
> > +
> > static void __intel_fbc_cleanup_cfb(struct intel_fbc *fbc)
> > {
> > if (WARN_ON(intel_fbc_hw_is_active(fbc)))
> > @@ -967,6 +1032,11 @@ void intel_fbc_cleanup(struct intel_display
> > *display)
> >
> > kfree(fbc);
> > }
> > +
> > + mutex_lock(&display->fbc.sys_cache.lock);
> > + drm_WARN_ON(display->drm,
> > + display->fbc.sys_cache.id !=
> > FBC_SYS_CACHE_ID_NONE);
> > + mutex_unlock(&display->fbc.sys_cache.lock);
> > }
> >
> > static bool i8xx_fbc_stride_is_valid(const struct
> > intel_plane_state
> > *plane_state)
> > @@ -1780,6 +1850,8 @@ static void __intel_fbc_disable(struct
> > intel_fbc *fbc)
> >
> > __intel_fbc_cleanup_cfb(fbc);
> >
> > + fbc_sys_cache_disable(fbc);
> > +
> > /* wa_18038517565 Enable DPFC clock gating after FBC
> > disable
> > */
> > if (display->platform.dg2 || DISPLAY_VER(display) >= 14)
> > fbc_compressor_clkgate_disable_wa(fbc, false);
> > @@ -1972,6 +2044,8 @@ static void __intel_fbc_enable(struct
> > intel_atomic_state *state,
> >
> > intel_fbc_program_workarounds(fbc);
> > intel_fbc_program_cfb(fbc);
> > +
> > + fbc_sys_cache_enable(fbc);
> > }
> >
> > /**
> > @@ -2212,6 +2286,9 @@ void intel_fbc_init(struct intel_display
> > *display)
> >
> > for_each_fbc_id(display, fbc_id)
> > display->fbc.instances[fbc_id] =
> > intel_fbc_create(display, fbc_id);
> > +
> > + mutex_init(&display->fbc.sys_cache.lock);
> > + display->fbc.sys_cache.id = FBC_SYS_CACHE_ID_NONE;
> > }
> >
> > /**
> > @@ -2231,6 +2308,11 @@ void intel_fbc_sanitize(struct intel_display
> > *display)
> > if (intel_fbc_hw_is_active(fbc))
> > intel_fbc_hw_deactivate(fbc);
> > }
> > +
> > + /* Ensure the sys cache usage config is clear as well */
> > + mutex_lock(&display->fbc.sys_cache.lock);
> > + fbc_sys_cache_update_config(display, 0,
> > FBC_SYS_CACHE_ID_NONE);
> > + mutex_unlock(&display->fbc.sys_cache.lock);
> > }
> >
> > static int intel_fbc_debugfs_status_show(struct seq_file *m, void
> > *unused)
> > @@ -2249,6 +2331,11 @@ static int
> > intel_fbc_debugfs_status_show(struct seq_file *m, void *unused)
> > seq_puts(m, "FBC enabled\n");
> > seq_printf(m, "Compressing: %s\n",
> >
> > str_yes_no(intel_fbc_is_compressing(fbc)));
> > +
> > + mutex_lock(&display->fbc.sys_cache.lock);
> > + seq_printf(m, "Using system cache: %s\n",
> > + str_yes_no(display->fbc.sys_cache.id ==
> > fbc->id));
> > + mutex_unlock(&display->fbc.sys_cache.lock);
> > } else {
> > seq_printf(m, "FBC disabled: %s\n", fbc-
> > > no_fbc_reason);
> > }
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> > b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> > index b1d0161a3196..d2d889fa4bed 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc_regs.h
> > @@ -126,4 +126,14 @@
> > #define FBC_REND_NUKE REG_BIT(2)
> > #define FBC_REND_CACHE_CLEAN REG_BIT(1)
> >
> > +#define XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG _MMIO(0x1344E0)
> > +#define
> > FBC_SYS_CACHE_START_BASE_MASK REG_GENMASK(31, 16)
> > +#define
> > FBC_SYS_CACHE_START_BASE(base) REG_FIELD_PREP(FBC_SYS_CACHE_START
> > _BASE_MASK,(base))
> > +#define FBC_SYS_CACHEABLE_RANGE_MASK REG_GENMASK(15, 4)
> > +#define
> > FBC_SYS_CACHEABLE_RANGE(range) REG_FIELD_PREP(FBC_SYS_CACHEABLE_R
> > ANGE_MASK,(range))
> > +#define FBC_SYS_CACHE_TAG_MASK REG_GENMASK(3, 2)
> > +#define
> > FBC_SYS_CACHE_TAG_DONT_CACHE REG_FIELD_PREP(FBC_SYS_CAC
> > HE_TAG_MASK, 0)
> > +#define
> > FBC_SYS_CACHE_TAG_USE_RES_SPACE REG_FIELD_PREP(FBC_SYS_CACHE_TAG_M
> > ASK,3)
> > +#define FBC_SYS_CACHE_READ_ENABLE REG_BIT(0)
> > +
> > #endif /* __INTEL_FBC_REGS__ */
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v4 3/3] drm/i915/fbc: Apply Wa_14025769978
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
2025-11-27 11:53 ` [PATCH v4 1/3] drm/i915/display: Use a sub-struct for fbc operations in intel_display Vinod Govindapillai
2025-11-27 11:53 ` [PATCH v4 2/3] drm/i915/xe3p_lpd: Enable display use of system cache for FBC Vinod Govindapillai
@ 2025-11-27 11:53 ` Vinod Govindapillai
2025-12-03 13:39 ` Hogander, Jouni
2025-11-27 14:05 ` ✗ CI.checkpatch: warning for drm/i915/display: Enable system cache support for FBC (rev2) Patchwork
` (9 subsequent siblings)
12 siblings, 1 reply; 21+ messages in thread
From: Vinod Govindapillai @ 2025-11-27 11:53 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: vinod.govindapillai, matthew.d.roper, gustavo.sousa,
ville.syrjala, jani.nikula
Disable cache read setting in the cacheability configuration
register as per the wa recommendation
Bspec: 79482, 74722, 68881
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_wa.c | 2 ++
drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
drivers/gpu/drm/i915/display/intel_fbc.c | 10 ++++++++--
3 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index b2e71fa61c0a..a00af39f7538 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -72,6 +72,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
return IS_DISPLAY_VERx100(display, 1100, 1400);
case INTEL_DISPLAY_WA_15018326506:
return display->platform.battlemage;
+ case INTEL_DISPLAY_WA_14025769978:
+ return DISPLAY_VER(display) == 35;
default:
drm_WARN(display->drm, 1, "Missing Wa number: %s\n", name);
break;
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index f648b00cb97d..a68c0bb7e516 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -27,6 +27,7 @@ enum intel_display_wa {
INTEL_DISPLAY_WA_14011503117,
INTEL_DISPLAY_WA_22014263786,
INTEL_DISPLAY_WA_15018326506,
+ INTEL_DISPLAY_WA_14025769978,
};
bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name);
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 85978196b607..84a1ab0bd418 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -951,8 +951,14 @@ static void fbc_sys_cache_update_config(struct intel_display *display, u32 reg,
lockdep_assert_held(&display->fbc.sys_cache.lock);
- /* Cache read enable is set by default */
- reg |= FBC_SYS_CACHE_READ_ENABLE;
+ /*
+ * Wa_14025769978:
+ * Fixes: SoC hardware issue in read caching
+ * Workaround: disable cache read setting which is enabled by default.
+ */
+ if (!intel_display_wa(display, 14025769978))
+ /* Cache read enable is set by default */
+ reg |= FBC_SYS_CACHE_READ_ENABLE;
intel_de_write(display, XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG, reg);
--
2.43.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v4 3/3] drm/i915/fbc: Apply Wa_14025769978
2025-11-27 11:53 ` [PATCH v4 3/3] drm/i915/fbc: Apply Wa_14025769978 Vinod Govindapillai
@ 2025-12-03 13:39 ` Hogander, Jouni
0 siblings, 0 replies; 21+ messages in thread
From: Hogander, Jouni @ 2025-12-03 13:39 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Govindapillai, Vinod
Cc: Sousa, Gustavo, Nikula, Jani, Roper, Matthew D, Syrjala, Ville
On Thu, 2025-11-27 at 13:53 +0200, Vinod Govindapillai wrote:
> Disable cache read setting in the cacheability configuration
> register as per the wa recommendation
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
>
> Bspec: 79482, 74722, 68881
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_wa.c | 2 ++
> drivers/gpu/drm/i915/display/intel_display_wa.h | 1 +
> drivers/gpu/drm/i915/display/intel_fbc.c | 10 ++++++++--
> 3 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c
> b/drivers/gpu/drm/i915/display/intel_display_wa.c
> index b2e71fa61c0a..a00af39f7538 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
> @@ -72,6 +72,8 @@ bool __intel_display_wa(struct intel_display
> *display, enum intel_display_wa wa,
> return IS_DISPLAY_VERx100(display, 1100, 1400);
> case INTEL_DISPLAY_WA_15018326506:
> return display->platform.battlemage;
> + case INTEL_DISPLAY_WA_14025769978:
> + return DISPLAY_VER(display) == 35;
> default:
> drm_WARN(display->drm, 1, "Missing Wa number: %s\n",
> name);
> break;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h
> b/drivers/gpu/drm/i915/display/intel_display_wa.h
> index f648b00cb97d..a68c0bb7e516 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
> @@ -27,6 +27,7 @@ enum intel_display_wa {
> INTEL_DISPLAY_WA_14011503117,
> INTEL_DISPLAY_WA_22014263786,
> INTEL_DISPLAY_WA_15018326506,
> + INTEL_DISPLAY_WA_14025769978,
> };
>
> bool __intel_display_wa(struct intel_display *display, enum
> intel_display_wa wa, const char *name);
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 85978196b607..84a1ab0bd418 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -951,8 +951,14 @@ static void fbc_sys_cache_update_config(struct
> intel_display *display, u32 reg,
>
> lockdep_assert_held(&display->fbc.sys_cache.lock);
>
> - /* Cache read enable is set by default */
> - reg |= FBC_SYS_CACHE_READ_ENABLE;
> + /*
> + * Wa_14025769978:
> + * Fixes: SoC hardware issue in read caching
> + * Workaround: disable cache read setting which is enabled
> by default.
> + */
> + if (!intel_display_wa(display, 14025769978))
> + /* Cache read enable is set by default */
> + reg |= FBC_SYS_CACHE_READ_ENABLE;
>
> intel_de_write(display, XE3P_LPD_FBC_SYS_CACHE_USAGE_CFG,
> reg);
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915/display: Enable system cache support for FBC (rev2)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (2 preceding siblings ...)
2025-11-27 11:53 ` [PATCH v4 3/3] drm/i915/fbc: Apply Wa_14025769978 Vinod Govindapillai
@ 2025-11-27 14:05 ` Patchwork
2025-11-27 14:06 ` ✓ CI.KUnit: success " Patchwork
` (8 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-27 14:05 UTC (permalink / raw)
To: Govindapillai, Vinod; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev2)
URL : https://patchwork.freedesktop.org/series/157944/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
2de9a3901bc28757c7906b454717b64e2a214021
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 18be211cec7043a8ac6187a7baa19283a59ff510
Author: Vinod Govindapillai <vinod.govindapillai@intel.com>
Date: Thu Nov 27 13:53:49 2025 +0200
drm/i915/fbc: Apply Wa_14025769978
Disable cache read setting in the cacheability configuration
register as per the wa recommendation
Bspec: 79482, 74722, 68881
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
+ /mt/dim checkpatch 943d0e69375e5a9030238a697f7d850af0549000 drm-intel
81274635a3f1 drm/i915/display: Use a sub-struct for fbc operations in intel_display
4bacd89350ca drm/i915/xe3p_lpd: Enable display use of system cache for FBC
-:41: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#41: FILE: drivers/gpu/drm/i915/display/intel_display_core.h:406:
+ struct mutex lock;
-:55: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#55: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:176:
+#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >= 35 && !(__display)->platform.dgfx)
-:55: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#55: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:176:
+#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >= 35 && !(__display)->platform.dgfx)
-:215: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#215: FILE: drivers/gpu/drm/i915/display/intel_fbc_regs.h:131:
+#define FBC_SYS_CACHE_START_BASE(base) REG_FIELD_PREP(FBC_SYS_CACHE_START_BASE_MASK, (base))
-:217: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#217: FILE: drivers/gpu/drm/i915/display/intel_fbc_regs.h:133:
+#define FBC_SYS_CACHEABLE_RANGE(range) REG_FIELD_PREP(FBC_SYS_CACHEABLE_RANGE_MASK, (range))
total: 0 errors, 3 warnings, 2 checks, 167 lines checked
18be211cec70 drm/i915/fbc: Apply Wa_14025769978
^ permalink raw reply [flat|nested] 21+ messages in thread* ✓ CI.KUnit: success for drm/i915/display: Enable system cache support for FBC (rev2)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (3 preceding siblings ...)
2025-11-27 14:05 ` ✗ CI.checkpatch: warning for drm/i915/display: Enable system cache support for FBC (rev2) Patchwork
@ 2025-11-27 14:06 ` Patchwork
2025-11-27 14:21 ` ✗ CI.checksparse: warning " Patchwork
` (7 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-27 14:06 UTC (permalink / raw)
To: Govindapillai, Vinod; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev2)
URL : https://patchwork.freedesktop.org/series/157944/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[14:05:11] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:05:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:05:47] Starting KUnit Kernel (1/1)...
[14:05:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:05:47] ================== guc_buf (11 subtests) ===================
[14:05:47] [PASSED] test_smallest
[14:05:47] [PASSED] test_largest
[14:05:47] [PASSED] test_granular
[14:05:47] [PASSED] test_unique
[14:05:47] [PASSED] test_overlap
[14:05:47] [PASSED] test_reusable
[14:05:47] [PASSED] test_too_big
[14:05:47] [PASSED] test_flush
[14:05:47] [PASSED] test_lookup
[14:05:47] [PASSED] test_data
[14:05:47] [PASSED] test_class
[14:05:47] ===================== [PASSED] guc_buf =====================
[14:05:47] =================== guc_dbm (7 subtests) ===================
[14:05:47] [PASSED] test_empty
[14:05:47] [PASSED] test_default
[14:05:47] ======================== test_size ========================
[14:05:47] [PASSED] 4
[14:05:47] [PASSED] 8
[14:05:47] [PASSED] 32
[14:05:47] [PASSED] 256
[14:05:47] ==================== [PASSED] test_size ====================
[14:05:47] ======================= test_reuse ========================
[14:05:47] [PASSED] 4
[14:05:47] [PASSED] 8
[14:05:47] [PASSED] 32
[14:05:47] [PASSED] 256
[14:05:47] =================== [PASSED] test_reuse ====================
[14:05:47] =================== test_range_overlap ====================
[14:05:47] [PASSED] 4
[14:05:47] [PASSED] 8
[14:05:47] [PASSED] 32
[14:05:47] [PASSED] 256
[14:05:47] =============== [PASSED] test_range_overlap ================
[14:05:47] =================== test_range_compact ====================
[14:05:47] [PASSED] 4
[14:05:47] [PASSED] 8
[14:05:47] [PASSED] 32
[14:05:47] [PASSED] 256
[14:05:47] =============== [PASSED] test_range_compact ================
[14:05:47] ==================== test_range_spare =====================
[14:05:47] [PASSED] 4
[14:05:47] [PASSED] 8
[14:05:47] [PASSED] 32
[14:05:47] [PASSED] 256
[14:05:47] ================ [PASSED] test_range_spare =================
[14:05:47] ===================== [PASSED] guc_dbm =====================
[14:05:47] =================== guc_idm (6 subtests) ===================
[14:05:47] [PASSED] bad_init
[14:05:47] [PASSED] no_init
[14:05:47] [PASSED] init_fini
[14:05:47] [PASSED] check_used
[14:05:47] [PASSED] check_quota
[14:05:47] [PASSED] check_all
[14:05:47] ===================== [PASSED] guc_idm =====================
[14:05:47] ================== no_relay (3 subtests) ===================
[14:05:47] [PASSED] xe_drops_guc2pf_if_not_ready
[14:05:47] [PASSED] xe_drops_guc2vf_if_not_ready
[14:05:47] [PASSED] xe_rejects_send_if_not_ready
[14:05:47] ==================== [PASSED] no_relay =====================
[14:05:47] ================== pf_relay (14 subtests) ==================
[14:05:47] [PASSED] pf_rejects_guc2pf_too_short
[14:05:47] [PASSED] pf_rejects_guc2pf_too_long
[14:05:47] [PASSED] pf_rejects_guc2pf_no_payload
[14:05:47] [PASSED] pf_fails_no_payload
[14:05:47] [PASSED] pf_fails_bad_origin
[14:05:47] [PASSED] pf_fails_bad_type
[14:05:47] [PASSED] pf_txn_reports_error
[14:05:47] [PASSED] pf_txn_sends_pf2guc
[14:05:47] [PASSED] pf_sends_pf2guc
[14:05:47] [SKIPPED] pf_loopback_nop
[14:05:47] [SKIPPED] pf_loopback_echo
[14:05:47] [SKIPPED] pf_loopback_fail
[14:05:47] [SKIPPED] pf_loopback_busy
[14:05:47] [SKIPPED] pf_loopback_retry
[14:05:47] ==================== [PASSED] pf_relay =====================
[14:05:47] ================== vf_relay (3 subtests) ===================
[14:05:47] [PASSED] vf_rejects_guc2vf_too_short
[14:05:47] [PASSED] vf_rejects_guc2vf_too_long
[14:05:47] [PASSED] vf_rejects_guc2vf_no_payload
[14:05:47] ==================== [PASSED] vf_relay =====================
[14:05:47] ================ pf_gt_config (6 subtests) =================
[14:05:47] [PASSED] fair_contexts_1vf
[14:05:47] [PASSED] fair_doorbells_1vf
[14:05:47] [PASSED] fair_ggtt_1vf
[14:05:47] ====================== fair_contexts ======================
[14:05:47] [PASSED] 1 VF
[14:05:47] [PASSED] 2 VFs
[14:05:47] [PASSED] 3 VFs
[14:05:47] [PASSED] 4 VFs
[14:05:47] [PASSED] 5 VFs
[14:05:47] [PASSED] 6 VFs
[14:05:47] [PASSED] 7 VFs
[14:05:47] [PASSED] 8 VFs
[14:05:47] [PASSED] 9 VFs
[14:05:47] [PASSED] 10 VFs
[14:05:47] [PASSED] 11 VFs
[14:05:47] [PASSED] 12 VFs
[14:05:47] [PASSED] 13 VFs
[14:05:47] [PASSED] 14 VFs
[14:05:47] [PASSED] 15 VFs
[14:05:47] [PASSED] 16 VFs
[14:05:47] [PASSED] 17 VFs
[14:05:47] [PASSED] 18 VFs
[14:05:47] [PASSED] 19 VFs
[14:05:47] [PASSED] 20 VFs
[14:05:47] [PASSED] 21 VFs
[14:05:47] [PASSED] 22 VFs
[14:05:47] [PASSED] 23 VFs
[14:05:47] [PASSED] 24 VFs
[14:05:47] [PASSED] 25 VFs
[14:05:47] [PASSED] 26 VFs
[14:05:47] [PASSED] 27 VFs
[14:05:47] [PASSED] 28 VFs
[14:05:47] [PASSED] 29 VFs
[14:05:47] [PASSED] 30 VFs
[14:05:47] [PASSED] 31 VFs
[14:05:47] [PASSED] 32 VFs
[14:05:47] [PASSED] 33 VFs
[14:05:47] [PASSED] 34 VFs
[14:05:47] [PASSED] 35 VFs
[14:05:47] [PASSED] 36 VFs
[14:05:47] [PASSED] 37 VFs
[14:05:47] [PASSED] 38 VFs
[14:05:47] [PASSED] 39 VFs
[14:05:47] [PASSED] 40 VFs
[14:05:47] [PASSED] 41 VFs
[14:05:47] [PASSED] 42 VFs
[14:05:47] [PASSED] 43 VFs
[14:05:47] [PASSED] 44 VFs
[14:05:47] [PASSED] 45 VFs
[14:05:47] [PASSED] 46 VFs
[14:05:47] [PASSED] 47 VFs
[14:05:47] [PASSED] 48 VFs
[14:05:47] [PASSED] 49 VFs
[14:05:47] [PASSED] 50 VFs
[14:05:47] [PASSED] 51 VFs
[14:05:47] [PASSED] 52 VFs
[14:05:47] [PASSED] 53 VFs
[14:05:47] [PASSED] 54 VFs
[14:05:47] [PASSED] 55 VFs
[14:05:47] [PASSED] 56 VFs
[14:05:47] [PASSED] 57 VFs
[14:05:47] [PASSED] 58 VFs
[14:05:47] [PASSED] 59 VFs
[14:05:47] [PASSED] 60 VFs
[14:05:47] [PASSED] 61 VFs
[14:05:47] [PASSED] 62 VFs
[14:05:47] [PASSED] 63 VFs
[14:05:47] ================== [PASSED] fair_contexts ==================
[14:05:47] ===================== fair_doorbells ======================
[14:05:47] [PASSED] 1 VF
[14:05:47] [PASSED] 2 VFs
[14:05:47] [PASSED] 3 VFs
[14:05:47] [PASSED] 4 VFs
[14:05:47] [PASSED] 5 VFs
[14:05:47] [PASSED] 6 VFs
[14:05:47] [PASSED] 7 VFs
[14:05:47] [PASSED] 8 VFs
[14:05:47] [PASSED] 9 VFs
[14:05:47] [PASSED] 10 VFs
[14:05:47] [PASSED] 11 VFs
[14:05:47] [PASSED] 12 VFs
[14:05:47] [PASSED] 13 VFs
[14:05:47] [PASSED] 14 VFs
[14:05:47] [PASSED] 15 VFs
[14:05:47] [PASSED] 16 VFs
[14:05:47] [PASSED] 17 VFs
[14:05:47] [PASSED] 18 VFs
[14:05:47] [PASSED] 19 VFs
[14:05:47] [PASSED] 20 VFs
[14:05:47] [PASSED] 21 VFs
[14:05:47] [PASSED] 22 VFs
[14:05:47] [PASSED] 23 VFs
[14:05:47] [PASSED] 24 VFs
[14:05:47] [PASSED] 25 VFs
[14:05:47] [PASSED] 26 VFs
[14:05:47] [PASSED] 27 VFs
[14:05:47] [PASSED] 28 VFs
[14:05:47] [PASSED] 29 VFs
[14:05:47] [PASSED] 30 VFs
[14:05:47] [PASSED] 31 VFs
[14:05:47] [PASSED] 32 VFs
[14:05:47] [PASSED] 33 VFs
[14:05:47] [PASSED] 34 VFs
[14:05:47] [PASSED] 35 VFs
[14:05:47] [PASSED] 36 VFs
[14:05:47] [PASSED] 37 VFs
[14:05:47] [PASSED] 38 VFs
[14:05:47] [PASSED] 39 VFs
[14:05:47] [PASSED] 40 VFs
[14:05:47] [PASSED] 41 VFs
[14:05:47] [PASSED] 42 VFs
[14:05:47] [PASSED] 43 VFs
[14:05:47] [PASSED] 44 VFs
[14:05:47] [PASSED] 45 VFs
[14:05:47] [PASSED] 46 VFs
[14:05:47] [PASSED] 47 VFs
[14:05:47] [PASSED] 48 VFs
[14:05:47] [PASSED] 49 VFs
[14:05:47] [PASSED] 50 VFs
[14:05:47] [PASSED] 51 VFs
[14:05:47] [PASSED] 52 VFs
[14:05:47] [PASSED] 53 VFs
[14:05:47] [PASSED] 54 VFs
[14:05:47] [PASSED] 55 VFs
[14:05:47] [PASSED] 56 VFs
[14:05:47] [PASSED] 57 VFs
[14:05:47] [PASSED] 58 VFs
[14:05:47] [PASSED] 59 VFs
[14:05:47] [PASSED] 60 VFs
[14:05:47] [PASSED] 61 VFs
[14:05:47] [PASSED] 62 VFs
[14:05:47] [PASSED] 63 VFs
[14:05:47] ================= [PASSED] fair_doorbells ==================
[14:05:47] ======================== fair_ggtt ========================
[14:05:47] [PASSED] 1 VF
[14:05:47] [PASSED] 2 VFs
[14:05:47] [PASSED] 3 VFs
[14:05:47] [PASSED] 4 VFs
[14:05:47] [PASSED] 5 VFs
[14:05:47] [PASSED] 6 VFs
[14:05:47] [PASSED] 7 VFs
[14:05:47] [PASSED] 8 VFs
[14:05:47] [PASSED] 9 VFs
[14:05:47] [PASSED] 10 VFs
[14:05:47] [PASSED] 11 VFs
[14:05:47] [PASSED] 12 VFs
[14:05:47] [PASSED] 13 VFs
[14:05:47] [PASSED] 14 VFs
[14:05:47] [PASSED] 15 VFs
[14:05:47] [PASSED] 16 VFs
[14:05:47] [PASSED] 17 VFs
[14:05:47] [PASSED] 18 VFs
[14:05:47] [PASSED] 19 VFs
[14:05:47] [PASSED] 20 VFs
[14:05:47] [PASSED] 21 VFs
[14:05:47] [PASSED] 22 VFs
[14:05:47] [PASSED] 23 VFs
[14:05:47] [PASSED] 24 VFs
[14:05:47] [PASSED] 25 VFs
[14:05:47] [PASSED] 26 VFs
[14:05:47] [PASSED] 27 VFs
[14:05:47] [PASSED] 28 VFs
[14:05:47] [PASSED] 29 VFs
[14:05:47] [PASSED] 30 VFs
[14:05:47] [PASSED] 31 VFs
[14:05:47] [PASSED] 32 VFs
[14:05:47] [PASSED] 33 VFs
[14:05:47] [PASSED] 34 VFs
[14:05:47] [PASSED] 35 VFs
[14:05:47] [PASSED] 36 VFs
[14:05:47] [PASSED] 37 VFs
[14:05:47] [PASSED] 38 VFs
[14:05:47] [PASSED] 39 VFs
[14:05:47] [PASSED] 40 VFs
[14:05:47] [PASSED] 41 VFs
[14:05:47] [PASSED] 42 VFs
[14:05:47] [PASSED] 43 VFs
[14:05:47] [PASSED] 44 VFs
[14:05:47] [PASSED] 45 VFs
[14:05:47] [PASSED] 46 VFs
[14:05:47] [PASSED] 47 VFs
[14:05:47] [PASSED] 48 VFs
[14:05:47] [PASSED] 49 VFs
[14:05:47] [PASSED] 50 VFs
[14:05:47] [PASSED] 51 VFs
[14:05:47] [PASSED] 52 VFs
[14:05:47] [PASSED] 53 VFs
[14:05:47] [PASSED] 54 VFs
[14:05:47] [PASSED] 55 VFs
[14:05:47] [PASSED] 56 VFs
[14:05:47] [PASSED] 57 VFs
[14:05:47] [PASSED] 58 VFs
[14:05:47] [PASSED] 59 VFs
[14:05:47] [PASSED] 60 VFs
[14:05:47] [PASSED] 61 VFs
[14:05:47] [PASSED] 62 VFs
[14:05:47] [PASSED] 63 VFs
[14:05:47] ==================== [PASSED] fair_ggtt ====================
[14:05:47] ================== [PASSED] pf_gt_config ===================
[14:05:47] ===================== lmtt (1 subtest) =====================
[14:05:47] ======================== test_ops =========================
[14:05:47] [PASSED] 2-level
[14:05:47] [PASSED] multi-level
[14:05:47] ==================== [PASSED] test_ops =====================
[14:05:47] ====================== [PASSED] lmtt =======================
[14:05:47] ================= pf_service (11 subtests) =================
[14:05:47] [PASSED] pf_negotiate_any
[14:05:47] [PASSED] pf_negotiate_base_match
[14:05:47] [PASSED] pf_negotiate_base_newer
[14:05:47] [PASSED] pf_negotiate_base_next
[14:05:47] [SKIPPED] pf_negotiate_base_older
[14:05:47] [PASSED] pf_negotiate_base_prev
[14:05:47] [PASSED] pf_negotiate_latest_match
[14:05:47] [PASSED] pf_negotiate_latest_newer
[14:05:47] [PASSED] pf_negotiate_latest_next
[14:05:47] [SKIPPED] pf_negotiate_latest_older
[14:05:47] [SKIPPED] pf_negotiate_latest_prev
[14:05:47] =================== [PASSED] pf_service ====================
[14:05:47] ================= xe_guc_g2g (2 subtests) ==================
[14:05:47] ============== xe_live_guc_g2g_kunit_default ==============
[14:05:47] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[14:05:47] ============== xe_live_guc_g2g_kunit_allmem ===============
[14:05:47] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[14:05:47] =================== [SKIPPED] xe_guc_g2g ===================
[14:05:47] =================== xe_mocs (2 subtests) ===================
[14:05:47] ================ xe_live_mocs_kernel_kunit ================
[14:05:47] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[14:05:47] ================ xe_live_mocs_reset_kunit =================
[14:05:47] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[14:05:47] ==================== [SKIPPED] xe_mocs =====================
[14:05:47] ================= xe_migrate (2 subtests) ==================
[14:05:47] ================= xe_migrate_sanity_kunit =================
[14:05:47] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[14:05:47] ================== xe_validate_ccs_kunit ==================
[14:05:47] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[14:05:47] =================== [SKIPPED] xe_migrate ===================
[14:05:47] ================== xe_dma_buf (1 subtest) ==================
[14:05:47] ==================== xe_dma_buf_kunit =====================
[14:05:47] ================ [SKIPPED] xe_dma_buf_kunit ================
[14:05:47] =================== [SKIPPED] xe_dma_buf ===================
[14:05:47] ================= xe_bo_shrink (1 subtest) =================
[14:05:47] =================== xe_bo_shrink_kunit ====================
[14:05:47] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[14:05:47] ================== [SKIPPED] xe_bo_shrink ==================
[14:05:47] ==================== xe_bo (2 subtests) ====================
[14:05:47] ================== xe_ccs_migrate_kunit ===================
[14:05:47] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[14:05:47] ==================== xe_bo_evict_kunit ====================
[14:05:47] =============== [SKIPPED] xe_bo_evict_kunit ================
[14:05:47] ===================== [SKIPPED] xe_bo ======================
[14:05:47] ==================== args (11 subtests) ====================
[14:05:47] [PASSED] count_args_test
[14:05:47] [PASSED] call_args_example
[14:05:47] [PASSED] call_args_test
[14:05:47] [PASSED] drop_first_arg_example
[14:05:47] [PASSED] drop_first_arg_test
[14:05:47] [PASSED] first_arg_example
[14:05:47] [PASSED] first_arg_test
[14:05:47] [PASSED] last_arg_example
[14:05:47] [PASSED] last_arg_test
[14:05:47] [PASSED] pick_arg_example
[14:05:47] [PASSED] sep_comma_example
[14:05:47] ====================== [PASSED] args =======================
[14:05:47] =================== xe_pci (3 subtests) ====================
[14:05:47] ==================== check_graphics_ip ====================
[14:05:47] [PASSED] 12.00 Xe_LP
[14:05:47] [PASSED] 12.10 Xe_LP+
[14:05:47] [PASSED] 12.55 Xe_HPG
[14:05:47] [PASSED] 12.60 Xe_HPC
[14:05:47] [PASSED] 12.70 Xe_LPG
[14:05:47] [PASSED] 12.71 Xe_LPG
[14:05:47] [PASSED] 12.74 Xe_LPG+
[14:05:47] [PASSED] 20.01 Xe2_HPG
[14:05:47] [PASSED] 20.02 Xe2_HPG
[14:05:47] [PASSED] 20.04 Xe2_LPG
[14:05:47] [PASSED] 30.00 Xe3_LPG
[14:05:47] [PASSED] 30.01 Xe3_LPG
[14:05:47] [PASSED] 30.03 Xe3_LPG
[14:05:47] [PASSED] 30.04 Xe3_LPG
[14:05:47] [PASSED] 30.05 Xe3_LPG
[14:05:47] [PASSED] 35.11 Xe3p_XPC
[14:05:47] ================ [PASSED] check_graphics_ip ================
[14:05:47] ===================== check_media_ip ======================
[14:05:47] [PASSED] 12.00 Xe_M
[14:05:47] [PASSED] 12.55 Xe_HPM
[14:05:47] [PASSED] 13.00 Xe_LPM+
[14:05:47] [PASSED] 13.01 Xe2_HPM
[14:05:47] [PASSED] 20.00 Xe2_LPM
[14:05:47] [PASSED] 30.00 Xe3_LPM
[14:05:47] [PASSED] 30.02 Xe3_LPM
[14:05:47] [PASSED] 35.00 Xe3p_LPM
[14:05:47] [PASSED] 35.03 Xe3p_HPM
[14:05:47] ================= [PASSED] check_media_ip ==================
[14:05:47] =================== check_platform_desc ===================
[14:05:47] [PASSED] 0x9A60 (TIGERLAKE)
[14:05:47] [PASSED] 0x9A68 (TIGERLAKE)
[14:05:47] [PASSED] 0x9A70 (TIGERLAKE)
[14:05:47] [PASSED] 0x9A40 (TIGERLAKE)
[14:05:47] [PASSED] 0x9A49 (TIGERLAKE)
[14:05:47] [PASSED] 0x9A59 (TIGERLAKE)
[14:05:47] [PASSED] 0x9A78 (TIGERLAKE)
[14:05:47] [PASSED] 0x9AC0 (TIGERLAKE)
[14:05:47] [PASSED] 0x9AC9 (TIGERLAKE)
[14:05:47] [PASSED] 0x9AD9 (TIGERLAKE)
[14:05:47] [PASSED] 0x9AF8 (TIGERLAKE)
[14:05:47] [PASSED] 0x4C80 (ROCKETLAKE)
[14:05:47] [PASSED] 0x4C8A (ROCKETLAKE)
[14:05:47] [PASSED] 0x4C8B (ROCKETLAKE)
[14:05:47] [PASSED] 0x4C8C (ROCKETLAKE)
[14:05:47] [PASSED] 0x4C90 (ROCKETLAKE)
[14:05:47] [PASSED] 0x4C9A (ROCKETLAKE)
[14:05:47] [PASSED] 0x4680 (ALDERLAKE_S)
[14:05:47] [PASSED] 0x4682 (ALDERLAKE_S)
[14:05:47] [PASSED] 0x4688 (ALDERLAKE_S)
[14:05:47] [PASSED] 0x468A (ALDERLAKE_S)
[14:05:47] [PASSED] 0x468B (ALDERLAKE_S)
[14:05:47] [PASSED] 0x4690 (ALDERLAKE_S)
[14:05:47] [PASSED] 0x4692 (ALDERLAKE_S)
[14:05:47] [PASSED] 0x4693 (ALDERLAKE_S)
[14:05:47] [PASSED] 0x46A0 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46A1 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46A2 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46A3 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46A6 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46A8 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46AA (ALDERLAKE_P)
[14:05:47] [PASSED] 0x462A (ALDERLAKE_P)
[14:05:47] [PASSED] 0x4626 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x4628 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[14:05:47] [PASSED] 0x46B1 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46B2 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46B3 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46C0 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46C1 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46C2 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46C3 (ALDERLAKE_P)
[14:05:47] [PASSED] 0x46D0 (ALDERLAKE_N)
[14:05:47] [PASSED] 0x46D1 (ALDERLAKE_N)
[14:05:47] [PASSED] 0x46D2 (ALDERLAKE_N)
[14:05:47] [PASSED] 0x46D3 (ALDERLAKE_N)
[14:05:47] [PASSED] 0x46D4 (ALDERLAKE_N)
[14:05:47] [PASSED] 0xA721 (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA7A1 (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA7A9 (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA7AC (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA7AD (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA720 (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA7A0 (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA7A8 (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA7AA (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA7AB (ALDERLAKE_P)
[14:05:47] [PASSED] 0xA780 (ALDERLAKE_S)
[14:05:47] [PASSED] 0xA781 (ALDERLAKE_S)
[14:05:47] [PASSED] 0xA782 (ALDERLAKE_S)
[14:05:47] [PASSED] 0xA783 (ALDERLAKE_S)
[14:05:47] [PASSED] 0xA788 (ALDERLAKE_S)
[14:05:47] [PASSED] 0xA789 (ALDERLAKE_S)
[14:05:47] [PASSED] 0xA78A (ALDERLAKE_S)
[14:05:47] [PASSED] 0xA78B (ALDERLAKE_S)
[14:05:47] [PASSED] 0x4905 (DG1)
[14:05:47] [PASSED] 0x4906 (DG1)
[14:05:47] [PASSED] 0x4907 (DG1)
[14:05:47] [PASSED] 0x4908 (DG1)
[14:05:47] [PASSED] 0x4909 (DG1)
[14:05:47] [PASSED] 0x56C0 (DG2)
[14:05:47] [PASSED] 0x56C2 (DG2)
[14:05:47] [PASSED] 0x56C1 (DG2)
[14:05:47] [PASSED] 0x7D51 (METEORLAKE)
[14:05:47] [PASSED] 0x7DD1 (METEORLAKE)
[14:05:47] [PASSED] 0x7D41 (METEORLAKE)
[14:05:47] [PASSED] 0x7D67 (METEORLAKE)
[14:05:47] [PASSED] 0xB640 (METEORLAKE)
[14:05:47] [PASSED] 0x56A0 (DG2)
[14:05:47] [PASSED] 0x56A1 (DG2)
[14:05:47] [PASSED] 0x56A2 (DG2)
[14:05:47] [PASSED] 0x56BE (DG2)
[14:05:47] [PASSED] 0x56BF (DG2)
[14:05:47] [PASSED] 0x5690 (DG2)
[14:05:47] [PASSED] 0x5691 (DG2)
[14:05:47] [PASSED] 0x5692 (DG2)
[14:05:47] [PASSED] 0x56A5 (DG2)
[14:05:47] [PASSED] 0x56A6 (DG2)
[14:05:47] [PASSED] 0x56B0 (DG2)
[14:05:47] [PASSED] 0x56B1 (DG2)
[14:05:47] [PASSED] 0x56BA (DG2)
[14:05:47] [PASSED] 0x56BB (DG2)
[14:05:47] [PASSED] 0x56BC (DG2)
[14:05:47] [PASSED] 0x56BD (DG2)
[14:05:47] [PASSED] 0x5693 (DG2)
[14:05:47] [PASSED] 0x5694 (DG2)
[14:05:47] [PASSED] 0x5695 (DG2)
[14:05:47] [PASSED] 0x56A3 (DG2)
[14:05:47] [PASSED] 0x56A4 (DG2)
[14:05:47] [PASSED] 0x56B2 (DG2)
[14:05:47] [PASSED] 0x56B3 (DG2)
[14:05:47] [PASSED] 0x5696 (DG2)
[14:05:47] [PASSED] 0x5697 (DG2)
[14:05:47] [PASSED] 0xB69 (PVC)
[14:05:47] [PASSED] 0xB6E (PVC)
[14:05:47] [PASSED] 0xBD4 (PVC)
[14:05:47] [PASSED] 0xBD5 (PVC)
[14:05:47] [PASSED] 0xBD6 (PVC)
[14:05:47] [PASSED] 0xBD7 (PVC)
[14:05:47] [PASSED] 0xBD8 (PVC)
[14:05:47] [PASSED] 0xBD9 (PVC)
[14:05:47] [PASSED] 0xBDA (PVC)
[14:05:47] [PASSED] 0xBDB (PVC)
[14:05:47] [PASSED] 0xBE0 (PVC)
[14:05:47] [PASSED] 0xBE1 (PVC)
[14:05:47] [PASSED] 0xBE5 (PVC)
[14:05:47] [PASSED] 0x7D40 (METEORLAKE)
[14:05:47] [PASSED] 0x7D45 (METEORLAKE)
[14:05:47] [PASSED] 0x7D55 (METEORLAKE)
[14:05:47] [PASSED] 0x7D60 (METEORLAKE)
[14:05:47] [PASSED] 0x7DD5 (METEORLAKE)
[14:05:47] [PASSED] 0x6420 (LUNARLAKE)
[14:05:47] [PASSED] 0x64A0 (LUNARLAKE)
[14:05:47] [PASSED] 0x64B0 (LUNARLAKE)
[14:05:47] [PASSED] 0xE202 (BATTLEMAGE)
[14:05:47] [PASSED] 0xE209 (BATTLEMAGE)
[14:05:47] [PASSED] 0xE20B (BATTLEMAGE)
[14:05:47] [PASSED] 0xE20C (BATTLEMAGE)
[14:05:47] [PASSED] 0xE20D (BATTLEMAGE)
[14:05:47] [PASSED] 0xE210 (BATTLEMAGE)
[14:05:47] [PASSED] 0xE211 (BATTLEMAGE)
[14:05:47] [PASSED] 0xE212 (BATTLEMAGE)
[14:05:47] [PASSED] 0xE216 (BATTLEMAGE)
[14:05:47] [PASSED] 0xE220 (BATTLEMAGE)
[14:05:47] [PASSED] 0xE221 (BATTLEMAGE)
[14:05:47] [PASSED] 0xE222 (BATTLEMAGE)
[14:05:47] [PASSED] 0xE223 (BATTLEMAGE)
[14:05:47] [PASSED] 0xB080 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB081 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB082 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB083 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB084 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB085 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB086 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB087 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB08F (PANTHERLAKE)
[14:05:47] [PASSED] 0xB090 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB0A0 (PANTHERLAKE)
[14:05:47] [PASSED] 0xB0B0 (PANTHERLAKE)
[14:05:47] [PASSED] 0xD740 (NOVALAKE_S)
[14:05:47] [PASSED] 0xD741 (NOVALAKE_S)
[14:05:47] [PASSED] 0xD742 (NOVALAKE_S)
[14:05:47] [PASSED] 0xD743 (NOVALAKE_S)
[14:05:47] [PASSED] 0xD744 (NOVALAKE_S)
[14:05:47] [PASSED] 0xD745 (NOVALAKE_S)
[14:05:47] [PASSED] 0x674C (CRESCENTISLAND)
[14:05:47] [PASSED] 0xFD80 (PANTHERLAKE)
[14:05:47] [PASSED] 0xFD81 (PANTHERLAKE)
[14:05:47] =============== [PASSED] check_platform_desc ===============
[14:05:47] ===================== [PASSED] xe_pci ======================
[14:05:47] =================== xe_rtp (2 subtests) ====================
[14:05:47] =============== xe_rtp_process_to_sr_tests ================
[14:05:47] [PASSED] coalesce-same-reg
[14:05:47] [PASSED] no-match-no-add
[14:05:47] [PASSED] match-or
[14:05:47] [PASSED] match-or-xfail
[14:05:47] [PASSED] no-match-no-add-multiple-rules
[14:05:47] [PASSED] two-regs-two-entries
[14:05:47] [PASSED] clr-one-set-other
[14:05:47] [PASSED] set-field
[14:05:47] [PASSED] conflict-duplicate
[14:05:47] [PASSED] conflict-not-disjoint
[14:05:47] [PASSED] conflict-reg-type
[14:05:47] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[14:05:47] ================== xe_rtp_process_tests ===================
[14:05:47] [PASSED] active1
[14:05:47] [PASSED] active2
[14:05:47] [PASSED] active-inactive
[14:05:47] [PASSED] inactive-active
[14:05:47] [PASSED] inactive-1st_or_active-inactive
[14:05:47] [PASSED] inactive-2nd_or_active-inactive
[14:05:47] [PASSED] inactive-last_or_active-inactive
[14:05:47] [PASSED] inactive-no_or_active-inactive
[14:05:47] ============== [PASSED] xe_rtp_process_tests ===============
[14:05:47] ===================== [PASSED] xe_rtp ======================
[14:05:47] ==================== xe_wa (1 subtest) =====================
[14:05:47] ======================== xe_wa_gt =========================
[14:05:47] [PASSED] TIGERLAKE B0
[14:05:47] [PASSED] DG1 A0
[14:05:47] [PASSED] DG1 B0
[14:05:47] [PASSED] ALDERLAKE_S A0
[14:05:47] [PASSED] ALDERLAKE_S B0
[14:05:47] [PASSED] ALDERLAKE_S C0
[14:05:47] [PASSED] ALDERLAKE_S D0
[14:05:47] [PASSED] ALDERLAKE_P A0
[14:05:47] [PASSED] ALDERLAKE_P B0
[14:05:47] [PASSED] ALDERLAKE_P C0
[14:05:47] [PASSED] ALDERLAKE_S RPLS D0
[14:05:47] [PASSED] ALDERLAKE_P RPLU E0
[14:05:47] [PASSED] DG2 G10 C0
[14:05:47] [PASSED] DG2 G11 B1
[14:05:47] [PASSED] DG2 G12 A1
[14:05:47] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:05:47] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:05:47] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[14:05:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[14:05:47] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[14:05:47] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[14:05:47] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[14:05:47] ==================== [PASSED] xe_wa_gt =====================
[14:05:47] ====================== [PASSED] xe_wa ======================
[14:05:47] ============================================================
[14:05:47] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[14:05:47] Elapsed time: 36.072s total, 4.252s configuring, 31.353s building, 0.457s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[14:05:47] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:05:49] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:06:14] Starting KUnit Kernel (1/1)...
[14:06:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:06:15] ============ drm_test_pick_cmdline (2 subtests) ============
[14:06:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[14:06:15] =============== drm_test_pick_cmdline_named ===============
[14:06:15] [PASSED] NTSC
[14:06:15] [PASSED] NTSC-J
[14:06:15] [PASSED] PAL
[14:06:15] [PASSED] PAL-M
[14:06:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[14:06:15] ============== [PASSED] drm_test_pick_cmdline ==============
[14:06:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[14:06:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[14:06:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[14:06:15] =========== drm_validate_clone_mode (2 subtests) ===========
[14:06:15] ============== drm_test_check_in_clone_mode ===============
[14:06:15] [PASSED] in_clone_mode
[14:06:15] [PASSED] not_in_clone_mode
[14:06:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[14:06:15] =============== drm_test_check_valid_clones ===============
[14:06:15] [PASSED] not_in_clone_mode
[14:06:15] [PASSED] valid_clone
[14:06:15] [PASSED] invalid_clone
[14:06:15] =========== [PASSED] drm_test_check_valid_clones ===========
[14:06:15] ============= [PASSED] drm_validate_clone_mode =============
[14:06:15] ============= drm_validate_modeset (1 subtest) =============
[14:06:15] [PASSED] drm_test_check_connector_changed_modeset
[14:06:15] ============== [PASSED] drm_validate_modeset ===============
[14:06:15] ====== drm_test_bridge_get_current_state (2 subtests) ======
[14:06:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[14:06:15] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[14:06:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[14:06:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[14:06:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[14:06:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[14:06:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[14:06:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[14:06:15] ============== drm_bridge_alloc (2 subtests) ===============
[14:06:15] [PASSED] drm_test_drm_bridge_alloc_basic
[14:06:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[14:06:15] ================ [PASSED] drm_bridge_alloc =================
[14:06:15] ================== drm_buddy (8 subtests) ==================
[14:06:15] [PASSED] drm_test_buddy_alloc_limit
[14:06:15] [PASSED] drm_test_buddy_alloc_optimistic
[14:06:15] [PASSED] drm_test_buddy_alloc_pessimistic
[14:06:15] [PASSED] drm_test_buddy_alloc_pathological
[14:06:15] [PASSED] drm_test_buddy_alloc_contiguous
[14:06:15] [PASSED] drm_test_buddy_alloc_clear
[14:06:15] [PASSED] drm_test_buddy_alloc_range_bias
[14:06:15] [PASSED] drm_test_buddy_fragmentation_performance
[14:06:15] ==================== [PASSED] drm_buddy ====================
[14:06:15] ============= drm_cmdline_parser (40 subtests) =============
[14:06:15] [PASSED] drm_test_cmdline_force_d_only
[14:06:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:06:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:06:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:06:15] [PASSED] drm_test_cmdline_force_e_only
[14:06:15] [PASSED] drm_test_cmdline_res
[14:06:15] [PASSED] drm_test_cmdline_res_vesa
[14:06:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:06:15] [PASSED] drm_test_cmdline_res_rblank
[14:06:15] [PASSED] drm_test_cmdline_res_bpp
[14:06:15] [PASSED] drm_test_cmdline_res_refresh
[14:06:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:06:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:06:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:06:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:06:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:06:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:06:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:06:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:06:15] [PASSED] drm_test_cmdline_res_margins_force_on
[14:06:15] [PASSED] drm_test_cmdline_res_vesa_margins
[14:06:15] [PASSED] drm_test_cmdline_name
[14:06:15] [PASSED] drm_test_cmdline_name_bpp
[14:06:15] [PASSED] drm_test_cmdline_name_option
[14:06:15] [PASSED] drm_test_cmdline_name_bpp_option
[14:06:15] [PASSED] drm_test_cmdline_rotate_0
[14:06:15] [PASSED] drm_test_cmdline_rotate_90
[14:06:15] [PASSED] drm_test_cmdline_rotate_180
[14:06:15] [PASSED] drm_test_cmdline_rotate_270
[14:06:15] [PASSED] drm_test_cmdline_hmirror
[14:06:15] [PASSED] drm_test_cmdline_vmirror
[14:06:15] [PASSED] drm_test_cmdline_margin_options
[14:06:15] [PASSED] drm_test_cmdline_multiple_options
[14:06:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:06:15] [PASSED] drm_test_cmdline_extra_and_option
[14:06:15] [PASSED] drm_test_cmdline_freestanding_options
[14:06:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:06:15] [PASSED] drm_test_cmdline_panel_orientation
[14:06:15] ================ drm_test_cmdline_invalid =================
[14:06:15] [PASSED] margin_only
[14:06:15] [PASSED] interlace_only
[14:06:15] [PASSED] res_missing_x
[14:06:15] [PASSED] res_missing_y
[14:06:15] [PASSED] res_bad_y
[14:06:15] [PASSED] res_missing_y_bpp
[14:06:15] [PASSED] res_bad_bpp
[14:06:15] [PASSED] res_bad_refresh
[14:06:15] [PASSED] res_bpp_refresh_force_on_off
[14:06:15] [PASSED] res_invalid_mode
[14:06:15] [PASSED] res_bpp_wrong_place_mode
[14:06:15] [PASSED] name_bpp_refresh
[14:06:15] [PASSED] name_refresh
[14:06:15] [PASSED] name_refresh_wrong_mode
[14:06:15] [PASSED] name_refresh_invalid_mode
[14:06:15] [PASSED] rotate_multiple
[14:06:15] [PASSED] rotate_invalid_val
[14:06:15] [PASSED] rotate_truncated
[14:06:15] [PASSED] invalid_option
[14:06:15] [PASSED] invalid_tv_option
[14:06:15] [PASSED] truncated_tv_option
[14:06:15] ============ [PASSED] drm_test_cmdline_invalid =============
[14:06:15] =============== drm_test_cmdline_tv_options ===============
[14:06:15] [PASSED] NTSC
[14:06:15] [PASSED] NTSC_443
[14:06:15] [PASSED] NTSC_J
[14:06:15] [PASSED] PAL
[14:06:15] [PASSED] PAL_M
[14:06:15] [PASSED] PAL_N
[14:06:15] [PASSED] SECAM
[14:06:15] [PASSED] MONO_525
[14:06:15] [PASSED] MONO_625
[14:06:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:06:15] =============== [PASSED] drm_cmdline_parser ================
[14:06:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[14:06:15] [PASSED] drm_test_connector_hdmi_init_valid
[14:06:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[14:06:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[14:06:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[14:06:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[14:06:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[14:06:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[14:06:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[14:06:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:06:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[14:06:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[14:06:15] [PASSED] supported_formats=0x3 yuv420_allowed=1
[14:06:15] [PASSED] supported_formats=0x3 yuv420_allowed=0
[14:06:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:06:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[14:06:15] [PASSED] drm_test_connector_hdmi_init_null_product
[14:06:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[14:06:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[14:06:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[14:06:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[14:06:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[14:06:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[14:06:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[14:06:15] ========= drm_test_connector_hdmi_init_type_valid =========
[14:06:15] [PASSED] HDMI-A
[14:06:15] [PASSED] HDMI-B
[14:06:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[14:06:15] ======== drm_test_connector_hdmi_init_type_invalid ========
[14:06:15] [PASSED] Unknown
[14:06:15] [PASSED] VGA
[14:06:15] [PASSED] DVI-I
[14:06:15] [PASSED] DVI-D
[14:06:15] [PASSED] DVI-A
[14:06:15] [PASSED] Composite
[14:06:15] [PASSED] SVIDEO
[14:06:15] [PASSED] LVDS
[14:06:15] [PASSED] Component
[14:06:15] [PASSED] DIN
[14:06:15] [PASSED] DP
[14:06:15] [PASSED] TV
[14:06:15] [PASSED] eDP
[14:06:15] [PASSED] Virtual
[14:06:15] [PASSED] DSI
[14:06:15] [PASSED] DPI
[14:06:15] [PASSED] Writeback
[14:06:15] [PASSED] SPI
[14:06:15] [PASSED] USB
[14:06:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[14:06:15] ============ [PASSED] drmm_connector_hdmi_init =============
[14:06:15] ============= drmm_connector_init (3 subtests) =============
[14:06:15] [PASSED] drm_test_drmm_connector_init
[14:06:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[14:06:15] ========= drm_test_drmm_connector_init_type_valid =========
[14:06:15] [PASSED] Unknown
[14:06:15] [PASSED] VGA
[14:06:15] [PASSED] DVI-I
[14:06:15] [PASSED] DVI-D
[14:06:15] [PASSED] DVI-A
[14:06:15] [PASSED] Composite
[14:06:15] [PASSED] SVIDEO
[14:06:15] [PASSED] LVDS
[14:06:15] [PASSED] Component
[14:06:15] [PASSED] DIN
[14:06:15] [PASSED] DP
[14:06:15] [PASSED] HDMI-A
[14:06:15] [PASSED] HDMI-B
[14:06:15] [PASSED] TV
[14:06:15] [PASSED] eDP
[14:06:15] [PASSED] Virtual
[14:06:15] [PASSED] DSI
[14:06:15] [PASSED] DPI
[14:06:15] [PASSED] Writeback
[14:06:15] [PASSED] SPI
[14:06:15] [PASSED] USB
[14:06:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[14:06:15] =============== [PASSED] drmm_connector_init ===============
[14:06:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_init
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[14:06:15] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[14:06:15] [PASSED] Unknown
[14:06:15] [PASSED] VGA
[14:06:15] [PASSED] DVI-I
[14:06:15] [PASSED] DVI-D
[14:06:15] [PASSED] DVI-A
[14:06:15] [PASSED] Composite
[14:06:15] [PASSED] SVIDEO
[14:06:15] [PASSED] LVDS
[14:06:15] [PASSED] Component
[14:06:15] [PASSED] DIN
[14:06:15] [PASSED] DP
[14:06:15] [PASSED] HDMI-A
[14:06:15] [PASSED] HDMI-B
[14:06:15] [PASSED] TV
[14:06:15] [PASSED] eDP
[14:06:15] [PASSED] Virtual
[14:06:15] [PASSED] DSI
[14:06:15] [PASSED] DPI
[14:06:15] [PASSED] Writeback
[14:06:15] [PASSED] SPI
[14:06:15] [PASSED] USB
[14:06:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[14:06:15] ======== drm_test_drm_connector_dynamic_init_name =========
[14:06:15] [PASSED] Unknown
[14:06:15] [PASSED] VGA
[14:06:15] [PASSED] DVI-I
[14:06:15] [PASSED] DVI-D
[14:06:15] [PASSED] DVI-A
[14:06:15] [PASSED] Composite
[14:06:15] [PASSED] SVIDEO
[14:06:15] [PASSED] LVDS
[14:06:15] [PASSED] Component
[14:06:15] [PASSED] DIN
[14:06:15] [PASSED] DP
[14:06:15] [PASSED] HDMI-A
[14:06:15] [PASSED] HDMI-B
[14:06:15] [PASSED] TV
[14:06:15] [PASSED] eDP
[14:06:15] [PASSED] Virtual
[14:06:15] [PASSED] DSI
[14:06:15] [PASSED] DPI
[14:06:15] [PASSED] Writeback
[14:06:15] [PASSED] SPI
[14:06:15] [PASSED] USB
[14:06:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[14:06:15] =========== [PASSED] drm_connector_dynamic_init ============
[14:06:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[14:06:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[14:06:15] ======= drm_connector_dynamic_register (7 subtests) ========
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[14:06:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[14:06:15] ========= [PASSED] drm_connector_dynamic_register ==========
[14:06:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[14:06:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[14:06:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[14:06:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[14:06:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[14:06:15] ========== drm_test_get_tv_mode_from_name_valid ===========
[14:06:15] [PASSED] NTSC
[14:06:15] [PASSED] NTSC-443
[14:06:15] [PASSED] NTSC-J
[14:06:15] [PASSED] PAL
[14:06:15] [PASSED] PAL-M
[14:06:15] [PASSED] PAL-N
[14:06:15] [PASSED] SECAM
[14:06:15] [PASSED] Mono
[14:06:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:06:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:06:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:06:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[14:06:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[14:06:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[14:06:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[14:06:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[14:06:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[14:06:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[14:06:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[14:06:15] [PASSED] VIC 96
[14:06:15] [PASSED] VIC 97
[14:06:15] [PASSED] VIC 101
[14:06:15] [PASSED] VIC 102
[14:06:15] [PASSED] VIC 106
[14:06:15] [PASSED] VIC 107
[14:06:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[14:06:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[14:06:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[14:06:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[14:06:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[14:06:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[14:06:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[14:06:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[14:06:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[14:06:15] [PASSED] Automatic
[14:06:15] [PASSED] Full
[14:06:15] [PASSED] Limited 16:235
[14:06:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[14:06:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[14:06:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[14:06:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[14:06:15] === drm_test_drm_hdmi_connector_get_output_format_name ====
[14:06:15] [PASSED] RGB
[14:06:15] [PASSED] YUV 4:2:0
[14:06:15] [PASSED] YUV 4:2:2
[14:06:15] [PASSED] YUV 4:4:4
[14:06:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[14:06:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[14:06:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[14:06:15] ============= drm_damage_helper (21 subtests) ==============
[14:06:15] [PASSED] drm_test_damage_iter_no_damage
[14:06:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:06:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:06:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:06:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:06:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:06:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:06:15] [PASSED] drm_test_damage_iter_simple_damage
[14:06:15] [PASSED] drm_test_damage_iter_single_damage
[14:06:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:06:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:06:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:06:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:06:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:06:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:06:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:06:15] [PASSED] drm_test_damage_iter_damage
[14:06:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:06:15] [PASSED] drm_test_damage_iter_damage_one_outside
[14:06:15] [PASSED] drm_test_damage_iter_damage_src_moved
[14:06:15] [PASSED] drm_test_damage_iter_damage_not_visible
[14:06:15] ================ [PASSED] drm_damage_helper ================
[14:06:15] ============== drm_dp_mst_helper (3 subtests) ==============
[14:06:15] ============== drm_test_dp_mst_calc_pbn_mode ==============
[14:06:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:06:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:06:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:06:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:06:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:06:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:06:15] ============== drm_test_dp_mst_calc_pbn_div ===============
[14:06:15] [PASSED] Link rate 2000000 lane count 4
[14:06:15] [PASSED] Link rate 2000000 lane count 2
[14:06:15] [PASSED] Link rate 2000000 lane count 1
[14:06:15] [PASSED] Link rate 1350000 lane count 4
[14:06:15] [PASSED] Link rate 1350000 lane count 2
[14:06:15] [PASSED] Link rate 1350000 lane count 1
[14:06:15] [PASSED] Link rate 1000000 lane count 4
[14:06:15] [PASSED] Link rate 1000000 lane count 2
[14:06:15] [PASSED] Link rate 1000000 lane count 1
[14:06:15] [PASSED] Link rate 810000 lane count 4
[14:06:15] [PASSED] Link rate 810000 lane count 2
[14:06:15] [PASSED] Link rate 810000 lane count 1
[14:06:15] [PASSED] Link rate 540000 lane count 4
[14:06:15] [PASSED] Link rate 540000 lane count 2
[14:06:15] [PASSED] Link rate 540000 lane count 1
[14:06:15] [PASSED] Link rate 270000 lane count 4
[14:06:15] [PASSED] Link rate 270000 lane count 2
[14:06:15] [PASSED] Link rate 270000 lane count 1
[14:06:15] [PASSED] Link rate 162000 lane count 4
[14:06:15] [PASSED] Link rate 162000 lane count 2
[14:06:15] [PASSED] Link rate 162000 lane count 1
[14:06:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[14:06:15] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[14:06:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:06:15] [PASSED] DP_POWER_UP_PHY with port number
[14:06:15] [PASSED] DP_POWER_DOWN_PHY with port number
[14:06:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:06:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:06:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:06:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:06:15] [PASSED] DP_QUERY_PAYLOAD with port number
[14:06:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:06:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:06:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:06:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:06:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:06:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:06:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:06:15] [PASSED] DP_REMOTE_I2C_READ with port number
[14:06:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:06:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:06:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:06:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:06:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:06:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:06:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:06:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:06:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:06:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:06:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:06:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:06:15] ================ [PASSED] drm_dp_mst_helper ================
[14:06:15] ================== drm_exec (7 subtests) ===================
[14:06:15] [PASSED] sanitycheck
[14:06:15] [PASSED] test_lock
[14:06:15] [PASSED] test_lock_unlock
[14:06:15] [PASSED] test_duplicates
[14:06:15] [PASSED] test_prepare
[14:06:15] [PASSED] test_prepare_array
[14:06:15] [PASSED] test_multiple_loops
[14:06:15] ==================== [PASSED] drm_exec =====================
[14:06:15] =========== drm_format_helper_test (17 subtests) ===========
[14:06:15] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:06:15] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:06:15] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:06:15] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:06:15] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:06:15] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:06:15] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:06:15] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[14:06:15] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:06:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:06:15] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:06:15] ============== drm_test_fb_xrgb8888_to_mono ===============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:06:15] ==================== drm_test_fb_swab =====================
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ================ [PASSED] drm_test_fb_swab =================
[14:06:15] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[14:06:15] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[14:06:15] [PASSED] single_pixel_source_buffer
[14:06:15] [PASSED] single_pixel_clip_rectangle
[14:06:15] [PASSED] well_known_colors
[14:06:15] [PASSED] destination_pitch
[14:06:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[14:06:15] ================= drm_test_fb_clip_offset =================
[14:06:15] [PASSED] pass through
[14:06:15] [PASSED] horizontal offset
[14:06:15] [PASSED] vertical offset
[14:06:15] [PASSED] horizontal and vertical offset
[14:06:15] [PASSED] horizontal offset (custom pitch)
[14:06:15] [PASSED] vertical offset (custom pitch)
[14:06:15] [PASSED] horizontal and vertical offset (custom pitch)
[14:06:15] ============= [PASSED] drm_test_fb_clip_offset =============
[14:06:15] =================== drm_test_fb_memcpy ====================
[14:06:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:06:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:06:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:06:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:06:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:06:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:06:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:06:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:06:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:06:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:06:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:06:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:06:15] =============== [PASSED] drm_test_fb_memcpy ================
[14:06:15] ============= [PASSED] drm_format_helper_test ==============
[14:06:15] ================= drm_format (18 subtests) =================
[14:06:15] [PASSED] drm_test_format_block_width_invalid
[14:06:15] [PASSED] drm_test_format_block_width_one_plane
[14:06:15] [PASSED] drm_test_format_block_width_two_plane
[14:06:15] [PASSED] drm_test_format_block_width_three_plane
[14:06:15] [PASSED] drm_test_format_block_width_tiled
[14:06:15] [PASSED] drm_test_format_block_height_invalid
[14:06:15] [PASSED] drm_test_format_block_height_one_plane
[14:06:15] [PASSED] drm_test_format_block_height_two_plane
[14:06:15] [PASSED] drm_test_format_block_height_three_plane
[14:06:15] [PASSED] drm_test_format_block_height_tiled
[14:06:15] [PASSED] drm_test_format_min_pitch_invalid
[14:06:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:06:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:06:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:06:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:06:15] [PASSED] drm_test_format_min_pitch_two_plane
[14:06:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:06:15] [PASSED] drm_test_format_min_pitch_tiled
[14:06:15] =================== [PASSED] drm_format ====================
[14:06:15] ============== drm_framebuffer (10 subtests) ===============
[14:06:15] ========== drm_test_framebuffer_check_src_coords ==========
[14:06:15] [PASSED] Success: source fits into fb
[14:06:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[14:06:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[14:06:15] [PASSED] Fail: overflowing fb with source width
[14:06:15] [PASSED] Fail: overflowing fb with source height
[14:06:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[14:06:15] [PASSED] drm_test_framebuffer_cleanup
[14:06:15] =============== drm_test_framebuffer_create ===============
[14:06:15] [PASSED] ABGR8888 normal sizes
[14:06:15] [PASSED] ABGR8888 max sizes
[14:06:15] [PASSED] ABGR8888 pitch greater than min required
[14:06:15] [PASSED] ABGR8888 pitch less than min required
[14:06:15] [PASSED] ABGR8888 Invalid width
[14:06:15] [PASSED] ABGR8888 Invalid buffer handle
[14:06:15] [PASSED] No pixel format
[14:06:15] [PASSED] ABGR8888 Width 0
[14:06:15] [PASSED] ABGR8888 Height 0
[14:06:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:06:15] [PASSED] ABGR8888 Large buffer offset
[14:06:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[14:06:15] [PASSED] ABGR8888 Invalid flag
[14:06:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:06:15] [PASSED] ABGR8888 Valid buffer modifier
[14:06:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:06:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:06:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:06:15] [PASSED] NV12 Normal sizes
[14:06:15] [PASSED] NV12 Max sizes
[14:06:15] [PASSED] NV12 Invalid pitch
[14:06:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:06:15] [PASSED] NV12 different modifier per-plane
[14:06:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:06:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:06:15] [PASSED] NV12 Modifier for inexistent plane
[14:06:15] [PASSED] NV12 Handle for inexistent plane
[14:06:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:06:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:06:15] [PASSED] YVU420 Normal sizes
[14:06:15] [PASSED] YVU420 Max sizes
[14:06:15] [PASSED] YVU420 Invalid pitch
[14:06:15] [PASSED] YVU420 Different pitches
[14:06:15] [PASSED] YVU420 Different buffer offsets/pitches
[14:06:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:06:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:06:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:06:15] [PASSED] YVU420 Valid modifier
[14:06:15] [PASSED] YVU420 Different modifiers per plane
[14:06:15] [PASSED] YVU420 Modifier for inexistent plane
[14:06:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[14:06:15] [PASSED] X0L2 Normal sizes
[14:06:15] [PASSED] X0L2 Max sizes
[14:06:15] [PASSED] X0L2 Invalid pitch
[14:06:15] [PASSED] X0L2 Pitch greater than minimum required
[14:06:15] [PASSED] X0L2 Handle for inexistent plane
[14:06:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:06:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:06:15] [PASSED] X0L2 Valid modifier
[14:06:15] [PASSED] X0L2 Modifier for inexistent plane
[14:06:15] =========== [PASSED] drm_test_framebuffer_create ===========
[14:06:15] [PASSED] drm_test_framebuffer_free
[14:06:15] [PASSED] drm_test_framebuffer_init
[14:06:15] [PASSED] drm_test_framebuffer_init_bad_format
[14:06:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[14:06:15] [PASSED] drm_test_framebuffer_lookup
[14:06:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[14:06:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[14:06:15] ================= [PASSED] drm_framebuffer =================
[14:06:15] ================ drm_gem_shmem (8 subtests) ================
[14:06:15] [PASSED] drm_gem_shmem_test_obj_create
[14:06:15] [PASSED] drm_gem_shmem_test_obj_create_private
[14:06:15] [PASSED] drm_gem_shmem_test_pin_pages
[14:06:15] [PASSED] drm_gem_shmem_test_vmap
[14:06:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[14:06:15] [PASSED] drm_gem_shmem_test_get_sg_table
[14:06:15] [PASSED] drm_gem_shmem_test_madvise
[14:06:15] [PASSED] drm_gem_shmem_test_purge
[14:06:15] ================== [PASSED] drm_gem_shmem ==================
[14:06:15] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[14:06:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[14:06:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[14:06:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[14:06:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[14:06:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[14:06:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[14:06:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[14:06:15] [PASSED] Automatic
[14:06:15] [PASSED] Full
[14:06:15] [PASSED] Limited 16:235
[14:06:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[14:06:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[14:06:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[14:06:15] [PASSED] drm_test_check_disable_connector
[14:06:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[14:06:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[14:06:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[14:06:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[14:06:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[14:06:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[14:06:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[14:06:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[14:06:15] [PASSED] drm_test_check_output_bpc_dvi
[14:06:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[14:06:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[14:06:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[14:06:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[14:06:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[14:06:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[14:06:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[14:06:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[14:06:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[14:06:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[14:06:15] [PASSED] drm_test_check_broadcast_rgb_value
[14:06:15] [PASSED] drm_test_check_bpc_8_value
[14:06:15] [PASSED] drm_test_check_bpc_10_value
[14:06:15] [PASSED] drm_test_check_bpc_12_value
[14:06:15] [PASSED] drm_test_check_format_value
[14:06:15] [PASSED] drm_test_check_tmds_char_value
[14:06:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[14:06:15] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[14:06:15] [PASSED] drm_test_check_mode_valid
[14:06:15] [PASSED] drm_test_check_mode_valid_reject
[14:06:15] [PASSED] drm_test_check_mode_valid_reject_rate
[14:06:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[14:06:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[14:06:15] ================= drm_managed (2 subtests) =================
[14:06:15] [PASSED] drm_test_managed_release_action
[14:06:15] [PASSED] drm_test_managed_run_action
[14:06:15] =================== [PASSED] drm_managed ===================
[14:06:15] =================== drm_mm (6 subtests) ====================
[14:06:15] [PASSED] drm_test_mm_init
[14:06:15] [PASSED] drm_test_mm_debug
[14:06:15] [PASSED] drm_test_mm_align32
[14:06:15] [PASSED] drm_test_mm_align64
[14:06:15] [PASSED] drm_test_mm_lowest
[14:06:15] [PASSED] drm_test_mm_highest
[14:06:15] ===================== [PASSED] drm_mm ======================
[14:06:15] ============= drm_modes_analog_tv (5 subtests) =============
[14:06:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[14:06:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:06:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:06:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:06:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:06:15] =============== [PASSED] drm_modes_analog_tv ===============
[14:06:15] ============== drm_plane_helper (2 subtests) ===============
[14:06:15] =============== drm_test_check_plane_state ================
[14:06:15] [PASSED] clipping_simple
[14:06:15] [PASSED] clipping_rotate_reflect
[14:06:15] [PASSED] positioning_simple
[14:06:15] [PASSED] upscaling
[14:06:15] [PASSED] downscaling
[14:06:15] [PASSED] rounding1
[14:06:15] [PASSED] rounding2
[14:06:15] [PASSED] rounding3
[14:06:15] [PASSED] rounding4
[14:06:15] =========== [PASSED] drm_test_check_plane_state ============
[14:06:15] =========== drm_test_check_invalid_plane_state ============
[14:06:15] [PASSED] positioning_invalid
[14:06:15] [PASSED] upscaling_invalid
[14:06:15] [PASSED] downscaling_invalid
[14:06:15] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:06:15] ================ [PASSED] drm_plane_helper =================
[14:06:15] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[14:06:15] ====== drm_test_connector_helper_tv_get_modes_check =======
[14:06:15] [PASSED] None
[14:06:15] [PASSED] PAL
[14:06:15] [PASSED] NTSC
[14:06:15] [PASSED] Both, NTSC Default
[14:06:15] [PASSED] Both, PAL Default
[14:06:15] [PASSED] Both, NTSC Default, with PAL on command-line
[14:06:15] [PASSED] Both, PAL Default, with NTSC on command-line
[14:06:15] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:06:15] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:06:15] ================== drm_rect (9 subtests) ===================
[14:06:15] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:06:15] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:06:15] [PASSED] drm_test_rect_clip_scaled_clipped
[14:06:15] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:06:15] ================= drm_test_rect_intersect =================
[14:06:15] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:06:15] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:06:15] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:06:15] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:06:15] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:06:15] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:06:15] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:06:15] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:06:15] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:06:15] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:06:15] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:06:15] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:06:15] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:06:15] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:06:15] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:06:15] ============= [PASSED] drm_test_rect_intersect =============
[14:06:15] ================ drm_test_rect_calc_hscale ================
[14:06:15] [PASSED] normal use
[14:06:15] [PASSED] out of max range
[14:06:15] [PASSED] out of min range
[14:06:15] [PASSED] zero dst
[14:06:15] [PASSED] negative src
[14:06:15] [PASSED] negative dst
[14:06:15] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:06:15] ================ drm_test_rect_calc_vscale ================
[14:06:15] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[14:06:15] [PASSED] out of max range
[14:06:15] [PASSED] out of min range
[14:06:15] [PASSED] zero dst
[14:06:15] [PASSED] negative src
[14:06:15] [PASSED] negative dst
[14:06:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:06:15] ================== drm_test_rect_rotate ===================
[14:06:15] [PASSED] reflect-x
[14:06:15] [PASSED] reflect-y
[14:06:15] [PASSED] rotate-0
[14:06:15] [PASSED] rotate-90
[14:06:15] [PASSED] rotate-180
[14:06:15] [PASSED] rotate-270
[14:06:15] ============== [PASSED] drm_test_rect_rotate ===============
[14:06:15] ================ drm_test_rect_rotate_inv =================
[14:06:15] [PASSED] reflect-x
[14:06:15] [PASSED] reflect-y
[14:06:15] [PASSED] rotate-0
[14:06:15] [PASSED] rotate-90
[14:06:15] [PASSED] rotate-180
[14:06:15] [PASSED] rotate-270
[14:06:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[14:06:15] ==================== [PASSED] drm_rect =====================
[14:06:15] ============ drm_sysfb_modeset_test (1 subtest) ============
[14:06:15] ============ drm_test_sysfb_build_fourcc_list =============
[14:06:15] [PASSED] no native formats
[14:06:15] [PASSED] XRGB8888 as native format
[14:06:15] [PASSED] remove duplicates
[14:06:15] [PASSED] convert alpha formats
[14:06:15] [PASSED] random formats
[14:06:15] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[14:06:15] ============= [PASSED] drm_sysfb_modeset_test ==============
[14:06:15] ================== drm_fixp (2 subtests) ===================
[14:06:15] [PASSED] drm_test_int2fixp
[14:06:15] [PASSED] drm_test_sm2fixp
[14:06:15] ==================== [PASSED] drm_fixp =====================
[14:06:15] ============================================================
[14:06:15] Testing complete. Ran 624 tests: passed: 624
[14:06:15] Elapsed time: 27.693s total, 1.711s configuring, 25.561s building, 0.392s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[14:06:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:06:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:06:26] Starting KUnit Kernel (1/1)...
[14:06:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:06:26] ================= ttm_device (5 subtests) ==================
[14:06:26] [PASSED] ttm_device_init_basic
[14:06:26] [PASSED] ttm_device_init_multiple
[14:06:26] [PASSED] ttm_device_fini_basic
[14:06:26] [PASSED] ttm_device_init_no_vma_man
[14:06:26] ================== ttm_device_init_pools ==================
[14:06:26] [PASSED] No DMA allocations, no DMA32 required
[14:06:26] [PASSED] DMA allocations, DMA32 required
[14:06:26] [PASSED] No DMA allocations, DMA32 required
[14:06:26] [PASSED] DMA allocations, no DMA32 required
[14:06:26] ============== [PASSED] ttm_device_init_pools ==============
[14:06:26] =================== [PASSED] ttm_device ====================
[14:06:26] ================== ttm_pool (8 subtests) ===================
[14:06:26] ================== ttm_pool_alloc_basic ===================
[14:06:26] [PASSED] One page
[14:06:26] [PASSED] More than one page
[14:06:26] [PASSED] Above the allocation limit
[14:06:26] [PASSED] One page, with coherent DMA mappings enabled
[14:06:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:06:26] ============== [PASSED] ttm_pool_alloc_basic ===============
[14:06:26] ============== ttm_pool_alloc_basic_dma_addr ==============
[14:06:26] [PASSED] One page
[14:06:26] [PASSED] More than one page
[14:06:26] [PASSED] Above the allocation limit
[14:06:26] [PASSED] One page, with coherent DMA mappings enabled
[14:06:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:06:26] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[14:06:26] [PASSED] ttm_pool_alloc_order_caching_match
[14:06:26] [PASSED] ttm_pool_alloc_caching_mismatch
[14:06:26] [PASSED] ttm_pool_alloc_order_mismatch
[14:06:26] [PASSED] ttm_pool_free_dma_alloc
[14:06:26] [PASSED] ttm_pool_free_no_dma_alloc
[14:06:26] [PASSED] ttm_pool_fini_basic
[14:06:26] ==================== [PASSED] ttm_pool =====================
[14:06:26] ================ ttm_resource (8 subtests) =================
[14:06:26] ================= ttm_resource_init_basic =================
[14:06:26] [PASSED] Init resource in TTM_PL_SYSTEM
[14:06:26] [PASSED] Init resource in TTM_PL_VRAM
[14:06:26] [PASSED] Init resource in a private placement
[14:06:26] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[14:06:26] ============= [PASSED] ttm_resource_init_basic =============
[14:06:26] [PASSED] ttm_resource_init_pinned
[14:06:26] [PASSED] ttm_resource_fini_basic
[14:06:26] [PASSED] ttm_resource_manager_init_basic
[14:06:26] [PASSED] ttm_resource_manager_usage_basic
[14:06:26] [PASSED] ttm_resource_manager_set_used_basic
[14:06:26] [PASSED] ttm_sys_man_alloc_basic
[14:06:26] [PASSED] ttm_sys_man_free_basic
[14:06:26] ================== [PASSED] ttm_resource ===================
[14:06:26] =================== ttm_tt (15 subtests) ===================
[14:06:26] ==================== ttm_tt_init_basic ====================
[14:06:26] [PASSED] Page-aligned size
[14:06:26] [PASSED] Extra pages requested
[14:06:26] ================ [PASSED] ttm_tt_init_basic ================
[14:06:26] [PASSED] ttm_tt_init_misaligned
[14:06:26] [PASSED] ttm_tt_fini_basic
[14:06:26] [PASSED] ttm_tt_fini_sg
[14:06:26] [PASSED] ttm_tt_fini_shmem
[14:06:26] [PASSED] ttm_tt_create_basic
[14:06:26] [PASSED] ttm_tt_create_invalid_bo_type
[14:06:26] [PASSED] ttm_tt_create_ttm_exists
[14:06:26] [PASSED] ttm_tt_create_failed
[14:06:26] [PASSED] ttm_tt_destroy_basic
[14:06:26] [PASSED] ttm_tt_populate_null_ttm
[14:06:26] [PASSED] ttm_tt_populate_populated_ttm
[14:06:26] [PASSED] ttm_tt_unpopulate_basic
[14:06:26] [PASSED] ttm_tt_unpopulate_empty_ttm
[14:06:26] [PASSED] ttm_tt_swapin_basic
[14:06:26] ===================== [PASSED] ttm_tt ======================
[14:06:26] =================== ttm_bo (14 subtests) ===================
[14:06:26] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[14:06:26] [PASSED] Cannot be interrupted and sleeps
[14:06:26] [PASSED] Cannot be interrupted, locks straight away
[14:06:26] [PASSED] Can be interrupted, sleeps
[14:06:26] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[14:06:26] [PASSED] ttm_bo_reserve_locked_no_sleep
[14:06:26] [PASSED] ttm_bo_reserve_no_wait_ticket
[14:06:26] [PASSED] ttm_bo_reserve_double_resv
[14:06:26] [PASSED] ttm_bo_reserve_interrupted
[14:06:26] [PASSED] ttm_bo_reserve_deadlock
[14:06:26] [PASSED] ttm_bo_unreserve_basic
[14:06:26] [PASSED] ttm_bo_unreserve_pinned
[14:06:26] [PASSED] ttm_bo_unreserve_bulk
[14:06:26] [PASSED] ttm_bo_fini_basic
[14:06:26] [PASSED] ttm_bo_fini_shared_resv
[14:06:26] [PASSED] ttm_bo_pin_basic
[14:06:26] [PASSED] ttm_bo_pin_unpin_resource
[14:06:26] [PASSED] ttm_bo_multiple_pin_one_unpin
[14:06:26] ===================== [PASSED] ttm_bo ======================
[14:06:26] ============== ttm_bo_validate (21 subtests) ===============
[14:06:26] ============== ttm_bo_init_reserved_sys_man ===============
[14:06:26] [PASSED] Buffer object for userspace
[14:06:26] [PASSED] Kernel buffer object
[14:06:26] [PASSED] Shared buffer object
[14:06:26] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[14:06:26] ============== ttm_bo_init_reserved_mock_man ==============
[14:06:26] [PASSED] Buffer object for userspace
[14:06:26] [PASSED] Kernel buffer object
[14:06:26] [PASSED] Shared buffer object
[14:06:26] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[14:06:26] [PASSED] ttm_bo_init_reserved_resv
[14:06:26] ================== ttm_bo_validate_basic ==================
[14:06:26] [PASSED] Buffer object for userspace
[14:06:26] [PASSED] Kernel buffer object
[14:06:26] [PASSED] Shared buffer object
[14:06:26] ============== [PASSED] ttm_bo_validate_basic ==============
[14:06:26] [PASSED] ttm_bo_validate_invalid_placement
[14:06:26] ============= ttm_bo_validate_same_placement ==============
[14:06:26] [PASSED] System manager
[14:06:26] [PASSED] VRAM manager
[14:06:26] ========= [PASSED] ttm_bo_validate_same_placement ==========
[14:06:26] [PASSED] ttm_bo_validate_failed_alloc
[14:06:26] [PASSED] ttm_bo_validate_pinned
[14:06:26] [PASSED] ttm_bo_validate_busy_placement
[14:06:26] ================ ttm_bo_validate_multihop =================
[14:06:26] [PASSED] Buffer object for userspace
[14:06:26] [PASSED] Kernel buffer object
[14:06:26] [PASSED] Shared buffer object
[14:06:26] ============ [PASSED] ttm_bo_validate_multihop =============
[14:06:26] ========== ttm_bo_validate_no_placement_signaled ==========
[14:06:26] [PASSED] Buffer object in system domain, no page vector
[14:06:26] [PASSED] Buffer object in system domain with an existing page vector
[14:06:26] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[14:06:26] ======== ttm_bo_validate_no_placement_not_signaled ========
[14:06:26] [PASSED] Buffer object for userspace
[14:06:26] [PASSED] Kernel buffer object
[14:06:26] [PASSED] Shared buffer object
[14:06:26] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[14:06:26] [PASSED] ttm_bo_validate_move_fence_signaled
[14:06:26] ========= ttm_bo_validate_move_fence_not_signaled =========
[14:06:26] [PASSED] Waits for GPU
[14:06:26] [PASSED] Tries to lock straight away
[14:06:26] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[14:06:26] [PASSED] ttm_bo_validate_happy_evict
[14:06:26] [PASSED] ttm_bo_validate_all_pinned_evict
[14:06:26] [PASSED] ttm_bo_validate_allowed_only_evict
[14:06:26] [PASSED] ttm_bo_validate_deleted_evict
[14:06:26] [PASSED] ttm_bo_validate_busy_domain_evict
[14:06:26] [PASSED] ttm_bo_validate_evict_gutting
[14:06:26] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[14:06:26] ================= [PASSED] ttm_bo_validate =================
[14:06:26] ============================================================
[14:06:26] Testing complete. Ran 101 tests: passed: 101
[14:06:26] Elapsed time: 11.176s total, 1.674s configuring, 9.285s building, 0.184s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 21+ messages in thread* ✗ CI.checksparse: warning for drm/i915/display: Enable system cache support for FBC (rev2)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (4 preceding siblings ...)
2025-11-27 14:06 ` ✓ CI.KUnit: success " Patchwork
@ 2025-11-27 14:21 ` Patchwork
2025-11-27 15:27 ` ✗ Xe.CI.BAT: failure " Patchwork
` (6 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-27 14:21 UTC (permalink / raw)
To: Govindapillai, Vinod; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev2)
URL : https://patchwork.freedesktop.org/series/157944/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 943d0e69375e5a9030238a697f7d850af0549000
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_casf.c:147:21: error: too long token expansion
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_lt_phy.c:1935:35: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1931:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1932:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1933:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1998:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1999:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2000:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2020:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2021:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2022:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 21+ messages in thread* ✗ Xe.CI.BAT: failure for drm/i915/display: Enable system cache support for FBC (rev2)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (5 preceding siblings ...)
2025-11-27 14:21 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-11-27 15:27 ` Patchwork
2025-11-27 16:15 ` ✗ Xe.CI.Full: " Patchwork
` (5 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-27 15:27 UTC (permalink / raw)
To: Govindapillai, Vinod; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 4906 bytes --]
== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev2)
URL : https://patchwork.freedesktop.org/series/157944/
State : failure
== Summary ==
CI Bug Log - changes from xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884_BAT -> xe-pw-157944v2_BAT
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-157944v2_BAT absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-157944v2_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-157944v2_BAT:
### IGT changes ###
#### Possible regressions ####
* igt@xe_module_load@load:
- bat-ptl-2: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-ptl-2/igt@xe_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-ptl-2/igt@xe_module_load@load.html
- bat-dg2-oem2: [PASS][3] -> [ABORT][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-dg2-oem2/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-dg2-oem2/igt@xe_module_load@load.html
- bat-ptl-1: [PASS][5] -> [ABORT][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-ptl-1/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-ptl-1/igt@xe_module_load@load.html
- bat-lnl-1: [PASS][7] -> [ABORT][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-lnl-1/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-lnl-1/igt@xe_module_load@load.html
- bat-bmg-2: [PASS][9] -> [ABORT][10]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-bmg-2/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-bmg-2/igt@xe_module_load@load.html
- bat-bmg-3: [PASS][11] -> [ABORT][12]
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-bmg-3/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-bmg-3/igt@xe_module_load@load.html
- bat-bmg-1: [PASS][13] -> [ABORT][14]
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-bmg-1/igt@xe_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-bmg-1/igt@xe_module_load@load.html
- bat-adlp-7: [PASS][15] -> [ABORT][16]
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-adlp-7/igt@xe_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-adlp-7/igt@xe_module_load@load.html
- bat-lnl-2: [PASS][17] -> [ABORT][18]
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-lnl-2/igt@xe_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-lnl-2/igt@xe_module_load@load.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@xe_debugfs@root-dir}:
- bat-atsm-2: [PASS][19] -> [FAIL][20]
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/bat-atsm-2/igt@xe_debugfs@root-dir.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/bat-atsm-2/igt@xe_debugfs@root-dir.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Build changes
-------------
* IGT: IGT_8639 -> IGT_8640
* Linux: xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884 -> xe-pw-157944v2
IGT_8639: 2ce563031e6b2ec91479f6af8c326d25c15bdb26 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8640: 789fdb010b4222b96496672d8295b8ae8fbde9e7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884: e7a767430515c3a6e8aee91c2a68cba8b06fe884
xe-pw-157944v2: 157944v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/index.html
[-- Attachment #2: Type: text/html, Size: 5596 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread* ✗ Xe.CI.Full: failure for drm/i915/display: Enable system cache support for FBC (rev2)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (6 preceding siblings ...)
2025-11-27 15:27 ` ✗ Xe.CI.BAT: failure " Patchwork
@ 2025-11-27 16:15 ` Patchwork
2025-11-28 11:42 ` ✗ CI.checkpatch: warning for drm/i915/display: Enable system cache support for FBC (rev4) Patchwork
` (4 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-27 16:15 UTC (permalink / raw)
To: Govindapillai, Vinod; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 29236 bytes --]
== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev2)
URL : https://patchwork.freedesktop.org/series/157944/
State : failure
== Summary ==
CI Bug Log - changes from xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884_FULL -> xe-pw-157944v2_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-157944v2_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-157944v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-157944v2_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_module_load@load:
- shard-lnl: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) -> ([ABORT][26], [ABORT][27], [ABORT][28], [ABORT][29], [ABORT][30], [ABORT][31], [ABORT][32], [ABORT][33], [ABORT][34], [ABORT][35], [ABORT][36], [ABORT][37], [ABORT][38], [ABORT][39], [ABORT][40], [ABORT][41], [ABORT][42], [ABORT][43], [ABORT][44], [ABORT][45], [ABORT][46], [ABORT][47], [ABORT][48], [ABORT][49], [ABORT][50])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-3/igt@xe_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-3/igt@xe_module_load@load.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-3/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-5/igt@xe_module_load@load.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-7/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-7/igt@xe_module_load@load.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-7/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-7/igt@xe_module_load@load.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-5/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-5/igt@xe_module_load@load.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-2/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-2/igt@xe_module_load@load.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-2/igt@xe_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-2/igt@xe_module_load@load.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-3/igt@xe_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-4/igt@xe_module_load@load.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-4/igt@xe_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-1/igt@xe_module_load@load.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-8/igt@xe_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-8/igt@xe_module_load@load.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-8/igt@xe_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-1/igt@xe_module_load@load.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-1/igt@xe_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-4/igt@xe_module_load@load.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-lnl-4/igt@xe_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-1/igt@xe_module_load@load.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-1/igt@xe_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-1/igt@xe_module_load@load.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-1/igt@xe_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-8/igt@xe_module_load@load.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-8/igt@xe_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-8/igt@xe_module_load@load.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-4/igt@xe_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-4/igt@xe_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-4/igt@xe_module_load@load.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-4/igt@xe_module_load@load.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-3/igt@xe_module_load@load.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-3/igt@xe_module_load@load.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-3/igt@xe_module_load@load.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-3/igt@xe_module_load@load.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-2/igt@xe_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-2/igt@xe_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-2/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-7/igt@xe_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-7/igt@xe_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-7/igt@xe_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-7/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-5/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-5/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-lnl-5/igt@xe_module_load@load.html
- shard-bmg: ([PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75]) -> ([ABORT][76], [ABORT][77], [ABORT][78], [ABORT][79], [ABORT][80], [ABORT][81], [ABORT][82], [ABORT][83], [ABORT][84], [ABORT][85], [ABORT][86], [ABORT][87], [ABORT][88], [ABORT][89], [ABORT][90], [ABORT][91], [ABORT][92], [ABORT][93], [ABORT][94], [ABORT][95], [ABORT][96], [ABORT][97], [ABORT][98], [ABORT][99], [ABORT][100])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-6/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-3/igt@xe_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-5/igt@xe_module_load@load.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-5/igt@xe_module_load@load.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-5/igt@xe_module_load@load.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-6/igt@xe_module_load@load.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-6/igt@xe_module_load@load.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-3/igt@xe_module_load@load.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-3/igt@xe_module_load@load.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-8/igt@xe_module_load@load.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-1/igt@xe_module_load@load.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-4/igt@xe_module_load@load.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-1/igt@xe_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-4/igt@xe_module_load@load.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-1/igt@xe_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-7/igt@xe_module_load@load.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-7/igt@xe_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-7/igt@xe_module_load@load.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-8/igt@xe_module_load@load.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-7/igt@xe_module_load@load.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-4/igt@xe_module_load@load.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-8/igt@xe_module_load@load.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-2/igt@xe_module_load@load.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-2/igt@xe_module_load@load.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-bmg-2/igt@xe_module_load@load.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-4/igt@xe_module_load@load.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-4/igt@xe_module_load@load.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-4/igt@xe_module_load@load.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-8/igt@xe_module_load@load.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-8/igt@xe_module_load@load.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-8/igt@xe_module_load@load.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-1/igt@xe_module_load@load.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-1/igt@xe_module_load@load.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-1/igt@xe_module_load@load.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-1/igt@xe_module_load@load.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-7/igt@xe_module_load@load.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-7/igt@xe_module_load@load.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-7/igt@xe_module_load@load.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-2/igt@xe_module_load@load.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-2/igt@xe_module_load@load.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-2/igt@xe_module_load@load.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-6/igt@xe_module_load@load.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-6/igt@xe_module_load@load.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-6/igt@xe_module_load@load.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-3/igt@xe_module_load@load.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-3/igt@xe_module_load@load.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-3/igt@xe_module_load@load.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-5/igt@xe_module_load@load.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-5/igt@xe_module_load@load.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-bmg-5/igt@xe_module_load@load.html
- shard-adlp: ([PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125]) -> ([ABORT][126], [ABORT][127], [ABORT][128], [ABORT][129], [ABORT][130], [ABORT][131], [ABORT][132], [ABORT][133], [ABORT][134], [ABORT][135], [ABORT][136], [ABORT][137], [ABORT][138], [ABORT][139], [ABORT][140], [ABORT][141], [ABORT][142], [ABORT][143], [ABORT][144], [ABORT][145], [ABORT][146], [ABORT][147], [ABORT][148], [ABORT][149], [ABORT][150])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-4/igt@xe_module_load@load.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-4/igt@xe_module_load@load.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-4/igt@xe_module_load@load.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-3/igt@xe_module_load@load.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-4/igt@xe_module_load@load.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-1/igt@xe_module_load@load.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-1/igt@xe_module_load@load.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-1/igt@xe_module_load@load.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-1/igt@xe_module_load@load.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-9/igt@xe_module_load@load.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-6/igt@xe_module_load@load.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-9/igt@xe_module_load@load.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-8/igt@xe_module_load@load.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-8/igt@xe_module_load@load.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-6/igt@xe_module_load@load.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-8/igt@xe_module_load@load.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-9/igt@xe_module_load@load.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-9/igt@xe_module_load@load.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-6/igt@xe_module_load@load.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-2/igt@xe_module_load@load.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-2/igt@xe_module_load@load.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-2/igt@xe_module_load@load.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-3/igt@xe_module_load@load.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-3/igt@xe_module_load@load.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-adlp-2/igt@xe_module_load@load.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-6/igt@xe_module_load@load.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-6/igt@xe_module_load@load.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-6/igt@xe_module_load@load.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-9/igt@xe_module_load@load.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-9/igt@xe_module_load@load.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-9/igt@xe_module_load@load.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-9/igt@xe_module_load@load.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-8/igt@xe_module_load@load.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-8/igt@xe_module_load@load.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-8/igt@xe_module_load@load.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-8/igt@xe_module_load@load.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-2/igt@xe_module_load@load.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-2/igt@xe_module_load@load.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-2/igt@xe_module_load@load.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-3/igt@xe_module_load@load.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-3/igt@xe_module_load@load.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-3/igt@xe_module_load@load.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-3/igt@xe_module_load@load.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-4/igt@xe_module_load@load.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-4/igt@xe_module_load@load.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-4/igt@xe_module_load@load.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-4/igt@xe_module_load@load.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-1/igt@xe_module_load@load.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-1/igt@xe_module_load@load.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-adlp-1/igt@xe_module_load@load.html
- shard-dg2-set2: ([PASS][151], [PASS][152], [PASS][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174]) -> ([ABORT][175], [ABORT][176], [ABORT][177], [ABORT][178], [ABORT][179], [ABORT][180], [ABORT][181], [ABORT][182], [ABORT][183], [ABORT][184], [ABORT][185], [ABORT][186], [ABORT][187], [ABORT][188], [ABORT][189], [ABORT][190], [ABORT][191], [ABORT][192], [ABORT][193], [ABORT][194], [ABORT][195], [ABORT][196], [ABORT][197], [ABORT][198], [ABORT][199])
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-435/igt@xe_module_load@load.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-466/igt@xe_module_load@load.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-463/igt@xe_module_load@load.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-435/igt@xe_module_load@load.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-463/igt@xe_module_load@load.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-463/igt@xe_module_load@load.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-432/igt@xe_module_load@load.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-435/igt@xe_module_load@load.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-466/igt@xe_module_load@load.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-432/igt@xe_module_load@load.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-432/igt@xe_module_load@load.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-466/igt@xe_module_load@load.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-436/igt@xe_module_load@load.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-436/igt@xe_module_load@load.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-436/igt@xe_module_load@load.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-436/igt@xe_module_load@load.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-464/igt@xe_module_load@load.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-464/igt@xe_module_load@load.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-433/igt@xe_module_load@load.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-433/igt@xe_module_load@load.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-464/igt@xe_module_load@load.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-433/igt@xe_module_load@load.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-434/igt@xe_module_load@load.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884/shard-dg2-434/igt@xe_module_load@load.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-434/igt@xe_module_load@load.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-434/igt@xe_module_load@load.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-434/igt@xe_module_load@load.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-464/igt@xe_module_load@load.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-464/igt@xe_module_load@load.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-464/igt@xe_module_load@load.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-433/igt@xe_module_load@load.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-433/igt@xe_module_load@load.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-433/igt@xe_module_load@load.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-436/igt@xe_module_load@load.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-436/igt@xe_module_load@load.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-436/igt@xe_module_load@load.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-463/igt@xe_module_load@load.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-463/igt@xe_module_load@load.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-463/igt@xe_module_load@load.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-466/igt@xe_module_load@load.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-466/igt@xe_module_load@load.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-466/igt@xe_module_load@load.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-435/igt@xe_module_load@load.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-435/igt@xe_module_load@load.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-435/igt@xe_module_load@load.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-435/igt@xe_module_load@load.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-432/igt@xe_module_load@load.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-432/igt@xe_module_load@load.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/shard-dg2-432/igt@xe_module_load@load.html
Build changes
-------------
* IGT: IGT_8639 -> IGT_8640
* Linux: xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884 -> xe-pw-157944v2
IGT_8639: 2ce563031e6b2ec91479f6af8c326d25c15bdb26 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8640: 789fdb010b4222b96496672d8295b8ae8fbde9e7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4156-e7a767430515c3a6e8aee91c2a68cba8b06fe884: e7a767430515c3a6e8aee91c2a68cba8b06fe884
xe-pw-157944v2: 157944v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v2/index.html
[-- Attachment #2: Type: text/html, Size: 29529 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread* ✗ CI.checkpatch: warning for drm/i915/display: Enable system cache support for FBC (rev4)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (7 preceding siblings ...)
2025-11-27 16:15 ` ✗ Xe.CI.Full: " Patchwork
@ 2025-11-28 11:42 ` Patchwork
2025-11-28 11:43 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-28 11:42 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev4)
URL : https://patchwork.freedesktop.org/series/157944/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
2de9a3901bc28757c7906b454717b64e2a214021
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit fd5714fe23a54f429063d343bdd7b9cb419513a4
Author: Vinod Govindapillai <vinod.govindapillai@intel.com>
Date: Thu Nov 27 13:53:49 2025 +0200
drm/i915/fbc: Apply Wa_14025769978
Disable cache read setting in the cacheability configuration
register as per the wa recommendation
Bspec: 79482, 74722, 68881
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
+ /mt/dim checkpatch e1c1b3e03e356d1e20432dcb0d38ad44d5e92670 drm-intel
284b5f57a20c drm/i915/display: Use a sub-struct for fbc operations in intel_display
07742e28c6b4 drm/i915/xe3p_lpd: Enable display use of system cache for FBC
-:58: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#58: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:176:
+#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >= 35 && !(__display)->platform.dgfx)
-:58: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#58: FILE: drivers/gpu/drm/i915/display/intel_display_device.h:176:
+#define HAS_FBC_SYS_CACHE(__display) (DISPLAY_VER(__display) >= 35 && !(__display)->platform.dgfx)
-:219: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#219: FILE: drivers/gpu/drm/i915/display/intel_fbc_regs.h:131:
+#define FBC_SYS_CACHE_START_BASE(base) REG_FIELD_PREP(FBC_SYS_CACHE_START_BASE_MASK, (base))
-:221: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#221: FILE: drivers/gpu/drm/i915/display/intel_fbc_regs.h:133:
+#define FBC_SYS_CACHEABLE_RANGE(range) REG_FIELD_PREP(FBC_SYS_CACHEABLE_RANGE_MASK, (range))
total: 0 errors, 3 warnings, 1 checks, 169 lines checked
fd5714fe23a5 drm/i915/fbc: Apply Wa_14025769978
^ permalink raw reply [flat|nested] 21+ messages in thread* ✓ CI.KUnit: success for drm/i915/display: Enable system cache support for FBC (rev4)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (8 preceding siblings ...)
2025-11-28 11:42 ` ✗ CI.checkpatch: warning for drm/i915/display: Enable system cache support for FBC (rev4) Patchwork
@ 2025-11-28 11:43 ` Patchwork
2025-11-28 11:58 ` ✗ CI.checksparse: warning " Patchwork
` (2 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-28 11:43 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev4)
URL : https://patchwork.freedesktop.org/series/157944/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:42:00] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:42:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:42:36] Starting KUnit Kernel (1/1)...
[11:42:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:42:36] ================== guc_buf (11 subtests) ===================
[11:42:36] [PASSED] test_smallest
[11:42:36] [PASSED] test_largest
[11:42:36] [PASSED] test_granular
[11:42:36] [PASSED] test_unique
[11:42:36] [PASSED] test_overlap
[11:42:36] [PASSED] test_reusable
[11:42:36] [PASSED] test_too_big
[11:42:36] [PASSED] test_flush
[11:42:36] [PASSED] test_lookup
[11:42:36] [PASSED] test_data
[11:42:36] [PASSED] test_class
[11:42:36] ===================== [PASSED] guc_buf =====================
[11:42:36] =================== guc_dbm (7 subtests) ===================
[11:42:36] [PASSED] test_empty
[11:42:36] [PASSED] test_default
[11:42:36] ======================== test_size ========================
[11:42:36] [PASSED] 4
[11:42:36] [PASSED] 8
[11:42:36] [PASSED] 32
[11:42:36] [PASSED] 256
[11:42:36] ==================== [PASSED] test_size ====================
[11:42:36] ======================= test_reuse ========================
[11:42:36] [PASSED] 4
[11:42:36] [PASSED] 8
[11:42:36] [PASSED] 32
[11:42:36] [PASSED] 256
[11:42:36] =================== [PASSED] test_reuse ====================
[11:42:36] =================== test_range_overlap ====================
[11:42:36] [PASSED] 4
[11:42:36] [PASSED] 8
[11:42:36] [PASSED] 32
[11:42:36] [PASSED] 256
[11:42:36] =============== [PASSED] test_range_overlap ================
[11:42:36] =================== test_range_compact ====================
[11:42:36] [PASSED] 4
[11:42:36] [PASSED] 8
[11:42:36] [PASSED] 32
[11:42:36] [PASSED] 256
[11:42:36] =============== [PASSED] test_range_compact ================
[11:42:36] ==================== test_range_spare =====================
[11:42:36] [PASSED] 4
[11:42:36] [PASSED] 8
[11:42:36] [PASSED] 32
[11:42:36] [PASSED] 256
[11:42:36] ================ [PASSED] test_range_spare =================
[11:42:36] ===================== [PASSED] guc_dbm =====================
[11:42:36] =================== guc_idm (6 subtests) ===================
[11:42:36] [PASSED] bad_init
[11:42:36] [PASSED] no_init
[11:42:36] [PASSED] init_fini
[11:42:36] [PASSED] check_used
[11:42:36] [PASSED] check_quota
[11:42:36] [PASSED] check_all
[11:42:36] ===================== [PASSED] guc_idm =====================
[11:42:36] ================== no_relay (3 subtests) ===================
[11:42:36] [PASSED] xe_drops_guc2pf_if_not_ready
[11:42:36] [PASSED] xe_drops_guc2vf_if_not_ready
[11:42:36] [PASSED] xe_rejects_send_if_not_ready
[11:42:36] ==================== [PASSED] no_relay =====================
[11:42:36] ================== pf_relay (14 subtests) ==================
[11:42:36] [PASSED] pf_rejects_guc2pf_too_short
[11:42:36] [PASSED] pf_rejects_guc2pf_too_long
[11:42:36] [PASSED] pf_rejects_guc2pf_no_payload
[11:42:36] [PASSED] pf_fails_no_payload
[11:42:36] [PASSED] pf_fails_bad_origin
[11:42:36] [PASSED] pf_fails_bad_type
[11:42:36] [PASSED] pf_txn_reports_error
[11:42:36] [PASSED] pf_txn_sends_pf2guc
[11:42:36] [PASSED] pf_sends_pf2guc
[11:42:36] [SKIPPED] pf_loopback_nop
[11:42:36] [SKIPPED] pf_loopback_echo
[11:42:36] [SKIPPED] pf_loopback_fail
[11:42:36] [SKIPPED] pf_loopback_busy
[11:42:36] [SKIPPED] pf_loopback_retry
[11:42:36] ==================== [PASSED] pf_relay =====================
[11:42:36] ================== vf_relay (3 subtests) ===================
[11:42:36] [PASSED] vf_rejects_guc2vf_too_short
[11:42:36] [PASSED] vf_rejects_guc2vf_too_long
[11:42:36] [PASSED] vf_rejects_guc2vf_no_payload
[11:42:36] ==================== [PASSED] vf_relay =====================
[11:42:36] ================ pf_gt_config (6 subtests) =================
[11:42:36] [PASSED] fair_contexts_1vf
[11:42:36] [PASSED] fair_doorbells_1vf
[11:42:36] [PASSED] fair_ggtt_1vf
[11:42:36] ====================== fair_contexts ======================
[11:42:36] [PASSED] 1 VF
[11:42:36] [PASSED] 2 VFs
[11:42:36] [PASSED] 3 VFs
[11:42:36] [PASSED] 4 VFs
[11:42:36] [PASSED] 5 VFs
[11:42:36] [PASSED] 6 VFs
[11:42:36] [PASSED] 7 VFs
[11:42:36] [PASSED] 8 VFs
[11:42:36] [PASSED] 9 VFs
[11:42:36] [PASSED] 10 VFs
[11:42:36] [PASSED] 11 VFs
[11:42:36] [PASSED] 12 VFs
[11:42:36] [PASSED] 13 VFs
[11:42:36] [PASSED] 14 VFs
[11:42:36] [PASSED] 15 VFs
[11:42:36] [PASSED] 16 VFs
[11:42:36] [PASSED] 17 VFs
[11:42:36] [PASSED] 18 VFs
[11:42:36] [PASSED] 19 VFs
[11:42:36] [PASSED] 20 VFs
[11:42:36] [PASSED] 21 VFs
[11:42:36] [PASSED] 22 VFs
[11:42:36] [PASSED] 23 VFs
[11:42:36] [PASSED] 24 VFs
[11:42:36] [PASSED] 25 VFs
[11:42:36] [PASSED] 26 VFs
[11:42:36] [PASSED] 27 VFs
[11:42:36] [PASSED] 28 VFs
[11:42:36] [PASSED] 29 VFs
[11:42:36] [PASSED] 30 VFs
[11:42:36] [PASSED] 31 VFs
[11:42:36] [PASSED] 32 VFs
[11:42:36] [PASSED] 33 VFs
[11:42:36] [PASSED] 34 VFs
[11:42:36] [PASSED] 35 VFs
[11:42:36] [PASSED] 36 VFs
[11:42:36] [PASSED] 37 VFs
[11:42:36] [PASSED] 38 VFs
[11:42:36] [PASSED] 39 VFs
[11:42:36] [PASSED] 40 VFs
[11:42:36] [PASSED] 41 VFs
[11:42:36] [PASSED] 42 VFs
[11:42:36] [PASSED] 43 VFs
[11:42:36] [PASSED] 44 VFs
[11:42:36] [PASSED] 45 VFs
[11:42:36] [PASSED] 46 VFs
[11:42:36] [PASSED] 47 VFs
[11:42:36] [PASSED] 48 VFs
[11:42:36] [PASSED] 49 VFs
[11:42:36] [PASSED] 50 VFs
[11:42:36] [PASSED] 51 VFs
[11:42:36] [PASSED] 52 VFs
[11:42:36] [PASSED] 53 VFs
[11:42:36] [PASSED] 54 VFs
[11:42:36] [PASSED] 55 VFs
[11:42:36] [PASSED] 56 VFs
[11:42:36] [PASSED] 57 VFs
[11:42:36] [PASSED] 58 VFs
[11:42:36] [PASSED] 59 VFs
[11:42:36] [PASSED] 60 VFs
[11:42:36] [PASSED] 61 VFs
[11:42:36] [PASSED] 62 VFs
[11:42:36] [PASSED] 63 VFs
[11:42:36] ================== [PASSED] fair_contexts ==================
[11:42:36] ===================== fair_doorbells ======================
[11:42:36] [PASSED] 1 VF
[11:42:36] [PASSED] 2 VFs
[11:42:36] [PASSED] 3 VFs
[11:42:36] [PASSED] 4 VFs
[11:42:36] [PASSED] 5 VFs
[11:42:36] [PASSED] 6 VFs
[11:42:36] [PASSED] 7 VFs
[11:42:36] [PASSED] 8 VFs
[11:42:36] [PASSED] 9 VFs
[11:42:36] [PASSED] 10 VFs
[11:42:36] [PASSED] 11 VFs
[11:42:36] [PASSED] 12 VFs
[11:42:36] [PASSED] 13 VFs
[11:42:36] [PASSED] 14 VFs
[11:42:36] [PASSED] 15 VFs
[11:42:36] [PASSED] 16 VFs
[11:42:36] [PASSED] 17 VFs
[11:42:36] [PASSED] 18 VFs
[11:42:36] [PASSED] 19 VFs
[11:42:36] [PASSED] 20 VFs
[11:42:36] [PASSED] 21 VFs
[11:42:36] [PASSED] 22 VFs
[11:42:36] [PASSED] 23 VFs
[11:42:36] [PASSED] 24 VFs
[11:42:36] [PASSED] 25 VFs
[11:42:36] [PASSED] 26 VFs
[11:42:36] [PASSED] 27 VFs
[11:42:36] [PASSED] 28 VFs
[11:42:36] [PASSED] 29 VFs
[11:42:36] [PASSED] 30 VFs
[11:42:36] [PASSED] 31 VFs
[11:42:36] [PASSED] 32 VFs
[11:42:36] [PASSED] 33 VFs
[11:42:36] [PASSED] 34 VFs
[11:42:36] [PASSED] 35 VFs
[11:42:36] [PASSED] 36 VFs
[11:42:36] [PASSED] 37 VFs
[11:42:36] [PASSED] 38 VFs
[11:42:36] [PASSED] 39 VFs
[11:42:36] [PASSED] 40 VFs
[11:42:36] [PASSED] 41 VFs
[11:42:36] [PASSED] 42 VFs
[11:42:36] [PASSED] 43 VFs
[11:42:36] [PASSED] 44 VFs
[11:42:36] [PASSED] 45 VFs
[11:42:36] [PASSED] 46 VFs
[11:42:36] [PASSED] 47 VFs
[11:42:36] [PASSED] 48 VFs
[11:42:36] [PASSED] 49 VFs
[11:42:36] [PASSED] 50 VFs
[11:42:36] [PASSED] 51 VFs
[11:42:36] [PASSED] 52 VFs
[11:42:36] [PASSED] 53 VFs
[11:42:36] [PASSED] 54 VFs
[11:42:36] [PASSED] 55 VFs
[11:42:36] [PASSED] 56 VFs
[11:42:36] [PASSED] 57 VFs
[11:42:36] [PASSED] 58 VFs
[11:42:36] [PASSED] 59 VFs
[11:42:36] [PASSED] 60 VFs
[11:42:36] [PASSED] 61 VFs
[11:42:36] [PASSED] 62 VFs
[11:42:36] [PASSED] 63 VFs
[11:42:36] ================= [PASSED] fair_doorbells ==================
[11:42:36] ======================== fair_ggtt ========================
[11:42:36] [PASSED] 1 VF
[11:42:36] [PASSED] 2 VFs
[11:42:36] [PASSED] 3 VFs
[11:42:36] [PASSED] 4 VFs
[11:42:36] [PASSED] 5 VFs
[11:42:36] [PASSED] 6 VFs
[11:42:36] [PASSED] 7 VFs
[11:42:36] [PASSED] 8 VFs
[11:42:36] [PASSED] 9 VFs
[11:42:36] [PASSED] 10 VFs
[11:42:36] [PASSED] 11 VFs
[11:42:36] [PASSED] 12 VFs
[11:42:36] [PASSED] 13 VFs
[11:42:36] [PASSED] 14 VFs
[11:42:36] [PASSED] 15 VFs
[11:42:36] [PASSED] 16 VFs
[11:42:36] [PASSED] 17 VFs
[11:42:36] [PASSED] 18 VFs
[11:42:36] [PASSED] 19 VFs
[11:42:36] [PASSED] 20 VFs
[11:42:36] [PASSED] 21 VFs
[11:42:36] [PASSED] 22 VFs
[11:42:36] [PASSED] 23 VFs
[11:42:36] [PASSED] 24 VFs
[11:42:36] [PASSED] 25 VFs
[11:42:36] [PASSED] 26 VFs
[11:42:36] [PASSED] 27 VFs
[11:42:36] [PASSED] 28 VFs
[11:42:36] [PASSED] 29 VFs
[11:42:36] [PASSED] 30 VFs
[11:42:36] [PASSED] 31 VFs
[11:42:36] [PASSED] 32 VFs
[11:42:36] [PASSED] 33 VFs
[11:42:36] [PASSED] 34 VFs
[11:42:36] [PASSED] 35 VFs
[11:42:36] [PASSED] 36 VFs
[11:42:36] [PASSED] 37 VFs
[11:42:36] [PASSED] 38 VFs
[11:42:36] [PASSED] 39 VFs
[11:42:36] [PASSED] 40 VFs
[11:42:36] [PASSED] 41 VFs
[11:42:36] [PASSED] 42 VFs
[11:42:36] [PASSED] 43 VFs
[11:42:36] [PASSED] 44 VFs
[11:42:36] [PASSED] 45 VFs
[11:42:36] [PASSED] 46 VFs
[11:42:36] [PASSED] 47 VFs
[11:42:36] [PASSED] 48 VFs
[11:42:36] [PASSED] 49 VFs
[11:42:36] [PASSED] 50 VFs
[11:42:36] [PASSED] 51 VFs
[11:42:36] [PASSED] 52 VFs
[11:42:36] [PASSED] 53 VFs
[11:42:36] [PASSED] 54 VFs
[11:42:36] [PASSED] 55 VFs
[11:42:36] [PASSED] 56 VFs
[11:42:36] [PASSED] 57 VFs
[11:42:36] [PASSED] 58 VFs
[11:42:36] [PASSED] 59 VFs
[11:42:36] [PASSED] 60 VFs
[11:42:36] [PASSED] 61 VFs
[11:42:36] [PASSED] 62 VFs
[11:42:36] [PASSED] 63 VFs
[11:42:36] ==================== [PASSED] fair_ggtt ====================
[11:42:36] ================== [PASSED] pf_gt_config ===================
[11:42:36] ===================== lmtt (1 subtest) =====================
[11:42:36] ======================== test_ops =========================
[11:42:36] [PASSED] 2-level
[11:42:36] [PASSED] multi-level
[11:42:36] ==================== [PASSED] test_ops =====================
[11:42:36] ====================== [PASSED] lmtt =======================
[11:42:36] ================= pf_service (11 subtests) =================
[11:42:36] [PASSED] pf_negotiate_any
[11:42:36] [PASSED] pf_negotiate_base_match
[11:42:36] [PASSED] pf_negotiate_base_newer
[11:42:36] [PASSED] pf_negotiate_base_next
[11:42:36] [SKIPPED] pf_negotiate_base_older
[11:42:36] [PASSED] pf_negotiate_base_prev
[11:42:36] [PASSED] pf_negotiate_latest_match
[11:42:36] [PASSED] pf_negotiate_latest_newer
[11:42:36] [PASSED] pf_negotiate_latest_next
[11:42:36] [SKIPPED] pf_negotiate_latest_older
[11:42:36] [SKIPPED] pf_negotiate_latest_prev
[11:42:36] =================== [PASSED] pf_service ====================
[11:42:36] ================= xe_guc_g2g (2 subtests) ==================
[11:42:36] ============== xe_live_guc_g2g_kunit_default ==============
[11:42:36] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:42:36] ============== xe_live_guc_g2g_kunit_allmem ===============
[11:42:36] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:42:36] =================== [SKIPPED] xe_guc_g2g ===================
[11:42:36] =================== xe_mocs (2 subtests) ===================
[11:42:36] ================ xe_live_mocs_kernel_kunit ================
[11:42:36] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:42:36] ================ xe_live_mocs_reset_kunit =================
[11:42:36] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:42:36] ==================== [SKIPPED] xe_mocs =====================
[11:42:36] ================= xe_migrate (2 subtests) ==================
[11:42:36] ================= xe_migrate_sanity_kunit =================
[11:42:36] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:42:36] ================== xe_validate_ccs_kunit ==================
[11:42:36] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:42:36] =================== [SKIPPED] xe_migrate ===================
[11:42:36] ================== xe_dma_buf (1 subtest) ==================
[11:42:36] ==================== xe_dma_buf_kunit =====================
[11:42:36] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:42:36] =================== [SKIPPED] xe_dma_buf ===================
[11:42:36] ================= xe_bo_shrink (1 subtest) =================
[11:42:36] =================== xe_bo_shrink_kunit ====================
[11:42:36] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:42:36] ================== [SKIPPED] xe_bo_shrink ==================
[11:42:36] ==================== xe_bo (2 subtests) ====================
[11:42:36] ================== xe_ccs_migrate_kunit ===================
[11:42:36] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:42:36] ==================== xe_bo_evict_kunit ====================
[11:42:36] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:42:36] ===================== [SKIPPED] xe_bo ======================
[11:42:36] ==================== args (11 subtests) ====================
[11:42:36] [PASSED] count_args_test
[11:42:36] [PASSED] call_args_example
[11:42:36] [PASSED] call_args_test
[11:42:36] [PASSED] drop_first_arg_example
[11:42:36] [PASSED] drop_first_arg_test
[11:42:36] [PASSED] first_arg_example
[11:42:36] [PASSED] first_arg_test
[11:42:36] [PASSED] last_arg_example
[11:42:36] [PASSED] last_arg_test
[11:42:36] [PASSED] pick_arg_example
[11:42:36] [PASSED] sep_comma_example
[11:42:36] ====================== [PASSED] args =======================
[11:42:36] =================== xe_pci (3 subtests) ====================
[11:42:36] ==================== check_graphics_ip ====================
[11:42:36] [PASSED] 12.00 Xe_LP
[11:42:36] [PASSED] 12.10 Xe_LP+
[11:42:36] [PASSED] 12.55 Xe_HPG
[11:42:36] [PASSED] 12.60 Xe_HPC
[11:42:36] [PASSED] 12.70 Xe_LPG
[11:42:36] [PASSED] 12.71 Xe_LPG
[11:42:36] [PASSED] 12.74 Xe_LPG+
[11:42:36] [PASSED] 20.01 Xe2_HPG
[11:42:36] [PASSED] 20.02 Xe2_HPG
[11:42:36] [PASSED] 20.04 Xe2_LPG
[11:42:36] [PASSED] 30.00 Xe3_LPG
[11:42:36] [PASSED] 30.01 Xe3_LPG
[11:42:36] [PASSED] 30.03 Xe3_LPG
[11:42:36] [PASSED] 30.04 Xe3_LPG
[11:42:36] [PASSED] 30.05 Xe3_LPG
[11:42:36] [PASSED] 35.11 Xe3p_XPC
[11:42:36] ================ [PASSED] check_graphics_ip ================
[11:42:36] ===================== check_media_ip ======================
[11:42:36] [PASSED] 12.00 Xe_M
[11:42:36] [PASSED] 12.55 Xe_HPM
[11:42:36] [PASSED] 13.00 Xe_LPM+
[11:42:36] [PASSED] 13.01 Xe2_HPM
[11:42:36] [PASSED] 20.00 Xe2_LPM
[11:42:36] [PASSED] 30.00 Xe3_LPM
[11:42:36] [PASSED] 30.02 Xe3_LPM
[11:42:36] [PASSED] 35.00 Xe3p_LPM
[11:42:36] [PASSED] 35.03 Xe3p_HPM
[11:42:36] ================= [PASSED] check_media_ip ==================
[11:42:36] =================== check_platform_desc ===================
[11:42:36] [PASSED] 0x9A60 (TIGERLAKE)
[11:42:36] [PASSED] 0x9A68 (TIGERLAKE)
[11:42:36] [PASSED] 0x9A70 (TIGERLAKE)
[11:42:36] [PASSED] 0x9A40 (TIGERLAKE)
[11:42:36] [PASSED] 0x9A49 (TIGERLAKE)
[11:42:36] [PASSED] 0x9A59 (TIGERLAKE)
[11:42:36] [PASSED] 0x9A78 (TIGERLAKE)
[11:42:36] [PASSED] 0x9AC0 (TIGERLAKE)
[11:42:36] [PASSED] 0x9AC9 (TIGERLAKE)
[11:42:36] [PASSED] 0x9AD9 (TIGERLAKE)
[11:42:36] [PASSED] 0x9AF8 (TIGERLAKE)
[11:42:36] [PASSED] 0x4C80 (ROCKETLAKE)
[11:42:36] [PASSED] 0x4C8A (ROCKETLAKE)
[11:42:36] [PASSED] 0x4C8B (ROCKETLAKE)
[11:42:36] [PASSED] 0x4C8C (ROCKETLAKE)
[11:42:36] [PASSED] 0x4C90 (ROCKETLAKE)
[11:42:36] [PASSED] 0x4C9A (ROCKETLAKE)
[11:42:36] [PASSED] 0x4680 (ALDERLAKE_S)
[11:42:36] [PASSED] 0x4682 (ALDERLAKE_S)
[11:42:36] [PASSED] 0x4688 (ALDERLAKE_S)
[11:42:36] [PASSED] 0x468A (ALDERLAKE_S)
[11:42:36] [PASSED] 0x468B (ALDERLAKE_S)
[11:42:36] [PASSED] 0x4690 (ALDERLAKE_S)
[11:42:36] [PASSED] 0x4692 (ALDERLAKE_S)
[11:42:36] [PASSED] 0x4693 (ALDERLAKE_S)
[11:42:36] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46AA (ALDERLAKE_P)
[11:42:36] [PASSED] 0x462A (ALDERLAKE_P)
[11:42:36] [PASSED] 0x4626 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x4628 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[11:42:36] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:42:36] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:42:36] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:42:36] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:42:36] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:42:36] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:42:36] [PASSED] 0xA721 (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA720 (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:42:36] [PASSED] 0xA780 (ALDERLAKE_S)
[11:42:36] [PASSED] 0xA781 (ALDERLAKE_S)
[11:42:36] [PASSED] 0xA782 (ALDERLAKE_S)
[11:42:36] [PASSED] 0xA783 (ALDERLAKE_S)
[11:42:36] [PASSED] 0xA788 (ALDERLAKE_S)
[11:42:36] [PASSED] 0xA789 (ALDERLAKE_S)
[11:42:36] [PASSED] 0xA78A (ALDERLAKE_S)
[11:42:36] [PASSED] 0xA78B (ALDERLAKE_S)
[11:42:36] [PASSED] 0x4905 (DG1)
[11:42:36] [PASSED] 0x4906 (DG1)
[11:42:36] [PASSED] 0x4907 (DG1)
[11:42:36] [PASSED] 0x4908 (DG1)
[11:42:36] [PASSED] 0x4909 (DG1)
[11:42:36] [PASSED] 0x56C0 (DG2)
[11:42:36] [PASSED] 0x56C2 (DG2)
[11:42:36] [PASSED] 0x56C1 (DG2)
[11:42:36] [PASSED] 0x7D51 (METEORLAKE)
[11:42:36] [PASSED] 0x7DD1 (METEORLAKE)
[11:42:36] [PASSED] 0x7D41 (METEORLAKE)
[11:42:36] [PASSED] 0x7D67 (METEORLAKE)
[11:42:36] [PASSED] 0xB640 (METEORLAKE)
[11:42:36] [PASSED] 0x56A0 (DG2)
[11:42:36] [PASSED] 0x56A1 (DG2)
[11:42:36] [PASSED] 0x56A2 (DG2)
[11:42:36] [PASSED] 0x56BE (DG2)
[11:42:36] [PASSED] 0x56BF (DG2)
[11:42:36] [PASSED] 0x5690 (DG2)
[11:42:36] [PASSED] 0x5691 (DG2)
[11:42:36] [PASSED] 0x5692 (DG2)
[11:42:36] [PASSED] 0x56A5 (DG2)
[11:42:36] [PASSED] 0x56A6 (DG2)
[11:42:36] [PASSED] 0x56B0 (DG2)
[11:42:36] [PASSED] 0x56B1 (DG2)
[11:42:36] [PASSED] 0x56BA (DG2)
[11:42:36] [PASSED] 0x56BB (DG2)
[11:42:36] [PASSED] 0x56BC (DG2)
[11:42:36] [PASSED] 0x56BD (DG2)
[11:42:36] [PASSED] 0x5693 (DG2)
[11:42:36] [PASSED] 0x5694 (DG2)
[11:42:36] [PASSED] 0x5695 (DG2)
[11:42:36] [PASSED] 0x56A3 (DG2)
[11:42:36] [PASSED] 0x56A4 (DG2)
[11:42:36] [PASSED] 0x56B2 (DG2)
[11:42:36] [PASSED] 0x56B3 (DG2)
[11:42:36] [PASSED] 0x5696 (DG2)
[11:42:36] [PASSED] 0x5697 (DG2)
[11:42:36] [PASSED] 0xB69 (PVC)
[11:42:36] [PASSED] 0xB6E (PVC)
[11:42:36] [PASSED] 0xBD4 (PVC)
[11:42:36] [PASSED] 0xBD5 (PVC)
[11:42:36] [PASSED] 0xBD6 (PVC)
[11:42:36] [PASSED] 0xBD7 (PVC)
[11:42:36] [PASSED] 0xBD8 (PVC)
[11:42:36] [PASSED] 0xBD9 (PVC)
[11:42:36] [PASSED] 0xBDA (PVC)
[11:42:36] [PASSED] 0xBDB (PVC)
[11:42:36] [PASSED] 0xBE0 (PVC)
[11:42:36] [PASSED] 0xBE1 (PVC)
[11:42:36] [PASSED] 0xBE5 (PVC)
[11:42:36] [PASSED] 0x7D40 (METEORLAKE)
[11:42:36] [PASSED] 0x7D45 (METEORLAKE)
[11:42:36] [PASSED] 0x7D55 (METEORLAKE)
[11:42:36] [PASSED] 0x7D60 (METEORLAKE)
[11:42:36] [PASSED] 0x7DD5 (METEORLAKE)
[11:42:36] [PASSED] 0x6420 (LUNARLAKE)
[11:42:36] [PASSED] 0x64A0 (LUNARLAKE)
[11:42:36] [PASSED] 0x64B0 (LUNARLAKE)
[11:42:36] [PASSED] 0xE202 (BATTLEMAGE)
[11:42:36] [PASSED] 0xE209 (BATTLEMAGE)
[11:42:36] [PASSED] 0xE20B (BATTLEMAGE)
[11:42:36] [PASSED] 0xE20C (BATTLEMAGE)
[11:42:36] [PASSED] 0xE20D (BATTLEMAGE)
[11:42:36] [PASSED] 0xE210 (BATTLEMAGE)
[11:42:36] [PASSED] 0xE211 (BATTLEMAGE)
[11:42:36] [PASSED] 0xE212 (BATTLEMAGE)
[11:42:36] [PASSED] 0xE216 (BATTLEMAGE)
[11:42:36] [PASSED] 0xE220 (BATTLEMAGE)
[11:42:36] [PASSED] 0xE221 (BATTLEMAGE)
[11:42:36] [PASSED] 0xE222 (BATTLEMAGE)
[11:42:36] [PASSED] 0xE223 (BATTLEMAGE)
[11:42:36] [PASSED] 0xB080 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB081 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB082 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB083 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB084 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB085 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB086 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB087 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB08F (PANTHERLAKE)
[11:42:36] [PASSED] 0xB090 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:42:36] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:42:36] [PASSED] 0xD740 (NOVALAKE_S)
[11:42:36] [PASSED] 0xD741 (NOVALAKE_S)
[11:42:36] [PASSED] 0xD742 (NOVALAKE_S)
[11:42:36] [PASSED] 0xD743 (NOVALAKE_S)
[11:42:36] [PASSED] 0xD744 (NOVALAKE_S)
[11:42:36] [PASSED] 0xD745 (NOVALAKE_S)
[11:42:36] [PASSED] 0x674C (CRESCENTISLAND)
[11:42:36] [PASSED] 0xFD80 (PANTHERLAKE)
[11:42:36] [PASSED] 0xFD81 (PANTHERLAKE)
[11:42:36] =============== [PASSED] check_platform_desc ===============
[11:42:36] ===================== [PASSED] xe_pci ======================
[11:42:36] =================== xe_rtp (2 subtests) ====================
[11:42:36] =============== xe_rtp_process_to_sr_tests ================
[11:42:36] [PASSED] coalesce-same-reg
[11:42:36] [PASSED] no-match-no-add
[11:42:36] [PASSED] match-or
[11:42:36] [PASSED] match-or-xfail
[11:42:36] [PASSED] no-match-no-add-multiple-rules
[11:42:36] [PASSED] two-regs-two-entries
[11:42:36] [PASSED] clr-one-set-other
[11:42:36] [PASSED] set-field
[11:42:36] [PASSED] conflict-duplicate
[11:42:36] [PASSED] conflict-not-disjoint
[11:42:36] [PASSED] conflict-reg-type
[11:42:36] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:42:36] ================== xe_rtp_process_tests ===================
[11:42:36] [PASSED] active1
[11:42:36] [PASSED] active2
[11:42:36] [PASSED] active-inactive
[11:42:36] [PASSED] inactive-active
[11:42:36] [PASSED] inactive-1st_or_active-inactive
[11:42:36] [PASSED] inactive-2nd_or_active-inactive
[11:42:36] [PASSED] inactive-last_or_active-inactive
[11:42:36] [PASSED] inactive-no_or_active-inactive
[11:42:36] ============== [PASSED] xe_rtp_process_tests ===============
[11:42:36] ===================== [PASSED] xe_rtp ======================
[11:42:36] ==================== xe_wa (1 subtest) =====================
[11:42:36] ======================== xe_wa_gt =========================
[11:42:36] [PASSED] TIGERLAKE B0
[11:42:36] [PASSED] DG1 A0
[11:42:36] [PASSED] DG1 B0
[11:42:36] [PASSED] ALDERLAKE_S A0
[11:42:36] [PASSED] ALDERLAKE_S B0
[11:42:36] [PASSED] ALDERLAKE_S C0
[11:42:36] [PASSED] ALDERLAKE_S D0
[11:42:36] [PASSED] ALDERLAKE_P A0
[11:42:36] [PASSED] ALDERLAKE_P B0
[11:42:36] [PASSED] ALDERLAKE_P C0
[11:42:36] [PASSED] ALDERLAKE_S RPLS D0
[11:42:36] [PASSED] ALDERLAKE_P RPLU E0
[11:42:36] [PASSED] DG2 G10 C0
[11:42:36] [PASSED] DG2 G11 B1
[11:42:36] [PASSED] DG2 G12 A1
[11:42:36] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:42:36] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:42:36] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:42:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:42:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:42:36] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:42:36] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:42:36] ==================== [PASSED] xe_wa_gt =====================
[11:42:36] ====================== [PASSED] xe_wa ======================
[11:42:36] ============================================================
[11:42:36] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[11:42:36] Elapsed time: 35.993s total, 4.307s configuring, 31.169s building, 0.461s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:42:37] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:42:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:43:03] Starting KUnit Kernel (1/1)...
[11:43:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:43:03] ============ drm_test_pick_cmdline (2 subtests) ============
[11:43:03] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:43:03] =============== drm_test_pick_cmdline_named ===============
[11:43:03] [PASSED] NTSC
[11:43:03] [PASSED] NTSC-J
[11:43:03] [PASSED] PAL
[11:43:03] [PASSED] PAL-M
[11:43:03] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:43:03] ============== [PASSED] drm_test_pick_cmdline ==============
[11:43:03] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:43:03] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:43:03] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:43:03] =========== drm_validate_clone_mode (2 subtests) ===========
[11:43:03] ============== drm_test_check_in_clone_mode ===============
[11:43:03] [PASSED] in_clone_mode
[11:43:03] [PASSED] not_in_clone_mode
[11:43:03] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:43:03] =============== drm_test_check_valid_clones ===============
[11:43:03] [PASSED] not_in_clone_mode
[11:43:03] [PASSED] valid_clone
[11:43:03] [PASSED] invalid_clone
[11:43:03] =========== [PASSED] drm_test_check_valid_clones ===========
[11:43:03] ============= [PASSED] drm_validate_clone_mode =============
[11:43:03] ============= drm_validate_modeset (1 subtest) =============
[11:43:03] [PASSED] drm_test_check_connector_changed_modeset
[11:43:03] ============== [PASSED] drm_validate_modeset ===============
[11:43:03] ====== drm_test_bridge_get_current_state (2 subtests) ======
[11:43:03] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:43:03] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[11:43:03] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:43:03] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:43:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:43:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:43:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[11:43:03] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:43:03] ============== drm_bridge_alloc (2 subtests) ===============
[11:43:03] [PASSED] drm_test_drm_bridge_alloc_basic
[11:43:03] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:43:03] ================ [PASSED] drm_bridge_alloc =================
[11:43:03] ================== drm_buddy (8 subtests) ==================
[11:43:03] [PASSED] drm_test_buddy_alloc_limit
[11:43:03] [PASSED] drm_test_buddy_alloc_optimistic
[11:43:03] [PASSED] drm_test_buddy_alloc_pessimistic
[11:43:03] [PASSED] drm_test_buddy_alloc_pathological
[11:43:03] [PASSED] drm_test_buddy_alloc_contiguous
[11:43:03] [PASSED] drm_test_buddy_alloc_clear
[11:43:04] [PASSED] drm_test_buddy_alloc_range_bias
[11:43:04] [PASSED] drm_test_buddy_fragmentation_performance
[11:43:04] ==================== [PASSED] drm_buddy ====================
[11:43:04] ============= drm_cmdline_parser (40 subtests) =============
[11:43:04] [PASSED] drm_test_cmdline_force_d_only
[11:43:04] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:43:04] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:43:04] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:43:04] [PASSED] drm_test_cmdline_force_e_only
[11:43:04] [PASSED] drm_test_cmdline_res
[11:43:04] [PASSED] drm_test_cmdline_res_vesa
[11:43:04] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:43:04] [PASSED] drm_test_cmdline_res_rblank
[11:43:04] [PASSED] drm_test_cmdline_res_bpp
[11:43:04] [PASSED] drm_test_cmdline_res_refresh
[11:43:04] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:43:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:43:04] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:43:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:43:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:43:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:43:04] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:43:04] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:43:04] [PASSED] drm_test_cmdline_res_margins_force_on
[11:43:04] [PASSED] drm_test_cmdline_res_vesa_margins
[11:43:04] [PASSED] drm_test_cmdline_name
[11:43:04] [PASSED] drm_test_cmdline_name_bpp
[11:43:04] [PASSED] drm_test_cmdline_name_option
[11:43:04] [PASSED] drm_test_cmdline_name_bpp_option
[11:43:04] [PASSED] drm_test_cmdline_rotate_0
[11:43:04] [PASSED] drm_test_cmdline_rotate_90
[11:43:04] [PASSED] drm_test_cmdline_rotate_180
[11:43:04] [PASSED] drm_test_cmdline_rotate_270
[11:43:04] [PASSED] drm_test_cmdline_hmirror
[11:43:04] [PASSED] drm_test_cmdline_vmirror
[11:43:04] [PASSED] drm_test_cmdline_margin_options
[11:43:04] [PASSED] drm_test_cmdline_multiple_options
[11:43:04] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:43:04] [PASSED] drm_test_cmdline_extra_and_option
[11:43:04] [PASSED] drm_test_cmdline_freestanding_options
[11:43:04] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:43:04] [PASSED] drm_test_cmdline_panel_orientation
[11:43:04] ================ drm_test_cmdline_invalid =================
[11:43:04] [PASSED] margin_only
[11:43:04] [PASSED] interlace_only
[11:43:04] [PASSED] res_missing_x
[11:43:04] [PASSED] res_missing_y
[11:43:04] [PASSED] res_bad_y
[11:43:04] [PASSED] res_missing_y_bpp
[11:43:04] [PASSED] res_bad_bpp
[11:43:04] [PASSED] res_bad_refresh
[11:43:04] [PASSED] res_bpp_refresh_force_on_off
[11:43:04] [PASSED] res_invalid_mode
[11:43:04] [PASSED] res_bpp_wrong_place_mode
[11:43:04] [PASSED] name_bpp_refresh
[11:43:04] [PASSED] name_refresh
[11:43:04] [PASSED] name_refresh_wrong_mode
[11:43:04] [PASSED] name_refresh_invalid_mode
[11:43:04] [PASSED] rotate_multiple
[11:43:04] [PASSED] rotate_invalid_val
[11:43:04] [PASSED] rotate_truncated
[11:43:04] [PASSED] invalid_option
[11:43:04] [PASSED] invalid_tv_option
[11:43:04] [PASSED] truncated_tv_option
[11:43:04] ============ [PASSED] drm_test_cmdline_invalid =============
[11:43:04] =============== drm_test_cmdline_tv_options ===============
[11:43:04] [PASSED] NTSC
[11:43:04] [PASSED] NTSC_443
[11:43:04] [PASSED] NTSC_J
[11:43:04] [PASSED] PAL
[11:43:04] [PASSED] PAL_M
[11:43:04] [PASSED] PAL_N
[11:43:04] [PASSED] SECAM
[11:43:04] [PASSED] MONO_525
[11:43:04] [PASSED] MONO_625
[11:43:04] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:43:04] =============== [PASSED] drm_cmdline_parser ================
[11:43:04] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:43:04] [PASSED] drm_test_connector_hdmi_init_valid
[11:43:04] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:43:04] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:43:04] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:43:04] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:43:04] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:43:04] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:43:04] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:43:04] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:43:04] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:43:04] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:43:04] [PASSED] supported_formats=0x3 yuv420_allowed=1
[11:43:04] [PASSED] supported_formats=0x3 yuv420_allowed=0
[11:43:04] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:43:04] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:43:04] [PASSED] drm_test_connector_hdmi_init_null_product
[11:43:04] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:43:04] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:43:04] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:43:04] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:43:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:43:04] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:43:04] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:43:04] ========= drm_test_connector_hdmi_init_type_valid =========
[11:43:04] [PASSED] HDMI-A
[11:43:04] [PASSED] HDMI-B
[11:43:04] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:43:04] ======== drm_test_connector_hdmi_init_type_invalid ========
[11:43:04] [PASSED] Unknown
[11:43:04] [PASSED] VGA
[11:43:04] [PASSED] DVI-I
[11:43:04] [PASSED] DVI-D
[11:43:04] [PASSED] DVI-A
[11:43:04] [PASSED] Composite
[11:43:04] [PASSED] SVIDEO
[11:43:04] [PASSED] LVDS
[11:43:04] [PASSED] Component
[11:43:04] [PASSED] DIN
[11:43:04] [PASSED] DP
[11:43:04] [PASSED] TV
[11:43:04] [PASSED] eDP
[11:43:04] [PASSED] Virtual
[11:43:04] [PASSED] DSI
[11:43:04] [PASSED] DPI
[11:43:04] [PASSED] Writeback
[11:43:04] [PASSED] SPI
[11:43:04] [PASSED] USB
[11:43:04] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:43:04] ============ [PASSED] drmm_connector_hdmi_init =============
[11:43:04] ============= drmm_connector_init (3 subtests) =============
[11:43:04] [PASSED] drm_test_drmm_connector_init
[11:43:04] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:43:04] ========= drm_test_drmm_connector_init_type_valid =========
[11:43:04] [PASSED] Unknown
[11:43:04] [PASSED] VGA
[11:43:04] [PASSED] DVI-I
[11:43:04] [PASSED] DVI-D
[11:43:04] [PASSED] DVI-A
[11:43:04] [PASSED] Composite
[11:43:04] [PASSED] SVIDEO
[11:43:04] [PASSED] LVDS
[11:43:04] [PASSED] Component
[11:43:04] [PASSED] DIN
[11:43:04] [PASSED] DP
[11:43:04] [PASSED] HDMI-A
[11:43:04] [PASSED] HDMI-B
[11:43:04] [PASSED] TV
[11:43:04] [PASSED] eDP
[11:43:04] [PASSED] Virtual
[11:43:04] [PASSED] DSI
[11:43:04] [PASSED] DPI
[11:43:04] [PASSED] Writeback
[11:43:04] [PASSED] SPI
[11:43:04] [PASSED] USB
[11:43:04] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:43:04] =============== [PASSED] drmm_connector_init ===============
[11:43:04] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_init
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:43:04] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[11:43:04] [PASSED] Unknown
[11:43:04] [PASSED] VGA
[11:43:04] [PASSED] DVI-I
[11:43:04] [PASSED] DVI-D
[11:43:04] [PASSED] DVI-A
[11:43:04] [PASSED] Composite
[11:43:04] [PASSED] SVIDEO
[11:43:04] [PASSED] LVDS
[11:43:04] [PASSED] Component
[11:43:04] [PASSED] DIN
[11:43:04] [PASSED] DP
[11:43:04] [PASSED] HDMI-A
[11:43:04] [PASSED] HDMI-B
[11:43:04] [PASSED] TV
[11:43:04] [PASSED] eDP
[11:43:04] [PASSED] Virtual
[11:43:04] [PASSED] DSI
[11:43:04] [PASSED] DPI
[11:43:04] [PASSED] Writeback
[11:43:04] [PASSED] SPI
[11:43:04] [PASSED] USB
[11:43:04] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:43:04] ======== drm_test_drm_connector_dynamic_init_name =========
[11:43:04] [PASSED] Unknown
[11:43:04] [PASSED] VGA
[11:43:04] [PASSED] DVI-I
[11:43:04] [PASSED] DVI-D
[11:43:04] [PASSED] DVI-A
[11:43:04] [PASSED] Composite
[11:43:04] [PASSED] SVIDEO
[11:43:04] [PASSED] LVDS
[11:43:04] [PASSED] Component
[11:43:04] [PASSED] DIN
[11:43:04] [PASSED] DP
[11:43:04] [PASSED] HDMI-A
[11:43:04] [PASSED] HDMI-B
[11:43:04] [PASSED] TV
[11:43:04] [PASSED] eDP
[11:43:04] [PASSED] Virtual
[11:43:04] [PASSED] DSI
[11:43:04] [PASSED] DPI
[11:43:04] [PASSED] Writeback
[11:43:04] [PASSED] SPI
[11:43:04] [PASSED] USB
[11:43:04] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:43:04] =========== [PASSED] drm_connector_dynamic_init ============
[11:43:04] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:43:04] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:43:04] ======= drm_connector_dynamic_register (7 subtests) ========
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:43:04] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:43:04] ========= [PASSED] drm_connector_dynamic_register ==========
[11:43:04] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:43:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:43:04] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:43:04] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:43:04] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:43:04] ========== drm_test_get_tv_mode_from_name_valid ===========
[11:43:04] [PASSED] NTSC
[11:43:04] [PASSED] NTSC-443
[11:43:04] [PASSED] NTSC-J
[11:43:04] [PASSED] PAL
[11:43:04] [PASSED] PAL-M
[11:43:04] [PASSED] PAL-N
[11:43:04] [PASSED] SECAM
[11:43:04] [PASSED] Mono
[11:43:04] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:43:04] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:43:04] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:43:04] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:43:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:43:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:43:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:43:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:43:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:43:04] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:43:04] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[11:43:04] [PASSED] VIC 96
[11:43:04] [PASSED] VIC 97
[11:43:04] [PASSED] VIC 101
[11:43:04] [PASSED] VIC 102
[11:43:04] [PASSED] VIC 106
[11:43:04] [PASSED] VIC 107
[11:43:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:43:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:43:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:43:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:43:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:43:04] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:43:04] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:43:04] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:43:04] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[11:43:04] [PASSED] Automatic
[11:43:04] [PASSED] Full
[11:43:04] [PASSED] Limited 16:235
[11:43:04] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:43:04] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:43:04] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:43:04] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:43:04] === drm_test_drm_hdmi_connector_get_output_format_name ====
[11:43:04] [PASSED] RGB
[11:43:04] [PASSED] YUV 4:2:0
[11:43:04] [PASSED] YUV 4:2:2
[11:43:04] [PASSED] YUV 4:4:4
[11:43:04] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:43:04] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:43:04] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:43:04] ============= drm_damage_helper (21 subtests) ==============
[11:43:04] [PASSED] drm_test_damage_iter_no_damage
[11:43:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:43:04] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:43:04] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:43:04] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:43:04] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:43:04] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:43:04] [PASSED] drm_test_damage_iter_simple_damage
[11:43:04] [PASSED] drm_test_damage_iter_single_damage
[11:43:04] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:43:04] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:43:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:43:04] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:43:04] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:43:04] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:43:04] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:43:04] [PASSED] drm_test_damage_iter_damage
[11:43:04] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:43:04] [PASSED] drm_test_damage_iter_damage_one_outside
[11:43:04] [PASSED] drm_test_damage_iter_damage_src_moved
[11:43:04] [PASSED] drm_test_damage_iter_damage_not_visible
[11:43:04] ================ [PASSED] drm_damage_helper ================
[11:43:04] ============== drm_dp_mst_helper (3 subtests) ==============
[11:43:04] ============== drm_test_dp_mst_calc_pbn_mode ==============
[11:43:04] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:43:04] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:43:04] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:43:04] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:43:04] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:43:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:43:04] ============== drm_test_dp_mst_calc_pbn_div ===============
[11:43:04] [PASSED] Link rate 2000000 lane count 4
[11:43:04] [PASSED] Link rate 2000000 lane count 2
[11:43:04] [PASSED] Link rate 2000000 lane count 1
[11:43:04] [PASSED] Link rate 1350000 lane count 4
[11:43:04] [PASSED] Link rate 1350000 lane count 2
[11:43:04] [PASSED] Link rate 1350000 lane count 1
[11:43:04] [PASSED] Link rate 1000000 lane count 4
[11:43:04] [PASSED] Link rate 1000000 lane count 2
[11:43:04] [PASSED] Link rate 1000000 lane count 1
[11:43:04] [PASSED] Link rate 810000 lane count 4
[11:43:04] [PASSED] Link rate 810000 lane count 2
[11:43:04] [PASSED] Link rate 810000 lane count 1
[11:43:04] [PASSED] Link rate 540000 lane count 4
[11:43:04] [PASSED] Link rate 540000 lane count 2
[11:43:04] [PASSED] Link rate 540000 lane count 1
[11:43:04] [PASSED] Link rate 270000 lane count 4
[11:43:04] [PASSED] Link rate 270000 lane count 2
[11:43:04] [PASSED] Link rate 270000 lane count 1
[11:43:04] [PASSED] Link rate 162000 lane count 4
[11:43:04] [PASSED] Link rate 162000 lane count 2
[11:43:04] [PASSED] Link rate 162000 lane count 1
[11:43:04] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:43:04] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[11:43:04] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:43:04] [PASSED] DP_POWER_UP_PHY with port number
[11:43:04] [PASSED] DP_POWER_DOWN_PHY with port number
[11:43:04] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:43:04] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:43:04] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:43:04] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:43:04] [PASSED] DP_QUERY_PAYLOAD with port number
[11:43:04] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:43:04] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:43:04] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:43:04] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:43:04] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:43:04] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:43:04] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:43:04] [PASSED] DP_REMOTE_I2C_READ with port number
[11:43:04] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:43:04] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:43:04] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:43:04] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:43:04] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:43:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:43:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:43:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:43:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:43:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:43:04] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:43:04] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:43:04] ================ [PASSED] drm_dp_mst_helper ================
[11:43:04] ================== drm_exec (7 subtests) ===================
[11:43:04] [PASSED] sanitycheck
[11:43:04] [PASSED] test_lock
[11:43:04] [PASSED] test_lock_unlock
[11:43:04] [PASSED] test_duplicates
[11:43:04] [PASSED] test_prepare
[11:43:04] [PASSED] test_prepare_array
[11:43:04] [PASSED] test_multiple_loops
[11:43:04] ==================== [PASSED] drm_exec =====================
[11:43:04] =========== drm_format_helper_test (17 subtests) ===========
[11:43:04] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:43:04] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:43:04] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:43:04] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:43:04] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:43:04] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:43:04] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:43:04] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:43:04] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:43:04] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:43:04] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:43:04] ============== drm_test_fb_xrgb8888_to_mono ===============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:43:04] ==================== drm_test_fb_swab =====================
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ================ [PASSED] drm_test_fb_swab =================
[11:43:04] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:43:04] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[11:43:04] [PASSED] single_pixel_source_buffer
[11:43:04] [PASSED] single_pixel_clip_rectangle
[11:43:04] [PASSED] well_known_colors
[11:43:04] [PASSED] destination_pitch
[11:43:04] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:43:04] ================= drm_test_fb_clip_offset =================
[11:43:04] [PASSED] pass through
[11:43:04] [PASSED] horizontal offset
[11:43:04] [PASSED] vertical offset
[11:43:04] [PASSED] horizontal and vertical offset
[11:43:04] [PASSED] horizontal offset (custom pitch)
[11:43:04] [PASSED] vertical offset (custom pitch)
[11:43:04] [PASSED] horizontal and vertical offset (custom pitch)
[11:43:04] ============= [PASSED] drm_test_fb_clip_offset =============
[11:43:04] =================== drm_test_fb_memcpy ====================
[11:43:04] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:43:04] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:43:04] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:43:04] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:43:04] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:43:04] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:43:04] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:43:04] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:43:04] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:43:04] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:43:04] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:43:04] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:43:04] =============== [PASSED] drm_test_fb_memcpy ================
[11:43:04] ============= [PASSED] drm_format_helper_test ==============
[11:43:04] ================= drm_format (18 subtests) =================
[11:43:04] [PASSED] drm_test_format_block_width_invalid
[11:43:04] [PASSED] drm_test_format_block_width_one_plane
[11:43:04] [PASSED] drm_test_format_block_width_two_plane
[11:43:04] [PASSED] drm_test_format_block_width_three_plane
[11:43:04] [PASSED] drm_test_format_block_width_tiled
[11:43:04] [PASSED] drm_test_format_block_height_invalid
[11:43:04] [PASSED] drm_test_format_block_height_one_plane
[11:43:04] [PASSED] drm_test_format_block_height_two_plane
[11:43:04] [PASSED] drm_test_format_block_height_three_plane
[11:43:04] [PASSED] drm_test_format_block_height_tiled
[11:43:04] [PASSED] drm_test_format_min_pitch_invalid
[11:43:04] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:43:04] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:43:04] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:43:04] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:43:04] [PASSED] drm_test_format_min_pitch_two_plane
[11:43:04] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:43:04] [PASSED] drm_test_format_min_pitch_tiled
[11:43:04] =================== [PASSED] drm_format ====================
[11:43:04] ============== drm_framebuffer (10 subtests) ===============
[11:43:04] ========== drm_test_framebuffer_check_src_coords ==========
[11:43:04] [PASSED] Success: source fits into fb
[11:43:04] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:43:04] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:43:04] [PASSED] Fail: overflowing fb with source width
[11:43:04] [PASSED] Fail: overflowing fb with source height
[11:43:04] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:43:04] [PASSED] drm_test_framebuffer_cleanup
[11:43:04] =============== drm_test_framebuffer_create ===============
[11:43:04] [PASSED] ABGR8888 normal sizes
[11:43:04] [PASSED] ABGR8888 max sizes
[11:43:04] [PASSED] ABGR8888 pitch greater than min required
[11:43:04] [PASSED] ABGR8888 pitch less than min required
[11:43:04] [PASSED] ABGR8888 Invalid width
[11:43:04] [PASSED] ABGR8888 Invalid buffer handle
[11:43:04] [PASSED] No pixel format
[11:43:04] [PASSED] ABGR8888 Width 0
[11:43:04] [PASSED] ABGR8888 Height 0
[11:43:04] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:43:04] [PASSED] ABGR8888 Large buffer offset
[11:43:04] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:43:04] [PASSED] ABGR8888 Invalid flag
[11:43:04] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:43:04] [PASSED] ABGR8888 Valid buffer modifier
[11:43:04] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:43:04] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:43:04] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:43:04] [PASSED] NV12 Normal sizes
[11:43:04] [PASSED] NV12 Max sizes
[11:43:04] [PASSED] NV12 Invalid pitch
[11:43:04] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:43:04] [PASSED] NV12 different modifier per-plane
[11:43:04] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:43:04] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:43:04] [PASSED] NV12 Modifier for inexistent plane
[11:43:04] [PASSED] NV12 Handle for inexistent plane
[11:43:04] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:43:04] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:43:04] [PASSED] YVU420 Normal sizes
[11:43:04] [PASSED] YVU420 Max sizes
[11:43:04] [PASSED] YVU420 Invalid pitch
[11:43:04] [PASSED] YVU420 Different pitches
[11:43:04] [PASSED] YVU420 Different buffer offsets/pitches
[11:43:04] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:43:04] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:43:04] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:43:04] [PASSED] YVU420 Valid modifier
[11:43:04] [PASSED] YVU420 Different modifiers per plane
[11:43:04] [PASSED] YVU420 Modifier for inexistent plane
[11:43:04] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:43:04] [PASSED] X0L2 Normal sizes
[11:43:04] [PASSED] X0L2 Max sizes
[11:43:04] [PASSED] X0L2 Invalid pitch
[11:43:04] [PASSED] X0L2 Pitch greater than minimum required
[11:43:04] [PASSED] X0L2 Handle for inexistent plane
[11:43:04] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:43:04] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:43:04] [PASSED] X0L2 Valid modifier
[11:43:04] [PASSED] X0L2 Modifier for inexistent plane
[11:43:04] =========== [PASSED] drm_test_framebuffer_create ===========
[11:43:04] [PASSED] drm_test_framebuffer_free
[11:43:04] [PASSED] drm_test_framebuffer_init
[11:43:04] [PASSED] drm_test_framebuffer_init_bad_format
[11:43:04] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:43:04] [PASSED] drm_test_framebuffer_lookup
[11:43:04] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:43:04] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:43:04] ================= [PASSED] drm_framebuffer =================
[11:43:04] ================ drm_gem_shmem (8 subtests) ================
[11:43:04] [PASSED] drm_gem_shmem_test_obj_create
[11:43:04] [PASSED] drm_gem_shmem_test_obj_create_private
[11:43:04] [PASSED] drm_gem_shmem_test_pin_pages
[11:43:04] [PASSED] drm_gem_shmem_test_vmap
[11:43:04] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:43:04] [PASSED] drm_gem_shmem_test_get_sg_table
[11:43:04] [PASSED] drm_gem_shmem_test_madvise
[11:43:04] [PASSED] drm_gem_shmem_test_purge
[11:43:04] ================== [PASSED] drm_gem_shmem ==================
[11:43:04] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[11:43:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:43:04] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:43:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:43:04] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:43:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:43:04] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:43:04] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[11:43:04] [PASSED] Automatic
[11:43:04] [PASSED] Full
[11:43:04] [PASSED] Limited 16:235
[11:43:04] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:43:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:43:04] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:43:04] [PASSED] drm_test_check_disable_connector
[11:43:04] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:43:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:43:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:43:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:43:04] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:43:04] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:43:04] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:43:04] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:43:04] [PASSED] drm_test_check_output_bpc_dvi
[11:43:04] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:43:04] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:43:04] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:43:04] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:43:04] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:43:04] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:43:04] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:43:04] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:43:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:43:04] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:43:04] [PASSED] drm_test_check_broadcast_rgb_value
[11:43:04] [PASSED] drm_test_check_bpc_8_value
[11:43:04] [PASSED] drm_test_check_bpc_10_value
[11:43:04] [PASSED] drm_test_check_bpc_12_value
[11:43:04] [PASSED] drm_test_check_format_value
[11:43:04] [PASSED] drm_test_check_tmds_char_value
[11:43:04] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:43:04] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[11:43:04] [PASSED] drm_test_check_mode_valid
[11:43:04] [PASSED] drm_test_check_mode_valid_reject
[11:43:04] [PASSED] drm_test_check_mode_valid_reject_rate
[11:43:04] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:43:04] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:43:04] ================= drm_managed (2 subtests) =================
[11:43:04] [PASSED] drm_test_managed_release_action
[11:43:04] [PASSED] drm_test_managed_run_action
[11:43:04] =================== [PASSED] drm_managed ===================
[11:43:04] =================== drm_mm (6 subtests) ====================
[11:43:04] [PASSED] drm_test_mm_init
[11:43:04] [PASSED] drm_test_mm_debug
[11:43:04] [PASSED] drm_test_mm_align32
[11:43:04] [PASSED] drm_test_mm_align64
[11:43:04] [PASSED] drm_test_mm_lowest
[11:43:04] [PASSED] drm_test_mm_highest
[11:43:04] ===================== [PASSED] drm_mm ======================
[11:43:04] ============= drm_modes_analog_tv (5 subtests) =============
[11:43:04] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:43:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:43:04] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:43:04] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:43:04] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:43:04] =============== [PASSED] drm_modes_analog_tv ===============
[11:43:04] ============== drm_plane_helper (2 subtests) ===============
[11:43:04] =============== drm_test_check_plane_state ================
[11:43:04] [PASSED] clipping_simple
[11:43:04] [PASSED] clipping_rotate_reflect
[11:43:04] [PASSED] positioning_simple
[11:43:04] [PASSED] upscaling
[11:43:04] [PASSED] downscaling
[11:43:04] [PASSED] rounding1
[11:43:04] [PASSED] rounding2
[11:43:04] [PASSED] rounding3
[11:43:04] [PASSED] rounding4
[11:43:04] =========== [PASSED] drm_test_check_plane_state ============
[11:43:04] =========== drm_test_check_invalid_plane_state ============
[11:43:04] [PASSED] positioning_invalid
[11:43:04] [PASSED] upscaling_invalid
[11:43:04] [PASSED] downscaling_invalid
[11:43:04] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:43:04] ================ [PASSED] drm_plane_helper =================
[11:43:04] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:43:04] ====== drm_test_connector_helper_tv_get_modes_check =======
[11:43:04] [PASSED] None
[11:43:04] [PASSED] PAL
[11:43:04] [PASSED] NTSC
[11:43:04] [PASSED] Both, NTSC Default
[11:43:04] [PASSED] Both, PAL Default
[11:43:04] [PASSED] Both, NTSC Default, with PAL on command-line
[11:43:04] [PASSED] Both, PAL Default, with NTSC on command-line
[11:43:04] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:43:04] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:43:04] ================== drm_rect (9 subtests) ===================
[11:43:04] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:43:04] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:43:04] [PASSED] drm_test_rect_clip_scaled_clipped
[11:43:04] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:43:04] ================= drm_test_rect_intersect =================
[11:43:04] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:43:04] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:43:04] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:43:04] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:43:04] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:43:04] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:43:04] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:43:04] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:43:04] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:43:04] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:43:04] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:43:04] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:43:04] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:43:04] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:43:04] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:43:04] ============= [PASSED] drm_test_rect_intersect =============
[11:43:04] ================ drm_test_rect_calc_hscale ================
[11:43:04] [PASSED] normal use
[11:43:04] [PASSED] out of max range
[11:43:04] [PASSED] out of min range
[11:43:04] [PASSED] zero dst
[11:43:04] [PASSED] negative src
[11:43:04] [PASSED] negative dst
[11:43:04] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:43:04] ================ drm_test_rect_calc_vscale ================
[11:43:04] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[11:43:04] [PASSED] out of max range
[11:43:04] [PASSED] out of min range
[11:43:04] [PASSED] zero dst
[11:43:04] [PASSED] negative src
[11:43:04] [PASSED] negative dst
[11:43:04] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:43:04] ================== drm_test_rect_rotate ===================
[11:43:04] [PASSED] reflect-x
[11:43:04] [PASSED] reflect-y
[11:43:04] [PASSED] rotate-0
[11:43:04] [PASSED] rotate-90
[11:43:04] [PASSED] rotate-180
[11:43:04] [PASSED] rotate-270
[11:43:04] ============== [PASSED] drm_test_rect_rotate ===============
[11:43:04] ================ drm_test_rect_rotate_inv =================
[11:43:04] [PASSED] reflect-x
[11:43:04] [PASSED] reflect-y
[11:43:04] [PASSED] rotate-0
[11:43:04] [PASSED] rotate-90
[11:43:04] [PASSED] rotate-180
[11:43:04] [PASSED] rotate-270
[11:43:04] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:43:04] ==================== [PASSED] drm_rect =====================
[11:43:04] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:43:04] ============ drm_test_sysfb_build_fourcc_list =============
[11:43:04] [PASSED] no native formats
[11:43:04] [PASSED] XRGB8888 as native format
[11:43:04] [PASSED] remove duplicates
[11:43:04] [PASSED] convert alpha formats
[11:43:04] [PASSED] random formats
[11:43:04] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:43:04] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:43:04] ================== drm_fixp (2 subtests) ===================
[11:43:04] [PASSED] drm_test_int2fixp
[11:43:04] [PASSED] drm_test_sm2fixp
[11:43:04] ==================== [PASSED] drm_fixp =====================
[11:43:04] ============================================================
[11:43:04] Testing complete. Ran 624 tests: passed: 624
[11:43:04] Elapsed time: 27.156s total, 1.697s configuring, 25.039s building, 0.404s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:43:04] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:43:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[11:43:15] Starting KUnit Kernel (1/1)...
[11:43:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:43:15] ================= ttm_device (5 subtests) ==================
[11:43:15] [PASSED] ttm_device_init_basic
[11:43:15] [PASSED] ttm_device_init_multiple
[11:43:15] [PASSED] ttm_device_fini_basic
[11:43:15] [PASSED] ttm_device_init_no_vma_man
[11:43:15] ================== ttm_device_init_pools ==================
[11:43:15] [PASSED] No DMA allocations, no DMA32 required
[11:43:15] [PASSED] DMA allocations, DMA32 required
[11:43:15] [PASSED] No DMA allocations, DMA32 required
[11:43:15] [PASSED] DMA allocations, no DMA32 required
[11:43:15] ============== [PASSED] ttm_device_init_pools ==============
[11:43:15] =================== [PASSED] ttm_device ====================
[11:43:15] ================== ttm_pool (8 subtests) ===================
[11:43:15] ================== ttm_pool_alloc_basic ===================
[11:43:15] [PASSED] One page
[11:43:15] [PASSED] More than one page
[11:43:15] [PASSED] Above the allocation limit
[11:43:15] [PASSED] One page, with coherent DMA mappings enabled
[11:43:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:43:15] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:43:15] ============== ttm_pool_alloc_basic_dma_addr ==============
[11:43:15] [PASSED] One page
[11:43:15] [PASSED] More than one page
[11:43:15] [PASSED] Above the allocation limit
[11:43:15] [PASSED] One page, with coherent DMA mappings enabled
[11:43:15] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:43:15] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:43:15] [PASSED] ttm_pool_alloc_order_caching_match
[11:43:15] [PASSED] ttm_pool_alloc_caching_mismatch
[11:43:15] [PASSED] ttm_pool_alloc_order_mismatch
[11:43:15] [PASSED] ttm_pool_free_dma_alloc
[11:43:15] [PASSED] ttm_pool_free_no_dma_alloc
[11:43:15] [PASSED] ttm_pool_fini_basic
[11:43:15] ==================== [PASSED] ttm_pool =====================
[11:43:15] ================ ttm_resource (8 subtests) =================
[11:43:15] ================= ttm_resource_init_basic =================
[11:43:15] [PASSED] Init resource in TTM_PL_SYSTEM
[11:43:15] [PASSED] Init resource in TTM_PL_VRAM
[11:43:15] [PASSED] Init resource in a private placement
[11:43:15] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:43:15] ============= [PASSED] ttm_resource_init_basic =============
[11:43:15] [PASSED] ttm_resource_init_pinned
[11:43:15] [PASSED] ttm_resource_fini_basic
[11:43:15] [PASSED] ttm_resource_manager_init_basic
[11:43:15] [PASSED] ttm_resource_manager_usage_basic
[11:43:15] [PASSED] ttm_resource_manager_set_used_basic
[11:43:15] [PASSED] ttm_sys_man_alloc_basic
[11:43:15] [PASSED] ttm_sys_man_free_basic
[11:43:15] ================== [PASSED] ttm_resource ===================
[11:43:15] =================== ttm_tt (15 subtests) ===================
[11:43:15] ==================== ttm_tt_init_basic ====================
[11:43:15] [PASSED] Page-aligned size
[11:43:15] [PASSED] Extra pages requested
[11:43:15] ================ [PASSED] ttm_tt_init_basic ================
[11:43:15] [PASSED] ttm_tt_init_misaligned
[11:43:15] [PASSED] ttm_tt_fini_basic
[11:43:15] [PASSED] ttm_tt_fini_sg
[11:43:15] [PASSED] ttm_tt_fini_shmem
[11:43:15] [PASSED] ttm_tt_create_basic
[11:43:15] [PASSED] ttm_tt_create_invalid_bo_type
[11:43:15] [PASSED] ttm_tt_create_ttm_exists
[11:43:15] [PASSED] ttm_tt_create_failed
[11:43:15] [PASSED] ttm_tt_destroy_basic
[11:43:15] [PASSED] ttm_tt_populate_null_ttm
[11:43:15] [PASSED] ttm_tt_populate_populated_ttm
[11:43:15] [PASSED] ttm_tt_unpopulate_basic
[11:43:15] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:43:15] [PASSED] ttm_tt_swapin_basic
[11:43:15] ===================== [PASSED] ttm_tt ======================
[11:43:15] =================== ttm_bo (14 subtests) ===================
[11:43:15] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[11:43:15] [PASSED] Cannot be interrupted and sleeps
[11:43:15] [PASSED] Cannot be interrupted, locks straight away
[11:43:15] [PASSED] Can be interrupted, sleeps
[11:43:15] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:43:15] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:43:15] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:43:15] [PASSED] ttm_bo_reserve_double_resv
[11:43:15] [PASSED] ttm_bo_reserve_interrupted
[11:43:15] [PASSED] ttm_bo_reserve_deadlock
[11:43:15] [PASSED] ttm_bo_unreserve_basic
[11:43:15] [PASSED] ttm_bo_unreserve_pinned
[11:43:15] [PASSED] ttm_bo_unreserve_bulk
[11:43:15] [PASSED] ttm_bo_fini_basic
[11:43:15] [PASSED] ttm_bo_fini_shared_resv
[11:43:15] [PASSED] ttm_bo_pin_basic
[11:43:15] [PASSED] ttm_bo_pin_unpin_resource
[11:43:15] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:43:15] ===================== [PASSED] ttm_bo ======================
[11:43:15] ============== ttm_bo_validate (21 subtests) ===============
[11:43:15] ============== ttm_bo_init_reserved_sys_man ===============
[11:43:15] [PASSED] Buffer object for userspace
[11:43:15] [PASSED] Kernel buffer object
[11:43:15] [PASSED] Shared buffer object
[11:43:15] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:43:15] ============== ttm_bo_init_reserved_mock_man ==============
[11:43:15] [PASSED] Buffer object for userspace
[11:43:15] [PASSED] Kernel buffer object
[11:43:15] [PASSED] Shared buffer object
[11:43:15] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:43:15] [PASSED] ttm_bo_init_reserved_resv
[11:43:15] ================== ttm_bo_validate_basic ==================
[11:43:15] [PASSED] Buffer object for userspace
[11:43:15] [PASSED] Kernel buffer object
[11:43:15] [PASSED] Shared buffer object
[11:43:15] ============== [PASSED] ttm_bo_validate_basic ==============
[11:43:15] [PASSED] ttm_bo_validate_invalid_placement
[11:43:15] ============= ttm_bo_validate_same_placement ==============
[11:43:15] [PASSED] System manager
[11:43:15] [PASSED] VRAM manager
[11:43:15] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:43:15] [PASSED] ttm_bo_validate_failed_alloc
[11:43:15] [PASSED] ttm_bo_validate_pinned
[11:43:15] [PASSED] ttm_bo_validate_busy_placement
[11:43:15] ================ ttm_bo_validate_multihop =================
[11:43:15] [PASSED] Buffer object for userspace
[11:43:15] [PASSED] Kernel buffer object
[11:43:15] [PASSED] Shared buffer object
[11:43:15] ============ [PASSED] ttm_bo_validate_multihop =============
[11:43:15] ========== ttm_bo_validate_no_placement_signaled ==========
[11:43:15] [PASSED] Buffer object in system domain, no page vector
[11:43:15] [PASSED] Buffer object in system domain with an existing page vector
[11:43:15] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:43:15] ======== ttm_bo_validate_no_placement_not_signaled ========
[11:43:15] [PASSED] Buffer object for userspace
[11:43:15] [PASSED] Kernel buffer object
[11:43:15] [PASSED] Shared buffer object
[11:43:15] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:43:15] [PASSED] ttm_bo_validate_move_fence_signaled
[11:43:15] ========= ttm_bo_validate_move_fence_not_signaled =========
[11:43:15] [PASSED] Waits for GPU
[11:43:15] [PASSED] Tries to lock straight away
[11:43:15] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:43:15] [PASSED] ttm_bo_validate_happy_evict
[11:43:15] [PASSED] ttm_bo_validate_all_pinned_evict
[11:43:15] [PASSED] ttm_bo_validate_allowed_only_evict
[11:43:15] [PASSED] ttm_bo_validate_deleted_evict
[11:43:15] [PASSED] ttm_bo_validate_busy_domain_evict
[11:43:15] [PASSED] ttm_bo_validate_evict_gutting
[11:43:15] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[11:43:15] ================= [PASSED] ttm_bo_validate =================
[11:43:15] ============================================================
[11:43:15] Testing complete. Ran 101 tests: passed: 101
[11:43:15] Elapsed time: 11.305s total, 1.691s configuring, 9.397s building, 0.185s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 21+ messages in thread* ✗ CI.checksparse: warning for drm/i915/display: Enable system cache support for FBC (rev4)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (9 preceding siblings ...)
2025-11-28 11:43 ` ✓ CI.KUnit: success " Patchwork
@ 2025-11-28 11:58 ` Patchwork
2025-11-28 12:52 ` ✓ Xe.CI.BAT: success " Patchwork
2025-11-28 14:08 ` ✗ Xe.CI.Full: failure " Patchwork
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-28 11:58 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev4)
URL : https://patchwork.freedesktop.org/series/157944/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast e1c1b3e03e356d1e20432dcb0d38ad44d5e92670
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_casf.c:147:21: error: too long token expansion
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_lt_phy.c:1935:35: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1931:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1932:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1933:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1998:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1999:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2000:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2020:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2021:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2022:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 21+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915/display: Enable system cache support for FBC (rev4)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (10 preceding siblings ...)
2025-11-28 11:58 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-11-28 12:52 ` Patchwork
2025-11-28 14:08 ` ✗ Xe.CI.Full: failure " Patchwork
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-28 12:52 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1017 bytes --]
== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev4)
URL : https://patchwork.freedesktop.org/series/157944/
State : success
== Summary ==
CI Bug Log - changes from xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23_BAT -> xe-pw-157944v4_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 11)
------------------------------
Missing (1): bat-dg2-oem2
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8643 -> IGT_8645
* Linux: xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23 -> xe-pw-157944v4
IGT_8643: 9e6e12ee7d6d66dd7668aff22b330d3ca23b3e5e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8645: 8645
xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23: 2e2c779bc906d76b96ec0a46d9b85d1b035d2e23
xe-pw-157944v4: 157944v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/index.html
[-- Attachment #2: Type: text/html, Size: 1579 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread* ✗ Xe.CI.Full: failure for drm/i915/display: Enable system cache support for FBC (rev4)
2025-11-27 11:53 [PATCH v4 0/3] drm/i915/display: Enable system cache support for FBC Vinod Govindapillai
` (11 preceding siblings ...)
2025-11-28 12:52 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-11-28 14:08 ` Patchwork
12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-28 14:08 UTC (permalink / raw)
To: Vinod Govindapillai; +Cc: intel-xe
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== Series Details ==
Series: drm/i915/display: Enable system cache support for FBC (rev4)
URL : https://patchwork.freedesktop.org/series/157944/
State : failure
== Summary ==
CI Bug Log - changes from xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23_FULL -> xe-pw-157944v4_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-157944v4_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-157944v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-157944v4_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-adlp: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_colorop@plane-xr24-xr24-multiply_inv_125:
- shard-dg2-set2: NOTRUN -> [SKIP][3] +8 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@kms_colorop@plane-xr24-xr24-multiply_inv_125.html
* igt@kms_colorop@plane-xr24-xr24-pq_eotf-pq_inv_eotf:
- shard-adlp: NOTRUN -> [SKIP][4] +9 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_colorop@plane-xr24-xr24-pq_eotf-pq_inv_eotf.html
* igt@kms_colorop@plane-xr30-xr30-ctm_3x4_bt709_enc_dec:
- shard-lnl: NOTRUN -> [SKIP][5] +9 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_colorop@plane-xr30-xr30-ctm_3x4_bt709_enc_dec.html
* igt@kms_colorop@plane-xr30-xr30-pq_eotf:
- shard-bmg: NOTRUN -> [SKIP][6] +6 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@kms_colorop@plane-xr30-xr30-pq_eotf.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_colorop@plane-xr24-xr24-gamma_2_2_inv_oetf}:
- shard-bmg: NOTRUN -> [SKIP][7]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@kms_colorop@plane-xr24-xr24-gamma_2_2_inv_oetf.html
- shard-adlp: NOTRUN -> [SKIP][8]
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_colorop@plane-xr24-xr24-gamma_2_2_inv_oetf.html
- shard-dg2-set2: NOTRUN -> [SKIP][9]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@kms_colorop@plane-xr24-xr24-gamma_2_2_inv_oetf.html
* {igt@kms_colorop@plane-xr30-xr30-gamma_2_2_inv_oetf}:
- shard-lnl: NOTRUN -> [SKIP][10] +2 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@kms_colorop@plane-xr30-xr30-gamma_2_2_inv_oetf.html
New tests
---------
New tests have been introduced between xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23_FULL and xe-pw-157944v4_FULL:
### New IGT tests (34) ###
* igt@kms_properties@colorop-properties-atomic@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_properties@colorop-properties-atomic@pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [0.35] s
* igt@kms_properties@colorop-properties-atomic@pipe-a-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [0.07] s
* igt@kms_properties@colorop-properties-atomic@pipe-a-hdmi-a-6:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_properties@colorop-properties-atomic@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_properties@colorop-properties-atomic@pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.10] s
* igt@kms_properties@colorop-properties-atomic@pipe-b-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [0.06] s
* igt@kms_properties@colorop-properties-atomic@pipe-b-hdmi-a-6:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_properties@colorop-properties-atomic@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_properties@colorop-properties-atomic@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.09] s
* igt@kms_properties@colorop-properties-atomic@pipe-c-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [0.06] s
* igt@kms_properties@colorop-properties-atomic@pipe-c-hdmi-a-6:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_properties@colorop-properties-atomic@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.17] s
* igt@kms_properties@colorop-properties-atomic@pipe-d-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [0.06] s
* igt@kms_properties@colorop-properties-atomic@pipe-d-hdmi-a-6:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_properties@colorop-properties-legacy@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.21] s
* igt@kms_properties@colorop-properties-legacy@pipe-a-edp-1:
- Statuses : 1 pass(s)
- Exec time: [0.32] s
* igt@kms_properties@colorop-properties-legacy@pipe-a-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [0.07] s
* igt@kms_properties@colorop-properties-legacy@pipe-a-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.12] s
* igt@kms_properties@colorop-properties-legacy@pipe-a-hdmi-a-6:
- Statuses : 1 pass(s)
- Exec time: [0.19] s
* igt@kms_properties@colorop-properties-legacy@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.20] s
* igt@kms_properties@colorop-properties-legacy@pipe-b-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.10] s
* igt@kms_properties@colorop-properties-legacy@pipe-b-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [0.06] s
* igt@kms_properties@colorop-properties-legacy@pipe-b-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.14] s
* igt@kms_properties@colorop-properties-legacy@pipe-b-hdmi-a-6:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_properties@colorop-properties-legacy@pipe-c-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.20] s
* igt@kms_properties@colorop-properties-legacy@pipe-c-edp-1:
- Statuses : 1 pass(s)
- Exec time: [1.07] s
* igt@kms_properties@colorop-properties-legacy@pipe-c-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [0.06] s
* igt@kms_properties@colorop-properties-legacy@pipe-c-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.16] s
* igt@kms_properties@colorop-properties-legacy@pipe-c-hdmi-a-6:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
* igt@kms_properties@colorop-properties-legacy@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.19] s
* igt@kms_properties@colorop-properties-legacy@pipe-d-hdmi-a-1:
- Statuses : 1 pass(s)
- Exec time: [0.06] s
* igt@kms_properties@colorop-properties-legacy@pipe-d-hdmi-a-3:
- Statuses : 1 pass(s)
- Exec time: [0.16] s
* igt@kms_properties@colorop-properties-legacy@pipe-d-hdmi-a-6:
- Statuses : 1 pass(s)
- Exec time: [0.13] s
Known issues
------------
Here are the changes found in xe-pw-157944v4_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-write:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#1125])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@intel_hwmon@hwmon-write.html
* igt@kms_3d@basic:
- shard-lnl: NOTRUN -> [SKIP][12] ([Intel XE#6011])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@kms_3d@basic.html
* igt@kms_async_flips@async-flip-hang@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [FAIL][13] ([Intel XE#6676]) +9 other tests fail
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_async_flips@async-flip-hang@pipe-a-edp-1.html
* igt@kms_async_flips@async-flip-suspend-resume@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [DMESG-WARN][14] ([Intel XE#4543])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@kms_async_flips@async-flip-suspend-resume@pipe-b-hdmi-a-1.html
* igt@kms_async_flips@async-flip-suspend-resume@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [INCOMPLETE][15] ([Intel XE#4543])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@kms_async_flips@async-flip-suspend-resume@pipe-d-hdmi-a-1.html
* igt@kms_async_flips@async-flip-with-page-flip-events-linear:
- shard-lnl: NOTRUN -> [FAIL][16] ([Intel XE#5993] / [Intel XE#6676])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_async_flips@async-flip-with-page-flip-events-linear.html
* igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [FAIL][17] ([Intel XE#5993])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_async_flips@async-flip-with-page-flip-events-linear@pipe-c-edp-1.html
* igt@kms_async_flips@test-cursor:
- shard-adlp: [PASS][18] -> [DMESG-WARN][19] ([Intel XE#2953] / [Intel XE#4173])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-4/igt@kms_async_flips@test-cursor.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@kms_async_flips@test-cursor.html
* igt@kms_async_flips@test-time-stamp:
- shard-lnl: NOTRUN -> [FAIL][20] ([Intel XE#6677]) +5 other tests fail
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@kms_async_flips@test-time-stamp.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2370])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-180:
- shard-adlp: NOTRUN -> [SKIP][22] ([Intel XE#1124]) +14 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-adlp: NOTRUN -> [SKIP][23] ([Intel XE#610])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#1407]) +3 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][25] ([Intel XE#316]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-dg2-set2: NOTRUN -> [SKIP][26] ([Intel XE#316]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2327]) +2 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-adlp: [PASS][28] -> [FAIL][29] ([Intel XE#1231])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-adlp: NOTRUN -> [FAIL][30] ([Intel XE#1874])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#1428])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-adlp: [PASS][32] -> [FAIL][33] ([Intel XE#6699])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#1124]) +11 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
- shard-dg2-set2: NOTRUN -> [SKIP][35] ([Intel XE#1124]) +18 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#1124]) +18 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#2328])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_big_fb@yf-tiled-addfb.html
- shard-dg2-set2: NOTRUN -> [SKIP][38] ([Intel XE#619])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@kms_big_fb@yf-tiled-addfb.html
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#1467])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-adlp: NOTRUN -> [SKIP][40] ([Intel XE#2191]) +2 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#2191]) +2 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
- shard-dg2-set2: NOTRUN -> [SKIP][43] ([Intel XE#2191]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
- shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#1512]) +2 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-1-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][45] ([Intel XE#367]) +7 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-1-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#367]) +7 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][47] ([Intel XE#367]) +6 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-3-displays-2560x1440p:
- shard-lnl: NOTRUN -> [SKIP][48] ([Intel XE#367]) +2 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#2887]) +27 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2887]) +23 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][51] ([Intel XE#787]) +74 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][52] ([Intel XE#455] / [Intel XE#787]) +49 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-adlp: NOTRUN -> [SKIP][53] ([Intel XE#3442])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
- shard-dg2-set2: NOTRUN -> [SKIP][54] ([Intel XE#3442])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#2669] / [Intel XE#3433]) +3 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#3432]) +2 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
- shard-lnl: NOTRUN -> [SKIP][57] ([Intel XE#3432]) +2 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][58] ([Intel XE#2907])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-435/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][59] ([Intel XE#787]) +195 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][60] ([Intel XE#6168])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2652] / [Intel XE#787]) +13 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][62] ([Intel XE#455] / [Intel XE#787]) +55 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-dp-4.html
* igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][63] ([Intel XE#4416]) +3 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html
* igt@kms_chamelium_color@ctm-negative:
- shard-lnl: NOTRUN -> [SKIP][64] ([Intel XE#306]) +1 other test skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_chamelium_color@ctm-negative.html
* igt@kms_chamelium_color@ctm-red-to-blue:
- shard-adlp: NOTRUN -> [SKIP][65] ([Intel XE#306]) +2 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_chamelium_color@ctm-red-to-blue.html
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2325]) +2 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_chamelium_color@ctm-red-to-blue.html
* igt@kms_chamelium_color@gamma:
- shard-dg2-set2: NOTRUN -> [SKIP][67] ([Intel XE#306]) +2 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate:
- shard-adlp: NOTRUN -> [SKIP][68] ([Intel XE#373]) +11 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#2252]) +12 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html
* igt@kms_chamelium_hpd@hdmi-hpd:
- shard-dg2-set2: NOTRUN -> [SKIP][70] ([Intel XE#373]) +13 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@kms_chamelium_hpd@hdmi-hpd.html
- shard-lnl: NOTRUN -> [SKIP][71] ([Intel XE#373]) +12 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_chamelium_hpd@hdmi-hpd.html
* igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_dec:
- shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#6704]) +13 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_dec.html
* igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_enc:
- shard-dg2-set2: NOTRUN -> [SKIP][73] ([Intel XE#6704]) +13 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_enc.html
* igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_enc_dec:
- shard-adlp: NOTRUN -> [SKIP][74] ([Intel XE#6704]) +17 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_enc_dec.html
* igt@kms_colorop@plane-xr30-xr30-pq_125_eotf-pq_125_inv_eotf:
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#6704]) +13 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_colorop@plane-xr30-xr30-pq_125_eotf-pq_125_inv_eotf.html
* igt@kms_content_protection@dp-mst-suspend-resume:
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#6692])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_content_protection@dp-mst-suspend-resume.html
* igt@kms_content_protection@legacy:
- shard-adlp: NOTRUN -> [SKIP][77] ([Intel XE#455]) +34 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@kms_content_protection@legacy.html
- shard-dg2-set2: NOTRUN -> [FAIL][78] ([Intel XE#1178]) +3 other tests fail
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@kms_content_protection@legacy.html
- shard-lnl: NOTRUN -> [SKIP][79] ([Intel XE#3278]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@suspend-resume:
- shard-bmg: NOTRUN -> [SKIP][80] ([Intel XE#6705])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_content_protection@suspend-resume.html
- shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#6705])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_content_protection@suspend-resume.html
* igt@kms_content_protection@type1:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#2341])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-offscreen-256x85:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#2320]) +5 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-256x85.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg2-set2: NOTRUN -> [SKIP][84] ([Intel XE#308]) +1 other test skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@kms_cursor_crc@cursor-onscreen-512x170.html
- shard-lnl: NOTRUN -> [SKIP][85] ([Intel XE#2321])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-512x512:
- shard-adlp: NOTRUN -> [SKIP][86] ([Intel XE#308]) +1 other test skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_cursor_crc@cursor-random-512x512.html
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#2321])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_cursor_crc@cursor-random-512x512.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#455]) +32 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@kms_cursor_crc@cursor-random-max-size.html
- shard-lnl: NOTRUN -> [SKIP][89] ([Intel XE#1424]) +5 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
- shard-adlp: NOTRUN -> [SKIP][90] ([Intel XE#309]) +3 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
- shard-bmg: NOTRUN -> [SKIP][91] ([Intel XE#2291]) +1 other test skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-bmg: [PASS][92] -> [SKIP][93] ([Intel XE#2291]) +1 other test skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
- shard-lnl: NOTRUN -> [SKIP][94] ([Intel XE#309]) +6 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: NOTRUN -> [FAIL][95] ([Intel XE#4633])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-lnl: NOTRUN -> [SKIP][96] ([Intel XE#323])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
- shard-adlp: NOTRUN -> [SKIP][97] ([Intel XE#323])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#2286])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-lnl: NOTRUN -> [SKIP][99] ([Intel XE#1508])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][100] ([Intel XE#1508]) +1 other test skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_display_modes@extended-mode-basic:
- shard-adlp: NOTRUN -> [SKIP][101] ([Intel XE#4302])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg2-set2: NOTRUN -> [SKIP][102] ([Intel XE#4354])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@kms_dp_link_training@non-uhbr-mst.html
- shard-adlp: NOTRUN -> [SKIP][103] ([Intel XE#4354])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-lnl: NOTRUN -> [SKIP][104] ([Intel XE#4354]) +1 other test skip
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_dp_link_training@uhbr-mst.html
- shard-adlp: NOTRUN -> [SKIP][105] ([Intel XE#4356])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@kms_dp_link_training@uhbr-mst.html
- shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#4354]) +1 other test skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_dp_link_training@uhbr-mst.html
- shard-dg2-set2: NOTRUN -> [SKIP][107] ([Intel XE#4356])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-bmg: NOTRUN -> [SKIP][108] ([Intel XE#4331])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@kms_dp_linktrain_fallback@dsc-fallback.html
- shard-adlp: NOTRUN -> [SKIP][109] ([Intel XE#4331])
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@kms_dp_linktrain_fallback@dsc-fallback.html
- shard-dg2-set2: NOTRUN -> [SKIP][110] ([Intel XE#4331])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@kms_dp_linktrain_fallback@dsc-fallback.html
- shard-lnl: NOTRUN -> [SKIP][111] ([Intel XE#4331])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-bmg: NOTRUN -> [SKIP][112] ([Intel XE#2244]) +1 other test skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_fb_coherency@memset-crc:
- shard-adlp: [PASS][113] -> [CRASH][114] ([Intel XE#6706]) +1 other test crash
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-9/igt@kms_fb_coherency@memset-crc.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_fb_coherency@memset-crc.html
- shard-bmg: [PASS][115] -> [CRASH][116] ([Intel XE#6706]) +1 other test crash
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-5/igt@kms_fb_coherency@memset-crc.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_fb_coherency@memset-crc.html
- shard-dg2-set2: [PASS][117] -> [CRASH][118] ([Intel XE#6706]) +1 other test crash
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-463/igt@kms_fb_coherency@memset-crc.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@kms_fb_coherency@memset-crc.html
* igt@kms_fb_coherency@memset-crc@mmap-offset-wc:
- shard-lnl: [PASS][119] -> [CRASH][120] ([Intel XE#6706]) +1 other test crash
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-7/igt@kms_fb_coherency@memset-crc@mmap-offset-wc.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_fb_coherency@memset-crc@mmap-offset-wc.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-lnl: NOTRUN -> [SKIP][121] ([Intel XE#4422]) +1 other test skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
- shard-adlp: NOTRUN -> [SKIP][122] ([Intel XE#4422])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
- shard-dg2-set2: NOTRUN -> [SKIP][123] ([Intel XE#4422])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
* igt@kms_fbcon_fbt@psr:
- shard-bmg: NOTRUN -> [SKIP][124] ([Intel XE#776])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_fbcon_fbt@psr.html
- shard-adlp: NOTRUN -> [SKIP][125] ([Intel XE#776])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_fbcon_fbt@psr.html
- shard-dg2-set2: NOTRUN -> [SKIP][126] ([Intel XE#776])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@kms_fbcon_fbt@psr.html
* igt@kms_feature_discovery@dp-mst:
- shard-adlp: NOTRUN -> [SKIP][127] ([Intel XE#1137])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_feature_discovery@dp-mst.html
- shard-bmg: NOTRUN -> [SKIP][128] ([Intel XE#2375])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_feature_discovery@dp-mst.html
- shard-dg2-set2: NOTRUN -> [SKIP][129] ([Intel XE#1137])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@kms_feature_discovery@dp-mst.html
- shard-lnl: NOTRUN -> [SKIP][130] ([Intel XE#1137])
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
- shard-bmg: NOTRUN -> [SKIP][131] ([Intel XE#2316])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-bmg: [PASS][132] -> [SKIP][133] ([Intel XE#2316]) +1 other test skip
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-7/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-lnl: NOTRUN -> [SKIP][134] ([Intel XE#1421]) +7 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@2x-nonexisting-fb-interruptible:
- shard-adlp: NOTRUN -> [SKIP][135] ([Intel XE#310]) +6 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@kms_flip@2x-nonexisting-fb-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-lnl: NOTRUN -> [SKIP][136] ([Intel XE#1401] / [Intel XE#1745]) +5 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-bmg: NOTRUN -> [SKIP][137] ([Intel XE#2293] / [Intel XE#2380]) +4 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][138] ([Intel XE#2293]) +4 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][139] ([Intel XE#1401]) +5 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][140] ([Intel XE#1397] / [Intel XE#1745]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][141] ([Intel XE#1397]) +1 other test skip
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][142] ([Intel XE#6312])
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][143] ([Intel XE#651]) +12 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-pgflip-blt:
- shard-adlp: NOTRUN -> [SKIP][144] ([Intel XE#651]) +16 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][145] ([Intel XE#2312]) +18 other tests skip
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render:
- shard-adlp: NOTRUN -> [SKIP][146] ([Intel XE#656]) +60 other tests skip
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][147] ([Intel XE#4141]) +21 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render:
- shard-adlp: NOTRUN -> [FAIL][148] ([Intel XE#5671]) +1 other test fail
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt:
- shard-adlp: [PASS][149] -> [FAIL][150] ([Intel XE#5671])
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte:
- shard-dg2-set2: NOTRUN -> [SKIP][151] ([Intel XE#651]) +45 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-1p-rte.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][152] ([Intel XE#2311]) +37 other tests skip
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
- shard-lnl: NOTRUN -> [SKIP][153] ([Intel XE#1469]) +1 other test skip
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
- shard-bmg: NOTRUN -> [SKIP][154] ([Intel XE#2352])
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-adlp: NOTRUN -> [SKIP][155] ([Intel XE#6312]) +4 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-onoff:
- shard-adlp: NOTRUN -> [SKIP][156] ([Intel XE#653]) +13 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][157] ([Intel XE#2313]) +35 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-render:
- shard-dg2-set2: NOTRUN -> [SKIP][158] ([Intel XE#6312]) +4 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-1p-offscreen-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][159] ([Intel XE#656]) +59 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-slowdraw:
- shard-dg2-set2: NOTRUN -> [SKIP][160] ([Intel XE#653]) +44 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-slowdraw.html
* igt@kms_hdmi_inject@inject-4k:
- shard-lnl: NOTRUN -> [SKIP][161] ([Intel XE#1470])
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@kms_hdmi_inject@inject-4k.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-bmg: NOTRUN -> [ABORT][162] ([Intel XE#6662]) +1 other test abort
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-dg2-set2: NOTRUN -> [ABORT][163] ([Intel XE#6675]) +14 other tests abort
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: NOTRUN -> [SKIP][164] ([Intel XE#3374] / [Intel XE#3544])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@static-swap:
- shard-lnl: NOTRUN -> [SKIP][165] ([Intel XE#1503]) +1 other test skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@kms_hdr@static-swap.html
* igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][166] ([Intel XE#1450]) +1 other test skip
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_invalid_mode@clock-too-high@pipe-a-edp-1.html
* igt@kms_invalid_mode@clock-too-high@pipe-c-edp-1:
- shard-lnl: NOTRUN -> [SKIP][167] ([Intel XE#1450] / [Intel XE#2568]) +1 other test skip
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_invalid_mode@clock-too-high@pipe-c-edp-1.html
* igt@kms_joiner@basic-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][168] ([Intel XE#346]) +1 other test skip
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_joiner@basic-big-joiner.html
- shard-dg2-set2: NOTRUN -> [SKIP][169] ([Intel XE#2925] / [Intel XE#346]) +1 other test skip
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@kms_joiner@basic-big-joiner.html
- shard-lnl: NOTRUN -> [SKIP][170] ([Intel XE#2925] / [Intel XE#346]) +1 other test skip
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][171] ([Intel XE#2925]) +1 other test skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@kms_joiner@basic-max-non-joiner.html
- shard-lnl: NOTRUN -> [SKIP][172] ([Intel XE#2925])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_joiner@basic-max-non-joiner.html
- shard-bmg: NOTRUN -> [SKIP][173] ([Intel XE#6590])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-adlp: NOTRUN -> [SKIP][174] ([Intel XE#2925] / [Intel XE#346])
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-adlp: NOTRUN -> [SKIP][175] ([Intel XE#2925] / [Intel XE#3012])
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][176] ([Intel XE#4090])
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
- shard-adlp: NOTRUN -> [SKIP][177] ([Intel XE#2925]) +1 other test skip
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-0:
- shard-lnl: NOTRUN -> [FAIL][178] ([Intel XE#5195]) +2 other tests fail
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_plane@pixel-format-source-clamping@pipe-a-plane-0.html
* igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0:
- shard-adlp: NOTRUN -> [FAIL][179] ([Intel XE#5195]) +4 other tests fail
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b:
- shard-lnl: NOTRUN -> [INCOMPLETE][180] ([Intel XE#1035])
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b.html
* igt@kms_plane_lowres@tiling-y:
- shard-lnl: NOTRUN -> [SKIP][181] ([Intel XE#599]) +1 other test skip
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_lowres@tiling-yf:
- shard-bmg: NOTRUN -> [SKIP][182] ([Intel XE#2393]) +1 other test skip
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_multiple@tiling-yf:
- shard-bmg: NOTRUN -> [SKIP][183] ([Intel XE#5020])
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][184] ([Intel XE#6691]) +9 other tests skip
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-a.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-a:
- shard-lnl: NOTRUN -> [SKIP][185] ([Intel XE#6691]) +15 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-a.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-adlp: NOTRUN -> [SKIP][186] ([Intel XE#2938])
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@kms_pm_backlight@brightness-with-dpms.html
- shard-dg2-set2: NOTRUN -> [SKIP][187] ([Intel XE#2938])
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][188] ([Intel XE#870])
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_pm_backlight@fade-with-dpms.html
- shard-adlp: NOTRUN -> [SKIP][189] ([Intel XE#870])
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_pm_backlight@fade-with-dpms.html
- shard-dg2-set2: NOTRUN -> [SKIP][190] ([Intel XE#870])
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-bmg: NOTRUN -> [SKIP][191] ([Intel XE#2391])
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_pm_dc@dc3co-vpb-simulation.html
- shard-dg2-set2: NOTRUN -> [SKIP][192] ([Intel XE#1122])
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@kms_pm_dc@dc3co-vpb-simulation.html
- shard-lnl: NOTRUN -> [SKIP][193] ([Intel XE#736])
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_pm_dc@dc5-psr:
- shard-lnl: [PASS][194] -> [FAIL][195] ([Intel XE#718])
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-1/igt@kms_pm_dc@dc5-psr.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-adlp: NOTRUN -> [SKIP][196] ([Intel XE#3309])
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_dc@deep-pkgc:
- shard-adlp: NOTRUN -> [SKIP][197] ([Intel XE#2007])
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@kms_pm_dc@deep-pkgc.html
- shard-bmg: NOTRUN -> [SKIP][198] ([Intel XE#2505])
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_pm_dc@deep-pkgc.html
- shard-dg2-set2: NOTRUN -> [SKIP][199] ([Intel XE#908])
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-bmg: NOTRUN -> [SKIP][200] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-lnl: NOTRUN -> [SKIP][201] ([Intel XE#1439] / [Intel XE#3141]) +1 other test skip
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf:
- shard-lnl: NOTRUN -> [SKIP][202] ([Intel XE#1406] / [Intel XE#2893]) +7 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_psr2_sf@fbc-pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
- shard-lnl: NOTRUN -> [SKIP][203] ([Intel XE#1406] / [Intel XE#2893] / [Intel XE#4608]) +1 other test skip
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][204] ([Intel XE#1406] / [Intel XE#4608]) +3 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1.html
* igt@kms_psr2_sf@pr-cursor-plane-update-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][205] ([Intel XE#1406] / [Intel XE#1489]) +11 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-adlp: NOTRUN -> [SKIP][206] ([Intel XE#1406] / [Intel XE#1489]) +10 other tests skip
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][207] ([Intel XE#1406] / [Intel XE#1489]) +9 other tests skip
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_su@page_flip-p010:
- shard-adlp: NOTRUN -> [SKIP][208] ([Intel XE#1122] / [Intel XE#1406] / [Intel XE#5580]) +1 other test skip
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@kms_psr2_su@page_flip-p010.html
- shard-bmg: NOTRUN -> [SKIP][209] ([Intel XE#1406] / [Intel XE#2387]) +1 other test skip
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_psr2_su@page_flip-p010.html
- shard-dg2-set2: NOTRUN -> [SKIP][210] ([Intel XE#1122] / [Intel XE#1406]) +1 other test skip
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@kms_psr2_su@page_flip-p010.html
- shard-lnl: NOTRUN -> [SKIP][211] ([Intel XE#1128] / [Intel XE#1406])
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@fbc-psr2-primary-blt@edp-1:
- shard-lnl: NOTRUN -> [SKIP][212] ([Intel XE#1406] / [Intel XE#4609]) +4 other tests skip
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_psr@fbc-psr2-primary-blt@edp-1.html
* igt@kms_psr@fbc-psr2-sprite-plane-move:
- shard-dg2-set2: NOTRUN -> [SKIP][213] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +23 other tests skip
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@kms_psr@fbc-psr2-sprite-plane-move.html
- shard-lnl: NOTRUN -> [SKIP][214] ([Intel XE#1406]) +10 other tests skip
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_psr@fbc-psr2-sprite-plane-move.html
* igt@kms_psr@psr-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][215] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +21 other tests skip
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_psr@psr2-sprite-blt:
- shard-adlp: NOTRUN -> [SKIP][216] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +23 other tests skip
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_psr@psr2-sprite-blt.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-adlp: NOTRUN -> [SKIP][217] ([Intel XE#1406] / [Intel XE#2939] / [Intel XE#5585])
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
- shard-dg2-set2: NOTRUN -> [SKIP][218] ([Intel XE#1406] / [Intel XE#2939])
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
- shard-lnl: NOTRUN -> [SKIP][219] ([Intel XE#1406] / [Intel XE#4692])
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@bad-tiling:
- shard-dg2-set2: NOTRUN -> [SKIP][220] ([Intel XE#3414]) +3 other tests skip
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@kms_rotation_crc@bad-tiling.html
* igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
- shard-lnl: NOTRUN -> [SKIP][221] ([Intel XE#3414] / [Intel XE#3904]) +6 other tests skip
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
- shard-adlp: NOTRUN -> [SKIP][222] ([Intel XE#1127])
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-bmg: NOTRUN -> [SKIP][223] ([Intel XE#2330])
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
- shard-dg2-set2: NOTRUN -> [SKIP][224] ([Intel XE#1127])
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-lnl: NOTRUN -> [SKIP][225] ([Intel XE#1127]) +1 other test skip
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-bmg: NOTRUN -> [SKIP][226] ([Intel XE#3414] / [Intel XE#3904]) +2 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_rotation_crc@sprite-rotation-270:
- shard-adlp: NOTRUN -> [SKIP][227] ([Intel XE#3414]) +2 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@kms_rotation_crc@sprite-rotation-270.html
* igt@kms_setmode@basic@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][228] ([Intel XE#6361]) +3 other tests fail
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-1/igt@kms_setmode@basic@pipe-a-dp-2.html
* igt@kms_setmode@basic@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [FAIL][229] ([Intel XE#6361]) +1 other test fail
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@kms_setmode@basic@pipe-a-hdmi-a-6.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [FAIL][230] ([Intel XE#6361]) +2 other tests fail
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@kms_setmode@clone-exclusive-crtc:
- shard-lnl: NOTRUN -> [SKIP][231] ([Intel XE#1435]) +1 other test skip
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@kms_setmode@clone-exclusive-crtc.html
* igt@kms_sharpness_filter@invalid-filter-with-scaling-mode:
- shard-bmg: NOTRUN -> [SKIP][232] ([Intel XE#6503]) +1 other test skip
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-adlp: NOTRUN -> [SKIP][233] ([Intel XE#362])
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@cmrr:
- shard-bmg: NOTRUN -> [SKIP][234] ([Intel XE#2168])
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_vrr@cmrr.html
* igt@kms_vrr@negative-basic:
- shard-lnl: NOTRUN -> [SKIP][235] ([Intel XE#1499])
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@kms_vrr@negative-basic.html
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-bmg: NOTRUN -> [SKIP][236] ([Intel XE#1499])
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_vrr@seamless-rr-switch-virtual.html
* igt@xe_ccs@ctrl-surf-copy-new-ctx:
- shard-adlp: NOTRUN -> [SKIP][237] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607]) +1 other test skip
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_ccs@ctrl-surf-copy-new-ctx.html
* igt@xe_compute@ccs-mode-basic:
- shard-bmg: NOTRUN -> [SKIP][238] ([Intel XE#6599]) +1 other test skip
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@xe_compute@ccs-mode-basic.html
- shard-adlp: NOTRUN -> [SKIP][239] ([Intel XE#6599]) +2 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@xe_compute@ccs-mode-basic.html
- shard-lnl: NOTRUN -> [SKIP][240] ([Intel XE#1447])
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_compute@ccs-mode-basic.html
* igt@xe_compute@eu-busy-10s:
- shard-dg2-set2: NOTRUN -> [SKIP][241] ([Intel XE#6598])
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_compute@eu-busy-10s.html
- shard-lnl: NOTRUN -> [SKIP][242] ([Intel XE#6592] / [Intel XE#6645])
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_compute@eu-busy-10s.html
* igt@xe_compute_preempt@compute-preempt-many-vram-evict:
- shard-dg2-set2: NOTRUN -> [SKIP][243] ([Intel XE#6360]) +2 other tests skip
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_compute_preempt@compute-preempt-many-vram-evict.html
- shard-lnl: NOTRUN -> [SKIP][244] ([Intel XE#5191])
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@xe_compute_preempt@compute-preempt-many-vram-evict.html
- shard-adlp: NOTRUN -> [SKIP][245] ([Intel XE#5191])
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_compute_preempt@compute-preempt-many-vram-evict.html
* igt@xe_compute_preempt@compute-threadgroup-preempt:
- shard-adlp: NOTRUN -> [SKIP][246] ([Intel XE#6360])
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_compute_preempt@compute-threadgroup-preempt.html
* igt@xe_configfs@survivability-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][247] ([Intel XE#6010])
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@xe_configfs@survivability-mode.html
* igt@xe_copy_basic@mem-copy-linear-0xfd:
- shard-adlp: NOTRUN -> [SKIP][248] ([Intel XE#1123])
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@xe_copy_basic@mem-copy-linear-0xfd.html
- shard-dg2-set2: NOTRUN -> [SKIP][249] ([Intel XE#1123])
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@xe_copy_basic@mem-copy-linear-0xfd.html
* igt@xe_copy_basic@mem-matrix-copy-2x2:
- shard-adlp: NOTRUN -> [SKIP][250] ([Intel XE#5300])
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@xe_copy_basic@mem-matrix-copy-2x2.html
- shard-dg2-set2: NOTRUN -> [SKIP][251] ([Intel XE#5300])
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@xe_copy_basic@mem-matrix-copy-2x2.html
* igt@xe_eu_stall@blocking-read:
- shard-adlp: NOTRUN -> [SKIP][252] ([Intel XE#5626]) +1 other test skip
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@xe_eu_stall@blocking-read.html
* igt@xe_eu_stall@invalid-gt-id:
- shard-dg2-set2: NOTRUN -> [SKIP][253] ([Intel XE#5626]) +1 other test skip
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@xe_eu_stall@invalid-gt-id.html
* igt@xe_eudebug@basic-client:
- shard-lnl: NOTRUN -> [SKIP][254] ([Intel XE#4837]) +20 other tests skip
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@xe_eudebug@basic-client.html
* igt@xe_eudebug@basic-vm-bind-ufence-delay-ack:
- shard-dg2-set2: NOTRUN -> [SKIP][255] ([Intel XE#4837]) +19 other tests skip
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html
* igt@xe_eudebug_online@pagefault-read-stress:
- shard-lnl: NOTRUN -> [SKIP][256] ([Intel XE#6665])
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@xe_eudebug_online@pagefault-read-stress.html
- shard-bmg: NOTRUN -> [SKIP][257] ([Intel XE#6681])
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@xe_eudebug_online@pagefault-read-stress.html
- shard-dg2-set2: NOTRUN -> [SKIP][258] ([Intel XE#6665])
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@xe_eudebug_online@pagefault-read-stress.html
* igt@xe_eudebug_online@single-step-one:
- shard-adlp: NOTRUN -> [SKIP][259] ([Intel XE#4837] / [Intel XE#5565]) +18 other tests skip
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@xe_eudebug_online@single-step-one.html
- shard-bmg: NOTRUN -> [SKIP][260] ([Intel XE#4837]) +18 other tests skip
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@xe_eudebug_online@single-step-one.html
* igt@xe_evict@evict-beng-large:
- shard-adlp: NOTRUN -> [SKIP][261] ([Intel XE#261] / [Intel XE#5564]) +2 other tests skip
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_evict@evict-beng-large.html
* igt@xe_evict@evict-beng-threads-large:
- shard-adlp: NOTRUN -> [SKIP][262] ([Intel XE#261]) +1 other test skip
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_evict@evict-beng-threads-large.html
* igt@xe_evict@evict-cm-threads-small:
- shard-adlp: NOTRUN -> [SKIP][263] ([Intel XE#261] / [Intel XE#688]) +1 other test skip
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_evict@evict-cm-threads-small.html
* igt@xe_evict@evict-small-external-cm:
- shard-adlp: NOTRUN -> [SKIP][264] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688]) +3 other tests skip
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_evict@evict-small-external-cm.html
* igt@xe_evict@evict-threads-small-multi-vm:
- shard-lnl: NOTRUN -> [SKIP][265] ([Intel XE#688]) +13 other tests skip
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@xe_evict@evict-threads-small-multi-vm.html
* igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-samefd:
- shard-adlp: NOTRUN -> [SKIP][266] ([Intel XE#688]) +3 other tests skip
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@xe_evict_ccs@evict-overcommit-parallel-instantfree-samefd.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
- shard-adlp: NOTRUN -> [SKIP][267] ([Intel XE#1392] / [Intel XE#5575]) +7 other tests skip
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate:
- shard-lnl: NOTRUN -> [SKIP][268] ([Intel XE#1392]) +15 other tests skip
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][269] ([Intel XE#2322]) +11 other tests skip
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-prefetch:
- shard-adlp: NOTRUN -> [SKIP][270] ([Intel XE#288] / [Intel XE#5561]) +30 other tests skip
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-prefetch.html
* igt@xe_exec_fault_mode@twice-userptr-invalidate-race:
- shard-dg2-set2: NOTRUN -> [SKIP][271] ([Intel XE#288]) +31 other tests skip
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@xe_exec_fault_mode@twice-userptr-invalidate-race.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
- shard-dg2-set2: NOTRUN -> [SKIP][272] ([Intel XE#2360])
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
- shard-adlp: NOTRUN -> [SKIP][273] ([Intel XE#2360])
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
* igt@xe_exec_reset@cat-error:
- shard-adlp: NOTRUN -> [DMESG-WARN][274] ([Intel XE#3868])
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_exec_reset@cat-error.html
* igt@xe_exec_system_allocator@madvise-no-range-invalidate-same-attr:
- shard-lnl: NOTRUN -> [WARN][275] ([Intel XE#5786]) +2 other tests warn
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@xe_exec_system_allocator@madvise-no-range-invalidate-same-attr.html
* igt@xe_exec_system_allocator@many-64k-mmap-free-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][276] ([Intel XE#5007])
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@xe_exec_system_allocator@many-64k-mmap-free-huge-nomemset.html
* igt@xe_exec_system_allocator@once-mmap-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][277] ([Intel XE#4943]) +41 other tests skip
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@xe_exec_system_allocator@once-mmap-huge-nomemset.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
- shard-lnl: NOTRUN -> [FAIL][278] ([Intel XE#5625])
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wt-single-vma:
- shard-lnl: NOTRUN -> [SKIP][279] ([Intel XE#6196]) +1 other test skip
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wt-single-vma.html
* igt@xe_exec_system_allocator@process-many-mmap-new-huge-nomemset:
- shard-lnl: NOTRUN -> [SKIP][280] ([Intel XE#4943]) +37 other tests skip
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@xe_exec_system_allocator@process-many-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@process-many-stride-mmap-prefetch-shared:
- shard-dg2-set2: NOTRUN -> [SKIP][281] ([Intel XE#4915]) +453 other tests skip
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@xe_exec_system_allocator@process-many-stride-mmap-prefetch-shared.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-shared-remap-dontunmap-eocheck:
- shard-adlp: NOTRUN -> [SKIP][282] ([Intel XE#4915]) +401 other tests skip
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-shared-remap-dontunmap-eocheck.html
* igt@xe_gt_freq@freq_suspend:
- shard-adlp: [PASS][283] -> [ABORT][284] ([Intel XE#6675]) +4 other tests abort
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-4/igt@xe_gt_freq@freq_suspend.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_gt_freq@freq_suspend.html
* igt@xe_huc_copy@huc_copy:
- shard-dg2-set2: NOTRUN -> [SKIP][285] ([Intel XE#255])
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-435/igt@xe_huc_copy@huc_copy.html
* igt@xe_live_ktest@xe_bo:
- shard-adlp: NOTRUN -> [SKIP][286] ([Intel XE#2229] / [Intel XE#455]) +1 other test skip
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_live_ktest@xe_bo.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- shard-bmg: NOTRUN -> [SKIP][287] ([Intel XE#2229])
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
- shard-adlp: NOTRUN -> [SKIP][288] ([Intel XE#2229])
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_media_fill@media-fill:
- shard-dg2-set2: NOTRUN -> [SKIP][289] ([Intel XE#560])
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@xe_media_fill@media-fill.html
- shard-lnl: NOTRUN -> [SKIP][290] ([Intel XE#560])
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@xe_media_fill@media-fill.html
* igt@xe_mmap@pci-membarrier-bad-pagesize:
- shard-lnl: NOTRUN -> [SKIP][291] ([Intel XE#5100]) +1 other test skip
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@xe_mmap@pci-membarrier-bad-pagesize.html
- shard-adlp: NOTRUN -> [SKIP][292] ([Intel XE#5100])
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_mmap@pci-membarrier-bad-pagesize.html
* igt@xe_mmap@small-bar:
- shard-adlp: NOTRUN -> [SKIP][293] ([Intel XE#512])
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_mmap@small-bar.html
- shard-bmg: NOTRUN -> [SKIP][294] ([Intel XE#586])
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@xe_mmap@small-bar.html
- shard-dg2-set2: NOTRUN -> [SKIP][295] ([Intel XE#512])
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_mmap@small-bar.html
- shard-lnl: NOTRUN -> [SKIP][296] ([Intel XE#512])
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_mmap@small-bar.html
* igt@xe_module_load@load:
- shard-lnl: ([PASS][297], [PASS][298], [PASS][299], [PASS][300], [PASS][301], [PASS][302], [PASS][303], [PASS][304], [PASS][305], [PASS][306], [PASS][307], [PASS][308], [PASS][309], [PASS][310], [PASS][311], [PASS][312], [PASS][313], [PASS][314], [PASS][315], [PASS][316], [PASS][317], [PASS][318], [PASS][319], [PASS][320], [PASS][321]) -> ([PASS][322], [PASS][323], [PASS][324], [PASS][325], [PASS][326], [PASS][327], [PASS][328], [PASS][329], [PASS][330], [SKIP][331], [PASS][332], [PASS][333], [PASS][334], [PASS][335], [PASS][336], [PASS][337], [PASS][338], [PASS][339], [PASS][340], [PASS][341], [PASS][342], [PASS][343], [PASS][344], [PASS][345], [PASS][346], [PASS][347]) ([Intel XE#378])
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-7/igt@xe_module_load@load.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-3/igt@xe_module_load@load.html
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-3/igt@xe_module_load@load.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-7/igt@xe_module_load@load.html
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-7/igt@xe_module_load@load.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-5/igt@xe_module_load@load.html
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-5/igt@xe_module_load@load.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-8/igt@xe_module_load@load.html
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-8/igt@xe_module_load@load.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-2/igt@xe_module_load@load.html
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-1/igt@xe_module_load@load.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-4/igt@xe_module_load@load.html
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-4/igt@xe_module_load@load.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-4/igt@xe_module_load@load.html
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-2/igt@xe_module_load@load.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-2/igt@xe_module_load@load.html
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-3/igt@xe_module_load@load.html
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-3/igt@xe_module_load@load.html
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-8/igt@xe_module_load@load.html
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-4/igt@xe_module_load@load.html
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-5/igt@xe_module_load@load.html
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-5/igt@xe_module_load@load.html
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-1/igt@xe_module_load@load.html
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-8/igt@xe_module_load@load.html
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-1/igt@xe_module_load@load.html
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@xe_module_load@load.html
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@xe_module_load@load.html
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@xe_module_load@load.html
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@xe_module_load@load.html
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@xe_module_load@load.html
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@xe_module_load@load.html
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@xe_module_load@load.html
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@xe_module_load@load.html
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@xe_module_load@load.html
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@xe_module_load@load.html
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@xe_module_load@load.html
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@xe_module_load@load.html
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_module_load@load.html
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@xe_module_load@load.html
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@xe_module_load@load.html
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@xe_module_load@load.html
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@xe_module_load@load.html
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@xe_module_load@load.html
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@xe_module_load@load.html
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_module_load@load.html
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_module_load@load.html
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_module_load@load.html
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@xe_module_load@load.html
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@xe_module_load@load.html
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@xe_module_load@load.html
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@xe_module_load@load.html
- shard-bmg: ([PASS][348], [PASS][349], [PASS][350], [PASS][351], [PASS][352], [PASS][353], [PASS][354], [PASS][355], [PASS][356], [PASS][357], [PASS][358], [PASS][359], [PASS][360], [PASS][361], [PASS][362], [PASS][363], [PASS][364], [PASS][365], [PASS][366], [PASS][367], [PASS][368], [PASS][369], [PASS][370], [PASS][371]) -> ([PASS][372], [PASS][373], [PASS][374], [PASS][375], [PASS][376], [PASS][377], [PASS][378], [PASS][379], [PASS][380], [PASS][381], [PASS][382], [PASS][383], [PASS][384], [PASS][385], [PASS][386], [PASS][387], [PASS][388], [PASS][389], [PASS][390], [PASS][391], [SKIP][392], [PASS][393], [PASS][394], [PASS][395]) ([Intel XE#2457])
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-4/igt@xe_module_load@load.html
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@xe_module_load@load.html
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@xe_module_load@load.html
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@xe_module_load@load.html
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@xe_module_load@load.html
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-4/igt@xe_module_load@load.html
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-7/igt@xe_module_load@load.html
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-7/igt@xe_module_load@load.html
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-1/igt@xe_module_load@load.html
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-1/igt@xe_module_load@load.html
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-1/igt@xe_module_load@load.html
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-8/igt@xe_module_load@load.html
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-8/igt@xe_module_load@load.html
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-7/igt@xe_module_load@load.html
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-4/igt@xe_module_load@load.html
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-5/igt@xe_module_load@load.html
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-5/igt@xe_module_load@load.html
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-5/igt@xe_module_load@load.html
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-6/igt@xe_module_load@load.html
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-6/igt@xe_module_load@load.html
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-6/igt@xe_module_load@load.html
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-3/igt@xe_module_load@load.html
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-3/igt@xe_module_load@load.html
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-3/igt@xe_module_load@load.html
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@xe_module_load@load.html
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@xe_module_load@load.html
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@xe_module_load@load.html
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@xe_module_load@load.html
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@xe_module_load@load.html
[377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-1/igt@xe_module_load@load.html
[378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@xe_module_load@load.html
[379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@xe_module_load@load.html
[380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@xe_module_load@load.html
[381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@xe_module_load@load.html
[382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@xe_module_load@load.html
[383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@xe_module_load@load.html
[384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-1/igt@xe_module_load@load.html
[385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@xe_module_load@load.html
[386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-7/igt@xe_module_load@load.html
[387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@xe_module_load@load.html
[388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@xe_module_load@load.html
[389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@xe_module_load@load.html
[390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@xe_module_load@load.html
[391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@xe_module_load@load.html
[392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@xe_module_load@load.html
[393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@xe_module_load@load.html
[394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@xe_module_load@load.html
[395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@xe_module_load@load.html
- shard-adlp: ([PASS][396], [PASS][397], [PASS][398], [PASS][399], [PASS][400], [PASS][401], [PASS][402], [PASS][403], [PASS][404], [PASS][405], [PASS][406], [PASS][407], [PASS][408], [PASS][409], [PASS][410], [PASS][411], [PASS][412], [PASS][413], [PASS][414], [PASS][415], [PASS][416], [PASS][417], [PASS][418], [PASS][419], [PASS][420]) -> ([PASS][421], [PASS][422], [PASS][423], [PASS][424], [PASS][425], [PASS][426], [PASS][427], [PASS][428], [PASS][429], [SKIP][430], [PASS][431], [PASS][432], [PASS][433], [PASS][434], [PASS][435], [PASS][436], [PASS][437], [PASS][438], [PASS][439], [PASS][440], [PASS][441], [PASS][442], [PASS][443], [PASS][444], [PASS][445], [PASS][446]) ([Intel XE#378] / [Intel XE#5612])
[396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-2/igt@xe_module_load@load.html
[397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-2/igt@xe_module_load@load.html
[398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-6/igt@xe_module_load@load.html
[399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-1/igt@xe_module_load@load.html
[400]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-1/igt@xe_module_load@load.html
[401]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-6/igt@xe_module_load@load.html
[402]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-4/igt@xe_module_load@load.html
[403]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-4/igt@xe_module_load@load.html
[404]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-8/igt@xe_module_load@load.html
[405]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-3/igt@xe_module_load@load.html
[406]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-6/igt@xe_module_load@load.html
[407]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-6/igt@xe_module_load@load.html
[408]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-4/igt@xe_module_load@load.html
[409]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-9/igt@xe_module_load@load.html
[410]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-2/igt@xe_module_load@load.html
[411]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-9/igt@xe_module_load@load.html
[412]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-9/igt@xe_module_load@load.html
[413]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-1/igt@xe_module_load@load.html
[414]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-1/igt@xe_module_load@load.html
[415]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-8/igt@xe_module_load@load.html
[416]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-8/igt@xe_module_load@load.html
[417]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-8/igt@xe_module_load@load.html
[418]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-2/igt@xe_module_load@load.html
[419]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-3/igt@xe_module_load@load.html
[420]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-3/igt@xe_module_load@load.html
[421]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@xe_module_load@load.html
[422]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@xe_module_load@load.html
[423]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@xe_module_load@load.html
[424]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_module_load@load.html
[425]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_module_load@load.html
[426]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_module_load@load.html
[427]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_module_load@load.html
[428]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_module_load@load.html
[429]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-4/igt@xe_module_load@load.html
[430]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_module_load@load.html
[431]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@xe_module_load@load.html
[432]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@xe_module_load@load.html
[433]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_module_load@load.html
[434]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_module_load@load.html
[435]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_module_load@load.html
[436]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_module_load@load.html
[437]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@xe_module_load@load.html
[438]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_module_load@load.html
[439]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@xe_module_load@load.html
[440]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@xe_module_load@load.html
[441]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@xe_module_load@load.html
[442]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_module_load@load.html
[443]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@xe_module_load@load.html
[444]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@xe_module_load@load.html
[445]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-4/igt@xe_module_load@load.html
[446]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-4/igt@xe_module_load@load.html
- shard-dg2-set2: ([PASS][447], [PASS][448], [PASS][449], [PASS][450], [PASS][451], [PASS][452], [PASS][453], [PASS][454], [PASS][455], [PASS][456], [PASS][457], [PASS][458], [PASS][459], [PASS][460], [PASS][461], [PASS][462], [PASS][463], [PASS][464], [PASS][465], [PASS][466], [PASS][467], [PASS][468], [PASS][469], [PASS][470], [PASS][471]) -> ([PASS][472], [PASS][473], [PASS][474], [PASS][475], [PASS][476], [PASS][477], [PASS][478], [PASS][479], [PASS][480], [PASS][481], [PASS][482], [PASS][483], [PASS][484], [PASS][485], [PASS][486], [PASS][487], [PASS][488], [PASS][489], [PASS][490], [PASS][491], [PASS][492], [SKIP][493], [PASS][494], [PASS][495], [PASS][496]) ([Intel XE#378])
[447]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-464/igt@xe_module_load@load.html
[448]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-432/igt@xe_module_load@load.html
[449]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-435/igt@xe_module_load@load.html
[450]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-435/igt@xe_module_load@load.html
[451]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-464/igt@xe_module_load@load.html
[452]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-464/igt@xe_module_load@load.html
[453]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-466/igt@xe_module_load@load.html
[454]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-466/igt@xe_module_load@load.html
[455]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-436/igt@xe_module_load@load.html
[456]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-463/igt@xe_module_load@load.html
[457]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-433/igt@xe_module_load@load.html
[458]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-463/igt@xe_module_load@load.html
[459]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-463/igt@xe_module_load@load.html
[460]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-436/igt@xe_module_load@load.html
[461]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-436/igt@xe_module_load@load.html
[462]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-434/igt@xe_module_load@load.html
[463]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-434/igt@xe_module_load@load.html
[464]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-435/igt@xe_module_load@load.html
[465]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-436/igt@xe_module_load@load.html
[466]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-434/igt@xe_module_load@load.html
[467]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-466/igt@xe_module_load@load.html
[468]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-433/igt@xe_module_load@load.html
[469]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-432/igt@xe_module_load@load.html
[470]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-432/igt@xe_module_load@load.html
[471]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-433/igt@xe_module_load@load.html
[472]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-435/igt@xe_module_load@load.html
[473]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@xe_module_load@load.html
[474]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@xe_module_load@load.html
[475]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@xe_module_load@load.html
[476]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@xe_module_load@load.html
[477]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@xe_module_load@load.html
[478]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@xe_module_load@load.html
[479]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@xe_module_load@load.html
[480]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-435/igt@xe_module_load@load.html
[481]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_module_load@load.html
[482]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@xe_module_load@load.html
[483]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@xe_module_load@load.html
[484]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@xe_module_load@load.html
[485]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@xe_module_load@load.html
[486]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_module_load@load.html
[487]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@xe_module_load@load.html
[488]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@xe_module_load@load.html
[489]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@xe_module_load@load.html
[490]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@xe_module_load@load.html
[491]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@xe_module_load@load.html
[492]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_module_load@load.html
[493]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-463/igt@xe_module_load@load.html
[494]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@xe_module_load@load.html
[495]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@xe_module_load@load.html
[496]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@xe_module_load@load.html
* igt@xe_noexec_ping_pong@basic:
- shard-adlp: NOTRUN -> [SKIP][497] ([Intel XE#6259])
[497]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_noexec_ping_pong@basic.html
- shard-lnl: NOTRUN -> [SKIP][498] ([Intel XE#6259])
[498]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@xe_noexec_ping_pong@basic.html
* igt@xe_oa@closed-fd-and-unmapped-access:
- shard-dg2-set2: NOTRUN -> [SKIP][499] ([Intel XE#3573]) +13 other tests skip
[499]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@xe_oa@closed-fd-and-unmapped-access.html
* igt@xe_oa@non-zero-reason-all:
- shard-dg2-set2: NOTRUN -> [SKIP][500] ([Intel XE#6377])
[500]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_oa@non-zero-reason-all.html
- shard-adlp: NOTRUN -> [SKIP][501] ([Intel XE#6377])
[501]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_oa@non-zero-reason-all.html
* igt@xe_oa@syncs-syncobj-cfg:
- shard-adlp: NOTRUN -> [SKIP][502] ([Intel XE#3573]) +10 other tests skip
[502]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_oa@syncs-syncobj-cfg.html
* igt@xe_pat@pat-index-xelp:
- shard-bmg: NOTRUN -> [SKIP][503] ([Intel XE#2245])
[503]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@xe_pat@pat-index-xelp.html
* igt@xe_pm@d3cold-basic-exec:
- shard-dg2-set2: NOTRUN -> [SKIP][504] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
[504]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-435/igt@xe_pm@d3cold-basic-exec.html
* igt@xe_pm@d3cold-i2c:
- shard-dg2-set2: NOTRUN -> [SKIP][505] ([Intel XE#5694])
[505]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_pm@d3cold-i2c.html
- shard-lnl: NOTRUN -> [SKIP][506] ([Intel XE#5694])
[506]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@xe_pm@d3cold-i2c.html
- shard-bmg: NOTRUN -> [SKIP][507] ([Intel XE#5694])
[507]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@xe_pm@d3cold-i2c.html
- shard-adlp: NOTRUN -> [SKIP][508] ([Intel XE#5694])
[508]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_pm@d3cold-i2c.html
* igt@xe_pm@d3cold-mocs:
- shard-bmg: NOTRUN -> [SKIP][509] ([Intel XE#2284]) +2 other tests skip
[509]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@xe_pm@d3cold-mocs.html
* igt@xe_pm@d3hot-i2c:
- shard-lnl: NOTRUN -> [SKIP][510] ([Intel XE#5742])
[510]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@d3hot-mmap-vram:
- shard-adlp: NOTRUN -> [SKIP][511] ([Intel XE#1948])
[511]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-1/igt@xe_pm@d3hot-mmap-vram.html
- shard-lnl: NOTRUN -> [SKIP][512] ([Intel XE#1948])
[512]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@xe_pm@d3hot-mmap-vram.html
* igt@xe_pm@s2idle-basic-exec:
- shard-adlp: NOTRUN -> [ABORT][513] ([Intel XE#6675]) +5 other tests abort
[513]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_pm@s2idle-basic-exec.html
- shard-bmg: NOTRUN -> [ABORT][514] ([Intel XE#6675]) +11 other tests abort
[514]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@xe_pm@s2idle-basic-exec.html
* igt@xe_pm@s2idle-d3cold-basic-exec:
- shard-lnl: NOTRUN -> [SKIP][515] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
[515]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@xe_pm@s2idle-d3cold-basic-exec.html
* igt@xe_pm@s2idle-exec-after:
- shard-lnl: NOTRUN -> [ABORT][516] ([Intel XE#6675]) +15 other tests abort
[516]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@xe_pm@s2idle-exec-after.html
* igt@xe_pm@s3-basic-exec:
- shard-lnl: NOTRUN -> [SKIP][517] ([Intel XE#584]) +3 other tests skip
[517]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_pm@s3-basic-exec.html
* igt@xe_pm@s3-d3cold-basic-exec:
- shard-adlp: NOTRUN -> [SKIP][518] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
[518]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@xe_pm@s3-d3cold-basic-exec.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-lnl: NOTRUN -> [SKIP][519] ([Intel XE#579])
[519]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_pmu@engine-activity-accuracy-50:
- shard-lnl: NOTRUN -> [FAIL][520] ([Intel XE#6251]) +2 other tests fail
[520]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-50.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0:
- shard-lnl: [PASS][521] -> [FAIL][522] ([Intel XE#6251]) +1 other test fail
[521]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html
[522]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html
* igt@xe_pmu@fn-engine-activity-load:
- shard-dg2-set2: NOTRUN -> [SKIP][523] ([Intel XE#4650])
[523]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-433/igt@xe_pmu@fn-engine-activity-load.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-lnl: NOTRUN -> [SKIP][524] ([Intel XE#4650]) +1 other test skip
[524]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-5/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
* igt@xe_pxp@pxp-stale-bo-bind-post-suspend:
- shard-lnl: [PASS][525] -> [ABORT][526] ([Intel XE#6675])
[525]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-8/igt@xe_pxp@pxp-stale-bo-bind-post-suspend.html
[526]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-4/igt@xe_pxp@pxp-stale-bo-bind-post-suspend.html
* igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
- shard-bmg: NOTRUN -> [SKIP][527] ([Intel XE#4733]) +3 other tests skip
[527]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
- shard-dg2-set2: NOTRUN -> [SKIP][528] ([Intel XE#4733]) +3 other tests skip
[528]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
* igt@xe_pxp@pxp-stale-queue-post-suspend:
- shard-adlp: NOTRUN -> [SKIP][529] ([Intel XE#4733] / [Intel XE#5594]) +1 other test skip
[529]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@xe_pxp@pxp-stale-queue-post-suspend.html
* igt@xe_query@multigpu-query-config:
- shard-adlp: NOTRUN -> [SKIP][530] ([Intel XE#944]) +2 other tests skip
[530]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_query@multigpu-query-config.html
* igt@xe_query@multigpu-query-invalid-cs-cycles:
- shard-bmg: NOTRUN -> [SKIP][531] ([Intel XE#944]) +2 other tests skip
[531]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@xe_query@multigpu-query-invalid-cs-cycles.html
- shard-dg2-set2: NOTRUN -> [SKIP][532] ([Intel XE#944]) +2 other tests skip
[532]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-432/igt@xe_query@multigpu-query-invalid-cs-cycles.html
* igt@xe_query@multigpu-query-topology:
- shard-lnl: NOTRUN -> [SKIP][533] ([Intel XE#944]) +3 other tests skip
[533]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@xe_query@multigpu-query-topology.html
* igt@xe_render_copy@render-stress-4-copies:
- shard-adlp: NOTRUN -> [SKIP][534] ([Intel XE#4814] / [Intel XE#5614])
[534]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-2/igt@xe_render_copy@render-stress-4-copies.html
- shard-dg2-set2: NOTRUN -> [SKIP][535] ([Intel XE#4814])
[535]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_render_copy@render-stress-4-copies.html
* igt@xe_spin_batch@spin-mem-copy:
- shard-dg2-set2: NOTRUN -> [SKIP][536] ([Intel XE#4821])
[536]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@xe_spin_batch@spin-mem-copy.html
- shard-adlp: NOTRUN -> [SKIP][537] ([Intel XE#4821])
[537]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@xe_spin_batch@spin-mem-copy.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-dg2-set2: NOTRUN -> [SKIP][538] ([Intel XE#3342])
[538]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_sriov_flr@flr-each-isolation.html
- shard-lnl: NOTRUN -> [SKIP][539] ([Intel XE#3342])
[539]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_sriov_flr@flr-each-isolation.html
* igt@xe_sriov_flr@flr-vfs-parallel:
- shard-dg2-set2: NOTRUN -> [SKIP][540] ([Intel XE#4273])
[540]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-466/igt@xe_sriov_flr@flr-vfs-parallel.html
- shard-lnl: NOTRUN -> [SKIP][541] ([Intel XE#4273])
[541]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-3/igt@xe_sriov_flr@flr-vfs-parallel.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets:
- shard-dg2-set2: NOTRUN -> [SKIP][542] ([Intel XE#4351])
[542]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
- shard-lnl: NOTRUN -> [SKIP][543] ([Intel XE#4351])
[543]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-2/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
* igt@xe_sriov_vram@vf-access-after-resize-up:
- shard-dg2-set2: NOTRUN -> [SKIP][544] ([Intel XE#6318]) +1 other test skip
[544]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-436/igt@xe_sriov_vram@vf-access-after-resize-up.html
- shard-lnl: NOTRUN -> [SKIP][545] ([Intel XE#6376]) +1 other test skip
[545]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-8/igt@xe_sriov_vram@vf-access-after-resize-up.html
* igt@xe_sriov_vram@vf-access-beyond:
- shard-adlp: NOTRUN -> [SKIP][546] ([Intel XE#6376])
[546]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-8/igt@xe_sriov_vram@vf-access-beyond.html
#### Possible fixes ####
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-adlp: [FAIL][547] ([Intel XE#1231]) -> [PASS][548]
[547]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
[548]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-9/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-0:
- shard-adlp: [FAIL][549] ([Intel XE#1874]) -> [PASS][550]
[549]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-1/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
[550]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-3/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: [SKIP][551] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][552]
[551]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
[552]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_display_modes@extended-mode-basic:
- shard-bmg: [SKIP][553] ([Intel XE#6557]) -> [PASS][554] +2 other tests pass
[553]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_display_modes@extended-mode-basic.html
[554]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-bmg: [SKIP][555] ([Intel XE#2316]) -> [PASS][556]
[555]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
[556]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
* igt@kms_pm_rpm@drm-resources-equal:
- shard-bmg: [SKIP][557] ([Intel XE#6693]) -> [PASS][558]
[557]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_pm_rpm@drm-resources-equal.html
[558]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_pm_rpm@drm-resources-equal.html
* {igt@kms_sharpness_filter@filter-suspend@pipe-a-edp-1-suspend}:
- shard-lnl: [ABORT][559] ([Intel XE#6675]) -> [PASS][560]
[559]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-lnl-5/igt@kms_sharpness_filter@filter-suspend@pipe-a-edp-1-suspend.html
[560]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-lnl-7/igt@kms_sharpness_filter@filter-suspend@pipe-a-edp-1-suspend.html
* igt@xe_exec_system_allocator@process-many-execqueues-mmap-remap-ro:
- shard-bmg: [SKIP][561] ([Intel XE#6703]) -> [PASS][562] +47 other tests pass
[561]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@xe_exec_system_allocator@process-many-execqueues-mmap-remap-ro.html
[562]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@xe_exec_system_allocator@process-many-execqueues-mmap-remap-ro.html
* igt@xe_pm@s3-multiple-execs:
- shard-dg2-set2: [ABORT][563] ([Intel XE#6675]) -> [PASS][564] +1 other test pass
[563]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-463/igt@xe_pm@s3-multiple-execs.html
[564]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-434/igt@xe_pm@s3-multiple-execs.html
* igt@xe_pm@s4-mocs:
- shard-adlp: [ABORT][565] ([Intel XE#6675]) -> [PASS][566]
[565]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-adlp-6/igt@xe_pm@s4-mocs.html
[566]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-adlp-6/igt@xe_pm@s4-mocs.html
#### Warnings ####
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-bmg: [SKIP][567] ([Intel XE#6703]) -> [SKIP][568] ([Intel XE#1124]) +1 other test skip
[567]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
[568]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_ccs@crc-primary-basic-yf-tiled-ccs:
- shard-bmg: [SKIP][569] ([Intel XE#6703]) -> [SKIP][570] ([Intel XE#2887])
[569]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs.html
[570]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs:
- shard-bmg: [SKIP][571] ([Intel XE#6557]) -> [SKIP][572] ([Intel XE#2887])
[571]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs.html
[572]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][573] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345]) -> [ABORT][574] ([Intel XE#1727])
[573]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[574]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
- shard-dg2-set2: [INCOMPLETE][575] ([Intel XE#2705] / [Intel XE#4212]) -> [ABORT][576] ([Intel XE#1727])
[575]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
[576]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
* igt@kms_chamelium_frames@vga-frame-dump:
- shard-bmg: [SKIP][577] ([Intel XE#6557]) -> [SKIP][578] ([Intel XE#2252])
[577]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_chamelium_frames@vga-frame-dump.html
[578]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_chamelium_frames@vga-frame-dump.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank:
- shard-bmg: [SKIP][579] ([Intel XE#6703]) -> [SKIP][580] ([Intel XE#2316])
[579]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
[580]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][581] ([Intel XE#2312]) -> [SKIP][582] ([Intel XE#2311]) +1 other test skip
[581]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
[582]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][583] ([Intel XE#2311]) -> [SKIP][584] ([Intel XE#2312]) +4 other tests skip
[583]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html
[584]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render:
- shard-bmg: [SKIP][585] ([Intel XE#6703]) -> [SKIP][586] ([Intel XE#4141]) +1 other test skip
[585]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render.html
[586]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render:
- shard-bmg: [SKIP][587] ([Intel XE#4141]) -> [SKIP][588] ([Intel XE#2312])
[587]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render.html
[588]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt:
- shard-bmg: [SKIP][589] ([Intel XE#6703]) -> [SKIP][590] ([Intel XE#2312]) +1 other test skip
[589]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt.html
[590]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-onoff:
- shard-bmg: [SKIP][591] ([Intel XE#6703]) -> [SKIP][592] ([Intel XE#2311]) +1 other test skip
[591]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-onoff.html
[592]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move:
- shard-bmg: [SKIP][593] ([Intel XE#2313]) -> [SKIP][594] ([Intel XE#2312]) +2 other tests skip
[593]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move.html
[594]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt:
- shard-bmg: [SKIP][595] ([Intel XE#2312]) -> [SKIP][596] ([Intel XE#2313])
[595]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt.html
[596]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [SKIP][597] ([Intel XE#6703]) -> [SKIP][598] ([Intel XE#2313]) +1 other test skip
[597]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
[598]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: [SKIP][599] ([Intel XE#5021]) -> [SKIP][600] ([Intel XE#4596])
[599]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-y.html
[600]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
- shard-bmg: [SKIP][601] ([Intel XE#1406]) -> [SKIP][602] ([Intel XE#1406] / [Intel XE#1489])
[601]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
[602]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr@psr2-primary-blt:
- shard-bmg: [SKIP][603] ([Intel XE#1406]) -> [SKIP][604] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850])
[603]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_psr@psr2-primary-blt.html
[604]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-3/igt@kms_psr@psr2-primary-blt.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-bmg: [SKIP][605] ([Intel XE#6703]) -> [SKIP][606] ([Intel XE#3414] / [Intel XE#3904])
[605]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_rotation_crc@sprite-rotation-90.html
[606]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-2/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-bmg: [SKIP][607] ([Intel XE#6703]) -> [SKIP][608] ([Intel XE#2413])
[607]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_scaling_modes@scaling-mode-center.html
[608]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-4/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_setmode@basic:
- shard-bmg: [SKIP][609] ([Intel XE#6703]) -> [FAIL][610] ([Intel XE#6361])
[609]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_setmode@basic.html
[610]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-1/igt@kms_setmode@basic.html
* igt@kms_sharpness_filter@filter-basic:
- shard-bmg: [SKIP][611] ([Intel XE#6703]) -> [SKIP][612] ([Intel XE#6503])
[611]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@kms_sharpness_filter@filter-basic.html
[612]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@kms_sharpness_filter@filter-basic.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind:
- shard-bmg: [SKIP][613] ([Intel XE#6703]) -> [SKIP][614] ([Intel XE#2322])
[613]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html
[614]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html
* igt@xe_pm@s4-exec-after:
- shard-bmg: [SKIP][615] ([Intel XE#6703]) -> [ABORT][616] ([Intel XE#6675])
[615]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23/shard-bmg-2/igt@xe_pm@s4-exec-after.html
[616]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/shard-bmg-7/igt@xe_pm@s4-exec-after.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1035
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
[Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1231
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
[Intel XE#1450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1450
[Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467
[Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
[Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#1948]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1948
[Intel XE#2007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2007
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2391
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#2568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2568
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3433
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
[Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
[Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4692
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
[Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
[Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
[Intel XE#5195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5195
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5580]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5580
[Intel XE#5585]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5585
[Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
[Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
[Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
[Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
[Intel XE#5614]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5614
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5671]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5671
[Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
[Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
[Intel XE#5993]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5993
[Intel XE#6010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6010
[Intel XE#6011]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6011
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6259]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6259
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6318]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6318
[Intel XE#6360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6360
[Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
[Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
[Intel XE#6377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6377
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6590
[Intel XE#6592]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6592
[Intel XE#6598]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6598
[Intel XE#6599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6599
[Intel XE#6645]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6645
[Intel XE#6662]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6662
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6675]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6675
[Intel XE#6676]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6676
[Intel XE#6677]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6677
[Intel XE#6681]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6681
[Intel XE#6691]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6691
[Intel XE#6692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6692
[Intel XE#6693]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6693
[Intel XE#6699]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6699
[Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
[Intel XE#6704]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6704
[Intel XE#6705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6705
[Intel XE#6706]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6706
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#736]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/736
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_8643 -> IGT_8645
* Linux: xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23 -> xe-pw-157944v4
IGT_8643: 9e6e12ee7d6d66dd7668aff22b330d3ca23b3e5e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8645: 8645
xe-4161-2e2c779bc906d76b96ec0a46d9b85d1b035d2e23: 2e2c779bc906d76b96ec0a46d9b85d1b035d2e23
xe-pw-157944v4: 157944v4
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157944v4/index.html
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