Re: [PATCH 1/4] drm/i915/psr: Add defininitions for INTEL_WA_REGISTER_CAPS DPCD register

[Jani Nikula <jani.nikula@linux.intel.com>]

On Wed, 15 Apr 2026, Jouni Högander <jouni.hogander@intel.com> wrote:
> EDP specification says:
>
> "If either VSC SDP is unable to be transmitted 100 ns before the SU region,
> the Source device may optionally transmit the VSC SDP during the prior
> video scan line’s HBlank period There is a Intel specific drm dp register
> currently containing bits related how TCON can support PSR2 with SDP on
> prior line."
>
> Unfortunately many panels are having problems in implementing this. So
> there is a custom Intel specific DPCD register (INTEL_WA_REGISTER_CAPS) to
> figure out if this is properly implemented on a panel or if panel doesn't
> require that 100 ns delay before the SU region. Here are the definitions in
> this custom DPCD address:
>
> 0 = Panel doesn't support SDP on prior line
> 1 = Panel supports SDP on prior line
> 2 = Panel doesn't have 100ns requirement
> 3 = Reserved
>
> Add definitions for this new register and it's values into new header
> intel_dpcd.h.
>
> Bspec: 74741
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dpcd.h | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_dpcd.h
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpcd.h b/drivers/gpu/drm/i915/display/intel_dpcd.h
> new file mode 100644
> index 000000000000..670513ff5552
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_dpcd.h
> @@ -0,0 +1,15 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef __INTEL_DPCD_H__
> +#define __INTEL_DPCD_H__
> +
> +#define INTEL_WA_REGISTER_CAPS						0x3f0
> +# define INTEL_WA_REGISTER_CAPS_PSR2_EARLYSCANLINE_SDP_SUPPORT_MASK	REG_GENMASK(1, 0)
> +# define INTEL_WA_REGISTER_CAPS_FALL_BACK_TO_PSR1			0
> +# define INTEL_WA_REGISTER_CAPS_PSR2_WITH_EARLY_SCANLINE		1
> +# define INTEL_WA_REGISTER_CAPS_PSR2_WITHOUT_EARLY_SCANLINE		2

It does get long, but INTEL_DPCD_ prefix?

> +
> +#endif /* __INTEL_DPCD_H__ */

-- 
Jani Nikula, Intel