From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: "Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH 2/4] drm/i915/psr: Read Intel DPCD workaround register
Date: Wed, 15 Apr 2026 08:39:58 +0300 [thread overview]
Message-ID: <20260415054000.400070-3-jouni.hogander@intel.com> (raw)
In-Reply-To: <20260415054000.400070-1-jouni.hogander@intel.com>
Read Intel DPCD workaround register and store it into
intel_connector->dp.psr_caps. Psr_caps was chosen as currently it contains
only PSR workaround for PSR2 SDP on prior scanline implementation.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_psr.c | 8 +++++++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index ee076106be85..ec00fcb46734 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -584,6 +584,7 @@ struct intel_connector {
struct {
u8 dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
+ u8 intel_wa_dpcd;
bool support;
bool su_support;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index b4ca5843d098..1f3f0d35d52a 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -44,6 +44,7 @@
#include "intel_display_wa.h"
#include "intel_dmc.h"
#include "intel_dp.h"
+#include "intel_dpcd.h"
#include "intel_dp_aux.h"
#include "intel_dp_tunnel.h"
#include "intel_dsb.h"
@@ -717,8 +718,13 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *co
connector->dp.psr_caps.su_support ? "" : "not ");
}
- if (connector->dp.psr_caps.su_support)
+ if (connector->dp.psr_caps.su_support) {
+ ret = drm_dp_dpcd_read_byte(&intel_dp->aux, INTEL_WA_REGISTER_CAPS,
+ &connector->dp.psr_caps.intel_wa_dpcd);
+ if (ret < 0)
+ return;
_psr_compute_su_granularity(intel_dp, connector);
+ }
}
void intel_psr_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *connector)
--
2.43.0
next prev parent reply other threads:[~2026-04-15 5:40 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-15 5:39 [PATCH 0/4] PSR2 SDP on Prior Scanline workarounds Jouni Högander
2026-04-15 5:39 ` [PATCH 1/4] drm/i915/psr: Add defininitions for INTEL_WA_REGISTER_CAPS DPCD register Jouni Högander
2026-04-15 7:28 ` Jani Nikula
2026-04-15 5:39 ` Jouni Högander [this message]
2026-04-15 5:39 ` [PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP on prior line used Jouni Högander
2026-04-15 5:40 ` [PATCH 4/4] drm/i915/psr: Apply SDP on prior scanline workaround for NVL Jouni Högander
2026-04-15 5:49 ` ✗ CI.checkpatch: warning for PSR2 SDP on Prior Scanline workarounds Patchwork
2026-04-15 5:50 ` ✓ CI.KUnit: success " Patchwork
2026-04-15 6:54 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-15 7:40 ` ✓ Xe.CI.FULL: " Patchwork
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