From: "Hogander, Jouni" <jouni.hogander@intel.com>
To: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
"Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "stable@vger.kernel.org" <stable@vger.kernel.org>
Subject: Re: [PATCH 1/5] drm/i915/psr: Repeat Selective Update area alignment
Date: Wed, 25 Feb 2026 06:33:57 +0000 [thread overview]
Message-ID: <a9e23121e332dbb93047c7392ba731393c3fd66d.camel@intel.com> (raw)
In-Reply-To: <40fbaf0f-525c-4f38-bb26-3f662a0a1a0c@intel.com>
On Wed, 2026-02-25 at 09:43 +0530, Nautiyal, Ankit K wrote:
>
> On 2/19/2026 6:37 PM, Jouni Högander wrote:
> > Currently we are aligning Selective Update area to cover cursor
> > fully if
> > needed only once. It may happen that cursor is in Selective Update
> > area
> > after pipe alignment and after that covering cursor plane only
> > partially. Fix this by looping alignment as long as alignment isn't
> > needed
> > anymore.
>
> If I understand correctly, intel_psr2_sel_fetch_et_alignment() tries
> to
> expand the current su area so that it includes the cursor if it was
> partially covered.
>
> Then the intel_psr2_sel_fetch_pipe_alignment() tries to expand the su
> area to align with the slice height/y granularity.
>
> Hence it is possible that after aligning the area with the slice
> height/y granularity, the cursor which might have been outside the su
> area, has now become partially inside the su area.
>
> So the iteration makes sense. However there are couple of things:
>
> - if the cursor was already inside the su area, then even after pipe
> alignment which expands the su area (y1 decreases goes vertically up
> and
> y2 increases goes vertically down) the cursor will still be inside
> the
> su area.
>
> In that case we dont need to do another iteration we can exit the
> loop.
>
> - cursor_in_su_area is set and never used.
>
>
> Perhaps we can change the loop a bit like:
>
> bool su_area_changed;
> .....
> do {
> bool cursor_in_su_area = false;
>
> intel_psr2_sel_fetch_et_alignment(state, crtc,
> &cursor_in_su_area); // Cursor is now either fully inside su area
> OR
> fully outside.
> su_area_changed =
> intel_psr2_sel_fetch_pipe_alignment(crtc_state);
> // Alignment increased the su area.
>
> /*
> * If the cursor was outside the SU area before alignment, the
> alignment step
> * (which only expands SU) may pull the cursor partially inside, so
> we must
> * run ET alignment again to fully cover it.
> *
> * But if the cursor was already fully inside before alignment,
> expanding the
> * SU area won't change that, so no further work is needed.
> */
> if (cursor_in_su_area)
> break;
> } while (su_area_changed);
>
>
>
> >
> > Fixes: 1bff93b8bc27 ("drm/i915/psr: Extend SU area to cover cursor
> > fully if needed")
> > Cc: <stable@vger.kernel.org> # v6.9+
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 32 ++++++++++++++++---
> > -----
> > 1 file changed, 21 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 5bea2eda744b..331645a2c9f6 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -2688,11 +2688,12 @@ static void clip_area_update(struct
> > drm_rect *overlap_damage_area,
> > overlap_damage_area->y2 = damage_area->y2;
> > }
> >
> > -static void intel_psr2_sel_fetch_pipe_alignment(struct
> > intel_crtc_state *crtc_state)
> > +static bool intel_psr2_sel_fetch_pipe_alignment(struct
> > intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display =
> > to_intel_display(crtc_state);
> > const struct drm_dsc_config *vdsc_cfg = &crtc_state-
> > >dsc.config;
> > u16 y_alignment;
> > + bool aligned = false;
>
>
> Here also it would make sense if we make this su_area_changed.
> (ofcourse
> after alignment)
>
> Hope I am making some sense and not totally off.
Yes, you are making good suggestions here. I will rework the loop and
change this as well. Thank you.
BR,
Jouni Högander
>
> Regards,
>
> Ankit
>
>
> >
> > /* ADLP aligns the SU region to vdsc slice height in case
> > dsc is enabled */
> > if (crtc_state->dsc.compression_enable &&
> > @@ -2701,10 +2702,18 @@ static void
> > intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state
> > *crtc_st
> > else
> > y_alignment = crtc_state->su_y_granularity;
> >
> > - crtc_state->psr2_su_area.y1 -= crtc_state->psr2_su_area.y1
> > % y_alignment;
> > - if (crtc_state->psr2_su_area.y2 % y_alignment)
> > + if (crtc_state->psr2_su_area.y1 % y_alignment) {
> > + crtc_state->psr2_su_area.y1 -= crtc_state-
> > >psr2_su_area.y1 % y_alignment;
> > + aligned = true;
> > + }
> > +
> > + if (crtc_state->psr2_su_area.y2 % y_alignment) {
> > crtc_state->psr2_su_area.y2 = ((crtc_state-
> > >psr2_su_area.y2 /
> > y_alignment) + 1)
> > * y_alignment;
> > + aligned = true;
> > + }
> > +
> > + return aligned;
> > }
> >
> > /*
> > @@ -2945,15 +2954,16 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > if (ret)
> > return ret;
> >
> > - /*
> > - * Adjust su area to cover cursor fully as necessary
> > (early
> > - * transport). This needs to be done after
> > - * drm_atomic_add_affected_planes to ensure visible cursor
> > is added into
> > - * affected planes even when cursor is not updated by
> > itself.
> > - */
> > - intel_psr2_sel_fetch_et_alignment(state, crtc,
> > &cursor_in_su_area);
> > + do {
> > + /*
> > + * Adjust su area to cover cursor fully as
> > necessary (early
> > + * transport). This needs to be done after
> > + * drm_atomic_add_affected_planes to ensure
> > visible cursor is added into
> > + * affected planes even when cursor is not updated
> > by itself.
> > + */
> > + intel_psr2_sel_fetch_et_alignment(state, crtc,
> > &cursor_in_su_area);
> >
> > - intel_psr2_sel_fetch_pipe_alignment(crtc_state);
> > + } while (intel_psr2_sel_fetch_pipe_alignment(crtc_state));
> >
> > /*
> > * Now that we have the pipe damaged area check if it
> > intersect with
next prev parent reply other threads:[~2026-02-25 6:34 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-19 13:07 [PATCH 0/5] PSR/PR Selective Fetch Early Transport fixes Jouni Högander
2026-02-19 13:07 ` [PATCH 1/5] drm/i915/psr: Repeat Selective Update area alignment Jouni Högander
2026-02-25 4:13 ` Nautiyal, Ankit K
2026-02-25 6:33 ` Hogander, Jouni [this message]
2026-02-19 13:07 ` [PATCH 2/5] drm/i915/psr: Add DSC_SU_PARAMETER_SET_0 registers for PSR configuration Jouni Högander
2026-02-25 4:21 ` Nautiyal, Ankit K
2026-02-25 6:30 ` Hogander, Jouni
2026-02-25 12:39 ` Nautiyal, Ankit K
2026-02-19 13:07 ` [PATCH 3/5] drm/i915/dsc: Convert intel_dsc_get_vdsc_per_pipe as non-static Jouni Högander
2026-02-25 5:04 ` Nautiyal, Ankit K
2026-02-19 13:07 ` [PATCH 4/5] drm/i915/psr: DSC configuration for Early Transport Jouni Högander
2026-02-25 12:06 ` Nautiyal, Ankit K
2026-02-25 12:26 ` Hogander, Jouni
2026-02-25 13:29 ` Jani Nikula
2026-02-25 14:30 ` Nautiyal, Ankit K
2026-02-19 13:07 ` [PATCH 5/5] drm/i915/psr: Drop cursor_in_su_area from intel_psr2_sel_fetch_et_alignment Jouni Högander
2026-02-19 13:45 ` ✗ CI.checkpatch: warning for PSR/PR Selective Fetch Early Transport fixes Patchwork
2026-02-19 13:47 ` ✓ CI.KUnit: success " Patchwork
2026-02-19 14:02 ` ✗ CI.checksparse: warning " Patchwork
2026-02-20 8:20 ` ✓ Xe.CI.BAT: success " Patchwork
2026-02-20 9:57 ` ✓ Xe.CI.FULL: " Patchwork
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