From: Matthew Brost <matthew.brost@intel.com>
To: "Ghimiray, Himal Prasad" <himal.prasad.ghimiray@intel.com>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v3 08/19] drm/xe/svm: Add xe_svm_ranges_zap_ptes_in_range() for PTE zapping
Date: Wed, 28 May 2025 21:00:27 -0700 [thread overview]
Message-ID: <aDfb21fATPB4xyyJ@lstrano-desk.jf.intel.com> (raw)
In-Reply-To: <adc4f3d7-7a75-4672-8ba4-7269f6e71b2e@intel.com>
On Thu, May 29, 2025 at 08:36:28AM +0530, Ghimiray, Himal Prasad wrote:
>
>
> On 29-05-2025 04:45, Matthew Brost wrote:
> > On Tue, May 27, 2025 at 10:09:52PM +0530, Himal Prasad Ghimiray wrote:
> > > Introduce xe_svm_ranges_zap_ptes_in_range(), a function to zap page table
> > > entries (PTEs) for all SVM ranges within a user-specified address range.
> > >
> > > Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> > > ---
> > > drivers/gpu/drm/xe/xe_svm.c | 43 +++++++++++++++++++++++++++++++++++++
> > > drivers/gpu/drm/xe/xe_svm.h | 7 ++++++
> > > 2 files changed, 50 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
> > > index 59e73187114d..a4d53c24fcbc 100644
> > > --- a/drivers/gpu/drm/xe/xe_svm.c
> > > +++ b/drivers/gpu/drm/xe/xe_svm.c
> > > @@ -1006,6 +1006,49 @@ int xe_svm_range_get_pages(struct xe_vm *vm, struct xe_svm_range *range,
> > > return err;
> > > }
> > > +/**
> > > + * xe_svm_ranges_zap_ptes_in_range - clear ptes of svm ranges in input range
> > > + * @vm: Pointer to the xe_vm structure
> > > + * @start: Start of the input range
> > > + * @end: End of the input range
> > > + *
> > > + * This function removes the page table entries (PTEs) associated
> > > + * with the svm ranges within the given input start amnd end
> > > + *
> > > + * Return: tile_mask for which gt's need to be tlb invalidated.
> > > + */
> > > +u8 xe_svm_ranges_zap_ptes_in_range(struct xe_vm *vm, u64 start, u64 end)
> > > +{
> > > + struct drm_gpusvm_notifier *notifier;
> > > + struct xe_svm_range *range;
> > > + u64 adj_start, adj_end;
> > > + struct xe_tile *tile;
> > > + u8 tile_mask = 0;
> > > + u8 id;
> > > +
> > > + down_write(&vm->svm.gpusvm.notifier_lock);
> >
> > xe_svm_notifier_lock
>
> xe_pt_zap_ptes_range needs write_lock, whereas xe_svm_notifier_lock/unlock
> provides read lock.
Hmm, I think the assert in xe_pt_zap_ptes_range is actually wrong. I
likely just added the in notifier assertion because that was the only
user of it. We want to guarantee that only 1 KMD thread is issuing a zap
or modifying the PTEs at a time.
- The notifier lock in read mode guarantees that an invalidation
from MMU notifier doesn't race here.
- The VM lock in write mode guarantees no one is modifying the page
tables.
- The notifier lock in write mode guarantees no one is modifying the
page tables and invalidation from madvise doesn't race.
I think this complex condition can expressed in lockdep by:
lockdep_assert(lockdep_is_held_type(notifier_lock, 0) ||
(lockdep_is_held_type(notifier_lock, 1) &&
lockdep_is_held_type(vm_lock, 0)));
If this works, a comment explaining above is probably warrented.
If the above doesn't work or we deemed this to complex, maybe it fine to
just take the notifier lock in write mode...
I suggest we get another opinion here, perhaps from Thomas.
Matt
> >
> > > +
> > > + drm_gpusvm_for_each_notifier(notifier, &vm->svm.gpusvm, start, end) {
> > > + struct drm_gpusvm_range *r = NULL;
> > > +
> > > + adj_start = max(start, notifier->itree.start);
> > > + adj_end = min(end, notifier->itree.last + 1);
> > > + drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end) {
> > > + range = to_xe_range(r);
> > > + for_each_tile(tile, vm->xe, id) {
> > > + if (xe_pt_zap_ptes_range(tile, vm, range)) {
> > > + tile_mask |= BIT(id);
> > > + range->tile_invalidated |= BIT(id);
> > > + }
> > > + }
> > > + }
> > > + }
> > > +
> > > + up_write(&vm->svm.gpusvm.notifier_lock);
> > > +
> >
> > xe_svm_notifier_unlock
> >
> > Matt
> >
> > > + return tile_mask;
> > > +}
> > > +
> > > #if IS_ENABLED(CONFIG_DRM_XE_DEVMEM_MIRROR)
> > > static struct drm_pagemap_device_addr
> > > diff --git a/drivers/gpu/drm/xe/xe_svm.h b/drivers/gpu/drm/xe/xe_svm.h
> > > index 19ce4f2754a7..af8f285b6caa 100644
> > > --- a/drivers/gpu/drm/xe/xe_svm.h
> > > +++ b/drivers/gpu/drm/xe/xe_svm.h
> > > @@ -91,6 +91,7 @@ bool xe_svm_range_validate(struct xe_vm *vm,
> > > u64 xe_svm_find_vma_start(struct xe_vm *vm, u64 addr, u64 end, struct xe_vma *vma);
> > > +u8 xe_svm_ranges_zap_ptes_in_range(struct xe_vm *vm, u64 start, u64 end);
> > > /**
> > > * xe_svm_range_has_dma_mapping() - SVM range has DMA mapping
> > > * @range: SVM range
> > > @@ -305,6 +306,12 @@ u64 xe_svm_find_vma_start(struct xe_vm *vm, u64 addr, u64 end, struct xe_vma *vm
> > > return ULONG_MAX;
> > > }
> > > +static inline
> > > +u8 xe_svm_ranges_zap_ptes_in_range(struct xe_vm *vm, u64 start, u64 end)
> > > +{
> > > + return 0;
> > > +}
> > > +
> > > #define xe_svm_assert_in_notifier(...) do {} while (0)
> > > #define xe_svm_range_has_dma_mapping(...) false
> > > --
> > > 2.34.1
> > >
>
next prev parent reply other threads:[~2025-05-29 3:59 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-27 16:39 [PATCH v3 00/19] MADVISE FOR XE Himal Prasad Ghimiray
2025-05-27 16:39 ` [PATCH v3 01/19] Introduce drm_gpuvm_sm_map_ops_flags enums for sm_map_ops Himal Prasad Ghimiray
2025-05-27 16:39 ` [PATCH v3 02/19] drm/xe/uapi: Add madvise interface Himal Prasad Ghimiray
2025-05-28 16:27 ` Matthew Brost
2025-05-28 17:03 ` Souza, Jose
2025-05-29 18:03 ` Matthew Brost
2025-05-29 18:00 ` Matthew Brost
2025-06-10 4:32 ` Ghimiray, Himal Prasad
2025-05-27 16:39 ` [PATCH v3 03/19] drm/xe/vm: Add attributes struct as member of vma Himal Prasad Ghimiray
2025-05-28 16:46 ` Matthew Brost
2025-05-27 16:39 ` [PATCH v3 04/19] drm/xe/vma: Move pat_index to vma attributes Himal Prasad Ghimiray
2025-05-28 22:51 ` Matthew Brost
2025-05-27 16:39 ` [PATCH v3 05/19] drm/xe/vma: Modify new_vma to accept struct xe_vma_mem_attr as parameter Himal Prasad Ghimiray
2025-05-28 22:58 ` Matthew Brost
2025-06-02 6:19 ` Dan Carpenter
2025-05-27 16:39 ` [PATCH v3 06/19] drm/gpusvm: Make drm_gpusvm_for_each_* macros public Himal Prasad Ghimiray
2025-05-28 23:01 ` Matthew Brost
2025-05-27 16:39 ` [PATCH v3 07/19] drm/xe/vm: Add a helper xe_vm_range_tilemask_tlb_invalidation() Himal Prasad Ghimiray
2025-05-28 23:12 ` Matthew Brost
2025-05-29 3:21 ` Ghimiray, Himal Prasad
2025-05-27 16:39 ` [PATCH v3 08/19] drm/xe/svm: Add xe_svm_ranges_zap_ptes_in_range() for PTE zapping Himal Prasad Ghimiray
2025-05-28 23:15 ` Matthew Brost
2025-05-29 3:06 ` Ghimiray, Himal Prasad
2025-05-29 4:00 ` Matthew Brost [this message]
2025-05-30 6:29 ` Matthew Brost
2025-06-10 4:31 ` Ghimiray, Himal Prasad
2025-05-27 16:39 ` [PATCH v3 09/19] drm/xe/svm: Split system allocator vma incase of madvise call Himal Prasad Ghimiray
2025-05-29 2:49 ` Matthew Brost
2025-05-29 3:14 ` Ghimiray, Himal Prasad
2025-06-02 6:31 ` Dan Carpenter
2025-05-27 16:39 ` [PATCH v3 10/19] drm/xe: Implement madvise ioctl for xe Himal Prasad Ghimiray
2025-05-29 22:43 ` Matthew Brost
2025-05-30 6:36 ` Matthew Brost
2025-05-30 21:34 ` Matthew Brost
2025-06-10 4:52 ` Ghimiray, Himal Prasad
2025-06-10 5:13 ` Matthew Brost
2025-05-27 16:39 ` [PATCH v3 11/19] drm/xe: Allow CPU address mirror VMA unbind with gpu bindings for madvise Himal Prasad Ghimiray
2025-05-29 22:54 ` Matthew Brost
2025-06-12 9:02 ` Ghimiray, Himal Prasad
2025-05-27 16:39 ` [PATCH v3 12/19] drm/xe/svm : Add svm ranges migration policy on atomic access Himal Prasad Ghimiray
2025-05-29 23:27 ` Matthew Brost
2025-05-29 23:38 ` Matthew Brost
2025-05-30 4:40 ` Matthew Brost
2025-05-27 16:39 ` [PATCH v3 13/19] drm/xe/madvise: Update migration policy based on preferred location Himal Prasad Ghimiray
2025-05-29 23:42 ` Matthew Brost
2025-05-27 16:39 ` [PATCH v3 14/19] drm/xe/svm: Support DRM_XE_SVM_ATTR_PAT memory attribute Himal Prasad Ghimiray
2025-05-30 0:24 ` Matthew Brost
2025-05-27 16:39 ` [PATCH v3 15/19] drm/xe/uapi: Add flag for consulting madvise hints on svm prefetch Himal Prasad Ghimiray
2025-05-28 16:29 ` Matthew Brost
2025-05-27 16:40 ` [PATCH v3 16/19] drm/xe/svm: Consult madvise preferred location in prefetch Himal Prasad Ghimiray
2025-05-30 4:24 ` Matthew Brost
2025-06-24 18:56 ` Matthew Brost
2025-05-27 16:40 ` [PATCH v3 17/19] drm/xe/uapi: Add UAPI for querying VMA count and memory attributes Himal Prasad Ghimiray
2025-05-28 17:02 ` Souza, Jose
2025-05-30 1:11 ` kernel test robot
2025-05-30 4:29 ` Matthew Brost
2025-05-27 16:40 ` [PATCH v3 18/19] drm/xe/bo: Add attributes field to xe_bo Himal Prasad Ghimiray
2025-05-28 23:47 ` Matthew Brost
2025-05-29 2:29 ` Ghimiray, Himal Prasad
2025-05-27 16:40 ` [PATCH v3 19/19] drm/xe/bo: Update atomic_access attribute on madvise Himal Prasad Ghimiray
2025-05-28 23:46 ` Matthew Brost
2025-05-29 3:03 ` Ghimiray, Himal Prasad
2025-05-29 18:24 ` Matthew Brost
2025-05-29 18:30 ` Matthew Brost
2025-05-27 21:35 ` ✓ CI.Patch_applied: success for MADVISE FOR XE Patchwork
2025-05-27 21:35 ` ✗ CI.checkpatch: warning " Patchwork
2025-05-27 21:37 ` ✓ CI.KUnit: success " Patchwork
2025-05-27 21:40 ` ✗ CI.Build: failure " Patchwork
2025-05-28 7:45 ` ✓ CI.Patch_applied: success " Patchwork
2025-05-28 7:45 ` ✗ CI.checkpatch: warning " Patchwork
2025-05-28 7:46 ` ✓ CI.KUnit: success " Patchwork
2025-05-28 7:50 ` ✗ CI.Build: failure " Patchwork
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