* [PATCH] drm/i915/display: Add upper limit check for pixel clock
@ 2025-07-02 4:27 Chaitanya Kumar Borah
2025-07-02 7:36 ` ✓ CI.KUnit: success for " Patchwork
` (3 more replies)
0 siblings, 4 replies; 8+ messages in thread
From: Chaitanya Kumar Borah @ 2025-07-02 4:27 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: imre.deak, ville.syrjala, uma.shankar, chaitanya.kumar.borah
Add upper limit check for pixel clock by platform. Limits don't apply
when DSC is enabled.
For the currently supported versions of HDMI, pixel clock is already
limited to 600Mhz so nothing needs to be done there as of now.
BSpec: 49199, 68912
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++++
drivers/gpu/drm/i915/display/intel_display.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
3 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 456fc4b04cda..bf0faff50c2e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7902,6 +7902,18 @@ void intel_setup_outputs(struct intel_display *display)
drm_helper_move_panel_connectors_to_head(display->drm);
}
+int intel_dotclock_limit(struct intel_display *display)
+{
+ if (DISPLAY_VERx100(display) == 3002)
+ return 937500;
+ else if (DISPLAY_VER(display) >= 30)
+ return 1350000;
+ else if (DISPLAY_VER(display) >= 13)
+ return 1200000;
+ else
+ return 1100000;
+}
+
static int max_dotclock(struct intel_display *display)
{
int max_dotclock = display->cdclk.max_dotclk_freq;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 37e2ab301a80..9ad896a15ba7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -486,6 +486,7 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc,
struct intel_link_m_n *m_n);
int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config);
+int intel_dotclock_limit(struct intel_display *display);
enum intel_display_power_domain intel_port_to_power_domain(struct intel_digital_port *dig_port);
enum intel_display_power_domain
intel_aux_power_domain(struct intel_digital_port *dig_port);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f48912f308df..3ff2beeed801 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1507,6 +1507,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
dsc = dsc_max_compressed_bpp && dsc_slice_count;
}
+ if (target_clock > (intel_dotclock_limit(display) * num_joined_pipes) && !dsc)
+ return MODE_CLOCK_HIGH;
+
if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
return MODE_CLOCK_HIGH;
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* ✓ CI.KUnit: success for drm/i915/display: Add upper limit check for pixel clock
2025-07-02 4:27 [PATCH] drm/i915/display: Add upper limit check for pixel clock Chaitanya Kumar Borah
@ 2025-07-02 7:36 ` Patchwork
2025-07-02 8:14 ` ✓ Xe.CI.BAT: " Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2025-07-02 7:36 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Add upper limit check for pixel clock
URL : https://patchwork.freedesktop.org/series/151047/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[07:35:44] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:35:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:36:15] Starting KUnit Kernel (1/1)...
[07:36:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:36:15] ================== guc_buf (11 subtests) ===================
[07:36:15] [PASSED] test_smallest
[07:36:15] [PASSED] test_largest
[07:36:15] [PASSED] test_granular
[07:36:15] [PASSED] test_unique
[07:36:15] [PASSED] test_overlap
[07:36:15] [PASSED] test_reusable
[07:36:15] [PASSED] test_too_big
[07:36:15] [PASSED] test_flush
[07:36:15] [PASSED] test_lookup
[07:36:15] [PASSED] test_data
[07:36:15] [PASSED] test_class
[07:36:15] ===================== [PASSED] guc_buf =====================
[07:36:15] =================== guc_dbm (7 subtests) ===================
[07:36:15] [PASSED] test_empty
[07:36:15] [PASSED] test_default
[07:36:15] ======================== test_size ========================
[07:36:15] [PASSED] 4
[07:36:15] [PASSED] 8
[07:36:15] [PASSED] 32
[07:36:15] [PASSED] 256
[07:36:15] ==================== [PASSED] test_size ====================
[07:36:15] ======================= test_reuse ========================
[07:36:15] [PASSED] 4
[07:36:15] [PASSED] 8
[07:36:15] [PASSED] 32
[07:36:15] [PASSED] 256
[07:36:15] =================== [PASSED] test_reuse ====================
[07:36:15] =================== test_range_overlap ====================
[07:36:15] [PASSED] 4
[07:36:15] [PASSED] 8
[07:36:15] [PASSED] 32
[07:36:15] [PASSED] 256
[07:36:15] =============== [PASSED] test_range_overlap ================
[07:36:15] =================== test_range_compact ====================
[07:36:15] [PASSED] 4
[07:36:15] [PASSED] 8
[07:36:15] [PASSED] 32
[07:36:15] [PASSED] 256
[07:36:15] =============== [PASSED] test_range_compact ================
[07:36:15] ==================== test_range_spare =====================
[07:36:15] [PASSED] 4
[07:36:15] [PASSED] 8
[07:36:15] [PASSED] 32
[07:36:15] [PASSED] 256
[07:36:15] ================ [PASSED] test_range_spare =================
[07:36:15] ===================== [PASSED] guc_dbm =====================
[07:36:15] =================== guc_idm (6 subtests) ===================
[07:36:15] [PASSED] bad_init
[07:36:15] [PASSED] no_init
[07:36:15] [PASSED] init_fini
[07:36:15] [PASSED] check_used
[07:36:15] [PASSED] check_quota
[07:36:15] [PASSED] check_all
[07:36:15] ===================== [PASSED] guc_idm =====================
[07:36:15] ================== no_relay (3 subtests) ===================
[07:36:15] [PASSED] xe_drops_guc2pf_if_not_ready
[07:36:15] [PASSED] xe_drops_guc2vf_if_not_ready
[07:36:15] [PASSED] xe_rejects_send_if_not_ready
[07:36:15] ==================== [PASSED] no_relay =====================
[07:36:15] ================== pf_relay (14 subtests) ==================
[07:36:15] [PASSED] pf_rejects_guc2pf_too_short
[07:36:15] [PASSED] pf_rejects_guc2pf_too_long
[07:36:15] [PASSED] pf_rejects_guc2pf_no_payload
[07:36:15] [PASSED] pf_fails_no_payload
[07:36:15] [PASSED] pf_fails_bad_origin
[07:36:15] [PASSED] pf_fails_bad_type
[07:36:15] [PASSED] pf_txn_reports_error
[07:36:15] [PASSED] pf_txn_sends_pf2guc
[07:36:15] [PASSED] pf_sends_pf2guc
[07:36:15] [SKIPPED] pf_loopback_nop
[07:36:15] [SKIPPED] pf_loopback_echo
[07:36:15] [SKIPPED] pf_loopback_fail
[07:36:15] [SKIPPED] pf_loopback_busy
[07:36:15] [SKIPPED] pf_loopback_retry
[07:36:15] ==================== [PASSED] pf_relay =====================
[07:36:15] ================== vf_relay (3 subtests) ===================
[07:36:15] [PASSED] vf_rejects_guc2vf_too_short
[07:36:15] [PASSED] vf_rejects_guc2vf_too_long
[07:36:15] [PASSED] vf_rejects_guc2vf_no_payload
[07:36:15] ==================== [PASSED] vf_relay =====================
[07:36:15] ================= pf_service (11 subtests) =================
[07:36:15] [PASSED] pf_negotiate_any
[07:36:15] [PASSED] pf_negotiate_base_match
[07:36:15] [PASSED] pf_negotiate_base_newer
[07:36:15] [PASSED] pf_negotiate_base_next
[07:36:15] [SKIPPED] pf_negotiate_base_older
[07:36:15] [PASSED] pf_negotiate_base_prev
[07:36:15] [PASSED] pf_negotiate_latest_match
[07:36:15] [PASSED] pf_negotiate_latest_newer
[07:36:15] [PASSED] pf_negotiate_latest_next
[07:36:15] [SKIPPED] pf_negotiate_latest_older
[07:36:15] [SKIPPED] pf_negotiate_latest_prev
[07:36:15] =================== [PASSED] pf_service ====================
[07:36:15] ===================== lmtt (1 subtest) =====================
[07:36:15] ======================== test_ops =========================
[07:36:15] [PASSED] 2-level
[07:36:15] [PASSED] multi-level
[07:36:15] ==================== [PASSED] test_ops =====================
[07:36:15] ====================== [PASSED] lmtt =======================
[07:36:15] =================== xe_mocs (2 subtests) ===================
[07:36:15] ================ xe_live_mocs_kernel_kunit ================
[07:36:15] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[07:36:15] ================ xe_live_mocs_reset_kunit =================
[07:36:15] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[07:36:15] ==================== [SKIPPED] xe_mocs =====================
[07:36:15] ================= xe_migrate (2 subtests) ==================
[07:36:15] ================= xe_migrate_sanity_kunit =================
[07:36:15] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[07:36:15] ================== xe_validate_ccs_kunit ==================
[07:36:15] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[07:36:15] =================== [SKIPPED] xe_migrate ===================
[07:36:15] ================== xe_dma_buf (1 subtest) ==================
[07:36:15] ==================== xe_dma_buf_kunit =====================
[07:36:15] ================ [SKIPPED] xe_dma_buf_kunit ================
[07:36:15] =================== [SKIPPED] xe_dma_buf ===================
[07:36:15] ================= xe_bo_shrink (1 subtest) =================
[07:36:15] =================== xe_bo_shrink_kunit ====================
[07:36:15] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[07:36:15] ================== [SKIPPED] xe_bo_shrink ==================
[07:36:15] ==================== xe_bo (2 subtests) ====================
[07:36:15] ================== xe_ccs_migrate_kunit ===================
[07:36:15] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[07:36:15] ==================== xe_bo_evict_kunit ====================
[07:36:15] =============== [SKIPPED] xe_bo_evict_kunit ================
[07:36:15] ===================== [SKIPPED] xe_bo ======================
[07:36:15] ==================== args (11 subtests) ====================
[07:36:15] [PASSED] count_args_test
[07:36:15] [PASSED] call_args_example
[07:36:15] [PASSED] call_args_test
[07:36:15] [PASSED] drop_first_arg_example
[07:36:15] [PASSED] drop_first_arg_test
[07:36:15] [PASSED] first_arg_example
[07:36:15] [PASSED] first_arg_test
[07:36:15] [PASSED] last_arg_example
[07:36:15] [PASSED] last_arg_test
[07:36:15] [PASSED] pick_arg_example
[07:36:15] [PASSED] sep_comma_example
[07:36:15] ====================== [PASSED] args =======================
[07:36:15] =================== xe_pci (2 subtests) ====================
[07:36:15] ==================== check_graphics_ip ====================
[07:36:15] [PASSED] 12.70 Xe_LPG
[07:36:15] [PASSED] 12.71 Xe_LPG
[07:36:15] [PASSED] 12.74 Xe_LPG+
[07:36:15] [PASSED] 20.01 Xe2_HPG
[07:36:15] [PASSED] 20.02 Xe2_HPG
[07:36:15] [PASSED] 20.04 Xe2_LPG
[07:36:15] [PASSED] 30.00 Xe3_LPG
[07:36:15] [PASSED] 30.01 Xe3_LPG
[07:36:15] [PASSED] 30.03 Xe3_LPG
[07:36:15] ================ [PASSED] check_graphics_ip ================
[07:36:15] ===================== check_media_ip ======================
[07:36:15] [PASSED] 13.00 Xe_LPM+
[07:36:15] [PASSED] 13.01 Xe2_HPM
[07:36:15] [PASSED] 20.00 Xe2_LPM
[07:36:15] [PASSED] 30.00 Xe3_LPM
[07:36:15] [PASSED] 30.02 Xe3_LPM
stty: 'standard input': Inappropriate ioctl for device
[07:36:15] ================= [PASSED] check_media_ip ==================
[07:36:15] ===================== [PASSED] xe_pci ======================
[07:36:15] =================== xe_rtp (2 subtests) ====================
[07:36:15] =============== xe_rtp_process_to_sr_tests ================
[07:36:15] [PASSED] coalesce-same-reg
[07:36:15] [PASSED] no-match-no-add
[07:36:15] [PASSED] match-or
[07:36:15] [PASSED] match-or-xfail
[07:36:15] [PASSED] no-match-no-add-multiple-rules
[07:36:15] [PASSED] two-regs-two-entries
[07:36:15] [PASSED] clr-one-set-other
[07:36:15] [PASSED] set-field
[07:36:15] [PASSED] conflict-duplicate
[07:36:15] [PASSED] conflict-not-disjoint
[07:36:15] [PASSED] conflict-reg-type
[07:36:15] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[07:36:15] ================== xe_rtp_process_tests ===================
[07:36:15] [PASSED] active1
[07:36:15] [PASSED] active2
[07:36:15] [PASSED] active-inactive
[07:36:15] [PASSED] inactive-active
[07:36:15] [PASSED] inactive-1st_or_active-inactive
[07:36:15] [PASSED] inactive-2nd_or_active-inactive
[07:36:15] [PASSED] inactive-last_or_active-inactive
[07:36:15] [PASSED] inactive-no_or_active-inactive
[07:36:15] ============== [PASSED] xe_rtp_process_tests ===============
[07:36:15] ===================== [PASSED] xe_rtp ======================
[07:36:15] ==================== xe_wa (1 subtest) =====================
[07:36:15] ======================== xe_wa_gt =========================
[07:36:15] [PASSED] TIGERLAKE (B0)
[07:36:15] [PASSED] DG1 (A0)
[07:36:15] [PASSED] DG1 (B0)
[07:36:15] [PASSED] ALDERLAKE_S (A0)
[07:36:15] [PASSED] ALDERLAKE_S (B0)
[07:36:15] [PASSED] ALDERLAKE_S (C0)
[07:36:15] [PASSED] ALDERLAKE_S (D0)
[07:36:15] [PASSED] ALDERLAKE_P (A0)
[07:36:15] [PASSED] ALDERLAKE_P (B0)
[07:36:15] [PASSED] ALDERLAKE_P (C0)
[07:36:15] [PASSED] ALDERLAKE_S_RPLS (D0)
[07:36:15] [PASSED] ALDERLAKE_P_RPLU (E0)
[07:36:15] [PASSED] DG2_G10 (C0)
[07:36:15] [PASSED] DG2_G11 (B1)
[07:36:15] [PASSED] DG2_G12 (A1)
[07:36:15] [PASSED] METEORLAKE (g:A0, m:A0)
[07:36:15] [PASSED] METEORLAKE (g:A0, m:A0)
[07:36:15] [PASSED] METEORLAKE (g:A0, m:A0)
[07:36:15] [PASSED] LUNARLAKE (g:A0, m:A0)
[07:36:15] [PASSED] LUNARLAKE (g:B0, m:A0)
[07:36:15] [PASSED] BATTLEMAGE (g:A0, m:A1)
[07:36:15] ==================== [PASSED] xe_wa_gt =====================
[07:36:15] ====================== [PASSED] xe_wa ======================
[07:36:15] ============================================================
[07:36:15] Testing complete. Ran 145 tests: passed: 129, skipped: 16
[07:36:15] Elapsed time: 31.289s total, 4.157s configuring, 26.812s building, 0.295s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[07:36:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:36:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:36:38] Starting KUnit Kernel (1/1)...
[07:36:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:36:38] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[07:36:38] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[07:36:38] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[07:36:38] =========== drm_validate_clone_mode (2 subtests) ===========
[07:36:38] ============== drm_test_check_in_clone_mode ===============
[07:36:38] [PASSED] in_clone_mode
[07:36:38] [PASSED] not_in_clone_mode
[07:36:38] ========== [PASSED] drm_test_check_in_clone_mode ===========
[07:36:38] =============== drm_test_check_valid_clones ===============
[07:36:38] [PASSED] not_in_clone_mode
[07:36:38] [PASSED] valid_clone
[07:36:38] [PASSED] invalid_clone
[07:36:38] =========== [PASSED] drm_test_check_valid_clones ===========
[07:36:38] ============= [PASSED] drm_validate_clone_mode =============
[07:36:38] ============= drm_validate_modeset (1 subtest) =============
[07:36:38] [PASSED] drm_test_check_connector_changed_modeset
[07:36:38] ============== [PASSED] drm_validate_modeset ===============
[07:36:38] ====== drm_test_bridge_get_current_state (2 subtests) ======
[07:36:38] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[07:36:38] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[07:36:38] ======== [PASSED] drm_test_bridge_get_current_state ========
[07:36:38] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[07:36:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[07:36:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[07:36:38] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[07:36:38] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[07:36:38] ============== drm_bridge_alloc (2 subtests) ===============
[07:36:38] [PASSED] drm_test_drm_bridge_alloc_basic
[07:36:38] [PASSED] drm_test_drm_bridge_alloc_get_put
[07:36:38] ================ [PASSED] drm_bridge_alloc =================
[07:36:38] ================== drm_buddy (7 subtests) ==================
[07:36:38] [PASSED] drm_test_buddy_alloc_limit
[07:36:38] [PASSED] drm_test_buddy_alloc_optimistic
[07:36:38] [PASSED] drm_test_buddy_alloc_pessimistic
[07:36:38] [PASSED] drm_test_buddy_alloc_pathological
[07:36:38] [PASSED] drm_test_buddy_alloc_contiguous
[07:36:38] [PASSED] drm_test_buddy_alloc_clear
[07:36:38] [PASSED] drm_test_buddy_alloc_range_bias
[07:36:38] ==================== [PASSED] drm_buddy ====================
[07:36:38] ============= drm_cmdline_parser (40 subtests) =============
[07:36:38] [PASSED] drm_test_cmdline_force_d_only
[07:36:38] [PASSED] drm_test_cmdline_force_D_only_dvi
[07:36:38] [PASSED] drm_test_cmdline_force_D_only_hdmi
[07:36:38] [PASSED] drm_test_cmdline_force_D_only_not_digital
[07:36:38] [PASSED] drm_test_cmdline_force_e_only
[07:36:38] [PASSED] drm_test_cmdline_res
[07:36:38] [PASSED] drm_test_cmdline_res_vesa
[07:36:38] [PASSED] drm_test_cmdline_res_vesa_rblank
[07:36:38] [PASSED] drm_test_cmdline_res_rblank
[07:36:38] [PASSED] drm_test_cmdline_res_bpp
[07:36:38] [PASSED] drm_test_cmdline_res_refresh
[07:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh
[07:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[07:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[07:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[07:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[07:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[07:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[07:36:38] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[07:36:38] [PASSED] drm_test_cmdline_res_margins_force_on
[07:36:38] [PASSED] drm_test_cmdline_res_vesa_margins
[07:36:38] [PASSED] drm_test_cmdline_name
[07:36:38] [PASSED] drm_test_cmdline_name_bpp
[07:36:38] [PASSED] drm_test_cmdline_name_option
[07:36:38] [PASSED] drm_test_cmdline_name_bpp_option
[07:36:38] [PASSED] drm_test_cmdline_rotate_0
[07:36:38] [PASSED] drm_test_cmdline_rotate_90
[07:36:38] [PASSED] drm_test_cmdline_rotate_180
[07:36:38] [PASSED] drm_test_cmdline_rotate_270
[07:36:38] [PASSED] drm_test_cmdline_hmirror
[07:36:38] [PASSED] drm_test_cmdline_vmirror
[07:36:38] [PASSED] drm_test_cmdline_margin_options
[07:36:38] [PASSED] drm_test_cmdline_multiple_options
[07:36:38] [PASSED] drm_test_cmdline_bpp_extra_and_option
[07:36:38] [PASSED] drm_test_cmdline_extra_and_option
[07:36:38] [PASSED] drm_test_cmdline_freestanding_options
[07:36:38] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[07:36:38] [PASSED] drm_test_cmdline_panel_orientation
[07:36:38] ================ drm_test_cmdline_invalid =================
[07:36:38] [PASSED] margin_only
[07:36:38] [PASSED] interlace_only
[07:36:38] [PASSED] res_missing_x
[07:36:38] [PASSED] res_missing_y
[07:36:38] [PASSED] res_bad_y
[07:36:38] [PASSED] res_missing_y_bpp
[07:36:38] [PASSED] res_bad_bpp
[07:36:38] [PASSED] res_bad_refresh
[07:36:38] [PASSED] res_bpp_refresh_force_on_off
[07:36:38] [PASSED] res_invalid_mode
[07:36:38] [PASSED] res_bpp_wrong_place_mode
[07:36:38] [PASSED] name_bpp_refresh
[07:36:38] [PASSED] name_refresh
[07:36:38] [PASSED] name_refresh_wrong_mode
[07:36:38] [PASSED] name_refresh_invalid_mode
[07:36:38] [PASSED] rotate_multiple
[07:36:38] [PASSED] rotate_invalid_val
[07:36:38] [PASSED] rotate_truncated
[07:36:38] [PASSED] invalid_option
[07:36:38] [PASSED] invalid_tv_option
[07:36:38] [PASSED] truncated_tv_option
[07:36:38] ============ [PASSED] drm_test_cmdline_invalid =============
[07:36:38] =============== drm_test_cmdline_tv_options ===============
[07:36:38] [PASSED] NTSC
[07:36:38] [PASSED] NTSC_443
[07:36:38] [PASSED] NTSC_J
[07:36:38] [PASSED] PAL
[07:36:38] [PASSED] PAL_M
[07:36:38] [PASSED] PAL_N
[07:36:38] [PASSED] SECAM
[07:36:38] [PASSED] MONO_525
[07:36:38] [PASSED] MONO_625
[07:36:38] =========== [PASSED] drm_test_cmdline_tv_options ===========
[07:36:38] =============== [PASSED] drm_cmdline_parser ================
[07:36:38] ========== drmm_connector_hdmi_init (20 subtests) ==========
[07:36:38] [PASSED] drm_test_connector_hdmi_init_valid
[07:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_8
[07:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_10
[07:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_12
[07:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[07:36:38] [PASSED] drm_test_connector_hdmi_init_bpc_null
[07:36:38] [PASSED] drm_test_connector_hdmi_init_formats_empty
[07:36:38] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[07:36:38] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:36:38] [PASSED] supported_formats=0x9 yuv420_allowed=1
[07:36:38] [PASSED] supported_formats=0x9 yuv420_allowed=0
[07:36:38] [PASSED] supported_formats=0x3 yuv420_allowed=1
[07:36:38] [PASSED] supported_formats=0x3 yuv420_allowed=0
[07:36:38] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:36:38] [PASSED] drm_test_connector_hdmi_init_null_ddc
[07:36:38] [PASSED] drm_test_connector_hdmi_init_null_product
[07:36:38] [PASSED] drm_test_connector_hdmi_init_null_vendor
[07:36:38] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[07:36:38] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[07:36:38] [PASSED] drm_test_connector_hdmi_init_product_valid
[07:36:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[07:36:38] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[07:36:38] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[07:36:38] ========= drm_test_connector_hdmi_init_type_valid =========
[07:36:38] [PASSED] HDMI-A
[07:36:38] [PASSED] HDMI-B
[07:36:38] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[07:36:38] ======== drm_test_connector_hdmi_init_type_invalid ========
[07:36:38] [PASSED] Unknown
[07:36:38] [PASSED] VGA
[07:36:38] [PASSED] DVI-I
[07:36:38] [PASSED] DVI-D
[07:36:38] [PASSED] DVI-A
[07:36:38] [PASSED] Composite
[07:36:38] [PASSED] SVIDEO
[07:36:38] [PASSED] LVDS
[07:36:38] [PASSED] Component
[07:36:38] [PASSED] DIN
[07:36:38] [PASSED] DP
[07:36:38] [PASSED] TV
[07:36:38] [PASSED] eDP
[07:36:38] [PASSED] Virtual
[07:36:38] [PASSED] DSI
[07:36:38] [PASSED] DPI
[07:36:38] [PASSED] Writeback
[07:36:38] [PASSED] SPI
[07:36:38] [PASSED] USB
[07:36:38] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[07:36:38] ============ [PASSED] drmm_connector_hdmi_init =============
[07:36:38] ============= drmm_connector_init (3 subtests) =============
[07:36:38] [PASSED] drm_test_drmm_connector_init
[07:36:38] [PASSED] drm_test_drmm_connector_init_null_ddc
[07:36:38] ========= drm_test_drmm_connector_init_type_valid =========
[07:36:38] [PASSED] Unknown
[07:36:38] [PASSED] VGA
[07:36:38] [PASSED] DVI-I
[07:36:38] [PASSED] DVI-D
[07:36:38] [PASSED] DVI-A
[07:36:38] [PASSED] Composite
[07:36:38] [PASSED] SVIDEO
[07:36:38] [PASSED] LVDS
[07:36:38] [PASSED] Component
[07:36:38] [PASSED] DIN
[07:36:38] [PASSED] DP
[07:36:38] [PASSED] HDMI-A
[07:36:38] [PASSED] HDMI-B
[07:36:38] [PASSED] TV
[07:36:38] [PASSED] eDP
[07:36:38] [PASSED] Virtual
[07:36:38] [PASSED] DSI
[07:36:38] [PASSED] DPI
[07:36:38] [PASSED] Writeback
[07:36:38] [PASSED] SPI
[07:36:38] [PASSED] USB
[07:36:38] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[07:36:38] =============== [PASSED] drmm_connector_init ===============
[07:36:38] ========= drm_connector_dynamic_init (6 subtests) ==========
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_init
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_init_properties
[07:36:38] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[07:36:38] [PASSED] Unknown
[07:36:38] [PASSED] VGA
[07:36:38] [PASSED] DVI-I
[07:36:38] [PASSED] DVI-D
[07:36:38] [PASSED] DVI-A
[07:36:38] [PASSED] Composite
[07:36:38] [PASSED] SVIDEO
[07:36:38] [PASSED] LVDS
[07:36:38] [PASSED] Component
[07:36:38] [PASSED] DIN
[07:36:38] [PASSED] DP
[07:36:38] [PASSED] HDMI-A
[07:36:38] [PASSED] HDMI-B
[07:36:38] [PASSED] TV
[07:36:38] [PASSED] eDP
[07:36:38] [PASSED] Virtual
[07:36:38] [PASSED] DSI
[07:36:38] [PASSED] DPI
[07:36:38] [PASSED] Writeback
[07:36:38] [PASSED] SPI
[07:36:38] [PASSED] USB
[07:36:38] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[07:36:38] ======== drm_test_drm_connector_dynamic_init_name =========
[07:36:38] [PASSED] Unknown
[07:36:38] [PASSED] VGA
[07:36:38] [PASSED] DVI-I
[07:36:38] [PASSED] DVI-D
[07:36:38] [PASSED] DVI-A
[07:36:38] [PASSED] Composite
[07:36:38] [PASSED] SVIDEO
[07:36:38] [PASSED] LVDS
[07:36:38] [PASSED] Component
[07:36:38] [PASSED] DIN
[07:36:38] [PASSED] DP
[07:36:38] [PASSED] HDMI-A
[07:36:38] [PASSED] HDMI-B
[07:36:38] [PASSED] TV
[07:36:38] [PASSED] eDP
[07:36:38] [PASSED] Virtual
[07:36:38] [PASSED] DSI
[07:36:38] [PASSED] DPI
[07:36:38] [PASSED] Writeback
[07:36:38] [PASSED] SPI
[07:36:38] [PASSED] USB
[07:36:38] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[07:36:38] =========== [PASSED] drm_connector_dynamic_init ============
[07:36:38] ==== drm_connector_dynamic_register_early (4 subtests) =====
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[07:36:38] ====== [PASSED] drm_connector_dynamic_register_early =======
[07:36:38] ======= drm_connector_dynamic_register (7 subtests) ========
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[07:36:38] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[07:36:38] ========= [PASSED] drm_connector_dynamic_register ==========
[07:36:38] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[07:36:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[07:36:38] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[07:36:38] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[07:36:38] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[07:36:38] ========== drm_test_get_tv_mode_from_name_valid ===========
[07:36:38] [PASSED] NTSC
[07:36:38] [PASSED] NTSC-443
[07:36:38] [PASSED] NTSC-J
[07:36:38] [PASSED] PAL
[07:36:38] [PASSED] PAL-M
[07:36:38] [PASSED] PAL-N
[07:36:38] [PASSED] SECAM
[07:36:38] [PASSED] Mono
[07:36:38] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[07:36:38] [PASSED] drm_test_get_tv_mode_from_name_truncated
[07:36:38] ============ [PASSED] drm_get_tv_mode_from_name ============
[07:36:38] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[07:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[07:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[07:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[07:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[07:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[07:36:38] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[07:36:38] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[07:36:38] [PASSED] VIC 96
[07:36:38] [PASSED] VIC 97
[07:36:38] [PASSED] VIC 101
[07:36:38] [PASSED] VIC 102
[07:36:38] [PASSED] VIC 106
[07:36:38] [PASSED] VIC 107
[07:36:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[07:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[07:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[07:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[07:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[07:36:38] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[07:36:38] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[07:36:38] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[07:36:38] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[07:36:38] [PASSED] Automatic
[07:36:38] [PASSED] Full
[07:36:38] [PASSED] Limited 16:235
[07:36:38] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[07:36:38] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[07:36:38] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[07:36:38] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[07:36:38] === drm_test_drm_hdmi_connector_get_output_format_name ====
[07:36:38] [PASSED] RGB
[07:36:38] [PASSED] YUV 4:2:0
[07:36:38] [PASSED] YUV 4:2:2
[07:36:38] [PASSED] YUV 4:4:4
[07:36:38] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[07:36:38] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[07:36:38] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[07:36:38] ============= drm_damage_helper (21 subtests) ==============
[07:36:38] [PASSED] drm_test_damage_iter_no_damage
[07:36:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[07:36:38] [PASSED] drm_test_damage_iter_no_damage_src_moved
[07:36:38] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[07:36:38] [PASSED] drm_test_damage_iter_no_damage_not_visible
[07:36:38] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[07:36:38] [PASSED] drm_test_damage_iter_no_damage_no_fb
[07:36:38] [PASSED] drm_test_damage_iter_simple_damage
[07:36:38] [PASSED] drm_test_damage_iter_single_damage
[07:36:38] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[07:36:38] [PASSED] drm_test_damage_iter_single_damage_outside_src
[07:36:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[07:36:38] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[07:36:38] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[07:36:38] [PASSED] drm_test_damage_iter_single_damage_src_moved
[07:36:38] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[07:36:38] [PASSED] drm_test_damage_iter_damage
[07:36:38] [PASSED] drm_test_damage_iter_damage_one_intersect
[07:36:38] [PASSED] drm_test_damage_iter_damage_one_outside
[07:36:38] [PASSED] drm_test_damage_iter_damage_src_moved
[07:36:38] [PASSED] drm_test_damage_iter_damage_not_visible
[07:36:38] ================ [PASSED] drm_damage_helper ================
[07:36:38] ============== drm_dp_mst_helper (3 subtests) ==============
[07:36:38] ============== drm_test_dp_mst_calc_pbn_mode ==============
[07:36:38] [PASSED] Clock 154000 BPP 30 DSC disabled
[07:36:38] [PASSED] Clock 234000 BPP 30 DSC disabled
[07:36:38] [PASSED] Clock 297000 BPP 24 DSC disabled
[07:36:38] [PASSED] Clock 332880 BPP 24 DSC enabled
[07:36:38] [PASSED] Clock 324540 BPP 24 DSC enabled
[07:36:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[07:36:38] ============== drm_test_dp_mst_calc_pbn_div ===============
[07:36:38] [PASSED] Link rate 2000000 lane count 4
[07:36:38] [PASSED] Link rate 2000000 lane count 2
[07:36:38] [PASSED] Link rate 2000000 lane count 1
[07:36:38] [PASSED] Link rate 1350000 lane count 4
[07:36:38] [PASSED] Link rate 1350000 lane count 2
[07:36:38] [PASSED] Link rate 1350000 lane count 1
[07:36:38] [PASSED] Link rate 1000000 lane count 4
[07:36:38] [PASSED] Link rate 1000000 lane count 2
[07:36:38] [PASSED] Link rate 1000000 lane count 1
[07:36:38] [PASSED] Link rate 810000 lane count 4
[07:36:38] [PASSED] Link rate 810000 lane count 2
[07:36:38] [PASSED] Link rate 810000 lane count 1
[07:36:38] [PASSED] Link rate 540000 lane count 4
[07:36:38] [PASSED] Link rate 540000 lane count 2
[07:36:38] [PASSED] Link rate 540000 lane count 1
[07:36:38] [PASSED] Link rate 270000 lane count 4
[07:36:38] [PASSED] Link rate 270000 lane count 2
[07:36:38] [PASSED] Link rate 270000 lane count 1
[07:36:38] [PASSED] Link rate 162000 lane count 4
[07:36:38] [PASSED] Link rate 162000 lane count 2
[07:36:38] [PASSED] Link rate 162000 lane count 1
[07:36:38] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[07:36:38] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[07:36:38] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[07:36:38] [PASSED] DP_POWER_UP_PHY with port number
[07:36:38] [PASSED] DP_POWER_DOWN_PHY with port number
[07:36:38] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[07:36:38] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[07:36:38] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[07:36:38] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[07:36:38] [PASSED] DP_QUERY_PAYLOAD with port number
[07:36:38] [PASSED] DP_QUERY_PAYLOAD with VCPI
[07:36:38] [PASSED] DP_REMOTE_DPCD_READ with port number
[07:36:38] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[07:36:38] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[07:36:38] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[07:36:38] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[07:36:38] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[07:36:38] [PASSED] DP_REMOTE_I2C_READ with port number
[07:36:38] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[07:36:38] [PASSED] DP_REMOTE_I2C_READ with transactions array
[07:36:38] [PASSED] DP_REMOTE_I2C_WRITE with port number
[07:36:38] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[07:36:38] [PASSED] DP_REMOTE_I2C_WRITE with data array
[07:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[07:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[07:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[07:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[07:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[07:36:38] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[07:36:38] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[07:36:38] ================ [PASSED] drm_dp_mst_helper ================
[07:36:38] ================== drm_exec (7 subtests) ===================
[07:36:38] [PASSED] sanitycheck
[07:36:38] [PASSED] test_lock
[07:36:38] [PASSED] test_lock_unlock
[07:36:38] [PASSED] test_duplicates
[07:36:38] [PASSED] test_prepare
[07:36:38] [PASSED] test_prepare_array
[07:36:38] [PASSED] test_multiple_loops
[07:36:38] ==================== [PASSED] drm_exec =====================
[07:36:38] =========== drm_format_helper_test (17 subtests) ===========
[07:36:38] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[07:36:38] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[07:36:38] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[07:36:38] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[07:36:38] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[07:36:38] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[07:36:38] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[07:36:38] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[07:36:38] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[07:36:38] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[07:36:38] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[07:36:38] ============== drm_test_fb_xrgb8888_to_mono ===============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[07:36:38] ==================== drm_test_fb_swab =====================
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ================ [PASSED] drm_test_fb_swab =================
[07:36:38] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[07:36:38] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[07:36:38] [PASSED] single_pixel_source_buffer
[07:36:38] [PASSED] single_pixel_clip_rectangle
[07:36:38] [PASSED] well_known_colors
[07:36:38] [PASSED] destination_pitch
[07:36:38] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[07:36:38] ================= drm_test_fb_clip_offset =================
[07:36:38] [PASSED] pass through
[07:36:38] [PASSED] horizontal offset
[07:36:38] [PASSED] vertical offset
[07:36:38] [PASSED] horizontal and vertical offset
[07:36:38] [PASSED] horizontal offset (custom pitch)
[07:36:38] [PASSED] vertical offset (custom pitch)
[07:36:38] [PASSED] horizontal and vertical offset (custom pitch)
[07:36:38] ============= [PASSED] drm_test_fb_clip_offset =============
[07:36:38] =================== drm_test_fb_memcpy ====================
[07:36:38] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[07:36:38] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[07:36:38] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[07:36:38] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[07:36:38] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[07:36:38] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[07:36:38] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[07:36:38] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[07:36:38] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[07:36:38] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[07:36:38] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[07:36:38] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[07:36:38] =============== [PASSED] drm_test_fb_memcpy ================
[07:36:38] ============= [PASSED] drm_format_helper_test ==============
[07:36:38] ================= drm_format (18 subtests) =================
[07:36:38] [PASSED] drm_test_format_block_width_invalid
[07:36:38] [PASSED] drm_test_format_block_width_one_plane
[07:36:38] [PASSED] drm_test_format_block_width_two_plane
[07:36:38] [PASSED] drm_test_format_block_width_three_plane
[07:36:38] [PASSED] drm_test_format_block_width_tiled
[07:36:38] [PASSED] drm_test_format_block_height_invalid
[07:36:38] [PASSED] drm_test_format_block_height_one_plane
[07:36:38] [PASSED] drm_test_format_block_height_two_plane
[07:36:38] [PASSED] drm_test_format_block_height_three_plane
[07:36:38] [PASSED] drm_test_format_block_height_tiled
[07:36:38] [PASSED] drm_test_format_min_pitch_invalid
[07:36:38] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[07:36:38] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[07:36:38] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[07:36:38] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[07:36:38] [PASSED] drm_test_format_min_pitch_two_plane
[07:36:38] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[07:36:38] [PASSED] drm_test_format_min_pitch_tiled
[07:36:38] =================== [PASSED] drm_format ====================
[07:36:38] ============== drm_framebuffer (10 subtests) ===============
[07:36:38] ========== drm_test_framebuffer_check_src_coords ==========
[07:36:38] [PASSED] Success: source fits into fb
[07:36:38] [PASSED] Fail: overflowing fb with x-axis coordinate
[07:36:38] [PASSED] Fail: overflowing fb with y-axis coordinate
[07:36:38] [PASSED] Fail: overflowing fb with source width
[07:36:38] [PASSED] Fail: overflowing fb with source height
[07:36:38] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[07:36:38] [PASSED] drm_test_framebuffer_cleanup
[07:36:38] =============== drm_test_framebuffer_create ===============
[07:36:38] [PASSED] ABGR8888 normal sizes
[07:36:38] [PASSED] ABGR8888 max sizes
[07:36:38] [PASSED] ABGR8888 pitch greater than min required
[07:36:38] [PASSED] ABGR8888 pitch less than min required
[07:36:38] [PASSED] ABGR8888 Invalid width
[07:36:38] [PASSED] ABGR8888 Invalid buffer handle
[07:36:38] [PASSED] No pixel format
[07:36:38] [PASSED] ABGR8888 Width 0
[07:36:38] [PASSED] ABGR8888 Height 0
[07:36:38] [PASSED] ABGR8888 Out of bound height * pitch combination
[07:36:38] [PASSED] ABGR8888 Large buffer offset
[07:36:38] [PASSED] ABGR8888 Buffer offset for inexistent plane
[07:36:38] [PASSED] ABGR8888 Invalid flag
[07:36:38] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[07:36:38] [PASSED] ABGR8888 Valid buffer modifier
[07:36:38] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[07:36:38] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[07:36:38] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[07:36:38] [PASSED] NV12 Normal sizes
[07:36:38] [PASSED] NV12 Max sizes
[07:36:38] [PASSED] NV12 Invalid pitch
[07:36:38] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[07:36:38] [PASSED] NV12 different modifier per-plane
[07:36:38] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[07:36:38] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[07:36:38] [PASSED] NV12 Modifier for inexistent plane
[07:36:38] [PASSED] NV12 Handle for inexistent plane
[07:36:38] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[07:36:38] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[07:36:38] [PASSED] YVU420 Normal sizes
[07:36:38] [PASSED] YVU420 Max sizes
[07:36:38] [PASSED] YVU420 Invalid pitch
[07:36:38] [PASSED] YVU420 Different pitches
[07:36:38] [PASSED] YVU420 Different buffer offsets/pitches
[07:36:38] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[07:36:38] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[07:36:38] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[07:36:38] [PASSED] YVU420 Valid modifier
[07:36:38] [PASSED] YVU420 Different modifiers per plane
[07:36:38] [PASSED] YVU420 Modifier for inexistent plane
[07:36:38] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[07:36:38] [PASSED] X0L2 Normal sizes
[07:36:38] [PASSED] X0L2 Max sizes
[07:36:38] [PASSED] X0L2 Invalid pitch
[07:36:38] [PASSED] X0L2 Pitch greater than minimum required
[07:36:38] [PASSED] X0L2 Handle for inexistent plane
[07:36:38] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[07:36:38] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[07:36:38] [PASSED] X0L2 Valid modifier
[07:36:38] [PASSED] X0L2 Modifier for inexistent plane
[07:36:38] =========== [PASSED] drm_test_framebuffer_create ===========
[07:36:38] [PASSED] drm_test_framebuffer_free
[07:36:38] [PASSED] drm_test_framebuffer_init
[07:36:38] [PASSED] drm_test_framebuffer_init_bad_format
[07:36:38] [PASSED] drm_test_framebuffer_init_dev_mismatch
[07:36:38] [PASSED] drm_test_framebuffer_lookup
[07:36:38] [PASSED] drm_test_framebuffer_lookup_inexistent
[07:36:38] [PASSED] drm_test_framebuffer_modifiers_not_supported
[07:36:38] ================= [PASSED] drm_framebuffer =================
[07:36:38] ================ drm_gem_shmem (8 subtests) ================
[07:36:38] [PASSED] drm_gem_shmem_test_obj_create
[07:36:38] [PASSED] drm_gem_shmem_test_obj_create_private
[07:36:38] [PASSED] drm_gem_shmem_test_pin_pages
[07:36:38] [PASSED] drm_gem_shmem_test_vmap
[07:36:38] [PASSED] drm_gem_shmem_test_get_pages_sgt
[07:36:38] [PASSED] drm_gem_shmem_test_get_sg_table
[07:36:38] [PASSED] drm_gem_shmem_test_madvise
[07:36:38] [PASSED] drm_gem_shmem_test_purge
[07:36:38] ================== [PASSED] drm_gem_shmem ==================
[07:36:38] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[07:36:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[07:36:38] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[07:36:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[07:36:38] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[07:36:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[07:36:38] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[07:36:38] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[07:36:38] [PASSED] Automatic
[07:36:38] [PASSED] Full
[07:36:38] [PASSED] Limited 16:235
[07:36:38] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[07:36:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[07:36:38] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[07:36:38] [PASSED] drm_test_check_disable_connector
[07:36:38] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[07:36:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[07:36:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[07:36:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[07:36:38] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[07:36:38] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[07:36:38] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[07:36:38] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[07:36:38] [PASSED] drm_test_check_output_bpc_dvi
[07:36:38] [PASSED] drm_test_check_output_bpc_format_vic_1
[07:36:38] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[07:36:38] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[07:36:38] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[07:36:38] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[07:36:38] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[07:36:38] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[07:36:38] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[07:36:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[07:36:38] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[07:36:38] [PASSED] drm_test_check_broadcast_rgb_value
[07:36:38] [PASSED] drm_test_check_bpc_8_value
[07:36:38] [PASSED] drm_test_check_bpc_10_value
[07:36:38] [PASSED] drm_test_check_bpc_12_value
[07:36:38] [PASSED] drm_test_check_format_value
[07:36:38] [PASSED] drm_test_check_tmds_char_value
[07:36:38] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[07:36:38] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[07:36:38] [PASSED] drm_test_check_mode_valid
[07:36:38] [PASSED] drm_test_check_mode_valid_reject
[07:36:38] [PASSED] drm_test_check_mode_valid_reject_rate
[07:36:38] [PASSED] drm_test_check_mode_valid_reject_max_clock
[07:36:38] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[07:36:38] ================= drm_managed (2 subtests) =================
[07:36:38] [PASSED] drm_test_managed_release_action
[07:36:38] [PASSED] drm_test_managed_run_action
[07:36:38] =================== [PASSED] drm_managed ===================
[07:36:38] =================== drm_mm (6 subtests) ====================
[07:36:38] [PASSED] drm_test_mm_init
[07:36:38] [PASSED] drm_test_mm_debug
[07:36:38] [PASSED] drm_test_mm_align32
[07:36:38] [PASSED] drm_test_mm_align64
[07:36:38] [PASSED] drm_test_mm_lowest
[07:36:38] [PASSED] drm_test_mm_highest
[07:36:38] ===================== [PASSED] drm_mm ======================
[07:36:38] ============= drm_modes_analog_tv (5 subtests) =============
[07:36:38] [PASSED] drm_test_modes_analog_tv_mono_576i
[07:36:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[07:36:38] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[07:36:38] [PASSED] drm_test_modes_analog_tv_pal_576i
[07:36:38] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[07:36:38] =============== [PASSED] drm_modes_analog_tv ===============
[07:36:38] ============== drm_plane_helper (2 subtests) ===============
[07:36:38] =============== drm_test_check_plane_state ================
[07:36:38] [PASSED] clipping_simple
[07:36:38] [PASSED] clipping_rotate_reflect
[07:36:38] [PASSED] positioning_simple
[07:36:38] [PASSED] upscaling
[07:36:38] [PASSED] downscaling
[07:36:38] [PASSED] rounding1
[07:36:38] [PASSED] rounding2
[07:36:38] [PASSED] rounding3
[07:36:38] [PASSED] rounding4
[07:36:38] =========== [PASSED] drm_test_check_plane_state ============
[07:36:38] =========== drm_test_check_invalid_plane_state ============
[07:36:38] [PASSED] positioning_invalid
[07:36:38] [PASSED] upscaling_invalid
[07:36:38] [PASSED] downscaling_invalid
[07:36:38] ======= [PASSED] drm_test_check_invalid_plane_state ========
[07:36:38] ================ [PASSED] drm_plane_helper =================
[07:36:38] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[07:36:38] ====== drm_test_connector_helper_tv_get_modes_check =======
[07:36:38] [PASSED] None
[07:36:38] [PASSED] PAL
[07:36:38] [PASSED] NTSC
[07:36:38] [PASSED] Both, NTSC Default
[07:36:38] [PASSED] Both, PAL Default
[07:36:38] [PASSED] Both, NTSC Default, with PAL on command-line
[07:36:38] [PASSED] Both, PAL Default, with NTSC on command-line
[07:36:38] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[07:36:38] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[07:36:38] ================== drm_rect (9 subtests) ===================
[07:36:38] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[07:36:38] [PASSED] drm_test_rect_clip_scaled_not_clipped
[07:36:38] [PASSED] drm_test_rect_clip_scaled_clipped
[07:36:38] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[07:36:38] ================= drm_test_rect_intersect =================
[07:36:38] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[07:36:38] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[07:36:38] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[07:36:38] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[07:36:38] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[07:36:38] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[07:36:38] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[07:36:38] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[07:36:38] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[07:36:38] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[07:36:38] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[07:36:38] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[07:36:38] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[07:36:38] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[07:36:38] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[07:36:38] ============= [PASSED] drm_test_rect_intersect =============
[07:36:38] ================ drm_test_rect_calc_hscale ================
[07:36:38] [PASSED] normal use
[07:36:38] [PASSED] out of max range
[07:36:38] [PASSED] out of min range
[07:36:38] [PASSED] zero dst
[07:36:38] [PASSED] negative src
[07:36:38] [PASSED] negative dst
[07:36:38] ============ [PASSED] drm_test_rect_calc_hscale ============
[07:36:38] ================ drm_test_rect_calc_vscale ================
[07:36:38] [PASSED] normal use
[07:36:38] [PASSED] out of max range
[07:36:38] [PASSED] out of min range
[07:36:38] [PASSED] zero dst
[07:36:38] [PASSED] negative src
[07:36:38] [PASSED] negative dst
[07:36:38] ============ [PASSED] drm_test_rect_calc_vscale ============
[07:36:38] ================== drm_test_rect_rotate ===================
[07:36:38] [PASSED] reflect-x
[07:36:38] [PASSED] reflect-y
[07:36:38] [PASSED] rotate-0
[07:36:38] [PASSED] rotate-90
[07:36:38] [PASSED] rotate-180
[07:36:38] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[07:36:38] ============== [PASSED] drm_test_rect_rotate ===============
[07:36:38] ================ drm_test_rect_rotate_inv =================
[07:36:38] [PASSED] reflect-x
[07:36:38] [PASSED] reflect-y
[07:36:38] [PASSED] rotate-0
[07:36:38] [PASSED] rotate-90
[07:36:38] [PASSED] rotate-180
[07:36:38] [PASSED] rotate-270
[07:36:38] ============ [PASSED] drm_test_rect_rotate_inv =============
[07:36:38] ==================== [PASSED] drm_rect =====================
[07:36:38] ============ drm_sysfb_modeset_test (1 subtest) ============
[07:36:38] ============ drm_test_sysfb_build_fourcc_list =============
[07:36:38] [PASSED] no native formats
[07:36:38] [PASSED] XRGB8888 as native format
[07:36:38] [PASSED] remove duplicates
[07:36:38] [PASSED] convert alpha formats
[07:36:38] [PASSED] random formats
[07:36:38] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[07:36:38] ============= [PASSED] drm_sysfb_modeset_test ==============
[07:36:38] ============================================================
[07:36:38] Testing complete. Ran 616 tests: passed: 616
[07:36:38] Elapsed time: 23.233s total, 1.646s configuring, 21.414s building, 0.137s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[07:36:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:36:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:36:48] Starting KUnit Kernel (1/1)...
[07:36:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:36:48] ================= ttm_device (5 subtests) ==================
[07:36:48] [PASSED] ttm_device_init_basic
[07:36:48] [PASSED] ttm_device_init_multiple
[07:36:48] [PASSED] ttm_device_fini_basic
[07:36:48] [PASSED] ttm_device_init_no_vma_man
[07:36:48] ================== ttm_device_init_pools ==================
[07:36:48] [PASSED] No DMA allocations, no DMA32 required
[07:36:48] [PASSED] DMA allocations, DMA32 required
[07:36:48] [PASSED] No DMA allocations, DMA32 required
[07:36:48] [PASSED] DMA allocations, no DMA32 required
[07:36:48] ============== [PASSED] ttm_device_init_pools ==============
[07:36:48] =================== [PASSED] ttm_device ====================
[07:36:48] ================== ttm_pool (8 subtests) ===================
[07:36:48] ================== ttm_pool_alloc_basic ===================
[07:36:48] [PASSED] One page
[07:36:48] [PASSED] More than one page
[07:36:48] [PASSED] Above the allocation limit
[07:36:48] [PASSED] One page, with coherent DMA mappings enabled
[07:36:48] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:36:48] ============== [PASSED] ttm_pool_alloc_basic ===============
[07:36:48] ============== ttm_pool_alloc_basic_dma_addr ==============
[07:36:48] [PASSED] One page
[07:36:48] [PASSED] More than one page
[07:36:48] [PASSED] Above the allocation limit
[07:36:48] [PASSED] One page, with coherent DMA mappings enabled
[07:36:48] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:36:48] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[07:36:48] [PASSED] ttm_pool_alloc_order_caching_match
[07:36:48] [PASSED] ttm_pool_alloc_caching_mismatch
[07:36:48] [PASSED] ttm_pool_alloc_order_mismatch
[07:36:48] [PASSED] ttm_pool_free_dma_alloc
[07:36:48] [PASSED] ttm_pool_free_no_dma_alloc
[07:36:48] [PASSED] ttm_pool_fini_basic
[07:36:48] ==================== [PASSED] ttm_pool =====================
[07:36:48] ================ ttm_resource (8 subtests) =================
[07:36:48] ================= ttm_resource_init_basic =================
[07:36:48] [PASSED] Init resource in TTM_PL_SYSTEM
[07:36:48] [PASSED] Init resource in TTM_PL_VRAM
[07:36:48] [PASSED] Init resource in a private placement
[07:36:48] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[07:36:48] ============= [PASSED] ttm_resource_init_basic =============
[07:36:48] [PASSED] ttm_resource_init_pinned
[07:36:48] [PASSED] ttm_resource_fini_basic
[07:36:48] [PASSED] ttm_resource_manager_init_basic
[07:36:48] [PASSED] ttm_resource_manager_usage_basic
[07:36:48] [PASSED] ttm_resource_manager_set_used_basic
[07:36:48] [PASSED] ttm_sys_man_alloc_basic
[07:36:48] [PASSED] ttm_sys_man_free_basic
[07:36:48] ================== [PASSED] ttm_resource ===================
[07:36:48] =================== ttm_tt (15 subtests) ===================
[07:36:48] ==================== ttm_tt_init_basic ====================
[07:36:48] [PASSED] Page-aligned size
[07:36:48] [PASSED] Extra pages requested
[07:36:48] ================ [PASSED] ttm_tt_init_basic ================
[07:36:48] [PASSED] ttm_tt_init_misaligned
[07:36:48] [PASSED] ttm_tt_fini_basic
[07:36:48] [PASSED] ttm_tt_fini_sg
[07:36:48] [PASSED] ttm_tt_fini_shmem
[07:36:48] [PASSED] ttm_tt_create_basic
[07:36:48] [PASSED] ttm_tt_create_invalid_bo_type
[07:36:48] [PASSED] ttm_tt_create_ttm_exists
[07:36:48] [PASSED] ttm_tt_create_failed
[07:36:48] [PASSED] ttm_tt_destroy_basic
[07:36:48] [PASSED] ttm_tt_populate_null_ttm
[07:36:48] [PASSED] ttm_tt_populate_populated_ttm
[07:36:48] [PASSED] ttm_tt_unpopulate_basic
[07:36:48] [PASSED] ttm_tt_unpopulate_empty_ttm
[07:36:48] [PASSED] ttm_tt_swapin_basic
[07:36:48] ===================== [PASSED] ttm_tt ======================
[07:36:48] =================== ttm_bo (14 subtests) ===================
[07:36:48] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[07:36:48] [PASSED] Cannot be interrupted and sleeps
[07:36:48] [PASSED] Cannot be interrupted, locks straight away
[07:36:48] [PASSED] Can be interrupted, sleeps
[07:36:48] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[07:36:48] [PASSED] ttm_bo_reserve_locked_no_sleep
[07:36:48] [PASSED] ttm_bo_reserve_no_wait_ticket
[07:36:48] [PASSED] ttm_bo_reserve_double_resv
[07:36:48] [PASSED] ttm_bo_reserve_interrupted
[07:36:48] [PASSED] ttm_bo_reserve_deadlock
[07:36:48] [PASSED] ttm_bo_unreserve_basic
[07:36:48] [PASSED] ttm_bo_unreserve_pinned
[07:36:48] [PASSED] ttm_bo_unreserve_bulk
[07:36:48] [PASSED] ttm_bo_put_basic
[07:36:48] [PASSED] ttm_bo_put_shared_resv
[07:36:48] [PASSED] ttm_bo_pin_basic
[07:36:48] [PASSED] ttm_bo_pin_unpin_resource
[07:36:48] [PASSED] ttm_bo_multiple_pin_one_unpin
[07:36:48] ===================== [PASSED] ttm_bo ======================
[07:36:48] ============== ttm_bo_validate (22 subtests) ===============
[07:36:48] ============== ttm_bo_init_reserved_sys_man ===============
[07:36:48] [PASSED] Buffer object for userspace
[07:36:48] [PASSED] Kernel buffer object
[07:36:48] [PASSED] Shared buffer object
[07:36:48] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[07:36:48] ============== ttm_bo_init_reserved_mock_man ==============
[07:36:48] [PASSED] Buffer object for userspace
[07:36:48] [PASSED] Kernel buffer object
[07:36:48] [PASSED] Shared buffer object
[07:36:48] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[07:36:48] [PASSED] ttm_bo_init_reserved_resv
[07:36:48] ================== ttm_bo_validate_basic ==================
[07:36:48] [PASSED] Buffer object for userspace
[07:36:48] [PASSED] Kernel buffer object
[07:36:48] [PASSED] Shared buffer object
[07:36:48] ============== [PASSED] ttm_bo_validate_basic ==============
[07:36:48] [PASSED] ttm_bo_validate_invalid_placement
[07:36:48] ============= ttm_bo_validate_same_placement ==============
[07:36:48] [PASSED] System manager
[07:36:48] [PASSED] VRAM manager
[07:36:48] ========= [PASSED] ttm_bo_validate_same_placement ==========
[07:36:48] [PASSED] ttm_bo_validate_failed_alloc
[07:36:48] [PASSED] ttm_bo_validate_pinned
[07:36:48] [PASSED] ttm_bo_validate_busy_placement
[07:36:48] ================ ttm_bo_validate_multihop =================
[07:36:48] [PASSED] Buffer object for userspace
[07:36:48] [PASSED] Kernel buffer object
[07:36:48] [PASSED] Shared buffer object
[07:36:48] ============ [PASSED] ttm_bo_validate_multihop =============
[07:36:48] ========== ttm_bo_validate_no_placement_signaled ==========
[07:36:48] [PASSED] Buffer object in system domain, no page vector
[07:36:48] [PASSED] Buffer object in system domain with an existing page vector
[07:36:48] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[07:36:48] ======== ttm_bo_validate_no_placement_not_signaled ========
[07:36:48] [PASSED] Buffer object for userspace
[07:36:48] [PASSED] Kernel buffer object
[07:36:48] [PASSED] Shared buffer object
[07:36:48] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[07:36:48] [PASSED] ttm_bo_validate_move_fence_signaled
[07:36:48] ========= ttm_bo_validate_move_fence_not_signaled =========
[07:36:48] [PASSED] Waits for GPU
[07:36:48] [PASSED] Tries to lock straight away
[07:36:48] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[07:36:48] [PASSED] ttm_bo_validate_swapout
[07:36:48] [PASSED] ttm_bo_validate_happy_evict
[07:36:48] [PASSED] ttm_bo_validate_all_pinned_evict
[07:36:48] [PASSED] ttm_bo_validate_allowed_only_evict
[07:36:48] [PASSED] ttm_bo_validate_deleted_evict
[07:36:48] [PASSED] ttm_bo_validate_busy_domain_evict
[07:36:48] [PASSED] ttm_bo_validate_evict_gutting
[07:36:48] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[07:36:48] ================= [PASSED] ttm_bo_validate =================
[07:36:48] ============================================================
[07:36:48] Testing complete. Ran 102 tests: passed: 102
[07:36:48] Elapsed time: 9.954s total, 1.672s configuring, 7.663s building, 0.536s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/display: Add upper limit check for pixel clock
2025-07-02 4:27 [PATCH] drm/i915/display: Add upper limit check for pixel clock Chaitanya Kumar Borah
2025-07-02 7:36 ` ✓ CI.KUnit: success for " Patchwork
@ 2025-07-02 8:14 ` Patchwork
2025-07-02 8:31 ` [PATCH] " Jani Nikula
2025-07-03 21:58 ` ✓ Xe.CI.Full: success for " Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2025-07-02 8:14 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 962 bytes --]
== Series Details ==
Series: drm/i915/display: Add upper limit check for pixel clock
URL : https://patchwork.freedesktop.org/series/151047/
State : success
== Summary ==
CI Bug Log - changes from xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd_BAT -> xe-pw-151047v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 8)
------------------------------
Missing (1): bat-adlp-vm
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd -> xe-pw-151047v1
IGT_8432: 4871829d8b7117553eb2dc1bdb9a0d18de428a98 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd: 149b15e02e6496a37621cd5bf8a28f7d8c1869cd
xe-pw-151047v1: 151047v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/index.html
[-- Attachment #2: Type: text/html, Size: 1510 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915/display: Add upper limit check for pixel clock
2025-07-02 4:27 [PATCH] drm/i915/display: Add upper limit check for pixel clock Chaitanya Kumar Borah
2025-07-02 7:36 ` ✓ CI.KUnit: success for " Patchwork
2025-07-02 8:14 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-07-02 8:31 ` Jani Nikula
2025-07-02 9:42 ` Borah, Chaitanya Kumar
2025-07-03 21:58 ` ✓ Xe.CI.Full: success for " Patchwork
3 siblings, 1 reply; 8+ messages in thread
From: Jani Nikula @ 2025-07-02 8:31 UTC (permalink / raw)
To: Chaitanya Kumar Borah, intel-xe, intel-gfx
Cc: imre.deak, ville.syrjala, uma.shankar, chaitanya.kumar.borah
On Wed, 02 Jul 2025, Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> wrote:
> Add upper limit check for pixel clock by platform. Limits don't apply
> when DSC is enabled.
>
> For the currently supported versions of HDMI, pixel clock is already
> limited to 600Mhz so nothing needs to be done there as of now.
>
> BSpec: 49199, 68912
>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++++
> drivers/gpu/drm/i915/display/intel_display.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
> 3 files changed, 16 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 456fc4b04cda..bf0faff50c2e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7902,6 +7902,18 @@ void intel_setup_outputs(struct intel_display *display)
> drm_helper_move_panel_connectors_to_head(display->drm);
> }
>
> +int intel_dotclock_limit(struct intel_display *display)
> +{
> + if (DISPLAY_VERx100(display) == 3002)
> + return 937500;
> + else if (DISPLAY_VER(display) >= 30)
> + return 1350000;
> + else if (DISPLAY_VER(display) >= 13)
> + return 1200000;
> + else
> + return 1100000;
> +}
How does this relate to display->cdclk.max_dotclk_freq that's computed
in intel_compute_max_dotclk(display)?
BR,
Jani.
> +
> static int max_dotclock(struct intel_display *display)
> {
> int max_dotclock = display->cdclk.max_dotclk_freq;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 37e2ab301a80..9ad896a15ba7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -486,6 +486,7 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc,
> struct intel_link_m_n *m_n);
> int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
> int intel_crtc_dotclock(const struct intel_crtc_state *pipe_config);
> +int intel_dotclock_limit(struct intel_display *display);
> enum intel_display_power_domain intel_port_to_power_domain(struct intel_digital_port *dig_port);
> enum intel_display_power_domain
> intel_aux_power_domain(struct intel_digital_port *dig_port);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index f48912f308df..3ff2beeed801 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1507,6 +1507,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> dsc = dsc_max_compressed_bpp && dsc_slice_count;
> }
>
> + if (target_clock > (intel_dotclock_limit(display) * num_joined_pipes) && !dsc)
> + return MODE_CLOCK_HIGH;
> +
> if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
> return MODE_CLOCK_HIGH;
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 8+ messages in thread
* RE: [PATCH] drm/i915/display: Add upper limit check for pixel clock
2025-07-02 8:31 ` [PATCH] " Jani Nikula
@ 2025-07-02 9:42 ` Borah, Chaitanya Kumar
2025-07-02 19:24 ` Ville Syrjälä
0 siblings, 1 reply; 8+ messages in thread
From: Borah, Chaitanya Kumar @ 2025-07-02 9:42 UTC (permalink / raw)
To: Jani Nikula, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Deak, Imre, ville.syrjala@linux.intel.com, Shankar, Uma
> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Wednesday, July 2, 2025 2:01 PM
> To: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>; intel-
> xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Deak, Imre <imre.deak@intel.com>; ville.syrjala@linux.intel.com; Shankar,
> Uma <uma.shankar@intel.com>; Borah, Chaitanya Kumar
> <chaitanya.kumar.borah@intel.com>
> Subject: Re: [PATCH] drm/i915/display: Add upper limit check for pixel clock
>
> On Wed, 02 Jul 2025, Chaitanya Kumar Borah
> <chaitanya.kumar.borah@intel.com> wrote:
> > Add upper limit check for pixel clock by platform. Limits don't apply
> > when DSC is enabled.
> >
> > For the currently supported versions of HDMI, pixel clock is already
> > limited to 600Mhz so nothing needs to be done there as of now.
> >
> > BSpec: 49199, 68912
> >
> > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++++
> > drivers/gpu/drm/i915/display/intel_display.h | 1 +
> > drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
> > 3 files changed, 16 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 456fc4b04cda..bf0faff50c2e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -7902,6 +7902,18 @@ void intel_setup_outputs(struct intel_display
> *display)
> > drm_helper_move_panel_connectors_to_head(display->drm);
> > }
> >
> > +int intel_dotclock_limit(struct intel_display *display) {
> > + if (DISPLAY_VERx100(display) == 3002)
> > + return 937500;
> > + else if (DISPLAY_VER(display) >= 30)
> > + return 1350000;
> > + else if (DISPLAY_VER(display) >= 13)
> > + return 1200000;
> > + else
> > + return 1100000;
> > +}
>
> How does this relate to display->cdclk.max_dotclk_freq that's computed in
> intel_compute_max_dotclk(display)?
>
The Bspec defines this limit as "maximum validated frequency" and asks to limit the pixel clock accordingly when DSC is not enabled.
At least for PTL it is 97.65 % of the mathematically calculated maximum pixel clock (pixel per clock * max cdclk).
I am not sure if intel_cdclk_guardband() used in intel_compute_max_dotclk() was intended for something similar. However, since the limit only applies
when dsc is not enabled it made sense to me that we apply this limit during intel_dp_mode_valid () instead of doing it in intel_compute_max_dotclk().
Regards
Chaitanya
P.S. The second Bspec reference number should be 68858. To be Fixed in the next version.
> BR,
> Jani.
>
>
> > +
> > static int max_dotclock(struct intel_display *display) {
> > int max_dotclock = display->cdclk.max_dotclk_freq; diff --git
> > a/drivers/gpu/drm/i915/display/intel_display.h
> > b/drivers/gpu/drm/i915/display/intel_display.h
> > index 37e2ab301a80..9ad896a15ba7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > @@ -486,6 +486,7 @@ void intel_cpu_transcoder_get_m2_n2(struct
> intel_crtc *crtc,
> > struct intel_link_m_n *m_n);
> > int intel_dotclock_calculate(int link_freq, const struct
> > intel_link_m_n *m_n); int intel_crtc_dotclock(const struct
> > intel_crtc_state *pipe_config);
> > +int intel_dotclock_limit(struct intel_display *display);
> > enum intel_display_power_domain intel_port_to_power_domain(struct
> > intel_digital_port *dig_port); enum intel_display_power_domain
> > intel_aux_power_domain(struct intel_digital_port *dig_port); diff
> > --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index f48912f308df..3ff2beeed801 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1507,6 +1507,9 @@ intel_dp_mode_valid(struct drm_connector
> *_connector,
> > dsc = dsc_max_compressed_bpp && dsc_slice_count;
> > }
> >
> > + if (target_clock > (intel_dotclock_limit(display) * num_joined_pipes)
> && !dsc)
> > + return MODE_CLOCK_HIGH;
> > +
> > if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)
> > return MODE_CLOCK_HIGH;
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915/display: Add upper limit check for pixel clock
2025-07-02 9:42 ` Borah, Chaitanya Kumar
@ 2025-07-02 19:24 ` Ville Syrjälä
2025-07-03 6:33 ` Nautiyal, Ankit K
0 siblings, 1 reply; 8+ messages in thread
From: Ville Syrjälä @ 2025-07-02 19:24 UTC (permalink / raw)
To: Borah, Chaitanya Kumar
Cc: Jani Nikula, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org, Deak, Imre, Shankar, Uma
On Wed, Jul 02, 2025 at 09:42:04AM +0000, Borah, Chaitanya Kumar wrote:
>
>
> > -----Original Message-----
> > From: Jani Nikula <jani.nikula@linux.intel.com>
> > Sent: Wednesday, July 2, 2025 2:01 PM
> > To: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>; intel-
> > xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> > Cc: Deak, Imre <imre.deak@intel.com>; ville.syrjala@linux.intel.com; Shankar,
> > Uma <uma.shankar@intel.com>; Borah, Chaitanya Kumar
> > <chaitanya.kumar.borah@intel.com>
> > Subject: Re: [PATCH] drm/i915/display: Add upper limit check for pixel clock
> >
> > On Wed, 02 Jul 2025, Chaitanya Kumar Borah
> > <chaitanya.kumar.borah@intel.com> wrote:
> > > Add upper limit check for pixel clock by platform. Limits don't apply
> > > when DSC is enabled.
> > >
> > > For the currently supported versions of HDMI, pixel clock is already
> > > limited to 600Mhz so nothing needs to be done there as of now.
> > >
> > > BSpec: 49199, 68912
> > >
> > > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++++
> > > drivers/gpu/drm/i915/display/intel_display.h | 1 +
> > > drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
> > > 3 files changed, 16 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 456fc4b04cda..bf0faff50c2e 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -7902,6 +7902,18 @@ void intel_setup_outputs(struct intel_display
> > *display)
> > > drm_helper_move_panel_connectors_to_head(display->drm);
> > > }
> > >
> > > +int intel_dotclock_limit(struct intel_display *display) {
> > > + if (DISPLAY_VERx100(display) == 3002)
> > > + return 937500;
> > > + else if (DISPLAY_VER(display) >= 30)
> > > + return 1350000;
> > > + else if (DISPLAY_VER(display) >= 13)
> > > + return 1200000;
> > > + else
> > > + return 1100000;
> > > +}
> >
> > How does this relate to display->cdclk.max_dotclk_freq that's computed in
> > intel_compute_max_dotclk(display)?
> >
>
> The Bspec defines this limit as "maximum validated frequency" and asks to limit the pixel clock accordingly when DSC is not enabled.
> At least for PTL it is 97.65 % of the mathematically calculated maximum pixel clock (pixel per clock * max cdclk).
>
> I am not sure if intel_cdclk_guardband() used in intel_compute_max_dotclk() was intended for something similar. However, since the limit only applies
> when dsc is not enabled it made sense to me that we apply this limit during intel_dp_mode_valid () instead of doing it in intel_compute_max_dotclk().
I think what we need is something like:
- implement the DSC bubble stuff and account for it in both
cdclk calculations and mode validation
- implement this non-dsc cdclk limit checks also in a way that
covers both (also needs to cover all output types, not just DP).
I suspect the DSC bubble stuff might always end up more restrictive
than this, so perhaps this could just be covered by adjusting the
cdclk guardband
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] drm/i915/display: Add upper limit check for pixel clock
2025-07-02 19:24 ` Ville Syrjälä
@ 2025-07-03 6:33 ` Nautiyal, Ankit K
0 siblings, 0 replies; 8+ messages in thread
From: Nautiyal, Ankit K @ 2025-07-03 6:33 UTC (permalink / raw)
To: Ville Syrjälä, Borah, Chaitanya Kumar
Cc: Jani Nikula, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org, Deak, Imre, Shankar, Uma
On 7/3/2025 12:54 AM, Ville Syrjälä wrote:
> On Wed, Jul 02, 2025 at 09:42:04AM +0000, Borah, Chaitanya Kumar wrote:
>>
>>> -----Original Message-----
>>> From: Jani Nikula <jani.nikula@linux.intel.com>
>>> Sent: Wednesday, July 2, 2025 2:01 PM
>>> To: Borah, Chaitanya Kumar <chaitanya.kumar.borah@intel.com>; intel-
>>> xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
>>> Cc: Deak, Imre <imre.deak@intel.com>; ville.syrjala@linux.intel.com; Shankar,
>>> Uma <uma.shankar@intel.com>; Borah, Chaitanya Kumar
>>> <chaitanya.kumar.borah@intel.com>
>>> Subject: Re: [PATCH] drm/i915/display: Add upper limit check for pixel clock
>>>
>>> On Wed, 02 Jul 2025, Chaitanya Kumar Borah
>>> <chaitanya.kumar.borah@intel.com> wrote:
>>>> Add upper limit check for pixel clock by platform. Limits don't apply
>>>> when DSC is enabled.
>>>>
>>>> For the currently supported versions of HDMI, pixel clock is already
>>>> limited to 600Mhz so nothing needs to be done there as of now.
>>>>
>>>> BSpec: 49199, 68912
>>>>
>>>> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++++
>>>> drivers/gpu/drm/i915/display/intel_display.h | 1 +
>>>> drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
>>>> 3 files changed, 16 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>>>> b/drivers/gpu/drm/i915/display/intel_display.c
>>>> index 456fc4b04cda..bf0faff50c2e 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>>> @@ -7902,6 +7902,18 @@ void intel_setup_outputs(struct intel_display
>>> *display)
>>>> drm_helper_move_panel_connectors_to_head(display->drm);
>>>> }
>>>>
>>>> +int intel_dotclock_limit(struct intel_display *display) {
>>>> + if (DISPLAY_VERx100(display) == 3002)
>>>> + return 937500;
>>>> + else if (DISPLAY_VER(display) >= 30)
>>>> + return 1350000;
>>>> + else if (DISPLAY_VER(display) >= 13)
>>>> + return 1200000;
>>>> + else
>>>> + return 1100000;
>>>> +}
>>> How does this relate to display->cdclk.max_dotclk_freq that's computed in
>>> intel_compute_max_dotclk(display)?
>>>
>> The Bspec defines this limit as "maximum validated frequency" and asks to limit the pixel clock accordingly when DSC is not enabled.
>> At least for PTL it is 97.65 % of the mathematically calculated maximum pixel clock (pixel per clock * max cdclk).
>>
>> I am not sure if intel_cdclk_guardband() used in intel_compute_max_dotclk() was intended for something similar. However, since the limit only applies
>> when dsc is not enabled it made sense to me that we apply this limit during intel_dp_mode_valid () instead of doing it in intel_compute_max_dotclk().
> I think what we need is something like:
> - implement the DSC bubble stuff and account for it in both
> cdclk calculations and mode validation
I have some patch for accounting the DSC bubble stuff for cdclk
calculations, but not for mode validation though.
https://patchwork.freedesktop.org/series/150083/
Still need to test properly.
Regards,
Ankit
> - implement this non-dsc cdclk limit checks also in a way that
> covers both (also needs to cover all output types, not just DP).
> I suspect the DSC bubble stuff might always end up more restrictive
> than this, so perhaps this could just be covered by adjusting the
> cdclk guardband
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* ✓ Xe.CI.Full: success for drm/i915/display: Add upper limit check for pixel clock
2025-07-02 4:27 [PATCH] drm/i915/display: Add upper limit check for pixel clock Chaitanya Kumar Borah
` (2 preceding siblings ...)
2025-07-02 8:31 ` [PATCH] " Jani Nikula
@ 2025-07-03 21:58 ` Patchwork
3 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2025-07-03 21:58 UTC (permalink / raw)
To: Chaitanya Kumar Borah; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 35444 bytes --]
== Series Details ==
Series: drm/i915/display: Add upper limit check for pixel clock
URL : https://patchwork.freedesktop.org/series/151047/
State : success
== Summary ==
CI Bug Log - changes from xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd_FULL -> xe-pw-151047v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-151047v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_addfb_basic@addfb25-yf-tiled-legacy:
- shard-adlp: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#2953] / [Intel XE#4173])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-adlp-2/igt@kms_addfb_basic@addfb25-yf-tiled-legacy.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-adlp-2/igt@kms_addfb_basic@addfb25-yf-tiled-legacy.html
* igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
- shard-adlp: [PASS][3] -> [FAIL][4] ([Intel XE#3908]) +1 other test fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-adlp-1/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-adlp-4/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180:
- shard-dg2-set2: NOTRUN -> [SKIP][5] ([Intel XE#1124]) +3 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#1124])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
- shard-bmg: [PASS][7] -> [SKIP][8] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-3-displays-2160x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][9] ([Intel XE#367])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][10] ([Intel XE#455] / [Intel XE#787]) +19 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-463/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2652] / [Intel XE#787]) +3 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-2/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [PASS][12] -> [INCOMPLETE][13] ([Intel XE#3862])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2:
- shard-bmg: NOTRUN -> [INCOMPLETE][14] ([Intel XE#3862])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-d-dp-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-bmg: [PASS][15] -> [FAIL][16] ([Intel XE#5376])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][17] ([Intel XE#5376])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2:
- shard-dg2-set2: NOTRUN -> [SKIP][18] ([Intel XE#787]) +125 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-2.html
* igt@kms_chamelium_hpd@hdmi-hpd:
- shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#373]) +2 other tests skip
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@kms_chamelium_hpd@hdmi-hpd.html
* igt@kms_content_protection@srm@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][20] ([Intel XE#1178])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-463/igt@kms_content_protection@srm@pipe-a-dp-4.html
* igt@kms_content_protection@uevent@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][21] ([Intel XE#1188])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-433/igt@kms_content_protection@uevent@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2321])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-bmg: [PASS][23] -> [SKIP][24] ([Intel XE#2291]) +3 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_display_modes@extended-mode-basic:
- shard-bmg: [PASS][25] -> [SKIP][26] ([Intel XE#4302])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-8/igt@kms_display_modes@extended-mode-basic.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: [PASS][27] -> [SKIP][28] ([Intel XE#1340])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-5/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#4494] / [i915#3804])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-435/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html
* igt@kms_fbcon_fbt@psr:
- shard-dg2-set2: NOTRUN -> [SKIP][30] ([Intel XE#776])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@kms_fbcon_fbt@psr.html
* igt@kms_feature_discovery@display-2x:
- shard-bmg: [PASS][31] -> [SKIP][32] ([Intel XE#2373])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-7/igt@kms_feature_discovery@display-2x.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-5/igt@kms_feature_discovery@display-2x.html
* igt@kms_feature_discovery@psr1:
- shard-dg2-set2: NOTRUN -> [SKIP][33] ([Intel XE#1135])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
- shard-bmg: [PASS][34] -> [SKIP][35] ([Intel XE#2316]) +10 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-1/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-5/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [PASS][36] -> [FAIL][37] ([Intel XE#301]) +3 other tests fail
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-rmfb-interruptible@c-hdmi-a1:
- shard-adlp: [PASS][38] -> [DMESG-WARN][39] ([Intel XE#4543])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-adlp-8/igt@kms_flip@flip-vs-rmfb-interruptible@c-hdmi-a1.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-adlp-9/igt@kms_flip@flip-vs-rmfb-interruptible@c-hdmi-a1.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-x:
- shard-adlp: [PASS][40] -> [DMESG-FAIL][41] ([Intel XE#4543]) +1 other test dmesg-fail
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-adlp-1/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-x.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-x.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][42] ([Intel XE#651]) +11 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][43] ([Intel XE#658])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#653]) +3 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_hdr@static-toggle:
- shard-bmg: [PASS][45] -> [SKIP][46] ([Intel XE#1503])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-8/igt@kms_hdr@static-toggle.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_hdr@static-toggle.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-bmg: [PASS][47] -> [SKIP][48] ([Intel XE#3012])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-1/igt@kms_joiner@basic-force-big-joiner.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-5/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256:
- shard-dg2-set2: NOTRUN -> [FAIL][49] ([Intel XE#616]) +2 other tests fail
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-433/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-6-size-256.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-bmg: [PASS][50] -> [SKIP][51] ([Intel XE#4596])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-x.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_psr2_sf@pr-cursor-plane-update-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][52] ([Intel XE#1489])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
* igt@kms_psr@fbc-psr-cursor-plane-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][53] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@kms_psr@fbc-psr-cursor-plane-onoff.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- shard-dg2-set2: NOTRUN -> [SKIP][54] ([Intel XE#3414])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
* igt@kms_vrr@flip-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][55] ([Intel XE#455])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-435/igt@kms_vrr@flip-suspend.html
* igt@xe_eu_stall@invalid-gt-id:
- shard-dg2-set2: NOTRUN -> [SKIP][56] ([Intel XE#5308])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-435/igt@xe_eu_stall@invalid-gt-id.html
* igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram:
- shard-dg2-set2: NOTRUN -> [SKIP][57] ([Intel XE#4837]) +4 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind:
- shard-dg2-set2: NOTRUN -> [SKIP][58] ([Intel XE#1392])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind:
- shard-dg2-set2: [PASS][59] -> [SKIP][60] ([Intel XE#1392]) +5 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-466/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html
* igt@xe_exec_fault_mode@once-bindexecqueue-rebind:
- shard-dg2-set2: NOTRUN -> [SKIP][61] ([Intel XE#288]) +5 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@xe_exec_fault_mode@once-bindexecqueue-rebind.html
* igt@xe_exec_reset@cm-close-fd:
- shard-adlp: [PASS][62] -> [DMESG-WARN][63] ([Intel XE#3868])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-adlp-9/igt@xe_exec_reset@cm-close-fd.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-adlp-3/igt@xe_exec_reset@cm-close-fd.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset:
- shard-lnl: [PASS][64] -> [FAIL][65] ([Intel XE#5018]) +1 other test fail
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-lnl-8/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html
* igt@xe_exec_system_allocator@twice-mmap-remap-ro-eocheck:
- shard-dg2-set2: NOTRUN -> [SKIP][66] ([Intel XE#4915]) +44 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@xe_exec_system_allocator@twice-mmap-remap-ro-eocheck.html
* igt@xe_huc_copy@huc_copy:
- shard-dg2-set2: NOTRUN -> [SKIP][67] ([Intel XE#255])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@xe_huc_copy@huc_copy.html
* igt@xe_oa@privileged-forked-access-vaddr:
- shard-dg2-set2: NOTRUN -> [SKIP][68] ([Intel XE#2541] / [Intel XE#3573])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-435/igt@xe_oa@privileged-forked-access-vaddr.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-dg2-set2: NOTRUN -> [SKIP][69] ([Intel XE#944])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-435/igt@xe_query@multigpu-query-pxp-status.html
#### Possible fixes ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][70] ([Intel XE#3862]) -> [PASS][71]
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][72] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][74] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
- shard-dg2-set2: [INCOMPLETE][76] ([Intel XE#3124]) -> [PASS][77] +1 other test pass
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [DMESG-WARN][78] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][79] +1 other test pass
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-bmg: [DMESG-WARN][80] -> [PASS][81]
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-6/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-3/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [SKIP][82] ([Intel XE#2291]) -> [PASS][83] +8 other tests pass
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_dp_aux_dev:
- shard-bmg: [SKIP][84] ([Intel XE#3009]) -> [PASS][85]
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-6/igt@kms_dp_aux_dev.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-7/igt@kms_dp_aux_dev.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-bmg: [FAIL][86] -> [PASS][87] +1 other test pass
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-1/igt@kms_flip@2x-blocking-wf_vblank.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-7/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: [SKIP][88] ([Intel XE#2316]) -> [PASS][89] +3 other tests pass
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-5/igt@kms_flip@2x-nonexisting-fb.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-2/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@flip-vs-rmfb@d-hdmi-a1:
- shard-adlp: [DMESG-WARN][90] ([Intel XE#4543]) -> [PASS][91] +2 other tests pass
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-adlp-2/igt@kms_flip@flip-vs-rmfb@d-hdmi-a1.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-adlp-6/igt@kms_flip@flip-vs-rmfb@d-hdmi-a1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-dg2-set2: [INCOMPLETE][92] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][93] +1 other test pass
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-435/igt@kms_flip@flip-vs-suspend-interruptible.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-463/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@plain-flip-ts-check-interruptible:
- shard-dg2-set2: [FAIL][94] ([Intel XE#2882] / [Intel XE#886]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-432/igt@kms_flip@plain-flip-ts-check-interruptible.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-463/igt@kms_flip@plain-flip-ts-check-interruptible.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][96] ([Intel XE#1503]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-bmg: [SKIP][98] ([Intel XE#4596]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_pm_rpm@basic-pci-d3-state:
- shard-dg2-set2: [FAIL][100] ([Intel XE#4741]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-433/igt@kms_pm_rpm@basic-pci-d3-state.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-436/igt@kms_pm_rpm@basic-pci-d3-state.html
* igt@kms_vblank@ts-continuation-dpms-suspend:
- shard-adlp: [DMESG-WARN][102] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][103] +1 other test pass
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-adlp-8/igt@kms_vblank@ts-continuation-dpms-suspend.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-adlp-4/igt@kms_vblank@ts-continuation-dpms-suspend.html
* igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
- shard-dg2-set2: [SKIP][104] ([Intel XE#1392]) -> [PASS][105] +5 other tests pass
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-433/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
#### Warnings ####
* igt@kms_content_protection@uevent:
- shard-bmg: [FAIL][106] ([Intel XE#1188]) -> [SKIP][107] ([Intel XE#2341])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-3/igt@kms_content_protection@uevent.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_content_protection@uevent.html
* igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
- shard-bmg: [SKIP][108] ([Intel XE#2312]) -> [SKIP][109] ([Intel XE#2311]) +17 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][110] ([Intel XE#2311]) -> [SKIP][111] ([Intel XE#2312]) +19 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][112] ([Intel XE#2312]) -> [SKIP][113] ([Intel XE#4141]) +5 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][114] ([Intel XE#4141]) -> [SKIP][115] ([Intel XE#2312]) +15 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff:
- shard-bmg: [SKIP][116] ([Intel XE#2313]) -> [SKIP][117] ([Intel XE#2312]) +17 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: [SKIP][118] ([Intel XE#2312]) -> [SKIP][119] ([Intel XE#2313]) +20 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: [SKIP][120] ([Intel XE#4596]) -> [SKIP][121] ([Intel XE#5021])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-y.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][122] ([Intel XE#2426]) -> [SKIP][123] ([Intel XE#2509])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
- shard-dg2-set2: [SKIP][124] ([Intel XE#1500]) -> [SKIP][125] ([Intel XE#362])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd/shard-dg2-435/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4741
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5308
[Intel XE#5376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5376
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
Build changes
-------------
* Linux: xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd -> xe-pw-151047v1
IGT_8432: 4871829d8b7117553eb2dc1bdb9a0d18de428a98 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3333-149b15e02e6496a37621cd5bf8a28f7d8c1869cd: 149b15e02e6496a37621cd5bf8a28f7d8c1869cd
xe-pw-151047v1: 151047v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151047v1/index.html
[-- Attachment #2: Type: text/html, Size: 39907 bytes --]
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Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-07-02 4:27 [PATCH] drm/i915/display: Add upper limit check for pixel clock Chaitanya Kumar Borah
2025-07-02 7:36 ` ✓ CI.KUnit: success for " Patchwork
2025-07-02 8:14 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-02 8:31 ` [PATCH] " Jani Nikula
2025-07-02 9:42 ` Borah, Chaitanya Kumar
2025-07-02 19:24 ` Ville Syrjälä
2025-07-03 6:33 ` Nautiyal, Ankit K
2025-07-03 21:58 ` ✓ Xe.CI.Full: success for " Patchwork
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