* [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET
@ 2025-07-08 21:23 Imre Deak
2025-07-08 21:55 ` Cavitt, Jonathan
` (5 more replies)
0 siblings, 6 replies; 13+ messages in thread
From: Imre Deak @ 2025-07-08 21:23 UTC (permalink / raw)
To: intel-gfx, intel-xe, dri-devel
Cc: Ville Syrjälä, Jani Nikula, Paul Menzel
Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from
DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for
DPCD probing, since this results in link training failures at least when
using an Intel Barlow Ridge TBT hub at UHBR link rates (the
DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed
link training). Since accessing DPCD_REV during link training is
prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead,
as it falls within the Standard's valid register address range
(0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link
training on the above TBT hub.
However, reading the LANE0_1_STATUS register also has a side-effect at
least on a Novatek eDP panel, as reported on the Closes: link below,
resulting in screen flickering on that panel. One clear side-effect when
doing the 1-byte probe reads from LANE0_1_STATUS during link training
before reading out the full 6 byte link status starting at the same
address is that the panel will report the link training as completed
with voltage swing 0. This is different from the normal, flicker-free
scenario when no DPCD probing is done, the panel reporting the link
training complete with voltage swing 2.
Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have
the above side-effect, the panel will link train with voltage swing 2 as
expected and it will stay flicker-free. This register is also in the
above valid register range and is unlikely to have a side-effect as that
of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training
CR/EQ sequences and so it may cause a state change in the sink - even if
inadvertently as I suspect in the case of the above Novatek panel. As
opposed to this, reading TRAINING_PATTERN_SET is not part of the link
training sequence (it must be only written once at the beginning of the
CR/EQ sequences), so it's unlikely to cause any state change in the
sink.
As a side-note, this Novatek panel also lacks support for TPS3, while
claiming support for HBR2, which violates the DP Standard (the Standard
mandating TPS3 for HBR2).
Besides the Novatek panel (PSR 1), which this change fixes, I also
verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP
panel as well as on the Intel Barlow Ridge TBT hub.
Note that in the drm-tip tree (targeting the v6.17 kernel version) the
i915 and xe drivers keep DPCD probing enabled only for the panel known
to require this (HP ZR24w), hence those drivers in drm-tip are not
affected by the above problem.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS")
Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de>
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/display/drm_dp_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c
index 1c3920297906b..1ecc3df7e3167 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
int ret;
if (dpcd_access_needs_probe(aux)) {
- ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS);
+ ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET);
if (ret < 0)
return ret;
}
--
2.44.2
^ permalink raw reply related [flat|nested] 13+ messages in thread* RE: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-08 21:23 [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET Imre Deak @ 2025-07-08 21:55 ` Cavitt, Jonathan 2025-07-09 11:32 ` Imre Deak 2025-07-08 21:58 ` ✓ CI.KUnit: success for " Patchwork ` (4 subsequent siblings) 5 siblings, 1 reply; 13+ messages in thread From: Cavitt, Jonathan @ 2025-07-08 21:55 UTC (permalink / raw) To: Deak, Imre, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Ville Syrjälä, Jani Nikula, Paul Menzel, Cavitt, Jonathan -----Original Message----- From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre Deak Sent: Tuesday, July 8, 2025 2:24 PM To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>; Jani Nikula <jani.nikula@linux.intel.com>; Paul Menzel <pmenzel@molgen.mpg.de> Subject: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET > > Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from > DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for > DPCD probing, since this results in link training failures at least when > using an Intel Barlow Ridge TBT hub at UHBR link rates (the > DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed > link training). Since accessing DPCD_REV during link training is > prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, > as it falls within the Standard's valid register address range > (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link > training on the above TBT hub. > > However, reading the LANE0_1_STATUS register also has a side-effect at > least on a Novatek eDP panel, as reported on the Closes: link below, > resulting in screen flickering on that panel. One clear side-effect when > doing the 1-byte probe reads from LANE0_1_STATUS during link training > before reading out the full 6 byte link status starting at the same > address is that the panel will report the link training as completed > with voltage swing 0. This is different from the normal, flicker-free > scenario when no DPCD probing is done, the panel reporting the link > training complete with voltage swing 2. > > Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have > the above side-effect, the panel will link train with voltage swing 2 as > expected and it will stay flicker-free. This register is also in the > above valid register range and is unlikely to have a side-effect as that > of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training > CR/EQ sequences and so it may cause a state change in the sink - even if > inadvertently as I suspect in the case of the above Novatek panel. As > opposed to this, reading TRAINING_PATTERN_SET is not part of the link > training sequence (it must be only written once at the beginning of the > CR/EQ sequences), so it's unlikely to cause any state change in the > sink. > > As a side-note, this Novatek panel also lacks support for TPS3, while > claiming support for HBR2, which violates the DP Standard (the Standard > mandating TPS3 for HBR2). > > Besides the Novatek panel (PSR 1), which this change fixes, I also > verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP > panel as well as on the Intel Barlow Ridge TBT hub. > > Note that in the drm-tip tree (targeting the v6.17 kernel version) the > i915 and xe drivers keep DPCD probing enabled only for the panel known > to require this (HP ZR24w), hence those drivers in drm-tip are not > affected by the above problem. > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") > Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 > Signed-off-by: Imre Deak <imre.deak@intel.com> Some uses of the first person in the commit message could maybe be revised to speak more generally, but I'm not going to make that a requirement. As is, this patch is: Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> -Jonathan Cavitt > --- > drivers/gpu/drm/display/drm_dp_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > index 1c3920297906b..1ecc3df7e3167 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, > int ret; > > if (dpcd_access_needs_probe(aux)) { > - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); > + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); > if (ret < 0) > return ret; > } > -- > 2.44.2 > > ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-08 21:55 ` Cavitt, Jonathan @ 2025-07-09 11:32 ` Imre Deak 0 siblings, 0 replies; 13+ messages in thread From: Imre Deak @ 2025-07-09 11:32 UTC (permalink / raw) To: Jonathan Cavitt Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel, Ville Syrjälä, Jani Nikula, Paul Menzel On Wed, Jul 09, 2025 at 12:55:16AM +0300, Jonathan Cavitt wrote: > -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre Deak > Sent: Tuesday, July 8, 2025 2:24 PM > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>; Jani Nikula <jani.nikula@linux.intel.com>; Paul Menzel <pmenzel@molgen.mpg.de> > Subject: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET > > > > Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from > > DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for > > DPCD probing, since this results in link training failures at least when > > using an Intel Barlow Ridge TBT hub at UHBR link rates (the > > DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed > > link training). Since accessing DPCD_REV during link training is > > prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, > > as it falls within the Standard's valid register address range > > (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link > > training on the above TBT hub. > > > > However, reading the LANE0_1_STATUS register also has a side-effect at > > least on a Novatek eDP panel, as reported on the Closes: link below, > > resulting in screen flickering on that panel. One clear side-effect when > > doing the 1-byte probe reads from LANE0_1_STATUS during link training > > before reading out the full 6 byte link status starting at the same > > address is that the panel will report the link training as completed > > with voltage swing 0. This is different from the normal, flicker-free > > scenario when no DPCD probing is done, the panel reporting the link > > training complete with voltage swing 2. > > > > Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have > > the above side-effect, the panel will link train with voltage swing 2 as > > expected and it will stay flicker-free. This register is also in the > > above valid register range and is unlikely to have a side-effect as that > > of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training > > CR/EQ sequences and so it may cause a state change in the sink - even if > > inadvertently as I suspect in the case of the above Novatek panel. As > > opposed to this, reading TRAINING_PATTERN_SET is not part of the link > > training sequence (it must be only written once at the beginning of the > > CR/EQ sequences), so it's unlikely to cause any state change in the > > sink. > > > > As a side-note, this Novatek panel also lacks support for TPS3, while > > claiming support for HBR2, which violates the DP Standard (the Standard > > mandating TPS3 for HBR2). > > > > Besides the Novatek panel (PSR 1), which this change fixes, I also > > verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP > > panel as well as on the Intel Barlow Ridge TBT hub. > > > > Note that in the drm-tip tree (targeting the v6.17 kernel version) the > > i915 and xe drivers keep DPCD probing enabled only for the panel known > > to require this (HP ZR24w), hence those drivers in drm-tip are not > > affected by the above problem. > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Jani Nikula <jani.nikula@linux.intel.com> > > Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") > > Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> > > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > Some uses of the first person in the commit message could maybe > be revised to speak more generally, Since here the panel's firmware is involved, only the debugging details provide some insight into the possible root causes and choices made for the solution, not sure how else that process could have been described. > but I'm not going to make that a requirement. > > As is, this patch is: > Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Thanks for the review! > -Jonathan Cavitt > > > --- > > drivers/gpu/drm/display/drm_dp_helper.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > > index 1c3920297906b..1ecc3df7e3167 100644 > > --- a/drivers/gpu/drm/display/drm_dp_helper.c > > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > > @@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, > > int ret; > > > > if (dpcd_access_needs_probe(aux)) { > > - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); > > + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); > > if (ret < 0) > > return ret; > > } > > -- > > 2.44.2 > > > > ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-08 21:23 [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET Imre Deak 2025-07-08 21:55 ` Cavitt, Jonathan @ 2025-07-08 21:58 ` Patchwork 2025-07-08 22:35 ` ✓ Xe.CI.BAT: " Patchwork ` (3 subsequent siblings) 5 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2025-07-08 21:58 UTC (permalink / raw) To: Imre Deak; +Cc: intel-xe == Series Details == Series: drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET URL : https://patchwork.freedesktop.org/series/151358/ State : success == Summary == + trap cleanup EXIT + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig [21:57:47] Configuring KUnit Kernel ... Generating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:57:51] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:58:18] Starting KUnit Kernel (1/1)... [21:58:18] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:58:19] ================== guc_buf (11 subtests) =================== [21:58:19] [PASSED] test_smallest [21:58:19] [PASSED] test_largest [21:58:19] [PASSED] test_granular [21:58:19] [PASSED] test_unique [21:58:19] [PASSED] test_overlap [21:58:19] [PASSED] test_reusable [21:58:19] [PASSED] test_too_big [21:58:19] [PASSED] test_flush [21:58:19] [PASSED] test_lookup [21:58:19] [PASSED] test_data [21:58:19] [PASSED] test_class [21:58:19] ===================== [PASSED] guc_buf ===================== [21:58:19] =================== guc_dbm (7 subtests) =================== [21:58:19] [PASSED] test_empty [21:58:19] [PASSED] test_default [21:58:19] ======================== test_size ======================== [21:58:19] [PASSED] 4 [21:58:19] [PASSED] 8 [21:58:19] [PASSED] 32 [21:58:19] [PASSED] 256 [21:58:19] ==================== [PASSED] test_size ==================== [21:58:19] ======================= test_reuse ======================== [21:58:19] [PASSED] 4 [21:58:19] [PASSED] 8 [21:58:19] [PASSED] 32 [21:58:19] [PASSED] 256 [21:58:19] =================== [PASSED] test_reuse ==================== [21:58:19] =================== test_range_overlap ==================== [21:58:19] [PASSED] 4 [21:58:19] [PASSED] 8 [21:58:19] [PASSED] 32 [21:58:19] [PASSED] 256 [21:58:19] =============== [PASSED] test_range_overlap ================ [21:58:19] =================== test_range_compact ==================== [21:58:19] [PASSED] 4 [21:58:19] [PASSED] 8 [21:58:19] [PASSED] 32 [21:58:19] [PASSED] 256 [21:58:19] =============== [PASSED] test_range_compact ================ [21:58:19] ==================== test_range_spare ===================== [21:58:19] [PASSED] 4 [21:58:19] [PASSED] 8 [21:58:19] [PASSED] 32 [21:58:19] [PASSED] 256 [21:58:19] ================ [PASSED] test_range_spare ================= [21:58:19] ===================== [PASSED] guc_dbm ===================== [21:58:19] =================== guc_idm (6 subtests) =================== [21:58:19] [PASSED] bad_init [21:58:19] [PASSED] no_init [21:58:19] [PASSED] init_fini [21:58:19] [PASSED] check_used [21:58:19] [PASSED] check_quota [21:58:19] [PASSED] check_all [21:58:19] ===================== [PASSED] guc_idm ===================== [21:58:19] ================== no_relay (3 subtests) =================== [21:58:19] [PASSED] xe_drops_guc2pf_if_not_ready [21:58:19] [PASSED] xe_drops_guc2vf_if_not_ready [21:58:19] [PASSED] xe_rejects_send_if_not_ready [21:58:19] ==================== [PASSED] no_relay ===================== [21:58:19] ================== pf_relay (14 subtests) ================== [21:58:19] [PASSED] pf_rejects_guc2pf_too_short [21:58:19] [PASSED] pf_rejects_guc2pf_too_long [21:58:19] [PASSED] pf_rejects_guc2pf_no_payload [21:58:19] [PASSED] pf_fails_no_payload [21:58:19] [PASSED] pf_fails_bad_origin [21:58:19] [PASSED] pf_fails_bad_type [21:58:19] [PASSED] pf_txn_reports_error [21:58:19] [PASSED] pf_txn_sends_pf2guc [21:58:19] [PASSED] pf_sends_pf2guc [21:58:19] [SKIPPED] pf_loopback_nop [21:58:19] [SKIPPED] pf_loopback_echo [21:58:19] [SKIPPED] pf_loopback_fail [21:58:19] [SKIPPED] pf_loopback_busy [21:58:19] [SKIPPED] pf_loopback_retry [21:58:19] ==================== [PASSED] pf_relay ===================== [21:58:19] ================== vf_relay (3 subtests) =================== [21:58:19] [PASSED] vf_rejects_guc2vf_too_short [21:58:19] [PASSED] vf_rejects_guc2vf_too_long [21:58:19] [PASSED] vf_rejects_guc2vf_no_payload [21:58:19] ==================== [PASSED] vf_relay ===================== [21:58:19] ================= pf_service (11 subtests) ================= [21:58:19] [PASSED] pf_negotiate_any [21:58:19] [PASSED] pf_negotiate_base_match [21:58:19] [PASSED] pf_negotiate_base_newer [21:58:19] [PASSED] pf_negotiate_base_next [21:58:19] [SKIPPED] pf_negotiate_base_older [21:58:19] [PASSED] pf_negotiate_base_prev [21:58:19] [PASSED] pf_negotiate_latest_match [21:58:19] [PASSED] pf_negotiate_latest_newer [21:58:19] [PASSED] pf_negotiate_latest_next [21:58:19] [SKIPPED] pf_negotiate_latest_older [21:58:19] [SKIPPED] pf_negotiate_latest_prev [21:58:19] =================== [PASSED] pf_service ==================== [21:58:19] ===================== lmtt (1 subtest) ===================== [21:58:19] ======================== test_ops ========================= [21:58:19] [PASSED] 2-level [21:58:19] [PASSED] multi-level [21:58:19] ==================== [PASSED] test_ops ===================== [21:58:19] ====================== [PASSED] lmtt ======================= [21:58:19] =================== xe_mocs (2 subtests) =================== [21:58:19] ================ xe_live_mocs_kernel_kunit ================ [21:58:19] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============ [21:58:19] ================ xe_live_mocs_reset_kunit ================= [21:58:19] ============ [SKIPPED] xe_live_mocs_reset_kunit ============ [21:58:19] ==================== [SKIPPED] xe_mocs ===================== [21:58:19] ================= xe_migrate (2 subtests) ================== [21:58:19] ================= xe_migrate_sanity_kunit ================= [21:58:19] ============ [SKIPPED] xe_migrate_sanity_kunit ============= [21:58:19] ================== xe_validate_ccs_kunit ================== [21:58:19] ============= [SKIPPED] xe_validate_ccs_kunit ============== [21:58:19] =================== [SKIPPED] xe_migrate =================== [21:58:19] ================== xe_dma_buf (1 subtest) ================== [21:58:19] ==================== xe_dma_buf_kunit ===================== [21:58:19] ================ [SKIPPED] xe_dma_buf_kunit ================ [21:58:19] =================== [SKIPPED] xe_dma_buf =================== [21:58:19] ================= xe_bo_shrink (1 subtest) ================= [21:58:19] =================== xe_bo_shrink_kunit ==================== [21:58:19] =============== [SKIPPED] xe_bo_shrink_kunit =============== [21:58:19] ================== [SKIPPED] xe_bo_shrink ================== [21:58:19] ==================== xe_bo (2 subtests) ==================== [21:58:19] ================== xe_ccs_migrate_kunit =================== [21:58:19] ============== [SKIPPED] xe_ccs_migrate_kunit ============== [21:58:19] ==================== xe_bo_evict_kunit ==================== [21:58:19] =============== [SKIPPED] xe_bo_evict_kunit ================ [21:58:19] ===================== [SKIPPED] xe_bo ====================== [21:58:19] ==================== args (11 subtests) ==================== [21:58:19] [PASSED] count_args_test [21:58:19] [PASSED] call_args_example [21:58:19] [PASSED] call_args_test [21:58:19] [PASSED] drop_first_arg_example [21:58:19] [PASSED] drop_first_arg_test [21:58:19] [PASSED] first_arg_example [21:58:19] [PASSED] first_arg_test [21:58:19] [PASSED] last_arg_example [21:58:19] [PASSED] last_arg_test [21:58:19] [PASSED] pick_arg_example [21:58:19] [PASSED] sep_comma_example [21:58:19] ====================== [PASSED] args ======================= [21:58:19] =================== xe_pci (3 subtests) ==================== [21:58:19] ==================== check_graphics_ip ==================== [21:58:19] [PASSED] 12.70 Xe_LPG [21:58:19] [PASSED] 12.71 Xe_LPG [21:58:19] [PASSED] 12.74 Xe_LPG+ [21:58:19] [PASSED] 20.01 Xe2_HPG [21:58:19] [PASSED] 20.02 Xe2_HPG [21:58:19] [PASSED] 20.04 Xe2_LPG [21:58:19] [PASSED] 30.00 Xe3_LPG [21:58:19] [PASSED] 30.01 Xe3_LPG [21:58:19] [PASSED] 30.03 Xe3_LPG [21:58:19] ================ [PASSED] check_graphics_ip ================ [21:58:19] ===================== check_media_ip ====================== [21:58:19] [PASSED] 13.00 Xe_LPM+ [21:58:19] [PASSED] 13.01 Xe2_HPM [21:58:19] [PASSED] 20.00 Xe2_LPM [21:58:19] [PASSED] 30.00 Xe3_LPM [21:58:19] [PASSED] 30.02 Xe3_LPM [21:58:19] ================= [PASSED] check_media_ip ================== [21:58:19] ================= check_platform_gt_count ================= [21:58:19] [PASSED] 0x9A60 (TIGERLAKE) [21:58:19] [PASSED] 0x9A68 (TIGERLAKE) [21:58:19] [PASSED] 0x9A70 (TIGERLAKE) [21:58:19] [PASSED] 0x9A40 (TIGERLAKE) [21:58:19] [PASSED] 0x9A49 (TIGERLAKE) [21:58:19] [PASSED] 0x9A59 (TIGERLAKE) [21:58:19] [PASSED] 0x9A78 (TIGERLAKE) [21:58:19] [PASSED] 0x9AC0 (TIGERLAKE) [21:58:19] [PASSED] 0x9AC9 (TIGERLAKE) [21:58:19] [PASSED] 0x9AD9 (TIGERLAKE) [21:58:19] [PASSED] 0x9AF8 (TIGERLAKE) [21:58:19] [PASSED] 0x4C80 (ROCKETLAKE) [21:58:19] [PASSED] 0x4C8A (ROCKETLAKE) [21:58:19] [PASSED] 0x4C8B (ROCKETLAKE) [21:58:19] [PASSED] 0x4C8C (ROCKETLAKE) [21:58:19] [PASSED] 0x4C90 (ROCKETLAKE) [21:58:19] [PASSED] 0x4C9A (ROCKETLAKE) [21:58:19] [PASSED] 0x4680 (ALDERLAKE_S) [21:58:19] [PASSED] 0x4682 (ALDERLAKE_S) [21:58:19] [PASSED] 0x4688 (ALDERLAKE_S) [21:58:19] [PASSED] 0x468A (ALDERLAKE_S) [21:58:19] [PASSED] 0x468B (ALDERLAKE_S) [21:58:19] [PASSED] 0x4690 (ALDERLAKE_S) [21:58:19] [PASSED] 0x4692 (ALDERLAKE_S) [21:58:19] [PASSED] 0x4693 (ALDERLAKE_S) [21:58:19] [PASSED] 0x46A0 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46A1 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46A2 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46A3 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46A6 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46A8 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46AA (ALDERLAKE_P) [21:58:19] [PASSED] 0x462A (ALDERLAKE_P) [21:58:19] [PASSED] 0x4626 (ALDERLAKE_P) [21:58:19] [PASSED] 0x4628 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46B0 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46B1 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46B2 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46B3 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46C0 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46C1 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46C2 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46C3 (ALDERLAKE_P) [21:58:19] [PASSED] 0x46D0 (ALDERLAKE_N) [21:58:19] [PASSED] 0x46D1 (ALDERLAKE_N) [21:58:19] [PASSED] 0x46D2 (ALDERLAKE_N) [21:58:19] [PASSED] 0x46D3 (ALDERLAKE_N) [21:58:19] [PASSED] 0x46D4 (ALDERLAKE_N) [21:58:19] [PASSED] 0xA721 (ALDERLAKE_P) [21:58:19] [PASSED] 0xA7A1 (ALDERLAKE_P) [21:58:19] [PASSED] 0xA7A9 (ALDERLAKE_P) [21:58:19] [PASSED] 0xA7AC (ALDERLAKE_P) [21:58:19] [PASSED] 0xA7AD (ALDERLAKE_P) [21:58:19] [PASSED] 0xA720 (ALDERLAKE_P) [21:58:19] [PASSED] 0xA7A0 (ALDERLAKE_P) [21:58:19] [PASSED] 0xA7A8 (ALDERLAKE_P) [21:58:19] [PASSED] 0xA7AA (ALDERLAKE_P) [21:58:19] [PASSED] 0xA7AB (ALDERLAKE_P) [21:58:19] [PASSED] 0xA780 (ALDERLAKE_S) [21:58:19] [PASSED] 0xA781 (ALDERLAKE_S) [21:58:19] [PASSED] 0xA782 (ALDERLAKE_S) [21:58:19] [PASSED] 0xA783 (ALDERLAKE_S) [21:58:19] [PASSED] 0xA788 (ALDERLAKE_S) [21:58:19] [PASSED] 0xA789 (ALDERLAKE_S) [21:58:19] [PASSED] 0xA78A (ALDERLAKE_S) [21:58:19] [PASSED] 0xA78B (ALDERLAKE_S) [21:58:19] [PASSED] 0x4905 (DG1) [21:58:19] [PASSED] 0x4906 (DG1) [21:58:19] [PASSED] 0x4907 (DG1) [21:58:19] [PASSED] 0x4908 (DG1) [21:58:19] [PASSED] 0x4909 (DG1) [21:58:19] [PASSED] 0x56C0 (DG2) [21:58:19] [PASSED] 0x56C2 (DG2) [21:58:19] [PASSED] 0x56C1 (DG2) [21:58:19] [PASSED] 0x7D51 (METEORLAKE) [21:58:19] [PASSED] 0x7DD1 (METEORLAKE) [21:58:19] [PASSED] 0x7D41 (METEORLAKE) [21:58:19] [PASSED] 0x7D67 (METEORLAKE) [21:58:19] [PASSED] 0xB640 (METEORLAKE) [21:58:19] [PASSED] 0x56A0 (DG2) [21:58:19] [PASSED] 0x56A1 (DG2) [21:58:19] [PASSED] 0x56A2 (DG2) [21:58:19] [PASSED] 0x56BE (DG2) [21:58:19] [PASSED] 0x56BF (DG2) [21:58:19] [PASSED] 0x5690 (DG2) [21:58:19] [PASSED] 0x5691 (DG2) [21:58:19] [PASSED] 0x5692 (DG2) [21:58:19] [PASSED] 0x56A5 (DG2) [21:58:19] [PASSED] 0x56A6 (DG2) [21:58:19] [PASSED] 0x56B0 (DG2) [21:58:19] [PASSED] 0x56B1 (DG2) [21:58:19] [PASSED] 0x56BA (DG2) [21:58:19] [PASSED] 0x56BB (DG2) [21:58:19] [PASSED] 0x56BC (DG2) [21:58:19] [PASSED] 0x56BD (DG2) [21:58:19] [PASSED] 0x5693 (DG2) [21:58:19] [PASSED] 0x5694 (DG2) [21:58:19] [PASSED] 0x5695 (DG2) [21:58:19] [PASSED] 0x56A3 (DG2) [21:58:19] [PASSED] 0x56A4 (DG2) [21:58:19] [PASSED] 0x56B2 (DG2) [21:58:19] [PASSED] 0x56B3 (DG2) [21:58:19] [PASSED] 0x5696 (DG2) [21:58:19] [PASSED] 0x5697 (DG2) [21:58:19] [PASSED] 0xB69 (PVC) [21:58:19] [PASSED] 0xB6E (PVC) [21:58:19] [PASSED] 0xBD4 (PVC) [21:58:19] [PASSED] 0xBD5 (PVC) [21:58:19] [PASSED] 0xBD6 (PVC) [21:58:19] [PASSED] 0xBD7 (PVC) [21:58:19] [PASSED] 0xBD8 (PVC) [21:58:19] [PASSED] 0xBD9 (PVC) [21:58:19] [PASSED] 0xBDA (PVC) [21:58:19] [PASSED] 0xBDB (PVC) [21:58:19] [PASSED] 0xBE0 (PVC) [21:58:19] [PASSED] 0xBE1 (PVC) [21:58:19] [PASSED] 0xBE5 (PVC) [21:58:19] [PASSED] 0x7D40 (METEORLAKE) [21:58:19] [PASSED] 0x7D45 (METEORLAKE) [21:58:19] [PASSED] 0x7D55 (METEORLAKE) [21:58:19] [PASSED] 0x7D60 (METEORLAKE) [21:58:19] [PASSED] 0x7DD5 (METEORLAKE) [21:58:19] [PASSED] 0x6420 (LUNARLAKE) [21:58:19] [PASSED] 0x64A0 (LUNARLAKE) [21:58:19] [PASSED] 0x64B0 (LUNARLAKE) [21:58:19] [PASSED] 0xE202 (BATTLEMAGE) [21:58:19] [PASSED] 0xE209 (BATTLEMAGE) [21:58:19] [PASSED] 0xE20B (BATTLEMAGE) [21:58:19] [PASSED] 0xE20C (BATTLEMAGE) [21:58:19] [PASSED] 0xE20D (BATTLEMAGE) [21:58:19] [PASSED] 0xE210 (BATTLEMAGE) [21:58:19] [PASSED] 0xE211 (BATTLEMAGE) [21:58:19] [PASSED] 0xE212 (BATTLEMAGE) [21:58:19] [PASSED] 0xE216 (BATTLEMAGE) [21:58:19] [PASSED] 0xE220 (BATTLEMAGE) [21:58:19] [PASSED] 0xE221 (BATTLEMAGE) [21:58:19] [PASSED] 0xE222 (BATTLEMAGE) [21:58:19] [PASSED] 0xE223 (BATTLEMAGE) [21:58:19] [PASSED] 0xB080 (PANTHERLAKE) [21:58:19] [PASSED] 0xB081 (PANTHERLAKE) [21:58:19] [PASSED] 0xB082 (PANTHERLAKE) [21:58:19] [PASSED] 0xB083 (PANTHERLAKE) [21:58:19] [PASSED] 0xB084 (PANTHERLAKE) [21:58:19] [PASSED] 0xB085 (PANTHERLAKE) [21:58:19] [PASSED] 0xB086 (PANTHERLAKE) [21:58:19] [PASSED] 0xB087 (PANTHERLAKE) [21:58:19] [PASSED] 0xB08F (PANTHERLAKE) [21:58:19] [PASSED] 0xB090 (PANTHERLAKE) [21:58:19] [PASSED] 0xB0A0 (PANTHERLAKE) [21:58:19] [PASSED] 0xB0B0 (PANTHERLAKE) [21:58:19] [PASSED] 0xFD80 (PANTHERLAKE) [21:58:19] [PASSED] 0xFD81 (PANTHERLAKE) [21:58:19] ============= [PASSED] check_platform_gt_count ============= [21:58:19] ===================== [PASSED] xe_pci ====================== [21:58:19] =================== xe_rtp (2 subtests) ==================== [21:58:19] =============== xe_rtp_process_to_sr_tests ================ [21:58:19] [PASSED] coalesce-same-reg [21:58:19] [PASSED] no-match-no-add [21:58:19] [PASSED] match-or [21:58:19] [PASSED] match-or-xfail [21:58:19] [PASSED] no-match-no-add-multiple-rules [21:58:19] [PASSED] two-regs-two-entries [21:58:19] [PASSED] clr-one-set-other [21:58:19] [PASSED] set-field [21:58:19] [PASSED] conflict-duplicate [21:58:19] [PASSED] conflict-not-disjoint [21:58:19] [PASSED] conflict-reg-type [21:58:19] =========== [PASSED] xe_rtp_process_to_sr_tests ============ [21:58:19] ================== xe_rtp_process_tests =================== [21:58:19] [PASSED] active1 [21:58:19] [PASSED] active2 [21:58:19] [PASSED] active-inactive [21:58:19] [PASSED] inactive-active [21:58:19] [PASSED] inactive-1st_or_active-inactive [21:58:19] [PASSED] inactive-2nd_or_active-inactive [21:58:19] [PASSED] inactive-last_or_active-inactive [21:58:19] [PASSED] inactive-no_or_active-inactive [21:58:19] ============== [PASSED] xe_rtp_process_tests =============== [21:58:19] ===================== [PASSED] xe_rtp ====================== [21:58:19] ==================== xe_wa (1 subtest) ===================== [21:58:19] ======================== xe_wa_gt ========================= [21:58:19] [PASSED] TIGERLAKE (B0) [21:58:19] [PASSED] DG1 (A0) [21:58:19] [PASSED] DG1 (B0) [21:58:19] [PASSED] ALDERLAKE_S (A0) [21:58:19] [PASSED] ALDERLAKE_S (B0) [21:58:19] [PASSED] ALDERLAKE_S (C0) [21:58:19] [PASSED] ALDERLAKE_S (D0) [21:58:19] [PASSED] ALDERLAKE_P (A0) [21:58:19] [PASSED] ALDERLAKE_P (B0) [21:58:19] [PASSED] ALDERLAKE_P (C0) [21:58:19] [PASSED] ALDERLAKE_S_RPLS (D0) [21:58:19] [PASSED] ALDERLAKE_P_RPLU (E0) [21:58:19] [PASSED] DG2_G10 (C0) [21:58:19] [PASSED] DG2_G11 (B1) [21:58:19] [PASSED] DG2_G12 (A1) [21:58:19] [PASSED] METEORLAKE (g:A0, m:A0) [21:58:19] [PASSED] METEORLAKE (g:A0, m:A0) [21:58:19] [PASSED] METEORLAKE (g:A0, m:A0) [21:58:19] [PASSED] LUNARLAKE (g:A0, m:A0) [21:58:19] [PASSED] LUNARLAKE (g:B0, m:A0) stty: 'standard input': Inappropriate ioctl for device [21:58:19] [PASSED] BATTLEMAGE (g:A0, m:A1) [21:58:19] ==================== [PASSED] xe_wa_gt ===================== [21:58:19] ====================== [PASSED] xe_wa ====================== [21:58:19] ============================================================ [21:58:19] Testing complete. Ran 297 tests: passed: 281, skipped: 16 [21:58:19] Elapsed time: 31.318s total, 4.127s configuring, 26.874s building, 0.260s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig [21:58:19] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:58:20] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:58:42] Starting KUnit Kernel (1/1)... [21:58:42] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:58:42] == drm_test_atomic_get_connector_for_encoder (1 subtest) === [21:58:42] [PASSED] drm_test_drm_atomic_get_connector_for_encoder [21:58:42] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ==== [21:58:42] =========== drm_validate_clone_mode (2 subtests) =========== [21:58:42] ============== drm_test_check_in_clone_mode =============== [21:58:42] [PASSED] in_clone_mode [21:58:42] [PASSED] not_in_clone_mode [21:58:42] ========== [PASSED] drm_test_check_in_clone_mode =========== [21:58:42] =============== drm_test_check_valid_clones =============== [21:58:42] [PASSED] not_in_clone_mode [21:58:42] [PASSED] valid_clone [21:58:42] [PASSED] invalid_clone [21:58:42] =========== [PASSED] drm_test_check_valid_clones =========== [21:58:42] ============= [PASSED] drm_validate_clone_mode ============= [21:58:42] ============= drm_validate_modeset (1 subtest) ============= [21:58:42] [PASSED] drm_test_check_connector_changed_modeset [21:58:42] ============== [PASSED] drm_validate_modeset =============== [21:58:42] ====== drm_test_bridge_get_current_state (2 subtests) ====== [21:58:42] [PASSED] drm_test_drm_bridge_get_current_state_atomic [21:58:42] [PASSED] drm_test_drm_bridge_get_current_state_legacy [21:58:42] ======== [PASSED] drm_test_bridge_get_current_state ======== [21:58:42] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ====== [21:58:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic [21:58:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled [21:58:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy [21:58:42] ======== [PASSED] drm_test_bridge_helper_reset_crtc ======== [21:58:42] ============== drm_bridge_alloc (2 subtests) =============== [21:58:42] [PASSED] drm_test_drm_bridge_alloc_basic [21:58:42] [PASSED] drm_test_drm_bridge_alloc_get_put [21:58:42] ================ [PASSED] drm_bridge_alloc ================= [21:58:42] ================== drm_buddy (7 subtests) ================== [21:58:42] [PASSED] drm_test_buddy_alloc_limit [21:58:42] [PASSED] drm_test_buddy_alloc_optimistic [21:58:42] [PASSED] drm_test_buddy_alloc_pessimistic [21:58:42] [PASSED] drm_test_buddy_alloc_pathological [21:58:42] [PASSED] drm_test_buddy_alloc_contiguous [21:58:42] [PASSED] drm_test_buddy_alloc_clear [21:58:42] [PASSED] drm_test_buddy_alloc_range_bias [21:58:42] ==================== [PASSED] drm_buddy ==================== [21:58:42] ============= drm_cmdline_parser (40 subtests) ============= [21:58:42] [PASSED] drm_test_cmdline_force_d_only [21:58:42] [PASSED] drm_test_cmdline_force_D_only_dvi [21:58:42] [PASSED] drm_test_cmdline_force_D_only_hdmi [21:58:42] [PASSED] drm_test_cmdline_force_D_only_not_digital [21:58:42] [PASSED] drm_test_cmdline_force_e_only [21:58:42] [PASSED] drm_test_cmdline_res [21:58:42] [PASSED] drm_test_cmdline_res_vesa [21:58:42] [PASSED] drm_test_cmdline_res_vesa_rblank [21:58:42] [PASSED] drm_test_cmdline_res_rblank [21:58:42] [PASSED] drm_test_cmdline_res_bpp [21:58:42] [PASSED] drm_test_cmdline_res_refresh [21:58:42] [PASSED] drm_test_cmdline_res_bpp_refresh [21:58:42] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced [21:58:42] [PASSED] drm_test_cmdline_res_bpp_refresh_margins [21:58:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off [21:58:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on [21:58:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog [21:58:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital [21:58:42] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on [21:58:42] [PASSED] drm_test_cmdline_res_margins_force_on [21:58:42] [PASSED] drm_test_cmdline_res_vesa_margins [21:58:42] [PASSED] drm_test_cmdline_name [21:58:42] [PASSED] drm_test_cmdline_name_bpp [21:58:42] [PASSED] drm_test_cmdline_name_option [21:58:42] [PASSED] drm_test_cmdline_name_bpp_option [21:58:42] [PASSED] drm_test_cmdline_rotate_0 [21:58:42] [PASSED] drm_test_cmdline_rotate_90 [21:58:42] [PASSED] drm_test_cmdline_rotate_180 [21:58:42] [PASSED] drm_test_cmdline_rotate_270 [21:58:42] [PASSED] drm_test_cmdline_hmirror [21:58:42] [PASSED] drm_test_cmdline_vmirror [21:58:42] [PASSED] drm_test_cmdline_margin_options [21:58:42] [PASSED] drm_test_cmdline_multiple_options [21:58:42] [PASSED] drm_test_cmdline_bpp_extra_and_option [21:58:42] [PASSED] drm_test_cmdline_extra_and_option [21:58:42] [PASSED] drm_test_cmdline_freestanding_options [21:58:42] [PASSED] drm_test_cmdline_freestanding_force_e_and_options [21:58:42] [PASSED] drm_test_cmdline_panel_orientation [21:58:42] ================ drm_test_cmdline_invalid ================= [21:58:42] [PASSED] margin_only [21:58:42] [PASSED] interlace_only [21:58:42] [PASSED] res_missing_x [21:58:42] [PASSED] res_missing_y [21:58:42] [PASSED] res_bad_y [21:58:42] [PASSED] res_missing_y_bpp [21:58:42] [PASSED] res_bad_bpp [21:58:42] [PASSED] res_bad_refresh [21:58:42] [PASSED] res_bpp_refresh_force_on_off [21:58:42] [PASSED] res_invalid_mode [21:58:42] [PASSED] res_bpp_wrong_place_mode [21:58:42] [PASSED] name_bpp_refresh [21:58:42] [PASSED] name_refresh [21:58:42] [PASSED] name_refresh_wrong_mode [21:58:42] [PASSED] name_refresh_invalid_mode [21:58:42] [PASSED] rotate_multiple [21:58:42] [PASSED] rotate_invalid_val [21:58:42] [PASSED] rotate_truncated [21:58:42] [PASSED] invalid_option [21:58:42] [PASSED] invalid_tv_option [21:58:42] [PASSED] truncated_tv_option [21:58:42] ============ [PASSED] drm_test_cmdline_invalid ============= [21:58:42] =============== drm_test_cmdline_tv_options =============== [21:58:42] [PASSED] NTSC [21:58:42] [PASSED] NTSC_443 [21:58:42] [PASSED] NTSC_J [21:58:42] [PASSED] PAL [21:58:42] [PASSED] PAL_M [21:58:42] [PASSED] PAL_N [21:58:42] [PASSED] SECAM [21:58:42] [PASSED] MONO_525 [21:58:42] [PASSED] MONO_625 [21:58:42] =========== [PASSED] drm_test_cmdline_tv_options =========== [21:58:42] =============== [PASSED] drm_cmdline_parser ================ [21:58:42] ========== drmm_connector_hdmi_init (20 subtests) ========== [21:58:42] [PASSED] drm_test_connector_hdmi_init_valid [21:58:42] [PASSED] drm_test_connector_hdmi_init_bpc_8 [21:58:42] [PASSED] drm_test_connector_hdmi_init_bpc_10 [21:58:42] [PASSED] drm_test_connector_hdmi_init_bpc_12 [21:58:42] [PASSED] drm_test_connector_hdmi_init_bpc_invalid [21:58:42] [PASSED] drm_test_connector_hdmi_init_bpc_null [21:58:42] [PASSED] drm_test_connector_hdmi_init_formats_empty [21:58:42] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb [21:58:42] === drm_test_connector_hdmi_init_formats_yuv420_allowed === [21:58:42] [PASSED] supported_formats=0x9 yuv420_allowed=1 [21:58:42] [PASSED] supported_formats=0x9 yuv420_allowed=0 [21:58:42] [PASSED] supported_formats=0x3 yuv420_allowed=1 [21:58:42] [PASSED] supported_formats=0x3 yuv420_allowed=0 [21:58:42] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed === [21:58:42] [PASSED] drm_test_connector_hdmi_init_null_ddc [21:58:42] [PASSED] drm_test_connector_hdmi_init_null_product [21:58:42] [PASSED] drm_test_connector_hdmi_init_null_vendor [21:58:42] [PASSED] drm_test_connector_hdmi_init_product_length_exact [21:58:42] [PASSED] drm_test_connector_hdmi_init_product_length_too_long [21:58:42] [PASSED] drm_test_connector_hdmi_init_product_valid [21:58:42] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact [21:58:42] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long [21:58:42] [PASSED] drm_test_connector_hdmi_init_vendor_valid [21:58:42] ========= drm_test_connector_hdmi_init_type_valid ========= [21:58:42] [PASSED] HDMI-A [21:58:42] [PASSED] HDMI-B [21:58:42] ===== [PASSED] drm_test_connector_hdmi_init_type_valid ===== [21:58:42] ======== drm_test_connector_hdmi_init_type_invalid ======== [21:58:42] [PASSED] Unknown [21:58:42] [PASSED] VGA [21:58:42] [PASSED] DVI-I [21:58:42] [PASSED] DVI-D [21:58:42] [PASSED] DVI-A [21:58:42] [PASSED] Composite [21:58:42] [PASSED] SVIDEO [21:58:42] [PASSED] LVDS [21:58:42] [PASSED] Component [21:58:42] [PASSED] DIN [21:58:42] [PASSED] DP [21:58:42] [PASSED] TV [21:58:42] [PASSED] eDP [21:58:42] [PASSED] Virtual [21:58:42] [PASSED] DSI [21:58:42] [PASSED] DPI [21:58:42] [PASSED] Writeback [21:58:42] [PASSED] SPI [21:58:42] [PASSED] USB [21:58:42] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ==== [21:58:42] ============ [PASSED] drmm_connector_hdmi_init ============= [21:58:42] ============= drmm_connector_init (3 subtests) ============= [21:58:42] [PASSED] drm_test_drmm_connector_init [21:58:42] [PASSED] drm_test_drmm_connector_init_null_ddc [21:58:42] ========= drm_test_drmm_connector_init_type_valid ========= [21:58:42] [PASSED] Unknown [21:58:42] [PASSED] VGA [21:58:42] [PASSED] DVI-I [21:58:42] [PASSED] DVI-D [21:58:42] [PASSED] DVI-A [21:58:42] [PASSED] Composite [21:58:42] [PASSED] SVIDEO [21:58:42] [PASSED] LVDS [21:58:42] [PASSED] Component [21:58:42] [PASSED] DIN [21:58:42] [PASSED] DP [21:58:42] [PASSED] HDMI-A [21:58:42] [PASSED] HDMI-B [21:58:42] [PASSED] TV [21:58:42] [PASSED] eDP [21:58:42] [PASSED] Virtual [21:58:42] [PASSED] DSI [21:58:42] [PASSED] DPI [21:58:42] [PASSED] Writeback [21:58:42] [PASSED] SPI [21:58:42] [PASSED] USB [21:58:42] ===== [PASSED] drm_test_drmm_connector_init_type_valid ===== [21:58:42] =============== [PASSED] drmm_connector_init =============== [21:58:42] ========= drm_connector_dynamic_init (6 subtests) ========== [21:58:42] [PASSED] drm_test_drm_connector_dynamic_init [21:58:42] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc [21:58:42] [PASSED] drm_test_drm_connector_dynamic_init_not_added [21:58:42] [PASSED] drm_test_drm_connector_dynamic_init_properties [21:58:42] ===== drm_test_drm_connector_dynamic_init_type_valid ====== [21:58:42] [PASSED] Unknown [21:58:42] [PASSED] VGA [21:58:42] [PASSED] DVI-I [21:58:42] [PASSED] DVI-D [21:58:42] [PASSED] DVI-A [21:58:42] [PASSED] Composite [21:58:42] [PASSED] SVIDEO [21:58:42] [PASSED] LVDS [21:58:42] [PASSED] Component [21:58:42] [PASSED] DIN [21:58:42] [PASSED] DP [21:58:42] [PASSED] HDMI-A [21:58:42] [PASSED] HDMI-B [21:58:42] [PASSED] TV [21:58:42] [PASSED] eDP [21:58:42] [PASSED] Virtual [21:58:42] [PASSED] DSI [21:58:42] [PASSED] DPI [21:58:42] [PASSED] Writeback [21:58:42] [PASSED] SPI [21:58:42] [PASSED] USB [21:58:42] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid == [21:58:42] ======== drm_test_drm_connector_dynamic_init_name ========= [21:58:42] [PASSED] Unknown [21:58:42] [PASSED] VGA [21:58:42] [PASSED] DVI-I [21:58:42] [PASSED] DVI-D [21:58:42] [PASSED] DVI-A [21:58:42] [PASSED] Composite [21:58:42] [PASSED] SVIDEO [21:58:42] [PASSED] LVDS [21:58:42] [PASSED] Component [21:58:42] [PASSED] DIN [21:58:42] [PASSED] DP [21:58:42] [PASSED] HDMI-A [21:58:42] [PASSED] HDMI-B [21:58:42] [PASSED] TV [21:58:42] [PASSED] eDP [21:58:42] [PASSED] Virtual [21:58:42] [PASSED] DSI [21:58:42] [PASSED] DPI [21:58:42] [PASSED] Writeback [21:58:42] [PASSED] SPI [21:58:42] [PASSED] USB [21:58:42] ==== [PASSED] drm_test_drm_connector_dynamic_init_name ===== [21:58:42] =========== [PASSED] drm_connector_dynamic_init ============ [21:58:42] ==== drm_connector_dynamic_register_early (4 subtests) ===== [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_early_defer [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object [21:58:42] ====== [PASSED] drm_connector_dynamic_register_early ======= [21:58:42] ======= drm_connector_dynamic_register (7 subtests) ======== [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_on_list [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_no_defer [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_no_init [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_mode_object [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_sysfs [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name [21:58:42] [PASSED] drm_test_drm_connector_dynamic_register_debugfs [21:58:42] ========= [PASSED] drm_connector_dynamic_register ========== [21:58:42] = drm_connector_attach_broadcast_rgb_property (2 subtests) = [21:58:42] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property [21:58:42] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector [21:58:42] === [PASSED] drm_connector_attach_broadcast_rgb_property === [21:58:42] ========== drm_get_tv_mode_from_name (2 subtests) ========== [21:58:42] ========== drm_test_get_tv_mode_from_name_valid =========== [21:58:42] [PASSED] NTSC [21:58:42] [PASSED] NTSC-443 [21:58:42] [PASSED] NTSC-J [21:58:42] [PASSED] PAL [21:58:42] [PASSED] PAL-M [21:58:42] [PASSED] PAL-N [21:58:42] [PASSED] SECAM [21:58:42] [PASSED] Mono [21:58:42] ====== [PASSED] drm_test_get_tv_mode_from_name_valid ======= [21:58:42] [PASSED] drm_test_get_tv_mode_from_name_truncated [21:58:42] ============ [PASSED] drm_get_tv_mode_from_name ============ [21:58:42] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) = [21:58:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb [21:58:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc [21:58:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1 [21:58:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc [21:58:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1 [21:58:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double [21:58:42] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid = [21:58:42] [PASSED] VIC 96 [21:58:42] [PASSED] VIC 97 [21:58:42] [PASSED] VIC 101 [21:58:42] [PASSED] VIC 102 [21:58:42] [PASSED] VIC 106 [21:58:42] [PASSED] VIC 107 [21:58:42] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid === [21:58:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc [21:58:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc [21:58:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc [21:58:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc [21:58:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc [21:58:42] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ==== [21:58:42] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) == [21:58:42] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ==== [21:58:42] [PASSED] Automatic [21:58:42] [PASSED] Full [21:58:42] [PASSED] Limited 16:235 [21:58:42] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name === [21:58:42] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid [21:58:42] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ==== [21:58:42] == drm_hdmi_connector_get_output_format_name (2 subtests) == [21:58:42] === drm_test_drm_hdmi_connector_get_output_format_name ==== [21:58:42] [PASSED] RGB [21:58:42] [PASSED] YUV 4:2:0 [21:58:42] [PASSED] YUV 4:2:2 [21:58:42] [PASSED] YUV 4:4:4 [21:58:42] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name === [21:58:42] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid [21:58:42] ==== [PASSED] drm_hdmi_connector_get_output_format_name ==== [21:58:42] ============= drm_damage_helper (21 subtests) ============== [21:58:42] [PASSED] drm_test_damage_iter_no_damage [21:58:42] [PASSED] drm_test_damage_iter_no_damage_fractional_src [21:58:42] [PASSED] drm_test_damage_iter_no_damage_src_moved [21:58:42] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved [21:58:42] [PASSED] drm_test_damage_iter_no_damage_not_visible [21:58:42] [PASSED] drm_test_damage_iter_no_damage_no_crtc [21:58:42] [PASSED] drm_test_damage_iter_no_damage_no_fb [21:58:42] [PASSED] drm_test_damage_iter_simple_damage [21:58:42] [PASSED] drm_test_damage_iter_single_damage [21:58:42] [PASSED] drm_test_damage_iter_single_damage_intersect_src [21:58:42] [PASSED] drm_test_damage_iter_single_damage_outside_src [21:58:42] [PASSED] drm_test_damage_iter_single_damage_fractional_src [21:58:42] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src [21:58:42] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src [21:58:42] [PASSED] drm_test_damage_iter_single_damage_src_moved [21:58:42] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved [21:58:42] [PASSED] drm_test_damage_iter_damage [21:58:42] [PASSED] drm_test_damage_iter_damage_one_intersect [21:58:42] [PASSED] drm_test_damage_iter_damage_one_outside [21:58:42] [PASSED] drm_test_damage_iter_damage_src_moved [21:58:42] [PASSED] drm_test_damage_iter_damage_not_visible [21:58:42] ================ [PASSED] drm_damage_helper ================ [21:58:42] ============== drm_dp_mst_helper (3 subtests) ============== [21:58:42] ============== drm_test_dp_mst_calc_pbn_mode ============== [21:58:42] [PASSED] Clock 154000 BPP 30 DSC disabled [21:58:42] [PASSED] Clock 234000 BPP 30 DSC disabled [21:58:42] [PASSED] Clock 297000 BPP 24 DSC disabled [21:58:42] [PASSED] Clock 332880 BPP 24 DSC enabled [21:58:42] [PASSED] Clock 324540 BPP 24 DSC enabled [21:58:42] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ========== [21:58:42] ============== drm_test_dp_mst_calc_pbn_div =============== [21:58:42] [PASSED] Link rate 2000000 lane count 4 [21:58:42] [PASSED] Link rate 2000000 lane count 2 [21:58:42] [PASSED] Link rate 2000000 lane count 1 [21:58:42] [PASSED] Link rate 1350000 lane count 4 [21:58:42] [PASSED] Link rate 1350000 lane count 2 [21:58:42] [PASSED] Link rate 1350000 lane count 1 [21:58:42] [PASSED] Link rate 1000000 lane count 4 [21:58:42] [PASSED] Link rate 1000000 lane count 2 [21:58:42] [PASSED] Link rate 1000000 lane count 1 [21:58:42] [PASSED] Link rate 810000 lane count 4 [21:58:42] [PASSED] Link rate 810000 lane count 2 [21:58:42] [PASSED] Link rate 810000 lane count 1 [21:58:42] [PASSED] Link rate 540000 lane count 4 [21:58:42] [PASSED] Link rate 540000 lane count 2 [21:58:42] [PASSED] Link rate 540000 lane count 1 [21:58:42] [PASSED] Link rate 270000 lane count 4 [21:58:42] [PASSED] Link rate 270000 lane count 2 [21:58:42] [PASSED] Link rate 270000 lane count 1 [21:58:42] [PASSED] Link rate 162000 lane count 4 [21:58:42] [PASSED] Link rate 162000 lane count 2 [21:58:42] [PASSED] Link rate 162000 lane count 1 [21:58:42] ========== [PASSED] drm_test_dp_mst_calc_pbn_div =========== [21:58:42] ========= drm_test_dp_mst_sideband_msg_req_decode ========= [21:58:42] [PASSED] DP_ENUM_PATH_RESOURCES with port number [21:58:42] [PASSED] DP_POWER_UP_PHY with port number [21:58:42] [PASSED] DP_POWER_DOWN_PHY with port number [21:58:42] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks [21:58:42] [PASSED] DP_ALLOCATE_PAYLOAD with port number [21:58:42] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI [21:58:42] [PASSED] DP_ALLOCATE_PAYLOAD with PBN [21:58:42] [PASSED] DP_QUERY_PAYLOAD with port number [21:58:42] [PASSED] DP_QUERY_PAYLOAD with VCPI [21:58:42] [PASSED] DP_REMOTE_DPCD_READ with port number [21:58:42] [PASSED] DP_REMOTE_DPCD_READ with DPCD address [21:58:42] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes [21:58:42] [PASSED] DP_REMOTE_DPCD_WRITE with port number [21:58:42] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address [21:58:42] [PASSED] DP_REMOTE_DPCD_WRITE with data array [21:58:42] [PASSED] DP_REMOTE_I2C_READ with port number [21:58:42] [PASSED] DP_REMOTE_I2C_READ with I2C device ID [21:58:42] [PASSED] DP_REMOTE_I2C_READ with transactions array [21:58:42] [PASSED] DP_REMOTE_I2C_WRITE with port number [21:58:42] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID [21:58:42] [PASSED] DP_REMOTE_I2C_WRITE with data array [21:58:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID [21:58:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID [21:58:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event [21:58:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event [21:58:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior [21:58:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior [21:58:42] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode ===== [21:58:42] ================ [PASSED] drm_dp_mst_helper ================ [21:58:42] ================== drm_exec (7 subtests) =================== [21:58:42] [PASSED] sanitycheck [21:58:42] [PASSED] test_lock [21:58:42] [PASSED] test_lock_unlock [21:58:42] [PASSED] test_duplicates [21:58:42] [PASSED] test_prepare [21:58:42] [PASSED] test_prepare_array [21:58:42] [PASSED] test_multiple_loops [21:58:42] ==================== [PASSED] drm_exec ===================== [21:58:42] =========== drm_format_helper_test (17 subtests) =========== [21:58:42] ============== drm_test_fb_xrgb8888_to_gray8 ============== [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ========== [21:58:42] ============= drm_test_fb_xrgb8888_to_rgb332 ============== [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ========== [21:58:42] ============= drm_test_fb_xrgb8888_to_rgb565 ============== [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ========== [21:58:42] ============ drm_test_fb_xrgb8888_to_xrgb1555 ============= [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 ========= [21:58:42] ============ drm_test_fb_xrgb8888_to_argb1555 ============= [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 ========= [21:58:42] ============ drm_test_fb_xrgb8888_to_rgba5551 ============= [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 ========= [21:58:42] ============= drm_test_fb_xrgb8888_to_rgb888 ============== [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ========== [21:58:42] ============= drm_test_fb_xrgb8888_to_bgr888 ============== [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ========== [21:58:42] ============ drm_test_fb_xrgb8888_to_argb8888 ============= [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 ========= [21:58:42] =========== drm_test_fb_xrgb8888_to_xrgb2101010 =========== [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 ======= [21:58:42] =========== drm_test_fb_xrgb8888_to_argb2101010 =========== [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 ======= [21:58:42] ============== drm_test_fb_xrgb8888_to_mono =============== [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ========== [PASSED] drm_test_fb_xrgb8888_to_mono =========== [21:58:42] ==================== drm_test_fb_swab ===================== [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ================ [PASSED] drm_test_fb_swab ================= [21:58:42] ============ drm_test_fb_xrgb8888_to_xbgr8888 ============= [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 ========= [21:58:42] ============ drm_test_fb_xrgb8888_to_abgr8888 ============= [21:58:42] [PASSED] single_pixel_source_buffer [21:58:42] [PASSED] single_pixel_clip_rectangle [21:58:42] [PASSED] well_known_colors [21:58:42] [PASSED] destination_pitch [21:58:42] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 ========= [21:58:42] ================= drm_test_fb_clip_offset ================= [21:58:42] [PASSED] pass through [21:58:42] [PASSED] horizontal offset [21:58:42] [PASSED] vertical offset [21:58:42] [PASSED] horizontal and vertical offset [21:58:42] [PASSED] horizontal offset (custom pitch) [21:58:42] [PASSED] vertical offset (custom pitch) [21:58:42] [PASSED] horizontal and vertical offset (custom pitch) [21:58:42] ============= [PASSED] drm_test_fb_clip_offset ============= [21:58:42] =================== drm_test_fb_memcpy ==================== [21:58:42] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258) [21:58:42] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258) [21:58:42] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559) [21:58:42] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258) [21:58:42] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258) [21:58:42] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559) [21:58:42] [PASSED] well_known_colors: XB24 little-endian (0x34324258) [21:58:42] [PASSED] well_known_colors: XRA8 little-endian (0x38415258) [21:58:42] [PASSED] well_known_colors: YU24 little-endian (0x34325559) [21:58:42] [PASSED] destination_pitch: XB24 little-endian (0x34324258) [21:58:42] [PASSED] destination_pitch: XRA8 little-endian (0x38415258) [21:58:42] [PASSED] destination_pitch: YU24 little-endian (0x34325559) [21:58:42] =============== [PASSED] drm_test_fb_memcpy ================ [21:58:42] ============= [PASSED] drm_format_helper_test ============== [21:58:42] ================= drm_format (18 subtests) ================= [21:58:42] [PASSED] drm_test_format_block_width_invalid [21:58:42] [PASSED] drm_test_format_block_width_one_plane [21:58:42] [PASSED] drm_test_format_block_width_two_plane [21:58:42] [PASSED] drm_test_format_block_width_three_plane [21:58:42] [PASSED] drm_test_format_block_width_tiled [21:58:42] [PASSED] drm_test_format_block_height_invalid [21:58:42] [PASSED] drm_test_format_block_height_one_plane [21:58:42] [PASSED] drm_test_format_block_height_two_plane [21:58:42] [PASSED] drm_test_format_block_height_three_plane [21:58:42] [PASSED] drm_test_format_block_height_tiled [21:58:42] [PASSED] drm_test_format_min_pitch_invalid [21:58:42] [PASSED] drm_test_format_min_pitch_one_plane_8bpp [21:58:42] [PASSED] drm_test_format_min_pitch_one_plane_16bpp [21:58:42] [PASSED] drm_test_format_min_pitch_one_plane_24bpp [21:58:42] [PASSED] drm_test_format_min_pitch_one_plane_32bpp [21:58:42] [PASSED] drm_test_format_min_pitch_two_plane [21:58:42] [PASSED] drm_test_format_min_pitch_three_plane_8bpp [21:58:42] [PASSED] drm_test_format_min_pitch_tiled [21:58:42] =================== [PASSED] drm_format ==================== [21:58:42] ============== drm_framebuffer (10 subtests) =============== [21:58:42] ========== drm_test_framebuffer_check_src_coords ========== [21:58:42] [PASSED] Success: source fits into fb [21:58:42] [PASSED] Fail: overflowing fb with x-axis coordinate [21:58:42] [PASSED] Fail: overflowing fb with y-axis coordinate [21:58:42] [PASSED] Fail: overflowing fb with source width [21:58:42] [PASSED] Fail: overflowing fb with source height [21:58:42] ====== [PASSED] drm_test_framebuffer_check_src_coords ====== [21:58:42] [PASSED] drm_test_framebuffer_cleanup [21:58:42] =============== drm_test_framebuffer_create =============== [21:58:42] [PASSED] ABGR8888 normal sizes [21:58:42] [PASSED] ABGR8888 max sizes [21:58:42] [PASSED] ABGR8888 pitch greater than min required [21:58:42] [PASSED] ABGR8888 pitch less than min required [21:58:42] [PASSED] ABGR8888 Invalid width [21:58:42] [PASSED] ABGR8888 Invalid buffer handle [21:58:42] [PASSED] No pixel format [21:58:42] [PASSED] ABGR8888 Width 0 [21:58:42] [PASSED] ABGR8888 Height 0 [21:58:42] [PASSED] ABGR8888 Out of bound height * pitch combination [21:58:42] [PASSED] ABGR8888 Large buffer offset [21:58:42] [PASSED] ABGR8888 Buffer offset for inexistent plane [21:58:42] [PASSED] ABGR8888 Invalid flag [21:58:42] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers [21:58:42] [PASSED] ABGR8888 Valid buffer modifier [21:58:42] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) [21:58:42] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS [21:58:42] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS [21:58:42] [PASSED] NV12 Normal sizes [21:58:42] [PASSED] NV12 Max sizes [21:58:42] [PASSED] NV12 Invalid pitch [21:58:42] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag [21:58:42] [PASSED] NV12 different modifier per-plane [21:58:42] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE [21:58:42] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS [21:58:42] [PASSED] NV12 Modifier for inexistent plane [21:58:42] [PASSED] NV12 Handle for inexistent plane [21:58:42] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS [21:58:42] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier [21:58:42] [PASSED] YVU420 Normal sizes [21:58:42] [PASSED] YVU420 Max sizes [21:58:42] [PASSED] YVU420 Invalid pitch [21:58:42] [PASSED] YVU420 Different pitches [21:58:42] [PASSED] YVU420 Different buffer offsets/pitches [21:58:42] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS [21:58:42] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS [21:58:42] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS [21:58:42] [PASSED] YVU420 Valid modifier [21:58:42] [PASSED] YVU420 Different modifiers per plane [21:58:42] [PASSED] YVU420 Modifier for inexistent plane [21:58:42] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR) [21:58:42] [PASSED] X0L2 Normal sizes [21:58:42] [PASSED] X0L2 Max sizes [21:58:42] [PASSED] X0L2 Invalid pitch [21:58:42] [PASSED] X0L2 Pitch greater than minimum required [21:58:42] [PASSED] X0L2 Handle for inexistent plane [21:58:42] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set [21:58:42] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set [21:58:42] [PASSED] X0L2 Valid modifier [21:58:42] [PASSED] X0L2 Modifier for inexistent plane [21:58:42] =========== [PASSED] drm_test_framebuffer_create =========== [21:58:42] [PASSED] drm_test_framebuffer_free [21:58:42] [PASSED] drm_test_framebuffer_init [21:58:42] [PASSED] drm_test_framebuffer_init_bad_format [21:58:42] [PASSED] drm_test_framebuffer_init_dev_mismatch [21:58:42] [PASSED] drm_test_framebuffer_lookup [21:58:42] [PASSED] drm_test_framebuffer_lookup_inexistent [21:58:42] [PASSED] drm_test_framebuffer_modifiers_not_supported [21:58:42] ================= [PASSED] drm_framebuffer ================= [21:58:42] ================ drm_gem_shmem (8 subtests) ================ [21:58:42] [PASSED] drm_gem_shmem_test_obj_create [21:58:42] [PASSED] drm_gem_shmem_test_obj_create_private [21:58:42] [PASSED] drm_gem_shmem_test_pin_pages [21:58:42] [PASSED] drm_gem_shmem_test_vmap [21:58:42] [PASSED] drm_gem_shmem_test_get_pages_sgt [21:58:42] [PASSED] drm_gem_shmem_test_get_sg_table [21:58:42] [PASSED] drm_gem_shmem_test_madvise [21:58:42] [PASSED] drm_gem_shmem_test_purge [21:58:42] ================== [PASSED] drm_gem_shmem ================== [21:58:42] === drm_atomic_helper_connector_hdmi_check (27 subtests) === [21:58:42] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode [21:58:42] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1 [21:58:42] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode [21:58:42] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1 [21:58:42] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode [21:58:42] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1 [21:58:42] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 ======= [21:58:42] [PASSED] Automatic [21:58:42] [PASSED] Full [21:58:42] [PASSED] Limited 16:235 [21:58:42] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 === [21:58:42] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed [21:58:42] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed [21:58:42] [PASSED] drm_test_check_disable_connector [21:58:42] [PASSED] drm_test_check_hdmi_funcs_reject_rate [21:58:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb [21:58:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420 [21:58:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422 [21:58:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420 [21:58:42] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420 [21:58:42] [PASSED] drm_test_check_output_bpc_crtc_mode_changed [21:58:42] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed [21:58:42] [PASSED] drm_test_check_output_bpc_dvi [21:58:42] [PASSED] drm_test_check_output_bpc_format_vic_1 [21:58:42] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only [21:58:42] [PASSED] drm_test_check_output_bpc_format_display_rgb_only [21:58:42] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only [21:58:42] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only [21:58:42] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc [21:58:42] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc [21:58:42] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc [21:58:42] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ====== [21:58:42] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ==== [21:58:42] [PASSED] drm_test_check_broadcast_rgb_value [21:58:42] [PASSED] drm_test_check_bpc_8_value [21:58:42] [PASSED] drm_test_check_bpc_10_value [21:58:42] [PASSED] drm_test_check_bpc_12_value [21:58:42] [PASSED] drm_test_check_format_value [21:58:42] [PASSED] drm_test_check_tmds_char_value [21:58:42] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ====== [21:58:42] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) = [21:58:42] [PASSED] drm_test_check_mode_valid [21:58:42] [PASSED] drm_test_check_mode_valid_reject [21:58:42] [PASSED] drm_test_check_mode_valid_reject_rate [21:58:42] [PASSED] drm_test_check_mode_valid_reject_max_clock [21:58:42] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid === [21:58:42] ================= drm_managed (2 subtests) ================= [21:58:42] [PASSED] drm_test_managed_release_action [21:58:42] [PASSED] drm_test_managed_run_action [21:58:42] =================== [PASSED] drm_managed =================== [21:58:42] =================== drm_mm (6 subtests) ==================== [21:58:42] [PASSED] drm_test_mm_init [21:58:42] [PASSED] drm_test_mm_debug [21:58:42] [PASSED] drm_test_mm_align32 [21:58:42] [PASSED] drm_test_mm_align64 [21:58:42] [PASSED] drm_test_mm_lowest [21:58:42] [PASSED] drm_test_mm_highest [21:58:42] ===================== [PASSED] drm_mm ====================== [21:58:42] ============= drm_modes_analog_tv (5 subtests) ============= [21:58:42] [PASSED] drm_test_modes_analog_tv_mono_576i [21:58:42] [PASSED] drm_test_modes_analog_tv_ntsc_480i [21:58:42] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined [21:58:42] [PASSED] drm_test_modes_analog_tv_pal_576i [21:58:42] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined [21:58:42] =============== [PASSED] drm_modes_analog_tv =============== [21:58:42] ============== drm_plane_helper (2 subtests) =============== [21:58:42] =============== drm_test_check_plane_state ================ [21:58:42] [PASSED] clipping_simple [21:58:42] [PASSED] clipping_rotate_reflect [21:58:42] [PASSED] positioning_simple [21:58:42] [PASSED] upscaling [21:58:42] [PASSED] downscaling [21:58:42] [PASSED] rounding1 [21:58:42] [PASSED] rounding2 [21:58:42] [PASSED] rounding3 [21:58:42] [PASSED] rounding4 [21:58:42] =========== [PASSED] drm_test_check_plane_state ============ [21:58:42] =========== drm_test_check_invalid_plane_state ============ [21:58:42] [PASSED] positioning_invalid [21:58:42] [PASSED] upscaling_invalid [21:58:42] [PASSED] downscaling_invalid [21:58:42] ======= [PASSED] drm_test_check_invalid_plane_state ======== [21:58:42] ================ [PASSED] drm_plane_helper ================= [21:58:42] ====== drm_connector_helper_tv_get_modes (1 subtest) ======= [21:58:42] ====== drm_test_connector_helper_tv_get_modes_check ======= [21:58:42] [PASSED] None [21:58:42] [PASSED] PAL [21:58:42] [PASSED] NTSC [21:58:42] [PASSED] Both, NTSC Default [21:58:42] [PASSED] Both, PAL Default [21:58:42] [PASSED] Both, NTSC Default, with PAL on command-line [21:58:42] [PASSED] Both, PAL Default, with NTSC on command-line [21:58:42] == [PASSED] drm_test_connector_helper_tv_get_modes_check === [21:58:42] ======== [PASSED] drm_connector_helper_tv_get_modes ======== [21:58:42] ================== drm_rect (9 subtests) =================== [21:58:42] [PASSED] drm_test_rect_clip_scaled_div_by_zero [21:58:42] [PASSED] drm_test_rect_clip_scaled_not_clipped [21:58:42] [PASSED] drm_test_rect_clip_scaled_clipped [21:58:42] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned [21:58:42] ================= drm_test_rect_intersect ================= [21:58:42] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0 [21:58:42] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1 [21:58:42] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0 [21:58:42] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1 [21:58:42] [PASSED] right x left: 2x1+0+0 x 3x1+1+0 [21:58:42] [PASSED] left x right: 3x1+1+0 x 2x1+0+0 [21:58:42] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1 [21:58:42] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0 [21:58:42] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1 [21:58:42] [PASSED] touching side: 1x1+0+0 x 1x1+1+0 [21:58:42] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0 [21:58:42] [PASSED] inside another: 2x2+0+0 x 1x1+1+1 [21:58:42] [PASSED] far away: 1x1+0+0 x 1x1+3+6 [21:58:42] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10 [21:58:42] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10 [21:58:42] ============= [PASSED] drm_test_rect_intersect ============= [21:58:42] ================ drm_test_rect_calc_hscale ================ [21:58:42] [PASSED] normal use [21:58:42] [PASSED] out of max range [21:58:42] [PASSED] out of min range [21:58:42] [PASSED] zero dst [21:58:42] [PASSED] negative src [21:58:42] [PASSED] negative dst [21:58:42] ============ [PASSED] drm_test_rect_calc_hscale ============ [21:58:42] ================ drm_test_rect_calc_vscale ================ [21:58:42] [PASSED] normal use [21:58:42] [PASSED] out of max range [21:58:42] [PASSED] out of min range [21:58:42] [PASSED] zero dst [21:58:42] [PASSED] negative src [21:58:42] [PASSED] negative dst [21:58:42] ============ [PASSED] drm_test_rect_calc_vscale ============ [21:58:42] ================== drm_test_rect_rotate =================== [21:58:42] [PASSED] reflect-x [21:58:42] [PASSED] reflect-y [21:58:42] [PASSED] rotate-0 [21:58:42] [PASSED] rotate-90 [21:58:42] [PASSED] rotate-180 [21:58:42] [PASSED] rotate-270 stty: 'standard input': Inappropriate ioctl for device [21:58:42] ============== [PASSED] drm_test_rect_rotate =============== [21:58:42] ================ drm_test_rect_rotate_inv ================= [21:58:42] [PASSED] reflect-x [21:58:42] [PASSED] reflect-y [21:58:42] [PASSED] rotate-0 [21:58:42] [PASSED] rotate-90 [21:58:42] [PASSED] rotate-180 [21:58:42] [PASSED] rotate-270 [21:58:42] ============ [PASSED] drm_test_rect_rotate_inv ============= [21:58:42] ==================== [PASSED] drm_rect ===================== [21:58:42] ============ drm_sysfb_modeset_test (1 subtest) ============ [21:58:42] ============ drm_test_sysfb_build_fourcc_list ============= [21:58:42] [PASSED] no native formats [21:58:42] [PASSED] XRGB8888 as native format [21:58:42] [PASSED] remove duplicates [21:58:42] [PASSED] convert alpha formats [21:58:42] [PASSED] random formats [21:58:42] ======== [PASSED] drm_test_sysfb_build_fourcc_list ========= [21:58:42] ============= [PASSED] drm_sysfb_modeset_test ============== [21:58:42] ============================================================ [21:58:42] Testing complete. Ran 616 tests: passed: 616 [21:58:42] Elapsed time: 23.519s total, 1.705s configuring, 21.646s building, 0.148s running + /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig [21:58:42] Configuring KUnit Kernel ... Regenerating .config ... Populating config with: $ make ARCH=um O=.kunit olddefconfig [21:58:44] Building KUnit Kernel ... Populating config with: $ make ARCH=um O=.kunit olddefconfig Building with: $ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48 [21:58:52] Starting KUnit Kernel (1/1)... [21:58:52] ============================================================ Running tests with: $ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt [21:58:52] ================= ttm_device (5 subtests) ================== [21:58:52] [PASSED] ttm_device_init_basic [21:58:52] [PASSED] ttm_device_init_multiple [21:58:52] [PASSED] ttm_device_fini_basic [21:58:52] [PASSED] ttm_device_init_no_vma_man [21:58:52] ================== ttm_device_init_pools ================== [21:58:52] [PASSED] No DMA allocations, no DMA32 required [21:58:52] [PASSED] DMA allocations, DMA32 required [21:58:52] [PASSED] No DMA allocations, DMA32 required [21:58:52] [PASSED] DMA allocations, no DMA32 required [21:58:52] ============== [PASSED] ttm_device_init_pools ============== [21:58:52] =================== [PASSED] ttm_device ==================== [21:58:52] ================== ttm_pool (8 subtests) =================== [21:58:52] ================== ttm_pool_alloc_basic =================== [21:58:52] [PASSED] One page [21:58:52] [PASSED] More than one page [21:58:52] [PASSED] Above the allocation limit [21:58:52] [PASSED] One page, with coherent DMA mappings enabled [21:58:52] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [21:58:52] ============== [PASSED] ttm_pool_alloc_basic =============== [21:58:52] ============== ttm_pool_alloc_basic_dma_addr ============== [21:58:52] [PASSED] One page [21:58:52] [PASSED] More than one page [21:58:52] [PASSED] Above the allocation limit [21:58:52] [PASSED] One page, with coherent DMA mappings enabled [21:58:52] [PASSED] Above the allocation limit, with coherent DMA mappings enabled [21:58:52] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ========== [21:58:52] [PASSED] ttm_pool_alloc_order_caching_match [21:58:52] [PASSED] ttm_pool_alloc_caching_mismatch [21:58:52] [PASSED] ttm_pool_alloc_order_mismatch [21:58:52] [PASSED] ttm_pool_free_dma_alloc [21:58:52] [PASSED] ttm_pool_free_no_dma_alloc [21:58:52] [PASSED] ttm_pool_fini_basic [21:58:52] ==================== [PASSED] ttm_pool ===================== [21:58:52] ================ ttm_resource (8 subtests) ================= [21:58:52] ================= ttm_resource_init_basic ================= [21:58:52] [PASSED] Init resource in TTM_PL_SYSTEM [21:58:52] [PASSED] Init resource in TTM_PL_VRAM [21:58:52] [PASSED] Init resource in a private placement [21:58:52] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags [21:58:52] ============= [PASSED] ttm_resource_init_basic ============= [21:58:52] [PASSED] ttm_resource_init_pinned [21:58:52] [PASSED] ttm_resource_fini_basic [21:58:52] [PASSED] ttm_resource_manager_init_basic [21:58:52] [PASSED] ttm_resource_manager_usage_basic [21:58:52] [PASSED] ttm_resource_manager_set_used_basic [21:58:52] [PASSED] ttm_sys_man_alloc_basic [21:58:52] [PASSED] ttm_sys_man_free_basic [21:58:52] ================== [PASSED] ttm_resource =================== [21:58:52] =================== ttm_tt (15 subtests) =================== [21:58:52] ==================== ttm_tt_init_basic ==================== [21:58:52] [PASSED] Page-aligned size [21:58:52] [PASSED] Extra pages requested [21:58:52] ================ [PASSED] ttm_tt_init_basic ================ [21:58:52] [PASSED] ttm_tt_init_misaligned [21:58:52] [PASSED] ttm_tt_fini_basic [21:58:52] [PASSED] ttm_tt_fini_sg [21:58:52] [PASSED] ttm_tt_fini_shmem [21:58:52] [PASSED] ttm_tt_create_basic [21:58:52] [PASSED] ttm_tt_create_invalid_bo_type [21:58:52] [PASSED] ttm_tt_create_ttm_exists [21:58:52] [PASSED] ttm_tt_create_failed [21:58:52] [PASSED] ttm_tt_destroy_basic [21:58:52] [PASSED] ttm_tt_populate_null_ttm [21:58:52] [PASSED] ttm_tt_populate_populated_ttm [21:58:52] [PASSED] ttm_tt_unpopulate_basic [21:58:52] [PASSED] ttm_tt_unpopulate_empty_ttm [21:58:52] [PASSED] ttm_tt_swapin_basic [21:58:52] ===================== [PASSED] ttm_tt ====================== [21:58:52] =================== ttm_bo (14 subtests) =================== [21:58:52] =========== ttm_bo_reserve_optimistic_no_ticket =========== [21:58:52] [PASSED] Cannot be interrupted and sleeps [21:58:52] [PASSED] Cannot be interrupted, locks straight away [21:58:52] [PASSED] Can be interrupted, sleeps [21:58:52] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket ======= [21:58:52] [PASSED] ttm_bo_reserve_locked_no_sleep [21:58:52] [PASSED] ttm_bo_reserve_no_wait_ticket [21:58:52] [PASSED] ttm_bo_reserve_double_resv [21:58:52] [PASSED] ttm_bo_reserve_interrupted [21:58:52] [PASSED] ttm_bo_reserve_deadlock [21:58:52] [PASSED] ttm_bo_unreserve_basic [21:58:52] [PASSED] ttm_bo_unreserve_pinned [21:58:52] [PASSED] ttm_bo_unreserve_bulk [21:58:52] [PASSED] ttm_bo_put_basic [21:58:52] [PASSED] ttm_bo_put_shared_resv [21:58:52] [PASSED] ttm_bo_pin_basic [21:58:52] [PASSED] ttm_bo_pin_unpin_resource [21:58:52] [PASSED] ttm_bo_multiple_pin_one_unpin [21:58:52] ===================== [PASSED] ttm_bo ====================== [21:58:52] ============== ttm_bo_validate (22 subtests) =============== [21:58:52] ============== ttm_bo_init_reserved_sys_man =============== [21:58:52] [PASSED] Buffer object for userspace [21:58:52] [PASSED] Kernel buffer object [21:58:52] [PASSED] Shared buffer object [21:58:52] ========== [PASSED] ttm_bo_init_reserved_sys_man =========== [21:58:52] ============== ttm_bo_init_reserved_mock_man ============== [21:58:52] [PASSED] Buffer object for userspace [21:58:52] [PASSED] Kernel buffer object [21:58:52] [PASSED] Shared buffer object [21:58:52] ========== [PASSED] ttm_bo_init_reserved_mock_man ========== [21:58:52] [PASSED] ttm_bo_init_reserved_resv [21:58:52] ================== ttm_bo_validate_basic ================== [21:58:52] [PASSED] Buffer object for userspace [21:58:52] [PASSED] Kernel buffer object [21:58:52] [PASSED] Shared buffer object [21:58:52] ============== [PASSED] ttm_bo_validate_basic ============== [21:58:52] [PASSED] ttm_bo_validate_invalid_placement [21:58:52] ============= ttm_bo_validate_same_placement ============== [21:58:52] [PASSED] System manager [21:58:52] [PASSED] VRAM manager [21:58:52] ========= [PASSED] ttm_bo_validate_same_placement ========== [21:58:52] [PASSED] ttm_bo_validate_failed_alloc [21:58:52] [PASSED] ttm_bo_validate_pinned [21:58:52] [PASSED] ttm_bo_validate_busy_placement [21:58:52] ================ ttm_bo_validate_multihop ================= [21:58:52] [PASSED] Buffer object for userspace [21:58:52] [PASSED] Kernel buffer object [21:58:52] [PASSED] Shared buffer object [21:58:52] ============ [PASSED] ttm_bo_validate_multihop ============= [21:58:52] ========== ttm_bo_validate_no_placement_signaled ========== [21:58:52] [PASSED] Buffer object in system domain, no page vector [21:58:52] [PASSED] Buffer object in system domain with an existing page vector [21:58:52] ====== [PASSED] ttm_bo_validate_no_placement_signaled ====== [21:58:52] ======== ttm_bo_validate_no_placement_not_signaled ======== [21:58:52] [PASSED] Buffer object for userspace [21:58:52] [PASSED] Kernel buffer object [21:58:52] [PASSED] Shared buffer object [21:58:52] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ==== [21:58:52] [PASSED] ttm_bo_validate_move_fence_signaled [21:58:52] ========= ttm_bo_validate_move_fence_not_signaled ========= [21:58:52] [PASSED] Waits for GPU [21:58:52] [PASSED] Tries to lock straight away [21:58:52] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled ===== [21:58:52] [PASSED] ttm_bo_validate_swapout [21:58:52] [PASSED] ttm_bo_validate_happy_evict [21:58:52] [PASSED] ttm_bo_validate_all_pinned_evict [21:58:52] [PASSED] ttm_bo_validate_allowed_only_evict [21:58:52] [PASSED] ttm_bo_validate_deleted_evict [21:58:52] [PASSED] ttm_bo_validate_busy_domain_evict [21:58:52] [PASSED] ttm_bo_validate_evict_gutting [21:58:52] [PASSED] ttm_bo_validate_recrusive_evict stty: 'standard input': Inappropriate ioctl for device [21:58:52] ================= [PASSED] ttm_bo_validate ================= [21:58:52] ============================================================ [21:58:52] Testing complete. Ran 102 tests: passed: 102 [21:58:52] Elapsed time: 9.904s total, 1.694s configuring, 7.592s building, 0.521s running + cleanup ++ stat -c %u:%g /kernel + chown -R 1003:1003 /kernel ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.BAT: success for drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-08 21:23 [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET Imre Deak 2025-07-08 21:55 ` Cavitt, Jonathan 2025-07-08 21:58 ` ✓ CI.KUnit: success for " Patchwork @ 2025-07-08 22:35 ` Patchwork 2025-07-09 2:51 ` ✗ Xe.CI.Full: failure " Patchwork ` (2 subsequent siblings) 5 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2025-07-08 22:35 UTC (permalink / raw) To: Imre Deak; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 897 bytes --] == Series Details == Series: drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET URL : https://patchwork.freedesktop.org/series/151358/ State : success == Summary == CI Bug Log - changes from xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb_BAT -> xe-pw-151358v1_BAT ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (9 -> 8) ------------------------------ Missing (1): bat-adlp-vm Changes ------- No changes found Build changes ------------- * Linux: xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb -> xe-pw-151358v1 IGT_8447: 8447 xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb: 8928bbe5e909305341302cbcb5f58cb9eb2dddcb xe-pw-151358v1: 151358v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/index.html [-- Attachment #2: Type: text/html, Size: 1445 bytes --] ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✗ Xe.CI.Full: failure for drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-08 21:23 [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET Imre Deak ` (2 preceding siblings ...) 2025-07-08 22:35 ` ✓ Xe.CI.BAT: " Patchwork @ 2025-07-09 2:51 ` Patchwork 2025-07-09 5:57 ` [PATCH] " Paul Menzel 2025-07-10 11:28 ` Imre Deak 5 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2025-07-09 2:51 UTC (permalink / raw) To: Imre Deak; +Cc: intel-xe [-- Attachment #1: Type: text/plain, Size: 87047 bytes --] == Series Details == Series: drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET URL : https://patchwork.freedesktop.org/series/151358/ State : failure == Summary == CI Bug Log - changes from xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb_FULL -> xe-pw-151358v1_FULL ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with xe-pw-151358v1_FULL absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in xe-pw-151358v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (4 -> 4) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in xe-pw-151358v1_FULL: ### IGT changes ### #### Possible regressions #### * igt@kms_async_flips@test-time-stamp: - shard-dg2-set2: [PASS][1] -> [FAIL][2] +1 other test fail [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_async_flips@test-time-stamp.html [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-464/igt@kms_async_flips@test-time-stamp.html #### Warnings #### * igt@xe_module_load@unload: - shard-dg2-set2: [INCOMPLETE][3] ([Intel XE#4842]) -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@xe_module_load@unload.html [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_module_load@unload.html New tests --------- New tests have been introduced between xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb_FULL and xe-pw-151358v1_FULL: ### New IGT tests (5) ### * igt@kms_flip@blocking-absolute-wf_vblank@d-hdmi-a2: - Statuses : 1 pass(s) - Exec time: [4.04] s * igt@kms_flip@dpms-vs-vblank-race-interruptible@d-hdmi-a2: - Statuses : 1 pass(s) - Exec time: [1.72] s * igt@kms_flip@flip-vs-rmfb@d-hdmi-a2: - Statuses : 1 pass(s) - Exec time: [3.95] s * igt@kms_flip@modeset-vs-vblank-race-interruptible@d-hdmi-a2: - Statuses : 1 pass(s) - Exec time: [1.78] s * igt@xe_oa@mmio-triggered-reports@rcs-0: - Statuses : 1 pass(s) - Exec time: [0.04] s Known issues ------------ Here are the changes found in xe-pw-151358v1_FULL that come from known issues: ### IGT changes ### #### Issues hit #### * igt@core_setmaster@master-drop-set-user: - shard-dg2-set2: [PASS][5] -> [FAIL][6] ([Intel XE#4208]) +1 other test fail [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@core_setmaster@master-drop-set-user.html [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@core_setmaster@master-drop-set-user.html * igt@intel_sysfs_debugfs@xe-base: - shard-dg2-set2: [PASS][7] -> [SKIP][8] ([Intel XE#4208] / [Intel XE#4618]) +1 other test skip [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@intel_sysfs_debugfs@xe-base.html [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@intel_sysfs_debugfs@xe-base.html * igt@kms_big_fb@4-tiled-addfb: - shard-adlp: NOTRUN -> [SKIP][9] ([Intel XE#619]) [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_big_fb@4-tiled-addfb.html * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip: - shard-lnl: NOTRUN -> [SKIP][10] ([Intel XE#3658]) [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@x-tiled-64bpp-rotate-90: - shard-dg2-set2: NOTRUN -> [SKIP][11] ([Intel XE#316]) [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip: - shard-adlp: [PASS][12] -> [DMESG-WARN][13] ([Intel XE#2953] / [Intel XE#4173]) +1 other test dmesg-warn [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html * igt@kms_big_fb@y-tiled-8bpp-rotate-90: - shard-adlp: NOTRUN -> [SKIP][14] ([Intel XE#316]) [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html * igt@kms_big_fb@yf-tiled-16bpp-rotate-270: - shard-adlp: NOTRUN -> [SKIP][15] ([Intel XE#1124]) +2 other tests skip [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html - shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#1124]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html * igt@kms_bw@linear-tiling-4-displays-3840x2160p: - shard-adlp: NOTRUN -> [SKIP][17] ([Intel XE#367]) [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html - shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#1512]) [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs: - shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#2887]) +1 other test skip [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs.html * igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-2: - shard-dg2-set2: NOTRUN -> [SKIP][20] ([Intel XE#455] / [Intel XE#787]) +16 other tests skip [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-2.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs: - shard-adlp: NOTRUN -> [SKIP][21] ([Intel XE#2907]) [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-b-hdmi-a-1: - shard-adlp: NOTRUN -> [SKIP][22] ([Intel XE#787]) +5 other tests skip [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-b-hdmi-a-1.html * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-d-hdmi-a-1: - shard-adlp: NOTRUN -> [SKIP][23] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-d-hdmi-a-1.html * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6: - shard-dg2-set2: NOTRUN -> [SKIP][24] ([Intel XE#787]) +118 other tests skip [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-466/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6: - shard-dg2-set2: [PASS][25] -> [INCOMPLETE][26] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6.html [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6.html * igt@kms_cdclk@mode-transition@pipe-d-dp-4: - shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#4417]) +3 other tests skip [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-466/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html * igt@kms_chamelium_audio@hdmi-audio-edid: - shard-adlp: NOTRUN -> [SKIP][28] ([Intel XE#373]) +1 other test skip [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_chamelium_audio@hdmi-audio-edid.html - shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#373]) +1 other test skip [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_chamelium_audio@hdmi-audio-edid.html * igt@kms_chamelium_edid@hdmi-mode-timings: - shard-dg2-set2: NOTRUN -> [SKIP][30] ([Intel XE#373]) [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_chamelium_edid@hdmi-mode-timings.html * igt@kms_content_protection@atomic-dpms@pipe-a-dp-4: - shard-dg2-set2: NOTRUN -> [FAIL][31] ([Intel XE#1178]) +1 other test fail [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-466/igt@kms_content_protection@atomic-dpms@pipe-a-dp-4.html * igt@kms_cursor_crc@cursor-offscreen-512x170: - shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#2321]) [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_cursor_crc@cursor-offscreen-512x170.html - shard-adlp: NOTRUN -> [SKIP][33] ([Intel XE#308]) [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_cursor_crc@cursor-offscreen-512x170.html * igt@kms_cursor_crc@cursor-random-512x170: - shard-dg2-set2: NOTRUN -> [SKIP][34] ([Intel XE#308]) [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_cursor_crc@cursor-random-512x170.html * igt@kms_cursor_legacy@cursora-vs-flipb-legacy: - shard-bmg: [PASS][35] -> [SKIP][36] ([Intel XE#2291]) +1 other test skip [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-legacy.html * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic: - shard-adlp: NOTRUN -> [SKIP][37] ([Intel XE#309]) [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html - shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#309]) [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size: - shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#323]) [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html - shard-adlp: NOTRUN -> [SKIP][40] ([Intel XE#323]) [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html * igt@kms_display_modes@extended-mode-basic: - shard-adlp: NOTRUN -> [SKIP][41] ([Intel XE#4302]) [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_display_modes@extended-mode-basic.html - shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#4302]) [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_display_modes@extended-mode-basic.html * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible: - shard-adlp: NOTRUN -> [SKIP][43] ([Intel XE#310]) [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html - shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#1421]) [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html * igt@kms_flip@2x-plain-flip: - shard-bmg: [PASS][45] -> [SKIP][46] ([Intel XE#2316]) +2 other tests skip [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-8/igt@kms_flip@2x-plain-flip.html [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-6/igt@kms_flip@2x-plain-flip.html * igt@kms_flip@basic-flip-vs-wf_vblank: - shard-adlp: [PASS][47] -> [DMESG-WARN][48] ([Intel XE#4543]) +4 other tests dmesg-warn [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-adlp-6/igt@kms_flip@basic-flip-vs-wf_vblank.html [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-1/igt@kms_flip@basic-flip-vs-wf_vblank.html * igt@kms_flip@blocking-wf_vblank: - shard-bmg: [PASS][49] -> [FAIL][50] ([Intel XE#5338]) +1 other test fail [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-3/igt@kms_flip@blocking-wf_vblank.html [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-6/igt@kms_flip@blocking-wf_vblank.html * igt@kms_flip@flip-vs-absolute-wf_vblank: - shard-dg2-set2: [PASS][51] -> [SKIP][52] ([Intel XE#4208] / [i915#2575]) +67 other tests skip [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_flip@flip-vs-absolute-wf_vblank.html [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_flip@flip-vs-absolute-wf_vblank.html * igt@kms_flip@flip-vs-expired-vblank: - shard-lnl: NOTRUN -> [FAIL][53] ([Intel XE#301]) [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank.html * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling: - shard-dg2-set2: [PASS][54] -> [SKIP][55] ([Intel XE#4208]) +131 other tests skip [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html * igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling: - shard-dg2-set2: [PASS][56] -> [SKIP][57] ([Intel XE#2351] / [Intel XE#4208]) +5 other tests skip [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling: - shard-dg2-set2: NOTRUN -> [SKIP][58] ([Intel XE#455]) +1 other test skip [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html * igt@kms_force_connector_basic@force-connector-state: - shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#352]) [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_force_connector_basic@force-connector-state.html * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-mmap-wc: - shard-adlp: NOTRUN -> [SKIP][60] ([Intel XE#651]) +1 other test skip [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-mmap-wc.html - shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#651]) +1 other test skip [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt: - shard-adlp: NOTRUN -> [SKIP][62] ([Intel XE#656]) +4 other tests skip [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-blt: - shard-dg2-set2: NOTRUN -> [SKIP][63] ([Intel XE#651]) [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt: - shard-lnl: NOTRUN -> [SKIP][64] ([Intel XE#656]) +4 other tests skip [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@plane-fbc-rte: - shard-dg2-set2: NOTRUN -> [SKIP][65] ([Intel XE#1158]) [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_frontbuffer_tracking@plane-fbc-rte.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt: - shard-adlp: NOTRUN -> [SKIP][66] ([Intel XE#653]) +3 other tests skip [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary: - shard-dg2-set2: NOTRUN -> [SKIP][67] ([Intel XE#653]) [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-shrfb-scaledprimary.html * igt@kms_joiner@invalid-modeset-big-joiner: - shard-adlp: NOTRUN -> [SKIP][68] ([Intel XE#346]) [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_joiner@invalid-modeset-big-joiner.html - shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#346]) [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_joiner@invalid-modeset-big-joiner.html * igt@kms_joiner@invalid-modeset-force-big-joiner: - shard-bmg: [PASS][70] -> [SKIP][71] ([Intel XE#3012]) [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-3/igt@kms_joiner@invalid-modeset-force-big-joiner.html [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html * igt@kms_plane_multiple@2x-tiling-y: - shard-dg2-set2: NOTRUN -> [SKIP][72] ([Intel XE#5021]) [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_plane_multiple@2x-tiling-y.html * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a: - shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#2763]) +7 other tests skip [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a.html * igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area: - shard-adlp: NOTRUN -> [SKIP][74] ([Intel XE#1489]) +1 other test skip [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_psr2_sf@fbc-pr-primary-plane-update-sf-dmg-area.html * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf: - shard-dg2-set2: NOTRUN -> [SKIP][75] ([Intel XE#1489]) [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf: - shard-lnl: NOTRUN -> [SKIP][76] ([Intel XE#2893]) +1 other test skip [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-sf.html * igt@kms_psr@fbc-psr2-suspend: - shard-adlp: NOTRUN -> [SKIP][77] ([Intel XE#2850] / [Intel XE#929]) +1 other test skip [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_psr@fbc-psr2-suspend.html - shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#1406]) [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_psr@fbc-psr2-suspend.html * igt@kms_psr@fbc-psr2-suspend@edp-1: - shard-lnl: NOTRUN -> [SKIP][79] ([Intel XE#4609]) [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@kms_psr@fbc-psr2-suspend@edp-1.html * igt@kms_psr@pr-primary-render: - shard-dg2-set2: NOTRUN -> [SKIP][80] ([Intel XE#2850] / [Intel XE#929]) [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_psr@pr-primary-render.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - shard-dg2-set2: NOTRUN -> [SKIP][81] ([Intel XE#2939]) [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_setmode@basic: - shard-adlp: [PASS][82] -> [FAIL][83] ([Intel XE#2883]) +1 other test fail [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-adlp-2/igt@kms_setmode@basic.html [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-8/igt@kms_setmode@basic.html * igt@kms_setmode@invalid-clone-single-crtc-stealing: - shard-bmg: [PASS][84] -> [SKIP][85] ([Intel XE#1435]) +1 other test skip [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-8/igt@kms_setmode@invalid-clone-single-crtc-stealing.html [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc-stealing.html * igt@xe_compute_preempt@compute-preempt@engine-drm_xe_engine_class_compute: - shard-dg2-set2: NOTRUN -> [SKIP][86] ([Intel XE#1280] / [Intel XE#455]) [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_compute_preempt@compute-preempt@engine-drm_xe_engine_class_compute.html * igt@xe_copy_basic@mem-copy-linear-0x369: - shard-adlp: NOTRUN -> [SKIP][87] ([Intel XE#1123]) [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@xe_copy_basic@mem-copy-linear-0x369.html * igt@xe_copy_basic@mem-set-linear-0xfffe: - shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#1126]) [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@xe_copy_basic@mem-set-linear-0xfffe.html * igt@xe_eudebug@discovery-empty: - shard-adlp: NOTRUN -> [SKIP][89] ([Intel XE#4837]) +1 other test skip [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@xe_eudebug@discovery-empty.html - shard-lnl: NOTRUN -> [SKIP][90] ([Intel XE#4837]) +1 other test skip [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@xe_eudebug@discovery-empty.html * igt@xe_evict@evict-beng-small-multi-vm: - shard-adlp: NOTRUN -> [SKIP][91] ([Intel XE#261] / [Intel XE#688]) [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@xe_evict@evict-beng-small-multi-vm.html - shard-lnl: NOTRUN -> [SKIP][92] ([Intel XE#688]) [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@xe_evict@evict-beng-small-multi-vm.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race: - shard-dg2-set2: NOTRUN -> [SKIP][93] ([Intel XE#1392]) +1 other test skip [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind: - shard-dg2-set2: [PASS][94] -> [SKIP][95] ([Intel XE#1392]) +5 other tests skip [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-434/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html * igt@xe_exec_basic@multigpu-no-exec-userptr-rebind: - shard-adlp: NOTRUN -> [SKIP][96] ([Intel XE#1392]) +1 other test skip [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@xe_exec_basic@multigpu-no-exec-userptr-rebind.html * igt@xe_exec_basic@multigpu-once-userptr: - shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#1392]) +1 other test skip [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@xe_exec_basic@multigpu-once-userptr.html * igt@xe_exec_fault_mode@once-bindexecqueue-userptr-rebind-imm: - shard-dg2-set2: NOTRUN -> [SKIP][98] ([Intel XE#288]) +1 other test skip [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@xe_exec_fault_mode@once-bindexecqueue-userptr-rebind-imm.html * igt@xe_exec_fault_mode@once-userptr-invalidate: - shard-adlp: NOTRUN -> [SKIP][99] ([Intel XE#288]) +3 other tests skip [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@xe_exec_fault_mode@once-userptr-invalidate.html * igt@xe_exec_system_allocator@once-new-nomemset: - shard-dg2-set2: NOTRUN -> [SKIP][100] ([Intel XE#4915]) +15 other tests skip [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@xe_exec_system_allocator@once-new-nomemset.html * igt@xe_exec_system_allocator@process-many-execqueues-mmap-nomemset: - shard-adlp: NOTRUN -> [SKIP][101] ([Intel XE#4915]) +45 other tests skip [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@xe_exec_system_allocator@process-many-execqueues-mmap-nomemset.html * igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-new-huge: - shard-lnl: NOTRUN -> [SKIP][102] ([Intel XE#4943]) +5 other tests skip [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@xe_exec_system_allocator@threads-shared-vm-many-mmap-new-huge.html * igt@xe_oa@invalid-create-userspace-config: - shard-adlp: NOTRUN -> [SKIP][103] ([Intel XE#2541] / [Intel XE#3573]) [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@xe_oa@invalid-create-userspace-config.html * igt@xe_oa@syncs-ufence-wait: - shard-adlp: NOTRUN -> [SKIP][104] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@xe_oa@syncs-ufence-wait.html * igt@xe_peer2peer@read: - shard-adlp: NOTRUN -> [SKIP][105] ([Intel XE#1061]) [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@xe_peer2peer@read.html - shard-lnl: NOTRUN -> [SKIP][106] ([Intel XE#1061]) [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@xe_peer2peer@read.html * igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p: - shard-dg2-set2: NOTRUN -> [FAIL][107] ([Intel XE#1173]) [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p.html * igt@xe_pm@s3-basic: - shard-lnl: NOTRUN -> [SKIP][108] ([Intel XE#584]) [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-7/igt@xe_pm@s3-basic.html * igt@xe_pm@s3-d3hot-basic-exec: - shard-adlp: [PASS][109] -> [DMESG-WARN][110] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#569]) [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-adlp-9/igt@xe_pm@s3-d3hot-basic-exec.html [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-3/igt@xe_pm@s3-d3hot-basic-exec.html * igt@xe_pmu@gt-frequency: - shard-lnl: [PASS][111] -> [FAIL][112] ([Intel XE#4835]) +1 other test fail [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-lnl-5/igt@xe_pmu@gt-frequency.html [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-1/igt@xe_pmu@gt-frequency.html * igt@xe_pxp@pxp-termination-key-update-post-termination-irq: - shard-dg2-set2: NOTRUN -> [SKIP][113] ([Intel XE#4733]) [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html #### Possible fixes #### * igt@fbdev@write: - shard-dg2-set2: [SKIP][114] ([Intel XE#2134]) -> [PASS][115] [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@fbdev@write.html [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-435/igt@fbdev@write.html * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p: - shard-bmg: [SKIP][116] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][117] [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html * igt@kms_cursor_crc@cursor-rapid-movement-128x42: - shard-dg2-set2: [SKIP][118] ([Intel XE#4208] / [i915#2575]) -> [PASS][119] +45 other tests pass [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html * igt@kms_cursor_legacy@cursora-vs-flipb-atomic: - shard-bmg: [SKIP][120] ([Intel XE#2291]) -> [PASS][121] [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-8/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html * igt@kms_flip@2x-flip-vs-modeset-vs-hang: - shard-bmg: [SKIP][122] ([Intel XE#2316]) -> [PASS][123] +1 other test pass [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-6/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-8/igt@kms_flip@2x-flip-vs-modeset-vs-hang.html * igt@kms_flip@2x-flip-vs-suspend-interruptible@bd-hdmi-a6-dp4: - shard-dg2-set2: [INCOMPLETE][124] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][125] +1 other test pass [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_flip@2x-flip-vs-suspend-interruptible@bd-hdmi-a6-dp4.html [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-435/igt@kms_flip@2x-flip-vs-suspend-interruptible@bd-hdmi-a6-dp4.html * igt@kms_flip@flip-vs-suspend: - shard-bmg: [INCOMPLETE][126] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][127] +1 other test pass [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-4/igt@kms_flip@flip-vs-suspend.html [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-4/igt@kms_flip@flip-vs-suspend.html * igt@kms_flip@flip-vs-suspend@b-hdmi-a1: - shard-adlp: [DMESG-WARN][128] ([Intel XE#4543]) -> [PASS][129] +7 other tests pass [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-adlp-8/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-6/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move: - shard-dg2-set2: [SKIP][130] ([Intel XE#2351] / [Intel XE#4208]) -> [PASS][131] +6 other tests pass [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html * igt@kms_hdr@static-toggle-suspend: - shard-bmg: [SKIP][132] ([Intel XE#1503]) -> [PASS][133] +1 other test pass [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-5/igt@kms_hdr@static-toggle-suspend.html * igt@kms_invalid_mode@bad-hsync-end: - shard-adlp: [DMESG-WARN][134] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][135] +1 other test pass [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-adlp-6/igt@kms_invalid_mode@bad-hsync-end.html [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-adlp-1/igt@kms_invalid_mode@bad-hsync-end.html * igt@xe_exec_balancer@twice-virtual-basic: - shard-dg2-set2: [SKIP][136] ([Intel XE#4208]) -> [PASS][137] +105 other tests pass [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_exec_balancer@twice-virtual-basic.html [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_exec_balancer@twice-virtual-basic.html * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind: - shard-dg2-set2: [SKIP][138] ([Intel XE#1392]) -> [PASS][139] +3 other tests pass [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-466/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html * igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset: - shard-lnl: [FAIL][140] ([Intel XE#5018]) -> [PASS][141] [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-lnl-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-3/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html * igt@xe_pmu@gt-frequency: - shard-dg2-set2: [FAIL][142] ([Intel XE#4819]) -> [PASS][143] +1 other test pass [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-434/igt@xe_pmu@gt-frequency.html [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-432/igt@xe_pmu@gt-frequency.html #### Warnings #### * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - shard-dg2-set2: [SKIP][144] ([Intel XE#623]) -> [SKIP][145] ([Intel XE#4208] / [i915#2575]) [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html * igt@kms_async_flips@invalid-async-flip-atomic: - shard-dg2-set2: [SKIP][146] ([Intel XE#4208] / [i915#2575]) -> [SKIP][147] ([Intel XE#3768]) [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_async_flips@invalid-async-flip-atomic.html [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@kms_async_flips@invalid-async-flip-atomic.html * igt@kms_big_fb@4-tiled-16bpp-rotate-270: - shard-dg2-set2: [SKIP][148] ([Intel XE#316]) -> [SKIP][149] ([Intel XE#2351] / [Intel XE#4208]) [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html * igt@kms_big_fb@linear-8bpp-rotate-270: - shard-dg2-set2: [SKIP][150] ([Intel XE#4208]) -> [SKIP][151] ([Intel XE#316]) [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_big_fb@linear-8bpp-rotate-270.html [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_big_fb@linear-8bpp-rotate-270.html * igt@kms_big_fb@x-tiled-32bpp-rotate-270: - shard-dg2-set2: [SKIP][152] ([Intel XE#316]) -> [SKIP][153] ([Intel XE#4208]) [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html * igt@kms_big_fb@y-tiled-16bpp-rotate-90: - shard-dg2-set2: [SKIP][154] ([Intel XE#4208]) -> [SKIP][155] ([Intel XE#1124]) +3 other tests skip [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html * igt@kms_big_fb@y-tiled-addfb: - shard-dg2-set2: [SKIP][156] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][157] ([Intel XE#619]) [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_big_fb@y-tiled-addfb.html [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_big_fb@y-tiled-addfb.html * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow: - shard-dg2-set2: [SKIP][158] ([Intel XE#607]) -> [SKIP][159] ([Intel XE#2351] / [Intel XE#4208]) [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html * igt@kms_big_fb@y-tiled-addfb-size-overflow: - shard-dg2-set2: [SKIP][160] ([Intel XE#610]) -> [SKIP][161] ([Intel XE#4208]) [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_big_fb@y-tiled-addfb-size-overflow.html [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_big_fb@y-tiled-addfb-size-overflow.html * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-dg2-set2: [SKIP][162] ([Intel XE#1124]) -> [SKIP][163] ([Intel XE#2351] / [Intel XE#4208]) +3 other tests skip [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-180: - shard-dg2-set2: [SKIP][164] ([Intel XE#1124]) -> [SKIP][165] ([Intel XE#4208]) +2 other tests skip [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html * igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p: - shard-dg2-set2: [SKIP][166] ([Intel XE#2191]) -> [SKIP][167] ([Intel XE#4208] / [i915#2575]) [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html * igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p: - shard-dg2-set2: [SKIP][168] ([Intel XE#4208] / [i915#2575]) -> [SKIP][169] ([Intel XE#2191]) +1 other test skip [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html * igt@kms_bw@linear-tiling-3-displays-2560x1440p: - shard-dg2-set2: [SKIP][170] ([Intel XE#367]) -> [SKIP][171] ([Intel XE#4208] / [i915#2575]) [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html * igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs: - shard-dg2-set2: [SKIP][172] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][173] ([Intel XE#455] / [Intel XE#787]) +1 other test skip [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs.html [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs.html * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs: - shard-dg2-set2: [SKIP][174] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][175] ([Intel XE#2351] / [Intel XE#4208]) +3 other tests skip [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs: - shard-dg2-set2: [SKIP][176] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][177] ([Intel XE#4208]) +7 other tests skip [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs.html [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs.html * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc: - shard-dg2-set2: [SKIP][178] ([Intel XE#4208]) -> [SKIP][179] ([Intel XE#455] / [Intel XE#787]) +1 other test skip [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs: - shard-dg2-set2: [SKIP][180] ([Intel XE#2907]) -> [SKIP][181] ([Intel XE#4208]) [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs: - shard-dg2-set2: [SKIP][182] ([Intel XE#4208]) -> [SKIP][183] ([Intel XE#2907]) +2 other tests skip [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html * igt@kms_chamelium_color@gamma: - shard-dg2-set2: [SKIP][184] ([Intel XE#306]) -> [SKIP][185] ([Intel XE#4208] / [i915#2575]) +1 other test skip [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_chamelium_color@gamma.html [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_chamelium_color@gamma.html * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats: - shard-dg2-set2: [SKIP][186] ([Intel XE#4208] / [i915#2575]) -> [SKIP][187] ([Intel XE#373]) +5 other tests skip [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html * igt@kms_chamelium_hpd@hdmi-hpd-storm: - shard-dg2-set2: [SKIP][188] ([Intel XE#373]) -> [SKIP][189] ([Intel XE#4208] / [i915#2575]) +4 other tests skip [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_chamelium_hpd@hdmi-hpd-storm.html [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_chamelium_hpd@hdmi-hpd-storm.html * igt@kms_content_protection@atomic: - shard-dg2-set2: [SKIP][190] ([Intel XE#4208] / [i915#2575]) -> [FAIL][191] ([Intel XE#1178]) [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_content_protection@atomic.html [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_content_protection@atomic.html * igt@kms_content_protection@dp-mst-lic-type-1: - shard-dg2-set2: [SKIP][192] ([Intel XE#307]) -> [SKIP][193] ([Intel XE#4208] / [i915#2575]) [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_content_protection@dp-mst-lic-type-1.html [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_content_protection@dp-mst-lic-type-1.html * igt@kms_content_protection@lic-type-1: - shard-dg2-set2: [SKIP][194] ([Intel XE#455]) -> [SKIP][195] ([Intel XE#4208] / [i915#2575]) +4 other tests skip [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_content_protection@lic-type-1.html [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_content_protection@lic-type-1.html * igt@kms_content_protection@srm: - shard-dg2-set2: [FAIL][196] ([Intel XE#1178]) -> [SKIP][197] ([Intel XE#4208] / [i915#2575]) [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_content_protection@srm.html [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_content_protection@srm.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic: - shard-bmg: [FAIL][198] ([Intel XE#4633]) -> [FAIL][199] ([Intel XE#1475]) [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html * igt@kms_dp_linktrain_fallback@dsc-fallback: - shard-dg2-set2: [SKIP][200] ([Intel XE#4331]) -> [SKIP][201] ([Intel XE#4208]) [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_dp_linktrain_fallback@dsc-fallback.html [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_dp_linktrain_fallback@dsc-fallback.html * igt@kms_dsc@dsc-basic: - shard-dg2-set2: [SKIP][202] ([Intel XE#455]) -> [SKIP][203] ([Intel XE#2351] / [Intel XE#4208]) [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_dsc@dsc-basic.html [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_dsc@dsc-basic.html * igt@kms_dsc@dsc-with-output-formats-with-bpc: - shard-dg2-set2: [SKIP][204] ([Intel XE#455]) -> [SKIP][205] ([Intel XE#4208]) +2 other tests skip [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_dsc@dsc-with-output-formats-with-bpc.html [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_dsc@dsc-with-output-formats-with-bpc.html * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests: - shard-dg2-set2: [SKIP][206] ([Intel XE#4208]) -> [SKIP][207] ([Intel XE#4422]) [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html * igt@kms_feature_discovery@display-4x: - shard-dg2-set2: [SKIP][208] ([Intel XE#4208] / [i915#2575]) -> [SKIP][209] ([Intel XE#1138]) [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_feature_discovery@display-4x.html [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@kms_feature_discovery@display-4x.html * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff: - shard-dg2-set2: [SKIP][210] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][211] ([Intel XE#651]) +2 other tests skip [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff.html [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt: - shard-bmg: [SKIP][212] ([Intel XE#2311]) -> [SKIP][213] ([Intel XE#2312]) +8 other tests skip [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-render: - shard-dg2-set2: [SKIP][214] ([Intel XE#651]) -> [SKIP][215] ([Intel XE#4208]) +13 other tests skip [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-render.html [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-render.html * igt@kms_frontbuffer_tracking@drrs-suspend: - shard-dg2-set2: [SKIP][216] ([Intel XE#651]) -> [SKIP][217] ([Intel XE#2351] / [Intel XE#4208]) +8 other tests skip [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-suspend.html [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-suspend.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render: - shard-bmg: [SKIP][218] ([Intel XE#5390]) -> [SKIP][219] ([Intel XE#2312]) +2 other tests skip [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render.html [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-render.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff: - shard-bmg: [SKIP][220] ([Intel XE#2312]) -> [SKIP][221] ([Intel XE#5390]) +4 other tests skip [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move: - shard-bmg: [SKIP][222] ([Intel XE#2312]) -> [SKIP][223] ([Intel XE#2311]) +9 other tests skip [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move.html [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary: - shard-dg2-set2: [SKIP][224] ([Intel XE#4208]) -> [SKIP][225] ([Intel XE#651]) +12 other tests skip [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary.html [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt: - shard-dg2-set2: [SKIP][226] ([Intel XE#653]) -> [SKIP][227] ([Intel XE#4208]) +14 other tests skip [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw: - shard-dg2-set2: [SKIP][228] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][229] ([Intel XE#653]) +5 other tests skip [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw.html [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcpsr-2p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt: - shard-bmg: [SKIP][230] ([Intel XE#2313]) -> [SKIP][231] ([Intel XE#2312]) +8 other tests skip [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt.html [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render: - shard-dg2-set2: [SKIP][232] ([Intel XE#4208]) -> [SKIP][233] ([Intel XE#653]) +9 other tests skip [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render.html [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt: - shard-bmg: [SKIP][234] ([Intel XE#2312]) -> [SKIP][235] ([Intel XE#2313]) +14 other tests skip [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt: - shard-dg2-set2: [SKIP][236] ([Intel XE#653]) -> [SKIP][237] ([Intel XE#2351] / [Intel XE#4208]) +5 other tests skip [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html * igt@kms_joiner@basic-force-ultra-joiner: - shard-dg2-set2: [SKIP][238] ([Intel XE#2925]) -> [SKIP][239] ([Intel XE#4208]) +1 other test skip [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_joiner@basic-force-ultra-joiner.html [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_joiner@basic-force-ultra-joiner.html * igt@kms_joiner@basic-ultra-joiner: - shard-dg2-set2: [SKIP][240] ([Intel XE#4208]) -> [SKIP][241] ([Intel XE#2927]) [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_joiner@basic-ultra-joiner.html [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_joiner@basic-ultra-joiner.html * igt@kms_pipe_stress@stress-xrgb8888-ytiled: - shard-dg2-set2: [SKIP][242] ([Intel XE#4359]) -> [SKIP][243] ([Intel XE#4208]) [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html * igt@kms_plane_cursor@viewport: - shard-dg2-set2: [FAIL][244] ([Intel XE#616]) -> [SKIP][245] ([Intel XE#4208] / [i915#2575]) [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_plane_cursor@viewport.html [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_plane_cursor@viewport.html * igt@kms_pm_dc@dc5-psr: - shard-dg2-set2: [SKIP][246] ([Intel XE#4208]) -> [SKIP][247] ([Intel XE#1129]) [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_pm_dc@dc5-psr.html [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_pm_dc@dc5-psr.html * igt@kms_pm_dc@dc6-psr: - shard-dg2-set2: [SKIP][248] ([Intel XE#1129]) -> [SKIP][249] ([Intel XE#2351] / [Intel XE#4208]) [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_pm_dc@dc6-psr.html [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_pm_dc@dc6-psr.html * igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area: - shard-dg2-set2: [SKIP][250] ([Intel XE#4208]) -> [SKIP][251] ([Intel XE#1489]) +4 other tests skip [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf: - shard-dg2-set2: [SKIP][252] ([Intel XE#1489]) -> [SKIP][253] ([Intel XE#4208]) +5 other tests skip [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr@fbc-psr2-cursor-plane-move: - shard-dg2-set2: [SKIP][254] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][255] ([Intel XE#4208]) +5 other tests skip [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@kms_psr@fbc-psr2-cursor-plane-move.html [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_psr@fbc-psr2-cursor-plane-move.html * igt@kms_psr@fbc-psr2-sprite-plane-move: - shard-dg2-set2: [SKIP][256] ([Intel XE#4208]) -> [SKIP][257] ([Intel XE#2850] / [Intel XE#929]) +8 other tests skip [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_psr@fbc-psr2-sprite-plane-move.html [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_psr@fbc-psr2-sprite-plane-move.html * igt@kms_psr@pr-dpms: - shard-dg2-set2: [SKIP][258] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][259] ([Intel XE#2351] / [Intel XE#4208]) +5 other tests skip [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@kms_psr@pr-dpms.html [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_psr@pr-dpms.html * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90: - shard-dg2-set2: [SKIP][260] ([Intel XE#3414]) -> [SKIP][261] ([Intel XE#4208] / [i915#2575]) +1 other test skip [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html * igt@kms_vrr@cmrr: - shard-dg2-set2: [SKIP][262] ([Intel XE#4208] / [i915#2575]) -> [SKIP][263] ([Intel XE#2168]) [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_vrr@cmrr.html [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@kms_vrr@cmrr.html * igt@kms_vrr@flip-dpms: - shard-dg2-set2: [SKIP][264] ([Intel XE#4208] / [i915#2575]) -> [SKIP][265] ([Intel XE#455]) +3 other tests skip [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@kms_vrr@flip-dpms.html [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@kms_vrr@flip-dpms.html * igt@kms_vrr@lobf: - shard-dg2-set2: [SKIP][266] ([Intel XE#2168]) -> [SKIP][267] ([Intel XE#4208] / [i915#2575]) [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@kms_vrr@lobf.html [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@kms_vrr@lobf.html * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all: - shard-dg2-set2: [SKIP][268] ([Intel XE#4208] / [i915#2575]) -> [SKIP][269] ([Intel XE#1091] / [Intel XE#2849]) [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html * igt@xe_compute_preempt@compute-preempt: - shard-dg2-set2: [SKIP][270] ([Intel XE#4208]) -> [SKIP][271] ([Intel XE#1280] / [Intel XE#455]) [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_compute_preempt@compute-preempt.html [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_compute_preempt@compute-preempt.html * igt@xe_copy_basic@mem-copy-linear-0xfffe: - shard-dg2-set2: [SKIP][272] ([Intel XE#4208]) -> [SKIP][273] ([Intel XE#1123]) [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_copy_basic@mem-copy-linear-0xfffe.html [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@xe_copy_basic@mem-copy-linear-0xfffe.html * igt@xe_copy_basic@mem-set-linear-0xfd: - shard-dg2-set2: [SKIP][274] ([Intel XE#1126]) -> [SKIP][275] ([Intel XE#4208]) [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@xe_copy_basic@mem-set-linear-0xfd.html [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_copy_basic@mem-set-linear-0xfd.html * igt@xe_eu_stall@invalid-sampling-rate: - shard-dg2-set2: [SKIP][276] ([Intel XE#5419]) -> [SKIP][277] ([Intel XE#4208]) [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@xe_eu_stall@invalid-sampling-rate.html [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_eu_stall@invalid-sampling-rate.html * igt@xe_eudebug@basic-vm-access-userptr-faultable: - shard-dg2-set2: [SKIP][278] ([Intel XE#4208]) -> [SKIP][279] ([Intel XE#4837]) +5 other tests skip [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_eudebug@basic-vm-access-userptr-faultable.html [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_eudebug@basic-vm-access-userptr-faultable.html * igt@xe_eudebug@vm-bind-clear-faultable: - shard-dg2-set2: [SKIP][280] ([Intel XE#4837]) -> [SKIP][281] ([Intel XE#4208]) +10 other tests skip [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@xe_eudebug@vm-bind-clear-faultable.html [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_eudebug@vm-bind-clear-faultable.html * igt@xe_exec_fault_mode@once-rebind-prefetch: - shard-dg2-set2: [SKIP][282] ([Intel XE#288]) -> [SKIP][283] ([Intel XE#4208]) +17 other tests skip [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@xe_exec_fault_mode@once-rebind-prefetch.html [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_exec_fault_mode@once-rebind-prefetch.html * igt@xe_exec_fault_mode@twice-userptr-prefetch: - shard-dg2-set2: [SKIP][284] ([Intel XE#4208]) -> [SKIP][285] ([Intel XE#288]) +12 other tests skip [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_exec_fault_mode@twice-userptr-prefetch.html [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_exec_fault_mode@twice-userptr-prefetch.html * igt@xe_exec_mix_modes@exec-spinner-interrupted-lr: - shard-dg2-set2: [SKIP][286] ([Intel XE#4208]) -> [SKIP][287] ([Intel XE#2360]) [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_exec_mix_modes@exec-spinner-interrupted-lr.html [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@xe_exec_mix_modes@exec-spinner-interrupted-lr.html * igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-eocheck: - shard-dg2-set2: [SKIP][288] ([Intel XE#4208]) -> [SKIP][289] ([Intel XE#4915]) +130 other tests skip [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-eocheck.html [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-eocheck.html * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset: - shard-lnl: [FAIL][290] ([Intel XE#5018]) -> [FAIL][291] ([Intel XE#4937]) [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-lnl-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html * igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-remap-eocheck: - shard-dg2-set2: [SKIP][292] ([Intel XE#4915]) -> [SKIP][293] ([Intel XE#4208]) +183 other tests skip [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-remap-eocheck.html [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-remap-eocheck.html * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv: - shard-dg2-set2: [SKIP][294] ([Intel XE#4208]) -> [ABORT][295] ([Intel XE#4917]) [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-435/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html * igt@xe_oa@mi-rpc: - shard-dg2-set2: [SKIP][296] ([Intel XE#4208]) -> [SKIP][297] ([Intel XE#2541] / [Intel XE#3573]) +2 other tests skip [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_oa@mi-rpc.html [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_oa@mi-rpc.html * igt@xe_oa@missing-sample-flags: - shard-dg2-set2: [SKIP][298] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][299] ([Intel XE#4208]) +1 other test skip [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@xe_oa@missing-sample-flags.html [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_oa@missing-sample-flags.html * igt@xe_oa@mmio-triggered-reports-read: - shard-dg2-set2: [SKIP][300] ([Intel XE#5103]) -> [SKIP][301] ([Intel XE#4208]) [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@xe_oa@mmio-triggered-reports-read.html [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_oa@mmio-triggered-reports-read.html * igt@xe_oa@syncs-syncobj-none: - shard-dg2-set2: [SKIP][302] ([Intel XE#4208]) -> [SKIP][303] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_oa@syncs-syncobj-none.html [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_oa@syncs-syncobj-none.html * igt@xe_oa@syncs-userptr-wait-cfg: - shard-dg2-set2: [SKIP][304] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) -> [SKIP][305] ([Intel XE#4208]) +1 other test skip [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@xe_oa@syncs-userptr-wait-cfg.html [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_oa@syncs-userptr-wait-cfg.html * igt@xe_peer2peer@write: - shard-dg2-set2: [SKIP][306] ([Intel XE#1061] / [Intel XE#4208]) -> [FAIL][307] ([Intel XE#1173]) [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_peer2peer@write.html [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_peer2peer@write.html * igt@xe_pm@d3cold-multiple-execs: - shard-dg2-set2: [SKIP][308] ([Intel XE#2284] / [Intel XE#366]) -> [SKIP][309] ([Intel XE#4208]) +2 other tests skip [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@xe_pm@d3cold-multiple-execs.html [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_pm@d3cold-multiple-execs.html * igt@xe_pxp@pxp-stale-bo-bind-post-suspend: - shard-dg2-set2: [SKIP][310] ([Intel XE#4733]) -> [SKIP][311] ([Intel XE#4208]) +1 other test skip [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@xe_pxp@pxp-stale-bo-bind-post-suspend.html [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_pxp@pxp-stale-bo-bind-post-suspend.html * igt@xe_pxp@pxp-stale-bo-exec-post-suspend: - shard-dg2-set2: [SKIP][312] ([Intel XE#4208]) -> [SKIP][313] ([Intel XE#4733]) [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html * igt@xe_query@multigpu-query-invalid-extension: - shard-dg2-set2: [SKIP][314] ([Intel XE#4208]) -> [SKIP][315] ([Intel XE#944]) +1 other test skip [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_query@multigpu-query-invalid-extension.html [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_query@multigpu-query-invalid-extension.html * igt@xe_query@multigpu-query-oa-units: - shard-dg2-set2: [SKIP][316] ([Intel XE#944]) -> [SKIP][317] ([Intel XE#4208]) +2 other tests skip [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@xe_query@multigpu-query-oa-units.html [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_query@multigpu-query-oa-units.html * igt@xe_render_copy@render-stress-1-copies: - shard-dg2-set2: [SKIP][318] ([Intel XE#4814]) -> [SKIP][319] ([Intel XE#4208]) [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-433/igt@xe_render_copy@render-stress-1-copies.html [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_render_copy@render-stress-1-copies.html * igt@xe_spin_batch@spin-mem-copy: - shard-dg2-set2: [SKIP][320] ([Intel XE#4821]) -> [SKIP][321] ([Intel XE#4208]) [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-435/igt@xe_spin_batch@spin-mem-copy.html [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_spin_batch@spin-mem-copy.html * igt@xe_sriov_flr@flr-each-isolation: - shard-dg2-set2: [SKIP][322] ([Intel XE#4208]) -> [SKIP][323] ([Intel XE#3342]) [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_sriov_flr@flr-each-isolation.html [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-434/igt@xe_sriov_flr@flr-each-isolation.html * igt@xe_sriov_flr@flr-vf1-clear: - shard-dg2-set2: [SKIP][324] ([Intel XE#3342]) -> [SKIP][325] ([Intel XE#4208]) [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-464/igt@xe_sriov_flr@flr-vf1-clear.html [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-436/igt@xe_sriov_flr@flr-vf1-clear.html * igt@xe_sriov_flr@flr-vfs-parallel: - shard-dg2-set2: [SKIP][326] ([Intel XE#4208]) -> [SKIP][327] ([Intel XE#4273]) [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb/shard-dg2-436/igt@xe_sriov_flr@flr-vfs-parallel.html [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/shard-dg2-433/igt@xe_sriov_flr@flr-vfs-parallel.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061 [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091 [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123 [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124 [Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126 [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129 [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138 [Intel XE#1158]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1158 [Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173 [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178 [Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280 [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392 [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406 [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421 [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435 [Intel XE#1475]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1475 [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489 [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503 [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512 [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727 [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049 [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134 [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168 [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191 [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284 [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291 [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311 [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312 [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313 [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314 [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316 [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321 [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351 [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360 [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541 [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597 [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261 [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763 [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849 [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850 [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288 [Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883 [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887 [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893 [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894 [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907 [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925 [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927 [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939 [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953 [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301 [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012 [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306 [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307 [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308 [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309 [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310 [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113 [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124 [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316 [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323 [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342 [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414 [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346 [Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352 [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573 [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658 [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366 [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367 [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373 [Intel XE#3768]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3768 [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173 [Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208 [Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273 [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302 [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331 [Intel XE#4359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4359 [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417 [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422 [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501 [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543 [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455 [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609 [Intel XE#4618]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4618 [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633 [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733 [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814 [Intel XE#4819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4819 [Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821 [Intel XE#4835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4835 [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837 [Intel XE#4842]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4842 [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915 [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917 [Intel XE#4937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4937 [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943 [Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018 [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021 [Intel XE#5103]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5103 [Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300 [Intel XE#5338]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5338 [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390 [Intel XE#5419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5419 [Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569 [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584 [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607 [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610 [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616 [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619 [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623 [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651 [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653 [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656 [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688 [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787 [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929 [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944 [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575 Build changes ------------- * Linux: xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb -> xe-pw-151358v1 IGT_8447: 8447 xe-3375-8928bbe5e909305341302cbcb5f58cb9eb2dddcb: 8928bbe5e909305341302cbcb5f58cb9eb2dddcb xe-pw-151358v1: 151358v1 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151358v1/index.html [-- Attachment #2: Type: text/html, Size: 108920 bytes --] ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-08 21:23 [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET Imre Deak ` (3 preceding siblings ...) 2025-07-09 2:51 ` ✗ Xe.CI.Full: failure " Patchwork @ 2025-07-09 5:57 ` Paul Menzel 2025-07-09 12:39 ` Imre Deak 2025-07-10 11:28 ` Imre Deak 5 siblings, 1 reply; 13+ messages in thread From: Paul Menzel @ 2025-07-09 5:57 UTC (permalink / raw) To: Imre Deak Cc: intel-gfx, intel-xe, dri-devel, Ville Syrjälä, Jani Nikula Dear Imre, Thank you very much for your patch, and the detailed commit message. Am 08.07.25 um 23:23 schrieb Imre Deak: > Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from > DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for > DPCD probing, since this results in link training failures at least when > using an Intel Barlow Ridge TBT hub at UHBR link rates (the > DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed > link training). Since accessing DPCD_REV during link training is > prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, > as it falls within the Standard's valid register address range > (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link > training on the above TBT hub. > > However, reading the LANE0_1_STATUS register also has a side-effect at > least on a Novatek eDP panel, as reported on the Closes: link below, > resulting in screen flickering on that panel. One clear side-effect when > doing the 1-byte probe reads from LANE0_1_STATUS during link training > before reading out the full 6 byte link status starting at the same > address is that the panel will report the link training as completed > with voltage swing 0. This is different from the normal, flicker-free > scenario when no DPCD probing is done, the panel reporting the link > training complete with voltage swing 2. For the ignorant like me, adding the debug log lines you deduced this from would help. > Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have > the above side-effect, the panel will link train with voltage swing 2 as > expected and it will stay flicker-free. This register is also in the > above valid register range and is unlikely to have a side-effect as that > of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training > CR/EQ sequences and so it may cause a state change in the sink - even if > inadvertently as I suspect in the case of the above Novatek panel. As > opposed to this, reading TRAINING_PATTERN_SET is not part of the link > training sequence (it must be only written once at the beginning of the > CR/EQ sequences), so it's unlikely to cause any state change in the > sink. > > As a side-note, this Novatek panel also lacks support for TPS3, while > claiming support for HBR2, which violates the DP Standard (the Standard > mandating TPS3 for HBR2). Unrelated, but a warning about this panel firmware/hardware misbehavior would probably be warranted. > Besides the Novatek panel (PSR 1), which this change fixes, I also > verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP > panel as well as on the Intel Barlow Ridge TBT hub. > > Note that in the drm-tip tree (targeting the v6.17 kernel version) the > i915 and xe drivers keep DPCD probing enabled only for the panel known > to require this (HP ZR24w), hence those drivers in drm-tip are not > affected by the above problem. > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") > Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/display/drm_dp_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > index 1c3920297906b..1ecc3df7e3167 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, > int ret; > > if (dpcd_access_needs_probe(aux)) { > - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); > + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); > if (ret < 0) > return ret; > } Just for the record, I also tested this on top of commit 733923397fd9 (Merge tag 'pwm/for-6.16-rc6-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux), and the flickering is gone. Kind regards, Paul ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-09 5:57 ` [PATCH] " Paul Menzel @ 2025-07-09 12:39 ` Imre Deak 0 siblings, 0 replies; 13+ messages in thread From: Imre Deak @ 2025-07-09 12:39 UTC (permalink / raw) To: Paul Menzel Cc: intel-gfx, intel-xe, dri-devel, Ville Syrjälä, Jani Nikula On Wed, Jul 09, 2025 at 07:57:15AM +0200, Paul Menzel wrote: > Dear Imre, > > Thank you very much for your patch, and the detailed commit message. > > Am 08.07.25 um 23:23 schrieb Imre Deak: > > Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from > > DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for > > DPCD probing, since this results in link training failures at least when > > using an Intel Barlow Ridge TBT hub at UHBR link rates (the > > DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed > > link training). Since accessing DPCD_REV during link training is > > prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, > > as it falls within the Standard's valid register address range > > (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link > > training on the above TBT hub. > > > > However, reading the LANE0_1_STATUS register also has a side-effect at > > least on a Novatek eDP panel, as reported on the Closes: link below, > > resulting in screen flickering on that panel. One clear side-effect when > > doing the 1-byte probe reads from LANE0_1_STATUS during link training > > before reading out the full 6 byte link status starting at the same > > address is that the panel will report the link training as completed > > with voltage swing 0. This is different from the normal, flicker-free > > scenario when no DPCD probing is done, the panel reporting the link > > training complete with voltage swing 2. > > For the ignorant like me, adding the debug log lines you deduced this from > would help. The following are the annotated events from the failure and success cases, imo it's better to add this to the bug ticket, keeping the commit message more succinct; can do that. The failure case, using LANE0_1_STATUS for DPCD probing, from the bug ticket's https://gitlab.freedesktop.org/-/project/4519/uploads/e440bd79e44fe3442716078fb38fc396/20250630--dell-xps-13-9360--linux-6.16.0-rc3-00002-ga3ef3c2da675--messages.txt : """ [ 47.429619] i915 0000:00:02.0: [drm:drm_dp_dpcd_write [drm_display_helper]] AUX A/DDI A/PHY A: 0x00102 AUX <- (ret= 5) 21 00 00 00 00 The source (driver) uses vs/pre-emp 0/0 ([0x105 0x106] = 0x00 0x00) [ 47.429942] i915 0000:00:02.0: [drm:drm_dp_dpcd_probe [drm_display_helper]] AUX A/DDI A/PHY A: 0x00202 AUX -> (ret= 1) 11 [ 47.430289] i915 0000:00:02.0: [drm:drm_dp_dpcd_read [drm_display_helper]] AUX A/DDI A/PHY A: 0x00202 AUX -> (ret= 6) 11 11 80 00 66 66 The sink inidicates that CR is complete ([0x202 0x203] = 0x11 0x11). The sink also requests vs/pre-emp 2/1, but the source does not change to these levels, since the sink already indicated CR as complete. [ 47.430305] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:106:eDP-1][ENCODER:105:DDI A/PHY A][DPRX] Clock recovery OK ... [ 47.431025] i915 0000:00:02.0: [drm:drm_dp_dpcd_write [drm_display_helper]] AUX A/DDI A/PHY A: 0x00102 AUX <- (ret= 5) 22 00 00 00 00 The source starts the EQ phase using the 0/0 vs/pre-emp levels ([0x105 0x106] = 0x00 0x00), with which CR got completed as indicated by the sink above. [ 47.431720] i915 0000:00:02.0: [drm:drm_dp_dpcd_probe [drm_display_helper]] AUX A/DDI A/PHY A: 0x00202 AUX -> (ret= 1) 11 [ 47.432072] i915 0000:00:02.0: [drm:drm_dp_dpcd_read [drm_display_helper]] AUX A/DDI A/PHY A: 0x00202 AUX -> (ret= 6) 77 77 81 00 66 66 The sink indicates that EQ is complete ([0x202-0x204] = 0x77 0x77 0x81). The sink also requests vs/pre-emp 2/1, but the source does not change to these levels, since the sink already indicated EQ as complete. [ 47.432088] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:106:eDP-1][ENCODER:105:DDI A/PHY A][DPRX] Channel EQ done. DP Training successful """ The passing case, using TRAINING_PATTERN_SET for DPCD probing, from the bug ticket's https://gitlab.freedesktop.org/-/project/4519/uploads/a999486f52bc794d2923557334e297e2/20250630--dell-xps-13-9360--linux-6.16.0-rc4-00001-g072887dff624--messages--several-acpi-s3-cycles.txt """ [ 388.585357] i915 0000:00:02.0: [drm:drm_dp_dpcd_write [drm_display_helper]] AUX A/DDI A/PHY A: 0x00102 AUX <- (ret= 5) 21 00 00 00 00 [ 388.585696] i915 0000:00:02.0: [drm:drm_dp_dpcd_probe [drm_display_helper]] AUX A/DDI A/PHY A: 0x00102 AUX -> (ret= 1) 21 [ 388.586064] i915 0000:00:02.0: [drm:drm_dp_dpcd_read [drm_display_helper]] AUX A/DDI A/PHY A: 0x00202 AUX -> (ret= 6) 11 11 80 00 66 66 [ 388.586083] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:106:eDP-1][ENCODER:105:DDI A/PHY A][DPRX] Clock recovery OK Similarly as in the failure case, sink completes CR with vs/pre-emp 0/0, but requesting already vs/pre-emp 2/1. [ 388.586725] i915 0000:00:02.0: [drm:drm_dp_dpcd_write [drm_display_helper]] AUX A/DDI A/PHY A: 0x00102 AUX <- (ret= 5) 22 00 00 00 00 The source starts the EQ phase using the 0/0 vs/pre-emp levels the CR phase completed with. [ 388.587421] i915 0000:00:02.0: [drm:drm_dp_dpcd_probe [drm_display_helper]] AUX A/DDI A/PHY A: 0x00102 AUX -> (ret= 1) 22 [ 388.587774] i915 0000:00:02.0: [drm:drm_dp_dpcd_read [drm_display_helper]] AUX A/DDI A/PHY A: 0x00202 AUX -> (ret= 6) 11 77 81 00 66 66 The sink indicates that EQ is still not complete for lane 0/1 ([0x202] = 0x11) and requests for vs/pre-emp 2/1 for all lanes. [ 388.587786] i915 0000:00:02.0: [drm:intel_dp_get_adjust_train [i915]] [CONNECTOR:106:eDP-1][ENCODER:105:DDI A/PHY A][DPRX] 8b/10b, lanes: 4, vswing request: 2/2/2/2, pre-emphasis request: 1/1/1/1 [ 388.587919] i915 0000:00:02.0: [drm:intel_dp_set_signal_levels [i915]] [CONNECTOR:106:eDP-1][ENCODER:105:DDI A/PHY A][DPRX] 8b/10b, lanes: 4, vswing levels: 2(max)/2(max)/2(max)/2(max), pre-emphasis levels: 1/1/1/1 [ 388.588035] i915 0000:00:02.0: [drm:hsw_set_signal_levels [i915]] Using signal levels 08000000 [ 388.588319] i915 0000:00:02.0: [drm:drm_dp_dpcd_write [drm_display_helper]] AUX A/DDI A/PHY A: 0x00103 AUX <- (ret= 4) 0e 0e 0e 0e The source switches to vs/pre-emp 2/1 for all lanes as the sink requested. [ 388.589007] i915 0000:00:02.0: [drm:drm_dp_dpcd_probe [drm_display_helper]] AUX A/DDI A/PHY A: 0x00102 AUX -> (ret= 1) 22 [ 388.589353] i915 0000:00:02.0: [drm:drm_dp_dpcd_read [drm_display_helper]] AUX A/DDI A/PHY A: 0x00202 AUX -> (ret= 6) 77 77 01 00 66 66 The sink indicates the EQ as complete. """ > > Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have > > the above side-effect, the panel will link train with voltage swing 2 as > > expected and it will stay flicker-free. This register is also in the > > above valid register range and is unlikely to have a side-effect as that > > of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training > > CR/EQ sequences and so it may cause a state change in the sink - even if > > inadvertently as I suspect in the case of the above Novatek panel. As > > opposed to this, reading TRAINING_PATTERN_SET is not part of the link > > training sequence (it must be only written once at the beginning of the > > CR/EQ sequences), so it's unlikely to cause any state change in the > > sink. > > > > As a side-note, this Novatek panel also lacks support for TPS3, while > > claiming support for HBR2, which violates the DP Standard (the Standard > > mandating TPS3 for HBR2). > > Unrelated, but a warning about this panel firmware/hardware misbehavior > would probably be warranted. There is a debug message about it, not sure if it would make sense to convert that to an error/note message instead: [ 388.586203] i915 0000:00:02.0: [drm:intel_dp_link_train_phy [i915]] [CONNECTOR:106:eDP-1][ENCODER:105:DDI A/PHY A][DPRX] >=5.4/6.48 Gbps link rate without sink TPS3 support > > > Besides the Novatek panel (PSR 1), which this change fixes, I also > > verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP > > panel as well as on the Intel Barlow Ridge TBT hub. > > > > Note that in the drm-tip tree (targeting the v6.17 kernel version) the > > i915 and xe drivers keep DPCD probing enabled only for the panel known > > to require this (HP ZR24w), hence those drivers in drm-tip are not > > affected by the above problem. > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Jani Nikula <jani.nikula@linux.intel.com> > > Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") > > Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> > > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > --- > > drivers/gpu/drm/display/drm_dp_helper.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > > index 1c3920297906b..1ecc3df7e3167 100644 > > --- a/drivers/gpu/drm/display/drm_dp_helper.c > > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > > @@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, > > int ret; > > if (dpcd_access_needs_probe(aux)) { > > - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); > > + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); > > if (ret < 0) > > return ret; > > } > > Just for the record, I also tested this on top of commit 733923397fd9 (Merge > tag 'pwm/for-6.16-rc6-fixes' of > git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux), and the > flickering is gone. Ok, thanks for testing it! > Kind regards, > > Paul ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-08 21:23 [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET Imre Deak ` (4 preceding siblings ...) 2025-07-09 5:57 ` [PATCH] " Paul Menzel @ 2025-07-10 11:28 ` Imre Deak 2025-07-14 8:57 ` Imre Deak 5 siblings, 1 reply; 13+ messages in thread From: Imre Deak @ 2025-07-10 11:28 UTC (permalink / raw) To: Thomas Zimmermann, Maxime Ripard, Maarten Lankhorst Cc: Ville Syrjälä, Jani Nikula, Paul Menzel, Jonathan Cavitt, intel-gfx, intel-xe, dri-devel Hi Thomas, Maxime, Maarten, the patch this change fixes (commit a40c5d727b81) was merged via drm-intel and is also part of v6.16-rc4 (there cherry-picked in commit a3ef3c2da675). Are you ok with merging this fix via drm-intel as well, so that it could be still merged to v6.16 before that's released? Thanks, Imre On Wed, Jul 09, 2025 at 12:23:31AM +0300, Imre Deak wrote: > Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from > DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for > DPCD probing, since this results in link training failures at least when > using an Intel Barlow Ridge TBT hub at UHBR link rates (the > DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed > link training). Since accessing DPCD_REV during link training is > prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, > as it falls within the Standard's valid register address range > (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link > training on the above TBT hub. > > However, reading the LANE0_1_STATUS register also has a side-effect at > least on a Novatek eDP panel, as reported on the Closes: link below, > resulting in screen flickering on that panel. One clear side-effect when > doing the 1-byte probe reads from LANE0_1_STATUS during link training > before reading out the full 6 byte link status starting at the same > address is that the panel will report the link training as completed > with voltage swing 0. This is different from the normal, flicker-free > scenario when no DPCD probing is done, the panel reporting the link > training complete with voltage swing 2. > > Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have > the above side-effect, the panel will link train with voltage swing 2 as > expected and it will stay flicker-free. This register is also in the > above valid register range and is unlikely to have a side-effect as that > of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training > CR/EQ sequences and so it may cause a state change in the sink - even if > inadvertently as I suspect in the case of the above Novatek panel. As > opposed to this, reading TRAINING_PATTERN_SET is not part of the link > training sequence (it must be only written once at the beginning of the > CR/EQ sequences), so it's unlikely to cause any state change in the > sink. > > As a side-note, this Novatek panel also lacks support for TPS3, while > claiming support for HBR2, which violates the DP Standard (the Standard > mandating TPS3 for HBR2). > > Besides the Novatek panel (PSR 1), which this change fixes, I also > verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP > panel as well as on the Intel Barlow Ridge TBT hub. > > Note that in the drm-tip tree (targeting the v6.17 kernel version) the > i915 and xe drivers keep DPCD probing enabled only for the panel known > to require this (HP ZR24w), hence those drivers in drm-tip are not > affected by the above problem. > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") > Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/display/drm_dp_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > index 1c3920297906b..1ecc3df7e3167 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, > int ret; > > if (dpcd_access_needs_probe(aux)) { > - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); > + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); > if (ret < 0) > return ret; > } > -- > 2.44.2 > ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-10 11:28 ` Imre Deak @ 2025-07-14 8:57 ` Imre Deak 2025-07-14 9:00 ` Thomas Zimmermann 0 siblings, 1 reply; 13+ messages in thread From: Imre Deak @ 2025-07-14 8:57 UTC (permalink / raw) To: Thomas Zimmermann, Maxime Ripard, Maarten Lankhorst, Ville Syrjälä, Jani Nikula, Paul Menzel, Jonathan Cavitt, intel-gfx, intel-xe, dri-devel Hi, On Thu, Jul 10, 2025 at 02:28:28PM +0300, Imre Deak wrote: > Hi Thomas, Maxime, Maarten, > > the patch this change fixes (commit a40c5d727b81) was merged via > drm-intel and is also part of v6.16-rc4 (there cherry-picked in commit > a3ef3c2da675). > > Are you ok with merging this fix via drm-intel as well, so that it could > be still merged to v6.16 before that's released? any objections to merging this patch to drm-intel? If not, could someone ack it? Thanks, Imre > > Thanks, > Imre > > On Wed, Jul 09, 2025 at 12:23:31AM +0300, Imre Deak wrote: > > Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from > > DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for > > DPCD probing, since this results in link training failures at least when > > using an Intel Barlow Ridge TBT hub at UHBR link rates (the > > DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed > > link training). Since accessing DPCD_REV during link training is > > prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, > > as it falls within the Standard's valid register address range > > (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link > > training on the above TBT hub. > > > > However, reading the LANE0_1_STATUS register also has a side-effect at > > least on a Novatek eDP panel, as reported on the Closes: link below, > > resulting in screen flickering on that panel. One clear side-effect when > > doing the 1-byte probe reads from LANE0_1_STATUS during link training > > before reading out the full 6 byte link status starting at the same > > address is that the panel will report the link training as completed > > with voltage swing 0. This is different from the normal, flicker-free > > scenario when no DPCD probing is done, the panel reporting the link > > training complete with voltage swing 2. > > > > Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have > > the above side-effect, the panel will link train with voltage swing 2 as > > expected and it will stay flicker-free. This register is also in the > > above valid register range and is unlikely to have a side-effect as that > > of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training > > CR/EQ sequences and so it may cause a state change in the sink - even if > > inadvertently as I suspect in the case of the above Novatek panel. As > > opposed to this, reading TRAINING_PATTERN_SET is not part of the link > > training sequence (it must be only written once at the beginning of the > > CR/EQ sequences), so it's unlikely to cause any state change in the > > sink. > > > > As a side-note, this Novatek panel also lacks support for TPS3, while > > claiming support for HBR2, which violates the DP Standard (the Standard > > mandating TPS3 for HBR2). > > > > Besides the Novatek panel (PSR 1), which this change fixes, I also > > verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP > > panel as well as on the Intel Barlow Ridge TBT hub. > > > > Note that in the drm-tip tree (targeting the v6.17 kernel version) the > > i915 and xe drivers keep DPCD probing enabled only for the panel known > > to require this (HP ZR24w), hence those drivers in drm-tip are not > > affected by the above problem. > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Cc: Jani Nikula <jani.nikula@linux.intel.com> > > Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") > > Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> > > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > --- > > drivers/gpu/drm/display/drm_dp_helper.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > > index 1c3920297906b..1ecc3df7e3167 100644 > > --- a/drivers/gpu/drm/display/drm_dp_helper.c > > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > > @@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, > > int ret; > > > > if (dpcd_access_needs_probe(aux)) { > > - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); > > + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); > > if (ret < 0) > > return ret; > > } > > -- > > 2.44.2 > > ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-14 8:57 ` Imre Deak @ 2025-07-14 9:00 ` Thomas Zimmermann 2025-07-14 20:06 ` Imre Deak 0 siblings, 1 reply; 13+ messages in thread From: Thomas Zimmermann @ 2025-07-14 9:00 UTC (permalink / raw) To: imre.deak, Maxime Ripard, Maarten Lankhorst, Ville Syrjälä, Jani Nikula, Paul Menzel, Jonathan Cavitt, intel-gfx, intel-xe, dri-devel Am 14.07.25 um 10:57 schrieb Imre Deak: > Hi, > > On Thu, Jul 10, 2025 at 02:28:28PM +0300, Imre Deak wrote: >> Hi Thomas, Maxime, Maarten, >> >> the patch this change fixes (commit a40c5d727b81) was merged via >> drm-intel and is also part of v6.16-rc4 (there cherry-picked in commit >> a3ef3c2da675). >> >> Are you ok with merging this fix via drm-intel as well, so that it could >> be still merged to v6.16 before that's released? > any objections to merging this patch to drm-intel? If not, could someone > ack it? Sure, a-b me. Best regards Thomas > > Thanks, > Imre > >> Thanks, >> Imre >> >> On Wed, Jul 09, 2025 at 12:23:31AM +0300, Imre Deak wrote: >>> Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from >>> DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for >>> DPCD probing, since this results in link training failures at least when >>> using an Intel Barlow Ridge TBT hub at UHBR link rates (the >>> DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed >>> link training). Since accessing DPCD_REV during link training is >>> prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, >>> as it falls within the Standard's valid register address range >>> (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link >>> training on the above TBT hub. >>> >>> However, reading the LANE0_1_STATUS register also has a side-effect at >>> least on a Novatek eDP panel, as reported on the Closes: link below, >>> resulting in screen flickering on that panel. One clear side-effect when >>> doing the 1-byte probe reads from LANE0_1_STATUS during link training >>> before reading out the full 6 byte link status starting at the same >>> address is that the panel will report the link training as completed >>> with voltage swing 0. This is different from the normal, flicker-free >>> scenario when no DPCD probing is done, the panel reporting the link >>> training complete with voltage swing 2. >>> >>> Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have >>> the above side-effect, the panel will link train with voltage swing 2 as >>> expected and it will stay flicker-free. This register is also in the >>> above valid register range and is unlikely to have a side-effect as that >>> of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training >>> CR/EQ sequences and so it may cause a state change in the sink - even if >>> inadvertently as I suspect in the case of the above Novatek panel. As >>> opposed to this, reading TRAINING_PATTERN_SET is not part of the link >>> training sequence (it must be only written once at the beginning of the >>> CR/EQ sequences), so it's unlikely to cause any state change in the >>> sink. >>> >>> As a side-note, this Novatek panel also lacks support for TPS3, while >>> claiming support for HBR2, which violates the DP Standard (the Standard >>> mandating TPS3 for HBR2). >>> >>> Besides the Novatek panel (PSR 1), which this change fixes, I also >>> verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP >>> panel as well as on the Intel Barlow Ridge TBT hub. >>> >>> Note that in the drm-tip tree (targeting the v6.17 kernel version) the >>> i915 and xe drivers keep DPCD probing enabled only for the panel known >>> to require this (HP ZR24w), hence those drivers in drm-tip are not >>> affected by the above problem. >>> >>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >>> Cc: Jani Nikula <jani.nikula@linux.intel.com> >>> Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") >>> Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> >>> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 >>> Signed-off-by: Imre Deak <imre.deak@intel.com> >>> --- >>> drivers/gpu/drm/display/drm_dp_helper.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c >>> index 1c3920297906b..1ecc3df7e3167 100644 >>> --- a/drivers/gpu/drm/display/drm_dp_helper.c >>> +++ b/drivers/gpu/drm/display/drm_dp_helper.c >>> @@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, >>> int ret; >>> >>> if (dpcd_access_needs_probe(aux)) { >>> - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); >>> + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); >>> if (ret < 0) >>> return ret; >>> } >>> -- >>> 2.44.2 >>> -- -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Frankenstrasse 146, 90461 Nuernberg, Germany GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman HRB 36809 (AG Nuernberg) ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-14 9:00 ` Thomas Zimmermann @ 2025-07-14 20:06 ` Imre Deak 2025-07-15 13:42 ` Rodrigo Vivi 0 siblings, 1 reply; 13+ messages in thread From: Imre Deak @ 2025-07-14 20:06 UTC (permalink / raw) To: Thomas Zimmermann, Rodrigo Vivi, Joonas Lahtinen Cc: Maxime Ripard, Maarten Lankhorst, Ville Syrjälä, Jani Nikula, Paul Menzel, Jonathan Cavitt, intel-gfx, intel-xe, dri-devel [-- Attachment #1: Type: text/plain, Size: 5499 bytes --] On Mon, Jul 14, 2025 at 11:00:08AM +0200, Thomas Zimmermann wrote: > > Am 14.07.25 um 10:57 schrieb Imre Deak: > > Hi, > > > > On Thu, Jul 10, 2025 at 02:28:28PM +0300, Imre Deak wrote: > > > Hi Thomas, Maxime, Maarten, > > > > > > the patch this change fixes (commit a40c5d727b81) was merged via > > > drm-intel and is also part of v6.16-rc4 (there cherry-picked in commit > > > a3ef3c2da675). > > > > > > Are you ok with merging this fix via drm-intel as well, so that it could > > > be still merged to v6.16 before that's released? > > any objections to merging this patch to drm-intel? If not, could someone > > ack it? > > Sure, a-b me. Ok, thanks. I pushed the patch to drm-intel-next, thanks for the report, testing, review and ack. I'd like to request that this patch be applied to drm-intel-fixes as well, so that it can still make it to v6.16. To do that, the change needs to be rebased on drm-intel-fixes, I attached the corresponding patch. Thanks, Imre > Best regards > Thomas > > > > > Thanks, > > Imre > > > > > Thanks, > > > Imre > > > > > > On Wed, Jul 09, 2025 at 12:23:31AM +0300, Imre Deak wrote: > > > > Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from > > > > DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for > > > > DPCD probing, since this results in link training failures at least when > > > > using an Intel Barlow Ridge TBT hub at UHBR link rates (the > > > > DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed > > > > link training). Since accessing DPCD_REV during link training is > > > > prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, > > > > as it falls within the Standard's valid register address range > > > > (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link > > > > training on the above TBT hub. > > > > > > > > However, reading the LANE0_1_STATUS register also has a side-effect at > > > > least on a Novatek eDP panel, as reported on the Closes: link below, > > > > resulting in screen flickering on that panel. One clear side-effect when > > > > doing the 1-byte probe reads from LANE0_1_STATUS during link training > > > > before reading out the full 6 byte link status starting at the same > > > > address is that the panel will report the link training as completed > > > > with voltage swing 0. This is different from the normal, flicker-free > > > > scenario when no DPCD probing is done, the panel reporting the link > > > > training complete with voltage swing 2. > > > > > > > > Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have > > > > the above side-effect, the panel will link train with voltage swing 2 as > > > > expected and it will stay flicker-free. This register is also in the > > > > above valid register range and is unlikely to have a side-effect as that > > > > of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training > > > > CR/EQ sequences and so it may cause a state change in the sink - even if > > > > inadvertently as I suspect in the case of the above Novatek panel. As > > > > opposed to this, reading TRAINING_PATTERN_SET is not part of the link > > > > training sequence (it must be only written once at the beginning of the > > > > CR/EQ sequences), so it's unlikely to cause any state change in the > > > > sink. > > > > > > > > As a side-note, this Novatek panel also lacks support for TPS3, while > > > > claiming support for HBR2, which violates the DP Standard (the Standard > > > > mandating TPS3 for HBR2). > > > > > > > > Besides the Novatek panel (PSR 1), which this change fixes, I also > > > > verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP > > > > panel as well as on the Intel Barlow Ridge TBT hub. > > > > > > > > Note that in the drm-tip tree (targeting the v6.17 kernel version) the > > > > i915 and xe drivers keep DPCD probing enabled only for the panel known > > > > to require this (HP ZR24w), hence those drivers in drm-tip are not > > > > affected by the above problem. > > > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Cc: Jani Nikula <jani.nikula@linux.intel.com> > > > > Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") > > > > Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> > > > > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 > > > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > > > --- > > > > drivers/gpu/drm/display/drm_dp_helper.c | 2 +- > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > > > > index 1c3920297906b..1ecc3df7e3167 100644 > > > > --- a/drivers/gpu/drm/display/drm_dp_helper.c > > > > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > > > > @@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, > > > > int ret; > > > > if (dpcd_access_needs_probe(aux)) { > > > > - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); > > > > + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); > > > > if (ret < 0) > > > > return ret; > > > > } > > > > -- > > > > 2.44.2 > > > > > > -- > -- > Thomas Zimmermann > Graphics Driver Developer > SUSE Software Solutions Germany GmbH > Frankenstrasse 146, 90461 Nuernberg, Germany > GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman > HRB 36809 (AG Nuernberg) > [-- Attachment #2: 0001-drm-dp-Change-AUX-DPCD-probe-address-from-LANE0_1_ST.patch --] [-- Type: text/x-diff, Size: 4222 bytes --] From d468740cb8688070ebbd534c2849b49729ae2af8 Mon Sep 17 00:00:00 2001 From: Imre Deak <imre.deak@intel.com> Date: Wed, 9 Jul 2025 00:23:31 +0300 Subject: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for DPCD probing, since this results in link training failures at least when using an Intel Barlow Ridge TBT hub at UHBR link rates (the DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed link training). Since accessing DPCD_REV during link training is prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, as it falls within the Standard's valid register address range (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link training on the above TBT hub. However, reading the LANE0_1_STATUS register also has a side-effect at least on a Novatek eDP panel, as reported on the Closes: link below, resulting in screen flickering on that panel. One clear side-effect when doing the 1-byte probe reads from LANE0_1_STATUS during link training before reading out the full 6 byte link status starting at the same address is that the panel will report the link training as completed with voltage swing 0. This is different from the normal, flicker-free scenario when no DPCD probing is done, the panel reporting the link training complete with voltage swing 2. Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have the above side-effect, the panel will link train with voltage swing 2 as expected and it will stay flicker-free. This register is also in the above valid register range and is unlikely to have a side-effect as that of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training CR/EQ sequences and so it may cause a state change in the sink - even if inadvertently as I suspect in the case of the above Novatek panel. As opposed to this, reading TRAINING_PATTERN_SET is not part of the link training sequence (it must be only written once at the beginning of the CR/EQ sequences), so it's unlikely to cause any state change in the sink. As a side-note, this Novatek panel also lacks support for TPS3, while claiming support for HBR2, which violates the DP Standard (the Standard mandating TPS3 for HBR2). Besides the Novatek panel (PSR 1), which this change fixes, I also verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP panel as well as on the Intel Barlow Ridge TBT hub. Note that in the drm-tip tree (targeting the v6.17 kernel version) the i915 and xe drivers keep DPCD probing enabled only for the panel known to require this (HP ZR24w), hence those drivers in drm-tip are not affected by the above problem. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> Link: https://lore.kernel.org/r/20250708212331.112898-1-imre.deak@intel.com (cherry picked from commit bba9aa41654036534d86b198f5647a9ce15ebd7f) [Imre: Rebased on drm-intel-fixes] Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/display/drm_dp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c index dc622c78db9d..ea78c6c8ca7a 100644 --- a/drivers/gpu/drm/display/drm_dp_helper.c +++ b/drivers/gpu/drm/display/drm_dp_helper.c @@ -725,7 +725,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, * monitor doesn't power down exactly after the throw away read. */ if (!aux->is_remote) { - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); if (ret < 0) return ret; } -- 2.44.2 ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET 2025-07-14 20:06 ` Imre Deak @ 2025-07-15 13:42 ` Rodrigo Vivi 0 siblings, 0 replies; 13+ messages in thread From: Rodrigo Vivi @ 2025-07-15 13:42 UTC (permalink / raw) To: Imre Deak Cc: Thomas Zimmermann, Joonas Lahtinen, Maxime Ripard, Maarten Lankhorst, Ville Syrjälä, Jani Nikula, Paul Menzel, Jonathan Cavitt, intel-gfx, intel-xe, dri-devel On Mon, Jul 14, 2025 at 11:06:52PM +0300, Imre Deak wrote: > On Mon, Jul 14, 2025 at 11:00:08AM +0200, Thomas Zimmermann wrote: > > > > Am 14.07.25 um 10:57 schrieb Imre Deak: > > > Hi, > > > > > > On Thu, Jul 10, 2025 at 02:28:28PM +0300, Imre Deak wrote: > > > > Hi Thomas, Maxime, Maarten, > > > > > > > > the patch this change fixes (commit a40c5d727b81) was merged via > > > > drm-intel and is also part of v6.16-rc4 (there cherry-picked in commit > > > > a3ef3c2da675). > > > > > > > > Are you ok with merging this fix via drm-intel as well, so that it could > > > > be still merged to v6.16 before that's released? > > > any objections to merging this patch to drm-intel? If not, could someone > > > ack it? > > > > Sure, a-b me. > > Ok, thanks. > > I pushed the patch to drm-intel-next, thanks for the report, testing, > review and ack. > > I'd like to request that this patch be applied to drm-intel-fixes as > well, so that it can still make it to v6.16. To do that, the change > needs to be rebased on drm-intel-fixes, I attached the corresponding > patch. pushed to drm-intel-fixes. Thanks for the backport > > Thanks, > Imre > > > Best regards > > Thomas > > > > > > > > Thanks, > > > Imre > > > > > > > Thanks, > > > > Imre > > > > > > > > On Wed, Jul 09, 2025 at 12:23:31AM +0300, Imre Deak wrote: > > > > > Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from > > > > > DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for > > > > > DPCD probing, since this results in link training failures at least when > > > > > using an Intel Barlow Ridge TBT hub at UHBR link rates (the > > > > > DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed > > > > > link training). Since accessing DPCD_REV during link training is > > > > > prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, > > > > > as it falls within the Standard's valid register address range > > > > > (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link > > > > > training on the above TBT hub. > > > > > > > > > > However, reading the LANE0_1_STATUS register also has a side-effect at > > > > > least on a Novatek eDP panel, as reported on the Closes: link below, > > > > > resulting in screen flickering on that panel. One clear side-effect when > > > > > doing the 1-byte probe reads from LANE0_1_STATUS during link training > > > > > before reading out the full 6 byte link status starting at the same > > > > > address is that the panel will report the link training as completed > > > > > with voltage swing 0. This is different from the normal, flicker-free > > > > > scenario when no DPCD probing is done, the panel reporting the link > > > > > training complete with voltage swing 2. > > > > > > > > > > Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have > > > > > the above side-effect, the panel will link train with voltage swing 2 as > > > > > expected and it will stay flicker-free. This register is also in the > > > > > above valid register range and is unlikely to have a side-effect as that > > > > > of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training > > > > > CR/EQ sequences and so it may cause a state change in the sink - even if > > > > > inadvertently as I suspect in the case of the above Novatek panel. As > > > > > opposed to this, reading TRAINING_PATTERN_SET is not part of the link > > > > > training sequence (it must be only written once at the beginning of the > > > > > CR/EQ sequences), so it's unlikely to cause any state change in the > > > > > sink. > > > > > > > > > > As a side-note, this Novatek panel also lacks support for TPS3, while > > > > > claiming support for HBR2, which violates the DP Standard (the Standard > > > > > mandating TPS3 for HBR2). > > > > > > > > > > Besides the Novatek panel (PSR 1), which this change fixes, I also > > > > > verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP > > > > > panel as well as on the Intel Barlow Ridge TBT hub. > > > > > > > > > > Note that in the drm-tip tree (targeting the v6.17 kernel version) the > > > > > i915 and xe drivers keep DPCD probing enabled only for the panel known > > > > > to require this (HP ZR24w), hence those drivers in drm-tip are not > > > > > affected by the above problem. > > > > > > > > > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > > Cc: Jani Nikula <jani.nikula@linux.intel.com> > > > > > Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") > > > > > Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> > > > > > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com> > > > > > --- > > > > > drivers/gpu/drm/display/drm_dp_helper.c | 2 +- > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > > > > > index 1c3920297906b..1ecc3df7e3167 100644 > > > > > --- a/drivers/gpu/drm/display/drm_dp_helper.c > > > > > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > > > > > @@ -742,7 +742,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, > > > > > int ret; > > > > > if (dpcd_access_needs_probe(aux)) { > > > > > - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); > > > > > + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); > > > > > if (ret < 0) > > > > > return ret; > > > > > } > > > > > -- > > > > > 2.44.2 > > > > > > > > > -- > > -- > > Thomas Zimmermann > > Graphics Driver Developer > > SUSE Software Solutions Germany GmbH > > Frankenstrasse 146, 90461 Nuernberg, Germany > > GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman > > HRB 36809 (AG Nuernberg) > > > From d468740cb8688070ebbd534c2849b49729ae2af8 Mon Sep 17 00:00:00 2001 > From: Imre Deak <imre.deak@intel.com> > Date: Wed, 9 Jul 2025 00:23:31 +0300 > Subject: [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to > TRAINING_PATTERN_SET > MIME-Version: 1.0 > Content-Type: text/plain; charset=UTF-8 > Content-Transfer-Encoding: 8bit > > Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from > DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for > DPCD probing, since this results in link training failures at least when > using an Intel Barlow Ridge TBT hub at UHBR link rates (the > DP_INTRA_HOP_AUX_REPLY_INDICATION never getting cleared after the failed > link training). Since accessing DPCD_REV during link training is > prohibited by the DP Standard, LANE0_1_STATUS (0x202) was used instead, > as it falls within the Standard's valid register address range > (0x102-0x106, 0x202-0x207, 0x200c-0x200f, 0x2216) and it fixed the link > training on the above TBT hub. > > However, reading the LANE0_1_STATUS register also has a side-effect at > least on a Novatek eDP panel, as reported on the Closes: link below, > resulting in screen flickering on that panel. One clear side-effect when > doing the 1-byte probe reads from LANE0_1_STATUS during link training > before reading out the full 6 byte link status starting at the same > address is that the panel will report the link training as completed > with voltage swing 0. This is different from the normal, flicker-free > scenario when no DPCD probing is done, the panel reporting the link > training complete with voltage swing 2. > > Using the TRAINING_PATTERN_SET register for DPCD probing doesn't have > the above side-effect, the panel will link train with voltage swing 2 as > expected and it will stay flicker-free. This register is also in the > above valid register range and is unlikely to have a side-effect as that > of LANE0_1_STATUS: Reading LANE0_1_STATUS is part of the link training > CR/EQ sequences and so it may cause a state change in the sink - even if > inadvertently as I suspect in the case of the above Novatek panel. As > opposed to this, reading TRAINING_PATTERN_SET is not part of the link > training sequence (it must be only written once at the beginning of the > CR/EQ sequences), so it's unlikely to cause any state change in the > sink. > > As a side-note, this Novatek panel also lacks support for TPS3, while > claiming support for HBR2, which violates the DP Standard (the Standard > mandating TPS3 for HBR2). > > Besides the Novatek panel (PSR 1), which this change fixes, I also > verified the change on a Samsung (PSR 1) and an Analogix (PSR 2) eDP > panel as well as on the Intel Barlow Ridge TBT hub. > > Note that in the drm-tip tree (targeting the v6.17 kernel version) the > i915 and xe drivers keep DPCD probing enabled only for the panel known > to require this (HP ZR24w), hence those drivers in drm-tip are not > affected by the above problem. > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Fixes: a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from DPCD_REV to LANE0_1_STATUS") > Reported-and-tested-by: Paul Menzel <pmenzel@molgen.mpg.de> > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14558 > Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> > Acked-by: Thomas Zimmermann <tzimmermann@suse.de> > Link: https://lore.kernel.org/r/20250708212331.112898-1-imre.deak@intel.com > (cherry picked from commit bba9aa41654036534d86b198f5647a9ce15ebd7f) > [Imre: Rebased on drm-intel-fixes] > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/display/drm_dp_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > index dc622c78db9d..ea78c6c8ca7a 100644 > --- a/drivers/gpu/drm/display/drm_dp_helper.c > +++ b/drivers/gpu/drm/display/drm_dp_helper.c > @@ -725,7 +725,7 @@ ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, > * monitor doesn't power down exactly after the throw away read. > */ > if (!aux->is_remote) { > - ret = drm_dp_dpcd_probe(aux, DP_LANE0_1_STATUS); > + ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET); > if (ret < 0) > return ret; > } > -- > 2.44.2 > ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2025-07-15 13:42 UTC | newest] Thread overview: 13+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-07-08 21:23 [PATCH] drm/dp: Change AUX DPCD probe address from LANE0_1_STATUS to TRAINING_PATTERN_SET Imre Deak 2025-07-08 21:55 ` Cavitt, Jonathan 2025-07-09 11:32 ` Imre Deak 2025-07-08 21:58 ` ✓ CI.KUnit: success for " Patchwork 2025-07-08 22:35 ` ✓ Xe.CI.BAT: " Patchwork 2025-07-09 2:51 ` ✗ Xe.CI.Full: failure " Patchwork 2025-07-09 5:57 ` [PATCH] " Paul Menzel 2025-07-09 12:39 ` Imre Deak 2025-07-10 11:28 ` Imre Deak 2025-07-14 8:57 ` Imre Deak 2025-07-14 9:00 ` Thomas Zimmermann 2025-07-14 20:06 ` Imre Deak 2025-07-15 13:42 ` Rodrigo Vivi
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