* [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels
@ 2025-07-23 7:45 Simon Richter
2025-07-23 7:45 ` [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes Simon Richter
` (7 more replies)
0 siblings, 8 replies; 21+ messages in thread
From: Simon Richter @ 2025-07-23 7:45 UTC (permalink / raw)
To: intel-xe; +Cc: jeffbai, Simon Richter
Hi,
since this needed a rebase for the disappearance of bo->size, I've gone
ahead and done that (one line removed from Mingcong Bai's original patch
series).
There is only one thing that might need looking into: this will still fail
if kernel pages are larger than 64k. I'm not aware of any platform where
that is the case though.
Simon
Mingcong Bai (5):
drm/xe/bo: fix alignment with non-4KiB kernel page sizes
drm/xe/guc: use GUC_SIZE (SZ_4K) for alignment
drm/xe/regs: fix RING_CTL_SIZE(size) calculation
drm/xe: use 4KiB alignment for cursor jumps
drm/xe/query: use PAGE_SIZE as the minimum page alignment
drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +-
drivers/gpu/drm/xe/xe_bo.c | 6 ++---
drivers/gpu/drm/xe/xe_guc.c | 4 +--
drivers/gpu/drm/xe/xe_guc.h | 3 +++
drivers/gpu/drm/xe/xe_guc_ads.c | 32 ++++++++++++------------
drivers/gpu/drm/xe/xe_guc_capture.c | 8 +++---
drivers/gpu/drm/xe/xe_guc_ct.c | 2 +-
drivers/gpu/drm/xe/xe_guc_log.c | 5 ++--
drivers/gpu/drm/xe/xe_guc_pc.c | 4 +--
drivers/gpu/drm/xe/xe_migrate.c | 4 +--
drivers/gpu/drm/xe/xe_query.c | 2 +-
include/uapi/drm/xe_drm.h | 7 ++++--
12 files changed, 43 insertions(+), 36 deletions(-)
--
2.47.2
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes
2025-07-23 7:45 [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels Simon Richter
@ 2025-07-23 7:45 ` Simon Richter
2025-07-28 13:30 ` Rodrigo Vivi
2025-07-31 9:55 ` Mingcong Bai
2025-07-23 7:45 ` [PATCH v3 2/5] drm/xe/guc: use GUC_SIZE (SZ_4K) for alignment Simon Richter
` (6 subsequent siblings)
7 siblings, 2 replies; 21+ messages in thread
From: Simon Richter @ 2025-07-23 7:45 UTC (permalink / raw)
To: intel-xe
Cc: jeffbai, Simon Richter, stable, Wenbin Fang, Haien Liang,
Jianfeng Liu, Shirong Liu, Haofeng Wu, Shang Yatsen
From: Mingcong Bai <jeffbai@aosc.io>
The bo/ttm interfaces with kernel memory mapping from dedicated GPU
memory. It is not correct to assume that SZ_4K would suffice for page
alignment as there are a few hardware platforms that commonly uses non-
4KiB pages - for instance, 16KiB is the most commonly used kernel page
size used on Loongson devices (of the LoongArch architecture).
Per our testing, Intel Xe/Alchemist/Battlemage families of GPUs works on
Loongson platforms so long as "Above 4G Decoding" was enabled and
"Resizable BAR" was set to auto in the UEFI firmware settings.
Without this fix, the kernel will hang at a kernel BUG():
[ 7.425445] ------------[ cut here ]------------
[ 7.430032] kernel BUG at drivers/gpu/drm/drm_gem.c:181!
[ 7.435330] Oops - BUG[#1]:
[ 7.438099] CPU: 0 UID: 0 PID: 102 Comm: kworker/0:4 Tainted: G E 6.13.3-aosc-main-00336-g60829239b300-dirty #3
[ 7.449511] Tainted: [E]=UNSIGNED_MODULE
[ 7.453402] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab
[ 7.467144] Workqueue: events work_for_cpu_fn
[ 7.471472] pc 9000000001045fa4 ra ffff8000025331dc tp 90000001010c8000 sp 90000001010cb960
[ 7.479770] a0 900000012a3e8000 a1 900000010028c000 a2 000000000005d000 a3 0000000000000000
[ 7.488069] a4 0000000000000000 a5 0000000000000000 a6 0000000000000000 a7 0000000000000001
[ 7.496367] t0 0000000000001000 t1 9000000001045000 t2 0000000000000000 t3 0000000000000000
[ 7.504665] t4 0000000000000000 t5 0000000000000000 t6 0000000000000000 t7 0000000000000000
[ 7.504667] t8 0000000000000000 u0 90000000029ea7d8 s9 900000012a3e9360 s0 900000010028c000
[ 7.504668] s1 ffff800002744000 s2 0000000000000000 s3 0000000000000000 s4 0000000000000001
[ 7.504669] s5 900000012a3e8000 s6 0000000000000001 s7 0000000000022022 s8 0000000000000000
[ 7.537855] ra: ffff8000025331dc ___xe_bo_create_locked+0x158/0x3b0 [xe]
[ 7.544893] ERA: 9000000001045fa4 drm_gem_private_object_init+0xcc/0xd0
[ 7.551639] CRMD: 000000b0 (PLV0 -IE -DA +PG DACF=CC DACM=CC -WE)
[ 7.557785] PRMD: 00000004 (PPLV0 +PIE -PWE)
[ 7.562111] EUEN: 00000000 (-FPE -SXE -ASXE -BTE)
[ 7.566870] ECFG: 00071c1d (LIE=0,2-4,10-12 VS=7)
[ 7.571628] ESTAT: 000c0000 [BRK] (IS= ECode=12 EsubCode=0)
[ 7.577163] PRID: 0014d000 (Loongson-64bit, Loongson-3A6000-HV)
[ 7.583128] Modules linked in: xe(E+) drm_gpuvm(E) drm_exec(E) drm_buddy(E) gpu_sched(E) drm_suballoc_helper(E) drm_display_helper(E) loongson(E) r8169(E) cec(E) rc_core(E) realtek(E) i2c_algo_bit(E) tpm_tis_spi(E) led_class(E) hid_generic(E) drm_ttm_helper(E) ttm(E) drm_client_lib(E) drm_kms_helper(E) sunrpc(E) la_ow_syscall(E) i2c_dev(E)
[ 7.613049] Process kworker/0:4 (pid: 102, threadinfo=00000000bc26ebd1, task=0000000055480707)
[ 7.621606] Stack : 0000000000000000 3030303a6963702b 000000000005d000 0000000000000000
[ 7.629563] 0000000000000001 0000000000000000 0000000000000000 8e1bfae42b2f7877
[ 7.637519] 000000000005d000 900000012a3e8000 900000012a3e9360 0000000000000000
[ 7.645475] ffffffffffffffff 0000000000000000 0000000000022022 0000000000000000
[ 7.653431] 0000000000000001 ffff800002533660 0000000000022022 9000000000234470
[ 7.661386] 90000001010cba28 0000000000001000 0000000000000000 000000000005c300
[ 7.669342] 900000012a3e8000 0000000000000000 0000000000000001 900000012a3e8000
[ 7.677298] ffffffffffffffff 0000000000022022 900000012a3e9498 ffff800002533a14
[ 7.685254] 0000000000022022 0000000000000000 900000000209c000 90000000010589e0
[ 7.693209] 90000001010cbab8 ffff8000027c78c0 fffffffffffff000 900000012a3e8000
[ 7.701165] ...
[ 7.703588] Call Trace:
[ 7.703590] [<9000000001045fa4>] drm_gem_private_object_init+0xcc/0xd0
[ 7.712496] [<ffff8000025331d8>] ___xe_bo_create_locked+0x154/0x3b0 [xe]
[ 7.719268] [<ffff80000253365c>] __xe_bo_create_locked+0x228/0x304 [xe]
[ 7.725951] [<ffff800002533a10>] xe_bo_create_pin_map_at_aligned+0x70/0x1b0 [xe]
[ 7.733410] [<ffff800002533c7c>] xe_managed_bo_create_pin_map+0x34/0xcc [xe]
[ 7.740522] [<ffff800002533d58>] xe_managed_bo_create_from_data+0x44/0xb0 [xe]
[ 7.747807] [<ffff80000258d19c>] xe_uc_fw_init+0x3ec/0x904 [xe]
[ 7.753814] [<ffff80000254a478>] xe_guc_init+0x30/0x3dc [xe]
[ 7.759553] [<ffff80000258bc04>] xe_uc_init+0x20/0xf0 [xe]
[ 7.765121] [<ffff800002542abc>] xe_gt_init_hwconfig+0x5c/0xd0 [xe]
[ 7.771461] [<ffff800002537204>] xe_device_probe+0x240/0x588 [xe]
[ 7.777627] [<ffff800002575448>] xe_pci_probe+0x6c0/0xa6c [xe]
[ 7.783540] [<9000000000e9828c>] local_pci_probe+0x4c/0xb4
[ 7.788989] [<90000000002aa578>] work_for_cpu_fn+0x20/0x40
[ 7.794436] [<90000000002aeb50>] process_one_work+0x1a4/0x458
[ 7.800143] [<90000000002af5a0>] worker_thread+0x304/0x3fc
[ 7.805591] [<90000000002bacac>] kthread+0x114/0x138
[ 7.810520] [<9000000000241f64>] ret_from_kernel_thread+0x8/0xa4
[ 7.816489]
[ 7.817961] Code: 4c000020 29c3e2f9 53ff93ff <002a0001> 0015002c 03400000 02ff8063 29c04077 001500f7
[ 7.827651]
[ 7.829140] ---[ end trace 0000000000000000 ]---
Revise all instances of `SZ_4K' with `PAGE_SIZE' and revise the call to
`drm_gem_private_object_init()' in `*___xe_bo_create_locked()' (last call
before BUG()) to use `size_t aligned_size' calculated from `PAGE_SIZE' to
fix the above error.
Cc: <stable@vger.kernel.org>
Fixes: 4e03b584143e ("drm/xe/uapi: Reject bo creation of unaligned size")
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Tested-by: Mingcong Bai <jeffbai@aosc.io>
Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
Tested-by: Haien Liang <27873200@qq.com>
Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Tested-by: Shirong Liu <lsr1024@qq.com>
Tested-by: Haofeng Wu <s2600cw2@126.com>
Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
Link: https://t.me/c/1109254909/768552
Co-developed-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
---
drivers/gpu/drm/xe/xe_bo.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 00ce067d5fd3..649e6d0e05a1 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -1861,9 +1861,9 @@ struct xe_bo *___xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
flags |= XE_BO_FLAG_INTERNAL_64K;
alignment = align >> PAGE_SHIFT;
} else {
- aligned_size = ALIGN(size, SZ_4K);
+ aligned_size = ALIGN(size, PAGE_SIZE);
flags &= ~XE_BO_FLAG_INTERNAL_64K;
- alignment = SZ_4K >> PAGE_SHIFT;
+ alignment = PAGE_SIZE >> PAGE_SHIFT;
}
if (type == ttm_bo_type_device && aligned_size != size)
@@ -1887,7 +1887,7 @@ struct xe_bo *___xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
#endif
INIT_LIST_HEAD(&bo->vram_userfault_link);
- drm_gem_private_object_init(&xe->drm, &bo->ttm.base, size);
+ drm_gem_private_object_init(&xe->drm, &bo->ttm.base, aligned_size);
if (resv) {
ctx.allow_res_evict = !(flags & XE_BO_FLAG_NO_RESV_EVICT);
--
2.47.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 2/5] drm/xe/guc: use GUC_SIZE (SZ_4K) for alignment
2025-07-23 7:45 [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels Simon Richter
2025-07-23 7:45 ` [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes Simon Richter
@ 2025-07-23 7:45 ` Simon Richter
2025-07-28 13:36 ` Rodrigo Vivi
2025-07-23 7:45 ` [PATCH v3 3/5] drm/xe/regs: fix RING_CTL_SIZE(size) calculation Simon Richter
` (5 subsequent siblings)
7 siblings, 1 reply; 21+ messages in thread
From: Simon Richter @ 2025-07-23 7:45 UTC (permalink / raw)
To: intel-xe
Cc: jeffbai, Simon Richter, stable, Wenbin Fang, Haien Liang,
Jianfeng Liu, Shirong Liu, Haofeng Wu, Shang Yatsen
From: Mingcong Bai <jeffbai@aosc.io>
Per the "Firmware" chapter in "drm/xe Intel GFX Driver", as well as
"Volume 8: Command Stream Programming" in "Intel® Arc™ A-Series Graphics
and Intel Data Center GPU Flex Series Open-Source Programmer's Reference
Manual For the discrete GPUs code named "Alchemist" and "Arctic Sound-M""
and "Intel® Iris® Xe MAX Graphics Open Source Programmer's Reference
Manual For the 2020 Discrete GPU formerly named "DG1"":
"The RINGBUF register sets (defined in Memory Interface Registers) are
used to specify the ring buffer memory areas. The ring buffer must start
on a 4KB boundary and be allocated in linear memory. The length of any
one ring buffer is limited to 2MB."
The Graphics micro (μ) Controller (GuC) really expects command buffers
aligned to 4KiB boundaries.
Current implementation uses `PAGE_SIZE' as an assumed alignment reference
but 4KiB kernel page sizes is by no means a guarantee. On 16KiB-paged
kernels, this causes driver failures after loading the GuC firmware:
[ 7.398317] xe 0000:09:00.0: [drm] Found dg2/g10 (device ID 56a1) display version 13.00 stepping C0
[ 7.410429] xe 0000:09:00.0: [drm] Using GuC firmware from i915/dg2_guc_70.bin version 70.36.0
[ 10.719989] xe 0000:09:00.0: [drm] *ERROR* GT0: load failed: status = 0x800001EC, time = 3297ms, freq = 2400MHz (req 2400MHz), done = 0
[ 10.732106] xe 0000:09:00.0: [drm] *ERROR* GT0: load failed: status: Reset = 0, BootROM = 0x76, UKernel = 0x01, MIA = 0x00, Auth = 0x02
[ 10.744214] xe 0000:09:00.0: [drm] *ERROR* CRITICAL: Xe has declared device 0000:09:00.0 as wedged.
Please file a _new_ bug report at https://gitlab.freedesktop.org/drm/xe/kernel/issues/new
[ 10.828908] xe 0000:09:00.0: [drm] *ERROR* GT0: GuC mmio request 0x4100: no reply 0x4100
Correct this by defining `GUC_ALIGN' as `SZ_4K' in accordance with the
references above, and revising all instances of `PAGE_SIZE' as
`GUC_ALIGN'. Then, revise `PAGE_ALIGN()' calls as `ALIGN()' with
`GUC_ALIGN' as their second argument (overriding `PAGE_SIZE').
Cc: stable@vger.kernel.org
Fixes: 84d15f426110 ("drm/xe/guc: Add capture size check in GuC log buffer")
Fixes: 9c8c7a7e6f1f ("drm/xe/guc: Prepare GuC register list and update ADS size for error capture")
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Tested-by: Mingcong Bai <jeffbai@aosc.io>
Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
Tested-by: Haien Liang <27873200@qq.com>
Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Tested-by: Shirong Liu <lsr1024@qq.com>
Tested-by: Haofeng Wu <s2600cw2@126.com>
Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
Link: https://t.me/c/1109254909/768552
Co-developed-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
---
drivers/gpu/drm/xe/xe_guc.c | 4 ++--
drivers/gpu/drm/xe/xe_guc.h | 3 +++
drivers/gpu/drm/xe/xe_guc_ads.c | 32 ++++++++++++++---------------
drivers/gpu/drm/xe/xe_guc_capture.c | 8 ++++----
drivers/gpu/drm/xe/xe_guc_ct.c | 2 +-
drivers/gpu/drm/xe/xe_guc_log.c | 5 +++--
drivers/gpu/drm/xe/xe_guc_pc.c | 4 ++--
7 files changed, 31 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index b1d1d6da3758..7ff8586f1942 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -91,7 +91,7 @@ static u32 guc_ctl_feature_flags(struct xe_guc *guc)
static u32 guc_ctl_log_params_flags(struct xe_guc *guc)
{
- u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> PAGE_SHIFT;
+ u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> XE_PTE_SHIFT;
u32 flags;
#if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0)
@@ -144,7 +144,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc)
static u32 guc_ctl_ads_flags(struct xe_guc *guc)
{
- u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> PAGE_SHIFT;
+ u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> XE_PTE_SHIFT;
u32 flags = ads << GUC_ADS_ADDR_SHIFT;
return flags;
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 22cf019a11bf..b3d049bdc047 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -23,6 +23,9 @@
#define GUC_FIRMWARE_VER(guc) \
MAKE_GUC_VER_STRUCT((guc)->fw.versions.found[XE_UC_FW_VER_RELEASE])
+/* GuC really expects command buffers aligned to 4K boundaries. */
+#define GUC_ALIGN SZ_4K
+
struct drm_printer;
void xe_guc_comm_init_early(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index 131cfc56be00..6b5862615fd7 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -144,17 +144,17 @@ static size_t guc_ads_regset_size(struct xe_guc_ads *ads)
static size_t guc_ads_golden_lrc_size(struct xe_guc_ads *ads)
{
- return PAGE_ALIGN(ads->golden_lrc_size);
+ return ALIGN(ads->golden_lrc_size, GUC_ALIGN);
}
static u32 guc_ads_waklv_size(struct xe_guc_ads *ads)
{
- return PAGE_ALIGN(ads->ads_waklv_size);
+ return ALIGN(ads->ads_waklv_size, GUC_ALIGN);
}
static size_t guc_ads_capture_size(struct xe_guc_ads *ads)
{
- return PAGE_ALIGN(ads->capture_size);
+ return ALIGN(ads->capture_size, GUC_ALIGN);
}
static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)
@@ -169,7 +169,7 @@ static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)
static size_t guc_ads_private_data_size(struct xe_guc_ads *ads)
{
- return PAGE_ALIGN(ads_to_guc(ads)->fw.private_data_size);
+ return ALIGN(ads_to_guc(ads)->fw.private_data_size, GUC_ALIGN);
}
static size_t guc_ads_regset_offset(struct xe_guc_ads *ads)
@@ -184,7 +184,7 @@ static size_t guc_ads_golden_lrc_offset(struct xe_guc_ads *ads)
offset = guc_ads_regset_offset(ads) +
guc_ads_regset_size(ads);
- return PAGE_ALIGN(offset);
+ return ALIGN(offset, GUC_ALIGN);
}
static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads)
@@ -194,7 +194,7 @@ static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads)
offset = guc_ads_golden_lrc_offset(ads) +
guc_ads_golden_lrc_size(ads);
- return PAGE_ALIGN(offset);
+ return ALIGN(offset, GUC_ALIGN);
}
static size_t guc_ads_capture_offset(struct xe_guc_ads *ads)
@@ -204,7 +204,7 @@ static size_t guc_ads_capture_offset(struct xe_guc_ads *ads)
offset = guc_ads_waklv_offset(ads) +
guc_ads_waklv_size(ads);
- return PAGE_ALIGN(offset);
+ return ALIGN(offset, GUC_ALIGN);
}
static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads)
@@ -214,7 +214,7 @@ static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads)
offset = guc_ads_capture_offset(ads) +
guc_ads_capture_size(ads);
- return PAGE_ALIGN(offset);
+ return ALIGN(offset, GUC_ALIGN);
}
static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads)
@@ -224,7 +224,7 @@ static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads)
offset = guc_ads_um_queues_offset(ads) +
guc_ads_um_queues_size(ads);
- return PAGE_ALIGN(offset);
+ return ALIGN(offset, GUC_ALIGN);
}
static size_t guc_ads_size(struct xe_guc_ads *ads)
@@ -277,7 +277,7 @@ static size_t calculate_golden_lrc_size(struct xe_guc_ads *ads)
continue;
real_size = xe_gt_lrc_size(gt, class);
- alloc_size = PAGE_ALIGN(real_size);
+ alloc_size = ALIGN(real_size, GUC_ALIGN);
total_size += alloc_size;
}
@@ -647,12 +647,12 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)
offsetof(struct __guc_ads_blob, system_info));
/* first, set aside the first page for a capture_list with zero descriptors */
- total_size = PAGE_SIZE;
+ total_size = GUC_ALIGN;
if (!xe_guc_capture_getnullheader(guc, &ptr, &size))
xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), capture_offset, ptr, size);
null_ggtt = ads_ggtt + capture_offset;
- capture_offset += PAGE_SIZE;
+ capture_offset += GUC_ALIGN;
/*
* Populate capture list : at this point adps is already allocated and
@@ -716,10 +716,10 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)
}
}
- if (ads->capture_size != PAGE_ALIGN(total_size))
+ if (ads->capture_size != ALIGN(total_size, GUC_ALIGN))
xe_gt_dbg(gt, "Updated ADS capture size %d (was %d)\n",
- PAGE_ALIGN(total_size), ads->capture_size);
- return PAGE_ALIGN(total_size);
+ ALIGN(total_size, GUC_ALIGN), ads->capture_size);
+ return ALIGN(total_size, GUC_ALIGN);
}
static void guc_mmio_regset_write_one(struct xe_guc_ads *ads,
@@ -967,7 +967,7 @@ static void guc_golden_lrc_populate(struct xe_guc_ads *ads)
xe_gt_assert(gt, gt->default_lrc[class]);
real_size = xe_gt_lrc_size(gt, class);
- alloc_size = PAGE_ALIGN(real_size);
+ alloc_size = ALIGN(real_size, GUC_ALIGN);
total_size += alloc_size;
xe_map_memcpy_to(xe, ads_to_map(ads), offset,
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 859a3ba91be5..34e9ea9b2935 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -591,8 +591,8 @@ guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
return -ENODATA;
if (size)
- *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
- (num_regs * sizeof(struct guc_mmio_reg)));
+ *size = ALIGN((sizeof(struct guc_debug_capture_list)) +
+ (num_regs * sizeof(struct guc_mmio_reg)), GUC_ALIGN);
return 0;
}
@@ -739,7 +739,7 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
* sequence, that is, during the pre-hwconfig phase before we have
* the exact engine fusing info.
*/
- total_size = PAGE_SIZE; /* Pad a page in front for empty lists */
+ total_size = GUC_ALIGN; /* Pad a page in front for empty lists */
for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; i++) {
for (j = 0; j < GUC_CAPTURE_LIST_CLASS_MAX; j++) {
if (xe_guc_capture_getlistsize(guc, i,
@@ -759,7 +759,7 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
total_size += global_size;
}
- return PAGE_ALIGN(total_size);
+ return ALIGN(total_size, GUC_ALIGN);
}
static int guc_capture_output_size_est(struct xe_guc *guc)
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index b6acccfcd351..557c14b386fd 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -223,7 +223,7 @@ int xe_guc_ct_init_noalloc(struct xe_guc_ct *ct)
struct xe_gt *gt = ct_to_gt(ct);
int err;
- xe_gt_assert(gt, !(guc_ct_size() % PAGE_SIZE));
+ xe_gt_assert(gt, !(guc_ct_size() % GUC_ALIGN));
ct->g2h_wq = alloc_ordered_workqueue("xe-g2h-wq", WQ_MEM_RECLAIM);
if (!ct->g2h_wq)
diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
index c01ccb35dc75..becf74a28d90 100644
--- a/drivers/gpu/drm/xe/xe_guc_log.c
+++ b/drivers/gpu/drm/xe/xe_guc_log.c
@@ -15,6 +15,7 @@
#include "xe_force_wake.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
+#include "xe_guc.h"
#include "xe_map.h"
#include "xe_mmio.h"
#include "xe_module.h"
@@ -58,7 +59,7 @@ static size_t guc_log_size(void)
* | Capture logs |
* +===============================+ + CAPTURE_SIZE
*/
- return PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +
+ return GUC_ALIGN + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +
CAPTURE_BUFFER_SIZE;
}
@@ -328,7 +329,7 @@ u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type
u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type)
{
enum guc_log_buffer_type i;
- u32 offset = PAGE_SIZE;/* for the log_buffer_states */
+ u32 offset = GUC_ALIGN; /* for the log_buffer_states */
for (i = GUC_LOG_BUFFER_CRASH_DUMP; i < GUC_LOG_BUFFER_TYPE_MAX; ++i) {
if (i == type)
diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
index 68b192fe3b32..5a69b5682fc8 100644
--- a/drivers/gpu/drm/xe/xe_guc_pc.c
+++ b/drivers/gpu/drm/xe/xe_guc_pc.c
@@ -1190,7 +1190,7 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
{
struct xe_device *xe = pc_to_xe(pc);
struct xe_gt *gt = pc_to_gt(pc);
- u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
+ u32 size = ALIGN(sizeof(struct slpc_shared_data), GUC_ALIGN);
unsigned int fw_ref;
ktime_t earlier;
int ret;
@@ -1318,7 +1318,7 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
struct xe_tile *tile = gt_to_tile(gt);
struct xe_device *xe = gt_to_xe(gt);
struct xe_bo *bo;
- u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
+ u32 size = ALIGN(sizeof(struct slpc_shared_data), GUC_ALIGN);
int err;
if (xe->info.skip_guc_pc)
--
2.47.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 3/5] drm/xe/regs: fix RING_CTL_SIZE(size) calculation
2025-07-23 7:45 [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels Simon Richter
2025-07-23 7:45 ` [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes Simon Richter
2025-07-23 7:45 ` [PATCH v3 2/5] drm/xe/guc: use GUC_SIZE (SZ_4K) for alignment Simon Richter
@ 2025-07-23 7:45 ` Simon Richter
2025-07-28 13:40 ` Rodrigo Vivi
2025-07-23 7:45 ` [PATCH v3 4/5] drm/xe: use 4KiB alignment for cursor jumps Simon Richter
` (4 subsequent siblings)
7 siblings, 1 reply; 21+ messages in thread
From: Simon Richter @ 2025-07-23 7:45 UTC (permalink / raw)
To: intel-xe
Cc: jeffbai, Simon Richter, stable, Wenbin Fang, Haien Liang,
Jianfeng Liu, Shirong Liu, Haofeng Wu, Shang Yatsen
From: Mingcong Bai <jeffbai@aosc.io>
Similar to the preceding patch for GuC (and with the same references),
Intel GPUs expects command buffers to align to 4KiB boundaries.
Current code uses `PAGE_SIZE' as an assumed alignment reference but 4KiB
kernel page sizes is by no means a guarantee. On 16KiB-paged kernels, this
causes driver failures during boot up:
[ 14.018975] ------------[ cut here ]------------
[ 14.023562] xe 0000:09:00.0: [drm] GT0: Kernel-submitted job timed out
[ 14.030084] WARNING: CPU: 3 PID: 564 at drivers/gpu/drm/xe/xe_guc_submit.c:1181 guc_exec_queue_timedout_job+0x1c0/0xacc [xe]
[ 14.041300] Modules linked in: nf_conntrack_netbios_ns(E) nf_conntrack_broadcast(E) nft_fib_inet(E) nft_fib_ipv4(E) nft_fib_ipv6(E) nft_fib(E) nft_reject_inet(E) nf_reject_ipv4(E) nf_reject_ipv6(E) nft_reject(E) nft_ct(E) nft_chain_nat(E) ip6table_nat(E) ip6table_mangle(E) ip6table_raw(E) ip6table_security(E) iptable_nat(E) nf_nat(E) nf_conntrack(E) nf_defrag_ipv6(E) nf_defrag_ipv4(E) rfkill(E) iptable_mangle(E) iptable_raw(E) iptable_security(E) ip_set(E) nf_tables(E) ip6table_filter(E) ip6_tables(E) iptable_filter(E) snd_hda_codec_conexant(E) snd_hda_codec_generic(E) snd_hda_codec_hdmi(E) nls_iso8859_1(E) snd_hda_intel(E) snd_intel_dspcfg(E) qrtr(E) nls_cp437(E) snd_hda_codec(E) spi_loongson_pci(E) rtc_efi(E) snd_hda_core(E) loongson3_cpufreq(E) spi_loongson_core(E) snd_hwdep(E) snd_pcm(E) snd_timer(E) snd(E) soundcore(E) gpio_loongson_64bit(E) input_leds(E) rtc_loongson(E) i2c_ls2x(E) mousedev(E) sch_fq_codel(E) fuse(E) nfnetlink(E) dmi_sysfs(E) ip_tables(E) x_tables(E) xe(E) d
rm_gpuvm(E) drm_buddy(E) gpu_sched(E)
[ 14.041369] drm_exec(E) drm_suballoc_helper(E) drm_display_helper(E) cec(E) rc_core(E) hid_generic(E) tpm_tis_spi(E) r8169(E) realtek(E) led_class(E) loongson(E) i2c_algo_bit(E) drm_ttm_helper(E) ttm(E) drm_client_lib(E) drm_kms_helper(E) sunrpc(E) i2c_dev(E)
[ 14.153910] CPU: 3 UID: 0 PID: 564 Comm: kworker/u32:2 Tainted: G E 6.14.0-rc4-aosc-main-gbad70b1cd8b0-dirty #7
[ 14.165325] Tainted: [E]=UNSIGNED_MODULE
[ 14.169220] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab
[ 14.182970] Workqueue: gt-ordered-wq drm_sched_job_timedout [gpu_sched]
[ 14.189549] pc ffff8000024f3760 ra ffff8000024f3760 tp 900000012f150000 sp 900000012f153ca0
[ 14.197853] a0 0000000000000000 a1 0000000000000000 a2 0000000000000000 a3 0000000000000000
[ 14.206156] a4 0000000000000000 a5 0000000000000000 a6 0000000000000000 a7 0000000000000000
[ 14.214458] t0 0000000000000000 t1 0000000000000000 t2 0000000000000000 t3 0000000000000000
[ 14.222761] t4 0000000000000000 t5 0000000000000000 t6 0000000000000000 t7 0000000000000000
[ 14.231064] t8 0000000000000000 u0 900000000195c0c8 s9 900000012e4dcf48 s0 90000001285f3640
[ 14.239368] s1 90000001004f8000 s2 ffff8000026ec000 s3 0000000000000000 s4 900000012e4dc028
[ 14.247672] s5 90000001009f5e00 s6 000000000000137e s7 0000000000000001 s8 900000012f153ce8
[ 14.255975] ra: ffff8000024f3760 guc_exec_queue_timedout_job+0x1c0/0xacc [xe]
[ 14.263379] ERA: ffff8000024f3760 guc_exec_queue_timedout_job+0x1c0/0xacc [xe]
[ 14.270777] CRMD: 000000b0 (PLV0 -IE -DA +PG DACF=CC DACM=CC -WE)
[ 14.276927] PRMD: 00000004 (PPLV0 +PIE -PWE)
[ 14.281258] EUEN: 00000000 (-FPE -SXE -ASXE -BTE)
[ 14.286024] ECFG: 00071c1d (LIE=0,2-4,10-12 VS=7)
[ 14.290790] ESTAT: 000c0000 [BRK] (IS= ECode=12 EsubCode=0)
[ 14.296329] PRID: 0014d000 (Loongson-64bit, Loongson-3A6000-HV)
[ 14.302299] CPU: 3 UID: 0 PID: 564 Comm: kworker/u32:2 Tainted: G E 6.14.0-rc4-aosc-main-gbad70b1cd8b0-dirty #7
[ 14.302302] Tainted: [E]=UNSIGNED_MODULE
[ 14.302302] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab
[ 14.302304] Workqueue: gt-ordered-wq drm_sched_job_timedout [gpu_sched]
[ 14.302307] Stack : 900000012f153928 d84a6232d48f1ac7 900000000023eb34 900000012f150000
[ 14.302310] 900000012f153900 0000000000000000 900000012f153908 9000000001c31c70
[ 14.302313] 0000000000000000 0000000000000000 0000000000000000 0000000000000000
[ 14.302315] 0000000000000000 d84a6232d48f1ac7 0000000000000000 0000000000000000
[ 14.302318] 0000000000000000 0000000000000000 0000000000000000 0000000000000000
[ 14.302320] 0000000000000000 0000000000000000 00000000072b4000 900000012e4dcf48
[ 14.302323] 9000000001eb8000 0000000000000000 9000000001c31c70 0000000000000004
[ 14.302325] 0000000000000004 0000000000000000 000000000000137e 0000000000000001
[ 14.302328] 900000012f153ce8 9000000001c31c70 9000000000244174 0000555581840b98
[ 14.302331] 00000000000000b0 0000000000000004 0000000000000000 0000000000071c1d
[ 14.302333] ...
[ 14.302335] Call Trace:
[ 14.302336] [<9000000000244174>] show_stack+0x3c/0x16c
[ 14.302341] [<900000000023eb30>] dump_stack_lvl+0x84/0xe0
[ 14.302346] [<9000000000288208>] __warn+0x8c/0x174
[ 14.302350] [<90000000017c1918>] report_bug+0x1c0/0x22c
[ 14.302354] [<90000000017f66e8>] do_bp+0x280/0x344
[ 14.302359]
[ 14.302360] ---[ end trace 0000000000000000 ]---
Revise calculation of `RING_CTL_SIZE(size)' to use `SZ_4K' to fix the
aforementioned issue.
Cc: stable@vger.kernel.org
Fixes: b79e8fd954c4 ("drm/xe: Remove dependency on intel_engine_regs.h")
Tested-by: Mingcong Bai <jeffbai@aosc.io>
Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
Tested-by: Haien Liang <27873200@qq.com>
Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Tested-by: Shirong Liu <lsr1024@qq.com>
Tested-by: Haofeng Wu <s2600cw2@126.com>
Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
Link: https://t.me/c/1109254909/768552
Co-developed-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
---
drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index 7ade41e2b7b3..a7608c50c907 100644
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -56,7 +56,7 @@
#define RING_START(base) XE_REG((base) + 0x38)
#define RING_CTL(base) XE_REG((base) + 0x3c)
-#define RING_CTL_SIZE(size) ((size) - PAGE_SIZE) /* in bytes -> pages */
+#define RING_CTL_SIZE(size) ((size) - SZ_4K) /* in bytes -> pages */
#define RING_START_UDW(base) XE_REG((base) + 0x48)
--
2.47.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 4/5] drm/xe: use 4KiB alignment for cursor jumps
2025-07-23 7:45 [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels Simon Richter
` (2 preceding siblings ...)
2025-07-23 7:45 ` [PATCH v3 3/5] drm/xe/regs: fix RING_CTL_SIZE(size) calculation Simon Richter
@ 2025-07-23 7:45 ` Simon Richter
2025-07-23 7:45 ` [PATCH v3 5/5] drm/xe/query: use PAGE_SIZE as the minimum page alignment Simon Richter
` (3 subsequent siblings)
7 siblings, 0 replies; 21+ messages in thread
From: Simon Richter @ 2025-07-23 7:45 UTC (permalink / raw)
To: intel-xe
Cc: jeffbai, Simon Richter, stable, Wenbin Fang, Haien Liang,
Jianfeng Liu, Shirong Liu, Haofeng Wu, Shang Yatsen
From: Mingcong Bai <jeffbai@aosc.io>
It appears that the xe_res_cursor also assumes 4KiB alignment.
Current implementation uses `PAGE_SIZE' as an assumed alignment reference,
but 4KiB kernel page sizes is by no means a guarantee. On 16KiB-paged
kernels, this causes driver failures during boot up:
[ 23.242757] ------------[ cut here ]------------
[ 23.247363] WARNING: CPU: 0 PID: 2036 at drivers/gpu/drm/xe/xe_res_cursor.h:182 emit_pte+0x394/0x3b0 [xe]
[ 23.256962] Modules linked in: nf_conntrack_netbios_ns(E) nf_conntrack_broadcast(E) nft_fib_inet(E) nft_fib_ipv4(E) nft_fib_ipv6(E) nft_fib(E) nft_reject_inet(E) nf_reject_ipv4(E) nf_reject_ipv6(E) nft_reject(E) nft_ct(E) rfkill(E) nft_chain_nat(E) ip6table_nat(E) ip6table_mangle(E) ip6table_raw(E) ip6table_security(E) iptable_nat(E) nf_nat(E) nf_conntrack(E) nf_defrag_ipv6(E) nf_defrag_ipv4(E) iptable_mangle(E) iptable_raw(E) iptable_security(E) ip_set(E) nf_tables(E) ip6table_filter(E) ip6_tables(E) iptable_filter(E) snd_hda_codec_conexant(E) snd_hda_codec_generic(E) snd_hda_codec_hdmi(E) snd_hda_intel(E) snd_intel_dspcfg(E) snd_hda_codec(E) nls_iso8859_1(E) qrtr(E) nls_cp437(E) snd_hda_core(E) loongson3_cpufreq(E) rtc_efi(E) snd_hwdep(E) snd_pcm(E) spi_loongson_pci(E) snd_timer(E) snd(E) spi_loongson_core(E) soundcore(E) gpio_loongson_64bit(E) rtc_loongson(E) i2c_ls2x(E) mousedev(E) input_leds(E) sch_fq_codel(E) fuse(E) nfnetlink(E) dmi_sysfs(E) ip_tables(E) x_tables(E) xe(E) d
rm_gpuvm(E) drm_buddy(E) gpu_sched(E)
[ 23.257034] drm_exec(E) drm_suballoc_helper(E) drm_display_helper(E) cec(E) rc_core(E) hid_generic(E) tpm_tis_spi(E) r8169(E) loongson(E) i2c_algo_bit(E) realtek(E) drm_ttm_helper(E) led_class(E) ttm(E) drm_client_lib(E) drm_kms_helper(E) sunrpc(E) i2c_dev(E)
[ 23.369697] CPU: 0 UID: 1000 PID: 2036 Comm: QSGRenderThread Tainted: G E 6.14.0-rc4-aosc-main-g7cc07e6e50b0-dirty #8
[ 23.381640] Tainted: [E]=UNSIGNED_MODULE
[ 23.385534] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab
[ 23.399319] pc ffff80000251efc0 ra ffff80000251eddc tp 900000011fe3c000 sp 900000011fe3f7e0
[ 23.407632] a0 0000000000000001 a1 0000000000000000 a2 0000000000000000 a3 0000000000000000
[ 23.415938] a4 0000000000000000 a5 0000000000000000 a6 0000000000060000 a7 900000010c947b00
[ 23.424240] t0 0000000000000000 t1 0000000000000000 t2 0000000000000000 t3 900000012e456230
[ 23.432543] t4 0000000000000035 t5 0000000000004000 t6 00000001fbc40403 t7 0000000000004000
[ 23.440845] t8 9000000100e688a8 u0 5cc06cee8ef0edee s9 9000000100024420 s0 0000000000000047
[ 23.449147] s1 0000000000004000 s2 0000000000000001 s3 900000012adba000 s4 ffffffffffffc000
[ 23.457450] s5 9000000108939428 s6 0000000000000000 s7 0000000000000000 s8 900000011fe3f8e0
[ 23.465851] ra: ffff80000251eddc emit_pte+0x1b0/0x3b0 [xe]
[ 23.471761] ERA: ffff80000251efc0 emit_pte+0x394/0x3b0 [xe]
[ 23.477557] CRMD: 000000b0 (PLV0 -IE -DA +PG DACF=CC DACM=CC -WE)
[ 23.483732] PRMD: 00000004 (PPLV0 +PIE -PWE)
[ 23.488068] EUEN: 00000003 (+FPE +SXE -ASXE -BTE)
[ 23.492832] ECFG: 00071c1d (LIE=0,2-4,10-12 VS=7)
[ 23.497594] ESTAT: 000c0000 [BRK] (IS= ECode=12 EsubCode=0)
[ 23.503133] PRID: 0014d000 (Loongson-64bit, Loongson-3A6000-HV)
[ 23.509164] CPU: 0 UID: 1000 PID: 2036 Comm: QSGRenderThread Tainted: G E 6.14.0-rc4-aosc-main-g7cc07e6e50b0-dirty #8
[ 23.509168] Tainted: [E]=UNSIGNED_MODULE
[ 23.509168] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab
[ 23.509170] Stack : ffffffffffffffff ffffffffffffffff 900000000023eb34 900000011fe3c000
[ 23.509176] 900000011fe3f440 0000000000000000 900000011fe3f448 9000000001c31c70
[ 23.509181] 0000000000000000 0000000000000000 0000000000000000 0000000000000000
[ 23.509185] 0000000000000000 5cc06cee8ef0edee 0000000000000000 0000000000000000
[ 23.509190] 0000000000000000 0000000000000000 0000000000000000 0000000000000000
[ 23.509193] 0000000000000000 0000000000000000 00000000066b4000 9000000100024420
[ 23.509197] 9000000001eb8000 0000000000000000 9000000001c31c70 0000000000000004
[ 23.509202] 0000000000000004 0000000000000000 0000000000000000 0000000000000000
[ 23.509206] 900000011fe3f8e0 9000000001c31c70 9000000000244174 00007fffac097534
[ 23.509211] 00000000000000b0 0000000000000004 0000000000000003 0000000000071c1d
[ 23.509216] ...
[ 23.509218] Call Trace:
[ 23.509220] [<9000000000244174>] show_stack+0x3c/0x16c
[ 23.509226] [<900000000023eb30>] dump_stack_lvl+0x84/0xe0
[ 23.509230] [<9000000000288208>] __warn+0x8c/0x174
[ 23.509234] [<90000000017c1918>] report_bug+0x1c0/0x22c
[ 23.509238] [<90000000017f66e8>] do_bp+0x280/0x344
[ 23.509243] [<90000000002428a0>] handle_bp+0x120/0x1c0
[ 23.509247] [<ffff80000251efc0>] emit_pte+0x394/0x3b0 [xe]
[ 23.509295] [<ffff800002520d38>] xe_migrate_clear+0x2d8/0xa54 [xe]
[ 23.509341] [<ffff8000024e6c38>] xe_bo_move+0x324/0x930 [xe]
[ 23.509387] [<ffff800002209468>] ttm_bo_handle_move_mem+0xd0/0x194 [ttm]
[ 23.509392] [<ffff800002209ebc>] ttm_bo_validate+0xd4/0x1cc [ttm]
[ 23.509396] [<ffff80000220a138>] ttm_bo_init_reserved+0x184/0x1dc [ttm]
[ 23.509399] [<ffff8000024e7840>] ___xe_bo_create_locked+0x1e8/0x3d4 [xe]
[ 23.509445] [<ffff8000024e7cf8>] __xe_bo_create_locked+0x2cc/0x390 [xe]
[ 23.509489] [<ffff8000024e7e98>] xe_bo_create_user+0x34/0xe4 [xe]
[ 23.509533] [<ffff8000024e875c>] xe_gem_create_ioctl+0x154/0x4d8 [xe]
[ 23.509578] [<9000000001062784>] drm_ioctl_kernel+0xe0/0x14c
[ 23.509582] [<9000000001062c10>] drm_ioctl+0x420/0x5f4
[ 23.509585] [<ffff8000024ea778>] xe_drm_ioctl+0x64/0xac [xe]
[ 23.509630] [<9000000000653504>] sys_ioctl+0x2b8/0xf98
[ 23.509634] [<90000000017f684c>] do_syscall+0xa0/0x140
[ 23.509637] [<9000000000241e38>] handle_syscall+0xb8/0x158
[ 23.509640]
[ 23.509644] ---[ end trace 0000000000000000 ]---
Revise calls to `xe_res_dma()' and `xe_res_cursor()' to use
`XE_PTE_MASK' (12) and `SZ_4K' to fix this potentially confused use of
`PAGE_SIZE' in relevant code.
Cc: stable@vger.kernel.org
Fixes: e89b384cde62 ("drm/xe/migrate: Update emit_pte to cope with a size level than 4k")
Tested-by: Mingcong Bai <jeffbai@aosc.io>
Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
Tested-by: Haien Liang <27873200@qq.com>
Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Tested-by: Shirong Liu <lsr1024@qq.com>
Tested-by: Haofeng Wu <s2600cw2@126.com>
Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
Link: https://t.me/c/1109254909/768552
Co-developed-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
---
drivers/gpu/drm/xe/xe_migrate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 6a80ae6104dd..89bd78c542b9 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -606,7 +606,7 @@ static void emit_pte(struct xe_migrate *m,
u64 addr, flags = 0;
bool devmem = false;
- addr = xe_res_dma(cur) & PAGE_MASK;
+ addr = xe_res_dma(cur) & ~XE_PTE_MASK;
if (is_vram) {
if (vm->flags & XE_VM_FLAG_64K) {
u64 va = cur_ofs * XE_PAGE_SIZE / 8;
@@ -627,7 +627,7 @@ static void emit_pte(struct xe_migrate *m,
bb->cs[bb->len++] = lower_32_bits(addr);
bb->cs[bb->len++] = upper_32_bits(addr);
- xe_res_next(cur, min_t(u32, size, PAGE_SIZE));
+ xe_res_next(cur, min_t(u32, size, XE_PAGE_SIZE));
cur_ofs += 8;
}
}
--
2.47.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* [PATCH v3 5/5] drm/xe/query: use PAGE_SIZE as the minimum page alignment
2025-07-23 7:45 [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels Simon Richter
` (3 preceding siblings ...)
2025-07-23 7:45 ` [PATCH v3 4/5] drm/xe: use 4KiB alignment for cursor jumps Simon Richter
@ 2025-07-23 7:45 ` Simon Richter
2025-07-28 13:45 ` Rodrigo Vivi
2025-07-23 7:54 ` ✓ CI.KUnit: success for drm/xe: enable driver usage on non-4KiB kernels Patchwork
` (2 subsequent siblings)
7 siblings, 1 reply; 21+ messages in thread
From: Simon Richter @ 2025-07-23 7:45 UTC (permalink / raw)
To: intel-xe
Cc: jeffbai, Simon Richter, stable, Wenbin Fang, Haien Liang,
Jianfeng Liu, Shirong Liu, Haofeng Wu, Shang Yatsen
From: Mingcong Bai <jeffbai@aosc.io>
As this component hooks into userspace API, it should be assumed that it
will play well with non-4KiB/64KiB pages.
Use `PAGE_SIZE' as the final reference for page alignment instead.
Cc: stable@vger.kernel.org
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Fixes: 801989b08aff ("drm/xe/uapi: Make constant comments visible in kernel doc")
Tested-by: Mingcong Bai <jeffbai@aosc.io>
Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
Tested-by: Haien Liang <27873200@qq.com>
Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
Tested-by: Shirong Liu <lsr1024@qq.com>
Tested-by: Haofeng Wu <s2600cw2@126.com>
Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
Link: https://t.me/c/1109254909/768552
Co-developed-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Shang Yatsen <429839446@qq.com>
Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
---
drivers/gpu/drm/xe/xe_query.c | 2 +-
include/uapi/drm/xe_drm.h | 7 +++++--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index 44d44bbc71dc..f695d5d0610d 100644
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -347,7 +347,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY;
config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
- xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
+ xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : PAGE_SIZE;
config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
xe_exec_queue_device_get_max_priority(xe);
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index e2426413488f..5ba76b9369ba 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -397,8 +397,11 @@ struct drm_xe_query_mem_regions {
* has low latency hint support
* - %DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR - Flag is set if the
* device has CPU address mirroring support
- * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
- * required by this device, typically SZ_4K or SZ_64K
+ * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment required
+ * by this device and the CPU. The minimum page size for the device is
+ * usually SZ_4K or SZ_64K, while for the CPU, it is PAGE_SIZE. This value
+ * is calculated by max(min_gpu_page_size, PAGE_SIZE). This alignment is
+ * enforced on buffer object allocations and VM binds.
* - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
* - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
* available exec queue priority
--
2.47.2
^ permalink raw reply related [flat|nested] 21+ messages in thread
* ✓ CI.KUnit: success for drm/xe: enable driver usage on non-4KiB kernels
2025-07-23 7:45 [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels Simon Richter
` (4 preceding siblings ...)
2025-07-23 7:45 ` [PATCH v3 5/5] drm/xe/query: use PAGE_SIZE as the minimum page alignment Simon Richter
@ 2025-07-23 7:54 ` Patchwork
2025-07-23 8:31 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-23 9:37 ` ✗ Xe.CI.Full: failure " Patchwork
7 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-07-23 7:54 UTC (permalink / raw)
To: Simon Richter; +Cc: intel-xe
== Series Details ==
Series: drm/xe: enable driver usage on non-4KiB kernels
URL : https://patchwork.freedesktop.org/series/151983/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[07:53:28] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:53:32] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:53:59] Starting KUnit Kernel (1/1)...
[07:53:59] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:53:59] ================== guc_buf (11 subtests) ===================
[07:53:59] [PASSED] test_smallest
[07:53:59] [PASSED] test_largest
[07:53:59] [PASSED] test_granular
[07:53:59] [PASSED] test_unique
[07:53:59] [PASSED] test_overlap
[07:53:59] [PASSED] test_reusable
[07:53:59] [PASSED] test_too_big
[07:53:59] [PASSED] test_flush
[07:53:59] [PASSED] test_lookup
[07:53:59] [PASSED] test_data
[07:53:59] [PASSED] test_class
[07:53:59] ===================== [PASSED] guc_buf =====================
[07:53:59] =================== guc_dbm (7 subtests) ===================
[07:53:59] [PASSED] test_empty
[07:53:59] [PASSED] test_default
[07:53:59] ======================== test_size ========================
[07:53:59] [PASSED] 4
[07:53:59] [PASSED] 8
[07:53:59] [PASSED] 32
[07:53:59] [PASSED] 256
[07:53:59] ==================== [PASSED] test_size ====================
[07:53:59] ======================= test_reuse ========================
[07:53:59] [PASSED] 4
[07:53:59] [PASSED] 8
[07:53:59] [PASSED] 32
[07:53:59] [PASSED] 256
[07:53:59] =================== [PASSED] test_reuse ====================
[07:53:59] =================== test_range_overlap ====================
[07:53:59] [PASSED] 4
[07:53:59] [PASSED] 8
[07:53:59] [PASSED] 32
[07:53:59] [PASSED] 256
[07:53:59] =============== [PASSED] test_range_overlap ================
[07:53:59] =================== test_range_compact ====================
[07:53:59] [PASSED] 4
[07:53:59] [PASSED] 8
[07:53:59] [PASSED] 32
[07:53:59] [PASSED] 256
[07:53:59] =============== [PASSED] test_range_compact ================
[07:53:59] ==================== test_range_spare =====================
[07:53:59] [PASSED] 4
[07:53:59] [PASSED] 8
[07:53:59] [PASSED] 32
[07:53:59] [PASSED] 256
[07:53:59] ================ [PASSED] test_range_spare =================
[07:53:59] ===================== [PASSED] guc_dbm =====================
[07:53:59] =================== guc_idm (6 subtests) ===================
[07:53:59] [PASSED] bad_init
[07:53:59] [PASSED] no_init
[07:53:59] [PASSED] init_fini
[07:53:59] [PASSED] check_used
[07:53:59] [PASSED] check_quota
[07:53:59] [PASSED] check_all
[07:53:59] ===================== [PASSED] guc_idm =====================
[07:53:59] ================== no_relay (3 subtests) ===================
[07:53:59] [PASSED] xe_drops_guc2pf_if_not_ready
[07:53:59] [PASSED] xe_drops_guc2vf_if_not_ready
[07:53:59] [PASSED] xe_rejects_send_if_not_ready
[07:53:59] ==================== [PASSED] no_relay =====================
[07:53:59] ================== pf_relay (14 subtests) ==================
[07:53:59] [PASSED] pf_rejects_guc2pf_too_short
[07:53:59] [PASSED] pf_rejects_guc2pf_too_long
[07:53:59] [PASSED] pf_rejects_guc2pf_no_payload
[07:53:59] [PASSED] pf_fails_no_payload
[07:53:59] [PASSED] pf_fails_bad_origin
[07:53:59] [PASSED] pf_fails_bad_type
[07:53:59] [PASSED] pf_txn_reports_error
[07:53:59] [PASSED] pf_txn_sends_pf2guc
[07:53:59] [PASSED] pf_sends_pf2guc
[07:53:59] [SKIPPED] pf_loopback_nop
[07:53:59] [SKIPPED] pf_loopback_echo
[07:53:59] [SKIPPED] pf_loopback_fail
[07:53:59] [SKIPPED] pf_loopback_busy
[07:53:59] [SKIPPED] pf_loopback_retry
[07:53:59] ==================== [PASSED] pf_relay =====================
[07:53:59] ================== vf_relay (3 subtests) ===================
[07:53:59] [PASSED] vf_rejects_guc2vf_too_short
[07:53:59] [PASSED] vf_rejects_guc2vf_too_long
[07:53:59] [PASSED] vf_rejects_guc2vf_no_payload
[07:53:59] ==================== [PASSED] vf_relay =====================
[07:53:59] ===================== lmtt (1 subtest) =====================
[07:53:59] ======================== test_ops =========================
[07:53:59] [PASSED] 2-level
[07:53:59] [PASSED] multi-level
[07:53:59] ==================== [PASSED] test_ops =====================
[07:53:59] ====================== [PASSED] lmtt =======================
[07:53:59] ================= pf_service (11 subtests) =================
[07:53:59] [PASSED] pf_negotiate_any
[07:53:59] [PASSED] pf_negotiate_base_match
[07:53:59] [PASSED] pf_negotiate_base_newer
[07:53:59] [PASSED] pf_negotiate_base_next
[07:53:59] [SKIPPED] pf_negotiate_base_older
[07:53:59] [PASSED] pf_negotiate_base_prev
[07:53:59] [PASSED] pf_negotiate_latest_match
[07:53:59] [PASSED] pf_negotiate_latest_newer
[07:53:59] [PASSED] pf_negotiate_latest_next
[07:53:59] [SKIPPED] pf_negotiate_latest_older
[07:53:59] [SKIPPED] pf_negotiate_latest_prev
[07:53:59] =================== [PASSED] pf_service ====================
[07:53:59] =================== xe_mocs (2 subtests) ===================
[07:53:59] ================ xe_live_mocs_kernel_kunit ================
[07:53:59] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[07:53:59] ================ xe_live_mocs_reset_kunit =================
[07:53:59] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[07:53:59] ==================== [SKIPPED] xe_mocs =====================
[07:53:59] ================= xe_migrate (2 subtests) ==================
[07:53:59] ================= xe_migrate_sanity_kunit =================
[07:53:59] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[07:53:59] ================== xe_validate_ccs_kunit ==================
[07:53:59] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[07:53:59] =================== [SKIPPED] xe_migrate ===================
[07:53:59] ================== xe_dma_buf (1 subtest) ==================
[07:53:59] ==================== xe_dma_buf_kunit =====================
[07:53:59] ================ [SKIPPED] xe_dma_buf_kunit ================
[07:53:59] =================== [SKIPPED] xe_dma_buf ===================
[07:53:59] ================= xe_bo_shrink (1 subtest) =================
[07:53:59] =================== xe_bo_shrink_kunit ====================
[07:53:59] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[07:53:59] ================== [SKIPPED] xe_bo_shrink ==================
[07:53:59] ==================== xe_bo (2 subtests) ====================
[07:53:59] ================== xe_ccs_migrate_kunit ===================
[07:53:59] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[07:53:59] ==================== xe_bo_evict_kunit ====================
[07:53:59] =============== [SKIPPED] xe_bo_evict_kunit ================
[07:53:59] ===================== [SKIPPED] xe_bo ======================
[07:53:59] ==================== args (11 subtests) ====================
[07:53:59] [PASSED] count_args_test
[07:53:59] [PASSED] call_args_example
[07:53:59] [PASSED] call_args_test
[07:53:59] [PASSED] drop_first_arg_example
[07:53:59] [PASSED] drop_first_arg_test
[07:53:59] [PASSED] first_arg_example
[07:53:59] [PASSED] first_arg_test
[07:53:59] [PASSED] last_arg_example
[07:53:59] [PASSED] last_arg_test
[07:53:59] [PASSED] pick_arg_example
[07:53:59] [PASSED] sep_comma_example
[07:53:59] ====================== [PASSED] args =======================
[07:53:59] =================== xe_pci (3 subtests) ====================
[07:53:59] ==================== check_graphics_ip ====================
[07:53:59] [PASSED] 12.70 Xe_LPG
[07:53:59] [PASSED] 12.71 Xe_LPG
[07:53:59] [PASSED] 12.74 Xe_LPG+
[07:53:59] [PASSED] 20.01 Xe2_HPG
[07:53:59] [PASSED] 20.02 Xe2_HPG
[07:53:59] [PASSED] 20.04 Xe2_LPG
[07:53:59] [PASSED] 30.00 Xe3_LPG
[07:53:59] [PASSED] 30.01 Xe3_LPG
[07:53:59] [PASSED] 30.03 Xe3_LPG
[07:53:59] ================ [PASSED] check_graphics_ip ================
[07:53:59] ===================== check_media_ip ======================
[07:53:59] [PASSED] 13.00 Xe_LPM+
[07:53:59] [PASSED] 13.01 Xe2_HPM
[07:53:59] [PASSED] 20.00 Xe2_LPM
[07:53:59] [PASSED] 30.00 Xe3_LPM
[07:53:59] [PASSED] 30.02 Xe3_LPM
[07:53:59] ================= [PASSED] check_media_ip ==================
[07:53:59] ================= check_platform_gt_count =================
[07:53:59] [PASSED] 0x9A60 (TIGERLAKE)
[07:53:59] [PASSED] 0x9A68 (TIGERLAKE)
[07:53:59] [PASSED] 0x9A70 (TIGERLAKE)
[07:53:59] [PASSED] 0x9A40 (TIGERLAKE)
[07:53:59] [PASSED] 0x9A49 (TIGERLAKE)
[07:53:59] [PASSED] 0x9A59 (TIGERLAKE)
[07:53:59] [PASSED] 0x9A78 (TIGERLAKE)
[07:53:59] [PASSED] 0x9AC0 (TIGERLAKE)
[07:53:59] [PASSED] 0x9AC9 (TIGERLAKE)
[07:53:59] [PASSED] 0x9AD9 (TIGERLAKE)
[07:53:59] [PASSED] 0x9AF8 (TIGERLAKE)
[07:53:59] [PASSED] 0x4C80 (ROCKETLAKE)
[07:53:59] [PASSED] 0x4C8A (ROCKETLAKE)
[07:53:59] [PASSED] 0x4C8B (ROCKETLAKE)
[07:53:59] [PASSED] 0x4C8C (ROCKETLAKE)
[07:53:59] [PASSED] 0x4C90 (ROCKETLAKE)
[07:53:59] [PASSED] 0x4C9A (ROCKETLAKE)
[07:53:59] [PASSED] 0x4680 (ALDERLAKE_S)
[07:53:59] [PASSED] 0x4682 (ALDERLAKE_S)
[07:53:59] [PASSED] 0x4688 (ALDERLAKE_S)
[07:53:59] [PASSED] 0x468A (ALDERLAKE_S)
[07:53:59] [PASSED] 0x468B (ALDERLAKE_S)
[07:53:59] [PASSED] 0x4690 (ALDERLAKE_S)
[07:53:59] [PASSED] 0x4692 (ALDERLAKE_S)
[07:53:59] [PASSED] 0x4693 (ALDERLAKE_S)
[07:53:59] [PASSED] 0x46A0 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46A1 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46A2 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46A3 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46A6 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46A8 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46AA (ALDERLAKE_P)
[07:53:59] [PASSED] 0x462A (ALDERLAKE_P)
[07:53:59] [PASSED] 0x4626 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x4628 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46B0 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46B1 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46B2 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46B3 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46C0 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46C1 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46C2 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46C3 (ALDERLAKE_P)
[07:53:59] [PASSED] 0x46D0 (ALDERLAKE_N)
[07:53:59] [PASSED] 0x46D1 (ALDERLAKE_N)
[07:53:59] [PASSED] 0x46D2 (ALDERLAKE_N)
[07:53:59] [PASSED] 0x46D3 (ALDERLAKE_N)
[07:53:59] [PASSED] 0x46D4 (ALDERLAKE_N)
[07:53:59] [PASSED] 0xA721 (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA7A1 (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA7A9 (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA7AC (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA7AD (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA720 (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA7A0 (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA7A8 (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA7AA (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA7AB (ALDERLAKE_P)
[07:53:59] [PASSED] 0xA780 (ALDERLAKE_S)
[07:53:59] [PASSED] 0xA781 (ALDERLAKE_S)
[07:53:59] [PASSED] 0xA782 (ALDERLAKE_S)
[07:53:59] [PASSED] 0xA783 (ALDERLAKE_S)
[07:53:59] [PASSED] 0xA788 (ALDERLAKE_S)
[07:53:59] [PASSED] 0xA789 (ALDERLAKE_S)
[07:53:59] [PASSED] 0xA78A (ALDERLAKE_S)
[07:53:59] [PASSED] 0xA78B (ALDERLAKE_S)
[07:53:59] [PASSED] 0x4905 (DG1)
[07:53:59] [PASSED] 0x4906 (DG1)
[07:53:59] [PASSED] 0x4907 (DG1)
[07:53:59] [PASSED] 0x4908 (DG1)
[07:53:59] [PASSED] 0x4909 (DG1)
[07:53:59] [PASSED] 0x56C0 (DG2)
[07:53:59] [PASSED] 0x56C2 (DG2)
[07:53:59] [PASSED] 0x56C1 (DG2)
[07:53:59] [PASSED] 0x7D51 (METEORLAKE)
[07:53:59] [PASSED] 0x7DD1 (METEORLAKE)
[07:53:59] [PASSED] 0x7D41 (METEORLAKE)
[07:53:59] [PASSED] 0x7D67 (METEORLAKE)
[07:53:59] [PASSED] 0xB640 (METEORLAKE)
[07:53:59] [PASSED] 0x56A0 (DG2)
[07:53:59] [PASSED] 0x56A1 (DG2)
[07:53:59] [PASSED] 0x56A2 (DG2)
[07:53:59] [PASSED] 0x56BE (DG2)
[07:53:59] [PASSED] 0x56BF (DG2)
[07:53:59] [PASSED] 0x5690 (DG2)
[07:53:59] [PASSED] 0x5691 (DG2)
[07:53:59] [PASSED] 0x5692 (DG2)
[07:53:59] [PASSED] 0x56A5 (DG2)
[07:53:59] [PASSED] 0x56A6 (DG2)
[07:53:59] [PASSED] 0x56B0 (DG2)
[07:53:59] [PASSED] 0x56B1 (DG2)
[07:53:59] [PASSED] 0x56BA (DG2)
[07:53:59] [PASSED] 0x56BB (DG2)
[07:53:59] [PASSED] 0x56BC (DG2)
[07:53:59] [PASSED] 0x56BD (DG2)
[07:53:59] [PASSED] 0x5693 (DG2)
[07:53:59] [PASSED] 0x5694 (DG2)
[07:53:59] [PASSED] 0x5695 (DG2)
[07:53:59] [PASSED] 0x56A3 (DG2)
[07:53:59] [PASSED] 0x56A4 (DG2)
[07:53:59] [PASSED] 0x56B2 (DG2)
[07:53:59] [PASSED] 0x56B3 (DG2)
[07:53:59] [PASSED] 0x5696 (DG2)
[07:53:59] [PASSED] 0x5697 (DG2)
[07:53:59] [PASSED] 0xB69 (PVC)
[07:53:59] [PASSED] 0xB6E (PVC)
[07:53:59] [PASSED] 0xBD4 (PVC)
[07:53:59] [PASSED] 0xBD5 (PVC)
[07:53:59] [PASSED] 0xBD6 (PVC)
[07:53:59] [PASSED] 0xBD7 (PVC)
[07:53:59] [PASSED] 0xBD8 (PVC)
[07:53:59] [PASSED] 0xBD9 (PVC)
[07:53:59] [PASSED] 0xBDA (PVC)
[07:53:59] [PASSED] 0xBDB (PVC)
[07:53:59] [PASSED] 0xBE0 (PVC)
[07:53:59] [PASSED] 0xBE1 (PVC)
[07:53:59] [PASSED] 0xBE5 (PVC)
[07:53:59] [PASSED] 0x7D40 (METEORLAKE)
[07:53:59] [PASSED] 0x7D45 (METEORLAKE)
[07:53:59] [PASSED] 0x7D55 (METEORLAKE)
[07:53:59] [PASSED] 0x7D60 (METEORLAKE)
[07:53:59] [PASSED] 0x7DD5 (METEORLAKE)
[07:53:59] [PASSED] 0x6420 (LUNARLAKE)
[07:53:59] [PASSED] 0x64A0 (LUNARLAKE)
[07:53:59] [PASSED] 0x64B0 (LUNARLAKE)
[07:53:59] [PASSED] 0xE202 (BATTLEMAGE)
[07:53:59] [PASSED] 0xE209 (BATTLEMAGE)
[07:53:59] [PASSED] 0xE20B (BATTLEMAGE)
[07:53:59] [PASSED] 0xE20C (BATTLEMAGE)
[07:53:59] [PASSED] 0xE20D (BATTLEMAGE)
[07:53:59] [PASSED] 0xE210 (BATTLEMAGE)
[07:53:59] [PASSED] 0xE211 (BATTLEMAGE)
[07:53:59] [PASSED] 0xE212 (BATTLEMAGE)
[07:53:59] [PASSED] 0xE216 (BATTLEMAGE)
[07:53:59] [PASSED] 0xE220 (BATTLEMAGE)
[07:53:59] [PASSED] 0xE221 (BATTLEMAGE)
[07:53:59] [PASSED] 0xE222 (BATTLEMAGE)
[07:53:59] [PASSED] 0xE223 (BATTLEMAGE)
[07:53:59] [PASSED] 0xB080 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB081 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB082 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB083 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB084 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB085 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB086 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB087 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB08F (PANTHERLAKE)
[07:53:59] [PASSED] 0xB090 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB0A0 (PANTHERLAKE)
[07:53:59] [PASSED] 0xB0B0 (PANTHERLAKE)
[07:53:59] [PASSED] 0xFD80 (PANTHERLAKE)
[07:53:59] [PASSED] 0xFD81 (PANTHERLAKE)
[07:53:59] ============= [PASSED] check_platform_gt_count =============
[07:53:59] ===================== [PASSED] xe_pci ======================
[07:53:59] =================== xe_rtp (2 subtests) ====================
[07:53:59] =============== xe_rtp_process_to_sr_tests ================
[07:53:59] [PASSED] coalesce-same-reg
[07:53:59] [PASSED] no-match-no-add
[07:53:59] [PASSED] match-or
[07:53:59] [PASSED] match-or-xfail
[07:53:59] [PASSED] no-match-no-add-multiple-rules
[07:53:59] [PASSED] two-regs-two-entries
[07:53:59] [PASSED] clr-one-set-other
[07:53:59] [PASSED] set-field
[07:53:59] [PASSED] conflict-duplicate
[07:53:59] [PASSED] conflict-not-disjoint
[07:53:59] [PASSED] conflict-reg-type
[07:53:59] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[07:53:59] ================== xe_rtp_process_tests ===================
[07:53:59] [PASSED] active1
[07:53:59] [PASSED] active2
[07:53:59] [PASSED] active-inactive
[07:53:59] [PASSED] inactive-active
[07:53:59] [PASSED] inactive-1st_or_active-inactive
[07:53:59] [PASSED] inactive-2nd_or_active-inactive
[07:53:59] [PASSED] inactive-last_or_active-inactive
[07:53:59] [PASSED] inactive-no_or_active-inactive
[07:53:59] ============== [PASSED] xe_rtp_process_tests ===============
[07:53:59] ===================== [PASSED] xe_rtp ======================
[07:53:59] ==================== xe_wa (1 subtest) =====================
[07:53:59] ======================== xe_wa_gt =========================
[07:53:59] [PASSED] TIGERLAKE (B0)
[07:53:59] [PASSED] DG1 (A0)
[07:53:59] [PASSED] DG1 (B0)
[07:53:59] [PASSED] ALDERLAKE_S (A0)
[07:53:59] [PASSED] ALDERLAKE_S (B0)
[07:53:59] [PASSED] ALDERLAKE_S (C0)
[07:53:59] [PASSED] ALDERLAKE_S (D0)
[07:53:59] [PASSED] ALDERLAKE_P (A0)
[07:53:59] [PASSED] ALDERLAKE_P (B0)
[07:53:59] [PASSED] ALDERLAKE_P (C0)
[07:53:59] [PASSED] ALDERLAKE_S_RPLS (D0)
[07:53:59] [PASSED] ALDERLAKE_P_RPLU (E0)
[07:53:59] [PASSED] DG2_G10 (C0)
[07:53:59] [PASSED] DG2_G11 (B1)
[07:53:59] [PASSED] DG2_G12 (A1)
[07:53:59] [PASSED] METEORLAKE (g:A0, m:A0)
[07:53:59] [PASSED] METEORLAKE (g:A0, m:A0)
[07:53:59] [PASSED] METEORLAKE (g:A0, m:A0)
[07:53:59] [PASSED] LUNARLAKE (g:A0, m:A0)
[07:53:59] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[07:53:59] [PASSED] BATTLEMAGE (g:A0, m:A1)
[07:53:59] ==================== [PASSED] xe_wa_gt =====================
[07:53:59] ====================== [PASSED] xe_wa ======================
[07:53:59] ============================================================
[07:53:59] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[07:54:00] Elapsed time: 31.563s total, 4.133s configuring, 27.063s building, 0.317s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[07:54:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:54:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:54:23] Starting KUnit Kernel (1/1)...
[07:54:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:54:23] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[07:54:23] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[07:54:23] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[07:54:23] =========== drm_validate_clone_mode (2 subtests) ===========
[07:54:23] ============== drm_test_check_in_clone_mode ===============
[07:54:23] [PASSED] in_clone_mode
[07:54:23] [PASSED] not_in_clone_mode
[07:54:23] ========== [PASSED] drm_test_check_in_clone_mode ===========
[07:54:23] =============== drm_test_check_valid_clones ===============
[07:54:23] [PASSED] not_in_clone_mode
[07:54:23] [PASSED] valid_clone
[07:54:23] [PASSED] invalid_clone
[07:54:23] =========== [PASSED] drm_test_check_valid_clones ===========
[07:54:23] ============= [PASSED] drm_validate_clone_mode =============
[07:54:23] ============= drm_validate_modeset (1 subtest) =============
[07:54:23] [PASSED] drm_test_check_connector_changed_modeset
[07:54:23] ============== [PASSED] drm_validate_modeset ===============
[07:54:23] ====== drm_test_bridge_get_current_state (2 subtests) ======
[07:54:23] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[07:54:23] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[07:54:23] ======== [PASSED] drm_test_bridge_get_current_state ========
[07:54:23] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[07:54:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[07:54:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[07:54:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[07:54:23] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[07:54:23] ============== drm_bridge_alloc (2 subtests) ===============
[07:54:23] [PASSED] drm_test_drm_bridge_alloc_basic
[07:54:23] [PASSED] drm_test_drm_bridge_alloc_get_put
[07:54:23] ================ [PASSED] drm_bridge_alloc =================
[07:54:23] ================== drm_buddy (7 subtests) ==================
[07:54:23] [PASSED] drm_test_buddy_alloc_limit
[07:54:23] [PASSED] drm_test_buddy_alloc_optimistic
[07:54:23] [PASSED] drm_test_buddy_alloc_pessimistic
[07:54:23] [PASSED] drm_test_buddy_alloc_pathological
[07:54:23] [PASSED] drm_test_buddy_alloc_contiguous
[07:54:23] [PASSED] drm_test_buddy_alloc_clear
[07:54:23] [PASSED] drm_test_buddy_alloc_range_bias
[07:54:23] ==================== [PASSED] drm_buddy ====================
[07:54:23] ============= drm_cmdline_parser (40 subtests) =============
[07:54:23] [PASSED] drm_test_cmdline_force_d_only
[07:54:23] [PASSED] drm_test_cmdline_force_D_only_dvi
[07:54:23] [PASSED] drm_test_cmdline_force_D_only_hdmi
[07:54:23] [PASSED] drm_test_cmdline_force_D_only_not_digital
[07:54:23] [PASSED] drm_test_cmdline_force_e_only
[07:54:23] [PASSED] drm_test_cmdline_res
[07:54:23] [PASSED] drm_test_cmdline_res_vesa
[07:54:23] [PASSED] drm_test_cmdline_res_vesa_rblank
[07:54:23] [PASSED] drm_test_cmdline_res_rblank
[07:54:23] [PASSED] drm_test_cmdline_res_bpp
[07:54:23] [PASSED] drm_test_cmdline_res_refresh
[07:54:23] [PASSED] drm_test_cmdline_res_bpp_refresh
[07:54:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[07:54:23] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[07:54:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[07:54:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[07:54:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[07:54:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[07:54:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[07:54:23] [PASSED] drm_test_cmdline_res_margins_force_on
[07:54:23] [PASSED] drm_test_cmdline_res_vesa_margins
[07:54:23] [PASSED] drm_test_cmdline_name
[07:54:23] [PASSED] drm_test_cmdline_name_bpp
[07:54:23] [PASSED] drm_test_cmdline_name_option
[07:54:23] [PASSED] drm_test_cmdline_name_bpp_option
[07:54:23] [PASSED] drm_test_cmdline_rotate_0
[07:54:23] [PASSED] drm_test_cmdline_rotate_90
[07:54:23] [PASSED] drm_test_cmdline_rotate_180
[07:54:23] [PASSED] drm_test_cmdline_rotate_270
[07:54:23] [PASSED] drm_test_cmdline_hmirror
[07:54:23] [PASSED] drm_test_cmdline_vmirror
[07:54:23] [PASSED] drm_test_cmdline_margin_options
[07:54:23] [PASSED] drm_test_cmdline_multiple_options
[07:54:23] [PASSED] drm_test_cmdline_bpp_extra_and_option
[07:54:23] [PASSED] drm_test_cmdline_extra_and_option
[07:54:23] [PASSED] drm_test_cmdline_freestanding_options
[07:54:23] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[07:54:23] [PASSED] drm_test_cmdline_panel_orientation
[07:54:23] ================ drm_test_cmdline_invalid =================
[07:54:23] [PASSED] margin_only
[07:54:23] [PASSED] interlace_only
[07:54:23] [PASSED] res_missing_x
[07:54:23] [PASSED] res_missing_y
[07:54:23] [PASSED] res_bad_y
[07:54:23] [PASSED] res_missing_y_bpp
[07:54:23] [PASSED] res_bad_bpp
[07:54:23] [PASSED] res_bad_refresh
[07:54:23] [PASSED] res_bpp_refresh_force_on_off
[07:54:23] [PASSED] res_invalid_mode
[07:54:23] [PASSED] res_bpp_wrong_place_mode
[07:54:23] [PASSED] name_bpp_refresh
[07:54:23] [PASSED] name_refresh
[07:54:23] [PASSED] name_refresh_wrong_mode
[07:54:23] [PASSED] name_refresh_invalid_mode
[07:54:23] [PASSED] rotate_multiple
[07:54:23] [PASSED] rotate_invalid_val
[07:54:23] [PASSED] rotate_truncated
[07:54:23] [PASSED] invalid_option
[07:54:23] [PASSED] invalid_tv_option
[07:54:23] [PASSED] truncated_tv_option
[07:54:23] ============ [PASSED] drm_test_cmdline_invalid =============
[07:54:23] =============== drm_test_cmdline_tv_options ===============
[07:54:23] [PASSED] NTSC
[07:54:23] [PASSED] NTSC_443
[07:54:23] [PASSED] NTSC_J
[07:54:23] [PASSED] PAL
[07:54:23] [PASSED] PAL_M
[07:54:23] [PASSED] PAL_N
[07:54:23] [PASSED] SECAM
[07:54:23] [PASSED] MONO_525
[07:54:23] [PASSED] MONO_625
[07:54:23] =========== [PASSED] drm_test_cmdline_tv_options ===========
[07:54:23] =============== [PASSED] drm_cmdline_parser ================
[07:54:23] ========== drmm_connector_hdmi_init (20 subtests) ==========
[07:54:23] [PASSED] drm_test_connector_hdmi_init_valid
[07:54:23] [PASSED] drm_test_connector_hdmi_init_bpc_8
[07:54:23] [PASSED] drm_test_connector_hdmi_init_bpc_10
[07:54:23] [PASSED] drm_test_connector_hdmi_init_bpc_12
[07:54:23] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[07:54:23] [PASSED] drm_test_connector_hdmi_init_bpc_null
[07:54:23] [PASSED] drm_test_connector_hdmi_init_formats_empty
[07:54:23] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[07:54:23] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:54:23] [PASSED] supported_formats=0x9 yuv420_allowed=1
[07:54:23] [PASSED] supported_formats=0x9 yuv420_allowed=0
[07:54:23] [PASSED] supported_formats=0x3 yuv420_allowed=1
[07:54:23] [PASSED] supported_formats=0x3 yuv420_allowed=0
[07:54:23] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:54:23] [PASSED] drm_test_connector_hdmi_init_null_ddc
[07:54:23] [PASSED] drm_test_connector_hdmi_init_null_product
[07:54:23] [PASSED] drm_test_connector_hdmi_init_null_vendor
[07:54:23] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[07:54:23] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[07:54:23] [PASSED] drm_test_connector_hdmi_init_product_valid
[07:54:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[07:54:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[07:54:23] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[07:54:23] ========= drm_test_connector_hdmi_init_type_valid =========
[07:54:23] [PASSED] HDMI-A
[07:54:23] [PASSED] HDMI-B
[07:54:23] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[07:54:23] ======== drm_test_connector_hdmi_init_type_invalid ========
[07:54:23] [PASSED] Unknown
[07:54:23] [PASSED] VGA
[07:54:23] [PASSED] DVI-I
[07:54:23] [PASSED] DVI-D
[07:54:23] [PASSED] DVI-A
[07:54:23] [PASSED] Composite
[07:54:23] [PASSED] SVIDEO
[07:54:23] [PASSED] LVDS
[07:54:23] [PASSED] Component
[07:54:23] [PASSED] DIN
[07:54:23] [PASSED] DP
[07:54:23] [PASSED] TV
[07:54:23] [PASSED] eDP
[07:54:23] [PASSED] Virtual
[07:54:23] [PASSED] DSI
[07:54:23] [PASSED] DPI
[07:54:23] [PASSED] Writeback
[07:54:23] [PASSED] SPI
[07:54:23] [PASSED] USB
[07:54:23] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[07:54:23] ============ [PASSED] drmm_connector_hdmi_init =============
[07:54:23] ============= drmm_connector_init (3 subtests) =============
[07:54:23] [PASSED] drm_test_drmm_connector_init
[07:54:23] [PASSED] drm_test_drmm_connector_init_null_ddc
[07:54:23] ========= drm_test_drmm_connector_init_type_valid =========
[07:54:23] [PASSED] Unknown
[07:54:23] [PASSED] VGA
[07:54:23] [PASSED] DVI-I
[07:54:23] [PASSED] DVI-D
[07:54:23] [PASSED] DVI-A
[07:54:23] [PASSED] Composite
[07:54:23] [PASSED] SVIDEO
[07:54:23] [PASSED] LVDS
[07:54:23] [PASSED] Component
[07:54:23] [PASSED] DIN
[07:54:23] [PASSED] DP
[07:54:23] [PASSED] HDMI-A
[07:54:23] [PASSED] HDMI-B
[07:54:23] [PASSED] TV
[07:54:23] [PASSED] eDP
[07:54:23] [PASSED] Virtual
[07:54:23] [PASSED] DSI
[07:54:23] [PASSED] DPI
[07:54:23] [PASSED] Writeback
[07:54:23] [PASSED] SPI
[07:54:23] [PASSED] USB
[07:54:23] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[07:54:23] =============== [PASSED] drmm_connector_init ===============
[07:54:23] ========= drm_connector_dynamic_init (6 subtests) ==========
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_init
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_init_properties
[07:54:23] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[07:54:23] [PASSED] Unknown
[07:54:23] [PASSED] VGA
[07:54:23] [PASSED] DVI-I
[07:54:23] [PASSED] DVI-D
[07:54:23] [PASSED] DVI-A
[07:54:23] [PASSED] Composite
[07:54:23] [PASSED] SVIDEO
[07:54:23] [PASSED] LVDS
[07:54:23] [PASSED] Component
[07:54:23] [PASSED] DIN
[07:54:23] [PASSED] DP
[07:54:23] [PASSED] HDMI-A
[07:54:23] [PASSED] HDMI-B
[07:54:23] [PASSED] TV
[07:54:23] [PASSED] eDP
[07:54:23] [PASSED] Virtual
[07:54:23] [PASSED] DSI
[07:54:23] [PASSED] DPI
[07:54:23] [PASSED] Writeback
[07:54:23] [PASSED] SPI
[07:54:23] [PASSED] USB
[07:54:23] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[07:54:23] ======== drm_test_drm_connector_dynamic_init_name =========
[07:54:23] [PASSED] Unknown
[07:54:23] [PASSED] VGA
[07:54:23] [PASSED] DVI-I
[07:54:23] [PASSED] DVI-D
[07:54:23] [PASSED] DVI-A
[07:54:23] [PASSED] Composite
[07:54:23] [PASSED] SVIDEO
[07:54:23] [PASSED] LVDS
[07:54:23] [PASSED] Component
[07:54:23] [PASSED] DIN
[07:54:23] [PASSED] DP
[07:54:23] [PASSED] HDMI-A
[07:54:23] [PASSED] HDMI-B
[07:54:23] [PASSED] TV
[07:54:23] [PASSED] eDP
[07:54:23] [PASSED] Virtual
[07:54:23] [PASSED] DSI
[07:54:23] [PASSED] DPI
[07:54:23] [PASSED] Writeback
[07:54:23] [PASSED] SPI
[07:54:23] [PASSED] USB
[07:54:23] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[07:54:23] =========== [PASSED] drm_connector_dynamic_init ============
[07:54:23] ==== drm_connector_dynamic_register_early (4 subtests) =====
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[07:54:23] ====== [PASSED] drm_connector_dynamic_register_early =======
[07:54:23] ======= drm_connector_dynamic_register (7 subtests) ========
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[07:54:23] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[07:54:23] ========= [PASSED] drm_connector_dynamic_register ==========
[07:54:23] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[07:54:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[07:54:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[07:54:23] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[07:54:23] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[07:54:23] ========== drm_test_get_tv_mode_from_name_valid ===========
[07:54:23] [PASSED] NTSC
[07:54:23] [PASSED] NTSC-443
[07:54:23] [PASSED] NTSC-J
[07:54:23] [PASSED] PAL
[07:54:23] [PASSED] PAL-M
[07:54:23] [PASSED] PAL-N
[07:54:23] [PASSED] SECAM
[07:54:23] [PASSED] Mono
[07:54:23] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[07:54:23] [PASSED] drm_test_get_tv_mode_from_name_truncated
[07:54:23] ============ [PASSED] drm_get_tv_mode_from_name ============
[07:54:23] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[07:54:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[07:54:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[07:54:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[07:54:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[07:54:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[07:54:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[07:54:23] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[07:54:23] [PASSED] VIC 96
[07:54:23] [PASSED] VIC 97
[07:54:23] [PASSED] VIC 101
[07:54:23] [PASSED] VIC 102
[07:54:23] [PASSED] VIC 106
[07:54:23] [PASSED] VIC 107
[07:54:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[07:54:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[07:54:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[07:54:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[07:54:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[07:54:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[07:54:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[07:54:23] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[07:54:23] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[07:54:23] [PASSED] Automatic
[07:54:23] [PASSED] Full
[07:54:23] [PASSED] Limited 16:235
[07:54:23] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[07:54:23] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[07:54:23] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[07:54:23] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[07:54:23] === drm_test_drm_hdmi_connector_get_output_format_name ====
[07:54:23] [PASSED] RGB
[07:54:23] [PASSED] YUV 4:2:0
[07:54:23] [PASSED] YUV 4:2:2
[07:54:23] [PASSED] YUV 4:4:4
[07:54:23] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[07:54:23] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[07:54:23] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[07:54:23] ============= drm_damage_helper (21 subtests) ==============
[07:54:23] [PASSED] drm_test_damage_iter_no_damage
[07:54:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[07:54:23] [PASSED] drm_test_damage_iter_no_damage_src_moved
[07:54:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[07:54:23] [PASSED] drm_test_damage_iter_no_damage_not_visible
[07:54:23] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[07:54:23] [PASSED] drm_test_damage_iter_no_damage_no_fb
[07:54:23] [PASSED] drm_test_damage_iter_simple_damage
[07:54:23] [PASSED] drm_test_damage_iter_single_damage
[07:54:23] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[07:54:23] [PASSED] drm_test_damage_iter_single_damage_outside_src
[07:54:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[07:54:23] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[07:54:23] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[07:54:23] [PASSED] drm_test_damage_iter_single_damage_src_moved
[07:54:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[07:54:23] [PASSED] drm_test_damage_iter_damage
[07:54:23] [PASSED] drm_test_damage_iter_damage_one_intersect
[07:54:23] [PASSED] drm_test_damage_iter_damage_one_outside
[07:54:23] [PASSED] drm_test_damage_iter_damage_src_moved
[07:54:23] [PASSED] drm_test_damage_iter_damage_not_visible
[07:54:23] ================ [PASSED] drm_damage_helper ================
[07:54:23] ============== drm_dp_mst_helper (3 subtests) ==============
[07:54:23] ============== drm_test_dp_mst_calc_pbn_mode ==============
[07:54:23] [PASSED] Clock 154000 BPP 30 DSC disabled
[07:54:23] [PASSED] Clock 234000 BPP 30 DSC disabled
[07:54:23] [PASSED] Clock 297000 BPP 24 DSC disabled
[07:54:23] [PASSED] Clock 332880 BPP 24 DSC enabled
[07:54:23] [PASSED] Clock 324540 BPP 24 DSC enabled
[07:54:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[07:54:23] ============== drm_test_dp_mst_calc_pbn_div ===============
[07:54:23] [PASSED] Link rate 2000000 lane count 4
[07:54:23] [PASSED] Link rate 2000000 lane count 2
[07:54:23] [PASSED] Link rate 2000000 lane count 1
[07:54:23] [PASSED] Link rate 1350000 lane count 4
[07:54:23] [PASSED] Link rate 1350000 lane count 2
[07:54:23] [PASSED] Link rate 1350000 lane count 1
[07:54:23] [PASSED] Link rate 1000000 lane count 4
[07:54:23] [PASSED] Link rate 1000000 lane count 2
[07:54:23] [PASSED] Link rate 1000000 lane count 1
[07:54:23] [PASSED] Link rate 810000 lane count 4
[07:54:23] [PASSED] Link rate 810000 lane count 2
[07:54:23] [PASSED] Link rate 810000 lane count 1
[07:54:23] [PASSED] Link rate 540000 lane count 4
[07:54:23] [PASSED] Link rate 540000 lane count 2
[07:54:23] [PASSED] Link rate 540000 lane count 1
[07:54:23] [PASSED] Link rate 270000 lane count 4
[07:54:23] [PASSED] Link rate 270000 lane count 2
[07:54:23] [PASSED] Link rate 270000 lane count 1
[07:54:23] [PASSED] Link rate 162000 lane count 4
[07:54:23] [PASSED] Link rate 162000 lane count 2
[07:54:23] [PASSED] Link rate 162000 lane count 1
[07:54:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[07:54:23] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[07:54:23] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[07:54:23] [PASSED] DP_POWER_UP_PHY with port number
[07:54:23] [PASSED] DP_POWER_DOWN_PHY with port number
[07:54:23] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[07:54:23] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[07:54:23] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[07:54:23] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[07:54:23] [PASSED] DP_QUERY_PAYLOAD with port number
[07:54:23] [PASSED] DP_QUERY_PAYLOAD with VCPI
[07:54:23] [PASSED] DP_REMOTE_DPCD_READ with port number
[07:54:23] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[07:54:23] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[07:54:23] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[07:54:23] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[07:54:23] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[07:54:23] [PASSED] DP_REMOTE_I2C_READ with port number
[07:54:23] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[07:54:23] [PASSED] DP_REMOTE_I2C_READ with transactions array
[07:54:23] [PASSED] DP_REMOTE_I2C_WRITE with port number
[07:54:23] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[07:54:23] [PASSED] DP_REMOTE_I2C_WRITE with data array
[07:54:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[07:54:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[07:54:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[07:54:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[07:54:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[07:54:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[07:54:23] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[07:54:23] ================ [PASSED] drm_dp_mst_helper ================
[07:54:23] ================== drm_exec (7 subtests) ===================
[07:54:23] [PASSED] sanitycheck
[07:54:23] [PASSED] test_lock
[07:54:23] [PASSED] test_lock_unlock
[07:54:23] [PASSED] test_duplicates
[07:54:23] [PASSED] test_prepare
[07:54:23] [PASSED] test_prepare_array
[07:54:23] [PASSED] test_multiple_loops
[07:54:23] ==================== [PASSED] drm_exec =====================
[07:54:23] =========== drm_format_helper_test (17 subtests) ===========
[07:54:23] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[07:54:23] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[07:54:23] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[07:54:23] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[07:54:23] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[07:54:23] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[07:54:23] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[07:54:23] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[07:54:23] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[07:54:23] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[07:54:23] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[07:54:23] ============== drm_test_fb_xrgb8888_to_mono ===============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[07:54:23] ==================== drm_test_fb_swab =====================
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ================ [PASSED] drm_test_fb_swab =================
[07:54:23] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[07:54:23] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[07:54:23] [PASSED] single_pixel_source_buffer
[07:54:23] [PASSED] single_pixel_clip_rectangle
[07:54:23] [PASSED] well_known_colors
[07:54:23] [PASSED] destination_pitch
[07:54:23] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[07:54:23] ================= drm_test_fb_clip_offset =================
[07:54:23] [PASSED] pass through
[07:54:23] [PASSED] horizontal offset
[07:54:23] [PASSED] vertical offset
[07:54:23] [PASSED] horizontal and vertical offset
[07:54:23] [PASSED] horizontal offset (custom pitch)
[07:54:23] [PASSED] vertical offset (custom pitch)
[07:54:23] [PASSED] horizontal and vertical offset (custom pitch)
[07:54:23] ============= [PASSED] drm_test_fb_clip_offset =============
[07:54:23] =================== drm_test_fb_memcpy ====================
[07:54:23] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[07:54:23] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[07:54:23] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[07:54:23] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[07:54:23] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[07:54:23] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[07:54:23] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[07:54:23] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[07:54:23] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[07:54:23] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[07:54:23] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[07:54:23] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[07:54:23] =============== [PASSED] drm_test_fb_memcpy ================
[07:54:23] ============= [PASSED] drm_format_helper_test ==============
[07:54:23] ================= drm_format (18 subtests) =================
[07:54:23] [PASSED] drm_test_format_block_width_invalid
[07:54:23] [PASSED] drm_test_format_block_width_one_plane
[07:54:23] [PASSED] drm_test_format_block_width_two_plane
[07:54:23] [PASSED] drm_test_format_block_width_three_plane
[07:54:23] [PASSED] drm_test_format_block_width_tiled
[07:54:23] [PASSED] drm_test_format_block_height_invalid
[07:54:23] [PASSED] drm_test_format_block_height_one_plane
[07:54:23] [PASSED] drm_test_format_block_height_two_plane
[07:54:23] [PASSED] drm_test_format_block_height_three_plane
[07:54:23] [PASSED] drm_test_format_block_height_tiled
[07:54:23] [PASSED] drm_test_format_min_pitch_invalid
[07:54:23] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[07:54:23] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[07:54:23] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[07:54:23] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[07:54:23] [PASSED] drm_test_format_min_pitch_two_plane
[07:54:23] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[07:54:23] [PASSED] drm_test_format_min_pitch_tiled
[07:54:23] =================== [PASSED] drm_format ====================
[07:54:23] ============== drm_framebuffer (10 subtests) ===============
[07:54:23] ========== drm_test_framebuffer_check_src_coords ==========
[07:54:23] [PASSED] Success: source fits into fb
[07:54:23] [PASSED] Fail: overflowing fb with x-axis coordinate
[07:54:23] [PASSED] Fail: overflowing fb with y-axis coordinate
[07:54:23] [PASSED] Fail: overflowing fb with source width
[07:54:23] [PASSED] Fail: overflowing fb with source height
[07:54:23] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[07:54:23] [PASSED] drm_test_framebuffer_cleanup
[07:54:23] =============== drm_test_framebuffer_create ===============
[07:54:23] [PASSED] ABGR8888 normal sizes
[07:54:23] [PASSED] ABGR8888 max sizes
[07:54:23] [PASSED] ABGR8888 pitch greater than min required
[07:54:23] [PASSED] ABGR8888 pitch less than min required
[07:54:23] [PASSED] ABGR8888 Invalid width
[07:54:23] [PASSED] ABGR8888 Invalid buffer handle
[07:54:23] [PASSED] No pixel format
[07:54:23] [PASSED] ABGR8888 Width 0
[07:54:23] [PASSED] ABGR8888 Height 0
[07:54:23] [PASSED] ABGR8888 Out of bound height * pitch combination
[07:54:23] [PASSED] ABGR8888 Large buffer offset
[07:54:23] [PASSED] ABGR8888 Buffer offset for inexistent plane
[07:54:23] [PASSED] ABGR8888 Invalid flag
[07:54:23] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[07:54:23] [PASSED] ABGR8888 Valid buffer modifier
[07:54:23] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[07:54:23] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[07:54:23] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[07:54:23] [PASSED] NV12 Normal sizes
[07:54:23] [PASSED] NV12 Max sizes
[07:54:23] [PASSED] NV12 Invalid pitch
[07:54:23] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[07:54:23] [PASSED] NV12 different modifier per-plane
[07:54:23] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[07:54:23] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[07:54:23] [PASSED] NV12 Modifier for inexistent plane
[07:54:23] [PASSED] NV12 Handle for inexistent plane
[07:54:23] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[07:54:23] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[07:54:23] [PASSED] YVU420 Normal sizes
[07:54:23] [PASSED] YVU420 Max sizes
[07:54:23] [PASSED] YVU420 Invalid pitch
[07:54:23] [PASSED] YVU420 Different pitches
[07:54:23] [PASSED] YVU420 Different buffer offsets/pitches
[07:54:23] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[07:54:23] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[07:54:23] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[07:54:23] [PASSED] YVU420 Valid modifier
[07:54:23] [PASSED] YVU420 Different modifiers per plane
[07:54:23] [PASSED] YVU420 Modifier for inexistent plane
[07:54:23] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[07:54:23] [PASSED] X0L2 Normal sizes
[07:54:23] [PASSED] X0L2 Max sizes
[07:54:23] [PASSED] X0L2 Invalid pitch
[07:54:23] [PASSED] X0L2 Pitch greater than minimum required
[07:54:23] [PASSED] X0L2 Handle for inexistent plane
[07:54:23] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[07:54:23] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[07:54:23] [PASSED] X0L2 Valid modifier
[07:54:23] [PASSED] X0L2 Modifier for inexistent plane
[07:54:23] =========== [PASSED] drm_test_framebuffer_create ===========
[07:54:23] [PASSED] drm_test_framebuffer_free
[07:54:23] [PASSED] drm_test_framebuffer_init
[07:54:23] [PASSED] drm_test_framebuffer_init_bad_format
[07:54:23] [PASSED] drm_test_framebuffer_init_dev_mismatch
[07:54:23] [PASSED] drm_test_framebuffer_lookup
[07:54:23] [PASSED] drm_test_framebuffer_lookup_inexistent
[07:54:23] [PASSED] drm_test_framebuffer_modifiers_not_supported
[07:54:23] ================= [PASSED] drm_framebuffer =================
[07:54:23] ================ drm_gem_shmem (8 subtests) ================
[07:54:23] [PASSED] drm_gem_shmem_test_obj_create
[07:54:23] [PASSED] drm_gem_shmem_test_obj_create_private
[07:54:23] [PASSED] drm_gem_shmem_test_pin_pages
[07:54:23] [PASSED] drm_gem_shmem_test_vmap
[07:54:23] [PASSED] drm_gem_shmem_test_get_pages_sgt
[07:54:23] [PASSED] drm_gem_shmem_test_get_sg_table
[07:54:23] [PASSED] drm_gem_shmem_test_madvise
[07:54:23] [PASSED] drm_gem_shmem_test_purge
[07:54:23] ================== [PASSED] drm_gem_shmem ==================
[07:54:23] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[07:54:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[07:54:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[07:54:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[07:54:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[07:54:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[07:54:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[07:54:23] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[07:54:23] [PASSED] Automatic
[07:54:23] [PASSED] Full
[07:54:23] [PASSED] Limited 16:235
[07:54:23] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[07:54:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[07:54:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[07:54:23] [PASSED] drm_test_check_disable_connector
[07:54:23] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[07:54:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[07:54:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[07:54:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[07:54:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[07:54:23] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[07:54:23] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[07:54:23] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[07:54:23] [PASSED] drm_test_check_output_bpc_dvi
[07:54:23] [PASSED] drm_test_check_output_bpc_format_vic_1
[07:54:23] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[07:54:23] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[07:54:23] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[07:54:23] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[07:54:23] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[07:54:23] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[07:54:23] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[07:54:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[07:54:23] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[07:54:23] [PASSED] drm_test_check_broadcast_rgb_value
[07:54:23] [PASSED] drm_test_check_bpc_8_value
[07:54:23] [PASSED] drm_test_check_bpc_10_value
[07:54:23] [PASSED] drm_test_check_bpc_12_value
[07:54:23] [PASSED] drm_test_check_format_value
[07:54:23] [PASSED] drm_test_check_tmds_char_value
[07:54:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[07:54:23] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[07:54:23] [PASSED] drm_test_check_mode_valid
[07:54:23] [PASSED] drm_test_check_mode_valid_reject
[07:54:23] [PASSED] drm_test_check_mode_valid_reject_rate
[07:54:23] [PASSED] drm_test_check_mode_valid_reject_max_clock
[07:54:23] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[07:54:23] ================= drm_managed (2 subtests) =================
[07:54:23] [PASSED] drm_test_managed_release_action
[07:54:23] [PASSED] drm_test_managed_run_action
[07:54:23] =================== [PASSED] drm_managed ===================
[07:54:23] =================== drm_mm (6 subtests) ====================
[07:54:23] [PASSED] drm_test_mm_init
[07:54:23] [PASSED] drm_test_mm_debug
[07:54:23] [PASSED] drm_test_mm_align32
[07:54:23] [PASSED] drm_test_mm_align64
[07:54:23] [PASSED] drm_test_mm_lowest
[07:54:23] [PASSED] drm_test_mm_highest
[07:54:23] ===================== [PASSED] drm_mm ======================
[07:54:23] ============= drm_modes_analog_tv (5 subtests) =============
[07:54:23] [PASSED] drm_test_modes_analog_tv_mono_576i
[07:54:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[07:54:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[07:54:23] [PASSED] drm_test_modes_analog_tv_pal_576i
[07:54:23] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[07:54:23] =============== [PASSED] drm_modes_analog_tv ===============
[07:54:23] ============== drm_plane_helper (2 subtests) ===============
[07:54:23] =============== drm_test_check_plane_state ================
[07:54:23] [PASSED] clipping_simple
[07:54:23] [PASSED] clipping_rotate_reflect
[07:54:23] [PASSED] positioning_simple
[07:54:23] [PASSED] upscaling
[07:54:23] [PASSED] downscaling
[07:54:23] [PASSED] rounding1
[07:54:23] [PASSED] rounding2
[07:54:23] [PASSED] rounding3
[07:54:23] [PASSED] rounding4
[07:54:23] =========== [PASSED] drm_test_check_plane_state ============
[07:54:23] =========== drm_test_check_invalid_plane_state ============
[07:54:23] [PASSED] positioning_invalid
[07:54:23] [PASSED] upscaling_invalid
[07:54:23] [PASSED] downscaling_invalid
[07:54:23] ======= [PASSED] drm_test_check_invalid_plane_state ========
[07:54:23] ================ [PASSED] drm_plane_helper =================
[07:54:23] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[07:54:23] ====== drm_test_connector_helper_tv_get_modes_check =======
[07:54:23] [PASSED] None
[07:54:23] [PASSED] PAL
[07:54:23] [PASSED] NTSC
[07:54:23] [PASSED] Both, NTSC Default
[07:54:23] [PASSED] Both, PAL Default
[07:54:23] [PASSED] Both, NTSC Default, with PAL on command-line
[07:54:23] [PASSED] Both, PAL Default, with NTSC on command-line
[07:54:23] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[07:54:23] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[07:54:23] ================== drm_rect (9 subtests) ===================
[07:54:23] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[07:54:23] [PASSED] drm_test_rect_clip_scaled_not_clipped
[07:54:23] [PASSED] drm_test_rect_clip_scaled_clipped
[07:54:23] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[07:54:23] ================= drm_test_rect_intersect =================
[07:54:23] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[07:54:23] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[07:54:23] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[07:54:23] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[07:54:23] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[07:54:23] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[07:54:23] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[07:54:23] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[07:54:23] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[07:54:23] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[07:54:23] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[07:54:23] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[07:54:23] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[07:54:23] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[07:54:23] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[07:54:23] ============= [PASSED] drm_test_rect_intersect =============
[07:54:23] ================ drm_test_rect_calc_hscale ================
[07:54:23] [PASSED] normal use
[07:54:23] [PASSED] out of max range
[07:54:23] [PASSED] out of min range
[07:54:23] [PASSED] zero dst
[07:54:23] [PASSED] negative src
[07:54:23] [PASSED] negative dst
[07:54:23] ============ [PASSED] drm_test_rect_calc_hscale ============
[07:54:23] ================ drm_test_rect_calc_vscale ================
[07:54:23] [PASSED] normal use
[07:54:23] [PASSED] out of max range
[07:54:23] [PASSED] out of min range
[07:54:23] [PASSED] zero dst
[07:54:23] [PASSED] negative src
[07:54:23] [PASSED] negative dst
[07:54:23] ============ [PASSED] drm_test_rect_calc_vscale ============
[07:54:23] ================== drm_test_rect_rotate ===================
[07:54:23] [PASSED] reflect-x
[07:54:23] [PASSED] reflect-y
[07:54:23] [PASSED] rotate-0
[07:54:23] [PASSED] rotate-90
[07:54:23] [PASSED] rotate-180
[07:54:23] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[07:54:23] ============== [PASSED] drm_test_rect_rotate ===============
[07:54:23] ================ drm_test_rect_rotate_inv =================
[07:54:23] [PASSED] reflect-x
[07:54:23] [PASSED] reflect-y
[07:54:23] [PASSED] rotate-0
[07:54:23] [PASSED] rotate-90
[07:54:23] [PASSED] rotate-180
[07:54:23] [PASSED] rotate-270
[07:54:23] ============ [PASSED] drm_test_rect_rotate_inv =============
[07:54:23] ==================== [PASSED] drm_rect =====================
[07:54:23] ============ drm_sysfb_modeset_test (1 subtest) ============
[07:54:23] ============ drm_test_sysfb_build_fourcc_list =============
[07:54:23] [PASSED] no native formats
[07:54:23] [PASSED] XRGB8888 as native format
[07:54:23] [PASSED] remove duplicates
[07:54:23] [PASSED] convert alpha formats
[07:54:23] [PASSED] random formats
[07:54:23] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[07:54:23] ============= [PASSED] drm_sysfb_modeset_test ==============
[07:54:23] ============================================================
[07:54:23] Testing complete. Ran 616 tests: passed: 616
[07:54:23] Elapsed time: 23.546s total, 1.643s configuring, 21.683s building, 0.189s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[07:54:23] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:54:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:54:33] Starting KUnit Kernel (1/1)...
[07:54:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:54:33] ================= ttm_device (5 subtests) ==================
[07:54:33] [PASSED] ttm_device_init_basic
[07:54:33] [PASSED] ttm_device_init_multiple
[07:54:33] [PASSED] ttm_device_fini_basic
[07:54:33] [PASSED] ttm_device_init_no_vma_man
[07:54:33] ================== ttm_device_init_pools ==================
[07:54:33] [PASSED] No DMA allocations, no DMA32 required
[07:54:33] [PASSED] DMA allocations, DMA32 required
[07:54:33] [PASSED] No DMA allocations, DMA32 required
[07:54:33] [PASSED] DMA allocations, no DMA32 required
[07:54:33] ============== [PASSED] ttm_device_init_pools ==============
[07:54:33] =================== [PASSED] ttm_device ====================
[07:54:33] ================== ttm_pool (8 subtests) ===================
[07:54:33] ================== ttm_pool_alloc_basic ===================
[07:54:33] [PASSED] One page
[07:54:33] [PASSED] More than one page
[07:54:33] [PASSED] Above the allocation limit
[07:54:33] [PASSED] One page, with coherent DMA mappings enabled
[07:54:33] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:54:33] ============== [PASSED] ttm_pool_alloc_basic ===============
[07:54:33] ============== ttm_pool_alloc_basic_dma_addr ==============
[07:54:33] [PASSED] One page
[07:54:33] [PASSED] More than one page
[07:54:33] [PASSED] Above the allocation limit
[07:54:33] [PASSED] One page, with coherent DMA mappings enabled
[07:54:33] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:54:33] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[07:54:33] [PASSED] ttm_pool_alloc_order_caching_match
[07:54:33] [PASSED] ttm_pool_alloc_caching_mismatch
[07:54:33] [PASSED] ttm_pool_alloc_order_mismatch
[07:54:33] [PASSED] ttm_pool_free_dma_alloc
[07:54:33] [PASSED] ttm_pool_free_no_dma_alloc
[07:54:33] [PASSED] ttm_pool_fini_basic
[07:54:33] ==================== [PASSED] ttm_pool =====================
[07:54:33] ================ ttm_resource (8 subtests) =================
[07:54:33] ================= ttm_resource_init_basic =================
[07:54:33] [PASSED] Init resource in TTM_PL_SYSTEM
[07:54:33] [PASSED] Init resource in TTM_PL_VRAM
[07:54:33] [PASSED] Init resource in a private placement
[07:54:33] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[07:54:33] ============= [PASSED] ttm_resource_init_basic =============
[07:54:33] [PASSED] ttm_resource_init_pinned
[07:54:33] [PASSED] ttm_resource_fini_basic
[07:54:33] [PASSED] ttm_resource_manager_init_basic
[07:54:33] [PASSED] ttm_resource_manager_usage_basic
[07:54:33] [PASSED] ttm_resource_manager_set_used_basic
[07:54:33] [PASSED] ttm_sys_man_alloc_basic
[07:54:33] [PASSED] ttm_sys_man_free_basic
[07:54:33] ================== [PASSED] ttm_resource ===================
[07:54:33] =================== ttm_tt (15 subtests) ===================
[07:54:33] ==================== ttm_tt_init_basic ====================
[07:54:33] [PASSED] Page-aligned size
[07:54:33] [PASSED] Extra pages requested
[07:54:33] ================ [PASSED] ttm_tt_init_basic ================
[07:54:33] [PASSED] ttm_tt_init_misaligned
[07:54:33] [PASSED] ttm_tt_fini_basic
[07:54:33] [PASSED] ttm_tt_fini_sg
[07:54:33] [PASSED] ttm_tt_fini_shmem
[07:54:33] [PASSED] ttm_tt_create_basic
[07:54:33] [PASSED] ttm_tt_create_invalid_bo_type
[07:54:33] [PASSED] ttm_tt_create_ttm_exists
[07:54:33] [PASSED] ttm_tt_create_failed
[07:54:33] [PASSED] ttm_tt_destroy_basic
[07:54:33] [PASSED] ttm_tt_populate_null_ttm
[07:54:33] [PASSED] ttm_tt_populate_populated_ttm
[07:54:33] [PASSED] ttm_tt_unpopulate_basic
[07:54:33] [PASSED] ttm_tt_unpopulate_empty_ttm
[07:54:33] [PASSED] ttm_tt_swapin_basic
[07:54:33] ===================== [PASSED] ttm_tt ======================
[07:54:33] =================== ttm_bo (14 subtests) ===================
[07:54:33] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[07:54:33] [PASSED] Cannot be interrupted and sleeps
[07:54:33] [PASSED] Cannot be interrupted, locks straight away
[07:54:33] [PASSED] Can be interrupted, sleeps
[07:54:33] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[07:54:33] [PASSED] ttm_bo_reserve_locked_no_sleep
[07:54:33] [PASSED] ttm_bo_reserve_no_wait_ticket
[07:54:33] [PASSED] ttm_bo_reserve_double_resv
[07:54:33] [PASSED] ttm_bo_reserve_interrupted
[07:54:33] [PASSED] ttm_bo_reserve_deadlock
[07:54:33] [PASSED] ttm_bo_unreserve_basic
[07:54:33] [PASSED] ttm_bo_unreserve_pinned
[07:54:33] [PASSED] ttm_bo_unreserve_bulk
[07:54:33] [PASSED] ttm_bo_put_basic
[07:54:33] [PASSED] ttm_bo_put_shared_resv
[07:54:33] [PASSED] ttm_bo_pin_basic
[07:54:33] [PASSED] ttm_bo_pin_unpin_resource
[07:54:33] [PASSED] ttm_bo_multiple_pin_one_unpin
[07:54:33] ===================== [PASSED] ttm_bo ======================
[07:54:33] ============== ttm_bo_validate (21 subtests) ===============
[07:54:33] ============== ttm_bo_init_reserved_sys_man ===============
[07:54:33] [PASSED] Buffer object for userspace
[07:54:33] [PASSED] Kernel buffer object
[07:54:33] [PASSED] Shared buffer object
[07:54:33] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[07:54:33] ============== ttm_bo_init_reserved_mock_man ==============
[07:54:33] [PASSED] Buffer object for userspace
[07:54:33] [PASSED] Kernel buffer object
[07:54:33] [PASSED] Shared buffer object
[07:54:33] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[07:54:33] [PASSED] ttm_bo_init_reserved_resv
[07:54:33] ================== ttm_bo_validate_basic ==================
[07:54:33] [PASSED] Buffer object for userspace
[07:54:33] [PASSED] Kernel buffer object
[07:54:33] [PASSED] Shared buffer object
[07:54:33] ============== [PASSED] ttm_bo_validate_basic ==============
[07:54:33] [PASSED] ttm_bo_validate_invalid_placement
[07:54:33] ============= ttm_bo_validate_same_placement ==============
[07:54:33] [PASSED] System manager
[07:54:33] [PASSED] VRAM manager
[07:54:33] ========= [PASSED] ttm_bo_validate_same_placement ==========
[07:54:33] [PASSED] ttm_bo_validate_failed_alloc
[07:54:33] [PASSED] ttm_bo_validate_pinned
[07:54:33] [PASSED] ttm_bo_validate_busy_placement
[07:54:33] ================ ttm_bo_validate_multihop =================
[07:54:33] [PASSED] Buffer object for userspace
[07:54:33] [PASSED] Kernel buffer object
[07:54:33] [PASSED] Shared buffer object
[07:54:33] ============ [PASSED] ttm_bo_validate_multihop =============
[07:54:33] ========== ttm_bo_validate_no_placement_signaled ==========
[07:54:33] [PASSED] Buffer object in system domain, no page vector
[07:54:33] [PASSED] Buffer object in system domain with an existing page vector
[07:54:33] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[07:54:33] ======== ttm_bo_validate_no_placement_not_signaled ========
[07:54:33] [PASSED] Buffer object for userspace
[07:54:33] [PASSED] Kernel buffer object
[07:54:33] [PASSED] Shared buffer object
[07:54:33] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[07:54:33] [PASSED] ttm_bo_validate_move_fence_signaled
[07:54:33] ========= ttm_bo_validate_move_fence_not_signaled =========
[07:54:33] [PASSED] Waits for GPU
[07:54:33] [PASSED] Tries to lock straight away
[07:54:33] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[07:54:33] [PASSED] ttm_bo_validate_happy_evict
[07:54:33] [PASSED] ttm_bo_validate_all_pinned_evict
[07:54:33] [PASSED] ttm_bo_validate_allowed_only_evict
[07:54:33] [PASSED] ttm_bo_validate_deleted_evict
[07:54:33] [PASSED] ttm_bo_validate_busy_domain_evict
[07:54:33] [PASSED] ttm_bo_validate_evict_gutting
[07:54:33] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[07:54:33] ================= [PASSED] ttm_bo_validate =================
[07:54:33] ============================================================
[07:54:33] Testing complete. Ran 101 tests: passed: 101
[07:54:33] Elapsed time: 9.687s total, 1.653s configuring, 7.767s building, 0.228s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 21+ messages in thread
* ✓ Xe.CI.BAT: success for drm/xe: enable driver usage on non-4KiB kernels
2025-07-23 7:45 [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels Simon Richter
` (5 preceding siblings ...)
2025-07-23 7:54 ` ✓ CI.KUnit: success for drm/xe: enable driver usage on non-4KiB kernels Patchwork
@ 2025-07-23 8:31 ` Patchwork
2025-07-23 9:37 ` ✗ Xe.CI.Full: failure " Patchwork
7 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-07-23 8:31 UTC (permalink / raw)
To: Simon Richter; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1559 bytes --]
== Series Details ==
Series: drm/xe: enable driver usage on non-4KiB kernels
URL : https://patchwork.freedesktop.org/series/151983/
State : success
== Summary ==
CI Bug Log - changes from xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a_BAT -> xe-pw-151983v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 8)
------------------------------
Missing (1): bat-adlp-vm
Known issues
------------
Here are the changes found in xe-pw-151983v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-flip-vs-wf_vblank:
- bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#4543]) +3 other tests dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank.html
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
Build changes
-------------
* Linux: xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a -> xe-pw-151983v1
IGT_8473: b8b6f7615f840e15377c3b48a9c4178b3a248fb0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a: 3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a
xe-pw-151983v1: 151983v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/index.html
[-- Attachment #2: Type: text/html, Size: 2124 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* ✗ Xe.CI.Full: failure for drm/xe: enable driver usage on non-4KiB kernels
2025-07-23 7:45 [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels Simon Richter
` (6 preceding siblings ...)
2025-07-23 8:31 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-07-23 9:37 ` Patchwork
7 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-07-23 9:37 UTC (permalink / raw)
To: Simon Richter; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 52198 bytes --]
== Series Details ==
Series: drm/xe: enable driver usage on non-4KiB kernels
URL : https://patchwork.freedesktop.org/series/151983/
State : failure
== Summary ==
CI Bug Log - changes from xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a_FULL -> xe-pw-151983v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-151983v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-151983v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-151983v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_threads@threads-cm-fd-userptr-invalidate:
- shard-adlp: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-8/igt@xe_exec_threads@threads-cm-fd-userptr-invalidate.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_exec_threads@threads-cm-fd-userptr-invalidate.html
Known issues
------------
Here are the changes found in xe-pw-151983v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_atomic_transition@plane-use-after-nonblocking-unbind-fencing:
- shard-adlp: [PASS][3] -> [DMESG-WARN][4] ([Intel XE#2953] / [Intel XE#4173]) +3 other tests dmesg-warn
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-6/igt@kms_atomic_transition@plane-use-after-nonblocking-unbind-fencing.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_atomic_transition@plane-use-after-nonblocking-unbind-fencing.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#1124])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_bw@linear-tiling-2-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][6] ([Intel XE#367])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][7] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][8] ([Intel XE#787]) +188 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-463/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][9] ([Intel XE#787]) +11 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2652] / [Intel XE#787]) +3 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [PASS][11] -> [INCOMPLETE][12] ([Intel XE#3862]) +1 other test incomplete
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2887])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#455] / [Intel XE#787]) +26 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
- shard-dg2-set2: [PASS][15] -> [INCOMPLETE][16] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) +1 other test incomplete
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#306])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_hpd@dp-hpd-after-hibernate:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2252]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html
* igt@kms_chamelium_hpd@dp-hpd-storm-disable:
- shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#373])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [FAIL][20] ([Intel XE#1178])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-432/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][21] ([Intel XE#1188])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-1/igt@kms_content_protection@uevent@pipe-a-dp-2.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [PASS][22] -> [SKIP][23] ([Intel XE#2291]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][24] -> [FAIL][25] ([Intel XE#4633])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][26] ([Intel XE#2049]) +1 other test incomplete
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-433/igt@kms_flip@2x-dpms-vs-vblank-race.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: [PASS][27] -> [SKIP][28] ([Intel XE#2316]) +2 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-3/igt@kms_flip@2x-nonexisting-fb.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1:
- shard-adlp: [PASS][29] -> [DMESG-WARN][30] ([Intel XE#4543]) +4 other tests dmesg-warn
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-9/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-9/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-dg2-set2: [PASS][31] -> [INCOMPLETE][32] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-dg2-466/igt@kms_flip@flip-vs-suspend-interruptible.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2293] / [Intel XE#2380])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2293])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
- shard-dg2-set2: NOTRUN -> [SKIP][35] ([Intel XE#455]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-433/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
- shard-adlp: NOTRUN -> [SKIP][36] ([Intel XE#455]) +1 other test skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y:
- shard-adlp: [PASS][37] -> [DMESG-FAIL][38] ([Intel XE#4543])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-y.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][39] ([Intel XE#651]) +2 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][40] ([Intel XE#5390])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#2313]) +2 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][42] ([Intel XE#658])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_hdr@static-swap:
- shard-bmg: [PASS][43] -> [SKIP][44] ([Intel XE#1503]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-3/igt@kms_hdr@static-swap.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_hdr@static-swap.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#5021])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#1489])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#1489]) +1 other test skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@fbc-psr-cursor-blt:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#2234] / [Intel XE#2850])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_psr@fbc-psr-cursor-blt.html
* igt@kms_psr@fbc-psr2-no-drrs:
- shard-dg2-set2: NOTRUN -> [SKIP][49] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@kms_psr@fbc-psr2-no-drrs.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2330])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_setmode@clone-exclusive-crtc:
- shard-bmg: [PASS][51] -> [SKIP][52] ([Intel XE#1435])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-4/igt@kms_setmode@clone-exclusive-crtc.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_setmode@clone-exclusive-crtc.html
* igt@kms_vrr@cmrr:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2168])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_vrr@cmrr.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#1499])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@xe_eu_stall@non-blocking-re-enable:
- shard-bmg: [PASS][55] -> [FAIL][56] ([Intel XE#5420])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-5/igt@xe_eu_stall@non-blocking-re-enable.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-7/igt@xe_eu_stall@non-blocking-re-enable.html
* igt@xe_eudebug@basic-vm-access-parameters-faultable:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#4837]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@xe_eudebug@basic-vm-access-parameters-faultable.html
* igt@xe_exec_basic@multigpu-once-basic-defer-mmap:
- shard-dg2-set2: [PASS][58] -> [SKIP][59] ([Intel XE#1392]) +7 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-dg2-433/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-432/igt@xe_exec_basic@multigpu-once-basic-defer-mmap.html
* igt@xe_exec_basic@multigpu-once-null-defer-bind:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#2322])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@xe_exec_basic@multigpu-once-null-defer-bind.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][61] ([Intel XE#288])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-imm.html
* igt@xe_exec_reset@parallel-gt-reset:
- shard-adlp: [PASS][62] -> [DMESG-WARN][63] ([Intel XE#3876])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-8/igt@xe_exec_reset@parallel-gt-reset.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_exec_reset@parallel-gt-reset.html
* igt@xe_exec_system_allocator@many-stride-malloc-busy:
- shard-bmg: NOTRUN -> [INCOMPLETE][64] ([Intel XE#5401])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@xe_exec_system_allocator@many-stride-malloc-busy.html
* igt@xe_exec_system_allocator@process-many-free-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][65] ([Intel XE#4915]) +12 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@xe_exec_system_allocator@process-many-free-nomemset.html
* igt@xe_exec_threads@threads-hang-userptr-rebind:
- shard-adlp: [PASS][66] -> [DMESG-FAIL][67] ([Intel XE#3876])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-8/igt@xe_exec_threads@threads-hang-userptr-rebind.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_exec_threads@threads-hang-userptr-rebind.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-dg2-set2: NOTRUN -> [SKIP][68] ([Intel XE#4650])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
* igt@xe_query@multigpu-query-config:
- shard-dg2-set2: NOTRUN -> [SKIP][69] ([Intel XE#944])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@xe_query@multigpu-query-config.html
#### Possible fixes ####
* igt@kms_atomic@plane-invalid-params@pipe-a-hdmi-a-1:
- shard-adlp: [DMESG-WARN][70] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][71] +3 other tests pass
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-6/igt@kms_atomic@plane-invalid-params@pipe-a-hdmi-a-1.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-1/igt@kms_atomic@plane-invalid-params@pipe-a-hdmi-a-1.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-adlp: [SKIP][72] ([Intel XE#4947]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_color@invalid-ctm-matrix-sizes:
- shard-adlp: [SKIP][74] ([Intel XE#4950]) -> [PASS][75] +10 other tests pass
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_color@invalid-ctm-matrix-sizes.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_color@invalid-ctm-matrix-sizes.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-bmg: [SKIP][76] ([Intel XE#2291]) -> [PASS][77] +1 other test pass
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-bmg: [SKIP][78] ([Intel XE#2316]) -> [PASS][79] +6 other tests pass
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-6/igt@kms_flip@2x-plain-flip-interruptible.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-8/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@b-edp1:
- shard-lnl: [FAIL][80] ([Intel XE#5337]) -> [PASS][81] +1 other test pass
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-lnl-2/igt@kms_flip@flip-vs-blocking-wf-vblank@b-edp1.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-lnl-3/igt@kms_flip@flip-vs-blocking-wf-vblank@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [FAIL][82] ([Intel XE#301]) -> [PASS][83] +1 other test pass
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-suspend:
- shard-adlp: [DMESG-WARN][84] ([Intel XE#4543]) -> [PASS][85] +6 other tests pass
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-8/igt@kms_flip@flip-vs-suspend.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-6/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: [INCOMPLETE][86] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][87] +1 other test pass
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-7/igt@kms_flip@flip-vs-suspend-interruptible.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-3/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend@d-dp4:
- shard-dg2-set2: [INCOMPLETE][88] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][89] +1 other test pass
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-dg2-464/igt@kms_flip@flip-vs-suspend@d-dp4.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-433/igt@kms_flip@flip-vs-suspend@d-dp4.html
* igt@kms_flip@modeset-vs-vblank-race-interruptible:
- shard-adlp: [DMESG-WARN][90] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#5208]) -> [PASS][91]
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-1/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-3/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y:
- shard-adlp: [DMESG-FAIL][92] ([Intel XE#4543]) -> [PASS][93] +1 other test pass
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
* igt@kms_hdr@static-toggle:
- shard-bmg: [SKIP][94] ([Intel XE#1503]) -> [PASS][95] +2 other tests pass
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-6/igt@kms_hdr@static-toggle.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-8/igt@kms_hdr@static-toggle.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-bmg: [SKIP][96] ([Intel XE#3012]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-1/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-bmg: [SKIP][98] ([Intel XE#4596]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-x.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_vrr@cmrr@pipe-a-edp-1:
- shard-lnl: [FAIL][100] ([Intel XE#4459]) -> [PASS][101] +1 other test pass
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-lnl-5/igt@kms_vrr@cmrr@pipe-a-edp-1.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-lnl-7/igt@kms_vrr@cmrr@pipe-a-edp-1.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
- shard-dg2-set2: [SKIP][102] ([Intel XE#1392]) -> [PASS][103] +3 other tests pass
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-463/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset:
- shard-lnl: [FAIL][104] ([Intel XE#5018]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-lnl-7/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
* igt@xe_query@query-invalid-uc-fw-version-mbz:
- shard-adlp: [SKIP][106] ([Intel XE#4945]) -> [PASS][107] +32 other tests pass
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_query@query-invalid-uc-fw-version-mbz.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_query@query-invalid-uc-fw-version-mbz.html
* igt@xe_vm@munmap-style-unbind-end:
- shard-dg2-set2: [INCOMPLETE][108] ([Intel XE#2594]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-dg2-434/igt@xe_vm@munmap-style-unbind-end.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-dg2-434/igt@xe_vm@munmap-style-unbind-end.html
#### Warnings ####
* igt@kms_big_fb@linear-64bpp-rotate-270:
- shard-adlp: [SKIP][110] ([Intel XE#2351] / [Intel XE#4947]) -> [SKIP][111] ([Intel XE#316])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_big_fb@linear-64bpp-rotate-270.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_big_fb@linear-64bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-90:
- shard-adlp: [SKIP][112] ([Intel XE#4947]) -> [SKIP][113] ([Intel XE#316])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_big_fb@y-tiled-8bpp-rotate-90.html
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs:
- shard-adlp: [SKIP][114] ([Intel XE#4947]) -> [SKIP][115] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
* igt@kms_chamelium_frames@dp-crc-fast:
- shard-adlp: [SKIP][116] ([Intel XE#4950]) -> [SKIP][117] ([Intel XE#373]) +1 other test skip
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_chamelium_frames@dp-crc-fast.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_chamelium_frames@dp-crc-fast.html
* igt@kms_content_protection@atomic:
- shard-bmg: [FAIL][118] ([Intel XE#1178]) -> [SKIP][119] ([Intel XE#2341])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-2/igt@kms_content_protection@atomic.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@type1:
- shard-adlp: [SKIP][120] ([Intel XE#4950]) -> [SKIP][121] ([Intel XE#455]) +1 other test skip
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_content_protection@type1.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_content_protection@type1.html
* igt@kms_content_protection@uevent:
- shard-bmg: [SKIP][122] ([Intel XE#2341]) -> [FAIL][123] ([Intel XE#1188])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-6/igt@kms_content_protection@uevent.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-1/igt@kms_content_protection@uevent.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [DMESG-WARN][124] ([Intel XE#5354]) -> [SKIP][125] ([Intel XE#2291])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-3/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_dsc@dsc-with-output-formats:
- shard-adlp: [SKIP][126] ([Intel XE#4947]) -> [SKIP][127] ([Intel XE#455]) +2 other tests skip
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_dsc@dsc-with-output-formats.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_dsc@dsc-with-output-formats.html
* igt@kms_flip@2x-absolute-wf_vblank:
- shard-adlp: [SKIP][128] ([Intel XE#4950]) -> [SKIP][129] ([Intel XE#310])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_flip@2x-absolute-wf_vblank.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_flip@2x-absolute-wf_vblank.html
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-bmg: [INCOMPLETE][130] ([Intel XE#2049]) -> [SKIP][131] ([Intel XE#2316])
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-4/igt@kms_flip@2x-dpms-vs-vblank-race.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_flip@2x-dpms-vs-vblank-race.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-blt:
- shard-adlp: [SKIP][132] ([Intel XE#4947]) -> [SKIP][133] ([Intel XE#651])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-blt.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: [SKIP][134] ([Intel XE#2312]) -> [SKIP][135] ([Intel XE#2311]) +15 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][136] ([Intel XE#2312]) -> [SKIP][137] ([Intel XE#5390]) +5 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
- shard-adlp: [SKIP][138] ([Intel XE#4947]) -> [SKIP][139] ([Intel XE#656]) +4 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][140] ([Intel XE#2311]) -> [SKIP][141] ([Intel XE#2312]) +6 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt:
- shard-bmg: [SKIP][142] ([Intel XE#2312]) -> [SKIP][143] ([Intel XE#2313]) +11 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][144] ([Intel XE#2313]) -> [SKIP][145] ([Intel XE#2312]) +8 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt:
- shard-adlp: [SKIP][146] ([Intel XE#2351] / [Intel XE#4947]) -> [SKIP][147] ([Intel XE#656])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt:
- shard-adlp: [SKIP][148] ([Intel XE#4947]) -> [SKIP][149] ([Intel XE#653]) +2 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][150] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][151] ([Intel XE#3544])
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_pm_dc@dc9-dpms:
- shard-adlp: [SKIP][152] ([Intel XE#4947]) -> [FAIL][153] ([Intel XE#3325])
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_pm_dc@dc9-dpms.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf:
- shard-adlp: [SKIP][154] ([Intel XE#4947]) -> [SKIP][155] ([Intel XE#1489])
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_psr2_sf@psr2-overlay-plane-update-continuous-sf.html
* igt@kms_psr@fbc-pr-no-drrs:
- shard-adlp: [SKIP][156] ([Intel XE#4947]) -> [SKIP][157] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_psr@fbc-pr-no-drrs.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_psr@fbc-pr-no-drrs.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-adlp: [SKIP][158] ([Intel XE#4950]) -> [SKIP][159] ([Intel XE#3414])
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][160] ([Intel XE#1729]) -> [SKIP][161] ([Intel XE#2426])
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][162] ([Intel XE#2426]) -> [SKIP][163] ([Intel XE#2509])
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_ccs@block-copy-compressed-inc-dimension:
- shard-adlp: [SKIP][164] ([Intel XE#4945]) -> [SKIP][165] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_ccs@block-copy-compressed-inc-dimension.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_ccs@block-copy-compressed-inc-dimension.html
* igt@xe_compute_preempt@compute-preempt-many:
- shard-adlp: [SKIP][166] ([Intel XE#455]) -> [SKIP][167] ([Intel XE#455] / [Intel XE#5632]) +3 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-3/igt@xe_compute_preempt@compute-preempt-many.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-2/igt@xe_compute_preempt@compute-preempt-many.html
* igt@xe_eudebug@basic-vm-access-faultable:
- shard-adlp: [SKIP][168] ([Intel XE#4945]) -> [SKIP][169] ([Intel XE#4837] / [Intel XE#5565]) +2 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_eudebug@basic-vm-access-faultable.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_eudebug@basic-vm-access-faultable.html
* igt@xe_evict_ccs@evict-overcommit-standalone-nofree-samefd:
- shard-adlp: [SKIP][170] ([Intel XE#4945]) -> [SKIP][171] ([Intel XE#5563] / [Intel XE#688])
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_evict_ccs@evict-overcommit-standalone-nofree-samefd.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_evict_ccs@evict-overcommit-standalone-nofree-samefd.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race:
- shard-adlp: [SKIP][172] ([Intel XE#4945]) -> [SKIP][173] ([Intel XE#1392] / [Intel XE#5575])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_fault_mode@many-execqueues-rebind:
- shard-adlp: [SKIP][174] ([Intel XE#4945]) -> [SKIP][175] ([Intel XE#288] / [Intel XE#5561]) +3 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_exec_fault_mode@many-execqueues-rebind.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_exec_fault_mode@many-execqueues-rebind.html
* igt@xe_exec_system_allocator@many-large-execqueues-mmap-shared-remap-dontunmap-eocheck:
- shard-adlp: [SKIP][176] ([Intel XE#4945]) -> [SKIP][177] ([Intel XE#4915] / [Intel XE#5560]) +43 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_exec_system_allocator@many-large-execqueues-mmap-shared-remap-dontunmap-eocheck.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_exec_system_allocator@many-large-execqueues-mmap-shared-remap-dontunmap-eocheck.html
* igt@xe_mmap@pci-membarrier-parallel:
- shard-adlp: [SKIP][178] ([Intel XE#4945]) -> [SKIP][179] ([Intel XE#5100])
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_mmap@pci-membarrier-parallel.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_mmap@pci-membarrier-parallel.html
* igt@xe_oa@create-destroy-userspace-config:
- shard-adlp: [SKIP][180] ([Intel XE#4945]) -> [SKIP][181] ([Intel XE#3573])
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_oa@create-destroy-userspace-config.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_oa@create-destroy-userspace-config.html
* igt@xe_pm@s2idle-d3cold-basic-exec:
- shard-adlp: [SKIP][182] ([Intel XE#2284] / [Intel XE#366]) -> [ABORT][183] ([Intel XE#5545])
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-8/igt@xe_pm@s2idle-d3cold-basic-exec.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_pm@s2idle-d3cold-basic-exec.html
* igt@xe_query@multigpu-query-mem-usage:
- shard-adlp: [SKIP][184] ([Intel XE#4945]) -> [SKIP][185] ([Intel XE#944])
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a/shard-adlp-2/igt@xe_query@multigpu-query-mem-usage.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/shard-adlp-8/igt@xe_query@multigpu-query-mem-usage.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3325
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4945]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4945
[Intel XE#4947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4947
[Intel XE#4950]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4950
[Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5337
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5401
[Intel XE#5420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5420
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5560
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5563]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5563
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
[Intel XE#5632]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5632
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a -> xe-pw-151983v1
IGT_8473: b8b6f7615f840e15377c3b48a9c4178b3a248fb0 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3459-3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a: 3af657bd50a6cefddf6b0edb2c1d8ce747dfdd8a
xe-pw-151983v1: 151983v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151983v1/index.html
[-- Attachment #2: Type: text/html, Size: 61049 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes
2025-07-23 7:45 ` [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes Simon Richter
@ 2025-07-28 13:30 ` Rodrigo Vivi
2025-07-29 8:21 ` Simon Richter
2025-08-08 21:11 ` Simon Richter
2025-07-31 9:55 ` Mingcong Bai
1 sibling, 2 replies; 21+ messages in thread
From: Rodrigo Vivi @ 2025-07-28 13:30 UTC (permalink / raw)
To: Simon Richter
Cc: intel-xe, jeffbai, stable, Wenbin Fang, Haien Liang, Jianfeng Liu,
Shirong Liu, Haofeng Wu, Shang Yatsen
On Wed, Jul 23, 2025 at 04:45:13PM +0900, Simon Richter wrote:
> From: Mingcong Bai <jeffbai@aosc.io>
>
> The bo/ttm interfaces with kernel memory mapping from dedicated GPU
> memory. It is not correct to assume that SZ_4K would suffice for page
> alignment as there are a few hardware platforms that commonly uses non-
> 4KiB pages - for instance, 16KiB is the most commonly used kernel page
> size used on Loongson devices (of the LoongArch architecture).
>
> Per our testing, Intel Xe/Alchemist/Battlemage families of GPUs works on
> Loongson platforms so long as "Above 4G Decoding" was enabled and
> "Resizable BAR" was set to auto in the UEFI firmware settings.
>
> Without this fix, the kernel will hang at a kernel BUG():
>
> [ 7.425445] ------------[ cut here ]------------
> [ 7.430032] kernel BUG at drivers/gpu/drm/drm_gem.c:181!
> [ 7.435330] Oops - BUG[#1]:
> [ 7.438099] CPU: 0 UID: 0 PID: 102 Comm: kworker/0:4 Tainted: G E 6.13.3-aosc-main-00336-g60829239b300-dirty #3
> [ 7.449511] Tainted: [E]=UNSIGNED_MODULE
> [ 7.453402] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab
> [ 7.467144] Workqueue: events work_for_cpu_fn
> [ 7.471472] pc 9000000001045fa4 ra ffff8000025331dc tp 90000001010c8000 sp 90000001010cb960
> [ 7.479770] a0 900000012a3e8000 a1 900000010028c000 a2 000000000005d000 a3 0000000000000000
> [ 7.488069] a4 0000000000000000 a5 0000000000000000 a6 0000000000000000 a7 0000000000000001
> [ 7.496367] t0 0000000000001000 t1 9000000001045000 t2 0000000000000000 t3 0000000000000000
> [ 7.504665] t4 0000000000000000 t5 0000000000000000 t6 0000000000000000 t7 0000000000000000
> [ 7.504667] t8 0000000000000000 u0 90000000029ea7d8 s9 900000012a3e9360 s0 900000010028c000
> [ 7.504668] s1 ffff800002744000 s2 0000000000000000 s3 0000000000000000 s4 0000000000000001
> [ 7.504669] s5 900000012a3e8000 s6 0000000000000001 s7 0000000000022022 s8 0000000000000000
> [ 7.537855] ra: ffff8000025331dc ___xe_bo_create_locked+0x158/0x3b0 [xe]
> [ 7.544893] ERA: 9000000001045fa4 drm_gem_private_object_init+0xcc/0xd0
> [ 7.551639] CRMD: 000000b0 (PLV0 -IE -DA +PG DACF=CC DACM=CC -WE)
> [ 7.557785] PRMD: 00000004 (PPLV0 +PIE -PWE)
> [ 7.562111] EUEN: 00000000 (-FPE -SXE -ASXE -BTE)
> [ 7.566870] ECFG: 00071c1d (LIE=0,2-4,10-12 VS=7)
> [ 7.571628] ESTAT: 000c0000 [BRK] (IS= ECode=12 EsubCode=0)
> [ 7.577163] PRID: 0014d000 (Loongson-64bit, Loongson-3A6000-HV)
> [ 7.583128] Modules linked in: xe(E+) drm_gpuvm(E) drm_exec(E) drm_buddy(E) gpu_sched(E) drm_suballoc_helper(E) drm_display_helper(E) loongson(E) r8169(E) cec(E) rc_core(E) realtek(E) i2c_algo_bit(E) tpm_tis_spi(E) led_class(E) hid_generic(E) drm_ttm_helper(E) ttm(E) drm_client_lib(E) drm_kms_helper(E) sunrpc(E) la_ow_syscall(E) i2c_dev(E)
> [ 7.613049] Process kworker/0:4 (pid: 102, threadinfo=00000000bc26ebd1, task=0000000055480707)
> [ 7.621606] Stack : 0000000000000000 3030303a6963702b 000000000005d000 0000000000000000
> [ 7.629563] 0000000000000001 0000000000000000 0000000000000000 8e1bfae42b2f7877
> [ 7.637519] 000000000005d000 900000012a3e8000 900000012a3e9360 0000000000000000
> [ 7.645475] ffffffffffffffff 0000000000000000 0000000000022022 0000000000000000
> [ 7.653431] 0000000000000001 ffff800002533660 0000000000022022 9000000000234470
> [ 7.661386] 90000001010cba28 0000000000001000 0000000000000000 000000000005c300
> [ 7.669342] 900000012a3e8000 0000000000000000 0000000000000001 900000012a3e8000
> [ 7.677298] ffffffffffffffff 0000000000022022 900000012a3e9498 ffff800002533a14
> [ 7.685254] 0000000000022022 0000000000000000 900000000209c000 90000000010589e0
> [ 7.693209] 90000001010cbab8 ffff8000027c78c0 fffffffffffff000 900000012a3e8000
> [ 7.701165] ...
> [ 7.703588] Call Trace:
> [ 7.703590] [<9000000001045fa4>] drm_gem_private_object_init+0xcc/0xd0
> [ 7.712496] [<ffff8000025331d8>] ___xe_bo_create_locked+0x154/0x3b0 [xe]
> [ 7.719268] [<ffff80000253365c>] __xe_bo_create_locked+0x228/0x304 [xe]
> [ 7.725951] [<ffff800002533a10>] xe_bo_create_pin_map_at_aligned+0x70/0x1b0 [xe]
> [ 7.733410] [<ffff800002533c7c>] xe_managed_bo_create_pin_map+0x34/0xcc [xe]
> [ 7.740522] [<ffff800002533d58>] xe_managed_bo_create_from_data+0x44/0xb0 [xe]
> [ 7.747807] [<ffff80000258d19c>] xe_uc_fw_init+0x3ec/0x904 [xe]
> [ 7.753814] [<ffff80000254a478>] xe_guc_init+0x30/0x3dc [xe]
> [ 7.759553] [<ffff80000258bc04>] xe_uc_init+0x20/0xf0 [xe]
> [ 7.765121] [<ffff800002542abc>] xe_gt_init_hwconfig+0x5c/0xd0 [xe]
> [ 7.771461] [<ffff800002537204>] xe_device_probe+0x240/0x588 [xe]
> [ 7.777627] [<ffff800002575448>] xe_pci_probe+0x6c0/0xa6c [xe]
> [ 7.783540] [<9000000000e9828c>] local_pci_probe+0x4c/0xb4
> [ 7.788989] [<90000000002aa578>] work_for_cpu_fn+0x20/0x40
> [ 7.794436] [<90000000002aeb50>] process_one_work+0x1a4/0x458
> [ 7.800143] [<90000000002af5a0>] worker_thread+0x304/0x3fc
> [ 7.805591] [<90000000002bacac>] kthread+0x114/0x138
> [ 7.810520] [<9000000000241f64>] ret_from_kernel_thread+0x8/0xa4
> [ 7.816489]
> [ 7.817961] Code: 4c000020 29c3e2f9 53ff93ff <002a0001> 0015002c 03400000 02ff8063 29c04077 001500f7
> [ 7.827651]
> [ 7.829140] ---[ end trace 0000000000000000 ]---
>
> Revise all instances of `SZ_4K' with `PAGE_SIZE' and revise the call to
> `drm_gem_private_object_init()' in `*___xe_bo_create_locked()' (last call
> before BUG()) to use `size_t aligned_size' calculated from `PAGE_SIZE' to
> fix the above error.
>
> Cc: <stable@vger.kernel.org>
> Fixes: 4e03b584143e ("drm/xe/uapi: Reject bo creation of unaligned size")
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
> Tested-by: Mingcong Bai <jeffbai@aosc.io>
> Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
> Tested-by: Haien Liang <27873200@qq.com>
> Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
> Tested-by: Shirong Liu <lsr1024@qq.com>
> Tested-by: Haofeng Wu <s2600cw2@126.com>
> Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
> Link: https://t.me/c/1109254909/768552
> Co-developed-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
please remember to sign-off whenever you are sending or handling other's patches
> ---
> drivers/gpu/drm/xe/xe_bo.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 00ce067d5fd3..649e6d0e05a1 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -1861,9 +1861,9 @@ struct xe_bo *___xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
> flags |= XE_BO_FLAG_INTERNAL_64K;
> alignment = align >> PAGE_SHIFT;
> } else {
> - aligned_size = ALIGN(size, SZ_4K);
> + aligned_size = ALIGN(size, PAGE_SIZE);
> flags &= ~XE_BO_FLAG_INTERNAL_64K;
> - alignment = SZ_4K >> PAGE_SHIFT;
> + alignment = PAGE_SIZE >> PAGE_SHIFT;
okay, this is definitely right
> }
>
> if (type == ttm_bo_type_device && aligned_size != size)
> @@ -1887,7 +1887,7 @@ struct xe_bo *___xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
> #endif
> INIT_LIST_HEAD(&bo->vram_userfault_link);
>
> - drm_gem_private_object_init(&xe->drm, &bo->ttm.base, size);
> + drm_gem_private_object_init(&xe->drm, &bo->ttm.base, aligned_size);
but this is strange.
think that we could get rid of the aligned_size variable and only go with
size = ALIGN(size, PAGE_SIZE)
but then there are some checks in between on the alignment
and different handling in different if conditions.
We need further clean-up there to make the change obviously right first.
>
> if (resv) {
> ctx.allow_res_evict = !(flags & XE_BO_FLAG_NO_RESV_EVICT);
> --
> 2.47.2
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 2/5] drm/xe/guc: use GUC_SIZE (SZ_4K) for alignment
2025-07-23 7:45 ` [PATCH v3 2/5] drm/xe/guc: use GUC_SIZE (SZ_4K) for alignment Simon Richter
@ 2025-07-28 13:36 ` Rodrigo Vivi
0 siblings, 0 replies; 21+ messages in thread
From: Rodrigo Vivi @ 2025-07-28 13:36 UTC (permalink / raw)
To: Simon Richter
Cc: intel-xe, jeffbai, stable, Wenbin Fang, Haien Liang, Jianfeng Liu,
Shirong Liu, Haofeng Wu, Shang Yatsen
On Wed, Jul 23, 2025 at 04:45:14PM +0900, Simon Richter wrote:
> From: Mingcong Bai <jeffbai@aosc.io>
>
> Per the "Firmware" chapter in "drm/xe Intel GFX Driver", as well as
> "Volume 8: Command Stream Programming" in "Intel® Arc™ A-Series Graphics
> and Intel Data Center GPU Flex Series Open-Source Programmer's Reference
> Manual For the discrete GPUs code named "Alchemist" and "Arctic Sound-M""
> and "Intel® Iris® Xe MAX Graphics Open Source Programmer's Reference
> Manual For the 2020 Discrete GPU formerly named "DG1"":
>
> "The RINGBUF register sets (defined in Memory Interface Registers) are
> used to specify the ring buffer memory areas. The ring buffer must start
> on a 4KB boundary and be allocated in linear memory. The length of any
> one ring buffer is limited to 2MB."
>
> The Graphics micro (μ) Controller (GuC) really expects command buffers
> aligned to 4KiB boundaries.
>
> Current implementation uses `PAGE_SIZE' as an assumed alignment reference
> but 4KiB kernel page sizes is by no means a guarantee. On 16KiB-paged
> kernels, this causes driver failures after loading the GuC firmware:
>
> [ 7.398317] xe 0000:09:00.0: [drm] Found dg2/g10 (device ID 56a1) display version 13.00 stepping C0
> [ 7.410429] xe 0000:09:00.0: [drm] Using GuC firmware from i915/dg2_guc_70.bin version 70.36.0
> [ 10.719989] xe 0000:09:00.0: [drm] *ERROR* GT0: load failed: status = 0x800001EC, time = 3297ms, freq = 2400MHz (req 2400MHz), done = 0
> [ 10.732106] xe 0000:09:00.0: [drm] *ERROR* GT0: load failed: status: Reset = 0, BootROM = 0x76, UKernel = 0x01, MIA = 0x00, Auth = 0x02
> [ 10.744214] xe 0000:09:00.0: [drm] *ERROR* CRITICAL: Xe has declared device 0000:09:00.0 as wedged.
> Please file a _new_ bug report at https://gitlab.freedesktop.org/drm/xe/kernel/issues/new
> [ 10.828908] xe 0000:09:00.0: [drm] *ERROR* GT0: GuC mmio request 0x4100: no reply 0x4100
>
> Correct this by defining `GUC_ALIGN' as `SZ_4K' in accordance with the
> references above, and revising all instances of `PAGE_SIZE' as
> `GUC_ALIGN'. Then, revise `PAGE_ALIGN()' calls as `ALIGN()' with
> `GUC_ALIGN' as their second argument (overriding `PAGE_SIZE').
>
> Cc: stable@vger.kernel.org
> Fixes: 84d15f426110 ("drm/xe/guc: Add capture size check in GuC log buffer")
> Fixes: 9c8c7a7e6f1f ("drm/xe/guc: Prepare GuC register list and update ADS size for error capture")
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
> Tested-by: Mingcong Bai <jeffbai@aosc.io>
> Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
> Tested-by: Haien Liang <27873200@qq.com>
> Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
> Tested-by: Shirong Liu <lsr1024@qq.com>
> Tested-by: Haofeng Wu <s2600cw2@126.com>
> Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
> Link: https://t.me/c/1109254909/768552
> Co-developed-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
> ---
> drivers/gpu/drm/xe/xe_guc.c | 4 ++--
> drivers/gpu/drm/xe/xe_guc.h | 3 +++
> drivers/gpu/drm/xe/xe_guc_ads.c | 32 ++++++++++++++---------------
> drivers/gpu/drm/xe/xe_guc_capture.c | 8 ++++----
> drivers/gpu/drm/xe/xe_guc_ct.c | 2 +-
> drivers/gpu/drm/xe/xe_guc_log.c | 5 +++--
> drivers/gpu/drm/xe/xe_guc_pc.c | 4 ++--
> 7 files changed, 31 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index b1d1d6da3758..7ff8586f1942 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -91,7 +91,7 @@ static u32 guc_ctl_feature_flags(struct xe_guc *guc)
>
> static u32 guc_ctl_log_params_flags(struct xe_guc *guc)
> {
> - u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> PAGE_SHIFT;
> + u32 offset = guc_bo_ggtt_addr(guc, guc->log.bo) >> XE_PTE_SHIFT;
> u32 flags;
>
> #if (((CRASH_BUFFER_SIZE) % SZ_1M) == 0)
> @@ -144,7 +144,7 @@ static u32 guc_ctl_log_params_flags(struct xe_guc *guc)
>
> static u32 guc_ctl_ads_flags(struct xe_guc *guc)
> {
> - u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> PAGE_SHIFT;
> + u32 ads = guc_bo_ggtt_addr(guc, guc->ads.bo) >> XE_PTE_SHIFT;
> u32 flags = ads << GUC_ADS_ADDR_SHIFT;
these probably deserves a separate patch? or at least an explanation in the
commit message?
>
> return flags;
> diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
> index 22cf019a11bf..b3d049bdc047 100644
> --- a/drivers/gpu/drm/xe/xe_guc.h
> +++ b/drivers/gpu/drm/xe/xe_guc.h
> @@ -23,6 +23,9 @@
> #define GUC_FIRMWARE_VER(guc) \
> MAKE_GUC_VER_STRUCT((guc)->fw.versions.found[XE_UC_FW_VER_RELEASE])
>
> +/* GuC really expects command buffers aligned to 4K boundaries. */
> +#define GUC_ALIGN SZ_4K
> +
> struct drm_printer;
>
> void xe_guc_comm_init_early(struct xe_guc *guc);
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> index 131cfc56be00..6b5862615fd7 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -144,17 +144,17 @@ static size_t guc_ads_regset_size(struct xe_guc_ads *ads)
>
> static size_t guc_ads_golden_lrc_size(struct xe_guc_ads *ads)
> {
> - return PAGE_ALIGN(ads->golden_lrc_size);
> + return ALIGN(ads->golden_lrc_size, GUC_ALIGN);
> }
>
> static u32 guc_ads_waklv_size(struct xe_guc_ads *ads)
> {
> - return PAGE_ALIGN(ads->ads_waklv_size);
> + return ALIGN(ads->ads_waklv_size, GUC_ALIGN);
> }
>
> static size_t guc_ads_capture_size(struct xe_guc_ads *ads)
> {
> - return PAGE_ALIGN(ads->capture_size);
> + return ALIGN(ads->capture_size, GUC_ALIGN);
> }
>
> static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)
> @@ -169,7 +169,7 @@ static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)
>
> static size_t guc_ads_private_data_size(struct xe_guc_ads *ads)
> {
> - return PAGE_ALIGN(ads_to_guc(ads)->fw.private_data_size);
> + return ALIGN(ads_to_guc(ads)->fw.private_data_size, GUC_ALIGN);
> }
>
> static size_t guc_ads_regset_offset(struct xe_guc_ads *ads)
> @@ -184,7 +184,7 @@ static size_t guc_ads_golden_lrc_offset(struct xe_guc_ads *ads)
> offset = guc_ads_regset_offset(ads) +
> guc_ads_regset_size(ads);
>
> - return PAGE_ALIGN(offset);
> + return ALIGN(offset, GUC_ALIGN);
> }
>
> static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads)
> @@ -194,7 +194,7 @@ static size_t guc_ads_waklv_offset(struct xe_guc_ads *ads)
> offset = guc_ads_golden_lrc_offset(ads) +
> guc_ads_golden_lrc_size(ads);
>
> - return PAGE_ALIGN(offset);
> + return ALIGN(offset, GUC_ALIGN);
> }
>
> static size_t guc_ads_capture_offset(struct xe_guc_ads *ads)
> @@ -204,7 +204,7 @@ static size_t guc_ads_capture_offset(struct xe_guc_ads *ads)
> offset = guc_ads_waklv_offset(ads) +
> guc_ads_waklv_size(ads);
>
> - return PAGE_ALIGN(offset);
> + return ALIGN(offset, GUC_ALIGN);
> }
>
> static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads)
> @@ -214,7 +214,7 @@ static size_t guc_ads_um_queues_offset(struct xe_guc_ads *ads)
> offset = guc_ads_capture_offset(ads) +
> guc_ads_capture_size(ads);
>
> - return PAGE_ALIGN(offset);
> + return ALIGN(offset, GUC_ALIGN);
> }
>
> static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads)
> @@ -224,7 +224,7 @@ static size_t guc_ads_private_data_offset(struct xe_guc_ads *ads)
> offset = guc_ads_um_queues_offset(ads) +
> guc_ads_um_queues_size(ads);
>
> - return PAGE_ALIGN(offset);
> + return ALIGN(offset, GUC_ALIGN);
> }
>
> static size_t guc_ads_size(struct xe_guc_ads *ads)
> @@ -277,7 +277,7 @@ static size_t calculate_golden_lrc_size(struct xe_guc_ads *ads)
> continue;
>
> real_size = xe_gt_lrc_size(gt, class);
> - alloc_size = PAGE_ALIGN(real_size);
> + alloc_size = ALIGN(real_size, GUC_ALIGN);
> total_size += alloc_size;
> }
>
> @@ -647,12 +647,12 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)
> offsetof(struct __guc_ads_blob, system_info));
>
> /* first, set aside the first page for a capture_list with zero descriptors */
> - total_size = PAGE_SIZE;
> + total_size = GUC_ALIGN;
> if (!xe_guc_capture_getnullheader(guc, &ptr, &size))
> xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), capture_offset, ptr, size);
>
> null_ggtt = ads_ggtt + capture_offset;
> - capture_offset += PAGE_SIZE;
> + capture_offset += GUC_ALIGN;
>
> /*
> * Populate capture list : at this point adps is already allocated and
> @@ -716,10 +716,10 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)
> }
> }
>
> - if (ads->capture_size != PAGE_ALIGN(total_size))
> + if (ads->capture_size != ALIGN(total_size, GUC_ALIGN))
> xe_gt_dbg(gt, "Updated ADS capture size %d (was %d)\n",
> - PAGE_ALIGN(total_size), ads->capture_size);
> - return PAGE_ALIGN(total_size);
> + ALIGN(total_size, GUC_ALIGN), ads->capture_size);
> + return ALIGN(total_size, GUC_ALIGN);
> }
>
> static void guc_mmio_regset_write_one(struct xe_guc_ads *ads,
> @@ -967,7 +967,7 @@ static void guc_golden_lrc_populate(struct xe_guc_ads *ads)
> xe_gt_assert(gt, gt->default_lrc[class]);
>
> real_size = xe_gt_lrc_size(gt, class);
> - alloc_size = PAGE_ALIGN(real_size);
> + alloc_size = ALIGN(real_size, GUC_ALIGN);
> total_size += alloc_size;
>
> xe_map_memcpy_to(xe, ads_to_map(ads), offset,
> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
> index 859a3ba91be5..34e9ea9b2935 100644
> --- a/drivers/gpu/drm/xe/xe_guc_capture.c
> +++ b/drivers/gpu/drm/xe/xe_guc_capture.c
> @@ -591,8 +591,8 @@ guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
> return -ENODATA;
>
> if (size)
> - *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
> - (num_regs * sizeof(struct guc_mmio_reg)));
> + *size = ALIGN((sizeof(struct guc_debug_capture_list)) +
> + (num_regs * sizeof(struct guc_mmio_reg)), GUC_ALIGN);
>
> return 0;
> }
> @@ -739,7 +739,7 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
> * sequence, that is, during the pre-hwconfig phase before we have
> * the exact engine fusing info.
> */
> - total_size = PAGE_SIZE; /* Pad a page in front for empty lists */
> + total_size = GUC_ALIGN; /* Pad a page in front for empty lists */
> for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; i++) {
> for (j = 0; j < GUC_CAPTURE_LIST_CLASS_MAX; j++) {
> if (xe_guc_capture_getlistsize(guc, i,
> @@ -759,7 +759,7 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
> total_size += global_size;
> }
>
> - return PAGE_ALIGN(total_size);
> + return ALIGN(total_size, GUC_ALIGN);
> }
>
> static int guc_capture_output_size_est(struct xe_guc *guc)
> diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
> index b6acccfcd351..557c14b386fd 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ct.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ct.c
> @@ -223,7 +223,7 @@ int xe_guc_ct_init_noalloc(struct xe_guc_ct *ct)
> struct xe_gt *gt = ct_to_gt(ct);
> int err;
>
> - xe_gt_assert(gt, !(guc_ct_size() % PAGE_SIZE));
> + xe_gt_assert(gt, !(guc_ct_size() % GUC_ALIGN));
>
> ct->g2h_wq = alloc_ordered_workqueue("xe-g2h-wq", WQ_MEM_RECLAIM);
> if (!ct->g2h_wq)
> diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
> index c01ccb35dc75..becf74a28d90 100644
> --- a/drivers/gpu/drm/xe/xe_guc_log.c
> +++ b/drivers/gpu/drm/xe/xe_guc_log.c
> @@ -15,6 +15,7 @@
> #include "xe_force_wake.h"
> #include "xe_gt.h"
> #include "xe_gt_printk.h"
> +#include "xe_guc.h"
> #include "xe_map.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
> @@ -58,7 +59,7 @@ static size_t guc_log_size(void)
> * | Capture logs |
> * +===============================+ + CAPTURE_SIZE
> */
> - return PAGE_SIZE + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +
> + return GUC_ALIGN + CRASH_BUFFER_SIZE + DEBUG_BUFFER_SIZE +
> CAPTURE_BUFFER_SIZE;
> }
>
> @@ -328,7 +329,7 @@ u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type
> u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type)
> {
> enum guc_log_buffer_type i;
> - u32 offset = PAGE_SIZE;/* for the log_buffer_states */
> + u32 offset = GUC_ALIGN; /* for the log_buffer_states */
>
> for (i = GUC_LOG_BUFFER_CRASH_DUMP; i < GUC_LOG_BUFFER_TYPE_MAX; ++i) {
> if (i == type)
> diff --git a/drivers/gpu/drm/xe/xe_guc_pc.c b/drivers/gpu/drm/xe/xe_guc_pc.c
> index 68b192fe3b32..5a69b5682fc8 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pc.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pc.c
> @@ -1190,7 +1190,7 @@ int xe_guc_pc_start(struct xe_guc_pc *pc)
> {
> struct xe_device *xe = pc_to_xe(pc);
> struct xe_gt *gt = pc_to_gt(pc);
> - u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
> + u32 size = ALIGN(sizeof(struct slpc_shared_data), GUC_ALIGN);
> unsigned int fw_ref;
> ktime_t earlier;
> int ret;
> @@ -1318,7 +1318,7 @@ int xe_guc_pc_init(struct xe_guc_pc *pc)
> struct xe_tile *tile = gt_to_tile(gt);
> struct xe_device *xe = gt_to_xe(gt);
> struct xe_bo *bo;
> - u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
> + u32 size = ALIGN(sizeof(struct slpc_shared_data), GUC_ALIGN);
> int err;
>
> if (xe->info.skip_guc_pc)
> --
> 2.47.2
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 3/5] drm/xe/regs: fix RING_CTL_SIZE(size) calculation
2025-07-23 7:45 ` [PATCH v3 3/5] drm/xe/regs: fix RING_CTL_SIZE(size) calculation Simon Richter
@ 2025-07-28 13:40 ` Rodrigo Vivi
0 siblings, 0 replies; 21+ messages in thread
From: Rodrigo Vivi @ 2025-07-28 13:40 UTC (permalink / raw)
To: Simon Richter
Cc: intel-xe, jeffbai, stable, Wenbin Fang, Haien Liang, Jianfeng Liu,
Shirong Liu, Haofeng Wu, Shang Yatsen
On Wed, Jul 23, 2025 at 04:45:15PM +0900, Simon Richter wrote:
> From: Mingcong Bai <jeffbai@aosc.io>
>
> Similar to the preceding patch for GuC (and with the same references),
> Intel GPUs expects command buffers to align to 4KiB boundaries.
>
> Current code uses `PAGE_SIZE' as an assumed alignment reference but 4KiB
> kernel page sizes is by no means a guarantee. On 16KiB-paged kernels, this
> causes driver failures during boot up:
>
> [ 14.018975] ------------[ cut here ]------------
> [ 14.023562] xe 0000:09:00.0: [drm] GT0: Kernel-submitted job timed out
> [ 14.030084] WARNING: CPU: 3 PID: 564 at drivers/gpu/drm/xe/xe_guc_submit.c:1181 guc_exec_queue_timedout_job+0x1c0/0xacc [xe]
> [ 14.041300] Modules linked in: nf_conntrack_netbios_ns(E) nf_conntrack_broadcast(E) nft_fib_inet(E) nft_fib_ipv4(E) nft_fib_ipv6(E) nft_fib(E) nft_reject_inet(E) nf_reject_ipv4(E) nf_reject_ipv6(E) nft_reject(E) nft_ct(E) nft_chain_nat(E) ip6table_nat(E) ip6table_mangle(E) ip6table_raw(E) ip6table_security(E) iptable_nat(E) nf_nat(E) nf_conntrack(E) nf_defrag_ipv6(E) nf_defrag_ipv4(E) rfkill(E) iptable_mangle(E) iptable_raw(E) iptable_security(E) ip_set(E) nf_tables(E) ip6table_filter(E) ip6_tables(E) iptable_filter(E) snd_hda_codec_conexant(E) snd_hda_codec_generic(E) snd_hda_codec_hdmi(E) nls_iso8859_1(E) snd_hda_intel(E) snd_intel_dspcfg(E) qrtr(E) nls_cp437(E) snd_hda_codec(E) spi_loongson_pci(E) rtc_efi(E) snd_hda_core(E) loongson3_cpufreq(E) spi_loongson_core(E) snd_hwdep(E) snd_pcm(E) snd_timer(E) snd(E) soundcore(E) gpio_loongson_64bit(E) input_leds(E) rtc_loongson(E) i2c_ls2x(E) mousedev(E) sch_fq_codel(E) fuse(E) nfnetlink(E) dmi_sysfs(E) ip_tables(E) x_tables(E) xe(E) d
> rm_gpuvm(E) drm_buddy(E) gpu_sched(E)
> [ 14.041369] drm_exec(E) drm_suballoc_helper(E) drm_display_helper(E) cec(E) rc_core(E) hid_generic(E) tpm_tis_spi(E) r8169(E) realtek(E) led_class(E) loongson(E) i2c_algo_bit(E) drm_ttm_helper(E) ttm(E) drm_client_lib(E) drm_kms_helper(E) sunrpc(E) i2c_dev(E)
> [ 14.153910] CPU: 3 UID: 0 PID: 564 Comm: kworker/u32:2 Tainted: G E 6.14.0-rc4-aosc-main-gbad70b1cd8b0-dirty #7
> [ 14.165325] Tainted: [E]=UNSIGNED_MODULE
> [ 14.169220] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab
> [ 14.182970] Workqueue: gt-ordered-wq drm_sched_job_timedout [gpu_sched]
> [ 14.189549] pc ffff8000024f3760 ra ffff8000024f3760 tp 900000012f150000 sp 900000012f153ca0
> [ 14.197853] a0 0000000000000000 a1 0000000000000000 a2 0000000000000000 a3 0000000000000000
> [ 14.206156] a4 0000000000000000 a5 0000000000000000 a6 0000000000000000 a7 0000000000000000
> [ 14.214458] t0 0000000000000000 t1 0000000000000000 t2 0000000000000000 t3 0000000000000000
> [ 14.222761] t4 0000000000000000 t5 0000000000000000 t6 0000000000000000 t7 0000000000000000
> [ 14.231064] t8 0000000000000000 u0 900000000195c0c8 s9 900000012e4dcf48 s0 90000001285f3640
> [ 14.239368] s1 90000001004f8000 s2 ffff8000026ec000 s3 0000000000000000 s4 900000012e4dc028
> [ 14.247672] s5 90000001009f5e00 s6 000000000000137e s7 0000000000000001 s8 900000012f153ce8
> [ 14.255975] ra: ffff8000024f3760 guc_exec_queue_timedout_job+0x1c0/0xacc [xe]
> [ 14.263379] ERA: ffff8000024f3760 guc_exec_queue_timedout_job+0x1c0/0xacc [xe]
> [ 14.270777] CRMD: 000000b0 (PLV0 -IE -DA +PG DACF=CC DACM=CC -WE)
> [ 14.276927] PRMD: 00000004 (PPLV0 +PIE -PWE)
> [ 14.281258] EUEN: 00000000 (-FPE -SXE -ASXE -BTE)
> [ 14.286024] ECFG: 00071c1d (LIE=0,2-4,10-12 VS=7)
> [ 14.290790] ESTAT: 000c0000 [BRK] (IS= ECode=12 EsubCode=0)
> [ 14.296329] PRID: 0014d000 (Loongson-64bit, Loongson-3A6000-HV)
> [ 14.302299] CPU: 3 UID: 0 PID: 564 Comm: kworker/u32:2 Tainted: G E 6.14.0-rc4-aosc-main-gbad70b1cd8b0-dirty #7
> [ 14.302302] Tainted: [E]=UNSIGNED_MODULE
> [ 14.302302] Hardware name: Loongson Loongson-3A6000-HV-7A2000-1w-V0.1-EVB/Loongson-3A6000-HV-7A2000-1w-EVB-V1.21, BIOS Loongson-UDK2018-V4.0.05756-prestab
> [ 14.302304] Workqueue: gt-ordered-wq drm_sched_job_timedout [gpu_sched]
> [ 14.302307] Stack : 900000012f153928 d84a6232d48f1ac7 900000000023eb34 900000012f150000
> [ 14.302310] 900000012f153900 0000000000000000 900000012f153908 9000000001c31c70
> [ 14.302313] 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 14.302315] 0000000000000000 d84a6232d48f1ac7 0000000000000000 0000000000000000
> [ 14.302318] 0000000000000000 0000000000000000 0000000000000000 0000000000000000
> [ 14.302320] 0000000000000000 0000000000000000 00000000072b4000 900000012e4dcf48
> [ 14.302323] 9000000001eb8000 0000000000000000 9000000001c31c70 0000000000000004
> [ 14.302325] 0000000000000004 0000000000000000 000000000000137e 0000000000000001
> [ 14.302328] 900000012f153ce8 9000000001c31c70 9000000000244174 0000555581840b98
> [ 14.302331] 00000000000000b0 0000000000000004 0000000000000000 0000000000071c1d
> [ 14.302333] ...
> [ 14.302335] Call Trace:
> [ 14.302336] [<9000000000244174>] show_stack+0x3c/0x16c
> [ 14.302341] [<900000000023eb30>] dump_stack_lvl+0x84/0xe0
> [ 14.302346] [<9000000000288208>] __warn+0x8c/0x174
> [ 14.302350] [<90000000017c1918>] report_bug+0x1c0/0x22c
> [ 14.302354] [<90000000017f66e8>] do_bp+0x280/0x344
> [ 14.302359]
> [ 14.302360] ---[ end trace 0000000000000000 ]---
>
> Revise calculation of `RING_CTL_SIZE(size)' to use `SZ_4K' to fix the
> aforementioned issue.
>
> Cc: stable@vger.kernel.org
> Fixes: b79e8fd954c4 ("drm/xe: Remove dependency on intel_engine_regs.h")
> Tested-by: Mingcong Bai <jeffbai@aosc.io>
> Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
> Tested-by: Haien Liang <27873200@qq.com>
> Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
> Tested-by: Shirong Liu <lsr1024@qq.com>
> Tested-by: Haofeng Wu <s2600cw2@126.com>
> Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
> Link: https://t.me/c/1109254909/768552
> Co-developed-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
> ---
> drivers/gpu/drm/xe/regs/xe_engine_regs.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index 7ade41e2b7b3..a7608c50c907 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -56,7 +56,7 @@
> #define RING_START(base) XE_REG((base) + 0x38)
>
> #define RING_CTL(base) XE_REG((base) + 0x3c)
> -#define RING_CTL_SIZE(size) ((size) - PAGE_SIZE) /* in bytes -> pages */
> +#define RING_CTL_SIZE(size) ((size) - SZ_4K) /* in bytes -> pages */
XE_PAGE_SIZE ?
or perhaps we should kill the xe_page_size in favor of only using
SZ_4K directly?
But also, this makes me think about the previous patch. There we should go
then with XE_PAGE_SIZE or with directly SZ_4K instead of creating yet another
define exclusively for GuC.
What I'm trying to say is that we need some consistency...
>
> #define RING_START_UDW(base) XE_REG((base) + 0x48)
>
> --
> 2.47.2
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 5/5] drm/xe/query: use PAGE_SIZE as the minimum page alignment
2025-07-23 7:45 ` [PATCH v3 5/5] drm/xe/query: use PAGE_SIZE as the minimum page alignment Simon Richter
@ 2025-07-28 13:45 ` Rodrigo Vivi
2025-07-28 22:02 ` Simon Richter
0 siblings, 1 reply; 21+ messages in thread
From: Rodrigo Vivi @ 2025-07-28 13:45 UTC (permalink / raw)
To: Simon Richter
Cc: intel-xe, jeffbai, stable, Wenbin Fang, Haien Liang, Jianfeng Liu,
Shirong Liu, Haofeng Wu, Shang Yatsen
On Wed, Jul 23, 2025 at 04:45:17PM +0900, Simon Richter wrote:
> From: Mingcong Bai <jeffbai@aosc.io>
>
> As this component hooks into userspace API, it should be assumed that it
> will play well with non-4KiB/64KiB pages.
>
> Use `PAGE_SIZE' as the final reference for page alignment instead.
>
> Cc: stable@vger.kernel.org
> Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
> Fixes: 801989b08aff ("drm/xe/uapi: Make constant comments visible in kernel doc")
> Tested-by: Mingcong Bai <jeffbai@aosc.io>
> Tested-by: Wenbin Fang <fangwenbin@vip.qq.com>
> Tested-by: Haien Liang <27873200@qq.com>
> Tested-by: Jianfeng Liu <liujianfeng1994@gmail.com>
> Tested-by: Shirong Liu <lsr1024@qq.com>
> Tested-by: Haofeng Wu <s2600cw2@126.com>
> Link: https://github.com/FanFansfan/loongson-linux/commit/22c55ab3931c32410a077b3ddb6dca3f28223360
> Link: https://t.me/c/1109254909/768552
> Co-developed-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Shang Yatsen <429839446@qq.com>
> Signed-off-by: Mingcong Bai <jeffbai@aosc.io>
> ---
> drivers/gpu/drm/xe/xe_query.c | 2 +-
> include/uapi/drm/xe_drm.h | 7 +++++--
> 2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
> index 44d44bbc71dc..f695d5d0610d 100644
> --- a/drivers/gpu/drm/xe/xe_query.c
> +++ b/drivers/gpu/drm/xe/xe_query.c
> @@ -347,7 +347,7 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
> config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
> DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY;
> config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =
> - xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
> + xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : PAGE_SIZE;
> config->info[DRM_XE_QUERY_CONFIG_VA_BITS] = xe->info.va_bits;
> config->info[DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY] =
> xe_exec_queue_device_get_max_priority(xe);
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index e2426413488f..5ba76b9369ba 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -397,8 +397,11 @@ struct drm_xe_query_mem_regions {
> * has low latency hint support
> * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR - Flag is set if the
> * device has CPU address mirroring support
> - * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
> - * required by this device, typically SZ_4K or SZ_64K
> + * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment required
> + * by this device and the CPU. The minimum page size for the device is
> + * usually SZ_4K or SZ_64K, while for the CPU, it is PAGE_SIZE. This value
> + * is calculated by max(min_gpu_page_size, PAGE_SIZE). This alignment is
> + * enforced on buffer object allocations and VM binds.
honest question: if it is vram needing 64k we give 64k alignment, otherwise
nowadays regardless if it is vram or system memory we give 4k.
what should happen with non-64k vram request on these systems? really give
the cpu alignemnt or continue with the 4k for gpu?
> * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
> * - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
> * available exec queue priority
> --
> 2.47.2
>
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 5/5] drm/xe/query: use PAGE_SIZE as the minimum page alignment
2025-07-28 13:45 ` Rodrigo Vivi
@ 2025-07-28 22:02 ` Simon Richter
0 siblings, 0 replies; 21+ messages in thread
From: Simon Richter @ 2025-07-28 22:02 UTC (permalink / raw)
To: Rodrigo Vivi
Cc: intel-xe, jeffbai, Wenbin Fang, Haien Liang, Jianfeng Liu,
Shirong Liu, Haofeng Wu, Shang Yatsen
Hi,
[removed stable@vger from Cc list]
On 7/28/25 22:45, Rodrigo Vivi wrote:
> honest question: if it is vram needing 64k we give 64k alignment, otherwise
> nowadays regardless if it is vram or system memory we give 4k.
It's supposed to be the largest of the requirements, I think. The code
(kind of falsely) assumes that 64k is the largest we will ever see.
"Kind of", because anything above 64k requires all the ELF files on the
system to use a larger alignment as well, so we're in "really special"
territory here.
16k is also a valid CPU alignment on ppc64 and aarch64, so that needs to
be handled as well.
> what should happen with non-64k vram request on these systems? really give
> the cpu alignemnt or continue with the 4k for gpu?
Depends on whether we want to be able to mmap the vram later, which I
guess we do.
We could relax this to 4k when actually allocating if
DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM isn't set, but
info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] is what Mesa uses to determine
what size BO to request, and the ioctl handler has
if (XE_IOCTL_DBG(xe, args->size & ~PAGE_MASK))
return -EINVAL;
so setting the query value to PAGE_SIZE is the minimal change that will
make Mesa do the right thing.
The alternative is to relax the check in the ioctl back to 4k and align
the size in ___xe_bo_create_locked depending on XE_BO_FLAG_NEEDS_CPU_ACCESS.
Simon
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes
2025-07-28 13:30 ` Rodrigo Vivi
@ 2025-07-29 8:21 ` Simon Richter
2025-08-08 21:11 ` Simon Richter
1 sibling, 0 replies; 21+ messages in thread
From: Simon Richter @ 2025-07-29 8:21 UTC (permalink / raw)
To: Rodrigo Vivi
Cc: intel-xe, jeffbai, Wenbin Fang, Haien Liang, Jianfeng Liu,
Shirong Liu, Haofeng Wu, Shang Yatsen
Hi,
On 7/28/25 22:30, Rodrigo Vivi wrote:
>> - drm_gem_private_object_init(&xe->drm, &bo->ttm.base, size);
>> + drm_gem_private_object_init(&xe->drm, &bo->ttm.base, aligned_size);
> but this is strange.
> think that we could get rid of the aligned_size variable and only go with
> size = ALIGN(size, PAGE_SIZE)
> but then there are some checks in between on the alignment
> and different handling in different if conditions.
I think this can be simplified to a set of conditions in a flat list
that each impose a stronger alignment requirement, and the strongest
just wins because aligning 4k to 64k gives 64k.
So, paraphrased:
- BUG_ON not 4kB aligned (because all callers already ensure that)
- if CPU visible, align to PAGE_SIZE
- if 64kB constraint for VRAM allocation, align to 64kB
- whatever else
From what I can see, making the BO larger than requested is always
safe, so the query parameter for the minimum alignment should be set to
the smallest alignment we will ever see (so SZ_4K) and make the ioctl
check consistent with that because any smaller request would get rounded
up anyway, so we can let userspace do that for us, and then we silently
fix any other requests.
I'm going to ask a few Mesa people about this.
> We need further clean-up there to make the change obviously right first.
I'll try to come up with something soon.
In the meantime, with my Debian hat on, do you have any opinion on the
patch marking non-4kB pages as BROKEN? That one came out of a
discussion[1] in the Debian kernel team how to avoid shipping a kernel
that crashes on boot, and to me it seems locking this out now (and
backporting that to stable), then reverting it along with the fix should
give the best user experience.
Simon
[1] https://salsa.debian.org/kernel-team/linux/-/merge_requests/1589
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes
2025-07-23 7:45 ` [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes Simon Richter
2025-07-28 13:30 ` Rodrigo Vivi
@ 2025-07-31 9:55 ` Mingcong Bai
2025-07-31 10:48 ` Simon Richter
1 sibling, 1 reply; 21+ messages in thread
From: Mingcong Bai @ 2025-07-31 9:55 UTC (permalink / raw)
To: Simon Richter, intel-xe
Cc: stable, Wenbin Fang, Haien Liang, Jianfeng Liu, Shirong Liu,
Haofeng Wu, Shang Yatsen
Hi Simon,
Thanks for your revision, however, there is an issue with this patch.
在 2025/7/23 15:45, Simon Richter 写道:
<snip>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 00ce067d5fd3..649e6d0e05a1 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -1861,9 +1861,9 @@ struct xe_bo *___xe_bo_create_locked(struct xe_device *xe, struct xe_bo *bo,
> flags |= XE_BO_FLAG_INTERNAL_64K;
> alignment = align >> PAGE_SHIFT;
> } else {
> - aligned_size = ALIGN(size, SZ_4K);
> + aligned_size = ALIGN(size, PAGE_SIZE);
> flags &= ~XE_BO_FLAG_INTERNAL_64K;
> - alignment = SZ_4K >> PAGE_SHIFT;
> + alignment = PAGE_SIZE >> PAGE_SHIFT;
> }
>
> if (type == ttm_bo_type_device && aligned_size != size)
A previous change under this struct:
- bo->size = size;
+ bo->size = aligned_size;
Is actually still needed. Without this change, the kernel does not start
up with an Intel B580.
Best Regards,
Mingcong Bai
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes
2025-07-31 9:55 ` Mingcong Bai
@ 2025-07-31 10:48 ` Simon Richter
2025-08-01 1:06 ` Mingcong Bai
0 siblings, 1 reply; 21+ messages in thread
From: Simon Richter @ 2025-07-31 10:48 UTC (permalink / raw)
To: Mingcong Bai, intel-xe
Cc: Wenbin Fang, Haien Liang, Jianfeng Liu, Shirong Liu, Haofeng Wu,
Shang Yatsen
Hi,
On 7/31/25 18:55, Mingcong Bai wrote:
> - bo->size = size;
> + bo->size = aligned_size;
> Is actually still needed. Without this change, the kernel does not start
> up with an Intel B580.
bo->size has been removed in commit ec9223b49, though -- instead, the
size is taken from the underlying GEM object, and the size field there
is taken from the third parameter to drm_gem_private_object_init, which
is "aligned_size" in your patch already, so this field is fully
redundant even if the size has been aligned.
Tested on ppc64le with B580 using 64k pages, still survives a piglit run
just fine.
The field being removed was the reason for me resubmitting the patch
stack: it stopped compiling without dropping this line.
Simon
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes
2025-07-31 10:48 ` Simon Richter
@ 2025-08-01 1:06 ` Mingcong Bai
2025-08-01 1:40 ` Simon.Richter
0 siblings, 1 reply; 21+ messages in thread
From: Mingcong Bai @ 2025-08-01 1:06 UTC (permalink / raw)
To: Simon Richter, intel-xe
Cc: Wenbin Fang, Haien Liang, Jianfeng Liu, Shirong Liu, Haofeng Wu,
Shang Yatsen
Hi Simon,
在 2025/7/31 18:48, Simon Richter 写道:
> Hi,
>
> On 7/31/25 18:55, Mingcong Bai wrote:
>
>> - bo->size = size;
>> + bo->size = aligned_size;
>
>> Is actually still needed. Without this change, the kernel does not
>> start up with an Intel B580.
>
> bo->size has been removed in commit ec9223b49, though -- instead, the
> size is taken from the underlying GEM object, and the size field there
> is taken from the third parameter to drm_gem_private_object_init, which
> is "aligned_size" in your patch already, so this field is fully
> redundant even if the size has been aligned.
My mistake - sorry! We were testing with 6.16, the master source does
work without this change.
That said, this patch is still marked Cc stable, so I would recommend
either dropping that, or consider submitting a separate copy suitable
for that purpose. I might be wrong though, so please, if any reviewers
could help guide Simon (and correct me), go ahead.
Best Regards,
Mingcong Bai
> Tested on ppc64le with B580 using 64k pages, still survives a piglit run
> just fine.
>
> The field being removed was the reason for me resubmitting the patch
> stack: it stopped compiling without dropping this line.
>
> Simon
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes
2025-08-01 1:06 ` Mingcong Bai
@ 2025-08-01 1:40 ` Simon.Richter
0 siblings, 0 replies; 21+ messages in thread
From: Simon.Richter @ 2025-08-01 1:40 UTC (permalink / raw)
To: Mingcong Bai
Cc: intel-xe, Wenbin Fang, Haien Liang, Jianfeng Liu, Shirong Liu,
Haofeng Wu, Shang Yatsen
[-- Attachment #1: Type: text/plain, Size: 716 bytes --]
Hi,
good point, thanks!
Rodrigo's idea of modifying "size" in-place would accidentally solve this as well. I'm planning to do a revision where I pull the huge if statement that determines the alignment apart.
I believe we can leave the query parameters as is, because the alignment for VRAM allocations that should not be host visible is still 4kB, and Mesa will round up all allocations otherwise. Longer term, there should probably be separate values (plus there is also some things that need to be 8kB aligned?)
Unrelated to page size: can you check booting with the MEI GSC patches on other platforms? For me, it fails to allocate the IRQ, apparently because it cannot find a routing.
Simon
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes
2025-07-28 13:30 ` Rodrigo Vivi
2025-07-29 8:21 ` Simon Richter
@ 2025-08-08 21:11 ` Simon Richter
2025-08-08 21:55 ` Matthew Brost
1 sibling, 1 reply; 21+ messages in thread
From: Simon Richter @ 2025-08-08 21:11 UTC (permalink / raw)
To: Rodrigo Vivi
Cc: intel-xe, jeffbai, Wenbin Fang, Haien Liang, Jianfeng Liu,
Shirong Liu, Haofeng Wu, Shang Yatsen
[-- Attachment #1.1: Type: text/plain, Size: 1829 bytes --]
Hi,
On 7/28/25 22:30, Rodrigo Vivi wrote:
>> - drm_gem_private_object_init(&xe->drm, &bo->ttm.base, size);
>> + drm_gem_private_object_init(&xe->drm, &bo->ttm.base, aligned_size);
> but this is strange.
> think that we could get rid of the aligned_size variable and only go with
> size = ALIGN(size, PAGE_SIZE)
I'm going through this code, and it is more horrible than anticipated.
The problematic path that makes smaller allocations comes from
xe_pt_create, where a 4k BO is created for a page table. This needs to
be CPU visible as well, so in theory it needs to be 16/64/256k aligned,
depending on PAGE_SIZE. Extending it is wasteful, but that's what we do
here.
Using the original size makes the mappings fail, because later it wants
to map SZ_4K >> PAGE_SHIFT (== 0) pages.
I wonder if there should be a way to merge smaller allocations, maybe
even special-case page table BOs here (userspace merges smaller
allocations itself, so it should never request less than PAGE_SIZE).
I've talked[1] to the Mesa people, and because they have their own
allocator, it should be okay to define the
DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT parameter as "minimum alignment that
is okay for any userspace BO type" (as opposed to "minimum alignment for
VRAM BOs", which would require Mesa to also align to
sysconf(_SC_PAGESIZE) for CPU visible BOs).
For some reason, everyone tries to avoid setting flags to clarify what
they want. Mesa does not set the flag for "this BO needs to be CPU
visible" if there is no VRAM that doesn't fit in the aperture, so the
kernel can't enforce alignment if the CPU has stricter requirements than
the GPU. The kernel would ignore the flag anyway, but that's not the point.
Simon
[1] https://gitlab.freedesktop.org/mesa/mesa/-/issues/13658
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^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes
2025-08-08 21:11 ` Simon Richter
@ 2025-08-08 21:55 ` Matthew Brost
0 siblings, 0 replies; 21+ messages in thread
From: Matthew Brost @ 2025-08-08 21:55 UTC (permalink / raw)
To: Simon Richter
Cc: Rodrigo Vivi, intel-xe, jeffbai, Wenbin Fang, Haien Liang,
Jianfeng Liu, Shirong Liu, Haofeng Wu, Shang Yatsen
On Sat, Aug 09, 2025 at 06:11:58AM +0900, Simon Richter wrote:
> Hi,
>
> On 7/28/25 22:30, Rodrigo Vivi wrote:
>
> > > - drm_gem_private_object_init(&xe->drm, &bo->ttm.base, size);
> > > + drm_gem_private_object_init(&xe->drm, &bo->ttm.base, aligned_size);
>
> > but this is strange.
> > think that we could get rid of the aligned_size variable and only go with
> > size = ALIGN(size, PAGE_SIZE)
>
> I'm going through this code, and it is more horrible than anticipated.
>
> The problematic path that makes smaller allocations comes from xe_pt_create,
> where a 4k BO is created for a page table. This needs to be CPU visible as
> well, so in theory it needs to be 16/64/256k aligned, depending on
Ah, no.
Yes, PT BOs need to be CPU-visible for the KMD. However, PT BOs are in
VRAM, and the VRAM mapping is a large one set up at driver load (i.e.,
the VRAM BAR is mapped, and individual VRAM mappings are just offsets
within that mapping).
There are, however, other issues. We discussed this previously here [1].
It seems doable but more complicated than I originally thought. Feel
free to take a pass at it.
[1] https://patchwork.freedesktop.org/patch/639626/?series=145445&rev=2
> PAGE_SIZE. Extending it is wasteful, but that's what we do here.
>
> Using the original size makes the mappings fail, because later it wants to
> map SZ_4K >> PAGE_SHIFT (== 0) pages.
>
> I wonder if there should be a way to merge smaller allocations, maybe even
> special-case page table BOs here (userspace merges smaller allocations
> itself, so it should never request less than PAGE_SIZE).
>
Like implemented a sub-allocator for BOs in the KMD? That seems unlikely
to be accepted.
Matt
> I've talked[1] to the Mesa people, and because they have their own
> allocator, it should be okay to define the DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT
> parameter as "minimum alignment that is okay for any userspace BO type" (as
> opposed to "minimum alignment for VRAM BOs", which would require Mesa to
> also align to sysconf(_SC_PAGESIZE) for CPU visible BOs).
>
> For some reason, everyone tries to avoid setting flags to clarify what they
> want. Mesa does not set the flag for "this BO needs to be CPU visible" if
> there is no VRAM that doesn't fit in the aperture, so the kernel can't
> enforce alignment if the CPU has stricter requirements than the GPU. The
> kernel would ignore the flag anyway, but that's not the point.
>
> Simon
>
> [1] https://gitlab.freedesktop.org/mesa/mesa/-/issues/13658
^ permalink raw reply [flat|nested] 21+ messages in thread
end of thread, other threads:[~2025-08-08 21:56 UTC | newest]
Thread overview: 21+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-07-23 7:45 [PATCH v3 0/5] drm/xe: enable driver usage on non-4KiB kernels Simon Richter
2025-07-23 7:45 ` [PATCH v3 1/5] drm/xe/bo: fix alignment with non-4KiB kernel page sizes Simon Richter
2025-07-28 13:30 ` Rodrigo Vivi
2025-07-29 8:21 ` Simon Richter
2025-08-08 21:11 ` Simon Richter
2025-08-08 21:55 ` Matthew Brost
2025-07-31 9:55 ` Mingcong Bai
2025-07-31 10:48 ` Simon Richter
2025-08-01 1:06 ` Mingcong Bai
2025-08-01 1:40 ` Simon.Richter
2025-07-23 7:45 ` [PATCH v3 2/5] drm/xe/guc: use GUC_SIZE (SZ_4K) for alignment Simon Richter
2025-07-28 13:36 ` Rodrigo Vivi
2025-07-23 7:45 ` [PATCH v3 3/5] drm/xe/regs: fix RING_CTL_SIZE(size) calculation Simon Richter
2025-07-28 13:40 ` Rodrigo Vivi
2025-07-23 7:45 ` [PATCH v3 4/5] drm/xe: use 4KiB alignment for cursor jumps Simon Richter
2025-07-23 7:45 ` [PATCH v3 5/5] drm/xe/query: use PAGE_SIZE as the minimum page alignment Simon Richter
2025-07-28 13:45 ` Rodrigo Vivi
2025-07-28 22:02 ` Simon Richter
2025-07-23 7:54 ` ✓ CI.KUnit: success for drm/xe: enable driver usage on non-4KiB kernels Patchwork
2025-07-23 8:31 ` ✓ Xe.CI.BAT: " Patchwork
2025-07-23 9:37 ` ✗ Xe.CI.Full: failure " Patchwork
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