[PATCH v4 0/6] drm/xe: Add user commands to WA BB via configfs

[PATCH v4 0/6] drm/xe: Add user commands to WA BB via configfs

[Lucas De Marchi]

Integrate WA BB (aka post context restore bb) with configfs to allow
validation to experiment with the GPU, executing commands on every
context switch.

Setting some registers to experiment:

	# echo 0 > /sys/bus/pci/drivers_autoprobe
	# modprobe xe
	# mkdir  /sys/kernel/config/xe/0000:03:00.0
	# cat > /sys/kernel/config/xe/0000\:03\:00.0/ctx_restore_post_bb  <<EOF
	bcs cmd 11000001 4F100 cafebabe
	vcs cmd 11000001 4F104 0FF1CE
	rcs cmd 11000001 4F108 BAADF00D
	EOF
	# echo 0000:03:00.0 > /sys/bus/pci/drivers/xe/bind
	# intel_reg read mmio:4F100 mmio:4f104 mmio:4f108
                                    (0x0004f100): 0xcafebabe
                                    (0x0004f104): 0x000ff1ce
                                    (0x0004f108): 0xbaadf00d

This also prepares the codebase to use the same functions for mid
context restore.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
Changes in v4:
- Taint the kernel
- Link to v3: https://lore.kernel.org/r/20250905-wa-bb-cmds-v3-0-3da2b7bdc73e@intel.com

Changes in v3:
- Minor updates on first patches
- Fix kunit build (without CONFIG_CONFIGFS_FS)
- Fix use of binary attributes failing the expectation of a failed write
  producing an error code
- Link to v2: https://lore.kernel.org/r/20250827-wa-bb-cmds-v2-0-3cdf4d63c72a@intel.com

Changes in v2:
- Drop other refactors and fixes already merged
- Add documentation and make sure it works with intel_reg
- Refactor command parsing to be able to easily extend it for other BBs
  to be added in future.
- Link to v1: https://lore.kernel.org/r/20250523-wa-bb-cmds-v1-0-40b337f71bcd@intel.com
---
Lucas De Marchi (6):
      drm/xe: Update workaround documentation
      drm/xe/configfs: Fix documentation warning
      drm/xe/configfs: Extract function to parse engine
      drm/xe/configfs: Allow to select by class only
      drm/xe/lrc: Allow to add user commands on context switch
      drm/xe/configfs: Add post context restore bb

 drivers/gpu/drm/xe/xe_configfs.c | 369 ++++++++++++++++++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_configfs.h |   6 +
 drivers/gpu/drm/xe/xe_lrc.c      |  32 ++++
 drivers/gpu/drm/xe/xe_wa.c       |  45 +++--
 4 files changed, 414 insertions(+), 38 deletions(-)

base-commit: a841dfdd6d774671edaad441fb846f7a3230bb07
change-id: 20250523-wa-bb-cmds-2a81a7121fc2

Lucas De Marchi

[PATCH v4 1/6] drm/xe: Update workaround documentation

[Lucas De Marchi]

Bring it up to reality, better documenting the existing batch buffers,
OOB rules and fixing some typos.

Bspec: 60122
Reviewed-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
v2: s/XE_WA/XE_GT_WA/ where appropriate
---
 drivers/gpu/drm/xe/xe_wa.c | 45 ++++++++++++++++++++++++++++++++-------------
 1 file changed, 32 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index c1fec526bed08..ca1de2560f2bb 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -39,7 +39,8 @@
  *   Register Immediate commands) once when initializing the device and saved in
  *   the default context. That default context is then used on every context
  *   creation to have a "primed golden context", i.e. a context image that
- *   already contains the changes needed to all the registers.
+ *   already contains the changes needed to all the registers. See
+ *   drivers/gpu/drm/xe/xe_lrc.c for default context handling.
  *
  * - Engine workarounds: the list of these WAs is applied whenever the specific
  *   engine is reset. It's also possible that a set of engine classes share a
@@ -48,10 +49,10 @@
  *   them need to keeep the workaround programming: the approach taken in the
  *   driver is to tie those workarounds to the first compute/render engine that
  *   is registered.  When executing with GuC submission, engine resets are
- *   outside of kernel driver control, hence the list of registers involved in
+ *   outside of kernel driver control, hence the list of registers involved is
  *   written once, on engine initialization, and then passed to GuC, that
  *   saves/restores their values before/after the reset takes place. See
- *   ``drivers/gpu/drm/xe/xe_guc_ads.c`` for reference.
+ *   drivers/gpu/drm/xe/xe_guc_ads.c for reference.
  *
  * - GT workarounds: the list of these WAs is applied whenever these registers
  *   revert to their default values: on GPU reset, suspend/resume [1]_, etc.
@@ -66,21 +67,39 @@
  *   hardware on every HW context restore. These buffers are created and
  *   programmed in the default context so the hardware always go through those
  *   programming sequences when switching contexts. The support for workaround
- *   batchbuffers is enabled these hardware mechanisms:
+ *   batchbuffers is enabled via these hardware mechanisms:
  *
- *   #. INDIRECT_CTX: A batchbuffer and an offset are provided in the default
- *      context, pointing the hardware to jump to that location when that offset
- *      is reached in the context restore. Workaround batchbuffer in the driver
- *      currently uses this mechanism for all platforms.
+ *   #. INDIRECT_CTX (also known as **mid context restore bb**): A batchbuffer
+ *      and an offset are provided in the default context, pointing the hardware
+ *      to jump to that location when that offset is reached in the context
+ *      restore.  When a context is being restored, this is executed after the
+ *      ring context, in the middle (or beginning) of the engine context image.
  *
- *   #. BB_PER_CTX_PTR: A batchbuffer is provided in the default context,
- *      pointing the hardware to a buffer to continue executing after the
- *      engine registers are restored in a context restore sequence. This is
- *      currently not used in the driver.
+ *   #. BB_PER_CTX_PTR (also known as **post context restore bb**): A
+ *      batchbuffer is provided in the default context, pointing the hardware to
+ *      a buffer to continue executing after the engine registers are restored
+ *      in a context restore sequence.
+ *
+ *   Below is the timeline for a context restore sequence:
+ *
+ *   .. code::
+ *
+ *                        INDIRECT_CTX_OFFSET
+ *                   |----------->|
+ *      .------------.------------.-------------.------------.--------------.-----------.
+ *      |Ring        | Engine     | Mid-context | Engine     | Post-context | Ring      |
+ *      |Restore     | Restore (1)| BB Restore  | Restore (2)| BB Restore   | Execution |
+ *      `------------'------------'-------------'------------'--------------'-----------'
  *
  * - Other/OOB:  There are WAs that, due to their nature, cannot be applied from
  *   a central place. Those are peppered around the rest of the code, as needed.
- *   Workarounds related to the display IP are the main example.
+ *   There's a central place to control which workarounds are enabled:
+ *   drivers/gpu/drm/xe/xe_wa_oob.rules for GT workarounds and
+ *   drivers/gpu/drm/xe/xe_device_wa_oob.rules for device/SoC workarounds.
+ *   These files only record which workarounds are enabled: during early device
+ *   initialization those rules are evaluated and recorded by the driver. Then
+ *   later the driver checks with ``XE_GT_WA()`` and ``XE_DEVICE_WA()`` to
+ *   implement them.
  *
  * .. [1] Technically, some registers are powercontext saved & restored, so they
  *    survive a suspend/resume. In practice, writing them again is not too

-- 
2.50.1

[PATCH v4 2/6] drm/xe/configfs: Fix documentation warning

[Lucas De Marchi]

Fix this warning while building the documentation:

	Documentation/gpu/xe/xe_configfs:9: drivers/gpu/drm/xe/xe_configfs.c:138:
	WARNING: Definition list ends without a blank line; unexpected unindent.

That also makes it better formatted in the output.

While at it, also fix the underline length in "Overview".

Fixes: e2b33fce5eb0 ("drm/xe/configfs: Improve documentation steps")
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index e515fa7085fa4..e52808e3199fc 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -21,7 +21,7 @@
  * DOC: Xe Configfs
  *
  * Overview
- * =========
+ * ========
  *
  * Configfs is a filesystem-based manager of kernel objects. XE KMD registers a
  * configfs subsystem called ``xe`` that creates a directory in the mounted
@@ -34,7 +34,7 @@
  *
  * To create a device, the ``xe`` module should already be loaded, but some
  * attributes can only be set before binding the device. It can be accomplished
- * by blocking the driver autoprobe:
+ * by blocking the driver autoprobe::
  *
  *	# echo 0 > /sys/bus/pci/drivers_autoprobe
  *	# modprobe xe

-- 
2.50.1

[PATCH v4 3/6] drm/xe/configfs: Extract function to parse engine

[Lucas De Marchi]

Move the part that copies the engine to a local buffer so it can be
shared in future for other configfs attributes parsing an engine.

Reviewed-by: Raag Jadav <raag.jadav@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/xe/xe_configfs.c | 32 +++++++++++++++++++++-----------
 1 file changed, 21 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index e52808e3199fc..8db7a2af11011 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -283,24 +283,34 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
 	return false;
 }
 
+static int parse_engine(const char *s, const char *end_chars, u64 *mask)
+{
+	char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
+	size_t len;
+
+	len = strcspn(s, end_chars);
+	if (len >= sizeof(buf))
+		return -EINVAL;
+
+	memcpy(buf, s, len);
+	buf[len] = '\0';
+
+	if (!lookup_engine_mask(buf, mask))
+		return -ENOENT;
+
+	return len;
+}
+
 static ssize_t engines_allowed_store(struct config_item *item, const char *page,
 				     size_t len)
 {
 	struct xe_config_group_device *dev = to_xe_config_group_device(item);
-	size_t patternlen, p;
+	ssize_t patternlen, p;
 	u64 mask, val = 0;
 
 	for (p = 0; p < len; p += patternlen + 1) {
-		char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
-
-		patternlen = strcspn(page + p, ",\n");
-		if (patternlen >= sizeof(buf))
-			return -EINVAL;
-
-		memcpy(buf, page + p, patternlen);
-		buf[patternlen] = '\0';
-
-		if (!lookup_engine_mask(buf, &mask))
+		patternlen = parse_engine(page + p, ",\n", &mask);
+		if (patternlen < 0)
 			return -EINVAL;
 
 		val |= mask;

-- 
2.50.1

[PATCH v4 4/6] drm/xe/configfs: Allow to select by class only

[Lucas De Marchi]

For a future configfs attribute, it's desirable to select by engine mask
only as the instance doesn't make sense.

Rename the function lookup_engine_mask() to lookup_engine_info() and
make it return the entry. This allows parse_engine() to still return an
item if the caller wants to allow parsing a class-only string like
"rcs", "bcs", "ccs", etc.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
---
v2:
- Rename function to lookup_engine_info() and return the entry
  directly instead of the index (Raag Jadav)
- Add named initializer for new entry for consistency (Raag Jadav)
---
 drivers/gpu/drm/xe/xe_configfs.c | 50 ++++++++++++++++++++++++++++------------
 1 file changed, 35 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 8db7a2af11011..45fdb6cf26b5d 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -152,6 +152,7 @@ static void set_device_defaults(struct xe_config_device *config)
 struct engine_info {
 	const char *cls;
 	u64 mask;
+	enum xe_engine_class engine_class;
 };
 
 /* Some helpful macros to aid on the sizing of buffer allocation when parsing */
@@ -159,12 +160,12 @@ struct engine_info {
 #define MAX_ENGINE_INSTANCE_CHARS 2
 
 static const struct engine_info engine_info[] = {
-	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK },
-	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK },
-	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK },
-	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK },
-	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK },
-	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK },
+	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
+	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, .engine_class = XE_ENGINE_CLASS_COPY },
+	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
+	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },
+	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, .engine_class = XE_ENGINE_CLASS_COMPUTE },
+	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, .engine_class = XE_ENGINE_CLASS_OTHER },
 };
 
 static struct xe_config_group_device *to_xe_config_group_device(struct config_item *item)
@@ -253,7 +254,18 @@ static ssize_t engines_allowed_show(struct config_item *item, char *page)
 	return p - page;
 }
 
-static bool lookup_engine_mask(const char *pattern, u64 *mask)
+/*
+ * Lookup engine_info. If @mask is not NULL, reduce the mask according to the
+ * instance in @pattern.
+ *
+ * Examples of inputs:
+ * - lookup_engine_info("rcs0", &mask): return "rcs" entry from @engine_info and
+ *   mask == BIT_ULL(XE_HW_ENGINE_RCS0)
+ * - lookup_engine_info("rcs*", &mask): return "rcs" entry from @engine_info and
+ *   mask == XE_HW_ENGINE_RCS_MASK
+ * - lookup_engine_info("rcs", NULL): return "rcs" entry from @engine_info
+ */
+static const struct engine_info *lookup_engine_info(const char *pattern, u64 *mask)
 {
 	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
 		u8 instance;
@@ -263,29 +275,33 @@ static bool lookup_engine_mask(const char *pattern, u64 *mask)
 			continue;
 
 		pattern += strlen(engine_info[i].cls);
+		if (!mask && !*pattern)
+			return &engine_info[i];
 
 		if (!strcmp(pattern, "*")) {
 			*mask = engine_info[i].mask;
-			return true;
+			return &engine_info[i];
 		}
 
 		if (kstrtou8(pattern, 10, &instance))
-			return false;
+			return NULL;
 
 		bit = __ffs64(engine_info[i].mask) + instance;
 		if (bit >= fls64(engine_info[i].mask))
-			return false;
+			return NULL;
 
 		*mask = BIT_ULL(bit);
-		return true;
+		return &engine_info[i];
 	}
 
-	return false;
+	return NULL;
 }
 
-static int parse_engine(const char *s, const char *end_chars, u64 *mask)
+static int parse_engine(const char *s, const char *end_chars, u64 *mask,
+			const struct engine_info **pinfo)
 {
 	char buf[MAX_ENGINE_CLASS_CHARS + MAX_ENGINE_INSTANCE_CHARS + 1];
+	const struct engine_info *info;
 	size_t len;
 
 	len = strcspn(s, end_chars);
@@ -295,9 +311,13 @@ static int parse_engine(const char *s, const char *end_chars, u64 *mask)
 	memcpy(buf, s, len);
 	buf[len] = '\0';
 
-	if (!lookup_engine_mask(buf, mask))
+	info = lookup_engine_info(buf, mask);
+	if (!info)
 		return -ENOENT;
 
+	if (pinfo)
+		*pinfo = info;
+
 	return len;
 }
 
@@ -309,7 +329,7 @@ static ssize_t engines_allowed_store(struct config_item *item, const char *page,
 	u64 mask, val = 0;
 
 	for (p = 0; p < len; p += patternlen + 1) {
-		patternlen = parse_engine(page + p, ",\n", &mask);
+		patternlen = parse_engine(page + p, ",\n", &mask, NULL);
 		if (patternlen < 0)
 			return -EINVAL;
 

-- 
2.50.1

Re: [PATCH v4 4/6] drm/xe/configfs: Allow to select by class only

[Raag Jadav]

On Thu, Sep 11, 2025 at 12:36:28PM -0700, Lucas De Marchi wrote:
> For a future configfs attribute, it's desirable to select by engine mask
> only as the instance doesn't make sense.
> 
> Rename the function lookup_engine_mask() to lookup_engine_info() and
> make it return the entry. This allows parse_engine() to still return an
> item if the caller wants to allow parsing a class-only string like
> "rcs", "bcs", "ccs", etc.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> Reviewed-by: Raag Jadav <raag.jadav@intel.com>
> ---
> v2:
> - Rename function to lookup_engine_info() and return the entry
>   directly instead of the index (Raag Jadav)
> - Add named initializer for new entry for consistency (Raag Jadav)
> ---
>  drivers/gpu/drm/xe/xe_configfs.c | 50 ++++++++++++++++++++++++++++------------
>  1 file changed, 35 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 8db7a2af11011..45fdb6cf26b5d 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -152,6 +152,7 @@ static void set_device_defaults(struct xe_config_device *config)
>  struct engine_info {
>  	const char *cls;
>  	u64 mask;
> +	enum xe_engine_class engine_class;
>  };
>  
>  /* Some helpful macros to aid on the sizing of buffer allocation when parsing */
> @@ -159,12 +160,12 @@ struct engine_info {
>  #define MAX_ENGINE_INSTANCE_CHARS 2
>  
>  static const struct engine_info engine_info[] = {
> -	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK },
> -	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK },
> -	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK },
> -	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK },
> -	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK },
> -	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK },
> +	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
> +	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, .engine_class = XE_ENGINE_CLASS_COPY },
> +	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
> +	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },

Hmm, so now checkpatch doesn't feel so good about this.
I usually try to shorten the variable/macro names instead of wrapping,
but I guess a few more lines in an already huge driver wouldn't be much
noticeable ;)

Raag

> +	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, .engine_class = XE_ENGINE_CLASS_COMPUTE },
> +	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, .engine_class = XE_ENGINE_CLASS_OTHER },
>  };

Re: [PATCH v4 4/6] drm/xe/configfs: Allow to select by class only

[Lucas De Marchi]

On Fri, Sep 12, 2025 at 07:18:37AM +0200, Raag Jadav wrote:
>On Thu, Sep 11, 2025 at 12:36:28PM -0700, Lucas De Marchi wrote:
>> For a future configfs attribute, it's desirable to select by engine mask
>> only as the instance doesn't make sense.
>>
>> Rename the function lookup_engine_mask() to lookup_engine_info() and
>> make it return the entry. This allows parse_engine() to still return an
>> item if the caller wants to allow parsing a class-only string like
>> "rcs", "bcs", "ccs", etc.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> Reviewed-by: Raag Jadav <raag.jadav@intel.com>
>> ---
>> v2:
>> - Rename function to lookup_engine_info() and return the entry
>>   directly instead of the index (Raag Jadav)
>> - Add named initializer for new entry for consistency (Raag Jadav)
>> ---
>>  drivers/gpu/drm/xe/xe_configfs.c | 50 ++++++++++++++++++++++++++++------------
>>  1 file changed, 35 insertions(+), 15 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
>> index 8db7a2af11011..45fdb6cf26b5d 100644
>> --- a/drivers/gpu/drm/xe/xe_configfs.c
>> +++ b/drivers/gpu/drm/xe/xe_configfs.c
>> @@ -152,6 +152,7 @@ static void set_device_defaults(struct xe_config_device *config)
>>  struct engine_info {
>>  	const char *cls;
>>  	u64 mask;
>> +	enum xe_engine_class engine_class;
>>  };
>>
>>  /* Some helpful macros to aid on the sizing of buffer allocation when parsing */
>> @@ -159,12 +160,12 @@ struct engine_info {
>>  #define MAX_ENGINE_INSTANCE_CHARS 2
>>
>>  static const struct engine_info engine_info[] = {
>> -	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK },
>> -	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK },
>> -	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK },
>> -	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK },
>> -	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK },
>> -	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK },
>> +	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
>> +	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, .engine_class = XE_ENGINE_CLASS_COPY },
>> +	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
>> +	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },
>
>Hmm, so now checkpatch doesn't feel so good about this.
>I usually try to shorten the variable/macro names instead of wrapping,
>but I guess a few more lines in an already huge driver wouldn't be much
>noticeable ;)

it's a table and wrapping the line doesn't really improve readability.
In this case we should taked checkpatch output with a grain of salt

Lucas De Marchi

>
>Raag
>
>> +	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK, .engine_class = XE_ENGINE_CLASS_COMPUTE },
>> +	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK, .engine_class = XE_ENGINE_CLASS_OTHER },
>>  };

Re: [PATCH v4 4/6] drm/xe/configfs: Allow to select by class only

[Raag Jadav]

On Fri, Sep 12, 2025 at 12:30:03AM -0500, Lucas De Marchi wrote:
> On Fri, Sep 12, 2025 at 07:18:37AM +0200, Raag Jadav wrote:
> > On Thu, Sep 11, 2025 at 12:36:28PM -0700, Lucas De Marchi wrote:
> > > For a future configfs attribute, it's desirable to select by engine mask
> > > only as the instance doesn't make sense.
> > > 
> > > Rename the function lookup_engine_mask() to lookup_engine_info() and
> > > make it return the entry. This allows parse_engine() to still return an
> > > item if the caller wants to allow parsing a class-only string like
> > > "rcs", "bcs", "ccs", etc.
> > > 
> > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > > Reviewed-by: Raag Jadav <raag.jadav@intel.com>
> > > ---
> > > v2:
> > > - Rename function to lookup_engine_info() and return the entry
> > >   directly instead of the index (Raag Jadav)
> > > - Add named initializer for new entry for consistency (Raag Jadav)
> > > ---
> > >  drivers/gpu/drm/xe/xe_configfs.c | 50 ++++++++++++++++++++++++++++------------
> > >  1 file changed, 35 insertions(+), 15 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> > > index 8db7a2af11011..45fdb6cf26b5d 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > > @@ -152,6 +152,7 @@ static void set_device_defaults(struct xe_config_device *config)
> > >  struct engine_info {
> > >  	const char *cls;
> > >  	u64 mask;
> > > +	enum xe_engine_class engine_class;
> > >  };
> > > 
> > >  /* Some helpful macros to aid on the sizing of buffer allocation when parsing */
> > > @@ -159,12 +160,12 @@ struct engine_info {
> > >  #define MAX_ENGINE_INSTANCE_CHARS 2
> > > 
> > >  static const struct engine_info engine_info[] = {
> > > -	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK },
> > > -	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK },
> > > -	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK },
> > > -	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK },
> > > -	{ .cls = "ccs", .mask = XE_HW_ENGINE_CCS_MASK },
> > > -	{ .cls = "gsccs", .mask = XE_HW_ENGINE_GSCCS_MASK },
> > > +	{ .cls = "rcs", .mask = XE_HW_ENGINE_RCS_MASK, .engine_class = XE_ENGINE_CLASS_RENDER },
> > > +	{ .cls = "bcs", .mask = XE_HW_ENGINE_BCS_MASK, .engine_class = XE_ENGINE_CLASS_COPY },
> > > +	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },
> > > +	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },
> > 
> > Hmm, so now checkpatch doesn't feel so good about this.
> > I usually try to shorten the variable/macro names instead of wrapping,
> > but I guess a few more lines in an already huge driver wouldn't be much
> > noticeable ;)
> 
> it's a table and wrapping the line doesn't really improve readability.
> In this case we should taked checkpatch output with a grain of salt

Ofcourse. I had the same understanding, but I've always managed to find
myself coming across random DRM rules :D

Raag

[PATCH v4 5/6] drm/xe/lrc: Allow to add user commands on context switch

[Lucas De Marchi]

During validation it's useful to allows additional commands to be
executed on context switch. Fetch the commands from configfs (to be
added) and add them to the WA BB.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
v2: Fix warning when building without configfs
---
 drivers/gpu/drm/xe/xe_configfs.c | 13 +++++++++++++
 drivers/gpu/drm/xe/xe_configfs.h |  6 ++++++
 drivers/gpu/drm/xe/xe_lrc.c      | 25 +++++++++++++++++++++++++
 3 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index 45fdb6cf26b5d..d86c75af03278 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -633,6 +633,19 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
 	return ret;
 }
 
+/**
+ * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
+ * @pdev: pci device
+ *
+ * Return: post_ctx_restore setting in configfs
+ */
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
+					enum xe_engine_class class,
+					const u32 **cs)
+{
+	return 0;
+}
+
 int __init xe_configfs_init(void)
 {
 	int ret;
diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
index 1402e863b71c0..eff2645b5f593 100644
--- a/drivers/gpu/drm/xe/xe_configfs.h
+++ b/drivers/gpu/drm/xe/xe_configfs.h
@@ -8,6 +8,8 @@
 #include <linux/limits.h>
 #include <linux/types.h>
 
+#include <xe_hw_engine_types.h>
+
 struct pci_dev;
 
 #if IS_ENABLED(CONFIG_CONFIGFS_FS)
@@ -17,6 +19,8 @@ void xe_configfs_check_device(struct pci_dev *pdev);
 bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
 u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
 bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
+u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+					const u32 **cs);
 #else
 static inline int xe_configfs_init(void) { return 0; }
 static inline void xe_configfs_exit(void) { }
@@ -24,6 +28,8 @@ static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
 static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
 static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
 static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
+static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
+						      const u32 **cs) { return 0; }
 #endif
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 6d52e0eb97f54..f337954066f55 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -16,6 +16,7 @@
 #include "regs/xe_lrc_layout.h"
 #include "xe_bb.h"
 #include "xe_bo.h"
+#include "xe_configfs.h"
 #include "xe_device.h"
 #include "xe_drm_client.h"
 #include "xe_exec_queue_types.h"
@@ -1102,6 +1103,29 @@ static ssize_t setup_timestamp_wa(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
 	return cmd - batch;
 }
 
+static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
+						  struct xe_hw_engine *hwe,
+						  u32 *batch, size_t max_len)
+{
+	struct xe_device *xe = gt_to_xe(lrc->gt);
+	const u32 *user_batch;
+	u32 *cmd = batch;
+	u32 count;
+
+	count = xe_configfs_get_ctx_restore_post_bb(to_pci_dev(xe->drm.dev),
+						    hwe->class, &user_batch);
+	if (!count)
+		return 0;
+
+	if (count > max_len)
+		return -ENOSPC;
+
+	memcpy(cmd, user_batch, count * sizeof(u32));
+	cmd += count;
+
+	return cmd - batch;
+}
+
 static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
 					       struct xe_hw_engine *hwe,
 					       u32 *batch, size_t max_len)
@@ -1203,6 +1227,7 @@ int xe_lrc_setup_wa_bb_with_scratch(struct xe_lrc *lrc, struct xe_hw_engine *hwe
 		{ .setup = setup_timestamp_wa },
 		{ .setup = setup_invalidate_state_cache_wa },
 		{ .setup = setup_utilization_wa },
+		{ .setup = setup_configfs_post_ctx_restore_bb },
 	};
 	struct bo_setup_state state = {
 		.lrc = lrc,

-- 
2.50.1

Re: [PATCH v4 5/6] drm/xe/lrc: Allow to add user commands on context switch

[Rodrigo Vivi]

On Thu, Sep 11, 2025 at 12:36:29PM -0700, Lucas De Marchi wrote:
> During validation it's useful to allows additional commands to be
> executed on context switch. Fetch the commands from configfs (to be
> added) and add them to the WA BB.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> v2: Fix warning when building without configfs
> ---
>  drivers/gpu/drm/xe/xe_configfs.c | 13 +++++++++++++
>  drivers/gpu/drm/xe/xe_configfs.h |  6 ++++++
>  drivers/gpu/drm/xe/xe_lrc.c      | 25 +++++++++++++++++++++++++
>  3 files changed, 44 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> index 45fdb6cf26b5d..d86c75af03278 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.c
> +++ b/drivers/gpu/drm/xe/xe_configfs.c
> @@ -633,6 +633,19 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
>  	return ret;
>  }
>  
> +/**
> + * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
> + * @pdev: pci device
> + *
> + * Return: post_ctx_restore setting in configfs
> + */
> +u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
> +					enum xe_engine_class class,
> +					const u32 **cs)
> +{
> +	return 0;
> +}
> +
>  int __init xe_configfs_init(void)
>  {
>  	int ret;
> diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
> index 1402e863b71c0..eff2645b5f593 100644
> --- a/drivers/gpu/drm/xe/xe_configfs.h
> +++ b/drivers/gpu/drm/xe/xe_configfs.h
> @@ -8,6 +8,8 @@
>  #include <linux/limits.h>
>  #include <linux/types.h>
>  
> +#include <xe_hw_engine_types.h>
> +
>  struct pci_dev;
>  
>  #if IS_ENABLED(CONFIG_CONFIGFS_FS)
> @@ -17,6 +19,8 @@ void xe_configfs_check_device(struct pci_dev *pdev);
>  bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
>  u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
>  bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
> +u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
> +					const u32 **cs);
>  #else
>  static inline int xe_configfs_init(void) { return 0; }
>  static inline void xe_configfs_exit(void) { }
> @@ -24,6 +28,8 @@ static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
>  static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
>  static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
>  static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
> +static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
> +						      const u32 **cs) { return 0; }
>  #endif
>  
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 6d52e0eb97f54..f337954066f55 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -16,6 +16,7 @@
>  #include "regs/xe_lrc_layout.h"
>  #include "xe_bb.h"
>  #include "xe_bo.h"
> +#include "xe_configfs.h"
>  #include "xe_device.h"
>  #include "xe_drm_client.h"
>  #include "xe_exec_queue_types.h"
> @@ -1102,6 +1103,29 @@ static ssize_t setup_timestamp_wa(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
>  	return cmd - batch;
>  }
>  
> +static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
> +						  struct xe_hw_engine *hwe,
> +						  u32 *batch, size_t max_len)
> +{
> +	struct xe_device *xe = gt_to_xe(lrc->gt);
> +	const u32 *user_batch;
> +	u32 *cmd = batch;
> +	u32 count;
> +
> +	count = xe_configfs_get_ctx_restore_post_bb(to_pci_dev(xe->drm.dev),
> +						    hwe->class, &user_batch);
> +	if (!count)
> +		return 0;
> +
> +	if (count > max_len)
> +		return -ENOSPC;
> +
> +	memcpy(cmd, user_batch, count * sizeof(u32));

shouldn't we use copy_from_user here?

> +	cmd += count;
> +
> +	return cmd - batch;
> +}
> +
>  static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
>  					       struct xe_hw_engine *hwe,
>  					       u32 *batch, size_t max_len)
> @@ -1203,6 +1227,7 @@ int xe_lrc_setup_wa_bb_with_scratch(struct xe_lrc *lrc, struct xe_hw_engine *hwe
>  		{ .setup = setup_timestamp_wa },
>  		{ .setup = setup_invalidate_state_cache_wa },
>  		{ .setup = setup_utilization_wa },
> +		{ .setup = setup_configfs_post_ctx_restore_bb },
>  	};
>  	struct bo_setup_state state = {
>  		.lrc = lrc,
> 
> -- 
> 2.50.1
> 

Re: [PATCH v4 5/6] drm/xe/lrc: Allow to add user commands on context switch

[Lucas De Marchi]

On Tue, Sep 16, 2025 at 04:27:45PM -0400, Rodrigo Vivi wrote:
>On Thu, Sep 11, 2025 at 12:36:29PM -0700, Lucas De Marchi wrote:
>> During validation it's useful to allows additional commands to be
>> executed on context switch. Fetch the commands from configfs (to be
>> added) and add them to the WA BB.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>> v2: Fix warning when building without configfs
>> ---
>>  drivers/gpu/drm/xe/xe_configfs.c | 13 +++++++++++++
>>  drivers/gpu/drm/xe/xe_configfs.h |  6 ++++++
>>  drivers/gpu/drm/xe/xe_lrc.c      | 25 +++++++++++++++++++++++++
>>  3 files changed, 44 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
>> index 45fdb6cf26b5d..d86c75af03278 100644
>> --- a/drivers/gpu/drm/xe/xe_configfs.c
>> +++ b/drivers/gpu/drm/xe/xe_configfs.c
>> @@ -633,6 +633,19 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
>>  	return ret;
>>  }
>>
>> +/**
>> + * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
>> + * @pdev: pci device
>> + *
>> + * Return: post_ctx_restore setting in configfs
>> + */
>> +u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
>> +					enum xe_engine_class class,
>> +					const u32 **cs)
>> +{
>> +	return 0;
>> +}
>> +
>>  int __init xe_configfs_init(void)
>>  {
>>  	int ret;
>> diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
>> index 1402e863b71c0..eff2645b5f593 100644
>> --- a/drivers/gpu/drm/xe/xe_configfs.h
>> +++ b/drivers/gpu/drm/xe/xe_configfs.h
>> @@ -8,6 +8,8 @@
>>  #include <linux/limits.h>
>>  #include <linux/types.h>
>>
>> +#include <xe_hw_engine_types.h>
>> +
>>  struct pci_dev;
>>
>>  #if IS_ENABLED(CONFIG_CONFIGFS_FS)
>> @@ -17,6 +19,8 @@ void xe_configfs_check_device(struct pci_dev *pdev);
>>  bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
>>  u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
>>  bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
>> +u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
>> +					const u32 **cs);
>>  #else
>>  static inline int xe_configfs_init(void) { return 0; }
>>  static inline void xe_configfs_exit(void) { }
>> @@ -24,6 +28,8 @@ static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
>>  static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
>>  static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
>>  static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
>> +static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
>> +						      const u32 **cs) { return 0; }
>>  #endif
>>
>>  #endif
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>> index 6d52e0eb97f54..f337954066f55 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.c
>> +++ b/drivers/gpu/drm/xe/xe_lrc.c
>> @@ -16,6 +16,7 @@
>>  #include "regs/xe_lrc_layout.h"
>>  #include "xe_bb.h"
>>  #include "xe_bo.h"
>> +#include "xe_configfs.h"
>>  #include "xe_device.h"
>>  #include "xe_drm_client.h"
>>  #include "xe_exec_queue_types.h"
>> @@ -1102,6 +1103,29 @@ static ssize_t setup_timestamp_wa(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
>>  	return cmd - batch;
>>  }
>>
>> +static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
>> +						  struct xe_hw_engine *hwe,
>> +						  u32 *batch, size_t max_len)
>> +{
>> +	struct xe_device *xe = gt_to_xe(lrc->gt);
>> +	const u32 *user_batch;
>> +	u32 *cmd = batch;
>> +	u32 count;
>> +
>> +	count = xe_configfs_get_ctx_restore_post_bb(to_pci_dev(xe->drm.dev),
>> +						    hwe->class, &user_batch);
>> +	if (!count)
>> +		return 0;
>> +
>> +	if (count > max_len)
>> +		return -ENOSPC;
>> +
>> +	memcpy(cmd, user_batch, count * sizeof(u32));
>
>shouldn't we use copy_from_user here?

no. When the user wrote to the file, configfs did the copy and
called us in xe_configfs.c:

	configfs_write_iter()
		copy_from_iter()
			...
				raw_copy_from_user()
		flush_write_buffer()
			buffer->attr->store()
				ctx_restore_post_bb_store()

ctx_restore_post_bb_store() will parse the lines, and save it in the
correct format to this instance of xe_config_device.

What xe_configfs_get_ctx_restore_post_bb() does is basically return
that already-parsed-and-saved data.

So... here we are not copying anything from user. We are copying the
previously saved buffer that is already in the kernel.

Lucas De Marchi

>
>> +	cmd += count;
>> +
>> +	return cmd - batch;
>> +}
>> +
>>  static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
>>  					       struct xe_hw_engine *hwe,
>>  					       u32 *batch, size_t max_len)
>> @@ -1203,6 +1227,7 @@ int xe_lrc_setup_wa_bb_with_scratch(struct xe_lrc *lrc, struct xe_hw_engine *hwe
>>  		{ .setup = setup_timestamp_wa },
>>  		{ .setup = setup_invalidate_state_cache_wa },
>>  		{ .setup = setup_utilization_wa },
>> +		{ .setup = setup_configfs_post_ctx_restore_bb },
>>  	};
>>  	struct bo_setup_state state = {
>>  		.lrc = lrc,
>>
>> --
>> 2.50.1
>>

Re: [PATCH v4 5/6] drm/xe/lrc: Allow to add user commands on context switch

[Rodrigo Vivi]

On Tue, Sep 16, 2025 at 04:07:20PM -0500, Lucas De Marchi wrote:
> On Tue, Sep 16, 2025 at 04:27:45PM -0400, Rodrigo Vivi wrote:
> > On Thu, Sep 11, 2025 at 12:36:29PM -0700, Lucas De Marchi wrote:
> > > During validation it's useful to allows additional commands to be
> > > executed on context switch. Fetch the commands from configfs (to be
> > > added) and add them to the WA BB.
> > > 
> > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > > ---
> > > v2: Fix warning when building without configfs
> > > ---
> > >  drivers/gpu/drm/xe/xe_configfs.c | 13 +++++++++++++
> > >  drivers/gpu/drm/xe/xe_configfs.h |  6 ++++++
> > >  drivers/gpu/drm/xe/xe_lrc.c      | 25 +++++++++++++++++++++++++
> > >  3 files changed, 44 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
> > > index 45fdb6cf26b5d..d86c75af03278 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs.c
> > > +++ b/drivers/gpu/drm/xe/xe_configfs.c
> > > @@ -633,6 +633,19 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
> > >  	return ret;
> > >  }
> > > 
> > > +/**
> > > + * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
> > > + * @pdev: pci device
> > > + *
> > > + * Return: post_ctx_restore setting in configfs
> > > + */
> > > +u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
> > > +					enum xe_engine_class class,
> > > +					const u32 **cs)
> > > +{
> > > +	return 0;
> > > +}
> > > +
> > >  int __init xe_configfs_init(void)
> > >  {
> > >  	int ret;
> > > diff --git a/drivers/gpu/drm/xe/xe_configfs.h b/drivers/gpu/drm/xe/xe_configfs.h
> > > index 1402e863b71c0..eff2645b5f593 100644
> > > --- a/drivers/gpu/drm/xe/xe_configfs.h
> > > +++ b/drivers/gpu/drm/xe/xe_configfs.h
> > > @@ -8,6 +8,8 @@
> > >  #include <linux/limits.h>
> > >  #include <linux/types.h>
> > > 
> > > +#include <xe_hw_engine_types.h>
> > > +
> > >  struct pci_dev;
> > > 
> > >  #if IS_ENABLED(CONFIG_CONFIGFS_FS)
> > > @@ -17,6 +19,8 @@ void xe_configfs_check_device(struct pci_dev *pdev);
> > >  bool xe_configfs_get_survivability_mode(struct pci_dev *pdev);
> > >  u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev);
> > >  bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev);
> > > +u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
> > > +					const u32 **cs);
> > >  #else
> > >  static inline int xe_configfs_init(void) { return 0; }
> > >  static inline void xe_configfs_exit(void) { }
> > > @@ -24,6 +28,8 @@ static inline void xe_configfs_check_device(struct pci_dev *pdev) { }
> > >  static inline bool xe_configfs_get_survivability_mode(struct pci_dev *pdev) { return false; }
> > >  static inline u64 xe_configfs_get_engines_allowed(struct pci_dev *pdev) { return U64_MAX; }
> > >  static inline bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev) { return false; }
> > > +static inline u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev, enum xe_engine_class,
> > > +						      const u32 **cs) { return 0; }
> > >  #endif
> > > 
> > >  #endif
> > > diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> > > index 6d52e0eb97f54..f337954066f55 100644
> > > --- a/drivers/gpu/drm/xe/xe_lrc.c
> > > +++ b/drivers/gpu/drm/xe/xe_lrc.c
> > > @@ -16,6 +16,7 @@
> > >  #include "regs/xe_lrc_layout.h"
> > >  #include "xe_bb.h"
> > >  #include "xe_bo.h"
> > > +#include "xe_configfs.h"
> > >  #include "xe_device.h"
> > >  #include "xe_drm_client.h"
> > >  #include "xe_exec_queue_types.h"
> > > @@ -1102,6 +1103,29 @@ static ssize_t setup_timestamp_wa(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
> > >  	return cmd - batch;
> > >  }
> > > 
> > > +static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
> > > +						  struct xe_hw_engine *hwe,
> > > +						  u32 *batch, size_t max_len)
> > > +{
> > > +	struct xe_device *xe = gt_to_xe(lrc->gt);
> > > +	const u32 *user_batch;
> > > +	u32 *cmd = batch;
> > > +	u32 count;
> > > +
> > > +	count = xe_configfs_get_ctx_restore_post_bb(to_pci_dev(xe->drm.dev),
> > > +						    hwe->class, &user_batch);
> > > +	if (!count)
> > > +		return 0;
> > > +
> > > +	if (count > max_len)
> > > +		return -ENOSPC;
> > > +
> > > +	memcpy(cmd, user_batch, count * sizeof(u32));
> > 
> > shouldn't we use copy_from_user here?
> 
> no. When the user wrote to the file, configfs did the copy and
> called us in xe_configfs.c:
> 
> 	configfs_write_iter()
> 		copy_from_iter()
> 			...
> 				raw_copy_from_user()
> 		flush_write_buffer()
> 			buffer->attr->store()
> 				ctx_restore_post_bb_store()
> 
> ctx_restore_post_bb_store() will parse the lines, and save it in the
> correct format to this instance of xe_config_device.
> 
> What xe_configfs_get_ctx_restore_post_bb() does is basically return
> that already-parsed-and-saved data.
> 
> So... here we are not copying anything from user. We are copying the
> previously saved buffer that is already in the kernel.

so, it does look right

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Lucas De Marchi
> 
> > 
> > > +	cmd += count;
> > > +
> > > +	return cmd - batch;
> > > +}
> > > +
> > >  static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
> > >  					       struct xe_hw_engine *hwe,
> > >  					       u32 *batch, size_t max_len)
> > > @@ -1203,6 +1227,7 @@ int xe_lrc_setup_wa_bb_with_scratch(struct xe_lrc *lrc, struct xe_hw_engine *hwe
> > >  		{ .setup = setup_timestamp_wa },
> > >  		{ .setup = setup_invalidate_state_cache_wa },
> > >  		{ .setup = setup_utilization_wa },
> > > +		{ .setup = setup_configfs_post_ctx_restore_bb },
> > >  	};
> > >  	struct bo_setup_state state = {
> > >  		.lrc = lrc,
> > > 
> > > --
> > > 2.50.1
> > > 

Re: [PATCH v4 5/6] drm/xe/lrc: Allow to add user commands on context switch

[Lucas De Marchi]

On Tue, Sep 16, 2025 at 04:07:20PM -0500, Lucas De Marchi wrote:
>On Tue, Sep 16, 2025 at 04:27:45PM -0400, Rodrigo Vivi wrote:
>>>+	memcpy(cmd, user_batch, count * sizeof(u32));
>>
>>shouldn't we use copy_from_user here?
>
>no. When the user wrote to the file, configfs did the copy and
>called us in xe_configfs.c:
>
>	configfs_write_iter()
>		copy_from_iter()
>			...
>				raw_copy_from_user()
>		flush_write_buffer()
>			buffer->attr->store()
>				ctx_restore_post_bb_store()
>
>ctx_restore_post_bb_store() will parse the lines, and save it in the
>correct format to this instance of xe_config_device.
>
>What xe_configfs_get_ctx_restore_post_bb() does is basically return
>that already-parsed-and-saved data.
>
>So... here we are not copying anything from user. We are copying the
>previously saved buffer that is already in the kernel.

btw I was about to send v5 when I received your email. We can continue
the discussion here or move to
https://lore.kernel.org/intel-xe/20250916-wa-bb-cmds-v5-0-306bddbc15da@intel.com/

New version is a rebase and extend the support to mid context restore
(aka INDIRECT_CTX). Now there's only the rc6 bb missing.

Lucas De Marchi

[PATCH v4 6/6] drm/xe/configfs: Add post context restore bb

[Lucas De Marchi]

Allow the user to specify commands to execute during a context restore.
Currently it's possible to parse 2 types of actions:

	- cmd: the instructions are added as is to the bb
	- reg: just use the address and value, without worrying about
	  encoding the right LRI instruction. This is possibly the most
	  useful use case, so added a dedicated action for that.

This also prepares for future BBs: mid context restore and rc6 context
restore that can re-use the same parsing functions.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
v2:
- use bin attribute to be allow multiline
v3:
- revert attribute back to a simple attribute rather than binary:
  otherwise configfs only calls the callback on the file release and
  ignores the result. With that the user can't rely on the return
  code to know if the setting was accepted.

  To still allow multiline, a method that uses just one syscall should
  be used. In bash, echo will end up using more syscalls. This can be
  workarounded by using heredoc, or simply writing it in C
  (rewrote that listening to
   https://www.youtube.com/watch?v=1S1fISh-pag, you're welcome to review
   listening to that beauty too)
v4: taint with TAINT_TEST (Matt Roper)
---
 drivers/gpu/drm/xe/xe_configfs.c | 280 ++++++++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_lrc.c      |   7 +
 2 files changed, 285 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_configfs.c
index d86c75af03278..a61344d5093ae 100644
--- a/drivers/gpu/drm/xe/xe_configfs.c
+++ b/drivers/gpu/drm/xe/xe_configfs.c
@@ -4,6 +4,7 @@
  */
 
 #include <linux/bitops.h>
+#include <linux/ctype.h>
 #include <linux/configfs.h>
 #include <linux/cleanup.h>
 #include <linux/find.h>
@@ -12,6 +13,7 @@
 #include <linux/pci.h>
 #include <linux/string.h>
 
+#include "instructions/xe_mi_commands.h"
 #include "xe_configfs.h"
 #include "xe_hw_engine_types.h"
 #include "xe_module.h"
@@ -115,6 +117,37 @@
  *
  * This attribute can only be set before binding to the device.
  *
+ * Context restore BB
+ * ------------------
+ *
+ * Allow to execute a batch buffer during any context switches. When the
+ * GPU is restoring the context, it executes additional commands. It's useful
+ * for testing additional workarounds and validating certain HW behaviors: it's
+ * not intended for normal execution and will taint the kernel with TAINT_TEST
+ * when used.
+ *
+ * Currently this is implemented only for post context restore. Examples:
+ *
+ * #. Execute a LRI command to write 0xDEADBEEF to register 0x4f10::
+ *
+ *	# echo 'rcs cmd 11000001 4F100 DEADBEEF' \
+ *		> /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb
+ *
+ * #. Load certain values in a couple of registers (it can be used as a simpler
+ *    alternative to the `cmd`) action::
+ *
+ *	# cat > /sys/kernel/config/xe/0000:03:00.0/ctx_restore_post_bb <<EOF
+ *	rcs reg 4F100 DEADBEEF
+ *	rcs reg 4F104 FFFFFFFF
+ *	EOF
+ *
+ *    .. note::
+ *
+ *       When using multiple lines, make sure to use a command that is
+ *       implemented with a single write syscall, like HEREDOC.
+ *
+ * This attribute can only be set before binding to the device.
+ *
  * Remove devices
  * ==============
  *
@@ -123,11 +156,18 @@
  *	# rmdir /sys/kernel/config/xe/0000:03:00.0/
  */
 
+/* Similar to struct xe_bb, but not tied to HW (yet) */
+struct wa_bb {
+	u32 *cs;
+	u32 len; /* in dwords */
+};
+
 struct xe_config_group_device {
 	struct config_group group;
 
 	struct xe_config_device {
 		u64 engines_allowed;
+		struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX];
 		bool survivability_mode;
 		bool enable_psmi;
 	} config;
@@ -371,6 +411,227 @@ static ssize_t enable_psmi_store(struct config_item *item, const char *page, siz
 	return len;
 }
 
+static bool wa_bb_read_advance(bool dereference, char **p,
+			       const char *append, size_t len,
+			       size_t *max_size)
+{
+	if (dereference) {
+		if (len >= *max_size)
+			return false;
+		*max_size -= len;
+		if (append)
+			memcpy(*p, append, len);
+	}
+
+	*p += len;
+
+	return true;
+}
+
+static ssize_t wa_bb_show(struct xe_config_group_device *dev,
+			  struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+			  char *data, size_t sz)
+{
+	char *p = data;
+
+	guard(mutex)(&dev->lock);
+
+	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
+		enum xe_engine_class ec = engine_info[i].engine_class;
+		size_t len;
+
+		if (!wa_bb[ec].len)
+			continue;
+
+		len = snprintf(p, sz, "%s:", engine_info[i].cls);
+		if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+			return -ENOBUFS;
+
+		for (size_t j = 0; j < wa_bb[ec].len; j++) {
+			len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
+			if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
+				return -ENOBUFS;
+		}
+
+		if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
+			return -ENOBUFS;
+	}
+
+	if (!wa_bb_read_advance(data, &p, "", 1, &sz))
+		return -ENOBUFS;
+
+	/* Reserve one more to match check for '\0' */
+	if (!data)
+		p++;
+
+	return p - data;
+}
+
+static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *page)
+{
+	struct xe_config_group_device *dev = to_xe_config_group_device(item);
+
+	return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K);
+}
+
+static void wa_bb_append(struct wa_bb *wa_bb, u32 val)
+{
+	if (wa_bb->cs)
+		wa_bb->cs[wa_bb->len] = val;
+
+	wa_bb->len++;
+}
+
+static ssize_t parse_hex(const char *line, u32 *pval)
+{
+	char numstr[12];
+	const char *p;
+	ssize_t numlen;
+
+	p = line + strspn(line, " \t");
+	if (!*p || *p == '\n')
+		return 0;
+
+	numlen = strcspn(p, " \t\n");
+	if (!numlen || numlen >= sizeof(numstr) - 1)
+		return -EINVAL;
+
+	memcpy(numstr, p, numlen);
+	numstr[numlen] = '\0';
+	p += numlen;
+
+	if (kstrtou32(numstr, 16, pval))
+		return -EINVAL;
+
+	return p - line;
+}
+
+/*
+ * Parse lines with the format
+ *
+ *	<engine-class> cmd <u32> <u32...>
+ *	<engine-class> reg <u32_addr> <u32_val>
+ *
+ * and optionally save them in @wa_bb[i].cs is non-NULL.
+ *
+ * Return the number of dwords parsed.
+ */
+static ssize_t parse_wa_bb_lines(const char *lines,
+				 struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
+{
+	ssize_t dwords = 0, ret;
+	const char *p;
+
+	for (p = lines; *p; p++) {
+		const struct engine_info *info = NULL;
+		u32 val, val2;
+
+		/* Also allow empty lines */
+		p += strspn(p, " \t\n");
+		if (!*p)
+			break;
+
+		ret = parse_engine(p, " \t\n", NULL, &info);
+		if (ret < 0)
+			return ret;
+
+		p += ret;
+		p += strspn(p, " \t");
+
+		if (str_has_prefix(p, "cmd")) {
+			for (p += strlen("cmd"); *p;) {
+				ret = parse_hex(p, &val);
+				if (ret < 0)
+					return -EINVAL;
+				if (!ret)
+					break;
+
+				p += ret;
+				dwords++;
+				wa_bb_append(&wa_bb[info->engine_class], val);
+			}
+		} else if (str_has_prefix(p, "reg")) {
+			p += strlen("reg");
+			ret = parse_hex(p, &val);
+			if (ret <= 0)
+				return -EINVAL;
+
+			p += ret;
+			ret = parse_hex(p, &val2);
+			if (ret <= 0)
+				return -EINVAL;
+
+			p += ret;
+			dwords += 3;
+			wa_bb_append(&wa_bb[info->engine_class],
+				     MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
+			wa_bb_append(&wa_bb[info->engine_class], val);
+			wa_bb_append(&wa_bb[info->engine_class], val2);
+		} else {
+			return -EINVAL;
+		}
+	}
+
+	return dwords;
+}
+
+static ssize_t wa_bb_store(struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
+			   struct xe_config_group_device *dev,
+			   const char *page, size_t len)
+{
+	/* tmp_wa_bb must match wa_bb's size */
+	struct wa_bb tmp_wa_bb[XE_ENGINE_CLASS_MAX] = { };
+	ssize_t count, class;
+	u32 *tmp;
+
+	/* 1. Count dwords - wa_bb[i].cs is NULL for all classes */
+	count = parse_wa_bb_lines(page, tmp_wa_bb);
+	if (count < 0)
+		return count;
+
+	guard(mutex)(&dev->lock);
+
+	if (is_bound(dev))
+		return -EBUSY;
+
+	/*
+	 * 2. Allocate a u32 array and set the pointers to the right positions
+	 * according to the length of each class' wa_bb
+	 */
+	tmp = krealloc(wa_bb[0].cs, count * sizeof(u32), GFP_KERNEL);
+	if (!tmp)
+		return -ENOMEM;
+
+	if (!count) {
+		memset(wa_bb, 0, sizeof(tmp_wa_bb));
+		return len;
+	}
+
+	for (class = 0, count = 0; class < XE_ENGINE_CLASS_MAX; ++class) {
+		tmp_wa_bb[class].cs = tmp + count;
+		count += tmp_wa_bb[class].len;
+		tmp_wa_bb[class].len = 0;
+	}
+
+	/* 3. Parse wa_bb lines again, this time saving the values */
+	count = parse_wa_bb_lines(page, tmp_wa_bb);
+	if (count < 0)
+		return count;
+
+	memcpy(wa_bb, tmp_wa_bb, sizeof(tmp_wa_bb));
+
+	return len;
+}
+
+static ssize_t ctx_restore_post_bb_store(struct config_item *item,
+					 const char *data, size_t sz)
+{
+	struct xe_config_group_device *dev = to_xe_config_group_device(item);
+
+	return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz);
+}
+
+CONFIGFS_ATTR(, ctx_restore_post_bb);
 CONFIGFS_ATTR(, enable_psmi);
 CONFIGFS_ATTR(, engines_allowed);
 CONFIGFS_ATTR(, survivability_mode);
@@ -379,6 +640,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
 	&attr_enable_psmi,
 	&attr_engines_allowed,
 	&attr_survivability_mode,
+	&attr_ctx_restore_post_bb,
 	NULL,
 };
 
@@ -387,6 +649,8 @@ static void xe_config_device_release(struct config_item *item)
 	struct xe_config_group_device *dev = to_xe_config_group_device(item);
 
 	mutex_destroy(&dev->lock);
+
+	kfree(dev->config.ctx_restore_post_bb[0].cs);
 	kfree(dev);
 }
 
@@ -636,14 +900,26 @@ bool xe_configfs_get_psmi_enabled(struct pci_dev *pdev)
 /**
  * xe_configfs_get_ctx_restore_post_bb - get configfs ctx_restore_post_bb setting
  * @pdev: pci device
+ * @class: hw engine class
+ * @cs: pointer to the bb to use - only valid during probe
  *
- * Return: post_ctx_restore setting in configfs
+ * Return: Number of dwords used in the post_ctx_restore setting in configfs
  */
 u32 xe_configfs_get_ctx_restore_post_bb(struct pci_dev *pdev,
 					enum xe_engine_class class,
 					const u32 **cs)
 {
-	return 0;
+	struct xe_config_group_device *dev = find_xe_config_group_device(pdev);
+	u32 len;
+
+	if (!dev)
+		return 0;
+
+	*cs = dev->config.ctx_restore_post_bb[class].cs;
+	len = dev->config.ctx_restore_post_bb[class].len;
+	config_group_put(&dev->group);
+
+	return len;
 }
 
 int __init xe_configfs_init(void)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index f337954066f55..c706585611d55 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -8,6 +8,7 @@
 #include <generated/xe_wa_oob.h>
 
 #include <linux/ascii85.h>
+#include <linux/panic.h>
 
 #include "instructions/xe_mi_commands.h"
 #include "instructions/xe_gfxpipe_commands.h"
@@ -1120,6 +1121,12 @@ static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
 	if (count > max_len)
 		return -ENOSPC;
 
+	/*
+	 * This should be used only for tests and validation. Taint the kernel
+	 * as anything could be submitted directly in context switches
+	 */
+	add_taint(TAINT_TEST, LOCKDEP_STILL_OK);
+
 	memcpy(cmd, user_batch, count * sizeof(u32));
 	cmd += count;
 

-- 
2.50.1

Re: [PATCH v4 6/6] drm/xe/configfs: Add post context restore bb

[Raag Jadav]

On Thu, Sep 11, 2025 at 12:36:30PM -0700, Lucas De Marchi wrote:
> Allow the user to specify commands to execute during a context restore.
> Currently it's possible to parse 2 types of actions:
> 
> 	- cmd: the instructions are added as is to the bb
> 	- reg: just use the address and value, without worrying about
> 	  encoding the right LRI instruction. This is possibly the most
> 	  useful use case, so added a dedicated action for that.
> 
> This also prepares for future BBs: mid context restore and rc6 context
> restore that can re-use the same parsing functions.

...

> @@ -123,11 +156,18 @@
>   *	# rmdir /sys/kernel/config/xe/0000:03:00.0/
>   */
>  
> +/* Similar to struct xe_bb, but not tied to HW (yet) */

Should I assume we plan to do it at some point?

> +struct wa_bb {
> +	u32 *cs;
> +	u32 len; /* in dwords */
> +};

...

> +static ssize_t wa_bb_show(struct xe_config_group_device *dev,
> +			  struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
> +			  char *data, size_t sz)
> +{
> +	char *p = data;
> +
> +	guard(mutex)(&dev->lock);
> +
> +	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
> +		enum xe_engine_class ec = engine_info[i].engine_class;
> +		size_t len;
> +
> +		if (!wa_bb[ec].len)
> +			continue;
> +
> +		len = snprintf(p, sz, "%s:", engine_info[i].cls);
> +		if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
> +			return -ENOBUFS;
> +
> +		for (size_t j = 0; j < wa_bb[ec].len; j++) {
> +			len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);

Should we use '0x' prefix?

> +			if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
> +				return -ENOBUFS;
> +		}
> +
> +		if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
> +			return -ENOBUFS;
> +	}
> +
> +	if (!wa_bb_read_advance(data, &p, "", 1, &sz))
> +		return -ENOBUFS;
> +
> +	/* Reserve one more to match check for '\0' */
> +	if (!data)
> +		p++;
> +
> +	return p - data;
> +}

...

> +static ssize_t parse_wa_bb_lines(const char *lines,
> +				 struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
> +{
> +	ssize_t dwords = 0, ret;
> +	const char *p;
> +
> +	for (p = lines; *p; p++) {

I found it to be zeroed page but does it gurantee termination at page
boundary? (just thinking out loud about overrun cases)

> +		const struct engine_info *info = NULL;
> +		u32 val, val2;
> +
> +		/* Also allow empty lines */
> +		p += strspn(p, " \t\n");
> +		if (!*p)
> +			break;
> +
> +		ret = parse_engine(p, " \t\n", NULL, &info);

Nit: Can we work without a double pointer? I've always found it easier to read.

> +		if (ret < 0)
> +			return ret;
> +
> +		p += ret;
> +		p += strspn(p, " \t");
> +
> +		if (str_has_prefix(p, "cmd")) {
> +			for (p += strlen("cmd"); *p;) {
> +				ret = parse_hex(p, &val);
> +				if (ret < 0)
> +					return -EINVAL;
> +				if (!ret)
> +					break;
> +
> +				p += ret;
> +				dwords++;
> +				wa_bb_append(&wa_bb[info->engine_class], val);
> +			}
> +		} else if (str_has_prefix(p, "reg")) {
> +			p += strlen("reg");
> +			ret = parse_hex(p, &val);
> +			if (ret <= 0)
> +				return -EINVAL;
> +
> +			p += ret;
> +			ret = parse_hex(p, &val2);
> +			if (ret <= 0)
> +				return -EINVAL;
> +
> +			p += ret;
> +			dwords += 3;
> +			wa_bb_append(&wa_bb[info->engine_class],
> +				     MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
> +			wa_bb_append(&wa_bb[info->engine_class], val);
> +			wa_bb_append(&wa_bb[info->engine_class], val2);
> +		} else {
> +			return -EINVAL;
> +		}
> +	}
> +
> +	return dwords;
> +}

...

> +CONFIGFS_ATTR(, ctx_restore_post_bb);

I know this is alphabetic order but let's be consistent, either at the top ...

>  CONFIGFS_ATTR(, enable_psmi);
>  CONFIGFS_ATTR(, engines_allowed);
>  CONFIGFS_ATTR(, survivability_mode);
> @@ -379,6 +640,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
>  	&attr_enable_psmi,
>  	&attr_engines_allowed,
>  	&attr_survivability_mode,
> +	&attr_ctx_restore_post_bb,

... or bottom.

>  	NULL,
>  };

...

> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index f337954066f55..c706585611d55 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -8,6 +8,7 @@
>  #include <generated/xe_wa_oob.h>
>  
>  #include <linux/ascii85.h>
> +#include <linux/panic.h>
>  
>  #include "instructions/xe_mi_commands.h"
>  #include "instructions/xe_gfxpipe_commands.h"
> @@ -1120,6 +1121,12 @@ static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
>  	if (count > max_len)
>  		return -ENOSPC;
>  
> +	/*
> +	 * This should be used only for tests and validation. Taint the kernel
> +	 * as anything could be submitted directly in context switches
> +	 */
> +	add_taint(TAINT_TEST, LOCKDEP_STILL_OK);

I know we add wa_bb support in this patch but perhaps this belongs to
previous patch?

Raag

>  	memcpy(cmd, user_batch, count * sizeof(u32));
>  	cmd += count;
>  
> 
> -- 
> 2.50.1
> 

Re: [PATCH v4 6/6] drm/xe/configfs: Add post context restore bb

[Lucas De Marchi]

On Fri, Sep 12, 2025 at 10:05:21AM +0200, Raag Jadav wrote:
>On Thu, Sep 11, 2025 at 12:36:30PM -0700, Lucas De Marchi wrote:
>> Allow the user to specify commands to execute during a context restore.
>> Currently it's possible to parse 2 types of actions:
>>
>> 	- cmd: the instructions are added as is to the bb
>> 	- reg: just use the address and value, without worrying about
>> 	  encoding the right LRI instruction. This is possibly the most
>> 	  useful use case, so added a dedicated action for that.
>>
>> This also prepares for future BBs: mid context restore and rc6 context
>> restore that can re-use the same parsing functions.
>
>...
>
>> @@ -123,11 +156,18 @@
>>   *	# rmdir /sys/kernel/config/xe/0000:03:00.0/
>>   */
>>
>> +/* Similar to struct xe_bb, but not tied to HW (yet) */
>
>Should I assume we plan to do it at some point?

no, the "(yet)" means that it's only a struct to stash the bb. There
isn't an exec queue associated to it like in the xe_bb case. The hw
association will come later in the runtime flow, not in a future patch.

I may remove the "(yet)" in the next version to avoid confusion.

>
>> +struct wa_bb {
>> +	u32 *cs;
>> +	u32 len; /* in dwords */
>> +};
>
>...
>
>> +static ssize_t wa_bb_show(struct xe_config_group_device *dev,
>> +			  struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
>> +			  char *data, size_t sz)
>> +{
>> +	char *p = data;
>> +
>> +	guard(mutex)(&dev->lock);
>> +
>> +	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
>> +		enum xe_engine_class ec = engine_info[i].engine_class;
>> +		size_t len;
>> +
>> +		if (!wa_bb[ec].len)
>> +			continue;
>> +
>> +		len = snprintf(p, sz, "%s:", engine_info[i].cls);
>> +		if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
>> +			return -ENOBUFS;
>> +
>> +		for (size_t j = 0; j < wa_bb[ec].len; j++) {
>> +			len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
>
>Should we use '0x' prefix?

Then maybe we'd need to change the input parsing as well :-/. Not sure
it's worth it.

>
>> +			if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
>> +				return -ENOBUFS;
>> +		}
>> +
>> +		if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
>> +			return -ENOBUFS;
>> +	}
>> +
>> +	if (!wa_bb_read_advance(data, &p, "", 1, &sz))
>> +		return -ENOBUFS;
>> +
>> +	/* Reserve one more to match check for '\0' */
>> +	if (!data)
>> +		p++;
>> +
>> +	return p - data;
>> +}
>
>...
>
>> +static ssize_t parse_wa_bb_lines(const char *lines,
>> +				 struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
>> +{
>> +	ssize_t dwords = 0, ret;
>> +	const char *p;
>> +
>> +	for (p = lines; *p; p++) {
>
>I found it to be zeroed page but does it gurantee termination at page
>boundary? (just thinking out loud about overrun cases)

it's actually not a zeroed page, but it is terminated:

	if (!buffer->page)
		 buffer->page = (char *)__get_free_pages(GFP_KERNEL, 0);
	...
	copied = copy_from_iter(buffer->page, SIMPLE_ATTR_SIZE - 1, from);
	...
	/* if buf is assumed to contain a string, terminate it by \0,
	 * so e.g. sscanf() can scan the string easily */
	buffer->page[copied] = 0;


>
>> +		const struct engine_info *info = NULL;
>> +		u32 val, val2;
>> +
>> +		/* Also allow empty lines */
>> +		p += strspn(p, " \t\n");
>> +		if (!*p)
>> +			break;
>> +
>> +		ret = parse_engine(p, " \t\n", NULL, &info);
>
>Nit: Can we work without a double pointer? I've always found it easier to read.

It's basically "where info should point to in case parse_engine is
succesfull". Pretty common pattern in parse/lookup code like this.

in this case we need to use the ret to know how many chars we parsed.

	info = parse_engine(p, " \t\n", NULL, &len);

would avoid the double pointer, but also make it harder to follow as
we'd need to encode the error in the pointer and use a different pattern
than the other functions.

sorry, but it seems this is a better alternative.

>
>> +		if (ret < 0)
>> +			return ret;
>> +
>> +		p += ret;
>> +		p += strspn(p, " \t");
>> +
>> +		if (str_has_prefix(p, "cmd")) {
>> +			for (p += strlen("cmd"); *p;) {
>> +				ret = parse_hex(p, &val);
>> +				if (ret < 0)
>> +					return -EINVAL;
>> +				if (!ret)
>> +					break;
>> +
>> +				p += ret;
>> +				dwords++;
>> +				wa_bb_append(&wa_bb[info->engine_class], val);
>> +			}
>> +		} else if (str_has_prefix(p, "reg")) {
>> +			p += strlen("reg");
>> +			ret = parse_hex(p, &val);
>> +			if (ret <= 0)
>> +				return -EINVAL;
>> +
>> +			p += ret;
>> +			ret = parse_hex(p, &val2);
>> +			if (ret <= 0)
>> +				return -EINVAL;
>> +
>> +			p += ret;
>> +			dwords += 3;
>> +			wa_bb_append(&wa_bb[info->engine_class],
>> +				     MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1));
>> +			wa_bb_append(&wa_bb[info->engine_class], val);
>> +			wa_bb_append(&wa_bb[info->engine_class], val2);
>> +		} else {
>> +			return -EINVAL;
>> +		}
>> +	}
>> +
>> +	return dwords;
>> +}
>
>...
>
>> +CONFIGFS_ATTR(, ctx_restore_post_bb);
>
>I know this is alphabetic order but let's be consistent, either at the top ...
>
>>  CONFIGFS_ATTR(, enable_psmi);
>>  CONFIGFS_ATTR(, engines_allowed);
>>  CONFIGFS_ATTR(, survivability_mode);
>> @@ -379,6 +640,7 @@ static struct configfs_attribute *xe_config_device_attrs[] = {
>>  	&attr_enable_psmi,
>>  	&attr_engines_allowed,
>>  	&attr_survivability_mode,
>> +	&attr_ctx_restore_post_bb,
>
>... or bottom.

ok

>
>>  	NULL,
>>  };
>
>...
>
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>> index f337954066f55..c706585611d55 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.c
>> +++ b/drivers/gpu/drm/xe/xe_lrc.c
>> @@ -8,6 +8,7 @@
>>  #include <generated/xe_wa_oob.h>
>>
>>  #include <linux/ascii85.h>
>> +#include <linux/panic.h>
>>
>>  #include "instructions/xe_mi_commands.h"
>>  #include "instructions/xe_gfxpipe_commands.h"
>> @@ -1120,6 +1121,12 @@ static ssize_t setup_configfs_post_ctx_restore_bb(struct xe_lrc *lrc,
>>  	if (count > max_len)
>>  		return -ENOSPC;
>>
>> +	/*
>> +	 * This should be used only for tests and validation. Taint the kernel
>> +	 * as anything could be submitted directly in context switches
>> +	 */
>> +	add_taint(TAINT_TEST, LOCKDEP_STILL_OK);
>
>I know we add wa_bb support in this patch but perhaps this belongs to
>previous patch?

yep, it would be a better fit there. Thanks

Lucas De Marchi

>
>Raag
>
>>  	memcpy(cmd, user_batch, count * sizeof(u32));
>>  	cmd += count;
>>
>>
>> --
>> 2.50.1
>>

Re: [PATCH v4 6/6] drm/xe/configfs: Add post context restore bb

[Raag Jadav]

On Fri, Sep 12, 2025 at 09:07:10AM -0500, Lucas De Marchi wrote:
> On Fri, Sep 12, 2025 at 10:05:21AM +0200, Raag Jadav wrote:
> > On Thu, Sep 11, 2025 at 12:36:30PM -0700, Lucas De Marchi wrote:
> > > Allow the user to specify commands to execute during a context restore.
> > > Currently it's possible to parse 2 types of actions:
> > > 
> > > 	- cmd: the instructions are added as is to the bb
> > > 	- reg: just use the address and value, without worrying about
> > > 	  encoding the right LRI instruction. This is possibly the most
> > > 	  useful use case, so added a dedicated action for that.
> > > 
> > > This also prepares for future BBs: mid context restore and rc6 context
> > > restore that can re-use the same parsing functions.
> > 
> > ...
> > 
> > > @@ -123,11 +156,18 @@
> > >   *	# rmdir /sys/kernel/config/xe/0000:03:00.0/
> > >   */
> > > 
> > > +/* Similar to struct xe_bb, but not tied to HW (yet) */
> > 
> > Should I assume we plan to do it at some point?
> 
> no, the "(yet)" means that it's only a struct to stash the bb. There
> isn't an exec queue associated to it like in the xe_bb case. The hw
> association will come later in the runtime flow, not in a future patch.
> 
> I may remove the "(yet)" in the next version to avoid confusion.

Thanks.

> > 
> > > +struct wa_bb {
> > > +	u32 *cs;
> > > +	u32 len; /* in dwords */
> > > +};
> > 
> > ...
> > 
> > > +static ssize_t wa_bb_show(struct xe_config_group_device *dev,
> > > +			  struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX],
> > > +			  char *data, size_t sz)
> > > +{
> > > +	char *p = data;
> > > +
> > > +	guard(mutex)(&dev->lock);
> > > +
> > > +	for (size_t i = 0; i < ARRAY_SIZE(engine_info); i++) {
> > > +		enum xe_engine_class ec = engine_info[i].engine_class;
> > > +		size_t len;
> > > +
> > > +		if (!wa_bb[ec].len)
> > > +			continue;
> > > +
> > > +		len = snprintf(p, sz, "%s:", engine_info[i].cls);
> > > +		if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
> > > +			return -ENOBUFS;
> > > +
> > > +		for (size_t j = 0; j < wa_bb[ec].len; j++) {
> > > +			len = snprintf(p, sz, " %08x", wa_bb[ec].cs[j]);
> > 
> > Should we use '0x' prefix?
> 
> Then maybe we'd need to change the input parsing as well :-/. Not sure
> it's worth it.

Fair.

> > 
> > > +			if (!wa_bb_read_advance(data, &p, NULL, len, &sz))
> > > +				return -ENOBUFS;
> > > +		}
> > > +
> > > +		if (!wa_bb_read_advance(data, &p, "\n", 1, &sz))
> > > +			return -ENOBUFS;
> > > +	}
> > > +
> > > +	if (!wa_bb_read_advance(data, &p, "", 1, &sz))
> > > +		return -ENOBUFS;
> > > +
> > > +	/* Reserve one more to match check for '\0' */
> > > +	if (!data)
> > > +		p++;
> > > +
> > > +	return p - data;
> > > +}
> > 
> > ...
> > 
> > > +static ssize_t parse_wa_bb_lines(const char *lines,
> > > +				 struct wa_bb wa_bb[static XE_ENGINE_CLASS_MAX])
> > > +{
> > > +	ssize_t dwords = 0, ret;
> > > +	const char *p;
> > > +
> > > +	for (p = lines; *p; p++) {
> > 
> > I found it to be zeroed page but does it gurantee termination at page
> > boundary? (just thinking out loud about overrun cases)
> 
> it's actually not a zeroed page, but it is terminated:
> 
> 	if (!buffer->page)
> 		 buffer->page = (char *)__get_free_pages(GFP_KERNEL, 0);
> 	...
> 	copied = copy_from_iter(buffer->page, SIMPLE_ATTR_SIZE - 1, from);
> 	...
> 	/* if buf is assumed to contain a string, terminate it by \0,
> 	 * so e.g. sscanf() can scan the string easily */
> 	buffer->page[copied] = 0;

*facepalm* I didn't realize I was looking at read_iter().

> > 
> > > +		const struct engine_info *info = NULL;
> > > +		u32 val, val2;
> > > +
> > > +		/* Also allow empty lines */
> > > +		p += strspn(p, " \t\n");
> > > +		if (!*p)
> > > +			break;
> > > +
> > > +		ret = parse_engine(p, " \t\n", NULL, &info);
> > 
> > Nit: Can we work without a double pointer? I've always found it easier to read.
> 
> It's basically "where info should point to in case parse_engine is
> succesfull". Pretty common pattern in parse/lookup code like this.
> 
> in this case we need to use the ret to know how many chars we parsed.
> 
> 	info = parse_engine(p, " \t\n", NULL, &len);
> 
> would avoid the double pointer, but also make it harder to follow as
> we'd need to encode the error in the pointer and use a different pattern
> than the other functions.

A NULL return for error cases would be one way, but at the cost of loosing
internal error codes which is probably controversial. In any case,

Reviewed-by: Raag Jadav <raag.jadav@intel.com>

✗ CI.checkpatch: warning for drm/xe: Add user commands to WA BB via configfs

[Patchwork]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/154420/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
fbd08a78c3a3bb17964db2a326514c69c1dca660
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 47c3395dab446c99fdf26c7813364d887722c558
Author: Lucas De Marchi <lucas.demarchi@intel.com>
Date:   Thu Sep 11 12:36:30 2025 -0700

    drm/xe/configfs: Add post context restore bb
    
    Allow the user to specify commands to execute during a context restore.
    Currently it's possible to parse 2 types of actions:
    
            - cmd: the instructions are added as is to the bb
            - reg: just use the address and value, without worrying about
              encoding the right LRI instruction. This is possibly the most
              useful use case, so added a dedicated action for that.
    
    This also prepares for future BBs: mid context restore and rc6 context
    restore that can re-use the same parsing functions.
    
    Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
+ /mt/dim checkpatch a433a14cc397ef049ef273a3d4404d46a20a28cb drm-intel
5ee27c2e4d2b drm/xe: Update workaround documentation
d7db1f69569e drm/xe/configfs: Fix documentation warning
c43318b32bb1 drm/xe/configfs: Extract function to parse engine
cd9ea0537bb5 drm/xe/configfs: Allow to select by class only
-:41: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#41: FILE: drivers/gpu/drm/xe/xe_configfs.c:165:
+	{ .cls = "vcs", .mask = XE_HW_ENGINE_VCS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_DECODE },

-:42: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#42: FILE: drivers/gpu/drm/xe/xe_configfs.c:166:
+	{ .cls = "vecs", .mask = XE_HW_ENGINE_VECS_MASK, .engine_class = XE_ENGINE_CLASS_VIDEO_ENHANCE },

total: 0 errors, 2 warnings, 0 checks, 105 lines checked
545706eb92d9 drm/xe/lrc: Allow to add user commands on context switch
47c3395dab44 drm/xe/configfs: Add post context restore bb

✓ CI.KUnit: success for drm/xe: Add user commands to WA BB via configfs

[Patchwork]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/154420/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:19:32] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:19:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:20:05] Starting KUnit Kernel (1/1)...
[20:20:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:20:06] ================== guc_buf (11 subtests) ===================
[20:20:06] [PASSED] test_smallest
[20:20:06] [PASSED] test_largest
[20:20:06] [PASSED] test_granular
[20:20:06] [PASSED] test_unique
[20:20:06] [PASSED] test_overlap
[20:20:06] [PASSED] test_reusable
[20:20:06] [PASSED] test_too_big
[20:20:06] [PASSED] test_flush
[20:20:06] [PASSED] test_lookup
[20:20:06] [PASSED] test_data
[20:20:06] [PASSED] test_class
[20:20:06] ===================== [PASSED] guc_buf =====================
[20:20:06] =================== guc_dbm (7 subtests) ===================
[20:20:06] [PASSED] test_empty
[20:20:06] [PASSED] test_default
[20:20:06] ======================== test_size  ========================
[20:20:06] [PASSED] 4
[20:20:06] [PASSED] 8
[20:20:06] [PASSED] 32
[20:20:06] [PASSED] 256
[20:20:06] ==================== [PASSED] test_size ====================
[20:20:06] ======================= test_reuse  ========================
[20:20:06] [PASSED] 4
[20:20:06] [PASSED] 8
[20:20:06] [PASSED] 32
[20:20:06] [PASSED] 256
[20:20:06] =================== [PASSED] test_reuse ====================
[20:20:06] =================== test_range_overlap  ====================
[20:20:06] [PASSED] 4
[20:20:06] [PASSED] 8
[20:20:06] [PASSED] 32
[20:20:06] [PASSED] 256
[20:20:06] =============== [PASSED] test_range_overlap ================
[20:20:06] =================== test_range_compact  ====================
[20:20:06] [PASSED] 4
[20:20:06] [PASSED] 8
[20:20:06] [PASSED] 32
[20:20:06] [PASSED] 256
[20:20:06] =============== [PASSED] test_range_compact ================
[20:20:06] ==================== test_range_spare  =====================
[20:20:06] [PASSED] 4
[20:20:06] [PASSED] 8
[20:20:06] [PASSED] 32
[20:20:06] [PASSED] 256
[20:20:06] ================ [PASSED] test_range_spare =================
[20:20:06] ===================== [PASSED] guc_dbm =====================
[20:20:06] =================== guc_idm (6 subtests) ===================
[20:20:06] [PASSED] bad_init
[20:20:06] [PASSED] no_init
[20:20:06] [PASSED] init_fini
[20:20:06] [PASSED] check_used
[20:20:06] [PASSED] check_quota
[20:20:06] [PASSED] check_all
[20:20:06] ===================== [PASSED] guc_idm =====================
[20:20:06] ================== no_relay (3 subtests) ===================
[20:20:06] [PASSED] xe_drops_guc2pf_if_not_ready
[20:20:06] [PASSED] xe_drops_guc2vf_if_not_ready
[20:20:06] [PASSED] xe_rejects_send_if_not_ready
[20:20:06] ==================== [PASSED] no_relay =====================
[20:20:06] ================== pf_relay (14 subtests) ==================
[20:20:06] [PASSED] pf_rejects_guc2pf_too_short
[20:20:06] [PASSED] pf_rejects_guc2pf_too_long
[20:20:06] [PASSED] pf_rejects_guc2pf_no_payload
[20:20:06] [PASSED] pf_fails_no_payload
[20:20:06] [PASSED] pf_fails_bad_origin
[20:20:06] [PASSED] pf_fails_bad_type
[20:20:06] [PASSED] pf_txn_reports_error
[20:20:06] [PASSED] pf_txn_sends_pf2guc
[20:20:06] [PASSED] pf_sends_pf2guc
[20:20:06] [SKIPPED] pf_loopback_nop
[20:20:06] [SKIPPED] pf_loopback_echo
[20:20:06] [SKIPPED] pf_loopback_fail
[20:20:06] [SKIPPED] pf_loopback_busy
[20:20:06] [SKIPPED] pf_loopback_retry
[20:20:06] ==================== [PASSED] pf_relay =====================
[20:20:06] ================== vf_relay (3 subtests) ===================
[20:20:06] [PASSED] vf_rejects_guc2vf_too_short
[20:20:06] [PASSED] vf_rejects_guc2vf_too_long
[20:20:06] [PASSED] vf_rejects_guc2vf_no_payload
[20:20:06] ==================== [PASSED] vf_relay =====================
[20:20:06] ===================== lmtt (1 subtest) =====================
[20:20:06] ======================== test_ops  =========================
[20:20:06] [PASSED] 2-level
[20:20:06] [PASSED] multi-level
[20:20:06] ==================== [PASSED] test_ops =====================
[20:20:06] ====================== [PASSED] lmtt =======================
[20:20:06] ================= pf_service (11 subtests) =================
[20:20:06] [PASSED] pf_negotiate_any
[20:20:06] [PASSED] pf_negotiate_base_match
[20:20:06] [PASSED] pf_negotiate_base_newer
[20:20:06] [PASSED] pf_negotiate_base_next
[20:20:06] [SKIPPED] pf_negotiate_base_older
[20:20:06] [PASSED] pf_negotiate_base_prev
[20:20:06] [PASSED] pf_negotiate_latest_match
[20:20:06] [PASSED] pf_negotiate_latest_newer
[20:20:06] [PASSED] pf_negotiate_latest_next
[20:20:06] [SKIPPED] pf_negotiate_latest_older
[20:20:06] [SKIPPED] pf_negotiate_latest_prev
[20:20:06] =================== [PASSED] pf_service ====================
[20:20:06] =================== xe_mocs (2 subtests) ===================
[20:20:06] ================ xe_live_mocs_kernel_kunit  ================
[20:20:06] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:20:06] ================ xe_live_mocs_reset_kunit  =================
[20:20:06] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:20:06] ==================== [SKIPPED] xe_mocs =====================
[20:20:06] ================= xe_migrate (2 subtests) ==================
[20:20:06] ================= xe_migrate_sanity_kunit  =================
[20:20:06] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:20:06] ================== xe_validate_ccs_kunit  ==================
[20:20:06] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:20:06] =================== [SKIPPED] xe_migrate ===================
[20:20:06] ================== xe_dma_buf (1 subtest) ==================
[20:20:06] ==================== xe_dma_buf_kunit  =====================
[20:20:06] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:20:06] =================== [SKIPPED] xe_dma_buf ===================
[20:20:06] ================= xe_bo_shrink (1 subtest) =================
[20:20:06] =================== xe_bo_shrink_kunit  ====================
[20:20:06] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:20:06] ================== [SKIPPED] xe_bo_shrink ==================
[20:20:06] ==================== xe_bo (2 subtests) ====================
[20:20:06] ================== xe_ccs_migrate_kunit  ===================
[20:20:06] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:20:06] ==================== xe_bo_evict_kunit  ====================
[20:20:06] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:20:06] ===================== [SKIPPED] xe_bo ======================
[20:20:06] ==================== args (11 subtests) ====================
[20:20:06] [PASSED] count_args_test
[20:20:06] [PASSED] call_args_example
[20:20:06] [PASSED] call_args_test
[20:20:06] [PASSED] drop_first_arg_example
[20:20:06] [PASSED] drop_first_arg_test
[20:20:06] [PASSED] first_arg_example
[20:20:06] [PASSED] first_arg_test
[20:20:06] [PASSED] last_arg_example
[20:20:06] [PASSED] last_arg_test
[20:20:06] [PASSED] pick_arg_example
[20:20:06] [PASSED] sep_comma_example
[20:20:06] ====================== [PASSED] args =======================
[20:20:06] =================== xe_pci (3 subtests) ====================
[20:20:06] ==================== check_graphics_ip  ====================
[20:20:06] [PASSED] 12.70 Xe_LPG
[20:20:06] [PASSED] 12.71 Xe_LPG
[20:20:06] [PASSED] 12.74 Xe_LPG+
[20:20:06] [PASSED] 20.01 Xe2_HPG
[20:20:06] [PASSED] 20.02 Xe2_HPG
[20:20:06] [PASSED] 20.04 Xe2_LPG
[20:20:06] [PASSED] 30.00 Xe3_LPG
[20:20:06] [PASSED] 30.01 Xe3_LPG
[20:20:06] [PASSED] 30.03 Xe3_LPG
[20:20:06] ================ [PASSED] check_graphics_ip ================
[20:20:06] ===================== check_media_ip  ======================
[20:20:06] [PASSED] 13.00 Xe_LPM+
[20:20:06] [PASSED] 13.01 Xe2_HPM
[20:20:06] [PASSED] 20.00 Xe2_LPM
[20:20:06] [PASSED] 30.00 Xe3_LPM
[20:20:06] [PASSED] 30.02 Xe3_LPM
[20:20:06] ================= [PASSED] check_media_ip ==================
[20:20:06] ================= check_platform_gt_count  =================
[20:20:06] [PASSED] 0x9A60 (TIGERLAKE)
[20:20:06] [PASSED] 0x9A68 (TIGERLAKE)
[20:20:06] [PASSED] 0x9A70 (TIGERLAKE)
[20:20:06] [PASSED] 0x9A40 (TIGERLAKE)
[20:20:06] [PASSED] 0x9A49 (TIGERLAKE)
[20:20:06] [PASSED] 0x9A59 (TIGERLAKE)
[20:20:06] [PASSED] 0x9A78 (TIGERLAKE)
[20:20:06] [PASSED] 0x9AC0 (TIGERLAKE)
[20:20:06] [PASSED] 0x9AC9 (TIGERLAKE)
[20:20:06] [PASSED] 0x9AD9 (TIGERLAKE)
[20:20:06] [PASSED] 0x9AF8 (TIGERLAKE)
[20:20:06] [PASSED] 0x4C80 (ROCKETLAKE)
[20:20:06] [PASSED] 0x4C8A (ROCKETLAKE)
[20:20:06] [PASSED] 0x4C8B (ROCKETLAKE)
[20:20:06] [PASSED] 0x4C8C (ROCKETLAKE)
[20:20:06] [PASSED] 0x4C90 (ROCKETLAKE)
[20:20:06] [PASSED] 0x4C9A (ROCKETLAKE)
[20:20:06] [PASSED] 0x4680 (ALDERLAKE_S)
[20:20:06] [PASSED] 0x4682 (ALDERLAKE_S)
[20:20:06] [PASSED] 0x4688 (ALDERLAKE_S)
[20:20:06] [PASSED] 0x468A (ALDERLAKE_S)
[20:20:06] [PASSED] 0x468B (ALDERLAKE_S)
[20:20:06] [PASSED] 0x4690 (ALDERLAKE_S)
[20:20:06] [PASSED] 0x4692 (ALDERLAKE_S)
[20:20:06] [PASSED] 0x4693 (ALDERLAKE_S)
[20:20:06] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46AA (ALDERLAKE_P)
[20:20:06] [PASSED] 0x462A (ALDERLAKE_P)
[20:20:06] [PASSED] 0x4626 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x4628 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46B0 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:20:06] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:20:06] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:20:06] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:20:06] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:20:06] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:20:06] [PASSED] 0xA721 (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA720 (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:20:06] [PASSED] 0xA780 (ALDERLAKE_S)
[20:20:06] [PASSED] 0xA781 (ALDERLAKE_S)
[20:20:06] [PASSED] 0xA782 (ALDERLAKE_S)
[20:20:06] [PASSED] 0xA783 (ALDERLAKE_S)
[20:20:06] [PASSED] 0xA788 (ALDERLAKE_S)
[20:20:06] [PASSED] 0xA789 (ALDERLAKE_S)
[20:20:06] [PASSED] 0xA78A (ALDERLAKE_S)
[20:20:06] [PASSED] 0xA78B (ALDERLAKE_S)
[20:20:06] [PASSED] 0x4905 (DG1)
[20:20:06] [PASSED] 0x4906 (DG1)
[20:20:06] [PASSED] 0x4907 (DG1)
[20:20:06] [PASSED] 0x4908 (DG1)
[20:20:06] [PASSED] 0x4909 (DG1)
[20:20:06] [PASSED] 0x56C0 (DG2)
[20:20:06] [PASSED] 0x56C2 (DG2)
[20:20:06] [PASSED] 0x56C1 (DG2)
[20:20:06] [PASSED] 0x7D51 (METEORLAKE)
[20:20:06] [PASSED] 0x7DD1 (METEORLAKE)
[20:20:06] [PASSED] 0x7D41 (METEORLAKE)
[20:20:06] [PASSED] 0x7D67 (METEORLAKE)
[20:20:06] [PASSED] 0xB640 (METEORLAKE)
[20:20:06] [PASSED] 0x56A0 (DG2)
[20:20:06] [PASSED] 0x56A1 (DG2)
[20:20:06] [PASSED] 0x56A2 (DG2)
[20:20:06] [PASSED] 0x56BE (DG2)
[20:20:06] [PASSED] 0x56BF (DG2)
[20:20:06] [PASSED] 0x5690 (DG2)
[20:20:06] [PASSED] 0x5691 (DG2)
[20:20:06] [PASSED] 0x5692 (DG2)
[20:20:06] [PASSED] 0x56A5 (DG2)
[20:20:06] [PASSED] 0x56A6 (DG2)
[20:20:06] [PASSED] 0x56B0 (DG2)
[20:20:06] [PASSED] 0x56B1 (DG2)
[20:20:06] [PASSED] 0x56BA (DG2)
[20:20:06] [PASSED] 0x56BB (DG2)
[20:20:06] [PASSED] 0x56BC (DG2)
[20:20:06] [PASSED] 0x56BD (DG2)
[20:20:06] [PASSED] 0x5693 (DG2)
[20:20:06] [PASSED] 0x5694 (DG2)
[20:20:06] [PASSED] 0x5695 (DG2)
[20:20:06] [PASSED] 0x56A3 (DG2)
[20:20:06] [PASSED] 0x56A4 (DG2)
[20:20:06] [PASSED] 0x56B2 (DG2)
[20:20:06] [PASSED] 0x56B3 (DG2)
[20:20:06] [PASSED] 0x5696 (DG2)
[20:20:06] [PASSED] 0x5697 (DG2)
[20:20:06] [PASSED] 0xB69 (PVC)
[20:20:06] [PASSED] 0xB6E (PVC)
[20:20:06] [PASSED] 0xBD4 (PVC)
[20:20:06] [PASSED] 0xBD5 (PVC)
[20:20:06] [PASSED] 0xBD6 (PVC)
[20:20:06] [PASSED] 0xBD7 (PVC)
[20:20:06] [PASSED] 0xBD8 (PVC)
[20:20:06] [PASSED] 0xBD9 (PVC)
[20:20:06] [PASSED] 0xBDA (PVC)
[20:20:06] [PASSED] 0xBDB (PVC)
[20:20:06] [PASSED] 0xBE0 (PVC)
[20:20:06] [PASSED] 0xBE1 (PVC)
[20:20:06] [PASSED] 0xBE5 (PVC)
[20:20:06] [PASSED] 0x7D40 (METEORLAKE)
[20:20:06] [PASSED] 0x7D45 (METEORLAKE)
[20:20:06] [PASSED] 0x7D55 (METEORLAKE)
[20:20:06] [PASSED] 0x7D60 (METEORLAKE)
[20:20:06] [PASSED] 0x7DD5 (METEORLAKE)
[20:20:06] [PASSED] 0x6420 (LUNARLAKE)
[20:20:06] [PASSED] 0x64A0 (LUNARLAKE)
[20:20:06] [PASSED] 0x64B0 (LUNARLAKE)
[20:20:06] [PASSED] 0xE202 (BATTLEMAGE)
[20:20:06] [PASSED] 0xE209 (BATTLEMAGE)
[20:20:06] [PASSED] 0xE20B (BATTLEMAGE)
[20:20:06] [PASSED] 0xE20C (BATTLEMAGE)
[20:20:06] [PASSED] 0xE20D (BATTLEMAGE)
[20:20:06] [PASSED] 0xE210 (BATTLEMAGE)
[20:20:06] [PASSED] 0xE211 (BATTLEMAGE)
[20:20:06] [PASSED] 0xE212 (BATTLEMAGE)
[20:20:06] [PASSED] 0xE216 (BATTLEMAGE)
[20:20:06] [PASSED] 0xE220 (BATTLEMAGE)
[20:20:06] [PASSED] 0xE221 (BATTLEMAGE)
[20:20:06] [PASSED] 0xE222 (BATTLEMAGE)
[20:20:06] [PASSED] 0xE223 (BATTLEMAGE)
[20:20:06] [PASSED] 0xB080 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB081 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB082 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB083 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB084 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB085 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB086 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB087 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB08F (PANTHERLAKE)
[20:20:06] [PASSED] 0xB090 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:20:06] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:20:06] [PASSED] 0xFD80 (PANTHERLAKE)
[20:20:06] [PASSED] 0xFD81 (PANTHERLAKE)
[20:20:06] ============= [PASSED] check_platform_gt_count =============
[20:20:06] ===================== [PASSED] xe_pci ======================
[20:20:06] =================== xe_rtp (2 subtests) ====================
[20:20:06] =============== xe_rtp_process_to_sr_tests  ================
[20:20:06] [PASSED] coalesce-same-reg
[20:20:06] [PASSED] no-match-no-add
[20:20:06] [PASSED] match-or
[20:20:06] [PASSED] match-or-xfail
[20:20:06] [PASSED] no-match-no-add-multiple-rules
[20:20:06] [PASSED] two-regs-two-entries
[20:20:06] [PASSED] clr-one-set-other
[20:20:06] [PASSED] set-field
[20:20:06] [PASSED] conflict-duplicate
[20:20:06] [PASSED] conflict-not-disjoint
[20:20:06] [PASSED] conflict-reg-type
[20:20:06] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:20:06] ================== xe_rtp_process_tests  ===================
[20:20:06] [PASSED] active1
[20:20:06] [PASSED] active2
[20:20:06] [PASSED] active-inactive
[20:20:06] [PASSED] inactive-active
[20:20:06] [PASSED] inactive-1st_or_active-inactive
[20:20:06] [PASSED] inactive-2nd_or_active-inactive
[20:20:06] [PASSED] inactive-last_or_active-inactive
[20:20:06] [PASSED] inactive-no_or_active-inactive
[20:20:06] ============== [PASSED] xe_rtp_process_tests ===============
[20:20:06] ===================== [PASSED] xe_rtp ======================
[20:20:06] ==================== xe_wa (1 subtest) =====================
[20:20:06] ======================== xe_wa_gt  =========================
[20:20:06] [PASSED] TIGERLAKE B0
[20:20:06] [PASSED] DG1 A0
[20:20:06] [PASSED] DG1 B0
[20:20:06] [PASSED] ALDERLAKE_S A0
[20:20:06] [PASSED] ALDERLAKE_S B0
[20:20:06] [PASSED] ALDERLAKE_S C0
[20:20:06] [PASSED] ALDERLAKE_S D0
[20:20:06] [PASSED] ALDERLAKE_P A0
[20:20:06] [PASSED] ALDERLAKE_P B0
[20:20:06] [PASSED] ALDERLAKE_P C0
[20:20:06] [PASSED] ALDERLAKE_S RPLS D0
[20:20:06] [PASSED] ALDERLAKE_P RPLU E0
[20:20:06] [PASSED] DG2 G10 C0
[20:20:06] [PASSED] DG2 G11 B1
[20:20:06] [PASSED] DG2 G12 A1
[20:20:06] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:20:06] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:20:06] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[20:20:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
stty: 'standard input': Inappropriate ioctl for device
[20:20:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[20:20:06] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[20:20:06] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[20:20:06] ==================== [PASSED] xe_wa_gt =====================
[20:20:06] ====================== [PASSED] xe_wa ======================
[20:20:06] ============================================================
[20:20:06] Testing complete. Ran 298 tests: passed: 282, skipped: 16
[20:20:06] Elapsed time: 33.506s total, 4.262s configuring, 28.877s building, 0.320s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:20:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:20:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:20:30] Starting KUnit Kernel (1/1)...
[20:20:30] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:20:30] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:20:30] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:20:30] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:20:30] =========== drm_validate_clone_mode (2 subtests) ===========
[20:20:30] ============== drm_test_check_in_clone_mode  ===============
[20:20:30] [PASSED] in_clone_mode
[20:20:30] [PASSED] not_in_clone_mode
[20:20:30] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:20:30] =============== drm_test_check_valid_clones  ===============
[20:20:30] [PASSED] not_in_clone_mode
[20:20:30] [PASSED] valid_clone
[20:20:30] [PASSED] invalid_clone
[20:20:30] =========== [PASSED] drm_test_check_valid_clones ===========
[20:20:30] ============= [PASSED] drm_validate_clone_mode =============
[20:20:30] ============= drm_validate_modeset (1 subtest) =============
[20:20:30] [PASSED] drm_test_check_connector_changed_modeset
[20:20:30] ============== [PASSED] drm_validate_modeset ===============
[20:20:30] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:20:30] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:20:30] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:20:30] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:20:30] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:20:30] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:20:30] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:20:30] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:20:30] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:20:30] ============== drm_bridge_alloc (2 subtests) ===============
[20:20:30] [PASSED] drm_test_drm_bridge_alloc_basic
[20:20:30] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:20:30] ================ [PASSED] drm_bridge_alloc =================
[20:20:30] ================== drm_buddy (7 subtests) ==================
[20:20:30] [PASSED] drm_test_buddy_alloc_limit
[20:20:30] [PASSED] drm_test_buddy_alloc_optimistic
[20:20:30] [PASSED] drm_test_buddy_alloc_pessimistic
[20:20:30] [PASSED] drm_test_buddy_alloc_pathological
[20:20:30] [PASSED] drm_test_buddy_alloc_contiguous
[20:20:30] [PASSED] drm_test_buddy_alloc_clear
[20:20:30] [PASSED] drm_test_buddy_alloc_range_bias
[20:20:30] ==================== [PASSED] drm_buddy ====================
[20:20:30] ============= drm_cmdline_parser (40 subtests) =============
[20:20:30] [PASSED] drm_test_cmdline_force_d_only
[20:20:30] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:20:30] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:20:30] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:20:30] [PASSED] drm_test_cmdline_force_e_only
[20:20:30] [PASSED] drm_test_cmdline_res
[20:20:30] [PASSED] drm_test_cmdline_res_vesa
[20:20:30] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:20:30] [PASSED] drm_test_cmdline_res_rblank
[20:20:30] [PASSED] drm_test_cmdline_res_bpp
[20:20:30] [PASSED] drm_test_cmdline_res_refresh
[20:20:30] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:20:30] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:20:30] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:20:30] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:20:30] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:20:30] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:20:30] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:20:30] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:20:30] [PASSED] drm_test_cmdline_res_margins_force_on
[20:20:30] [PASSED] drm_test_cmdline_res_vesa_margins
[20:20:30] [PASSED] drm_test_cmdline_name
[20:20:30] [PASSED] drm_test_cmdline_name_bpp
[20:20:30] [PASSED] drm_test_cmdline_name_option
[20:20:30] [PASSED] drm_test_cmdline_name_bpp_option
[20:20:30] [PASSED] drm_test_cmdline_rotate_0
[20:20:30] [PASSED] drm_test_cmdline_rotate_90
[20:20:30] [PASSED] drm_test_cmdline_rotate_180
[20:20:30] [PASSED] drm_test_cmdline_rotate_270
[20:20:30] [PASSED] drm_test_cmdline_hmirror
[20:20:30] [PASSED] drm_test_cmdline_vmirror
[20:20:30] [PASSED] drm_test_cmdline_margin_options
[20:20:30] [PASSED] drm_test_cmdline_multiple_options
[20:20:30] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:20:30] [PASSED] drm_test_cmdline_extra_and_option
[20:20:30] [PASSED] drm_test_cmdline_freestanding_options
[20:20:30] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:20:30] [PASSED] drm_test_cmdline_panel_orientation
[20:20:30] ================ drm_test_cmdline_invalid  =================
[20:20:30] [PASSED] margin_only
[20:20:30] [PASSED] interlace_only
[20:20:30] [PASSED] res_missing_x
[20:20:30] [PASSED] res_missing_y
[20:20:30] [PASSED] res_bad_y
[20:20:30] [PASSED] res_missing_y_bpp
[20:20:30] [PASSED] res_bad_bpp
[20:20:30] [PASSED] res_bad_refresh
[20:20:30] [PASSED] res_bpp_refresh_force_on_off
[20:20:30] [PASSED] res_invalid_mode
[20:20:30] [PASSED] res_bpp_wrong_place_mode
[20:20:30] [PASSED] name_bpp_refresh
[20:20:30] [PASSED] name_refresh
[20:20:30] [PASSED] name_refresh_wrong_mode
[20:20:30] [PASSED] name_refresh_invalid_mode
[20:20:30] [PASSED] rotate_multiple
[20:20:30] [PASSED] rotate_invalid_val
[20:20:30] [PASSED] rotate_truncated
[20:20:30] [PASSED] invalid_option
[20:20:30] [PASSED] invalid_tv_option
[20:20:30] [PASSED] truncated_tv_option
[20:20:30] ============ [PASSED] drm_test_cmdline_invalid =============
[20:20:30] =============== drm_test_cmdline_tv_options  ===============
[20:20:30] [PASSED] NTSC
[20:20:30] [PASSED] NTSC_443
[20:20:30] [PASSED] NTSC_J
[20:20:30] [PASSED] PAL
[20:20:30] [PASSED] PAL_M
[20:20:30] [PASSED] PAL_N
[20:20:30] [PASSED] SECAM
[20:20:30] [PASSED] MONO_525
[20:20:30] [PASSED] MONO_625
[20:20:30] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:20:30] =============== [PASSED] drm_cmdline_parser ================
[20:20:30] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:20:30] [PASSED] drm_test_connector_hdmi_init_valid
[20:20:30] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:20:30] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:20:30] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:20:30] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:20:30] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:20:30] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:20:30] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:20:30] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[20:20:30] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:20:30] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:20:30] [PASSED] supported_formats=0x3 yuv420_allowed=1
[20:20:30] [PASSED] supported_formats=0x3 yuv420_allowed=0
[20:20:30] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:20:30] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:20:30] [PASSED] drm_test_connector_hdmi_init_null_product
[20:20:30] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:20:30] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:20:30] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:20:30] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:20:30] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:20:30] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:20:30] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:20:30] ========= drm_test_connector_hdmi_init_type_valid  =========
[20:20:30] [PASSED] HDMI-A
[20:20:30] [PASSED] HDMI-B
[20:20:30] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:20:30] ======== drm_test_connector_hdmi_init_type_invalid  ========
[20:20:30] [PASSED] Unknown
[20:20:30] [PASSED] VGA
[20:20:30] [PASSED] DVI-I
[20:20:30] [PASSED] DVI-D
[20:20:30] [PASSED] DVI-A
[20:20:30] [PASSED] Composite
[20:20:30] [PASSED] SVIDEO
[20:20:30] [PASSED] LVDS
[20:20:30] [PASSED] Component
[20:20:30] [PASSED] DIN
[20:20:30] [PASSED] DP
[20:20:30] [PASSED] TV
[20:20:30] [PASSED] eDP
[20:20:30] [PASSED] Virtual
[20:20:30] [PASSED] DSI
[20:20:30] [PASSED] DPI
[20:20:30] [PASSED] Writeback
[20:20:30] [PASSED] SPI
[20:20:30] [PASSED] USB
[20:20:30] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:20:30] ============ [PASSED] drmm_connector_hdmi_init =============
[20:20:30] ============= drmm_connector_init (3 subtests) =============
[20:20:30] [PASSED] drm_test_drmm_connector_init
[20:20:30] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:20:30] ========= drm_test_drmm_connector_init_type_valid  =========
[20:20:30] [PASSED] Unknown
[20:20:30] [PASSED] VGA
[20:20:30] [PASSED] DVI-I
[20:20:30] [PASSED] DVI-D
[20:20:30] [PASSED] DVI-A
[20:20:30] [PASSED] Composite
[20:20:30] [PASSED] SVIDEO
[20:20:30] [PASSED] LVDS
[20:20:30] [PASSED] Component
[20:20:30] [PASSED] DIN
[20:20:30] [PASSED] DP
[20:20:30] [PASSED] HDMI-A
[20:20:30] [PASSED] HDMI-B
[20:20:30] [PASSED] TV
[20:20:30] [PASSED] eDP
[20:20:30] [PASSED] Virtual
[20:20:30] [PASSED] DSI
[20:20:30] [PASSED] DPI
[20:20:30] [PASSED] Writeback
[20:20:30] [PASSED] SPI
[20:20:30] [PASSED] USB
[20:20:30] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:20:30] =============== [PASSED] drmm_connector_init ===============
[20:20:30] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_init
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:20:30] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[20:20:30] [PASSED] Unknown
[20:20:30] [PASSED] VGA
[20:20:30] [PASSED] DVI-I
[20:20:30] [PASSED] DVI-D
[20:20:30] [PASSED] DVI-A
[20:20:30] [PASSED] Composite
[20:20:30] [PASSED] SVIDEO
[20:20:30] [PASSED] LVDS
[20:20:30] [PASSED] Component
[20:20:30] [PASSED] DIN
[20:20:30] [PASSED] DP
[20:20:30] [PASSED] HDMI-A
[20:20:30] [PASSED] HDMI-B
[20:20:30] [PASSED] TV
[20:20:30] [PASSED] eDP
[20:20:30] [PASSED] Virtual
[20:20:30] [PASSED] DSI
[20:20:30] [PASSED] DPI
[20:20:30] [PASSED] Writeback
[20:20:30] [PASSED] SPI
[20:20:30] [PASSED] USB
[20:20:30] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:20:30] ======== drm_test_drm_connector_dynamic_init_name  =========
[20:20:30] [PASSED] Unknown
[20:20:30] [PASSED] VGA
[20:20:30] [PASSED] DVI-I
[20:20:30] [PASSED] DVI-D
[20:20:30] [PASSED] DVI-A
[20:20:30] [PASSED] Composite
[20:20:30] [PASSED] SVIDEO
[20:20:30] [PASSED] LVDS
[20:20:30] [PASSED] Component
[20:20:30] [PASSED] DIN
[20:20:30] [PASSED] DP
[20:20:30] [PASSED] HDMI-A
[20:20:30] [PASSED] HDMI-B
[20:20:30] [PASSED] TV
[20:20:30] [PASSED] eDP
[20:20:30] [PASSED] Virtual
[20:20:30] [PASSED] DSI
[20:20:30] [PASSED] DPI
[20:20:30] [PASSED] Writeback
[20:20:30] [PASSED] SPI
[20:20:30] [PASSED] USB
[20:20:30] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:20:30] =========== [PASSED] drm_connector_dynamic_init ============
[20:20:30] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:20:30] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:20:30] ======= drm_connector_dynamic_register (7 subtests) ========
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:20:30] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:20:30] ========= [PASSED] drm_connector_dynamic_register ==========
[20:20:30] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:20:30] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:20:30] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:20:30] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:20:30] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:20:30] ========== drm_test_get_tv_mode_from_name_valid  ===========
[20:20:30] [PASSED] NTSC
[20:20:30] [PASSED] NTSC-443
[20:20:30] [PASSED] NTSC-J
[20:20:30] [PASSED] PAL
[20:20:30] [PASSED] PAL-M
[20:20:30] [PASSED] PAL-N
[20:20:30] [PASSED] SECAM
[20:20:30] [PASSED] Mono
[20:20:30] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:20:30] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:20:30] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:20:30] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:20:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:20:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:20:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:20:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:20:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:20:30] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:20:30] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[20:20:30] [PASSED] VIC 96
[20:20:30] [PASSED] VIC 97
[20:20:30] [PASSED] VIC 101
[20:20:30] [PASSED] VIC 102
[20:20:30] [PASSED] VIC 106
[20:20:30] [PASSED] VIC 107
[20:20:30] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:20:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:20:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:20:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:20:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:20:30] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:20:30] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:20:30] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:20:30] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[20:20:30] [PASSED] Automatic
[20:20:30] [PASSED] Full
[20:20:30] [PASSED] Limited 16:235
[20:20:30] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:20:30] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:20:30] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:20:30] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:20:30] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[20:20:30] [PASSED] RGB
[20:20:30] [PASSED] YUV 4:2:0
[20:20:30] [PASSED] YUV 4:2:2
[20:20:30] [PASSED] YUV 4:4:4
[20:20:30] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:20:30] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:20:30] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:20:30] ============= drm_damage_helper (21 subtests) ==============
[20:20:30] [PASSED] drm_test_damage_iter_no_damage
[20:20:30] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:20:30] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:20:30] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:20:30] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:20:30] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:20:30] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:20:30] [PASSED] drm_test_damage_iter_simple_damage
[20:20:30] [PASSED] drm_test_damage_iter_single_damage
[20:20:30] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:20:30] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:20:30] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:20:30] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:20:30] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:20:30] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:20:30] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:20:30] [PASSED] drm_test_damage_iter_damage
[20:20:30] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:20:30] [PASSED] drm_test_damage_iter_damage_one_outside
[20:20:30] [PASSED] drm_test_damage_iter_damage_src_moved
[20:20:30] [PASSED] drm_test_damage_iter_damage_not_visible
[20:20:30] ================ [PASSED] drm_damage_helper ================
[20:20:30] ============== drm_dp_mst_helper (3 subtests) ==============
[20:20:30] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[20:20:30] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:20:30] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:20:30] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:20:30] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:20:30] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:20:30] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:20:30] ============== drm_test_dp_mst_calc_pbn_div  ===============
[20:20:30] [PASSED] Link rate 2000000 lane count 4
[20:20:30] [PASSED] Link rate 2000000 lane count 2
[20:20:30] [PASSED] Link rate 2000000 lane count 1
[20:20:30] [PASSED] Link rate 1350000 lane count 4
[20:20:30] [PASSED] Link rate 1350000 lane count 2
[20:20:30] [PASSED] Link rate 1350000 lane count 1
[20:20:30] [PASSED] Link rate 1000000 lane count 4
[20:20:30] [PASSED] Link rate 1000000 lane count 2
[20:20:30] [PASSED] Link rate 1000000 lane count 1
[20:20:30] [PASSED] Link rate 810000 lane count 4
[20:20:30] [PASSED] Link rate 810000 lane count 2
[20:20:30] [PASSED] Link rate 810000 lane count 1
[20:20:30] [PASSED] Link rate 540000 lane count 4
[20:20:30] [PASSED] Link rate 540000 lane count 2
[20:20:30] [PASSED] Link rate 540000 lane count 1
[20:20:30] [PASSED] Link rate 270000 lane count 4
[20:20:30] [PASSED] Link rate 270000 lane count 2
[20:20:30] [PASSED] Link rate 270000 lane count 1
[20:20:30] [PASSED] Link rate 162000 lane count 4
[20:20:30] [PASSED] Link rate 162000 lane count 2
[20:20:30] [PASSED] Link rate 162000 lane count 1
[20:20:30] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:20:30] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[20:20:30] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:20:30] [PASSED] DP_POWER_UP_PHY with port number
[20:20:30] [PASSED] DP_POWER_DOWN_PHY with port number
[20:20:30] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:20:30] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:20:30] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:20:30] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:20:30] [PASSED] DP_QUERY_PAYLOAD with port number
[20:20:30] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:20:30] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:20:30] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:20:30] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:20:30] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:20:30] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:20:30] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:20:30] [PASSED] DP_REMOTE_I2C_READ with port number
[20:20:30] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:20:30] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:20:30] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:20:30] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:20:30] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:20:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:20:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:20:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:20:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:20:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:20:30] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:20:30] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:20:30] ================ [PASSED] drm_dp_mst_helper ================
[20:20:30] ================== drm_exec (7 subtests) ===================
[20:20:30] [PASSED] sanitycheck
[20:20:30] [PASSED] test_lock
[20:20:30] [PASSED] test_lock_unlock
[20:20:30] [PASSED] test_duplicates
[20:20:30] [PASSED] test_prepare
[20:20:30] [PASSED] test_prepare_array
[20:20:30] [PASSED] test_multiple_loops
[20:20:30] ==================== [PASSED] drm_exec =====================
[20:20:30] =========== drm_format_helper_test (17 subtests) ===========
[20:20:30] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:20:30] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:20:30] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:20:30] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:20:30] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:20:30] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:20:30] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:20:30] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:20:30] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:20:30] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:20:30] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:20:30] ============== drm_test_fb_xrgb8888_to_mono  ===============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:20:30] ==================== drm_test_fb_swab  =====================
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ================ [PASSED] drm_test_fb_swab =================
[20:20:30] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:20:30] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[20:20:30] [PASSED] single_pixel_source_buffer
[20:20:30] [PASSED] single_pixel_clip_rectangle
[20:20:30] [PASSED] well_known_colors
[20:20:30] [PASSED] destination_pitch
[20:20:30] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:20:30] ================= drm_test_fb_clip_offset  =================
[20:20:30] [PASSED] pass through
[20:20:30] [PASSED] horizontal offset
[20:20:30] [PASSED] vertical offset
[20:20:30] [PASSED] horizontal and vertical offset
[20:20:30] [PASSED] horizontal offset (custom pitch)
[20:20:30] [PASSED] vertical offset (custom pitch)
[20:20:30] [PASSED] horizontal and vertical offset (custom pitch)
[20:20:30] ============= [PASSED] drm_test_fb_clip_offset =============
[20:20:30] =================== drm_test_fb_memcpy  ====================
[20:20:30] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:20:30] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:20:30] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:20:30] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:20:30] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:20:30] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:20:30] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:20:30] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:20:30] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:20:30] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:20:30] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:20:30] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:20:30] =============== [PASSED] drm_test_fb_memcpy ================
[20:20:30] ============= [PASSED] drm_format_helper_test ==============
[20:20:30] ================= drm_format (18 subtests) =================
[20:20:30] [PASSED] drm_test_format_block_width_invalid
[20:20:30] [PASSED] drm_test_format_block_width_one_plane
[20:20:30] [PASSED] drm_test_format_block_width_two_plane
[20:20:30] [PASSED] drm_test_format_block_width_three_plane
[20:20:30] [PASSED] drm_test_format_block_width_tiled
[20:20:30] [PASSED] drm_test_format_block_height_invalid
[20:20:30] [PASSED] drm_test_format_block_height_one_plane
[20:20:30] [PASSED] drm_test_format_block_height_two_plane
[20:20:30] [PASSED] drm_test_format_block_height_three_plane
[20:20:30] [PASSED] drm_test_format_block_height_tiled
[20:20:30] [PASSED] drm_test_format_min_pitch_invalid
[20:20:30] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:20:30] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:20:30] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:20:30] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:20:30] [PASSED] drm_test_format_min_pitch_two_plane
[20:20:30] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:20:30] [PASSED] drm_test_format_min_pitch_tiled
[20:20:30] =================== [PASSED] drm_format ====================
[20:20:30] ============== drm_framebuffer (10 subtests) ===============
[20:20:30] ========== drm_test_framebuffer_check_src_coords  ==========
[20:20:30] [PASSED] Success: source fits into fb
[20:20:30] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:20:30] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:20:30] [PASSED] Fail: overflowing fb with source width
[20:20:30] [PASSED] Fail: overflowing fb with source height
[20:20:30] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:20:30] [PASSED] drm_test_framebuffer_cleanup
[20:20:30] =============== drm_test_framebuffer_create  ===============
[20:20:30] [PASSED] ABGR8888 normal sizes
[20:20:30] [PASSED] ABGR8888 max sizes
[20:20:30] [PASSED] ABGR8888 pitch greater than min required
[20:20:30] [PASSED] ABGR8888 pitch less than min required
[20:20:30] [PASSED] ABGR8888 Invalid width
[20:20:30] [PASSED] ABGR8888 Invalid buffer handle
[20:20:30] [PASSED] No pixel format
[20:20:30] [PASSED] ABGR8888 Width 0
[20:20:30] [PASSED] ABGR8888 Height 0
[20:20:30] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:20:30] [PASSED] ABGR8888 Large buffer offset
[20:20:30] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:20:30] [PASSED] ABGR8888 Invalid flag
[20:20:30] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:20:30] [PASSED] ABGR8888 Valid buffer modifier
[20:20:30] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:20:30] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:20:30] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:20:30] [PASSED] NV12 Normal sizes
[20:20:30] [PASSED] NV12 Max sizes
[20:20:30] [PASSED] NV12 Invalid pitch
[20:20:30] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:20:30] [PASSED] NV12 different  modifier per-plane
[20:20:30] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:20:30] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:20:30] [PASSED] NV12 Modifier for inexistent plane
[20:20:30] [PASSED] NV12 Handle for inexistent plane
[20:20:30] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:20:30] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:20:30] [PASSED] YVU420 Normal sizes
[20:20:30] [PASSED] YVU420 Max sizes
[20:20:30] [PASSED] YVU420 Invalid pitch
[20:20:30] [PASSED] YVU420 Different pitches
[20:20:30] [PASSED] YVU420 Different buffer offsets/pitches
[20:20:30] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:20:30] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:20:30] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:20:30] [PASSED] YVU420 Valid modifier
[20:20:30] [PASSED] YVU420 Different modifiers per plane
[20:20:30] [PASSED] YVU420 Modifier for inexistent plane
[20:20:30] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:20:30] [PASSED] X0L2 Normal sizes
[20:20:30] [PASSED] X0L2 Max sizes
[20:20:30] [PASSED] X0L2 Invalid pitch
[20:20:30] [PASSED] X0L2 Pitch greater than minimum required
[20:20:30] [PASSED] X0L2 Handle for inexistent plane
[20:20:30] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:20:30] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:20:30] [PASSED] X0L2 Valid modifier
[20:20:30] [PASSED] X0L2 Modifier for inexistent plane
[20:20:30] =========== [PASSED] drm_test_framebuffer_create ===========
[20:20:30] [PASSED] drm_test_framebuffer_free
[20:20:30] [PASSED] drm_test_framebuffer_init
[20:20:30] [PASSED] drm_test_framebuffer_init_bad_format
[20:20:30] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:20:30] [PASSED] drm_test_framebuffer_lookup
[20:20:30] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:20:30] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:20:30] ================= [PASSED] drm_framebuffer =================
[20:20:30] ================ drm_gem_shmem (8 subtests) ================
[20:20:30] [PASSED] drm_gem_shmem_test_obj_create
[20:20:30] [PASSED] drm_gem_shmem_test_obj_create_private
[20:20:30] [PASSED] drm_gem_shmem_test_pin_pages
[20:20:30] [PASSED] drm_gem_shmem_test_vmap
[20:20:30] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:20:30] [PASSED] drm_gem_shmem_test_get_sg_table
[20:20:30] [PASSED] drm_gem_shmem_test_madvise
[20:20:30] [PASSED] drm_gem_shmem_test_purge
[20:20:30] ================== [PASSED] drm_gem_shmem ==================
[20:20:30] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:20:30] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:20:30] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:20:30] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:20:30] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:20:30] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:20:30] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:20:30] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[20:20:30] [PASSED] Automatic
[20:20:30] [PASSED] Full
[20:20:30] [PASSED] Limited 16:235
[20:20:30] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:20:30] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:20:30] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:20:30] [PASSED] drm_test_check_disable_connector
[20:20:30] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:20:30] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:20:30] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:20:30] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:20:30] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:20:30] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:20:30] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:20:30] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:20:30] [PASSED] drm_test_check_output_bpc_dvi
[20:20:30] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:20:30] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:20:30] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:20:30] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:20:30] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:20:30] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:20:30] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:20:30] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:20:30] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:20:30] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:20:30] [PASSED] drm_test_check_broadcast_rgb_value
[20:20:30] [PASSED] drm_test_check_bpc_8_value
[20:20:30] [PASSED] drm_test_check_bpc_10_value
[20:20:30] [PASSED] drm_test_check_bpc_12_value
[20:20:30] [PASSED] drm_test_check_format_value
[20:20:30] [PASSED] drm_test_check_tmds_char_value
[20:20:30] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:20:30] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:20:30] [PASSED] drm_test_check_mode_valid
[20:20:30] [PASSED] drm_test_check_mode_valid_reject
[20:20:30] [PASSED] drm_test_check_mode_valid_reject_rate
[20:20:30] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:20:30] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:20:30] ================= drm_managed (2 subtests) =================
[20:20:30] [PASSED] drm_test_managed_release_action
[20:20:30] [PASSED] drm_test_managed_run_action
[20:20:30] =================== [PASSED] drm_managed ===================
[20:20:30] =================== drm_mm (6 subtests) ====================
[20:20:30] [PASSED] drm_test_mm_init
[20:20:30] [PASSED] drm_test_mm_debug
[20:20:30] [PASSED] drm_test_mm_align32
[20:20:30] [PASSED] drm_test_mm_align64
[20:20:30] [PASSED] drm_test_mm_lowest
[20:20:30] [PASSED] drm_test_mm_highest
[20:20:30] ===================== [PASSED] drm_mm ======================
[20:20:30] ============= drm_modes_analog_tv (5 subtests) =============
[20:20:30] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:20:30] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:20:30] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:20:30] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:20:30] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:20:30] =============== [PASSED] drm_modes_analog_tv ===============
[20:20:30] ============== drm_plane_helper (2 subtests) ===============
[20:20:30] =============== drm_test_check_plane_state  ================
[20:20:30] [PASSED] clipping_simple
[20:20:30] [PASSED] clipping_rotate_reflect
[20:20:30] [PASSED] positioning_simple
[20:20:30] [PASSED] upscaling
[20:20:30] [PASSED] downscaling
[20:20:30] [PASSED] rounding1
[20:20:30] [PASSED] rounding2
[20:20:30] [PASSED] rounding3
[20:20:30] [PASSED] rounding4
[20:20:30] =========== [PASSED] drm_test_check_plane_state ============
[20:20:30] =========== drm_test_check_invalid_plane_state  ============
[20:20:30] [PASSED] positioning_invalid
[20:20:30] [PASSED] upscaling_invalid
[20:20:30] [PASSED] downscaling_invalid
[20:20:30] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:20:30] ================ [PASSED] drm_plane_helper =================
[20:20:30] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:20:30] ====== drm_test_connector_helper_tv_get_modes_check  =======
[20:20:30] [PASSED] None
[20:20:30] [PASSED] PAL
[20:20:30] [PASSED] NTSC
[20:20:30] [PASSED] Both, NTSC Default
[20:20:30] [PASSED] Both, PAL Default
[20:20:30] [PASSED] Both, NTSC Default, with PAL on command-line
[20:20:30] [PASSED] Both, PAL Default, with NTSC on command-line
[20:20:30] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:20:30] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:20:30] ================== drm_rect (9 subtests) ===================
[20:20:30] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:20:30] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:20:30] [PASSED] drm_test_rect_clip_scaled_clipped
[20:20:30] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:20:30] ================= drm_test_rect_intersect  =================
[20:20:30] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:20:30] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:20:30] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:20:30] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:20:30] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:20:30] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:20:30] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:20:30] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:20:30] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:20:30] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:20:30] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:20:30] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:20:30] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:20:30] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:20:30] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:20:30] ============= [PASSED] drm_test_rect_intersect =============
[20:20:30] ================ drm_test_rect_calc_hscale  ================
[20:20:30] [PASSED] normal use
[20:20:30] [PASSED] out of max range
[20:20:30] [PASSED] out of min range
[20:20:30] [PASSED] zero dst
[20:20:30] [PASSED] negative src
[20:20:30] [PASSED] negative dst
[20:20:30] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:20:30] ================ drm_test_rect_calc_vscale  ================
[20:20:30] [PASSED] normal use
[20:20:30] [PASSED] out of max range
[20:20:30] [PASSED] out of min range
[20:20:30] [PASSED] zero dst
[20:20:30] [PASSED] negative src
[20:20:30] [PASSED] negative dst
[20:20:30] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:20:30] ================== drm_test_rect_rotate  ===================
[20:20:30] [PASSED] reflect-x
[20:20:30] [PASSED] reflect-y
[20:20:30] [PASSED] rotate-0
[20:20:30] [PASSED] rotate-90
[20:20:30] [PASSED] rotate-180
[20:20:30] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[20:20:30] ============== [PASSED] drm_test_rect_rotate ===============
[20:20:30] ================ drm_test_rect_rotate_inv  =================
[20:20:30] [PASSED] reflect-x
[20:20:30] [PASSED] reflect-y
[20:20:30] [PASSED] rotate-0
[20:20:30] [PASSED] rotate-90
[20:20:30] [PASSED] rotate-180
[20:20:30] [PASSED] rotate-270
[20:20:30] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:20:30] ==================== [PASSED] drm_rect =====================
[20:20:30] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:20:30] ============ drm_test_sysfb_build_fourcc_list  =============
[20:20:30] [PASSED] no native formats
[20:20:30] [PASSED] XRGB8888 as native format
[20:20:30] [PASSED] remove duplicates
[20:20:30] [PASSED] convert alpha formats
[20:20:30] [PASSED] random formats
[20:20:30] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:20:30] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:20:30] ============================================================
[20:20:30] Testing complete. Ran 616 tests: passed: 616
[20:20:30] Elapsed time: 24.573s total, 1.694s configuring, 22.659s building, 0.197s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[20:20:31] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:20:32] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:20:40] Starting KUnit Kernel (1/1)...
[20:20:40] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:20:40] ================= ttm_device (5 subtests) ==================
[20:20:40] [PASSED] ttm_device_init_basic
[20:20:40] [PASSED] ttm_device_init_multiple
[20:20:40] [PASSED] ttm_device_fini_basic
[20:20:40] [PASSED] ttm_device_init_no_vma_man
[20:20:40] ================== ttm_device_init_pools  ==================
[20:20:40] [PASSED] No DMA allocations, no DMA32 required
[20:20:40] [PASSED] DMA allocations, DMA32 required
[20:20:40] [PASSED] No DMA allocations, DMA32 required
[20:20:40] [PASSED] DMA allocations, no DMA32 required
[20:20:40] ============== [PASSED] ttm_device_init_pools ==============
[20:20:40] =================== [PASSED] ttm_device ====================
[20:20:40] ================== ttm_pool (8 subtests) ===================
[20:20:40] ================== ttm_pool_alloc_basic  ===================
[20:20:40] [PASSED] One page
[20:20:40] [PASSED] More than one page
[20:20:40] [PASSED] Above the allocation limit
[20:20:40] [PASSED] One page, with coherent DMA mappings enabled
[20:20:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:20:40] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:20:40] ============== ttm_pool_alloc_basic_dma_addr  ==============
[20:20:40] [PASSED] One page
[20:20:40] [PASSED] More than one page
[20:20:40] [PASSED] Above the allocation limit
[20:20:40] [PASSED] One page, with coherent DMA mappings enabled
[20:20:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:20:40] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:20:40] [PASSED] ttm_pool_alloc_order_caching_match
[20:20:40] [PASSED] ttm_pool_alloc_caching_mismatch
[20:20:40] [PASSED] ttm_pool_alloc_order_mismatch
[20:20:40] [PASSED] ttm_pool_free_dma_alloc
[20:20:40] [PASSED] ttm_pool_free_no_dma_alloc
[20:20:40] [PASSED] ttm_pool_fini_basic
[20:20:40] ==================== [PASSED] ttm_pool =====================
[20:20:40] ================ ttm_resource (8 subtests) =================
[20:20:40] ================= ttm_resource_init_basic  =================
[20:20:40] [PASSED] Init resource in TTM_PL_SYSTEM
[20:20:40] [PASSED] Init resource in TTM_PL_VRAM
[20:20:40] [PASSED] Init resource in a private placement
[20:20:40] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[20:20:40] ============= [PASSED] ttm_resource_init_basic =============
[20:20:40] [PASSED] ttm_resource_init_pinned
[20:20:40] [PASSED] ttm_resource_fini_basic
[20:20:40] [PASSED] ttm_resource_manager_init_basic
[20:20:40] [PASSED] ttm_resource_manager_usage_basic
[20:20:40] [PASSED] ttm_resource_manager_set_used_basic
[20:20:40] [PASSED] ttm_sys_man_alloc_basic
[20:20:40] [PASSED] ttm_sys_man_free_basic
[20:20:40] ================== [PASSED] ttm_resource ===================
[20:20:40] =================== ttm_tt (15 subtests) ===================
[20:20:40] ==================== ttm_tt_init_basic  ====================
[20:20:40] [PASSED] Page-aligned size
[20:20:40] [PASSED] Extra pages requested
[20:20:40] ================ [PASSED] ttm_tt_init_basic ================
[20:20:40] [PASSED] ttm_tt_init_misaligned
[20:20:40] [PASSED] ttm_tt_fini_basic
[20:20:40] [PASSED] ttm_tt_fini_sg
[20:20:40] [PASSED] ttm_tt_fini_shmem
[20:20:40] [PASSED] ttm_tt_create_basic
[20:20:40] [PASSED] ttm_tt_create_invalid_bo_type
[20:20:40] [PASSED] ttm_tt_create_ttm_exists
[20:20:40] [PASSED] ttm_tt_create_failed
[20:20:40] [PASSED] ttm_tt_destroy_basic
[20:20:40] [PASSED] ttm_tt_populate_null_ttm
[20:20:40] [PASSED] ttm_tt_populate_populated_ttm
[20:20:40] [PASSED] ttm_tt_unpopulate_basic
[20:20:40] [PASSED] ttm_tt_unpopulate_empty_ttm
[20:20:40] [PASSED] ttm_tt_swapin_basic
[20:20:40] ===================== [PASSED] ttm_tt ======================
[20:20:40] =================== ttm_bo (14 subtests) ===================
[20:20:40] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[20:20:40] [PASSED] Cannot be interrupted and sleeps
[20:20:40] [PASSED] Cannot be interrupted, locks straight away
[20:20:40] [PASSED] Can be interrupted, sleeps
[20:20:40] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[20:20:40] [PASSED] ttm_bo_reserve_locked_no_sleep
[20:20:40] [PASSED] ttm_bo_reserve_no_wait_ticket
[20:20:40] [PASSED] ttm_bo_reserve_double_resv
[20:20:40] [PASSED] ttm_bo_reserve_interrupted
[20:20:40] [PASSED] ttm_bo_reserve_deadlock
[20:20:40] [PASSED] ttm_bo_unreserve_basic
[20:20:40] [PASSED] ttm_bo_unreserve_pinned
[20:20:40] [PASSED] ttm_bo_unreserve_bulk
[20:20:40] [PASSED] ttm_bo_put_basic
[20:20:40] [PASSED] ttm_bo_put_shared_resv
[20:20:40] [PASSED] ttm_bo_pin_basic
[20:20:40] [PASSED] ttm_bo_pin_unpin_resource
[20:20:40] [PASSED] ttm_bo_multiple_pin_one_unpin
[20:20:40] ===================== [PASSED] ttm_bo ======================
[20:20:40] ============== ttm_bo_validate (21 subtests) ===============
[20:20:40] ============== ttm_bo_init_reserved_sys_man  ===============
[20:20:40] [PASSED] Buffer object for userspace
[20:20:40] [PASSED] Kernel buffer object
[20:20:40] [PASSED] Shared buffer object
[20:20:40] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[20:20:40] ============== ttm_bo_init_reserved_mock_man  ==============
[20:20:40] [PASSED] Buffer object for userspace
[20:20:40] [PASSED] Kernel buffer object
[20:20:40] [PASSED] Shared buffer object
[20:20:40] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[20:20:40] [PASSED] ttm_bo_init_reserved_resv
[20:20:40] ================== ttm_bo_validate_basic  ==================
[20:20:40] [PASSED] Buffer object for userspace
[20:20:40] [PASSED] Kernel buffer object
[20:20:40] [PASSED] Shared buffer object
[20:20:40] ============== [PASSED] ttm_bo_validate_basic ==============
[20:20:40] [PASSED] ttm_bo_validate_invalid_placement
[20:20:40] ============= ttm_bo_validate_same_placement  ==============
[20:20:40] [PASSED] System manager
[20:20:40] [PASSED] VRAM manager
[20:20:40] ========= [PASSED] ttm_bo_validate_same_placement ==========
[20:20:40] [PASSED] ttm_bo_validate_failed_alloc
[20:20:40] [PASSED] ttm_bo_validate_pinned
[20:20:40] [PASSED] ttm_bo_validate_busy_placement
[20:20:40] ================ ttm_bo_validate_multihop  =================
[20:20:40] [PASSED] Buffer object for userspace
[20:20:40] [PASSED] Kernel buffer object
[20:20:40] [PASSED] Shared buffer object
[20:20:40] ============ [PASSED] ttm_bo_validate_multihop =============
[20:20:40] ========== ttm_bo_validate_no_placement_signaled  ==========
[20:20:40] [PASSED] Buffer object in system domain, no page vector
[20:20:40] [PASSED] Buffer object in system domain with an existing page vector
[20:20:40] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[20:20:40] ======== ttm_bo_validate_no_placement_not_signaled  ========
[20:20:40] [PASSED] Buffer object for userspace
[20:20:40] [PASSED] Kernel buffer object
[20:20:40] [PASSED] Shared buffer object
[20:20:40] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[20:20:40] [PASSED] ttm_bo_validate_move_fence_signaled
[20:20:40] ========= ttm_bo_validate_move_fence_not_signaled  =========
[20:20:40] [PASSED] Waits for GPU
[20:20:40] [PASSED] Tries to lock straight away
[20:20:40] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[20:20:40] [PASSED] ttm_bo_validate_happy_evict
[20:20:40] [PASSED] ttm_bo_validate_all_pinned_evict
[20:20:40] [PASSED] ttm_bo_validate_allowed_only_evict
[20:20:40] [PASSED] ttm_bo_validate_deleted_evict
[20:20:40] [PASSED] ttm_bo_validate_busy_domain_evict
[20:20:40] [PASSED] ttm_bo_validate_evict_gutting
[20:20:40] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[20:20:40] ================= [PASSED] ttm_bo_validate =================
[20:20:40] ============================================================
[20:20:40] Testing complete. Ran 101 tests: passed: 101
[20:20:40] Elapsed time: 9.869s total, 1.725s configuring, 7.927s building, 0.185s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe: Add user commands to WA BB via configfs

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 917 bytes --]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/154420/
State : success

== Summary ==

CI Bug Log - changes from xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb_BAT -> xe-pw-154420v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * IGT: IGT_8535 -> IGT_8536
  * Linux: xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb -> xe-pw-154420v1

  IGT_8535: 8535
  IGT_8536: 8536
  xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb: a433a14cc397ef049ef273a3d4404d46a20a28cb
  xe-pw-154420v1: 154420v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/index.html

[-- Attachment #2: Type: text/html, Size: 1479 bytes --]

✗ Xe.CI.Full: failure for drm/xe: Add user commands to WA BB via configfs

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 80769 bytes --]

== Series Details ==

Series: drm/xe: Add user commands to WA BB via configfs
URL   : https://patchwork.freedesktop.org/series/154420/
State : failure

== Summary ==

CI Bug Log - changes from xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb_FULL -> xe-pw-154420v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-154420v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-154420v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-154420v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_pm_rpm@basic-rte:
    - shard-adlp:         NOTRUN -> [ABORT][1] +14 other tests abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-8/igt@kms_pm_rpm@basic-rte.html

  * igt@kms_pm_rpm@i2c:
    - shard-bmg:          NOTRUN -> [ABORT][2] +14 other tests abort
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-5/igt@kms_pm_rpm@i2c.html

  * igt@kms_pm_rpm@legacy-planes-dpms@plane-43:
    - shard-lnl:          NOTRUN -> [ABORT][3] +16 other tests abort
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_pm_rpm@legacy-planes-dpms@plane-43.html

  * igt@kms_pm_rpm@modeset-non-lpsp:
    - shard-dg2-set2:     NOTRUN -> [ABORT][4]
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@xe_exec_threads@threads-cm-shared-vm-basic:
    - shard-adlp:         NOTRUN -> [FAIL][5]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@xe_exec_threads@threads-cm-shared-vm-basic.html
    - shard-bmg:          NOTRUN -> [FAIL][6]
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@xe_exec_threads@threads-cm-shared-vm-basic.html

  
Known issues
------------

  Here are the changes found in xe-pw-154420v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-dg2-set2:     NOTRUN -> [SKIP][7] ([Intel XE#623])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-b-hdmi-a-1-y:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][8] ([Intel XE#4543]) +3 other tests dmesg-warn
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-3/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-b-hdmi-a-1-y.html

  * igt@kms_async_flips@test-cursor-atomic:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#664])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_async_flips@test-cursor-atomic.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2370])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2327]) +6 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-addfb:
    - shard-adlp:         NOTRUN -> [SKIP][12] ([Intel XE#619]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_big_fb@4-tiled-addfb.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#3658])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-adlp:         NOTRUN -> [SKIP][14] ([Intel XE#1124]) +14 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#1407]) +10 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][16] ([Intel XE#316]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#1124]) +14 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html
    - shard-adlp:         NOTRUN -> [SKIP][18] ([Intel XE#316]) +8 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-8/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#610])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#1428])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-adlp:         NOTRUN -> [DMESG-FAIL][21] ([Intel XE#4543]) +2 other tests dmesg-fail
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2328])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-3/igt@kms_big_fb@yf-tiled-addfb.html
    - shard-lnl:          NOTRUN -> [SKIP][23] ([Intel XE#1467])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-5/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][24] ([Intel XE#1124]) +1 other test skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#1124]) +12 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
    - shard-adlp:         NOTRUN -> [SKIP][26] ([Intel XE#2191]) +3 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#2191]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_bw@connected-linear-tiling-2-displays-2160x1440p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#1512]) +2 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-7/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#367]) +4 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
    - shard-adlp:         NOTRUN -> [SKIP][31] ([Intel XE#367]) +5 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-9/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-2560x1440p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][32] ([Intel XE#367])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_bw@linear-tiling-3-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-3840x2160p:
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#367]) +2 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_bw@linear-tiling-3-displays-3840x2160p.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#2669]) +7 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#2887]) +28 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-d-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][36] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-d-dp-2.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][37] ([Intel XE#787]) +27 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][38] ([Intel XE#455] / [Intel XE#787]) +67 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][39] ([Intel XE#3442])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-9/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][40] ([Intel XE#3442])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#2669] / [Intel XE#3433]) +3 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#3432]) +2 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#3432]) +2 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2652] / [Intel XE#787]) +21 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][45] ([Intel XE#2907]) +2 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][46] ([Intel XE#787]) +101 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-8/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2887]) +30 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-adlp:         NOTRUN -> [SKIP][48] ([Intel XE#4418])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-6/igt@kms_cdclk@mode-transition-all-outputs.html
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2724])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_cdclk@mode-transition-all-outputs.html
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#4418])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_audio@dp-audio:
    - shard-dg2-set2:     NOTRUN -> [SKIP][51] ([Intel XE#373]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_chamelium_audio@dp-audio.html

  * igt@kms_chamelium_color@ctm-blue-to-red:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#306]) +3 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_chamelium_color@ctm-blue-to-red.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-adlp:         NOTRUN -> [SKIP][53] ([Intel XE#306]) +4 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_chamelium_color@ctm-red-to-blue.html
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2325]) +4 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-8/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_edid@dp-edid-resolution-list:
    - shard-adlp:         NOTRUN -> [SKIP][55] ([Intel XE#373]) +14 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_chamelium_edid@dp-edid-resolution-list.html
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#2252]) +15 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_chamelium_edid@dp-edid-resolution-list.html

  * igt@kms_chamelium_hpd@vga-hpd:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#373]) +14 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_chamelium_hpd@vga-hpd.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#3278]) +2 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-5/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#307]) +1 other test skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-7/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#2390]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@kms_content_protection@dp-mst-lic-type-1.html
    - shard-adlp:         NOTRUN -> [SKIP][61] ([Intel XE#307]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-adlp:         NOTRUN -> [SKIP][62] ([Intel XE#455]) +45 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_content_protection@legacy.html
    - shard-bmg:          NOTRUN -> [FAIL][63] ([Intel XE#1178]) +5 other tests fail
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_content_protection@legacy.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#2320]) +8 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-7/igt@kms_cursor_crc@cursor-offscreen-256x85.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#2321]) +1 other test skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#2321]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_cursor_crc@cursor-random-512x170.html
    - shard-adlp:         NOTRUN -> [SKIP][67] ([Intel XE#308]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-9/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-lnl:          NOTRUN -> [SKIP][68] ([Intel XE#1424]) +8 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
    - shard-lnl:          NOTRUN -> [SKIP][69] ([Intel XE#309]) +10 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][70] ([Intel XE#5354])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-adlp:         NOTRUN -> [SKIP][71] ([Intel XE#309]) +9 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][72] -> [FAIL][73] ([Intel XE#4633])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-lnl:          NOTRUN -> [SKIP][74] ([Intel XE#323]) +1 other test skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
    - shard-adlp:         NOTRUN -> [SKIP][75] ([Intel XE#323]) +1 other test skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#2286]) +1 other test skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#1508])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dp_aux_dev:
    - shard-adlp:         NOTRUN -> [SKIP][78] ([Intel XE#3009])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_dp_aux_dev.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-dg2-set2:     NOTRUN -> [SKIP][79] ([Intel XE#4354])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_dp_link_training@non-uhbr-mst.html
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#4354])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_dp_link_training@non-uhbr-mst.html
    - shard-adlp:         NOTRUN -> [SKIP][81] ([Intel XE#4354])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-9/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-adlp:         NOTRUN -> [SKIP][82] ([Intel XE#4331])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_dp_linktrain_fallback@dp-fallback.html
    - shard-bmg:          NOTRUN -> [FAIL][83] ([Intel XE#4367])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_dp_linktrain_fallback@dp-fallback.html
    - shard-lnl:          NOTRUN -> [SKIP][84] ([Intel XE#4294])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#2244]) +4 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-lnl:          NOTRUN -> [SKIP][86] ([Intel XE#2244]) +3 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][87] ([Intel XE#5425]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fbcon_fbt@psr:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#776])
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-5/igt@kms_fbcon_fbt@psr.html
    - shard-adlp:         NOTRUN -> [SKIP][89] ([Intel XE#776])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-3/igt@kms_fbcon_fbt@psr.html

  * igt@kms_feature_discovery@display-4x:
    - shard-adlp:         NOTRUN -> [SKIP][90] ([Intel XE#1138])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-8/igt@kms_feature_discovery@display-4x.html
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#1138])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_feature_discovery@display-4x.html
    - shard-lnl:          NOTRUN -> [SKIP][92] ([Intel XE#1138])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@psr1:
    - shard-adlp:         NOTRUN -> [SKIP][93] ([Intel XE#1135]) +1 other test skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-9/igt@kms_feature_discovery@psr1.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][94] ([Intel XE#1135])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_feature_discovery@psr1.html

  * igt@kms_feature_discovery@psr2:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#2374])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
    - shard-bmg:          [PASS][96] -> [SKIP][97] ([Intel XE#2316])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-2/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-adlp:         NOTRUN -> [SKIP][98] ([Intel XE#310]) +12 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@2x-flip-vs-rmfb-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][99] ([Intel XE#1421]) +12 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-5/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html

  * igt@kms_flip@bo-too-big-interruptible@a-edp1:
    - shard-lnl:          NOTRUN -> [TIMEOUT][100] ([Intel XE#1504] / [Intel XE#5737]) +1 other test timeout
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-5/igt@kms_flip@bo-too-big-interruptible@a-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][101] ([Intel XE#1397] / [Intel XE#1745]) +2 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#2293] / [Intel XE#2380]) +7 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][103] ([Intel XE#1401] / [Intel XE#1745]) +6 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#1401]) +6 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][105] ([Intel XE#1397]) +2 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-adlp:         NOTRUN -> [DMESG-FAIL][106] ([Intel XE#4543] / [Intel XE#4921]) +3 other tests dmesg-fail
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#2293]) +7 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-adlp:         NOTRUN -> [SKIP][108] ([Intel XE#656]) +77 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][109] ([Intel XE#2311]) +39 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
    - shard-adlp:         [PASS][110] -> [DMESG-FAIL][111] ([Intel XE#4543])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][112] ([Intel XE#5390]) +29 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][113] ([Intel XE#2312]) +10 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-adlp:         NOTRUN -> [SKIP][114] ([Intel XE#1151])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-1/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-lnl:          NOTRUN -> [SKIP][115] ([Intel XE#1469])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
    - shard-bmg:          NOTRUN -> [SKIP][116] ([Intel XE#2352])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-fullscreen:
    - shard-adlp:         NOTRUN -> [SKIP][117] ([Intel XE#651]) +14 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][118] ([Intel XE#656]) +73 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-move:
    - shard-dg2-set2:     NOTRUN -> [SKIP][119] ([Intel XE#651]) +8 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary:
    - shard-lnl:          NOTRUN -> [SKIP][120] ([Intel XE#651]) +15 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][121] ([Intel XE#2313]) +48 other tests skip
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render:
    - shard-adlp:         NOTRUN -> [SKIP][122] ([Intel XE#653]) +25 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render.html

  * igt@kms_frontbuffer_tracking@plane-fbc-rte:
    - shard-adlp:         NOTRUN -> [SKIP][123] ([Intel XE#1158])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
    - shard-bmg:          NOTRUN -> [SKIP][124] ([Intel XE#2350])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-8/igt@kms_frontbuffer_tracking@plane-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][125] ([Intel XE#653]) +10 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-lnl:          NOTRUN -> [SKIP][126] ([Intel XE#3374] / [Intel XE#3544])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_hdr@brightness-with-hdr.html
    - shard-bmg:          NOTRUN -> [SKIP][127] ([Intel XE#3374] / [Intel XE#3544])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-lnl:          NOTRUN -> [SKIP][128] ([Intel XE#1503]) +3 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-adlp:         NOTRUN -> [SKIP][129] ([Intel XE#3012])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][130] ([Intel XE#2927])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_joiner@invalid-modeset-ultra-joiner.html
    - shard-adlp:         NOTRUN -> [SKIP][131] ([Intel XE#2927])
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_joiner@invalid-modeset-ultra-joiner.html
    - shard-bmg:          NOTRUN -> [SKIP][132] ([Intel XE#2927])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_lease@master-vs-lease:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][133] ([Intel XE#2953] / [Intel XE#4173])
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_lease@master-vs-lease.html

  * igt@kms_plane_lowres@tiling-none@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][134] ([Intel XE#599]) +3 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-adlp:         NOTRUN -> [SKIP][135] ([Intel XE#4596])
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-1/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-bmg:          NOTRUN -> [SKIP][136] ([Intel XE#2571])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
    - shard-bmg:          NOTRUN -> [SKIP][137] ([Intel XE#2763]) +4 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-c:
    - shard-lnl:          NOTRUN -> [SKIP][138] ([Intel XE#2763]) +7 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-c.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][139] ([Intel XE#870])
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-8/igt@kms_pm_backlight@fade-with-suspend.html
    - shard-adlp:         NOTRUN -> [SKIP][140] ([Intel XE#870])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-adlp:         NOTRUN -> [FAIL][141] ([Intel XE#718])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-9/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-lnl:          NOTRUN -> [FAIL][142] ([Intel XE#718])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_pm_dc@dc6-psr.html
    - shard-bmg:          NOTRUN -> [SKIP][143] ([Intel XE#2392])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@kms_pm_dc@dc6-psr.html
    - shard-adlp:         NOTRUN -> [SKIP][144] ([Intel XE#1129])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-adlp:         NOTRUN -> [ABORT][145] ([Intel XE#5545])
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_pm_rpm@modeset-lpsp.html
    - shard-bmg:          NOTRUN -> [ABORT][146] ([Intel XE#4760] / [Intel XE#5545])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-lnl:          NOTRUN -> [SKIP][147] ([Intel XE#1406] / [Intel XE#2893] / [Intel XE#4608]) +3 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][148] ([Intel XE#1406] / [Intel XE#4608]) +7 other tests skip
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][149] ([Intel XE#1406] / [Intel XE#1489]) +1 other test skip
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area:
    - shard-adlp:         NOTRUN -> [SKIP][150] ([Intel XE#1406] / [Intel XE#1489]) +13 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-1/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html
    - shard-bmg:          NOTRUN -> [SKIP][151] ([Intel XE#1406] / [Intel XE#1489]) +13 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-3/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][152] ([Intel XE#1406] / [Intel XE#2893]) +9 other tests skip
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][153] ([Intel XE#1406] / [Intel XE#2387])
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_psr2_su@page_flip-xrgb8888.html
    - shard-adlp:         NOTRUN -> [SKIP][154] ([Intel XE#1122] / [Intel XE#1406] / [Intel XE#5580])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_psr2_su@page_flip-xrgb8888.html
    - shard-lnl:          NOTRUN -> [SKIP][155] ([Intel XE#1128] / [Intel XE#1406])
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-primary-page-flip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][156] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_psr@fbc-pr-primary-page-flip.html

  * igt@kms_psr@fbc-pr-sprite-render:
    - shard-adlp:         NOTRUN -> [SKIP][157] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +28 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-3/igt@kms_psr@fbc-pr-sprite-render.html

  * igt@kms_psr@fbc-psr2-dpms@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][158] ([Intel XE#1406] / [Intel XE#4609]) +1 other test skip
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@kms_psr@fbc-psr2-dpms@edp-1.html

  * igt@kms_psr@pr-no-drrs:
    - shard-lnl:          NOTRUN -> [SKIP][159] ([Intel XE#1406]) +12 other tests skip
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_psr@pr-no-drrs.html

  * igt@kms_psr@psr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][160] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +24 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-7/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-adlp:         NOTRUN -> [SKIP][161] ([Intel XE#1406] / [Intel XE#2939] / [Intel XE#5585])
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-9/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][162] ([Intel XE#1406] / [Intel XE#2939])
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-0:
    - shard-lnl:          NOTRUN -> [SKIP][163] ([Intel XE#3414] / [Intel XE#3904]) +2 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html
    - shard-adlp:         NOTRUN -> [SKIP][164] ([Intel XE#1127])
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@kms_rotation_crc@primary-4-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-x-tiled-reflect-x-0:
    - shard-lnl:          NOTRUN -> [FAIL][165] ([Intel XE#4689])
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_rotation_crc@primary-x-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][166] ([Intel XE#2330])
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
    - shard-lnl:          NOTRUN -> [SKIP][167] ([Intel XE#1127])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-adlp:         NOTRUN -> [SKIP][168] ([Intel XE#3414]) +2 other tests skip
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-3/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
    - shard-bmg:          NOTRUN -> [SKIP][169] ([Intel XE#3414] / [Intel XE#3904]) +2 other tests skip
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-7/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_scaling_modes@scaling-mode-full-aspect:
    - shard-bmg:          NOTRUN -> [SKIP][170] ([Intel XE#2413])
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_scaling_modes@scaling-mode-full-aspect.html

  * igt@kms_setmode@invalid-clone-single-crtc-stealing:
    - shard-lnl:          NOTRUN -> [SKIP][171] ([Intel XE#1435])
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-8/igt@kms_setmode@invalid-clone-single-crtc-stealing.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-adlp:         NOTRUN -> [SKIP][172] ([Intel XE#362]) +1 other test skip
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_tiled_display@basic-test-pattern.html
    - shard-bmg:          NOTRUN -> [SKIP][173] ([Intel XE#2426]) +1 other test skip
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
    - shard-lnl:          NOTRUN -> [SKIP][174] ([Intel XE#362])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@cmrr:
    - shard-bmg:          NOTRUN -> [SKIP][175] ([Intel XE#2168])
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@kms_vrr@cmrr.html

  * igt@kms_vrr@flipline:
    - shard-dg2-set2:     NOTRUN -> [SKIP][176] ([Intel XE#455]) +1 other test skip
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@kms_vrr@flipline.html

  * igt@kms_vrr@negative-basic:
    - shard-lnl:          NOTRUN -> [SKIP][177] ([Intel XE#1499]) +1 other test skip
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-bmg:          NOTRUN -> [SKIP][178] ([Intel XE#1499])
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
    - shard-lnl:          NOTRUN -> [SKIP][179] ([Intel XE#1091] / [Intel XE#2849])
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html

  * igt@xe_ccs@block-multicopy-compressed:
    - shard-adlp:         NOTRUN -> [SKIP][180] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@xe_ccs@block-multicopy-compressed.html

  * igt@xe_ccs@large-ctrl-surf-copy:
    - shard-adlp:         NOTRUN -> [SKIP][181] ([Intel XE#3576] / [Intel XE#5610])
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-6/igt@xe_ccs@large-ctrl-surf-copy.html

  * igt@xe_compute@ccs-mode-basic:
    - shard-bmg:          NOTRUN -> [FAIL][182] ([Intel XE#5794])
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@xe_compute@ccs-mode-basic.html
    - shard-adlp:         NOTRUN -> [SKIP][183] ([Intel XE#1447] / [Intel XE#5617])
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-8/igt@xe_compute@ccs-mode-basic.html
    - shard-lnl:          NOTRUN -> [SKIP][184] ([Intel XE#1447])
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@xe_compute@ccs-mode-basic.html

  * igt@xe_compute_preempt@compute-preempt-many:
    - shard-adlp:         NOTRUN -> [SKIP][185] ([Intel XE#455] / [Intel XE#5632])
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-9/igt@xe_compute_preempt@compute-preempt-many.html
    - shard-dg2-set2:     NOTRUN -> [FAIL][186] ([Intel XE#5890]) +1 other test fail
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_compute_preempt@compute-preempt-many.html

  * igt@xe_configfs@survivability-mode:
    - shard-lnl:          NOTRUN -> [SKIP][187] ([Intel XE#6010])
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-7/igt@xe_configfs@survivability-mode.html
    - shard-adlp:         NOTRUN -> [SKIP][188] ([Intel XE#6010])
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-6/igt@xe_configfs@survivability-mode.html

  * igt@xe_copy_basic@mem-copy-linear-0xfffe:
    - shard-adlp:         NOTRUN -> [SKIP][189] ([Intel XE#1123])
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-3/igt@xe_copy_basic@mem-copy-linear-0xfffe.html

  * igt@xe_eu_stall@blocking-re-enable:
    - shard-adlp:         NOTRUN -> [SKIP][190] ([Intel XE#5626]) +1 other test skip
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-6/igt@xe_eu_stall@blocking-re-enable.html

  * igt@xe_eu_stall@non-blocking-read:
    - shard-dg2-set2:     NOTRUN -> [SKIP][191] ([Intel XE#5626])
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_eu_stall@non-blocking-read.html

  * igt@xe_eudebug@basic-close:
    - shard-lnl:          NOTRUN -> [SKIP][192] ([Intel XE#4837]) +22 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@xe_eudebug@basic-close.html

  * igt@xe_eudebug@basic-vm-bind-metadata-discovery:
    - shard-bmg:          NOTRUN -> [SKIP][193] ([Intel XE#4837]) +19 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html

  * igt@xe_eudebug_online@single-step:
    - shard-adlp:         NOTRUN -> [SKIP][194] ([Intel XE#4837] / [Intel XE#5565]) +21 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@xe_eudebug_online@single-step.html

  * igt@xe_evict@evict-beng-large-cm:
    - shard-lnl:          NOTRUN -> [SKIP][195] ([Intel XE#688]) +9 other tests skip
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@xe_evict@evict-beng-large-cm.html

  * igt@xe_evict@evict-beng-small:
    - shard-adlp:         NOTRUN -> [SKIP][196] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688]) +3 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-6/igt@xe_evict@evict-beng-small.html

  * igt@xe_evict@evict-large-multi-vm:
    - shard-adlp:         NOTRUN -> [SKIP][197] ([Intel XE#261] / [Intel XE#5564]) +4 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@xe_evict@evict-large-multi-vm.html

  * igt@xe_evict_ccs@evict-overcommit-standalone-nofree-reopen:
    - shard-adlp:         NOTRUN -> [SKIP][198] ([Intel XE#5563] / [Intel XE#688])
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@xe_evict_ccs@evict-overcommit-standalone-nofree-reopen.html

  * igt@xe_exec_basic@many-execqueues-null-defer-mmap:
    - shard-bmg:          [PASS][199] -> [DMESG-WARN][200] ([Intel XE#3876])
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-6/igt@xe_exec_basic@many-execqueues-null-defer-mmap.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@xe_exec_basic@many-execqueues-null-defer-mmap.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][201] ([Intel XE#2322]) +18 other tests skip
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue:
    - shard-dg2-set2:     NOTRUN -> [SKIP][202] ([Intel XE#1392]) +1 other test skip
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_exec_basic@multigpu-once-bindexecqueue.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
    - shard-adlp:         NOTRUN -> [SKIP][203] ([Intel XE#1392] / [Intel XE#5575]) +18 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_basic@multigpu-once-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][204] ([Intel XE#1392]) +18 other tests skip
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-5/igt@xe_exec_basic@multigpu-once-userptr.html

  * igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-prefetch:
    - shard-adlp:         NOTRUN -> [SKIP][205] ([Intel XE#288] / [Intel XE#5561]) +40 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-prefetch.html

  * igt@xe_exec_fault_mode@once-bindexecqueue-imm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][206] ([Intel XE#288]) +7 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_exec_fault_mode@once-bindexecqueue-imm.html

  * igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence:
    - shard-adlp:         NOTRUN -> [SKIP][207] ([Intel XE#2360])
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-1/igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence.html

  * igt@xe_exec_reset@parallel-gt-reset:
    - shard-adlp:         [PASS][208] -> [DMESG-WARN][209] ([Intel XE#3876]) +1 other test dmesg-warn
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-adlp-4/igt@xe_exec_reset@parallel-gt-reset.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@xe_exec_reset@parallel-gt-reset.html
    - shard-bmg:          NOTRUN -> [DMESG-WARN][210] ([Intel XE#3876]) +1 other test dmesg-warn
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@xe_exec_reset@parallel-gt-reset.html

  * igt@xe_exec_sip_eudebug@wait-writesip-nodebug:
    - shard-dg2-set2:     NOTRUN -> [SKIP][211] ([Intel XE#4837]) +2 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_exec_sip_eudebug@wait-writesip-nodebug.html

  * igt@xe_exec_system_allocator@process-many-execqueues-mmap-free-huge:
    - shard-bmg:          NOTRUN -> [SKIP][212] ([Intel XE#4943]) +39 other tests skip
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@xe_exec_system_allocator@process-many-execqueues-mmap-free-huge.html

  * igt@xe_exec_system_allocator@process-many-execqueues-mmap-nomemset:
    - shard-adlp:         NOTRUN -> [SKIP][213] ([Intel XE#4915]) +437 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-1/igt@xe_exec_system_allocator@process-many-execqueues-mmap-nomemset.html

  * igt@xe_exec_system_allocator@process-many-mmap-new-huge-nomemset:
    - shard-lnl:          NOTRUN -> [SKIP][214] ([Intel XE#4943]) +35 other tests skip
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@xe_exec_system_allocator@process-many-mmap-new-huge-nomemset.html

  * igt@xe_exec_system_allocator@process-many-stride-mmap-file-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][215] ([Intel XE#4915]) +75 other tests skip
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_exec_system_allocator@process-many-stride-mmap-file-nomemset.html

  * igt@xe_exec_threads@threads-hang-shared-vm-userptr-invalidate-race:
    - shard-adlp:         NOTRUN -> [DMESG-FAIL][216] ([Intel XE#3876])
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@xe_exec_threads@threads-hang-shared-vm-userptr-invalidate-race.html
    - shard-bmg:          NOTRUN -> [DMESG-FAIL][217] ([Intel XE#3876])
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@xe_exec_threads@threads-hang-shared-vm-userptr-invalidate-race.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-lnl:          NOTRUN -> [ABORT][218] ([Intel XE#4917] / [Intel XE#5466])
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-5/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
    - shard-adlp:         NOTRUN -> [ABORT][219] ([Intel XE#4917] / [Intel XE#5530])
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-8/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
    - shard-bmg:          NOTRUN -> [ABORT][220] ([Intel XE#5466] / [Intel XE#5530])
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_mmap@pci-membarrier-bad-pagesize:
    - shard-lnl:          NOTRUN -> [SKIP][221] ([Intel XE#5100]) +1 other test skip
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@xe_mmap@pci-membarrier-bad-pagesize.html

  * igt@xe_mmap@pci-membarrier-parallel:
    - shard-adlp:         NOTRUN -> [SKIP][222] ([Intel XE#5100]) +2 other tests skip
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-4/igt@xe_mmap@pci-membarrier-parallel.html

  * igt@xe_mmap@vram:
    - shard-lnl:          NOTRUN -> [SKIP][223] ([Intel XE#1416])
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-5/igt@xe_mmap@vram.html
    - shard-adlp:         NOTRUN -> [SKIP][224] ([Intel XE#1008] / [Intel XE#5591])
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-1/igt@xe_mmap@vram.html

  * igt@xe_oa@invalid-oa-exponent:
    - shard-dg2-set2:     NOTRUN -> [SKIP][225] ([Intel XE#3573]) +2 other tests skip
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_oa@invalid-oa-exponent.html

  * igt@xe_oa@privileged-forked-access-vaddr:
    - shard-adlp:         NOTRUN -> [SKIP][226] ([Intel XE#3573]) +13 other tests skip
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-3/igt@xe_oa@privileged-forked-access-vaddr.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-adlp:         NOTRUN -> [SKIP][227] ([Intel XE#2838] / [Intel XE#979])
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-8/igt@xe_pat@pat-index-xehpc.html
    - shard-bmg:          NOTRUN -> [SKIP][228] ([Intel XE#1420])
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@xe_pat@pat-index-xehpc.html
    - shard-lnl:          NOTRUN -> [SKIP][229] ([Intel XE#1420] / [Intel XE#2838])
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-1/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_pm@s3-vm-bind-unbind-all:
    - shard-lnl:          NOTRUN -> [SKIP][230] ([Intel XE#584]) +1 other test skip
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-2/igt@xe_pm@s3-vm-bind-unbind-all.html

  * igt@xe_pmu@fn-engine-activity-sched-if-idle:
    - shard-lnl:          NOTRUN -> [SKIP][231] ([Intel XE#4650]) +1 other test skip
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][232] ([Intel XE#4650])
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_pmu@fn-engine-activity-sched-if-idle.html

  * igt@xe_pxp@display-pxp-fb:
    - shard-adlp:         NOTRUN -> [SKIP][233] ([Intel XE#4733])
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-8/igt@xe_pxp@display-pxp-fb.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-dg2-set2:     NOTRUN -> [SKIP][234] ([Intel XE#4733]) +1 other test skip
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_pxp@pxp-stale-queue-post-suspend:
    - shard-adlp:         NOTRUN -> [SKIP][235] ([Intel XE#4733] / [Intel XE#5594]) +2 other tests skip
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-3/igt@xe_pxp@pxp-stale-queue-post-suspend.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][236] ([Intel XE#4733]) +4 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-cs-cycles:
    - shard-adlp:         NOTRUN -> [SKIP][237] ([Intel XE#944]) +7 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-8/igt@xe_query@multigpu-query-cs-cycles.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][238] ([Intel XE#944]) +6 other tests skip
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-4/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-lnl:          NOTRUN -> [SKIP][239] ([Intel XE#944]) +7 other tests skip
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-4/igt@xe_query@multigpu-query-pxp-status.html

  * igt@xe_query@multigpu-query-uc-fw-version-huc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][240] ([Intel XE#944])
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-dg2-432/igt@xe_query@multigpu-query-uc-fw-version-huc.html

  * igt@xe_sriov_auto_provisioning@fair-allocation:
    - shard-lnl:          NOTRUN -> [SKIP][241] ([Intel XE#4130]) +1 other test skip
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-lnl-3/igt@xe_sriov_auto_provisioning@fair-allocation.html

  
#### Possible fixes ####

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-adlp:         [DMESG-FAIL][242] ([Intel XE#4543]) -> [PASS][243]
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-adlp-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_flip@2x-blocking-wf_vblank:
    - shard-bmg:          [SKIP][244] ([Intel XE#2316]) -> [PASS][245]
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-6/igt@kms_flip@2x-blocking-wf_vblank.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-7/igt@kms_flip@2x-blocking-wf_vblank.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode:
    - shard-adlp:         [DMESG-FAIL][246] ([Intel XE#4543] / [Intel XE#4921]) -> [PASS][247] +1 other test pass
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html

  * igt@kms_plane_scaling@intel-max-src-size:
    - shard-bmg:          [SKIP][248] ([Intel XE#2685] / [Intel XE#3307]) -> [PASS][249]
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-6/igt@kms_plane_scaling@intel-max-src-size.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_plane_scaling@intel-max-src-size.html

  * igt@kms_sequence@get-busy:
    - shard-adlp:         [DMESG-WARN][250] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][251] +1 other test pass
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-adlp-3/igt@kms_sequence@get-busy.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-adlp-1/igt@kms_sequence@get-busy.html

  
#### Warnings ####

  * igt@kms_content_protection@lic-type-0:
    - shard-bmg:          [FAIL][252] ([Intel XE#1178]) -> [SKIP][253] ([Intel XE#2341])
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-3/igt@kms_content_protection@lic-type-0.html
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_content_protection@lic-type-0.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][254] ([Intel XE#2312]) -> [SKIP][255] ([Intel XE#2311]) +1 other test skip
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][256] ([Intel XE#5390]) -> [SKIP][257] ([Intel XE#2312]) +1 other test skip
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][258] ([Intel XE#2312]) -> [SKIP][259] ([Intel XE#5390]) +3 other tests skip
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][260] ([Intel XE#2312]) -> [SKIP][261] ([Intel XE#2313])
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-pgflip-blt.html
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][262] ([Intel XE#2313]) -> [SKIP][263] ([Intel XE#2312])
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1008]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1008
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
  [Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
  [Intel XE#1158]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1158
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1416
  [Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
  [Intel XE#1467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1467
  [Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1504
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2350
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
  [Intel XE#2685]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2685
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
  [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
  [Intel XE#3307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3307
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3433
  [Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#3576]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3576
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4367
  [Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#4689]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4689
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
  [Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5425
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
  [Intel XE#5563]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5563
  [Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
  [Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5580]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5580
  [Intel XE#5585]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5585
  [Intel XE#5591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5591
  [Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
  [Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
  [Intel XE#5610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5610
  [Intel XE#5617]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5617
  [Intel XE#5624]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5624
  [Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
  [Intel XE#5632]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5632
  [Intel XE#5737]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5737
  [Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
  [Intel XE#5794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5794
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5890]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5890
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#6010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6010
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#664]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/664
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979


Build changes
-------------

  * IGT: IGT_8535 -> IGT_8536
  * Linux: xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb -> xe-pw-154420v1

  IGT_8535: 8535
  IGT_8536: 8536
  xe-3729-a433a14cc397ef049ef273a3d4404d46a20a28cb: a433a14cc397ef049ef273a3d4404d46a20a28cb
  xe-pw-154420v1: 154420v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154420v1/index.html

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