Re: [PATCH 2/6] drm/xe/migrate: fix chunk handling for 2M page emit

[Matthew Brost <matthew.brost@intel.com>]

On Wed, Oct 15, 2025 at 03:19:32PM +0100, Matthew Auld wrote:
> On systems with PAGE_SIZE > 4K the chunk will likely be rounded down to
> zero, if say we have single 2M page, so one huge pte, since we also try
> to align the chunk to PAGE_SIZE / XE_PAGE_SIZE, which will be 16 on 64K
> systems. Make the ALIGN_DOWN conditional for 4K PTEs where we can
> encounter gpu_page_size < PAGE_SIZE.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>

Good catch.
Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_migrate.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index ff8e442bf519..a4861ede6cef 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -1804,7 +1804,9 @@ static void build_pt_update_batch_sram(struct xe_migrate *m,
>  	while (ptes) {
>  		u32 chunk = min(MAX_PTE_PER_SDI, ptes);
>  
> -		chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
> +		if (!level)
> +			chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
> +
>  		bb->cs[bb->len++] = MI_STORE_DATA_IMM | MI_SDI_NUM_QW(chunk);
>  		bb->cs[bb->len++] = pt_offset;
>  		bb->cs[bb->len++] = 0;
> -- 
> 2.51.0
>