From: Matthew Brost <matthew.brost@intel.com>
To: Matthew Auld <matthew.auld@intel.com>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH 6/6] drm/xe/migrate: skip bounce buffer path on xe2
Date: Thu, 16 Oct 2025 14:28:11 -0700 [thread overview]
Message-ID: <aPFja3rmfhb/TtfQ@lstrano-desk.jf.intel.com> (raw)
In-Reply-To: <20251015141929.123637-14-matthew.auld@intel.com>
On Wed, Oct 15, 2025 at 03:19:36PM +0100, Matthew Auld wrote:
> Now that we support MEM_COPY we should be able to use the PAGE_COPY
> mode, otherwise falling back to BYTE_COPY mode when we have odd
> sizing/alignment.
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_migrate.c | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index da1fefb96070..8bd8e8179313 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -1933,9 +1933,11 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
> int err;
> unsigned long i, j;
> bool use_pde = xe_migrate_vram_use_pde(sram_addr, len + sram_offset);
> + bool has_byte_copy = GRAPHICS_VER(xe) >= 20;
See my comment in previous patch about maybe storing this in xe_device.info.
Whatever we land on there, absorb into this patch.
With that:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
>
> - if (drm_WARN_ON(&xe->drm, (len & XE_CACHELINE_MASK) ||
> - (sram_offset | vram_addr) & XE_CACHELINE_MASK))
> + if (!has_byte_copy &&
> + drm_WARN_ON(&xe->drm,
> + (len & XE_CACHELINE_MASK) || (sram_offset | vram_addr) & XE_CACHELINE_MASK))
> return ERR_PTR(-EOPNOTSUPP);
>
> xe_assert(xe, npages * PAGE_SIZE <= MAX_PREEMPTDISABLE_TRANSFER);
> @@ -2149,13 +2151,14 @@ int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo,
> struct drm_pagemap_addr *pagemap_addr;
> unsigned long page_offset = (unsigned long)buf & ~PAGE_MASK;
> int bytes_left = len, current_page = 0;
> + bool has_byte_copy = GRAPHICS_VER(xe) >= 20;
> void *orig_buf = buf;
>
> xe_bo_assert_held(bo);
>
> /* Use bounce buffer for small access and unaligned access */
> - if (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
> - !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES)) {
> + if (!has_byte_copy && (!IS_ALIGNED(len, XE_CACHELINE_BYTES) ||
> + !IS_ALIGNED((unsigned long)buf + offset, XE_CACHELINE_BYTES))) {
> int buf_offset = 0;
> void *bounce;
> int err;
> --
> 2.51.0
>
next prev parent reply other threads:[~2025-10-16 21:28 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-15 14:19 [PATCH 0/6] Some migration fixes/improvements Matthew Auld
2025-10-15 14:19 ` [PATCH 1/6] drm/xe/migrate: rework size restrictions for sram pte emit Matthew Auld
2025-10-16 0:36 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 2/6] drm/xe/migrate: fix chunk handling for 2M page emit Matthew Auld
2025-10-16 0:34 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 3/6] drm/xe/migrate: fix batch buffer sizing Matthew Auld
2025-10-16 0:36 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 4/6] drm/xe/migrate: trim " Matthew Auld
2025-10-16 0:38 ` Matthew Brost
2025-10-15 14:19 ` [PATCH 5/6] drm/xe/migrate: support MEM_COPY instruction Matthew Auld
2025-10-16 0:58 ` Matthew Brost
2025-10-16 9:41 ` Matthew Auld
2025-10-16 18:46 ` Matthew Brost
2025-10-16 21:26 ` Matthew Brost
2025-10-17 11:23 ` Matthew Auld
2025-10-15 14:19 ` [PATCH 6/6] drm/xe/migrate: skip bounce buffer path on xe2 Matthew Auld
2025-10-16 21:28 ` Matthew Brost [this message]
2025-10-15 22:58 ` ✓ CI.KUnit: success for Some migration fixes/improvements Patchwork
2025-10-15 23:52 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-16 16:08 ` ✓ Xe.CI.Full: " Patchwork
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