* [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
@ 2025-12-02 18:39 Jani Nikula
2025-12-02 19:00 ` ✓ CI.KUnit: success for " Patchwork
` (4 more replies)
0 siblings, 5 replies; 15+ messages in thread
From: Jani Nikula @ 2025-12-02 18:39 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, Mohammed Thasleem, Imre Deak, stable
intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
initialized, and dmc is thus NULL.
That would be the case when the call path is
intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
intel_power_domains_init_hw() is called *before* intel_dmc_init().
However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
conditionally, depending on the current and target DC states. At probe,
the target is disabled, but if DC6 is enabled, the function is called,
and an oops follows. Apparently it's quite unlikely that DC6 is enabled
at probe, as we haven't seen this failure mode before.
Add NULL checks and switch the dmc->display references to just display.
Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: <stable@vger.kernel.org> # v6.16+
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
Rare case, but this may also throw off the rc6 counting in debugfs when
it does happen.
---
drivers/gpu/drm/i915/display/intel_dmc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 2fb6fec6dc99..169bbbc91f6d 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1570,10 +1570,10 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display,
struct intel_dmc *dmc = display_to_dmc(display);
u32 dc5_cur_count;
- if (DISPLAY_VER(dmc->display) < 14)
+ if (!dmc || DISPLAY_VER(display) < 14)
return;
- dc5_cur_count = intel_de_read(dmc->display, DG1_DMC_DEBUG_DC5_COUNT);
+ dc5_cur_count = intel_de_read(display, DG1_DMC_DEBUG_DC5_COUNT);
if (!start_tracking)
dmc->dc6_allowed.count += dc5_cur_count - dmc->dc6_allowed.dc5_start;
@@ -1587,7 +1587,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
struct intel_dmc *dmc = display_to_dmc(display);
bool dc6_enabled;
- if (DISPLAY_VER(display) < 14)
+ if (!dmc || DISPLAY_VER(display) < 14)
return false;
mutex_lock(&power_domains->lock);
--
2.47.3
^ permalink raw reply related [flat|nested] 15+ messages in thread
* ✓ CI.KUnit: success for drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-02 18:39 [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe Jani Nikula
@ 2025-12-02 19:00 ` Patchwork
2025-12-02 20:13 ` ✓ Xe.CI.BAT: " Patchwork
` (3 subsequent siblings)
4 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2025-12-02 19:00 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915/dmc: fix an unlikely NULL pointer deference at probe
URL : https://patchwork.freedesktop.org/series/158395/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:59:12] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:59:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:59:47] Starting KUnit Kernel (1/1)...
[18:59:47] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:59:47] ================== guc_buf (11 subtests) ===================
[18:59:47] [PASSED] test_smallest
[18:59:47] [PASSED] test_largest
[18:59:47] [PASSED] test_granular
[18:59:47] [PASSED] test_unique
[18:59:47] [PASSED] test_overlap
[18:59:47] [PASSED] test_reusable
[18:59:47] [PASSED] test_too_big
[18:59:47] [PASSED] test_flush
[18:59:47] [PASSED] test_lookup
[18:59:47] [PASSED] test_data
[18:59:47] [PASSED] test_class
[18:59:47] ===================== [PASSED] guc_buf =====================
[18:59:47] =================== guc_dbm (7 subtests) ===================
[18:59:47] [PASSED] test_empty
[18:59:47] [PASSED] test_default
[18:59:47] ======================== test_size ========================
[18:59:47] [PASSED] 4
[18:59:47] [PASSED] 8
[18:59:47] [PASSED] 32
[18:59:47] [PASSED] 256
[18:59:47] ==================== [PASSED] test_size ====================
[18:59:47] ======================= test_reuse ========================
[18:59:47] [PASSED] 4
[18:59:47] [PASSED] 8
[18:59:47] [PASSED] 32
[18:59:47] [PASSED] 256
[18:59:47] =================== [PASSED] test_reuse ====================
[18:59:47] =================== test_range_overlap ====================
[18:59:47] [PASSED] 4
[18:59:47] [PASSED] 8
[18:59:47] [PASSED] 32
[18:59:47] [PASSED] 256
[18:59:47] =============== [PASSED] test_range_overlap ================
[18:59:47] =================== test_range_compact ====================
[18:59:47] [PASSED] 4
[18:59:47] [PASSED] 8
[18:59:47] [PASSED] 32
[18:59:47] [PASSED] 256
[18:59:47] =============== [PASSED] test_range_compact ================
[18:59:47] ==================== test_range_spare =====================
[18:59:47] [PASSED] 4
[18:59:47] [PASSED] 8
[18:59:47] [PASSED] 32
[18:59:47] [PASSED] 256
[18:59:47] ================ [PASSED] test_range_spare =================
[18:59:47] ===================== [PASSED] guc_dbm =====================
[18:59:47] =================== guc_idm (6 subtests) ===================
[18:59:47] [PASSED] bad_init
[18:59:47] [PASSED] no_init
[18:59:47] [PASSED] init_fini
[18:59:47] [PASSED] check_used
[18:59:47] [PASSED] check_quota
[18:59:47] [PASSED] check_all
[18:59:47] ===================== [PASSED] guc_idm =====================
[18:59:47] ================== no_relay (3 subtests) ===================
[18:59:47] [PASSED] xe_drops_guc2pf_if_not_ready
[18:59:47] [PASSED] xe_drops_guc2vf_if_not_ready
[18:59:47] [PASSED] xe_rejects_send_if_not_ready
[18:59:47] ==================== [PASSED] no_relay =====================
[18:59:47] ================== pf_relay (14 subtests) ==================
[18:59:47] [PASSED] pf_rejects_guc2pf_too_short
[18:59:47] [PASSED] pf_rejects_guc2pf_too_long
[18:59:47] [PASSED] pf_rejects_guc2pf_no_payload
[18:59:47] [PASSED] pf_fails_no_payload
[18:59:47] [PASSED] pf_fails_bad_origin
[18:59:47] [PASSED] pf_fails_bad_type
[18:59:47] [PASSED] pf_txn_reports_error
[18:59:47] [PASSED] pf_txn_sends_pf2guc
[18:59:47] [PASSED] pf_sends_pf2guc
[18:59:47] [SKIPPED] pf_loopback_nop
[18:59:47] [SKIPPED] pf_loopback_echo
[18:59:47] [SKIPPED] pf_loopback_fail
[18:59:47] [SKIPPED] pf_loopback_busy
[18:59:47] [SKIPPED] pf_loopback_retry
[18:59:47] ==================== [PASSED] pf_relay =====================
[18:59:47] ================== vf_relay (3 subtests) ===================
[18:59:47] [PASSED] vf_rejects_guc2vf_too_short
[18:59:47] [PASSED] vf_rejects_guc2vf_too_long
[18:59:47] [PASSED] vf_rejects_guc2vf_no_payload
[18:59:47] ==================== [PASSED] vf_relay =====================
[18:59:47] ================ pf_gt_config (6 subtests) =================
[18:59:48] [PASSED] fair_contexts_1vf
[18:59:48] [PASSED] fair_doorbells_1vf
[18:59:48] [PASSED] fair_ggtt_1vf
[18:59:48] ====================== fair_contexts ======================
[18:59:48] [PASSED] 1 VF
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[18:59:48] ================== [PASSED] fair_contexts ==================
[18:59:48] ===================== fair_doorbells ======================
[18:59:48] [PASSED] 1 VF
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[18:59:48] [PASSED] 62 VFs
[18:59:48] [PASSED] 63 VFs
[18:59:48] ================= [PASSED] fair_doorbells ==================
[18:59:48] ======================== fair_ggtt ========================
[18:59:48] [PASSED] 1 VF
[18:59:48] [PASSED] 2 VFs
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[18:59:48] [PASSED] 63 VFs
[18:59:48] ==================== [PASSED] fair_ggtt ====================
[18:59:48] ================== [PASSED] pf_gt_config ===================
[18:59:48] ===================== lmtt (1 subtest) =====================
[18:59:48] ======================== test_ops =========================
[18:59:48] [PASSED] 2-level
[18:59:48] [PASSED] multi-level
[18:59:48] ==================== [PASSED] test_ops =====================
[18:59:48] ====================== [PASSED] lmtt =======================
[18:59:48] ================= pf_service (11 subtests) =================
[18:59:48] [PASSED] pf_negotiate_any
[18:59:48] [PASSED] pf_negotiate_base_match
[18:59:48] [PASSED] pf_negotiate_base_newer
[18:59:48] [PASSED] pf_negotiate_base_next
[18:59:48] [SKIPPED] pf_negotiate_base_older
[18:59:48] [PASSED] pf_negotiate_base_prev
[18:59:48] [PASSED] pf_negotiate_latest_match
[18:59:48] [PASSED] pf_negotiate_latest_newer
[18:59:48] [PASSED] pf_negotiate_latest_next
[18:59:48] [SKIPPED] pf_negotiate_latest_older
[18:59:48] [SKIPPED] pf_negotiate_latest_prev
[18:59:48] =================== [PASSED] pf_service ====================
[18:59:48] ================= xe_guc_g2g (2 subtests) ==================
[18:59:48] ============== xe_live_guc_g2g_kunit_default ==============
[18:59:48] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:59:48] ============== xe_live_guc_g2g_kunit_allmem ===============
[18:59:48] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:59:48] =================== [SKIPPED] xe_guc_g2g ===================
[18:59:48] =================== xe_mocs (2 subtests) ===================
[18:59:48] ================ xe_live_mocs_kernel_kunit ================
[18:59:48] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:59:48] ================ xe_live_mocs_reset_kunit =================
[18:59:48] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:59:48] ==================== [SKIPPED] xe_mocs =====================
[18:59:48] ================= xe_migrate (2 subtests) ==================
[18:59:48] ================= xe_migrate_sanity_kunit =================
[18:59:48] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:59:48] ================== xe_validate_ccs_kunit ==================
[18:59:48] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:59:48] =================== [SKIPPED] xe_migrate ===================
[18:59:48] ================== xe_dma_buf (1 subtest) ==================
[18:59:48] ==================== xe_dma_buf_kunit =====================
[18:59:48] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:59:48] =================== [SKIPPED] xe_dma_buf ===================
[18:59:48] ================= xe_bo_shrink (1 subtest) =================
[18:59:48] =================== xe_bo_shrink_kunit ====================
[18:59:48] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:59:48] ================== [SKIPPED] xe_bo_shrink ==================
[18:59:48] ==================== xe_bo (2 subtests) ====================
[18:59:48] ================== xe_ccs_migrate_kunit ===================
[18:59:48] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:59:48] ==================== xe_bo_evict_kunit ====================
[18:59:48] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:59:48] ===================== [SKIPPED] xe_bo ======================
[18:59:48] ==================== args (11 subtests) ====================
[18:59:48] [PASSED] count_args_test
[18:59:48] [PASSED] call_args_example
[18:59:48] [PASSED] call_args_test
[18:59:48] [PASSED] drop_first_arg_example
[18:59:48] [PASSED] drop_first_arg_test
[18:59:48] [PASSED] first_arg_example
[18:59:48] [PASSED] first_arg_test
[18:59:48] [PASSED] last_arg_example
[18:59:48] [PASSED] last_arg_test
[18:59:48] [PASSED] pick_arg_example
[18:59:48] [PASSED] sep_comma_example
[18:59:48] ====================== [PASSED] args =======================
[18:59:48] =================== xe_pci (3 subtests) ====================
[18:59:48] ==================== check_graphics_ip ====================
[18:59:48] [PASSED] 12.00 Xe_LP
[18:59:48] [PASSED] 12.10 Xe_LP+
[18:59:48] [PASSED] 12.55 Xe_HPG
[18:59:48] [PASSED] 12.60 Xe_HPC
[18:59:48] [PASSED] 12.70 Xe_LPG
[18:59:48] [PASSED] 12.71 Xe_LPG
[18:59:48] [PASSED] 12.74 Xe_LPG+
[18:59:48] [PASSED] 20.01 Xe2_HPG
[18:59:48] [PASSED] 20.02 Xe2_HPG
[18:59:48] [PASSED] 20.04 Xe2_LPG
[18:59:48] [PASSED] 30.00 Xe3_LPG
[18:59:48] [PASSED] 30.01 Xe3_LPG
[18:59:48] [PASSED] 30.03 Xe3_LPG
[18:59:48] [PASSED] 30.04 Xe3_LPG
[18:59:48] [PASSED] 30.05 Xe3_LPG
[18:59:48] [PASSED] 35.11 Xe3p_XPC
[18:59:48] ================ [PASSED] check_graphics_ip ================
[18:59:48] ===================== check_media_ip ======================
[18:59:48] [PASSED] 12.00 Xe_M
[18:59:48] [PASSED] 12.55 Xe_HPM
[18:59:48] [PASSED] 13.00 Xe_LPM+
[18:59:48] [PASSED] 13.01 Xe2_HPM
[18:59:48] [PASSED] 20.00 Xe2_LPM
[18:59:48] [PASSED] 30.00 Xe3_LPM
[18:59:48] [PASSED] 30.02 Xe3_LPM
[18:59:48] [PASSED] 35.00 Xe3p_LPM
[18:59:48] [PASSED] 35.03 Xe3p_HPM
[18:59:48] ================= [PASSED] check_media_ip ==================
[18:59:48] =================== check_platform_desc ===================
[18:59:48] [PASSED] 0x9A60 (TIGERLAKE)
[18:59:48] [PASSED] 0x9A68 (TIGERLAKE)
[18:59:48] [PASSED] 0x9A70 (TIGERLAKE)
[18:59:48] [PASSED] 0x9A40 (TIGERLAKE)
[18:59:48] [PASSED] 0x9A49 (TIGERLAKE)
[18:59:48] [PASSED] 0x9A59 (TIGERLAKE)
[18:59:48] [PASSED] 0x9A78 (TIGERLAKE)
[18:59:48] [PASSED] 0x9AC0 (TIGERLAKE)
[18:59:48] [PASSED] 0x9AC9 (TIGERLAKE)
[18:59:48] [PASSED] 0x9AD9 (TIGERLAKE)
[18:59:48] [PASSED] 0x9AF8 (TIGERLAKE)
[18:59:48] [PASSED] 0x4C80 (ROCKETLAKE)
[18:59:48] [PASSED] 0x4C8A (ROCKETLAKE)
[18:59:48] [PASSED] 0x4C8B (ROCKETLAKE)
[18:59:48] [PASSED] 0x4C8C (ROCKETLAKE)
[18:59:48] [PASSED] 0x4C90 (ROCKETLAKE)
[18:59:48] [PASSED] 0x4C9A (ROCKETLAKE)
[18:59:48] [PASSED] 0x4680 (ALDERLAKE_S)
[18:59:48] [PASSED] 0x4682 (ALDERLAKE_S)
[18:59:48] [PASSED] 0x4688 (ALDERLAKE_S)
[18:59:48] [PASSED] 0x468A (ALDERLAKE_S)
[18:59:48] [PASSED] 0x468B (ALDERLAKE_S)
[18:59:48] [PASSED] 0x4690 (ALDERLAKE_S)
[18:59:48] [PASSED] 0x4692 (ALDERLAKE_S)
[18:59:48] [PASSED] 0x4693 (ALDERLAKE_S)
[18:59:48] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46AA (ALDERLAKE_P)
[18:59:48] [PASSED] 0x462A (ALDERLAKE_P)
[18:59:48] [PASSED] 0x4626 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x4628 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[18:59:48] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:59:48] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:59:48] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:59:48] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:59:48] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:59:48] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:59:48] [PASSED] 0xA721 (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA720 (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:59:48] [PASSED] 0xA780 (ALDERLAKE_S)
[18:59:48] [PASSED] 0xA781 (ALDERLAKE_S)
[18:59:48] [PASSED] 0xA782 (ALDERLAKE_S)
[18:59:48] [PASSED] 0xA783 (ALDERLAKE_S)
[18:59:48] [PASSED] 0xA788 (ALDERLAKE_S)
[18:59:48] [PASSED] 0xA789 (ALDERLAKE_S)
[18:59:48] [PASSED] 0xA78A (ALDERLAKE_S)
[18:59:48] [PASSED] 0xA78B (ALDERLAKE_S)
[18:59:48] [PASSED] 0x4905 (DG1)
[18:59:48] [PASSED] 0x4906 (DG1)
[18:59:48] [PASSED] 0x4907 (DG1)
[18:59:48] [PASSED] 0x4908 (DG1)
[18:59:48] [PASSED] 0x4909 (DG1)
[18:59:48] [PASSED] 0x56C0 (DG2)
[18:59:48] [PASSED] 0x56C2 (DG2)
[18:59:48] [PASSED] 0x56C1 (DG2)
[18:59:48] [PASSED] 0x7D51 (METEORLAKE)
[18:59:48] [PASSED] 0x7DD1 (METEORLAKE)
[18:59:48] [PASSED] 0x7D41 (METEORLAKE)
[18:59:48] [PASSED] 0x7D67 (METEORLAKE)
[18:59:48] [PASSED] 0xB640 (METEORLAKE)
[18:59:48] [PASSED] 0x56A0 (DG2)
[18:59:48] [PASSED] 0x56A1 (DG2)
[18:59:48] [PASSED] 0x56A2 (DG2)
[18:59:48] [PASSED] 0x56BE (DG2)
[18:59:48] [PASSED] 0x56BF (DG2)
[18:59:48] [PASSED] 0x5690 (DG2)
[18:59:48] [PASSED] 0x5691 (DG2)
[18:59:48] [PASSED] 0x5692 (DG2)
[18:59:48] [PASSED] 0x56A5 (DG2)
[18:59:48] [PASSED] 0x56A6 (DG2)
[18:59:48] [PASSED] 0x56B0 (DG2)
[18:59:48] [PASSED] 0x56B1 (DG2)
[18:59:48] [PASSED] 0x56BA (DG2)
[18:59:48] [PASSED] 0x56BB (DG2)
[18:59:48] [PASSED] 0x56BC (DG2)
[18:59:48] [PASSED] 0x56BD (DG2)
[18:59:48] [PASSED] 0x5693 (DG2)
[18:59:48] [PASSED] 0x5694 (DG2)
[18:59:48] [PASSED] 0x5695 (DG2)
[18:59:48] [PASSED] 0x56A3 (DG2)
[18:59:48] [PASSED] 0x56A4 (DG2)
[18:59:48] [PASSED] 0x56B2 (DG2)
[18:59:48] [PASSED] 0x56B3 (DG2)
[18:59:48] [PASSED] 0x5696 (DG2)
[18:59:48] [PASSED] 0x5697 (DG2)
[18:59:48] [PASSED] 0xB69 (PVC)
[18:59:48] [PASSED] 0xB6E (PVC)
[18:59:48] [PASSED] 0xBD4 (PVC)
[18:59:48] [PASSED] 0xBD5 (PVC)
[18:59:48] [PASSED] 0xBD6 (PVC)
[18:59:48] [PASSED] 0xBD7 (PVC)
[18:59:48] [PASSED] 0xBD8 (PVC)
[18:59:48] [PASSED] 0xBD9 (PVC)
[18:59:48] [PASSED] 0xBDA (PVC)
[18:59:48] [PASSED] 0xBDB (PVC)
[18:59:48] [PASSED] 0xBE0 (PVC)
[18:59:48] [PASSED] 0xBE1 (PVC)
[18:59:48] [PASSED] 0xBE5 (PVC)
[18:59:48] [PASSED] 0x7D40 (METEORLAKE)
[18:59:48] [PASSED] 0x7D45 (METEORLAKE)
[18:59:48] [PASSED] 0x7D55 (METEORLAKE)
[18:59:48] [PASSED] 0x7D60 (METEORLAKE)
[18:59:48] [PASSED] 0x7DD5 (METEORLAKE)
[18:59:48] [PASSED] 0x6420 (LUNARLAKE)
[18:59:48] [PASSED] 0x64A0 (LUNARLAKE)
[18:59:48] [PASSED] 0x64B0 (LUNARLAKE)
[18:59:48] [PASSED] 0xE202 (BATTLEMAGE)
[18:59:48] [PASSED] 0xE209 (BATTLEMAGE)
[18:59:48] [PASSED] 0xE20B (BATTLEMAGE)
[18:59:48] [PASSED] 0xE20C (BATTLEMAGE)
[18:59:48] [PASSED] 0xE20D (BATTLEMAGE)
[18:59:48] [PASSED] 0xE210 (BATTLEMAGE)
[18:59:48] [PASSED] 0xE211 (BATTLEMAGE)
[18:59:48] [PASSED] 0xE212 (BATTLEMAGE)
[18:59:48] [PASSED] 0xE216 (BATTLEMAGE)
[18:59:48] [PASSED] 0xE220 (BATTLEMAGE)
[18:59:48] [PASSED] 0xE221 (BATTLEMAGE)
[18:59:48] [PASSED] 0xE222 (BATTLEMAGE)
[18:59:48] [PASSED] 0xE223 (BATTLEMAGE)
[18:59:48] [PASSED] 0xB080 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB081 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB082 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB083 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB084 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB085 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB086 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB087 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB08F (PANTHERLAKE)
[18:59:48] [PASSED] 0xB090 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:59:48] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:59:48] [PASSED] 0xD740 (NOVALAKE_S)
[18:59:48] [PASSED] 0xD741 (NOVALAKE_S)
[18:59:48] [PASSED] 0xD742 (NOVALAKE_S)
[18:59:48] [PASSED] 0xD743 (NOVALAKE_S)
[18:59:48] [PASSED] 0xD744 (NOVALAKE_S)
[18:59:48] [PASSED] 0xD745 (NOVALAKE_S)
[18:59:48] [PASSED] 0x674C (CRESCENTISLAND)
[18:59:48] [PASSED] 0xFD80 (PANTHERLAKE)
[18:59:48] [PASSED] 0xFD81 (PANTHERLAKE)
[18:59:48] =============== [PASSED] check_platform_desc ===============
[18:59:48] ===================== [PASSED] xe_pci ======================
[18:59:48] =================== xe_rtp (2 subtests) ====================
[18:59:48] =============== xe_rtp_process_to_sr_tests ================
[18:59:48] [PASSED] coalesce-same-reg
[18:59:48] [PASSED] no-match-no-add
[18:59:48] [PASSED] match-or
[18:59:48] [PASSED] match-or-xfail
[18:59:48] [PASSED] no-match-no-add-multiple-rules
[18:59:48] [PASSED] two-regs-two-entries
[18:59:48] [PASSED] clr-one-set-other
[18:59:48] [PASSED] set-field
[18:59:48] [PASSED] conflict-duplicate
[18:59:48] [PASSED] conflict-not-disjoint
[18:59:48] [PASSED] conflict-reg-type
[18:59:48] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:59:48] ================== xe_rtp_process_tests ===================
[18:59:48] [PASSED] active1
[18:59:48] [PASSED] active2
[18:59:48] [PASSED] active-inactive
[18:59:48] [PASSED] inactive-active
[18:59:48] [PASSED] inactive-1st_or_active-inactive
[18:59:48] [PASSED] inactive-2nd_or_active-inactive
[18:59:48] [PASSED] inactive-last_or_active-inactive
[18:59:48] [PASSED] inactive-no_or_active-inactive
[18:59:48] ============== [PASSED] xe_rtp_process_tests ===============
[18:59:48] ===================== [PASSED] xe_rtp ======================
[18:59:48] ==================== xe_wa (1 subtest) =====================
[18:59:48] ======================== xe_wa_gt =========================
[18:59:48] [PASSED] TIGERLAKE B0
[18:59:48] [PASSED] DG1 A0
[18:59:48] [PASSED] DG1 B0
[18:59:48] [PASSED] ALDERLAKE_S A0
[18:59:48] [PASSED] ALDERLAKE_S B0
[18:59:48] [PASSED] ALDERLAKE_S C0
[18:59:48] [PASSED] ALDERLAKE_S D0
[18:59:48] [PASSED] ALDERLAKE_P A0
[18:59:48] [PASSED] ALDERLAKE_P B0
[18:59:48] [PASSED] ALDERLAKE_P C0
[18:59:48] [PASSED] ALDERLAKE_S RPLS D0
[18:59:48] [PASSED] ALDERLAKE_P RPLU E0
[18:59:48] [PASSED] DG2 G10 C0
[18:59:48] [PASSED] DG2 G11 B1
[18:59:48] [PASSED] DG2 G12 A1
[18:59:48] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:59:48] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:59:48] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:59:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:59:48] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:59:48] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:59:48] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:59:48] ==================== [PASSED] xe_wa_gt =====================
[18:59:48] ====================== [PASSED] xe_wa ======================
[18:59:48] ============================================================
[18:59:48] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[18:59:48] Elapsed time: 35.793s total, 4.253s configuring, 31.069s building, 0.453s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:59:48] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:59:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:00:15] Starting KUnit Kernel (1/1)...
[19:00:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:00:15] ============ drm_test_pick_cmdline (2 subtests) ============
[19:00:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[19:00:15] =============== drm_test_pick_cmdline_named ===============
[19:00:15] [PASSED] NTSC
[19:00:15] [PASSED] NTSC-J
[19:00:15] [PASSED] PAL
[19:00:15] [PASSED] PAL-M
[19:00:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[19:00:15] ============== [PASSED] drm_test_pick_cmdline ==============
[19:00:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[19:00:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[19:00:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[19:00:15] =========== drm_validate_clone_mode (2 subtests) ===========
[19:00:15] ============== drm_test_check_in_clone_mode ===============
[19:00:15] [PASSED] in_clone_mode
[19:00:15] [PASSED] not_in_clone_mode
[19:00:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[19:00:15] =============== drm_test_check_valid_clones ===============
[19:00:15] [PASSED] not_in_clone_mode
[19:00:15] [PASSED] valid_clone
[19:00:15] [PASSED] invalid_clone
[19:00:15] =========== [PASSED] drm_test_check_valid_clones ===========
[19:00:15] ============= [PASSED] drm_validate_clone_mode =============
[19:00:15] ============= drm_validate_modeset (1 subtest) =============
[19:00:15] [PASSED] drm_test_check_connector_changed_modeset
[19:00:15] ============== [PASSED] drm_validate_modeset ===============
[19:00:15] ====== drm_test_bridge_get_current_state (2 subtests) ======
[19:00:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[19:00:15] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[19:00:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[19:00:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[19:00:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[19:00:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[19:00:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[19:00:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[19:00:15] ============== drm_bridge_alloc (2 subtests) ===============
[19:00:15] [PASSED] drm_test_drm_bridge_alloc_basic
[19:00:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[19:00:15] ================ [PASSED] drm_bridge_alloc =================
[19:00:15] ================== drm_buddy (8 subtests) ==================
[19:00:15] [PASSED] drm_test_buddy_alloc_limit
[19:00:15] [PASSED] drm_test_buddy_alloc_optimistic
[19:00:15] [PASSED] drm_test_buddy_alloc_pessimistic
[19:00:15] [PASSED] drm_test_buddy_alloc_pathological
[19:00:15] [PASSED] drm_test_buddy_alloc_contiguous
[19:00:15] [PASSED] drm_test_buddy_alloc_clear
[19:00:15] [PASSED] drm_test_buddy_alloc_range_bias
[19:00:15] [PASSED] drm_test_buddy_fragmentation_performance
[19:00:15] ==================== [PASSED] drm_buddy ====================
[19:00:15] ============= drm_cmdline_parser (40 subtests) =============
[19:00:15] [PASSED] drm_test_cmdline_force_d_only
[19:00:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[19:00:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[19:00:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[19:00:15] [PASSED] drm_test_cmdline_force_e_only
[19:00:15] [PASSED] drm_test_cmdline_res
[19:00:15] [PASSED] drm_test_cmdline_res_vesa
[19:00:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[19:00:15] [PASSED] drm_test_cmdline_res_rblank
[19:00:15] [PASSED] drm_test_cmdline_res_bpp
[19:00:15] [PASSED] drm_test_cmdline_res_refresh
[19:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[19:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[19:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[19:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[19:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[19:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[19:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[19:00:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[19:00:15] [PASSED] drm_test_cmdline_res_margins_force_on
[19:00:15] [PASSED] drm_test_cmdline_res_vesa_margins
[19:00:15] [PASSED] drm_test_cmdline_name
[19:00:15] [PASSED] drm_test_cmdline_name_bpp
[19:00:15] [PASSED] drm_test_cmdline_name_option
[19:00:15] [PASSED] drm_test_cmdline_name_bpp_option
[19:00:15] [PASSED] drm_test_cmdline_rotate_0
[19:00:15] [PASSED] drm_test_cmdline_rotate_90
[19:00:15] [PASSED] drm_test_cmdline_rotate_180
[19:00:15] [PASSED] drm_test_cmdline_rotate_270
[19:00:15] [PASSED] drm_test_cmdline_hmirror
[19:00:15] [PASSED] drm_test_cmdline_vmirror
[19:00:15] [PASSED] drm_test_cmdline_margin_options
[19:00:15] [PASSED] drm_test_cmdline_multiple_options
[19:00:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[19:00:15] [PASSED] drm_test_cmdline_extra_and_option
[19:00:15] [PASSED] drm_test_cmdline_freestanding_options
[19:00:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[19:00:15] [PASSED] drm_test_cmdline_panel_orientation
[19:00:15] ================ drm_test_cmdline_invalid =================
[19:00:15] [PASSED] margin_only
[19:00:15] [PASSED] interlace_only
[19:00:15] [PASSED] res_missing_x
[19:00:15] [PASSED] res_missing_y
[19:00:15] [PASSED] res_bad_y
[19:00:15] [PASSED] res_missing_y_bpp
[19:00:15] [PASSED] res_bad_bpp
[19:00:15] [PASSED] res_bad_refresh
[19:00:15] [PASSED] res_bpp_refresh_force_on_off
[19:00:15] [PASSED] res_invalid_mode
[19:00:15] [PASSED] res_bpp_wrong_place_mode
[19:00:15] [PASSED] name_bpp_refresh
[19:00:15] [PASSED] name_refresh
[19:00:15] [PASSED] name_refresh_wrong_mode
[19:00:15] [PASSED] name_refresh_invalid_mode
[19:00:15] [PASSED] rotate_multiple
[19:00:15] [PASSED] rotate_invalid_val
[19:00:15] [PASSED] rotate_truncated
[19:00:15] [PASSED] invalid_option
[19:00:15] [PASSED] invalid_tv_option
[19:00:15] [PASSED] truncated_tv_option
[19:00:15] ============ [PASSED] drm_test_cmdline_invalid =============
[19:00:15] =============== drm_test_cmdline_tv_options ===============
[19:00:15] [PASSED] NTSC
[19:00:15] [PASSED] NTSC_443
[19:00:15] [PASSED] NTSC_J
[19:00:15] [PASSED] PAL
[19:00:15] [PASSED] PAL_M
[19:00:15] [PASSED] PAL_N
[19:00:15] [PASSED] SECAM
[19:00:15] [PASSED] MONO_525
[19:00:15] [PASSED] MONO_625
[19:00:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[19:00:15] =============== [PASSED] drm_cmdline_parser ================
[19:00:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[19:00:15] [PASSED] drm_test_connector_hdmi_init_valid
[19:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[19:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[19:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[19:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[19:00:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[19:00:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[19:00:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[19:00:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:00:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[19:00:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[19:00:15] [PASSED] supported_formats=0x3 yuv420_allowed=1
[19:00:15] [PASSED] supported_formats=0x3 yuv420_allowed=0
[19:00:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:00:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[19:00:15] [PASSED] drm_test_connector_hdmi_init_null_product
[19:00:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[19:00:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[19:00:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[19:00:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[19:00:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[19:00:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[19:00:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[19:00:15] ========= drm_test_connector_hdmi_init_type_valid =========
[19:00:15] [PASSED] HDMI-A
[19:00:15] [PASSED] HDMI-B
[19:00:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[19:00:15] ======== drm_test_connector_hdmi_init_type_invalid ========
[19:00:15] [PASSED] Unknown
[19:00:15] [PASSED] VGA
[19:00:15] [PASSED] DVI-I
[19:00:15] [PASSED] DVI-D
[19:00:15] [PASSED] DVI-A
[19:00:15] [PASSED] Composite
[19:00:15] [PASSED] SVIDEO
[19:00:15] [PASSED] LVDS
[19:00:15] [PASSED] Component
[19:00:15] [PASSED] DIN
[19:00:15] [PASSED] DP
[19:00:15] [PASSED] TV
[19:00:15] [PASSED] eDP
[19:00:15] [PASSED] Virtual
[19:00:15] [PASSED] DSI
[19:00:15] [PASSED] DPI
[19:00:15] [PASSED] Writeback
[19:00:15] [PASSED] SPI
[19:00:15] [PASSED] USB
[19:00:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[19:00:15] ============ [PASSED] drmm_connector_hdmi_init =============
[19:00:15] ============= drmm_connector_init (3 subtests) =============
[19:00:15] [PASSED] drm_test_drmm_connector_init
[19:00:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[19:00:15] ========= drm_test_drmm_connector_init_type_valid =========
[19:00:15] [PASSED] Unknown
[19:00:15] [PASSED] VGA
[19:00:15] [PASSED] DVI-I
[19:00:15] [PASSED] DVI-D
[19:00:15] [PASSED] DVI-A
[19:00:15] [PASSED] Composite
[19:00:15] [PASSED] SVIDEO
[19:00:15] [PASSED] LVDS
[19:00:15] [PASSED] Component
[19:00:15] [PASSED] DIN
[19:00:15] [PASSED] DP
[19:00:15] [PASSED] HDMI-A
[19:00:15] [PASSED] HDMI-B
[19:00:15] [PASSED] TV
[19:00:15] [PASSED] eDP
[19:00:15] [PASSED] Virtual
[19:00:15] [PASSED] DSI
[19:00:15] [PASSED] DPI
[19:00:15] [PASSED] Writeback
[19:00:15] [PASSED] SPI
[19:00:15] [PASSED] USB
[19:00:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[19:00:15] =============== [PASSED] drmm_connector_init ===============
[19:00:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_init
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[19:00:15] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[19:00:15] [PASSED] Unknown
[19:00:15] [PASSED] VGA
[19:00:15] [PASSED] DVI-I
[19:00:15] [PASSED] DVI-D
[19:00:15] [PASSED] DVI-A
[19:00:15] [PASSED] Composite
[19:00:15] [PASSED] SVIDEO
[19:00:15] [PASSED] LVDS
[19:00:15] [PASSED] Component
[19:00:15] [PASSED] DIN
[19:00:15] [PASSED] DP
[19:00:15] [PASSED] HDMI-A
[19:00:15] [PASSED] HDMI-B
[19:00:15] [PASSED] TV
[19:00:15] [PASSED] eDP
[19:00:15] [PASSED] Virtual
[19:00:15] [PASSED] DSI
[19:00:15] [PASSED] DPI
[19:00:15] [PASSED] Writeback
[19:00:15] [PASSED] SPI
[19:00:15] [PASSED] USB
[19:00:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[19:00:15] ======== drm_test_drm_connector_dynamic_init_name =========
[19:00:15] [PASSED] Unknown
[19:00:15] [PASSED] VGA
[19:00:15] [PASSED] DVI-I
[19:00:15] [PASSED] DVI-D
[19:00:15] [PASSED] DVI-A
[19:00:15] [PASSED] Composite
[19:00:15] [PASSED] SVIDEO
[19:00:15] [PASSED] LVDS
[19:00:15] [PASSED] Component
[19:00:15] [PASSED] DIN
[19:00:15] [PASSED] DP
[19:00:15] [PASSED] HDMI-A
[19:00:15] [PASSED] HDMI-B
[19:00:15] [PASSED] TV
[19:00:15] [PASSED] eDP
[19:00:15] [PASSED] Virtual
[19:00:15] [PASSED] DSI
[19:00:15] [PASSED] DPI
[19:00:15] [PASSED] Writeback
[19:00:15] [PASSED] SPI
[19:00:15] [PASSED] USB
[19:00:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[19:00:15] =========== [PASSED] drm_connector_dynamic_init ============
[19:00:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[19:00:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[19:00:15] ======= drm_connector_dynamic_register (7 subtests) ========
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[19:00:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[19:00:15] ========= [PASSED] drm_connector_dynamic_register ==========
[19:00:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[19:00:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[19:00:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[19:00:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[19:00:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[19:00:15] ========== drm_test_get_tv_mode_from_name_valid ===========
[19:00:15] [PASSED] NTSC
[19:00:15] [PASSED] NTSC-443
[19:00:15] [PASSED] NTSC-J
[19:00:15] [PASSED] PAL
[19:00:15] [PASSED] PAL-M
[19:00:15] [PASSED] PAL-N
[19:00:15] [PASSED] SECAM
[19:00:15] [PASSED] Mono
[19:00:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[19:00:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[19:00:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[19:00:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[19:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[19:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[19:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[19:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[19:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[19:00:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[19:00:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[19:00:15] [PASSED] VIC 96
[19:00:15] [PASSED] VIC 97
[19:00:15] [PASSED] VIC 101
[19:00:15] [PASSED] VIC 102
[19:00:15] [PASSED] VIC 106
[19:00:15] [PASSED] VIC 107
[19:00:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[19:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[19:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[19:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[19:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[19:00:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[19:00:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[19:00:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[19:00:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[19:00:15] [PASSED] Automatic
[19:00:15] [PASSED] Full
[19:00:15] [PASSED] Limited 16:235
[19:00:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[19:00:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[19:00:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[19:00:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[19:00:15] === drm_test_drm_hdmi_connector_get_output_format_name ====
[19:00:15] [PASSED] RGB
[19:00:15] [PASSED] YUV 4:2:0
[19:00:15] [PASSED] YUV 4:2:2
[19:00:15] [PASSED] YUV 4:4:4
[19:00:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[19:00:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[19:00:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[19:00:15] ============= drm_damage_helper (21 subtests) ==============
[19:00:15] [PASSED] drm_test_damage_iter_no_damage
[19:00:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[19:00:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[19:00:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[19:00:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[19:00:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[19:00:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[19:00:15] [PASSED] drm_test_damage_iter_simple_damage
[19:00:15] [PASSED] drm_test_damage_iter_single_damage
[19:00:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[19:00:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[19:00:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[19:00:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[19:00:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[19:00:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[19:00:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[19:00:15] [PASSED] drm_test_damage_iter_damage
[19:00:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[19:00:15] [PASSED] drm_test_damage_iter_damage_one_outside
[19:00:15] [PASSED] drm_test_damage_iter_damage_src_moved
[19:00:15] [PASSED] drm_test_damage_iter_damage_not_visible
[19:00:15] ================ [PASSED] drm_damage_helper ================
[19:00:15] ============== drm_dp_mst_helper (3 subtests) ==============
[19:00:15] ============== drm_test_dp_mst_calc_pbn_mode ==============
[19:00:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[19:00:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[19:00:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[19:00:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[19:00:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[19:00:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[19:00:15] ============== drm_test_dp_mst_calc_pbn_div ===============
[19:00:15] [PASSED] Link rate 2000000 lane count 4
[19:00:15] [PASSED] Link rate 2000000 lane count 2
[19:00:15] [PASSED] Link rate 2000000 lane count 1
[19:00:15] [PASSED] Link rate 1350000 lane count 4
[19:00:15] [PASSED] Link rate 1350000 lane count 2
[19:00:15] [PASSED] Link rate 1350000 lane count 1
[19:00:15] [PASSED] Link rate 1000000 lane count 4
[19:00:15] [PASSED] Link rate 1000000 lane count 2
[19:00:15] [PASSED] Link rate 1000000 lane count 1
[19:00:15] [PASSED] Link rate 810000 lane count 4
[19:00:15] [PASSED] Link rate 810000 lane count 2
[19:00:15] [PASSED] Link rate 810000 lane count 1
[19:00:15] [PASSED] Link rate 540000 lane count 4
[19:00:15] [PASSED] Link rate 540000 lane count 2
[19:00:15] [PASSED] Link rate 540000 lane count 1
[19:00:15] [PASSED] Link rate 270000 lane count 4
[19:00:15] [PASSED] Link rate 270000 lane count 2
[19:00:15] [PASSED] Link rate 270000 lane count 1
[19:00:15] [PASSED] Link rate 162000 lane count 4
[19:00:15] [PASSED] Link rate 162000 lane count 2
[19:00:15] [PASSED] Link rate 162000 lane count 1
[19:00:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[19:00:15] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[19:00:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[19:00:15] [PASSED] DP_POWER_UP_PHY with port number
[19:00:15] [PASSED] DP_POWER_DOWN_PHY with port number
[19:00:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[19:00:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[19:00:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[19:00:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[19:00:15] [PASSED] DP_QUERY_PAYLOAD with port number
[19:00:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[19:00:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[19:00:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[19:00:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[19:00:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[19:00:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[19:00:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[19:00:15] [PASSED] DP_REMOTE_I2C_READ with port number
[19:00:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[19:00:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[19:00:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[19:00:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[19:00:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[19:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[19:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[19:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[19:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[19:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[19:00:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[19:00:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[19:00:15] ================ [PASSED] drm_dp_mst_helper ================
[19:00:15] ================== drm_exec (7 subtests) ===================
[19:00:15] [PASSED] sanitycheck
[19:00:15] [PASSED] test_lock
[19:00:15] [PASSED] test_lock_unlock
[19:00:15] [PASSED] test_duplicates
[19:00:15] [PASSED] test_prepare
[19:00:15] [PASSED] test_prepare_array
[19:00:15] [PASSED] test_multiple_loops
[19:00:15] ==================== [PASSED] drm_exec =====================
[19:00:15] =========== drm_format_helper_test (17 subtests) ===========
[19:00:15] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[19:00:15] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[19:00:15] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[19:00:15] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[19:00:15] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[19:00:15] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[19:00:15] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[19:00:15] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[19:00:15] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[19:00:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[19:00:15] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[19:00:15] ============== drm_test_fb_xrgb8888_to_mono ===============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[19:00:15] ==================== drm_test_fb_swab =====================
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ================ [PASSED] drm_test_fb_swab =================
[19:00:15] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[19:00:15] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[19:00:15] [PASSED] single_pixel_source_buffer
[19:00:15] [PASSED] single_pixel_clip_rectangle
[19:00:15] [PASSED] well_known_colors
[19:00:15] [PASSED] destination_pitch
[19:00:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[19:00:15] ================= drm_test_fb_clip_offset =================
[19:00:15] [PASSED] pass through
[19:00:15] [PASSED] horizontal offset
[19:00:15] [PASSED] vertical offset
[19:00:15] [PASSED] horizontal and vertical offset
[19:00:15] [PASSED] horizontal offset (custom pitch)
[19:00:15] [PASSED] vertical offset (custom pitch)
[19:00:15] [PASSED] horizontal and vertical offset (custom pitch)
[19:00:15] ============= [PASSED] drm_test_fb_clip_offset =============
[19:00:15] =================== drm_test_fb_memcpy ====================
[19:00:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[19:00:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[19:00:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[19:00:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[19:00:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[19:00:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[19:00:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[19:00:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[19:00:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[19:00:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[19:00:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[19:00:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[19:00:15] =============== [PASSED] drm_test_fb_memcpy ================
[19:00:15] ============= [PASSED] drm_format_helper_test ==============
[19:00:15] ================= drm_format (18 subtests) =================
[19:00:15] [PASSED] drm_test_format_block_width_invalid
[19:00:15] [PASSED] drm_test_format_block_width_one_plane
[19:00:15] [PASSED] drm_test_format_block_width_two_plane
[19:00:15] [PASSED] drm_test_format_block_width_three_plane
[19:00:15] [PASSED] drm_test_format_block_width_tiled
[19:00:15] [PASSED] drm_test_format_block_height_invalid
[19:00:15] [PASSED] drm_test_format_block_height_one_plane
[19:00:15] [PASSED] drm_test_format_block_height_two_plane
[19:00:15] [PASSED] drm_test_format_block_height_three_plane
[19:00:15] [PASSED] drm_test_format_block_height_tiled
[19:00:15] [PASSED] drm_test_format_min_pitch_invalid
[19:00:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[19:00:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[19:00:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[19:00:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[19:00:15] [PASSED] drm_test_format_min_pitch_two_plane
[19:00:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[19:00:15] [PASSED] drm_test_format_min_pitch_tiled
[19:00:15] =================== [PASSED] drm_format ====================
[19:00:15] ============== drm_framebuffer (10 subtests) ===============
[19:00:15] ========== drm_test_framebuffer_check_src_coords ==========
[19:00:15] [PASSED] Success: source fits into fb
[19:00:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[19:00:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[19:00:15] [PASSED] Fail: overflowing fb with source width
[19:00:15] [PASSED] Fail: overflowing fb with source height
[19:00:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[19:00:15] [PASSED] drm_test_framebuffer_cleanup
[19:00:15] =============== drm_test_framebuffer_create ===============
[19:00:15] [PASSED] ABGR8888 normal sizes
[19:00:15] [PASSED] ABGR8888 max sizes
[19:00:15] [PASSED] ABGR8888 pitch greater than min required
[19:00:15] [PASSED] ABGR8888 pitch less than min required
[19:00:15] [PASSED] ABGR8888 Invalid width
[19:00:15] [PASSED] ABGR8888 Invalid buffer handle
[19:00:15] [PASSED] No pixel format
[19:00:15] [PASSED] ABGR8888 Width 0
[19:00:15] [PASSED] ABGR8888 Height 0
[19:00:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[19:00:15] [PASSED] ABGR8888 Large buffer offset
[19:00:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[19:00:15] [PASSED] ABGR8888 Invalid flag
[19:00:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[19:00:15] [PASSED] ABGR8888 Valid buffer modifier
[19:00:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[19:00:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[19:00:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[19:00:15] [PASSED] NV12 Normal sizes
[19:00:15] [PASSED] NV12 Max sizes
[19:00:15] [PASSED] NV12 Invalid pitch
[19:00:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[19:00:15] [PASSED] NV12 different modifier per-plane
[19:00:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[19:00:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[19:00:15] [PASSED] NV12 Modifier for inexistent plane
[19:00:15] [PASSED] NV12 Handle for inexistent plane
[19:00:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[19:00:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[19:00:15] [PASSED] YVU420 Normal sizes
[19:00:15] [PASSED] YVU420 Max sizes
[19:00:15] [PASSED] YVU420 Invalid pitch
[19:00:15] [PASSED] YVU420 Different pitches
[19:00:15] [PASSED] YVU420 Different buffer offsets/pitches
[19:00:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[19:00:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[19:00:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[19:00:15] [PASSED] YVU420 Valid modifier
[19:00:15] [PASSED] YVU420 Different modifiers per plane
[19:00:15] [PASSED] YVU420 Modifier for inexistent plane
[19:00:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[19:00:15] [PASSED] X0L2 Normal sizes
[19:00:15] [PASSED] X0L2 Max sizes
[19:00:15] [PASSED] X0L2 Invalid pitch
[19:00:15] [PASSED] X0L2 Pitch greater than minimum required
[19:00:15] [PASSED] X0L2 Handle for inexistent plane
[19:00:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[19:00:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[19:00:15] [PASSED] X0L2 Valid modifier
[19:00:15] [PASSED] X0L2 Modifier for inexistent plane
[19:00:15] =========== [PASSED] drm_test_framebuffer_create ===========
[19:00:15] [PASSED] drm_test_framebuffer_free
[19:00:15] [PASSED] drm_test_framebuffer_init
[19:00:15] [PASSED] drm_test_framebuffer_init_bad_format
[19:00:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[19:00:15] [PASSED] drm_test_framebuffer_lookup
[19:00:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[19:00:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[19:00:15] ================= [PASSED] drm_framebuffer =================
[19:00:15] ================ drm_gem_shmem (8 subtests) ================
[19:00:15] [PASSED] drm_gem_shmem_test_obj_create
[19:00:15] [PASSED] drm_gem_shmem_test_obj_create_private
[19:00:15] [PASSED] drm_gem_shmem_test_pin_pages
[19:00:15] [PASSED] drm_gem_shmem_test_vmap
[19:00:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[19:00:15] [PASSED] drm_gem_shmem_test_get_sg_table
[19:00:15] [PASSED] drm_gem_shmem_test_madvise
[19:00:15] [PASSED] drm_gem_shmem_test_purge
[19:00:15] ================== [PASSED] drm_gem_shmem ==================
[19:00:15] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[19:00:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[19:00:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[19:00:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[19:00:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[19:00:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[19:00:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[19:00:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[19:00:15] [PASSED] Automatic
[19:00:15] [PASSED] Full
[19:00:15] [PASSED] Limited 16:235
[19:00:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[19:00:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[19:00:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[19:00:15] [PASSED] drm_test_check_disable_connector
[19:00:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[19:00:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[19:00:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[19:00:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[19:00:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[19:00:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[19:00:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[19:00:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[19:00:15] [PASSED] drm_test_check_output_bpc_dvi
[19:00:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[19:00:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[19:00:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[19:00:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[19:00:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[19:00:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[19:00:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[19:00:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[19:00:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[19:00:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[19:00:15] [PASSED] drm_test_check_broadcast_rgb_value
[19:00:15] [PASSED] drm_test_check_bpc_8_value
[19:00:15] [PASSED] drm_test_check_bpc_10_value
[19:00:15] [PASSED] drm_test_check_bpc_12_value
[19:00:15] [PASSED] drm_test_check_format_value
[19:00:15] [PASSED] drm_test_check_tmds_char_value
[19:00:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[19:00:15] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[19:00:15] [PASSED] drm_test_check_mode_valid
[19:00:15] [PASSED] drm_test_check_mode_valid_reject
[19:00:15] [PASSED] drm_test_check_mode_valid_reject_rate
[19:00:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[19:00:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[19:00:15] ================= drm_managed (2 subtests) =================
[19:00:15] [PASSED] drm_test_managed_release_action
[19:00:15] [PASSED] drm_test_managed_run_action
[19:00:15] =================== [PASSED] drm_managed ===================
[19:00:15] =================== drm_mm (6 subtests) ====================
[19:00:15] [PASSED] drm_test_mm_init
[19:00:15] [PASSED] drm_test_mm_debug
[19:00:15] [PASSED] drm_test_mm_align32
[19:00:15] [PASSED] drm_test_mm_align64
[19:00:15] [PASSED] drm_test_mm_lowest
[19:00:15] [PASSED] drm_test_mm_highest
[19:00:15] ===================== [PASSED] drm_mm ======================
[19:00:15] ============= drm_modes_analog_tv (5 subtests) =============
[19:00:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[19:00:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[19:00:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[19:00:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[19:00:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[19:00:15] =============== [PASSED] drm_modes_analog_tv ===============
[19:00:15] ============== drm_plane_helper (2 subtests) ===============
[19:00:15] =============== drm_test_check_plane_state ================
[19:00:15] [PASSED] clipping_simple
[19:00:15] [PASSED] clipping_rotate_reflect
[19:00:15] [PASSED] positioning_simple
[19:00:15] [PASSED] upscaling
[19:00:15] [PASSED] downscaling
[19:00:15] [PASSED] rounding1
[19:00:15] [PASSED] rounding2
[19:00:15] [PASSED] rounding3
[19:00:15] [PASSED] rounding4
[19:00:15] =========== [PASSED] drm_test_check_plane_state ============
[19:00:15] =========== drm_test_check_invalid_plane_state ============
[19:00:15] [PASSED] positioning_invalid
[19:00:15] [PASSED] upscaling_invalid
[19:00:15] [PASSED] downscaling_invalid
[19:00:15] ======= [PASSED] drm_test_check_invalid_plane_state ========
[19:00:15] ================ [PASSED] drm_plane_helper =================
[19:00:15] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[19:00:15] ====== drm_test_connector_helper_tv_get_modes_check =======
[19:00:15] [PASSED] None
[19:00:15] [PASSED] PAL
[19:00:15] [PASSED] NTSC
[19:00:15] [PASSED] Both, NTSC Default
[19:00:15] [PASSED] Both, PAL Default
[19:00:15] [PASSED] Both, NTSC Default, with PAL on command-line
[19:00:15] [PASSED] Both, PAL Default, with NTSC on command-line
[19:00:15] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[19:00:15] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[19:00:15] ================== drm_rect (9 subtests) ===================
[19:00:15] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[19:00:15] [PASSED] drm_test_rect_clip_scaled_not_clipped
[19:00:15] [PASSED] drm_test_rect_clip_scaled_clipped
[19:00:15] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[19:00:15] ================= drm_test_rect_intersect =================
[19:00:15] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[19:00:15] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[19:00:15] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[19:00:15] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[19:00:15] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[19:00:15] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[19:00:15] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[19:00:15] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[19:00:15] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[19:00:15] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[19:00:15] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[19:00:15] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[19:00:15] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[19:00:15] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[19:00:15] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[19:00:15] ============= [PASSED] drm_test_rect_intersect =============
[19:00:15] ================ drm_test_rect_calc_hscale ================
[19:00:15] [PASSED] normal use
[19:00:15] [PASSED] out of max range
[19:00:15] [PASSED] out of min range
[19:00:15] [PASSED] zero dst
[19:00:15] [PASSED] negative src
[19:00:15] [PASSED] negative dst
[19:00:15] ============ [PASSED] drm_test_rect_calc_hscale ============
[19:00:15] ================ drm_test_rect_calc_vscale ================
[19:00:15] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[19:00:15] [PASSED] out of max range
[19:00:15] [PASSED] out of min range
[19:00:15] [PASSED] zero dst
[19:00:15] [PASSED] negative src
[19:00:15] [PASSED] negative dst
[19:00:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[19:00:15] ================== drm_test_rect_rotate ===================
[19:00:15] [PASSED] reflect-x
[19:00:15] [PASSED] reflect-y
[19:00:15] [PASSED] rotate-0
[19:00:15] [PASSED] rotate-90
[19:00:15] [PASSED] rotate-180
[19:00:15] [PASSED] rotate-270
[19:00:15] ============== [PASSED] drm_test_rect_rotate ===============
[19:00:15] ================ drm_test_rect_rotate_inv =================
[19:00:15] [PASSED] reflect-x
[19:00:15] [PASSED] reflect-y
[19:00:15] [PASSED] rotate-0
[19:00:15] [PASSED] rotate-90
[19:00:15] [PASSED] rotate-180
[19:00:15] [PASSED] rotate-270
[19:00:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[19:00:15] ==================== [PASSED] drm_rect =====================
[19:00:15] ============ drm_sysfb_modeset_test (1 subtest) ============
[19:00:15] ============ drm_test_sysfb_build_fourcc_list =============
[19:00:15] [PASSED] no native formats
[19:00:15] [PASSED] XRGB8888 as native format
[19:00:15] [PASSED] remove duplicates
[19:00:15] [PASSED] convert alpha formats
[19:00:15] [PASSED] random formats
[19:00:15] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[19:00:15] ============= [PASSED] drm_sysfb_modeset_test ==============
[19:00:15] ================== drm_fixp (2 subtests) ===================
[19:00:15] [PASSED] drm_test_int2fixp
[19:00:15] [PASSED] drm_test_sm2fixp
[19:00:15] ==================== [PASSED] drm_fixp =====================
[19:00:15] ============================================================
[19:00:15] Testing complete. Ran 624 tests: passed: 624
[19:00:15] Elapsed time: 27.228s total, 1.699s configuring, 25.061s building, 0.440s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[19:00:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:00:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:00:26] Starting KUnit Kernel (1/1)...
[19:00:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:00:26] ================= ttm_device (5 subtests) ==================
[19:00:26] [PASSED] ttm_device_init_basic
[19:00:26] [PASSED] ttm_device_init_multiple
[19:00:26] [PASSED] ttm_device_fini_basic
[19:00:26] [PASSED] ttm_device_init_no_vma_man
[19:00:26] ================== ttm_device_init_pools ==================
[19:00:26] [PASSED] No DMA allocations, no DMA32 required
[19:00:26] [PASSED] DMA allocations, DMA32 required
[19:00:26] [PASSED] No DMA allocations, DMA32 required
[19:00:26] [PASSED] DMA allocations, no DMA32 required
[19:00:26] ============== [PASSED] ttm_device_init_pools ==============
[19:00:26] =================== [PASSED] ttm_device ====================
[19:00:26] ================== ttm_pool (8 subtests) ===================
[19:00:26] ================== ttm_pool_alloc_basic ===================
[19:00:26] [PASSED] One page
[19:00:26] [PASSED] More than one page
[19:00:26] [PASSED] Above the allocation limit
[19:00:26] [PASSED] One page, with coherent DMA mappings enabled
[19:00:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:00:26] ============== [PASSED] ttm_pool_alloc_basic ===============
[19:00:26] ============== ttm_pool_alloc_basic_dma_addr ==============
[19:00:26] [PASSED] One page
[19:00:26] [PASSED] More than one page
[19:00:26] [PASSED] Above the allocation limit
[19:00:26] [PASSED] One page, with coherent DMA mappings enabled
[19:00:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:00:26] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[19:00:26] [PASSED] ttm_pool_alloc_order_caching_match
[19:00:26] [PASSED] ttm_pool_alloc_caching_mismatch
[19:00:26] [PASSED] ttm_pool_alloc_order_mismatch
[19:00:26] [PASSED] ttm_pool_free_dma_alloc
[19:00:26] [PASSED] ttm_pool_free_no_dma_alloc
[19:00:26] [PASSED] ttm_pool_fini_basic
[19:00:26] ==================== [PASSED] ttm_pool =====================
[19:00:26] ================ ttm_resource (8 subtests) =================
[19:00:26] ================= ttm_resource_init_basic =================
[19:00:26] [PASSED] Init resource in TTM_PL_SYSTEM
[19:00:26] [PASSED] Init resource in TTM_PL_VRAM
[19:00:26] [PASSED] Init resource in a private placement
[19:00:26] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[19:00:26] ============= [PASSED] ttm_resource_init_basic =============
[19:00:26] [PASSED] ttm_resource_init_pinned
[19:00:26] [PASSED] ttm_resource_fini_basic
[19:00:26] [PASSED] ttm_resource_manager_init_basic
[19:00:26] [PASSED] ttm_resource_manager_usage_basic
[19:00:26] [PASSED] ttm_resource_manager_set_used_basic
[19:00:26] [PASSED] ttm_sys_man_alloc_basic
[19:00:26] [PASSED] ttm_sys_man_free_basic
[19:00:26] ================== [PASSED] ttm_resource ===================
[19:00:26] =================== ttm_tt (15 subtests) ===================
[19:00:26] ==================== ttm_tt_init_basic ====================
[19:00:26] [PASSED] Page-aligned size
[19:00:26] [PASSED] Extra pages requested
[19:00:26] ================ [PASSED] ttm_tt_init_basic ================
[19:00:26] [PASSED] ttm_tt_init_misaligned
[19:00:26] [PASSED] ttm_tt_fini_basic
[19:00:26] [PASSED] ttm_tt_fini_sg
[19:00:26] [PASSED] ttm_tt_fini_shmem
[19:00:26] [PASSED] ttm_tt_create_basic
[19:00:26] [PASSED] ttm_tt_create_invalid_bo_type
[19:00:26] [PASSED] ttm_tt_create_ttm_exists
[19:00:26] [PASSED] ttm_tt_create_failed
[19:00:26] [PASSED] ttm_tt_destroy_basic
[19:00:26] [PASSED] ttm_tt_populate_null_ttm
[19:00:26] [PASSED] ttm_tt_populate_populated_ttm
[19:00:26] [PASSED] ttm_tt_unpopulate_basic
[19:00:26] [PASSED] ttm_tt_unpopulate_empty_ttm
[19:00:26] [PASSED] ttm_tt_swapin_basic
[19:00:26] ===================== [PASSED] ttm_tt ======================
[19:00:26] =================== ttm_bo (14 subtests) ===================
[19:00:26] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[19:00:26] [PASSED] Cannot be interrupted and sleeps
[19:00:26] [PASSED] Cannot be interrupted, locks straight away
[19:00:26] [PASSED] Can be interrupted, sleeps
[19:00:26] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[19:00:26] [PASSED] ttm_bo_reserve_locked_no_sleep
[19:00:26] [PASSED] ttm_bo_reserve_no_wait_ticket
[19:00:26] [PASSED] ttm_bo_reserve_double_resv
[19:00:26] [PASSED] ttm_bo_reserve_interrupted
[19:00:26] [PASSED] ttm_bo_reserve_deadlock
[19:00:26] [PASSED] ttm_bo_unreserve_basic
[19:00:26] [PASSED] ttm_bo_unreserve_pinned
[19:00:26] [PASSED] ttm_bo_unreserve_bulk
[19:00:26] [PASSED] ttm_bo_fini_basic
[19:00:26] [PASSED] ttm_bo_fini_shared_resv
[19:00:26] [PASSED] ttm_bo_pin_basic
[19:00:26] [PASSED] ttm_bo_pin_unpin_resource
[19:00:26] [PASSED] ttm_bo_multiple_pin_one_unpin
[19:00:26] ===================== [PASSED] ttm_bo ======================
[19:00:26] ============== ttm_bo_validate (21 subtests) ===============
[19:00:26] ============== ttm_bo_init_reserved_sys_man ===============
[19:00:26] [PASSED] Buffer object for userspace
[19:00:26] [PASSED] Kernel buffer object
[19:00:26] [PASSED] Shared buffer object
[19:00:26] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[19:00:26] ============== ttm_bo_init_reserved_mock_man ==============
[19:00:26] [PASSED] Buffer object for userspace
[19:00:26] [PASSED] Kernel buffer object
[19:00:26] [PASSED] Shared buffer object
[19:00:26] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[19:00:26] [PASSED] ttm_bo_init_reserved_resv
[19:00:26] ================== ttm_bo_validate_basic ==================
[19:00:26] [PASSED] Buffer object for userspace
[19:00:26] [PASSED] Kernel buffer object
[19:00:26] [PASSED] Shared buffer object
[19:00:26] ============== [PASSED] ttm_bo_validate_basic ==============
[19:00:26] [PASSED] ttm_bo_validate_invalid_placement
[19:00:26] ============= ttm_bo_validate_same_placement ==============
[19:00:26] [PASSED] System manager
[19:00:26] [PASSED] VRAM manager
[19:00:26] ========= [PASSED] ttm_bo_validate_same_placement ==========
[19:00:26] [PASSED] ttm_bo_validate_failed_alloc
[19:00:26] [PASSED] ttm_bo_validate_pinned
[19:00:26] [PASSED] ttm_bo_validate_busy_placement
[19:00:26] ================ ttm_bo_validate_multihop =================
[19:00:26] [PASSED] Buffer object for userspace
[19:00:26] [PASSED] Kernel buffer object
[19:00:26] [PASSED] Shared buffer object
[19:00:26] ============ [PASSED] ttm_bo_validate_multihop =============
[19:00:26] ========== ttm_bo_validate_no_placement_signaled ==========
[19:00:26] [PASSED] Buffer object in system domain, no page vector
[19:00:26] [PASSED] Buffer object in system domain with an existing page vector
[19:00:26] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[19:00:26] ======== ttm_bo_validate_no_placement_not_signaled ========
[19:00:26] [PASSED] Buffer object for userspace
[19:00:26] [PASSED] Kernel buffer object
[19:00:26] [PASSED] Shared buffer object
[19:00:26] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[19:00:26] [PASSED] ttm_bo_validate_move_fence_signaled
[19:00:26] ========= ttm_bo_validate_move_fence_not_signaled =========
[19:00:26] [PASSED] Waits for GPU
[19:00:26] [PASSED] Tries to lock straight away
[19:00:26] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[19:00:26] [PASSED] ttm_bo_validate_happy_evict
[19:00:26] [PASSED] ttm_bo_validate_all_pinned_evict
[19:00:26] [PASSED] ttm_bo_validate_allowed_only_evict
[19:00:26] [PASSED] ttm_bo_validate_deleted_evict
[19:00:26] [PASSED] ttm_bo_validate_busy_domain_evict
[19:00:26] [PASSED] ttm_bo_validate_evict_gutting
[19:00:26] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[19:00:26] ================= [PASSED] ttm_bo_validate =================
[19:00:26] ============================================================
[19:00:26] Testing complete. Ran 101 tests: passed: 101
[19:00:27] Elapsed time: 11.379s total, 1.689s configuring, 9.473s building, 0.186s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-02 18:39 [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe Jani Nikula
2025-12-02 19:00 ` ✓ CI.KUnit: success for " Patchwork
@ 2025-12-02 20:13 ` Patchwork
2025-12-02 21:24 ` [PATCH] " Imre Deak
` (2 subsequent siblings)
4 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2025-12-02 20:13 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1517 bytes --]
== Series Details ==
Series: drm/i915/dmc: fix an unlikely NULL pointer deference at probe
URL : https://patchwork.freedesktop.org/series/158395/
State : success
== Summary ==
CI Bug Log - changes from xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993_BAT -> xe-pw-158395v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-158395v1_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [FAIL][1] ([Intel XE#6519]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/bat-dg2-oem2/igt@xe_waitfence@engine.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/bat-dg2-oem2/igt@xe_waitfence@engine.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
Build changes
-------------
* Linux: xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993 -> xe-pw-158395v1
IGT_8649: f76e05461c8d5938856ed75ac8668640946f9ecd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993: f7bb20c7069861306b0e034a78dc6648d21f3993
xe-pw-158395v1: 158395v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/index.html
[-- Attachment #2: Type: text/html, Size: 2082 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-02 18:39 [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe Jani Nikula
2025-12-02 19:00 ` ✓ CI.KUnit: success for " Patchwork
2025-12-02 20:13 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-12-02 21:24 ` Imre Deak
2025-12-02 21:35 ` Imre Deak
2025-12-03 3:37 ` ✓ Xe.CI.Full: success for " Patchwork
2026-03-02 17:48 ` [PATCH v2] " Imre Deak
4 siblings, 1 reply; 15+ messages in thread
From: Imre Deak @ 2025-12-02 21:24 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe, Mohammed Thasleem, stable
On Tue, Dec 02, 2025 at 08:39:50PM +0200, Jani Nikula wrote:
> intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
> initialized, and dmc is thus NULL.
>
> That would be the case when the call path is
> intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
> gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
> intel_power_domains_init_hw() is called *before* intel_dmc_init().
>
> However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
> conditionally, depending on the current and target DC states. At probe,
> the target is disabled, but if DC6 is enabled, the function is called,
> and an oops follows. Apparently it's quite unlikely that DC6 is enabled
> at probe, as we haven't seen this failure mode before.
>
> Add NULL checks and switch the dmc->display references to just display.
>
> Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
> Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: <stable@vger.kernel.org> # v6.16+
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> ---
>
> Rare case, but this may also throw off the rc6 counting in debugfs when
> it does happen.
Yes, I missed the case where the driver is being loaded while DC6 is
enabled, this is what happens for the reporter:
i915 0000:00:04.0: [drm] *ERROR* DC state mismatch (0x0 -> 0x2)
That's odd, as DC6 requires the DMC firmware, which - if it's indeed
loaded by BIOS for instance - will be overwritten by the driver, not a
well specified sequence (even though the driver is trying to handle it
correctly by disabling any active firmware handler).
But as you pointed out this would also throw off the cooked-up DC6
counter tracking, so could instead the counter update depend on the
driver's DC state instead of the HW state? I.e. set
gen9_set_dc_state()/dc6_was_enabled,
intel_dmc_get_dc6_allowed_count()/dc6_enable if power_domains->dc_state
says that DC6 was indeed enabled by the driver (instead of checking the
HW state).
That would fix the reporter's oops when calling
intel_dmc_update_dc6_allowed_count(start_tracking=false), by not calling
it if the driver hasn't actually enabled DC6 and it would also keep the
DC6 counter tracking correct.
intel_dmc_update_dc6_allowed_count(start_tracking=true) would be also
guaranteed to be called only once the firmware is loaded, as until that
point enabling DC6 is blocked (by holding a reference on the DC_off
power well).
> ---
> drivers/gpu/drm/i915/display/intel_dmc.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index 2fb6fec6dc99..169bbbc91f6d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -1570,10 +1570,10 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display,
> struct intel_dmc *dmc = display_to_dmc(display);
> u32 dc5_cur_count;
>
> - if (DISPLAY_VER(dmc->display) < 14)
> + if (!dmc || DISPLAY_VER(display) < 14)
> return;
>
> - dc5_cur_count = intel_de_read(dmc->display, DG1_DMC_DEBUG_DC5_COUNT);
> + dc5_cur_count = intel_de_read(display, DG1_DMC_DEBUG_DC5_COUNT);
>
> if (!start_tracking)
> dmc->dc6_allowed.count += dc5_cur_count - dmc->dc6_allowed.dc5_start;
> @@ -1587,7 +1587,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
> struct intel_dmc *dmc = display_to_dmc(display);
> bool dc6_enabled;
>
> - if (DISPLAY_VER(display) < 14)
> + if (!dmc || DISPLAY_VER(display) < 14)
> return false;
>
> mutex_lock(&power_domains->lock);
> --
> 2.47.3
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-02 21:24 ` [PATCH] " Imre Deak
@ 2025-12-02 21:35 ` Imre Deak
2025-12-03 8:13 ` Jani Nikula
0 siblings, 1 reply; 15+ messages in thread
From: Imre Deak @ 2025-12-02 21:35 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe, Mohammed Thasleem, stable
On Tue, Dec 02, 2025 at 11:24:42PM +0200, Imre Deak wrote:
> On Tue, Dec 02, 2025 at 08:39:50PM +0200, Jani Nikula wrote:
> > intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
> > initialized, and dmc is thus NULL.
> >
> > That would be the case when the call path is
> > intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
> > gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
> > intel_power_domains_init_hw() is called *before* intel_dmc_init().
> >
> > However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
> > conditionally, depending on the current and target DC states. At probe,
> > the target is disabled, but if DC6 is enabled, the function is called,
> > and an oops follows. Apparently it's quite unlikely that DC6 is enabled
> > at probe, as we haven't seen this failure mode before.
> >
> > Add NULL checks and switch the dmc->display references to just display.
> >
> > Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
> > Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: <stable@vger.kernel.org> # v6.16+
> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >
> > ---
> >
> > Rare case, but this may also throw off the rc6 counting in debugfs when
> > it does happen.
>
> Yes, I missed the case where the driver is being loaded while DC6 is
> enabled, this is what happens for the reporter:
>
> i915 0000:00:04.0: [drm] *ERROR* DC state mismatch (0x0 -> 0x2)
>
> That's odd, as DC6 requires the DMC firmware, which - if it's indeed
> loaded by BIOS for instance - will be overwritten by the driver, not a
> well specified sequence (even though the driver is trying to handle it
> correctly by disabling any active firmware handler).
>
> But as you pointed out this would also throw off the cooked-up DC6
> counter tracking,
Actually the patch would keep the counter working, as the counter
wouldn't be updated in the dmc==NULL case. However I still think the
correct fix would be to check the correct DC state, which from the POV
of the counter tracking is the driver's version of the state, not the HW
state.
> so could instead the counter update depend on the
> driver's DC state instead of the HW state? I.e. set
> gen9_set_dc_state()/dc6_was_enabled,
> intel_dmc_get_dc6_allowed_count()/dc6_enable if power_domains->dc_state
> says that DC6 was indeed enabled by the driver (instead of checking the
> HW state).
>
> That would fix the reporter's oops when calling
> intel_dmc_update_dc6_allowed_count(start_tracking=false), by not calling
> it if the driver hasn't actually enabled DC6 and it would also keep the
> DC6 counter tracking correct.
>
> intel_dmc_update_dc6_allowed_count(start_tracking=true) would be also
> guaranteed to be called only once the firmware is loaded, as until that
> point enabling DC6 is blocked (by holding a reference on the DC_off
> power well).
>
> > ---
> > drivers/gpu/drm/i915/display/intel_dmc.c | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> > index 2fb6fec6dc99..169bbbc91f6d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> > @@ -1570,10 +1570,10 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display,
> > struct intel_dmc *dmc = display_to_dmc(display);
> > u32 dc5_cur_count;
> >
> > - if (DISPLAY_VER(dmc->display) < 14)
> > + if (!dmc || DISPLAY_VER(display) < 14)
> > return;
> >
> > - dc5_cur_count = intel_de_read(dmc->display, DG1_DMC_DEBUG_DC5_COUNT);
> > + dc5_cur_count = intel_de_read(display, DG1_DMC_DEBUG_DC5_COUNT);
> >
> > if (!start_tracking)
> > dmc->dc6_allowed.count += dc5_cur_count - dmc->dc6_allowed.dc5_start;
> > @@ -1587,7 +1587,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
> > struct intel_dmc *dmc = display_to_dmc(display);
> > bool dc6_enabled;
> >
> > - if (DISPLAY_VER(display) < 14)
> > + if (!dmc || DISPLAY_VER(display) < 14)
> > return false;
> >
> > mutex_lock(&power_domains->lock);
> > --
> > 2.47.3
> >
^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ Xe.CI.Full: success for drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-02 18:39 [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe Jani Nikula
` (2 preceding siblings ...)
2025-12-02 21:24 ` [PATCH] " Imre Deak
@ 2025-12-03 3:37 ` Patchwork
2026-03-02 17:48 ` [PATCH v2] " Imre Deak
4 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2025-12-03 3:37 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 28340 bytes --]
== Series Details ==
Series: drm/i915/dmc: fix an unlikely NULL pointer deference at probe
URL : https://patchwork.freedesktop.org/series/158395/
State : success
== Summary ==
CI Bug Log - changes from xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993_FULL -> xe-pw-158395v1_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-158395v1_FULL:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_sharpness_filter@filter-suspend@pipe-b-edp-1-suspend}:
- shard-lnl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-lnl-8/igt@kms_sharpness_filter@filter-suspend@pipe-b-edp-1-suspend.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-lnl-1/igt@kms_sharpness_filter@filter-suspend@pipe-b-edp-1-suspend.html
New tests
---------
New tests have been introduced between xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993_FULL and xe-pw-158395v1_FULL:
### New IGT tests (2) ###
* igt@kms_cursor_crc@cursor-random-128x128@pipe-a-dp-2:
- Statuses : 1 pass(s)
- Exec time: [4.70] s
* igt@kms_cursor_crc@cursor-random-128x128@pipe-d-dp-2:
- Statuses : 1 pass(s)
- Exec time: [4.39] s
Known issues
------------
Here are the changes found in xe-pw-158395v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-adlp: NOTRUN -> [SKIP][3] ([Intel XE#610])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][4] ([Intel XE#316]) +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-180:
- shard-adlp: NOTRUN -> [FAIL][5] ([Intel XE#1874])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_big_fb@x-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
- shard-adlp: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +4 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
- shard-adlp: NOTRUN -> [SKIP][7] ([Intel XE#2191])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-1-displays-1920x1080p:
- shard-adlp: NOTRUN -> [SKIP][8] ([Intel XE#367])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][9] ([Intel XE#455] / [Intel XE#787]) +17 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][10] ([Intel XE#787]) +26 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [PASS][11] -> [INCOMPLETE][12] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4:
- shard-dg2-set2: [PASS][13] -> [INCOMPLETE][14] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html
* igt@kms_chamelium_color@degamma:
- shard-adlp: NOTRUN -> [SKIP][15] ([Intel XE#306])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_frames@vga-frame-dump:
- shard-adlp: NOTRUN -> [SKIP][16] ([Intel XE#373]) +3 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_chamelium_frames@vga-frame-dump.html
* igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_dec_enc:
- shard-adlp: NOTRUN -> [SKIP][17] ([Intel XE#6704]) +3 other tests skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_colorop@plane-xr24-xr24-ctm_3x4_bt709_dec_enc.html
* igt@kms_colorop@plane-xr30-xr30-srgb_inv_eotf_lut-srgb_eotf_lut:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#6704])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-bmg-2/igt@kms_colorop@plane-xr30-xr30-srgb_inv_eotf_lut-srgb_eotf_lut.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-adlp: NOTRUN -> [SKIP][19] ([Intel XE#308])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][20] ([Intel XE#309])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
- shard-adlp: NOTRUN -> [SKIP][21] ([Intel XE#310]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-adlp: NOTRUN -> [SKIP][22] ([Intel XE#455]) +8 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-adlp: NOTRUN -> [FAIL][23] ([Intel XE#4683]) +3 other tests fail
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-adlp: NOTRUN -> [SKIP][24] ([Intel XE#651]) +5 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-plflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][25] ([Intel XE#651]) +2 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-render:
- shard-adlp: NOTRUN -> [SKIP][26] ([Intel XE#6312])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][27] ([Intel XE#653]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][28] ([Intel XE#653]) +6 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][29] ([Intel XE#656]) +13 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_hdr@bpc-switch:
- shard-bmg: [PASS][30] -> [ABORT][31] ([Intel XE#6740]) +1 other test abort
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-bmg-2/igt@kms_hdr@bpc-switch.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-bmg-5/igt@kms_hdr@bpc-switch.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-adlp: NOTRUN -> [SKIP][32] ([Intel XE#2925] / [Intel XE#3012])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-adlp: NOTRUN -> [SKIP][33] ([Intel XE#2925])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_plane_lowres@tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][34] ([Intel XE#455]) +2 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#5825]) +4 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-adlp: NOTRUN -> [SKIP][36] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@pr-primary-page-flip:
- shard-adlp: NOTRUN -> [SKIP][37] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +4 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_psr@pr-primary-page-flip.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-adlp: NOTRUN -> [SKIP][38] ([Intel XE#1406] / [Intel XE#2939] / [Intel XE#5585])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-adlp: NOTRUN -> [SKIP][39] ([Intel XE#3414])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#3414])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_vblank@ts-continuation-dpms-suspend:
- shard-bmg: NOTRUN -> [ABORT][41] ([Intel XE#6675]) +1 other test abort
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-bmg-2/igt@kms_vblank@ts-continuation-dpms-suspend.html
* igt@xe_ccs@block-copy-compressed-inc-dimension:
- shard-adlp: NOTRUN -> [SKIP][42] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@xe_ccs@block-copy-compressed-inc-dimension.html
* igt@xe_ccs@suspend-resume@xmajor-compressed-compfmt0-vram01-vram01:
- shard-bmg: [PASS][43] -> [ABORT][44] ([Intel XE#6675])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-bmg-5/igt@xe_ccs@suspend-resume@xmajor-compressed-compfmt0-vram01-vram01.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-bmg-1/igt@xe_ccs@suspend-resume@xmajor-compressed-compfmt0-vram01-vram01.html
* igt@xe_compute_preempt@compute-preempt:
- shard-adlp: NOTRUN -> [SKIP][45] ([Intel XE#6360])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@xe_compute_preempt@compute-preempt.html
* igt@xe_copy_basic@mem-copy-linear-0x8fffe:
- shard-adlp: NOTRUN -> [SKIP][46] ([Intel XE#5300])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@xe_copy_basic@mem-copy-linear-0x8fffe.html
* igt@xe_copy_basic@mem-copy-linear-0xfd:
- shard-adlp: NOTRUN -> [SKIP][47] ([Intel XE#1123])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@xe_copy_basic@mem-copy-linear-0xfd.html
* igt@xe_eudebug@basic-client-th:
- shard-adlp: NOTRUN -> [SKIP][48] ([Intel XE#4837] / [Intel XE#5565]) +6 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@xe_eudebug@basic-client-th.html
* igt@xe_eudebug@discovery-race-vmbind:
- shard-dg2-set2: NOTRUN -> [SKIP][49] ([Intel XE#4837]) +2 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@xe_eudebug@discovery-race-vmbind.html
* igt@xe_evict@evict-beng-mixed-threads-small-multi-vm:
- shard-adlp: NOTRUN -> [SKIP][50] ([Intel XE#261] / [Intel XE#688])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@xe_evict@evict-beng-mixed-threads-small-multi-vm.html
* igt@xe_evict@evict-beng-threads-small-multi-vm:
- shard-adlp: NOTRUN -> [SKIP][51] ([Intel XE#261])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@xe_evict@evict-beng-threads-small-multi-vm.html
* igt@xe_evict@evict-large-external-cm:
- shard-adlp: NOTRUN -> [SKIP][52] ([Intel XE#261] / [Intel XE#5564])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@xe_evict@evict-large-external-cm.html
* igt@xe_evict@evict-small-external-cm:
- shard-adlp: NOTRUN -> [SKIP][53] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@xe_evict@evict-small-external-cm.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd:
- shard-adlp: NOTRUN -> [SKIP][54] ([Intel XE#688])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind:
- shard-adlp: NOTRUN -> [SKIP][55] ([Intel XE#1392] / [Intel XE#5575]) +2 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind.html
* igt@xe_exec_fault_mode@many-execqueues-bindexecqueue:
- shard-adlp: NOTRUN -> [SKIP][56] ([Intel XE#288] / [Intel XE#5561]) +11 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue.html
* igt@xe_exec_fault_mode@twice-userptr-invalidate-race:
- shard-dg2-set2: NOTRUN -> [SKIP][57] ([Intel XE#288]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@xe_exec_fault_mode@twice-userptr-invalidate-race.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-shared-remap-dontunmap-eocheck:
- shard-adlp: NOTRUN -> [SKIP][58] ([Intel XE#4915]) +141 other tests skip
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-shared-remap-dontunmap-eocheck.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][59] ([Intel XE#4915]) +19 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset.html
* igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
- shard-dg2-set2: NOTRUN -> [ABORT][60] ([Intel XE#5466])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
* igt@xe_gt_freq@freq_fixed_idle:
- shard-dg2-set2: [PASS][61] -> [FAIL][62] ([Intel XE#6407])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-dg2-464/igt@xe_gt_freq@freq_fixed_idle.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-434/igt@xe_gt_freq@freq_fixed_idle.html
* igt@xe_live_ktest@xe_eudebug:
- shard-adlp: NOTRUN -> [SKIP][63] ([Intel XE#455] / [Intel XE#5712])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@xe_live_ktest@xe_eudebug.html
* igt@xe_oa@invalid-oa-exponent:
- shard-dg2-set2: NOTRUN -> [SKIP][64] ([Intel XE#3573])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@xe_oa@invalid-oa-exponent.html
* igt@xe_oa@syncs-syncobj-wait:
- shard-adlp: NOTRUN -> [SKIP][65] ([Intel XE#3573]) +1 other test skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@xe_oa@syncs-syncobj-wait.html
* igt@xe_pat@pat-index-xehpc:
- shard-adlp: NOTRUN -> [SKIP][66] ([Intel XE#2838] / [Intel XE#979])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pm@d3hot-i2c:
- shard-adlp: NOTRUN -> [SKIP][67] ([Intel XE#5742])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-4/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@s2idle-basic-exec:
- shard-adlp: [PASS][68] -> [ABORT][69] ([Intel XE#6675]) +3 other tests abort
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-adlp-6/igt@xe_pm@s2idle-basic-exec.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-3/igt@xe_pm@s2idle-basic-exec.html
* igt@xe_pm@s3-basic-exec:
- shard-dg2-set2: [PASS][70] -> [ABORT][71] ([Intel XE#6675]) +2 other tests abort
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-dg2-433/igt@xe_pm@s3-basic-exec.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-434/igt@xe_pm@s3-basic-exec.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0:
- shard-lnl: [PASS][72] -> [FAIL][73] ([Intel XE#6251])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-lnl-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html
* igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy:
- shard-adlp: NOTRUN -> [SKIP][74] ([Intel XE#4733] / [Intel XE#5594])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-9/igt@xe_pxp@pxp-src-to-pxp-dest-rendercopy.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-dg2-set2: NOTRUN -> [SKIP][75] ([Intel XE#3342])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1:
- shard-adlp: [ABORT][76] ([Intel XE#6675]) -> [PASS][77] +2 other tests pass
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-adlp-4/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-adlp-8/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html
* igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-system-vram01:
- shard-bmg: [ABORT][78] ([Intel XE#6675]) -> [PASS][79] +1 other test pass
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-bmg-5/igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-system-vram01.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-bmg-1/igt@xe_ccs@suspend-resume@linear-compressed-compfmt0-system-vram01.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][80] ([Intel XE#6321]) -> [PASS][81]
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html
* igt@xe_pm@s3-d3hot-basic-exec:
- shard-dg2-set2: [ABORT][82] ([Intel XE#6675]) -> [PASS][83] +1 other test pass
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-dg2-434/igt@xe_pm@s3-d3hot-basic-exec.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-dg2-432/igt@xe_pm@s3-d3hot-basic-exec.html
* igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_compute0:
- shard-lnl: [FAIL][84] ([Intel XE#6251]) -> [PASS][85] +1 other test pass
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993/shard-lnl-5/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_compute0.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-50@engine-drm_xe_engine_class_compute0.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4683]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4683
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5585]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5585
[Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
[Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
[Intel XE#5712]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5712
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5825]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5825
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6360
[Intel XE#6407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6407
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6675]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6675
[Intel XE#6704]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6704
[Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
Build changes
-------------
* Linux: xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993 -> xe-pw-158395v1
IGT_8649: f76e05461c8d5938856ed75ac8668640946f9ecd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4180-f7bb20c7069861306b0e034a78dc6648d21f3993: f7bb20c7069861306b0e034a78dc6648d21f3993
xe-pw-158395v1: 158395v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158395v1/index.html
[-- Attachment #2: Type: text/html, Size: 32878 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-02 21:35 ` Imre Deak
@ 2025-12-03 8:13 ` Jani Nikula
2025-12-03 10:38 ` Imre Deak
0 siblings, 1 reply; 15+ messages in thread
From: Jani Nikula @ 2025-12-03 8:13 UTC (permalink / raw)
To: imre.deak, intel-gfx, intel-xe, Mohammed Thasleem, stable
On Tue, 02 Dec 2025, Imre Deak <imre.deak@intel.com> wrote:
> On Tue, Dec 02, 2025 at 11:24:42PM +0200, Imre Deak wrote:
>> On Tue, Dec 02, 2025 at 08:39:50PM +0200, Jani Nikula wrote:
>> > intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
>> > initialized, and dmc is thus NULL.
>> >
>> > That would be the case when the call path is
>> > intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
>> > gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
>> > intel_power_domains_init_hw() is called *before* intel_dmc_init().
>> >
>> > However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
>> > conditionally, depending on the current and target DC states. At probe,
>> > the target is disabled, but if DC6 is enabled, the function is called,
>> > and an oops follows. Apparently it's quite unlikely that DC6 is enabled
>> > at probe, as we haven't seen this failure mode before.
>> >
>> > Add NULL checks and switch the dmc->display references to just display.
>> >
>> > Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
>> > Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
>> > Cc: Imre Deak <imre.deak@intel.com>
>> > Cc: <stable@vger.kernel.org> # v6.16+
>> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> >
>> > ---
>> >
>> > Rare case, but this may also throw off the rc6 counting in debugfs when
>> > it does happen.
>>
>> Yes, I missed the case where the driver is being loaded while DC6 is
>> enabled, this is what happens for the reporter:
>>
>> i915 0000:00:04.0: [drm] *ERROR* DC state mismatch (0x0 -> 0x2)
>>
>> That's odd, as DC6 requires the DMC firmware, which - if it's indeed
>> loaded by BIOS for instance - will be overwritten by the driver, not a
>> well specified sequence (even though the driver is trying to handle it
>> correctly by disabling any active firmware handler).
>>
>> But as you pointed out this would also throw off the cooked-up DC6
>> counter tracking,
>
> Actually the patch would keep the counter working, as the counter
> wouldn't be updated in the dmc==NULL case. However I still think the
> correct fix would be to check the correct DC state, which from the POV
> of the counter tracking is the driver's version of the state, not the HW
> state.
One thing I failed to mention is that this happens in a KASAN run in
QEMU. So I'm kind of not surprised we haven't hit this before. And it
impacts the deductions about the DC state.
I'm not quite sure what exactly you're suggesting, maybe a draft patch
would communicate the idea better than plain English? ;)
Anyway, I think "not oopsing" is a lot better than "inaccurate DC
counters in debugfs".
BR,
Jani.
>
>> so could instead the counter update depend on the
>> driver's DC state instead of the HW state? I.e. set
>> gen9_set_dc_state()/dc6_was_enabled,
>> intel_dmc_get_dc6_allowed_count()/dc6_enable if power_domains->dc_state
>> says that DC6 was indeed enabled by the driver (instead of checking the
>> HW state).
>>
>> That would fix the reporter's oops when calling
>> intel_dmc_update_dc6_allowed_count(start_tracking=false), by not calling
>> it if the driver hasn't actually enabled DC6 and it would also keep the
>> DC6 counter tracking correct.
>>
>> intel_dmc_update_dc6_allowed_count(start_tracking=true) would be also
>> guaranteed to be called only once the firmware is loaded, as until that
>> point enabling DC6 is blocked (by holding a reference on the DC_off
>> power well).
>>
>> > ---
>> > drivers/gpu/drm/i915/display/intel_dmc.c | 6 +++---
>> > 1 file changed, 3 insertions(+), 3 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>> > index 2fb6fec6dc99..169bbbc91f6d 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> > @@ -1570,10 +1570,10 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display,
>> > struct intel_dmc *dmc = display_to_dmc(display);
>> > u32 dc5_cur_count;
>> >
>> > - if (DISPLAY_VER(dmc->display) < 14)
>> > + if (!dmc || DISPLAY_VER(display) < 14)
>> > return;
>> >
>> > - dc5_cur_count = intel_de_read(dmc->display, DG1_DMC_DEBUG_DC5_COUNT);
>> > + dc5_cur_count = intel_de_read(display, DG1_DMC_DEBUG_DC5_COUNT);
>> >
>> > if (!start_tracking)
>> > dmc->dc6_allowed.count += dc5_cur_count - dmc->dc6_allowed.dc5_start;
>> > @@ -1587,7 +1587,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
>> > struct intel_dmc *dmc = display_to_dmc(display);
>> > bool dc6_enabled;
>> >
>> > - if (DISPLAY_VER(display) < 14)
>> > + if (!dmc || DISPLAY_VER(display) < 14)
>> > return false;
>> >
>> > mutex_lock(&power_domains->lock);
>> > --
>> > 2.47.3
>> >
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-03 8:13 ` Jani Nikula
@ 2025-12-03 10:38 ` Imre Deak
2025-12-04 11:30 ` Jani Nikula
0 siblings, 1 reply; 15+ messages in thread
From: Imre Deak @ 2025-12-03 10:38 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe, Mohammed Thasleem, stable
On Wed, Dec 03, 2025 at 10:13:44AM +0200, Jani Nikula wrote:
> On Tue, 02 Dec 2025, Imre Deak <imre.deak@intel.com> wrote:
> > On Tue, Dec 02, 2025 at 11:24:42PM +0200, Imre Deak wrote:
> >> On Tue, Dec 02, 2025 at 08:39:50PM +0200, Jani Nikula wrote:
> >> > intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
> >> > initialized, and dmc is thus NULL.
> >> >
> >> > That would be the case when the call path is
> >> > intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
> >> > gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
> >> > intel_power_domains_init_hw() is called *before* intel_dmc_init().
> >> >
> >> > However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
> >> > conditionally, depending on the current and target DC states. At probe,
> >> > the target is disabled, but if DC6 is enabled, the function is called,
> >> > and an oops follows. Apparently it's quite unlikely that DC6 is enabled
> >> > at probe, as we haven't seen this failure mode before.
> >> >
> >> > Add NULL checks and switch the dmc->display references to just display.
> >> >
> >> > Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
> >> > Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
> >> > Cc: Imre Deak <imre.deak@intel.com>
> >> > Cc: <stable@vger.kernel.org> # v6.16+
> >> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> >
> >> > ---
> >> >
> >> > Rare case, but this may also throw off the rc6 counting in debugfs when
> >> > it does happen.
> >>
> >> Yes, I missed the case where the driver is being loaded while DC6 is
> >> enabled, this is what happens for the reporter:
> >>
> >> i915 0000:00:04.0: [drm] *ERROR* DC state mismatch (0x0 -> 0x2)
> >>
> >> That's odd, as DC6 requires the DMC firmware, which - if it's indeed
> >> loaded by BIOS for instance - will be overwritten by the driver, not a
> >> well specified sequence (even though the driver is trying to handle it
> >> correctly by disabling any active firmware handler).
> >>
> >> But as you pointed out this would also throw off the cooked-up DC6
> >> counter tracking,
> >
> > Actually the patch would keep the counter working, as the counter
> > wouldn't be updated in the dmc==NULL case. However I still think the
> > correct fix would be to check the correct DC state, which from the POV
> > of the counter tracking is the driver's version of the state, not the HW
> > state.
>
> One thing I failed to mention is that this happens in a KASAN run in
> QEMU. So I'm kind of not surprised we haven't hit this before. And it
> impacts the deductions about the DC state.
Ok, it's strange why QEMU decides to initialize the DC_STATE_EN register
to a non-zero value then. But in any case the driver should handle it.
> I'm not quite sure what exactly you're suggesting, maybe a draft patch
> would communicate the idea better than plain English? ;)
intel_dmc_get_dc6_allowed_count() still needs to check for dmc==NULL, as
the debugfs entry can be read at any point. With that, what I meant is:
in gen9_set_dc_state():
...
- dc6_was_enabled = val & DC_STATE_EN_UPTO_DC6;
+ dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
...
in intel_dmc_get_dc6_allowed_count():
...
if (DISPLAY_VER(display) < 14)
return false;
+ if (!dmc) {
+ *count = 0;
+ return true;
+ }
+
mutex_lock(&power_domains->lock);
- dc6_enabled = intel_de_read(display, DC_STATE_EN) &
- DC_STATE_EN_UPTO_DC6;
+ dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
...
> Anyway, I think "not oopsing" is a lot better than "inaccurate DC
> counters in debugfs".
Agreed, the above would ensure both.
>
> BR,
> Jani.
>
>
> >
> >> so could instead the counter update depend on the
> >> driver's DC state instead of the HW state? I.e. set
> >> gen9_set_dc_state()/dc6_was_enabled,
> >> intel_dmc_get_dc6_allowed_count()/dc6_enable if power_domains->dc_state
> >> says that DC6 was indeed enabled by the driver (instead of checking the
> >> HW state).
> >>
> >> That would fix the reporter's oops when calling
> >> intel_dmc_update_dc6_allowed_count(start_tracking=false), by not calling
> >> it if the driver hasn't actually enabled DC6 and it would also keep the
> >> DC6 counter tracking correct.
> >>
> >> intel_dmc_update_dc6_allowed_count(start_tracking=true) would be also
> >> guaranteed to be called only once the firmware is loaded, as until that
> >> point enabling DC6 is blocked (by holding a reference on the DC_off
> >> power well).
> >>
> >> > ---
> >> > drivers/gpu/drm/i915/display/intel_dmc.c | 6 +++---
> >> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >> >
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> >> > index 2fb6fec6dc99..169bbbc91f6d 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> >> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> >> > @@ -1570,10 +1570,10 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display,
> >> > struct intel_dmc *dmc = display_to_dmc(display);
> >> > u32 dc5_cur_count;
> >> >
> >> > - if (DISPLAY_VER(dmc->display) < 14)
> >> > + if (!dmc || DISPLAY_VER(display) < 14)
> >> > return;
> >> >
> >> > - dc5_cur_count = intel_de_read(dmc->display, DG1_DMC_DEBUG_DC5_COUNT);
> >> > + dc5_cur_count = intel_de_read(display, DG1_DMC_DEBUG_DC5_COUNT);
> >> >
> >> > if (!start_tracking)
> >> > dmc->dc6_allowed.count += dc5_cur_count - dmc->dc6_allowed.dc5_start;
> >> > @@ -1587,7 +1587,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
> >> > struct intel_dmc *dmc = display_to_dmc(display);
> >> > bool dc6_enabled;
> >> >
> >> > - if (DISPLAY_VER(display) < 14)
> >> > + if (!dmc || DISPLAY_VER(display) < 14)
> >> > return false;
> >> >
> >> > mutex_lock(&power_domains->lock);
> >> > --
> >> > 2.47.3
> >> >
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-03 10:38 ` Imre Deak
@ 2025-12-04 11:30 ` Jani Nikula
2025-12-04 13:02 ` Imre Deak
0 siblings, 1 reply; 15+ messages in thread
From: Jani Nikula @ 2025-12-04 11:30 UTC (permalink / raw)
To: imre.deak; +Cc: intel-gfx, intel-xe, Mohammed Thasleem, stable
On Wed, 03 Dec 2025, Imre Deak <imre.deak@intel.com> wrote:
> On Wed, Dec 03, 2025 at 10:13:44AM +0200, Jani Nikula wrote:
>> On Tue, 02 Dec 2025, Imre Deak <imre.deak@intel.com> wrote:
>> > On Tue, Dec 02, 2025 at 11:24:42PM +0200, Imre Deak wrote:
>> >> On Tue, Dec 02, 2025 at 08:39:50PM +0200, Jani Nikula wrote:
>> >> > intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
>> >> > initialized, and dmc is thus NULL.
>> >> >
>> >> > That would be the case when the call path is
>> >> > intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
>> >> > gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
>> >> > intel_power_domains_init_hw() is called *before* intel_dmc_init().
>> >> >
>> >> > However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
>> >> > conditionally, depending on the current and target DC states. At probe,
>> >> > the target is disabled, but if DC6 is enabled, the function is called,
>> >> > and an oops follows. Apparently it's quite unlikely that DC6 is enabled
>> >> > at probe, as we haven't seen this failure mode before.
>> >> >
>> >> > Add NULL checks and switch the dmc->display references to just display.
>> >> >
>> >> > Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
>> >> > Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
>> >> > Cc: Imre Deak <imre.deak@intel.com>
>> >> > Cc: <stable@vger.kernel.org> # v6.16+
>> >> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> >> >
>> >> > ---
>> >> >
>> >> > Rare case, but this may also throw off the rc6 counting in debugfs when
>> >> > it does happen.
>> >>
>> >> Yes, I missed the case where the driver is being loaded while DC6 is
>> >> enabled, this is what happens for the reporter:
>> >>
>> >> i915 0000:00:04.0: [drm] *ERROR* DC state mismatch (0x0 -> 0x2)
>> >>
>> >> That's odd, as DC6 requires the DMC firmware, which - if it's indeed
>> >> loaded by BIOS for instance - will be overwritten by the driver, not a
>> >> well specified sequence (even though the driver is trying to handle it
>> >> correctly by disabling any active firmware handler).
>> >>
>> >> But as you pointed out this would also throw off the cooked-up DC6
>> >> counter tracking,
>> >
>> > Actually the patch would keep the counter working, as the counter
>> > wouldn't be updated in the dmc==NULL case. However I still think the
>> > correct fix would be to check the correct DC state, which from the POV
>> > of the counter tracking is the driver's version of the state, not the HW
>> > state.
>>
>> One thing I failed to mention is that this happens in a KASAN run in
>> QEMU. So I'm kind of not surprised we haven't hit this before. And it
>> impacts the deductions about the DC state.
>
> Ok, it's strange why QEMU decides to initialize the DC_STATE_EN register
> to a non-zero value then. But in any case the driver should handle it.
>
>> I'm not quite sure what exactly you're suggesting, maybe a draft patch
>> would communicate the idea better than plain English? ;)
>
> intel_dmc_get_dc6_allowed_count() still needs to check for dmc==NULL, as
> the debugfs entry can be read at any point. With that, what I meant is:
>
> in gen9_set_dc_state():
> ...
> - dc6_was_enabled = val & DC_STATE_EN_UPTO_DC6;
> + dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
I still don't understand why we can trust our own value rather than
what's in the hardware in this case.
For resume, we even call gen9_sanitize_dc_state(), but not for probe.
> ...
>
> in intel_dmc_get_dc6_allowed_count():
> ...
> if (DISPLAY_VER(display) < 14)
> return false;
>
> + if (!dmc) {
> + *count = 0;
> + return true;
> + }
> +
This seems neat but is overkill. dmc is never NULL here, but I added the
check for completeness.
It's the intel_dmc_update_dc6_allowed_count() that's more fragile, and I
want that to have the !dmc check, instead of relying on the subtle
dependency on power_domains->dc_state.
> mutex_lock(&power_domains->lock);
> - dc6_enabled = intel_de_read(display, DC_STATE_EN) &
> - DC_STATE_EN_UPTO_DC6;
> + dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
> ...
>
>> Anyway, I think "not oopsing" is a lot better than "inaccurate DC
>> counters in debugfs".
>
> Agreed, the above would ensure both.
>
>>
>> BR,
>> Jani.
>>
>>
>> >
>> >> so could instead the counter update depend on the
>> >> driver's DC state instead of the HW state? I.e. set
>> >> gen9_set_dc_state()/dc6_was_enabled,
>> >> intel_dmc_get_dc6_allowed_count()/dc6_enable if power_domains->dc_state
>> >> says that DC6 was indeed enabled by the driver (instead of checking the
>> >> HW state).
>> >>
>> >> That would fix the reporter's oops when calling
>> >> intel_dmc_update_dc6_allowed_count(start_tracking=false), by not calling
>> >> it if the driver hasn't actually enabled DC6 and it would also keep the
>> >> DC6 counter tracking correct.
>> >>
>> >> intel_dmc_update_dc6_allowed_count(start_tracking=true) would be also
>> >> guaranteed to be called only once the firmware is loaded, as until that
>> >> point enabling DC6 is blocked (by holding a reference on the DC_off
>> >> power well).
>> >>
>> >> > ---
>> >> > drivers/gpu/drm/i915/display/intel_dmc.c | 6 +++---
>> >> > 1 file changed, 3 insertions(+), 3 deletions(-)
>> >> >
>> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>> >> > index 2fb6fec6dc99..169bbbc91f6d 100644
>> >> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> >> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> >> > @@ -1570,10 +1570,10 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display,
>> >> > struct intel_dmc *dmc = display_to_dmc(display);
>> >> > u32 dc5_cur_count;
>> >> >
>> >> > - if (DISPLAY_VER(dmc->display) < 14)
>> >> > + if (!dmc || DISPLAY_VER(display) < 14)
>> >> > return;
>> >> >
>> >> > - dc5_cur_count = intel_de_read(dmc->display, DG1_DMC_DEBUG_DC5_COUNT);
>> >> > + dc5_cur_count = intel_de_read(display, DG1_DMC_DEBUG_DC5_COUNT);
>> >> >
>> >> > if (!start_tracking)
>> >> > dmc->dc6_allowed.count += dc5_cur_count - dmc->dc6_allowed.dc5_start;
>> >> > @@ -1587,7 +1587,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
>> >> > struct intel_dmc *dmc = display_to_dmc(display);
>> >> > bool dc6_enabled;
>> >> >
>> >> > - if (DISPLAY_VER(display) < 14)
>> >> > + if (!dmc || DISPLAY_VER(display) < 14)
>> >> > return false;
>> >> >
>> >> > mutex_lock(&power_domains->lock);
>> >> > --
>> >> > 2.47.3
>> >> >
>>
>> --
>> Jani Nikula, Intel
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-04 11:30 ` Jani Nikula
@ 2025-12-04 13:02 ` Imre Deak
2026-01-07 11:16 ` Jani Nikula
0 siblings, 1 reply; 15+ messages in thread
From: Imre Deak @ 2025-12-04 13:02 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe, Mohammed Thasleem, stable
On Thu, Dec 04, 2025 at 01:30:27PM +0200, Jani Nikula wrote:
> On Wed, 03 Dec 2025, Imre Deak <imre.deak@intel.com> wrote:
> > On Wed, Dec 03, 2025 at 10:13:44AM +0200, Jani Nikula wrote:
> >> On Tue, 02 Dec 2025, Imre Deak <imre.deak@intel.com> wrote:
> >> > On Tue, Dec 02, 2025 at 11:24:42PM +0200, Imre Deak wrote:
> >> >> On Tue, Dec 02, 2025 at 08:39:50PM +0200, Jani Nikula wrote:
> >> >> > intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
> >> >> > initialized, and dmc is thus NULL.
> >> >> >
> >> >> > That would be the case when the call path is
> >> >> > intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
> >> >> > gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
> >> >> > intel_power_domains_init_hw() is called *before* intel_dmc_init().
> >> >> >
> >> >> > However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
> >> >> > conditionally, depending on the current and target DC states. At probe,
> >> >> > the target is disabled, but if DC6 is enabled, the function is called,
> >> >> > and an oops follows. Apparently it's quite unlikely that DC6 is enabled
> >> >> > at probe, as we haven't seen this failure mode before.
> >> >> >
> >> >> > Add NULL checks and switch the dmc->display references to just display.
> >> >> >
> >> >> > Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
> >> >> > Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
> >> >> > Cc: Imre Deak <imre.deak@intel.com>
> >> >> > Cc: <stable@vger.kernel.org> # v6.16+
> >> >> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> >> >> >
> >> >> > ---
> >> >> >
> >> >> > Rare case, but this may also throw off the rc6 counting in debugfs when
> >> >> > it does happen.
> >> >>
> >> >> Yes, I missed the case where the driver is being loaded while DC6 is
> >> >> enabled, this is what happens for the reporter:
> >> >>
> >> >> i915 0000:00:04.0: [drm] *ERROR* DC state mismatch (0x0 -> 0x2)
> >> >>
> >> >> That's odd, as DC6 requires the DMC firmware, which - if it's indeed
> >> >> loaded by BIOS for instance - will be overwritten by the driver, not a
> >> >> well specified sequence (even though the driver is trying to handle it
> >> >> correctly by disabling any active firmware handler).
> >> >>
> >> >> But as you pointed out this would also throw off the cooked-up DC6
> >> >> counter tracking,
> >> >
> >> > Actually the patch would keep the counter working, as the counter
> >> > wouldn't be updated in the dmc==NULL case. However I still think the
> >> > correct fix would be to check the correct DC state, which from the POV
> >> > of the counter tracking is the driver's version of the state, not the HW
> >> > state.
> >>
> >> One thing I failed to mention is that this happens in a KASAN run in
> >> QEMU. So I'm kind of not surprised we haven't hit this before. And it
> >> impacts the deductions about the DC state.
> >
> > Ok, it's strange why QEMU decides to initialize the DC_STATE_EN register
> > to a non-zero value then. But in any case the driver should handle it.
> >
> >> I'm not quite sure what exactly you're suggesting, maybe a draft patch
> >> would communicate the idea better than plain English? ;)
> >
> > intel_dmc_get_dc6_allowed_count() still needs to check for dmc==NULL, as
> > the debugfs entry can be read at any point. With that, what I meant is:
> >
> > in gen9_set_dc_state():
> > ...
> > - dc6_was_enabled = val & DC_STATE_EN_UPTO_DC6;
> > + dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
>
> I still don't understand why we can trust our own value rather than
> what's in the hardware in this case.
The BIOS/FW can set random flags in the register, as in the above case,
so it can't be trusted. The counter update ending the tracking of the
duration of a DC6 enabled state only works if the driver did in fact
enable DC6 previously and has started the tracking accordingly. This is
only guaranteed if the driver has set DC_STATE_EN_UPTO_DC6 in
power_domains->dc_state, the corrsponding HW flag doesn't guarantee it.
> For resume, we even call gen9_sanitize_dc_state(), but not for probe.
After system suspend, the driver enabling DC9 by setting the
corrsponding DC9 flag in the DC_STATE_EN register, the HW/firmware will
disable DC9 while resuming. The SW version of the DC state will be
updated accordingly in the above function to reflect the disabled DC9
state.
> > ...
> >
> > in intel_dmc_get_dc6_allowed_count():
> > ...
> > if (DISPLAY_VER(display) < 14)
> > return false;
> >
> > + if (!dmc) {
> > + *count = 0;
> > + return true;
> > + }
> > +
>
> This seems neat but is overkill. dmc is never NULL here, but I added the
> check for completeness.
intel_dmc_get_dc6_allowed_count() shouldn't fall back on DISPLAY_VER>=14
to report the DC6 residency in a way that only works for older
platforms. Hence the function should return true for DISPLAY_VER>=14.
> It's the intel_dmc_update_dc6_allowed_count() that's more fragile, and I
> want that to have the !dmc check, instead of relying on the subtle
> dependency on power_domains->dc_state.
The counter tracking should depend on the power_domians->dc_state SW
state as described above, so that's the correct thing to do there.
dmc==NULL in intel_dmc_update_dc6_allowed_count() would be only a bug in
the driver, if you wanted to check for that it should be a
WARN_ON(!dmc) check.
> > mutex_lock(&power_domains->lock);
> > - dc6_enabled = intel_de_read(display, DC_STATE_EN) &
> > - DC_STATE_EN_UPTO_DC6;
> > + dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
> > ...
> >
> >> Anyway, I think "not oopsing" is a lot better than "inaccurate DC
> >> counters in debugfs".
> >
> > Agreed, the above would ensure both.
> >
> >>
> >> BR,
> >> Jani.
> >>
> >>
> >> >
> >> >> so could instead the counter update depend on the
> >> >> driver's DC state instead of the HW state? I.e. set
> >> >> gen9_set_dc_state()/dc6_was_enabled,
> >> >> intel_dmc_get_dc6_allowed_count()/dc6_enable if power_domains->dc_state
> >> >> says that DC6 was indeed enabled by the driver (instead of checking the
> >> >> HW state).
> >> >>
> >> >> That would fix the reporter's oops when calling
> >> >> intel_dmc_update_dc6_allowed_count(start_tracking=false), by not calling
> >> >> it if the driver hasn't actually enabled DC6 and it would also keep the
> >> >> DC6 counter tracking correct.
> >> >>
> >> >> intel_dmc_update_dc6_allowed_count(start_tracking=true) would be also
> >> >> guaranteed to be called only once the firmware is loaded, as until that
> >> >> point enabling DC6 is blocked (by holding a reference on the DC_off
> >> >> power well).
> >> >>
> >> >> > ---
> >> >> > drivers/gpu/drm/i915/display/intel_dmc.c | 6 +++---
> >> >> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >> >> >
> >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> >> >> > index 2fb6fec6dc99..169bbbc91f6d 100644
> >> >> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> >> >> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> >> >> > @@ -1570,10 +1570,10 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display,
> >> >> > struct intel_dmc *dmc = display_to_dmc(display);
> >> >> > u32 dc5_cur_count;
> >> >> >
> >> >> > - if (DISPLAY_VER(dmc->display) < 14)
> >> >> > + if (!dmc || DISPLAY_VER(display) < 14)
> >> >> > return;
> >> >> >
> >> >> > - dc5_cur_count = intel_de_read(dmc->display, DG1_DMC_DEBUG_DC5_COUNT);
> >> >> > + dc5_cur_count = intel_de_read(display, DG1_DMC_DEBUG_DC5_COUNT);
> >> >> >
> >> >> > if (!start_tracking)
> >> >> > dmc->dc6_allowed.count += dc5_cur_count - dmc->dc6_allowed.dc5_start;
> >> >> > @@ -1587,7 +1587,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
> >> >> > struct intel_dmc *dmc = display_to_dmc(display);
> >> >> > bool dc6_enabled;
> >> >> >
> >> >> > - if (DISPLAY_VER(display) < 14)
> >> >> > + if (!dmc || DISPLAY_VER(display) < 14)
> >> >> > return false;
> >> >> >
> >> >> > mutex_lock(&power_domains->lock);
> >> >> > --
> >> >> > 2.47.3
> >> >> >
> >>
> >> --
> >> Jani Nikula, Intel
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-04 13:02 ` Imre Deak
@ 2026-01-07 11:16 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2026-01-07 11:16 UTC (permalink / raw)
To: imre.deak; +Cc: intel-gfx, intel-xe, Mohammed Thasleem, stable
On Thu, 04 Dec 2025, Imre Deak <imre.deak@intel.com> wrote:
> On Thu, Dec 04, 2025 at 01:30:27PM +0200, Jani Nikula wrote:
>> On Wed, 03 Dec 2025, Imre Deak <imre.deak@intel.com> wrote:
>> > On Wed, Dec 03, 2025 at 10:13:44AM +0200, Jani Nikula wrote:
>> >> On Tue, 02 Dec 2025, Imre Deak <imre.deak@intel.com> wrote:
>> >> > On Tue, Dec 02, 2025 at 11:24:42PM +0200, Imre Deak wrote:
>> >> >> On Tue, Dec 02, 2025 at 08:39:50PM +0200, Jani Nikula wrote:
>> >> >> > intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
>> >> >> > initialized, and dmc is thus NULL.
>> >> >> >
>> >> >> > That would be the case when the call path is
>> >> >> > intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
>> >> >> > gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
>> >> >> > intel_power_domains_init_hw() is called *before* intel_dmc_init().
>> >> >> >
>> >> >> > However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
>> >> >> > conditionally, depending on the current and target DC states. At probe,
>> >> >> > the target is disabled, but if DC6 is enabled, the function is called,
>> >> >> > and an oops follows. Apparently it's quite unlikely that DC6 is enabled
>> >> >> > at probe, as we haven't seen this failure mode before.
>> >> >> >
>> >> >> > Add NULL checks and switch the dmc->display references to just display.
>> >> >> >
>> >> >> > Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
>> >> >> > Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
>> >> >> > Cc: Imre Deak <imre.deak@intel.com>
>> >> >> > Cc: <stable@vger.kernel.org> # v6.16+
>> >> >> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> >> >> >
>> >> >> > ---
>> >> >> >
>> >> >> > Rare case, but this may also throw off the rc6 counting in debugfs when
>> >> >> > it does happen.
>> >> >>
>> >> >> Yes, I missed the case where the driver is being loaded while DC6 is
>> >> >> enabled, this is what happens for the reporter:
>> >> >>
>> >> >> i915 0000:00:04.0: [drm] *ERROR* DC state mismatch (0x0 -> 0x2)
>> >> >>
>> >> >> That's odd, as DC6 requires the DMC firmware, which - if it's indeed
>> >> >> loaded by BIOS for instance - will be overwritten by the driver, not a
>> >> >> well specified sequence (even though the driver is trying to handle it
>> >> >> correctly by disabling any active firmware handler).
>> >> >>
>> >> >> But as you pointed out this would also throw off the cooked-up DC6
>> >> >> counter tracking,
>> >> >
>> >> > Actually the patch would keep the counter working, as the counter
>> >> > wouldn't be updated in the dmc==NULL case. However I still think the
>> >> > correct fix would be to check the correct DC state, which from the POV
>> >> > of the counter tracking is the driver's version of the state, not the HW
>> >> > state.
>> >>
>> >> One thing I failed to mention is that this happens in a KASAN run in
>> >> QEMU. So I'm kind of not surprised we haven't hit this before. And it
>> >> impacts the deductions about the DC state.
>> >
>> > Ok, it's strange why QEMU decides to initialize the DC_STATE_EN register
>> > to a non-zero value then. But in any case the driver should handle it.
>> >
>> >> I'm not quite sure what exactly you're suggesting, maybe a draft patch
>> >> would communicate the idea better than plain English? ;)
>> >
>> > intel_dmc_get_dc6_allowed_count() still needs to check for dmc==NULL, as
>> > the debugfs entry can be read at any point. With that, what I meant is:
>> >
>> > in gen9_set_dc_state():
>> > ...
>> > - dc6_was_enabled = val & DC_STATE_EN_UPTO_DC6;
>> > + dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
>>
>> I still don't understand why we can trust our own value rather than
>> what's in the hardware in this case.
>
> The BIOS/FW can set random flags in the register, as in the above case,
> so it can't be trusted. The counter update ending the tracking of the
> duration of a DC6 enabled state only works if the driver did in fact
> enable DC6 previously and has started the tracking accordingly. This is
> only guaranteed if the driver has set DC_STATE_EN_UPTO_DC6 in
> power_domains->dc_state, the corrsponding HW flag doesn't guarantee it.
>
>> For resume, we even call gen9_sanitize_dc_state(), but not for probe.
>
> After system suspend, the driver enabling DC9 by setting the
> corrsponding DC9 flag in the DC_STATE_EN register, the HW/firmware will
> disable DC9 while resuming. The SW version of the DC state will be
> updated accordingly in the above function to reflect the disabled DC9
> state.
>
>> > ...
>> >
>> > in intel_dmc_get_dc6_allowed_count():
>> > ...
>> > if (DISPLAY_VER(display) < 14)
>> > return false;
>> >
>> > + if (!dmc) {
>> > + *count = 0;
>> > + return true;
>> > + }
>> > +
>>
>> This seems neat but is overkill. dmc is never NULL here, but I added the
>> check for completeness.
>
> intel_dmc_get_dc6_allowed_count() shouldn't fall back on DISPLAY_VER>=14
> to report the DC6 residency in a way that only works for older
> platforms. Hence the function should return true for DISPLAY_VER>=14.
>
>> It's the intel_dmc_update_dc6_allowed_count() that's more fragile, and I
>> want that to have the !dmc check, instead of relying on the subtle
>> dependency on power_domains->dc_state.
>
> The counter tracking should depend on the power_domians->dc_state SW
> state as described above, so that's the correct thing to do there.
> dmc==NULL in intel_dmc_update_dc6_allowed_count() would be only a bug in
> the driver, if you wanted to check for that it should be a
> WARN_ON(!dmc) check.
So we still have the NULL pointer dereference at probe, albeit very
unlikely. I don't really know what to do here. Care to send a patch to
fix it?
BR,
Jani.
>
>> > mutex_lock(&power_domains->lock);
>> > - dc6_enabled = intel_de_read(display, DC_STATE_EN) &
>> > - DC_STATE_EN_UPTO_DC6;
>> > + dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
>> > ...
>> >
>> >> Anyway, I think "not oopsing" is a lot better than "inaccurate DC
>> >> counters in debugfs".
>> >
>> > Agreed, the above would ensure both.
>> >
>> >>
>> >> BR,
>> >> Jani.
>> >>
>> >>
>> >> >
>> >> >> so could instead the counter update depend on the
>> >> >> driver's DC state instead of the HW state? I.e. set
>> >> >> gen9_set_dc_state()/dc6_was_enabled,
>> >> >> intel_dmc_get_dc6_allowed_count()/dc6_enable if power_domains->dc_state
>> >> >> says that DC6 was indeed enabled by the driver (instead of checking the
>> >> >> HW state).
>> >> >>
>> >> >> That would fix the reporter's oops when calling
>> >> >> intel_dmc_update_dc6_allowed_count(start_tracking=false), by not calling
>> >> >> it if the driver hasn't actually enabled DC6 and it would also keep the
>> >> >> DC6 counter tracking correct.
>> >> >>
>> >> >> intel_dmc_update_dc6_allowed_count(start_tracking=true) would be also
>> >> >> guaranteed to be called only once the firmware is loaded, as until that
>> >> >> point enabling DC6 is blocked (by holding a reference on the DC_off
>> >> >> power well).
>> >> >>
>> >> >> > ---
>> >> >> > drivers/gpu/drm/i915/display/intel_dmc.c | 6 +++---
>> >> >> > 1 file changed, 3 insertions(+), 3 deletions(-)
>> >> >> >
>> >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
>> >> >> > index 2fb6fec6dc99..169bbbc91f6d 100644
>> >> >> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
>> >> >> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
>> >> >> > @@ -1570,10 +1570,10 @@ void intel_dmc_update_dc6_allowed_count(struct intel_display *display,
>> >> >> > struct intel_dmc *dmc = display_to_dmc(display);
>> >> >> > u32 dc5_cur_count;
>> >> >> >
>> >> >> > - if (DISPLAY_VER(dmc->display) < 14)
>> >> >> > + if (!dmc || DISPLAY_VER(display) < 14)
>> >> >> > return;
>> >> >> >
>> >> >> > - dc5_cur_count = intel_de_read(dmc->display, DG1_DMC_DEBUG_DC5_COUNT);
>> >> >> > + dc5_cur_count = intel_de_read(display, DG1_DMC_DEBUG_DC5_COUNT);
>> >> >> >
>> >> >> > if (!start_tracking)
>> >> >> > dmc->dc6_allowed.count += dc5_cur_count - dmc->dc6_allowed.dc5_start;
>> >> >> > @@ -1587,7 +1587,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
>> >> >> > struct intel_dmc *dmc = display_to_dmc(display);
>> >> >> > bool dc6_enabled;
>> >> >> >
>> >> >> > - if (DISPLAY_VER(display) < 14)
>> >> >> > + if (!dmc || DISPLAY_VER(display) < 14)
>> >> >> > return false;
>> >> >> >
>> >> >> > mutex_lock(&power_domains->lock);
>> >> >> > --
>> >> >> > 2.47.3
>> >> >> >
>> >>
>> >> --
>> >> Jani Nikula, Intel
>>
>> --
>> Jani Nikula, Intel
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v2] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2025-12-02 18:39 [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe Jani Nikula
` (3 preceding siblings ...)
2025-12-03 3:37 ` ✓ Xe.CI.Full: success for " Patchwork
@ 2026-03-02 17:48 ` Imre Deak
2026-03-03 2:44 ` Tao Liu
2026-03-06 10:12 ` Jani Nikula
4 siblings, 2 replies; 15+ messages in thread
From: Imre Deak @ 2026-03-02 17:48 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: Mohammed Thasleem, Jani Nikula, Tao Liu, stable
intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
initialized, and dmc is thus NULL.
That would be the case when the call path is
intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
intel_power_domains_init_hw() is called *before* intel_dmc_init().
However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
conditionally, depending on the current and target DC states. At probe,
the target is disabled, but if DC6 is enabled, the function is called,
and an oops follows. Apparently it's quite unlikely that DC6 is enabled
at probe, as we haven't seen this failure mode before.
It is also strange to have DC6 enabled at boot, since that would require
the DMC firmware (loaded by BIOS); the BIOS loading the DMC firmware and
the driver stopping / reprogramming the firmware is a poorly specified
sequence and as such unlikely an intentional BIOS behaviour. It's more
likely that BIOS is leaving an unintentionally enabled DC6 HW state
behind (without actually loading the required DMC firmware for this).
The tracking of the DC6 allowed counter only works if starting /
stopping the counter depends on the _SW_ DC6 state vs. the current _HW_
DC6 state (since stopping the counter requires the DC5 counter captured
when the counter was started). Thus, using the HW DC6 state is incorrect
and it also leads to the above oops. Fix both issues by using the SW DC6
state for the tracking.
This is v2 of the fix originally sent by Jani, updated based on the
first References: discussion below.
Link: https://lore.kernel.org/all/3626411dc9e556452c432d0919821b76d9991217@intel.com
Link: https://lore.kernel.org/all/20260228130946.50919-2-ltao@redhat.com
Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Tao Liu <ltao@redhat.com>
Cc: <stable@vger.kernel.org> # v6.16+
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_power_well.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index 9c8d29839cafc..969b2c421d308 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -852,7 +852,7 @@ void gen9_set_dc_state(struct intel_display *display, u32 state)
power_domains->dc_state, val & mask);
enable_dc6 = state & DC_STATE_EN_UPTO_DC6;
- dc6_was_enabled = val & DC_STATE_EN_UPTO_DC6;
+ dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
if (!dc6_was_enabled && enable_dc6)
intel_dmc_update_dc6_allowed_count(display, true);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index c3b411259a0c5..90ba932d940ac 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1598,8 +1598,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
return false;
mutex_lock(&power_domains->lock);
- dc6_enabled = intel_de_read(display, DC_STATE_EN) &
- DC_STATE_EN_UPTO_DC6;
+ dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
if (dc6_enabled)
intel_dmc_update_dc6_allowed_count(display, false);
--
2.49.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v2] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2026-03-02 17:48 ` [PATCH v2] " Imre Deak
@ 2026-03-03 2:44 ` Tao Liu
2026-03-06 10:12 ` Jani Nikula
1 sibling, 0 replies; 15+ messages in thread
From: Tao Liu @ 2026-03-03 2:44 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx, intel-xe, Mohammed Thasleem, Jani Nikula, stable
I have tested this patch can work for my kdump case as described in
Link: https://lore.kernel.org/all/20260228130946.50919-2-ltao@redhat.com.
Tested-by: Tao Liu <ltao@redhat.com>
On Tue, Mar 3, 2026 at 6:49 AM Imre Deak <imre.deak@intel.com> wrote:
>
> intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
> initialized, and dmc is thus NULL.
>
> That would be the case when the call path is
> intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
> gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
> intel_power_domains_init_hw() is called *before* intel_dmc_init().
>
> However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
> conditionally, depending on the current and target DC states. At probe,
> the target is disabled, but if DC6 is enabled, the function is called,
> and an oops follows. Apparently it's quite unlikely that DC6 is enabled
> at probe, as we haven't seen this failure mode before.
>
> It is also strange to have DC6 enabled at boot, since that would require
> the DMC firmware (loaded by BIOS); the BIOS loading the DMC firmware and
> the driver stopping / reprogramming the firmware is a poorly specified
> sequence and as such unlikely an intentional BIOS behaviour. It's more
> likely that BIOS is leaving an unintentionally enabled DC6 HW state
> behind (without actually loading the required DMC firmware for this).
>
> The tracking of the DC6 allowed counter only works if starting /
> stopping the counter depends on the _SW_ DC6 state vs. the current _HW_
> DC6 state (since stopping the counter requires the DC5 counter captured
> when the counter was started). Thus, using the HW DC6 state is incorrect
> and it also leads to the above oops. Fix both issues by using the SW DC6
> state for the tracking.
>
> This is v2 of the fix originally sent by Jani, updated based on the
> first References: discussion below.
>
> Link: https://lore.kernel.org/all/3626411dc9e556452c432d0919821b76d9991217@intel.com
> Link: https://lore.kernel.org/all/20260228130946.50919-2-ltao@redhat.com
> Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
> Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Tao Liu <ltao@redhat.com>
> Cc: <stable@vger.kernel.org> # v6.16+
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_power_well.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dmc.c | 3 +--
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 9c8d29839cafc..969b2c421d308 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -852,7 +852,7 @@ void gen9_set_dc_state(struct intel_display *display, u32 state)
> power_domains->dc_state, val & mask);
>
> enable_dc6 = state & DC_STATE_EN_UPTO_DC6;
> - dc6_was_enabled = val & DC_STATE_EN_UPTO_DC6;
> + dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
> if (!dc6_was_enabled && enable_dc6)
> intel_dmc_update_dc6_allowed_count(display, true);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index c3b411259a0c5..90ba932d940ac 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -1598,8 +1598,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
> return false;
>
> mutex_lock(&power_domains->lock);
> - dc6_enabled = intel_de_read(display, DC_STATE_EN) &
> - DC_STATE_EN_UPTO_DC6;
> + dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
> if (dc6_enabled)
> intel_dmc_update_dc6_allowed_count(display, false);
>
> --
> 2.49.1
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2026-03-02 17:48 ` [PATCH v2] " Imre Deak
2026-03-03 2:44 ` Tao Liu
@ 2026-03-06 10:12 ` Jani Nikula
2026-03-06 14:57 ` Imre Deak
1 sibling, 1 reply; 15+ messages in thread
From: Jani Nikula @ 2026-03-06 10:12 UTC (permalink / raw)
To: Imre Deak, intel-gfx, intel-xe; +Cc: Mohammed Thasleem, Tao Liu, stable
On Mon, 02 Mar 2026, Imre Deak <imre.deak@intel.com> wrote:
> intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
> initialized, and dmc is thus NULL.
>
> That would be the case when the call path is
> intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
> gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
> intel_power_domains_init_hw() is called *before* intel_dmc_init().
>
> However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
> conditionally, depending on the current and target DC states. At probe,
> the target is disabled, but if DC6 is enabled, the function is called,
> and an oops follows. Apparently it's quite unlikely that DC6 is enabled
> at probe, as we haven't seen this failure mode before.
>
> It is also strange to have DC6 enabled at boot, since that would require
> the DMC firmware (loaded by BIOS); the BIOS loading the DMC firmware and
> the driver stopping / reprogramming the firmware is a poorly specified
> sequence and as such unlikely an intentional BIOS behaviour. It's more
> likely that BIOS is leaving an unintentionally enabled DC6 HW state
> behind (without actually loading the required DMC firmware for this).
>
> The tracking of the DC6 allowed counter only works if starting /
> stopping the counter depends on the _SW_ DC6 state vs. the current _HW_
> DC6 state (since stopping the counter requires the DC5 counter captured
> when the counter was started). Thus, using the HW DC6 state is incorrect
> and it also leads to the above oops. Fix both issues by using the SW DC6
> state for the tracking.
>
> This is v2 of the fix originally sent by Jani, updated based on the
> first References: discussion below.
>
> Link: https://lore.kernel.org/all/3626411dc9e556452c432d0919821b76d9991217@intel.com
> Link: https://lore.kernel.org/all/20260228130946.50919-2-ltao@redhat.com
> Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
> Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Tao Liu <ltao@redhat.com>
> Cc: <stable@vger.kernel.org> # v6.16+
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
However, I still think the whole gen9_set_dc_state() is a bit fragile
wrt DMC loaded or not. Pretty much everything else wraps the relevant
parts within intel_dmc_has_payload(), and it's obvious what's going
on. The comment for the function primarily talks about DMC but there's
not even a mention of the possibility DMC is not loaded.
I also think intel_dmc_update_dc6_allowed_count() is fragile in oopsing
when DMC is not loaded, and I still think that should be fixed too.
The patch at hand looks like it fixes the root cause, but I still think
the parts around it could use some more robustness, if only to make it
evident to the reader what the possible conditions are.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/display/intel_display_power_well.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dmc.c | 3 +--
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> index 9c8d29839cafc..969b2c421d308 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> @@ -852,7 +852,7 @@ void gen9_set_dc_state(struct intel_display *display, u32 state)
> power_domains->dc_state, val & mask);
>
> enable_dc6 = state & DC_STATE_EN_UPTO_DC6;
> - dc6_was_enabled = val & DC_STATE_EN_UPTO_DC6;
> + dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
> if (!dc6_was_enabled && enable_dc6)
> intel_dmc_update_dc6_allowed_count(display, true);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index c3b411259a0c5..90ba932d940ac 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -1598,8 +1598,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
> return false;
>
> mutex_lock(&power_domains->lock);
> - dc6_enabled = intel_de_read(display, DC_STATE_EN) &
> - DC_STATE_EN_UPTO_DC6;
> + dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
> if (dc6_enabled)
> intel_dmc_update_dc6_allowed_count(display, false);
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v2] drm/i915/dmc: fix an unlikely NULL pointer deference at probe
2026-03-06 10:12 ` Jani Nikula
@ 2026-03-06 14:57 ` Imre Deak
0 siblings, 0 replies; 15+ messages in thread
From: Imre Deak @ 2026-03-06 14:57 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe, Mohammed Thasleem, Tao Liu, stable
On Fri, Mar 06, 2026 at 12:12:41PM +0200, Jani Nikula wrote:
> On Mon, 02 Mar 2026, Imre Deak <imre.deak@intel.com> wrote:
> > intel_dmc_update_dc6_allowed_count() oopses when DMC hasn't been
> > initialized, and dmc is thus NULL.
> >
> > That would be the case when the call path is
> > intel_power_domains_init_hw() -> {skl,bxt,icl}_display_core_init() ->
> > gen9_set_dc_state() -> intel_dmc_update_dc6_allowed_count(), as
> > intel_power_domains_init_hw() is called *before* intel_dmc_init().
> >
> > However, gen9_set_dc_state() calls intel_dmc_update_dc6_allowed_count()
> > conditionally, depending on the current and target DC states. At probe,
> > the target is disabled, but if DC6 is enabled, the function is called,
> > and an oops follows. Apparently it's quite unlikely that DC6 is enabled
> > at probe, as we haven't seen this failure mode before.
> >
> > It is also strange to have DC6 enabled at boot, since that would require
> > the DMC firmware (loaded by BIOS); the BIOS loading the DMC firmware and
> > the driver stopping / reprogramming the firmware is a poorly specified
> > sequence and as such unlikely an intentional BIOS behaviour. It's more
> > likely that BIOS is leaving an unintentionally enabled DC6 HW state
> > behind (without actually loading the required DMC firmware for this).
> >
> > The tracking of the DC6 allowed counter only works if starting /
> > stopping the counter depends on the _SW_ DC6 state vs. the current _HW_
> > DC6 state (since stopping the counter requires the DC5 counter captured
> > when the counter was started). Thus, using the HW DC6 state is incorrect
> > and it also leads to the above oops. Fix both issues by using the SW DC6
> > state for the tracking.
> >
> > This is v2 of the fix originally sent by Jani, updated based on the
> > first References: discussion below.
> >
> > Link: https://lore.kernel.org/all/3626411dc9e556452c432d0919821b76d9991217@intel.com
> > Link: https://lore.kernel.org/all/20260228130946.50919-2-ltao@redhat.com
> > Fixes: 88c1f9a4d36d ("drm/i915/dmc: Create debugfs entry for dc6 counter")
> > Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>
> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > Cc: Tao Liu <ltao@redhat.com>
> > Cc: <stable@vger.kernel.org> # v6.16+
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Thanks.
> However, I still think the whole gen9_set_dc_state() is a bit fragile
> wrt DMC loaded or not. Pretty much everything else wraps the relevant
> parts within intel_dmc_has_payload(), and it's obvious what's going
> on. The comment for the function primarily talks about DMC but there's
> not even a mention of the possibility DMC is not loaded.
Yes, the DC state HW interface programmed via the DC_STATE_EN register
is not too intuitive. Some DC states are handled by the DMC firmware
(DC3CO, DC5, DC6) but others are not (DC9). Thus, the former states
require the FW to be loaded, but the latter state doesn't.
The fact that DC3CO, DC5, DC6 will not get enabled until the firmware is
loaded is ensured by holding a reference on the DC_OFF power well, while
the firmware is being loaded and that reference gets dropped only once
the firmware is loaded; the DC_OFF power reference in turn maintains the
DC_STATE_DISABLE state.
I agree with you in that there could be an assert/early return in
gen9_set_dc_state() according to the above:
if (drm_WARN_ON_ONCE(display->drm,
(state & (DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC5 | DC_STATE_EN_UPTO_DC6)) &&
!intel_dmc_has_payload(display)))
return;
and the function documentation should also explain the difference
between the DC states wrt. the firmware dependency and the way setting a
DC state handled by the firmware is prevented via the DC_OFF power
reference.
> I also think intel_dmc_update_dc6_allowed_count() is fragile in oopsing
> when DMC is not loaded, and I still think that should be fixed too.
The only way intel_dmc_update_dc6_allowed_count() can be called is
(after this patch) if DC6 was ever enabled by the driver. Based on the
above that is only possible once the firmware is already loaded.
intel_dmc_update_dc6_allowed_count() could also assert this:
if (drm_WARN_ON(display->drm, !intel_dmc_has_payload(display)))
return;
> The patch at hand looks like it fixes the root cause, but I still think
> the parts around it could use some more robustness, if only to make it
> evident to the reader what the possible conditions are.
>
>
> BR,
> Jani.
>
>
> > ---
> > drivers/gpu/drm/i915/display/intel_display_power_well.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_dmc.c | 3 +--
> > 2 files changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > index 9c8d29839cafc..969b2c421d308 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
> > @@ -852,7 +852,7 @@ void gen9_set_dc_state(struct intel_display *display, u32 state)
> > power_domains->dc_state, val & mask);
> >
> > enable_dc6 = state & DC_STATE_EN_UPTO_DC6;
> > - dc6_was_enabled = val & DC_STATE_EN_UPTO_DC6;
> > + dc6_was_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
> > if (!dc6_was_enabled && enable_dc6)
> > intel_dmc_update_dc6_allowed_count(display, true);
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> > index c3b411259a0c5..90ba932d940ac 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> > @@ -1598,8 +1598,7 @@ static bool intel_dmc_get_dc6_allowed_count(struct intel_display *display, u32 *
> > return false;
> >
> > mutex_lock(&power_domains->lock);
> > - dc6_enabled = intel_de_read(display, DC_STATE_EN) &
> > - DC_STATE_EN_UPTO_DC6;
> > + dc6_enabled = power_domains->dc_state & DC_STATE_EN_UPTO_DC6;
> > if (dc6_enabled)
> > intel_dmc_update_dc6_allowed_count(display, false);
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2026-03-06 14:58 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
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2025-12-02 18:39 [PATCH] drm/i915/dmc: fix an unlikely NULL pointer deference at probe Jani Nikula
2025-12-02 19:00 ` ✓ CI.KUnit: success for " Patchwork
2025-12-02 20:13 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-02 21:24 ` [PATCH] " Imre Deak
2025-12-02 21:35 ` Imre Deak
2025-12-03 8:13 ` Jani Nikula
2025-12-03 10:38 ` Imre Deak
2025-12-04 11:30 ` Jani Nikula
2025-12-04 13:02 ` Imre Deak
2026-01-07 11:16 ` Jani Nikula
2025-12-03 3:37 ` ✓ Xe.CI.Full: success for " Patchwork
2026-03-02 17:48 ` [PATCH v2] " Imre Deak
2026-03-03 2:44 ` Tao Liu
2026-03-06 10:12 ` Jani Nikula
2026-03-06 14:57 ` Imre Deak
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