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From: Matthew Brost <matthew.brost@intel.com>
To: Jan Maslak <jan.maslak@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <maciej.patelczyk@intel.com>,
	<joonas.lahtinen@intel.com>
Subject: Re: [PATCH 1/1] drm/xe: Restore engine registers before restarting schedulers after GT reset
Date: Fri, 5 Dec 2025 12:37:53 -0800	[thread overview]
Message-ID: <aTNCoWlUZk/MwmWI@lstrano-desk.jf.intel.com> (raw)
In-Reply-To: <aTNCY3LFsqgy9My5@lstrano-desk.jf.intel.com>

On Fri, Dec 05, 2025 at 12:36:51PM -0800, Matthew Brost wrote:
> On Fri, Dec 05, 2025 at 05:55:29AM +0100, Jan Maslak wrote:
> > During GT reset recovery in do_gt_restart(), xe_uc_start() was called
> > before xe_reg_sr_apply_mmio() restored engine-specific registers. This
> > created a race window where the scheduler could run jobs before hardware
> > state was fully restored.
> > 
> > This caused failures in eudebug tests (xe_exec_sip_eudebug@breakpoint-
> > waitsip-*) where TD_CTL register (containing TD_CTL_GLOBAL_DEBUG_ENABLE)
> > wasn't restored before jobs started executing. Breakpoints would fail to
> > trigger SIP entry because the debug enable bit wasn't set yet.
> > 
> > Fix by moving engine register restoration before xe_uc_start(), ensuring
> > all hardware state is fully restored before any jobs can be scheduled.
> > 
> > Signed-off-by: Jan Maslak <jan.maslak@intel.com>
> > ---
> >  drivers/gpu/drm/xe/xe_gt.c | 7 ++++---
> >  1 file changed, 4 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> > index 7caf781ba9e8..17642d71f98f 100644
> > --- a/drivers/gpu/drm/xe/xe_gt.c
> > +++ b/drivers/gpu/drm/xe/xe_gt.c
> > @@ -771,13 +771,14 @@ static int do_gt_restart(struct xe_gt *gt)
> >  		xe_gt_sriov_pf_init_hw(gt);
> >  
> >  	xe_mocs_init(gt);
> > -	err = xe_uc_start(&gt->uc);
> > -	if (err)
> > -		return err;
> >  
> >  	for_each_hw_engine(hwe, gt, id)
> >  		xe_reg_sr_apply_mmio(&hwe->reg_sr, gt);
> >  
> > +	err = xe_uc_start(&gt->uc);
> > +	if (err)
> > +		return err;
> > +
> >  	/* Get CCS mode in sync between sw/hw */
> >  	xe_gt_apply_ccs_mode(gt);
> >  
> 
> I think you need to move this xe_gt_apply_ccs_mode as that is also

typo... s/move this xe_gt_apply_ccs_mode/move this after xe_gt_apply_ccs_mode

Matt

> writing MMIO registers that should be configured before bring the chip
> back to a live state.
> 
> Also I think you need a fixes tag here as this is pretty clearly a
> bug.
> 
> Matt
> 
> > -- 
> > 2.34.1
> > 

  reply	other threads:[~2025-12-05 20:38 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-05  4:55 [PATCH 0/1] drm/xe: Restore engine registers before restarting schedulers after GT reset Jan Maslak
2025-12-05  4:55 ` [PATCH 1/1] " Jan Maslak
2025-12-05 20:36   ` Matthew Brost
2025-12-05 20:37     ` Matthew Brost [this message]
2025-12-05  5:18 ` ✓ CI.KUnit: success for " Patchwork
2025-12-05  6:20 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-05  7:11 ` ✗ Xe.CI.Full: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2025-12-10 14:56 [PATCH 0/1] " Jan Maslak
2025-12-10 14:56 ` [PATCH 1/1] " Jan Maslak
2025-12-10 18:25   ` Cavitt, Jonathan
2025-12-10 18:47     ` Matthew Brost

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