Re: [PATCH v5 3/4] drm/xe/hwmon: Expose GPU pcie temperature

[Raag Jadav <raag.jadav@intel.com>]

On Sat, Jan 10, 2026 at 01:46:43AM +0530, Karthik Poosa wrote:
> Expose GPU PCIe average temperature and its limits via hwmon sysfs entry

Please also use 'PCIe' with correct upper/lower case in patch subject.

...

>  /* Index of memory controller in READ_THERMAL_DATA output */
> -#define TEMP_INDEX_MCTRL	(2)
> +#define TEMP_INDEX_MCTRL	2

Unneeded churn. If you don't want braces, don't even introduce it in
earlier patch.

> +#define PCIE_SENSOR_GROUP_ID	0x2

This is used as part of mailbox command ...

> +#define PCIE_SENSOR_MASK	REG_GENMASK(31, 16)

... and these are output bitfields, so both should be in xe_pcode_api.h.

...

> +static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
> +{
> +	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> +	int ret;
> +	u32 data = 0;

Use reverse xmas tree order.

> +	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA,
> +						  PCIE_SENSOR_GROUP_ID), &data, NULL);
> +	if (ret)
> +		return ret;
> +
> +	/* Sensor offset is different for G21 */
> +	if (hwmon->xe->info.subplatform != XE_SUBPLATFORM_BATTLEMAGE_G21)
> +		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
> +
> +	data &= TEMP_MASK;

Use REG_FIELD_GET() for consistency.

> +	*val = (s8)data * MILLIDEGREE_PER_DEGREE;
> +
> +	return 0;
> +}

Reviewed-by: Raag Jadav <raag.jadav@intel.com>