* [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()
@ 2026-02-11 11:58 Imre Deak
2026-02-11 11:58 ` [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range Imre Deak
` (4 more replies)
0 siblings, 5 replies; 14+ messages in thread
From: Imre Deak @ 2026-02-11 11:58 UTC (permalink / raw)
To: intel-gfx, intel-xe
Clarify that the baseline pipe BPP - i.e. the non-DP specific
platform/EDID maximum BPP limited by any user-requested max-bpc setting
- set by compute_sink_pipe_bpp() is a baseline _target_ pipe BPP. This
target BPP can get either rejected or adjusted (lowering or increasing
it as needed) by the encoder state computation based on other
constrains, like a minimum pipe BPP dictated by a non-RGB output format
(24 BPP) or a min/max DSC input BPP dictated by a DSC sink. Whether an
out-of-bound target BPP is adjusted or rejected depends on the max-bpc
property's semantic assumed by the driver, which is atm to reject such a
request.
A follow-up change will also compute the baseline _maximum_ pipe BPP,
which is the non-DP specific platform/EDID maximum BPP w/o the requested
max-bpc adjustment and as such is a hard limit: The encoder state
computation must ensure that the final BPP selected for the modeset is
below this maximum. Tracking the baseline maximum pipe BPP separately
will allow for adjusting the baseline target BPP as needed, clamping it
to the valid DP min/max pipe BPP range, instead of rejecting an
out-of-bound BPC/BPP request.
To clarify the above semantics rename bpp in compute_sink_bpp() to
target_pipe_bpp in this patch, preparing for a follow-up change also
computing max_pipe_bpp in the same function.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 47 +++++++++++---------
1 file changed, 25 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 295f14416be70..ab4b59916d2e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4350,6 +4350,23 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
return 0;
}
+static int bpc_to_bpp(int bpc)
+{
+ switch (bpc) {
+ case 6 ... 7:
+ return 6 * 3;
+ case 8 ... 9:
+ return 8 * 3;
+ case 10 ... 11:
+ return 10 * 3;
+ case 12 ... 16:
+ return 12 * 3;
+ default:
+ MISSING_CASE(bpc);
+ return -EINVAL;
+ }
+}
+
static int
compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
struct intel_crtc_state *crtc_state)
@@ -4357,36 +4374,22 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
struct intel_display *display = to_intel_display(crtc_state);
struct drm_connector *connector = conn_state->connector;
const struct drm_display_info *info = &connector->display_info;
- int bpp;
+ int target_pipe_bpp;
- switch (conn_state->max_bpc) {
- case 6 ... 7:
- bpp = 6 * 3;
- break;
- case 8 ... 9:
- bpp = 8 * 3;
- break;
- case 10 ... 11:
- bpp = 10 * 3;
- break;
- case 12 ... 16:
- bpp = 12 * 3;
- break;
- default:
- MISSING_CASE(conn_state->max_bpc);
- return -EINVAL;
- }
+ target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
+ if (target_pipe_bpp < 0)
+ return target_pipe_bpp;
- if (bpp < crtc_state->pipe_bpp) {
+ if (target_pipe_bpp < crtc_state->pipe_bpp) {
drm_dbg_kms(display->drm,
- "[CONNECTOR:%d:%s] Limiting display bpp to %d "
+ "[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
"(EDID bpp %d, max requested bpp %d, max platform bpp %d)\n",
connector->base.id, connector->name,
- bpp, 3 * info->bpc,
+ target_pipe_bpp, 3 * info->bpc,
3 * conn_state->max_requested_bpc,
crtc_state->pipe_bpp);
- crtc_state->pipe_bpp = bpp;
+ crtc_state->pipe_bpp = target_pipe_bpp;
}
return 0;
--
2.49.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range
2026-02-11 11:58 [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp() Imre Deak
@ 2026-02-11 11:58 ` Imre Deak
2026-02-11 13:36 ` Michał Grzelak
2026-02-11 16:06 ` Nautiyal, Ankit K
2026-02-11 13:35 ` [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()< Michał Grzelak
` (3 subsequent siblings)
4 siblings, 2 replies; 14+ messages in thread
From: Imre Deak @ 2026-02-11 11:58 UTC (permalink / raw)
To: intel-gfx, intel-xe
The user's request for a maximum BPC - via the max-bpc connector
property - determines the pipe BPP selected by the encoder, which is in
turn used either as the uncompressed output BPP or as the input BPP for
the DSC engine. This user-requested BPC->BPP can be outside of the
source/sink's supported valid min/max pipe BPP range and atm such an
out-of-bound request will be rejected by the encoder's state
computation.
As opposed to the above, the semantic for the max-bpc connector property
- which the user may reasonably expect - is not to fail the modeset in
case of an out-of-bound max BPC request, rather to adjust the request
clamping it to the valid BPP range.
Based on the above, calculate the baseline (i.e. the non-DP specific
platform/EDID) _maximum_ pipe BPP, storing it in
intel_crtc_state::max_pipe_bpp, separately from the baseline _target_
pipe BPP (which is the lower BPP of the baseline maximum and requested
BPP, stored in intel_crtc_state::pipe_bpp). This allows the encoder
state computation to use the baseline maximum pipe BPP as a hard limit
for the selected pipe BPP, while also letting it use the baseline target
pipe BPP only as a preference, clamping this target BPP to the valid
DP pipe BPP range.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++--
3 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index ab4b59916d2e7..dae7a7d11cb84 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4374,12 +4374,24 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
struct intel_display *display = to_intel_display(crtc_state);
struct drm_connector *connector = conn_state->connector;
const struct drm_display_info *info = &connector->display_info;
+ int edid_bpc = info->bpc ? : 8;
int target_pipe_bpp;
+ int max_edid_bpp;
+
+ max_edid_bpp = bpc_to_bpp(edid_bpc);
+ if (max_edid_bpp < 0)
+ return max_edid_bpp;
target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
if (target_pipe_bpp < 0)
return target_pipe_bpp;
+ /*
+ * The maximum pipe BPP is the minimum of the max platform BPP and
+ * the max EDID BPP.
+ */
+ crtc_state->max_pipe_bpp = min(crtc_state->pipe_bpp, max_edid_bpp);
+
if (target_pipe_bpp < crtc_state->pipe_bpp) {
drm_dbg_kms(display->drm,
"[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e6298279dc892..e8e4af03a6a6c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1163,6 +1163,7 @@ struct intel_crtc_state {
} dsi_pll;
int max_link_bpp_x16; /* in 1/16 bpp units */
+ int max_pipe_bpp; /* in 1 bpp units */
int pipe_bpp; /* in 1 bpp units */
int min_hblank;
struct intel_link_m_n dp_m_n;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 48845899298e4..4018b0122e8e0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1769,7 +1769,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
struct intel_connector *connector = intel_dp->attached_connector;
int bpp, bpc;
- bpc = crtc_state->pipe_bpp / 3;
+ bpc = crtc_state->max_pipe_bpp / 3;
if (intel_dp->dfp.max_bpc)
bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
@@ -2726,7 +2726,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
* previously. This hack should be removed once we have the
* proper retry logic in place.
*/
- limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
+ limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp, 24);
} else {
limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
respect_downstream_limits);
@@ -2757,6 +2757,26 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
return false;
+ /*
+ * crtc_state->pipe_bpp is the non-DP specific baseline (platform/EDID)
+ * maximum pipe BPP limited by the max-BPC connector property request.
+ * Since by now pipe.max_bpp is <= the above baseline BPP, the only
+ * remaining reason for adjusting pipe.max_bpp is the max-BPC connector
+ * property request. Adjust pipe.max_bpp to this request within the
+ * current valid pipe.min_bpp .. pipe.max_bpp range.
+ */
+ limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
+ limits->pipe.max_bpp);
+ if (dsc)
+ limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
+ limits->pipe.max_bpp);
+
+ if (limits->pipe.max_bpp != crtc_state->pipe_bpp)
+ drm_dbg_kms(display->drm,
+ "[CONNECTOR:%d:%s] Adjusting requested max pipe bpp %d -> %d\n",
+ connector->base.base.id, connector->base.name,
+ crtc_state->pipe_bpp, limits->pipe.max_bpp);
+
if (is_mst || intel_dp->use_max_params) {
/*
* For MST we always configure max link bw - the spec doesn't
--
2.49.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()<
2026-02-11 11:58 [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp() Imre Deak
2026-02-11 11:58 ` [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range Imre Deak
@ 2026-02-11 13:35 ` Michał Grzelak
2026-02-11 23:25 ` Michał Grzelak
2026-02-11 14:14 ` ✓ CI.KUnit: success for series starting with [1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp() Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 14+ messages in thread
From: Michał Grzelak @ 2026-02-11 13:35 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx, intel-xe
[-- Attachment #1: Type: text/plain, Size: 4031 bytes --]
Hello Imre,
Some comments below wrt commit messages. No functional change requested.
On Wed, 11 Feb 2026, Imre Deak wrote:
> Clarify that the baseline pipe BPP - i.e. the non-DP specific
> platform/EDID maximum BPP limited by any user-requested max-bpc setting
> - set by compute_sink_pipe_bpp() is a baseline _target_ pipe BPP. This
> target BPP can get either rejected or adjusted (lowering or increasing
> it as needed) by the encoder state computation based on other
> constrains, like a minimum pipe BPP dictated by a non-RGB output format
s/contrains/contraints
> (24 BPP) or a min/max DSC input BPP dictated by a DSC sink. Whether an
> out-of-bound target BPP is adjusted or rejected depends on the max-bpc
> property's semantic assumed by the driver, which is atm to reject such a
s/semantic/semantics
> request.
>
> A follow-up change will also compute the baseline _maximum_ pipe BPP,
> which is the non-DP specific platform/EDID maximum BPP w/o the requested
> max-bpc adjustment and as such is a hard limit: The encoder state
s/The/the
> computation must ensure that the final BPP selected for the modeset is
> below this maximum. Tracking the baseline maximum pipe BPP separately
> will allow for adjusting the baseline target BPP as needed, clamping it
> to the valid DP min/max pipe BPP range, instead of rejecting an
> out-of-bound BPC/BPP request.
>
> To clarify the above semantics rename bpp in compute_sink_bpp() to
s/compute_sink_bpp()/compute_sink_pipe_bpp()
> target_pipe_bpp in this patch, preparing for a follow-up change also
> computing max_pipe_bpp in the same function.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 47 +++++++++++---------
> 1 file changed, 25 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 295f14416be70..ab4b59916d2e7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4350,6 +4350,23 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
> return 0;
> }
>
> +static int bpc_to_bpp(int bpc)
> +{
> + switch (bpc) {
> + case 6 ... 7:
> + return 6 * 3;
> + case 8 ... 9:
> + return 8 * 3;
> + case 10 ... 11:
> + return 10 * 3;
> + case 12 ... 16:
> + return 12 * 3;
> + default:
> + MISSING_CASE(bpc);
> + return -EINVAL;
> + }
> +}
> +
> static int
> compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
> struct intel_crtc_state *crtc_state)
> @@ -4357,36 +4374,22 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
> struct intel_display *display = to_intel_display(crtc_state);
> struct drm_connector *connector = conn_state->connector;
> const struct drm_display_info *info = &connector->display_info;
> - int bpp;
> + int target_pipe_bpp;
>
> - switch (conn_state->max_bpc) {
> - case 6 ... 7:
> - bpp = 6 * 3;
> - break;
> - case 8 ... 9:
> - bpp = 8 * 3;
> - break;
> - case 10 ... 11:
> - bpp = 10 * 3;
> - break;
> - case 12 ... 16:
> - bpp = 12 * 3;
> - break;
> - default:
> - MISSING_CASE(conn_state->max_bpc);
> - return -EINVAL;
> - }
> + target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
> + if (target_pipe_bpp < 0)
> + return target_pipe_bpp;
>
> - if (bpp < crtc_state->pipe_bpp) {
> + if (target_pipe_bpp < crtc_state->pipe_bpp) {
> drm_dbg_kms(display->drm,
> - "[CONNECTOR:%d:%s] Limiting display bpp to %d "
> + "[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
> "(EDID bpp %d, max requested bpp %d, max platform bpp %d)\n",
> connector->base.id, connector->name,
> - bpp, 3 * info->bpc,
> + target_pipe_bpp, 3 * info->bpc,
> 3 * conn_state->max_requested_bpc,
> crtc_state->pipe_bpp);
>
> - crtc_state->pipe_bpp = bpp;
> + crtc_state->pipe_bpp = target_pipe_bpp;
> }
>
> return 0;
> --
> 2.49.1
>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range
2026-02-11 11:58 ` [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range Imre Deak
@ 2026-02-11 13:36 ` Michał Grzelak
2026-02-11 16:06 ` Nautiyal, Ankit K
1 sibling, 0 replies; 14+ messages in thread
From: Michał Grzelak @ 2026-02-11 13:36 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx, intel-xe
[-- Attachment #1: Type: text/plain, Size: 5660 bytes --]
On Wed, 11 Feb 2026, Imre Deak wrote:
> The user's request for a maximum BPC - via the max-bpc connector
> property - determines the pipe BPP selected by the encoder, which is in
> turn used either as the uncompressed output BPP or as the input BPP for
> the DSC engine. This user-requested BPC->BPP can be outside of the
> source/sink's supported valid min/max pipe BPP range and atm such an
> out-of-bound request will be rejected by the encoder's state
> computation.
>
> As opposed to the above, the semantic for the max-bpc connector property
s/semantic/semantics
> - which the user may reasonably expect - is not to fail the modeset in
> case of an out-of-bound max BPC request, rather to adjust the request
> clamping it to the valid BPP range.
>
> Based on the above, calculate the baseline (i.e. the non-DP specific
> platform/EDID) _maximum_ pipe BPP, storing it in
> intel_crtc_state::max_pipe_bpp, separately from the baseline _target_
> pipe BPP (which is the lower BPP of the baseline maximum and requested
> BPP, stored in intel_crtc_state::pipe_bpp). This allows the encoder
> state computation to use the baseline maximum pipe BPP as a hard limit
> for the selected pipe BPP, while also letting it use the baseline target
> pipe BPP only as a preference, clamping this target BPP to the valid
> DP pipe BPP range.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++
> .../drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++--
> 3 files changed, 35 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ab4b59916d2e7..dae7a7d11cb84 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4374,12 +4374,24 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
> struct intel_display *display = to_intel_display(crtc_state);
> struct drm_connector *connector = conn_state->connector;
> const struct drm_display_info *info = &connector->display_info;
> + int edid_bpc = info->bpc ? : 8;
> int target_pipe_bpp;
> + int max_edid_bpp;
> +
> + max_edid_bpp = bpc_to_bpp(edid_bpc);
> + if (max_edid_bpp < 0)
> + return max_edid_bpp;
>
> target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
> if (target_pipe_bpp < 0)
> return target_pipe_bpp;
>
> + /*
> + * The maximum pipe BPP is the minimum of the max platform BPP and
> + * the max EDID BPP.
> + */
> + crtc_state->max_pipe_bpp = min(crtc_state->pipe_bpp, max_edid_bpp);
> +
> if (target_pipe_bpp < crtc_state->pipe_bpp) {
> drm_dbg_kms(display->drm,
> "[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e6298279dc892..e8e4af03a6a6c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1163,6 +1163,7 @@ struct intel_crtc_state {
> } dsi_pll;
>
> int max_link_bpp_x16; /* in 1/16 bpp units */
> + int max_pipe_bpp; /* in 1 bpp units */
> int pipe_bpp; /* in 1 bpp units */
> int min_hblank;
> struct intel_link_m_n dp_m_n;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 48845899298e4..4018b0122e8e0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1769,7 +1769,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
> struct intel_connector *connector = intel_dp->attached_connector;
> int bpp, bpc;
>
> - bpc = crtc_state->pipe_bpp / 3;
> + bpc = crtc_state->max_pipe_bpp / 3;
>
> if (intel_dp->dfp.max_bpc)
> bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
> @@ -2726,7 +2726,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> * previously. This hack should be removed once we have the
> * proper retry logic in place.
> */
> - limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
> + limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp, 24);
> } else {
> limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
> respect_downstream_limits);
> @@ -2757,6 +2757,26 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
> return false;
>
> + /*
> + * crtc_state->pipe_bpp is the non-DP specific baseline (platform/EDID)
> + * maximum pipe BPP limited by the max-BPC connector property request.
> + * Since by now pipe.max_bpp is <= the above baseline BPP, the only
> + * remaining reason for adjusting pipe.max_bpp is the max-BPC connector
> + * property request. Adjust pipe.max_bpp to this request within the
> + * current valid pipe.min_bpp .. pipe.max_bpp range.
> + */
> + limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
> + limits->pipe.max_bpp);
> + if (dsc)
> + limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
> + limits->pipe.max_bpp);
> +
> + if (limits->pipe.max_bpp != crtc_state->pipe_bpp)
> + drm_dbg_kms(display->drm,
> + "[CONNECTOR:%d:%s] Adjusting requested max pipe bpp %d -> %d\n",
> + connector->base.base.id, connector->base.name,
> + crtc_state->pipe_bpp, limits->pipe.max_bpp);
> +
> if (is_mst || intel_dp->use_max_params) {
> /*
> * For MST we always configure max link bw - the spec doesn't
> --
> 2.49.1
>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ CI.KUnit: success for series starting with [1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()
2026-02-11 11:58 [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp() Imre Deak
2026-02-11 11:58 ` [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range Imre Deak
2026-02-11 13:35 ` [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()< Michał Grzelak
@ 2026-02-11 14:14 ` Patchwork
2026-02-11 14:52 ` ✓ Xe.CI.BAT: " Patchwork
[not found] ` <177085437889.247401.14482774231614824232@a3b018990fe9>
4 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-02-11 14:14 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-xe
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()
URL : https://patchwork.freedesktop.org/series/161496/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[14:12:42] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:12:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:13:18] Starting KUnit Kernel (1/1)...
[14:13:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:13:19] ================== guc_buf (11 subtests) ===================
[14:13:19] [PASSED] test_smallest
[14:13:19] [PASSED] test_largest
[14:13:19] [PASSED] test_granular
[14:13:19] [PASSED] test_unique
[14:13:19] [PASSED] test_overlap
[14:13:19] [PASSED] test_reusable
[14:13:19] [PASSED] test_too_big
[14:13:19] [PASSED] test_flush
[14:13:19] [PASSED] test_lookup
[14:13:19] [PASSED] test_data
[14:13:19] [PASSED] test_class
[14:13:19] ===================== [PASSED] guc_buf =====================
[14:13:19] =================== guc_dbm (7 subtests) ===================
[14:13:19] [PASSED] test_empty
[14:13:19] [PASSED] test_default
[14:13:19] ======================== test_size ========================
[14:13:19] [PASSED] 4
[14:13:19] [PASSED] 8
[14:13:19] [PASSED] 32
[14:13:19] [PASSED] 256
[14:13:19] ==================== [PASSED] test_size ====================
[14:13:19] ======================= test_reuse ========================
[14:13:19] [PASSED] 4
[14:13:19] [PASSED] 8
[14:13:19] [PASSED] 32
[14:13:19] [PASSED] 256
[14:13:19] =================== [PASSED] test_reuse ====================
[14:13:19] =================== test_range_overlap ====================
[14:13:19] [PASSED] 4
[14:13:19] [PASSED] 8
[14:13:19] [PASSED] 32
[14:13:19] [PASSED] 256
[14:13:19] =============== [PASSED] test_range_overlap ================
[14:13:19] =================== test_range_compact ====================
[14:13:19] [PASSED] 4
[14:13:19] [PASSED] 8
[14:13:19] [PASSED] 32
[14:13:19] [PASSED] 256
[14:13:19] =============== [PASSED] test_range_compact ================
[14:13:19] ==================== test_range_spare =====================
[14:13:19] [PASSED] 4
[14:13:19] [PASSED] 8
[14:13:19] [PASSED] 32
[14:13:19] [PASSED] 256
[14:13:19] ================ [PASSED] test_range_spare =================
[14:13:19] ===================== [PASSED] guc_dbm =====================
[14:13:19] =================== guc_idm (6 subtests) ===================
[14:13:19] [PASSED] bad_init
[14:13:19] [PASSED] no_init
[14:13:19] [PASSED] init_fini
[14:13:19] [PASSED] check_used
[14:13:19] [PASSED] check_quota
[14:13:19] [PASSED] check_all
[14:13:19] ===================== [PASSED] guc_idm =====================
[14:13:19] ================== no_relay (3 subtests) ===================
[14:13:19] [PASSED] xe_drops_guc2pf_if_not_ready
[14:13:19] [PASSED] xe_drops_guc2vf_if_not_ready
[14:13:19] [PASSED] xe_rejects_send_if_not_ready
[14:13:19] ==================== [PASSED] no_relay =====================
[14:13:19] ================== pf_relay (14 subtests) ==================
[14:13:19] [PASSED] pf_rejects_guc2pf_too_short
[14:13:19] [PASSED] pf_rejects_guc2pf_too_long
[14:13:19] [PASSED] pf_rejects_guc2pf_no_payload
[14:13:19] [PASSED] pf_fails_no_payload
[14:13:19] [PASSED] pf_fails_bad_origin
[14:13:19] [PASSED] pf_fails_bad_type
[14:13:19] [PASSED] pf_txn_reports_error
[14:13:19] [PASSED] pf_txn_sends_pf2guc
[14:13:19] [PASSED] pf_sends_pf2guc
[14:13:19] [SKIPPED] pf_loopback_nop
[14:13:19] [SKIPPED] pf_loopback_echo
[14:13:19] [SKIPPED] pf_loopback_fail
[14:13:19] [SKIPPED] pf_loopback_busy
[14:13:19] [SKIPPED] pf_loopback_retry
[14:13:19] ==================== [PASSED] pf_relay =====================
[14:13:19] ================== vf_relay (3 subtests) ===================
[14:13:19] [PASSED] vf_rejects_guc2vf_too_short
[14:13:19] [PASSED] vf_rejects_guc2vf_too_long
[14:13:19] [PASSED] vf_rejects_guc2vf_no_payload
[14:13:19] ==================== [PASSED] vf_relay =====================
[14:13:19] ================ pf_gt_config (6 subtests) =================
[14:13:19] [PASSED] fair_contexts_1vf
[14:13:19] [PASSED] fair_doorbells_1vf
[14:13:19] [PASSED] fair_ggtt_1vf
[14:13:19] ====================== fair_contexts ======================
[14:13:19] [PASSED] 1 VF
[14:13:19] [PASSED] 2 VFs
[14:13:19] [PASSED] 3 VFs
[14:13:19] [PASSED] 4 VFs
[14:13:19] [PASSED] 5 VFs
[14:13:19] [PASSED] 6 VFs
[14:13:19] [PASSED] 7 VFs
[14:13:19] [PASSED] 8 VFs
[14:13:19] [PASSED] 9 VFs
[14:13:19] [PASSED] 10 VFs
[14:13:19] [PASSED] 11 VFs
[14:13:19] [PASSED] 12 VFs
[14:13:19] [PASSED] 13 VFs
[14:13:19] [PASSED] 14 VFs
[14:13:19] [PASSED] 15 VFs
[14:13:19] [PASSED] 16 VFs
[14:13:19] [PASSED] 17 VFs
[14:13:19] [PASSED] 18 VFs
[14:13:19] [PASSED] 19 VFs
[14:13:19] [PASSED] 20 VFs
[14:13:19] [PASSED] 21 VFs
[14:13:19] [PASSED] 22 VFs
[14:13:19] [PASSED] 23 VFs
[14:13:19] [PASSED] 24 VFs
[14:13:19] [PASSED] 25 VFs
[14:13:19] [PASSED] 26 VFs
[14:13:19] [PASSED] 27 VFs
[14:13:19] [PASSED] 28 VFs
[14:13:19] [PASSED] 29 VFs
[14:13:19] [PASSED] 30 VFs
[14:13:19] [PASSED] 31 VFs
[14:13:19] [PASSED] 32 VFs
[14:13:19] [PASSED] 33 VFs
[14:13:19] [PASSED] 34 VFs
[14:13:19] [PASSED] 35 VFs
[14:13:19] [PASSED] 36 VFs
[14:13:19] [PASSED] 37 VFs
[14:13:19] [PASSED] 38 VFs
[14:13:19] [PASSED] 39 VFs
[14:13:19] [PASSED] 40 VFs
[14:13:19] [PASSED] 41 VFs
[14:13:19] [PASSED] 42 VFs
[14:13:19] [PASSED] 43 VFs
[14:13:19] [PASSED] 44 VFs
[14:13:19] [PASSED] 45 VFs
[14:13:19] [PASSED] 46 VFs
[14:13:19] [PASSED] 47 VFs
[14:13:19] [PASSED] 48 VFs
[14:13:19] [PASSED] 49 VFs
[14:13:19] [PASSED] 50 VFs
[14:13:19] [PASSED] 51 VFs
[14:13:19] [PASSED] 52 VFs
[14:13:19] [PASSED] 53 VFs
[14:13:19] [PASSED] 54 VFs
[14:13:19] [PASSED] 55 VFs
[14:13:19] [PASSED] 56 VFs
[14:13:19] [PASSED] 57 VFs
[14:13:19] [PASSED] 58 VFs
[14:13:19] [PASSED] 59 VFs
[14:13:19] [PASSED] 60 VFs
[14:13:19] [PASSED] 61 VFs
[14:13:19] [PASSED] 62 VFs
[14:13:19] [PASSED] 63 VFs
[14:13:19] ================== [PASSED] fair_contexts ==================
[14:13:19] ===================== fair_doorbells ======================
[14:13:19] [PASSED] 1 VF
[14:13:19] [PASSED] 2 VFs
[14:13:19] [PASSED] 3 VFs
[14:13:19] [PASSED] 4 VFs
[14:13:19] [PASSED] 5 VFs
[14:13:19] [PASSED] 6 VFs
[14:13:19] [PASSED] 7 VFs
[14:13:19] [PASSED] 8 VFs
[14:13:19] [PASSED] 9 VFs
[14:13:19] [PASSED] 10 VFs
[14:13:19] [PASSED] 11 VFs
[14:13:19] [PASSED] 12 VFs
[14:13:19] [PASSED] 13 VFs
[14:13:19] [PASSED] 14 VFs
[14:13:19] [PASSED] 15 VFs
[14:13:19] [PASSED] 16 VFs
[14:13:19] [PASSED] 17 VFs
[14:13:19] [PASSED] 18 VFs
[14:13:19] [PASSED] 19 VFs
[14:13:19] [PASSED] 20 VFs
[14:13:19] [PASSED] 21 VFs
[14:13:19] [PASSED] 22 VFs
[14:13:19] [PASSED] 23 VFs
[14:13:19] [PASSED] 24 VFs
[14:13:19] [PASSED] 25 VFs
[14:13:19] [PASSED] 26 VFs
[14:13:19] [PASSED] 27 VFs
[14:13:19] [PASSED] 28 VFs
[14:13:19] [PASSED] 29 VFs
[14:13:19] [PASSED] 30 VFs
[14:13:19] [PASSED] 31 VFs
[14:13:19] [PASSED] 32 VFs
[14:13:19] [PASSED] 33 VFs
[14:13:19] [PASSED] 34 VFs
[14:13:19] [PASSED] 35 VFs
[14:13:19] [PASSED] 36 VFs
[14:13:19] [PASSED] 37 VFs
[14:13:19] [PASSED] 38 VFs
[14:13:19] [PASSED] 39 VFs
[14:13:19] [PASSED] 40 VFs
[14:13:19] [PASSED] 41 VFs
[14:13:19] [PASSED] 42 VFs
[14:13:19] [PASSED] 43 VFs
[14:13:19] [PASSED] 44 VFs
[14:13:19] [PASSED] 45 VFs
[14:13:19] [PASSED] 46 VFs
[14:13:19] [PASSED] 47 VFs
[14:13:19] [PASSED] 48 VFs
[14:13:19] [PASSED] 49 VFs
[14:13:19] [PASSED] 50 VFs
[14:13:19] [PASSED] 51 VFs
[14:13:19] [PASSED] 52 VFs
[14:13:19] [PASSED] 53 VFs
[14:13:19] [PASSED] 54 VFs
[14:13:19] [PASSED] 55 VFs
[14:13:19] [PASSED] 56 VFs
[14:13:19] [PASSED] 57 VFs
[14:13:19] [PASSED] 58 VFs
[14:13:19] [PASSED] 59 VFs
[14:13:19] [PASSED] 60 VFs
[14:13:19] [PASSED] 61 VFs
[14:13:19] [PASSED] 62 VFs
[14:13:19] [PASSED] 63 VFs
[14:13:19] ================= [PASSED] fair_doorbells ==================
[14:13:19] ======================== fair_ggtt ========================
[14:13:19] [PASSED] 1 VF
[14:13:19] [PASSED] 2 VFs
[14:13:19] [PASSED] 3 VFs
[14:13:19] [PASSED] 4 VFs
[14:13:19] [PASSED] 5 VFs
[14:13:19] [PASSED] 6 VFs
[14:13:19] [PASSED] 7 VFs
[14:13:19] [PASSED] 8 VFs
[14:13:19] [PASSED] 9 VFs
[14:13:19] [PASSED] 10 VFs
[14:13:19] [PASSED] 11 VFs
[14:13:19] [PASSED] 12 VFs
[14:13:19] [PASSED] 13 VFs
[14:13:19] [PASSED] 14 VFs
[14:13:19] [PASSED] 15 VFs
[14:13:19] [PASSED] 16 VFs
[14:13:19] [PASSED] 17 VFs
[14:13:19] [PASSED] 18 VFs
[14:13:19] [PASSED] 19 VFs
[14:13:19] [PASSED] 20 VFs
[14:13:19] [PASSED] 21 VFs
[14:13:19] [PASSED] 22 VFs
[14:13:19] [PASSED] 23 VFs
[14:13:19] [PASSED] 24 VFs
[14:13:19] [PASSED] 25 VFs
[14:13:19] [PASSED] 26 VFs
[14:13:19] [PASSED] 27 VFs
[14:13:19] [PASSED] 28 VFs
[14:13:19] [PASSED] 29 VFs
[14:13:19] [PASSED] 30 VFs
[14:13:19] [PASSED] 31 VFs
[14:13:19] [PASSED] 32 VFs
[14:13:19] [PASSED] 33 VFs
[14:13:19] [PASSED] 34 VFs
[14:13:19] [PASSED] 35 VFs
[14:13:19] [PASSED] 36 VFs
[14:13:19] [PASSED] 37 VFs
[14:13:19] [PASSED] 38 VFs
[14:13:19] [PASSED] 39 VFs
[14:13:19] [PASSED] 40 VFs
[14:13:19] [PASSED] 41 VFs
[14:13:19] [PASSED] 42 VFs
[14:13:19] [PASSED] 43 VFs
[14:13:19] [PASSED] 44 VFs
[14:13:19] [PASSED] 45 VFs
[14:13:19] [PASSED] 46 VFs
[14:13:19] [PASSED] 47 VFs
[14:13:19] [PASSED] 48 VFs
[14:13:19] [PASSED] 49 VFs
[14:13:19] [PASSED] 50 VFs
[14:13:19] [PASSED] 51 VFs
[14:13:19] [PASSED] 52 VFs
[14:13:19] [PASSED] 53 VFs
[14:13:19] [PASSED] 54 VFs
[14:13:19] [PASSED] 55 VFs
[14:13:19] [PASSED] 56 VFs
[14:13:19] [PASSED] 57 VFs
[14:13:19] [PASSED] 58 VFs
[14:13:19] [PASSED] 59 VFs
[14:13:19] [PASSED] 60 VFs
[14:13:19] [PASSED] 61 VFs
[14:13:19] [PASSED] 62 VFs
[14:13:19] [PASSED] 63 VFs
[14:13:19] ==================== [PASSED] fair_ggtt ====================
[14:13:19] ================== [PASSED] pf_gt_config ===================
[14:13:19] ===================== lmtt (1 subtest) =====================
[14:13:19] ======================== test_ops =========================
[14:13:19] [PASSED] 2-level
[14:13:19] [PASSED] multi-level
[14:13:19] ==================== [PASSED] test_ops =====================
[14:13:19] ====================== [PASSED] lmtt =======================
[14:13:19] ================= pf_service (11 subtests) =================
[14:13:19] [PASSED] pf_negotiate_any
[14:13:19] [PASSED] pf_negotiate_base_match
[14:13:19] [PASSED] pf_negotiate_base_newer
[14:13:19] [PASSED] pf_negotiate_base_next
[14:13:19] [SKIPPED] pf_negotiate_base_older
[14:13:19] [PASSED] pf_negotiate_base_prev
[14:13:19] [PASSED] pf_negotiate_latest_match
[14:13:19] [PASSED] pf_negotiate_latest_newer
[14:13:19] [PASSED] pf_negotiate_latest_next
[14:13:19] [SKIPPED] pf_negotiate_latest_older
[14:13:19] [SKIPPED] pf_negotiate_latest_prev
[14:13:19] =================== [PASSED] pf_service ====================
[14:13:19] ================= xe_guc_g2g (2 subtests) ==================
[14:13:19] ============== xe_live_guc_g2g_kunit_default ==============
[14:13:19] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[14:13:19] ============== xe_live_guc_g2g_kunit_allmem ===============
[14:13:19] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[14:13:19] =================== [SKIPPED] xe_guc_g2g ===================
[14:13:19] =================== xe_mocs (2 subtests) ===================
[14:13:19] ================ xe_live_mocs_kernel_kunit ================
[14:13:19] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[14:13:19] ================ xe_live_mocs_reset_kunit =================
[14:13:19] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[14:13:19] ==================== [SKIPPED] xe_mocs =====================
[14:13:19] ================= xe_migrate (2 subtests) ==================
[14:13:19] ================= xe_migrate_sanity_kunit =================
[14:13:19] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[14:13:19] ================== xe_validate_ccs_kunit ==================
[14:13:19] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[14:13:19] =================== [SKIPPED] xe_migrate ===================
[14:13:19] ================== xe_dma_buf (1 subtest) ==================
[14:13:19] ==================== xe_dma_buf_kunit =====================
[14:13:19] ================ [SKIPPED] xe_dma_buf_kunit ================
[14:13:19] =================== [SKIPPED] xe_dma_buf ===================
[14:13:19] ================= xe_bo_shrink (1 subtest) =================
[14:13:19] =================== xe_bo_shrink_kunit ====================
[14:13:19] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[14:13:19] ================== [SKIPPED] xe_bo_shrink ==================
[14:13:19] ==================== xe_bo (2 subtests) ====================
[14:13:19] ================== xe_ccs_migrate_kunit ===================
[14:13:19] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[14:13:19] ==================== xe_bo_evict_kunit ====================
[14:13:19] =============== [SKIPPED] xe_bo_evict_kunit ================
[14:13:19] ===================== [SKIPPED] xe_bo ======================
[14:13:19] ==================== args (13 subtests) ====================
[14:13:19] [PASSED] count_args_test
[14:13:19] [PASSED] call_args_example
[14:13:19] [PASSED] call_args_test
[14:13:19] [PASSED] drop_first_arg_example
[14:13:19] [PASSED] drop_first_arg_test
[14:13:19] [PASSED] first_arg_example
[14:13:19] [PASSED] first_arg_test
[14:13:19] [PASSED] last_arg_example
[14:13:19] [PASSED] last_arg_test
[14:13:19] [PASSED] pick_arg_example
[14:13:19] [PASSED] if_args_example
[14:13:19] [PASSED] if_args_test
[14:13:19] [PASSED] sep_comma_example
[14:13:19] ====================== [PASSED] args =======================
[14:13:19] =================== xe_pci (3 subtests) ====================
[14:13:19] ==================== check_graphics_ip ====================
[14:13:19] [PASSED] 12.00 Xe_LP
[14:13:19] [PASSED] 12.10 Xe_LP+
[14:13:19] [PASSED] 12.55 Xe_HPG
[14:13:19] [PASSED] 12.60 Xe_HPC
[14:13:19] [PASSED] 12.70 Xe_LPG
[14:13:19] [PASSED] 12.71 Xe_LPG
[14:13:19] [PASSED] 12.74 Xe_LPG+
[14:13:19] [PASSED] 20.01 Xe2_HPG
[14:13:19] [PASSED] 20.02 Xe2_HPG
[14:13:19] [PASSED] 20.04 Xe2_LPG
[14:13:19] [PASSED] 30.00 Xe3_LPG
[14:13:19] [PASSED] 30.01 Xe3_LPG
[14:13:19] [PASSED] 30.03 Xe3_LPG
[14:13:19] [PASSED] 30.04 Xe3_LPG
[14:13:19] [PASSED] 30.05 Xe3_LPG
[14:13:19] [PASSED] 35.10 Xe3p_LPG
[14:13:19] [PASSED] 35.11 Xe3p_XPC
[14:13:19] ================ [PASSED] check_graphics_ip ================
[14:13:19] ===================== check_media_ip ======================
[14:13:19] [PASSED] 12.00 Xe_M
[14:13:19] [PASSED] 12.55 Xe_HPM
[14:13:19] [PASSED] 13.00 Xe_LPM+
[14:13:19] [PASSED] 13.01 Xe2_HPM
[14:13:19] [PASSED] 20.00 Xe2_LPM
[14:13:19] [PASSED] 30.00 Xe3_LPM
[14:13:19] [PASSED] 30.02 Xe3_LPM
[14:13:19] [PASSED] 35.00 Xe3p_LPM
[14:13:19] [PASSED] 35.03 Xe3p_HPM
[14:13:19] ================= [PASSED] check_media_ip ==================
[14:13:19] =================== check_platform_desc ===================
[14:13:19] [PASSED] 0x9A60 (TIGERLAKE)
[14:13:19] [PASSED] 0x9A68 (TIGERLAKE)
[14:13:19] [PASSED] 0x9A70 (TIGERLAKE)
[14:13:19] [PASSED] 0x9A40 (TIGERLAKE)
[14:13:19] [PASSED] 0x9A49 (TIGERLAKE)
[14:13:19] [PASSED] 0x9A59 (TIGERLAKE)
[14:13:19] [PASSED] 0x9A78 (TIGERLAKE)
[14:13:19] [PASSED] 0x9AC0 (TIGERLAKE)
[14:13:19] [PASSED] 0x9AC9 (TIGERLAKE)
[14:13:19] [PASSED] 0x9AD9 (TIGERLAKE)
[14:13:19] [PASSED] 0x9AF8 (TIGERLAKE)
[14:13:19] [PASSED] 0x4C80 (ROCKETLAKE)
[14:13:19] [PASSED] 0x4C8A (ROCKETLAKE)
[14:13:19] [PASSED] 0x4C8B (ROCKETLAKE)
[14:13:19] [PASSED] 0x4C8C (ROCKETLAKE)
[14:13:19] [PASSED] 0x4C90 (ROCKETLAKE)
[14:13:19] [PASSED] 0x4C9A (ROCKETLAKE)
[14:13:19] [PASSED] 0x4680 (ALDERLAKE_S)
[14:13:19] [PASSED] 0x4682 (ALDERLAKE_S)
[14:13:19] [PASSED] 0x4688 (ALDERLAKE_S)
[14:13:19] [PASSED] 0x468A (ALDERLAKE_S)
[14:13:19] [PASSED] 0x468B (ALDERLAKE_S)
[14:13:19] [PASSED] 0x4690 (ALDERLAKE_S)
[14:13:19] [PASSED] 0x4692 (ALDERLAKE_S)
[14:13:19] [PASSED] 0x4693 (ALDERLAKE_S)
[14:13:19] [PASSED] 0x46A0 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46A1 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46A2 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46A3 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46A6 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46A8 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46AA (ALDERLAKE_P)
[14:13:19] [PASSED] 0x462A (ALDERLAKE_P)
[14:13:19] [PASSED] 0x4626 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[14:13:19] [PASSED] 0x4628 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46B0 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46B1 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46B2 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46B3 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46C0 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46C1 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46C2 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46C3 (ALDERLAKE_P)
[14:13:19] [PASSED] 0x46D0 (ALDERLAKE_N)
[14:13:19] [PASSED] 0x46D1 (ALDERLAKE_N)
[14:13:19] [PASSED] 0x46D2 (ALDERLAKE_N)
[14:13:19] [PASSED] 0x46D3 (ALDERLAKE_N)
[14:13:19] [PASSED] 0x46D4 (ALDERLAKE_N)
[14:13:19] [PASSED] 0xA721 (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA7A1 (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA7A9 (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA7AC (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA7AD (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA720 (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA7A0 (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA7A8 (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA7AA (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA7AB (ALDERLAKE_P)
[14:13:19] [PASSED] 0xA780 (ALDERLAKE_S)
[14:13:19] [PASSED] 0xA781 (ALDERLAKE_S)
[14:13:19] [PASSED] 0xA782 (ALDERLAKE_S)
[14:13:19] [PASSED] 0xA783 (ALDERLAKE_S)
[14:13:19] [PASSED] 0xA788 (ALDERLAKE_S)
[14:13:19] [PASSED] 0xA789 (ALDERLAKE_S)
[14:13:19] [PASSED] 0xA78A (ALDERLAKE_S)
[14:13:19] [PASSED] 0xA78B (ALDERLAKE_S)
[14:13:19] [PASSED] 0x4905 (DG1)
[14:13:19] [PASSED] 0x4906 (DG1)
[14:13:19] [PASSED] 0x4907 (DG1)
[14:13:19] [PASSED] 0x4908 (DG1)
[14:13:19] [PASSED] 0x4909 (DG1)
[14:13:19] [PASSED] 0x56C0 (DG2)
[14:13:19] [PASSED] 0x56C2 (DG2)
[14:13:19] [PASSED] 0x56C1 (DG2)
[14:13:19] [PASSED] 0x7D51 (METEORLAKE)
[14:13:19] [PASSED] 0x7DD1 (METEORLAKE)
[14:13:19] [PASSED] 0x7D41 (METEORLAKE)
[14:13:19] [PASSED] 0x7D67 (METEORLAKE)
[14:13:19] [PASSED] 0xB640 (METEORLAKE)
[14:13:19] [PASSED] 0x56A0 (DG2)
[14:13:19] [PASSED] 0x56A1 (DG2)
[14:13:19] [PASSED] 0x56A2 (DG2)
[14:13:19] [PASSED] 0x56BE (DG2)
[14:13:19] [PASSED] 0x56BF (DG2)
[14:13:19] [PASSED] 0x5690 (DG2)
[14:13:19] [PASSED] 0x5691 (DG2)
[14:13:19] [PASSED] 0x5692 (DG2)
[14:13:19] [PASSED] 0x56A5 (DG2)
[14:13:19] [PASSED] 0x56A6 (DG2)
[14:13:19] [PASSED] 0x56B0 (DG2)
[14:13:19] [PASSED] 0x56B1 (DG2)
[14:13:19] [PASSED] 0x56BA (DG2)
[14:13:19] [PASSED] 0x56BB (DG2)
[14:13:19] [PASSED] 0x56BC (DG2)
[14:13:19] [PASSED] 0x56BD (DG2)
[14:13:19] [PASSED] 0x5693 (DG2)
[14:13:19] [PASSED] 0x5694 (DG2)
[14:13:19] [PASSED] 0x5695 (DG2)
[14:13:19] [PASSED] 0x56A3 (DG2)
[14:13:19] [PASSED] 0x56A4 (DG2)
[14:13:19] [PASSED] 0x56B2 (DG2)
[14:13:19] [PASSED] 0x56B3 (DG2)
[14:13:19] [PASSED] 0x5696 (DG2)
[14:13:19] [PASSED] 0x5697 (DG2)
[14:13:19] [PASSED] 0xB69 (PVC)
[14:13:19] [PASSED] 0xB6E (PVC)
[14:13:19] [PASSED] 0xBD4 (PVC)
[14:13:19] [PASSED] 0xBD5 (PVC)
[14:13:19] [PASSED] 0xBD6 (PVC)
[14:13:19] [PASSED] 0xBD7 (PVC)
[14:13:19] [PASSED] 0xBD8 (PVC)
[14:13:19] [PASSED] 0xBD9 (PVC)
[14:13:19] [PASSED] 0xBDA (PVC)
[14:13:19] [PASSED] 0xBDB (PVC)
[14:13:19] [PASSED] 0xBE0 (PVC)
[14:13:19] [PASSED] 0xBE1 (PVC)
[14:13:19] [PASSED] 0xBE5 (PVC)
[14:13:19] [PASSED] 0x7D40 (METEORLAKE)
[14:13:19] [PASSED] 0x7D45 (METEORLAKE)
[14:13:19] [PASSED] 0x7D55 (METEORLAKE)
[14:13:19] [PASSED] 0x7D60 (METEORLAKE)
[14:13:19] [PASSED] 0x7DD5 (METEORLAKE)
[14:13:19] [PASSED] 0x6420 (LUNARLAKE)
[14:13:19] [PASSED] 0x64A0 (LUNARLAKE)
[14:13:19] [PASSED] 0x64B0 (LUNARLAKE)
[14:13:19] [PASSED] 0xE202 (BATTLEMAGE)
[14:13:19] [PASSED] 0xE209 (BATTLEMAGE)
[14:13:19] [PASSED] 0xE20B (BATTLEMAGE)
[14:13:19] [PASSED] 0xE20C (BATTLEMAGE)
[14:13:19] [PASSED] 0xE20D (BATTLEMAGE)
[14:13:19] [PASSED] 0xE210 (BATTLEMAGE)
[14:13:19] [PASSED] 0xE211 (BATTLEMAGE)
[14:13:19] [PASSED] 0xE212 (BATTLEMAGE)
[14:13:19] [PASSED] 0xE216 (BATTLEMAGE)
[14:13:19] [PASSED] 0xE220 (BATTLEMAGE)
[14:13:19] [PASSED] 0xE221 (BATTLEMAGE)
[14:13:19] [PASSED] 0xE222 (BATTLEMAGE)
[14:13:19] [PASSED] 0xE223 (BATTLEMAGE)
[14:13:19] [PASSED] 0xB080 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB081 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB082 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB083 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB084 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB085 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB086 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB087 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB08F (PANTHERLAKE)
[14:13:19] [PASSED] 0xB090 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB0A0 (PANTHERLAKE)
[14:13:19] [PASSED] 0xB0B0 (PANTHERLAKE)
[14:13:19] [PASSED] 0xFD80 (PANTHERLAKE)
[14:13:19] [PASSED] 0xFD81 (PANTHERLAKE)
[14:13:19] [PASSED] 0xD740 (NOVALAKE_S)
[14:13:19] [PASSED] 0xD741 (NOVALAKE_S)
[14:13:19] [PASSED] 0xD742 (NOVALAKE_S)
[14:13:19] [PASSED] 0xD743 (NOVALAKE_S)
[14:13:19] [PASSED] 0xD744 (NOVALAKE_S)
[14:13:19] [PASSED] 0xD745 (NOVALAKE_S)
[14:13:19] [PASSED] 0x674C (CRESCENTISLAND)
[14:13:19] [PASSED] 0xD750 (NOVALAKE_P)
[14:13:19] [PASSED] 0xD751 (NOVALAKE_P)
[14:13:19] [PASSED] 0xD752 (NOVALAKE_P)
[14:13:19] [PASSED] 0xD753 (NOVALAKE_P)
[14:13:19] [PASSED] 0xD754 (NOVALAKE_P)
[14:13:19] [PASSED] 0xD755 (NOVALAKE_P)
[14:13:19] [PASSED] 0xD756 (NOVALAKE_P)
[14:13:19] [PASSED] 0xD757 (NOVALAKE_P)
[14:13:19] [PASSED] 0xD75F (NOVALAKE_P)
[14:13:19] =============== [PASSED] check_platform_desc ===============
[14:13:19] ===================== [PASSED] xe_pci ======================
[14:13:19] =================== xe_rtp (2 subtests) ====================
[14:13:19] =============== xe_rtp_process_to_sr_tests ================
[14:13:19] [PASSED] coalesce-same-reg
[14:13:19] [PASSED] no-match-no-add
[14:13:19] [PASSED] match-or
[14:13:19] [PASSED] match-or-xfail
[14:13:19] [PASSED] no-match-no-add-multiple-rules
[14:13:19] [PASSED] two-regs-two-entries
[14:13:19] [PASSED] clr-one-set-other
[14:13:19] [PASSED] set-field
[14:13:19] [PASSED] conflict-duplicate
[14:13:19] [PASSED] conflict-not-disjoint
[14:13:19] [PASSED] conflict-reg-type
[14:13:19] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[14:13:19] ================== xe_rtp_process_tests ===================
[14:13:19] [PASSED] active1
[14:13:19] [PASSED] active2
[14:13:19] [PASSED] active-inactive
[14:13:19] [PASSED] inactive-active
[14:13:19] [PASSED] inactive-1st_or_active-inactive
[14:13:19] [PASSED] inactive-2nd_or_active-inactive
[14:13:19] [PASSED] inactive-last_or_active-inactive
[14:13:19] [PASSED] inactive-no_or_active-inactive
[14:13:19] ============== [PASSED] xe_rtp_process_tests ===============
[14:13:19] ===================== [PASSED] xe_rtp ======================
[14:13:19] ==================== xe_wa (1 subtest) =====================
[14:13:19] ======================== xe_wa_gt =========================
[14:13:19] [PASSED] TIGERLAKE B0
[14:13:19] [PASSED] DG1 A0
[14:13:19] [PASSED] DG1 B0
[14:13:19] [PASSED] ALDERLAKE_S A0
[14:13:19] [PASSED] ALDERLAKE_S B0
[14:13:19] [PASSED] ALDERLAKE_S C0
[14:13:19] [PASSED] ALDERLAKE_S D0
[14:13:19] [PASSED] ALDERLAKE_P A0
[14:13:19] [PASSED] ALDERLAKE_P B0
[14:13:19] [PASSED] ALDERLAKE_P C0
[14:13:19] [PASSED] ALDERLAKE_S RPLS D0
[14:13:19] [PASSED] ALDERLAKE_P RPLU E0
[14:13:19] [PASSED] DG2 G10 C0
[14:13:19] [PASSED] DG2 G11 B1
[14:13:19] [PASSED] DG2 G12 A1
[14:13:19] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:13:19] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:13:19] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[14:13:19] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[14:13:19] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[14:13:19] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[14:13:19] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[14:13:19] ==================== [PASSED] xe_wa_gt =====================
[14:13:19] ====================== [PASSED] xe_wa ======================
[14:13:19] ============================================================
[14:13:19] Testing complete. Ran 522 tests: passed: 504, skipped: 18
[14:13:19] Elapsed time: 36.491s total, 4.211s configuring, 31.762s building, 0.463s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[14:13:19] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:13:21] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:13:46] Starting KUnit Kernel (1/1)...
[14:13:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:13:46] ============ drm_test_pick_cmdline (2 subtests) ============
[14:13:46] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[14:13:46] =============== drm_test_pick_cmdline_named ===============
[14:13:46] [PASSED] NTSC
[14:13:46] [PASSED] NTSC-J
[14:13:46] [PASSED] PAL
[14:13:46] [PASSED] PAL-M
[14:13:46] =========== [PASSED] drm_test_pick_cmdline_named ===========
[14:13:46] ============== [PASSED] drm_test_pick_cmdline ==============
[14:13:46] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[14:13:46] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[14:13:46] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[14:13:46] =========== drm_validate_clone_mode (2 subtests) ===========
[14:13:46] ============== drm_test_check_in_clone_mode ===============
[14:13:46] [PASSED] in_clone_mode
[14:13:46] [PASSED] not_in_clone_mode
[14:13:46] ========== [PASSED] drm_test_check_in_clone_mode ===========
[14:13:46] =============== drm_test_check_valid_clones ===============
[14:13:46] [PASSED] not_in_clone_mode
[14:13:46] [PASSED] valid_clone
[14:13:46] [PASSED] invalid_clone
[14:13:46] =========== [PASSED] drm_test_check_valid_clones ===========
[14:13:46] ============= [PASSED] drm_validate_clone_mode =============
[14:13:46] ============= drm_validate_modeset (1 subtest) =============
[14:13:46] [PASSED] drm_test_check_connector_changed_modeset
[14:13:46] ============== [PASSED] drm_validate_modeset ===============
[14:13:46] ====== drm_test_bridge_get_current_state (2 subtests) ======
[14:13:46] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[14:13:46] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[14:13:46] ======== [PASSED] drm_test_bridge_get_current_state ========
[14:13:46] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[14:13:46] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[14:13:46] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[14:13:46] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[14:13:46] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[14:13:46] ============== drm_bridge_alloc (2 subtests) ===============
[14:13:46] [PASSED] drm_test_drm_bridge_alloc_basic
[14:13:46] [PASSED] drm_test_drm_bridge_alloc_get_put
[14:13:46] ================ [PASSED] drm_bridge_alloc =================
[14:13:46] ============= drm_cmdline_parser (40 subtests) =============
[14:13:46] [PASSED] drm_test_cmdline_force_d_only
[14:13:46] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:13:46] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:13:46] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:13:46] [PASSED] drm_test_cmdline_force_e_only
[14:13:46] [PASSED] drm_test_cmdline_res
[14:13:46] [PASSED] drm_test_cmdline_res_vesa
[14:13:46] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:13:46] [PASSED] drm_test_cmdline_res_rblank
[14:13:46] [PASSED] drm_test_cmdline_res_bpp
[14:13:46] [PASSED] drm_test_cmdline_res_refresh
[14:13:46] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:13:46] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:13:46] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:13:46] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:13:46] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:13:46] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:13:46] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:13:46] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:13:46] [PASSED] drm_test_cmdline_res_margins_force_on
[14:13:46] [PASSED] drm_test_cmdline_res_vesa_margins
[14:13:46] [PASSED] drm_test_cmdline_name
[14:13:46] [PASSED] drm_test_cmdline_name_bpp
[14:13:46] [PASSED] drm_test_cmdline_name_option
[14:13:46] [PASSED] drm_test_cmdline_name_bpp_option
[14:13:46] [PASSED] drm_test_cmdline_rotate_0
[14:13:46] [PASSED] drm_test_cmdline_rotate_90
[14:13:46] [PASSED] drm_test_cmdline_rotate_180
[14:13:46] [PASSED] drm_test_cmdline_rotate_270
[14:13:46] [PASSED] drm_test_cmdline_hmirror
[14:13:46] [PASSED] drm_test_cmdline_vmirror
[14:13:46] [PASSED] drm_test_cmdline_margin_options
[14:13:46] [PASSED] drm_test_cmdline_multiple_options
[14:13:46] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:13:46] [PASSED] drm_test_cmdline_extra_and_option
[14:13:46] [PASSED] drm_test_cmdline_freestanding_options
[14:13:46] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:13:46] [PASSED] drm_test_cmdline_panel_orientation
[14:13:46] ================ drm_test_cmdline_invalid =================
[14:13:46] [PASSED] margin_only
[14:13:46] [PASSED] interlace_only
[14:13:46] [PASSED] res_missing_x
[14:13:46] [PASSED] res_missing_y
[14:13:46] [PASSED] res_bad_y
[14:13:46] [PASSED] res_missing_y_bpp
[14:13:46] [PASSED] res_bad_bpp
[14:13:46] [PASSED] res_bad_refresh
[14:13:46] [PASSED] res_bpp_refresh_force_on_off
[14:13:46] [PASSED] res_invalid_mode
[14:13:46] [PASSED] res_bpp_wrong_place_mode
[14:13:46] [PASSED] name_bpp_refresh
[14:13:46] [PASSED] name_refresh
[14:13:46] [PASSED] name_refresh_wrong_mode
[14:13:46] [PASSED] name_refresh_invalid_mode
[14:13:46] [PASSED] rotate_multiple
[14:13:46] [PASSED] rotate_invalid_val
[14:13:46] [PASSED] rotate_truncated
[14:13:46] [PASSED] invalid_option
[14:13:46] [PASSED] invalid_tv_option
[14:13:46] [PASSED] truncated_tv_option
[14:13:46] ============ [PASSED] drm_test_cmdline_invalid =============
[14:13:46] =============== drm_test_cmdline_tv_options ===============
[14:13:46] [PASSED] NTSC
[14:13:46] [PASSED] NTSC_443
[14:13:46] [PASSED] NTSC_J
[14:13:46] [PASSED] PAL
[14:13:46] [PASSED] PAL_M
[14:13:46] [PASSED] PAL_N
[14:13:46] [PASSED] SECAM
[14:13:46] [PASSED] MONO_525
[14:13:46] [PASSED] MONO_625
[14:13:46] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:13:46] =============== [PASSED] drm_cmdline_parser ================
[14:13:46] ========== drmm_connector_hdmi_init (20 subtests) ==========
[14:13:46] [PASSED] drm_test_connector_hdmi_init_valid
[14:13:46] [PASSED] drm_test_connector_hdmi_init_bpc_8
[14:13:46] [PASSED] drm_test_connector_hdmi_init_bpc_10
[14:13:46] [PASSED] drm_test_connector_hdmi_init_bpc_12
[14:13:46] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[14:13:46] [PASSED] drm_test_connector_hdmi_init_bpc_null
[14:13:46] [PASSED] drm_test_connector_hdmi_init_formats_empty
[14:13:46] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[14:13:46] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:13:46] [PASSED] supported_formats=0x9 yuv420_allowed=1
[14:13:46] [PASSED] supported_formats=0x9 yuv420_allowed=0
[14:13:46] [PASSED] supported_formats=0x3 yuv420_allowed=1
[14:13:46] [PASSED] supported_formats=0x3 yuv420_allowed=0
[14:13:46] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:13:46] [PASSED] drm_test_connector_hdmi_init_null_ddc
[14:13:46] [PASSED] drm_test_connector_hdmi_init_null_product
[14:13:46] [PASSED] drm_test_connector_hdmi_init_null_vendor
[14:13:46] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[14:13:46] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[14:13:46] [PASSED] drm_test_connector_hdmi_init_product_valid
[14:13:46] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[14:13:46] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[14:13:46] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[14:13:46] ========= drm_test_connector_hdmi_init_type_valid =========
[14:13:46] [PASSED] HDMI-A
[14:13:46] [PASSED] HDMI-B
[14:13:46] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[14:13:46] ======== drm_test_connector_hdmi_init_type_invalid ========
[14:13:46] [PASSED] Unknown
[14:13:46] [PASSED] VGA
[14:13:46] [PASSED] DVI-I
[14:13:46] [PASSED] DVI-D
[14:13:46] [PASSED] DVI-A
[14:13:46] [PASSED] Composite
[14:13:46] [PASSED] SVIDEO
[14:13:46] [PASSED] LVDS
[14:13:46] [PASSED] Component
[14:13:46] [PASSED] DIN
[14:13:46] [PASSED] DP
[14:13:46] [PASSED] TV
[14:13:46] [PASSED] eDP
[14:13:46] [PASSED] Virtual
[14:13:46] [PASSED] DSI
[14:13:46] [PASSED] DPI
[14:13:46] [PASSED] Writeback
[14:13:46] [PASSED] SPI
[14:13:46] [PASSED] USB
[14:13:46] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[14:13:46] ============ [PASSED] drmm_connector_hdmi_init =============
[14:13:46] ============= drmm_connector_init (3 subtests) =============
[14:13:46] [PASSED] drm_test_drmm_connector_init
[14:13:46] [PASSED] drm_test_drmm_connector_init_null_ddc
[14:13:46] ========= drm_test_drmm_connector_init_type_valid =========
[14:13:46] [PASSED] Unknown
[14:13:46] [PASSED] VGA
[14:13:46] [PASSED] DVI-I
[14:13:46] [PASSED] DVI-D
[14:13:46] [PASSED] DVI-A
[14:13:46] [PASSED] Composite
[14:13:46] [PASSED] SVIDEO
[14:13:46] [PASSED] LVDS
[14:13:46] [PASSED] Component
[14:13:46] [PASSED] DIN
[14:13:46] [PASSED] DP
[14:13:46] [PASSED] HDMI-A
[14:13:46] [PASSED] HDMI-B
[14:13:46] [PASSED] TV
[14:13:46] [PASSED] eDP
[14:13:46] [PASSED] Virtual
[14:13:46] [PASSED] DSI
[14:13:46] [PASSED] DPI
[14:13:46] [PASSED] Writeback
[14:13:46] [PASSED] SPI
[14:13:46] [PASSED] USB
[14:13:46] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[14:13:46] =============== [PASSED] drmm_connector_init ===============
[14:13:46] ========= drm_connector_dynamic_init (6 subtests) ==========
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_init
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_init_properties
[14:13:46] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[14:13:46] [PASSED] Unknown
[14:13:46] [PASSED] VGA
[14:13:46] [PASSED] DVI-I
[14:13:46] [PASSED] DVI-D
[14:13:46] [PASSED] DVI-A
[14:13:46] [PASSED] Composite
[14:13:46] [PASSED] SVIDEO
[14:13:46] [PASSED] LVDS
[14:13:46] [PASSED] Component
[14:13:46] [PASSED] DIN
[14:13:46] [PASSED] DP
[14:13:46] [PASSED] HDMI-A
[14:13:46] [PASSED] HDMI-B
[14:13:46] [PASSED] TV
[14:13:46] [PASSED] eDP
[14:13:46] [PASSED] Virtual
[14:13:46] [PASSED] DSI
[14:13:46] [PASSED] DPI
[14:13:46] [PASSED] Writeback
[14:13:46] [PASSED] SPI
[14:13:46] [PASSED] USB
[14:13:46] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[14:13:46] ======== drm_test_drm_connector_dynamic_init_name =========
[14:13:46] [PASSED] Unknown
[14:13:46] [PASSED] VGA
[14:13:46] [PASSED] DVI-I
[14:13:46] [PASSED] DVI-D
[14:13:46] [PASSED] DVI-A
[14:13:46] [PASSED] Composite
[14:13:46] [PASSED] SVIDEO
[14:13:46] [PASSED] LVDS
[14:13:46] [PASSED] Component
[14:13:46] [PASSED] DIN
[14:13:46] [PASSED] DP
[14:13:46] [PASSED] HDMI-A
[14:13:46] [PASSED] HDMI-B
[14:13:46] [PASSED] TV
[14:13:46] [PASSED] eDP
[14:13:46] [PASSED] Virtual
[14:13:46] [PASSED] DSI
[14:13:46] [PASSED] DPI
[14:13:46] [PASSED] Writeback
[14:13:46] [PASSED] SPI
[14:13:46] [PASSED] USB
[14:13:46] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[14:13:46] =========== [PASSED] drm_connector_dynamic_init ============
[14:13:46] ==== drm_connector_dynamic_register_early (4 subtests) =====
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[14:13:46] ====== [PASSED] drm_connector_dynamic_register_early =======
[14:13:46] ======= drm_connector_dynamic_register (7 subtests) ========
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[14:13:46] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[14:13:46] ========= [PASSED] drm_connector_dynamic_register ==========
[14:13:46] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[14:13:46] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[14:13:46] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[14:13:46] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[14:13:46] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[14:13:46] ========== drm_test_get_tv_mode_from_name_valid ===========
[14:13:46] [PASSED] NTSC
[14:13:46] [PASSED] NTSC-443
[14:13:46] [PASSED] NTSC-J
[14:13:46] [PASSED] PAL
[14:13:46] [PASSED] PAL-M
[14:13:46] [PASSED] PAL-N
[14:13:46] [PASSED] SECAM
[14:13:46] [PASSED] Mono
[14:13:46] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:13:46] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:13:46] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:13:46] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[14:13:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[14:13:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[14:13:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[14:13:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[14:13:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[14:13:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[14:13:46] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[14:13:46] [PASSED] VIC 96
[14:13:46] [PASSED] VIC 97
[14:13:46] [PASSED] VIC 101
[14:13:46] [PASSED] VIC 102
[14:13:46] [PASSED] VIC 106
[14:13:46] [PASSED] VIC 107
[14:13:46] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[14:13:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[14:13:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[14:13:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[14:13:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[14:13:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[14:13:46] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[14:13:46] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[14:13:46] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[14:13:46] [PASSED] Automatic
[14:13:46] [PASSED] Full
[14:13:46] [PASSED] Limited 16:235
[14:13:46] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[14:13:46] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[14:13:46] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[14:13:46] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[14:13:46] === drm_test_drm_hdmi_connector_get_output_format_name ====
[14:13:46] [PASSED] RGB
[14:13:46] [PASSED] YUV 4:2:0
[14:13:46] [PASSED] YUV 4:2:2
[14:13:46] [PASSED] YUV 4:4:4
[14:13:46] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[14:13:46] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[14:13:46] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[14:13:46] ============= drm_damage_helper (21 subtests) ==============
[14:13:46] [PASSED] drm_test_damage_iter_no_damage
[14:13:46] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:13:46] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:13:46] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:13:46] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:13:46] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:13:46] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:13:46] [PASSED] drm_test_damage_iter_simple_damage
[14:13:46] [PASSED] drm_test_damage_iter_single_damage
[14:13:46] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:13:46] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:13:46] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:13:46] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:13:46] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:13:46] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:13:46] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:13:46] [PASSED] drm_test_damage_iter_damage
[14:13:46] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:13:46] [PASSED] drm_test_damage_iter_damage_one_outside
[14:13:46] [PASSED] drm_test_damage_iter_damage_src_moved
[14:13:46] [PASSED] drm_test_damage_iter_damage_not_visible
[14:13:46] ================ [PASSED] drm_damage_helper ================
[14:13:46] ============== drm_dp_mst_helper (3 subtests) ==============
[14:13:46] ============== drm_test_dp_mst_calc_pbn_mode ==============
[14:13:46] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:13:46] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:13:46] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:13:46] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:13:46] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:13:46] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:13:46] ============== drm_test_dp_mst_calc_pbn_div ===============
[14:13:46] [PASSED] Link rate 2000000 lane count 4
[14:13:46] [PASSED] Link rate 2000000 lane count 2
[14:13:46] [PASSED] Link rate 2000000 lane count 1
[14:13:46] [PASSED] Link rate 1350000 lane count 4
[14:13:46] [PASSED] Link rate 1350000 lane count 2
[14:13:46] [PASSED] Link rate 1350000 lane count 1
[14:13:46] [PASSED] Link rate 1000000 lane count 4
[14:13:46] [PASSED] Link rate 1000000 lane count 2
[14:13:46] [PASSED] Link rate 1000000 lane count 1
[14:13:46] [PASSED] Link rate 810000 lane count 4
[14:13:46] [PASSED] Link rate 810000 lane count 2
[14:13:46] [PASSED] Link rate 810000 lane count 1
[14:13:46] [PASSED] Link rate 540000 lane count 4
[14:13:46] [PASSED] Link rate 540000 lane count 2
[14:13:46] [PASSED] Link rate 540000 lane count 1
[14:13:46] [PASSED] Link rate 270000 lane count 4
[14:13:46] [PASSED] Link rate 270000 lane count 2
[14:13:46] [PASSED] Link rate 270000 lane count 1
[14:13:46] [PASSED] Link rate 162000 lane count 4
[14:13:46] [PASSED] Link rate 162000 lane count 2
[14:13:46] [PASSED] Link rate 162000 lane count 1
[14:13:46] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[14:13:46] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[14:13:46] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:13:46] [PASSED] DP_POWER_UP_PHY with port number
[14:13:46] [PASSED] DP_POWER_DOWN_PHY with port number
[14:13:46] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:13:46] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:13:46] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:13:46] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:13:46] [PASSED] DP_QUERY_PAYLOAD with port number
[14:13:46] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:13:46] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:13:46] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:13:46] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:13:46] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:13:46] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:13:46] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:13:46] [PASSED] DP_REMOTE_I2C_READ with port number
[14:13:46] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:13:46] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:13:46] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:13:46] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:13:46] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:13:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:13:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:13:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:13:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:13:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:13:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:13:46] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:13:46] ================ [PASSED] drm_dp_mst_helper ================
[14:13:46] ================== drm_exec (7 subtests) ===================
[14:13:46] [PASSED] sanitycheck
[14:13:46] [PASSED] test_lock
[14:13:46] [PASSED] test_lock_unlock
[14:13:46] [PASSED] test_duplicates
[14:13:46] [PASSED] test_prepare
[14:13:46] [PASSED] test_prepare_array
[14:13:46] [PASSED] test_multiple_loops
[14:13:46] ==================== [PASSED] drm_exec =====================
[14:13:46] =========== drm_format_helper_test (17 subtests) ===========
[14:13:46] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:13:46] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:13:46] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:13:46] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:13:46] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:13:46] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:13:46] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:13:46] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[14:13:46] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:13:46] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:13:46] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:13:46] ============== drm_test_fb_xrgb8888_to_mono ===============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:13:46] ==================== drm_test_fb_swab =====================
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ================ [PASSED] drm_test_fb_swab =================
[14:13:46] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[14:13:46] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[14:13:46] [PASSED] single_pixel_source_buffer
[14:13:46] [PASSED] single_pixel_clip_rectangle
[14:13:46] [PASSED] well_known_colors
[14:13:46] [PASSED] destination_pitch
[14:13:46] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[14:13:46] ================= drm_test_fb_clip_offset =================
[14:13:46] [PASSED] pass through
[14:13:46] [PASSED] horizontal offset
[14:13:46] [PASSED] vertical offset
[14:13:46] [PASSED] horizontal and vertical offset
[14:13:46] [PASSED] horizontal offset (custom pitch)
[14:13:46] [PASSED] vertical offset (custom pitch)
[14:13:46] [PASSED] horizontal and vertical offset (custom pitch)
[14:13:46] ============= [PASSED] drm_test_fb_clip_offset =============
[14:13:46] =================== drm_test_fb_memcpy ====================
[14:13:46] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:13:46] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:13:46] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:13:46] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:13:46] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:13:46] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:13:46] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:13:46] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:13:46] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:13:46] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:13:46] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:13:46] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:13:46] =============== [PASSED] drm_test_fb_memcpy ================
[14:13:46] ============= [PASSED] drm_format_helper_test ==============
[14:13:46] ================= drm_format (18 subtests) =================
[14:13:46] [PASSED] drm_test_format_block_width_invalid
[14:13:46] [PASSED] drm_test_format_block_width_one_plane
[14:13:46] [PASSED] drm_test_format_block_width_two_plane
[14:13:46] [PASSED] drm_test_format_block_width_three_plane
[14:13:46] [PASSED] drm_test_format_block_width_tiled
[14:13:46] [PASSED] drm_test_format_block_height_invalid
[14:13:46] [PASSED] drm_test_format_block_height_one_plane
[14:13:46] [PASSED] drm_test_format_block_height_two_plane
[14:13:46] [PASSED] drm_test_format_block_height_three_plane
[14:13:46] [PASSED] drm_test_format_block_height_tiled
[14:13:46] [PASSED] drm_test_format_min_pitch_invalid
[14:13:46] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:13:46] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:13:46] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:13:46] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:13:46] [PASSED] drm_test_format_min_pitch_two_plane
[14:13:46] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:13:46] [PASSED] drm_test_format_min_pitch_tiled
[14:13:46] =================== [PASSED] drm_format ====================
[14:13:46] ============== drm_framebuffer (10 subtests) ===============
[14:13:46] ========== drm_test_framebuffer_check_src_coords ==========
[14:13:46] [PASSED] Success: source fits into fb
[14:13:46] [PASSED] Fail: overflowing fb with x-axis coordinate
[14:13:46] [PASSED] Fail: overflowing fb with y-axis coordinate
[14:13:46] [PASSED] Fail: overflowing fb with source width
[14:13:46] [PASSED] Fail: overflowing fb with source height
[14:13:46] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[14:13:46] [PASSED] drm_test_framebuffer_cleanup
[14:13:46] =============== drm_test_framebuffer_create ===============
[14:13:46] [PASSED] ABGR8888 normal sizes
[14:13:46] [PASSED] ABGR8888 max sizes
[14:13:46] [PASSED] ABGR8888 pitch greater than min required
[14:13:46] [PASSED] ABGR8888 pitch less than min required
[14:13:46] [PASSED] ABGR8888 Invalid width
[14:13:46] [PASSED] ABGR8888 Invalid buffer handle
[14:13:46] [PASSED] No pixel format
[14:13:46] [PASSED] ABGR8888 Width 0
[14:13:46] [PASSED] ABGR8888 Height 0
[14:13:46] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:13:46] [PASSED] ABGR8888 Large buffer offset
[14:13:46] [PASSED] ABGR8888 Buffer offset for inexistent plane
[14:13:46] [PASSED] ABGR8888 Invalid flag
[14:13:46] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:13:46] [PASSED] ABGR8888 Valid buffer modifier
[14:13:46] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:13:46] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:13:46] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:13:46] [PASSED] NV12 Normal sizes
[14:13:46] [PASSED] NV12 Max sizes
[14:13:46] [PASSED] NV12 Invalid pitch
[14:13:46] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:13:46] [PASSED] NV12 different modifier per-plane
[14:13:46] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:13:46] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:13:46] [PASSED] NV12 Modifier for inexistent plane
[14:13:46] [PASSED] NV12 Handle for inexistent plane
[14:13:46] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:13:46] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:13:46] [PASSED] YVU420 Normal sizes
[14:13:46] [PASSED] YVU420 Max sizes
[14:13:46] [PASSED] YVU420 Invalid pitch
[14:13:46] [PASSED] YVU420 Different pitches
[14:13:46] [PASSED] YVU420 Different buffer offsets/pitches
[14:13:46] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:13:46] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:13:46] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:13:46] [PASSED] YVU420 Valid modifier
[14:13:46] [PASSED] YVU420 Different modifiers per plane
[14:13:46] [PASSED] YVU420 Modifier for inexistent plane
[14:13:46] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[14:13:46] [PASSED] X0L2 Normal sizes
[14:13:46] [PASSED] X0L2 Max sizes
[14:13:46] [PASSED] X0L2 Invalid pitch
[14:13:46] [PASSED] X0L2 Pitch greater than minimum required
[14:13:46] [PASSED] X0L2 Handle for inexistent plane
[14:13:46] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:13:46] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:13:46] [PASSED] X0L2 Valid modifier
[14:13:46] [PASSED] X0L2 Modifier for inexistent plane
[14:13:46] =========== [PASSED] drm_test_framebuffer_create ===========
[14:13:46] [PASSED] drm_test_framebuffer_free
[14:13:46] [PASSED] drm_test_framebuffer_init
[14:13:46] [PASSED] drm_test_framebuffer_init_bad_format
[14:13:46] [PASSED] drm_test_framebuffer_init_dev_mismatch
[14:13:46] [PASSED] drm_test_framebuffer_lookup
[14:13:46] [PASSED] drm_test_framebuffer_lookup_inexistent
[14:13:46] [PASSED] drm_test_framebuffer_modifiers_not_supported
[14:13:46] ================= [PASSED] drm_framebuffer =================
[14:13:46] ================ drm_gem_shmem (8 subtests) ================
[14:13:46] [PASSED] drm_gem_shmem_test_obj_create
[14:13:46] [PASSED] drm_gem_shmem_test_obj_create_private
[14:13:46] [PASSED] drm_gem_shmem_test_pin_pages
[14:13:46] [PASSED] drm_gem_shmem_test_vmap
[14:13:46] [PASSED] drm_gem_shmem_test_get_sg_table
[14:13:46] [PASSED] drm_gem_shmem_test_get_pages_sgt
[14:13:46] [PASSED] drm_gem_shmem_test_madvise
[14:13:46] [PASSED] drm_gem_shmem_test_purge
[14:13:46] ================== [PASSED] drm_gem_shmem ==================
[14:13:46] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[14:13:46] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[14:13:46] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[14:13:46] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[14:13:46] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[14:13:46] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[14:13:46] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[14:13:46] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[14:13:46] [PASSED] Automatic
[14:13:46] [PASSED] Full
[14:13:46] [PASSED] Limited 16:235
[14:13:46] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[14:13:46] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[14:13:46] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[14:13:46] [PASSED] drm_test_check_disable_connector
[14:13:46] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[14:13:46] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[14:13:46] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[14:13:46] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[14:13:46] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[14:13:46] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[14:13:46] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[14:13:46] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[14:13:46] [PASSED] drm_test_check_output_bpc_dvi
[14:13:46] [PASSED] drm_test_check_output_bpc_format_vic_1
[14:13:46] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[14:13:46] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[14:13:46] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[14:13:46] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[14:13:46] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[14:13:46] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[14:13:46] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[14:13:46] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[14:13:46] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[14:13:46] [PASSED] drm_test_check_broadcast_rgb_value
[14:13:46] [PASSED] drm_test_check_bpc_8_value
[14:13:46] [PASSED] drm_test_check_bpc_10_value
[14:13:46] [PASSED] drm_test_check_bpc_12_value
[14:13:46] [PASSED] drm_test_check_format_value
[14:13:46] [PASSED] drm_test_check_tmds_char_value
[14:13:46] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[14:13:46] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[14:13:46] [PASSED] drm_test_check_mode_valid
[14:13:46] [PASSED] drm_test_check_mode_valid_reject
[14:13:46] [PASSED] drm_test_check_mode_valid_reject_rate
[14:13:46] [PASSED] drm_test_check_mode_valid_reject_max_clock
[14:13:46] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[14:13:46] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[14:13:46] [PASSED] drm_test_check_infoframes
[14:13:46] [PASSED] drm_test_check_reject_avi_infoframe
[14:13:46] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[14:13:46] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[14:13:46] [PASSED] drm_test_check_reject_audio_infoframe
[14:13:46] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[14:13:46] ================= drm_managed (2 subtests) =================
[14:13:46] [PASSED] drm_test_managed_release_action
[14:13:46] [PASSED] drm_test_managed_run_action
[14:13:46] =================== [PASSED] drm_managed ===================
[14:13:46] =================== drm_mm (6 subtests) ====================
[14:13:46] [PASSED] drm_test_mm_init
[14:13:46] [PASSED] drm_test_mm_debug
[14:13:46] [PASSED] drm_test_mm_align32
[14:13:46] [PASSED] drm_test_mm_align64
[14:13:46] [PASSED] drm_test_mm_lowest
[14:13:46] [PASSED] drm_test_mm_highest
[14:13:46] ===================== [PASSED] drm_mm ======================
[14:13:46] ============= drm_modes_analog_tv (5 subtests) =============
[14:13:46] [PASSED] drm_test_modes_analog_tv_mono_576i
[14:13:46] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:13:46] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:13:46] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:13:46] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:13:46] =============== [PASSED] drm_modes_analog_tv ===============
[14:13:46] ============== drm_plane_helper (2 subtests) ===============
[14:13:46] =============== drm_test_check_plane_state ================
[14:13:46] [PASSED] clipping_simple
[14:13:46] [PASSED] clipping_rotate_reflect
[14:13:46] [PASSED] positioning_simple
[14:13:46] [PASSED] upscaling
[14:13:46] [PASSED] downscaling
[14:13:46] [PASSED] rounding1
[14:13:46] [PASSED] rounding2
[14:13:46] [PASSED] rounding3
[14:13:46] [PASSED] rounding4
[14:13:46] =========== [PASSED] drm_test_check_plane_state ============
[14:13:46] =========== drm_test_check_invalid_plane_state ============
[14:13:46] [PASSED] positioning_invalid
[14:13:46] [PASSED] upscaling_invalid
[14:13:46] [PASSED] downscaling_invalid
[14:13:46] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:13:46] ================ [PASSED] drm_plane_helper =================
[14:13:46] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[14:13:46] ====== drm_test_connector_helper_tv_get_modes_check =======
[14:13:46] [PASSED] None
[14:13:46] [PASSED] PAL
[14:13:46] [PASSED] NTSC
[14:13:46] [PASSED] Both, NTSC Default
[14:13:46] [PASSED] Both, PAL Default
[14:13:46] [PASSED] Both, NTSC Default, with PAL on command-line
[14:13:46] [PASSED] Both, PAL Default, with NTSC on command-line
[14:13:46] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:13:46] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:13:46] ================== drm_rect (9 subtests) ===================
[14:13:46] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:13:46] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:13:46] [PASSED] drm_test_rect_clip_scaled_clipped
[14:13:46] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:13:46] ================= drm_test_rect_intersect =================
[14:13:46] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:13:46] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:13:46] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:13:46] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:13:46] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:13:46] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:13:46] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:13:46] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:13:46] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:13:46] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:13:46] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:13:46] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:13:46] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:13:46] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:13:46] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:13:46] ============= [PASSED] drm_test_rect_intersect =============
[14:13:46] ================ drm_test_rect_calc_hscale ================
[14:13:46] [PASSED] normal use
[14:13:46] [PASSED] out of max range
[14:13:46] [PASSED] out of min range
[14:13:46] [PASSED] zero dst
[14:13:46] [PASSED] negative src
[14:13:46] [PASSED] negative dst
[14:13:46] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:13:46] ================ drm_test_rect_calc_vscale ================
[14:13:46] [PASSED] normal use
[14:13:46] [PASSED] out of max range
[14:13:46] [PASSED] out of min range
[14:13:46] [PASSED] zero dst
[14:13:46] [PASSED] negative src
[14:13:46] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[14:13:46] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:13:46] ================== drm_test_rect_rotate ===================
[14:13:46] [PASSED] reflect-x
[14:13:46] [PASSED] reflect-y
[14:13:46] [PASSED] rotate-0
[14:13:46] [PASSED] rotate-90
[14:13:46] [PASSED] rotate-180
[14:13:46] [PASSED] rotate-270
[14:13:46] ============== [PASSED] drm_test_rect_rotate ===============
[14:13:46] ================ drm_test_rect_rotate_inv =================
[14:13:46] [PASSED] reflect-x
[14:13:46] [PASSED] reflect-y
[14:13:46] [PASSED] rotate-0
[14:13:46] [PASSED] rotate-90
[14:13:46] [PASSED] rotate-180
[14:13:46] [PASSED] rotate-270
[14:13:46] ============ [PASSED] drm_test_rect_rotate_inv =============
[14:13:46] ==================== [PASSED] drm_rect =====================
[14:13:46] ============ drm_sysfb_modeset_test (1 subtest) ============
[14:13:46] ============ drm_test_sysfb_build_fourcc_list =============
[14:13:46] [PASSED] no native formats
[14:13:46] [PASSED] XRGB8888 as native format
[14:13:46] [PASSED] remove duplicates
[14:13:46] [PASSED] convert alpha formats
[14:13:46] [PASSED] random formats
[14:13:46] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[14:13:46] ============= [PASSED] drm_sysfb_modeset_test ==============
[14:13:46] ================== drm_fixp (2 subtests) ===================
[14:13:46] [PASSED] drm_test_int2fixp
[14:13:46] [PASSED] drm_test_sm2fixp
[14:13:46] ==================== [PASSED] drm_fixp =====================
[14:13:46] ============================================================
[14:13:46] Testing complete. Ran 621 tests: passed: 621
[14:13:46] Elapsed time: 27.366s total, 1.664s configuring, 25.532s building, 0.135s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[14:13:46] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:13:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:13:58] Starting KUnit Kernel (1/1)...
[14:13:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:13:58] ================= ttm_device (5 subtests) ==================
[14:13:58] [PASSED] ttm_device_init_basic
[14:13:58] [PASSED] ttm_device_init_multiple
[14:13:58] [PASSED] ttm_device_fini_basic
[14:13:58] [PASSED] ttm_device_init_no_vma_man
[14:13:58] ================== ttm_device_init_pools ==================
[14:13:58] [PASSED] No DMA allocations, no DMA32 required
[14:13:58] [PASSED] DMA allocations, DMA32 required
[14:13:58] [PASSED] No DMA allocations, DMA32 required
[14:13:58] [PASSED] DMA allocations, no DMA32 required
[14:13:58] ============== [PASSED] ttm_device_init_pools ==============
[14:13:58] =================== [PASSED] ttm_device ====================
[14:13:58] ================== ttm_pool (8 subtests) ===================
[14:13:58] ================== ttm_pool_alloc_basic ===================
[14:13:58] [PASSED] One page
[14:13:58] [PASSED] More than one page
[14:13:58] [PASSED] Above the allocation limit
[14:13:58] [PASSED] One page, with coherent DMA mappings enabled
[14:13:58] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:13:58] ============== [PASSED] ttm_pool_alloc_basic ===============
[14:13:58] ============== ttm_pool_alloc_basic_dma_addr ==============
[14:13:58] [PASSED] One page
[14:13:58] [PASSED] More than one page
[14:13:58] [PASSED] Above the allocation limit
[14:13:58] [PASSED] One page, with coherent DMA mappings enabled
[14:13:58] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:13:58] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[14:13:58] [PASSED] ttm_pool_alloc_order_caching_match
[14:13:58] [PASSED] ttm_pool_alloc_caching_mismatch
[14:13:58] [PASSED] ttm_pool_alloc_order_mismatch
[14:13:58] [PASSED] ttm_pool_free_dma_alloc
[14:13:58] [PASSED] ttm_pool_free_no_dma_alloc
[14:13:58] [PASSED] ttm_pool_fini_basic
[14:13:58] ==================== [PASSED] ttm_pool =====================
[14:13:58] ================ ttm_resource (8 subtests) =================
[14:13:58] ================= ttm_resource_init_basic =================
[14:13:58] [PASSED] Init resource in TTM_PL_SYSTEM
[14:13:58] [PASSED] Init resource in TTM_PL_VRAM
[14:13:58] [PASSED] Init resource in a private placement
[14:13:58] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[14:13:58] ============= [PASSED] ttm_resource_init_basic =============
[14:13:58] [PASSED] ttm_resource_init_pinned
[14:13:58] [PASSED] ttm_resource_fini_basic
[14:13:58] [PASSED] ttm_resource_manager_init_basic
[14:13:58] [PASSED] ttm_resource_manager_usage_basic
[14:13:58] [PASSED] ttm_resource_manager_set_used_basic
[14:13:58] [PASSED] ttm_sys_man_alloc_basic
[14:13:58] [PASSED] ttm_sys_man_free_basic
[14:13:58] ================== [PASSED] ttm_resource ===================
[14:13:58] =================== ttm_tt (15 subtests) ===================
[14:13:58] ==================== ttm_tt_init_basic ====================
[14:13:58] [PASSED] Page-aligned size
[14:13:58] [PASSED] Extra pages requested
[14:13:58] ================ [PASSED] ttm_tt_init_basic ================
[14:13:58] [PASSED] ttm_tt_init_misaligned
[14:13:58] [PASSED] ttm_tt_fini_basic
[14:13:58] [PASSED] ttm_tt_fini_sg
[14:13:58] [PASSED] ttm_tt_fini_shmem
[14:13:58] [PASSED] ttm_tt_create_basic
[14:13:58] [PASSED] ttm_tt_create_invalid_bo_type
[14:13:58] [PASSED] ttm_tt_create_ttm_exists
[14:13:58] [PASSED] ttm_tt_create_failed
[14:13:58] [PASSED] ttm_tt_destroy_basic
[14:13:58] [PASSED] ttm_tt_populate_null_ttm
[14:13:58] [PASSED] ttm_tt_populate_populated_ttm
[14:13:58] [PASSED] ttm_tt_unpopulate_basic
[14:13:58] [PASSED] ttm_tt_unpopulate_empty_ttm
[14:13:58] [PASSED] ttm_tt_swapin_basic
[14:13:58] ===================== [PASSED] ttm_tt ======================
[14:13:58] =================== ttm_bo (14 subtests) ===================
[14:13:58] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[14:13:58] [PASSED] Cannot be interrupted and sleeps
[14:13:58] [PASSED] Cannot be interrupted, locks straight away
[14:13:58] [PASSED] Can be interrupted, sleeps
[14:13:58] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[14:13:58] [PASSED] ttm_bo_reserve_locked_no_sleep
[14:13:58] [PASSED] ttm_bo_reserve_no_wait_ticket
[14:13:58] [PASSED] ttm_bo_reserve_double_resv
[14:13:58] [PASSED] ttm_bo_reserve_interrupted
[14:13:58] [PASSED] ttm_bo_reserve_deadlock
[14:13:58] [PASSED] ttm_bo_unreserve_basic
[14:13:58] [PASSED] ttm_bo_unreserve_pinned
[14:13:58] [PASSED] ttm_bo_unreserve_bulk
[14:13:58] [PASSED] ttm_bo_fini_basic
[14:13:58] [PASSED] ttm_bo_fini_shared_resv
[14:13:58] [PASSED] ttm_bo_pin_basic
[14:13:58] [PASSED] ttm_bo_pin_unpin_resource
[14:13:58] [PASSED] ttm_bo_multiple_pin_one_unpin
[14:13:58] ===================== [PASSED] ttm_bo ======================
[14:13:58] ============== ttm_bo_validate (21 subtests) ===============
[14:13:58] ============== ttm_bo_init_reserved_sys_man ===============
[14:13:58] [PASSED] Buffer object for userspace
[14:13:58] [PASSED] Kernel buffer object
[14:13:58] [PASSED] Shared buffer object
[14:13:58] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[14:13:58] ============== ttm_bo_init_reserved_mock_man ==============
[14:13:58] [PASSED] Buffer object for userspace
[14:13:58] [PASSED] Kernel buffer object
[14:13:58] [PASSED] Shared buffer object
[14:13:58] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[14:13:58] [PASSED] ttm_bo_init_reserved_resv
[14:13:58] ================== ttm_bo_validate_basic ==================
[14:13:58] [PASSED] Buffer object for userspace
[14:13:58] [PASSED] Kernel buffer object
[14:13:58] [PASSED] Shared buffer object
[14:13:58] ============== [PASSED] ttm_bo_validate_basic ==============
[14:13:58] [PASSED] ttm_bo_validate_invalid_placement
[14:13:58] ============= ttm_bo_validate_same_placement ==============
[14:13:58] [PASSED] System manager
[14:13:58] [PASSED] VRAM manager
[14:13:58] ========= [PASSED] ttm_bo_validate_same_placement ==========
[14:13:58] [PASSED] ttm_bo_validate_failed_alloc
[14:13:58] [PASSED] ttm_bo_validate_pinned
[14:13:58] [PASSED] ttm_bo_validate_busy_placement
[14:13:58] ================ ttm_bo_validate_multihop =================
[14:13:58] [PASSED] Buffer object for userspace
[14:13:58] [PASSED] Kernel buffer object
[14:13:58] [PASSED] Shared buffer object
[14:13:58] ============ [PASSED] ttm_bo_validate_multihop =============
[14:13:58] ========== ttm_bo_validate_no_placement_signaled ==========
[14:13:58] [PASSED] Buffer object in system domain, no page vector
[14:13:58] [PASSED] Buffer object in system domain with an existing page vector
[14:13:58] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[14:13:58] ======== ttm_bo_validate_no_placement_not_signaled ========
[14:13:58] [PASSED] Buffer object for userspace
[14:13:58] [PASSED] Kernel buffer object
[14:13:58] [PASSED] Shared buffer object
[14:13:58] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[14:13:58] [PASSED] ttm_bo_validate_move_fence_signaled
[14:13:58] ========= ttm_bo_validate_move_fence_not_signaled =========
[14:13:58] [PASSED] Waits for GPU
[14:13:58] [PASSED] Tries to lock straight away
[14:13:58] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[14:13:58] [PASSED] ttm_bo_validate_happy_evict
[14:13:58] [PASSED] ttm_bo_validate_all_pinned_evict
[14:13:58] [PASSED] ttm_bo_validate_allowed_only_evict
[14:13:58] [PASSED] ttm_bo_validate_deleted_evict
[14:13:58] [PASSED] ttm_bo_validate_busy_domain_evict
[14:13:58] [PASSED] ttm_bo_validate_evict_gutting
[14:13:58] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[14:13:58] ================= [PASSED] ttm_bo_validate =================
[14:13:58] ============================================================
[14:13:58] Testing complete. Ran 101 tests: passed: 101
[14:13:58] Elapsed time: 11.503s total, 1.652s configuring, 9.634s building, 0.173s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* ✓ Xe.CI.BAT: success for series starting with [1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()
2026-02-11 11:58 [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp() Imre Deak
` (2 preceding siblings ...)
2026-02-11 14:14 ` ✓ CI.KUnit: success for series starting with [1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp() Patchwork
@ 2026-02-11 14:52 ` Patchwork
[not found] ` <177085437889.247401.14482774231614824232@a3b018990fe9>
4 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2026-02-11 14:52 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1888 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()
URL : https://patchwork.freedesktop.org/series/161496/
State : success
== Summary ==
CI Bug Log - changes from xe-4544-2938ce73d01357a5816ed7dbd041154b58635a37_BAT -> xe-pw-161496v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 10)
------------------------------
Additional (1): bat-bmg-3
Known issues
------------
Here are the changes found in xe-pw-161496v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_peer2peer@read@read-gpua-vram01-gpub-vram01-p2p:
- bat-bmg-3: NOTRUN -> [SKIP][1] ([Intel XE#6566]) +3 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161496v1/bat-bmg-3/igt@xe_peer2peer@read@read-gpua-vram01-gpub-vram01-p2p.html
#### Possible fixes ####
* igt@xe_waitfence@reltime:
- bat-ptl-1: [FAIL][2] -> [PASS][3]
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4544-2938ce73d01357a5816ed7dbd041154b58635a37/bat-ptl-1/igt@xe_waitfence@reltime.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161496v1/bat-ptl-1/igt@xe_waitfence@reltime.html
[Intel XE#6566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6566
Build changes
-------------
* IGT: IGT_8749 -> IGT_8750
* Linux: xe-4544-2938ce73d01357a5816ed7dbd041154b58635a37 -> xe-pw-161496v1
IGT_8749: 195f101f25a7984686f36f340aa88d44a1716ec6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8750: 8750
xe-4544-2938ce73d01357a5816ed7dbd041154b58635a37: 2938ce73d01357a5816ed7dbd041154b58635a37
xe-pw-161496v1: 161496v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-161496v1/index.html
[-- Attachment #2: Type: text/html, Size: 2495 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range
2026-02-11 11:58 ` [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range Imre Deak
2026-02-11 13:36 ` Michał Grzelak
@ 2026-02-11 16:06 ` Nautiyal, Ankit K
2026-02-11 17:12 ` Imre Deak
1 sibling, 1 reply; 14+ messages in thread
From: Nautiyal, Ankit K @ 2026-02-11 16:06 UTC (permalink / raw)
To: Imre Deak, intel-gfx, intel-xe
On 2/11/2026 5:28 PM, Imre Deak wrote:
> The user's request for a maximum BPC - via the max-bpc connector
> property - determines the pipe BPP selected by the encoder, which is in
> turn used either as the uncompressed output BPP or as the input BPP for
> the DSC engine. This user-requested BPC->BPP can be outside of the
> source/sink's supported valid min/max pipe BPP range and atm such an
> out-of-bound request will be rejected by the encoder's state
> computation.
>
> As opposed to the above, the semantic for the max-bpc connector property
> - which the user may reasonably expect - is not to fail the modeset in
> case of an out-of-bound max BPC request, rather to adjust the request
> clamping it to the valid BPP range.
>
> Based on the above, calculate the baseline (i.e. the non-DP specific
> platform/EDID) _maximum_ pipe BPP, storing it in
> intel_crtc_state::max_pipe_bpp, separately from the baseline _target_
> pipe BPP (which is the lower BPP of the baseline maximum and requested
> BPP, stored in intel_crtc_state::pipe_bpp). This allows the encoder
> state computation to use the baseline maximum pipe BPP as a hard limit
> for the selected pipe BPP, while also letting it use the baseline target
> pipe BPP only as a preference, clamping this target BPP to the valid
> DP pipe BPP range.
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++
> .../drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++--
> 3 files changed, 35 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ab4b59916d2e7..dae7a7d11cb84 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4374,12 +4374,24 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
> struct intel_display *display = to_intel_display(crtc_state);
> struct drm_connector *connector = conn_state->connector;
> const struct drm_display_info *info = &connector->display_info;
> + int edid_bpc = info->bpc ? : 8;
> int target_pipe_bpp;
> + int max_edid_bpp;
> +
> + max_edid_bpp = bpc_to_bpp(edid_bpc);
> + if (max_edid_bpp < 0)
> + return max_edid_bpp;
>
> target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
> if (target_pipe_bpp < 0)
> return target_pipe_bpp;
>
> + /*
> + * The maximum pipe BPP is the minimum of the max platform BPP and
> + * the max EDID BPP.
> + */
> + crtc_state->max_pipe_bpp = min(crtc_state->pipe_bpp, max_edid_bpp);
The function compute_sink_pipe_bpp() is actually just limiting the
pipe_bpp to sink max limits.
Instead of filling the crtc_state->max_pipe_bpp in this function itself,
can we have a separate function only to set the crtc_state->max_pipe_bpp
from the edid max:
compute_max_pipe_bpp(const struct drm_connector_state *conn_state,
struct intel_crtc_state *crtc_state)
This can be called separately from compute_baseline_pipe_bpp:
ret = compute_max_pipe_bpp(connector_state, crtc_state);
if (ret)
return ret;
ret = compute_sink_pipe_bpp(connector_state, crtc_state);
...
This way the compute_sink_pipe_bpp will only do one thing(adjusting the
pipe_bpp to sink limits).
˚oO(Perhaps we should name it to adjust_pipe_bpp_for_sink()).
> +
> if (target_pipe_bpp < crtc_state->pipe_bpp) {
> drm_dbg_kms(display->drm,
> "[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e6298279dc892..e8e4af03a6a6c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1163,6 +1163,7 @@ struct intel_crtc_state {
> } dsi_pll;
>
> int max_link_bpp_x16; /* in 1/16 bpp units */
> + int max_pipe_bpp; /* in 1 bpp units */
> int pipe_bpp; /* in 1 bpp units */
> int min_hblank;
> struct intel_link_m_n dp_m_n;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 48845899298e4..4018b0122e8e0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1769,7 +1769,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
> struct intel_connector *connector = intel_dp->attached_connector;
> int bpp, bpc;
>
> - bpc = crtc_state->pipe_bpp / 3;
> + bpc = crtc_state->max_pipe_bpp / 3;
>
> if (intel_dp->dfp.max_bpc)
> bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
> @@ -2726,7 +2726,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> * previously. This hack should be removed once we have the
> * proper retry logic in place.
> */
> - limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
> + limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp, 24);
> } else {
> limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
> respect_downstream_limits);
> @@ -2757,6 +2757,26 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
> return false;
>
> + /*
> + * crtc_state->pipe_bpp is the non-DP specific baseline (platform/EDID)
> + * maximum pipe BPP limited by the max-BPC connector property request.
> + * Since by now pipe.max_bpp is <= the above baseline BPP, the only
Hmm I think I am missing something. Till now we have set pipe.max_bpp
using crtc_state->max_pipe_bpp.
This is set using min of max platform Bpp and the max edid bpp (and DP
dfp considerations, DSC sink input bpp cap).
So the relationship between pipe.max_bpp and the
crtc_state->max_pipe_bpp is not yet clear.
I do agree with the rest of the below: we need to clamp the
limits.pipe.max_bpp between crtc_state->pipe_bpp and limit.pipe->min_bpp.
Regards,
Ankit
> + * remaining reason for adjusting pipe.max_bpp is the max-BPC connector
> + * property request. Adjust pipe.max_bpp to this request within the
> + * current valid pipe.min_bpp .. pipe.max_bpp range.
> + */
> + limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
> + limits->pipe.max_bpp);
> + if (dsc)
> + limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
> + limits->pipe.max_bpp);
> +
> + if (limits->pipe.max_bpp != crtc_state->pipe_bpp)
> + drm_dbg_kms(display->drm,
> + "[CONNECTOR:%d:%s] Adjusting requested max pipe bpp %d -> %d\n",
> + connector->base.base.id, connector->base.name,
> + crtc_state->pipe_bpp, limits->pipe.max_bpp);
> +
> if (is_mst || intel_dp->use_max_params) {
> /*
> * For MST we always configure max link bw - the spec doesn't
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range
2026-02-11 16:06 ` Nautiyal, Ankit K
@ 2026-02-11 17:12 ` Imre Deak
2026-02-12 4:14 ` Nautiyal, Ankit K
0 siblings, 1 reply; 14+ messages in thread
From: Imre Deak @ 2026-02-11 17:12 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx, intel-xe
On Wed, Feb 11, 2026 at 09:36:55PM +0530, Nautiyal, Ankit K wrote:
>
> On 2/11/2026 5:28 PM, Imre Deak wrote:
> > The user's request for a maximum BPC - via the max-bpc connector
> > property - determines the pipe BPP selected by the encoder, which is in
> > turn used either as the uncompressed output BPP or as the input BPP for
> > the DSC engine. This user-requested BPC->BPP can be outside of the
> > source/sink's supported valid min/max pipe BPP range and atm such an
> > out-of-bound request will be rejected by the encoder's state
> > computation.
> >
> > As opposed to the above, the semantic for the max-bpc connector property
> > - which the user may reasonably expect - is not to fail the modeset in
> > case of an out-of-bound max BPC request, rather to adjust the request
> > clamping it to the valid BPP range.
> >
> > Based on the above, calculate the baseline (i.e. the non-DP specific
> > platform/EDID) _maximum_ pipe BPP, storing it in
> > intel_crtc_state::max_pipe_bpp, separately from the baseline _target_
> > pipe BPP (which is the lower BPP of the baseline maximum and requested
> > BPP, stored in intel_crtc_state::pipe_bpp). This allows the encoder
> > state computation to use the baseline maximum pipe BPP as a hard limit
> > for the selected pipe BPP, while also letting it use the baseline target
> > pipe BPP only as a preference, clamping this target BPP to the valid
> > DP pipe BPP range.
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++
> > .../drm/i915/display/intel_display_types.h | 1 +
> > drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++--
> > 3 files changed, 35 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index ab4b59916d2e7..dae7a7d11cb84 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -4374,12 +4374,24 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
> > struct intel_display *display = to_intel_display(crtc_state);
> > struct drm_connector *connector = conn_state->connector;
> > const struct drm_display_info *info = &connector->display_info;
> > + int edid_bpc = info->bpc ? : 8;
> > int target_pipe_bpp;
> > + int max_edid_bpp;
> > +
> > + max_edid_bpp = bpc_to_bpp(edid_bpc);
> > + if (max_edid_bpp < 0)
> > + return max_edid_bpp;
> > target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
> > if (target_pipe_bpp < 0)
> > return target_pipe_bpp;
> > + /*
> > + * The maximum pipe BPP is the minimum of the max platform BPP and
> > + * the max EDID BPP.
> > + */
> > + crtc_state->max_pipe_bpp = min(crtc_state->pipe_bpp, max_edid_bpp);
>
> The function compute_sink_pipe_bpp() is actually just limiting the pipe_bpp
> to sink max limits.
It limits the platform maximum pipe BPP passed to the function via
intel_crtc_state::pipe_bpp to the maximum EDID BPP _and_ the connector's
requested max-bpc x 3.
> Instead of filling the crtc_state->max_pipe_bpp in this function itself, can
> we have a separate function only to set the crtc_state->max_pipe_bpp from
> the edid max:
> compute_max_pipe_bpp(const struct drm_connector_state *conn_state,
> struct intel_crtc_state *crtc_state)
>
> This can be called separately from compute_baseline_pipe_bpp:
>
> ret = compute_max_pipe_bpp(connector_state, crtc_state);
> if (ret)
> return ret;
>
> ret = compute_sink_pipe_bpp(connector_state, crtc_state);
> ...
>
> This way the compute_sink_pipe_bpp will only do one thing(adjusting the
> pipe_bpp to sink limits).
>
> ˚oO(Perhaps we should name it to adjust_pipe_bpp_for_sink()).
Not sure. It's also good to see in one place how the debug-printed
max/target/edid BPPs are calculated.
In any case compute_sink_pipe_bpp() did compute both the target and max
BPPs implicitly even before, combining these to
intel_crtc_state::pipe_bpp, and this patch didn't change that. If
separate functions make more sense that should be a separate follow-up
change imo.
> > +
> > if (target_pipe_bpp < crtc_state->pipe_bpp) {
> > drm_dbg_kms(display->drm,
> > "[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index e6298279dc892..e8e4af03a6a6c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1163,6 +1163,7 @@ struct intel_crtc_state {
> > } dsi_pll;
> > int max_link_bpp_x16; /* in 1/16 bpp units */
> > + int max_pipe_bpp; /* in 1 bpp units */
> > int pipe_bpp; /* in 1 bpp units */
> > int min_hblank;
> > struct intel_link_m_n dp_m_n;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 48845899298e4..4018b0122e8e0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1769,7 +1769,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
> > struct intel_connector *connector = intel_dp->attached_connector;
> > int bpp, bpc;
> > - bpc = crtc_state->pipe_bpp / 3;
> > + bpc = crtc_state->max_pipe_bpp / 3;
> > if (intel_dp->dfp.max_bpc)
> > bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
> > @@ -2726,7 +2726,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> > * previously. This hack should be removed once we have the
> > * proper retry logic in place.
> > */
> > - limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
> > + limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp, 24);
> > } else {
> > limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
> > respect_downstream_limits);
> > @@ -2757,6 +2757,26 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> > if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
> > return false;
> > + /*
> > + * crtc_state->pipe_bpp is the non-DP specific baseline (platform/EDID)
> > + * maximum pipe BPP limited by the max-BPC connector property request.
> > + * Since by now pipe.max_bpp is <= the above baseline BPP, the only
>
> Hmm I think I am missing something. Till now we have set pipe.max_bpp using
> crtc_state->max_pipe_bpp.
Yes and then also reducing pipe.max_bpp further by every other source
and sink maximum BPP limits.
> This is set using min of max platform Bpp and the max edid bpp (and DP dfp
> considerations, DSC sink input bpp cap).
>
> So the relationship between pipe.max_bpp and the crtc_state->max_pipe_bpp is
> not yet clear.
The relationship is:
crtc_state->max_pipe_bpp = min(platform_max_bpp, sink_edid_max_bpp);
limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp,
dfp_max_bpp, vbt_edp_max_bpp,
sink_dsc_input_max_bpp,
src_dsc_input_max_bpp,
mst_max_24bpp);
> I do agree with the rest of the below: we need to clamp the
> limits.pipe.max_bpp between crtc_state->pipe_bpp and limit.pipe->min_bpp.
crtc_state->pipe_bpp = min(crtc_state->max_pipe_bpp, requested_bpc * 3);
and so
limits->pipe.max_bpp should be set to crtc_state->pipe_bpp clamped
between limits->pipe.min_bpp and limits->pipe.max_bpp.
> Regards,
>
> Ankit
>
> > + * remaining reason for adjusting pipe.max_bpp is the max-BPC connector
> > + * property request. Adjust pipe.max_bpp to this request within the
> > + * current valid pipe.min_bpp .. pipe.max_bpp range.
> > + */
> > + limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
> > + limits->pipe.max_bpp);
> > + if (dsc)
> > + limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
> > + limits->pipe.max_bpp);
> > +
> > + if (limits->pipe.max_bpp != crtc_state->pipe_bpp)
> > + drm_dbg_kms(display->drm,
> > + "[CONNECTOR:%d:%s] Adjusting requested max pipe bpp %d -> %d\n",
> > + connector->base.base.id, connector->base.name,
> > + crtc_state->pipe_bpp, limits->pipe.max_bpp);
> > +
> > if (is_mst || intel_dp->use_max_params) {
> > /*
> > * For MST we always configure max link bw - the spec doesn't
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()<
2026-02-11 13:35 ` [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()< Michał Grzelak
@ 2026-02-11 23:25 ` Michał Grzelak
0 siblings, 0 replies; 14+ messages in thread
From: Michał Grzelak @ 2026-02-11 23:25 UTC (permalink / raw)
To: Michał Grzelak; +Cc: Imre Deak, intel-gfx, intel-xe
[-- Attachment #1: Type: text/plain, Size: 4320 bytes --]
On Wed, 11 Feb 2026, Michał Grzelak wrote:
> Hello Imre,
>
> Some comments below wrt commit messages. No functional change requested.
>
> On Wed, 11 Feb 2026, Imre Deak wrote:
>> Clarify that the baseline pipe BPP - i.e. the non-DP specific
>> platform/EDID maximum BPP limited by any user-requested max-bpc setting
>> - set by compute_sink_pipe_bpp() is a baseline _target_ pipe BPP. This
>> target BPP can get either rejected or adjusted (lowering or increasing
>> it as needed) by the encoder state computation based on other
>> constrains, like a minimum pipe BPP dictated by a non-RGB output format
>
> s/contrains/contraints
ironic, of course here should be:
s/constrains/constraints
BR,
Michał
>
>> (24 BPP) or a min/max DSC input BPP dictated by a DSC sink. Whether an
>> out-of-bound target BPP is adjusted or rejected depends on the max-bpc
>> property's semantic assumed by the driver, which is atm to reject such a
>
> s/semantic/semantics
>
>> request.
>>
>> A follow-up change will also compute the baseline _maximum_ pipe BPP,
>> which is the non-DP specific platform/EDID maximum BPP w/o the requested
>> max-bpc adjustment and as such is a hard limit: The encoder state
>
> s/The/the
>
>> computation must ensure that the final BPP selected for the modeset is
>> below this maximum. Tracking the baseline maximum pipe BPP separately
>> will allow for adjusting the baseline target BPP as needed, clamping it
>> to the valid DP min/max pipe BPP range, instead of rejecting an
>> out-of-bound BPC/BPP request.
>>
>> To clarify the above semantics rename bpp in compute_sink_bpp() to
>
> s/compute_sink_bpp()/compute_sink_pipe_bpp()
>
>> target_pipe_bpp in this patch, preparing for a follow-up change also
>> computing max_pipe_bpp in the same function.
>>
>> Signed-off-by: Imre Deak <imre.deak@intel.com>
>
> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
>
> BR,
> Michał
>
>> ---
>
>> drivers/gpu/drm/i915/display/intel_display.c | 47 +++++++++++---------
>> 1 file changed, 25 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index 295f14416be70..ab4b59916d2e7 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -4350,6 +4350,23 @@ static int intel_crtc_atomic_check(struct
>> intel_atomic_state *state,
>> return 0;
>> }
>>
>> +static int bpc_to_bpp(int bpc)
>> +{
>> + switch (bpc) {
>> + case 6 ... 7:
>> + return 6 * 3;
>> + case 8 ... 9:
>> + return 8 * 3;
>> + case 10 ... 11:
>> + return 10 * 3;
>> + case 12 ... 16:
>> + return 12 * 3;
>> + default:
>> + MISSING_CASE(bpc);
>> + return -EINVAL;
>> + }
>> +}
>> +
>> static int
>> compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
>> struct intel_crtc_state *crtc_state)
>> @@ -4357,36 +4374,22 @@ compute_sink_pipe_bpp(const struct
>> drm_connector_state *conn_state,
>> struct intel_display *display = to_intel_display(crtc_state);
>> struct drm_connector *connector = conn_state->connector;
>> const struct drm_display_info *info = &connector->display_info;
>> - int bpp;
>> + int target_pipe_bpp;
>>
>> - switch (conn_state->max_bpc) {
>> - case 6 ... 7:
>> - bpp = 6 * 3;
>> - break;
>> - case 8 ... 9:
>> - bpp = 8 * 3;
>> - break;
>> - case 10 ... 11:
>> - bpp = 10 * 3;
>> - break;
>> - case 12 ... 16:
>> - bpp = 12 * 3;
>> - break;
>> - default:
>> - MISSING_CASE(conn_state->max_bpc);
>> - return -EINVAL;
>> - }
>> + target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
>> + if (target_pipe_bpp < 0)
>> + return target_pipe_bpp;
>>
>> - if (bpp < crtc_state->pipe_bpp) {
>> + if (target_pipe_bpp < crtc_state->pipe_bpp) {
>> drm_dbg_kms(display->drm,
>> - "[CONNECTOR:%d:%s] Limiting display bpp to %d "
>> + "[CONNECTOR:%d:%s] Limiting target display pipe
>> bpp to %d "
>> "(EDID bpp %d, max requested bpp %d, max platform
>> bpp %d)\n",
>> connector->base.id, connector->name,
>> - bpp, 3 * info->bpc,
>> + target_pipe_bpp, 3 * info->bpc,
>> 3 * conn_state->max_requested_bpc,
>> crtc_state->pipe_bpp);
>>
>> - crtc_state->pipe_bpp = bpp;
>> + crtc_state->pipe_bpp = target_pipe_bpp;
>> }
>>
>> return 0;
>> --
>> 2.49.1
>>
>>
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range
2026-02-11 17:12 ` Imre Deak
@ 2026-02-12 4:14 ` Nautiyal, Ankit K
2026-02-12 7:56 ` Imre Deak
0 siblings, 1 reply; 14+ messages in thread
From: Nautiyal, Ankit K @ 2026-02-12 4:14 UTC (permalink / raw)
To: imre.deak; +Cc: intel-gfx, intel-xe
On 2/11/2026 10:42 PM, Imre Deak wrote:
> On Wed, Feb 11, 2026 at 09:36:55PM +0530, Nautiyal, Ankit K wrote:
>> On 2/11/2026 5:28 PM, Imre Deak wrote:
>>> The user's request for a maximum BPC - via the max-bpc connector
>>> property - determines the pipe BPP selected by the encoder, which is in
>>> turn used either as the uncompressed output BPP or as the input BPP for
>>> the DSC engine. This user-requested BPC->BPP can be outside of the
>>> source/sink's supported valid min/max pipe BPP range and atm such an
>>> out-of-bound request will be rejected by the encoder's state
>>> computation.
>>>
>>> As opposed to the above, the semantic for the max-bpc connector property
>>> - which the user may reasonably expect - is not to fail the modeset in
>>> case of an out-of-bound max BPC request, rather to adjust the request
>>> clamping it to the valid BPP range.
>>>
>>> Based on the above, calculate the baseline (i.e. the non-DP specific
>>> platform/EDID) _maximum_ pipe BPP, storing it in
>>> intel_crtc_state::max_pipe_bpp, separately from the baseline _target_
>>> pipe BPP (which is the lower BPP of the baseline maximum and requested
>>> BPP, stored in intel_crtc_state::pipe_bpp). This allows the encoder
>>> state computation to use the baseline maximum pipe BPP as a hard limit
>>> for the selected pipe BPP, while also letting it use the baseline target
>>> pipe BPP only as a preference, clamping this target BPP to the valid
>>> DP pipe BPP range.
>>>
>>> Signed-off-by: Imre Deak <imre.deak@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++
>>> .../drm/i915/display/intel_display_types.h | 1 +
>>> drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++--
>>> 3 files changed, 35 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>>> index ab4b59916d2e7..dae7a7d11cb84 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>> @@ -4374,12 +4374,24 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
>>> struct intel_display *display = to_intel_display(crtc_state);
>>> struct drm_connector *connector = conn_state->connector;
>>> const struct drm_display_info *info = &connector->display_info;
>>> + int edid_bpc = info->bpc ? : 8;
>>> int target_pipe_bpp;
>>> + int max_edid_bpp;
>>> +
>>> + max_edid_bpp = bpc_to_bpp(edid_bpc);
>>> + if (max_edid_bpp < 0)
>>> + return max_edid_bpp;
>>> target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
>>> if (target_pipe_bpp < 0)
>>> return target_pipe_bpp;
>>> + /*
>>> + * The maximum pipe BPP is the minimum of the max platform BPP and
>>> + * the max EDID BPP.
>>> + */
>>> + crtc_state->max_pipe_bpp = min(crtc_state->pipe_bpp, max_edid_bpp);
>> The function compute_sink_pipe_bpp() is actually just limiting the pipe_bpp
>> to sink max limits.
> It limits the platform maximum pipe BPP passed to the function via
> intel_crtc_state::pipe_bpp to the maximum EDID BPP _and_ the connector's
> requested max-bpc x 3.
Yes right thats true.
>
>> Instead of filling the crtc_state->max_pipe_bpp in this function itself, can
>> we have a separate function only to set the crtc_state->max_pipe_bpp from
>> the edid max:
>> compute_max_pipe_bpp(const struct drm_connector_state *conn_state,
>> struct intel_crtc_state *crtc_state)
>>
>> This can be called separately from compute_baseline_pipe_bpp:
>>
>> ret = compute_max_pipe_bpp(connector_state, crtc_state);
>> if (ret)
>> return ret;
>>
>> ret = compute_sink_pipe_bpp(connector_state, crtc_state);
>> ...
>>
>> This way the compute_sink_pipe_bpp will only do one thing(adjusting the
>> pipe_bpp to sink limits).
>>
>> ˚oO(Perhaps we should name it to adjust_pipe_bpp_for_sink()).
> Not sure. It's also good to see in one place how the debug-printed
> max/target/edid BPPs are calculated.
Hmm yes indeed make sense.
>
> In any case compute_sink_pipe_bpp() did compute both the target and max
> BPPs implicitly even before, combining these to
> intel_crtc_state::pipe_bpp, and this patch didn't change that. If
> separate functions make more sense that should be a separate follow-up
> change imo.
You can ignore the comment. It seems better to have
ctrc_state->max_pipe_bpp set and the relevant debug message in same
place for now.
>
>>> +
>>> if (target_pipe_bpp < crtc_state->pipe_bpp) {
>>> drm_dbg_kms(display->drm,
>>> "[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>>> index e6298279dc892..e8e4af03a6a6c 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>>> @@ -1163,6 +1163,7 @@ struct intel_crtc_state {
>>> } dsi_pll;
>>> int max_link_bpp_x16; /* in 1/16 bpp units */
>>> + int max_pipe_bpp; /* in 1 bpp units */
>>> int pipe_bpp; /* in 1 bpp units */
>>> int min_hblank;
>>> struct intel_link_m_n dp_m_n;
>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>>> index 48845899298e4..4018b0122e8e0 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>>> @@ -1769,7 +1769,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
>>> struct intel_connector *connector = intel_dp->attached_connector;
>>> int bpp, bpc;
>>> - bpc = crtc_state->pipe_bpp / 3;
>>> + bpc = crtc_state->max_pipe_bpp / 3;
>>> if (intel_dp->dfp.max_bpc)
>>> bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
>>> @@ -2726,7 +2726,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
>>> * previously. This hack should be removed once we have the
>>> * proper retry logic in place.
>>> */
>>> - limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
>>> + limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp, 24);
>>> } else {
>>> limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
>>> respect_downstream_limits);
>>> @@ -2757,6 +2757,26 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
>>> if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
>>> return false;
>>> + /*
>>> + * crtc_state->pipe_bpp is the non-DP specific baseline (platform/EDID)
>>> + * maximum pipe BPP limited by the max-BPC connector property request.
>>> + * Since by now pipe.max_bpp is <= the above baseline BPP, the only
>> Hmm I think I am missing something. Till now we have set pipe.max_bpp using
>> crtc_state->max_pipe_bpp.
> Yes and then also reducing pipe.max_bpp further by every other source
> and sink maximum BPP limits.
>
>> This is set using min of max platform Bpp and the max edid bpp (and DP dfp
>> considerations, DSC sink input bpp cap).
>>
>> So the relationship between pipe.max_bpp and the crtc_state->max_pipe_bpp is
sorry I meant about pipe.max_bpp and the baseline BPP i.e.
crtc_state->pipe_bpp (not crtc_state->max_pip_bpp).
>> not yet clear.
> The relationship is:
>
> crtc_state->max_pipe_bpp = min(platform_max_bpp, sink_edid_max_bpp);
> limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp,
> dfp_max_bpp, vbt_edp_max_bpp,
> sink_dsc_input_max_bpp,
> src_dsc_input_max_bpp,
> mst_max_24bpp);
>
>> I do agree with the rest of the below: we need to clamp the
>> limits.pipe.max_bpp between crtc_state->pipe_bpp and limit.pipe->min_bpp.
> crtc_state->pipe_bpp = min(crtc_state->max_pipe_bpp, requested_bpc * 3);
Sorry, I am unable to find this line.. perhaps you mean that we intend
to make sure that crtc_state->pipe_bpp is in the range
(crtc_state->max_pipe_bpp, requested_bpc * 3)?
OR, is there any place we are using crtc_state->max_pipe_bpp to set
crtc_state->pipe_bpp, till this point?
So, I am still not getting the line:
"Since by now pipe.max_bpp is <= the above baseline BPP"
Regards,
Ankit
>
> and so
>
> limits->pipe.max_bpp should be set to crtc_state->pipe_bpp clamped
> between limits->pipe.min_bpp and limits->pipe.max_bpp.
>
>> Regards,
>>
>> Ankit
>>
>>> + * remaining reason for adjusting pipe.max_bpp is the max-BPC connector
>>> + * property request. Adjust pipe.max_bpp to this request within the
>>> + * current valid pipe.min_bpp .. pipe.max_bpp range.
>>> + */
>>> + limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
>>> + limits->pipe.max_bpp);
>>> + if (dsc)
>>> + limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
>>> + limits->pipe.max_bpp);
>>> +
>>> + if (limits->pipe.max_bpp != crtc_state->pipe_bpp)
>>> + drm_dbg_kms(display->drm,
>>> + "[CONNECTOR:%d:%s] Adjusting requested max pipe bpp %d -> %d\n",
>>> + connector->base.base.id, connector->base.name,
>>> + crtc_state->pipe_bpp, limits->pipe.max_bpp);
>>> +
>>> if (is_mst || intel_dp->use_max_params) {
>>> /*
>>> * For MST we always configure max link bw - the spec doesn't
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range
2026-02-12 4:14 ` Nautiyal, Ankit K
@ 2026-02-12 7:56 ` Imre Deak
2026-02-12 9:01 ` Nautiyal, Ankit K
0 siblings, 1 reply; 14+ messages in thread
From: Imre Deak @ 2026-02-12 7:56 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx, intel-xe
On Thu, Feb 12, 2026 at 09:44:15AM +0530, Nautiyal, Ankit K wrote:
>
> On 2/11/2026 10:42 PM, Imre Deak wrote:
> > On Wed, Feb 11, 2026 at 09:36:55PM +0530, Nautiyal, Ankit K wrote:
> > > On 2/11/2026 5:28 PM, Imre Deak wrote:
> > > > The user's request for a maximum BPC - via the max-bpc connector
> > > > property - determines the pipe BPP selected by the encoder, which is in
> > > > turn used either as the uncompressed output BPP or as the input BPP for
> > > > the DSC engine. This user-requested BPC->BPP can be outside of the
> > > > source/sink's supported valid min/max pipe BPP range and atm such an
> > > > out-of-bound request will be rejected by the encoder's state
> > > > computation.
> > > >
> > > > As opposed to the above, the semantic for the max-bpc connector property
> > > > - which the user may reasonably expect - is not to fail the modeset in
> > > > case of an out-of-bound max BPC request, rather to adjust the request
> > > > clamping it to the valid BPP range.
> > > >
> > > > Based on the above, calculate the baseline (i.e. the non-DP specific
> > > > platform/EDID) _maximum_ pipe BPP, storing it in
> > > > intel_crtc_state::max_pipe_bpp, separately from the baseline _target_
> > > > pipe BPP (which is the lower BPP of the baseline maximum and requested
> > > > BPP, stored in intel_crtc_state::pipe_bpp). This allows the encoder
> > > > state computation to use the baseline maximum pipe BPP as a hard limit
> > > > for the selected pipe BPP, while also letting it use the baseline target
> > > > pipe BPP only as a preference, clamping this target BPP to the valid
> > > > DP pipe BPP range.
> > > >
> > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++
> > > > .../drm/i915/display/intel_display_types.h | 1 +
> > > > drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++--
> > > > 3 files changed, 35 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > > index ab4b59916d2e7..dae7a7d11cb84 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > > @@ -4374,12 +4374,24 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
> > > > struct intel_display *display = to_intel_display(crtc_state);
> > > > struct drm_connector *connector = conn_state->connector;
> > > > const struct drm_display_info *info = &connector->display_info;
> > > > + int edid_bpc = info->bpc ? : 8;
> > > > int target_pipe_bpp;
> > > > + int max_edid_bpp;
> > > > +
> > > > + max_edid_bpp = bpc_to_bpp(edid_bpc);
> > > > + if (max_edid_bpp < 0)
> > > > + return max_edid_bpp;
> > > > target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
> > > > if (target_pipe_bpp < 0)
> > > > return target_pipe_bpp;
> > > > + /*
> > > > + * The maximum pipe BPP is the minimum of the max platform BPP and
> > > > + * the max EDID BPP.
> > > > + */
> > > > + crtc_state->max_pipe_bpp = min(crtc_state->pipe_bpp, max_edid_bpp);
> > > The function compute_sink_pipe_bpp() is actually just limiting the pipe_bpp
> > > to sink max limits.
> > It limits the platform maximum pipe BPP passed to the function via
> > intel_crtc_state::pipe_bpp to the maximum EDID BPP _and_ the connector's
> > requested max-bpc x 3.
>
> Yes right thats true.
>
>
> >
> > > Instead of filling the crtc_state->max_pipe_bpp in this function itself, can
> > > we have a separate function only to set the crtc_state->max_pipe_bpp from
> > > the edid max:
> > > compute_max_pipe_bpp(const struct drm_connector_state *conn_state,
> > > struct intel_crtc_state *crtc_state)
> > >
> > > This can be called separately from compute_baseline_pipe_bpp:
> > >
> > > ret = compute_max_pipe_bpp(connector_state, crtc_state);
> > > if (ret)
> > > return ret;
> > >
> > > ret = compute_sink_pipe_bpp(connector_state, crtc_state);
> > > ...
> > >
> > > This way the compute_sink_pipe_bpp will only do one thing(adjusting the
> > > pipe_bpp to sink limits).
> > >
> > > ˚oO(Perhaps we should name it to adjust_pipe_bpp_for_sink()).
> > Not sure. It's also good to see in one place how the debug-printed
> > max/target/edid BPPs are calculated.
>
> Hmm yes indeed make sense.
>
>
> >
> > In any case compute_sink_pipe_bpp() did compute both the target and max
> > BPPs implicitly even before, combining these to
> > intel_crtc_state::pipe_bpp, and this patch didn't change that. If
> > separate functions make more sense that should be a separate follow-up
> > change imo.
>
> You can ignore the comment. It seems better to have ctrc_state->max_pipe_bpp
> set and the relevant debug message in same place for now.
>
>
> >
> > > > +
> > > > if (target_pipe_bpp < crtc_state->pipe_bpp) {
> > > > drm_dbg_kms(display->drm,
> > > > "[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > index e6298279dc892..e8e4af03a6a6c 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > @@ -1163,6 +1163,7 @@ struct intel_crtc_state {
> > > > } dsi_pll;
> > > > int max_link_bpp_x16; /* in 1/16 bpp units */
> > > > + int max_pipe_bpp; /* in 1 bpp units */
> > > > int pipe_bpp; /* in 1 bpp units */
> > > > int min_hblank;
> > > > struct intel_link_m_n dp_m_n;
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > index 48845899298e4..4018b0122e8e0 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > @@ -1769,7 +1769,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
> > > > struct intel_connector *connector = intel_dp->attached_connector;
> > > > int bpp, bpc;
> > > > - bpc = crtc_state->pipe_bpp / 3;
> > > > + bpc = crtc_state->max_pipe_bpp / 3;
> > > > if (intel_dp->dfp.max_bpc)
> > > > bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
> > > > @@ -2726,7 +2726,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> > > > * previously. This hack should be removed once we have the
> > > > * proper retry logic in place.
> > > > */
> > > > - limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
> > > > + limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp, 24);
> > > > } else {
> > > > limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
> > > > respect_downstream_limits);
> > > > @@ -2757,6 +2757,26 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> > > > if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
> > > > return false;
> > > > + /*
> > > > + * crtc_state->pipe_bpp is the non-DP specific baseline (platform/EDID)
> > > > + * maximum pipe BPP limited by the max-BPC connector property request.
> > > > + * Since by now pipe.max_bpp is <= the above baseline BPP, the only
> > > Hmm I think I am missing something. Till now we have set pipe.max_bpp using
> > > crtc_state->max_pipe_bpp.
> > Yes and then also reducing pipe.max_bpp further by every other source
> > and sink maximum BPP limits.
> >
> > > This is set using min of max platform Bpp and the max edid bpp (and DP dfp
> > > considerations, DSC sink input bpp cap).
> > >
> > > So the relationship between pipe.max_bpp and the crtc_state->max_pipe_bpp is
>
>
> sorry I meant about pipe.max_bpp and the baseline BPP i.e.
> crtc_state->pipe_bpp (not crtc_state->max_pip_bpp).
>
>
> > > not yet clear.
> > The relationship is:
> >
> > crtc_state->max_pipe_bpp = min(platform_max_bpp, sink_edid_max_bpp);
> > limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp,
> > dfp_max_bpp, vbt_edp_max_bpp,
> > sink_dsc_input_max_bpp,
> > src_dsc_input_max_bpp,
> > mst_max_24bpp);
> >
> > > I do agree with the rest of the below: we need to clamp the
> > > limits.pipe.max_bpp between crtc_state->pipe_bpp and limit.pipe->min_bpp.
> > crtc_state->pipe_bpp = min(crtc_state->max_pipe_bpp, requested_bpc * 3);
>
> Sorry, I am unable to find this line..
This line is in compute_sink_pipe_bpp(). So at this point in the code
crtc_state->pipe_bpp has the above min() value.
> perhaps you mean that we intend to
> make sure that crtc_state->pipe_bpp is in the range
> (crtc_state->max_pipe_bpp, requested_bpc * 3)?
No. crtc_state->pipe_bpp at this point in the code has exactly the above
min() value.
> OR, is there any place we are using crtc_state->max_pipe_bpp to set
> crtc_state->pipe_bpp, till this point?
Yes, in compute_sink_pipe_bpp().
> So, I am still not getting the line:
>
> "Since by now pipe.max_bpp is <= the above baseline BPP"
limits->pipe.max_bpp at this point in the code is <= the baseline
_maximum_ BPP that is crtc_state->max_pipe_bpp.
> Regards,
>
> Ankit
>
>
> >
> > and so
> >
> > limits->pipe.max_bpp should be set to crtc_state->pipe_bpp clamped
> > between limits->pipe.min_bpp and limits->pipe.max_bpp.
> >
> > > Regards,
> > >
> > > Ankit
> > >
> > > > + * remaining reason for adjusting pipe.max_bpp is the max-BPC connector
> > > > + * property request. Adjust pipe.max_bpp to this request within the
> > > > + * current valid pipe.min_bpp .. pipe.max_bpp range.
> > > > + */
> > > > + limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
> > > > + limits->pipe.max_bpp);
> > > > + if (dsc)
> > > > + limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
> > > > + limits->pipe.max_bpp);
> > > > +
> > > > + if (limits->pipe.max_bpp != crtc_state->pipe_bpp)
> > > > + drm_dbg_kms(display->drm,
> > > > + "[CONNECTOR:%d:%s] Adjusting requested max pipe bpp %d -> %d\n",
> > > > + connector->base.base.id, connector->base.name,
> > > > + crtc_state->pipe_bpp, limits->pipe.max_bpp);
> > > > +
> > > > if (is_mst || intel_dp->use_max_params) {
> > > > /*
> > > > * For MST we always configure max link bw - the spec doesn't
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range
2026-02-12 7:56 ` Imre Deak
@ 2026-02-12 9:01 ` Nautiyal, Ankit K
2026-02-12 9:21 ` Imre Deak
0 siblings, 1 reply; 14+ messages in thread
From: Nautiyal, Ankit K @ 2026-02-12 9:01 UTC (permalink / raw)
To: imre.deak; +Cc: intel-gfx, intel-xe
On 2/12/2026 1:26 PM, Imre Deak wrote:
> On Thu, Feb 12, 2026 at 09:44:15AM +0530, Nautiyal, Ankit K wrote:
>> On 2/11/2026 10:42 PM, Imre Deak wrote:
>>> On Wed, Feb 11, 2026 at 09:36:55PM +0530, Nautiyal, Ankit K wrote:
>>>> On 2/11/2026 5:28 PM, Imre Deak wrote:
>>>>> The user's request for a maximum BPC - via the max-bpc connector
>>>>> property - determines the pipe BPP selected by the encoder, which is in
>>>>> turn used either as the uncompressed output BPP or as the input BPP for
>>>>> the DSC engine. This user-requested BPC->BPP can be outside of the
>>>>> source/sink's supported valid min/max pipe BPP range and atm such an
>>>>> out-of-bound request will be rejected by the encoder's state
>>>>> computation.
>>>>>
>>>>> As opposed to the above, the semantic for the max-bpc connector property
>>>>> - which the user may reasonably expect - is not to fail the modeset in
>>>>> case of an out-of-bound max BPC request, rather to adjust the request
>>>>> clamping it to the valid BPP range.
>>>>>
>>>>> Based on the above, calculate the baseline (i.e. the non-DP specific
>>>>> platform/EDID) _maximum_ pipe BPP, storing it in
>>>>> intel_crtc_state::max_pipe_bpp, separately from the baseline _target_
>>>>> pipe BPP (which is the lower BPP of the baseline maximum and requested
>>>>> BPP, stored in intel_crtc_state::pipe_bpp). This allows the encoder
>>>>> state computation to use the baseline maximum pipe BPP as a hard limit
>>>>> for the selected pipe BPP, while also letting it use the baseline target
>>>>> pipe BPP only as a preference, clamping this target BPP to the valid
>>>>> DP pipe BPP range.
>>>>>
>>>>> Signed-off-by: Imre Deak <imre.deak@intel.com>
>>>>> ---
>>>>> drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++
>>>>> .../drm/i915/display/intel_display_types.h | 1 +
>>>>> drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++--
>>>>> 3 files changed, 35 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>>>>> index ab4b59916d2e7..dae7a7d11cb84 100644
>>>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>>>> @@ -4374,12 +4374,24 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
>>>>> struct intel_display *display = to_intel_display(crtc_state);
>>>>> struct drm_connector *connector = conn_state->connector;
>>>>> const struct drm_display_info *info = &connector->display_info;
>>>>> + int edid_bpc = info->bpc ? : 8;
>>>>> int target_pipe_bpp;
>>>>> + int max_edid_bpp;
>>>>> +
>>>>> + max_edid_bpp = bpc_to_bpp(edid_bpc);
>>>>> + if (max_edid_bpp < 0)
>>>>> + return max_edid_bpp;
>>>>> target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
>>>>> if (target_pipe_bpp < 0)
>>>>> return target_pipe_bpp;
>>>>> + /*
>>>>> + * The maximum pipe BPP is the minimum of the max platform BPP and
>>>>> + * the max EDID BPP.
>>>>> + */
>>>>> + crtc_state->max_pipe_bpp = min(crtc_state->pipe_bpp, max_edid_bpp);
>>>> The function compute_sink_pipe_bpp() is actually just limiting the pipe_bpp
>>>> to sink max limits.
>>> It limits the platform maximum pipe BPP passed to the function via
>>> intel_crtc_state::pipe_bpp to the maximum EDID BPP _and_ the connector's
>>> requested max-bpc x 3.
>> Yes right thats true.
>>
>>
>>>> Instead of filling the crtc_state->max_pipe_bpp in this function itself, can
>>>> we have a separate function only to set the crtc_state->max_pipe_bpp from
>>>> the edid max:
>>>> compute_max_pipe_bpp(const struct drm_connector_state *conn_state,
>>>> struct intel_crtc_state *crtc_state)
>>>>
>>>> This can be called separately from compute_baseline_pipe_bpp:
>>>>
>>>> ret = compute_max_pipe_bpp(connector_state, crtc_state);
>>>> if (ret)
>>>> return ret;
>>>>
>>>> ret = compute_sink_pipe_bpp(connector_state, crtc_state);
>>>> ...
>>>>
>>>> This way the compute_sink_pipe_bpp will only do one thing(adjusting the
>>>> pipe_bpp to sink limits).
>>>>
>>>> ˚oO(Perhaps we should name it to adjust_pipe_bpp_for_sink()).
>>> Not sure. It's also good to see in one place how the debug-printed
>>> max/target/edid BPPs are calculated.
>> Hmm yes indeed make sense.
>>
>>
>>> In any case compute_sink_pipe_bpp() did compute both the target and max
>>> BPPs implicitly even before, combining these to
>>> intel_crtc_state::pipe_bpp, and this patch didn't change that. If
>>> separate functions make more sense that should be a separate follow-up
>>> change imo.
>> You can ignore the comment. It seems better to have ctrc_state->max_pipe_bpp
>> set and the relevant debug message in same place for now.
>>
>>
>>>>> +
>>>>> if (target_pipe_bpp < crtc_state->pipe_bpp) {
>>>>> drm_dbg_kms(display->drm,
>>>>> "[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
>>>>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>>>>> index e6298279dc892..e8e4af03a6a6c 100644
>>>>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>>>>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>>>>> @@ -1163,6 +1163,7 @@ struct intel_crtc_state {
>>>>> } dsi_pll;
>>>>> int max_link_bpp_x16; /* in 1/16 bpp units */
>>>>> + int max_pipe_bpp; /* in 1 bpp units */
>>>>> int pipe_bpp; /* in 1 bpp units */
>>>>> int min_hblank;
>>>>> struct intel_link_m_n dp_m_n;
>>>>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>>>>> index 48845899298e4..4018b0122e8e0 100644
>>>>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>>>>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>>>>> @@ -1769,7 +1769,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
>>>>> struct intel_connector *connector = intel_dp->attached_connector;
>>>>> int bpp, bpc;
>>>>> - bpc = crtc_state->pipe_bpp / 3;
>>>>> + bpc = crtc_state->max_pipe_bpp / 3;
>>>>> if (intel_dp->dfp.max_bpc)
>>>>> bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
>>>>> @@ -2726,7 +2726,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
>>>>> * previously. This hack should be removed once we have the
>>>>> * proper retry logic in place.
>>>>> */
>>>>> - limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
>>>>> + limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp, 24);
>>>>> } else {
>>>>> limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
>>>>> respect_downstream_limits);
>>>>> @@ -2757,6 +2757,26 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
>>>>> if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
>>>>> return false;
>>>>> + /*
>>>>> + * crtc_state->pipe_bpp is the non-DP specific baseline (platform/EDID)
>>>>> + * maximum pipe BPP limited by the max-BPC connector property request.
>>>>> + * Since by now pipe.max_bpp is <= the above baseline BPP, the only
>>>> Hmm I think I am missing something. Till now we have set pipe.max_bpp using
>>>> crtc_state->max_pipe_bpp.
>>> Yes and then also reducing pipe.max_bpp further by every other source
>>> and sink maximum BPP limits.
>>>
>>>> This is set using min of max platform Bpp and the max edid bpp (and DP dfp
>>>> considerations, DSC sink input bpp cap).
>>>>
>>>> So the relationship between pipe.max_bpp and the crtc_state->max_pipe_bpp is
>>
>> sorry I meant about pipe.max_bpp and the baseline BPP i.e.
>> crtc_state->pipe_bpp (not crtc_state->max_pip_bpp).
>>
>>
>>>> not yet clear.
>>> The relationship is:
>>>
>>> crtc_state->max_pipe_bpp = min(platform_max_bpp, sink_edid_max_bpp);
>>> limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp,
>>> dfp_max_bpp, vbt_edp_max_bpp,
>>> sink_dsc_input_max_bpp,
>>> src_dsc_input_max_bpp,
>>> mst_max_24bpp);
>>>
>>>> I do agree with the rest of the below: we need to clamp the
>>>> limits.pipe.max_bpp between crtc_state->pipe_bpp and limit.pipe->min_bpp.
>>> crtc_state->pipe_bpp = min(crtc_state->max_pipe_bpp, requested_bpc * 3);
Thanks for clarifying this. I was overlooking the part that
max_requested_bpc is already having the edid_bpc limit accounted.
So this statement is clear to me now.
>> Sorry, I am unable to find this line..
> This line is in compute_sink_pipe_bpp(). So at this point in the code
> crtc_state->pipe_bpp has the above min() value.
>
>> perhaps you mean that we intend to
>> make sure that crtc_state->pipe_bpp is in the range
>> (crtc_state->max_pipe_bpp, requested_bpc * 3)?
> No. crtc_state->pipe_bpp at this point in the code has exactly the above
> min() value.
>
>> OR, is there any place we are using crtc_state->max_pipe_bpp to set
>> crtc_state->pipe_bpp, till this point?
> Yes, in compute_sink_pipe_bpp().
>
>> So, I am still not getting the line:
>>
>> "Since by now pipe.max_bpp is <= the above baseline BPP"
> limits->pipe.max_bpp at this point in the code is <= the baseline
> _maximum_ BPP that is crtc_state->max_pipe_bpp.
This too make sense now.
Thanks for your patience to answer my queries.
I agree with the changes and with the change suggested by Michał, this
looks good to me too.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Regards,
Ankit
>
>> Regards,
>>
>> Ankit
>>
>>
>>> and so
>>>
>>> limits->pipe.max_bpp should be set to crtc_state->pipe_bpp clamped
>>> between limits->pipe.min_bpp and limits->pipe.max_bpp.
>>>
>>>> Regards,
>>>>
>>>> Ankit
>>>>
>>>>> + * remaining reason for adjusting pipe.max_bpp is the max-BPC connector
>>>>> + * property request. Adjust pipe.max_bpp to this request within the
>>>>> + * current valid pipe.min_bpp .. pipe.max_bpp range.
>>>>> + */
>>>>> + limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
>>>>> + limits->pipe.max_bpp);
>>>>> + if (dsc)
>>>>> + limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
>>>>> + limits->pipe.max_bpp);
>>>>> +
>>>>> + if (limits->pipe.max_bpp != crtc_state->pipe_bpp)
>>>>> + drm_dbg_kms(display->drm,
>>>>> + "[CONNECTOR:%d:%s] Adjusting requested max pipe bpp %d -> %d\n",
>>>>> + connector->base.base.id, connector->base.name,
>>>>> + crtc_state->pipe_bpp, limits->pipe.max_bpp);
>>>>> +
>>>>> if (is_mst || intel_dp->use_max_params) {
>>>>> /*
>>>>> * For MST we always configure max link bw - the spec doesn't
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range
2026-02-12 9:01 ` Nautiyal, Ankit K
@ 2026-02-12 9:21 ` Imre Deak
0 siblings, 0 replies; 14+ messages in thread
From: Imre Deak @ 2026-02-12 9:21 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-gfx, intel-xe
On Thu, Feb 12, 2026 at 02:31:39PM +0530, Nautiyal, Ankit K wrote:
>
> On 2/12/2026 1:26 PM, Imre Deak wrote:
> > On Thu, Feb 12, 2026 at 09:44:15AM +0530, Nautiyal, Ankit K wrote:
> > > On 2/11/2026 10:42 PM, Imre Deak wrote:
> > > > On Wed, Feb 11, 2026 at 09:36:55PM +0530, Nautiyal, Ankit K wrote:
> > > > > On 2/11/2026 5:28 PM, Imre Deak wrote:
> > > > > > The user's request for a maximum BPC - via the max-bpc connector
> > > > > > property - determines the pipe BPP selected by the encoder, which is in
> > > > > > turn used either as the uncompressed output BPP or as the input BPP for
> > > > > > the DSC engine. This user-requested BPC->BPP can be outside of the
> > > > > > source/sink's supported valid min/max pipe BPP range and atm such an
> > > > > > out-of-bound request will be rejected by the encoder's state
> > > > > > computation.
> > > > > >
> > > > > > As opposed to the above, the semantic for the max-bpc connector property
> > > > > > - which the user may reasonably expect - is not to fail the modeset in
> > > > > > case of an out-of-bound max BPC request, rather to adjust the request
> > > > > > clamping it to the valid BPP range.
> > > > > >
> > > > > > Based on the above, calculate the baseline (i.e. the non-DP specific
> > > > > > platform/EDID) _maximum_ pipe BPP, storing it in
> > > > > > intel_crtc_state::max_pipe_bpp, separately from the baseline _target_
> > > > > > pipe BPP (which is the lower BPP of the baseline maximum and requested
> > > > > > BPP, stored in intel_crtc_state::pipe_bpp). This allows the encoder
> > > > > > state computation to use the baseline maximum pipe BPP as a hard limit
> > > > > > for the selected pipe BPP, while also letting it use the baseline target
> > > > > > pipe BPP only as a preference, clamping this target BPP to the valid
> > > > > > DP pipe BPP range.
> > > > > >
> > > > > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > > > > ---
> > > > > > drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++
> > > > > > .../drm/i915/display/intel_display_types.h | 1 +
> > > > > > drivers/gpu/drm/i915/display/intel_dp.c | 24 +++++++++++++++++--
> > > > > > 3 files changed, 35 insertions(+), 2 deletions(-)
> > > > > >
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > > > > index ab4b59916d2e7..dae7a7d11cb84 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > > > > @@ -4374,12 +4374,24 @@ compute_sink_pipe_bpp(const struct drm_connector_state *conn_state,
> > > > > > struct intel_display *display = to_intel_display(crtc_state);
> > > > > > struct drm_connector *connector = conn_state->connector;
> > > > > > const struct drm_display_info *info = &connector->display_info;
> > > > > > + int edid_bpc = info->bpc ? : 8;
> > > > > > int target_pipe_bpp;
> > > > > > + int max_edid_bpp;
> > > > > > +
> > > > > > + max_edid_bpp = bpc_to_bpp(edid_bpc);
> > > > > > + if (max_edid_bpp < 0)
> > > > > > + return max_edid_bpp;
> > > > > > target_pipe_bpp = bpc_to_bpp(conn_state->max_bpc);
> > > > > > if (target_pipe_bpp < 0)
> > > > > > return target_pipe_bpp;
> > > > > > + /*
> > > > > > + * The maximum pipe BPP is the minimum of the max platform BPP and
> > > > > > + * the max EDID BPP.
> > > > > > + */
> > > > > > + crtc_state->max_pipe_bpp = min(crtc_state->pipe_bpp, max_edid_bpp);
> > > > > The function compute_sink_pipe_bpp() is actually just limiting the pipe_bpp
> > > > > to sink max limits.
> > > > It limits the platform maximum pipe BPP passed to the function via
> > > > intel_crtc_state::pipe_bpp to the maximum EDID BPP _and_ the connector's
> > > > requested max-bpc x 3.
> > > Yes right thats true.
> > >
> > >
> > > > > Instead of filling the crtc_state->max_pipe_bpp in this function itself, can
> > > > > we have a separate function only to set the crtc_state->max_pipe_bpp from
> > > > > the edid max:
> > > > > compute_max_pipe_bpp(const struct drm_connector_state *conn_state,
> > > > > struct intel_crtc_state *crtc_state)
> > > > >
> > > > > This can be called separately from compute_baseline_pipe_bpp:
> > > > >
> > > > > ret = compute_max_pipe_bpp(connector_state, crtc_state);
> > > > > if (ret)
> > > > > return ret;
> > > > >
> > > > > ret = compute_sink_pipe_bpp(connector_state, crtc_state);
> > > > > ...
> > > > >
> > > > > This way the compute_sink_pipe_bpp will only do one thing(adjusting the
> > > > > pipe_bpp to sink limits).
> > > > >
> > > > > ˚oO(Perhaps we should name it to adjust_pipe_bpp_for_sink()).
> > > > Not sure. It's also good to see in one place how the debug-printed
> > > > max/target/edid BPPs are calculated.
> > > Hmm yes indeed make sense.
> > >
> > >
> > > > In any case compute_sink_pipe_bpp() did compute both the target and max
> > > > BPPs implicitly even before, combining these to
> > > > intel_crtc_state::pipe_bpp, and this patch didn't change that. If
> > > > separate functions make more sense that should be a separate follow-up
> > > > change imo.
> > > You can ignore the comment. It seems better to have ctrc_state->max_pipe_bpp
> > > set and the relevant debug message in same place for now.
> > >
> > >
> > > > > > +
> > > > > > if (target_pipe_bpp < crtc_state->pipe_bpp) {
> > > > > > drm_dbg_kms(display->drm,
> > > > > > "[CONNECTOR:%d:%s] Limiting target display pipe bpp to %d "
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > index e6298279dc892..e8e4af03a6a6c 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > > > @@ -1163,6 +1163,7 @@ struct intel_crtc_state {
> > > > > > } dsi_pll;
> > > > > > int max_link_bpp_x16; /* in 1/16 bpp units */
> > > > > > + int max_pipe_bpp; /* in 1 bpp units */
> > > > > > int pipe_bpp; /* in 1 bpp units */
> > > > > > int min_hblank;
> > > > > > struct intel_link_m_n dp_m_n;
> > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > > > index 48845899298e4..4018b0122e8e0 100644
> > > > > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > > > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > > > @@ -1769,7 +1769,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
> > > > > > struct intel_connector *connector = intel_dp->attached_connector;
> > > > > > int bpp, bpc;
> > > > > > - bpc = crtc_state->pipe_bpp / 3;
> > > > > > + bpc = crtc_state->max_pipe_bpp / 3;
> > > > > > if (intel_dp->dfp.max_bpc)
> > > > > > bpc = min_t(int, bpc, intel_dp->dfp.max_bpc);
> > > > > > @@ -2726,7 +2726,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> > > > > > * previously. This hack should be removed once we have the
> > > > > > * proper retry logic in place.
> > > > > > */
> > > > > > - limits->pipe.max_bpp = min(crtc_state->pipe_bpp, 24);
> > > > > > + limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp, 24);
> > > > > > } else {
> > > > > > limits->pipe.max_bpp = intel_dp_max_bpp(intel_dp, crtc_state,
> > > > > > respect_downstream_limits);
> > > > > > @@ -2757,6 +2757,26 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
> > > > > > if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
> > > > > > return false;
> > > > > > + /*
> > > > > > + * crtc_state->pipe_bpp is the non-DP specific baseline (platform/EDID)
> > > > > > + * maximum pipe BPP limited by the max-BPC connector property request.
> > > > > > + * Since by now pipe.max_bpp is <= the above baseline BPP, the only
> > > > > Hmm I think I am missing something. Till now we have set pipe.max_bpp using
> > > > > crtc_state->max_pipe_bpp.
> > > > Yes and then also reducing pipe.max_bpp further by every other source
> > > > and sink maximum BPP limits.
> > > >
> > > > > This is set using min of max platform Bpp and the max edid bpp (and DP dfp
> > > > > considerations, DSC sink input bpp cap).
> > > > >
> > > > > So the relationship between pipe.max_bpp and the crtc_state->max_pipe_bpp is
> > >
> > > sorry I meant about pipe.max_bpp and the baseline BPP i.e.
> > > crtc_state->pipe_bpp (not crtc_state->max_pip_bpp).
> > >
> > >
> > > > > not yet clear.
> > > > The relationship is:
> > > >
> > > > crtc_state->max_pipe_bpp = min(platform_max_bpp, sink_edid_max_bpp);
> > > > limits->pipe.max_bpp = min(crtc_state->max_pipe_bpp,
> > > > dfp_max_bpp, vbt_edp_max_bpp,
> > > > sink_dsc_input_max_bpp,
> > > > src_dsc_input_max_bpp,
> > > > mst_max_24bpp);
> > > >
> > > > > I do agree with the rest of the below: we need to clamp the
> > > > > limits.pipe.max_bpp between crtc_state->pipe_bpp and limit.pipe->min_bpp.
> > > > crtc_state->pipe_bpp = min(crtc_state->max_pipe_bpp, requested_bpc * 3);
>
> Thanks for clarifying this. I was overlooking the part that
> max_requested_bpc is already having the edid_bpc limit accounted.
That's no wonder I think. drm_connector_state::max_bpc combining the max
EDID BPC value and the connector's requested-max-bpc property value is
obscure and misleading I think. Since this drm_connector_state::max_bpc
value is not an actual (hard) maximum. It's a target BPC that the driver
uses as a user preference but can adjust it by both increasing or
decreasing it, based on the driver specific min/max limits (instead of
just failing the commit if that requested BPC value would be
out-of-bound).
I suppose this should be documented at least in DRM core.
> So this statement is clear to me now.
>
> > > Sorry, I am unable to find this line..
> > This line is in compute_sink_pipe_bpp(). So at this point in the code
> > crtc_state->pipe_bpp has the above min() value.
> >
> > > perhaps you mean that we intend to
> > > make sure that crtc_state->pipe_bpp is in the range
> > > (crtc_state->max_pipe_bpp, requested_bpc * 3)?
> > No. crtc_state->pipe_bpp at this point in the code has exactly the above
> > min() value.
> >
> > > OR, is there any place we are using crtc_state->max_pipe_bpp to set
> > > crtc_state->pipe_bpp, till this point?
> > Yes, in compute_sink_pipe_bpp().
> >
> > > So, I am still not getting the line:
> > >
> > > "Since by now pipe.max_bpp is <= the above baseline BPP"
> > limits->pipe.max_bpp at this point in the code is <= the baseline
> > _maximum_ BPP that is crtc_state->max_pipe_bpp.
>
> This too make sense now.
>
> Thanks for your patience to answer my queries.
>
> I agree with the changes and with the change suggested by Michał, this looks
> good to me too.
>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Thanks for the rigor.
> Regards,
>
> Ankit
>
>
> >
> > > Regards,
> > >
> > > Ankit
> > >
> > >
> > > > and so
> > > >
> > > > limits->pipe.max_bpp should be set to crtc_state->pipe_bpp clamped
> > > > between limits->pipe.min_bpp and limits->pipe.max_bpp.
> > > >
> > > > > Regards,
> > > > >
> > > > > Ankit
> > > > >
> > > > > > + * remaining reason for adjusting pipe.max_bpp is the max-BPC connector
> > > > > > + * property request. Adjust pipe.max_bpp to this request within the
> > > > > > + * current valid pipe.min_bpp .. pipe.max_bpp range.
> > > > > > + */
> > > > > > + limits->pipe.max_bpp = clamp(crtc_state->pipe_bpp, limits->pipe.min_bpp,
> > > > > > + limits->pipe.max_bpp);
> > > > > > + if (dsc)
> > > > > > + limits->pipe.max_bpp = align_max_sink_dsc_input_bpp(connector,
> > > > > > + limits->pipe.max_bpp);
> > > > > > +
> > > > > > + if (limits->pipe.max_bpp != crtc_state->pipe_bpp)
> > > > > > + drm_dbg_kms(display->drm,
> > > > > > + "[CONNECTOR:%d:%s] Adjusting requested max pipe bpp %d -> %d\n",
> > > > > > + connector->base.base.id, connector->base.name,
> > > > > > + crtc_state->pipe_bpp, limits->pipe.max_bpp);
> > > > > > +
> > > > > > if (is_mst || intel_dp->use_max_params) {
> > > > > > /*
> > > > > > * For MST we always configure max link bw - the spec doesn't
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: ✗ i915.CI.Full: failure for series starting with [1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()
[not found] ` <177085437889.247401.14482774231614824232@a3b018990fe9>
@ 2026-02-12 16:17 ` Imre Deak
0 siblings, 0 replies; 14+ messages in thread
From: Imre Deak @ 2026-02-12 16:17 UTC (permalink / raw)
To: Michał Grzelak, Ankit K Nautiyal; +Cc: intel-gfx, intel-xe, I915-ci-infra
On Wed, Feb 11, 2026 at 11:59:38PM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: series starting with [1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()
> URL : https://patchwork.freedesktop.org/series/161497/
> State : failure
Thanks for the reviews, patchset is pushed to drm-intel-next. While
pushing I fixed the commit message typos and clarified the code comment
referring to the baseline maximum BPP in patch 2, based on the review
comments.
The failure is unrelated see below.
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_17976_full -> Patchwork_161497v1_full
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_161497v1_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_161497v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Participating hosts (9 -> 9)
> ------------------------------
>
> No changes in participating hosts
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_161497v1_full:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@gem_lmem_swapping@smem-oom:
> - shard-dg2: [PASS][1] -> [FAIL][2]
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-5/igt@gem_lmem_swapping@smem-oom.html
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-4/igt@gem_lmem_swapping@smem-oom.html
> - shard-dg1: [PASS][3] -> [FAIL][4]
> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-16/igt@gem_lmem_swapping@smem-oom.html
> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-16/igt@gem_lmem_swapping@smem-oom.html
Neither of the above hosts has a DP output where the changes matter
(except for a trivial change in compute_sink_pipe_bpp() also relevant to
HDMI, but that change is w/o a functional effect).
> New tests
> ---------
>
> New tests have been introduced between CI_DRM_17976_full and Patchwork_161497v1_full:
>
> ### New IGT tests (1) ###
>
> * igt@kms_vblank@wait-busy@pipe-a-vga-1:
> - Statuses : 1 pass(s)
> - Exec time: [2.46] s
>
>
>
> Known issues
> ------------
>
> Here are the changes found in Patchwork_161497v1_full that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@api_intel_bb@crc32:
> - shard-tglu: NOTRUN -> [SKIP][5] ([i915#6230])
> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@api_intel_bb@crc32.html
>
> * igt@device_reset@cold-reset-bound:
> - shard-tglu: NOTRUN -> [SKIP][6] ([i915#11078])
> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@device_reset@cold-reset-bound.html
>
> * igt@drm_buddy@drm_buddy:
> - shard-tglu: NOTRUN -> [SKIP][7] ([i915#15678])
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@drm_buddy@drm_buddy.html
>
> * igt@gem_bad_reloc@negative-reloc-lut:
> - shard-rkl: NOTRUN -> [SKIP][8] ([i915#3281]) +5 other tests skip
> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@gem_bad_reloc@negative-reloc-lut.html
>
> * igt@gem_basic@multigpu-create-close:
> - shard-tglu: NOTRUN -> [SKIP][9] ([i915#7697]) +1 other test skip
> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@gem_basic@multigpu-create-close.html
>
> * igt@gem_ccs@block-copy-compressed:
> - shard-tglu-1: NOTRUN -> [SKIP][10] ([i915#3555] / [i915#9323])
> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@gem_ccs@block-copy-compressed.html
>
> * igt@gem_ccs@suspend-resume:
> - shard-tglu: NOTRUN -> [SKIP][11] ([i915#9323])
> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@gem_ccs@suspend-resume.html
>
> * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0:
> - shard-dg2: [PASS][12] -> [INCOMPLETE][13] ([i915#13356])
> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-4/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-3/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
>
> * igt@gem_create@create-ext-set-pat:
> - shard-tglu: NOTRUN -> [SKIP][14] ([i915#8562])
> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@gem_create@create-ext-set-pat.html
>
> * igt@gem_exec_balancer@bonded-dual:
> - shard-mtlp: NOTRUN -> [SKIP][15] ([i915#4771])
> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@gem_exec_balancer@bonded-dual.html
>
> * igt@gem_exec_balancer@parallel:
> - shard-tglu: NOTRUN -> [SKIP][16] ([i915#4525])
> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@gem_exec_balancer@parallel.html
>
> * igt@gem_exec_balancer@parallel-ordering:
> - shard-rkl: NOTRUN -> [SKIP][17] ([i915#4525])
> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@gem_exec_balancer@parallel-ordering.html
>
> * igt@gem_exec_balancer@parallel-out-fence:
> - shard-tglu-1: NOTRUN -> [SKIP][18] ([i915#4525])
> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@gem_exec_balancer@parallel-out-fence.html
>
> * igt@gem_exec_big@single:
> - shard-tglu: [PASS][19] -> [ABORT][20] ([i915#11713])
> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-tglu-5/igt@gem_exec_big@single.html
> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@gem_exec_big@single.html
>
> * igt@gem_exec_capture@capture-invisible@smem0:
> - shard-tglu: NOTRUN -> [SKIP][21] ([i915#6334]) +1 other test skip
> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@gem_exec_capture@capture-invisible@smem0.html
>
> * igt@gem_lmem_swapping@heavy-random:
> - shard-glk: NOTRUN -> [SKIP][22] ([i915#4613]) +1 other test skip
> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk1/igt@gem_lmem_swapping@heavy-random.html
>
> * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
> - shard-rkl: NOTRUN -> [SKIP][23] ([i915#4613]) +2 other tests skip
> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html
>
> * igt@gem_lmem_swapping@heavy-verify-random:
> - shard-tglu: NOTRUN -> [SKIP][24] ([i915#4613]) +1 other test skip
> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@gem_lmem_swapping@heavy-verify-random.html
>
> * igt@gem_lmem_swapping@parallel-random:
> - shard-tglu-1: NOTRUN -> [SKIP][25] ([i915#4613])
> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@gem_lmem_swapping@parallel-random.html
>
> * igt@gem_lmem_swapping@smem-oom@lmem0:
> - shard-dg2: [PASS][26] -> [CRASH][27] ([i915#5493])
> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-5/igt@gem_lmem_swapping@smem-oom@lmem0.html
> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-4/igt@gem_lmem_swapping@smem-oom@lmem0.html
> - shard-dg1: [PASS][28] -> [CRASH][29] ([i915#5493])
> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html
> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html
>
> * igt@gem_partial_pwrite_pread@write:
> - shard-mtlp: NOTRUN -> [SKIP][30] ([i915#3282])
> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@gem_partial_pwrite_pread@write.html
>
> * igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
> - shard-rkl: NOTRUN -> [SKIP][31] ([i915#3282]) +5 other tests skip
> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
>
> * igt@gem_pread@exhaustion:
> - shard-tglu-1: NOTRUN -> [WARN][32] ([i915#2658])
> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@gem_pread@exhaustion.html
> - shard-glk10: NOTRUN -> [WARN][33] ([i915#2658])
> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk10/igt@gem_pread@exhaustion.html
>
> * igt@gem_set_tiling_vs_blt@tiled-to-untiled:
> - shard-rkl: NOTRUN -> [SKIP][34] ([i915#8411])
> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@gem_set_tiling_vs_blt@tiled-to-untiled.html
>
> * igt@gem_tiled_partial_pwrite_pread@reads:
> - shard-mtlp: NOTRUN -> [SKIP][35] ([i915#4077]) +1 other test skip
> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@gem_tiled_partial_pwrite_pread@reads.html
>
> * igt@gem_userptr_blits@readonly-unsync:
> - shard-rkl: NOTRUN -> [SKIP][36] ([i915#3297])
> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@gem_userptr_blits@readonly-unsync.html
> - shard-tglu-1: NOTRUN -> [SKIP][37] ([i915#3297])
> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@gem_userptr_blits@readonly-unsync.html
>
> * igt@gem_workarounds@suspend-resume:
> - shard-rkl: [PASS][38] -> [INCOMPLETE][39] ([i915#13356])
> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-5/igt@gem_workarounds@suspend-resume.html
> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-4/igt@gem_workarounds@suspend-resume.html
>
> * igt@gem_workarounds@suspend-resume-context:
> - shard-glk10: NOTRUN -> [INCOMPLETE][40] ([i915#13356])
> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk10/igt@gem_workarounds@suspend-resume-context.html
>
> * igt@gen9_exec_parse@allowed-all:
> - shard-tglu: NOTRUN -> [SKIP][41] ([i915#2527] / [i915#2856])
> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@gen9_exec_parse@allowed-all.html
>
> * igt@gen9_exec_parse@allowed-single:
> - shard-rkl: NOTRUN -> [SKIP][42] ([i915#2527]) +1 other test skip
> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@gen9_exec_parse@allowed-single.html
>
> * igt@gen9_exec_parse@shadow-peek:
> - shard-tglu-1: NOTRUN -> [SKIP][43] ([i915#2527] / [i915#2856]) +2 other tests skip
> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@gen9_exec_parse@shadow-peek.html
>
> * igt@i915_module_load@resize-bar:
> - shard-tglu-1: NOTRUN -> [SKIP][44] ([i915#6412])
> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@i915_module_load@resize-bar.html
>
> * igt@i915_pm_rpm@system-suspend:
> - shard-rkl: NOTRUN -> [ABORT][45] ([i915#15060])
> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@i915_pm_rpm@system-suspend.html
>
> * igt@i915_query@hwconfig_table:
> - shard-tglu: NOTRUN -> [SKIP][46] ([i915#6245])
> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@i915_query@hwconfig_table.html
>
> * igt@i915_query@test-query-geometry-subslices:
> - shard-tglu: NOTRUN -> [SKIP][47] ([i915#5723])
> [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@i915_query@test-query-geometry-subslices.html
>
> * igt@i915_suspend@fence-restore-tiled2untiled:
> - shard-rkl: [PASS][48] -> [ABORT][49] ([i915#15140])
> [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@i915_suspend@fence-restore-tiled2untiled.html
> [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@i915_suspend@fence-restore-tiled2untiled.html
>
> * igt@i915_suspend@forcewake:
> - shard-glk: NOTRUN -> [INCOMPLETE][50] ([i915#4817]) +2 other tests incomplete
> [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk1/igt@i915_suspend@forcewake.html
>
> * igt@intel_hwmon@hwmon-write:
> - shard-rkl: NOTRUN -> [SKIP][51] ([i915#7707])
> [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@intel_hwmon@hwmon-write.html
>
> * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
> - shard-tglu-1: NOTRUN -> [SKIP][52] ([i915#9531])
> [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
>
> * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
> - shard-dg2: [PASS][53] -> [FAIL][54] ([i915#5956]) +1 other test fail
> [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
> [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-8/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
>
> * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
> - shard-glk: NOTRUN -> [SKIP][55] ([i915#1769])
> [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk3/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
>
> * igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1:
> - shard-tglu: [PASS][56] -> [FAIL][57] ([i915#15662]) +1 other test fail
> [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-tglu-9/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html
> [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-hdmi-a-1.html
>
> * igt@kms_big_fb@4-tiled-16bpp-rotate-0:
> - shard-rkl: NOTRUN -> [SKIP][58] ([i915#5286]) +4 other tests skip
> [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
>
> * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
> - shard-tglu-1: NOTRUN -> [SKIP][59] ([i915#5286]) +1 other test skip
> [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
>
> * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
> - shard-tglu: NOTRUN -> [SKIP][60] ([i915#5286]) +3 other tests skip
> [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
>
> * igt@kms_big_fb@linear-8bpp-rotate-90:
> - shard-rkl: NOTRUN -> [SKIP][61] ([i915#3638])
> [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_big_fb@linear-8bpp-rotate-90.html
>
> * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
> - shard-rkl: NOTRUN -> [SKIP][62] ([i915#3828])
> [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html
>
> * igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
> - shard-tglu-1: NOTRUN -> [SKIP][63] +25 other tests skip
> [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
>
> * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4:
> - shard-dg1: NOTRUN -> [SKIP][64] ([i915#6095]) +119 other tests skip
> [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-17/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-4.html
>
> * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
> - shard-rkl: NOTRUN -> [SKIP][65] ([i915#14544] / [i915#6095]) +16 other tests skip
> [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html
>
> * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2:
> - shard-rkl: NOTRUN -> [SKIP][66] ([i915#14098] / [i915#6095]) +45 other tests skip
> [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-4/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs@pipe-c-hdmi-a-2.html
>
> * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1:
> - shard-dg2: NOTRUN -> [SKIP][67] ([i915#10307] / [i915#6095]) +139 other tests skip
> [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-4/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1.html
>
> * igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-c-edp-1:
> - shard-mtlp: NOTRUN -> [SKIP][68] ([i915#6095]) +4 other tests skip
> [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_ccs@crc-primary-rotation-180-yf-tiled-ccs@pipe-c-edp-1.html
>
> * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2:
> - shard-rkl: NOTRUN -> [SKIP][69] ([i915#14098] / [i915#14544] / [i915#6095]) +8 other tests skip
> [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-2.html
>
> * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
> - shard-tglu: NOTRUN -> [SKIP][70] ([i915#12805])
> [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
>
> * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1:
> - shard-tglu-1: NOTRUN -> [SKIP][71] ([i915#6095]) +34 other tests skip
> [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-1.html
>
> * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
> - shard-rkl: [PASS][72] -> [INCOMPLETE][73] ([i915#15582])
> [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
> [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
>
> * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-2:
> - shard-rkl: NOTRUN -> [INCOMPLETE][74] ([i915#15582])
> [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-2.html
>
> * igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-b-dp-3:
> - shard-dg2: NOTRUN -> [SKIP][75] ([i915#6095]) +59 other tests skip
> [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-11/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-b-dp-3.html
>
> * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1:
> - shard-tglu: NOTRUN -> [SKIP][76] ([i915#6095]) +49 other tests skip
> [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-1.html
>
> * igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-b-hdmi-a-1:
> - shard-rkl: NOTRUN -> [SKIP][77] ([i915#6095]) +74 other tests skip
> [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_ccs@random-ccs-data-y-tiled-ccs@pipe-b-hdmi-a-1.html
>
> * igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1:
> - shard-dg2: NOTRUN -> [SKIP][78] ([i915#10307] / [i915#10434] / [i915#6095]) +3 other tests skip
> [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-4/igt@kms_ccs@random-ccs-data-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1.html
>
> * igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-1:
> - shard-glk: NOTRUN -> [SKIP][79] +299 other tests skip
> [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk1/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-a-hdmi-a-1.html
>
> * igt@kms_cdclk@plane-scaling:
> - shard-rkl: NOTRUN -> [SKIP][80] ([i915#3742])
> [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_cdclk@plane-scaling.html
>
> * igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3:
> - shard-dg2: NOTRUN -> [SKIP][81] ([i915#13783]) +3 other tests skip
> [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-7/igt@kms_cdclk@plane-scaling@pipe-c-hdmi-a-3.html
>
> * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
> - shard-rkl: NOTRUN -> [SKIP][82] ([i915#11151] / [i915#7828]) +4 other tests skip
> [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
> - shard-tglu-1: NOTRUN -> [SKIP][83] ([i915#11151] / [i915#7828]) +3 other tests skip
> [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html
>
> * igt@kms_chamelium_frames@hdmi-aspect-ratio:
> - shard-mtlp: NOTRUN -> [SKIP][84] ([i915#11151] / [i915#7828])
> [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_chamelium_frames@hdmi-aspect-ratio.html
>
> * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
> - shard-tglu: NOTRUN -> [SKIP][85] ([i915#11151] / [i915#7828]) +6 other tests skip
> [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html
>
> * igt@kms_content_protection@atomic:
> - shard-tglu: NOTRUN -> [SKIP][86] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424]) +1 other test skip
> [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_content_protection@atomic.html
>
> * igt@kms_content_protection@atomic-dpms-hdcp14:
> - shard-tglu-1: NOTRUN -> [SKIP][87] ([i915#6944])
> [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_content_protection@atomic-dpms-hdcp14.html
>
> * igt@kms_content_protection@atomic-hdcp14:
> - shard-tglu: NOTRUN -> [SKIP][88] ([i915#6944])
> [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@kms_content_protection@atomic-hdcp14.html
>
> * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
> - shard-rkl: NOTRUN -> [SKIP][89] ([i915#15330])
> [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html
>
> * igt@kms_content_protection@legacy:
> - shard-rkl: NOTRUN -> [SKIP][90] ([i915#6944] / [i915#7118] / [i915#9424])
> [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_content_protection@legacy.html
> - shard-tglu-1: NOTRUN -> [SKIP][91] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
> [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_content_protection@legacy.html
>
> * igt@kms_content_protection@legacy-hdcp14@pipe-a-dp-3:
> - shard-dg2: NOTRUN -> [FAIL][92] ([i915#7173])
> [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-11/igt@kms_content_protection@legacy-hdcp14@pipe-a-dp-3.html
>
> * igt@kms_cursor_crc@cursor-offscreen-32x32:
> - shard-rkl: NOTRUN -> [SKIP][93] ([i915#3555])
> [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_cursor_crc@cursor-offscreen-32x32.html
>
> * igt@kms_cursor_crc@cursor-onscreen-256x85:
> - shard-rkl: [PASS][94] -> [FAIL][95] ([i915#13566])
> [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_cursor_crc@cursor-onscreen-256x85.html
> [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-256x85.html
>
> * igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-a-hdmi-a-2:
> - shard-rkl: NOTRUN -> [FAIL][96] ([i915#13566]) +2 other tests fail
> [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-a-hdmi-a-2.html
>
> * igt@kms_cursor_crc@cursor-random-512x170:
> - shard-rkl: NOTRUN -> [SKIP][97] ([i915#13049])
> [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_cursor_crc@cursor-random-512x170.html
> - shard-tglu-1: NOTRUN -> [SKIP][98] ([i915#13049]) +1 other test skip
> [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_cursor_crc@cursor-random-512x170.html
>
> * igt@kms_cursor_crc@cursor-sliding-512x512:
> - shard-tglu: NOTRUN -> [SKIP][99] ([i915#13049])
> [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_cursor_crc@cursor-sliding-512x512.html
>
> * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
> - shard-mtlp: NOTRUN -> [SKIP][100] ([i915#9809])
> [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
>
> * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
> - shard-rkl: NOTRUN -> [SKIP][101] +11 other tests skip
> [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
>
> * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
> - shard-rkl: NOTRUN -> [SKIP][102] ([i915#9067])
> [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
> - shard-tglu-1: NOTRUN -> [SKIP][103] ([i915#9067])
> [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html
>
> * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
> - shard-tglu: NOTRUN -> [SKIP][104] ([i915#4103]) +1 other test skip
> [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
>
> * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
> - shard-dg2: [PASS][105] -> [SKIP][106] ([i915#3555])
> [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-11/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
> [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-7/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
> - shard-rkl: NOTRUN -> [SKIP][107] ([i915#3555] / [i915#3804])
> [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
>
> * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
> - shard-rkl: NOTRUN -> [SKIP][108] ([i915#3804])
> [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
>
> * igt@kms_dp_link_training@uhbr-sst:
> - shard-mtlp: NOTRUN -> [SKIP][109] ([i915#13749])
> [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_dp_link_training@uhbr-sst.html
>
> * igt@kms_dsc@dsc-with-bpc-formats:
> - shard-tglu: NOTRUN -> [SKIP][110] ([i915#3555] / [i915#3840])
> [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_dsc@dsc-with-bpc-formats.html
>
> * igt@kms_dsc@dsc-with-output-formats-with-bpc:
> - shard-tglu-1: NOTRUN -> [SKIP][111] ([i915#3840] / [i915#9053])
> [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_dsc@dsc-with-output-formats-with-bpc.html
>
> * igt@kms_fbcon_fbt@psr-suspend:
> - shard-tglu: NOTRUN -> [SKIP][112] ([i915#3469])
> [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_fbcon_fbt@psr-suspend.html
>
> * igt@kms_feature_discovery@chamelium:
> - shard-tglu: NOTRUN -> [SKIP][113] ([i915#2065] / [i915#4854])
> [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@kms_feature_discovery@chamelium.html
>
> * igt@kms_feature_discovery@display-2x:
> - shard-tglu-1: NOTRUN -> [SKIP][114] ([i915#1839])
> [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_feature_discovery@display-2x.html
>
> * igt@kms_feature_discovery@display-3x:
> - shard-rkl: NOTRUN -> [SKIP][115] ([i915#1839]) +1 other test skip
> [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_feature_discovery@display-3x.html
>
> * igt@kms_feature_discovery@dp-mst:
> - shard-rkl: NOTRUN -> [SKIP][116] ([i915#9337])
> [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_feature_discovery@dp-mst.html
>
> * igt@kms_flip@2x-flip-vs-dpms:
> - shard-tglu-1: NOTRUN -> [SKIP][117] ([i915#3637] / [i915#9934]) +4 other tests skip
> [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_flip@2x-flip-vs-dpms.html
>
> * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
> - shard-tglu: NOTRUN -> [SKIP][118] ([i915#9934])
> [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
>
> * igt@kms_flip@2x-flip-vs-modeset:
> - shard-rkl: NOTRUN -> [SKIP][119] ([i915#9934]) +3 other tests skip
> [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_flip@2x-flip-vs-modeset.html
>
> * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
> - shard-tglu: NOTRUN -> [SKIP][120] ([i915#3637] / [i915#9934]) +4 other tests skip
> [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
> - shard-rkl: NOTRUN -> [SKIP][121] ([i915#15643]) +3 other tests skip
> [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
>
> * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling:
> - shard-tglu-1: NOTRUN -> [SKIP][122] ([i915#15643]) +3 other tests skip
> [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling.html
>
> * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
> - shard-tglu: NOTRUN -> [SKIP][123] ([i915#15643]) +1 other test skip
> [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt:
> - shard-mtlp: NOTRUN -> [SKIP][124] ([i915#8708])
> [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
> - shard-rkl: NOTRUN -> [SKIP][125] ([i915#1825]) +26 other tests skip
> [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
> - shard-mtlp: NOTRUN -> [SKIP][126] ([i915#1825]) +1 other test skip
> [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move:
> - shard-tglu: NOTRUN -> [SKIP][127] +39 other tests skip
> [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html
>
> * igt@kms_frontbuffer_tracking@fbc-suspend:
> - shard-glk: NOTRUN -> [INCOMPLETE][128] ([i915#10056])
> [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk6/igt@kms_frontbuffer_tracking@fbc-suspend.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-blt:
> - shard-rkl: NOTRUN -> [SKIP][129] ([i915#15102]) +2 other tests skip
> [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-blt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt:
> - shard-glk10: NOTRUN -> [SKIP][130] +202 other tests skip
> [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk10/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-blt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-msflip-blt:
> - shard-snb: NOTRUN -> [SKIP][131] +2 other tests skip
> [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-snb5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-msflip-blt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu:
> - shard-rkl: NOTRUN -> [SKIP][132] ([i915#15102] / [i915#3023]) +12 other tests skip
> [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
> - shard-rkl: NOTRUN -> [SKIP][133] ([i915#5439])
> [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
>
> * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt:
> - shard-tglu-1: NOTRUN -> [SKIP][134] ([i915#15102]) +13 other tests skip
> [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
> - shard-tglu: NOTRUN -> [SKIP][135] ([i915#15102]) +17 other tests skip
> [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html
>
> * igt@kms_hdr@bpc-switch-suspend:
> - shard-dg2: [PASS][136] -> [SKIP][137] ([i915#3555] / [i915#8228])
> [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-11/igt@kms_hdr@bpc-switch-suspend.html
> [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-6/igt@kms_hdr@bpc-switch-suspend.html
>
> * igt@kms_hdr@invalid-hdr:
> - shard-rkl: NOTRUN -> [SKIP][138] ([i915#3555] / [i915#8228])
> [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_hdr@invalid-hdr.html
>
> * igt@kms_hdr@invalid-metadata-sizes:
> - shard-rkl: [PASS][139] -> [SKIP][140] ([i915#3555] / [i915#8228])
> [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_hdr@invalid-metadata-sizes.html
> [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_hdr@invalid-metadata-sizes.html
>
> * igt@kms_hdr@static-swap:
> - shard-tglu: NOTRUN -> [SKIP][141] ([i915#3555] / [i915#8228])
> [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_hdr@static-swap.html
>
> * igt@kms_joiner@invalid-modeset-big-joiner:
> - shard-tglu: NOTRUN -> [SKIP][142] ([i915#15460])
> [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_joiner@invalid-modeset-big-joiner.html
>
> * igt@kms_joiner@invalid-modeset-force-big-joiner:
> - shard-dg2: [PASS][143] -> [SKIP][144] ([i915#15459])
> [143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-11/igt@kms_joiner@invalid-modeset-force-big-joiner.html
> [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-7/igt@kms_joiner@invalid-modeset-force-big-joiner.html
>
> * igt@kms_joiner@invalid-modeset-ultra-joiner:
> - shard-rkl: NOTRUN -> [SKIP][145] ([i915#15458])
> [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_joiner@invalid-modeset-ultra-joiner.html
>
> * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-b-plane-5:
> - shard-tglu-1: NOTRUN -> [SKIP][146] ([i915#15608]) +20 other tests skip
> [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier@pipe-b-plane-5.html
>
> * igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping:
> - shard-rkl: NOTRUN -> [SKIP][147] ([i915#15608] / [i915#15609] / [i915#8825])
> [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html
>
> * igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-b-plane-5:
> - shard-rkl: NOTRUN -> [SKIP][148] ([i915#15609] / [i915#8825])
> [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-b-plane-5.html
>
> * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
> - shard-rkl: NOTRUN -> [SKIP][149] ([i915#15608] / [i915#8825]) +3 other tests skip
> [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html
> - shard-tglu-1: NOTRUN -> [SKIP][150] ([i915#15608] / [i915#8825]) +5 other tests skip
> [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html
>
> * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier@pipe-a-plane-3:
> - shard-rkl: NOTRUN -> [SKIP][151] ([i915#15608]) +13 other tests skip
> [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier@pipe-a-plane-3.html
>
> * igt@kms_plane@pixel-format-x-tiled-modifier-source-clamping@pipe-b-plane-7:
> - shard-tglu: NOTRUN -> [SKIP][152] ([i915#15609]) +5 other tests skip
> [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_plane@pixel-format-x-tiled-modifier-source-clamping@pipe-b-plane-7.html
>
> * igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping@pipe-a-plane-7:
> - shard-tglu-1: NOTRUN -> [SKIP][153] ([i915#15609]) +1 other test skip
> [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping@pipe-a-plane-7.html
>
> * igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping@pipe-b-plane-5:
> - shard-rkl: NOTRUN -> [SKIP][154] ([i915#15609]) +2 other tests skip
> [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_plane@pixel-format-y-tiled-modifier-source-clamping@pipe-b-plane-5.html
>
> * igt@kms_plane_multiple@2x-tiling-none:
> - shard-tglu: NOTRUN -> [SKIP][155] ([i915#13958])
> [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_plane_multiple@2x-tiling-none.html
>
> * igt@kms_plane_multiple@2x-tiling-y:
> - shard-rkl: NOTRUN -> [SKIP][156] ([i915#13958])
> [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_plane_multiple@2x-tiling-y.html
>
> * igt@kms_plane_multiple@tiling-4:
> - shard-tglu: NOTRUN -> [SKIP][157] ([i915#14259])
> [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@kms_plane_multiple@tiling-4.html
>
> * igt@kms_plane_multiple@tiling-yf:
> - shard-mtlp: NOTRUN -> [SKIP][158] ([i915#14259])
> [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_plane_multiple@tiling-yf.html
>
> * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c:
> - shard-tglu: NOTRUN -> [SKIP][159] ([i915#15329]) +4 other tests skip
> [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-c.html
>
> * igt@kms_pm_backlight@brightness-with-dpms:
> - shard-tglu: NOTRUN -> [SKIP][160] ([i915#12343])
> [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_pm_backlight@brightness-with-dpms.html
>
> * igt@kms_pm_backlight@fade-with-suspend:
> - shard-tglu: NOTRUN -> [SKIP][161] ([i915#9812])
> [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_pm_backlight@fade-with-suspend.html
>
> * igt@kms_pm_lpsp@kms-lpsp:
> - shard-tglu-1: NOTRUN -> [SKIP][162] ([i915#3828])
> [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_pm_lpsp@kms-lpsp.html
>
> * igt@kms_pm_rpm@dpms-lpsp:
> - shard-rkl: [PASS][163] -> [SKIP][164] ([i915#15073])
> [163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-5/igt@kms_pm_rpm@dpms-lpsp.html
> [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-7/igt@kms_pm_rpm@dpms-lpsp.html
> - shard-dg1: [PASS][165] -> [SKIP][166] ([i915#15073]) +1 other test skip
> [165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-14/igt@kms_pm_rpm@dpms-lpsp.html
> [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-13/igt@kms_pm_rpm@dpms-lpsp.html
>
> * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
> - shard-rkl: [PASS][167] -> [SKIP][168] ([i915#14544] / [i915#15073])
> [167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
> [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
>
> * igt@kms_pm_rpm@dpms-non-lpsp:
> - shard-rkl: NOTRUN -> [SKIP][169] ([i915#15073])
> [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_pm_rpm@dpms-non-lpsp.html
>
> * igt@kms_pm_rpm@modeset-non-lpsp:
> - shard-dg2: [PASS][170] -> [SKIP][171] ([i915#15073]) +2 other tests skip
> [170]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-8/igt@kms_pm_rpm@modeset-non-lpsp.html
> [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp.html
>
> * igt@kms_prime@d3hot:
> - shard-rkl: NOTRUN -> [SKIP][172] ([i915#6524])
> [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_prime@d3hot.html
> - shard-tglu-1: NOTRUN -> [SKIP][173] ([i915#6524])
> [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_prime@d3hot.html
>
> * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
> - shard-glk: NOTRUN -> [SKIP][174] ([i915#11520]) +5 other tests skip
> [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk1/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
>
> * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
> - shard-tglu: NOTRUN -> [SKIP][175] ([i915#11520]) +5 other tests skip
> [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
>
> * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
> - shard-rkl: NOTRUN -> [SKIP][176] ([i915#11520]) +5 other tests skip
> [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
>
> * igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area:
> - shard-mtlp: NOTRUN -> [SKIP][177] ([i915#12316])
> [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area.html
>
> * igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
> - shard-tglu-1: NOTRUN -> [SKIP][178] ([i915#11520]) +4 other tests skip
> [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
>
> * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
> - shard-glk10: NOTRUN -> [SKIP][179] ([i915#11520]) +4 other tests skip
> [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk10/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html
>
> * igt@kms_psr@fbc-psr-cursor-plane-move:
> - shard-tglu-1: NOTRUN -> [SKIP][180] ([i915#9732]) +8 other tests skip
> [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@kms_psr@fbc-psr-cursor-plane-move.html
>
> * igt@kms_psr@pr-dpms:
> - shard-tglu: NOTRUN -> [SKIP][181] ([i915#9732]) +16 other tests skip
> [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_psr@pr-dpms.html
>
> * igt@kms_psr@psr-sprite-plane-move:
> - shard-rkl: NOTRUN -> [SKIP][182] ([i915#1072] / [i915#9732]) +14 other tests skip
> [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@kms_psr@psr-sprite-plane-move.html
>
> * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
> - shard-tglu: NOTRUN -> [SKIP][183] ([i915#5289]) +1 other test skip
> [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
>
> * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
> - shard-tglu: NOTRUN -> [SKIP][184] ([i915#8623])
> [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
>
> * igt@kms_tv_load_detect@load-detect:
> - shard-mtlp: NOTRUN -> [SKIP][185] +1 other test skip
> [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_tv_load_detect@load-detect.html
>
> * igt@kms_vblank@ts-continuation-suspend@pipe-c-hdmi-a-2:
> - shard-rkl: NOTRUN -> [ABORT][186] ([i915#15132])
> [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@kms_vblank@ts-continuation-suspend@pipe-c-hdmi-a-2.html
>
> * igt@kms_vrr@flip-dpms:
> - shard-mtlp: NOTRUN -> [SKIP][187] ([i915#3555] / [i915#8808])
> [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-7/igt@kms_vrr@flip-dpms.html
>
> * igt@kms_vrr@flip-suspend:
> - shard-tglu: NOTRUN -> [SKIP][188] ([i915#3555]) +5 other tests skip
> [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-4/igt@kms_vrr@flip-suspend.html
>
> * igt@perf_pmu@module-unload:
> - shard-rkl: NOTRUN -> [FAIL][189] ([i915#14433])
> [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@perf_pmu@module-unload.html
> - shard-tglu-1: NOTRUN -> [FAIL][190] ([i915#14433])
> [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-1/igt@perf_pmu@module-unload.html
> - shard-glk10: NOTRUN -> [FAIL][191] ([i915#14433])
> [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk10/igt@perf_pmu@module-unload.html
>
>
> #### Possible fixes ####
>
> * igt@drm_read@short-buffer-nonblock:
> - shard-dg1: [DMESG-WARN][192] ([i915#4423]) -> [PASS][193] +3 other tests pass
> [192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-12/igt@drm_read@short-buffer-nonblock.html
> [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-18/igt@drm_read@short-buffer-nonblock.html
>
> * igt@gem_exec_big@single:
> - shard-mtlp: [DMESG-FAIL][194] ([i915#15478]) -> [PASS][195]
> [194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-mtlp-5/igt@gem_exec_big@single.html
> [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-6/igt@gem_exec_big@single.html
>
> * igt@i915_selftest@live@workarounds:
> - shard-dg2: [DMESG-FAIL][196] ([i915#12061]) -> [PASS][197] +1 other test pass
> [196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-11/igt@i915_selftest@live@workarounds.html
> [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-7/igt@i915_selftest@live@workarounds.html
>
> * igt@i915_suspend@forcewake:
> - shard-rkl: [INCOMPLETE][198] ([i915#4817]) -> [PASS][199]
> [198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@i915_suspend@forcewake.html
> [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@i915_suspend@forcewake.html
>
> * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1:
> - shard-mtlp: [FAIL][200] ([i915#5956]) -> [PASS][201] +1 other test pass
> [200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-mtlp-4/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1.html
> [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-1/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1.html
>
> * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
> - shard-mtlp: [FAIL][202] ([i915#5138]) -> [PASS][203]
> [202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
> [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-2/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
>
> * igt@kms_color@deep-color:
> - shard-rkl: [SKIP][204] ([i915#12655] / [i915#3555]) -> [PASS][205]
> [204]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_color@deep-color.html
> [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_color@deep-color.html
>
> * igt@kms_cursor_crc@cursor-sliding-64x21:
> - shard-rkl: [FAIL][206] ([i915#13566]) -> [PASS][207]
> [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-3/igt@kms_cursor_crc@cursor-sliding-64x21.html
> [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@kms_cursor_crc@cursor-sliding-64x21.html
>
> * igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1:
> - shard-tglu: [FAIL][208] ([i915#13566]) -> [PASS][209] +1 other test pass
> [208]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-tglu-5/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1.html
> [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-tglu-6/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1.html
>
> * igt@kms_force_connector_basic@force-edid:
> - shard-mtlp: [SKIP][210] ([i915#15672]) -> [PASS][211]
> [210]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-mtlp-1/igt@kms_force_connector_basic@force-edid.html
> [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-mtlp-4/igt@kms_force_connector_basic@force-edid.html
>
> * igt@kms_hdr@static-toggle:
> - shard-rkl: [SKIP][212] ([i915#3555] / [i915#8228]) -> [PASS][213]
> [212]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_hdr@static-toggle.html
> [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_hdr@static-toggle.html
>
> * igt@kms_hdr@static-toggle-suspend:
> - shard-dg2: [SKIP][214] ([i915#3555] / [i915#8228]) -> [PASS][215] +1 other test pass
> [214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-6/igt@kms_hdr@static-toggle-suspend.html
> [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-11/igt@kms_hdr@static-toggle-suspend.html
>
> * igt@kms_pm_rpm@modeset-lpsp:
> - shard-dg1: [SKIP][216] ([i915#15073]) -> [PASS][217] +1 other test pass
> [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-17/igt@kms_pm_rpm@modeset-lpsp.html
> [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-14/igt@kms_pm_rpm@modeset-lpsp.html
>
> * igt@kms_pm_rpm@modeset-non-lpsp:
> - shard-rkl: [SKIP][218] ([i915#15073]) -> [PASS][219] +2 other tests pass
> [218]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_pm_rpm@modeset-non-lpsp.html
> [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_pm_rpm@modeset-non-lpsp.html
>
> * igt@kms_pm_rpm@modeset-non-lpsp-stress:
> - shard-dg2: [SKIP][220] ([i915#15073]) -> [PASS][221] +1 other test pass
> [220]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
> [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-8/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
>
> * igt@kms_setmode@basic:
> - shard-dg2: [FAIL][222] ([i915#15106]) -> [PASS][223]
> [222]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-5/igt@kms_setmode@basic.html
> [223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-4/igt@kms_setmode@basic.html
>
> * igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2:
> - shard-rkl: [INCOMPLETE][224] ([i915#12276]) -> [PASS][225]
> [224]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2.html
> [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-2.html
>
> * igt@perf_pmu@rc6-suspend:
> - shard-rkl: [INCOMPLETE][226] ([i915#13520]) -> [PASS][227]
> [226]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-3/igt@perf_pmu@rc6-suspend.html
> [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-8/igt@perf_pmu@rc6-suspend.html
>
>
> #### Warnings ####
>
> * igt@api_intel_bb@blit-reloc-keep-cache:
> - shard-rkl: [SKIP][228] ([i915#8411]) -> [SKIP][229] ([i915#14544] / [i915#8411])
> [228]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@api_intel_bb@blit-reloc-keep-cache.html
> [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@api_intel_bb@blit-reloc-keep-cache.html
>
> * igt@api_intel_bb@blit-reloc-purge-cache:
> - shard-rkl: [SKIP][230] ([i915#14544] / [i915#8411]) -> [SKIP][231] ([i915#8411])
> [230]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@api_intel_bb@blit-reloc-purge-cache.html
> [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@api_intel_bb@blit-reloc-purge-cache.html
>
> * igt@device_reset@cold-reset-bound:
> - shard-rkl: [SKIP][232] ([i915#11078]) -> [SKIP][233] ([i915#11078] / [i915#14544])
> [232]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@device_reset@cold-reset-bound.html
> [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@device_reset@cold-reset-bound.html
>
> * igt@gem_bad_reloc@negative-reloc:
> - shard-rkl: [SKIP][234] ([i915#14544] / [i915#3281]) -> [SKIP][235] ([i915#3281]) +6 other tests skip
> [234]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gem_bad_reloc@negative-reloc.html
> [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@gem_bad_reloc@negative-reloc.html
>
> * igt@gem_basic@multigpu-create-close:
> - shard-rkl: [SKIP][236] ([i915#14544] / [i915#7697]) -> [SKIP][237] ([i915#7697])
> [236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gem_basic@multigpu-create-close.html
> [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@gem_basic@multigpu-create-close.html
>
> * igt@gem_ccs@block-multicopy-inplace:
> - shard-rkl: [SKIP][238] ([i915#14544] / [i915#3555] / [i915#9323]) -> [SKIP][239] ([i915#3555] / [i915#9323])
> [238]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gem_ccs@block-multicopy-inplace.html
> [239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@gem_ccs@block-multicopy-inplace.html
>
> * igt@gem_create@create-ext-cpu-access-big:
> - shard-rkl: [SKIP][240] ([i915#14544] / [i915#6335]) -> [SKIP][241] ([i915#6335])
> [240]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gem_create@create-ext-cpu-access-big.html
> [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@gem_create@create-ext-cpu-access-big.html
>
> * igt@gem_create@create-ext-set-pat:
> - shard-rkl: [SKIP][242] ([i915#8562]) -> [SKIP][243] ([i915#14544] / [i915#8562])
> [242]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@gem_create@create-ext-set-pat.html
> [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@gem_create@create-ext-set-pat.html
>
> * igt@gem_exec_balancer@parallel-balancer:
> - shard-rkl: [SKIP][244] ([i915#14544] / [i915#4525]) -> [SKIP][245] ([i915#4525])
> [244]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gem_exec_balancer@parallel-balancer.html
> [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@gem_exec_balancer@parallel-balancer.html
>
> * igt@gem_exec_capture@capture-invisible@smem0:
> - shard-rkl: [SKIP][246] ([i915#6334]) -> [SKIP][247] ([i915#14544] / [i915#6334]) +1 other test skip
> [246]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@gem_exec_capture@capture-invisible@smem0.html
> [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@gem_exec_capture@capture-invisible@smem0.html
>
> * igt@gem_exec_capture@capture-recoverable:
> - shard-rkl: [SKIP][248] ([i915#6344]) -> [SKIP][249] ([i915#14544] / [i915#6344])
> [248]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@gem_exec_capture@capture-recoverable.html
> [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@gem_exec_capture@capture-recoverable.html
>
> * igt@gem_exec_reloc@basic-wc:
> - shard-rkl: [SKIP][250] ([i915#3281]) -> [SKIP][251] ([i915#14544] / [i915#3281]) +4 other tests skip
> [250]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@gem_exec_reloc@basic-wc.html
> [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@gem_exec_reloc@basic-wc.html
>
> * igt@gem_lmem_evict@dontneed-evict-race:
> - shard-rkl: [SKIP][252] ([i915#14544] / [i915#4613] / [i915#7582]) -> [SKIP][253] ([i915#4613] / [i915#7582])
> [252]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gem_lmem_evict@dontneed-evict-race.html
> [253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@gem_lmem_evict@dontneed-evict-race.html
>
> * igt@gem_lmem_swapping@parallel-random-verify-ccs:
> - shard-rkl: [SKIP][254] ([i915#4613]) -> [SKIP][255] ([i915#14544] / [i915#4613]) +3 other tests skip
> [254]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
> [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
>
> * igt@gem_lmem_swapping@verify-random:
> - shard-rkl: [SKIP][256] ([i915#14544] / [i915#4613]) -> [SKIP][257] ([i915#4613]) +1 other test skip
> [256]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gem_lmem_swapping@verify-random.html
> [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@gem_lmem_swapping@verify-random.html
>
> * igt@gem_partial_pwrite_pread@reads-snoop:
> - shard-rkl: [SKIP][258] ([i915#14544] / [i915#3282]) -> [SKIP][259] ([i915#3282])
> [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gem_partial_pwrite_pread@reads-snoop.html
> [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@gem_partial_pwrite_pread@reads-snoop.html
>
> * igt@gem_partial_pwrite_pread@write-display:
> - shard-rkl: [SKIP][260] ([i915#3282]) -> [SKIP][261] ([i915#14544] / [i915#3282]) +2 other tests skip
> [260]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@gem_partial_pwrite_pread@write-display.html
> [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@gem_partial_pwrite_pread@write-display.html
>
> * igt@gem_userptr_blits@invalid-mmap-offset-unsync:
> - shard-rkl: [SKIP][262] ([i915#14544] / [i915#3297]) -> [SKIP][263] ([i915#3297])
> [262]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
> [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@gem_userptr_blits@invalid-mmap-offset-unsync.html
>
> * igt@gen9_exec_parse@secure-batches:
> - shard-rkl: [SKIP][264] ([i915#14544] / [i915#2527]) -> [SKIP][265] ([i915#2527])
> [264]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@gen9_exec_parse@secure-batches.html
> [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@gen9_exec_parse@secure-batches.html
>
> * igt@gen9_exec_parse@unaligned-access:
> - shard-rkl: [SKIP][266] ([i915#2527]) -> [SKIP][267] ([i915#14544] / [i915#2527])
> [266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@gen9_exec_parse@unaligned-access.html
> [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@gen9_exec_parse@unaligned-access.html
>
> * igt@i915_pm_freq_api@freq-basic-api:
> - shard-rkl: [SKIP][268] ([i915#14544] / [i915#8399]) -> [SKIP][269] ([i915#8399])
> [268]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@i915_pm_freq_api@freq-basic-api.html
> [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@i915_pm_freq_api@freq-basic-api.html
>
> * igt@i915_pm_rc6_residency@rc6-idle:
> - shard-rkl: [SKIP][270] ([i915#14498]) -> [SKIP][271] ([i915#14498] / [i915#14544])
> [270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@i915_pm_rc6_residency@rc6-idle.html
> [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@i915_pm_rc6_residency@rc6-idle.html
>
> * igt@i915_pm_sseu@full-enable:
> - shard-rkl: [SKIP][272] ([i915#4387]) -> [SKIP][273] ([i915#14544] / [i915#4387])
> [272]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@i915_pm_sseu@full-enable.html
> [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@i915_pm_sseu@full-enable.html
>
> * igt@i915_power@sanity:
> - shard-rkl: [SKIP][274] ([i915#14544] / [i915#7984]) -> [SKIP][275] ([i915#7984])
> [274]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@i915_power@sanity.html
> [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@i915_power@sanity.html
>
> * igt@i915_query@test-query-geometry-subslices:
> - shard-rkl: [SKIP][276] ([i915#5723]) -> [SKIP][277] ([i915#14544] / [i915#5723])
> [276]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@i915_query@test-query-geometry-subslices.html
> [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@i915_query@test-query-geometry-subslices.html
>
> * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
> - shard-rkl: [SKIP][278] ([i915#1769] / [i915#3555]) -> [SKIP][279] ([i915#14544] / [i915#1769] / [i915#3555])
> [278]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
> [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
>
> * igt@kms_big_fb@4-tiled-16bpp-rotate-0:
> - shard-dg1: [SKIP][280] ([i915#4423] / [i915#4538] / [i915#5286]) -> [SKIP][281] ([i915#4538] / [i915#5286])
> [280]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-12/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
> [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-18/igt@kms_big_fb@4-tiled-16bpp-rotate-0.html
>
> * igt@kms_big_fb@4-tiled-16bpp-rotate-180:
> - shard-rkl: [SKIP][282] ([i915#14544] / [i915#5286]) -> [SKIP][283] ([i915#5286]) +2 other tests skip
> [282]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html
> [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html
>
> * igt@kms_big_fb@4-tiled-16bpp-rotate-90:
> - shard-rkl: [SKIP][284] ([i915#5286]) -> [SKIP][285] ([i915#14544] / [i915#5286]) +3 other tests skip
> [284]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
> [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html
>
> * igt@kms_big_fb@linear-64bpp-rotate-90:
> - shard-rkl: [SKIP][286] ([i915#14544] / [i915#3638]) -> [SKIP][287] ([i915#3638]) +3 other tests skip
> [286]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-90.html
> [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_big_fb@linear-64bpp-rotate-90.html
>
> * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
> - shard-rkl: [SKIP][288] ([i915#14544] / [i915#3828]) -> [SKIP][289] ([i915#3828]) +1 other test skip
> [288]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html
> [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html
>
> * igt@kms_big_fb@y-tiled-64bpp-rotate-270:
> - shard-rkl: [SKIP][290] ([i915#3638]) -> [SKIP][291] ([i915#14544] / [i915#3638]) +1 other test skip
> [290]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
> [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_big_fb@y-tiled-64bpp-rotate-270.html
>
> * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
> - shard-rkl: [SKIP][292] -> [SKIP][293] ([i915#14544]) +15 other tests skip
> [292]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
> [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
>
> * igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs:
> - shard-dg1: [SKIP][294] ([i915#4423] / [i915#6095]) -> [SKIP][295] ([i915#6095]) +2 other tests skip
> [294]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-12/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html
> [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-18/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-mc-ccs.html
>
> * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
> - shard-rkl: [SKIP][296] ([i915#14098] / [i915#6095]) -> [SKIP][297] ([i915#14098] / [i915#14544] / [i915#6095]) +8 other tests skip
> [296]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
> [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
>
> * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
> - shard-rkl: [SKIP][298] ([i915#12313]) -> [SKIP][299] ([i915#12313] / [i915#14544])
> [298]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
> [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
>
> * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs:
> - shard-rkl: [SKIP][300] ([i915#14098] / [i915#14544] / [i915#6095]) -> [SKIP][301] ([i915#14098] / [i915#6095]) +14 other tests skip
> [300]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html
> [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html
>
> * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2:
> - shard-rkl: [SKIP][302] ([i915#14544] / [i915#6095]) -> [SKIP][303] ([i915#6095]) +7 other tests skip
> [302]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2.html
> [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-ccs@pipe-a-hdmi-a-2.html
>
> * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
> - shard-rkl: [SKIP][304] ([i915#12313] / [i915#14544]) -> [SKIP][305] ([i915#12313]) +1 other test skip
> [304]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
> [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
>
> * igt@kms_chamelium_frames@hdmi-crc-fast:
> - shard-rkl: [SKIP][306] ([i915#11151] / [i915#7828]) -> [SKIP][307] ([i915#11151] / [i915#14544] / [i915#7828]) +5 other tests skip
> [306]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_chamelium_frames@hdmi-crc-fast.html
> [307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_chamelium_frames@hdmi-crc-fast.html
>
> * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
> - shard-rkl: [SKIP][308] ([i915#11151] / [i915#14544] / [i915#7828]) -> [SKIP][309] ([i915#11151] / [i915#7828]) +3 other tests skip
> [308]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
> [309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
>
> * igt@kms_content_protection@atomic-dpms:
> - shard-dg2: [FAIL][310] ([i915#7173]) -> [SKIP][311] ([i915#6944] / [i915#7118] / [i915#9424])
> [310]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-11/igt@kms_content_protection@atomic-dpms.html
> [311]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-7/igt@kms_content_protection@atomic-dpms.html
> - shard-rkl: [SKIP][312] ([i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][313] ([i915#14544] / [i915#6944] / [i915#7118] / [i915#9424])
> [312]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_content_protection@atomic-dpms.html
> [313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_content_protection@atomic-dpms.html
>
> * igt@kms_content_protection@atomic-hdcp14:
> - shard-rkl: [SKIP][314] ([i915#6944]) -> [SKIP][315] ([i915#14544] / [i915#6944])
> [314]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@kms_content_protection@atomic-hdcp14.html
> [315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_content_protection@atomic-hdcp14.html
>
> * igt@kms_content_protection@dp-mst-type-0-hdcp14:
> - shard-rkl: [SKIP][316] ([i915#15330]) -> [SKIP][317] ([i915#14544] / [i915#15330])
> [316]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
> [317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
>
> * igt@kms_content_protection@legacy-hdcp14:
> - shard-dg2: [SKIP][318] ([i915#6944]) -> [FAIL][319] ([i915#7173])
> [318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-6/igt@kms_content_protection@legacy-hdcp14.html
> [319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-11/igt@kms_content_protection@legacy-hdcp14.html
> - shard-rkl: [SKIP][320] ([i915#14544] / [i915#6944]) -> [SKIP][321] ([i915#6944]) +1 other test skip
> [320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_content_protection@legacy-hdcp14.html
> [321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_content_protection@legacy-hdcp14.html
>
> * igt@kms_content_protection@mei-interface:
> - shard-dg1: [SKIP][322] ([i915#6944] / [i915#9424]) -> [SKIP][323] ([i915#9433])
> [322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-17/igt@kms_content_protection@mei-interface.html
> [323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-13/igt@kms_content_protection@mei-interface.html
>
> * igt@kms_content_protection@type1:
> - shard-dg2: [SKIP][324] ([i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][325] ([i915#6944] / [i915#7118] / [i915#7162] / [i915#9424])
> [324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-5/igt@kms_content_protection@type1.html
> [325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-11/igt@kms_content_protection@type1.html
> - shard-rkl: [SKIP][326] ([i915#14544] / [i915#6944] / [i915#7118] / [i915#9424]) -> [SKIP][327] ([i915#6944] / [i915#7118] / [i915#9424]) +1 other test skip
> [326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_content_protection@type1.html
> [327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_content_protection@type1.html
>
> * igt@kms_cursor_crc@cursor-onscreen-512x170:
> - shard-rkl: [SKIP][328] ([i915#13049] / [i915#14544]) -> [SKIP][329] ([i915#13049]) +1 other test skip
> [328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_cursor_crc@cursor-onscreen-512x170.html
> [329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_cursor_crc@cursor-onscreen-512x170.html
>
> * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
> - shard-rkl: [SKIP][330] ([i915#14544] / [i915#3555]) -> [SKIP][331] ([i915#3555]) +2 other tests skip
> [330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
> [331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html
>
> * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
> - shard-rkl: [SKIP][332] ([i915#4103]) -> [SKIP][333] ([i915#14544] / [i915#4103]) +1 other test skip
> [332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
> [333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
>
> * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
> - shard-rkl: [SKIP][334] ([i915#9723]) -> [SKIP][335] ([i915#14544] / [i915#9723])
> [334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
> [335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
>
> * igt@kms_dp_link_training@uhbr-mst:
> - shard-rkl: [SKIP][336] ([i915#13748]) -> [SKIP][337] ([i915#13748] / [i915#14544])
> [336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_dp_link_training@uhbr-mst.html
> [337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_dp_link_training@uhbr-mst.html
>
> * igt@kms_dp_linktrain_fallback@dsc-fallback:
> - shard-rkl: [SKIP][338] ([i915#13707] / [i915#14544]) -> [SKIP][339] ([i915#13707]) +1 other test skip
> [338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_dp_linktrain_fallback@dsc-fallback.html
> [339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_dp_linktrain_fallback@dsc-fallback.html
>
> * igt@kms_dsc@dsc-fractional-bpp:
> - shard-rkl: [SKIP][340] ([i915#14544] / [i915#3840]) -> [SKIP][341] ([i915#3840])
> [340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp.html
> [341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_dsc@dsc-fractional-bpp.html
>
> * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
> - shard-rkl: [SKIP][342] ([i915#3840]) -> [SKIP][343] ([i915#14544] / [i915#3840])
> [342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
> [343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
>
> * igt@kms_dsc@dsc-with-bpc-formats:
> - shard-rkl: [SKIP][344] ([i915#14544] / [i915#3555] / [i915#3840]) -> [SKIP][345] ([i915#3555] / [i915#3840])
> [344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_dsc@dsc-with-bpc-formats.html
> [345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@kms_dsc@dsc-with-bpc-formats.html
>
> * igt@kms_feature_discovery@chamelium:
> - shard-rkl: [SKIP][346] ([i915#4854]) -> [SKIP][347] ([i915#14544] / [i915#4854])
> [346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@kms_feature_discovery@chamelium.html
> [347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_feature_discovery@chamelium.html
>
> * igt@kms_feature_discovery@dp-mst:
> - shard-dg1: [SKIP][348] ([i915#4423] / [i915#9337]) -> [SKIP][349] ([i915#9337])
> [348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-12/igt@kms_feature_discovery@dp-mst.html
> [349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-18/igt@kms_feature_discovery@dp-mst.html
>
> * igt@kms_feature_discovery@psr1:
> - shard-rkl: [SKIP][350] ([i915#658]) -> [SKIP][351] ([i915#14544] / [i915#658])
> [350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_feature_discovery@psr1.html
> [351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_feature_discovery@psr1.html
>
> * igt@kms_flip@2x-blocking-wf_vblank:
> - shard-rkl: [SKIP][352] ([i915#9934]) -> [SKIP][353] ([i915#14544] / [i915#9934]) +6 other tests skip
> [352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_flip@2x-blocking-wf_vblank.html
> [353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_flip@2x-blocking-wf_vblank.html
>
> * igt@kms_flip@2x-plain-flip:
> - shard-rkl: [SKIP][354] ([i915#14544] / [i915#9934]) -> [SKIP][355] ([i915#9934]) +6 other tests skip
> [354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_flip@2x-plain-flip.html
> [355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_flip@2x-plain-flip.html
>
> * igt@kms_flip@flip-vs-suspend-interruptible:
> - shard-glk: [INCOMPLETE][356] ([i915#12745] / [i915#4839]) -> [INCOMPLETE][357] ([i915#12745] / [i915#4839] / [i915#6113])
> [356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible.html
> [357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-glk1/igt@kms_flip@flip-vs-suspend-interruptible.html
>
> * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling:
> - shard-rkl: [SKIP][358] ([i915#15643]) -> [SKIP][359] ([i915#14544] / [i915#15643]) +1 other test skip
> [358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html
> [359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling.html
>
> * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling:
> - shard-rkl: [SKIP][360] ([i915#14544] / [i915#15643]) -> [SKIP][361] ([i915#15643]) +3 other tests skip
> [360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
> [361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
> - shard-dg1: [SKIP][362] ([i915#4423]) -> [SKIP][363] +2 other tests skip
> [362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-12/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
> [363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc:
> - shard-rkl: [SKIP][364] ([i915#1825]) -> [SKIP][365] ([i915#14544] / [i915#1825]) +28 other tests skip
> [364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html
> [365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html
>
> * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt:
> - shard-rkl: [SKIP][366] ([i915#14544] / [i915#1825]) -> [SKIP][367] ([i915#1825]) +22 other tests skip
> [366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html
> [367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc:
> - shard-rkl: [SKIP][368] ([i915#15102]) -> [SKIP][369] ([i915#14544] / [i915#15102]) +2 other tests skip
> [368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
> [369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-mmap-wc.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-cpu:
> - shard-rkl: [SKIP][370] ([i915#14544] / [i915#15102]) -> [SKIP][371] ([i915#15102]) +3 other tests skip
> [370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-cpu.html
> [371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-shrfb-draw-mmap-cpu.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
> - shard-rkl: [SKIP][372] ([i915#14544] / [i915#15102] / [i915#3023]) -> [SKIP][373] ([i915#15102] / [i915#3023]) +8 other tests skip
> [372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
> [373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
> - shard-dg2: [SKIP][374] ([i915#10433] / [i915#15102] / [i915#3458]) -> [SKIP][375] ([i915#15102] / [i915#3458])
> [374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
> [375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt:
> - shard-dg1: [SKIP][376] ([i915#4423] / [i915#8708]) -> [SKIP][377] ([i915#8708]) +1 other test skip
> [376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt.html
> [377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
> - shard-rkl: [SKIP][378] ([i915#15102] / [i915#3023]) -> [SKIP][379] ([i915#14544] / [i915#15102] / [i915#3023]) +15 other tests skip
> [378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html
> [379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
> - shard-dg2: [SKIP][380] ([i915#15102] / [i915#3458]) -> [SKIP][381] ([i915#10433] / [i915#15102] / [i915#3458]) +5 other tests skip
> [380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
> [381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
>
> * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
> - shard-dg1: [SKIP][382] ([i915#15102] / [i915#3458] / [i915#4423]) -> [SKIP][383] ([i915#15102] / [i915#3458]) +1 other test skip
> [382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
> [383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-18/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
>
> * igt@kms_joiner@basic-ultra-joiner:
> - shard-rkl: [SKIP][384] ([i915#14544] / [i915#15458]) -> [SKIP][385] ([i915#15458])
> [384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_joiner@basic-ultra-joiner.html
> [385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_joiner@basic-ultra-joiner.html
>
> * igt@kms_joiner@invalid-modeset-big-joiner:
> - shard-rkl: [SKIP][386] ([i915#14544] / [i915#15460]) -> [SKIP][387] ([i915#15460])
> [386]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_joiner@invalid-modeset-big-joiner.html
> [387]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@kms_joiner@invalid-modeset-big-joiner.html
>
> * igt@kms_joiner@invalid-modeset-force-big-joiner:
> - shard-rkl: [SKIP][388] ([i915#15459]) -> [SKIP][389] ([i915#14544] / [i915#15459])
> [388]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_joiner@invalid-modeset-force-big-joiner.html
> [389]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
>
> * igt@kms_panel_fitting@legacy:
> - shard-rkl: [SKIP][390] ([i915#6301]) -> [SKIP][391] ([i915#14544] / [i915#6301])
> [390]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_panel_fitting@legacy.html
> [391]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_panel_fitting@legacy.html
>
> * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
> - shard-rkl: [SKIP][392] ([i915#14544]) -> [SKIP][393] +9 other tests skip
> [392]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html
> [393]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html
>
> * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
> - shard-rkl: [SKIP][394] ([i915#14712]) -> [SKIP][395] ([i915#14544] / [i915#14712])
> [394]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
> [395]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html
>
> * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping:
> - shard-rkl: [SKIP][396] ([i915#14544] / [i915#15608] / [i915#15609] / [i915#8825]) -> [SKIP][397] ([i915#15608] / [i915#15609] / [i915#8825]) +2 other tests skip
> [396]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping.html
> [397]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping.html
>
> * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping:
> - shard-rkl: [SKIP][398] ([i915#15608] / [i915#15609] / [i915#8825]) -> [SKIP][399] ([i915#14544] / [i915#15608] / [i915#15609] / [i915#8825])
> [398]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html
> [399]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping.html
>
> * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping@pipe-a-plane-0:
> - shard-rkl: [SKIP][400] ([i915#15608]) -> [SKIP][401] ([i915#14544] / [i915#15608]) +2 other tests skip
> [400]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping@pipe-a-plane-0.html
> [401]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping@pipe-a-plane-0.html
>
> * igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping@pipe-b-plane-5:
> - shard-rkl: [SKIP][402] ([i915#15609] / [i915#8825]) -> [SKIP][403] ([i915#14544] / [i915#15609] / [i915#8825])
> [402]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping@pipe-b-plane-5.html
> [403]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier-source-clamping@pipe-b-plane-5.html
>
> * igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping:
> - shard-dg1: [SKIP][404] ([i915#15608] / [i915#15609] / [i915#4423] / [i915#8825]) -> [SKIP][405] ([i915#15608] / [i915#15609] / [i915#8825])
> [404]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-12/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html
> [405]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping.html
>
> * igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-a-plane-0:
> - shard-dg1: [SKIP][406] ([i915#15608] / [i915#4423]) -> [SKIP][407] ([i915#15608])
> [406]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-dg1-12/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-a-plane-0.html
> [407]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-dg1-18/igt@kms_plane@pixel-format-4-tiled-modifier-source-clamping@pipe-a-plane-0.html
>
> * igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5:
> - shard-rkl: [SKIP][408] ([i915#15608] / [i915#8825]) -> [SKIP][409] ([i915#14544] / [i915#15608] / [i915#8825]) +3 other tests skip
> [408]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5.html
> [409]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5.html
>
> * igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping@pipe-a-plane-0:
> - shard-rkl: [SKIP][410] ([i915#14544] / [i915#15608]) -> [SKIP][411] ([i915#15608]) +2 other tests skip
> [410]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping@pipe-a-plane-0.html
> [411]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping@pipe-a-plane-0.html
>
> * igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping@pipe-b-plane-5:
> - shard-rkl: [SKIP][412] ([i915#14544] / [i915#15609] / [i915#8825]) -> [SKIP][413] ([i915#15609] / [i915#8825]) +2 other tests skip
> [412]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping@pipe-b-plane-5.html
> [413]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping@pipe-b-plane-5.html
>
> * igt@kms_plane_lowres@tiling-yf:
> - shard-rkl: [SKIP][414] ([i915#3555]) -> [SKIP][415] ([i915#14544] / [i915#3555]) +4 other tests skip
> [414]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_plane_lowres@tiling-yf.html
> [415]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_plane_lowres@tiling-yf.html
>
> * igt@kms_plane_multiple@tiling-4:
> - shard-rkl: [SKIP][416] ([i915#14259]) -> [SKIP][417] ([i915#14259] / [i915#14544])
> [416]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@kms_plane_multiple@tiling-4.html
> [417]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_plane_multiple@tiling-4.html
>
> * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a:
> - shard-rkl: [SKIP][418] ([i915#14544] / [i915#15329]) -> [SKIP][419] ([i915#15329]) +3 other tests skip
> [418]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a.html
> [419]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-rotation@pipe-a.html
>
> * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b:
> - shard-rkl: [SKIP][420] ([i915#15329]) -> [SKIP][421] ([i915#14544] / [i915#15329]) +3 other tests skip
> [420]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b.html
> [421]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-rotation@pipe-b.html
>
> * igt@kms_pm_backlight@fade-with-dpms:
> - shard-rkl: [SKIP][422] ([i915#5354]) -> [SKIP][423] ([i915#14544] / [i915#5354]) +1 other test skip
> [422]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_pm_backlight@fade-with-dpms.html
> [423]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_pm_backlight@fade-with-dpms.html
>
> * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
> - shard-rkl: [SKIP][424] ([i915#11520] / [i915#14544]) -> [SKIP][425] ([i915#11520]) +4 other tests skip
> [424]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
> [425]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
>
> * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
> - shard-rkl: [SKIP][426] ([i915#11520]) -> [SKIP][427] ([i915#11520] / [i915#14544]) +5 other tests skip
> [426]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
> [427]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
>
> * igt@kms_psr2_su@page_flip-xrgb8888:
> - shard-rkl: [SKIP][428] ([i915#14544] / [i915#9683]) -> [SKIP][429] ([i915#9683])
> [428]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_psr2_su@page_flip-xrgb8888.html
> [429]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_psr2_su@page_flip-xrgb8888.html
>
> * igt@kms_psr@pr-primary-mmap-cpu:
> - shard-rkl: [SKIP][430] ([i915#1072] / [i915#14544] / [i915#9732]) -> [SKIP][431] ([i915#1072] / [i915#9732]) +10 other tests skip
> [430]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_psr@pr-primary-mmap-cpu.html
> [431]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_psr@pr-primary-mmap-cpu.html
>
> * igt@kms_psr@psr-cursor-mmap-cpu:
> - shard-rkl: [SKIP][432] ([i915#1072] / [i915#9732]) -> [SKIP][433] ([i915#1072] / [i915#14544] / [i915#9732]) +15 other tests skip
> [432]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@kms_psr@psr-cursor-mmap-cpu.html
> [433]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_psr@psr-cursor-mmap-cpu.html
>
> * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
> - shard-rkl: [SKIP][434] ([i915#14544] / [i915#9685]) -> [SKIP][435] ([i915#9685])
> [434]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
> [435]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
>
> * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
> - shard-rkl: [SKIP][436] ([i915#14544] / [i915#5289]) -> [SKIP][437] ([i915#5289])
> [436]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
> [437]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
>
> * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
> - shard-rkl: [SKIP][438] ([i915#5289]) -> [SKIP][439] ([i915#14544] / [i915#5289])
> [438]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
> [439]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
>
> * igt@kms_vblank@ts-continuation-suspend:
> - shard-rkl: [INCOMPLETE][440] ([i915#12276]) -> [ABORT][441] ([i915#15132])
> [440]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_vblank@ts-continuation-suspend.html
> [441]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-1/igt@kms_vblank@ts-continuation-suspend.html
>
> * igt@kms_vrr@flip-basic:
> - shard-rkl: [SKIP][442] ([i915#14544] / [i915#15243] / [i915#3555]) -> [SKIP][443] ([i915#15243] / [i915#3555])
> [442]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_vrr@flip-basic.html
> [443]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-2/igt@kms_vrr@flip-basic.html
>
> * igt@kms_vrr@lobf:
> - shard-rkl: [SKIP][444] ([i915#11920] / [i915#14544]) -> [SKIP][445] ([i915#11920])
> [444]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@kms_vrr@lobf.html
> [445]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-5/igt@kms_vrr@lobf.html
>
> * igt@kms_vrr@seamless-rr-switch-virtual:
> - shard-rkl: [SKIP][446] ([i915#9906]) -> [SKIP][447] ([i915#14544] / [i915#9906])
> [446]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@kms_vrr@seamless-rr-switch-virtual.html
> [447]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@kms_vrr@seamless-rr-switch-virtual.html
>
> * igt@perf@unprivileged-single-ctx-counters:
> - shard-rkl: [SKIP][448] ([i915#2433]) -> [SKIP][449] ([i915#14544] / [i915#2433])
> [448]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-8/igt@perf@unprivileged-single-ctx-counters.html
> [449]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@perf@unprivileged-single-ctx-counters.html
>
> * igt@prime_vgem@coherency-gtt:
> - shard-rkl: [SKIP][450] ([i915#14544] / [i915#3708]) -> [SKIP][451] ([i915#3708])
> [450]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-6/igt@prime_vgem@coherency-gtt.html
> [451]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-3/igt@prime_vgem@coherency-gtt.html
>
> * igt@prime_vgem@fence-write-hang:
> - shard-rkl: [SKIP][452] ([i915#3708]) -> [SKIP][453] ([i915#14544] / [i915#3708])
> [452]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@prime_vgem@fence-write-hang.html
> [453]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@prime_vgem@fence-write-hang.html
>
> * igt@sriov_basic@enable-vfs-autoprobe-off:
> - shard-rkl: [SKIP][454] ([i915#9917]) -> [SKIP][455] ([i915#14544] / [i915#9917])
> [454]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_17976/shard-rkl-2/igt@sriov_basic@enable-vfs-autoprobe-off.html
> [455]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/shard-rkl-6/igt@sriov_basic@enable-vfs-autoprobe-off.html
>
>
> [i915#10056]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10056
> [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
> [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
> [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
> [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
> [i915#11078]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11078
> [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
> [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
> [i915#11713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11713
> [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
> [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
> [i915#12276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12276
> [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
> [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
> [i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
> [i915#12655]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12655
> [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
> [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
> [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
> [i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
> [i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
> [i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
> [i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
> [i915#13748]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13748
> [i915#13749]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13749
> [i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
> [i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
> [i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
> [i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
> [i915#14433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14433
> [i915#14498]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14498
> [i915#14544]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14544
> [i915#14712]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14712
> [i915#15060]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15060
> [i915#15073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15073
> [i915#15102]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15102
> [i915#15106]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15106
> [i915#15132]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15132
> [i915#15140]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15140
> [i915#15243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15243
> [i915#15329]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15329
> [i915#15330]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15330
> [i915#15458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15458
> [i915#15459]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15459
> [i915#15460]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15460
> [i915#15478]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15478
> [i915#15582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15582
> [i915#15608]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15608
> [i915#15609]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15609
> [i915#15643]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15643
> [i915#15662]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15662
> [i915#15672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15672
> [i915#15678]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15678
> [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
> [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
> [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
> [i915#2065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2065
> [i915#2433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2433
> [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
> [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
> [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
> [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
> [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
> [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
> [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
> [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
> [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
> [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
> [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
> [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
> [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
> [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
> [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
> [i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
> [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
> [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
> [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
> [i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
> [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
> [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
> [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
> [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
> [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
> [i915#4817]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4817
> [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
> [i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
> [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
> [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
> [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
> [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
> [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
> [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
> [i915#5723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5723
> [i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
> [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
> [i915#6113]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6113
> [i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
> [i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245
> [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
> [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
> [i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
> [i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
> [i915#6412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6412
> [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
> [i915#658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/658
> [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
> [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
> [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
> [i915#7162]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7162
> [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
> [i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
> [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
> [i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
> [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
> [i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
> [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
> [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
> [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
> [i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
> [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
> [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
> [i915#8808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8808
> [i915#8825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8825
> [i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
> [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
> [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
> [i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
> [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
> [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
> [i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
> [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
> [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
> [i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
> [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
> [i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
> [i915#9812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9812
> [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
> [i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
> [i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
>
>
> Build changes
> -------------
>
> * Linux: CI_DRM_17976 -> Patchwork_161497v1
>
> CI-20190529: 20190529
> CI_DRM_17976: 2938ce73d01357a5816ed7dbd041154b58635a37 @ git://anongit.freedesktop.org/gfx-ci/linux
> IGT_8749: 195f101f25a7984686f36f340aa88d44a1716ec6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> Patchwork_161497v1: 2938ce73d01357a5816ed7dbd041154b58635a37 @ git://anongit.freedesktop.org/gfx-ci/linux
> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_161497v1/index.html
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2026-02-12 16:17 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-02-11 11:58 [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp() Imre Deak
2026-02-11 11:58 ` [PATCH 2/2] drm/i915/dp: Clamp the connector max_bpc request to the valid pipe bpp range Imre Deak
2026-02-11 13:36 ` Michał Grzelak
2026-02-11 16:06 ` Nautiyal, Ankit K
2026-02-11 17:12 ` Imre Deak
2026-02-12 4:14 ` Nautiyal, Ankit K
2026-02-12 7:56 ` Imre Deak
2026-02-12 9:01 ` Nautiyal, Ankit K
2026-02-12 9:21 ` Imre Deak
2026-02-11 13:35 ` [PATCH 1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp()< Michał Grzelak
2026-02-11 23:25 ` Michał Grzelak
2026-02-11 14:14 ` ✓ CI.KUnit: success for series starting with [1/2] drm/i915/display: Clarify target pipe bpp variable name in compute_sink_pipe_bpp() Patchwork
2026-02-11 14:52 ` ✓ Xe.CI.BAT: " Patchwork
[not found] ` <177085437889.247401.14482774231614824232@a3b018990fe9>
2026-02-12 16:17 ` ✗ i915.CI.Full: failure " Imre Deak
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