[PATCH v1 0/6] Introduce Xe PCIe FLR

[PATCH v1 0/6] Introduce Xe PCIe FLR

[Raag Jadav]

Here's my humble attempt at introducing PCIe FLR support in xe driver.
This is ofcourse a half baked implementation and only limited to reloading
uC firmwares. This needs to be extended for a lot of different components
which I've skipped here for my lack of competence, so feel free to join
in and support them.

PS: This works enough to allow a single exec test run after FLR but it
follows with a GuC crash on subsequent runs which I'm still investigating.

Raag Jadav (6):
  drm/xe/uc_fw: Allow reloading firmware
  drm/xe/uc: Introduce FLR helpers
  drm/xe/irq: Introduce FLR helper
  drm/xe: Introduce xe_device_assert_lmem_ready()
  drm/xe/bo_evict: Introduce xe_bo_restore_map()
  drm/xe/pci: Introduce PCIe FLR

 drivers/gpu/drm/xe/Makefile      |   1 +
 drivers/gpu/drm/xe/xe_bo_evict.c |  34 +++++--
 drivers/gpu/drm/xe/xe_bo_evict.h |   2 +
 drivers/gpu/drm/xe/xe_device.c   |   4 +-
 drivers/gpu/drm/xe/xe_device.h   |   1 +
 drivers/gpu/drm/xe/xe_gsc.c      |  15 ++++
 drivers/gpu/drm/xe/xe_gsc.h      |   1 +
 drivers/gpu/drm/xe/xe_gt.c       |  10 +++
 drivers/gpu/drm/xe/xe_gt.h       |   2 +
 drivers/gpu/drm/xe/xe_guc.c      |  16 ++++
 drivers/gpu/drm/xe/xe_guc.h      |   1 +
 drivers/gpu/drm/xe/xe_huc.c      |  16 ++++
 drivers/gpu/drm/xe/xe_huc.h      |   1 +
 drivers/gpu/drm/xe/xe_irq.c      |   7 +-
 drivers/gpu/drm/xe/xe_irq.h      |   1 +
 drivers/gpu/drm/xe/xe_pci.c      |   1 +
 drivers/gpu/drm/xe/xe_pci.h      |   2 +
 drivers/gpu/drm/xe/xe_pci_err.c  | 147 +++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc.c       |  24 +++++
 drivers/gpu/drm/xe/xe_uc.h       |   2 +
 drivers/gpu/drm/xe/xe_uc_fw.c    |  33 +++----
 drivers/gpu/drm/xe/xe_uc_fw.h    |   1 +
 22 files changed, 295 insertions(+), 27 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c

-- 
2.43.0

[PATCH v1 1/6] drm/xe/uc_fw: Allow reloading firmware

[Raag Jadav]

In preparation of usecases which require loading firmware without
reloading the driver, introduce xe_uc_fw_copy() so that it can be
reused.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/gpu/drm/xe/xe_uc_fw.c | 33 +++++++++++++++++----------------
 drivers/gpu/drm/xe/xe_uc_fw.h |  1 +
 2 files changed, 18 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index d35bc4989144..a97cd885a052 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -320,7 +320,7 @@ size_t xe_uc_fw_copy_rsa(struct xe_uc_fw *uc_fw, void *dst, u32 max_len)
 	return size;
 }
 
-static void uc_fw_fini(struct drm_device *drm, void *arg)
+static void xe_uc_fw_fini(struct drm_device *drm, void *arg)
 {
 	struct xe_uc_fw *uc_fw = arg;
 
@@ -704,14 +704,6 @@ static int uc_fw_request(struct xe_uc_fw *uc_fw, const struct firmware **firmwar
 	const struct firmware *fw = NULL;
 	int err;
 
-	/*
-	 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status
-	 * before we're looked at the HW caps to see if we have uc support
-	 */
-	BUILD_BUG_ON(XE_UC_FIRMWARE_UNINITIALIZED);
-	xe_gt_assert(gt, !uc_fw->status);
-	xe_gt_assert(gt, !uc_fw->path);
-
 	uc_fw_auto_select(xe, uc_fw);
 
 	if (IS_SRIOV_VF(xe)) {
@@ -804,15 +796,13 @@ static int uc_fw_copy(struct xe_uc_fw *uc_fw, const void *data, size_t size, u32
 		goto fail;
 	}
 
+	if (uc_fw->bo)
+		xe_managed_bo_unpin_map_no_vm(uc_fw->bo);
+
 	uc_fw->bo = obj;
 	uc_fw->size = size;
 
 	xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_AVAILABLE);
-
-	err = drmm_add_action_or_reset(&xe->drm, uc_fw_fini, uc_fw);
-	if (err)
-		goto fail;
-
 	return 0;
 
 fail:
@@ -823,7 +813,7 @@ static int uc_fw_copy(struct xe_uc_fw *uc_fw, const void *data, size_t size, u32
 	return err;
 }
 
-int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
+int xe_uc_fw_copy(struct xe_uc_fw *uc_fw)
 {
 	const struct firmware *fw = NULL;
 	int err;
@@ -841,9 +831,20 @@ int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
 			 XE_BO_FLAG_GGTT_INVALIDATE);
 
 	uc_fw_release(fw);
-
 	return err;
 }
+
+int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
+{
+	struct xe_device *xe = uc_fw_to_xe(uc_fw);
+	int err;
+
+	err = xe_uc_fw_copy(uc_fw);
+	if (err)
+		return err;
+
+	return drmm_add_action_or_reset(&xe->drm, xe_uc_fw_fini, uc_fw);
+}
 ALLOW_ERROR_INJECTION(xe_uc_fw_init, ERRNO); /* See xe_pci_probe() */
 
 static u32 uc_fw_ggtt_offset(struct xe_uc_fw *uc_fw)
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.h b/drivers/gpu/drm/xe/xe_uc_fw.h
index 6195e353f269..cbe8ea397efc 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw.h
@@ -15,6 +15,7 @@
 struct drm_printer;
 
 int xe_uc_fw_init(struct xe_uc_fw *uc_fw);
+int xe_uc_fw_copy(struct xe_uc_fw *uc_fw);
 size_t xe_uc_fw_copy_rsa(struct xe_uc_fw *uc_fw, void *dst, u32 max_len);
 int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags);
 int xe_uc_fw_check_version_requirements(struct xe_uc_fw *uc_fw);
-- 
2.43.0

[PATCH v1 2/6] drm/xe/uc: Introduce FLR helpers

[Raag Jadav]

In preparation of usecases which require preparing/re-initializing uCs
before/after FLR, introduce flr_prepare/done() helpers for respective uCs.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/gpu/drm/xe/xe_gsc.c | 15 +++++++++++++++
 drivers/gpu/drm/xe/xe_gsc.h |  1 +
 drivers/gpu/drm/xe/xe_gt.c  | 10 ++++++++++
 drivers/gpu/drm/xe/xe_gt.h  |  2 ++
 drivers/gpu/drm/xe/xe_guc.c | 16 ++++++++++++++++
 drivers/gpu/drm/xe/xe_guc.h |  1 +
 drivers/gpu/drm/xe/xe_huc.c | 16 ++++++++++++++++
 drivers/gpu/drm/xe/xe_huc.h |  1 +
 drivers/gpu/drm/xe/xe_uc.c  | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc.h  |  2 ++
 10 files changed, 88 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
index e5c234f3d795..66741d7d27db 100644
--- a/drivers/gpu/drm/xe/xe_gsc.c
+++ b/drivers/gpu/drm/xe/xe_gsc.c
@@ -552,6 +552,21 @@ void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc)
 		flush_work(&gsc->work);
 }
 
+int xe_gsc_flr_done(struct xe_gsc *gsc)
+{
+	int ret;
+
+	if (!xe_uc_fw_is_loadable(&gsc->fw))
+		return 0;
+
+	ret = xe_uc_fw_copy(&gsc->fw);
+	if (ret)
+		return ret;
+
+	xe_uc_fw_change_status(&gsc->fw, XE_UC_FIRMWARE_LOADABLE);
+	return 0;
+}
+
 void xe_gsc_stop_prepare(struct xe_gsc *gsc)
 {
 	struct xe_gt *gt = gsc_to_gt(gsc);
diff --git a/drivers/gpu/drm/xe/xe_gsc.h b/drivers/gpu/drm/xe/xe_gsc.h
index b8b8e0810ad9..8b7fd98f0be6 100644
--- a/drivers/gpu/drm/xe/xe_gsc.h
+++ b/drivers/gpu/drm/xe/xe_gsc.h
@@ -13,6 +13,7 @@ struct xe_gsc;
 struct xe_gt;
 struct xe_hw_engine;
 
+int xe_gsc_flr_done(struct xe_gsc *gsc);
 int xe_gsc_init(struct xe_gsc *gsc);
 int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);
 void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index b455af1e6072..105a7f598d4c 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -947,6 +947,16 @@ void xe_gt_reset_async(struct xe_gt *gt)
 		xe_pm_runtime_put(gt_to_xe(gt));
 }
 
+void xe_gt_flr_prepare(struct xe_gt *gt)
+{
+	xe_uc_flr_prepare(&gt->uc);
+}
+
+int xe_gt_flr_done(struct xe_gt *gt)
+{
+	return xe_uc_flr_done(&gt->uc);
+}
+
 void xe_gt_suspend_prepare(struct xe_gt *gt)
 {
 	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index de7e47763411..5e6e4eb09efe 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -63,6 +63,8 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt);
  */
 void xe_gt_record_user_engines(struct xe_gt *gt);
 
+int xe_gt_flr_done(struct xe_gt *gt);
+void xe_gt_flr_prepare(struct xe_gt *gt);
 void xe_gt_suspend_prepare(struct xe_gt *gt);
 int xe_gt_suspend(struct xe_gt *gt);
 void xe_gt_shutdown(struct xe_gt *gt);
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index cbbb4d665b8f..4fb13c2ac39e 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1659,6 +1659,22 @@ void xe_guc_sanitize(struct xe_guc *guc)
 	xe_guc_submit_disable(guc);
 }
 
+int xe_guc_flr_done(struct xe_guc *guc)
+{
+	struct xe_tile *tile = gt_to_tile(guc_to_gt(guc));
+	int ret;
+
+	if (!xe_uc_fw_is_loadable(&guc->fw))
+		return 0;
+
+	ret = xe_uc_fw_copy(&guc->fw);
+	if (ret)
+		return ret;
+
+	xe_uc_fw_change_status(&guc->fw, XE_UC_FIRMWARE_LOADABLE);
+	return xe_managed_bo_reinit_in_vram(tile_to_xe(tile), tile, &guc->fw.bo);
+}
+
 int xe_guc_reset_prepare(struct xe_guc *guc)
 {
 	return xe_guc_submit_reset_prepare(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 66e7edc70ed9..ee7e8fd99b86 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -32,6 +32,7 @@
 struct drm_printer;
 
 void xe_guc_comm_init_early(struct xe_guc *guc);
+int xe_guc_flr_done(struct xe_guc *guc);
 int xe_guc_init_noalloc(struct xe_guc *guc);
 int xe_guc_init(struct xe_guc *guc);
 int xe_guc_init_post_hwconfig(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
index 57afe21444b1..0e76123363ee 100644
--- a/drivers/gpu/drm/xe/xe_huc.c
+++ b/drivers/gpu/drm/xe/xe_huc.c
@@ -296,6 +296,22 @@ void xe_huc_sanitize(struct xe_huc *huc)
 	xe_uc_fw_sanitize(&huc->fw);
 }
 
+int xe_huc_flr_done(struct xe_huc *huc)
+{
+	struct xe_tile *tile = gt_to_tile(huc_to_gt(huc));
+	int ret;
+
+	if (!xe_uc_fw_is_loadable(&huc->fw))
+		return 0;
+
+	ret = xe_uc_fw_copy(&huc->fw);
+	if (ret)
+		return ret;
+
+	xe_uc_fw_change_status(&huc->fw, XE_UC_FIRMWARE_LOADABLE);
+	return xe_managed_bo_reinit_in_vram(tile_to_xe(tile), tile, &huc->fw.bo);
+}
+
 void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
 {
 	struct xe_gt *gt = huc_to_gt(huc);
diff --git a/drivers/gpu/drm/xe/xe_huc.h b/drivers/gpu/drm/xe/xe_huc.h
index fa1c45e70443..7600ea196908 100644
--- a/drivers/gpu/drm/xe/xe_huc.h
+++ b/drivers/gpu/drm/xe/xe_huc.h
@@ -17,6 +17,7 @@ enum xe_huc_auth_types {
 	XE_HUC_AUTH_TYPES_COUNT
 };
 
+int xe_huc_flr_done(struct xe_huc *huc);
 int xe_huc_init(struct xe_huc *huc);
 int xe_huc_init_post_hwconfig(struct xe_huc *huc);
 int xe_huc_upload(struct xe_huc *huc);
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index d9aa845a308d..ed492da26ae8 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -17,6 +17,7 @@
 #include "xe_guc_engine_activity.h"
 #include "xe_huc.h"
 #include "xe_sriov.h"
+#include "xe_uc_fw.h"
 #include "xe_wopcm.h"
 
 static struct xe_gt *
@@ -283,6 +284,29 @@ static void uc_reset_wait(struct xe_uc *uc)
 		goto again;
 }
 
+void xe_uc_flr_prepare(struct xe_uc *uc)
+{
+	xe_gsc_wait_for_worker_completion(&uc->gsc);
+	xe_uc_reset_prepare(uc);
+	xe_uc_stop(uc);
+	xe_uc_sanitize(uc);
+}
+
+int xe_uc_flr_done(struct xe_uc *uc)
+{
+	int ret;
+
+	ret = xe_guc_flr_done(&uc->guc);
+	if (ret)
+		return ret;
+
+	ret = xe_huc_flr_done(&uc->huc);
+	if (ret)
+		return ret;
+
+	return xe_gsc_flr_done(&uc->gsc);
+}
+
 void xe_uc_suspend_prepare(struct xe_uc *uc)
 {
 	xe_gsc_wait_for_worker_completion(&uc->gsc);
diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
index 255a54a8f876..1756821edea1 100644
--- a/drivers/gpu/drm/xe/xe_uc.h
+++ b/drivers/gpu/drm/xe/xe_uc.h
@@ -8,6 +8,8 @@
 
 struct xe_uc;
 
+int xe_uc_flr_done(struct xe_uc *uc);
+void xe_uc_flr_prepare(struct xe_uc *uc);
 int xe_uc_init_noalloc(struct xe_uc *uc);
 int xe_uc_init(struct xe_uc *uc);
 int xe_uc_init_post_hwconfig(struct xe_uc *uc);
-- 
2.43.0

[PATCH v1 3/6] drm/xe/irq: Introduce FLR helper

[Raag Jadav]

In preparation of usecases which require disabling interrupts before FLR,
introduce xe_irq_flr_prepare() helper.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/gpu/drm/xe/xe_irq.c | 7 ++++++-
 drivers/gpu/drm/xe/xe_irq.h | 1 +
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 9e49e2241da4..a4c2f8d7a552 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -843,7 +843,7 @@ static void xe_irq_msi_synchronize_irq(struct xe_device *xe)
 	synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
 }
 
-void xe_irq_suspend(struct xe_device *xe)
+void xe_irq_flr_prepare(struct xe_device *xe)
 {
 	atomic_set(&xe->irq.enabled, 0); /* no new irqs */
 
@@ -852,6 +852,11 @@ void xe_irq_suspend(struct xe_device *xe)
 		xe_irq_msix_synchronize_irq(xe);
 	else
 		xe_irq_msi_synchronize_irq(xe);
+}
+
+void xe_irq_suspend(struct xe_device *xe)
+{
+	xe_irq_flr_prepare(xe);
 	xe_irq_reset(xe); /* turn irqs off */
 }
 
diff --git a/drivers/gpu/drm/xe/xe_irq.h b/drivers/gpu/drm/xe/xe_irq.h
index a28bd577ba52..cd9f743c2e9c 100644
--- a/drivers/gpu/drm/xe/xe_irq.h
+++ b/drivers/gpu/drm/xe/xe_irq.h
@@ -14,6 +14,7 @@ struct xe_device;
 struct xe_tile;
 struct xe_gt;
 
+void xe_irq_flr_prepare(struct xe_device *xe);
 int xe_irq_init(struct xe_device *xe);
 int xe_irq_install(struct xe_device *xe);
 void xe_irq_suspend(struct xe_device *xe);
-- 
2.43.0

[PATCH v1 4/6] drm/xe: Introduce xe_device_assert_lmem_ready()

[Raag Jadav]

In preparation of usecases which require checking for VRAM readiness after
FLR, introduce xe_device_assert_lmem_ready() helper.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/gpu/drm/xe/xe_device.c | 4 ++--
 drivers/gpu/drm/xe/xe_device.h | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index eee183732950..94a26eff0024 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -650,7 +650,7 @@ static int xe_set_dma_info(struct xe_device *xe)
 	return err;
 }
 
-static void assert_lmem_ready(struct xe_device *xe)
+void xe_device_assert_lmem_ready(struct xe_device *xe)
 {
 	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
 		return;
@@ -738,7 +738,7 @@ int xe_device_probe_early(struct xe_device *xe)
 	 * is flagged after full initialization is complete. Assert if lmem is
 	 * not initialized.
 	 */
-	assert_lmem_ready(xe);
+	xe_device_assert_lmem_ready(xe);
 
 	xe->wedged.mode = xe_device_validate_wedged_mode(xe, xe_modparam.wedged_mode) ?
 			  XE_DEFAULT_WEDGED_MODE : xe_modparam.wedged_mode;
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 39464650533b..44db00d0ad55 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -140,6 +140,7 @@ static inline struct xe_force_wake *gt_to_fw(struct xe_gt *gt)
 	return &gt->pm.fw;
 }
 
+void xe_device_assert_lmem_ready(struct xe_device *xe);
 void xe_device_assert_mem_access(struct xe_device *xe);
 
 static inline bool xe_device_has_flat_ccs(struct xe_device *xe)
-- 
2.43.0

[PATCH v1 5/6] drm/xe/bo_evict: Introduce xe_bo_restore_map()

[Raag Jadav]

In preparation of usecases which require remapping kernel bos after FLR,
introduce xe_bo_restore_map() helper.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/gpu/drm/xe/xe_bo_evict.c | 34 ++++++++++++++++++++++++--------
 drivers/gpu/drm/xe/xe_bo_evict.h |  2 ++
 2 files changed, 28 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
index 7661fca7f278..0624c3039cd7 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.c
+++ b/drivers/gpu/drm/xe/xe_bo_evict.c
@@ -189,14 +189,8 @@ int xe_bo_evict_all(struct xe_device *xe)
 				     xe_bo_evict_pinned);
 }
 
-static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+static int xe_bo_map_ggtt(struct xe_bo *bo)
 {
-	int ret;
-
-	ret = xe_bo_restore_pinned(bo);
-	if (ret)
-		return ret;
-
 	if (bo->flags & XE_BO_FLAG_GGTT) {
 		struct xe_tile *tile;
 		u8 id;
@@ -212,6 +206,30 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
 	return 0;
 }
 
+int xe_bo_restore_map(struct xe_device *xe)
+{
+	int ret;
+
+	ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
+				    &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
+	if (!ret)
+		ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
+					    &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
+
+	return ret;
+}
+
+static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+{
+	int ret;
+
+	ret = xe_bo_restore_pinned(bo);
+	if (ret)
+		return ret;
+
+	return xe_bo_map_ggtt(bo);
+}
+
 /**
  * xe_bo_restore_early - restore early phase kernel BOs to VRAM
  *
@@ -270,7 +288,7 @@ int xe_bo_restore_late(struct xe_device *xe)
 	return ret;
 }
 
-static void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
 {
 	struct xe_tile *tile;
 	unsigned int id;
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
index e8385cb7f5e9..d4f5b87243e7 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.h
+++ b/drivers/gpu/drm/xe/xe_bo_evict.h
@@ -14,7 +14,9 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
 void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
 int xe_bo_restore_early(struct xe_device *xe);
 int xe_bo_restore_late(struct xe_device *xe);
+int xe_bo_restore_map(struct xe_device *xe);
 
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe);
 void xe_bo_pci_dev_remove_all(struct xe_device *xe);
 
 int xe_bo_pinned_init(struct xe_device *xe);
-- 
2.43.0

Re: [PATCH v1 5/6] drm/xe/bo_evict: Introduce xe_bo_restore_map()

[Matthew Brost]

On Tue, Feb 24, 2026 at 03:55:18PM +0530, Raag Jadav wrote:
> In preparation of usecases which require remapping kernel bos after FLR,
> introduce xe_bo_restore_map() helper.
> 



> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_bo_evict.c | 34 ++++++++++++++++++++++++--------
>  drivers/gpu/drm/xe/xe_bo_evict.h |  2 ++
>  2 files changed, 28 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
> index 7661fca7f278..0624c3039cd7 100644
> --- a/drivers/gpu/drm/xe/xe_bo_evict.c
> +++ b/drivers/gpu/drm/xe/xe_bo_evict.c
> @@ -189,14 +189,8 @@ int xe_bo_evict_all(struct xe_device *xe)
>  				     xe_bo_evict_pinned);
>  }
>  
> -static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
> +static int xe_bo_map_ggtt(struct xe_bo *bo)
>  {
> -	int ret;
> -
> -	ret = xe_bo_restore_pinned(bo);
> -	if (ret)
> -		return ret;
> -
>  	if (bo->flags & XE_BO_FLAG_GGTT) {
>  		struct xe_tile *tile;
>  		u8 id;
> @@ -212,6 +206,30 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
>  	return 0;
>  }
>  
> +int xe_bo_restore_map(struct xe_device *xe)

Kernel doc. Maybe also explain why this function is needed during PCIe
FLR in both the commit message and the kernel doc. I assume it’s
something along the lines of: “During PCIe FLR we repopulate the GGTTs
for any kernel BOs required for driver restart that lost GGTTs across FLR."

Just guessing on above but if we had kernel doc I wouldn't have to.

> +{
> +	int ret;
> +
> +	ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
> +				    &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
> +	if (!ret)
> +		ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
> +					    &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
> +
> +	return ret;
> +}
> +
> +static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
> +{
> +	int ret;
> +
> +	ret = xe_bo_restore_pinned(bo);
> +	if (ret)
> +		return ret;
> +
> +	return xe_bo_map_ggtt(bo);
> +}
> +
>  /**
>   * xe_bo_restore_early - restore early phase kernel BOs to VRAM
>   *
> @@ -270,7 +288,7 @@ int xe_bo_restore_late(struct xe_device *xe)
>  	return ret;
>  }
>  
> -static void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
> +void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)

Same as above for kernel doc, commit message, reasoning.

Patch looks sane enough though.

Matt

>  {
>  	struct xe_tile *tile;
>  	unsigned int id;
> diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
> index e8385cb7f5e9..d4f5b87243e7 100644
> --- a/drivers/gpu/drm/xe/xe_bo_evict.h
> +++ b/drivers/gpu/drm/xe/xe_bo_evict.h
> @@ -14,7 +14,9 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
>  void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
>  int xe_bo_restore_early(struct xe_device *xe);
>  int xe_bo_restore_late(struct xe_device *xe);
> +int xe_bo_restore_map(struct xe_device *xe);
>  
> +void xe_bo_pci_dev_remove_pinned(struct xe_device *xe);
>  void xe_bo_pci_dev_remove_all(struct xe_device *xe);
>  
>  int xe_bo_pinned_init(struct xe_device *xe);
> -- 
> 2.43.0
> 

Re: [PATCH v1 5/6] drm/xe/bo_evict: Introduce xe_bo_restore_map()

[Raag Jadav]

On Tue, Feb 24, 2026 at 02:11:38PM -0800, Matthew Brost wrote:
> On Tue, Feb 24, 2026 at 03:55:18PM +0530, Raag Jadav wrote:
> > In preparation of usecases which require remapping kernel bos after FLR,
> > introduce xe_bo_restore_map() helper.
> > 
> > Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> > ---
> >  drivers/gpu/drm/xe/xe_bo_evict.c | 34 ++++++++++++++++++++++++--------
> >  drivers/gpu/drm/xe/xe_bo_evict.h |  2 ++
> >  2 files changed, 28 insertions(+), 8 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
> > index 7661fca7f278..0624c3039cd7 100644
> > --- a/drivers/gpu/drm/xe/xe_bo_evict.c
> > +++ b/drivers/gpu/drm/xe/xe_bo_evict.c
> > @@ -189,14 +189,8 @@ int xe_bo_evict_all(struct xe_device *xe)
> >  				     xe_bo_evict_pinned);
> >  }
> >  
> > -static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
> > +static int xe_bo_map_ggtt(struct xe_bo *bo)
> >  {
> > -	int ret;
> > -
> > -	ret = xe_bo_restore_pinned(bo);
> > -	if (ret)
> > -		return ret;
> > -
> >  	if (bo->flags & XE_BO_FLAG_GGTT) {
> >  		struct xe_tile *tile;
> >  		u8 id;
> > @@ -212,6 +206,30 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
> >  	return 0;
> >  }
> >  
> > +int xe_bo_restore_map(struct xe_device *xe)
> 
> Kernel doc. Maybe also explain why this function is needed during PCIe
> FLR in both the commit message and the kernel doc. I assume it’s
> something along the lines of: “During PCIe FLR we repopulate the GGTTs
> for any kernel BOs required for driver restart that lost GGTTs across FLR."
> 
> Just guessing on above but if we had kernel doc I wouldn't have to.
> 
> > +{
> > +	int ret;
> > +
> > +	ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
> > +				    &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
> > +	if (!ret)
> > +		ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
> > +					    &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
> > +
> > +	return ret;
> > +}
> > +
> > +static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
> > +{
> > +	int ret;
> > +
> > +	ret = xe_bo_restore_pinned(bo);
> > +	if (ret)
> > +		return ret;
> > +
> > +	return xe_bo_map_ggtt(bo);
> > +}
> > +
> >  /**
> >   * xe_bo_restore_early - restore early phase kernel BOs to VRAM
> >   *
> > @@ -270,7 +288,7 @@ int xe_bo_restore_late(struct xe_device *xe)
> >  	return ret;
> >  }
> >  
> > -static void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
> > +void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
> 
> Same as above for kernel doc, commit message, reasoning.

Will do.

> Patch looks sane enough though.

Thanks.

Raag

> >  {
> >  	struct xe_tile *tile;
> >  	unsigned int id;
> > diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
> > index e8385cb7f5e9..d4f5b87243e7 100644
> > --- a/drivers/gpu/drm/xe/xe_bo_evict.h
> > +++ b/drivers/gpu/drm/xe/xe_bo_evict.h
> > @@ -14,7 +14,9 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
> >  void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
> >  int xe_bo_restore_early(struct xe_device *xe);
> >  int xe_bo_restore_late(struct xe_device *xe);
> > +int xe_bo_restore_map(struct xe_device *xe);
> >  
> > +void xe_bo_pci_dev_remove_pinned(struct xe_device *xe);
> >  void xe_bo_pci_dev_remove_all(struct xe_device *xe);
> >  
> >  int xe_bo_pinned_init(struct xe_device *xe);
> > -- 
> > 2.43.0
> > 

[PATCH v1 6/6] drm/xe/pci: Introduce PCIe FLR

[Raag Jadav]

With all the pieces in place, we can finally introduce PCIe FLR handling
which reloads hardware state without the need for reloading the driver
from userspace. Memory contents are also wiped along with hardware state,
so user still needs to recreate buffers and reload context after FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/gpu/drm/xe/Makefile     |   1 +
 drivers/gpu/drm/xe/xe_pci.c     |   1 +
 drivers/gpu/drm/xe/xe_pci.h     |   2 +
 drivers/gpu/drm/xe/xe_pci_err.c | 147 ++++++++++++++++++++++++++++++++
 4 files changed, 151 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 7fc67c320086..bc468a9afc48 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -99,6 +99,7 @@ xe-y += xe_bb.o \
 	xe_page_reclaim.o \
 	xe_pat.o \
 	xe_pci.o \
+	xe_pci_err.o \
 	xe_pci_rebar.o \
 	xe_pcode.o \
 	xe_pm.o \
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 0a3bc5067a76..47a2f9de9d61 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1301,6 +1301,7 @@ static struct pci_driver xe_pci_driver = {
 #ifdef CONFIG_PM_SLEEP
 	.driver.pm = &xe_pm_ops,
 #endif
+	.err_handler = &xe_pci_err_handlers,
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_pci.h b/drivers/gpu/drm/xe/xe_pci.h
index 11bcc5fe2c5b..85e85e8508c3 100644
--- a/drivers/gpu/drm/xe/xe_pci.h
+++ b/drivers/gpu/drm/xe/xe_pci.h
@@ -8,6 +8,8 @@
 
 struct pci_dev;
 
+extern const struct pci_error_handlers xe_pci_err_handlers;
+
 int xe_register_pci_driver(void);
 void xe_unregister_pci_driver(void);
 struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev);
diff --git a/drivers/gpu/drm/xe/xe_pci_err.c b/drivers/gpu/drm/xe/xe_pci_err.c
new file mode 100644
index 000000000000..ac7e7382c127
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_err.c
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_bo_evict.h"
+#include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_gt_idle.h"
+#include "xe_i2c.h"
+#include "xe_irq.h"
+#include "xe_late_bind_fw.h"
+#include "xe_pci.h"
+#include "xe_pcode.h"
+#include "xe_pm.h"
+#include "xe_printk.h"
+#include "xe_pxp.h"
+#include "xe_wa.h"
+
+static int xe_flr_prepare(struct xe_device *xe)
+{
+	struct xe_gt *gt;
+	int err;
+	u8 id;
+
+	err = xe_pxp_pm_suspend(xe->pxp);
+	if (err)
+		return err;
+
+	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
+	for_each_gt(gt, xe, id)
+		xe_gt_flr_prepare(gt);
+
+	xe_irq_flr_prepare(xe);
+
+	// TODO: Drop all user bos
+	xe_bo_pci_dev_remove_pinned(xe);
+
+	return 0;
+}
+
+static int xe_flr_done(struct xe_device *xe)
+{
+	struct xe_tile *tile;
+	struct xe_gt *gt;
+	int err;
+	u8 id;
+
+	for_each_gt(gt, xe, id)
+		xe_gt_idle_disable_c6(gt);
+
+	for_each_tile(tile, xe, id)
+		xe_wa_apply_tile_workarounds(tile);
+
+	err = xe_pcode_ready(xe, true);
+	if (err)
+		return err;
+
+	xe_device_assert_lmem_ready(xe);
+
+	err = xe_bo_restore_map(xe);
+	if (err)
+		return err;
+
+	/* Unwedge to allow re-initialization */
+	atomic_set(&xe->wedged.flag, 0);
+
+	for_each_gt(gt, xe, id) {
+		err = xe_gt_flr_done(gt);
+		if (err)
+			return err;
+	}
+
+	xe_i2c_pm_resume(xe, true);
+
+	xe_irq_resume(xe);
+
+	for_each_gt(gt, xe, id) {
+		err = xe_gt_resume(gt);
+		if (err)
+			return err;
+	}
+
+	xe_pxp_pm_resume(xe->pxp);
+
+	xe_late_bind_fw_load(&xe->late_bind);
+
+	return 0;
+}
+
+static void xe_pci_reset_prepare(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	/* TODO: Extend support as a follow-up */
+	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display) {
+		xe_err(xe, "PCIe FLR not supported\n");
+		return;
+	}
+
+	/* Wedge the device to prevent userspace access but don't send the event yet */
+	atomic_set(&xe->wedged.flag, 1);
+
+	/*
+	 * The hardware could be in corrupted state and access unreliable, but we try
+	 * to update data structures and cleanup any pending work to avoid side effects
+	 * during FLR. This will be similar to xe_pm_suspend() flow but without migration.
+	 */
+	if (xe_flr_prepare(xe)) {
+		xe_err(xe, "Failed to prepare for PCIe FLR\n");
+		return;
+	}
+
+	xe_info(xe, "Prepared for PCIe FLR\n");
+}
+
+static void xe_pci_reset_done(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	/* TODO: Extend support as a follow-up */
+	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display)
+		return;
+
+	if (!xe_device_wedged(xe)) {
+		xe_err(xe, "Device in unexpected state, re-initialization aborted\n");
+		return;
+	}
+
+	/*
+	 * We already have the data structures intact, so try to re-initialize the device.
+	 * This will be similar to xe_pm_resume() flow, except we'll also need to recreate
+	 * all VRAM contents.
+	 */
+	if (xe_flr_done(xe)) {
+		xe_err(xe, "Re-initialization failed\n");
+		return;
+	}
+
+	xe_info(xe, "Re-initialization success\n");
+}
+
+const struct pci_error_handlers xe_pci_err_handlers = {
+	.reset_prepare = xe_pci_reset_prepare,
+	.reset_done = xe_pci_reset_done,
+};
-- 
2.43.0

Re: [PATCH v1 6/6] drm/xe/pci: Introduce PCIe FLR

[Maarten Lankhorst]

[-- Attachment #1: Type: text/plain, Size: 562 bytes --]

Hey,

Den 2026-02-24 kl. 11:25, skrev Raag Jadav:
> With all the pieces in place, we can finally introduce PCIe FLR handling
> which reloads hardware state without the need for reloading the driver
> from userspace. Memory contents are also wiped along with hardware state,
> so user still needs to recreate buffers and reload context after FLR.
>
This probably needs some more help to support display.
I tried using only FLR to tear down the driver during shutdown,
but that ran into some issues unfortunately and was reverted.

Kind regards,
~Maarten Lankhorst

[-- Attachment #2: Type: text/html, Size: 997 bytes --]

Re: [PATCH v1 6/6] drm/xe/pci: Introduce PCIe FLR

[Raag Jadav]

On Thu, Feb 26, 2026 at 05:42:05PM +0100, Maarten Lankhorst wrote:
> Den 2026-02-24 kl. 11:25, skrev Raag Jadav:
> > With all the pieces in place, we can finally introduce PCIe FLR handling
> > which reloads hardware state without the need for reloading the driver
> > from userspace. Memory contents are also wiped along with hardware state,
> > so user still needs to recreate buffers and reload context after FLR.
> >
> This probably needs some more help to support display.
> I tried using only FLR to tear down the driver during shutdown,
> but that ran into some issues unfortunately and was reverted.

Yes, it's missing migrate and lrc pieces. Hold on for v2.

Raag

Re: [PATCH v1 6/6] drm/xe/pci: Introduce PCIe FLR

[Raag Jadav]

On Thu, Feb 26, 2026 at 05:46:36PM +0100, Raag Jadav wrote:
> On Thu, Feb 26, 2026 at 05:42:05PM +0100, Maarten Lankhorst wrote:
> > Den 2026-02-24 kl. 11:25, skrev Raag Jadav:
> > > With all the pieces in place, we can finally introduce PCIe FLR handling
> > > which reloads hardware state without the need for reloading the driver
> > > from userspace. Memory contents are also wiped along with hardware state,
> > > so user still needs to recreate buffers and reload context after FLR.
> > >
> > This probably needs some more help to support display.
> > I tried using only FLR to tear down the driver during shutdown,
> > but that ran into some issues unfortunately and was reverted.
> 
> Yes, it's missing migrate and lrc pieces. Hold on for v2.

I tried to dive into display parts earlier but didn't find myself qualified
enough to make those changes. So feel free to join in :)

Raag

✗ CI.checkpatch: warning for Introduce Xe PCIe FLR

[Patchwork]

== Series Details ==

Series: Introduce Xe PCIe FLR
URL   : https://patchwork.freedesktop.org/series/162055/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 3ddc633b33f55560dcb001d3068c006f9340a497
Author: Raag Jadav <raag.jadav@intel.com>
Date:   Tue Feb 24 15:55:19 2026 +0530

    drm/xe/pci: Introduce PCIe FLR
    
    With all the pieces in place, we can finally introduce PCIe FLR handling
    which reloads hardware state without the need for reloading the driver
    from userspace. Memory contents are also wiped along with hardware state,
    so user still needs to recreate buffers and reload context after FLR.
    
    Signed-off-by: Raag Jadav <raag.jadav@intel.com>
+ /mt/dim checkpatch 60bf88f4f1d327a74aec8abb0caacddb6341324d drm-intel
f498cd7a762a drm/xe/uc_fw: Allow reloading firmware
5e7a7c424851 drm/xe/uc: Introduce FLR helpers
7298b9434037 drm/xe/irq: Introduce FLR helper
dda8a4595f8b drm/xe: Introduce xe_device_assert_lmem_ready()
cd5d1e1b2e26 drm/xe/bo_evict: Introduce xe_bo_restore_map()
3ddc633b33f5 drm/xe/pci: Introduce PCIe FLR
-:51: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 169 lines checked

✓ CI.KUnit: success for Introduce Xe PCIe FLR

[Patchwork]

== Series Details ==

Series: Introduce Xe PCIe FLR
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:36:48] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:36:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:37:23] Starting KUnit Kernel (1/1)...
[10:37:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:37:23] ================== guc_buf (11 subtests) ===================
[10:37:23] [PASSED] test_smallest
[10:37:23] [PASSED] test_largest
[10:37:23] [PASSED] test_granular
[10:37:23] [PASSED] test_unique
[10:37:23] [PASSED] test_overlap
[10:37:23] [PASSED] test_reusable
[10:37:23] [PASSED] test_too_big
[10:37:23] [PASSED] test_flush
[10:37:23] [PASSED] test_lookup
[10:37:23] [PASSED] test_data
[10:37:23] [PASSED] test_class
[10:37:23] ===================== [PASSED] guc_buf =====================
[10:37:23] =================== guc_dbm (7 subtests) ===================
[10:37:23] [PASSED] test_empty
[10:37:23] [PASSED] test_default
[10:37:23] ======================== test_size  ========================
[10:37:23] [PASSED] 4
[10:37:23] [PASSED] 8
[10:37:23] [PASSED] 32
[10:37:23] [PASSED] 256
[10:37:23] ==================== [PASSED] test_size ====================
[10:37:23] ======================= test_reuse  ========================
[10:37:23] [PASSED] 4
[10:37:23] [PASSED] 8
[10:37:23] [PASSED] 32
[10:37:23] [PASSED] 256
[10:37:23] =================== [PASSED] test_reuse ====================
[10:37:23] =================== test_range_overlap  ====================
[10:37:23] [PASSED] 4
[10:37:23] [PASSED] 8
[10:37:23] [PASSED] 32
[10:37:23] [PASSED] 256
[10:37:23] =============== [PASSED] test_range_overlap ================
[10:37:23] =================== test_range_compact  ====================
[10:37:23] [PASSED] 4
[10:37:23] [PASSED] 8
[10:37:23] [PASSED] 32
[10:37:23] [PASSED] 256
[10:37:23] =============== [PASSED] test_range_compact ================
[10:37:23] ==================== test_range_spare  =====================
[10:37:23] [PASSED] 4
[10:37:23] [PASSED] 8
[10:37:23] [PASSED] 32
[10:37:23] [PASSED] 256
[10:37:23] ================ [PASSED] test_range_spare =================
[10:37:23] ===================== [PASSED] guc_dbm =====================
[10:37:23] =================== guc_idm (6 subtests) ===================
[10:37:23] [PASSED] bad_init
[10:37:23] [PASSED] no_init
[10:37:23] [PASSED] init_fini
[10:37:23] [PASSED] check_used
[10:37:23] [PASSED] check_quota
[10:37:23] [PASSED] check_all
[10:37:23] ===================== [PASSED] guc_idm =====================
[10:37:23] ================== no_relay (3 subtests) ===================
[10:37:23] [PASSED] xe_drops_guc2pf_if_not_ready
[10:37:23] [PASSED] xe_drops_guc2vf_if_not_ready
[10:37:23] [PASSED] xe_rejects_send_if_not_ready
[10:37:23] ==================== [PASSED] no_relay =====================
[10:37:23] ================== pf_relay (14 subtests) ==================
[10:37:23] [PASSED] pf_rejects_guc2pf_too_short
[10:37:23] [PASSED] pf_rejects_guc2pf_too_long
[10:37:23] [PASSED] pf_rejects_guc2pf_no_payload
[10:37:23] [PASSED] pf_fails_no_payload
[10:37:23] [PASSED] pf_fails_bad_origin
[10:37:23] [PASSED] pf_fails_bad_type
[10:37:23] [PASSED] pf_txn_reports_error
[10:37:23] [PASSED] pf_txn_sends_pf2guc
[10:37:23] [PASSED] pf_sends_pf2guc
[10:37:23] [SKIPPED] pf_loopback_nop
[10:37:23] [SKIPPED] pf_loopback_echo
[10:37:23] [SKIPPED] pf_loopback_fail
[10:37:23] [SKIPPED] pf_loopback_busy
[10:37:23] [SKIPPED] pf_loopback_retry
[10:37:23] ==================== [PASSED] pf_relay =====================
[10:37:23] ================== vf_relay (3 subtests) ===================
[10:37:23] [PASSED] vf_rejects_guc2vf_too_short
[10:37:23] [PASSED] vf_rejects_guc2vf_too_long
[10:37:23] [PASSED] vf_rejects_guc2vf_no_payload
[10:37:23] ==================== [PASSED] vf_relay =====================
[10:37:23] ================ pf_gt_config (9 subtests) =================
[10:37:23] [PASSED] fair_contexts_1vf
[10:37:23] [PASSED] fair_doorbells_1vf
[10:37:23] [PASSED] fair_ggtt_1vf
[10:37:23] ====================== fair_vram_1vf  ======================
[10:37:23] [PASSED] 3.50 GiB
[10:37:23] [PASSED] 11.5 GiB
[10:37:23] [PASSED] 15.5 GiB
[10:37:23] [PASSED] 31.5 GiB
[10:37:23] [PASSED] 63.5 GiB
[10:37:23] [PASSED] 13.9 GiB
[10:37:23] ================== [PASSED] fair_vram_1vf ==================
[10:37:23] ================ fair_vram_1vf_admin_only  =================
[10:37:23] [PASSED] 3.50 GiB
[10:37:23] [PASSED] 11.5 GiB
[10:37:23] [PASSED] 15.5 GiB
[10:37:23] [PASSED] 31.5 GiB
[10:37:23] [PASSED] 63.5 GiB
[10:37:23] [PASSED] 13.9 GiB
[10:37:23] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:37:23] ====================== fair_contexts  ======================
[10:37:23] [PASSED] 1 VF
[10:37:23] [PASSED] 2 VFs
[10:37:23] [PASSED] 3 VFs
[10:37:23] [PASSED] 4 VFs
[10:37:23] [PASSED] 5 VFs
[10:37:23] [PASSED] 6 VFs
[10:37:23] [PASSED] 7 VFs
[10:37:23] [PASSED] 8 VFs
[10:37:23] [PASSED] 9 VFs
[10:37:23] [PASSED] 10 VFs
[10:37:23] [PASSED] 11 VFs
[10:37:23] [PASSED] 12 VFs
[10:37:23] [PASSED] 13 VFs
[10:37:23] [PASSED] 14 VFs
[10:37:23] [PASSED] 15 VFs
[10:37:23] [PASSED] 16 VFs
[10:37:23] [PASSED] 17 VFs
[10:37:23] [PASSED] 18 VFs
[10:37:23] [PASSED] 19 VFs
[10:37:23] [PASSED] 20 VFs
[10:37:23] [PASSED] 21 VFs
[10:37:23] [PASSED] 22 VFs
[10:37:23] [PASSED] 23 VFs
[10:37:23] [PASSED] 24 VFs
[10:37:23] [PASSED] 25 VFs
[10:37:23] [PASSED] 26 VFs
[10:37:23] [PASSED] 27 VFs
[10:37:23] [PASSED] 28 VFs
[10:37:23] [PASSED] 29 VFs
[10:37:23] [PASSED] 30 VFs
[10:37:23] [PASSED] 31 VFs
[10:37:23] [PASSED] 32 VFs
[10:37:23] [PASSED] 33 VFs
[10:37:23] [PASSED] 34 VFs
[10:37:23] [PASSED] 35 VFs
[10:37:23] [PASSED] 36 VFs
[10:37:23] [PASSED] 37 VFs
[10:37:23] [PASSED] 38 VFs
[10:37:23] [PASSED] 39 VFs
[10:37:23] [PASSED] 40 VFs
[10:37:23] [PASSED] 41 VFs
[10:37:23] [PASSED] 42 VFs
[10:37:23] [PASSED] 43 VFs
[10:37:23] [PASSED] 44 VFs
[10:37:23] [PASSED] 45 VFs
[10:37:23] [PASSED] 46 VFs
[10:37:23] [PASSED] 47 VFs
[10:37:23] [PASSED] 48 VFs
[10:37:23] [PASSED] 49 VFs
[10:37:23] [PASSED] 50 VFs
[10:37:23] [PASSED] 51 VFs
[10:37:23] [PASSED] 52 VFs
[10:37:23] [PASSED] 53 VFs
[10:37:23] [PASSED] 54 VFs
[10:37:23] [PASSED] 55 VFs
[10:37:23] [PASSED] 56 VFs
[10:37:23] [PASSED] 57 VFs
[10:37:23] [PASSED] 58 VFs
[10:37:23] [PASSED] 59 VFs
[10:37:23] [PASSED] 60 VFs
[10:37:23] [PASSED] 61 VFs
[10:37:23] [PASSED] 62 VFs
[10:37:23] [PASSED] 63 VFs
[10:37:23] ================== [PASSED] fair_contexts ==================
[10:37:23] ===================== fair_doorbells  ======================
[10:37:23] [PASSED] 1 VF
[10:37:23] [PASSED] 2 VFs
[10:37:23] [PASSED] 3 VFs
[10:37:23] [PASSED] 4 VFs
[10:37:23] [PASSED] 5 VFs
[10:37:23] [PASSED] 6 VFs
[10:37:23] [PASSED] 7 VFs
[10:37:23] [PASSED] 8 VFs
[10:37:23] [PASSED] 9 VFs
[10:37:23] [PASSED] 10 VFs
[10:37:23] [PASSED] 11 VFs
[10:37:23] [PASSED] 12 VFs
[10:37:23] [PASSED] 13 VFs
[10:37:23] [PASSED] 14 VFs
[10:37:23] [PASSED] 15 VFs
[10:37:23] [PASSED] 16 VFs
[10:37:23] [PASSED] 17 VFs
[10:37:23] [PASSED] 18 VFs
[10:37:23] [PASSED] 19 VFs
[10:37:23] [PASSED] 20 VFs
[10:37:23] [PASSED] 21 VFs
[10:37:23] [PASSED] 22 VFs
[10:37:23] [PASSED] 23 VFs
[10:37:23] [PASSED] 24 VFs
[10:37:23] [PASSED] 25 VFs
[10:37:23] [PASSED] 26 VFs
[10:37:23] [PASSED] 27 VFs
[10:37:23] [PASSED] 28 VFs
[10:37:23] [PASSED] 29 VFs
[10:37:23] [PASSED] 30 VFs
[10:37:23] [PASSED] 31 VFs
[10:37:23] [PASSED] 32 VFs
[10:37:23] [PASSED] 33 VFs
[10:37:23] [PASSED] 34 VFs
[10:37:23] [PASSED] 35 VFs
[10:37:23] [PASSED] 36 VFs
[10:37:23] [PASSED] 37 VFs
[10:37:23] [PASSED] 38 VFs
[10:37:23] [PASSED] 39 VFs
[10:37:23] [PASSED] 40 VFs
[10:37:23] [PASSED] 41 VFs
[10:37:23] [PASSED] 42 VFs
[10:37:23] [PASSED] 43 VFs
[10:37:23] [PASSED] 44 VFs
[10:37:23] [PASSED] 45 VFs
[10:37:23] [PASSED] 46 VFs
[10:37:23] [PASSED] 47 VFs
[10:37:23] [PASSED] 48 VFs
[10:37:23] [PASSED] 49 VFs
[10:37:23] [PASSED] 50 VFs
[10:37:23] [PASSED] 51 VFs
[10:37:23] [PASSED] 52 VFs
[10:37:23] [PASSED] 53 VFs
[10:37:23] [PASSED] 54 VFs
[10:37:23] [PASSED] 55 VFs
[10:37:23] [PASSED] 56 VFs
[10:37:23] [PASSED] 57 VFs
[10:37:23] [PASSED] 58 VFs
[10:37:23] [PASSED] 59 VFs
[10:37:23] [PASSED] 60 VFs
[10:37:23] [PASSED] 61 VFs
[10:37:23] [PASSED] 62 VFs
[10:37:23] [PASSED] 63 VFs
[10:37:23] ================= [PASSED] fair_doorbells ==================
[10:37:23] ======================== fair_ggtt  ========================
[10:37:23] [PASSED] 1 VF
[10:37:23] [PASSED] 2 VFs
[10:37:23] [PASSED] 3 VFs
[10:37:23] [PASSED] 4 VFs
[10:37:23] [PASSED] 5 VFs
[10:37:23] [PASSED] 6 VFs
[10:37:23] [PASSED] 7 VFs
[10:37:23] [PASSED] 8 VFs
[10:37:23] [PASSED] 9 VFs
[10:37:23] [PASSED] 10 VFs
[10:37:23] [PASSED] 11 VFs
[10:37:23] [PASSED] 12 VFs
[10:37:23] [PASSED] 13 VFs
[10:37:23] [PASSED] 14 VFs
[10:37:23] [PASSED] 15 VFs
[10:37:23] [PASSED] 16 VFs
[10:37:23] [PASSED] 17 VFs
[10:37:23] [PASSED] 18 VFs
[10:37:23] [PASSED] 19 VFs
[10:37:23] [PASSED] 20 VFs
[10:37:23] [PASSED] 21 VFs
[10:37:23] [PASSED] 22 VFs
[10:37:23] [PASSED] 23 VFs
[10:37:23] [PASSED] 24 VFs
[10:37:23] [PASSED] 25 VFs
[10:37:23] [PASSED] 26 VFs
[10:37:23] [PASSED] 27 VFs
[10:37:23] [PASSED] 28 VFs
[10:37:23] [PASSED] 29 VFs
[10:37:23] [PASSED] 30 VFs
[10:37:23] [PASSED] 31 VFs
[10:37:23] [PASSED] 32 VFs
[10:37:23] [PASSED] 33 VFs
[10:37:23] [PASSED] 34 VFs
[10:37:23] [PASSED] 35 VFs
[10:37:23] [PASSED] 36 VFs
[10:37:23] [PASSED] 37 VFs
[10:37:23] [PASSED] 38 VFs
[10:37:23] [PASSED] 39 VFs
[10:37:23] [PASSED] 40 VFs
[10:37:23] [PASSED] 41 VFs
[10:37:23] [PASSED] 42 VFs
[10:37:23] [PASSED] 43 VFs
[10:37:23] [PASSED] 44 VFs
[10:37:23] [PASSED] 45 VFs
[10:37:23] [PASSED] 46 VFs
[10:37:23] [PASSED] 47 VFs
[10:37:23] [PASSED] 48 VFs
[10:37:23] [PASSED] 49 VFs
[10:37:23] [PASSED] 50 VFs
[10:37:23] [PASSED] 51 VFs
[10:37:23] [PASSED] 52 VFs
[10:37:23] [PASSED] 53 VFs
[10:37:23] [PASSED] 54 VFs
[10:37:23] [PASSED] 55 VFs
[10:37:23] [PASSED] 56 VFs
[10:37:23] [PASSED] 57 VFs
[10:37:23] [PASSED] 58 VFs
[10:37:23] [PASSED] 59 VFs
[10:37:23] [PASSED] 60 VFs
[10:37:23] [PASSED] 61 VFs
[10:37:23] [PASSED] 62 VFs
[10:37:23] [PASSED] 63 VFs
[10:37:23] ==================== [PASSED] fair_ggtt ====================
[10:37:23] ======================== fair_vram  ========================
[10:37:23] [PASSED] 1 VF
[10:37:23] [PASSED] 2 VFs
[10:37:23] [PASSED] 3 VFs
[10:37:23] [PASSED] 4 VFs
[10:37:23] [PASSED] 5 VFs
[10:37:23] [PASSED] 6 VFs
[10:37:23] [PASSED] 7 VFs
[10:37:23] [PASSED] 8 VFs
[10:37:23] [PASSED] 9 VFs
[10:37:23] [PASSED] 10 VFs
[10:37:23] [PASSED] 11 VFs
[10:37:23] [PASSED] 12 VFs
[10:37:23] [PASSED] 13 VFs
[10:37:23] [PASSED] 14 VFs
[10:37:23] [PASSED] 15 VFs
[10:37:23] [PASSED] 16 VFs
[10:37:23] [PASSED] 17 VFs
[10:37:23] [PASSED] 18 VFs
[10:37:23] [PASSED] 19 VFs
[10:37:23] [PASSED] 20 VFs
[10:37:23] [PASSED] 21 VFs
[10:37:23] [PASSED] 22 VFs
[10:37:23] [PASSED] 23 VFs
[10:37:23] [PASSED] 24 VFs
[10:37:23] [PASSED] 25 VFs
[10:37:23] [PASSED] 26 VFs
[10:37:23] [PASSED] 27 VFs
[10:37:23] [PASSED] 28 VFs
[10:37:23] [PASSED] 29 VFs
[10:37:23] [PASSED] 30 VFs
[10:37:23] [PASSED] 31 VFs
[10:37:23] [PASSED] 32 VFs
[10:37:23] [PASSED] 33 VFs
[10:37:23] [PASSED] 34 VFs
[10:37:23] [PASSED] 35 VFs
[10:37:23] [PASSED] 36 VFs
[10:37:23] [PASSED] 37 VFs
[10:37:23] [PASSED] 38 VFs
[10:37:23] [PASSED] 39 VFs
[10:37:23] [PASSED] 40 VFs
[10:37:23] [PASSED] 41 VFs
[10:37:23] [PASSED] 42 VFs
[10:37:23] [PASSED] 43 VFs
[10:37:23] [PASSED] 44 VFs
[10:37:23] [PASSED] 45 VFs
[10:37:23] [PASSED] 46 VFs
[10:37:23] [PASSED] 47 VFs
[10:37:23] [PASSED] 48 VFs
[10:37:23] [PASSED] 49 VFs
[10:37:23] [PASSED] 50 VFs
[10:37:23] [PASSED] 51 VFs
[10:37:23] [PASSED] 52 VFs
[10:37:23] [PASSED] 53 VFs
[10:37:23] [PASSED] 54 VFs
[10:37:23] [PASSED] 55 VFs
[10:37:23] [PASSED] 56 VFs
[10:37:23] [PASSED] 57 VFs
[10:37:23] [PASSED] 58 VFs
[10:37:23] [PASSED] 59 VFs
[10:37:23] [PASSED] 60 VFs
[10:37:24] [PASSED] 61 VFs
[10:37:24] [PASSED] 62 VFs
[10:37:24] [PASSED] 63 VFs
[10:37:24] ==================== [PASSED] fair_vram ====================
[10:37:24] ================== [PASSED] pf_gt_config ===================
[10:37:24] ===================== lmtt (1 subtest) =====================
[10:37:24] ======================== test_ops  =========================
[10:37:24] [PASSED] 2-level
[10:37:24] [PASSED] multi-level
[10:37:24] ==================== [PASSED] test_ops =====================
[10:37:24] ====================== [PASSED] lmtt =======================
[10:37:24] ================= pf_service (11 subtests) =================
[10:37:24] [PASSED] pf_negotiate_any
[10:37:24] [PASSED] pf_negotiate_base_match
[10:37:24] [PASSED] pf_negotiate_base_newer
[10:37:24] [PASSED] pf_negotiate_base_next
[10:37:24] [SKIPPED] pf_negotiate_base_older
[10:37:24] [PASSED] pf_negotiate_base_prev
[10:37:24] [PASSED] pf_negotiate_latest_match
[10:37:24] [PASSED] pf_negotiate_latest_newer
[10:37:24] [PASSED] pf_negotiate_latest_next
[10:37:24] [SKIPPED] pf_negotiate_latest_older
[10:37:24] [SKIPPED] pf_negotiate_latest_prev
[10:37:24] =================== [PASSED] pf_service ====================
[10:37:24] ================= xe_guc_g2g (2 subtests) ==================
[10:37:24] ============== xe_live_guc_g2g_kunit_default  ==============
[10:37:24] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:37:24] ============== xe_live_guc_g2g_kunit_allmem  ===============
[10:37:24] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:37:24] =================== [SKIPPED] xe_guc_g2g ===================
[10:37:24] =================== xe_mocs (2 subtests) ===================
[10:37:24] ================ xe_live_mocs_kernel_kunit  ================
[10:37:24] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:37:24] ================ xe_live_mocs_reset_kunit  =================
[10:37:24] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:37:24] ==================== [SKIPPED] xe_mocs =====================
[10:37:24] ================= xe_migrate (2 subtests) ==================
[10:37:24] ================= xe_migrate_sanity_kunit  =================
[10:37:24] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:37:24] ================== xe_validate_ccs_kunit  ==================
[10:37:24] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:37:24] =================== [SKIPPED] xe_migrate ===================
[10:37:24] ================== xe_dma_buf (1 subtest) ==================
[10:37:24] ==================== xe_dma_buf_kunit  =====================
[10:37:24] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:37:24] =================== [SKIPPED] xe_dma_buf ===================
[10:37:24] ================= xe_bo_shrink (1 subtest) =================
[10:37:24] =================== xe_bo_shrink_kunit  ====================
[10:37:24] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:37:24] ================== [SKIPPED] xe_bo_shrink ==================
[10:37:24] ==================== xe_bo (2 subtests) ====================
[10:37:24] ================== xe_ccs_migrate_kunit  ===================
[10:37:24] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:37:24] ==================== xe_bo_evict_kunit  ====================
[10:37:24] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:37:24] ===================== [SKIPPED] xe_bo ======================
[10:37:24] ==================== args (13 subtests) ====================
[10:37:24] [PASSED] count_args_test
[10:37:24] [PASSED] call_args_example
[10:37:24] [PASSED] call_args_test
[10:37:24] [PASSED] drop_first_arg_example
[10:37:24] [PASSED] drop_first_arg_test
[10:37:24] [PASSED] first_arg_example
[10:37:24] [PASSED] first_arg_test
[10:37:24] [PASSED] last_arg_example
[10:37:24] [PASSED] last_arg_test
[10:37:24] [PASSED] pick_arg_example
[10:37:24] [PASSED] if_args_example
[10:37:24] [PASSED] if_args_test
[10:37:24] [PASSED] sep_comma_example
[10:37:24] ====================== [PASSED] args =======================
[10:37:24] =================== xe_pci (3 subtests) ====================
[10:37:24] ==================== check_graphics_ip  ====================
[10:37:24] [PASSED] 12.00 Xe_LP
[10:37:24] [PASSED] 12.10 Xe_LP+
[10:37:24] [PASSED] 12.55 Xe_HPG
[10:37:24] [PASSED] 12.60 Xe_HPC
[10:37:24] [PASSED] 12.70 Xe_LPG
[10:37:24] [PASSED] 12.71 Xe_LPG
[10:37:24] [PASSED] 12.74 Xe_LPG+
[10:37:24] [PASSED] 20.01 Xe2_HPG
[10:37:24] [PASSED] 20.02 Xe2_HPG
[10:37:24] [PASSED] 20.04 Xe2_LPG
[10:37:24] [PASSED] 30.00 Xe3_LPG
[10:37:24] [PASSED] 30.01 Xe3_LPG
[10:37:24] [PASSED] 30.03 Xe3_LPG
[10:37:24] [PASSED] 30.04 Xe3_LPG
[10:37:24] [PASSED] 30.05 Xe3_LPG
[10:37:24] [PASSED] 35.10 Xe3p_LPG
[10:37:24] [PASSED] 35.11 Xe3p_XPC
[10:37:24] ================ [PASSED] check_graphics_ip ================
[10:37:24] ===================== check_media_ip  ======================
[10:37:24] [PASSED] 12.00 Xe_M
[10:37:24] [PASSED] 12.55 Xe_HPM
[10:37:24] [PASSED] 13.00 Xe_LPM+
[10:37:24] [PASSED] 13.01 Xe2_HPM
[10:37:24] [PASSED] 20.00 Xe2_LPM
[10:37:24] [PASSED] 30.00 Xe3_LPM
[10:37:24] [PASSED] 30.02 Xe3_LPM
[10:37:24] [PASSED] 35.00 Xe3p_LPM
[10:37:24] [PASSED] 35.03 Xe3p_HPM
[10:37:24] ================= [PASSED] check_media_ip ==================
[10:37:24] =================== check_platform_desc  ===================
[10:37:24] [PASSED] 0x9A60 (TIGERLAKE)
[10:37:24] [PASSED] 0x9A68 (TIGERLAKE)
[10:37:24] [PASSED] 0x9A70 (TIGERLAKE)
[10:37:24] [PASSED] 0x9A40 (TIGERLAKE)
[10:37:24] [PASSED] 0x9A49 (TIGERLAKE)
[10:37:24] [PASSED] 0x9A59 (TIGERLAKE)
[10:37:24] [PASSED] 0x9A78 (TIGERLAKE)
[10:37:24] [PASSED] 0x9AC0 (TIGERLAKE)
[10:37:24] [PASSED] 0x9AC9 (TIGERLAKE)
[10:37:24] [PASSED] 0x9AD9 (TIGERLAKE)
[10:37:24] [PASSED] 0x9AF8 (TIGERLAKE)
[10:37:24] [PASSED] 0x4C80 (ROCKETLAKE)
[10:37:24] [PASSED] 0x4C8A (ROCKETLAKE)
[10:37:24] [PASSED] 0x4C8B (ROCKETLAKE)
[10:37:24] [PASSED] 0x4C8C (ROCKETLAKE)
[10:37:24] [PASSED] 0x4C90 (ROCKETLAKE)
[10:37:24] [PASSED] 0x4C9A (ROCKETLAKE)
[10:37:24] [PASSED] 0x4680 (ALDERLAKE_S)
[10:37:24] [PASSED] 0x4682 (ALDERLAKE_S)
[10:37:24] [PASSED] 0x4688 (ALDERLAKE_S)
[10:37:24] [PASSED] 0x468A (ALDERLAKE_S)
[10:37:24] [PASSED] 0x468B (ALDERLAKE_S)
[10:37:24] [PASSED] 0x4690 (ALDERLAKE_S)
[10:37:24] [PASSED] 0x4692 (ALDERLAKE_S)
[10:37:24] [PASSED] 0x4693 (ALDERLAKE_S)
[10:37:24] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46AA (ALDERLAKE_P)
[10:37:24] [PASSED] 0x462A (ALDERLAKE_P)
[10:37:24] [PASSED] 0x4626 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x4628 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:37:24] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:37:24] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:37:24] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:37:24] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:37:24] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:37:24] [PASSED] 0xA721 (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA720 (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:37:24] [PASSED] 0xA780 (ALDERLAKE_S)
[10:37:24] [PASSED] 0xA781 (ALDERLAKE_S)
[10:37:24] [PASSED] 0xA782 (ALDERLAKE_S)
[10:37:24] [PASSED] 0xA783 (ALDERLAKE_S)
[10:37:24] [PASSED] 0xA788 (ALDERLAKE_S)
[10:37:24] [PASSED] 0xA789 (ALDERLAKE_S)
[10:37:24] [PASSED] 0xA78A (ALDERLAKE_S)
[10:37:24] [PASSED] 0xA78B (ALDERLAKE_S)
[10:37:24] [PASSED] 0x4905 (DG1)
[10:37:24] [PASSED] 0x4906 (DG1)
[10:37:24] [PASSED] 0x4907 (DG1)
[10:37:24] [PASSED] 0x4908 (DG1)
[10:37:24] [PASSED] 0x4909 (DG1)
[10:37:24] [PASSED] 0x56C0 (DG2)
[10:37:24] [PASSED] 0x56C2 (DG2)
[10:37:24] [PASSED] 0x56C1 (DG2)
[10:37:24] [PASSED] 0x7D51 (METEORLAKE)
[10:37:24] [PASSED] 0x7DD1 (METEORLAKE)
[10:37:24] [PASSED] 0x7D41 (METEORLAKE)
[10:37:24] [PASSED] 0x7D67 (METEORLAKE)
[10:37:24] [PASSED] 0xB640 (METEORLAKE)
[10:37:24] [PASSED] 0x56A0 (DG2)
[10:37:24] [PASSED] 0x56A1 (DG2)
[10:37:24] [PASSED] 0x56A2 (DG2)
[10:37:24] [PASSED] 0x56BE (DG2)
[10:37:24] [PASSED] 0x56BF (DG2)
[10:37:24] [PASSED] 0x5690 (DG2)
[10:37:24] [PASSED] 0x5691 (DG2)
[10:37:24] [PASSED] 0x5692 (DG2)
[10:37:24] [PASSED] 0x56A5 (DG2)
[10:37:24] [PASSED] 0x56A6 (DG2)
[10:37:24] [PASSED] 0x56B0 (DG2)
[10:37:24] [PASSED] 0x56B1 (DG2)
[10:37:24] [PASSED] 0x56BA (DG2)
[10:37:24] [PASSED] 0x56BB (DG2)
[10:37:24] [PASSED] 0x56BC (DG2)
[10:37:24] [PASSED] 0x56BD (DG2)
[10:37:24] [PASSED] 0x5693 (DG2)
[10:37:24] [PASSED] 0x5694 (DG2)
[10:37:24] [PASSED] 0x5695 (DG2)
[10:37:24] [PASSED] 0x56A3 (DG2)
[10:37:24] [PASSED] 0x56A4 (DG2)
[10:37:24] [PASSED] 0x56B2 (DG2)
[10:37:24] [PASSED] 0x56B3 (DG2)
[10:37:24] [PASSED] 0x5696 (DG2)
[10:37:24] [PASSED] 0x5697 (DG2)
[10:37:24] [PASSED] 0xB69 (PVC)
[10:37:24] [PASSED] 0xB6E (PVC)
[10:37:24] [PASSED] 0xBD4 (PVC)
[10:37:24] [PASSED] 0xBD5 (PVC)
[10:37:24] [PASSED] 0xBD6 (PVC)
[10:37:24] [PASSED] 0xBD7 (PVC)
[10:37:24] [PASSED] 0xBD8 (PVC)
[10:37:24] [PASSED] 0xBD9 (PVC)
[10:37:24] [PASSED] 0xBDA (PVC)
[10:37:24] [PASSED] 0xBDB (PVC)
[10:37:24] [PASSED] 0xBE0 (PVC)
[10:37:24] [PASSED] 0xBE1 (PVC)
[10:37:24] [PASSED] 0xBE5 (PVC)
[10:37:24] [PASSED] 0x7D40 (METEORLAKE)
[10:37:24] [PASSED] 0x7D45 (METEORLAKE)
[10:37:24] [PASSED] 0x7D55 (METEORLAKE)
[10:37:24] [PASSED] 0x7D60 (METEORLAKE)
[10:37:24] [PASSED] 0x7DD5 (METEORLAKE)
[10:37:24] [PASSED] 0x6420 (LUNARLAKE)
[10:37:24] [PASSED] 0x64A0 (LUNARLAKE)
[10:37:24] [PASSED] 0x64B0 (LUNARLAKE)
[10:37:24] [PASSED] 0xE202 (BATTLEMAGE)
[10:37:24] [PASSED] 0xE209 (BATTLEMAGE)
[10:37:24] [PASSED] 0xE20B (BATTLEMAGE)
[10:37:24] [PASSED] 0xE20C (BATTLEMAGE)
[10:37:24] [PASSED] 0xE20D (BATTLEMAGE)
[10:37:24] [PASSED] 0xE210 (BATTLEMAGE)
[10:37:24] [PASSED] 0xE211 (BATTLEMAGE)
[10:37:24] [PASSED] 0xE212 (BATTLEMAGE)
[10:37:24] [PASSED] 0xE216 (BATTLEMAGE)
[10:37:24] [PASSED] 0xE220 (BATTLEMAGE)
[10:37:24] [PASSED] 0xE221 (BATTLEMAGE)
[10:37:24] [PASSED] 0xE222 (BATTLEMAGE)
[10:37:24] [PASSED] 0xE223 (BATTLEMAGE)
[10:37:24] [PASSED] 0xB080 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB081 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB082 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB083 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB084 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB085 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB086 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB087 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB08F (PANTHERLAKE)
[10:37:24] [PASSED] 0xB090 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:37:24] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:37:24] [PASSED] 0xFD80 (PANTHERLAKE)
[10:37:24] [PASSED] 0xFD81 (PANTHERLAKE)
[10:37:24] [PASSED] 0xD740 (NOVALAKE_S)
[10:37:24] [PASSED] 0xD741 (NOVALAKE_S)
[10:37:24] [PASSED] 0xD742 (NOVALAKE_S)
[10:37:24] [PASSED] 0xD743 (NOVALAKE_S)
[10:37:24] [PASSED] 0xD744 (NOVALAKE_S)
[10:37:24] [PASSED] 0xD745 (NOVALAKE_S)
[10:37:24] [PASSED] 0x674C (CRESCENTISLAND)
[10:37:24] [PASSED] 0xD750 (NOVALAKE_P)
[10:37:24] [PASSED] 0xD751 (NOVALAKE_P)
[10:37:24] [PASSED] 0xD752 (NOVALAKE_P)
[10:37:24] [PASSED] 0xD753 (NOVALAKE_P)
[10:37:24] [PASSED] 0xD754 (NOVALAKE_P)
[10:37:24] [PASSED] 0xD755 (NOVALAKE_P)
[10:37:24] [PASSED] 0xD756 (NOVALAKE_P)
[10:37:24] [PASSED] 0xD757 (NOVALAKE_P)
[10:37:24] [PASSED] 0xD75F (NOVALAKE_P)
[10:37:24] =============== [PASSED] check_platform_desc ===============
[10:37:24] ===================== [PASSED] xe_pci ======================
[10:37:24] =================== xe_rtp (2 subtests) ====================
[10:37:24] =============== xe_rtp_process_to_sr_tests  ================
[10:37:24] [PASSED] coalesce-same-reg
[10:37:24] [PASSED] no-match-no-add
[10:37:24] [PASSED] match-or
[10:37:24] [PASSED] match-or-xfail
[10:37:24] [PASSED] no-match-no-add-multiple-rules
[10:37:24] [PASSED] two-regs-two-entries
[10:37:24] [PASSED] clr-one-set-other
[10:37:24] [PASSED] set-field
[10:37:24] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[10:37:24] [PASSED] conflict-not-disjoint
[10:37:24] [PASSED] conflict-reg-type
[10:37:24] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:37:24] ================== xe_rtp_process_tests  ===================
[10:37:24] [PASSED] active1
[10:37:24] [PASSED] active2
[10:37:24] [PASSED] active-inactive
[10:37:24] [PASSED] inactive-active
[10:37:24] [PASSED] inactive-1st_or_active-inactive
[10:37:24] [PASSED] inactive-2nd_or_active-inactive
[10:37:24] [PASSED] inactive-last_or_active-inactive
[10:37:24] [PASSED] inactive-no_or_active-inactive
[10:37:24] ============== [PASSED] xe_rtp_process_tests ===============
[10:37:24] ===================== [PASSED] xe_rtp ======================
[10:37:24] ==================== xe_wa (1 subtest) =====================
[10:37:24] ======================== xe_wa_gt  =========================
[10:37:24] [PASSED] TIGERLAKE B0
[10:37:24] [PASSED] DG1 A0
[10:37:24] [PASSED] DG1 B0
[10:37:24] [PASSED] ALDERLAKE_S A0
[10:37:24] [PASSED] ALDERLAKE_S B0
[10:37:24] [PASSED] ALDERLAKE_S C0
[10:37:24] [PASSED] ALDERLAKE_S D0
[10:37:24] [PASSED] ALDERLAKE_P A0
[10:37:24] [PASSED] ALDERLAKE_P B0
[10:37:24] [PASSED] ALDERLAKE_P C0
[10:37:24] [PASSED] ALDERLAKE_S RPLS D0
[10:37:24] [PASSED] ALDERLAKE_P RPLU E0
[10:37:24] [PASSED] DG2 G10 C0
[10:37:24] [PASSED] DG2 G11 B1
[10:37:24] [PASSED] DG2 G12 A1
[10:37:24] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:37:24] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:37:24] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:37:24] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:37:24] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:37:24] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:37:24] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:37:24] ==================== [PASSED] xe_wa_gt =====================
[10:37:24] ====================== [PASSED] xe_wa ======================
[10:37:24] ============================================================
[10:37:24] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[10:37:24] Elapsed time: 35.316s total, 4.223s configuring, 30.426s building, 0.620s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:37:24] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:37:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:37:49] Starting KUnit Kernel (1/1)...
[10:37:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:37:50] ============ drm_test_pick_cmdline (2 subtests) ============
[10:37:50] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:37:50] =============== drm_test_pick_cmdline_named  ===============
[10:37:50] [PASSED] NTSC
[10:37:50] [PASSED] NTSC-J
[10:37:50] [PASSED] PAL
[10:37:50] [PASSED] PAL-M
[10:37:50] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:37:50] ============== [PASSED] drm_test_pick_cmdline ==============
[10:37:50] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:37:50] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:37:50] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:37:50] =========== drm_validate_clone_mode (2 subtests) ===========
[10:37:50] ============== drm_test_check_in_clone_mode  ===============
[10:37:50] [PASSED] in_clone_mode
[10:37:50] [PASSED] not_in_clone_mode
[10:37:50] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:37:50] =============== drm_test_check_valid_clones  ===============
[10:37:50] [PASSED] not_in_clone_mode
[10:37:50] [PASSED] valid_clone
[10:37:50] [PASSED] invalid_clone
[10:37:50] =========== [PASSED] drm_test_check_valid_clones ===========
[10:37:50] ============= [PASSED] drm_validate_clone_mode =============
[10:37:50] ============= drm_validate_modeset (1 subtest) =============
[10:37:50] [PASSED] drm_test_check_connector_changed_modeset
[10:37:50] ============== [PASSED] drm_validate_modeset ===============
[10:37:50] ====== drm_test_bridge_get_current_state (2 subtests) ======
[10:37:50] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:37:50] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[10:37:50] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:37:50] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:37:50] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:37:50] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:37:50] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[10:37:50] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:37:50] ============== drm_bridge_alloc (2 subtests) ===============
[10:37:50] [PASSED] drm_test_drm_bridge_alloc_basic
[10:37:50] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:37:50] ================ [PASSED] drm_bridge_alloc =================
[10:37:50] ============= drm_cmdline_parser (40 subtests) =============
[10:37:50] [PASSED] drm_test_cmdline_force_d_only
[10:37:50] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:37:50] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:37:50] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:37:50] [PASSED] drm_test_cmdline_force_e_only
[10:37:50] [PASSED] drm_test_cmdline_res
[10:37:50] [PASSED] drm_test_cmdline_res_vesa
[10:37:50] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:37:50] [PASSED] drm_test_cmdline_res_rblank
[10:37:50] [PASSED] drm_test_cmdline_res_bpp
[10:37:50] [PASSED] drm_test_cmdline_res_refresh
[10:37:50] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:37:50] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:37:50] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:37:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:37:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:37:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:37:50] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:37:50] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:37:50] [PASSED] drm_test_cmdline_res_margins_force_on
[10:37:50] [PASSED] drm_test_cmdline_res_vesa_margins
[10:37:50] [PASSED] drm_test_cmdline_name
[10:37:50] [PASSED] drm_test_cmdline_name_bpp
[10:37:50] [PASSED] drm_test_cmdline_name_option
[10:37:50] [PASSED] drm_test_cmdline_name_bpp_option
[10:37:50] [PASSED] drm_test_cmdline_rotate_0
[10:37:50] [PASSED] drm_test_cmdline_rotate_90
[10:37:50] [PASSED] drm_test_cmdline_rotate_180
[10:37:50] [PASSED] drm_test_cmdline_rotate_270
[10:37:50] [PASSED] drm_test_cmdline_hmirror
[10:37:50] [PASSED] drm_test_cmdline_vmirror
[10:37:50] [PASSED] drm_test_cmdline_margin_options
[10:37:50] [PASSED] drm_test_cmdline_multiple_options
[10:37:50] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:37:50] [PASSED] drm_test_cmdline_extra_and_option
[10:37:50] [PASSED] drm_test_cmdline_freestanding_options
[10:37:50] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:37:50] [PASSED] drm_test_cmdline_panel_orientation
[10:37:50] ================ drm_test_cmdline_invalid  =================
[10:37:50] [PASSED] margin_only
[10:37:50] [PASSED] interlace_only
[10:37:50] [PASSED] res_missing_x
[10:37:50] [PASSED] res_missing_y
[10:37:50] [PASSED] res_bad_y
[10:37:50] [PASSED] res_missing_y_bpp
[10:37:50] [PASSED] res_bad_bpp
[10:37:50] [PASSED] res_bad_refresh
[10:37:50] [PASSED] res_bpp_refresh_force_on_off
[10:37:50] [PASSED] res_invalid_mode
[10:37:50] [PASSED] res_bpp_wrong_place_mode
[10:37:50] [PASSED] name_bpp_refresh
[10:37:50] [PASSED] name_refresh
[10:37:50] [PASSED] name_refresh_wrong_mode
[10:37:50] [PASSED] name_refresh_invalid_mode
[10:37:50] [PASSED] rotate_multiple
[10:37:50] [PASSED] rotate_invalid_val
[10:37:50] [PASSED] rotate_truncated
[10:37:50] [PASSED] invalid_option
[10:37:50] [PASSED] invalid_tv_option
[10:37:50] [PASSED] truncated_tv_option
[10:37:50] ============ [PASSED] drm_test_cmdline_invalid =============
[10:37:50] =============== drm_test_cmdline_tv_options  ===============
[10:37:50] [PASSED] NTSC
[10:37:50] [PASSED] NTSC_443
[10:37:50] [PASSED] NTSC_J
[10:37:50] [PASSED] PAL
[10:37:50] [PASSED] PAL_M
[10:37:50] [PASSED] PAL_N
[10:37:50] [PASSED] SECAM
[10:37:50] [PASSED] MONO_525
[10:37:50] [PASSED] MONO_625
[10:37:50] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:37:50] =============== [PASSED] drm_cmdline_parser ================
[10:37:50] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:37:50] [PASSED] drm_test_connector_hdmi_init_valid
[10:37:50] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:37:50] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:37:50] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:37:50] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:37:50] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:37:50] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:37:50] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:37:50] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[10:37:50] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:37:50] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:37:50] [PASSED] supported_formats=0x3 yuv420_allowed=1
[10:37:50] [PASSED] supported_formats=0x3 yuv420_allowed=0
[10:37:50] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:37:50] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:37:50] [PASSED] drm_test_connector_hdmi_init_null_product
[10:37:50] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:37:50] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:37:50] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:37:50] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:37:50] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:37:50] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:37:50] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:37:50] ========= drm_test_connector_hdmi_init_type_valid  =========
[10:37:50] [PASSED] HDMI-A
[10:37:50] [PASSED] HDMI-B
[10:37:50] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:37:50] ======== drm_test_connector_hdmi_init_type_invalid  ========
[10:37:50] [PASSED] Unknown
[10:37:50] [PASSED] VGA
[10:37:50] [PASSED] DVI-I
[10:37:50] [PASSED] DVI-D
[10:37:50] [PASSED] DVI-A
[10:37:50] [PASSED] Composite
[10:37:50] [PASSED] SVIDEO
[10:37:50] [PASSED] LVDS
[10:37:50] [PASSED] Component
[10:37:50] [PASSED] DIN
[10:37:50] [PASSED] DP
[10:37:50] [PASSED] TV
[10:37:50] [PASSED] eDP
[10:37:50] [PASSED] Virtual
[10:37:50] [PASSED] DSI
[10:37:50] [PASSED] DPI
[10:37:50] [PASSED] Writeback
[10:37:50] [PASSED] SPI
[10:37:50] [PASSED] USB
[10:37:50] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:37:50] ============ [PASSED] drmm_connector_hdmi_init =============
[10:37:50] ============= drmm_connector_init (3 subtests) =============
[10:37:50] [PASSED] drm_test_drmm_connector_init
[10:37:50] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:37:50] ========= drm_test_drmm_connector_init_type_valid  =========
[10:37:50] [PASSED] Unknown
[10:37:50] [PASSED] VGA
[10:37:50] [PASSED] DVI-I
[10:37:50] [PASSED] DVI-D
[10:37:50] [PASSED] DVI-A
[10:37:50] [PASSED] Composite
[10:37:50] [PASSED] SVIDEO
[10:37:50] [PASSED] LVDS
[10:37:50] [PASSED] Component
[10:37:50] [PASSED] DIN
[10:37:50] [PASSED] DP
[10:37:50] [PASSED] HDMI-A
[10:37:50] [PASSED] HDMI-B
[10:37:50] [PASSED] TV
[10:37:50] [PASSED] eDP
[10:37:50] [PASSED] Virtual
[10:37:50] [PASSED] DSI
[10:37:50] [PASSED] DPI
[10:37:50] [PASSED] Writeback
[10:37:50] [PASSED] SPI
[10:37:50] [PASSED] USB
[10:37:50] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:37:50] =============== [PASSED] drmm_connector_init ===============
[10:37:50] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_init
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:37:50] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[10:37:50] [PASSED] Unknown
[10:37:50] [PASSED] VGA
[10:37:50] [PASSED] DVI-I
[10:37:50] [PASSED] DVI-D
[10:37:50] [PASSED] DVI-A
[10:37:50] [PASSED] Composite
[10:37:50] [PASSED] SVIDEO
[10:37:50] [PASSED] LVDS
[10:37:50] [PASSED] Component
[10:37:50] [PASSED] DIN
[10:37:50] [PASSED] DP
[10:37:50] [PASSED] HDMI-A
[10:37:50] [PASSED] HDMI-B
[10:37:50] [PASSED] TV
[10:37:50] [PASSED] eDP
[10:37:50] [PASSED] Virtual
[10:37:50] [PASSED] DSI
[10:37:50] [PASSED] DPI
[10:37:50] [PASSED] Writeback
[10:37:50] [PASSED] SPI
[10:37:50] [PASSED] USB
[10:37:50] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:37:50] ======== drm_test_drm_connector_dynamic_init_name  =========
[10:37:50] [PASSED] Unknown
[10:37:50] [PASSED] VGA
[10:37:50] [PASSED] DVI-I
[10:37:50] [PASSED] DVI-D
[10:37:50] [PASSED] DVI-A
[10:37:50] [PASSED] Composite
[10:37:50] [PASSED] SVIDEO
[10:37:50] [PASSED] LVDS
[10:37:50] [PASSED] Component
[10:37:50] [PASSED] DIN
[10:37:50] [PASSED] DP
[10:37:50] [PASSED] HDMI-A
[10:37:50] [PASSED] HDMI-B
[10:37:50] [PASSED] TV
[10:37:50] [PASSED] eDP
[10:37:50] [PASSED] Virtual
[10:37:50] [PASSED] DSI
[10:37:50] [PASSED] DPI
[10:37:50] [PASSED] Writeback
[10:37:50] [PASSED] SPI
[10:37:50] [PASSED] USB
[10:37:50] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:37:50] =========== [PASSED] drm_connector_dynamic_init ============
[10:37:50] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:37:50] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:37:50] ======= drm_connector_dynamic_register (7 subtests) ========
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:37:50] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:37:50] ========= [PASSED] drm_connector_dynamic_register ==========
[10:37:50] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:37:50] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:37:50] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:37:50] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:37:50] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:37:50] ========== drm_test_get_tv_mode_from_name_valid  ===========
[10:37:50] [PASSED] NTSC
[10:37:50] [PASSED] NTSC-443
[10:37:50] [PASSED] NTSC-J
[10:37:50] [PASSED] PAL
[10:37:50] [PASSED] PAL-M
[10:37:50] [PASSED] PAL-N
[10:37:50] [PASSED] SECAM
[10:37:50] [PASSED] Mono
[10:37:50] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:37:50] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:37:50] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:37:50] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:37:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:37:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:37:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:37:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:37:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:37:50] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:37:50] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[10:37:50] [PASSED] VIC 96
[10:37:50] [PASSED] VIC 97
[10:37:50] [PASSED] VIC 101
[10:37:50] [PASSED] VIC 102
[10:37:50] [PASSED] VIC 106
[10:37:50] [PASSED] VIC 107
[10:37:50] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:37:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:37:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:37:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:37:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:37:50] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:37:50] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:37:50] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:37:50] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[10:37:50] [PASSED] Automatic
[10:37:50] [PASSED] Full
[10:37:50] [PASSED] Limited 16:235
[10:37:50] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:37:50] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:37:50] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:37:50] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:37:50] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[10:37:50] [PASSED] RGB
[10:37:50] [PASSED] YUV 4:2:0
[10:37:50] [PASSED] YUV 4:2:2
[10:37:50] [PASSED] YUV 4:4:4
[10:37:50] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:37:50] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:37:50] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:37:50] ============= drm_damage_helper (21 subtests) ==============
[10:37:50] [PASSED] drm_test_damage_iter_no_damage
[10:37:50] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:37:50] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:37:50] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:37:50] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:37:50] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:37:50] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:37:50] [PASSED] drm_test_damage_iter_simple_damage
[10:37:50] [PASSED] drm_test_damage_iter_single_damage
[10:37:50] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:37:50] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:37:50] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:37:50] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:37:50] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:37:50] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:37:50] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:37:50] [PASSED] drm_test_damage_iter_damage
[10:37:50] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:37:50] [PASSED] drm_test_damage_iter_damage_one_outside
[10:37:50] [PASSED] drm_test_damage_iter_damage_src_moved
[10:37:50] [PASSED] drm_test_damage_iter_damage_not_visible
[10:37:50] ================ [PASSED] drm_damage_helper ================
[10:37:50] ============== drm_dp_mst_helper (3 subtests) ==============
[10:37:50] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[10:37:50] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:37:50] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:37:50] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:37:50] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:37:50] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:37:50] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:37:50] ============== drm_test_dp_mst_calc_pbn_div  ===============
[10:37:50] [PASSED] Link rate 2000000 lane count 4
[10:37:50] [PASSED] Link rate 2000000 lane count 2
[10:37:50] [PASSED] Link rate 2000000 lane count 1
[10:37:50] [PASSED] Link rate 1350000 lane count 4
[10:37:50] [PASSED] Link rate 1350000 lane count 2
[10:37:50] [PASSED] Link rate 1350000 lane count 1
[10:37:50] [PASSED] Link rate 1000000 lane count 4
[10:37:50] [PASSED] Link rate 1000000 lane count 2
[10:37:50] [PASSED] Link rate 1000000 lane count 1
[10:37:50] [PASSED] Link rate 810000 lane count 4
[10:37:50] [PASSED] Link rate 810000 lane count 2
[10:37:50] [PASSED] Link rate 810000 lane count 1
[10:37:50] [PASSED] Link rate 540000 lane count 4
[10:37:50] [PASSED] Link rate 540000 lane count 2
[10:37:50] [PASSED] Link rate 540000 lane count 1
[10:37:50] [PASSED] Link rate 270000 lane count 4
[10:37:50] [PASSED] Link rate 270000 lane count 2
[10:37:50] [PASSED] Link rate 270000 lane count 1
[10:37:50] [PASSED] Link rate 162000 lane count 4
[10:37:50] [PASSED] Link rate 162000 lane count 2
[10:37:50] [PASSED] Link rate 162000 lane count 1
[10:37:50] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:37:50] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[10:37:50] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:37:50] [PASSED] DP_POWER_UP_PHY with port number
[10:37:50] [PASSED] DP_POWER_DOWN_PHY with port number
[10:37:50] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:37:50] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:37:50] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:37:50] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:37:50] [PASSED] DP_QUERY_PAYLOAD with port number
[10:37:50] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:37:50] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:37:50] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:37:50] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:37:50] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:37:50] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:37:50] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:37:50] [PASSED] DP_REMOTE_I2C_READ with port number
[10:37:50] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:37:50] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:37:50] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:37:50] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:37:50] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:37:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:37:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:37:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:37:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:37:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:37:50] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:37:50] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:37:50] ================ [PASSED] drm_dp_mst_helper ================
[10:37:50] ================== drm_exec (7 subtests) ===================
[10:37:50] [PASSED] sanitycheck
[10:37:50] [PASSED] test_lock
[10:37:50] [PASSED] test_lock_unlock
[10:37:50] [PASSED] test_duplicates
[10:37:50] [PASSED] test_prepare
[10:37:50] [PASSED] test_prepare_array
[10:37:50] [PASSED] test_multiple_loops
[10:37:50] ==================== [PASSED] drm_exec =====================
[10:37:50] =========== drm_format_helper_test (17 subtests) ===========
[10:37:50] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:37:50] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:37:50] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:37:50] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:37:50] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:37:50] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:37:50] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:37:50] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:37:50] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:37:50] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:37:50] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:37:50] ============== drm_test_fb_xrgb8888_to_mono  ===============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:37:50] ==================== drm_test_fb_swab  =====================
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ================ [PASSED] drm_test_fb_swab =================
[10:37:50] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:37:50] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[10:37:50] [PASSED] single_pixel_source_buffer
[10:37:50] [PASSED] single_pixel_clip_rectangle
[10:37:50] [PASSED] well_known_colors
[10:37:50] [PASSED] destination_pitch
[10:37:50] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:37:50] ================= drm_test_fb_clip_offset  =================
[10:37:50] [PASSED] pass through
[10:37:50] [PASSED] horizontal offset
[10:37:50] [PASSED] vertical offset
[10:37:50] [PASSED] horizontal and vertical offset
[10:37:50] [PASSED] horizontal offset (custom pitch)
[10:37:50] [PASSED] vertical offset (custom pitch)
[10:37:50] [PASSED] horizontal and vertical offset (custom pitch)
[10:37:50] ============= [PASSED] drm_test_fb_clip_offset =============
[10:37:50] =================== drm_test_fb_memcpy  ====================
[10:37:50] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:37:50] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:37:50] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:37:50] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:37:50] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:37:50] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:37:50] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:37:50] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:37:50] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:37:50] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:37:50] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:37:50] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:37:50] =============== [PASSED] drm_test_fb_memcpy ================
[10:37:50] ============= [PASSED] drm_format_helper_test ==============
[10:37:50] ================= drm_format (18 subtests) =================
[10:37:50] [PASSED] drm_test_format_block_width_invalid
[10:37:50] [PASSED] drm_test_format_block_width_one_plane
[10:37:50] [PASSED] drm_test_format_block_width_two_plane
[10:37:50] [PASSED] drm_test_format_block_width_three_plane
[10:37:50] [PASSED] drm_test_format_block_width_tiled
[10:37:50] [PASSED] drm_test_format_block_height_invalid
[10:37:50] [PASSED] drm_test_format_block_height_one_plane
[10:37:50] [PASSED] drm_test_format_block_height_two_plane
[10:37:50] [PASSED] drm_test_format_block_height_three_plane
[10:37:50] [PASSED] drm_test_format_block_height_tiled
[10:37:50] [PASSED] drm_test_format_min_pitch_invalid
[10:37:50] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:37:50] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:37:50] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:37:50] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:37:50] [PASSED] drm_test_format_min_pitch_two_plane
[10:37:50] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:37:50] [PASSED] drm_test_format_min_pitch_tiled
[10:37:50] =================== [PASSED] drm_format ====================
[10:37:50] ============== drm_framebuffer (10 subtests) ===============
[10:37:50] ========== drm_test_framebuffer_check_src_coords  ==========
[10:37:50] [PASSED] Success: source fits into fb
[10:37:50] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:37:50] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:37:50] [PASSED] Fail: overflowing fb with source width
[10:37:50] [PASSED] Fail: overflowing fb with source height
[10:37:50] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:37:50] [PASSED] drm_test_framebuffer_cleanup
[10:37:50] =============== drm_test_framebuffer_create  ===============
[10:37:50] [PASSED] ABGR8888 normal sizes
[10:37:50] [PASSED] ABGR8888 max sizes
[10:37:50] [PASSED] ABGR8888 pitch greater than min required
[10:37:50] [PASSED] ABGR8888 pitch less than min required
[10:37:50] [PASSED] ABGR8888 Invalid width
[10:37:50] [PASSED] ABGR8888 Invalid buffer handle
[10:37:50] [PASSED] No pixel format
[10:37:50] [PASSED] ABGR8888 Width 0
[10:37:50] [PASSED] ABGR8888 Height 0
[10:37:50] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:37:50] [PASSED] ABGR8888 Large buffer offset
[10:37:50] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:37:50] [PASSED] ABGR8888 Invalid flag
[10:37:50] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:37:50] [PASSED] ABGR8888 Valid buffer modifier
[10:37:50] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:37:50] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:37:50] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:37:50] [PASSED] NV12 Normal sizes
[10:37:50] [PASSED] NV12 Max sizes
[10:37:50] [PASSED] NV12 Invalid pitch
[10:37:50] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:37:50] [PASSED] NV12 different  modifier per-plane
[10:37:50] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:37:50] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:37:50] [PASSED] NV12 Modifier for inexistent plane
[10:37:50] [PASSED] NV12 Handle for inexistent plane
[10:37:50] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:37:50] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:37:50] [PASSED] YVU420 Normal sizes
[10:37:50] [PASSED] YVU420 Max sizes
[10:37:50] [PASSED] YVU420 Invalid pitch
[10:37:50] [PASSED] YVU420 Different pitches
[10:37:50] [PASSED] YVU420 Different buffer offsets/pitches
[10:37:50] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:37:50] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:37:50] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:37:50] [PASSED] YVU420 Valid modifier
[10:37:50] [PASSED] YVU420 Different modifiers per plane
[10:37:50] [PASSED] YVU420 Modifier for inexistent plane
[10:37:50] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:37:50] [PASSED] X0L2 Normal sizes
[10:37:50] [PASSED] X0L2 Max sizes
[10:37:50] [PASSED] X0L2 Invalid pitch
[10:37:50] [PASSED] X0L2 Pitch greater than minimum required
[10:37:50] [PASSED] X0L2 Handle for inexistent plane
[10:37:50] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:37:50] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:37:50] [PASSED] X0L2 Valid modifier
[10:37:50] [PASSED] X0L2 Modifier for inexistent plane
[10:37:50] =========== [PASSED] drm_test_framebuffer_create ===========
[10:37:50] [PASSED] drm_test_framebuffer_free
[10:37:50] [PASSED] drm_test_framebuffer_init
[10:37:50] [PASSED] drm_test_framebuffer_init_bad_format
[10:37:50] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:37:50] [PASSED] drm_test_framebuffer_lookup
[10:37:50] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:37:50] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:37:50] ================= [PASSED] drm_framebuffer =================
[10:37:50] ================ drm_gem_shmem (8 subtests) ================
[10:37:50] [PASSED] drm_gem_shmem_test_obj_create
[10:37:50] [PASSED] drm_gem_shmem_test_obj_create_private
[10:37:50] [PASSED] drm_gem_shmem_test_pin_pages
[10:37:50] [PASSED] drm_gem_shmem_test_vmap
[10:37:50] [PASSED] drm_gem_shmem_test_get_sg_table
[10:37:50] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:37:50] [PASSED] drm_gem_shmem_test_madvise
[10:37:50] [PASSED] drm_gem_shmem_test_purge
[10:37:50] ================== [PASSED] drm_gem_shmem ==================
[10:37:50] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[10:37:50] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:37:50] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:37:50] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:37:50] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:37:50] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:37:50] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:37:50] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[10:37:50] [PASSED] Automatic
[10:37:50] [PASSED] Full
[10:37:50] [PASSED] Limited 16:235
[10:37:50] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:37:50] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:37:50] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:37:50] [PASSED] drm_test_check_disable_connector
[10:37:50] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:37:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:37:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:37:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:37:50] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:37:50] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:37:50] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:37:50] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:37:50] [PASSED] drm_test_check_output_bpc_dvi
[10:37:50] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:37:50] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:37:50] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:37:50] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:37:50] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:37:50] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:37:50] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:37:50] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:37:50] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:37:50] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:37:50] [PASSED] drm_test_check_broadcast_rgb_value
[10:37:50] [PASSED] drm_test_check_bpc_8_value
[10:37:50] [PASSED] drm_test_check_bpc_10_value
[10:37:50] [PASSED] drm_test_check_bpc_12_value
[10:37:50] [PASSED] drm_test_check_format_value
[10:37:50] [PASSED] drm_test_check_tmds_char_value
[10:37:50] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:37:50] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:37:50] [PASSED] drm_test_check_mode_valid
[10:37:50] [PASSED] drm_test_check_mode_valid_reject
[10:37:50] [PASSED] drm_test_check_mode_valid_reject_rate
[10:37:50] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:37:50] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:37:50] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:37:50] [PASSED] drm_test_check_infoframes
[10:37:50] [PASSED] drm_test_check_reject_avi_infoframe
[10:37:50] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:37:50] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:37:50] [PASSED] drm_test_check_reject_audio_infoframe
[10:37:50] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:37:50] ================= drm_managed (2 subtests) =================
[10:37:50] [PASSED] drm_test_managed_release_action
[10:37:50] [PASSED] drm_test_managed_run_action
[10:37:50] =================== [PASSED] drm_managed ===================
[10:37:50] =================== drm_mm (6 subtests) ====================
[10:37:50] [PASSED] drm_test_mm_init
[10:37:50] [PASSED] drm_test_mm_debug
[10:37:50] [PASSED] drm_test_mm_align32
[10:37:50] [PASSED] drm_test_mm_align64
[10:37:50] [PASSED] drm_test_mm_lowest
[10:37:50] [PASSED] drm_test_mm_highest
[10:37:50] ===================== [PASSED] drm_mm ======================
[10:37:50] ============= drm_modes_analog_tv (5 subtests) =============
[10:37:50] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:37:50] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:37:50] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:37:50] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:37:50] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:37:50] =============== [PASSED] drm_modes_analog_tv ===============
[10:37:50] ============== drm_plane_helper (2 subtests) ===============
[10:37:50] =============== drm_test_check_plane_state  ================
[10:37:50] [PASSED] clipping_simple
[10:37:50] [PASSED] clipping_rotate_reflect
[10:37:50] [PASSED] positioning_simple
[10:37:50] [PASSED] upscaling
[10:37:50] [PASSED] downscaling
[10:37:50] [PASSED] rounding1
[10:37:50] [PASSED] rounding2
[10:37:50] [PASSED] rounding3
[10:37:50] [PASSED] rounding4
[10:37:50] =========== [PASSED] drm_test_check_plane_state ============
[10:37:50] =========== drm_test_check_invalid_plane_state  ============
[10:37:50] [PASSED] positioning_invalid
[10:37:50] [PASSED] upscaling_invalid
[10:37:50] [PASSED] downscaling_invalid
[10:37:50] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:37:50] ================ [PASSED] drm_plane_helper =================
[10:37:50] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:37:50] ====== drm_test_connector_helper_tv_get_modes_check  =======
[10:37:50] [PASSED] None
[10:37:50] [PASSED] PAL
[10:37:50] [PASSED] NTSC
[10:37:50] [PASSED] Both, NTSC Default
[10:37:50] [PASSED] Both, PAL Default
[10:37:50] [PASSED] Both, NTSC Default, with PAL on command-line
[10:37:50] [PASSED] Both, PAL Default, with NTSC on command-line
[10:37:50] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:37:50] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:37:50] ================== drm_rect (9 subtests) ===================
[10:37:50] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:37:50] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:37:50] [PASSED] drm_test_rect_clip_scaled_clipped
[10:37:50] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:37:50] ================= drm_test_rect_intersect  =================
[10:37:50] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:37:50] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:37:50] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:37:50] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:37:50] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:37:50] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:37:50] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:37:50] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:37:50] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:37:50] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:37:50] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:37:50] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:37:50] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:37:50] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:37:50] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:37:50] ============= [PASSED] drm_test_rect_intersect =============
[10:37:50] ================ drm_test_rect_calc_hscale  ================
[10:37:50] [PASSED] normal use
[10:37:50] [PASSED] out of max range
[10:37:50] [PASSED] out of min range
[10:37:50] [PASSED] zero dst
[10:37:50] [PASSED] negative src
[10:37:50] [PASSED] negative dst
[10:37:50] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:37:50] ================ drm_test_rect_calc_vscale  ================
[10:37:50] [PASSED] normal use
[10:37:50] [PASSED] out of max range
[10:37:50] [PASSED] out of min range
[10:37:50] [PASSED] zero dst
[10:37:50] [PASSED] negative src
[10:37:50] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[10:37:50] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:37:50] ================== drm_test_rect_rotate  ===================
[10:37:50] [PASSED] reflect-x
[10:37:50] [PASSED] reflect-y
[10:37:50] [PASSED] rotate-0
[10:37:50] [PASSED] rotate-90
[10:37:50] [PASSED] rotate-180
[10:37:50] [PASSED] rotate-270
[10:37:50] ============== [PASSED] drm_test_rect_rotate ===============
[10:37:50] ================ drm_test_rect_rotate_inv  =================
[10:37:50] [PASSED] reflect-x
[10:37:50] [PASSED] reflect-y
[10:37:50] [PASSED] rotate-0
[10:37:50] [PASSED] rotate-90
[10:37:50] [PASSED] rotate-180
[10:37:50] [PASSED] rotate-270
[10:37:50] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:37:50] ==================== [PASSED] drm_rect =====================
[10:37:50] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:37:50] ============ drm_test_sysfb_build_fourcc_list  =============
[10:37:50] [PASSED] no native formats
[10:37:50] [PASSED] XRGB8888 as native format
[10:37:50] [PASSED] remove duplicates
[10:37:50] [PASSED] convert alpha formats
[10:37:50] [PASSED] random formats
[10:37:50] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:37:50] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:37:50] ================== drm_fixp (2 subtests) ===================
[10:37:50] [PASSED] drm_test_int2fixp
[10:37:50] [PASSED] drm_test_sm2fixp
[10:37:50] ==================== [PASSED] drm_fixp =====================
[10:37:50] ============================================================
[10:37:50] Testing complete. Ran 621 tests: passed: 621
[10:37:50] Elapsed time: 25.909s total, 1.712s configuring, 24.016s building, 0.179s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:37:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:37:51] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:38:01] Starting KUnit Kernel (1/1)...
[10:38:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:38:01] ================= ttm_device (5 subtests) ==================
[10:38:01] [PASSED] ttm_device_init_basic
[10:38:01] [PASSED] ttm_device_init_multiple
[10:38:01] [PASSED] ttm_device_fini_basic
[10:38:01] [PASSED] ttm_device_init_no_vma_man
[10:38:01] ================== ttm_device_init_pools  ==================
[10:38:01] [PASSED] No DMA allocations, no DMA32 required
[10:38:01] [PASSED] DMA allocations, DMA32 required
[10:38:01] [PASSED] No DMA allocations, DMA32 required
[10:38:01] [PASSED] DMA allocations, no DMA32 required
[10:38:01] ============== [PASSED] ttm_device_init_pools ==============
[10:38:01] =================== [PASSED] ttm_device ====================
[10:38:01] ================== ttm_pool (8 subtests) ===================
[10:38:01] ================== ttm_pool_alloc_basic  ===================
[10:38:01] [PASSED] One page
[10:38:01] [PASSED] More than one page
[10:38:01] [PASSED] Above the allocation limit
[10:38:01] [PASSED] One page, with coherent DMA mappings enabled
[10:38:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:38:01] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:38:01] ============== ttm_pool_alloc_basic_dma_addr  ==============
[10:38:01] [PASSED] One page
[10:38:01] [PASSED] More than one page
[10:38:01] [PASSED] Above the allocation limit
[10:38:01] [PASSED] One page, with coherent DMA mappings enabled
[10:38:01] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:38:01] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:38:01] [PASSED] ttm_pool_alloc_order_caching_match
[10:38:01] [PASSED] ttm_pool_alloc_caching_mismatch
[10:38:01] [PASSED] ttm_pool_alloc_order_mismatch
[10:38:01] [PASSED] ttm_pool_free_dma_alloc
[10:38:01] [PASSED] ttm_pool_free_no_dma_alloc
[10:38:01] [PASSED] ttm_pool_fini_basic
[10:38:01] ==================== [PASSED] ttm_pool =====================
[10:38:01] ================ ttm_resource (8 subtests) =================
[10:38:01] ================= ttm_resource_init_basic  =================
[10:38:01] [PASSED] Init resource in TTM_PL_SYSTEM
[10:38:01] [PASSED] Init resource in TTM_PL_VRAM
[10:38:01] [PASSED] Init resource in a private placement
[10:38:01] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:38:01] ============= [PASSED] ttm_resource_init_basic =============
[10:38:01] [PASSED] ttm_resource_init_pinned
[10:38:01] [PASSED] ttm_resource_fini_basic
[10:38:01] [PASSED] ttm_resource_manager_init_basic
[10:38:01] [PASSED] ttm_resource_manager_usage_basic
[10:38:01] [PASSED] ttm_resource_manager_set_used_basic
[10:38:01] [PASSED] ttm_sys_man_alloc_basic
[10:38:01] [PASSED] ttm_sys_man_free_basic
[10:38:01] ================== [PASSED] ttm_resource ===================
[10:38:01] =================== ttm_tt (15 subtests) ===================
[10:38:01] ==================== ttm_tt_init_basic  ====================
[10:38:01] [PASSED] Page-aligned size
[10:38:01] [PASSED] Extra pages requested
[10:38:01] ================ [PASSED] ttm_tt_init_basic ================
[10:38:01] [PASSED] ttm_tt_init_misaligned
[10:38:01] [PASSED] ttm_tt_fini_basic
[10:38:01] [PASSED] ttm_tt_fini_sg
[10:38:01] [PASSED] ttm_tt_fini_shmem
[10:38:01] [PASSED] ttm_tt_create_basic
[10:38:01] [PASSED] ttm_tt_create_invalid_bo_type
[10:38:01] [PASSED] ttm_tt_create_ttm_exists
[10:38:01] [PASSED] ttm_tt_create_failed
[10:38:01] [PASSED] ttm_tt_destroy_basic
[10:38:01] [PASSED] ttm_tt_populate_null_ttm
[10:38:01] [PASSED] ttm_tt_populate_populated_ttm
[10:38:01] [PASSED] ttm_tt_unpopulate_basic
[10:38:01] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:38:01] [PASSED] ttm_tt_swapin_basic
[10:38:01] ===================== [PASSED] ttm_tt ======================
[10:38:01] =================== ttm_bo (14 subtests) ===================
[10:38:01] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[10:38:01] [PASSED] Cannot be interrupted and sleeps
[10:38:01] [PASSED] Cannot be interrupted, locks straight away
[10:38:01] [PASSED] Can be interrupted, sleeps
[10:38:01] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:38:01] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:38:01] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:38:01] [PASSED] ttm_bo_reserve_double_resv
[10:38:01] [PASSED] ttm_bo_reserve_interrupted
[10:38:01] [PASSED] ttm_bo_reserve_deadlock
[10:38:01] [PASSED] ttm_bo_unreserve_basic
[10:38:01] [PASSED] ttm_bo_unreserve_pinned
[10:38:01] [PASSED] ttm_bo_unreserve_bulk
[10:38:01] [PASSED] ttm_bo_fini_basic
[10:38:01] [PASSED] ttm_bo_fini_shared_resv
[10:38:01] [PASSED] ttm_bo_pin_basic
[10:38:01] [PASSED] ttm_bo_pin_unpin_resource
[10:38:01] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:38:01] ===================== [PASSED] ttm_bo ======================
[10:38:01] ============== ttm_bo_validate (21 subtests) ===============
[10:38:01] ============== ttm_bo_init_reserved_sys_man  ===============
[10:38:01] [PASSED] Buffer object for userspace
[10:38:01] [PASSED] Kernel buffer object
[10:38:01] [PASSED] Shared buffer object
[10:38:01] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:38:01] ============== ttm_bo_init_reserved_mock_man  ==============
[10:38:01] [PASSED] Buffer object for userspace
[10:38:01] [PASSED] Kernel buffer object
[10:38:01] [PASSED] Shared buffer object
[10:38:01] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:38:01] [PASSED] ttm_bo_init_reserved_resv
[10:38:01] ================== ttm_bo_validate_basic  ==================
[10:38:01] [PASSED] Buffer object for userspace
[10:38:01] [PASSED] Kernel buffer object
[10:38:01] [PASSED] Shared buffer object
[10:38:01] ============== [PASSED] ttm_bo_validate_basic ==============
[10:38:01] [PASSED] ttm_bo_validate_invalid_placement
[10:38:01] ============= ttm_bo_validate_same_placement  ==============
[10:38:01] [PASSED] System manager
[10:38:01] [PASSED] VRAM manager
[10:38:01] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:38:01] [PASSED] ttm_bo_validate_failed_alloc
[10:38:01] [PASSED] ttm_bo_validate_pinned
[10:38:01] [PASSED] ttm_bo_validate_busy_placement
[10:38:01] ================ ttm_bo_validate_multihop  =================
[10:38:01] [PASSED] Buffer object for userspace
[10:38:01] [PASSED] Kernel buffer object
[10:38:01] [PASSED] Shared buffer object
[10:38:01] ============ [PASSED] ttm_bo_validate_multihop =============
[10:38:01] ========== ttm_bo_validate_no_placement_signaled  ==========
[10:38:01] [PASSED] Buffer object in system domain, no page vector
[10:38:01] [PASSED] Buffer object in system domain with an existing page vector
[10:38:01] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:38:01] ======== ttm_bo_validate_no_placement_not_signaled  ========
[10:38:01] [PASSED] Buffer object for userspace
[10:38:01] [PASSED] Kernel buffer object
[10:38:01] [PASSED] Shared buffer object
[10:38:01] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:38:01] [PASSED] ttm_bo_validate_move_fence_signaled
[10:38:01] ========= ttm_bo_validate_move_fence_not_signaled  =========
[10:38:01] [PASSED] Waits for GPU
[10:38:01] [PASSED] Tries to lock straight away
[10:38:01] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:38:01] [PASSED] ttm_bo_validate_happy_evict
[10:38:01] [PASSED] ttm_bo_validate_all_pinned_evict
[10:38:01] [PASSED] ttm_bo_validate_allowed_only_evict
[10:38:01] [PASSED] ttm_bo_validate_deleted_evict
[10:38:01] [PASSED] ttm_bo_validate_busy_domain_evict
[10:38:01] [PASSED] ttm_bo_validate_evict_gutting
[10:38:01] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[10:38:01] ================= [PASSED] ttm_bo_validate =================
[10:38:01] ============================================================
[10:38:01] Testing complete. Ran 101 tests: passed: 101
[10:38:01] Elapsed time: 11.356s total, 1.729s configuring, 9.412s building, 0.179s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

Re: [PATCH v1 0/6] Introduce Xe PCIe FLR

[Jani Nikula]

On Tue, 24 Feb 2026, Raag Jadav <raag.jadav@intel.com> wrote:
> Here's my humble attempt at introducing PCIe FLR support in xe driver.
> This is ofcourse a half baked implementation and only limited to reloading
> uC firmwares. This needs to be extended for a lot of different components
> which I've skipped here for my lack of competence, so feel free to join
> in and support them.

It wouldn't hurt to spell out Function Level Reset (FLR) somewhere in
the commit messages and in the xe_pci_err.c file.

BR,
Jani.


>
> PS: This works enough to allow a single exec test run after FLR but it
> follows with a GuC crash on subsequent runs which I'm still investigating.
>
> Raag Jadav (6):
>   drm/xe/uc_fw: Allow reloading firmware
>   drm/xe/uc: Introduce FLR helpers
>   drm/xe/irq: Introduce FLR helper
>   drm/xe: Introduce xe_device_assert_lmem_ready()
>   drm/xe/bo_evict: Introduce xe_bo_restore_map()
>   drm/xe/pci: Introduce PCIe FLR
>
>  drivers/gpu/drm/xe/Makefile      |   1 +
>  drivers/gpu/drm/xe/xe_bo_evict.c |  34 +++++--
>  drivers/gpu/drm/xe/xe_bo_evict.h |   2 +
>  drivers/gpu/drm/xe/xe_device.c   |   4 +-
>  drivers/gpu/drm/xe/xe_device.h   |   1 +
>  drivers/gpu/drm/xe/xe_gsc.c      |  15 ++++
>  drivers/gpu/drm/xe/xe_gsc.h      |   1 +
>  drivers/gpu/drm/xe/xe_gt.c       |  10 +++
>  drivers/gpu/drm/xe/xe_gt.h       |   2 +
>  drivers/gpu/drm/xe/xe_guc.c      |  16 ++++
>  drivers/gpu/drm/xe/xe_guc.h      |   1 +
>  drivers/gpu/drm/xe/xe_huc.c      |  16 ++++
>  drivers/gpu/drm/xe/xe_huc.h      |   1 +
>  drivers/gpu/drm/xe/xe_irq.c      |   7 +-
>  drivers/gpu/drm/xe/xe_irq.h      |   1 +
>  drivers/gpu/drm/xe/xe_pci.c      |   1 +
>  drivers/gpu/drm/xe/xe_pci.h      |   2 +
>  drivers/gpu/drm/xe/xe_pci_err.c  | 147 +++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_uc.c       |  24 +++++
>  drivers/gpu/drm/xe/xe_uc.h       |   2 +
>  drivers/gpu/drm/xe/xe_uc_fw.c    |  33 +++----
>  drivers/gpu/drm/xe/xe_uc_fw.h    |   1 +
>  22 files changed, 295 insertions(+), 27 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c

-- 
Jani Nikula, Intel

Re: [PATCH v1 0/6] Introduce Xe PCIe FLR

[Raag Jadav]

On Thu, Feb 26, 2026 at 12:28:52PM +0200, Jani Nikula wrote:
> On Tue, 24 Feb 2026, Raag Jadav <raag.jadav@intel.com> wrote:
> > Here's my humble attempt at introducing PCIe FLR support in xe driver.
> > This is ofcourse a half baked implementation and only limited to reloading
> > uC firmwares. This needs to be extended for a lot of different components
> > which I've skipped here for my lack of competence, so feel free to join
> > in and support them.
> 
> It wouldn't hurt to spell out Function Level Reset (FLR) somewhere in
> the commit messages and in the xe_pci_err.c file.

Ofcourse. A paper on acronym burnout had been on my todo list for years.
Never thought I'd be on the other side of the argument :D

Raag

> > PS: This works enough to allow a single exec test run after FLR but it
> > follows with a GuC crash on subsequent runs which I'm still investigating.
> >
> > Raag Jadav (6):
> >   drm/xe/uc_fw: Allow reloading firmware
> >   drm/xe/uc: Introduce FLR helpers
> >   drm/xe/irq: Introduce FLR helper
> >   drm/xe: Introduce xe_device_assert_lmem_ready()
> >   drm/xe/bo_evict: Introduce xe_bo_restore_map()
> >   drm/xe/pci: Introduce PCIe FLR
> >
> >  drivers/gpu/drm/xe/Makefile      |   1 +
> >  drivers/gpu/drm/xe/xe_bo_evict.c |  34 +++++--
> >  drivers/gpu/drm/xe/xe_bo_evict.h |   2 +
> >  drivers/gpu/drm/xe/xe_device.c   |   4 +-
> >  drivers/gpu/drm/xe/xe_device.h   |   1 +
> >  drivers/gpu/drm/xe/xe_gsc.c      |  15 ++++
> >  drivers/gpu/drm/xe/xe_gsc.h      |   1 +
> >  drivers/gpu/drm/xe/xe_gt.c       |  10 +++
> >  drivers/gpu/drm/xe/xe_gt.h       |   2 +
> >  drivers/gpu/drm/xe/xe_guc.c      |  16 ++++
> >  drivers/gpu/drm/xe/xe_guc.h      |   1 +
> >  drivers/gpu/drm/xe/xe_huc.c      |  16 ++++
> >  drivers/gpu/drm/xe/xe_huc.h      |   1 +
> >  drivers/gpu/drm/xe/xe_irq.c      |   7 +-
> >  drivers/gpu/drm/xe/xe_irq.h      |   1 +
> >  drivers/gpu/drm/xe/xe_pci.c      |   1 +
> >  drivers/gpu/drm/xe/xe_pci.h      |   2 +
> >  drivers/gpu/drm/xe/xe_pci_err.c  | 147 +++++++++++++++++++++++++++++++
> >  drivers/gpu/drm/xe/xe_uc.c       |  24 +++++
> >  drivers/gpu/drm/xe/xe_uc.h       |   2 +
> >  drivers/gpu/drm/xe/xe_uc_fw.c    |  33 +++----
> >  drivers/gpu/drm/xe/xe_uc_fw.h    |   1 +
> >  22 files changed, 295 insertions(+), 27 deletions(-)
> >  create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c
> 
> -- 
> Jani Nikula, Intel

Re: [PATCH v1 0/6] Introduce Xe PCIe FLR

[Matthew Auld]

On 24/02/2026 10:25, Raag Jadav wrote:
> Here's my humble attempt at introducing PCIe FLR support in xe driver.
> This is ofcourse a half baked implementation and only limited to reloading
> uC firmwares. This needs to be extended for a lot of different components
> which I've skipped here for my lack of competence, so feel free to join
> in and support them.

I couldn't find where we re-init all the migrate stuff? There is a bunch 
of PPGTT programming that will be lost if VRAM gets wiped. And then also 
the migrate queue/context itself. See xe_migrate_init().

> 
> PS: This works enough to allow a single exec test run after FLR but it
> follows with a GuC crash on subsequent runs which I'm still investigating.
> 
> Raag Jadav (6):
>    drm/xe/uc_fw: Allow reloading firmware
>    drm/xe/uc: Introduce FLR helpers
>    drm/xe/irq: Introduce FLR helper
>    drm/xe: Introduce xe_device_assert_lmem_ready()
>    drm/xe/bo_evict: Introduce xe_bo_restore_map()
>    drm/xe/pci: Introduce PCIe FLR
> 
>   drivers/gpu/drm/xe/Makefile      |   1 +
>   drivers/gpu/drm/xe/xe_bo_evict.c |  34 +++++--
>   drivers/gpu/drm/xe/xe_bo_evict.h |   2 +
>   drivers/gpu/drm/xe/xe_device.c   |   4 +-
>   drivers/gpu/drm/xe/xe_device.h   |   1 +
>   drivers/gpu/drm/xe/xe_gsc.c      |  15 ++++
>   drivers/gpu/drm/xe/xe_gsc.h      |   1 +
>   drivers/gpu/drm/xe/xe_gt.c       |  10 +++
>   drivers/gpu/drm/xe/xe_gt.h       |   2 +
>   drivers/gpu/drm/xe/xe_guc.c      |  16 ++++
>   drivers/gpu/drm/xe/xe_guc.h      |   1 +
>   drivers/gpu/drm/xe/xe_huc.c      |  16 ++++
>   drivers/gpu/drm/xe/xe_huc.h      |   1 +
>   drivers/gpu/drm/xe/xe_irq.c      |   7 +-
>   drivers/gpu/drm/xe/xe_irq.h      |   1 +
>   drivers/gpu/drm/xe/xe_pci.c      |   1 +
>   drivers/gpu/drm/xe/xe_pci.h      |   2 +
>   drivers/gpu/drm/xe/xe_pci_err.c  | 147 +++++++++++++++++++++++++++++++
>   drivers/gpu/drm/xe/xe_uc.c       |  24 +++++
>   drivers/gpu/drm/xe/xe_uc.h       |   2 +
>   drivers/gpu/drm/xe/xe_uc_fw.c    |  33 +++----
>   drivers/gpu/drm/xe/xe_uc_fw.h    |   1 +
>   22 files changed, 295 insertions(+), 27 deletions(-)
>   create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c
> 

Re: [PATCH v1 0/6] Introduce Xe PCIe FLR

[Raag Jadav]

On Thu, Feb 26, 2026 at 04:08:22PM +0000, Matthew Auld wrote:
> On 24/02/2026 10:25, Raag Jadav wrote:
> > Here's my humble attempt at introducing PCIe FLR support in xe driver.
> > This is ofcourse a half baked implementation and only limited to reloading
> > uC firmwares. This needs to be extended for a lot of different components
> > which I've skipped here for my lack of competence, so feel free to join
> > in and support them.
> 
> I couldn't find where we re-init all the migrate stuff? There is a bunch of
> PPGTT programming that will be lost if VRAM gets wiped. And then also the
> migrate queue/context itself. See xe_migrate_init().

Yes, Brost already pointed it out offline and I have it working locally thanks
to him. v2 will be coming up with xe_migrate_reinit() -> xe_lrc_reinit().

Raag

> > PS: This works enough to allow a single exec test run after FLR but it
> > follows with a GuC crash on subsequent runs which I'm still investigating.
> > 
> > Raag Jadav (6):
> >    drm/xe/uc_fw: Allow reloading firmware
> >    drm/xe/uc: Introduce FLR helpers
> >    drm/xe/irq: Introduce FLR helper
> >    drm/xe: Introduce xe_device_assert_lmem_ready()
> >    drm/xe/bo_evict: Introduce xe_bo_restore_map()
> >    drm/xe/pci: Introduce PCIe FLR
> > 
> >   drivers/gpu/drm/xe/Makefile      |   1 +
> >   drivers/gpu/drm/xe/xe_bo_evict.c |  34 +++++--
> >   drivers/gpu/drm/xe/xe_bo_evict.h |   2 +
> >   drivers/gpu/drm/xe/xe_device.c   |   4 +-
> >   drivers/gpu/drm/xe/xe_device.h   |   1 +
> >   drivers/gpu/drm/xe/xe_gsc.c      |  15 ++++
> >   drivers/gpu/drm/xe/xe_gsc.h      |   1 +
> >   drivers/gpu/drm/xe/xe_gt.c       |  10 +++
> >   drivers/gpu/drm/xe/xe_gt.h       |   2 +
> >   drivers/gpu/drm/xe/xe_guc.c      |  16 ++++
> >   drivers/gpu/drm/xe/xe_guc.h      |   1 +
> >   drivers/gpu/drm/xe/xe_huc.c      |  16 ++++
> >   drivers/gpu/drm/xe/xe_huc.h      |   1 +
> >   drivers/gpu/drm/xe/xe_irq.c      |   7 +-
> >   drivers/gpu/drm/xe/xe_irq.h      |   1 +
> >   drivers/gpu/drm/xe/xe_pci.c      |   1 +
> >   drivers/gpu/drm/xe/xe_pci.h      |   2 +
> >   drivers/gpu/drm/xe/xe_pci_err.c  | 147 +++++++++++++++++++++++++++++++
> >   drivers/gpu/drm/xe/xe_uc.c       |  24 +++++
> >   drivers/gpu/drm/xe/xe_uc.h       |   2 +
> >   drivers/gpu/drm/xe/xe_uc_fw.c    |  33 +++----
> >   drivers/gpu/drm/xe/xe_uc_fw.h    |   1 +
> >   22 files changed, 295 insertions(+), 27 deletions(-)
> >   create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c
> > 
> 

Re: [PATCH v1 0/6] Introduce Xe PCIe FLR

[Matt Roper]

On Tue, Feb 24, 2026 at 03:55:13PM +0530, Raag Jadav wrote:
> Here's my humble attempt at introducing PCIe FLR support in xe driver.
> This is ofcourse a half baked implementation and only limited to reloading
> uC firmwares. This needs to be extended for a lot of different components
> which I've skipped here for my lack of competence, so feel free to join
> in and support them.
> 
> PS: This works enough to allow a single exec test run after FLR but it
> follows with a GuC crash on subsequent runs which I'm still investigating.

Probably a dumb question since FLR while the driver is bound isn't an
area I've considered:  if we do a PCI FLR, is there *anything* in the
driver state that would still be relevant and useful to carry forward
after the reset?  I believe at the hardware level vram gets wiped, all
registers in the BAR go back to power-up defaults, etc., right?  If
there's no state that we can meaningfully carry forward post-reset, then
couldn't that be handled by destroying the whole xe_device (and
releasing all of its resources), and then starting over with
xe_pci_probe() to initialize a new one from scratch?

I guess on an igpu all of our data is in smem and only the stolen memory
gets wiped, so an FLR is a bit less destructive.  But on a dgpu I'm not
sure how much continuation is really possible?


Matt

> 
> Raag Jadav (6):
>   drm/xe/uc_fw: Allow reloading firmware
>   drm/xe/uc: Introduce FLR helpers
>   drm/xe/irq: Introduce FLR helper
>   drm/xe: Introduce xe_device_assert_lmem_ready()
>   drm/xe/bo_evict: Introduce xe_bo_restore_map()
>   drm/xe/pci: Introduce PCIe FLR
> 
>  drivers/gpu/drm/xe/Makefile      |   1 +
>  drivers/gpu/drm/xe/xe_bo_evict.c |  34 +++++--
>  drivers/gpu/drm/xe/xe_bo_evict.h |   2 +
>  drivers/gpu/drm/xe/xe_device.c   |   4 +-
>  drivers/gpu/drm/xe/xe_device.h   |   1 +
>  drivers/gpu/drm/xe/xe_gsc.c      |  15 ++++
>  drivers/gpu/drm/xe/xe_gsc.h      |   1 +
>  drivers/gpu/drm/xe/xe_gt.c       |  10 +++
>  drivers/gpu/drm/xe/xe_gt.h       |   2 +
>  drivers/gpu/drm/xe/xe_guc.c      |  16 ++++
>  drivers/gpu/drm/xe/xe_guc.h      |   1 +
>  drivers/gpu/drm/xe/xe_huc.c      |  16 ++++
>  drivers/gpu/drm/xe/xe_huc.h      |   1 +
>  drivers/gpu/drm/xe/xe_irq.c      |   7 +-
>  drivers/gpu/drm/xe/xe_irq.h      |   1 +
>  drivers/gpu/drm/xe/xe_pci.c      |   1 +
>  drivers/gpu/drm/xe/xe_pci.h      |   2 +
>  drivers/gpu/drm/xe/xe_pci_err.c  | 147 +++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_uc.c       |  24 +++++
>  drivers/gpu/drm/xe/xe_uc.h       |   2 +
>  drivers/gpu/drm/xe/xe_uc_fw.c    |  33 +++----
>  drivers/gpu/drm/xe/xe_uc_fw.h    |   1 +
>  22 files changed, 295 insertions(+), 27 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c
> 
> -- 
> 2.43.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH v1 0/6] Introduce Xe PCIe FLR

[Raag Jadav]

On Thu, Feb 26, 2026 at 02:12:25PM -0800, Matt Roper wrote:
> On Tue, Feb 24, 2026 at 03:55:13PM +0530, Raag Jadav wrote:
> > Here's my humble attempt at introducing PCIe FLR support in xe driver.
> > This is ofcourse a half baked implementation and only limited to reloading
> > uC firmwares. This needs to be extended for a lot of different components
> > which I've skipped here for my lack of competence, so feel free to join
> > in and support them.
> > 
> > PS: This works enough to allow a single exec test run after FLR but it
> > follows with a GuC crash on subsequent runs which I'm still investigating.
> 
> Probably a dumb question since FLR while the driver is bound isn't an
> area I've considered:  if we do a PCI FLR, is there *anything* in the
> driver state that would still be relevant and useful to carry forward
> after the reset?  I believe at the hardware level vram gets wiped, all
> registers in the BAR go back to power-up defaults, etc., right?  If
> there's no state that we can meaningfully carry forward post-reset, then
> couldn't that be handled by destroying the whole xe_device (and
> releasing all of its resources), and then starting over with
> xe_pci_probe() to initialize a new one from scratch?

As an alternative yes, but that's not the userspace contract with FLR.
If user wants to reload the driver, there's a different path for it,
i.e. unbind + bind. Detailed explanation[1] from Winiarski on this.

[1] https://lore.kernel.org/intel-xe/forn7m5f2m6bwpspktrmjzvxcezcmoqyuuclu64x77uxdo5c5u@fcg3kphdb5re/

> I guess on an igpu all of our data is in smem and only the stolen memory
> gets wiped, so an FLR is a bit less destructive.  But on a dgpu I'm not
> sure how much continuation is really possible?

The expectation is to give user back a working hardware. Since VRAM is
lost, user may need to recreate memory contents, but we keep the clients
and their descriptors intact.

On a side note, this implementation is meant as a stepping stone and to
be reused for other usecases in future products.

Raag

> > Raag Jadav (6):
> >   drm/xe/uc_fw: Allow reloading firmware
> >   drm/xe/uc: Introduce FLR helpers
> >   drm/xe/irq: Introduce FLR helper
> >   drm/xe: Introduce xe_device_assert_lmem_ready()
> >   drm/xe/bo_evict: Introduce xe_bo_restore_map()
> >   drm/xe/pci: Introduce PCIe FLR
> > 
> >  drivers/gpu/drm/xe/Makefile      |   1 +
> >  drivers/gpu/drm/xe/xe_bo_evict.c |  34 +++++--
> >  drivers/gpu/drm/xe/xe_bo_evict.h |   2 +
> >  drivers/gpu/drm/xe/xe_device.c   |   4 +-
> >  drivers/gpu/drm/xe/xe_device.h   |   1 +
> >  drivers/gpu/drm/xe/xe_gsc.c      |  15 ++++
> >  drivers/gpu/drm/xe/xe_gsc.h      |   1 +
> >  drivers/gpu/drm/xe/xe_gt.c       |  10 +++
> >  drivers/gpu/drm/xe/xe_gt.h       |   2 +
> >  drivers/gpu/drm/xe/xe_guc.c      |  16 ++++
> >  drivers/gpu/drm/xe/xe_guc.h      |   1 +
> >  drivers/gpu/drm/xe/xe_huc.c      |  16 ++++
> >  drivers/gpu/drm/xe/xe_huc.h      |   1 +
> >  drivers/gpu/drm/xe/xe_irq.c      |   7 +-
> >  drivers/gpu/drm/xe/xe_irq.h      |   1 +
> >  drivers/gpu/drm/xe/xe_pci.c      |   1 +
> >  drivers/gpu/drm/xe/xe_pci.h      |   2 +
> >  drivers/gpu/drm/xe/xe_pci_err.c  | 147 +++++++++++++++++++++++++++++++
> >  drivers/gpu/drm/xe/xe_uc.c       |  24 +++++
> >  drivers/gpu/drm/xe/xe_uc.h       |   2 +
> >  drivers/gpu/drm/xe/xe_uc_fw.c    |  33 +++----
> >  drivers/gpu/drm/xe/xe_uc_fw.h    |   1 +
> >  22 files changed, 295 insertions(+), 27 deletions(-)
> >  create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c
> > 
> > -- 
> > 2.43.0
> > 
> 
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation