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From: Matthew Brost <matthew.brost@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH 3/3] drm/xe/pf: Don't force 2MB VRAM alignment
Date: Fri, 20 Feb 2026 15:11:15 -0800	[thread overview]
Message-ID: <aZjqE1O1uB42ivim@lstrano-desk.jf.intel.com> (raw)
In-Reply-To: <20260220201857.6113-4-michal.wajdeczko@intel.com>

On Fri, Feb 20, 2026 at 09:18:55PM +0100, Michal Wajdeczko wrote:
> There is no need to always request VRAM BO to have 2MB alignment
> as for now this is required by the LMTT only, which could be not
> present on some platforms with VRAM.
> 

Nit: This patch should be the 2nd patch in the series.

Otherwise LGTM:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> index 3ae83cffe925..b867203b4997 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
> @@ -1627,13 +1627,15 @@ static int pf_provision_vf_lmem(struct xe_gt *gt, unsigned int vfid, u64 size)
>  	struct xe_device *xe = gt_to_xe(gt);
>  	struct xe_tile *tile = gt_to_tile(gt);
>  	struct xe_bo *bo;
> +	u64 alignment;
>  	int err;
>  
>  	xe_gt_assert(gt, vfid);
>  	xe_gt_assert(gt, IS_DGFX(xe));
>  	xe_gt_assert(gt, xe_gt_is_main_type(gt));
>  
> -	size = round_up(size, pf_get_lmem_alignment(gt));
> +	alignment = pf_get_lmem_alignment(gt);
> +	size = round_up(size, alignment);
>  
>  	if (config->lmem_obj) {
>  		err = pf_distribute_config_lmem(gt, vfid, 0);
> @@ -1649,12 +1651,12 @@ static int pf_provision_vf_lmem(struct xe_gt *gt, unsigned int vfid, u64 size)
>  	if (!size)
>  		return 0;
>  
> -	xe_gt_assert(gt, pf_get_lmem_alignment(gt) == SZ_2M);
> +	xe_gt_assert(gt, alignment == XE_PAGE_SIZE || alignment == SZ_2M);
>  	bo = xe_bo_create_pin_range_novm(xe, tile,
>  					 ALIGN(size, PAGE_SIZE), 0, ~0ull,
>  					 ttm_bo_type_kernel,
>  					 XE_BO_FLAG_VRAM(tile->mem.vram) |
> -					 XE_BO_FLAG_NEEDS_2M |
> +					 (alignment == SZ_2M ? XE_BO_FLAG_NEEDS_2M : 0) |
>  					 XE_BO_FLAG_PINNED |
>  					 XE_BO_FLAG_PINNED_LATE_RESTORE |
>  					 XE_BO_FLAG_FORCE_USER_VRAM);
> -- 
> 2.47.1
> 

  reply	other threads:[~2026-02-20 23:11 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-20 20:18 [PATCH 0/3] drm/xe/pf: Some VRAM flag improvements Michal Wajdeczko
2026-02-20 20:18 ` [PATCH 1/3] drm/xe/pf: Use explicit VRAM BO flag for VRAM provisioning Michal Wajdeczko
2026-02-20 23:07   ` Matthew Brost
2026-02-20 20:18 ` [PATCH 2/3] drm/xe/pf: Don't use LMTT page size if no LMTT Michal Wajdeczko
2026-02-20 23:12   ` Matthew Brost
2026-02-20 20:18 ` [PATCH 3/3] drm/xe/pf: Don't force 2MB VRAM alignment Michal Wajdeczko
2026-02-20 23:11   ` Matthew Brost [this message]
2026-02-20 20:26 ` ✓ CI.KUnit: success for drm/xe/pf: Some VRAM flag improvements Patchwork
2026-02-20 21:07 ` ✓ Xe.CI.BAT: " Patchwork

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