Re: [PATCH v34 3/6] drm/xe/xe_pagefault: Track address precision per pagefault

[Matthew Brost <matthew.brost@intel.com>]

On Fri, Feb 13, 2026 at 10:34:14PM +0000, Jonathan Cavitt wrote:
> Add an address precision field to the pagefault consumer.  This captures
> the fact that pagefaults are reported on a SZ_4K granularity by GuC,
> meaning the reported pagefault address is only the address of the page
> where the faulting access occurred rather than the exact address of the
> fault.  This field is necessary in case more reporters are added where
> the granularity can be different.
> 
> v2:
> - Keep u8 values together (Matt Brost)
> 
> Suggested-by: Matthew Brost <matthew.brost@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_guc_pagefault.c   |  1 +
>  drivers/gpu/drm/xe/xe_pagefault.c       |  2 ++
>  drivers/gpu/drm/xe/xe_pagefault_types.h | 11 ++++++-----
>  3 files changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_guc_pagefault.c b/drivers/gpu/drm/xe/xe_guc_pagefault.c
> index 8eaa1dfc1e66..ba6f8e8dbe4e 100644
> --- a/drivers/gpu/drm/xe/xe_guc_pagefault.c
> +++ b/drivers/gpu/drm/xe/xe_guc_pagefault.c
> @@ -75,6 +75,7 @@ int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len)
>  				      << PFD_VIRTUAL_ADDR_HI_SHIFT) |
>  		(FIELD_GET(PFD_VIRTUAL_ADDR_LO, msg[2]) <<
>  		 PFD_VIRTUAL_ADDR_LO_SHIFT);
> +	pf.consumer.addr_precision = 12;
>  	pf.consumer.asid = FIELD_GET(PFD_ASID, msg[1]);
>  	pf.consumer.access_type = FIELD_GET(PFD_ACCESS_TYPE, msg[2]);
>  	if (FIELD_GET(XE2_PFD_TRVA_FAULT, msg[0]))
> diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
> index 47b6a7628dc1..c2ab183ded29 100644
> --- a/drivers/gpu/drm/xe/xe_pagefault.c
> +++ b/drivers/gpu/drm/xe/xe_pagefault.c
> @@ -233,6 +233,7 @@ static void xe_pagefault_print(struct xe_pagefault *pf)
>  					       pf->consumer.engine_class_instance);
>  	xe_gt_info(pf->gt, "\n\tASID: %d\n"
>  		   "\tFaulted Address: 0x%08x%08x\n"
> +		   "\tAddress Precision: %lu\n"
>  		   "\tFaultType: %lu\n"
>  		   "\tAccessType: %d\n"
>  		   "\tFaultLevel: %lu\n"
> @@ -241,6 +242,7 @@ static void xe_pagefault_print(struct xe_pagefault *pf)
>  		   pf->consumer.asid,
>  		   upper_32_bits(pf->consumer.page_addr),
>  		   lower_32_bits(pf->consumer.page_addr),
> +		   BIT(pf->consumer.addr_precision),
>  		   FIELD_GET(XE_PAGEFAULT_TYPE_MASK,
>  			     pf->consumer.fault_type_level),
>  		   pf->consumer.access_type,
> diff --git a/drivers/gpu/drm/xe/xe_pagefault_types.h b/drivers/gpu/drm/xe/xe_pagefault_types.h
> index a14725a02f39..ce15fd8f46b5 100644
> --- a/drivers/gpu/drm/xe/xe_pagefault_types.h
> +++ b/drivers/gpu/drm/xe/xe_pagefault_types.h
> @@ -67,6 +67,12 @@ struct xe_pagefault {
>  		u64 page_addr;
>  		/** @consumer.asid: address space ID */
>  		u32 asid;
> +		/**
> +		 * @consumer.addr_precision: precision of the page fault address.
> +		 * u8 rather than u32 to keep compact - actual precision is
> +		 * BIT(consumer.addr_precision).  Currently only 12
> +		 */
> +		u8 addr_precision;

Do we even need this field in the xe_pagefault in if the value is fixed?
I'd lean toward no until we have producer which can set this to anything
else.

Matt

>  		/**
>  		 * @consumer.access_type: access type, u8 rather than enum to
>  		 * keep size compact
> @@ -87,11 +93,6 @@ struct xe_pagefault {
>  		u8 engine_class_instance;
>  #define XE_PAGEFAULT_ENGINE_CLASS_MASK		GENMASK(3, 0)
>  #define XE_PAGEFAULT_ENGINE_INSTANCE_MASK	GENMASK(7, 4)
> -		/**
> -		 * consumer.align: buffer u8 to keep struct aligned to u64.
> -		 * Will be used later to store data.
> -		 */
> -		u8 align;
>  		/** consumer.reserved: reserved bits for future expansion */
>  		u64 reserved;
>  	} consumer;
> -- 
> 2.43.0
>