From: Jonathan Cavitt <jonathan.cavitt@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com,
jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com,
matthew.brost@intel.com, jianxun.zhang@intel.com,
shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org,
Michal.Wajdeczko@intel.com, michal.mrozek@intel.com,
raag.jadav@intel.com, ivan.briano@intel.com,
matthew.auld@intel.com, dafna.hirschfeld@intel.com
Subject: [PATCH v34 2/6] drm/xe/xe_pagefault: Pack engine class instance into u8
Date: Fri, 13 Feb 2026 22:34:13 +0000 [thread overview]
Message-ID: <20260213223410.99613-10-jonathan.cavitt@intel.com> (raw)
In-Reply-To: <20260213223410.99613-8-jonathan.cavitt@intel.com>
Pack the engine class and instance fields into a single u8 to save space
in struct xe_pagefault. The saved space will be used later to store
something else.
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
drivers/gpu/drm/xe/xe_guc_pagefault.c | 7 +++++--
drivers/gpu/drm/xe/xe_pagefault.c | 11 +++++++----
drivers/gpu/drm/xe/xe_pagefault_types.h | 16 ++++++++++++----
3 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_pagefault.c b/drivers/gpu/drm/xe/xe_guc_pagefault.c
index d48f6ed103bb..8eaa1dfc1e66 100644
--- a/drivers/gpu/drm/xe/xe_guc_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_guc_pagefault.c
@@ -85,8 +85,11 @@ int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len)
FIELD_GET(PFD_FAULT_LEVEL, msg[0])) |
FIELD_PREP(XE_PAGEFAULT_TYPE_MASK,
FIELD_GET(PFD_FAULT_TYPE, msg[2]));
- pf.consumer.engine_class = FIELD_GET(PFD_ENG_CLASS, msg[0]);
- pf.consumer.engine_instance = FIELD_GET(PFD_ENG_INSTANCE, msg[0]);
+ pf.consumer.engine_class_instance =
+ FIELD_PREP(XE_PAGEFAULT_ENGINE_CLASS_MASK,
+ FIELD_GET(PFD_ENG_CLASS, msg[0])) |
+ FIELD_PREP(XE_PAGEFAULT_ENGINE_INSTANCE_MASK,
+ FIELD_GET(PFD_ENG_INSTANCE, msg[0]));
pf.producer.private = guc;
pf.producer.ops = &guc_pagefault_ops;
diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
index 0281b5b6d4ab..47b6a7628dc1 100644
--- a/drivers/gpu/drm/xe/xe_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_pagefault.c
@@ -229,13 +229,15 @@ static bool xe_pagefault_queue_pop(struct xe_pagefault_queue *pf_queue,
static void xe_pagefault_print(struct xe_pagefault *pf)
{
+ enum xe_engine_class class = FIELD_GET(XE_PAGEFAULT_ENGINE_CLASS_MASK,
+ pf->consumer.engine_class_instance);
xe_gt_info(pf->gt, "\n\tASID: %d\n"
"\tFaulted Address: 0x%08x%08x\n"
"\tFaultType: %lu\n"
"\tAccessType: %d\n"
"\tFaultLevel: %lu\n"
"\tEngineClass: %d %s\n"
- "\tEngineInstance: %d\n",
+ "\tEngineInstance: %lu\n",
pf->consumer.asid,
upper_32_bits(pf->consumer.page_addr),
lower_32_bits(pf->consumer.page_addr),
@@ -244,9 +246,10 @@ static void xe_pagefault_print(struct xe_pagefault *pf)
pf->consumer.access_type,
FIELD_GET(XE_PAGEFAULT_LEVEL_MASK,
pf->consumer.fault_type_level),
- pf->consumer.engine_class,
- xe_hw_engine_class_to_str(pf->consumer.engine_class),
- pf->consumer.engine_instance);
+ class,
+ xe_hw_engine_class_to_str(class),
+ FIELD_GET(XE_PAGEFAULT_ENGINE_INSTANCE_MASK,
+ pf->consumer.engine_class_instance));
}
static void xe_pagefault_queue_work(struct work_struct *w)
diff --git a/drivers/gpu/drm/xe/xe_pagefault_types.h b/drivers/gpu/drm/xe/xe_pagefault_types.h
index 0e378f41ede6..a14725a02f39 100644
--- a/drivers/gpu/drm/xe/xe_pagefault_types.h
+++ b/drivers/gpu/drm/xe/xe_pagefault_types.h
@@ -80,10 +80,18 @@ struct xe_pagefault {
#define XE_PAGEFAULT_TYPE_LEVEL_NACK 0xff /* Producer indicates nack fault */
#define XE_PAGEFAULT_LEVEL_MASK GENMASK(3, 0)
#define XE_PAGEFAULT_TYPE_MASK GENMASK(7, 4)
- /** @consumer.engine_class: engine class */
- u8 engine_class;
- /** @consumer.engine_instance: engine instance */
- u8 engine_instance;
+ /**
+ * @consumer.engine_class_instance: engine class and instance, packed
+ * into a single u8 to keep compact
+ */
+ u8 engine_class_instance;
+#define XE_PAGEFAULT_ENGINE_CLASS_MASK GENMASK(3, 0)
+#define XE_PAGEFAULT_ENGINE_INSTANCE_MASK GENMASK(7, 4)
+ /**
+ * consumer.align: buffer u8 to keep struct aligned to u64.
+ * Will be used later to store data.
+ */
+ u8 align;
/** consumer.reserved: reserved bits for future expansion */
u64 reserved;
} consumer;
--
2.43.0
next prev parent reply other threads:[~2026-02-13 22:34 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-13 22:34 [PATCH v34 0/6] drm/xe/xe_vm: Implement xe_vm_get_property_ioctl Jonathan Cavitt
2026-02-13 22:34 ` [PATCH v34 1/6] drm/xe/xe_pagefault: Disallow writes to read-only VMAs Jonathan Cavitt
2026-02-13 22:34 ` Jonathan Cavitt [this message]
2026-02-17 17:08 ` [PATCH v34 2/6] drm/xe/xe_pagefault: Pack engine class instance into u8 Matthew Brost
2026-02-13 22:34 ` [PATCH v34 3/6] drm/xe/xe_pagefault: Track address precision per pagefault Jonathan Cavitt
2026-02-20 23:20 ` Matthew Brost
2026-02-13 22:34 ` [PATCH v34 4/6] drm/xe/uapi: Define drm_xe_vm_get_property Jonathan Cavitt
2026-02-20 23:18 ` Matthew Brost
2026-02-13 22:34 ` [PATCH v34 5/6] drm/xe/xe_vm: Add per VM fault info Jonathan Cavitt
2026-02-13 22:34 ` [PATCH v34 6/6] drm/xe/xe_vm: Implement xe_vm_get_property_ioctl Jonathan Cavitt
2026-02-13 23:25 ` ✗ CI.checkpatch: warning for " Patchwork
2026-02-13 23:27 ` ✓ CI.KUnit: success " Patchwork
2026-02-14 0:24 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-14 23:33 ` ✗ Xe.CI.FULL: failure " Patchwork
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