[PATCH v17 0/8] AuxCCS handling and render compression modifiers

[PATCH v17 0/8] AuxCCS handling and render compression modifiers

[Tvrtko Ursulin]

A series to add support for compressed surface scanout under xe with
Alderlake-P.

Currently the auxiliary buffer data isn't mapped into the page tables at all so
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
had to disable the support.

On top of that there are missing flushes, invalidations and similar.

Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:

  [PLANE:32:plane 1A]: type=PRI
          uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
          hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)

Display working fine - no artefacts, no DMAR/PIPE faults.

All IGTs pass for me locally.

v2:
 * More patches added to fix kms_flip_tiling.

v3:
 * Rebased after some cleanup patches from v2 were merged.
 * Added people to Cc as suggested by Rodrigo.
 * Adjusted last patch title. (Rodrigo)
 * Apply GGTT flushing only to iomapped system memory buffers.

v4:
 * Added patch for potentially misplaced Wa_14016712196.
 * Fixed (hopefully) MAX_JOB_SIZE_DW on Meteorlake.

v5:
 * Split out ring emission changes to smaller patches.
 * Fixed MAX_JOB_SIZE_DW even more.
 * Don't emit MI_FLUSH_DW_CCS on !BCS. This should fix Meteorlake.

 v6:
 * Added AuxCCS invalidation to indirect context workarounds.
 * Also added the indirect context handling and some other workarounds. They are
   unrelated but the series depends on it.
 * Dropped DPT pin alignment reduction since BMG appears not to be liking it for
   some reason.

v7:
 * Rebased on top of recent xe_fb_pin.c refactoring and also the indirect
   context workarounds series.

v8:
 * Rebased for bo->size removal.
 * Corrected PIPE_CONTROL_FLUSH_L3 to bit 30. (Jose)

v9:
 * Fixed fb remapping changes.
 * Dropped two not required patches from the series.
 * Fixed criteria for GGTT flushing.
 * Limit clflush to the compression metadata area.
 * Rebased for indirect context workarounds landing upstream.

v10:
 * Rebase for XE_GT_WA().

v11:
 * Do not use stolen for DPT on IGFX + AuxCCS.

v12:
 * Rebased for some ringbuf and LRC code changes.

v13:
 * Rebased for various upstream changes.
 * Dropped clflush and stolen avoidance patches after merging IGT MOCS 61 usage.

 v14:
 * MMIO 0x4248 and MI_FLUSH_DW_CCS are MTL+. (Matt)
 * Consolidate engine feature checks. (Ville)
 * Brought back the patch to put DPT tables in system memory for 100% CI pass
   rate. It looks like MOCS 61 is not enough to avoid sporadic pipecrc
   mismatches.

v15:
 * Limited to enabling on Alderlake-P only. (Dropped all Meteorlake patches.)
 * Dropped unrelated GGTT alignment fix. (Sent standalone.)
 * Use display parent interface for probing AuxCCS driver support.

v16:
 * Use write-combine for DPT in stolen memory. (Ville)
 * Dropped clflush patches under assumption pre-production ADL machine were the
   reason for sporadic pipecrc failures.

v17:
 * Mechanical rebase for upstream conflicts.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

Tvrtko Ursulin (8):
  drm/xe: Use write-combine mapping when populating DPT
  drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake
  drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
  drm/xe/xelp: Wait for AuxCCS invalidation to complete
  drm/xe: Export xe_emit_aux_table_inv
  drm/xe/xelp: Add AuxCCS invalidation to the indirect context
    workarounds
  drm/xe/display: Add support for AuxCCS
  drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P

 drivers/gpu/drm/xe/display/xe_display.c       |   8 ++
 drivers/gpu/drm/xe/display/xe_fb_pin.c        | 114 +++++++++++++-----
 .../gpu/drm/xe/instructions/xe_mi_commands.h  |   6 +
 drivers/gpu/drm/xe/xe_hw_engine.h             |  24 ++++
 drivers/gpu/drm/xe/xe_lrc.c                   |  27 +++++
 drivers/gpu/drm/xe/xe_ring_ops.c              |  85 ++++++++-----
 drivers/gpu/drm/xe/xe_ring_ops.h              |   3 +
 drivers/gpu/drm/xe/xe_ring_ops_types.h        |   2 +-
 8 files changed, 207 insertions(+), 62 deletions(-)

-- 
2.52.0

[PATCH v17 1/8] drm/xe: Use write-combine mapping when populating DPT

[Tvrtko Ursulin]

The fallback case for DPT backing store is a buffer object in system
memory buffer, which by default use a write-back CPU caching policy.

If this fallback gets triggered, and since there is currently no flushing,
the DPT writes made when pinning a buffer to display are not guaranteed to
be seen by the display engine.

To fix this, since both the local memory and the stolen memory DPT
placement use write-combine, let us make the system memory option follow
suit by marking the buffer with the scanout flag.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index d2c4e94180fa..b285cc446f57 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -123,7 +123,8 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 						   ttm_bo_type_kernel,
 						   XE_BO_FLAG_SYSTEM |
 						   XE_BO_FLAG_GGTT |
-						   XE_BO_FLAG_PAGETABLE,
+						   XE_BO_FLAG_PAGETABLE |
+						   XE_BO_FLAG_SCANOUT, /* Force WC mapping */
 						   alignment, false);
 	if (IS_ERR(dpt))
 		return PTR_ERR(dpt);
-- 
2.52.0

Re: [PATCH v17 1/8] drm/xe: Use write-combine mapping when populating DPT

[Rodrigo Vivi]

On Wed, Jan 28, 2026 at 10:13:26AM +0000, Tvrtko Ursulin wrote:
> The fallback case for DPT backing store is a buffer object in system
> memory buffer, which by default use a write-back CPU caching policy.
>
> If this fallback gets triggered, and since there is currently no flushing,
> the DPT writes made when pinning a buffer to display are not guaranteed to
> be seen by the display engine.
>
> To fix this, since both the local memory and the stolen memory DPT
> placement use write-combine, let us make the system memory option follow
> suit by marking the buffer with the scanout flag.
>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index d2c4e94180fa..b285cc446f57 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -123,7 +123,8 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
>  						   ttm_bo_type_kernel,
>  						   XE_BO_FLAG_SYSTEM |
>  						   XE_BO_FLAG_GGTT |
> -						   XE_BO_FLAG_PAGETABLE,
> +						   XE_BO_FLAG_PAGETABLE |
> +						   XE_BO_FLAG_SCANOUT, /* Force WC mapping */

This kind of changes the semantics of the flag.

Could you please change this internal name to something like
s/XE_BO_FLAG_SCANOUT/XE_BO_FLAG_FORCE_WC

Then we will have something like

/*
 * Display scanout is always non-coherent with the CPU cache.
 *
 * For Xe_LPG and beyond up to NVL-P (excluding), PPGTT PTE
 * lookups are also non-coherent and require a CPU:WC mapping.
 */
if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
                 bo_flags |= XE_BO_FLAG_FORCE_WC;


>  						   alignment, false);
>  	if (IS_ERR(dpt))
>  		return PTR_ERR(dpt);
> --
> 2.52.0
>

[PATCH v17 2/8] drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake

[Tvrtko Ursulin]

At the moment the driver does not support AuxCCS at all due respective
modifiers being hidden from userspace.

As we are about to start enabling them, starting with Alderlake, let us
begin by limiting the ring buffer support to just that initial platform.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_ring_ops.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 248620b0901d..dfa0cd25167b 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -302,9 +302,9 @@ static bool has_aux_ccs(struct xe_device *xe)
 	 * PVC is a special case that has no compression of either type
 	 * (FlatCCS or AuxCCS).  Also, AuxCCS is no longer used from Xe2
 	 * onward, so any future platforms with no FlatCCS will not have
-	 * AuxCCS either.
+	 * AuxCCS, and we explicity do not want to support it on MTL.
 	 */
-	if (GRAPHICS_VER(xe) >= 20 || xe->info.platform == XE_PVC)
+	if (GRAPHICS_VERx100(xe) >= 1270 || xe->info.platform == XE_PVC)
 		return false;
 
 	return !xe->info.has_flat_ccs;
-- 
2.52.0

Re: [PATCH v17 2/8] drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake

[Rodrigo Vivi]

On Wed, Jan 28, 2026 at 10:13:27AM +0000, Tvrtko Ursulin wrote:
> At the moment the driver does not support AuxCCS at all due respective
> modifiers being hidden from userspace.
> 
> As we are about to start enabling them, starting with Alderlake, let us
> begin by limiting the ring buffer support to just that initial platform.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_ring_ops.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> index 248620b0901d..dfa0cd25167b 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> @@ -302,9 +302,9 @@ static bool has_aux_ccs(struct xe_device *xe)
>  	 * PVC is a special case that has no compression of either type
>  	 * (FlatCCS or AuxCCS).  Also, AuxCCS is no longer used from Xe2
>  	 * onward, so any future platforms with no FlatCCS will not have
> -	 * AuxCCS either.
> +	 * AuxCCS, and we explicity do not want to support it on MTL.
>  	 */
> -	if (GRAPHICS_VER(xe) >= 20 || xe->info.platform == XE_PVC)
> +	if (GRAPHICS_VERx100(xe) >= 1270 || xe->info.platform == XE_PVC)
>  		return false;
>  
>  	return !xe->info.has_flat_ccs;
> -- 
> 2.52.0
> 

[PATCH v17 3/8] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS

[Tvrtko Ursulin]

According to i915 commit
ad8ebf12217e ("drm/i915/gt: Ensure memory quiesced before invalidation")
quiescing of the memory traffic is required before invalidating the AuxCCS
tables.

Add an extra pipe control flush to achieve that.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_ring_ops.c       | 10 +++++++++-
 drivers/gpu/drm/xe/xe_ring_ops_types.h |  2 +-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index dfa0cd25167b..ebda1daacb6a 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -371,12 +371,20 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 	struct xe_gt *gt = job->q->gt;
 	struct xe_device *xe = gt_to_xe(gt);
 	bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
+	const bool aux_ccs = has_aux_ccs(xe);
 	u32 mask_flags = 0;
 
 	*head = lrc->ring.tail;
 
 	i = emit_copy_timestamp(xe, lrc, dw, i);
 
+	/*
+	 * On AuxCCS platforms the invalidation of the Aux table requires
+	 * quiescing the memory traffic beforehand.
+	 */
+	if (aux_ccs)
+		i = emit_render_cache_flush(job, dw, i);
+
 	dw[i++] = preparser_disable(true);
 	if (lacks_render)
 		mask_flags = PIPE_CONTROL_3D_ARCH_FLAGS;
@@ -387,7 +395,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 	i = emit_pipe_invalidate(job->q, mask_flags, job->ring_ops_flush_tlb, dw, i);
 
 	/* hsdes: 1809175790 */
-	if (has_aux_ccs(xe))
+	if (aux_ccs)
 		i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);
 
 	dw[i++] = preparser_disable(false);
diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h
index d7e3e150a9a5..477dc7defd72 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
@@ -8,7 +8,7 @@
 
 struct xe_sched_job;
 
-#define MAX_JOB_SIZE_DW 58
+#define MAX_JOB_SIZE_DW 70
 #define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4)
 
 /**
-- 
2.52.0

[PATCH v17 4/8] drm/xe/xelp: Wait for AuxCCS invalidation to complete

[Tvrtko Ursulin]

On AuxCCS platforms we need to wait for AuxCCS invalidations to complete.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/instructions/xe_mi_commands.h | 6 ++++++
 drivers/gpu/drm/xe/xe_ring_ops.c                 | 9 ++++++++-
 drivers/gpu/drm/xe/xe_ring_ops_types.h           | 2 +-
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
index c47b290e0e9f..49d8ffd026d5 100644
--- a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
+++ b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
@@ -81,4 +81,10 @@
 #define MI_SET_APPID_SESSION_ID_MASK	REG_GENMASK(6, 0)
 #define MI_SET_APPID_SESSION_ID(x)	REG_FIELD_PREP(MI_SET_APPID_SESSION_ID_MASK, x)
 
+#define MI_SEMAPHORE_WAIT_TOKEN		(__MI_INSTR(0x1c) | XE_INSTR_NUM_DW(5)) /* XeLP+ */
+#define   MI_SEMAPHORE_REGISTER_POLL	REG_BIT(16)
+#define   MI_SEMAPHORE_POLL		REG_BIT(15)
+#define   MI_SEMAPHORE_CMP_OP_MASK	REG_GENMASK(14, 12)
+#define   MI_SEMAPHORE_SAD_EQ_SDD	REG_FIELD_PREP(MI_SEMAPHORE_CMP_OP_MASK, 4)
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index ebda1daacb6a..9867a316c12b 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -54,7 +54,14 @@ static int emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg,
 	dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
 	dw[i++] = reg.addr + gt->mmio.adj_offset;
 	dw[i++] = AUX_INV;
-	dw[i++] = MI_NOOP;
+	dw[i++] = MI_SEMAPHORE_WAIT_TOKEN |
+		  MI_SEMAPHORE_REGISTER_POLL |
+		  MI_SEMAPHORE_POLL |
+		  MI_SEMAPHORE_SAD_EQ_SDD;
+	dw[i++] = 0;
+	dw[i++] = reg.addr + gt->mmio.adj_offset;
+	dw[i++] = 0;
+	dw[i++] = 0;
 
 	return i;
 }
diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h
index 477dc7defd72..1197fc0bf2af 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
@@ -8,7 +8,7 @@
 
 struct xe_sched_job;
 
-#define MAX_JOB_SIZE_DW 70
+#define MAX_JOB_SIZE_DW 74
 #define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4)
 
 /**
-- 
2.52.0

[PATCH v17 5/8] drm/xe: Export xe_emit_aux_table_inv

[Tvrtko Ursulin]

Export the existing AuxCCS invalidation ring buffer programming helper
which we will need to use to setup the indirect context workaround in the
next patch.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_ring_ops.c | 67 +++++++++++++++++++++-----------
 drivers/gpu/drm/xe/xe_ring_ops.h |  3 ++
 2 files changed, 48 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 9867a316c12b..e6ecd70618c3 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -12,6 +12,7 @@
 #include "regs/xe_engine_regs.h"
 #include "regs/xe_gt_regs.h"
 #include "xe_exec_queue.h"
+#include "xe_gt_printk.h"
 #include "xe_gt_types.h"
 #include "xe_lrc.h"
 #include "xe_sched_job.h"
@@ -48,22 +49,49 @@ static u32 preparser_disable(bool state)
 	return MI_ARB_CHECK | BIT(8) | state;
 }
 
-static int emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg,
-			      u32 *dw, int i)
+u32 *xe_emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *cmd)
 {
-	dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
-	dw[i++] = reg.addr + gt->mmio.adj_offset;
-	dw[i++] = AUX_INV;
-	dw[i++] = MI_SEMAPHORE_WAIT_TOKEN |
-		  MI_SEMAPHORE_REGISTER_POLL |
-		  MI_SEMAPHORE_POLL |
-		  MI_SEMAPHORE_SAD_EQ_SDD;
-	dw[i++] = 0;
-	dw[i++] = reg.addr + gt->mmio.adj_offset;
-	dw[i++] = 0;
-	dw[i++] = 0;
+	struct xe_gt *gt = hwe->gt;
+	struct xe_reg reg;
 
-	return i;
+	switch (hwe->class) {
+	case XE_ENGINE_CLASS_RENDER:
+	case XE_ENGINE_CLASS_COMPUTE:
+		reg = CCS_AUX_INV;
+		break;
+	case XE_ENGINE_CLASS_VIDEO_DECODE:
+		reg = VD0_AUX_INV;
+		break;
+	case XE_ENGINE_CLASS_VIDEO_ENHANCE:
+		reg = VE0_AUX_INV;
+		break;
+	default:
+		xe_gt_err_once(gt, "AuxCCS invalidation not implemented!\n");
+		return cmd;
+	};
+
+	*cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) |
+		 MI_LRI_MMIO_REMAP_EN;
+	*cmd++ = reg.addr + gt->mmio.adj_offset;
+	*cmd++ = AUX_INV;
+	*cmd++ = MI_SEMAPHORE_WAIT_TOKEN | MI_SEMAPHORE_REGISTER_POLL |
+		 MI_SEMAPHORE_POLL | MI_SEMAPHORE_SAD_EQ_SDD;
+	*cmd++ = 0;
+	*cmd++ = reg.addr + gt->mmio.adj_offset;
+	*cmd++ = 0;
+	*cmd++ = 0;
+
+	return cmd;
+}
+
+static int emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *dw, int i)
+{
+	u32 *start, *end;
+
+	start = dw + i;
+	end = xe_emit_aux_table_inv(hwe, start);
+
+	return i + (end - start);
 }
 
 static int emit_user_interrupt(u32 *dw, int i)
@@ -324,7 +352,6 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
 	u32 ppgtt_flag = get_ppgtt_flag(job);
 	struct xe_gt *gt = job->q->gt;
 	struct xe_device *xe = gt_to_xe(gt);
-	bool decode = job->q->class == XE_ENGINE_CLASS_VIDEO_DECODE;
 
 	*head = lrc->ring.tail;
 
@@ -333,12 +360,8 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
 	dw[i++] = preparser_disable(true);
 
 	/* hsdes: 1809175790 */
-	if (has_aux_ccs(xe)) {
-		if (decode)
-			i = emit_aux_table_inv(gt, VD0_AUX_INV, dw, i);
-		else
-			i = emit_aux_table_inv(gt, VE0_AUX_INV, dw, i);
-	}
+	if (has_aux_ccs(xe))
+		i = emit_aux_table_inv(job->q->hwe, dw, i);
 
 	if (job->ring_ops_flush_tlb)
 		i = emit_flush_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
@@ -403,7 +426,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 
 	/* hsdes: 1809175790 */
 	if (aux_ccs)
-		i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);
+		i = emit_aux_table_inv(job->q->hwe, dw, i);
 
 	dw[i++] = preparser_disable(false);
 
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.h b/drivers/gpu/drm/xe/xe_ring_ops.h
index e942735d76a6..5a2d32f9bb25 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops.h
@@ -10,8 +10,11 @@
 #include "xe_ring_ops_types.h"
 
 struct xe_gt;
+struct xe_hw_engine;
 
 const struct xe_ring_ops *
 xe_ring_ops_get(struct xe_gt *gt, enum xe_engine_class class);
 
+u32 *xe_emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *cmd);
+
 #endif
-- 
2.52.0

Re: [PATCH v17 5/8] drm/xe: Export xe_emit_aux_table_inv

[Matthew Brost]

On Wed, Jan 28, 2026 at 10:13:30AM +0000, Tvrtko Ursulin wrote:
> Export the existing AuxCCS invalidation ring buffer programming helper
> which we will need to use to setup the indirect context workaround in the
> next patch.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_ring_ops.c | 67 +++++++++++++++++++++-----------
>  drivers/gpu/drm/xe/xe_ring_ops.h |  3 ++
>  2 files changed, 48 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> index 9867a316c12b..e6ecd70618c3 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> @@ -12,6 +12,7 @@
>  #include "regs/xe_engine_regs.h"
>  #include "regs/xe_gt_regs.h"
>  #include "xe_exec_queue.h"
> +#include "xe_gt_printk.h"
>  #include "xe_gt_types.h"
>  #include "xe_lrc.h"
>  #include "xe_sched_job.h"
> @@ -48,22 +49,49 @@ static u32 preparser_disable(bool state)
>  	return MI_ARB_CHECK | BIT(8) | state;
>  }
>  
> -static int emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg,
> -			      u32 *dw, int i)
> +u32 *xe_emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *cmd)

I'd prefer not to export the ring operation helpers directly as
functions, or at least not from this layer, as that opens a huge can of
worms. For example, look at the i915 ring operation helpers and the mess
they turned into—this is exactly what I'd like to avoid.

I see three options:

1. We add a xe_ring_ops_helper layer and stick this function there
2. In the next patch [1] we open code the ring programing there.
3. We add an emit_aux_table_inv vfunc to 'struct xe_ring_ops' and call
   in [1].

I'd strongly lean toward option #3, with three vfuncs: render_compute,
video_decode, and video_encode. We'd also need to split
ring_ops_gen12_video into two distinct structures. This results in more
code, but it's structurally correct, avoids open coding in xe_lrc.c, and
prevents the floodgate that would be opened by exporting ring ops helper
functions.

Matt

[1] https://patchwork.freedesktop.org/patch/701228/?series=160748&rev=1

>  {
> -	dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
> -	dw[i++] = reg.addr + gt->mmio.adj_offset;
> -	dw[i++] = AUX_INV;
> -	dw[i++] = MI_SEMAPHORE_WAIT_TOKEN |
> -		  MI_SEMAPHORE_REGISTER_POLL |
> -		  MI_SEMAPHORE_POLL |
> -		  MI_SEMAPHORE_SAD_EQ_SDD;
> -	dw[i++] = 0;
> -	dw[i++] = reg.addr + gt->mmio.adj_offset;
> -	dw[i++] = 0;
> -	dw[i++] = 0;
> +	struct xe_gt *gt = hwe->gt;
> +	struct xe_reg reg;
>  
> -	return i;
> +	switch (hwe->class) {
> +	case XE_ENGINE_CLASS_RENDER:
> +	case XE_ENGINE_CLASS_COMPUTE:
> +		reg = CCS_AUX_INV;
> +		break;
> +	case XE_ENGINE_CLASS_VIDEO_DECODE:
> +		reg = VD0_AUX_INV;
> +		break;
> +	case XE_ENGINE_CLASS_VIDEO_ENHANCE:
> +		reg = VE0_AUX_INV;
> +		break;
> +	default:
> +		xe_gt_err_once(gt, "AuxCCS invalidation not implemented!\n");
> +		return cmd;
> +	};
> +
> +	*cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) |
> +		 MI_LRI_MMIO_REMAP_EN;
> +	*cmd++ = reg.addr + gt->mmio.adj_offset;
> +	*cmd++ = AUX_INV;
> +	*cmd++ = MI_SEMAPHORE_WAIT_TOKEN | MI_SEMAPHORE_REGISTER_POLL |
> +		 MI_SEMAPHORE_POLL | MI_SEMAPHORE_SAD_EQ_SDD;
> +	*cmd++ = 0;
> +	*cmd++ = reg.addr + gt->mmio.adj_offset;
> +	*cmd++ = 0;
> +	*cmd++ = 0;
> +
> +	return cmd;
> +}
> +
> +static int emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *dw, int i)
> +{
> +	u32 *start, *end;
> +
> +	start = dw + i;
> +	end = xe_emit_aux_table_inv(hwe, start);
> +
> +	return i + (end - start);
>  }
>  
>  static int emit_user_interrupt(u32 *dw, int i)
> @@ -324,7 +352,6 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
>  	u32 ppgtt_flag = get_ppgtt_flag(job);
>  	struct xe_gt *gt = job->q->gt;
>  	struct xe_device *xe = gt_to_xe(gt);
> -	bool decode = job->q->class == XE_ENGINE_CLASS_VIDEO_DECODE;
>  
>  	*head = lrc->ring.tail;
>  
> @@ -333,12 +360,8 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
>  	dw[i++] = preparser_disable(true);
>  
>  	/* hsdes: 1809175790 */
> -	if (has_aux_ccs(xe)) {
> -		if (decode)
> -			i = emit_aux_table_inv(gt, VD0_AUX_INV, dw, i);
> -		else
> -			i = emit_aux_table_inv(gt, VE0_AUX_INV, dw, i);
> -	}
> +	if (has_aux_ccs(xe))
> +		i = emit_aux_table_inv(job->q->hwe, dw, i);
>  
>  	if (job->ring_ops_flush_tlb)
>  		i = emit_flush_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
> @@ -403,7 +426,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
>  
>  	/* hsdes: 1809175790 */
>  	if (aux_ccs)
> -		i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);
> +		i = emit_aux_table_inv(job->q->hwe, dw, i);
>  
>  	dw[i++] = preparser_disable(false);
>  
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.h b/drivers/gpu/drm/xe/xe_ring_ops.h
> index e942735d76a6..5a2d32f9bb25 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.h
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.h
> @@ -10,8 +10,11 @@
>  #include "xe_ring_ops_types.h"
>  
>  struct xe_gt;
> +struct xe_hw_engine;
>  
>  const struct xe_ring_ops *
>  xe_ring_ops_get(struct xe_gt *gt, enum xe_engine_class class);
>  
> +u32 *xe_emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *cmd);
> +
>  #endif
> -- 
> 2.52.0
> 

[PATCH v17 6/8] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds

[Tvrtko Ursulin]

Following from the i915 reference implementation, we add the AuxCCS
invalidation to the indirect context workarounds page.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_hw_engine.h | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_lrc.c       | 27 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ring_ops.c  | 19 +++----------------
 3 files changed, 54 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
index 6b5f9fa2a594..725467b5877c 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine.h
@@ -6,6 +6,7 @@
 #ifndef _XE_HW_ENGINE_H_
 #define _XE_HW_ENGINE_H_
 
+#include "xe_device_types.h"
 #include "xe_hw_engine_types.h"
 
 struct drm_printer;
@@ -79,4 +80,27 @@ enum xe_force_wake_domains xe_hw_engine_to_fw_domain(struct xe_hw_engine *hwe);
 void xe_hw_engine_mmio_write32(struct xe_hw_engine *hwe, struct xe_reg reg, u32 val);
 u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg);
 
+static inline bool
+xe_engine_class_has_auxccs(struct xe_device *xe, enum xe_engine_class class)
+{
+	/*
+	 * PVC is a special case that has no compression of either type
+	 * (FlatCCS or AuxCCS).  Also, AuxCCS is no longer used from Xe2
+	 * onward, so any future platforms with no FlatCCS will not have
+	 * AuxCCS, and we explicity do not want to support it on MTL.
+	 */
+	if (GRAPHICS_VERx100(xe) >= 1270 ||
+	    xe->info.platform == XE_PVC ||
+	    xe->info.has_flat_ccs)
+		return false;
+
+	if (class == XE_ENGINE_CLASS_RENDER ||
+	    class == XE_ENGINE_CLASS_COMPUTE ||
+	    class == XE_ENGINE_CLASS_VIDEO_DECODE ||
+	    class == XE_ENGINE_CLASS_VIDEO_ENHANCE)
+		return true;
+
+	return false;
+}
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 3db7968aa5e2..25e4392e303f 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -23,10 +23,12 @@
 #include "xe_exec_queue_types.h"
 #include "xe_gt.h"
 #include "xe_gt_printk.h"
+#include "xe_hw_engine.h"
 #include "xe_hw_fence.h"
 #include "xe_map.h"
 #include "xe_memirq.h"
 #include "xe_mmio.h"
+#include "xe_ring_ops.h"
 #include "xe_sriov.h"
 #include "xe_trace_lrc.h"
 #include "xe_vm.h"
@@ -93,6 +95,10 @@ gt_engine_needs_indirect_ctx(struct xe_gt *gt, enum xe_engine_class class)
 					       class, NULL))
 		return true;
 
+	/* For AuxCCS invalidation */
+	if (xe_engine_class_has_auxccs(xe, class))
+		return true;
+
 	return false;
 }
 
@@ -1209,6 +1215,25 @@ static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
 	return cmd - batch;
 }
 
+static ssize_t setup_invalidate_auxccs_wa(struct xe_lrc *lrc,
+					  struct xe_hw_engine *hwe,
+					  u32 *batch, size_t max_len)
+{
+	struct xe_gt *gt = lrc->gt;
+	struct xe_device *xe = gt_to_xe(gt);
+	u32 *cmd;
+
+	if (!xe_engine_class_has_auxccs(xe, hwe->class))
+		return 0;
+
+	if (xe_gt_WARN_ON(gt, max_len < 8))
+		return -ENOSPC;
+
+	cmd = xe_emit_aux_table_inv(hwe, batch);
+
+	return cmd - batch;
+}
+
 struct bo_setup {
 	ssize_t (*setup)(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
 			 u32 *batch, size_t max_size);
@@ -1341,9 +1366,11 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
 {
 	static const struct bo_setup rcs_funcs[] = {
 		{ .setup = setup_timestamp_wa },
+		{ .setup = setup_invalidate_auxccs_wa },
 		{ .setup = setup_configfs_mid_ctx_restore_bb },
 	};
 	static const struct bo_setup xcs_funcs[] = {
+		{ .setup = setup_invalidate_auxccs_wa },
 		{ .setup = setup_configfs_mid_ctx_restore_bb },
 	};
 	struct bo_setup_state state = {
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index e6ecd70618c3..cb6c7d18b939 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -12,6 +12,7 @@
 #include "regs/xe_engine_regs.h"
 #include "regs/xe_gt_regs.h"
 #include "xe_exec_queue.h"
+#include "xe_hw_engine.h"
 #include "xe_gt_printk.h"
 #include "xe_gt_types.h"
 #include "xe_lrc.h"
@@ -331,20 +332,6 @@ static void __emit_job_gen12_simple(struct xe_sched_job *job, struct xe_lrc *lrc
 	xe_lrc_write_ring(lrc, dw, i * sizeof(*dw));
 }
 
-static bool has_aux_ccs(struct xe_device *xe)
-{
-	/*
-	 * PVC is a special case that has no compression of either type
-	 * (FlatCCS or AuxCCS).  Also, AuxCCS is no longer used from Xe2
-	 * onward, so any future platforms with no FlatCCS will not have
-	 * AuxCCS, and we explicity do not want to support it on MTL.
-	 */
-	if (GRAPHICS_VERx100(xe) >= 1270 || xe->info.platform == XE_PVC)
-		return false;
-
-	return !xe->info.has_flat_ccs;
-}
-
 static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
 				   u64 batch_addr, u32 *head, u32 seqno)
 {
@@ -360,7 +347,7 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
 	dw[i++] = preparser_disable(true);
 
 	/* hsdes: 1809175790 */
-	if (has_aux_ccs(xe))
+	if (xe_engine_class_has_auxccs(xe, job->q->class))
 		i = emit_aux_table_inv(job->q->hwe, dw, i);
 
 	if (job->ring_ops_flush_tlb)
@@ -401,7 +388,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 	struct xe_gt *gt = job->q->gt;
 	struct xe_device *xe = gt_to_xe(gt);
 	bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
-	const bool aux_ccs = has_aux_ccs(xe);
+	const bool aux_ccs = xe_engine_class_has_auxccs(xe, job->q->class);
 	u32 mask_flags = 0;
 
 	*head = lrc->ring.tail;
-- 
2.52.0

Re: [PATCH v17 6/8] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds

[Rodrigo Vivi]

On Wed, Jan 28, 2026 at 10:13:31AM +0000, Tvrtko Ursulin wrote:
> Following from the i915 reference implementation, we add the AuxCCS
> invalidation to the indirect context workarounds page.
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_hw_engine.h | 24 ++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_lrc.c       | 27 +++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ring_ops.c  | 19 +++----------------
>  3 files changed, 54 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
> index 6b5f9fa2a594..725467b5877c 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.h
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.h
> @@ -6,6 +6,7 @@
>  #ifndef _XE_HW_ENGINE_H_
>  #define _XE_HW_ENGINE_H_
>  
> +#include "xe_device_types.h"
>  #include "xe_hw_engine_types.h"
>  
>  struct drm_printer;
> @@ -79,4 +80,27 @@ enum xe_force_wake_domains xe_hw_engine_to_fw_domain(struct xe_hw_engine *hwe);
>  void xe_hw_engine_mmio_write32(struct xe_hw_engine *hwe, struct xe_reg reg, u32 val);
>  u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg);
>  
> +static inline bool
> +xe_engine_class_has_auxccs(struct xe_device *xe, enum xe_engine_class class)
> +{
> +	/*
> +	 * PVC is a special case that has no compression of either type
> +	 * (FlatCCS or AuxCCS).  Also, AuxCCS is no longer used from Xe2
> +	 * onward, so any future platforms with no FlatCCS will not have
> +	 * AuxCCS, and we explicity do not want to support it on MTL.
> +	 */
> +	if (GRAPHICS_VERx100(xe) >= 1270 ||
> +	    xe->info.platform == XE_PVC ||
> +	    xe->info.has_flat_ccs)
> +		return false;
> +
> +	if (class == XE_ENGINE_CLASS_RENDER ||
> +	    class == XE_ENGINE_CLASS_COMPUTE ||
> +	    class == XE_ENGINE_CLASS_VIDEO_DECODE ||
> +	    class == XE_ENGINE_CLASS_VIDEO_ENHANCE)
> +		return true;
> +
> +	return false;
> +}
> +
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 3db7968aa5e2..25e4392e303f 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -23,10 +23,12 @@
>  #include "xe_exec_queue_types.h"
>  #include "xe_gt.h"
>  #include "xe_gt_printk.h"
> +#include "xe_hw_engine.h"
>  #include "xe_hw_fence.h"
>  #include "xe_map.h"
>  #include "xe_memirq.h"
>  #include "xe_mmio.h"
> +#include "xe_ring_ops.h"
>  #include "xe_sriov.h"
>  #include "xe_trace_lrc.h"
>  #include "xe_vm.h"
> @@ -93,6 +95,10 @@ gt_engine_needs_indirect_ctx(struct xe_gt *gt, enum xe_engine_class class)
>  					       class, NULL))
>  		return true;
>  
> +	/* For AuxCCS invalidation */
> +	if (xe_engine_class_has_auxccs(xe, class))
> +		return true;
> +
>  	return false;
>  }
>  
> @@ -1209,6 +1215,25 @@ static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
>  	return cmd - batch;
>  }
>  
> +static ssize_t setup_invalidate_auxccs_wa(struct xe_lrc *lrc,
> +					  struct xe_hw_engine *hwe,
> +					  u32 *batch, size_t max_len)
> +{
> +	struct xe_gt *gt = lrc->gt;
> +	struct xe_device *xe = gt_to_xe(gt);
> +	u32 *cmd;
> +
> +	if (!xe_engine_class_has_auxccs(xe, hwe->class))
> +		return 0;
> +
> +	if (xe_gt_WARN_ON(gt, max_len < 8))
> +		return -ENOSPC;
> +
> +	cmd = xe_emit_aux_table_inv(hwe, batch);
> +
> +	return cmd - batch;
> +}
> +
>  struct bo_setup {
>  	ssize_t (*setup)(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
>  			 u32 *batch, size_t max_size);
> @@ -1341,9 +1366,11 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
>  {
>  	static const struct bo_setup rcs_funcs[] = {
>  		{ .setup = setup_timestamp_wa },
> +		{ .setup = setup_invalidate_auxccs_wa },
>  		{ .setup = setup_configfs_mid_ctx_restore_bb },
>  	};
>  	static const struct bo_setup xcs_funcs[] = {
> +		{ .setup = setup_invalidate_auxccs_wa },
>  		{ .setup = setup_configfs_mid_ctx_restore_bb },
>  	};
>  	struct bo_setup_state state = {
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> index e6ecd70618c3..cb6c7d18b939 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> @@ -12,6 +12,7 @@
>  #include "regs/xe_engine_regs.h"
>  #include "regs/xe_gt_regs.h"
>  #include "xe_exec_queue.h"
> +#include "xe_hw_engine.h"
>  #include "xe_gt_printk.h"
>  #include "xe_gt_types.h"
>  #include "xe_lrc.h"
> @@ -331,20 +332,6 @@ static void __emit_job_gen12_simple(struct xe_sched_job *job, struct xe_lrc *lrc
>  	xe_lrc_write_ring(lrc, dw, i * sizeof(*dw));
>  }
>  
> -static bool has_aux_ccs(struct xe_device *xe)
> -{
> -	/*
> -	 * PVC is a special case that has no compression of either type
> -	 * (FlatCCS or AuxCCS).  Also, AuxCCS is no longer used from Xe2
> -	 * onward, so any future platforms with no FlatCCS will not have
> -	 * AuxCCS, and we explicity do not want to support it on MTL.
> -	 */
> -	if (GRAPHICS_VERx100(xe) >= 1270 || xe->info.platform == XE_PVC)
> -		return false;
> -
> -	return !xe->info.has_flat_ccs;
> -}
> -
>  static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
>  				   u64 batch_addr, u32 *head, u32 seqno)
>  {
> @@ -360,7 +347,7 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
>  	dw[i++] = preparser_disable(true);
>  
>  	/* hsdes: 1809175790 */
> -	if (has_aux_ccs(xe))
> +	if (xe_engine_class_has_auxccs(xe, job->q->class))
>  		i = emit_aux_table_inv(job->q->hwe, dw, i);
>  
>  	if (job->ring_ops_flush_tlb)
> @@ -401,7 +388,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
>  	struct xe_gt *gt = job->q->gt;
>  	struct xe_device *xe = gt_to_xe(gt);
>  	bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
> -	const bool aux_ccs = has_aux_ccs(xe);
> +	const bool aux_ccs = xe_engine_class_has_auxccs(xe, job->q->class);
>  	u32 mask_flags = 0;
>  
>  	*head = lrc->ring.tail;
> -- 
> 2.52.0
> 

[PATCH v17 7/8] drm/xe/display: Add support for AuxCCS

[Tvrtko Ursulin]

Add support for mapping the auxiliary CCS buffer into the DPT page tables.

This will allow for better power efficiency by enabling the render
compression frame buffer modifiers such as
I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS in a following patch.

We do this by refactoring the code a bit so handling for the linear
auxiliary frame buffer can be added in a tidy way. Also replace some
hardcoded constants.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Michael J. Ruhl <michael.j.ruhl@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 111 ++++++++++++++++++-------
 1 file changed, 81 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index b285cc446f57..7617c2b3f3cb 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -50,33 +50,94 @@ write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_
 	*dpt_ofs = ALIGN(*dpt_ofs, 4096);
 }
 
+static unsigned int
+write_dpt_padding(struct iosys_map *map, unsigned int dest, unsigned int pad)
+{
+	/* The DE ignores the PTEs for the padding tiles */
+	return dest + pad * sizeof(u64);
+}
+
+static unsigned int
+write_dpt_remapped_linear(struct xe_bo *bo, struct iosys_map *map,
+			  unsigned int dest,
+			  const struct intel_remapped_plane_info *plane)
+{
+	struct xe_device *xe = xe_bo_device(bo);
+	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
+	const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
+						 xe->pat.idx[XE_CACHE_NONE]);
+	unsigned int offset = plane->offset * XE_PAGE_SIZE;
+	unsigned int size = plane->size;
+
+	while (size--) {
+		u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
+
+		iosys_map_wr(map, dest, u64, addr | pte);
+		dest += sizeof(u64);
+		offset += XE_PAGE_SIZE;
+	}
+
+	return dest;
+}
+
+static unsigned int
+write_dpt_remapped_tiled(struct xe_bo *bo, struct iosys_map *map,
+			 unsigned int dest,
+			 const struct intel_remapped_plane_info *plane)
+{
+	struct xe_device *xe = xe_bo_device(bo);
+	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
+	const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
+						 xe->pat.idx[XE_CACHE_NONE]);
+	unsigned int offset, column, row;
+
+	for (row = 0; row < plane->height; row++) {
+		offset = (plane->offset + plane->src_stride * row) *
+			 XE_PAGE_SIZE;
+
+		for (column = 0; column < plane->width; column++) {
+			u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
+
+			iosys_map_wr(map, dest, u64, addr | pte);
+			dest += sizeof(u64);
+			offset += XE_PAGE_SIZE;
+		}
+
+		dest = write_dpt_padding(map, dest,
+					 plane->dst_stride - plane->width);
+	}
+
+	return dest;
+}
+
 static void
-write_dpt_remapped(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs,
-		   u32 bo_ofs, u32 width, u32 height, u32 src_stride,
-		   u32 dst_stride)
+write_dpt_remapped(struct xe_bo *bo,
+		   const struct intel_remapped_info *remap_info,
+		   struct iosys_map *map)
 {
-	struct xe_device *xe = xe_bo_device(bo);
-	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
-	u32 column, row;
-	u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo, xe->pat.idx[XE_CACHE_NONE]);
+	unsigned int i, dest = 0;
 
-	for (row = 0; row < height; row++) {
-		u32 src_idx = src_stride * row + bo_ofs;
+	for (i = 0; i < ARRAY_SIZE(remap_info->plane); i++) {
+		const struct intel_remapped_plane_info *plane =
+						&remap_info->plane[i];
 
-		for (column = 0; column < width; column++) {
-			u64 addr = xe_bo_addr(bo, src_idx * XE_PAGE_SIZE, XE_PAGE_SIZE);
-			iosys_map_wr(map, *dpt_ofs, u64, pte | addr);
+		if (!plane->width && !plane->height && !plane->linear)
+			continue;
 
-			*dpt_ofs += 8;
-			src_idx++;
+		if (remap_info->plane_alignment) {
+			const unsigned int index = dest / sizeof(u64);
+			const unsigned int pad =
+				ALIGN(index, remap_info->plane_alignment) -
+				index;
+
+			dest = write_dpt_padding(map, dest, pad);
 		}
 
-		/* The DE ignores the PTEs for the padding tiles */
-		*dpt_ofs += (dst_stride - width) * 8;
+		if (plane->linear)
+			dest = write_dpt_remapped_linear(bo, map, dest, plane);
+		else
+			dest = write_dpt_remapped_tiled(bo, map, dest, plane);
 	}
-
-	/* Align to next page */
-	*dpt_ofs = ALIGN(*dpt_ofs, 4096);
 }
 
 static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
@@ -139,17 +200,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 			iosys_map_wr(&dpt->vmap, x * 8, u64, pte | addr);
 		}
 	} else if (view->type == I915_GTT_VIEW_REMAPPED) {
-		const struct intel_remapped_info *remap_info = &view->remapped;
-		u32 i, dpt_ofs = 0;
-
-		for (i = 0; i < ARRAY_SIZE(remap_info->plane); i++)
-			write_dpt_remapped(bo, &dpt->vmap, &dpt_ofs,
-					   remap_info->plane[i].offset,
-					   remap_info->plane[i].width,
-					   remap_info->plane[i].height,
-					   remap_info->plane[i].src_stride,
-					   remap_info->plane[i].dst_stride);
-
+		write_dpt_remapped(bo, &view->remapped, &dpt->vmap);
 	} else {
 		const struct intel_rotation_info *rot_info = &view->rotated;
 		u32 i, dpt_ofs = 0;
-- 
2.52.0

[PATCH v17 8/8] drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P

[Tvrtko Ursulin]

Now that we have implemented all the related missing bits we can enable
the AuxCCS compressed modifiers which were disabled in
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe").

Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:

        [PLANE:32:plane 1A]: type=PRI
                uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=28
                hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000

Display is working fine - no artefacts, no DMAR/PIPE faults.

v2:
 * Adjust patch title. (Rodrigo)

v3:
 * Complete rewrite based on the display parent interface.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
References: cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> # v2
---
 drivers/gpu/drm/xe/display/xe_display.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index c8dd3faa9b97..5180de285295 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -539,6 +539,13 @@ static const struct intel_display_irq_interface xe_display_irq_interface = {
 	.synchronize = irq_synchronize,
 };
 
+static bool has_auxccs(struct drm_device *drm)
+{
+	struct xe_device *xe = to_xe_device(drm);
+
+	return xe->info.platform == XE_ALDERLAKE_P;
+}
+
 static const struct intel_display_parent_interface parent = {
 	.dsb = &xe_display_dsb_interface,
 	.hdcp = &xe_display_hdcp_interface,
@@ -548,6 +555,7 @@ static const struct intel_display_parent_interface parent = {
 	.pcode = &xe_display_pcode_interface,
 	.rpm = &xe_display_rpm_interface,
 	.stolen = &xe_display_stolen_interface,
+	.has_auxccs = has_auxccs,
 };
 
 /**
-- 
2.52.0

✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers

[Patchwork]

== Series Details ==

Series: AuxCCS handling and render compression modifiers
URL   : https://patchwork.freedesktop.org/series/160748/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 821f0c1a8b9a28c2c67a3f41fe8e58688f5205b6
Author: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Date:   Wed Jan 28 10:13:33 2026 +0000

    drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P
    
    Now that we have implemented all the related missing bits we can enable
    the AuxCCS compressed modifiers which were disabled in
    cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe").
    
    Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
    
            [PLANE:32:plane 1A]: type=PRI
                    uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=28
                    hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000
    
    Display is working fine - no artefacts, no DMAR/PIPE faults.
    
    v2:
     * Adjust patch title. (Rodrigo)
    
    v3:
     * Complete rewrite based on the display parent interface.
    
    Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
    References: cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
    Cc: Jani Nikula <jani.nikula@intel.com>
    Cc: José Roberto de Souza <jose.souza@intel.com>
    Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
    Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
    Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> # v2
+ /mt/dim checkpatch 8059f097e25f736bb3da09af6a9b283079abfd4f drm-intel
384621145565 drm/xe: Use write-combine mapping when populating DPT
c793d714e10f drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake
-:25: WARNING:TYPO_SPELLING: 'explicity' may be misspelled - perhaps 'explicitly'?
#25: FILE: drivers/gpu/drm/xe/xe_ring_ops.c:305:
+	 * AuxCCS, and we explicity do not want to support it on MTL.
 	                  ^^^^^^^^^

total: 0 errors, 1 warnings, 0 checks, 11 lines checked
9c83fbe931ec drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
05431b371a0b drm/xe/xelp: Wait for AuxCCS invalidation to complete
bb52f27ca25a drm/xe: Export xe_emit_aux_table_inv
be32a7df963e drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds
-:36: WARNING:TYPO_SPELLING: 'explicity' may be misspelled - perhaps 'explicitly'?
#36: FILE: drivers/gpu/drm/xe/xe_hw_engine.h:90:
+	 * AuxCCS, and we explicity do not want to support it on MTL.
 	                  ^^^^^^^^^

total: 0 errors, 1 warnings, 0 checks, 135 lines checked
b23d25e66c32 drm/xe/display: Add support for AuxCCS
821f0c1a8b9a drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P
-:12: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#12: 
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe").

-:12: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")'
#12: 
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe").

total: 1 errors, 1 warnings, 0 checks, 20 lines checked

✓ CI.KUnit: success for AuxCCS handling and render compression modifiers

[Patchwork]

== Series Details ==

Series: AuxCCS handling and render compression modifiers
URL   : https://patchwork.freedesktop.org/series/160748/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[17:23:35] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:23:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:24:11] Starting KUnit Kernel (1/1)...
[17:24:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:24:12] ================== guc_buf (11 subtests) ===================
[17:24:12] [PASSED] test_smallest
[17:24:12] [PASSED] test_largest
[17:24:12] [PASSED] test_granular
[17:24:12] [PASSED] test_unique
[17:24:12] [PASSED] test_overlap
[17:24:12] [PASSED] test_reusable
[17:24:12] [PASSED] test_too_big
[17:24:12] [PASSED] test_flush
[17:24:12] [PASSED] test_lookup
[17:24:12] [PASSED] test_data
[17:24:12] [PASSED] test_class
[17:24:12] ===================== [PASSED] guc_buf =====================
[17:24:12] =================== guc_dbm (7 subtests) ===================
[17:24:12] [PASSED] test_empty
[17:24:12] [PASSED] test_default
[17:24:12] ======================== test_size  ========================
[17:24:12] [PASSED] 4
[17:24:12] [PASSED] 8
[17:24:12] [PASSED] 32
[17:24:12] [PASSED] 256
[17:24:12] ==================== [PASSED] test_size ====================
[17:24:12] ======================= test_reuse  ========================
[17:24:12] [PASSED] 4
[17:24:12] [PASSED] 8
[17:24:12] [PASSED] 32
[17:24:12] [PASSED] 256
[17:24:12] =================== [PASSED] test_reuse ====================
[17:24:12] =================== test_range_overlap  ====================
[17:24:12] [PASSED] 4
[17:24:12] [PASSED] 8
[17:24:12] [PASSED] 32
[17:24:12] [PASSED] 256
[17:24:12] =============== [PASSED] test_range_overlap ================
[17:24:12] =================== test_range_compact  ====================
[17:24:12] [PASSED] 4
[17:24:12] [PASSED] 8
[17:24:12] [PASSED] 32
[17:24:12] [PASSED] 256
[17:24:12] =============== [PASSED] test_range_compact ================
[17:24:12] ==================== test_range_spare  =====================
[17:24:12] [PASSED] 4
[17:24:12] [PASSED] 8
[17:24:12] [PASSED] 32
[17:24:12] [PASSED] 256
[17:24:12] ================ [PASSED] test_range_spare =================
[17:24:12] ===================== [PASSED] guc_dbm =====================
[17:24:12] =================== guc_idm (6 subtests) ===================
[17:24:12] [PASSED] bad_init
[17:24:12] [PASSED] no_init
[17:24:12] [PASSED] init_fini
[17:24:12] [PASSED] check_used
[17:24:12] [PASSED] check_quota
[17:24:12] [PASSED] check_all
[17:24:12] ===================== [PASSED] guc_idm =====================
[17:24:12] ================== no_relay (3 subtests) ===================
[17:24:12] [PASSED] xe_drops_guc2pf_if_not_ready
[17:24:12] [PASSED] xe_drops_guc2vf_if_not_ready
[17:24:12] [PASSED] xe_rejects_send_if_not_ready
[17:24:12] ==================== [PASSED] no_relay =====================
[17:24:12] ================== pf_relay (14 subtests) ==================
[17:24:12] [PASSED] pf_rejects_guc2pf_too_short
[17:24:12] [PASSED] pf_rejects_guc2pf_too_long
[17:24:12] [PASSED] pf_rejects_guc2pf_no_payload
[17:24:12] [PASSED] pf_fails_no_payload
[17:24:12] [PASSED] pf_fails_bad_origin
[17:24:12] [PASSED] pf_fails_bad_type
[17:24:12] [PASSED] pf_txn_reports_error
[17:24:12] [PASSED] pf_txn_sends_pf2guc
[17:24:12] [PASSED] pf_sends_pf2guc
[17:24:12] [SKIPPED] pf_loopback_nop
[17:24:12] [SKIPPED] pf_loopback_echo
[17:24:12] [SKIPPED] pf_loopback_fail
[17:24:12] [SKIPPED] pf_loopback_busy
[17:24:12] [SKIPPED] pf_loopback_retry
[17:24:12] ==================== [PASSED] pf_relay =====================
[17:24:12] ================== vf_relay (3 subtests) ===================
[17:24:12] [PASSED] vf_rejects_guc2vf_too_short
[17:24:12] [PASSED] vf_rejects_guc2vf_too_long
[17:24:12] [PASSED] vf_rejects_guc2vf_no_payload
[17:24:12] ==================== [PASSED] vf_relay =====================
[17:24:12] ================ pf_gt_config (6 subtests) =================
[17:24:12] [PASSED] fair_contexts_1vf
[17:24:12] [PASSED] fair_doorbells_1vf
[17:24:12] [PASSED] fair_ggtt_1vf
[17:24:12] ====================== fair_contexts  ======================
[17:24:12] [PASSED] 1 VF
[17:24:12] [PASSED] 2 VFs
[17:24:12] [PASSED] 3 VFs
[17:24:12] [PASSED] 4 VFs
[17:24:12] [PASSED] 5 VFs
[17:24:12] [PASSED] 6 VFs
[17:24:12] [PASSED] 7 VFs
[17:24:12] [PASSED] 8 VFs
[17:24:12] [PASSED] 9 VFs
[17:24:12] [PASSED] 10 VFs
[17:24:12] [PASSED] 11 VFs
[17:24:12] [PASSED] 12 VFs
[17:24:12] [PASSED] 13 VFs
[17:24:12] [PASSED] 14 VFs
[17:24:12] [PASSED] 15 VFs
[17:24:12] [PASSED] 16 VFs
[17:24:12] [PASSED] 17 VFs
[17:24:12] [PASSED] 18 VFs
[17:24:12] [PASSED] 19 VFs
[17:24:12] [PASSED] 20 VFs
[17:24:12] [PASSED] 21 VFs
[17:24:12] [PASSED] 22 VFs
[17:24:12] [PASSED] 23 VFs
[17:24:12] [PASSED] 24 VFs
[17:24:12] [PASSED] 25 VFs
[17:24:12] [PASSED] 26 VFs
[17:24:12] [PASSED] 27 VFs
[17:24:12] [PASSED] 28 VFs
[17:24:12] [PASSED] 29 VFs
[17:24:12] [PASSED] 30 VFs
[17:24:12] [PASSED] 31 VFs
[17:24:12] [PASSED] 32 VFs
[17:24:12] [PASSED] 33 VFs
[17:24:12] [PASSED] 34 VFs
[17:24:12] [PASSED] 35 VFs
[17:24:12] [PASSED] 36 VFs
[17:24:12] [PASSED] 37 VFs
[17:24:12] [PASSED] 38 VFs
[17:24:12] [PASSED] 39 VFs
[17:24:12] [PASSED] 40 VFs
[17:24:12] [PASSED] 41 VFs
[17:24:12] [PASSED] 42 VFs
[17:24:12] [PASSED] 43 VFs
[17:24:12] [PASSED] 44 VFs
[17:24:12] [PASSED] 45 VFs
[17:24:12] [PASSED] 46 VFs
[17:24:12] [PASSED] 47 VFs
[17:24:12] [PASSED] 48 VFs
[17:24:12] [PASSED] 49 VFs
[17:24:12] [PASSED] 50 VFs
[17:24:12] [PASSED] 51 VFs
[17:24:12] [PASSED] 52 VFs
[17:24:12] [PASSED] 53 VFs
[17:24:12] [PASSED] 54 VFs
[17:24:12] [PASSED] 55 VFs
[17:24:12] [PASSED] 56 VFs
[17:24:12] [PASSED] 57 VFs
[17:24:12] [PASSED] 58 VFs
[17:24:12] [PASSED] 59 VFs
[17:24:12] [PASSED] 60 VFs
[17:24:12] [PASSED] 61 VFs
[17:24:12] [PASSED] 62 VFs
[17:24:12] [PASSED] 63 VFs
[17:24:12] ================== [PASSED] fair_contexts ==================
[17:24:12] ===================== fair_doorbells  ======================
[17:24:12] [PASSED] 1 VF
[17:24:12] [PASSED] 2 VFs
[17:24:12] [PASSED] 3 VFs
[17:24:12] [PASSED] 4 VFs
[17:24:12] [PASSED] 5 VFs
[17:24:12] [PASSED] 6 VFs
[17:24:12] [PASSED] 7 VFs
[17:24:12] [PASSED] 8 VFs
[17:24:12] [PASSED] 9 VFs
[17:24:12] [PASSED] 10 VFs
[17:24:12] [PASSED] 11 VFs
[17:24:12] [PASSED] 12 VFs
[17:24:12] [PASSED] 13 VFs
[17:24:12] [PASSED] 14 VFs
[17:24:12] [PASSED] 15 VFs
[17:24:12] [PASSED] 16 VFs
[17:24:12] [PASSED] 17 VFs
[17:24:12] [PASSED] 18 VFs
[17:24:12] [PASSED] 19 VFs
[17:24:12] [PASSED] 20 VFs
[17:24:12] [PASSED] 21 VFs
[17:24:12] [PASSED] 22 VFs
[17:24:12] [PASSED] 23 VFs
[17:24:12] [PASSED] 24 VFs
[17:24:12] [PASSED] 25 VFs
[17:24:12] [PASSED] 26 VFs
[17:24:12] [PASSED] 27 VFs
[17:24:12] [PASSED] 28 VFs
[17:24:12] [PASSED] 29 VFs
[17:24:12] [PASSED] 30 VFs
[17:24:12] [PASSED] 31 VFs
[17:24:12] [PASSED] 32 VFs
[17:24:12] [PASSED] 33 VFs
[17:24:12] [PASSED] 34 VFs
[17:24:12] [PASSED] 35 VFs
[17:24:12] [PASSED] 36 VFs
[17:24:12] [PASSED] 37 VFs
[17:24:12] [PASSED] 38 VFs
[17:24:12] [PASSED] 39 VFs
[17:24:12] [PASSED] 40 VFs
[17:24:12] [PASSED] 41 VFs
[17:24:12] [PASSED] 42 VFs
[17:24:12] [PASSED] 43 VFs
[17:24:12] [PASSED] 44 VFs
[17:24:12] [PASSED] 45 VFs
[17:24:12] [PASSED] 46 VFs
[17:24:12] [PASSED] 47 VFs
[17:24:12] [PASSED] 48 VFs
[17:24:12] [PASSED] 49 VFs
[17:24:12] [PASSED] 50 VFs
[17:24:12] [PASSED] 51 VFs
[17:24:12] [PASSED] 52 VFs
[17:24:12] [PASSED] 53 VFs
[17:24:12] [PASSED] 54 VFs
[17:24:12] [PASSED] 55 VFs
[17:24:12] [PASSED] 56 VFs
[17:24:12] [PASSED] 57 VFs
[17:24:12] [PASSED] 58 VFs
[17:24:12] [PASSED] 59 VFs
[17:24:12] [PASSED] 60 VFs
[17:24:12] [PASSED] 61 VFs
[17:24:12] [PASSED] 62 VFs
[17:24:12] [PASSED] 63 VFs
[17:24:12] ================= [PASSED] fair_doorbells ==================
[17:24:12] ======================== fair_ggtt  ========================
[17:24:12] [PASSED] 1 VF
[17:24:12] [PASSED] 2 VFs
[17:24:12] [PASSED] 3 VFs
[17:24:12] [PASSED] 4 VFs
[17:24:12] [PASSED] 5 VFs
[17:24:12] [PASSED] 6 VFs
[17:24:12] [PASSED] 7 VFs
[17:24:12] [PASSED] 8 VFs
[17:24:12] [PASSED] 9 VFs
[17:24:12] [PASSED] 10 VFs
[17:24:12] [PASSED] 11 VFs
[17:24:12] [PASSED] 12 VFs
[17:24:12] [PASSED] 13 VFs
[17:24:12] [PASSED] 14 VFs
[17:24:12] [PASSED] 15 VFs
[17:24:12] [PASSED] 16 VFs
[17:24:12] [PASSED] 17 VFs
[17:24:12] [PASSED] 18 VFs
[17:24:12] [PASSED] 19 VFs
[17:24:12] [PASSED] 20 VFs
[17:24:12] [PASSED] 21 VFs
[17:24:12] [PASSED] 22 VFs
[17:24:12] [PASSED] 23 VFs
[17:24:12] [PASSED] 24 VFs
[17:24:12] [PASSED] 25 VFs
[17:24:12] [PASSED] 26 VFs
[17:24:12] [PASSED] 27 VFs
[17:24:12] [PASSED] 28 VFs
[17:24:12] [PASSED] 29 VFs
[17:24:12] [PASSED] 30 VFs
[17:24:12] [PASSED] 31 VFs
[17:24:12] [PASSED] 32 VFs
[17:24:12] [PASSED] 33 VFs
[17:24:12] [PASSED] 34 VFs
[17:24:12] [PASSED] 35 VFs
[17:24:12] [PASSED] 36 VFs
[17:24:12] [PASSED] 37 VFs
[17:24:12] [PASSED] 38 VFs
[17:24:12] [PASSED] 39 VFs
[17:24:12] [PASSED] 40 VFs
[17:24:12] [PASSED] 41 VFs
[17:24:12] [PASSED] 42 VFs
[17:24:12] [PASSED] 43 VFs
[17:24:12] [PASSED] 44 VFs
[17:24:12] [PASSED] 45 VFs
[17:24:12] [PASSED] 46 VFs
[17:24:12] [PASSED] 47 VFs
[17:24:12] [PASSED] 48 VFs
[17:24:12] [PASSED] 49 VFs
[17:24:12] [PASSED] 50 VFs
[17:24:12] [PASSED] 51 VFs
[17:24:12] [PASSED] 52 VFs
[17:24:12] [PASSED] 53 VFs
[17:24:12] [PASSED] 54 VFs
[17:24:12] [PASSED] 55 VFs
[17:24:12] [PASSED] 56 VFs
[17:24:12] [PASSED] 57 VFs
[17:24:12] [PASSED] 58 VFs
[17:24:12] [PASSED] 59 VFs
[17:24:12] [PASSED] 60 VFs
[17:24:12] [PASSED] 61 VFs
[17:24:12] [PASSED] 62 VFs
[17:24:12] [PASSED] 63 VFs
[17:24:12] ==================== [PASSED] fair_ggtt ====================
[17:24:12] ================== [PASSED] pf_gt_config ===================
[17:24:12] ===================== lmtt (1 subtest) =====================
[17:24:12] ======================== test_ops  =========================
[17:24:12] [PASSED] 2-level
[17:24:12] [PASSED] multi-level
[17:24:12] ==================== [PASSED] test_ops =====================
[17:24:12] ====================== [PASSED] lmtt =======================
[17:24:12] ================= pf_service (11 subtests) =================
[17:24:12] [PASSED] pf_negotiate_any
[17:24:12] [PASSED] pf_negotiate_base_match
[17:24:12] [PASSED] pf_negotiate_base_newer
[17:24:12] [PASSED] pf_negotiate_base_next
[17:24:12] [SKIPPED] pf_negotiate_base_older
[17:24:12] [PASSED] pf_negotiate_base_prev
[17:24:12] [PASSED] pf_negotiate_latest_match
[17:24:12] [PASSED] pf_negotiate_latest_newer
[17:24:12] [PASSED] pf_negotiate_latest_next
[17:24:12] [SKIPPED] pf_negotiate_latest_older
[17:24:12] [SKIPPED] pf_negotiate_latest_prev
[17:24:12] =================== [PASSED] pf_service ====================
[17:24:12] ================= xe_guc_g2g (2 subtests) ==================
[17:24:12] ============== xe_live_guc_g2g_kunit_default  ==============
[17:24:12] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[17:24:12] ============== xe_live_guc_g2g_kunit_allmem  ===============
[17:24:12] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[17:24:12] =================== [SKIPPED] xe_guc_g2g ===================
[17:24:12] =================== xe_mocs (2 subtests) ===================
[17:24:12] ================ xe_live_mocs_kernel_kunit  ================
[17:24:12] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[17:24:12] ================ xe_live_mocs_reset_kunit  =================
[17:24:12] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[17:24:12] ==================== [SKIPPED] xe_mocs =====================
[17:24:12] ================= xe_migrate (2 subtests) ==================
[17:24:12] ================= xe_migrate_sanity_kunit  =================
[17:24:12] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[17:24:12] ================== xe_validate_ccs_kunit  ==================
[17:24:12] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[17:24:12] =================== [SKIPPED] xe_migrate ===================
[17:24:12] ================== xe_dma_buf (1 subtest) ==================
[17:24:12] ==================== xe_dma_buf_kunit  =====================
[17:24:12] ================ [SKIPPED] xe_dma_buf_kunit ================
[17:24:12] =================== [SKIPPED] xe_dma_buf ===================
[17:24:12] ================= xe_bo_shrink (1 subtest) =================
[17:24:12] =================== xe_bo_shrink_kunit  ====================
[17:24:12] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[17:24:12] ================== [SKIPPED] xe_bo_shrink ==================
[17:24:12] ==================== xe_bo (2 subtests) ====================
[17:24:12] ================== xe_ccs_migrate_kunit  ===================
[17:24:12] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[17:24:12] ==================== xe_bo_evict_kunit  ====================
[17:24:12] =============== [SKIPPED] xe_bo_evict_kunit ================
[17:24:12] ===================== [SKIPPED] xe_bo ======================
[17:24:12] ==================== args (13 subtests) ====================
[17:24:12] [PASSED] count_args_test
[17:24:12] [PASSED] call_args_example
[17:24:12] [PASSED] call_args_test
[17:24:12] [PASSED] drop_first_arg_example
[17:24:12] [PASSED] drop_first_arg_test
[17:24:12] [PASSED] first_arg_example
[17:24:12] [PASSED] first_arg_test
[17:24:12] [PASSED] last_arg_example
[17:24:12] [PASSED] last_arg_test
[17:24:12] [PASSED] pick_arg_example
[17:24:12] [PASSED] if_args_example
[17:24:12] [PASSED] if_args_test
[17:24:12] [PASSED] sep_comma_example
[17:24:12] ====================== [PASSED] args =======================
[17:24:12] =================== xe_pci (3 subtests) ====================
[17:24:12] ==================== check_graphics_ip  ====================
[17:24:12] [PASSED] 12.00 Xe_LP
[17:24:12] [PASSED] 12.10 Xe_LP+
[17:24:12] [PASSED] 12.55 Xe_HPG
[17:24:12] [PASSED] 12.60 Xe_HPC
[17:24:12] [PASSED] 12.70 Xe_LPG
[17:24:12] [PASSED] 12.71 Xe_LPG
[17:24:12] [PASSED] 12.74 Xe_LPG+
[17:24:12] [PASSED] 20.01 Xe2_HPG
[17:24:12] [PASSED] 20.02 Xe2_HPG
[17:24:12] [PASSED] 20.04 Xe2_LPG
[17:24:12] [PASSED] 30.00 Xe3_LPG
[17:24:12] [PASSED] 30.01 Xe3_LPG
[17:24:12] [PASSED] 30.03 Xe3_LPG
[17:24:12] [PASSED] 30.04 Xe3_LPG
[17:24:12] [PASSED] 30.05 Xe3_LPG
[17:24:12] [PASSED] 35.11 Xe3p_XPC
[17:24:12] ================ [PASSED] check_graphics_ip ================
[17:24:12] ===================== check_media_ip  ======================
[17:24:12] [PASSED] 12.00 Xe_M
[17:24:12] [PASSED] 12.55 Xe_HPM
[17:24:12] [PASSED] 13.00 Xe_LPM+
[17:24:12] [PASSED] 13.01 Xe2_HPM
[17:24:12] [PASSED] 20.00 Xe2_LPM
[17:24:12] [PASSED] 30.00 Xe3_LPM
[17:24:12] [PASSED] 30.02 Xe3_LPM
[17:24:12] [PASSED] 35.00 Xe3p_LPM
[17:24:12] [PASSED] 35.03 Xe3p_HPM
[17:24:12] ================= [PASSED] check_media_ip ==================
[17:24:12] =================== check_platform_desc  ===================
[17:24:12] [PASSED] 0x9A60 (TIGERLAKE)
[17:24:12] [PASSED] 0x9A68 (TIGERLAKE)
[17:24:12] [PASSED] 0x9A70 (TIGERLAKE)
[17:24:12] [PASSED] 0x9A40 (TIGERLAKE)
[17:24:12] [PASSED] 0x9A49 (TIGERLAKE)
[17:24:12] [PASSED] 0x9A59 (TIGERLAKE)
[17:24:12] [PASSED] 0x9A78 (TIGERLAKE)
[17:24:12] [PASSED] 0x9AC0 (TIGERLAKE)
[17:24:12] [PASSED] 0x9AC9 (TIGERLAKE)
[17:24:12] [PASSED] 0x9AD9 (TIGERLAKE)
[17:24:12] [PASSED] 0x9AF8 (TIGERLAKE)
[17:24:12] [PASSED] 0x4C80 (ROCKETLAKE)
[17:24:12] [PASSED] 0x4C8A (ROCKETLAKE)
[17:24:12] [PASSED] 0x4C8B (ROCKETLAKE)
[17:24:12] [PASSED] 0x4C8C (ROCKETLAKE)
[17:24:12] [PASSED] 0x4C90 (ROCKETLAKE)
[17:24:12] [PASSED] 0x4C9A (ROCKETLAKE)
[17:24:12] [PASSED] 0x4680 (ALDERLAKE_S)
[17:24:12] [PASSED] 0x4682 (ALDERLAKE_S)
[17:24:12] [PASSED] 0x4688 (ALDERLAKE_S)
[17:24:12] [PASSED] 0x468A (ALDERLAKE_S)
[17:24:12] [PASSED] 0x468B (ALDERLAKE_S)
[17:24:12] [PASSED] 0x4690 (ALDERLAKE_S)
[17:24:12] [PASSED] 0x4692 (ALDERLAKE_S)
[17:24:12] [PASSED] 0x4693 (ALDERLAKE_S)
[17:24:12] [PASSED] 0x46A0 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46A1 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46A2 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46A3 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46A6 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46A8 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46AA (ALDERLAKE_P)
[17:24:12] [PASSED] 0x462A (ALDERLAKE_P)
[17:24:12] [PASSED] 0x4626 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[17:24:12] [PASSED] 0x46B0 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46B1 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46B2 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46B3 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46C0 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46C1 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46C2 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46C3 (ALDERLAKE_P)
[17:24:12] [PASSED] 0x46D0 (ALDERLAKE_N)
[17:24:12] [PASSED] 0x46D1 (ALDERLAKE_N)
[17:24:12] [PASSED] 0x46D2 (ALDERLAKE_N)
[17:24:12] [PASSED] 0x46D3 (ALDERLAKE_N)
[17:24:12] [PASSED] 0x46D4 (ALDERLAKE_N)
[17:24:12] [PASSED] 0xA721 (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA7A1 (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA7A9 (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA7AC (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA7AD (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA720 (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA7A0 (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA7A8 (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA7AA (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA7AB (ALDERLAKE_P)
[17:24:12] [PASSED] 0xA780 (ALDERLAKE_S)
[17:24:12] [PASSED] 0xA781 (ALDERLAKE_S)
[17:24:12] [PASSED] 0xA782 (ALDERLAKE_S)
[17:24:12] [PASSED] 0xA783 (ALDERLAKE_S)
[17:24:12] [PASSED] 0xA788 (ALDERLAKE_S)
[17:24:12] [PASSED] 0xA789 (ALDERLAKE_S)
[17:24:12] [PASSED] 0xA78A (ALDERLAKE_S)
[17:24:12] [PASSED] 0xA78B (ALDERLAKE_S)
[17:24:12] [PASSED] 0x4905 (DG1)
[17:24:12] [PASSED] 0x4906 (DG1)
[17:24:12] [PASSED] 0x4907 (DG1)
[17:24:12] [PASSED] 0x4908 (DG1)
[17:24:12] [PASSED] 0x4909 (DG1)
[17:24:12] [PASSED] 0x56C0 (DG2)
[17:24:12] [PASSED] 0x56C2 (DG2)
[17:24:12] [PASSED] 0x56C1 (DG2)
[17:24:12] [PASSED] 0x7D51 (METEORLAKE)
[17:24:12] [PASSED] 0x7DD1 (METEORLAKE)
[17:24:12] [PASSED] 0x7D41 (METEORLAKE)
[17:24:12] [PASSED] 0x7D67 (METEORLAKE)
[17:24:12] [PASSED] 0xB640 (METEORLAKE)
[17:24:12] [PASSED] 0x56A0 (DG2)
[17:24:12] [PASSED] 0x56A1 (DG2)
[17:24:12] [PASSED] 0x56A2 (DG2)
[17:24:12] [PASSED] 0x56BE (DG2)
[17:24:12] [PASSED] 0x56BF (DG2)
[17:24:12] [PASSED] 0x5690 (DG2)
[17:24:12] [PASSED] 0x5691 (DG2)
[17:24:12] [PASSED] 0x5692 (DG2)
[17:24:12] [PASSED] 0x56A5 (DG2)
[17:24:12] [PASSED] 0x56A6 (DG2)
[17:24:12] [PASSED] 0x56B0 (DG2)
[17:24:12] [PASSED] 0x56B1 (DG2)
[17:24:12] [PASSED] 0x56BA (DG2)
[17:24:12] [PASSED] 0x56BB (DG2)
[17:24:12] [PASSED] 0x56BC (DG2)
[17:24:12] [PASSED] 0x56BD (DG2)
[17:24:12] [PASSED] 0x5693 (DG2)
[17:24:12] [PASSED] 0x5694 (DG2)
[17:24:12] [PASSED] 0x5695 (DG2)
[17:24:12] [PASSED] 0x56A3 (DG2)
[17:24:12] [PASSED] 0x56A4 (DG2)
[17:24:12] [PASSED] 0x56B2 (DG2)
[17:24:12] [PASSED] 0x56B3 (DG2)
[17:24:12] [PASSED] 0x5696 (DG2)
[17:24:12] [PASSED] 0x5697 (DG2)
[17:24:12] [PASSED] 0xB69 (PVC)
[17:24:12] [PASSED] 0xB6E (PVC)
[17:24:12] [PASSED] 0xBD4 (PVC)
[17:24:12] [PASSED] 0xBD5 (PVC)
[17:24:12] [PASSED] 0xBD6 (PVC)
[17:24:12] [PASSED] 0xBD7 (PVC)
[17:24:12] [PASSED] 0xBD8 (PVC)
[17:24:12] [PASSED] 0xBD9 (PVC)
[17:24:12] [PASSED] 0xBDA (PVC)
[17:24:12] [PASSED] 0xBDB (PVC)
[17:24:12] [PASSED] 0xBE0 (PVC)
[17:24:12] [PASSED] 0xBE1 (PVC)
[17:24:12] [PASSED] 0xBE5 (PVC)
[17:24:12] [PASSED] 0x7D40 (METEORLAKE)
[17:24:12] [PASSED] 0x7D45 (METEORLAKE)
[17:24:12] [PASSED] 0x7D55 (METEORLAKE)
[17:24:12] [PASSED] 0x7D60 (METEORLAKE)
[17:24:12] [PASSED] 0x7DD5 (METEORLAKE)
[17:24:12] [PASSED] 0x6420 (LUNARLAKE)
[17:24:12] [PASSED] 0x64A0 (LUNARLAKE)
[17:24:12] [PASSED] 0x64B0 (LUNARLAKE)
[17:24:12] [PASSED] 0xE202 (BATTLEMAGE)
[17:24:12] [PASSED] 0xE209 (BATTLEMAGE)
[17:24:12] [PASSED] 0xE20B (BATTLEMAGE)
[17:24:12] [PASSED] 0xE20C (BATTLEMAGE)
[17:24:12] [PASSED] 0xE20D (BATTLEMAGE)
[17:24:12] [PASSED] 0xE210 (BATTLEMAGE)
[17:24:12] [PASSED] 0xE211 (BATTLEMAGE)
[17:24:12] [PASSED] 0xE212 (BATTLEMAGE)
[17:24:12] [PASSED] 0xE216 (BATTLEMAGE)
[17:24:12] [PASSED] 0xE220 (BATTLEMAGE)
[17:24:12] [PASSED] 0xE221 (BATTLEMAGE)
[17:24:12] [PASSED] 0xE222 (BATTLEMAGE)
[17:24:12] [PASSED] 0xE223 (BATTLEMAGE)
[17:24:12] [PASSED] 0xB080 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB081 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB082 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB083 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB084 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB085 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB086 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB087 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB08F (PANTHERLAKE)
[17:24:12] [PASSED] 0xB090 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB0A0 (PANTHERLAKE)
[17:24:12] [PASSED] 0xB0B0 (PANTHERLAKE)
[17:24:12] [PASSED] 0xFD80 (PANTHERLAKE)
[17:24:12] [PASSED] 0xFD81 (PANTHERLAKE)
[17:24:12] [PASSED] 0xD740 (NOVALAKE_S)
[17:24:12] [PASSED] 0xD741 (NOVALAKE_S)
[17:24:12] [PASSED] 0xD742 (NOVALAKE_S)
[17:24:12] [PASSED] 0xD743 (NOVALAKE_S)
[17:24:12] [PASSED] 0xD744 (NOVALAKE_S)
[17:24:12] [PASSED] 0xD745 (NOVALAKE_S)
[17:24:12] [PASSED] 0x674C (CRESCENTISLAND)
[17:24:12] =============== [PASSED] check_platform_desc ===============
[17:24:12] ===================== [PASSED] xe_pci ======================
[17:24:12] =================== xe_rtp (2 subtests) ====================
[17:24:12] =============== xe_rtp_process_to_sr_tests  ================
[17:24:12] [PASSED] coalesce-same-reg
[17:24:12] [PASSED] no-match-no-add
[17:24:12] [PASSED] match-or
[17:24:12] [PASSED] match-or-xfail
[17:24:12] [PASSED] no-match-no-add-multiple-rules
[17:24:12] [PASSED] two-regs-two-entries
[17:24:12] [PASSED] clr-one-set-other
[17:24:12] [PASSED] set-field
[17:24:12] [PASSED] conflict-duplicate
[17:24:12] [PASSED] conflict-not-disjoint
[17:24:12] [PASSED] conflict-reg-type
[17:24:12] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[17:24:12] ================== xe_rtp_process_tests  ===================
[17:24:12] [PASSED] active1
[17:24:12] [PASSED] active2
[17:24:12] [PASSED] active-inactive
[17:24:12] [PASSED] inactive-active
[17:24:12] [PASSED] inactive-1st_or_active-inactive
[17:24:12] [PASSED] inactive-2nd_or_active-inactive
[17:24:12] [PASSED] inactive-last_or_active-inactive
[17:24:12] [PASSED] inactive-no_or_active-inactive
[17:24:12] ============== [PASSED] xe_rtp_process_tests ===============
[17:24:12] ===================== [PASSED] xe_rtp ======================
[17:24:12] ==================== xe_wa (1 subtest) =====================
[17:24:12] ======================== xe_wa_gt  =========================
[17:24:12] [PASSED] TIGERLAKE B0
[17:24:12] [PASSED] DG1 A0
[17:24:12] [PASSED] DG1 B0
[17:24:12] [PASSED] ALDERLAKE_S A0
[17:24:12] [PASSED] ALDERLAKE_S B0
[17:24:12] [PASSED] ALDERLAKE_S C0
[17:24:12] [PASSED] ALDERLAKE_S D0
[17:24:12] [PASSED] ALDERLAKE_P A0
[17:24:12] [PASSED] ALDERLAKE_P B0
[17:24:12] [PASSED] ALDERLAKE_P C0
[17:24:12] [PASSED] ALDERLAKE_S RPLS D0
[17:24:12] [PASSED] ALDERLAKE_P RPLU E0
[17:24:12] [PASSED] DG2 G10 C0
[17:24:12] [PASSED] DG2 G11 B1
[17:24:12] [PASSED] DG2 G12 A1
[17:24:12] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:24:12] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:24:12] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[17:24:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[17:24:12] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[17:24:12] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[17:24:12] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[17:24:12] ==================== [PASSED] xe_wa_gt =====================
[17:24:12] ====================== [PASSED] xe_wa ======================
[17:24:12] ============================================================
[17:24:12] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[17:24:12] Elapsed time: 36.449s total, 4.243s configuring, 31.739s building, 0.459s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[17:24:12] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:24:14] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:24:39] Starting KUnit Kernel (1/1)...
[17:24:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:24:39] ============ drm_test_pick_cmdline (2 subtests) ============
[17:24:39] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[17:24:39] =============== drm_test_pick_cmdline_named  ===============
[17:24:39] [PASSED] NTSC
[17:24:39] [PASSED] NTSC-J
[17:24:39] [PASSED] PAL
[17:24:39] [PASSED] PAL-M
[17:24:39] =========== [PASSED] drm_test_pick_cmdline_named ===========
[17:24:39] ============== [PASSED] drm_test_pick_cmdline ==============
[17:24:39] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[17:24:39] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[17:24:39] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[17:24:39] =========== drm_validate_clone_mode (2 subtests) ===========
[17:24:39] ============== drm_test_check_in_clone_mode  ===============
[17:24:39] [PASSED] in_clone_mode
[17:24:39] [PASSED] not_in_clone_mode
[17:24:39] ========== [PASSED] drm_test_check_in_clone_mode ===========
[17:24:39] =============== drm_test_check_valid_clones  ===============
[17:24:39] [PASSED] not_in_clone_mode
[17:24:39] [PASSED] valid_clone
[17:24:39] [PASSED] invalid_clone
[17:24:39] =========== [PASSED] drm_test_check_valid_clones ===========
[17:24:39] ============= [PASSED] drm_validate_clone_mode =============
[17:24:39] ============= drm_validate_modeset (1 subtest) =============
[17:24:39] [PASSED] drm_test_check_connector_changed_modeset
[17:24:39] ============== [PASSED] drm_validate_modeset ===============
[17:24:39] ====== drm_test_bridge_get_current_state (2 subtests) ======
[17:24:39] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[17:24:39] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[17:24:39] ======== [PASSED] drm_test_bridge_get_current_state ========
[17:24:39] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[17:24:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[17:24:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[17:24:39] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[17:24:39] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[17:24:39] ============== drm_bridge_alloc (2 subtests) ===============
[17:24:39] [PASSED] drm_test_drm_bridge_alloc_basic
[17:24:39] [PASSED] drm_test_drm_bridge_alloc_get_put
[17:24:39] ================ [PASSED] drm_bridge_alloc =================
[17:24:39] ================== drm_buddy (9 subtests) ==================
[17:24:39] [PASSED] drm_test_buddy_alloc_limit
[17:24:39] [PASSED] drm_test_buddy_alloc_optimistic
[17:24:39] [PASSED] drm_test_buddy_alloc_pessimistic
[17:24:39] [PASSED] drm_test_buddy_alloc_pathological
[17:24:39] [PASSED] drm_test_buddy_alloc_contiguous
[17:24:39] [PASSED] drm_test_buddy_alloc_clear
[17:24:39] [PASSED] drm_test_buddy_alloc_range_bias
[17:24:39] [PASSED] drm_test_buddy_fragmentation_performance
[17:24:39] [PASSED] drm_test_buddy_alloc_exceeds_max_order
[17:24:39] ==================== [PASSED] drm_buddy ====================
[17:24:39] ============= drm_cmdline_parser (40 subtests) =============
[17:24:39] [PASSED] drm_test_cmdline_force_d_only
[17:24:39] [PASSED] drm_test_cmdline_force_D_only_dvi
[17:24:39] [PASSED] drm_test_cmdline_force_D_only_hdmi
[17:24:39] [PASSED] drm_test_cmdline_force_D_only_not_digital
[17:24:39] [PASSED] drm_test_cmdline_force_e_only
[17:24:39] [PASSED] drm_test_cmdline_res
[17:24:39] [PASSED] drm_test_cmdline_res_vesa
[17:24:39] [PASSED] drm_test_cmdline_res_vesa_rblank
[17:24:39] [PASSED] drm_test_cmdline_res_rblank
[17:24:39] [PASSED] drm_test_cmdline_res_bpp
[17:24:39] [PASSED] drm_test_cmdline_res_refresh
[17:24:39] [PASSED] drm_test_cmdline_res_bpp_refresh
[17:24:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[17:24:39] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[17:24:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[17:24:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[17:24:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[17:24:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[17:24:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[17:24:39] [PASSED] drm_test_cmdline_res_margins_force_on
[17:24:39] [PASSED] drm_test_cmdline_res_vesa_margins
[17:24:39] [PASSED] drm_test_cmdline_name
[17:24:39] [PASSED] drm_test_cmdline_name_bpp
[17:24:39] [PASSED] drm_test_cmdline_name_option
[17:24:39] [PASSED] drm_test_cmdline_name_bpp_option
[17:24:39] [PASSED] drm_test_cmdline_rotate_0
[17:24:39] [PASSED] drm_test_cmdline_rotate_90
[17:24:39] [PASSED] drm_test_cmdline_rotate_180
[17:24:39] [PASSED] drm_test_cmdline_rotate_270
[17:24:39] [PASSED] drm_test_cmdline_hmirror
[17:24:39] [PASSED] drm_test_cmdline_vmirror
[17:24:39] [PASSED] drm_test_cmdline_margin_options
[17:24:39] [PASSED] drm_test_cmdline_multiple_options
[17:24:39] [PASSED] drm_test_cmdline_bpp_extra_and_option
[17:24:39] [PASSED] drm_test_cmdline_extra_and_option
[17:24:39] [PASSED] drm_test_cmdline_freestanding_options
[17:24:39] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[17:24:39] [PASSED] drm_test_cmdline_panel_orientation
[17:24:39] ================ drm_test_cmdline_invalid  =================
[17:24:39] [PASSED] margin_only
[17:24:39] [PASSED] interlace_only
[17:24:39] [PASSED] res_missing_x
[17:24:39] [PASSED] res_missing_y
[17:24:39] [PASSED] res_bad_y
[17:24:39] [PASSED] res_missing_y_bpp
[17:24:39] [PASSED] res_bad_bpp
[17:24:39] [PASSED] res_bad_refresh
[17:24:39] [PASSED] res_bpp_refresh_force_on_off
[17:24:39] [PASSED] res_invalid_mode
[17:24:39] [PASSED] res_bpp_wrong_place_mode
[17:24:39] [PASSED] name_bpp_refresh
[17:24:39] [PASSED] name_refresh
[17:24:39] [PASSED] name_refresh_wrong_mode
[17:24:39] [PASSED] name_refresh_invalid_mode
[17:24:39] [PASSED] rotate_multiple
[17:24:39] [PASSED] rotate_invalid_val
[17:24:39] [PASSED] rotate_truncated
[17:24:39] [PASSED] invalid_option
[17:24:39] [PASSED] invalid_tv_option
[17:24:39] [PASSED] truncated_tv_option
[17:24:39] ============ [PASSED] drm_test_cmdline_invalid =============
[17:24:39] =============== drm_test_cmdline_tv_options  ===============
[17:24:39] [PASSED] NTSC
[17:24:39] [PASSED] NTSC_443
[17:24:39] [PASSED] NTSC_J
[17:24:39] [PASSED] PAL
[17:24:39] [PASSED] PAL_M
[17:24:39] [PASSED] PAL_N
[17:24:39] [PASSED] SECAM
[17:24:39] [PASSED] MONO_525
[17:24:39] [PASSED] MONO_625
[17:24:39] =========== [PASSED] drm_test_cmdline_tv_options ===========
[17:24:39] =============== [PASSED] drm_cmdline_parser ================
[17:24:39] ========== drmm_connector_hdmi_init (20 subtests) ==========
[17:24:39] [PASSED] drm_test_connector_hdmi_init_valid
[17:24:39] [PASSED] drm_test_connector_hdmi_init_bpc_8
[17:24:39] [PASSED] drm_test_connector_hdmi_init_bpc_10
[17:24:39] [PASSED] drm_test_connector_hdmi_init_bpc_12
[17:24:39] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[17:24:39] [PASSED] drm_test_connector_hdmi_init_bpc_null
[17:24:39] [PASSED] drm_test_connector_hdmi_init_formats_empty
[17:24:39] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[17:24:39] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[17:24:39] [PASSED] supported_formats=0x9 yuv420_allowed=1
[17:24:39] [PASSED] supported_formats=0x9 yuv420_allowed=0
[17:24:39] [PASSED] supported_formats=0x3 yuv420_allowed=1
[17:24:39] [PASSED] supported_formats=0x3 yuv420_allowed=0
[17:24:39] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[17:24:39] [PASSED] drm_test_connector_hdmi_init_null_ddc
[17:24:39] [PASSED] drm_test_connector_hdmi_init_null_product
[17:24:39] [PASSED] drm_test_connector_hdmi_init_null_vendor
[17:24:39] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[17:24:39] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[17:24:39] [PASSED] drm_test_connector_hdmi_init_product_valid
[17:24:39] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[17:24:39] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[17:24:39] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[17:24:39] ========= drm_test_connector_hdmi_init_type_valid  =========
[17:24:39] [PASSED] HDMI-A
[17:24:39] [PASSED] HDMI-B
[17:24:39] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[17:24:39] ======== drm_test_connector_hdmi_init_type_invalid  ========
[17:24:39] [PASSED] Unknown
[17:24:39] [PASSED] VGA
[17:24:39] [PASSED] DVI-I
[17:24:39] [PASSED] DVI-D
[17:24:39] [PASSED] DVI-A
[17:24:39] [PASSED] Composite
[17:24:39] [PASSED] SVIDEO
[17:24:39] [PASSED] LVDS
[17:24:39] [PASSED] Component
[17:24:39] [PASSED] DIN
[17:24:39] [PASSED] DP
[17:24:39] [PASSED] TV
[17:24:39] [PASSED] eDP
[17:24:39] [PASSED] Virtual
[17:24:39] [PASSED] DSI
[17:24:39] [PASSED] DPI
[17:24:39] [PASSED] Writeback
[17:24:39] [PASSED] SPI
[17:24:39] [PASSED] USB
[17:24:39] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[17:24:39] ============ [PASSED] drmm_connector_hdmi_init =============
[17:24:39] ============= drmm_connector_init (3 subtests) =============
[17:24:39] [PASSED] drm_test_drmm_connector_init
[17:24:39] [PASSED] drm_test_drmm_connector_init_null_ddc
[17:24:39] ========= drm_test_drmm_connector_init_type_valid  =========
[17:24:39] [PASSED] Unknown
[17:24:39] [PASSED] VGA
[17:24:39] [PASSED] DVI-I
[17:24:39] [PASSED] DVI-D
[17:24:39] [PASSED] DVI-A
[17:24:39] [PASSED] Composite
[17:24:39] [PASSED] SVIDEO
[17:24:39] [PASSED] LVDS
[17:24:39] [PASSED] Component
[17:24:39] [PASSED] DIN
[17:24:39] [PASSED] DP
[17:24:39] [PASSED] HDMI-A
[17:24:39] [PASSED] HDMI-B
[17:24:39] [PASSED] TV
[17:24:39] [PASSED] eDP
[17:24:39] [PASSED] Virtual
[17:24:39] [PASSED] DSI
[17:24:39] [PASSED] DPI
[17:24:39] [PASSED] Writeback
[17:24:39] [PASSED] SPI
[17:24:39] [PASSED] USB
[17:24:39] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[17:24:39] =============== [PASSED] drmm_connector_init ===============
[17:24:39] ========= drm_connector_dynamic_init (6 subtests) ==========
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_init
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_init_properties
[17:24:39] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[17:24:39] [PASSED] Unknown
[17:24:39] [PASSED] VGA
[17:24:39] [PASSED] DVI-I
[17:24:39] [PASSED] DVI-D
[17:24:39] [PASSED] DVI-A
[17:24:39] [PASSED] Composite
[17:24:39] [PASSED] SVIDEO
[17:24:39] [PASSED] LVDS
[17:24:39] [PASSED] Component
[17:24:39] [PASSED] DIN
[17:24:39] [PASSED] DP
[17:24:39] [PASSED] HDMI-A
[17:24:39] [PASSED] HDMI-B
[17:24:39] [PASSED] TV
[17:24:39] [PASSED] eDP
[17:24:39] [PASSED] Virtual
[17:24:39] [PASSED] DSI
[17:24:39] [PASSED] DPI
[17:24:39] [PASSED] Writeback
[17:24:39] [PASSED] SPI
[17:24:39] [PASSED] USB
[17:24:39] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[17:24:39] ======== drm_test_drm_connector_dynamic_init_name  =========
[17:24:39] [PASSED] Unknown
[17:24:39] [PASSED] VGA
[17:24:39] [PASSED] DVI-I
[17:24:39] [PASSED] DVI-D
[17:24:39] [PASSED] DVI-A
[17:24:39] [PASSED] Composite
[17:24:39] [PASSED] SVIDEO
[17:24:39] [PASSED] LVDS
[17:24:39] [PASSED] Component
[17:24:39] [PASSED] DIN
[17:24:39] [PASSED] DP
[17:24:39] [PASSED] HDMI-A
[17:24:39] [PASSED] HDMI-B
[17:24:39] [PASSED] TV
[17:24:39] [PASSED] eDP
[17:24:39] [PASSED] Virtual
[17:24:39] [PASSED] DSI
[17:24:39] [PASSED] DPI
[17:24:39] [PASSED] Writeback
[17:24:39] [PASSED] SPI
[17:24:39] [PASSED] USB
[17:24:39] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[17:24:39] =========== [PASSED] drm_connector_dynamic_init ============
[17:24:39] ==== drm_connector_dynamic_register_early (4 subtests) =====
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[17:24:39] ====== [PASSED] drm_connector_dynamic_register_early =======
[17:24:39] ======= drm_connector_dynamic_register (7 subtests) ========
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[17:24:39] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[17:24:39] ========= [PASSED] drm_connector_dynamic_register ==========
[17:24:39] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[17:24:39] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[17:24:39] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[17:24:39] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[17:24:39] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[17:24:39] ========== drm_test_get_tv_mode_from_name_valid  ===========
[17:24:39] [PASSED] NTSC
[17:24:39] [PASSED] NTSC-443
[17:24:39] [PASSED] NTSC-J
[17:24:39] [PASSED] PAL
[17:24:39] [PASSED] PAL-M
[17:24:39] [PASSED] PAL-N
[17:24:39] [PASSED] SECAM
[17:24:39] [PASSED] Mono
[17:24:39] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[17:24:39] [PASSED] drm_test_get_tv_mode_from_name_truncated
[17:24:39] ============ [PASSED] drm_get_tv_mode_from_name ============
[17:24:39] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[17:24:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[17:24:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[17:24:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[17:24:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[17:24:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[17:24:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[17:24:39] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[17:24:39] [PASSED] VIC 96
[17:24:39] [PASSED] VIC 97
[17:24:39] [PASSED] VIC 101
[17:24:39] [PASSED] VIC 102
[17:24:39] [PASSED] VIC 106
[17:24:39] [PASSED] VIC 107
[17:24:39] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[17:24:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[17:24:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[17:24:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[17:24:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[17:24:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[17:24:39] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[17:24:39] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[17:24:39] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[17:24:39] [PASSED] Automatic
[17:24:39] [PASSED] Full
[17:24:39] [PASSED] Limited 16:235
[17:24:39] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[17:24:39] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[17:24:39] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[17:24:39] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[17:24:39] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[17:24:39] [PASSED] RGB
[17:24:39] [PASSED] YUV 4:2:0
[17:24:39] [PASSED] YUV 4:2:2
[17:24:39] [PASSED] YUV 4:4:4
[17:24:39] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[17:24:39] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[17:24:39] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[17:24:39] ============= drm_damage_helper (21 subtests) ==============
[17:24:39] [PASSED] drm_test_damage_iter_no_damage
[17:24:39] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[17:24:39] [PASSED] drm_test_damage_iter_no_damage_src_moved
[17:24:39] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[17:24:39] [PASSED] drm_test_damage_iter_no_damage_not_visible
[17:24:39] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[17:24:39] [PASSED] drm_test_damage_iter_no_damage_no_fb
[17:24:39] [PASSED] drm_test_damage_iter_simple_damage
[17:24:39] [PASSED] drm_test_damage_iter_single_damage
[17:24:39] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[17:24:39] [PASSED] drm_test_damage_iter_single_damage_outside_src
[17:24:39] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[17:24:39] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[17:24:39] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[17:24:39] [PASSED] drm_test_damage_iter_single_damage_src_moved
[17:24:39] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[17:24:39] [PASSED] drm_test_damage_iter_damage
[17:24:39] [PASSED] drm_test_damage_iter_damage_one_intersect
[17:24:39] [PASSED] drm_test_damage_iter_damage_one_outside
[17:24:39] [PASSED] drm_test_damage_iter_damage_src_moved
[17:24:39] [PASSED] drm_test_damage_iter_damage_not_visible
[17:24:39] ================ [PASSED] drm_damage_helper ================
[17:24:39] ============== drm_dp_mst_helper (3 subtests) ==============
[17:24:39] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[17:24:39] [PASSED] Clock 154000 BPP 30 DSC disabled
[17:24:39] [PASSED] Clock 234000 BPP 30 DSC disabled
[17:24:39] [PASSED] Clock 297000 BPP 24 DSC disabled
[17:24:39] [PASSED] Clock 332880 BPP 24 DSC enabled
[17:24:39] [PASSED] Clock 324540 BPP 24 DSC enabled
[17:24:39] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[17:24:39] ============== drm_test_dp_mst_calc_pbn_div  ===============
[17:24:39] [PASSED] Link rate 2000000 lane count 4
[17:24:39] [PASSED] Link rate 2000000 lane count 2
[17:24:39] [PASSED] Link rate 2000000 lane count 1
[17:24:39] [PASSED] Link rate 1350000 lane count 4
[17:24:39] [PASSED] Link rate 1350000 lane count 2
[17:24:39] [PASSED] Link rate 1350000 lane count 1
[17:24:39] [PASSED] Link rate 1000000 lane count 4
[17:24:39] [PASSED] Link rate 1000000 lane count 2
[17:24:39] [PASSED] Link rate 1000000 lane count 1
[17:24:39] [PASSED] Link rate 810000 lane count 4
[17:24:39] [PASSED] Link rate 810000 lane count 2
[17:24:39] [PASSED] Link rate 810000 lane count 1
[17:24:39] [PASSED] Link rate 540000 lane count 4
[17:24:39] [PASSED] Link rate 540000 lane count 2
[17:24:39] [PASSED] Link rate 540000 lane count 1
[17:24:39] [PASSED] Link rate 270000 lane count 4
[17:24:39] [PASSED] Link rate 270000 lane count 2
[17:24:39] [PASSED] Link rate 270000 lane count 1
[17:24:39] [PASSED] Link rate 162000 lane count 4
[17:24:39] [PASSED] Link rate 162000 lane count 2
[17:24:39] [PASSED] Link rate 162000 lane count 1
[17:24:39] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[17:24:39] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[17:24:39] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[17:24:39] [PASSED] DP_POWER_UP_PHY with port number
[17:24:39] [PASSED] DP_POWER_DOWN_PHY with port number
[17:24:39] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[17:24:39] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[17:24:39] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[17:24:39] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[17:24:39] [PASSED] DP_QUERY_PAYLOAD with port number
[17:24:39] [PASSED] DP_QUERY_PAYLOAD with VCPI
[17:24:39] [PASSED] DP_REMOTE_DPCD_READ with port number
[17:24:39] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[17:24:39] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[17:24:39] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[17:24:39] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[17:24:39] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[17:24:39] [PASSED] DP_REMOTE_I2C_READ with port number
[17:24:39] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[17:24:39] [PASSED] DP_REMOTE_I2C_READ with transactions array
[17:24:39] [PASSED] DP_REMOTE_I2C_WRITE with port number
[17:24:39] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[17:24:39] [PASSED] DP_REMOTE_I2C_WRITE with data array
[17:24:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[17:24:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[17:24:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[17:24:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[17:24:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[17:24:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[17:24:39] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[17:24:39] ================ [PASSED] drm_dp_mst_helper ================
[17:24:39] ================== drm_exec (7 subtests) ===================
[17:24:39] [PASSED] sanitycheck
[17:24:39] [PASSED] test_lock
[17:24:39] [PASSED] test_lock_unlock
[17:24:39] [PASSED] test_duplicates
[17:24:39] [PASSED] test_prepare
[17:24:39] [PASSED] test_prepare_array
[17:24:39] [PASSED] test_multiple_loops
[17:24:39] ==================== [PASSED] drm_exec =====================
[17:24:39] =========== drm_format_helper_test (17 subtests) ===========
[17:24:39] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[17:24:39] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[17:24:39] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[17:24:39] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[17:24:39] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[17:24:39] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[17:24:39] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[17:24:39] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[17:24:39] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[17:24:39] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[17:24:39] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[17:24:39] ============== drm_test_fb_xrgb8888_to_mono  ===============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[17:24:39] ==================== drm_test_fb_swab  =====================
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ================ [PASSED] drm_test_fb_swab =================
[17:24:39] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[17:24:39] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[17:24:39] [PASSED] single_pixel_source_buffer
[17:24:39] [PASSED] single_pixel_clip_rectangle
[17:24:39] [PASSED] well_known_colors
[17:24:39] [PASSED] destination_pitch
[17:24:39] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[17:24:39] ================= drm_test_fb_clip_offset  =================
[17:24:39] [PASSED] pass through
[17:24:39] [PASSED] horizontal offset
[17:24:39] [PASSED] vertical offset
[17:24:39] [PASSED] horizontal and vertical offset
[17:24:39] [PASSED] horizontal offset (custom pitch)
[17:24:39] [PASSED] vertical offset (custom pitch)
[17:24:39] [PASSED] horizontal and vertical offset (custom pitch)
[17:24:39] ============= [PASSED] drm_test_fb_clip_offset =============
[17:24:39] =================== drm_test_fb_memcpy  ====================
[17:24:39] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[17:24:39] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[17:24:39] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[17:24:39] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[17:24:39] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[17:24:39] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[17:24:39] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[17:24:39] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[17:24:39] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[17:24:39] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[17:24:39] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[17:24:39] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[17:24:39] =============== [PASSED] drm_test_fb_memcpy ================
[17:24:39] ============= [PASSED] drm_format_helper_test ==============
[17:24:39] ================= drm_format (18 subtests) =================
[17:24:39] [PASSED] drm_test_format_block_width_invalid
[17:24:39] [PASSED] drm_test_format_block_width_one_plane
[17:24:39] [PASSED] drm_test_format_block_width_two_plane
[17:24:39] [PASSED] drm_test_format_block_width_three_plane
[17:24:39] [PASSED] drm_test_format_block_width_tiled
[17:24:39] [PASSED] drm_test_format_block_height_invalid
[17:24:39] [PASSED] drm_test_format_block_height_one_plane
[17:24:39] [PASSED] drm_test_format_block_height_two_plane
[17:24:39] [PASSED] drm_test_format_block_height_three_plane
[17:24:39] [PASSED] drm_test_format_block_height_tiled
[17:24:39] [PASSED] drm_test_format_min_pitch_invalid
[17:24:39] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[17:24:39] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[17:24:39] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[17:24:39] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[17:24:39] [PASSED] drm_test_format_min_pitch_two_plane
[17:24:39] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[17:24:39] [PASSED] drm_test_format_min_pitch_tiled
[17:24:39] =================== [PASSED] drm_format ====================
[17:24:39] ============== drm_framebuffer (10 subtests) ===============
[17:24:39] ========== drm_test_framebuffer_check_src_coords  ==========
[17:24:39] [PASSED] Success: source fits into fb
[17:24:39] [PASSED] Fail: overflowing fb with x-axis coordinate
[17:24:39] [PASSED] Fail: overflowing fb with y-axis coordinate
[17:24:39] [PASSED] Fail: overflowing fb with source width
[17:24:39] [PASSED] Fail: overflowing fb with source height
[17:24:39] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[17:24:39] [PASSED] drm_test_framebuffer_cleanup
[17:24:39] =============== drm_test_framebuffer_create  ===============
[17:24:39] [PASSED] ABGR8888 normal sizes
[17:24:39] [PASSED] ABGR8888 max sizes
[17:24:39] [PASSED] ABGR8888 pitch greater than min required
[17:24:39] [PASSED] ABGR8888 pitch less than min required
[17:24:39] [PASSED] ABGR8888 Invalid width
[17:24:39] [PASSED] ABGR8888 Invalid buffer handle
[17:24:39] [PASSED] No pixel format
[17:24:39] [PASSED] ABGR8888 Width 0
[17:24:39] [PASSED] ABGR8888 Height 0
[17:24:39] [PASSED] ABGR8888 Out of bound height * pitch combination
[17:24:39] [PASSED] ABGR8888 Large buffer offset
[17:24:39] [PASSED] ABGR8888 Buffer offset for inexistent plane
[17:24:39] [PASSED] ABGR8888 Invalid flag
[17:24:39] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[17:24:39] [PASSED] ABGR8888 Valid buffer modifier
[17:24:39] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[17:24:39] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[17:24:39] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[17:24:39] [PASSED] NV12 Normal sizes
[17:24:39] [PASSED] NV12 Max sizes
[17:24:39] [PASSED] NV12 Invalid pitch
[17:24:39] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[17:24:39] [PASSED] NV12 different  modifier per-plane
[17:24:39] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[17:24:39] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[17:24:39] [PASSED] NV12 Modifier for inexistent plane
[17:24:39] [PASSED] NV12 Handle for inexistent plane
[17:24:39] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[17:24:39] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[17:24:39] [PASSED] YVU420 Normal sizes
[17:24:39] [PASSED] YVU420 Max sizes
[17:24:39] [PASSED] YVU420 Invalid pitch
[17:24:39] [PASSED] YVU420 Different pitches
[17:24:39] [PASSED] YVU420 Different buffer offsets/pitches
[17:24:39] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[17:24:39] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[17:24:39] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[17:24:39] [PASSED] YVU420 Valid modifier
[17:24:39] [PASSED] YVU420 Different modifiers per plane
[17:24:39] [PASSED] YVU420 Modifier for inexistent plane
[17:24:39] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[17:24:39] [PASSED] X0L2 Normal sizes
[17:24:39] [PASSED] X0L2 Max sizes
[17:24:39] [PASSED] X0L2 Invalid pitch
[17:24:39] [PASSED] X0L2 Pitch greater than minimum required
[17:24:39] [PASSED] X0L2 Handle for inexistent plane
[17:24:39] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[17:24:39] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[17:24:39] [PASSED] X0L2 Valid modifier
[17:24:39] [PASSED] X0L2 Modifier for inexistent plane
[17:24:39] =========== [PASSED] drm_test_framebuffer_create ===========
[17:24:39] [PASSED] drm_test_framebuffer_free
[17:24:39] [PASSED] drm_test_framebuffer_init
[17:24:39] [PASSED] drm_test_framebuffer_init_bad_format
[17:24:39] [PASSED] drm_test_framebuffer_init_dev_mismatch
[17:24:39] [PASSED] drm_test_framebuffer_lookup
[17:24:39] [PASSED] drm_test_framebuffer_lookup_inexistent
[17:24:39] [PASSED] drm_test_framebuffer_modifiers_not_supported
[17:24:39] ================= [PASSED] drm_framebuffer =================
[17:24:39] ================ drm_gem_shmem (8 subtests) ================
[17:24:39] [PASSED] drm_gem_shmem_test_obj_create
[17:24:39] [PASSED] drm_gem_shmem_test_obj_create_private
[17:24:39] [PASSED] drm_gem_shmem_test_pin_pages
[17:24:39] [PASSED] drm_gem_shmem_test_vmap
[17:24:39] [PASSED] drm_gem_shmem_test_get_sg_table
[17:24:39] [PASSED] drm_gem_shmem_test_get_pages_sgt
[17:24:39] [PASSED] drm_gem_shmem_test_madvise
[17:24:39] [PASSED] drm_gem_shmem_test_purge
[17:24:39] ================== [PASSED] drm_gem_shmem ==================
[17:24:39] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[17:24:39] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[17:24:39] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[17:24:39] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[17:24:39] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[17:24:39] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[17:24:39] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[17:24:39] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[17:24:39] [PASSED] Automatic
[17:24:39] [PASSED] Full
[17:24:39] [PASSED] Limited 16:235
[17:24:39] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[17:24:39] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[17:24:39] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[17:24:39] [PASSED] drm_test_check_disable_connector
[17:24:39] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[17:24:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[17:24:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[17:24:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[17:24:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[17:24:39] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[17:24:39] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[17:24:39] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[17:24:39] [PASSED] drm_test_check_output_bpc_dvi
[17:24:39] [PASSED] drm_test_check_output_bpc_format_vic_1
[17:24:39] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[17:24:39] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[17:24:39] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[17:24:39] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[17:24:39] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[17:24:39] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[17:24:39] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[17:24:39] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[17:24:39] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[17:24:39] [PASSED] drm_test_check_broadcast_rgb_value
[17:24:39] [PASSED] drm_test_check_bpc_8_value
[17:24:39] [PASSED] drm_test_check_bpc_10_value
[17:24:39] [PASSED] drm_test_check_bpc_12_value
[17:24:39] [PASSED] drm_test_check_format_value
[17:24:39] [PASSED] drm_test_check_tmds_char_value
[17:24:39] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[17:24:39] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[17:24:39] [PASSED] drm_test_check_mode_valid
[17:24:39] [PASSED] drm_test_check_mode_valid_reject
[17:24:39] [PASSED] drm_test_check_mode_valid_reject_rate
[17:24:39] [PASSED] drm_test_check_mode_valid_reject_max_clock
[17:24:39] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[17:24:39] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[17:24:39] [PASSED] drm_test_check_infoframes
[17:24:39] [PASSED] drm_test_check_reject_avi_infoframe
[17:24:39] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[17:24:39] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[17:24:39] [PASSED] drm_test_check_reject_audio_infoframe
[17:24:39] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[17:24:39] ================= drm_managed (2 subtests) =================
[17:24:39] [PASSED] drm_test_managed_release_action
[17:24:39] [PASSED] drm_test_managed_run_action
[17:24:39] =================== [PASSED] drm_managed ===================
[17:24:39] =================== drm_mm (6 subtests) ====================
[17:24:39] [PASSED] drm_test_mm_init
[17:24:39] [PASSED] drm_test_mm_debug
[17:24:39] [PASSED] drm_test_mm_align32
[17:24:39] [PASSED] drm_test_mm_align64
[17:24:39] [PASSED] drm_test_mm_lowest
[17:24:39] [PASSED] drm_test_mm_highest
[17:24:39] ===================== [PASSED] drm_mm ======================
[17:24:39] ============= drm_modes_analog_tv (5 subtests) =============
[17:24:39] [PASSED] drm_test_modes_analog_tv_mono_576i
[17:24:39] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[17:24:39] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[17:24:39] [PASSED] drm_test_modes_analog_tv_pal_576i
[17:24:39] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[17:24:39] =============== [PASSED] drm_modes_analog_tv ===============
[17:24:39] ============== drm_plane_helper (2 subtests) ===============
[17:24:39] =============== drm_test_check_plane_state  ================
[17:24:39] [PASSED] clipping_simple
[17:24:39] [PASSED] clipping_rotate_reflect
[17:24:39] [PASSED] positioning_simple
[17:24:39] [PASSED] upscaling
[17:24:39] [PASSED] downscaling
[17:24:39] [PASSED] rounding1
[17:24:39] [PASSED] rounding2
[17:24:39] [PASSED] rounding3
[17:24:39] [PASSED] rounding4
[17:24:39] =========== [PASSED] drm_test_check_plane_state ============
[17:24:39] =========== drm_test_check_invalid_plane_state  ============
[17:24:39] [PASSED] positioning_invalid
[17:24:39] [PASSED] upscaling_invalid
[17:24:39] [PASSED] downscaling_invalid
[17:24:39] ======= [PASSED] drm_test_check_invalid_plane_state ========
[17:24:39] ================ [PASSED] drm_plane_helper =================
[17:24:39] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[17:24:39] ====== drm_test_connector_helper_tv_get_modes_check  =======
[17:24:39] [PASSED] None
[17:24:39] [PASSED] PAL
[17:24:39] [PASSED] NTSC
[17:24:39] [PASSED] Both, NTSC Default
[17:24:39] [PASSED] Both, PAL Default
[17:24:39] [PASSED] Both, NTSC Default, with PAL on command-line
[17:24:39] [PASSED] Both, PAL Default, with NTSC on command-line
[17:24:39] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[17:24:39] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[17:24:39] ================== drm_rect (9 subtests) ===================
[17:24:39] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[17:24:39] [PASSED] drm_test_rect_clip_scaled_not_clipped
[17:24:39] [PASSED] drm_test_rect_clip_scaled_clipped
[17:24:39] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[17:24:39] ================= drm_test_rect_intersect  =================
[17:24:39] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[17:24:39] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[17:24:39] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[17:24:39] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[17:24:39] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[17:24:39] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[17:24:39] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[17:24:39] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[17:24:39] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[17:24:39] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[17:24:39] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[17:24:39] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[17:24:39] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[17:24:39] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[17:24:39] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
stty: 'standard input': Inappropriate ioctl for device
[17:24:39] ============= [PASSED] drm_test_rect_intersect =============
[17:24:39] ================ drm_test_rect_calc_hscale  ================
[17:24:39] [PASSED] normal use
[17:24:39] [PASSED] out of max range
[17:24:39] [PASSED] out of min range
[17:24:39] [PASSED] zero dst
[17:24:39] [PASSED] negative src
[17:24:39] [PASSED] negative dst
[17:24:39] ============ [PASSED] drm_test_rect_calc_hscale ============
[17:24:39] ================ drm_test_rect_calc_vscale  ================
[17:24:39] [PASSED] normal use
[17:24:39] [PASSED] out of max range
[17:24:39] [PASSED] out of min range
[17:24:39] [PASSED] zero dst
[17:24:39] [PASSED] negative src
[17:24:39] [PASSED] negative dst
[17:24:39] ============ [PASSED] drm_test_rect_calc_vscale ============
[17:24:39] ================== drm_test_rect_rotate  ===================
[17:24:39] [PASSED] reflect-x
[17:24:39] [PASSED] reflect-y
[17:24:39] [PASSED] rotate-0
[17:24:39] [PASSED] rotate-90
[17:24:39] [PASSED] rotate-180
[17:24:39] [PASSED] rotate-270
[17:24:39] ============== [PASSED] drm_test_rect_rotate ===============
[17:24:39] ================ drm_test_rect_rotate_inv  =================
[17:24:39] [PASSED] reflect-x
[17:24:39] [PASSED] reflect-y
[17:24:39] [PASSED] rotate-0
[17:24:39] [PASSED] rotate-90
[17:24:39] [PASSED] rotate-180
[17:24:39] [PASSED] rotate-270
[17:24:39] ============ [PASSED] drm_test_rect_rotate_inv =============
[17:24:39] ==================== [PASSED] drm_rect =====================
[17:24:39] ============ drm_sysfb_modeset_test (1 subtest) ============
[17:24:39] ============ drm_test_sysfb_build_fourcc_list  =============
[17:24:39] [PASSED] no native formats
[17:24:39] [PASSED] XRGB8888 as native format
[17:24:39] [PASSED] remove duplicates
[17:24:39] [PASSED] convert alpha formats
[17:24:39] [PASSED] random formats
[17:24:39] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[17:24:39] ============= [PASSED] drm_sysfb_modeset_test ==============
[17:24:39] ================== drm_fixp (2 subtests) ===================
[17:24:39] [PASSED] drm_test_int2fixp
[17:24:39] [PASSED] drm_test_sm2fixp
[17:24:39] ==================== [PASSED] drm_fixp =====================
[17:24:39] ============================================================
[17:24:39] Testing complete. Ran 630 tests: passed: 630
[17:24:39] Elapsed time: 27.276s total, 1.679s configuring, 25.128s building, 0.430s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[17:24:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:24:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:24:50] Starting KUnit Kernel (1/1)...
[17:24:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:24:51] ================= ttm_device (5 subtests) ==================
[17:24:51] [PASSED] ttm_device_init_basic
[17:24:51] [PASSED] ttm_device_init_multiple
[17:24:51] [PASSED] ttm_device_fini_basic
[17:24:51] [PASSED] ttm_device_init_no_vma_man
[17:24:51] ================== ttm_device_init_pools  ==================
[17:24:51] [PASSED] No DMA allocations, no DMA32 required
[17:24:51] [PASSED] DMA allocations, DMA32 required
[17:24:51] [PASSED] No DMA allocations, DMA32 required
[17:24:51] [PASSED] DMA allocations, no DMA32 required
[17:24:51] ============== [PASSED] ttm_device_init_pools ==============
[17:24:51] =================== [PASSED] ttm_device ====================
[17:24:51] ================== ttm_pool (8 subtests) ===================
[17:24:51] ================== ttm_pool_alloc_basic  ===================
[17:24:51] [PASSED] One page
[17:24:51] [PASSED] More than one page
[17:24:51] [PASSED] Above the allocation limit
[17:24:51] [PASSED] One page, with coherent DMA mappings enabled
[17:24:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:24:51] ============== [PASSED] ttm_pool_alloc_basic ===============
[17:24:51] ============== ttm_pool_alloc_basic_dma_addr  ==============
[17:24:51] [PASSED] One page
[17:24:51] [PASSED] More than one page
[17:24:51] [PASSED] Above the allocation limit
[17:24:51] [PASSED] One page, with coherent DMA mappings enabled
[17:24:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:24:51] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[17:24:51] [PASSED] ttm_pool_alloc_order_caching_match
[17:24:51] [PASSED] ttm_pool_alloc_caching_mismatch
[17:24:51] [PASSED] ttm_pool_alloc_order_mismatch
[17:24:51] [PASSED] ttm_pool_free_dma_alloc
[17:24:51] [PASSED] ttm_pool_free_no_dma_alloc
[17:24:51] [PASSED] ttm_pool_fini_basic
[17:24:51] ==================== [PASSED] ttm_pool =====================
[17:24:51] ================ ttm_resource (8 subtests) =================
[17:24:51] ================= ttm_resource_init_basic  =================
[17:24:51] [PASSED] Init resource in TTM_PL_SYSTEM
[17:24:51] [PASSED] Init resource in TTM_PL_VRAM
[17:24:51] [PASSED] Init resource in a private placement
[17:24:51] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[17:24:51] ============= [PASSED] ttm_resource_init_basic =============
[17:24:51] [PASSED] ttm_resource_init_pinned
[17:24:51] [PASSED] ttm_resource_fini_basic
[17:24:51] [PASSED] ttm_resource_manager_init_basic
[17:24:51] [PASSED] ttm_resource_manager_usage_basic
[17:24:51] [PASSED] ttm_resource_manager_set_used_basic
[17:24:51] [PASSED] ttm_sys_man_alloc_basic
[17:24:51] [PASSED] ttm_sys_man_free_basic
[17:24:51] ================== [PASSED] ttm_resource ===================
[17:24:51] =================== ttm_tt (15 subtests) ===================
[17:24:51] ==================== ttm_tt_init_basic  ====================
[17:24:51] [PASSED] Page-aligned size
[17:24:51] [PASSED] Extra pages requested
[17:24:51] ================ [PASSED] ttm_tt_init_basic ================
[17:24:51] [PASSED] ttm_tt_init_misaligned
[17:24:51] [PASSED] ttm_tt_fini_basic
[17:24:51] [PASSED] ttm_tt_fini_sg
[17:24:51] [PASSED] ttm_tt_fini_shmem
[17:24:51] [PASSED] ttm_tt_create_basic
[17:24:51] [PASSED] ttm_tt_create_invalid_bo_type
[17:24:51] [PASSED] ttm_tt_create_ttm_exists
[17:24:51] [PASSED] ttm_tt_create_failed
[17:24:51] [PASSED] ttm_tt_destroy_basic
[17:24:51] [PASSED] ttm_tt_populate_null_ttm
[17:24:51] [PASSED] ttm_tt_populate_populated_ttm
[17:24:51] [PASSED] ttm_tt_unpopulate_basic
[17:24:51] [PASSED] ttm_tt_unpopulate_empty_ttm
[17:24:51] [PASSED] ttm_tt_swapin_basic
[17:24:51] ===================== [PASSED] ttm_tt ======================
[17:24:51] =================== ttm_bo (14 subtests) ===================
[17:24:51] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[17:24:51] [PASSED] Cannot be interrupted and sleeps
[17:24:51] [PASSED] Cannot be interrupted, locks straight away
[17:24:51] [PASSED] Can be interrupted, sleeps
[17:24:51] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[17:24:51] [PASSED] ttm_bo_reserve_locked_no_sleep
[17:24:51] [PASSED] ttm_bo_reserve_no_wait_ticket
[17:24:51] [PASSED] ttm_bo_reserve_double_resv
[17:24:51] [PASSED] ttm_bo_reserve_interrupted
[17:24:51] [PASSED] ttm_bo_reserve_deadlock
[17:24:51] [PASSED] ttm_bo_unreserve_basic
[17:24:51] [PASSED] ttm_bo_unreserve_pinned
[17:24:51] [PASSED] ttm_bo_unreserve_bulk
[17:24:51] [PASSED] ttm_bo_fini_basic
[17:24:51] [PASSED] ttm_bo_fini_shared_resv
[17:24:51] [PASSED] ttm_bo_pin_basic
[17:24:51] [PASSED] ttm_bo_pin_unpin_resource
[17:24:51] [PASSED] ttm_bo_multiple_pin_one_unpin
[17:24:51] ===================== [PASSED] ttm_bo ======================
[17:24:51] ============== ttm_bo_validate (21 subtests) ===============
[17:24:51] ============== ttm_bo_init_reserved_sys_man  ===============
[17:24:51] [PASSED] Buffer object for userspace
[17:24:51] [PASSED] Kernel buffer object
[17:24:51] [PASSED] Shared buffer object
[17:24:51] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[17:24:51] ============== ttm_bo_init_reserved_mock_man  ==============
[17:24:51] [PASSED] Buffer object for userspace
[17:24:51] [PASSED] Kernel buffer object
[17:24:51] [PASSED] Shared buffer object
[17:24:51] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[17:24:51] [PASSED] ttm_bo_init_reserved_resv
[17:24:51] ================== ttm_bo_validate_basic  ==================
[17:24:51] [PASSED] Buffer object for userspace
[17:24:51] [PASSED] Kernel buffer object
[17:24:51] [PASSED] Shared buffer object
[17:24:51] ============== [PASSED] ttm_bo_validate_basic ==============
[17:24:51] [PASSED] ttm_bo_validate_invalid_placement
[17:24:51] ============= ttm_bo_validate_same_placement  ==============
[17:24:51] [PASSED] System manager
[17:24:51] [PASSED] VRAM manager
[17:24:51] ========= [PASSED] ttm_bo_validate_same_placement ==========
[17:24:51] [PASSED] ttm_bo_validate_failed_alloc
[17:24:51] [PASSED] ttm_bo_validate_pinned
[17:24:51] [PASSED] ttm_bo_validate_busy_placement
[17:24:51] ================ ttm_bo_validate_multihop  =================
[17:24:51] [PASSED] Buffer object for userspace
[17:24:51] [PASSED] Kernel buffer object
[17:24:51] [PASSED] Shared buffer object
[17:24:51] ============ [PASSED] ttm_bo_validate_multihop =============
[17:24:51] ========== ttm_bo_validate_no_placement_signaled  ==========
[17:24:51] [PASSED] Buffer object in system domain, no page vector
[17:24:51] [PASSED] Buffer object in system domain with an existing page vector
[17:24:51] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[17:24:51] ======== ttm_bo_validate_no_placement_not_signaled  ========
[17:24:51] [PASSED] Buffer object for userspace
[17:24:51] [PASSED] Kernel buffer object
[17:24:51] [PASSED] Shared buffer object
[17:24:51] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[17:24:51] [PASSED] ttm_bo_validate_move_fence_signaled
[17:24:51] ========= ttm_bo_validate_move_fence_not_signaled  =========
[17:24:51] [PASSED] Waits for GPU
[17:24:51] [PASSED] Tries to lock straight away
[17:24:51] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[17:24:51] [PASSED] ttm_bo_validate_happy_evict
[17:24:51] [PASSED] ttm_bo_validate_all_pinned_evict
[17:24:51] [PASSED] ttm_bo_validate_allowed_only_evict
[17:24:51] [PASSED] ttm_bo_validate_deleted_evict
[17:24:51] [PASSED] ttm_bo_validate_busy_domain_evict
[17:24:51] [PASSED] ttm_bo_validate_evict_gutting
[17:24:51] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[17:24:51] ================= [PASSED] ttm_bo_validate =================
[17:24:51] ============================================================
[17:24:51] Testing complete. Ran 101 tests: passed: 101
[17:24:51] Elapsed time: 11.235s total, 1.636s configuring, 9.384s building, 0.187s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for AuxCCS handling and render compression modifiers

[Patchwork]

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== Series Details ==

Series: AuxCCS handling and render compression modifiers
URL   : https://patchwork.freedesktop.org/series/160748/
State : success

== Summary ==

CI Bug Log - changes from xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f_BAT -> xe-pw-160748v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 12)
------------------------------

  Additional (1): bat-bmg-3 

Known issues
------------

  Here are the changes found in xe-pw-160748v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_peer2peer@read@read-gpua-vram01-gpub-vram01-p2p:
    - bat-bmg-3:          NOTRUN -> [SKIP][1] ([Intel XE#6566]) +3 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160748v1/bat-bmg-3/igt@xe_peer2peer@read@read-gpua-vram01-gpub-vram01-p2p.html

  
#### Possible fixes ####

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [FAIL][2] ([Intel XE#6519]) -> [PASS][3]
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160748v1/bat-dg2-oem2/igt@xe_waitfence@engine.html

  
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
  [Intel XE#6566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6566


Build changes
-------------

  * IGT: IGT_8721 -> IGT_8723
  * Linux: xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f -> xe-pw-160748v1

  IGT_8721: 3707bb4267de22a18d61b232c4ab5fbaf61db90c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  IGT_8723: 8723
  xe-4465-8059f097e25f736bb3da09af6a9b283079abfd4f: 8059f097e25f736bb3da09af6a9b283079abfd4f
  xe-pw-160748v1: 160748v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160748v1/index.html

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