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* [PATCH v25 00/12] AuxCCS handling and render compression modifiers
@ 2026-03-24  8:40 Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 01/12] drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC Tvrtko Ursulin
                   ` (16 more replies)
  0 siblings, 17 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe; +Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Rodrigo Vivi

A series to add support for compressed surface scanout under xe with
Alderlake-P.

Currently the auxiliary buffer data isn't mapped into the page tables at all so
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
had to disable the support.

On top of that there are missing flushes, invalidations and similar.

Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:

  [PLANE:32:plane 1A]: type=PRI
          uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
          hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)

Display working fine - no artefacts, no DMAR/PIPE faults.

All IGTs pass for me locally.

v2:
 * More patches added to fix kms_flip_tiling.

v3:
 * Rebased after some cleanup patches from v2 were merged.
 * Added people to Cc as suggested by Rodrigo.
 * Adjusted last patch title. (Rodrigo)
 * Apply GGTT flushing only to iomapped system memory buffers.

v4:
 * Added patch for potentially misplaced Wa_14016712196.
 * Fixed (hopefully) MAX_JOB_SIZE_DW on Meteorlake.

v5:
 * Split out ring emission changes to smaller patches.
 * Fixed MAX_JOB_SIZE_DW even more.
 * Don't emit MI_FLUSH_DW_CCS on !BCS. This should fix Meteorlake.

 v6:
 * Added AuxCCS invalidation to indirect context workarounds.
 * Also added the indirect context handling and some other workarounds. They are
   unrelated but the series depends on it.
 * Dropped DPT pin alignment reduction since BMG appears not to be liking it for
   some reason.

v7:
 * Rebased on top of recent xe_fb_pin.c refactoring and also the indirect
   context workarounds series.

v8:
 * Rebased for bo->size removal.
 * Corrected PIPE_CONTROL_FLUSH_L3 to bit 30. (Jose)

v9:
 * Fixed fb remapping changes.
 * Dropped two not required patches from the series.
 * Fixed criteria for GGTT flushing.
 * Limit clflush to the compression metadata area.
 * Rebased for indirect context workarounds landing upstream.

v10:
 * Rebase for XE_GT_WA().

v11:
 * Do not use stolen for DPT on IGFX + AuxCCS.

v12:
 * Rebased for some ringbuf and LRC code changes.

v13:
 * Rebased for various upstream changes.
 * Dropped clflush and stolen avoidance patches after merging IGT MOCS 61 usage.

 v14:
 * MMIO 0x4248 and MI_FLUSH_DW_CCS are MTL+. (Matt)
 * Consolidate engine feature checks. (Ville)
 * Brought back the patch to put DPT tables in system memory for 100% CI pass
   rate. It looks like MOCS 61 is not enough to avoid sporadic pipecrc
   mismatches.

v15:
 * Limited to enabling on Alderlake-P only. (Dropped all Meteorlake patches.)
 * Dropped unrelated GGTT alignment fix. (Sent standalone.)
 * Use display parent interface for probing AuxCCS driver support.

v16:
 * Use write-combine for DPT in stolen memory. (Ville)
 * Dropped clflush patches under assumption pre-production ADL machine were the
   reason for sporadic pipecrc failures.

v17:
 * Mechanical rebase for upstream conflicts.

v18:
 * Added a patch to rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC. (Rodrigo)
 * Instead of exporting a helper function for emitting the aux invalidation
   into the ring, add it to the ring ops vfunc table. (Matthew)

v19:
 * Tweaked comments and removed some stray hunks from v17.

v20:
 * Include <linux/types.h> for u32.

v21:
 * Forward declare struct xe_gt to fix standalone headers test.

v22:
 * Split up "drm/xe/display: Add support for AuxCCS" into four patches for
   easier review.

v23:
 * Fixed rebase error made in v22 when splitting up the patches.

v24:
 * Fixed flag confusion in "drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC".
 * Applied r-b's.

v25:
 * Rebased for upstream conflict and tidied some checkpatch warnings added in
   the patch split.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

Tvrtko Ursulin (12):
  drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC
  drm/xe: Use write-combine mapping when populating DPT
  drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake
  drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
  drm/xe/xelp: Wait for AuxCCS invalidation to complete
  drm/xe: Move aux table invalidation to ring ops
  drm/xe/xelp: Add AuxCCS invalidation to the indirect context
    workarounds
  drm/xe/display: Move remapped plane loop out of __xe_pin_fb_vma_dpt
  drm/xe/display: Change write_dpt_remapped_tiled function signature
  drm/xe/display: Respect remapped plane alignment
  drm/xe/display: Add support for AuxCCS
  drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P

 drivers/gpu/drm/xe/display/intel_fbdev_fb.c   |  12 +-
 drivers/gpu/drm/xe/display/xe_display.c       |   8 ++
 drivers/gpu/drm/xe/display/xe_display_bo.c    |   6 +-
 drivers/gpu/drm/xe/display/xe_dsb_buffer.c    |   4 +-
 drivers/gpu/drm/xe/display/xe_fb_pin.c        | 116 +++++++++++++-----
 drivers/gpu/drm/xe/display/xe_initial_plane.c |   2 +-
 .../gpu/drm/xe/instructions/xe_mi_commands.h  |   6 +
 drivers/gpu/drm/xe/xe_bo.c                    |  17 +--
 drivers/gpu/drm/xe/xe_bo.h                    |   2 +-
 drivers/gpu/drm/xe/xe_lrc.c                   |  23 ++++
 drivers/gpu/drm/xe/xe_ring_ops.c              | 106 ++++++++++++----
 drivers/gpu/drm/xe/xe_ring_ops_types.h        |   8 +-
 12 files changed, 238 insertions(+), 72 deletions(-)

-- 
2.52.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [PATCH v25 01/12] drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 02/12] drm/xe: Use write-combine mapping when populating DPT Tvrtko Ursulin
                   ` (15 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe; +Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Rodrigo Vivi

Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC so that the usage of the
flag can legitimately be expanded to more than just the actual frame-
buffer objects.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Suggested-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
v2:
 * Fixed flag check confusion.
---
 drivers/gpu/drm/xe/display/intel_fbdev_fb.c   | 12 ++++++++----
 drivers/gpu/drm/xe/display/xe_display_bo.c    |  6 +++---
 drivers/gpu/drm/xe/display/xe_dsb_buffer.c    |  4 +++-
 drivers/gpu/drm/xe/display/xe_fb_pin.c        |  2 +-
 drivers/gpu/drm/xe/display/xe_initial_plane.c |  2 +-
 drivers/gpu/drm/xe/xe_bo.c                    | 17 +++++++++--------
 drivers/gpu/drm/xe/xe_bo.h                    |  2 +-
 7 files changed, 26 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
index 87af5646c938..d7030e4d814c 100644
--- a/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
+++ b/drivers/gpu/drm/xe/display/intel_fbdev_fb.c
@@ -56,9 +56,11 @@ struct drm_gem_object *intel_fbdev_fb_bo_create(struct drm_device *drm, int size
 	if (intel_fbdev_fb_prefer_stolen(drm, size)) {
 		obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe),
 						size,
-						ttm_bo_type_kernel, XE_BO_FLAG_SCANOUT |
+						ttm_bo_type_kernel,
+						XE_BO_FLAG_FORCE_WC |
 						XE_BO_FLAG_STOLEN |
-						XE_BO_FLAG_GGTT, false);
+						XE_BO_FLAG_GGTT,
+						false);
 		if (!IS_ERR(obj))
 			drm_info(&xe->drm, "Allocated fbdev into stolen\n");
 		else
@@ -69,9 +71,11 @@ struct drm_gem_object *intel_fbdev_fb_bo_create(struct drm_device *drm, int size
 
 	if (IS_ERR(obj)) {
 		obj = xe_bo_create_pin_map_novm(xe, xe_device_get_root_tile(xe), size,
-						ttm_bo_type_kernel, XE_BO_FLAG_SCANOUT |
+						ttm_bo_type_kernel,
+						XE_BO_FLAG_FORCE_WC |
 						XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
-						XE_BO_FLAG_GGTT, false);
+						XE_BO_FLAG_GGTT,
+						false);
 	}
 
 	if (IS_ERR(obj)) {
diff --git a/drivers/gpu/drm/xe/display/xe_display_bo.c b/drivers/gpu/drm/xe/display/xe_display_bo.c
index a689f71e7b14..1d81b9908265 100644
--- a/drivers/gpu/drm/xe/display/xe_display_bo.c
+++ b/drivers/gpu/drm/xe/display/xe_display_bo.c
@@ -42,9 +42,9 @@ static int xe_display_bo_framebuffer_init(struct drm_gem_object *obj,
 	if (ret)
 		goto err;
 
-	if (!(bo->flags & XE_BO_FLAG_SCANOUT)) {
+	if (!(bo->flags & XE_BO_FLAG_FORCE_WC)) {
 		/*
-		 * XE_BO_FLAG_SCANOUT should ideally be set at creation, or is
+		 * XE_BO_FLAG_FORCE_WC should ideally be set at creation, or is
 		 * automatically set when creating FB. We cannot change caching
 		 * mode when the bo is VM_BINDed, so we can only set
 		 * coherency with display when unbound.
@@ -54,7 +54,7 @@ static int xe_display_bo_framebuffer_init(struct drm_gem_object *obj,
 			ret = -EINVAL;
 			goto err;
 		}
-		bo->flags |= XE_BO_FLAG_SCANOUT;
+		bo->flags |= XE_BO_FLAG_FORCE_WC;
 	}
 	ttm_bo_unreserve(&bo->ttm);
 	return 0;
diff --git a/drivers/gpu/drm/xe/display/xe_dsb_buffer.c b/drivers/gpu/drm/xe/display/xe_dsb_buffer.c
index 1c67a950c6ad..a7158c73a14c 100644
--- a/drivers/gpu/drm/xe/display/xe_dsb_buffer.c
+++ b/drivers/gpu/drm/xe/display/xe_dsb_buffer.c
@@ -54,7 +54,9 @@ static struct intel_dsb_buffer *xe_dsb_buffer_create(struct drm_device *drm, siz
 					PAGE_ALIGN(size),
 					ttm_bo_type_kernel,
 					XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
-					XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT, false);
+					XE_BO_FLAG_FORCE_WC |
+					XE_BO_FLAG_GGTT,
+					false);
 	if (IS_ERR(obj)) {
 		ret = PTR_ERR(obj);
 		goto err_pin_map;
diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index dbbc61032b7f..d4a9eb550cae 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -429,7 +429,7 @@ int intel_plane_pin_fb(struct intel_plane_state *new_plane_state,
 		return 0;
 
 	/* We reject creating !SCANOUT fb's, so this is weird.. */
-	drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_SCANOUT));
+	drm_WARN_ON(bo->ttm.base.dev, !(bo->flags & XE_BO_FLAG_FORCE_WC));
 
 	vma = __xe_pin_fb_vma(intel_fb, &new_plane_state->view.gtt, alignment);
 
diff --git a/drivers/gpu/drm/xe/display/xe_initial_plane.c b/drivers/gpu/drm/xe/display/xe_initial_plane.c
index 65cc0b0c934b..8bcae552dddc 100644
--- a/drivers/gpu/drm/xe/display/xe_initial_plane.c
+++ b/drivers/gpu/drm/xe/display/xe_initial_plane.c
@@ -48,7 +48,7 @@ initial_plane_bo(struct xe_device *xe,
 	if (plane_config->size == 0)
 		return NULL;
 
-	flags = XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT;
+	flags = XE_BO_FLAG_FORCE_WC | XE_BO_FLAG_GGTT;
 
 	base = round_down(plane_config->base, page_size);
 	if (IS_DGFX(xe)) {
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 216e1d8635f4..7545d2fa3255 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -510,13 +510,11 @@ static struct ttm_tt *xe_ttm_tt_create(struct ttm_buffer_object *ttm_bo,
 		WARN_ON((bo->flags & XE_BO_FLAG_USER) && !bo->cpu_caching);
 
 		/*
-		 * Display scanout is always non-coherent with the CPU cache.
-		 *
 		 * For Xe_LPG and beyond up to NVL-P (excluding), PPGTT PTE
 		 * lookups are also non-coherent and require a CPU:WC mapping.
 		 */
-		if ((!bo->cpu_caching && bo->flags & XE_BO_FLAG_SCANOUT) ||
-		     (!xe->info.has_cached_pt && bo->flags & XE_BO_FLAG_PAGETABLE))
+		if ((!bo->cpu_caching && bo->flags & XE_BO_FLAG_FORCE_WC) ||
+		    (!xe->info.has_cached_pt && bo->flags & XE_BO_FLAG_PAGETABLE))
 			caching = ttm_write_combined;
 	}
 
@@ -3201,8 +3199,11 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
 	if (args->flags & DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING)
 		bo_flags |= XE_BO_FLAG_DEFER_BACKING;
 
+	/*
+	 * Display scanout is always non-coherent with the CPU cache.
+	 */
 	if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
-		bo_flags |= XE_BO_FLAG_SCANOUT;
+		bo_flags |= XE_BO_FLAG_FORCE_WC;
 
 	if (args->flags & DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION) {
 		if (XE_IOCTL_DBG(xe, GRAPHICS_VER(xe) < 20))
@@ -3214,7 +3215,7 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
 
 	/* CCS formats need physical placement at a 64K alignment in VRAM. */
 	if ((bo_flags & XE_BO_FLAG_VRAM_MASK) &&
-	    (bo_flags & XE_BO_FLAG_SCANOUT) &&
+	    (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT) &&
 	    !(xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) &&
 	    IS_ALIGNED(args->size, SZ_64K))
 		bo_flags |= XE_BO_FLAG_NEEDS_64K;
@@ -3234,7 +3235,7 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
 			 args->cpu_caching != DRM_XE_GEM_CPU_CACHING_WC))
 		return -EINVAL;
 
-	if (XE_IOCTL_DBG(xe, bo_flags & XE_BO_FLAG_SCANOUT &&
+	if (XE_IOCTL_DBG(xe, bo_flags & XE_BO_FLAG_FORCE_WC &&
 			 args->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB))
 		return -EINVAL;
 
@@ -3702,7 +3703,7 @@ int xe_bo_dumb_create(struct drm_file *file_priv,
 	bo = xe_bo_create_user(xe, NULL, args->size,
 			       DRM_XE_GEM_CPU_CACHING_WC,
 			       XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(xe)) |
-			       XE_BO_FLAG_SCANOUT |
+			       XE_BO_FLAG_FORCE_WC |
 			       XE_BO_FLAG_NEEDS_CPU_ACCESS, NULL);
 	if (IS_ERR(bo))
 		return PTR_ERR(bo);
diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 2cbac16f7db7..a0ad846e9450 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -35,7 +35,7 @@
 #define XE_BO_FLAG_PINNED		BIT(7)
 #define XE_BO_FLAG_NO_RESV_EVICT	BIT(8)
 #define XE_BO_FLAG_DEFER_BACKING	BIT(9)
-#define XE_BO_FLAG_SCANOUT		BIT(10)
+#define XE_BO_FLAG_FORCE_WC		BIT(10)
 #define XE_BO_FLAG_FIXED_PLACEMENT	BIT(11)
 #define XE_BO_FLAG_PAGETABLE		BIT(12)
 #define XE_BO_FLAG_NEEDS_CPU_ACCESS	BIT(13)
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 02/12] drm/xe: Use write-combine mapping when populating DPT
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 01/12] drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 03/12] drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake Tvrtko Ursulin
                   ` (14 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe
  Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Ville Syrjälä,
	Rodrigo Vivi

The fallback case for DPT backing store is a buffer object in system
memory buffer, which by default use a write-back CPU caching policy.

If this fallback gets triggered, and since there is currently no flushing,
the DPT writes made when pinning a buffer to display are not guaranteed to
be seen by the display engine.

To fix this, since both the local memory and the stolen memory DPT
placements already use write-combine, let us make the system memory option
follow suit by passing down the appropriate flag.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index d4a9eb550cae..df7d305c6fcd 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -122,7 +122,8 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 						   ttm_bo_type_kernel,
 						   XE_BO_FLAG_SYSTEM |
 						   XE_BO_FLAG_GGTT |
-						   XE_BO_FLAG_PAGETABLE,
+						   XE_BO_FLAG_PAGETABLE |
+						   XE_BO_FLAG_FORCE_WC,
 						   alignment, false);
 	if (IS_ERR(dpt))
 		return PTR_ERR(dpt);
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 03/12] drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 01/12] drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 02/12] drm/xe: Use write-combine mapping when populating DPT Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 04/12] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS Tvrtko Ursulin
                   ` (13 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe; +Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Rodrigo Vivi

At the moment the driver does not support AuxCCS at all due respective
modifiers being hidden from userspace.

As we are about to start enabling them, starting with Alderlake, let us
begin by limiting the ring buffer support to just that initial platform.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_ring_ops.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index bce7d93ce3a3..92b33925ce08 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -334,9 +334,9 @@ static bool has_aux_ccs(struct xe_device *xe)
 	 * PVC is a special case that has no compression of either type
 	 * (FlatCCS or AuxCCS).  Also, AuxCCS is no longer used from Xe2
 	 * onward, so any future platforms with no FlatCCS will not have
-	 * AuxCCS either.
+	 * AuxCCS, and we explicitly do not want to support it on MTL.
 	 */
-	if (GRAPHICS_VER(xe) >= 20 || xe->info.platform == XE_PVC)
+	if (GRAPHICS_VERx100(xe) >= 1270 || xe->info.platform == XE_PVC)
 		return false;
 
 	return !xe->info.has_flat_ccs;
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 04/12] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (2 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 03/12] drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 05/12] drm/xe/xelp: Wait for AuxCCS invalidation to complete Tvrtko Ursulin
                   ` (12 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe; +Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Rodrigo Vivi

According to i915 commit
ad8ebf12217e ("drm/i915/gt: Ensure memory quiesced before invalidation")
quiescing of the memory traffic is required before invalidating the AuxCCS
tables.

Add an extra pipe control flush to achieve that.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_ring_ops.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 92b33925ce08..629e551304be 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -409,6 +409,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 	struct xe_gt *gt = job->q->gt;
 	struct xe_device *xe = gt_to_xe(gt);
 	bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
+	const bool aux_ccs = has_aux_ccs(xe);
 	u32 mask_flags = 0;
 
 	*head = lrc->ring.tail;
@@ -418,6 +419,13 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 
 	i = emit_copy_timestamp(xe, lrc, dw, i);
 
+	/*
+	 * On AuxCCS platforms the invalidation of the Aux table requires
+	 * quiescing the memory traffic beforehand.
+	 */
+	if (aux_ccs)
+		i = emit_render_cache_flush(job, dw, i);
+
 	dw[i++] = preparser_disable(true);
 	if (lacks_render)
 		mask_flags = PIPE_CONTROL_3D_ARCH_FLAGS;
@@ -428,7 +436,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 	i = emit_pipe_invalidate(job->q, mask_flags, job->ring_ops_flush_tlb, dw, i);
 
 	/* hsdes: 1809175790 */
-	if (has_aux_ccs(xe))
+	if (aux_ccs)
 		i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);
 
 	dw[i++] = preparser_disable(false);
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 05/12] drm/xe/xelp: Wait for AuxCCS invalidation to complete
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (3 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 04/12] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 06/12] drm/xe: Move aux table invalidation to ring ops Tvrtko Ursulin
                   ` (11 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe; +Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Rodrigo Vivi

On AuxCCS platforms we need to wait for AuxCCS invalidations to complete.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/instructions/xe_mi_commands.h | 6 ++++++
 drivers/gpu/drm/xe/xe_ring_ops.c                 | 9 ++++++++-
 drivers/gpu/drm/xe/xe_ring_ops_types.h           | 2 +-
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
index 29569eff1af3..ad7d98f2dbba 100644
--- a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
+++ b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
@@ -94,4 +94,10 @@
 #define MI_SET_APPID_SESSION_ID_MASK	REG_GENMASK(6, 0)
 #define MI_SET_APPID_SESSION_ID(x)	REG_FIELD_PREP(MI_SET_APPID_SESSION_ID_MASK, x)
 
+#define MI_SEMAPHORE_WAIT_TOKEN		(__MI_INSTR(0x1c) | XE_INSTR_NUM_DW(5)) /* XeLP+ */
+#define   MI_SEMAPHORE_REGISTER_POLL	REG_BIT(16)
+#define   MI_SEMAPHORE_POLL		REG_BIT(15)
+#define   MI_SEMAPHORE_CMP_OP_MASK	REG_GENMASK(14, 12)
+#define   MI_SEMAPHORE_SAD_EQ_SDD	REG_FIELD_PREP(MI_SEMAPHORE_CMP_OP_MASK, 4)
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 629e551304be..7551a6acd076 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -54,7 +54,14 @@ static int emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg,
 	dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
 	dw[i++] = reg.addr + gt->mmio.adj_offset;
 	dw[i++] = AUX_INV;
-	dw[i++] = MI_NOOP;
+	dw[i++] = MI_SEMAPHORE_WAIT_TOKEN |
+		  MI_SEMAPHORE_REGISTER_POLL |
+		  MI_SEMAPHORE_POLL |
+		  MI_SEMAPHORE_SAD_EQ_SDD;
+	dw[i++] = 0;
+	dw[i++] = reg.addr + gt->mmio.adj_offset;
+	dw[i++] = 0;
+	dw[i++] = 0;
 
 	return i;
 }
diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h
index a42a465ac438..1197fc0bf2af 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
@@ -8,7 +8,7 @@
 
 struct xe_sched_job;
 
-#define MAX_JOB_SIZE_DW 72
+#define MAX_JOB_SIZE_DW 74
 #define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4)
 
 /**
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 06/12] drm/xe: Move aux table invalidation to ring ops
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (4 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 05/12] drm/xe/xelp: Wait for AuxCCS invalidation to complete Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 07/12] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds Tvrtko Ursulin
                   ` (10 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe
  Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Matthew Brost,
	Rodrigo Vivi

Implement the suggestion of moving the aux invalidation from a helper to a
ring ops vfunc, together with the suggestion to split the vfunc table of
video decode and video enhance engines.

With this done the LRC code will be able to access the functionality via
the newly added ring ops vfunc.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
v2:
 * Removed stray hunks from v1.

v3:
 * Include header for u32.

v4:
 * Forward declare struct xe_gt.
---
 drivers/gpu/drm/xe/xe_ring_ops.c       | 105 ++++++++++++++++++-------
 drivers/gpu/drm/xe/xe_ring_ops_types.h |   6 ++
 2 files changed, 83 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 7551a6acd076..cfeb4fc7d217 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -48,22 +48,48 @@ static u32 preparser_disable(bool state)
 	return MI_ARB_CHECK | BIT(8) | state;
 }
 
-static int emit_aux_table_inv(struct xe_gt *gt, struct xe_reg reg,
-			      u32 *dw, int i)
+static u32 *
+__emit_aux_table_inv(u32 *cmd, const struct xe_reg reg, u32 adj_offset)
 {
-	dw[i++] = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) | MI_LRI_MMIO_REMAP_EN;
-	dw[i++] = reg.addr + gt->mmio.adj_offset;
-	dw[i++] = AUX_INV;
-	dw[i++] = MI_SEMAPHORE_WAIT_TOKEN |
-		  MI_SEMAPHORE_REGISTER_POLL |
-		  MI_SEMAPHORE_POLL |
-		  MI_SEMAPHORE_SAD_EQ_SDD;
-	dw[i++] = 0;
-	dw[i++] = reg.addr + gt->mmio.adj_offset;
-	dw[i++] = 0;
-	dw[i++] = 0;
+	*cmd++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1) |
+		 MI_LRI_MMIO_REMAP_EN;
+	*cmd++ = reg.addr + adj_offset;
+	*cmd++ = AUX_INV;
+	*cmd++ = MI_SEMAPHORE_WAIT_TOKEN | MI_SEMAPHORE_REGISTER_POLL |
+		 MI_SEMAPHORE_POLL | MI_SEMAPHORE_SAD_EQ_SDD;
+	*cmd++ = 0;
+	*cmd++ = reg.addr + adj_offset;
+	*cmd++ = 0;
+	*cmd++ = 0;
 
-	return i;
+	return cmd;
+}
+
+static u32 *emit_aux_table_inv_render_compute(struct xe_gt *gt, u32 *cmd)
+{
+	return __emit_aux_table_inv(cmd, CCS_AUX_INV, gt->mmio.adj_offset);
+}
+
+static u32 *emit_aux_table_inv_video_decode(struct xe_gt *gt, u32 *cmd)
+{
+	return __emit_aux_table_inv(cmd, VD0_AUX_INV, gt->mmio.adj_offset);
+}
+
+static u32 *emit_aux_table_inv_video_enhance(struct xe_gt *gt, u32 *cmd)
+{
+	return __emit_aux_table_inv(cmd, VE0_AUX_INV, gt->mmio.adj_offset);
+}
+
+static int emit_aux_table_inv(struct xe_hw_engine *hwe, u32 *dw, int i)
+{
+	struct xe_gt *gt = hwe->gt;
+	u32 *(*emit)(struct xe_gt *gt, u32 *cmd) =
+		gt->ring_ops[hwe->class]->emit_aux_table_inv;
+
+	if (emit)
+		return emit(gt, dw + i) - dw;
+	else
+		return i;
 }
 
 static int emit_user_interrupt(u32 *dw, int i)
@@ -356,7 +382,6 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
 	u32 ppgtt_flag = get_ppgtt_flag(job);
 	struct xe_gt *gt = job->q->gt;
 	struct xe_device *xe = gt_to_xe(gt);
-	bool decode = job->q->class == XE_ENGINE_CLASS_VIDEO_DECODE;
 
 	*head = lrc->ring.tail;
 
@@ -368,12 +393,7 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
 	dw[i++] = preparser_disable(true);
 
 	/* hsdes: 1809175790 */
-	if (has_aux_ccs(xe)) {
-		if (decode)
-			i = emit_aux_table_inv(gt, VD0_AUX_INV, dw, i);
-		else
-			i = emit_aux_table_inv(gt, VE0_AUX_INV, dw, i);
-	}
+	i = emit_aux_table_inv(job->q->hwe, dw, i);
 
 	if (job->ring_ops_flush_tlb)
 		i = emit_flush_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc),
@@ -416,7 +436,6 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 	struct xe_gt *gt = job->q->gt;
 	struct xe_device *xe = gt_to_xe(gt);
 	bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
-	const bool aux_ccs = has_aux_ccs(xe);
 	u32 mask_flags = 0;
 
 	*head = lrc->ring.tail;
@@ -430,7 +449,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 	 * On AuxCCS platforms the invalidation of the Aux table requires
 	 * quiescing the memory traffic beforehand.
 	 */
-	if (aux_ccs)
+	if (has_aux_ccs(xe))
 		i = emit_render_cache_flush(job, dw, i);
 
 	dw[i++] = preparser_disable(true);
@@ -443,8 +462,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
 	i = emit_pipe_invalidate(job->q, mask_flags, job->ring_ops_flush_tlb, dw, i);
 
 	/* hsdes: 1809175790 */
-	if (aux_ccs)
-		i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);
+	i = emit_aux_table_inv(job->q->hwe, dw, i);
 
 	dw[i++] = preparser_disable(false);
 
@@ -571,7 +589,11 @@ static const struct xe_ring_ops ring_ops_gen12_copy = {
 	.emit_job = emit_job_gen12_copy,
 };
 
-static const struct xe_ring_ops ring_ops_gen12_video = {
+static const struct xe_ring_ops ring_ops_gen12_video_decode = {
+	.emit_job = emit_job_gen12_video,
+};
+
+static const struct xe_ring_ops ring_ops_gen12_video_enhance = {
 	.emit_job = emit_job_gen12_video,
 };
 
@@ -579,20 +601,47 @@ static const struct xe_ring_ops ring_ops_gen12_render_compute = {
 	.emit_job = emit_job_gen12_render_compute,
 };
 
+static const struct xe_ring_ops auxccs_ring_ops_gen12_video_decode = {
+	.emit_job = emit_job_gen12_video,
+	.emit_aux_table_inv = emit_aux_table_inv_video_decode,
+};
+
+static const struct xe_ring_ops auxccs_ring_ops_gen12_video_enhance = {
+	.emit_job = emit_job_gen12_video,
+	.emit_aux_table_inv = emit_aux_table_inv_video_enhance,
+};
+
+static const struct xe_ring_ops auxccs_ring_ops_gen12_render_compute = {
+	.emit_job = emit_job_gen12_render_compute,
+	.emit_aux_table_inv = emit_aux_table_inv_render_compute,
+};
+
 const struct xe_ring_ops *
 xe_ring_ops_get(struct xe_gt *gt, enum xe_engine_class class)
 {
+	struct xe_device *xe = gt_to_xe(gt);
+
 	switch (class) {
 	case XE_ENGINE_CLASS_OTHER:
 		return &ring_ops_gen12_gsc;
 	case XE_ENGINE_CLASS_COPY:
 		return &ring_ops_gen12_copy;
 	case XE_ENGINE_CLASS_VIDEO_DECODE:
+		if (has_aux_ccs(xe))
+			return &auxccs_ring_ops_gen12_video_decode;
+		else
+			return &ring_ops_gen12_video_decode;
 	case XE_ENGINE_CLASS_VIDEO_ENHANCE:
-		return &ring_ops_gen12_video;
+		if (has_aux_ccs(xe))
+			return &auxccs_ring_ops_gen12_video_enhance;
+		else
+			return &ring_ops_gen12_video_enhance;
 	case XE_ENGINE_CLASS_RENDER:
 	case XE_ENGINE_CLASS_COMPUTE:
-		return &ring_ops_gen12_render_compute;
+		if (has_aux_ccs(xe))
+			return &auxccs_ring_ops_gen12_render_compute;
+		else
+			return &ring_ops_gen12_render_compute;
 	default:
 		return NULL;
 	}
diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h
index 1197fc0bf2af..52ff96bc4100 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops_types.h
+++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h
@@ -6,6 +6,9 @@
 #ifndef _XE_RING_OPS_TYPES_H_
 #define _XE_RING_OPS_TYPES_H_
 
+#include <linux/types.h>
+
+struct xe_gt;
 struct xe_sched_job;
 
 #define MAX_JOB_SIZE_DW 74
@@ -17,6 +20,9 @@ struct xe_sched_job;
 struct xe_ring_ops {
 	/** @emit_job: Write job to ring */
 	void (*emit_job)(struct xe_sched_job *job);
+
+	/** @emit_aux_table_inv: Emit aux table invalidation to the ring */
+	u32 *(*emit_aux_table_inv)(struct xe_gt *gt, u32 *cmd);
 };
 
 #endif
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 07/12] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (5 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 06/12] drm/xe: Move aux table invalidation to ring ops Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 08/12] drm/xe/display: Move remapped plane loop out of __xe_pin_fb_vma_dpt Tvrtko Ursulin
                   ` (9 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe; +Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Rodrigo Vivi

Following from the i915 reference implementation, we add the AuxCCS
invalidation to the indirect context workarounds page.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
v2:
 * Reworked to accomodate aux invalidation becoming part of ring_ops.
---
 drivers/gpu/drm/xe/xe_lrc.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index dde3bcff3c22..24f4c7210cfb 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -28,6 +28,7 @@
 #include "xe_map.h"
 #include "xe_memirq.h"
 #include "xe_mmio.h"
+#include "xe_ring_ops.h"
 #include "xe_sriov.h"
 #include "xe_trace_lrc.h"
 #include "xe_vm.h"
@@ -94,6 +95,9 @@ gt_engine_needs_indirect_ctx(struct xe_gt *gt, enum xe_engine_class class)
 					       class, NULL))
 		return true;
 
+	if (gt->ring_ops[class]->emit_aux_table_inv)
+		return true;
+
 	return false;
 }
 
@@ -1217,6 +1221,23 @@ static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
 	return cmd - batch;
 }
 
+static ssize_t setup_invalidate_auxccs_wa(struct xe_lrc *lrc,
+					  struct xe_hw_engine *hwe,
+					  u32 *batch, size_t max_len)
+{
+	struct xe_gt *gt = lrc->gt;
+	u32 *(*emit)(struct xe_gt *gt, u32 *cmd) =
+		gt->ring_ops[hwe->class]->emit_aux_table_inv;
+
+	if (!emit)
+		return 0;
+
+	if (xe_gt_WARN_ON(gt, max_len < 8))
+		return -ENOSPC;
+
+	return emit(gt, batch) - batch;
+}
+
 struct bo_setup {
 	ssize_t (*setup)(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
 			 u32 *batch, size_t max_size);
@@ -1349,9 +1370,11 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
 {
 	static const struct bo_setup rcs_funcs[] = {
 		{ .setup = setup_timestamp_wa },
+		{ .setup = setup_invalidate_auxccs_wa },
 		{ .setup = setup_configfs_mid_ctx_restore_bb },
 	};
 	static const struct bo_setup xcs_funcs[] = {
+		{ .setup = setup_invalidate_auxccs_wa },
 		{ .setup = setup_configfs_mid_ctx_restore_bb },
 	};
 	struct bo_setup_state state = {
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 08/12] drm/xe/display: Move remapped plane loop out of __xe_pin_fb_vma_dpt
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (6 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 07/12] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 09/12] drm/xe/display: Change write_dpt_remapped_tiled function signature Tvrtko Ursulin
                   ` (8 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe
  Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Juha-Pekka Heikkila,
	Michael J. Ruhl, Rodrigo Vivi, Thomas Hellström,
	Maarten Lankhorst

In preparation for adding support for the auxccs plane lets move the
plane iteration loop to its own function.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Michael J. Ruhl <michael.j.ruhl@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 34 +++++++++++++++-----------
 1 file changed, 20 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index df7d305c6fcd..845e28efce61 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -50,9 +50,9 @@ write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_
 }
 
 static void
-write_dpt_remapped(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs,
-		   u32 bo_ofs, u32 width, u32 height, u32 src_stride,
-		   u32 dst_stride)
+write_dpt_remapped_tiled(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs,
+			 u32 bo_ofs, u32 width, u32 height, u32 src_stride,
+			 u32 dst_stride)
 {
 	struct xe_device *xe = xe_bo_device(bo);
 	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
@@ -78,6 +78,22 @@ write_dpt_remapped(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs,
 	*dpt_ofs = ALIGN(*dpt_ofs, 4096);
 }
 
+static void
+write_dpt_remapped(struct xe_bo *bo,
+		   const struct intel_remapped_info *remap_info,
+		   struct iosys_map *map)
+{
+	u32 i, dpt_ofs = 0;
+
+	for (i = 0; i < ARRAY_SIZE(remap_info->plane); i++)
+		write_dpt_remapped_tiled(bo, map, &dpt_ofs,
+					 remap_info->plane[i].offset,
+					 remap_info->plane[i].width,
+					 remap_info->plane[i].height,
+					 remap_info->plane[i].src_stride,
+					 sremap_info->plane[i].dst_stride);
+}
+
 static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 			       const struct i915_gtt_view *view,
 			       struct i915_vma *vma,
@@ -138,17 +154,7 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 			iosys_map_wr(&dpt->vmap, x * 8, u64, pte | addr);
 		}
 	} else if (view->type == I915_GTT_VIEW_REMAPPED) {
-		const struct intel_remapped_info *remap_info = &view->remapped;
-		u32 i, dpt_ofs = 0;
-
-		for (i = 0; i < ARRAY_SIZE(remap_info->plane); i++)
-			write_dpt_remapped(bo, &dpt->vmap, &dpt_ofs,
-					   remap_info->plane[i].offset,
-					   remap_info->plane[i].width,
-					   remap_info->plane[i].height,
-					   remap_info->plane[i].src_stride,
-					   remap_info->plane[i].dst_stride);
-
+		write_dpt_remapped(bo, &view->remapped, &dpt->vmap);
 	} else {
 		const struct intel_rotation_info *rot_info = &view->rotated;
 		u32 i, dpt_ofs = 0;
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 09/12] drm/xe/display: Change write_dpt_remapped_tiled function signature
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (7 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 08/12] drm/xe/display: Move remapped plane loop out of __xe_pin_fb_vma_dpt Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 10/12] drm/xe/display: Respect remapped plane alignment Tvrtko Ursulin
                   ` (7 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe
  Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Juha-Pekka Heikkila,
	Michael J. Ruhl, Rodrigo Vivi, Thomas Hellström,
	Maarten Lankhorst

In preparation for adding support for the auxccs plane lets change the
function signature of write_dpt_remapped_tiled(). This will enable a
tidier way of extending it subsequent patches.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Michael J. Ruhl <michael.j.ruhl@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
v2:
 * Update dest between planes. (Uma)
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 58 +++++++++++++++-----------
 1 file changed, 34 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 845e28efce61..ead70ee48028 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -49,33 +49,44 @@ write_dpt_rotated(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs, u32 bo_
 	*dpt_ofs = ALIGN(*dpt_ofs, 4096);
 }
 
-static void
-write_dpt_remapped_tiled(struct xe_bo *bo, struct iosys_map *map, u32 *dpt_ofs,
-			 u32 bo_ofs, u32 width, u32 height, u32 src_stride,
-			 u32 dst_stride)
+static unsigned int
+write_dpt_padding(struct iosys_map *map, unsigned int dest, unsigned int pad)
+{
+	/* The DE ignores the PTEs for the padding tiles */
+	return dest + pad * sizeof(u64);
+}
+
+static unsigned int
+write_dpt_remapped_tiled(struct xe_bo *bo, struct iosys_map *map,
+			 unsigned int dest,
+			 const struct intel_remapped_plane_info *plane)
 {
 	struct xe_device *xe = xe_bo_device(bo);
 	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
-	u32 column, row;
-	u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo, xe->pat.idx[XE_CACHE_NONE]);
+	const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
+						 xe->pat.idx[XE_CACHE_NONE]);
+	unsigned int offset, column, row;
 
-	for (row = 0; row < height; row++) {
-		u32 src_idx = src_stride * row + bo_ofs;
+	for (row = 0; row < plane->height; row++) {
+		offset = (plane->offset + plane->src_stride * row) *
+			 XE_PAGE_SIZE;
 
-		for (column = 0; column < width; column++) {
-			u64 addr = xe_bo_addr(bo, src_idx * XE_PAGE_SIZE, XE_PAGE_SIZE);
-			iosys_map_wr(map, *dpt_ofs, u64, pte | addr);
+		for (column = 0; column < plane->width; column++) {
+			u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
 
-			*dpt_ofs += 8;
-			src_idx++;
+			iosys_map_wr(map, dest, u64, addr | pte);
+			dest += sizeof(u64);
+			offset += XE_PAGE_SIZE;
 		}
 
-		/* The DE ignores the PTEs for the padding tiles */
-		*dpt_ofs += (dst_stride - width) * 8;
+		dest = write_dpt_padding(map, dest,
+					 plane->dst_stride - plane->width);
 	}
 
 	/* Align to next page */
-	*dpt_ofs = ALIGN(*dpt_ofs, 4096);
+	dest = ALIGN(dest, XE_PAGE_SIZE);
+
+	return dest;
 }
 
 static void
@@ -83,15 +94,14 @@ write_dpt_remapped(struct xe_bo *bo,
 		   const struct intel_remapped_info *remap_info,
 		   struct iosys_map *map)
 {
-	u32 i, dpt_ofs = 0;
+	unsigned int i, dest = 0;
 
-	for (i = 0; i < ARRAY_SIZE(remap_info->plane); i++)
-		write_dpt_remapped_tiled(bo, map, &dpt_ofs,
-					 remap_info->plane[i].offset,
-					 remap_info->plane[i].width,
-					 remap_info->plane[i].height,
-					 remap_info->plane[i].src_stride,
-					 sremap_info->plane[i].dst_stride);
+	for (i = 0; i < ARRAY_SIZE(remap_info->plane); i++) {
+		const struct intel_remapped_plane_info *plane =
+				&remap_info->plane[i];
+
+		dest = write_dpt_remapped_tiled(bo, map, dest, plane);
+	}
 }
 
 static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 10/12] drm/xe/display: Respect remapped plane alignment
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (8 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 09/12] drm/xe/display: Change write_dpt_remapped_tiled function signature Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 11/12] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
                   ` (6 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe
  Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Juha-Pekka Heikkila,
	Michael J. Ruhl, Rodrigo Vivi, Thomas Hellström,
	Maarten Lankhorst

Instead of assuming PAGE_SIZE alignment between the remapped planes
respect the value set in the struct intel_remapped_info.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Michael J. Ruhl <michael.j.ruhl@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index ead70ee48028..23a7ec41f01d 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -83,9 +83,6 @@ write_dpt_remapped_tiled(struct xe_bo *bo, struct iosys_map *map,
 					 plane->dst_stride - plane->width);
 	}
 
-	/* Align to next page */
-	dest = ALIGN(dest, XE_PAGE_SIZE);
-
 	return dest;
 }
 
@@ -100,6 +97,18 @@ write_dpt_remapped(struct xe_bo *bo,
 		const struct intel_remapped_plane_info *plane =
 				&remap_info->plane[i];
 
+		if (!plane->linear && !plane->width && !plane->height)
+			continue;
+
+		if (dest && remap_info->plane_alignment) {
+			const unsigned int index = dest / sizeof(u64);
+			const unsigned int pad =
+				ALIGN(index, remap_info->plane_alignment) -
+				index;
+
+			dest = write_dpt_padding(map, dest, pad);
+		}
+
 		dest = write_dpt_remapped_tiled(bo, map, dest, plane);
 	}
 }
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 11/12] drm/xe/display: Add support for AuxCCS
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (9 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 10/12] drm/xe/display: Respect remapped plane alignment Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  8:40 ` [PATCH v25 12/12] drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P Tvrtko Ursulin
                   ` (5 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe
  Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Juha-Pekka Heikkila,
	Michael J. Ruhl, Rodrigo Vivi, Thomas Hellström,
	Maarten Lankhorst

Add support for mapping the auxiliary CCS buffer into the DPT page tables.

This will allow for better power efficiency by enabling the render
compression frame buffer modifiers such as
I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS in a following patch.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Michael J. Ruhl <michael.j.ruhl@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/xe/display/xe_fb_pin.c | 28 +++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
index 23a7ec41f01d..e45a1e7a4670 100644
--- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
+++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
@@ -56,6 +56,29 @@ write_dpt_padding(struct iosys_map *map, unsigned int dest, unsigned int pad)
 	return dest + pad * sizeof(u64);
 }
 
+static unsigned int
+write_dpt_remapped_linear(struct xe_bo *bo, struct iosys_map *map,
+			  unsigned int dest,
+			  const struct intel_remapped_plane_info *plane)
+{
+	struct xe_device *xe = xe_bo_device(bo);
+	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
+	const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
+						 xe->pat.idx[XE_CACHE_NONE]);
+	unsigned int offset = plane->offset * XE_PAGE_SIZE;
+	unsigned int size = plane->size;
+
+	while (size--) {
+		u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
+
+		iosys_map_wr(map, dest, u64, addr | pte);
+		dest += sizeof(u64);
+		offset += XE_PAGE_SIZE;
+	}
+
+	return dest;
+}
+
 static unsigned int
 write_dpt_remapped_tiled(struct xe_bo *bo, struct iosys_map *map,
 			 unsigned int dest,
@@ -109,7 +132,10 @@ write_dpt_remapped(struct xe_bo *bo,
 			dest = write_dpt_padding(map, dest, pad);
 		}
 
-		dest = write_dpt_remapped_tiled(bo, map, dest, plane);
+		if (plane->linear)
+			dest = write_dpt_remapped_linear(bo, map, dest, plane);
+		else
+			dest = write_dpt_remapped_tiled(bo, map, dest, plane);
 	}
 }
 
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH v25 12/12] drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (10 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 11/12] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
@ 2026-03-24  8:40 ` Tvrtko Ursulin
  2026-03-24  9:34 ` ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers Patchwork
                   ` (4 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24  8:40 UTC (permalink / raw)
  To: intel-xe
  Cc: kernel-dev, Uma Shankar, Tvrtko Ursulin, Jani Nikula,
	José Roberto de Souza, Juha-Pekka Heikkila, Rodrigo Vivi

Now that we have implemented all the related missing bits we can enable
the AuxCCS compressed modifiers which were disabled in
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe").

Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:

        [PLANE:32:plane 1A]: type=PRI
                uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=28
                hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000

Display is working fine - no artefacts, no DMAR/PIPE faults.

v2:
 * Adjust patch title. (Rodrigo)

v3:
 * Complete rewrite based on the display parent interface.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
References: cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/display/xe_display.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 49b6f98e7391..a0a4ddf3bb46 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -541,6 +541,13 @@ static const struct intel_display_irq_interface xe_display_irq_interface = {
 	.synchronize = irq_synchronize,
 };
 
+static bool has_auxccs(struct drm_device *drm)
+{
+	struct xe_device *xe = to_xe_device(drm);
+
+	return xe->info.platform == XE_ALDERLAKE_P;
+}
+
 static const struct intel_display_parent_interface parent = {
 	.bo = &xe_display_bo_interface,
 	.dsb = &xe_display_dsb_interface,
@@ -552,6 +559,7 @@ static const struct intel_display_parent_interface parent = {
 	.pcode = &xe_display_pcode_interface,
 	.rpm = &xe_display_rpm_interface,
 	.stolen = &xe_display_stolen_interface,
+	.has_auxccs = has_auxccs,
 };
 
 /**
-- 
2.52.0


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (11 preceding siblings ...)
  2026-03-24  8:40 ` [PATCH v25 12/12] drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P Tvrtko Ursulin
@ 2026-03-24  9:34 ` Patchwork
  2026-03-24  9:35 ` ✓ CI.KUnit: success " Patchwork
                   ` (3 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2026-03-24  9:34 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: intel-xe

== Series Details ==

Series: AuxCCS handling and render compression modifiers
URL   : https://patchwork.freedesktop.org/series/163758/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 6b4771432ce54e05ba629e0a93345f201307602b
Author: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Date:   Tue Mar 24 08:40:18 2026 +0000

    drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P
    
    Now that we have implemented all the related missing bits we can enable
    the AuxCCS compressed modifiers which were disabled in
    cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe").
    
    Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
    
            [PLANE:32:plane 1A]: type=PRI
                    uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=28
                    hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000
    
    Display is working fine - no artefacts, no DMAR/PIPE faults.
    
    v2:
     * Adjust patch title. (Rodrigo)
    
    v3:
     * Complete rewrite based on the display parent interface.
    
    Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
    References: cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
    Cc: Jani Nikula <jani.nikula@intel.com>
    Cc: José Roberto de Souza <jose.souza@intel.com>
    Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
    Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
    Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+ /mt/dim checkpatch 0c7d9ab970be1e9326b87e8d312443e2bd0da296 drm-intel
1159979cccd0 drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC
7902898e0319 drm/xe: Use write-combine mapping when populating DPT
0ae9e78cce2b drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake
cf59e0436cc1 drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
65b1b9538662 drm/xe/xelp: Wait for AuxCCS invalidation to complete
6aae9fc0489e drm/xe: Move aux table invalidation to ring ops
333dd3194ab2 drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds
c2012d96da5b drm/xe/display: Move remapped plane loop out of __xe_pin_fb_vma_dpt
90ac7c02f473 drm/xe/display: Change write_dpt_remapped_tiled function signature
4614b791ec41 drm/xe/display: Respect remapped plane alignment
deab96471218 drm/xe/display: Add support for AuxCCS
6b4771432ce5 drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P
-:12: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#12: 
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe").

-:12: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")'
#12: 
cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe").

total: 1 errors, 1 warnings, 0 checks, 20 lines checked



^ permalink raw reply	[flat|nested] 19+ messages in thread

* ✓ CI.KUnit: success for AuxCCS handling and render compression modifiers
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (12 preceding siblings ...)
  2026-03-24  9:34 ` ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers Patchwork
@ 2026-03-24  9:35 ` Patchwork
  2026-03-24 10:19 ` ✓ Xe.CI.BAT: " Patchwork
                   ` (2 subsequent siblings)
  16 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2026-03-24  9:35 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: intel-xe

== Series Details ==

Series: AuxCCS handling and render compression modifiers
URL   : https://patchwork.freedesktop.org/series/163758/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[09:34:02] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:34:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[09:34:44] Starting KUnit Kernel (1/1)...
[09:34:44] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:34:44] ================== guc_buf (11 subtests) ===================
[09:34:44] [PASSED] test_smallest
[09:34:44] [PASSED] test_largest
[09:34:44] [PASSED] test_granular
[09:34:44] [PASSED] test_unique
[09:34:44] [PASSED] test_overlap
[09:34:44] [PASSED] test_reusable
[09:34:44] [PASSED] test_too_big
[09:34:44] [PASSED] test_flush
[09:34:44] [PASSED] test_lookup
[09:34:44] [PASSED] test_data
[09:34:44] [PASSED] test_class
[09:34:44] ===================== [PASSED] guc_buf =====================
[09:34:44] =================== guc_dbm (7 subtests) ===================
[09:34:44] [PASSED] test_empty
[09:34:44] [PASSED] test_default
[09:34:44] ======================== test_size  ========================
[09:34:44] [PASSED] 4
[09:34:44] [PASSED] 8
[09:34:44] [PASSED] 32
[09:34:44] [PASSED] 256
[09:34:44] ==================== [PASSED] test_size ====================
[09:34:44] ======================= test_reuse  ========================
[09:34:44] [PASSED] 4
[09:34:44] [PASSED] 8
[09:34:44] [PASSED] 32
[09:34:44] [PASSED] 256
[09:34:44] =================== [PASSED] test_reuse ====================
[09:34:44] =================== test_range_overlap  ====================
[09:34:44] [PASSED] 4
[09:34:44] [PASSED] 8
[09:34:44] [PASSED] 32
[09:34:44] [PASSED] 256
[09:34:44] =============== [PASSED] test_range_overlap ================
[09:34:44] =================== test_range_compact  ====================
[09:34:44] [PASSED] 4
[09:34:44] [PASSED] 8
[09:34:44] [PASSED] 32
[09:34:44] [PASSED] 256
[09:34:44] =============== [PASSED] test_range_compact ================
[09:34:44] ==================== test_range_spare  =====================
[09:34:44] [PASSED] 4
[09:34:44] [PASSED] 8
[09:34:44] [PASSED] 32
[09:34:44] [PASSED] 256
[09:34:44] ================ [PASSED] test_range_spare =================
[09:34:44] ===================== [PASSED] guc_dbm =====================
[09:34:44] =================== guc_idm (6 subtests) ===================
[09:34:44] [PASSED] bad_init
[09:34:44] [PASSED] no_init
[09:34:44] [PASSED] init_fini
[09:34:44] [PASSED] check_used
[09:34:44] [PASSED] check_quota
[09:34:44] [PASSED] check_all
[09:34:44] ===================== [PASSED] guc_idm =====================
[09:34:44] ================== no_relay (3 subtests) ===================
[09:34:44] [PASSED] xe_drops_guc2pf_if_not_ready
[09:34:44] [PASSED] xe_drops_guc2vf_if_not_ready
[09:34:44] [PASSED] xe_rejects_send_if_not_ready
[09:34:44] ==================== [PASSED] no_relay =====================
[09:34:44] ================== pf_relay (14 subtests) ==================
[09:34:44] [PASSED] pf_rejects_guc2pf_too_short
[09:34:44] [PASSED] pf_rejects_guc2pf_too_long
[09:34:44] [PASSED] pf_rejects_guc2pf_no_payload
[09:34:44] [PASSED] pf_fails_no_payload
[09:34:44] [PASSED] pf_fails_bad_origin
[09:34:44] [PASSED] pf_fails_bad_type
[09:34:44] [PASSED] pf_txn_reports_error
[09:34:44] [PASSED] pf_txn_sends_pf2guc
[09:34:44] [PASSED] pf_sends_pf2guc
[09:34:44] [SKIPPED] pf_loopback_nop
[09:34:44] [SKIPPED] pf_loopback_echo
[09:34:44] [SKIPPED] pf_loopback_fail
[09:34:44] [SKIPPED] pf_loopback_busy
[09:34:44] [SKIPPED] pf_loopback_retry
[09:34:44] ==================== [PASSED] pf_relay =====================
[09:34:44] ================== vf_relay (3 subtests) ===================
[09:34:44] [PASSED] vf_rejects_guc2vf_too_short
[09:34:44] [PASSED] vf_rejects_guc2vf_too_long
[09:34:44] [PASSED] vf_rejects_guc2vf_no_payload
[09:34:44] ==================== [PASSED] vf_relay =====================
[09:34:44] ================ pf_gt_config (9 subtests) =================
[09:34:44] [PASSED] fair_contexts_1vf
[09:34:44] [PASSED] fair_doorbells_1vf
[09:34:44] [PASSED] fair_ggtt_1vf
[09:34:44] ====================== fair_vram_1vf  ======================
[09:34:44] [PASSED] 3.50 GiB
[09:34:44] [PASSED] 11.5 GiB
[09:34:44] [PASSED] 15.5 GiB
[09:34:44] [PASSED] 31.5 GiB
[09:34:44] [PASSED] 63.5 GiB
[09:34:44] [PASSED] 1.91 GiB
[09:34:44] ================== [PASSED] fair_vram_1vf ==================
[09:34:44] ================ fair_vram_1vf_admin_only  =================
[09:34:44] [PASSED] 3.50 GiB
[09:34:44] [PASSED] 11.5 GiB
[09:34:44] [PASSED] 15.5 GiB
[09:34:44] [PASSED] 31.5 GiB
[09:34:44] [PASSED] 63.5 GiB
[09:34:44] [PASSED] 1.91 GiB
[09:34:44] ============ [PASSED] fair_vram_1vf_admin_only =============
[09:34:44] ====================== fair_contexts  ======================
[09:34:44] [PASSED] 1 VF
[09:34:44] [PASSED] 2 VFs
[09:34:44] [PASSED] 3 VFs
[09:34:44] [PASSED] 4 VFs
[09:34:44] [PASSED] 5 VFs
[09:34:44] [PASSED] 6 VFs
[09:34:44] [PASSED] 7 VFs
[09:34:44] [PASSED] 8 VFs
[09:34:44] [PASSED] 9 VFs
[09:34:44] [PASSED] 10 VFs
[09:34:44] [PASSED] 11 VFs
[09:34:44] [PASSED] 12 VFs
[09:34:44] [PASSED] 13 VFs
[09:34:44] [PASSED] 14 VFs
[09:34:44] [PASSED] 15 VFs
[09:34:44] [PASSED] 16 VFs
[09:34:44] [PASSED] 17 VFs
[09:34:44] [PASSED] 18 VFs
[09:34:44] [PASSED] 19 VFs
[09:34:44] [PASSED] 20 VFs
[09:34:44] [PASSED] 21 VFs
[09:34:44] [PASSED] 22 VFs
[09:34:44] [PASSED] 23 VFs
[09:34:44] [PASSED] 24 VFs
[09:34:44] [PASSED] 25 VFs
[09:34:44] [PASSED] 26 VFs
[09:34:44] [PASSED] 27 VFs
[09:34:44] [PASSED] 28 VFs
[09:34:44] [PASSED] 29 VFs
[09:34:44] [PASSED] 30 VFs
[09:34:44] [PASSED] 31 VFs
[09:34:44] [PASSED] 32 VFs
[09:34:44] [PASSED] 33 VFs
[09:34:44] [PASSED] 34 VFs
[09:34:44] [PASSED] 35 VFs
[09:34:44] [PASSED] 36 VFs
[09:34:44] [PASSED] 37 VFs
[09:34:44] [PASSED] 38 VFs
[09:34:44] [PASSED] 39 VFs
[09:34:44] [PASSED] 40 VFs
[09:34:44] [PASSED] 41 VFs
[09:34:44] [PASSED] 42 VFs
[09:34:44] [PASSED] 43 VFs
[09:34:44] [PASSED] 44 VFs
[09:34:44] [PASSED] 45 VFs
[09:34:44] [PASSED] 46 VFs
[09:34:44] [PASSED] 47 VFs
[09:34:44] [PASSED] 48 VFs
[09:34:44] [PASSED] 49 VFs
[09:34:44] [PASSED] 50 VFs
[09:34:44] [PASSED] 51 VFs
[09:34:44] [PASSED] 52 VFs
[09:34:44] [PASSED] 53 VFs
[09:34:44] [PASSED] 54 VFs
[09:34:44] [PASSED] 55 VFs
[09:34:44] [PASSED] 56 VFs
[09:34:44] [PASSED] 57 VFs
[09:34:44] [PASSED] 58 VFs
[09:34:44] [PASSED] 59 VFs
[09:34:44] [PASSED] 60 VFs
[09:34:44] [PASSED] 61 VFs
[09:34:44] [PASSED] 62 VFs
[09:34:44] [PASSED] 63 VFs
[09:34:44] ================== [PASSED] fair_contexts ==================
[09:34:44] ===================== fair_doorbells  ======================
[09:34:44] [PASSED] 1 VF
[09:34:44] [PASSED] 2 VFs
[09:34:44] [PASSED] 3 VFs
[09:34:44] [PASSED] 4 VFs
[09:34:44] [PASSED] 5 VFs
[09:34:44] [PASSED] 6 VFs
[09:34:44] [PASSED] 7 VFs
[09:34:44] [PASSED] 8 VFs
[09:34:44] [PASSED] 9 VFs
[09:34:44] [PASSED] 10 VFs
[09:34:44] [PASSED] 11 VFs
[09:34:44] [PASSED] 12 VFs
[09:34:44] [PASSED] 13 VFs
[09:34:44] [PASSED] 14 VFs
[09:34:44] [PASSED] 15 VFs
[09:34:44] [PASSED] 16 VFs
[09:34:44] [PASSED] 17 VFs
[09:34:44] [PASSED] 18 VFs
[09:34:44] [PASSED] 19 VFs
[09:34:44] [PASSED] 20 VFs
[09:34:44] [PASSED] 21 VFs
[09:34:44] [PASSED] 22 VFs
[09:34:44] [PASSED] 23 VFs
[09:34:44] [PASSED] 24 VFs
[09:34:44] [PASSED] 25 VFs
[09:34:44] [PASSED] 26 VFs
[09:34:44] [PASSED] 27 VFs
[09:34:44] [PASSED] 28 VFs
[09:34:44] [PASSED] 29 VFs
[09:34:44] [PASSED] 30 VFs
[09:34:44] [PASSED] 31 VFs
[09:34:44] [PASSED] 32 VFs
[09:34:44] [PASSED] 33 VFs
[09:34:44] [PASSED] 34 VFs
[09:34:44] [PASSED] 35 VFs
[09:34:44] [PASSED] 36 VFs
[09:34:44] [PASSED] 37 VFs
[09:34:44] [PASSED] 38 VFs
[09:34:44] [PASSED] 39 VFs
[09:34:44] [PASSED] 40 VFs
[09:34:44] [PASSED] 41 VFs
[09:34:44] [PASSED] 42 VFs
[09:34:44] [PASSED] 43 VFs
[09:34:44] [PASSED] 44 VFs
[09:34:44] [PASSED] 45 VFs
[09:34:44] [PASSED] 46 VFs
[09:34:44] [PASSED] 47 VFs
[09:34:44] [PASSED] 48 VFs
[09:34:44] [PASSED] 49 VFs
[09:34:44] [PASSED] 50 VFs
[09:34:44] [PASSED] 51 VFs
[09:34:44] [PASSED] 52 VFs
[09:34:44] [PASSED] 53 VFs
[09:34:44] [PASSED] 54 VFs
[09:34:44] [PASSED] 55 VFs
[09:34:44] [PASSED] 56 VFs
[09:34:44] [PASSED] 57 VFs
[09:34:44] [PASSED] 58 VFs
[09:34:44] [PASSED] 59 VFs
[09:34:44] [PASSED] 60 VFs
[09:34:44] [PASSED] 61 VFs
[09:34:44] [PASSED] 62 VFs
[09:34:44] [PASSED] 63 VFs
[09:34:44] ================= [PASSED] fair_doorbells ==================
[09:34:44] ======================== fair_ggtt  ========================
[09:34:44] [PASSED] 1 VF
[09:34:44] [PASSED] 2 VFs
[09:34:44] [PASSED] 3 VFs
[09:34:44] [PASSED] 4 VFs
[09:34:44] [PASSED] 5 VFs
[09:34:44] [PASSED] 6 VFs
[09:34:44] [PASSED] 7 VFs
[09:34:44] [PASSED] 8 VFs
[09:34:44] [PASSED] 9 VFs
[09:34:44] [PASSED] 10 VFs
[09:34:44] [PASSED] 11 VFs
[09:34:44] [PASSED] 12 VFs
[09:34:44] [PASSED] 13 VFs
[09:34:44] [PASSED] 14 VFs
[09:34:44] [PASSED] 15 VFs
[09:34:44] [PASSED] 16 VFs
[09:34:44] [PASSED] 17 VFs
[09:34:44] [PASSED] 18 VFs
[09:34:44] [PASSED] 19 VFs
[09:34:44] [PASSED] 20 VFs
[09:34:44] [PASSED] 21 VFs
[09:34:44] [PASSED] 22 VFs
[09:34:44] [PASSED] 23 VFs
[09:34:44] [PASSED] 24 VFs
[09:34:44] [PASSED] 25 VFs
[09:34:44] [PASSED] 26 VFs
[09:34:44] [PASSED] 27 VFs
[09:34:44] [PASSED] 28 VFs
[09:34:44] [PASSED] 29 VFs
[09:34:44] [PASSED] 30 VFs
[09:34:44] [PASSED] 31 VFs
[09:34:44] [PASSED] 32 VFs
[09:34:44] [PASSED] 33 VFs
[09:34:44] [PASSED] 34 VFs
[09:34:44] [PASSED] 35 VFs
[09:34:44] [PASSED] 36 VFs
[09:34:44] [PASSED] 37 VFs
[09:34:44] [PASSED] 38 VFs
[09:34:44] [PASSED] 39 VFs
[09:34:44] [PASSED] 40 VFs
[09:34:44] [PASSED] 41 VFs
[09:34:44] [PASSED] 42 VFs
[09:34:44] [PASSED] 43 VFs
[09:34:44] [PASSED] 44 VFs
[09:34:44] [PASSED] 45 VFs
[09:34:44] [PASSED] 46 VFs
[09:34:44] [PASSED] 47 VFs
[09:34:44] [PASSED] 48 VFs
[09:34:44] [PASSED] 49 VFs
[09:34:44] [PASSED] 50 VFs
[09:34:44] [PASSED] 51 VFs
[09:34:44] [PASSED] 52 VFs
[09:34:44] [PASSED] 53 VFs
[09:34:44] [PASSED] 54 VFs
[09:34:44] [PASSED] 55 VFs
[09:34:44] [PASSED] 56 VFs
[09:34:44] [PASSED] 57 VFs
[09:34:44] [PASSED] 58 VFs
[09:34:44] [PASSED] 59 VFs
[09:34:44] [PASSED] 60 VFs
[09:34:44] [PASSED] 61 VFs
[09:34:44] [PASSED] 62 VFs
[09:34:44] [PASSED] 63 VFs
[09:34:44] ==================== [PASSED] fair_ggtt ====================
[09:34:44] ======================== fair_vram  ========================
[09:34:44] [PASSED] 1 VF
[09:34:44] [PASSED] 2 VFs
[09:34:44] [PASSED] 3 VFs
[09:34:44] [PASSED] 4 VFs
[09:34:44] [PASSED] 5 VFs
[09:34:44] [PASSED] 6 VFs
[09:34:44] [PASSED] 7 VFs
[09:34:44] [PASSED] 8 VFs
[09:34:44] [PASSED] 9 VFs
[09:34:44] [PASSED] 10 VFs
[09:34:44] [PASSED] 11 VFs
[09:34:44] [PASSED] 12 VFs
[09:34:44] [PASSED] 13 VFs
[09:34:44] [PASSED] 14 VFs
[09:34:44] [PASSED] 15 VFs
[09:34:44] [PASSED] 16 VFs
[09:34:44] [PASSED] 17 VFs
[09:34:44] [PASSED] 18 VFs
[09:34:44] [PASSED] 19 VFs
[09:34:44] [PASSED] 20 VFs
[09:34:44] [PASSED] 21 VFs
[09:34:44] [PASSED] 22 VFs
[09:34:44] [PASSED] 23 VFs
[09:34:44] [PASSED] 24 VFs
[09:34:44] [PASSED] 25 VFs
[09:34:44] [PASSED] 26 VFs
[09:34:44] [PASSED] 27 VFs
[09:34:44] [PASSED] 28 VFs
[09:34:44] [PASSED] 29 VFs
[09:34:44] [PASSED] 30 VFs
[09:34:44] [PASSED] 31 VFs
[09:34:44] [PASSED] 32 VFs
[09:34:44] [PASSED] 33 VFs
[09:34:44] [PASSED] 34 VFs
[09:34:44] [PASSED] 35 VFs
[09:34:44] [PASSED] 36 VFs
[09:34:44] [PASSED] 37 VFs
[09:34:44] [PASSED] 38 VFs
[09:34:44] [PASSED] 39 VFs
[09:34:44] [PASSED] 40 VFs
[09:34:44] [PASSED] 41 VFs
[09:34:44] [PASSED] 42 VFs
[09:34:44] [PASSED] 43 VFs
[09:34:44] [PASSED] 44 VFs
[09:34:44] [PASSED] 45 VFs
[09:34:44] [PASSED] 46 VFs
[09:34:44] [PASSED] 47 VFs
[09:34:44] [PASSED] 48 VFs
[09:34:44] [PASSED] 49 VFs
[09:34:44] [PASSED] 50 VFs
[09:34:44] [PASSED] 51 VFs
[09:34:44] [PASSED] 52 VFs
[09:34:44] [PASSED] 53 VFs
[09:34:44] [PASSED] 54 VFs
[09:34:44] [PASSED] 55 VFs
[09:34:44] [PASSED] 56 VFs
[09:34:44] [PASSED] 57 VFs
[09:34:44] [PASSED] 58 VFs
[09:34:44] [PASSED] 59 VFs
[09:34:44] [PASSED] 60 VFs
[09:34:44] [PASSED] 61 VFs
[09:34:44] [PASSED] 62 VFs
[09:34:44] [PASSED] 63 VFs
[09:34:44] ==================== [PASSED] fair_vram ====================
[09:34:44] ================== [PASSED] pf_gt_config ===================
[09:34:44] ===================== lmtt (1 subtest) =====================
[09:34:44] ======================== test_ops  =========================
[09:34:44] [PASSED] 2-level
[09:34:44] [PASSED] multi-level
[09:34:44] ==================== [PASSED] test_ops =====================
[09:34:44] ====================== [PASSED] lmtt =======================
[09:34:44] ================= pf_service (11 subtests) =================
[09:34:44] [PASSED] pf_negotiate_any
[09:34:44] [PASSED] pf_negotiate_base_match
[09:34:44] [PASSED] pf_negotiate_base_newer
[09:34:44] [PASSED] pf_negotiate_base_next
[09:34:44] [SKIPPED] pf_negotiate_base_older
[09:34:44] [PASSED] pf_negotiate_base_prev
[09:34:44] [PASSED] pf_negotiate_latest_match
[09:34:44] [PASSED] pf_negotiate_latest_newer
[09:34:44] [PASSED] pf_negotiate_latest_next
[09:34:44] [SKIPPED] pf_negotiate_latest_older
[09:34:44] [SKIPPED] pf_negotiate_latest_prev
[09:34:44] =================== [PASSED] pf_service ====================
[09:34:44] ================= xe_guc_g2g (2 subtests) ==================
[09:34:44] ============== xe_live_guc_g2g_kunit_default  ==============
[09:34:44] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[09:34:44] ============== xe_live_guc_g2g_kunit_allmem  ===============
[09:34:44] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[09:34:44] =================== [SKIPPED] xe_guc_g2g ===================
[09:34:44] =================== xe_mocs (2 subtests) ===================
[09:34:44] ================ xe_live_mocs_kernel_kunit  ================
[09:34:44] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[09:34:44] ================ xe_live_mocs_reset_kunit  =================
[09:34:44] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[09:34:44] ==================== [SKIPPED] xe_mocs =====================
[09:34:44] ================= xe_migrate (2 subtests) ==================
[09:34:44] ================= xe_migrate_sanity_kunit  =================
[09:34:44] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[09:34:44] ================== xe_validate_ccs_kunit  ==================
[09:34:44] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[09:34:44] =================== [SKIPPED] xe_migrate ===================
[09:34:44] ================== xe_dma_buf (1 subtest) ==================
[09:34:44] ==================== xe_dma_buf_kunit  =====================
[09:34:44] ================ [SKIPPED] xe_dma_buf_kunit ================
[09:34:44] =================== [SKIPPED] xe_dma_buf ===================
[09:34:44] ================= xe_bo_shrink (1 subtest) =================
[09:34:44] =================== xe_bo_shrink_kunit  ====================
[09:34:44] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[09:34:44] ================== [SKIPPED] xe_bo_shrink ==================
[09:34:44] ==================== xe_bo (2 subtests) ====================
[09:34:44] ================== xe_ccs_migrate_kunit  ===================
[09:34:44] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[09:34:44] ==================== xe_bo_evict_kunit  ====================
[09:34:44] =============== [SKIPPED] xe_bo_evict_kunit ================
[09:34:44] ===================== [SKIPPED] xe_bo ======================
[09:34:44] ==================== args (13 subtests) ====================
[09:34:44] [PASSED] count_args_test
[09:34:44] [PASSED] call_args_example
[09:34:44] [PASSED] call_args_test
[09:34:44] [PASSED] drop_first_arg_example
[09:34:44] [PASSED] drop_first_arg_test
[09:34:44] [PASSED] first_arg_example
[09:34:44] [PASSED] first_arg_test
[09:34:44] [PASSED] last_arg_example
[09:34:44] [PASSED] last_arg_test
[09:34:44] [PASSED] pick_arg_example
[09:34:44] [PASSED] if_args_example
[09:34:44] [PASSED] if_args_test
[09:34:44] [PASSED] sep_comma_example
[09:34:44] ====================== [PASSED] args =======================
[09:34:44] =================== xe_pci (3 subtests) ====================
[09:34:44] ==================== check_graphics_ip  ====================
[09:34:44] [PASSED] 12.00 Xe_LP
[09:34:44] [PASSED] 12.10 Xe_LP+
[09:34:44] [PASSED] 12.55 Xe_HPG
[09:34:44] [PASSED] 12.60 Xe_HPC
[09:34:44] [PASSED] 12.70 Xe_LPG
[09:34:44] [PASSED] 12.71 Xe_LPG
[09:34:44] [PASSED] 12.74 Xe_LPG+
[09:34:44] [PASSED] 20.01 Xe2_HPG
[09:34:44] [PASSED] 20.02 Xe2_HPG
[09:34:44] [PASSED] 20.04 Xe2_LPG
[09:34:44] [PASSED] 30.00 Xe3_LPG
[09:34:44] [PASSED] 30.01 Xe3_LPG
[09:34:44] [PASSED] 30.03 Xe3_LPG
[09:34:44] [PASSED] 30.04 Xe3_LPG
[09:34:44] [PASSED] 30.05 Xe3_LPG
[09:34:44] [PASSED] 35.10 Xe3p_LPG
[09:34:44] [PASSED] 35.11 Xe3p_XPC
[09:34:44] ================ [PASSED] check_graphics_ip ================
[09:34:44] ===================== check_media_ip  ======================
[09:34:44] [PASSED] 12.00 Xe_M
[09:34:44] [PASSED] 12.55 Xe_HPM
[09:34:44] [PASSED] 13.00 Xe_LPM+
[09:34:44] [PASSED] 13.01 Xe2_HPM
[09:34:44] [PASSED] 20.00 Xe2_LPM
[09:34:44] [PASSED] 30.00 Xe3_LPM
[09:34:44] [PASSED] 30.02 Xe3_LPM
[09:34:44] [PASSED] 35.00 Xe3p_LPM
[09:34:44] [PASSED] 35.03 Xe3p_HPM
[09:34:44] ================= [PASSED] check_media_ip ==================
[09:34:44] =================== check_platform_desc  ===================
[09:34:44] [PASSED] 0x9A60 (TIGERLAKE)
[09:34:44] [PASSED] 0x9A68 (TIGERLAKE)
[09:34:44] [PASSED] 0x9A70 (TIGERLAKE)
[09:34:44] [PASSED] 0x9A40 (TIGERLAKE)
[09:34:44] [PASSED] 0x9A49 (TIGERLAKE)
[09:34:44] [PASSED] 0x9A59 (TIGERLAKE)
[09:34:44] [PASSED] 0x9A78 (TIGERLAKE)
[09:34:44] [PASSED] 0x9AC0 (TIGERLAKE)
[09:34:44] [PASSED] 0x9AC9 (TIGERLAKE)
[09:34:44] [PASSED] 0x9AD9 (TIGERLAKE)
[09:34:44] [PASSED] 0x9AF8 (TIGERLAKE)
[09:34:44] [PASSED] 0x4C80 (ROCKETLAKE)
[09:34:44] [PASSED] 0x4C8A (ROCKETLAKE)
[09:34:44] [PASSED] 0x4C8B (ROCKETLAKE)
[09:34:44] [PASSED] 0x4C8C (ROCKETLAKE)
[09:34:44] [PASSED] 0x4C90 (ROCKETLAKE)
[09:34:44] [PASSED] 0x4C9A (ROCKETLAKE)
[09:34:44] [PASSED] 0x4680 (ALDERLAKE_S)
[09:34:44] [PASSED] 0x4682 (ALDERLAKE_S)
[09:34:44] [PASSED] 0x4688 (ALDERLAKE_S)
[09:34:44] [PASSED] 0x468A (ALDERLAKE_S)
[09:34:44] [PASSED] 0x468B (ALDERLAKE_S)
[09:34:44] [PASSED] 0x4690 (ALDERLAKE_S)
[09:34:44] [PASSED] 0x4692 (ALDERLAKE_S)
[09:34:44] [PASSED] 0x4693 (ALDERLAKE_S)
[09:34:44] [PASSED] 0x46A0 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46A1 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46A2 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46A3 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46A6 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46A8 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46AA (ALDERLAKE_P)
[09:34:44] [PASSED] 0x462A (ALDERLAKE_P)
[09:34:44] [PASSED] 0x4626 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x4628 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46B0 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46B1 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46B2 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46B3 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46C0 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46C1 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46C2 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46C3 (ALDERLAKE_P)
[09:34:44] [PASSED] 0x46D0 (ALDERLAKE_N)
[09:34:44] [PASSED] 0x46D1 (ALDERLAKE_N)
[09:34:44] [PASSED] 0x46D2 (ALDERLAKE_N)
[09:34:44] [PASSED] 0x46D3 (ALDERLAKE_N)
[09:34:44] [PASSED] 0x46D4 (ALDERLAKE_N)
[09:34:44] [PASSED] 0xA721 (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA7A1 (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA7A9 (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA7AC (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA7AD (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA720 (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA7A0 (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA7A8 (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA7AA (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA7AB (ALDERLAKE_P)
[09:34:44] [PASSED] 0xA780 (ALDERLAKE_S)
[09:34:44] [PASSED] 0xA781 (ALDERLAKE_S)
[09:34:44] [PASSED] 0xA782 (ALDERLAKE_S)
[09:34:44] [PASSED] 0xA783 (ALDERLAKE_S)
[09:34:44] [PASSED] 0xA788 (ALDERLAKE_S)
[09:34:44] [PASSED] 0xA789 (ALDERLAKE_S)
[09:34:44] [PASSED] 0xA78A (ALDERLAKE_S)
[09:34:44] [PASSED] 0xA78B (ALDERLAKE_S)
[09:34:44] [PASSED] 0x4905 (DG1)
[09:34:44] [PASSED] 0x4906 (DG1)
[09:34:44] [PASSED] 0x4907 (DG1)
[09:34:44] [PASSED] 0x4908 (DG1)
[09:34:44] [PASSED] 0x4909 (DG1)
[09:34:44] [PASSED] 0x56C0 (DG2)
[09:34:44] [PASSED] 0x56C2 (DG2)
[09:34:44] [PASSED] 0x56C1 (DG2)
[09:34:44] [PASSED] 0x7D51 (METEORLAKE)
[09:34:44] [PASSED] 0x7DD1 (METEORLAKE)
[09:34:44] [PASSED] 0x7D41 (METEORLAKE)
[09:34:44] [PASSED] 0x7D67 (METEORLAKE)
[09:34:44] [PASSED] 0xB640 (METEORLAKE)
[09:34:44] [PASSED] 0x56A0 (DG2)
[09:34:44] [PASSED] 0x56A1 (DG2)
[09:34:44] [PASSED] 0x56A2 (DG2)
[09:34:44] [PASSED] 0x56BE (DG2)
[09:34:44] [PASSED] 0x56BF (DG2)
[09:34:44] [PASSED] 0x5690 (DG2)
[09:34:44] [PASSED] 0x5691 (DG2)
[09:34:44] [PASSED] 0x5692 (DG2)
[09:34:44] [PASSED] 0x56A5 (DG2)
[09:34:44] [PASSED] 0x56A6 (DG2)
[09:34:44] [PASSED] 0x56B0 (DG2)
[09:34:44] [PASSED] 0x56B1 (DG2)
[09:34:44] [PASSED] 0x56BA (DG2)
[09:34:44] [PASSED] 0x56BB (DG2)
[09:34:44] [PASSED] 0x56BC (DG2)
[09:34:44] [PASSED] 0x56BD (DG2)
[09:34:44] [PASSED] 0x5693 (DG2)
[09:34:44] [PASSED] 0x5694 (DG2)
[09:34:44] [PASSED] 0x5695 (DG2)
[09:34:44] [PASSED] 0x56A3 (DG2)
[09:34:44] [PASSED] 0x56A4 (DG2)
[09:34:44] [PASSED] 0x56B2 (DG2)
[09:34:44] [PASSED] 0x56B3 (DG2)
[09:34:44] [PASSED] 0x5696 (DG2)
[09:34:44] [PASSED] 0x5697 (DG2)
[09:34:44] [PASSED] 0xB69 (PVC)
[09:34:44] [PASSED] 0xB6E (PVC)
[09:34:44] [PASSED] 0xBD4 (PVC)
[09:34:44] [PASSED] 0xBD5 (PVC)
[09:34:44] [PASSED] 0xBD6 (PVC)
[09:34:44] [PASSED] 0xBD7 (PVC)
[09:34:44] [PASSED] 0xBD8 (PVC)
[09:34:44] [PASSED] 0xBD9 (PVC)
[09:34:44] [PASSED] 0xBDA (PVC)
[09:34:44] [PASSED] 0xBDB (PVC)
[09:34:44] [PASSED] 0xBE0 (PVC)
[09:34:44] [PASSED] 0xBE1 (PVC)
[09:34:44] [PASSED] 0xBE5 (PVC)
[09:34:44] [PASSED] 0x7D40 (METEORLAKE)
[09:34:44] [PASSED] 0x7D45 (METEORLAKE)
[09:34:44] [PASSED] 0x7D55 (METEORLAKE)
[09:34:44] [PASSED] 0x7D60 (METEORLAKE)
[09:34:44] [PASSED] 0x7DD5 (METEORLAKE)
[09:34:44] [PASSED] 0x6420 (LUNARLAKE)
[09:34:44] [PASSED] 0x64A0 (LUNARLAKE)
[09:34:44] [PASSED] 0x64B0 (LUNARLAKE)
[09:34:44] [PASSED] 0xE202 (BATTLEMAGE)
[09:34:44] [PASSED] 0xE209 (BATTLEMAGE)
[09:34:44] [PASSED] 0xE20B (BATTLEMAGE)
[09:34:44] [PASSED] 0xE20C (BATTLEMAGE)
[09:34:44] [PASSED] 0xE20D (BATTLEMAGE)
[09:34:44] [PASSED] 0xE210 (BATTLEMAGE)
[09:34:44] [PASSED] 0xE211 (BATTLEMAGE)
[09:34:44] [PASSED] 0xE212 (BATTLEMAGE)
[09:34:44] [PASSED] 0xE216 (BATTLEMAGE)
[09:34:44] [PASSED] 0xE220 (BATTLEMAGE)
[09:34:44] [PASSED] 0xE221 (BATTLEMAGE)
[09:34:44] [PASSED] 0xE222 (BATTLEMAGE)
[09:34:44] [PASSED] 0xE223 (BATTLEMAGE)
[09:34:44] [PASSED] 0xB080 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB081 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB082 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB083 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB084 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB085 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB086 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB087 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB08F (PANTHERLAKE)
[09:34:44] [PASSED] 0xB090 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB0A0 (PANTHERLAKE)
[09:34:44] [PASSED] 0xB0B0 (PANTHERLAKE)
[09:34:44] [PASSED] 0xFD80 (PANTHERLAKE)
[09:34:44] [PASSED] 0xFD81 (PANTHERLAKE)
[09:34:44] [PASSED] 0xD740 (NOVALAKE_S)
[09:34:44] [PASSED] 0xD741 (NOVALAKE_S)
[09:34:44] [PASSED] 0xD742 (NOVALAKE_S)
[09:34:44] [PASSED] 0xD743 (NOVALAKE_S)
[09:34:44] [PASSED] 0xD744 (NOVALAKE_S)
[09:34:44] [PASSED] 0xD745 (NOVALAKE_S)
[09:34:44] [PASSED] 0x674C (CRESCENTISLAND)
[09:34:44] [PASSED] 0xD750 (NOVALAKE_P)
[09:34:44] [PASSED] 0xD751 (NOVALAKE_P)
[09:34:44] [PASSED] 0xD752 (NOVALAKE_P)
[09:34:44] [PASSED] 0xD753 (NOVALAKE_P)
[09:34:44] [PASSED] 0xD754 (NOVALAKE_P)
[09:34:44] [PASSED] 0xD755 (NOVALAKE_P)
[09:34:44] [PASSED] 0xD756 (NOVALAKE_P)
[09:34:44] [PASSED] 0xD757 (NOVALAKE_P)
[09:34:44] [PASSED] 0xD75F (NOVALAKE_P)
[09:34:44] =============== [PASSED] check_platform_desc ===============
[09:34:44] ===================== [PASSED] xe_pci ======================
[09:34:44] =================== xe_rtp (2 subtests) ====================
[09:34:44] =============== xe_rtp_process_to_sr_tests  ================
[09:34:44] [PASSED] coalesce-same-reg
[09:34:44] [PASSED] no-match-no-add
[09:34:44] [PASSED] match-or
[09:34:44] [PASSED] match-or-xfail
[09:34:44] [PASSED] no-match-no-add-multiple-rules
[09:34:44] [PASSED] two-regs-two-entries
[09:34:44] [PASSED] clr-one-set-other
[09:34:44] [PASSED] set-field
[09:34:44] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[09:34:44] [PASSED] conflict-not-disjoint
[09:34:44] [PASSED] conflict-reg-type
[09:34:44] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[09:34:44] ================== xe_rtp_process_tests  ===================
[09:34:44] [PASSED] active1
[09:34:44] [PASSED] active2
[09:34:44] [PASSED] active-inactive
[09:34:44] [PASSED] inactive-active
[09:34:44] [PASSED] inactive-1st_or_active-inactive
[09:34:44] [PASSED] inactive-2nd_or_active-inactive
[09:34:44] [PASSED] inactive-last_or_active-inactive
[09:34:44] [PASSED] inactive-no_or_active-inactive
[09:34:44] ============== [PASSED] xe_rtp_process_tests ===============
[09:34:44] ===================== [PASSED] xe_rtp ======================
[09:34:44] ==================== xe_wa (1 subtest) =====================
[09:34:44] ======================== xe_wa_gt  =========================
[09:34:44] [PASSED] TIGERLAKE B0
[09:34:44] [PASSED] DG1 A0
[09:34:44] [PASSED] DG1 B0
[09:34:44] [PASSED] ALDERLAKE_S A0
[09:34:44] [PASSED] ALDERLAKE_S B0
[09:34:44] [PASSED] ALDERLAKE_S C0
[09:34:44] [PASSED] ALDERLAKE_S D0
[09:34:44] [PASSED] ALDERLAKE_P A0
[09:34:44] [PASSED] ALDERLAKE_P B0
[09:34:44] [PASSED] ALDERLAKE_P C0
[09:34:44] [PASSED] ALDERLAKE_S RPLS D0
[09:34:44] [PASSED] ALDERLAKE_P RPLU E0
[09:34:44] [PASSED] DG2 G10 C0
[09:34:44] [PASSED] DG2 G11 B1
[09:34:44] [PASSED] DG2 G12 A1
[09:34:44] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:34:44] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[09:34:44] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[09:34:44] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[09:34:44] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[09:34:44] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[09:34:44] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[09:34:44] ==================== [PASSED] xe_wa_gt =====================
[09:34:44] ====================== [PASSED] xe_wa ======================
[09:34:44] ============================================================
[09:34:44] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[09:34:44] Elapsed time: 42.572s total, 4.329s configuring, 37.577s building, 0.616s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[09:34:44] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:34:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[09:35:15] Starting KUnit Kernel (1/1)...
[09:35:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:35:15] ============ drm_test_pick_cmdline (2 subtests) ============
[09:35:15] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[09:35:15] =============== drm_test_pick_cmdline_named  ===============
[09:35:15] [PASSED] NTSC
[09:35:15] [PASSED] NTSC-J
[09:35:15] [PASSED] PAL
[09:35:15] [PASSED] PAL-M
[09:35:15] =========== [PASSED] drm_test_pick_cmdline_named ===========
[09:35:15] ============== [PASSED] drm_test_pick_cmdline ==============
[09:35:15] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[09:35:15] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[09:35:15] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[09:35:15] =========== drm_validate_clone_mode (2 subtests) ===========
[09:35:15] ============== drm_test_check_in_clone_mode  ===============
[09:35:15] [PASSED] in_clone_mode
[09:35:15] [PASSED] not_in_clone_mode
[09:35:15] ========== [PASSED] drm_test_check_in_clone_mode ===========
[09:35:15] =============== drm_test_check_valid_clones  ===============
[09:35:15] [PASSED] not_in_clone_mode
[09:35:15] [PASSED] valid_clone
[09:35:15] [PASSED] invalid_clone
[09:35:15] =========== [PASSED] drm_test_check_valid_clones ===========
[09:35:15] ============= [PASSED] drm_validate_clone_mode =============
[09:35:15] ============= drm_validate_modeset (1 subtest) =============
[09:35:15] [PASSED] drm_test_check_connector_changed_modeset
[09:35:15] ============== [PASSED] drm_validate_modeset ===============
[09:35:15] ====== drm_test_bridge_get_current_state (2 subtests) ======
[09:35:15] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[09:35:15] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[09:35:15] ======== [PASSED] drm_test_bridge_get_current_state ========
[09:35:15] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[09:35:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[09:35:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[09:35:15] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[09:35:15] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[09:35:15] ============== drm_bridge_alloc (2 subtests) ===============
[09:35:15] [PASSED] drm_test_drm_bridge_alloc_basic
[09:35:15] [PASSED] drm_test_drm_bridge_alloc_get_put
[09:35:15] ================ [PASSED] drm_bridge_alloc =================
[09:35:15] ============= drm_cmdline_parser (40 subtests) =============
[09:35:15] [PASSED] drm_test_cmdline_force_d_only
[09:35:15] [PASSED] drm_test_cmdline_force_D_only_dvi
[09:35:15] [PASSED] drm_test_cmdline_force_D_only_hdmi
[09:35:15] [PASSED] drm_test_cmdline_force_D_only_not_digital
[09:35:15] [PASSED] drm_test_cmdline_force_e_only
[09:35:15] [PASSED] drm_test_cmdline_res
[09:35:15] [PASSED] drm_test_cmdline_res_vesa
[09:35:15] [PASSED] drm_test_cmdline_res_vesa_rblank
[09:35:15] [PASSED] drm_test_cmdline_res_rblank
[09:35:15] [PASSED] drm_test_cmdline_res_bpp
[09:35:15] [PASSED] drm_test_cmdline_res_refresh
[09:35:15] [PASSED] drm_test_cmdline_res_bpp_refresh
[09:35:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[09:35:15] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[09:35:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[09:35:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[09:35:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[09:35:15] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[09:35:15] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[09:35:15] [PASSED] drm_test_cmdline_res_margins_force_on
[09:35:15] [PASSED] drm_test_cmdline_res_vesa_margins
[09:35:15] [PASSED] drm_test_cmdline_name
[09:35:15] [PASSED] drm_test_cmdline_name_bpp
[09:35:15] [PASSED] drm_test_cmdline_name_option
[09:35:15] [PASSED] drm_test_cmdline_name_bpp_option
[09:35:15] [PASSED] drm_test_cmdline_rotate_0
[09:35:15] [PASSED] drm_test_cmdline_rotate_90
[09:35:15] [PASSED] drm_test_cmdline_rotate_180
[09:35:15] [PASSED] drm_test_cmdline_rotate_270
[09:35:15] [PASSED] drm_test_cmdline_hmirror
[09:35:15] [PASSED] drm_test_cmdline_vmirror
[09:35:15] [PASSED] drm_test_cmdline_margin_options
[09:35:15] [PASSED] drm_test_cmdline_multiple_options
[09:35:15] [PASSED] drm_test_cmdline_bpp_extra_and_option
[09:35:15] [PASSED] drm_test_cmdline_extra_and_option
[09:35:15] [PASSED] drm_test_cmdline_freestanding_options
[09:35:15] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[09:35:15] [PASSED] drm_test_cmdline_panel_orientation
[09:35:15] ================ drm_test_cmdline_invalid  =================
[09:35:15] [PASSED] margin_only
[09:35:15] [PASSED] interlace_only
[09:35:15] [PASSED] res_missing_x
[09:35:15] [PASSED] res_missing_y
[09:35:15] [PASSED] res_bad_y
[09:35:15] [PASSED] res_missing_y_bpp
[09:35:15] [PASSED] res_bad_bpp
[09:35:15] [PASSED] res_bad_refresh
[09:35:15] [PASSED] res_bpp_refresh_force_on_off
[09:35:15] [PASSED] res_invalid_mode
[09:35:15] [PASSED] res_bpp_wrong_place_mode
[09:35:15] [PASSED] name_bpp_refresh
[09:35:15] [PASSED] name_refresh
[09:35:15] [PASSED] name_refresh_wrong_mode
[09:35:15] [PASSED] name_refresh_invalid_mode
[09:35:15] [PASSED] rotate_multiple
[09:35:15] [PASSED] rotate_invalid_val
[09:35:15] [PASSED] rotate_truncated
[09:35:15] [PASSED] invalid_option
[09:35:15] [PASSED] invalid_tv_option
[09:35:15] [PASSED] truncated_tv_option
[09:35:15] ============ [PASSED] drm_test_cmdline_invalid =============
[09:35:15] =============== drm_test_cmdline_tv_options  ===============
[09:35:15] [PASSED] NTSC
[09:35:15] [PASSED] NTSC_443
[09:35:15] [PASSED] NTSC_J
[09:35:15] [PASSED] PAL
[09:35:15] [PASSED] PAL_M
[09:35:15] [PASSED] PAL_N
[09:35:15] [PASSED] SECAM
[09:35:15] [PASSED] MONO_525
[09:35:15] [PASSED] MONO_625
[09:35:15] =========== [PASSED] drm_test_cmdline_tv_options ===========
[09:35:15] =============== [PASSED] drm_cmdline_parser ================
[09:35:15] ========== drmm_connector_hdmi_init (20 subtests) ==========
[09:35:15] [PASSED] drm_test_connector_hdmi_init_valid
[09:35:15] [PASSED] drm_test_connector_hdmi_init_bpc_8
[09:35:15] [PASSED] drm_test_connector_hdmi_init_bpc_10
[09:35:15] [PASSED] drm_test_connector_hdmi_init_bpc_12
[09:35:15] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[09:35:15] [PASSED] drm_test_connector_hdmi_init_bpc_null
[09:35:15] [PASSED] drm_test_connector_hdmi_init_formats_empty
[09:35:15] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[09:35:15] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[09:35:15] [PASSED] supported_formats=0x9 yuv420_allowed=1
[09:35:15] [PASSED] supported_formats=0x9 yuv420_allowed=0
[09:35:15] [PASSED] supported_formats=0x3 yuv420_allowed=1
[09:35:15] [PASSED] supported_formats=0x3 yuv420_allowed=0
[09:35:15] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[09:35:15] [PASSED] drm_test_connector_hdmi_init_null_ddc
[09:35:15] [PASSED] drm_test_connector_hdmi_init_null_product
[09:35:15] [PASSED] drm_test_connector_hdmi_init_null_vendor
[09:35:15] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[09:35:15] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[09:35:15] [PASSED] drm_test_connector_hdmi_init_product_valid
[09:35:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[09:35:15] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[09:35:15] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[09:35:15] ========= drm_test_connector_hdmi_init_type_valid  =========
[09:35:15] [PASSED] HDMI-A
[09:35:15] [PASSED] HDMI-B
[09:35:15] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[09:35:15] ======== drm_test_connector_hdmi_init_type_invalid  ========
[09:35:15] [PASSED] Unknown
[09:35:15] [PASSED] VGA
[09:35:15] [PASSED] DVI-I
[09:35:15] [PASSED] DVI-D
[09:35:15] [PASSED] DVI-A
[09:35:15] [PASSED] Composite
[09:35:15] [PASSED] SVIDEO
[09:35:15] [PASSED] LVDS
[09:35:15] [PASSED] Component
[09:35:15] [PASSED] DIN
[09:35:15] [PASSED] DP
[09:35:15] [PASSED] TV
[09:35:15] [PASSED] eDP
[09:35:15] [PASSED] Virtual
[09:35:15] [PASSED] DSI
[09:35:15] [PASSED] DPI
[09:35:15] [PASSED] Writeback
[09:35:15] [PASSED] SPI
[09:35:15] [PASSED] USB
[09:35:15] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[09:35:15] ============ [PASSED] drmm_connector_hdmi_init =============
[09:35:15] ============= drmm_connector_init (3 subtests) =============
[09:35:15] [PASSED] drm_test_drmm_connector_init
[09:35:15] [PASSED] drm_test_drmm_connector_init_null_ddc
[09:35:15] ========= drm_test_drmm_connector_init_type_valid  =========
[09:35:15] [PASSED] Unknown
[09:35:15] [PASSED] VGA
[09:35:15] [PASSED] DVI-I
[09:35:15] [PASSED] DVI-D
[09:35:15] [PASSED] DVI-A
[09:35:15] [PASSED] Composite
[09:35:15] [PASSED] SVIDEO
[09:35:15] [PASSED] LVDS
[09:35:15] [PASSED] Component
[09:35:15] [PASSED] DIN
[09:35:15] [PASSED] DP
[09:35:15] [PASSED] HDMI-A
[09:35:15] [PASSED] HDMI-B
[09:35:15] [PASSED] TV
[09:35:15] [PASSED] eDP
[09:35:15] [PASSED] Virtual
[09:35:15] [PASSED] DSI
[09:35:15] [PASSED] DPI
[09:35:15] [PASSED] Writeback
[09:35:15] [PASSED] SPI
[09:35:15] [PASSED] USB
[09:35:15] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[09:35:15] =============== [PASSED] drmm_connector_init ===============
[09:35:15] ========= drm_connector_dynamic_init (6 subtests) ==========
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_init
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_init_properties
[09:35:15] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[09:35:15] [PASSED] Unknown
[09:35:15] [PASSED] VGA
[09:35:15] [PASSED] DVI-I
[09:35:15] [PASSED] DVI-D
[09:35:15] [PASSED] DVI-A
[09:35:15] [PASSED] Composite
[09:35:15] [PASSED] SVIDEO
[09:35:15] [PASSED] LVDS
[09:35:15] [PASSED] Component
[09:35:15] [PASSED] DIN
[09:35:15] [PASSED] DP
[09:35:15] [PASSED] HDMI-A
[09:35:15] [PASSED] HDMI-B
[09:35:15] [PASSED] TV
[09:35:15] [PASSED] eDP
[09:35:15] [PASSED] Virtual
[09:35:15] [PASSED] DSI
[09:35:15] [PASSED] DPI
[09:35:15] [PASSED] Writeback
[09:35:15] [PASSED] SPI
[09:35:15] [PASSED] USB
[09:35:15] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[09:35:15] ======== drm_test_drm_connector_dynamic_init_name  =========
[09:35:15] [PASSED] Unknown
[09:35:15] [PASSED] VGA
[09:35:15] [PASSED] DVI-I
[09:35:15] [PASSED] DVI-D
[09:35:15] [PASSED] DVI-A
[09:35:15] [PASSED] Composite
[09:35:15] [PASSED] SVIDEO
[09:35:15] [PASSED] LVDS
[09:35:15] [PASSED] Component
[09:35:15] [PASSED] DIN
[09:35:15] [PASSED] DP
[09:35:15] [PASSED] HDMI-A
[09:35:15] [PASSED] HDMI-B
[09:35:15] [PASSED] TV
[09:35:15] [PASSED] eDP
[09:35:15] [PASSED] Virtual
[09:35:15] [PASSED] DSI
[09:35:15] [PASSED] DPI
[09:35:15] [PASSED] Writeback
[09:35:15] [PASSED] SPI
[09:35:15] [PASSED] USB
[09:35:15] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[09:35:15] =========== [PASSED] drm_connector_dynamic_init ============
[09:35:15] ==== drm_connector_dynamic_register_early (4 subtests) =====
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[09:35:15] ====== [PASSED] drm_connector_dynamic_register_early =======
[09:35:15] ======= drm_connector_dynamic_register (7 subtests) ========
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[09:35:15] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[09:35:15] ========= [PASSED] drm_connector_dynamic_register ==========
[09:35:15] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[09:35:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[09:35:15] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[09:35:15] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[09:35:15] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[09:35:15] ========== drm_test_get_tv_mode_from_name_valid  ===========
[09:35:15] [PASSED] NTSC
[09:35:15] [PASSED] NTSC-443
[09:35:15] [PASSED] NTSC-J
[09:35:15] [PASSED] PAL
[09:35:15] [PASSED] PAL-M
[09:35:15] [PASSED] PAL-N
[09:35:15] [PASSED] SECAM
[09:35:15] [PASSED] Mono
[09:35:15] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[09:35:15] [PASSED] drm_test_get_tv_mode_from_name_truncated
[09:35:15] ============ [PASSED] drm_get_tv_mode_from_name ============
[09:35:15] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[09:35:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[09:35:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[09:35:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[09:35:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[09:35:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[09:35:15] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[09:35:15] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[09:35:15] [PASSED] VIC 96
[09:35:15] [PASSED] VIC 97
[09:35:15] [PASSED] VIC 101
[09:35:15] [PASSED] VIC 102
[09:35:15] [PASSED] VIC 106
[09:35:15] [PASSED] VIC 107
[09:35:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[09:35:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[09:35:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[09:35:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[09:35:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[09:35:15] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[09:35:15] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[09:35:15] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[09:35:15] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[09:35:15] [PASSED] Automatic
[09:35:15] [PASSED] Full
[09:35:15] [PASSED] Limited 16:235
[09:35:15] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[09:35:15] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[09:35:15] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[09:35:15] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[09:35:15] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[09:35:15] [PASSED] RGB
[09:35:15] [PASSED] YUV 4:2:0
[09:35:15] [PASSED] YUV 4:2:2
[09:35:15] [PASSED] YUV 4:4:4
[09:35:15] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[09:35:15] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[09:35:15] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[09:35:15] ============= drm_damage_helper (21 subtests) ==============
[09:35:15] [PASSED] drm_test_damage_iter_no_damage
[09:35:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[09:35:15] [PASSED] drm_test_damage_iter_no_damage_src_moved
[09:35:15] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[09:35:15] [PASSED] drm_test_damage_iter_no_damage_not_visible
[09:35:15] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[09:35:15] [PASSED] drm_test_damage_iter_no_damage_no_fb
[09:35:15] [PASSED] drm_test_damage_iter_simple_damage
[09:35:15] [PASSED] drm_test_damage_iter_single_damage
[09:35:15] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[09:35:15] [PASSED] drm_test_damage_iter_single_damage_outside_src
[09:35:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[09:35:15] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[09:35:15] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[09:35:15] [PASSED] drm_test_damage_iter_single_damage_src_moved
[09:35:15] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[09:35:15] [PASSED] drm_test_damage_iter_damage
[09:35:15] [PASSED] drm_test_damage_iter_damage_one_intersect
[09:35:15] [PASSED] drm_test_damage_iter_damage_one_outside
[09:35:15] [PASSED] drm_test_damage_iter_damage_src_moved
[09:35:15] [PASSED] drm_test_damage_iter_damage_not_visible
[09:35:15] ================ [PASSED] drm_damage_helper ================
[09:35:15] ============== drm_dp_mst_helper (3 subtests) ==============
[09:35:15] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[09:35:15] [PASSED] Clock 154000 BPP 30 DSC disabled
[09:35:15] [PASSED] Clock 234000 BPP 30 DSC disabled
[09:35:15] [PASSED] Clock 297000 BPP 24 DSC disabled
[09:35:15] [PASSED] Clock 332880 BPP 24 DSC enabled
[09:35:15] [PASSED] Clock 324540 BPP 24 DSC enabled
[09:35:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[09:35:15] ============== drm_test_dp_mst_calc_pbn_div  ===============
[09:35:15] [PASSED] Link rate 2000000 lane count 4
[09:35:15] [PASSED] Link rate 2000000 lane count 2
[09:35:15] [PASSED] Link rate 2000000 lane count 1
[09:35:15] [PASSED] Link rate 1350000 lane count 4
[09:35:15] [PASSED] Link rate 1350000 lane count 2
[09:35:15] [PASSED] Link rate 1350000 lane count 1
[09:35:15] [PASSED] Link rate 1000000 lane count 4
[09:35:15] [PASSED] Link rate 1000000 lane count 2
[09:35:15] [PASSED] Link rate 1000000 lane count 1
[09:35:15] [PASSED] Link rate 810000 lane count 4
[09:35:15] [PASSED] Link rate 810000 lane count 2
[09:35:15] [PASSED] Link rate 810000 lane count 1
[09:35:15] [PASSED] Link rate 540000 lane count 4
[09:35:15] [PASSED] Link rate 540000 lane count 2
[09:35:15] [PASSED] Link rate 540000 lane count 1
[09:35:15] [PASSED] Link rate 270000 lane count 4
[09:35:15] [PASSED] Link rate 270000 lane count 2
[09:35:15] [PASSED] Link rate 270000 lane count 1
[09:35:15] [PASSED] Link rate 162000 lane count 4
[09:35:15] [PASSED] Link rate 162000 lane count 2
[09:35:15] [PASSED] Link rate 162000 lane count 1
[09:35:15] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[09:35:15] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[09:35:15] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[09:35:15] [PASSED] DP_POWER_UP_PHY with port number
[09:35:15] [PASSED] DP_POWER_DOWN_PHY with port number
[09:35:15] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[09:35:15] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[09:35:15] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[09:35:15] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[09:35:15] [PASSED] DP_QUERY_PAYLOAD with port number
[09:35:15] [PASSED] DP_QUERY_PAYLOAD with VCPI
[09:35:15] [PASSED] DP_REMOTE_DPCD_READ with port number
[09:35:15] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[09:35:15] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[09:35:15] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[09:35:15] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[09:35:15] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[09:35:15] [PASSED] DP_REMOTE_I2C_READ with port number
[09:35:15] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[09:35:15] [PASSED] DP_REMOTE_I2C_READ with transactions array
[09:35:15] [PASSED] DP_REMOTE_I2C_WRITE with port number
[09:35:15] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[09:35:15] [PASSED] DP_REMOTE_I2C_WRITE with data array
[09:35:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[09:35:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[09:35:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[09:35:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[09:35:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[09:35:15] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[09:35:15] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[09:35:15] ================ [PASSED] drm_dp_mst_helper ================
[09:35:15] ================== drm_exec (7 subtests) ===================
[09:35:15] [PASSED] sanitycheck
[09:35:15] [PASSED] test_lock
[09:35:15] [PASSED] test_lock_unlock
[09:35:15] [PASSED] test_duplicates
[09:35:15] [PASSED] test_prepare
[09:35:15] [PASSED] test_prepare_array
[09:35:15] [PASSED] test_multiple_loops
[09:35:15] ==================== [PASSED] drm_exec =====================
[09:35:15] =========== drm_format_helper_test (17 subtests) ===========
[09:35:15] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[09:35:15] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[09:35:15] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[09:35:15] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[09:35:15] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[09:35:15] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[09:35:15] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[09:35:15] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[09:35:15] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[09:35:15] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[09:35:15] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[09:35:15] ============== drm_test_fb_xrgb8888_to_mono  ===============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[09:35:15] ==================== drm_test_fb_swab  =====================
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ================ [PASSED] drm_test_fb_swab =================
[09:35:15] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[09:35:15] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[09:35:15] [PASSED] single_pixel_source_buffer
[09:35:15] [PASSED] single_pixel_clip_rectangle
[09:35:15] [PASSED] well_known_colors
[09:35:15] [PASSED] destination_pitch
[09:35:15] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[09:35:15] ================= drm_test_fb_clip_offset  =================
[09:35:15] [PASSED] pass through
[09:35:15] [PASSED] horizontal offset
[09:35:15] [PASSED] vertical offset
[09:35:15] [PASSED] horizontal and vertical offset
[09:35:15] [PASSED] horizontal offset (custom pitch)
[09:35:15] [PASSED] vertical offset (custom pitch)
[09:35:15] [PASSED] horizontal and vertical offset (custom pitch)
[09:35:15] ============= [PASSED] drm_test_fb_clip_offset =============
[09:35:15] =================== drm_test_fb_memcpy  ====================
[09:35:15] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[09:35:15] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[09:35:15] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[09:35:15] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[09:35:15] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[09:35:15] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[09:35:15] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[09:35:15] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[09:35:15] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[09:35:15] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[09:35:15] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[09:35:15] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[09:35:15] =============== [PASSED] drm_test_fb_memcpy ================
[09:35:15] ============= [PASSED] drm_format_helper_test ==============
[09:35:15] ================= drm_format (18 subtests) =================
[09:35:15] [PASSED] drm_test_format_block_width_invalid
[09:35:15] [PASSED] drm_test_format_block_width_one_plane
[09:35:15] [PASSED] drm_test_format_block_width_two_plane
[09:35:15] [PASSED] drm_test_format_block_width_three_plane
[09:35:15] [PASSED] drm_test_format_block_width_tiled
[09:35:15] [PASSED] drm_test_format_block_height_invalid
[09:35:15] [PASSED] drm_test_format_block_height_one_plane
[09:35:15] [PASSED] drm_test_format_block_height_two_plane
[09:35:15] [PASSED] drm_test_format_block_height_three_plane
[09:35:15] [PASSED] drm_test_format_block_height_tiled
[09:35:15] [PASSED] drm_test_format_min_pitch_invalid
[09:35:15] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[09:35:15] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[09:35:15] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[09:35:15] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[09:35:15] [PASSED] drm_test_format_min_pitch_two_plane
[09:35:15] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[09:35:15] [PASSED] drm_test_format_min_pitch_tiled
[09:35:15] =================== [PASSED] drm_format ====================
[09:35:15] ============== drm_framebuffer (10 subtests) ===============
[09:35:15] ========== drm_test_framebuffer_check_src_coords  ==========
[09:35:15] [PASSED] Success: source fits into fb
[09:35:15] [PASSED] Fail: overflowing fb with x-axis coordinate
[09:35:15] [PASSED] Fail: overflowing fb with y-axis coordinate
[09:35:15] [PASSED] Fail: overflowing fb with source width
[09:35:15] [PASSED] Fail: overflowing fb with source height
[09:35:15] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[09:35:15] [PASSED] drm_test_framebuffer_cleanup
[09:35:15] =============== drm_test_framebuffer_create  ===============
[09:35:15] [PASSED] ABGR8888 normal sizes
[09:35:15] [PASSED] ABGR8888 max sizes
[09:35:15] [PASSED] ABGR8888 pitch greater than min required
[09:35:15] [PASSED] ABGR8888 pitch less than min required
[09:35:15] [PASSED] ABGR8888 Invalid width
[09:35:15] [PASSED] ABGR8888 Invalid buffer handle
[09:35:15] [PASSED] No pixel format
[09:35:15] [PASSED] ABGR8888 Width 0
[09:35:15] [PASSED] ABGR8888 Height 0
[09:35:15] [PASSED] ABGR8888 Out of bound height * pitch combination
[09:35:15] [PASSED] ABGR8888 Large buffer offset
[09:35:15] [PASSED] ABGR8888 Buffer offset for inexistent plane
[09:35:15] [PASSED] ABGR8888 Invalid flag
[09:35:15] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[09:35:15] [PASSED] ABGR8888 Valid buffer modifier
[09:35:15] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[09:35:15] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[09:35:15] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[09:35:15] [PASSED] NV12 Normal sizes
[09:35:15] [PASSED] NV12 Max sizes
[09:35:15] [PASSED] NV12 Invalid pitch
[09:35:15] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[09:35:15] [PASSED] NV12 different  modifier per-plane
[09:35:15] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[09:35:15] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[09:35:15] [PASSED] NV12 Modifier for inexistent plane
[09:35:15] [PASSED] NV12 Handle for inexistent plane
[09:35:15] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[09:35:15] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[09:35:15] [PASSED] YVU420 Normal sizes
[09:35:15] [PASSED] YVU420 Max sizes
[09:35:15] [PASSED] YVU420 Invalid pitch
[09:35:15] [PASSED] YVU420 Different pitches
[09:35:15] [PASSED] YVU420 Different buffer offsets/pitches
[09:35:15] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[09:35:15] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[09:35:15] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[09:35:15] [PASSED] YVU420 Valid modifier
[09:35:15] [PASSED] YVU420 Different modifiers per plane
[09:35:15] [PASSED] YVU420 Modifier for inexistent plane
[09:35:15] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[09:35:15] [PASSED] X0L2 Normal sizes
[09:35:15] [PASSED] X0L2 Max sizes
[09:35:15] [PASSED] X0L2 Invalid pitch
[09:35:15] [PASSED] X0L2 Pitch greater than minimum required
[09:35:15] [PASSED] X0L2 Handle for inexistent plane
[09:35:15] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[09:35:15] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[09:35:15] [PASSED] X0L2 Valid modifier
[09:35:15] [PASSED] X0L2 Modifier for inexistent plane
[09:35:15] =========== [PASSED] drm_test_framebuffer_create ===========
[09:35:15] [PASSED] drm_test_framebuffer_free
[09:35:15] [PASSED] drm_test_framebuffer_init
[09:35:15] [PASSED] drm_test_framebuffer_init_bad_format
[09:35:15] [PASSED] drm_test_framebuffer_init_dev_mismatch
[09:35:15] [PASSED] drm_test_framebuffer_lookup
[09:35:15] [PASSED] drm_test_framebuffer_lookup_inexistent
[09:35:15] [PASSED] drm_test_framebuffer_modifiers_not_supported
[09:35:15] ================= [PASSED] drm_framebuffer =================
[09:35:15] ================ drm_gem_shmem (8 subtests) ================
[09:35:15] [PASSED] drm_gem_shmem_test_obj_create
[09:35:15] [PASSED] drm_gem_shmem_test_obj_create_private
[09:35:15] [PASSED] drm_gem_shmem_test_pin_pages
[09:35:15] [PASSED] drm_gem_shmem_test_vmap
[09:35:15] [PASSED] drm_gem_shmem_test_get_sg_table
[09:35:15] [PASSED] drm_gem_shmem_test_get_pages_sgt
[09:35:15] [PASSED] drm_gem_shmem_test_madvise
[09:35:15] [PASSED] drm_gem_shmem_test_purge
[09:35:15] ================== [PASSED] drm_gem_shmem ==================
[09:35:15] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[09:35:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[09:35:15] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[09:35:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[09:35:15] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[09:35:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[09:35:15] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[09:35:15] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[09:35:15] [PASSED] Automatic
[09:35:15] [PASSED] Full
[09:35:15] [PASSED] Limited 16:235
[09:35:15] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[09:35:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[09:35:15] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[09:35:15] [PASSED] drm_test_check_disable_connector
[09:35:15] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[09:35:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[09:35:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[09:35:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[09:35:15] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[09:35:15] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[09:35:15] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[09:35:15] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[09:35:15] [PASSED] drm_test_check_output_bpc_dvi
[09:35:15] [PASSED] drm_test_check_output_bpc_format_vic_1
[09:35:15] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[09:35:15] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[09:35:15] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[09:35:15] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[09:35:15] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[09:35:15] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[09:35:15] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[09:35:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[09:35:15] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[09:35:15] [PASSED] drm_test_check_broadcast_rgb_value
[09:35:15] [PASSED] drm_test_check_bpc_8_value
[09:35:15] [PASSED] drm_test_check_bpc_10_value
[09:35:15] [PASSED] drm_test_check_bpc_12_value
[09:35:15] [PASSED] drm_test_check_format_value
[09:35:15] [PASSED] drm_test_check_tmds_char_value
[09:35:15] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[09:35:15] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[09:35:15] [PASSED] drm_test_check_mode_valid
[09:35:15] [PASSED] drm_test_check_mode_valid_reject
[09:35:15] [PASSED] drm_test_check_mode_valid_reject_rate
[09:35:15] [PASSED] drm_test_check_mode_valid_reject_max_clock
[09:35:15] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[09:35:15] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[09:35:15] [PASSED] drm_test_check_infoframes
[09:35:15] [PASSED] drm_test_check_reject_avi_infoframe
[09:35:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[09:35:15] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[09:35:15] [PASSED] drm_test_check_reject_audio_infoframe
[09:35:15] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[09:35:15] ================= drm_managed (2 subtests) =================
[09:35:15] [PASSED] drm_test_managed_release_action
[09:35:15] [PASSED] drm_test_managed_run_action
[09:35:15] =================== [PASSED] drm_managed ===================
[09:35:15] =================== drm_mm (6 subtests) ====================
[09:35:15] [PASSED] drm_test_mm_init
[09:35:15] [PASSED] drm_test_mm_debug
[09:35:15] [PASSED] drm_test_mm_align32
[09:35:15] [PASSED] drm_test_mm_align64
[09:35:15] [PASSED] drm_test_mm_lowest
[09:35:15] [PASSED] drm_test_mm_highest
[09:35:15] ===================== [PASSED] drm_mm ======================
[09:35:15] ============= drm_modes_analog_tv (5 subtests) =============
[09:35:15] [PASSED] drm_test_modes_analog_tv_mono_576i
[09:35:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[09:35:15] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[09:35:15] [PASSED] drm_test_modes_analog_tv_pal_576i
[09:35:15] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[09:35:15] =============== [PASSED] drm_modes_analog_tv ===============
[09:35:15] ============== drm_plane_helper (2 subtests) ===============
[09:35:15] =============== drm_test_check_plane_state  ================
[09:35:15] [PASSED] clipping_simple
[09:35:15] [PASSED] clipping_rotate_reflect
[09:35:15] [PASSED] positioning_simple
[09:35:15] [PASSED] upscaling
[09:35:15] [PASSED] downscaling
[09:35:15] [PASSED] rounding1
[09:35:15] [PASSED] rounding2
[09:35:15] [PASSED] rounding3
[09:35:15] [PASSED] rounding4
[09:35:15] =========== [PASSED] drm_test_check_plane_state ============
[09:35:15] =========== drm_test_check_invalid_plane_state  ============
[09:35:15] [PASSED] positioning_invalid
[09:35:15] [PASSED] upscaling_invalid
[09:35:15] [PASSED] downscaling_invalid
[09:35:15] ======= [PASSED] drm_test_check_invalid_plane_state ========
[09:35:15] ================ [PASSED] drm_plane_helper =================
[09:35:15] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[09:35:15] ====== drm_test_connector_helper_tv_get_modes_check  =======
[09:35:15] [PASSED] None
[09:35:15] [PASSED] PAL
[09:35:15] [PASSED] NTSC
[09:35:15] [PASSED] Both, NTSC Default
[09:35:15] [PASSED] Both, PAL Default
[09:35:15] [PASSED] Both, NTSC Default, with PAL on command-line
[09:35:15] [PASSED] Both, PAL Default, with NTSC on command-line
[09:35:15] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[09:35:15] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[09:35:15] ================== drm_rect (9 subtests) ===================
[09:35:15] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[09:35:15] [PASSED] drm_test_rect_clip_scaled_not_clipped
[09:35:15] [PASSED] drm_test_rect_clip_scaled_clipped
[09:35:15] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[09:35:15] ================= drm_test_rect_intersect  =================
[09:35:15] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[09:35:15] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[09:35:15] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[09:35:15] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[09:35:15] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[09:35:15] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[09:35:15] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[09:35:15] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[09:35:15] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[09:35:15] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[09:35:15] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[09:35:15] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[09:35:15] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[09:35:15] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[09:35:15] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[09:35:15] ============= [PASSED] drm_test_rect_intersect =============
[09:35:15] ================ drm_test_rect_calc_hscale  ================
[09:35:15] [PASSED] normal use
[09:35:15] [PASSED] out of max range
[09:35:15] [PASSED] out of min range
[09:35:15] [PASSED] zero dst
[09:35:15] [PASSED] negative src
[09:35:15] [PASSED] negative dst
[09:35:15] ============ [PASSED] drm_test_rect_calc_hscale ============
[09:35:15] ================ drm_test_rect_calc_vscale  ================
[09:35:15] [PASSED] normal use
[09:35:15] [PASSED] out of max range
[09:35:15] [PASSED] out of min range
[09:35:15] [PASSED] zero dst
[09:35:15] [PASSED] negative src
[09:35:15] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[09:35:15] ============ [PASSED] drm_test_rect_calc_vscale ============
[09:35:15] ================== drm_test_rect_rotate  ===================
[09:35:15] [PASSED] reflect-x
[09:35:15] [PASSED] reflect-y
[09:35:15] [PASSED] rotate-0
[09:35:15] [PASSED] rotate-90
[09:35:15] [PASSED] rotate-180
[09:35:15] [PASSED] rotate-270
[09:35:15] ============== [PASSED] drm_test_rect_rotate ===============
[09:35:15] ================ drm_test_rect_rotate_inv  =================
[09:35:15] [PASSED] reflect-x
[09:35:15] [PASSED] reflect-y
[09:35:15] [PASSED] rotate-0
[09:35:15] [PASSED] rotate-90
[09:35:15] [PASSED] rotate-180
[09:35:15] [PASSED] rotate-270
[09:35:15] ============ [PASSED] drm_test_rect_rotate_inv =============
[09:35:15] ==================== [PASSED] drm_rect =====================
[09:35:15] ============ drm_sysfb_modeset_test (1 subtest) ============
[09:35:15] ============ drm_test_sysfb_build_fourcc_list  =============
[09:35:15] [PASSED] no native formats
[09:35:15] [PASSED] XRGB8888 as native format
[09:35:15] [PASSED] remove duplicates
[09:35:15] [PASSED] convert alpha formats
[09:35:15] [PASSED] random formats
[09:35:15] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[09:35:15] ============= [PASSED] drm_sysfb_modeset_test ==============
[09:35:15] ================== drm_fixp (2 subtests) ===================
[09:35:15] [PASSED] drm_test_int2fixp
[09:35:15] [PASSED] drm_test_sm2fixp
[09:35:15] ==================== [PASSED] drm_fixp =====================
[09:35:15] ============================================================
[09:35:15] Testing complete. Ran 621 tests: passed: 621
[09:35:15] Elapsed time: 30.678s total, 1.654s configuring, 28.857s building, 0.125s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[09:35:15] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[09:35:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[09:35:26] Starting KUnit Kernel (1/1)...
[09:35:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[09:35:26] ================= ttm_device (5 subtests) ==================
[09:35:26] [PASSED] ttm_device_init_basic
[09:35:26] [PASSED] ttm_device_init_multiple
[09:35:26] [PASSED] ttm_device_fini_basic
[09:35:26] [PASSED] ttm_device_init_no_vma_man
[09:35:26] ================== ttm_device_init_pools  ==================
[09:35:26] [PASSED] No DMA allocations, no DMA32 required
[09:35:26] [PASSED] DMA allocations, DMA32 required
[09:35:26] [PASSED] No DMA allocations, DMA32 required
[09:35:26] [PASSED] DMA allocations, no DMA32 required
[09:35:26] ============== [PASSED] ttm_device_init_pools ==============
[09:35:26] =================== [PASSED] ttm_device ====================
[09:35:26] ================== ttm_pool (8 subtests) ===================
[09:35:26] ================== ttm_pool_alloc_basic  ===================
[09:35:26] [PASSED] One page
[09:35:26] [PASSED] More than one page
[09:35:26] [PASSED] Above the allocation limit
[09:35:26] [PASSED] One page, with coherent DMA mappings enabled
[09:35:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:35:26] ============== [PASSED] ttm_pool_alloc_basic ===============
[09:35:26] ============== ttm_pool_alloc_basic_dma_addr  ==============
[09:35:26] [PASSED] One page
[09:35:26] [PASSED] More than one page
[09:35:26] [PASSED] Above the allocation limit
[09:35:26] [PASSED] One page, with coherent DMA mappings enabled
[09:35:26] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[09:35:26] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[09:35:26] [PASSED] ttm_pool_alloc_order_caching_match
[09:35:26] [PASSED] ttm_pool_alloc_caching_mismatch
[09:35:26] [PASSED] ttm_pool_alloc_order_mismatch
[09:35:26] [PASSED] ttm_pool_free_dma_alloc
[09:35:26] [PASSED] ttm_pool_free_no_dma_alloc
[09:35:26] [PASSED] ttm_pool_fini_basic
[09:35:26] ==================== [PASSED] ttm_pool =====================
[09:35:26] ================ ttm_resource (8 subtests) =================
[09:35:26] ================= ttm_resource_init_basic  =================
[09:35:26] [PASSED] Init resource in TTM_PL_SYSTEM
[09:35:26] [PASSED] Init resource in TTM_PL_VRAM
[09:35:26] [PASSED] Init resource in a private placement
[09:35:26] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[09:35:26] ============= [PASSED] ttm_resource_init_basic =============
[09:35:26] [PASSED] ttm_resource_init_pinned
[09:35:26] [PASSED] ttm_resource_fini_basic
[09:35:26] [PASSED] ttm_resource_manager_init_basic
[09:35:26] [PASSED] ttm_resource_manager_usage_basic
[09:35:26] [PASSED] ttm_resource_manager_set_used_basic
[09:35:26] [PASSED] ttm_sys_man_alloc_basic
[09:35:26] [PASSED] ttm_sys_man_free_basic
[09:35:26] ================== [PASSED] ttm_resource ===================
[09:35:26] =================== ttm_tt (15 subtests) ===================
[09:35:26] ==================== ttm_tt_init_basic  ====================
[09:35:26] [PASSED] Page-aligned size
[09:35:26] [PASSED] Extra pages requested
[09:35:26] ================ [PASSED] ttm_tt_init_basic ================
[09:35:26] [PASSED] ttm_tt_init_misaligned
[09:35:26] [PASSED] ttm_tt_fini_basic
[09:35:26] [PASSED] ttm_tt_fini_sg
[09:35:26] [PASSED] ttm_tt_fini_shmem
[09:35:26] [PASSED] ttm_tt_create_basic
[09:35:26] [PASSED] ttm_tt_create_invalid_bo_type
[09:35:26] [PASSED] ttm_tt_create_ttm_exists
[09:35:26] [PASSED] ttm_tt_create_failed
[09:35:26] [PASSED] ttm_tt_destroy_basic
[09:35:26] [PASSED] ttm_tt_populate_null_ttm
[09:35:26] [PASSED] ttm_tt_populate_populated_ttm
[09:35:26] [PASSED] ttm_tt_unpopulate_basic
[09:35:26] [PASSED] ttm_tt_unpopulate_empty_ttm
[09:35:26] [PASSED] ttm_tt_swapin_basic
[09:35:26] ===================== [PASSED] ttm_tt ======================
[09:35:26] =================== ttm_bo (14 subtests) ===================
[09:35:26] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[09:35:26] [PASSED] Cannot be interrupted and sleeps
[09:35:26] [PASSED] Cannot be interrupted, locks straight away
[09:35:26] [PASSED] Can be interrupted, sleeps
[09:35:26] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[09:35:26] [PASSED] ttm_bo_reserve_locked_no_sleep
[09:35:26] [PASSED] ttm_bo_reserve_no_wait_ticket
[09:35:26] [PASSED] ttm_bo_reserve_double_resv
[09:35:26] [PASSED] ttm_bo_reserve_interrupted
[09:35:26] [PASSED] ttm_bo_reserve_deadlock
[09:35:26] [PASSED] ttm_bo_unreserve_basic
[09:35:26] [PASSED] ttm_bo_unreserve_pinned
[09:35:26] [PASSED] ttm_bo_unreserve_bulk
[09:35:26] [PASSED] ttm_bo_fini_basic
[09:35:26] [PASSED] ttm_bo_fini_shared_resv
[09:35:26] [PASSED] ttm_bo_pin_basic
[09:35:26] [PASSED] ttm_bo_pin_unpin_resource
[09:35:26] [PASSED] ttm_bo_multiple_pin_one_unpin
[09:35:26] ===================== [PASSED] ttm_bo ======================
[09:35:26] ============== ttm_bo_validate (22 subtests) ===============
[09:35:26] ============== ttm_bo_init_reserved_sys_man  ===============
[09:35:26] [PASSED] Buffer object for userspace
[09:35:26] [PASSED] Kernel buffer object
[09:35:26] [PASSED] Shared buffer object
[09:35:26] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[09:35:26] ============== ttm_bo_init_reserved_mock_man  ==============
[09:35:26] [PASSED] Buffer object for userspace
[09:35:26] [PASSED] Kernel buffer object
[09:35:26] [PASSED] Shared buffer object
[09:35:26] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[09:35:26] [PASSED] ttm_bo_init_reserved_resv
[09:35:26] ================== ttm_bo_validate_basic  ==================
[09:35:26] [PASSED] Buffer object for userspace
[09:35:26] [PASSED] Kernel buffer object
[09:35:26] [PASSED] Shared buffer object
[09:35:26] ============== [PASSED] ttm_bo_validate_basic ==============
[09:35:26] [PASSED] ttm_bo_validate_invalid_placement
[09:35:26] ============= ttm_bo_validate_same_placement  ==============
[09:35:26] [PASSED] System manager
[09:35:26] [PASSED] VRAM manager
[09:35:26] ========= [PASSED] ttm_bo_validate_same_placement ==========
[09:35:26] [PASSED] ttm_bo_validate_failed_alloc
[09:35:26] [PASSED] ttm_bo_validate_pinned
[09:35:26] [PASSED] ttm_bo_validate_busy_placement
[09:35:26] ================ ttm_bo_validate_multihop  =================
[09:35:26] [PASSED] Buffer object for userspace
[09:35:26] [PASSED] Kernel buffer object
[09:35:26] [PASSED] Shared buffer object
[09:35:26] ============ [PASSED] ttm_bo_validate_multihop =============
[09:35:26] ========== ttm_bo_validate_no_placement_signaled  ==========
[09:35:26] [PASSED] Buffer object in system domain, no page vector
[09:35:26] [PASSED] Buffer object in system domain with an existing page vector
[09:35:26] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[09:35:26] ======== ttm_bo_validate_no_placement_not_signaled  ========
[09:35:26] [PASSED] Buffer object for userspace
[09:35:26] [PASSED] Kernel buffer object
[09:35:26] [PASSED] Shared buffer object
[09:35:26] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[09:35:26] [PASSED] ttm_bo_validate_move_fence_signaled
[09:35:26] ========= ttm_bo_validate_move_fence_not_signaled  =========
[09:35:26] [PASSED] Waits for GPU
[09:35:26] [PASSED] Tries to lock straight away
[09:35:26] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[09:35:26] [PASSED] ttm_bo_validate_swapout
[09:35:26] [PASSED] ttm_bo_validate_happy_evict
[09:35:26] [PASSED] ttm_bo_validate_all_pinned_evict
[09:35:26] [PASSED] ttm_bo_validate_allowed_only_evict
[09:35:26] [PASSED] ttm_bo_validate_deleted_evict
[09:35:26] [PASSED] ttm_bo_validate_busy_domain_evict
[09:35:26] [PASSED] ttm_bo_validate_evict_gutting
[09:35:26] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[09:35:26] ================= [PASSED] ttm_bo_validate =================
[09:35:26] ============================================================
[09:35:26] Testing complete. Ran 102 tests: passed: 102
[09:35:26] Elapsed time: 11.147s total, 1.671s configuring, 9.210s building, 0.235s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 19+ messages in thread

* ✓ Xe.CI.BAT: success for AuxCCS handling and render compression modifiers
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (13 preceding siblings ...)
  2026-03-24  9:35 ` ✓ CI.KUnit: success " Patchwork
@ 2026-03-24 10:19 ` Patchwork
  2026-03-24 13:31 ` [PATCH v25 00/12] " Rodrigo Vivi
  2026-03-24 18:53 ` ✗ Xe.CI.FULL: failure for " Patchwork
  16 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2026-03-24 10:19 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 1415 bytes --]

== Series Details ==

Series: AuxCCS handling and render compression modifiers
URL   : https://patchwork.freedesktop.org/series/163758/
State : success

== Summary ==

CI Bug Log - changes from xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462_BAT -> xe-pw-163758v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-163758v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_waitfence@abstime:
    - bat-dg2-oem2:       [PASS][1] -> [TIMEOUT][2] ([Intel XE#6506])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/bat-dg2-oem2/igt@xe_waitfence@abstime.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/bat-dg2-oem2/igt@xe_waitfence@abstime.html

  
  [Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506


Build changes
-------------

  * Linux: xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462 -> xe-pw-163758v1

  IGT_8822: 8822
  xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462: 5954c9da1bd82cdd06a370cbb4f23e8eebdf4462
  xe-pw-163758v1: 163758v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/index.html

[-- Attachment #2: Type: text/html, Size: 1980 bytes --]

^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v25 00/12] AuxCCS handling and render compression modifiers
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (14 preceding siblings ...)
  2026-03-24 10:19 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-03-24 13:31 ` Rodrigo Vivi
  2026-03-24 18:53   ` Tvrtko Ursulin
  2026-03-24 18:53 ` ✗ Xe.CI.FULL: failure for " Patchwork
  16 siblings, 1 reply; 19+ messages in thread
From: Rodrigo Vivi @ 2026-03-24 13:31 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: intel-xe, kernel-dev, Uma Shankar

On Tue, Mar 24, 2026 at 08:40:06AM +0000, Tvrtko Ursulin wrote:
> A series to add support for compressed surface scanout under xe with
> Alderlake-P.
> 
> Currently the auxiliary buffer data isn't mapped into the page tables at all so
> cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
> had to disable the support.
> 
> On top of that there are missing flushes, invalidations and similar.
> 
> Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
> 
>   [PLANE:32:plane 1A]: type=PRI
>           uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
>           hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
> 
> Display working fine - no artefacts, no DMAR/PIPE faults.
> 
> All IGTs pass for me locally.
> 
> v2:
>  * More patches added to fix kms_flip_tiling.
> 
> v3:
>  * Rebased after some cleanup patches from v2 were merged.
>  * Added people to Cc as suggested by Rodrigo.
>  * Adjusted last patch title. (Rodrigo)
>  * Apply GGTT flushing only to iomapped system memory buffers.
> 
> v4:
>  * Added patch for potentially misplaced Wa_14016712196.
>  * Fixed (hopefully) MAX_JOB_SIZE_DW on Meteorlake.
> 
> v5:
>  * Split out ring emission changes to smaller patches.
>  * Fixed MAX_JOB_SIZE_DW even more.
>  * Don't emit MI_FLUSH_DW_CCS on !BCS. This should fix Meteorlake.
> 
>  v6:
>  * Added AuxCCS invalidation to indirect context workarounds.
>  * Also added the indirect context handling and some other workarounds. They are
>    unrelated but the series depends on it.
>  * Dropped DPT pin alignment reduction since BMG appears not to be liking it for
>    some reason.
> 
> v7:
>  * Rebased on top of recent xe_fb_pin.c refactoring and also the indirect
>    context workarounds series.
> 
> v8:
>  * Rebased for bo->size removal.
>  * Corrected PIPE_CONTROL_FLUSH_L3 to bit 30. (Jose)
> 
> v9:
>  * Fixed fb remapping changes.
>  * Dropped two not required patches from the series.
>  * Fixed criteria for GGTT flushing.
>  * Limit clflush to the compression metadata area.
>  * Rebased for indirect context workarounds landing upstream.
> 
> v10:
>  * Rebase for XE_GT_WA().
> 
> v11:
>  * Do not use stolen for DPT on IGFX + AuxCCS.
> 
> v12:
>  * Rebased for some ringbuf and LRC code changes.
> 
> v13:
>  * Rebased for various upstream changes.
>  * Dropped clflush and stolen avoidance patches after merging IGT MOCS 61 usage.
> 
>  v14:
>  * MMIO 0x4248 and MI_FLUSH_DW_CCS are MTL+. (Matt)
>  * Consolidate engine feature checks. (Ville)
>  * Brought back the patch to put DPT tables in system memory for 100% CI pass
>    rate. It looks like MOCS 61 is not enough to avoid sporadic pipecrc
>    mismatches.
> 
> v15:
>  * Limited to enabling on Alderlake-P only. (Dropped all Meteorlake patches.)
>  * Dropped unrelated GGTT alignment fix. (Sent standalone.)
>  * Use display parent interface for probing AuxCCS driver support.
> 
> v16:
>  * Use write-combine for DPT in stolen memory. (Ville)
>  * Dropped clflush patches under assumption pre-production ADL machine were the
>    reason for sporadic pipecrc failures.
> 
> v17:
>  * Mechanical rebase for upstream conflicts.
> 
> v18:
>  * Added a patch to rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC. (Rodrigo)
>  * Instead of exporting a helper function for emitting the aux invalidation
>    into the ring, add it to the ring ops vfunc table. (Matthew)
> 
> v19:
>  * Tweaked comments and removed some stray hunks from v17.
> 
> v20:
>  * Include <linux/types.h> for u32.
> 
> v21:
>  * Forward declare struct xe_gt to fix standalone headers test.
> 
> v22:
>  * Split up "drm/xe/display: Add support for AuxCCS" into four patches for
>    easier review.
> 
> v23:
>  * Fixed rebase error made in v22 when splitting up the patches.
> 
> v24:
>  * Fixed flag confusion in "drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC".
>  * Applied r-b's.
> 
> v25:
>  * Rebased for upstream conflict and tidied some checkpatch warnings added in
>    the patch split.

Pushed to drm-xe-next. Thank you so much for the work and patience.

> 
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> Tvrtko Ursulin (12):
>   drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC
>   drm/xe: Use write-combine mapping when populating DPT
>   drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake
>   drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
>   drm/xe/xelp: Wait for AuxCCS invalidation to complete
>   drm/xe: Move aux table invalidation to ring ops
>   drm/xe/xelp: Add AuxCCS invalidation to the indirect context
>     workarounds
>   drm/xe/display: Move remapped plane loop out of __xe_pin_fb_vma_dpt
>   drm/xe/display: Change write_dpt_remapped_tiled function signature
>   drm/xe/display: Respect remapped plane alignment
>   drm/xe/display: Add support for AuxCCS
>   drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P
> 
>  drivers/gpu/drm/xe/display/intel_fbdev_fb.c   |  12 +-
>  drivers/gpu/drm/xe/display/xe_display.c       |   8 ++
>  drivers/gpu/drm/xe/display/xe_display_bo.c    |   6 +-
>  drivers/gpu/drm/xe/display/xe_dsb_buffer.c    |   4 +-
>  drivers/gpu/drm/xe/display/xe_fb_pin.c        | 116 +++++++++++++-----
>  drivers/gpu/drm/xe/display/xe_initial_plane.c |   2 +-
>  .../gpu/drm/xe/instructions/xe_mi_commands.h  |   6 +
>  drivers/gpu/drm/xe/xe_bo.c                    |  17 +--
>  drivers/gpu/drm/xe/xe_bo.h                    |   2 +-
>  drivers/gpu/drm/xe/xe_lrc.c                   |  23 ++++
>  drivers/gpu/drm/xe/xe_ring_ops.c              | 106 ++++++++++++----
>  drivers/gpu/drm/xe/xe_ring_ops_types.h        |   8 +-
>  12 files changed, 238 insertions(+), 72 deletions(-)
> 
> -- 
> 2.52.0
> 

^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH v25 00/12] AuxCCS handling and render compression modifiers
  2026-03-24 13:31 ` [PATCH v25 00/12] " Rodrigo Vivi
@ 2026-03-24 18:53   ` Tvrtko Ursulin
  0 siblings, 0 replies; 19+ messages in thread
From: Tvrtko Ursulin @ 2026-03-24 18:53 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-xe, kernel-dev, Uma Shankar


On 24/03/2026 13:31, Rodrigo Vivi wrote:
> On Tue, Mar 24, 2026 at 08:40:06AM +0000, Tvrtko Ursulin wrote:
>> A series to add support for compressed surface scanout under xe with
>> Alderlake-P.
>>
>> Currently the auxiliary buffer data isn't mapped into the page tables at all so
>> cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
>> had to disable the support.
>>
>> On top of that there are missing flushes, invalidations and similar.
>>
>> Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
>>
>>    [PLANE:32:plane 1A]: type=PRI
>>            uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
>>            hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
>>
>> Display working fine - no artefacts, no DMAR/PIPE faults.
>>
>> All IGTs pass for me locally.
>>
>> v2:
>>   * More patches added to fix kms_flip_tiling.
>>
>> v3:
>>   * Rebased after some cleanup patches from v2 were merged.
>>   * Added people to Cc as suggested by Rodrigo.
>>   * Adjusted last patch title. (Rodrigo)
>>   * Apply GGTT flushing only to iomapped system memory buffers.
>>
>> v4:
>>   * Added patch for potentially misplaced Wa_14016712196.
>>   * Fixed (hopefully) MAX_JOB_SIZE_DW on Meteorlake.
>>
>> v5:
>>   * Split out ring emission changes to smaller patches.
>>   * Fixed MAX_JOB_SIZE_DW even more.
>>   * Don't emit MI_FLUSH_DW_CCS on !BCS. This should fix Meteorlake.
>>
>>   v6:
>>   * Added AuxCCS invalidation to indirect context workarounds.
>>   * Also added the indirect context handling and some other workarounds. They are
>>     unrelated but the series depends on it.
>>   * Dropped DPT pin alignment reduction since BMG appears not to be liking it for
>>     some reason.
>>
>> v7:
>>   * Rebased on top of recent xe_fb_pin.c refactoring and also the indirect
>>     context workarounds series.
>>
>> v8:
>>   * Rebased for bo->size removal.
>>   * Corrected PIPE_CONTROL_FLUSH_L3 to bit 30. (Jose)
>>
>> v9:
>>   * Fixed fb remapping changes.
>>   * Dropped two not required patches from the series.
>>   * Fixed criteria for GGTT flushing.
>>   * Limit clflush to the compression metadata area.
>>   * Rebased for indirect context workarounds landing upstream.
>>
>> v10:
>>   * Rebase for XE_GT_WA().
>>
>> v11:
>>   * Do not use stolen for DPT on IGFX + AuxCCS.
>>
>> v12:
>>   * Rebased for some ringbuf and LRC code changes.
>>
>> v13:
>>   * Rebased for various upstream changes.
>>   * Dropped clflush and stolen avoidance patches after merging IGT MOCS 61 usage.
>>
>>   v14:
>>   * MMIO 0x4248 and MI_FLUSH_DW_CCS are MTL+. (Matt)
>>   * Consolidate engine feature checks. (Ville)
>>   * Brought back the patch to put DPT tables in system memory for 100% CI pass
>>     rate. It looks like MOCS 61 is not enough to avoid sporadic pipecrc
>>     mismatches.
>>
>> v15:
>>   * Limited to enabling on Alderlake-P only. (Dropped all Meteorlake patches.)
>>   * Dropped unrelated GGTT alignment fix. (Sent standalone.)
>>   * Use display parent interface for probing AuxCCS driver support.
>>
>> v16:
>>   * Use write-combine for DPT in stolen memory. (Ville)
>>   * Dropped clflush patches under assumption pre-production ADL machine were the
>>     reason for sporadic pipecrc failures.
>>
>> v17:
>>   * Mechanical rebase for upstream conflicts.
>>
>> v18:
>>   * Added a patch to rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC. (Rodrigo)
>>   * Instead of exporting a helper function for emitting the aux invalidation
>>     into the ring, add it to the ring ops vfunc table. (Matthew)
>>
>> v19:
>>   * Tweaked comments and removed some stray hunks from v17.
>>
>> v20:
>>   * Include <linux/types.h> for u32.
>>
>> v21:
>>   * Forward declare struct xe_gt to fix standalone headers test.
>>
>> v22:
>>   * Split up "drm/xe/display: Add support for AuxCCS" into four patches for
>>     easier review.
>>
>> v23:
>>   * Fixed rebase error made in v22 when splitting up the patches.
>>
>> v24:
>>   * Fixed flag confusion in "drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC".
>>   * Applied r-b's.
>>
>> v25:
>>   * Rebased for upstream conflict and tidied some checkpatch warnings added in
>>     the patch split.
> 
> Pushed to drm-xe-next. Thank you so much for the work and patience.

Thank you and all who helped with reviews! And now fingers crossed there 
are no serious regressions.

Regards,

Tvrtko

>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>
>> Tvrtko Ursulin (12):
>>    drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC
>>    drm/xe: Use write-combine mapping when populating DPT
>>    drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake
>>    drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
>>    drm/xe/xelp: Wait for AuxCCS invalidation to complete
>>    drm/xe: Move aux table invalidation to ring ops
>>    drm/xe/xelp: Add AuxCCS invalidation to the indirect context
>>      workarounds
>>    drm/xe/display: Move remapped plane loop out of __xe_pin_fb_vma_dpt
>>    drm/xe/display: Change write_dpt_remapped_tiled function signature
>>    drm/xe/display: Respect remapped plane alignment
>>    drm/xe/display: Add support for AuxCCS
>>    drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P
>>
>>   drivers/gpu/drm/xe/display/intel_fbdev_fb.c   |  12 +-
>>   drivers/gpu/drm/xe/display/xe_display.c       |   8 ++
>>   drivers/gpu/drm/xe/display/xe_display_bo.c    |   6 +-
>>   drivers/gpu/drm/xe/display/xe_dsb_buffer.c    |   4 +-
>>   drivers/gpu/drm/xe/display/xe_fb_pin.c        | 116 +++++++++++++-----
>>   drivers/gpu/drm/xe/display/xe_initial_plane.c |   2 +-
>>   .../gpu/drm/xe/instructions/xe_mi_commands.h  |   6 +
>>   drivers/gpu/drm/xe/xe_bo.c                    |  17 +--
>>   drivers/gpu/drm/xe/xe_bo.h                    |   2 +-
>>   drivers/gpu/drm/xe/xe_lrc.c                   |  23 ++++
>>   drivers/gpu/drm/xe/xe_ring_ops.c              | 106 ++++++++++++----
>>   drivers/gpu/drm/xe/xe_ring_ops_types.h        |   8 +-
>>   12 files changed, 238 insertions(+), 72 deletions(-)
>>
>> -- 
>> 2.52.0
>>


^ permalink raw reply	[flat|nested] 19+ messages in thread

* ✗ Xe.CI.FULL: failure for AuxCCS handling and render compression modifiers
  2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
                   ` (15 preceding siblings ...)
  2026-03-24 13:31 ` [PATCH v25 00/12] " Rodrigo Vivi
@ 2026-03-24 18:53 ` Patchwork
  16 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2026-03-24 18:53 UTC (permalink / raw)
  To: Tvrtko Ursulin; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 38008 bytes --]

== Series Details ==

Series: AuxCCS handling and render compression modifiers
URL   : https://patchwork.freedesktop.org/series/163758/
State : failure

== Summary ==

CI Bug Log - changes from xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462_FULL -> xe-pw-163758v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-163758v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-163758v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-163758v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_pmu@engine-activity-accuracy-50:
    - shard-bmg:          [PASS][1] -> [FAIL][2] +1 other test fail
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-8/igt@xe_pmu@engine-activity-accuracy-50.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@xe_pmu@engine-activity-accuracy-50.html

  
Known issues
------------

  Here are the changes found in xe-pw-163758v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2370])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#2327])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#1124]) +6 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html

  * igt@kms_bw@linear-tiling-2-displays-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#367] / [Intel XE#7354]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2887]) +7 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2652]) +12 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2252]) +6 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html

  * igt@kms_content_protection@atomic-hdcp14:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#7642])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_content_protection@atomic-hdcp14.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2320]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-256x256:
    - shard-bmg:          NOTRUN -> [FAIL][12] ([Intel XE#6747]) +1 other test fail
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@kms_cursor_crc@cursor-sliding-256x256.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic:
    - shard-bmg:          [PASS][13] -> [SKIP][14] ([Intel XE#2291]) +4 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-2/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_cursor_legacy@2x-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
    - shard-bmg:          [PASS][15] -> [SKIP][16] ([Intel XE#2291] / [Intel XE#7343]) +1 other test skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#4210] / [Intel XE#7467])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#4354] / [Intel XE#7386])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#6126] / [Intel XE#776])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip@2x-blocking-wf_vblank:
    - shard-bmg:          [PASS][20] -> [SKIP][21] ([Intel XE#2316]) +3 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-8/igt@kms_flip@2x-blocking-wf_vblank.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_flip@2x-blocking-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-panning:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2316]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_flip@2x-flip-vs-panning.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-bmg:          [PASS][23] -> [INCOMPLETE][24] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@plain-flip-ts-check-interruptible:
    - shard-lnl:          [PASS][25] -> [FAIL][26] ([Intel XE#5408] / [Intel XE#6266]) +2 other tests fail
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-lnl-8/igt@kms_flip@plain-flip-ts-check-interruptible.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-lnl-2/igt@kms_flip@plain-flip-ts-check-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-9/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2311]) +10 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#4141]) +3 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2352] / [Intel XE#7399])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2312]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2313]) +13 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#7061] / [Intel XE#7356])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#1503])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-bmg:          [PASS][35] -> [SKIP][36] ([Intel XE#1503])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-8/igt@kms_hdr@static-toggle-suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#7130]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#7283]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_plane@pixel-format-y-tiled-gen12-rc-ccs-cc-modifier.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-bmg:          [PASS][39] -> [SKIP][40] ([Intel XE#4596])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-x.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#5020] / [Intel XE#7348]) +1 other test skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-b:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-b.html

  * igt@kms_pm_backlight@fade-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#7376] / [Intel XE#870])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_pm_backlight@fade-with-dpms.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#1489]) +2 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr@psr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#2234] / [Intel XE#2850]) +4 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_setmode@basic@pipe-b-hdmi-a-3:
    - shard-bmg:          [PASS][46] -> [FAIL][47] ([Intel XE#6361]) +1 other test fail
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-8/igt@kms_setmode@basic@pipe-b-hdmi-a-3.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_setmode@basic@pipe-b-hdmi-a-3.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#1435])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@kms_setmode@invalid-clone-single-crtc-stealing:
    - shard-bmg:          [PASS][49] -> [SKIP][50] ([Intel XE#1435])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-2/igt@kms_setmode@invalid-clone-single-crtc-stealing.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_setmode@invalid-clone-single-crtc-stealing.html

  * igt@kms_sharpness_filter@filter-tap:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#6503])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@kms_sharpness_filter@filter-tap.html

  * igt@kms_vrr@max-min@pipe-a-edp-1:
    - shard-lnl:          [PASS][52] -> [FAIL][53] ([Intel XE#4227]) +1 other test fail
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-lnl-3/igt@kms_vrr@max-min@pipe-a-edp-1.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-lnl-8/igt@kms_vrr@max-min@pipe-a-edp-1.html

  * igt@kms_vrr@seamless-rr-switch-virtual:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#1499])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_vrr@seamless-rr-switch-virtual.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [PASS][55] -> [FAIL][56] ([Intel XE#2142]) +1 other test fail
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-lnl-7/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-lnl-6/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@xe_eudebug@basic-vm-bind-metadata-discovery:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#7636]) +4 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][58] ([Intel XE#6321])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#2322] / [Intel XE#7372]) +4 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html

  * igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-race-imm:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#7136]) +3 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-race-imm.html

  * igt@xe_exec_multi_queue@max-queues-preempt-mode-close-fd-smem:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#6874]) +13 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@xe_exec_multi_queue@max-queues-preempt-mode-close-fd-smem.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#7138]) +4 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind.html

  * igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#2229])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html

  * igt@xe_multigpu_svm@mgpu-pagefault-basic:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#6964]) +2 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@xe_multigpu_svm@mgpu-pagefault-basic.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#2245])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pm@d3hot-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#5742] / [Intel XE#7328] / [Intel XE#7400])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@xe_pm@d3hot-i2c.html

  * igt@xe_pm@s4-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#2284] / [Intel XE#7370])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@xe_pm@s4-d3cold-basic-exec.html

  * igt@xe_query@multigpu-query-pxp-status:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#944]) +1 other test skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@xe_query@multigpu-query-pxp-status.html

  * igt@xe_wedged@basic-wedged-read:
    - shard-bmg:          [PASS][69] -> [ABORT][70] ([Intel XE#7578])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-5/igt@xe_wedged@basic-wedged-read.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-1/igt@xe_wedged@basic-wedged-read.html

  
#### Possible fixes ####

  * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
    - shard-bmg:          [SKIP][71] ([Intel XE#2314] / [Intel XE#2894] / [Intel XE#7373]) -> [PASS][72] +1 other test pass
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][73] ([Intel XE#7084]) -> [PASS][74] +1 other test pass
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][75] ([Intel XE#2291]) -> [PASS][76] +4 other tests pass
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][77] ([Intel XE#2291] / [Intel XE#7343]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible:
    - shard-bmg:          [SKIP][79] ([Intel XE#2316]) -> [PASS][80] +4 other tests pass
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-5/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [FAIL][81] ([Intel XE#301]) -> [PASS][82] +1 other test pass
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [SKIP][83] ([Intel XE#7086]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-3/igt@kms_joiner@basic-force-big-joiner.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-bmg:          [SKIP][85] ([Intel XE#4596]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-4.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_pm_dc@dc5-dpms:
    - shard-lnl:          [FAIL][87] ([Intel XE#7340] / [Intel XE#7504]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-lnl-6/igt@kms_pm_dc@dc5-dpms.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-lnl-1/igt@kms_pm_dc@dc5-dpms.html

  * igt@kms_setmode@basic@pipe-a-edp-1:
    - shard-lnl:          [FAIL][89] ([Intel XE#6361]) -> [PASS][90] +1 other test pass
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-lnl-7/igt@kms_setmode@basic@pipe-a-edp-1.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-lnl-5/igt@kms_setmode@basic@pipe-a-edp-1.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][91] ([Intel XE#6321]) -> [PASS][92]
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-8/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
    - shard-lnl:          [FAIL][93] ([Intel XE#5625]) -> [PASS][94]
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-lnl-6/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-lnl-3/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
    - shard-bmg:          [ABORT][95] ([Intel XE#7578]) -> [PASS][96] +1 other test pass
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-1/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-2/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html

  
#### Warnings ####

  * igt@kms_content_protection@legacy-hdcp14:
    - shard-bmg:          [FAIL][97] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) -> [SKIP][98] ([Intel XE#7642]) +1 other test skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-2/igt@kms_content_protection@legacy-hdcp14.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_content_protection@legacy-hdcp14.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [FAIL][99] ([Intel XE#6707] / [Intel XE#7439]) -> [SKIP][100] ([Intel XE#7642])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-8/igt@kms_content_protection@uevent.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_content_protection@uevent.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt:
    - shard-bmg:          [SKIP][101] ([Intel XE#2312]) -> [SKIP][102] ([Intel XE#2311]) +14 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt:
    - shard-bmg:          [SKIP][103] ([Intel XE#2312]) -> [SKIP][104] ([Intel XE#4141]) +7 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][105] ([Intel XE#4141]) -> [SKIP][106] ([Intel XE#2312]) +6 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render:
    - shard-bmg:          [SKIP][107] ([Intel XE#2311]) -> [SKIP][108] ([Intel XE#2312]) +17 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
    - shard-bmg:          [SKIP][109] ([Intel XE#2312]) -> [SKIP][110] ([Intel XE#2313]) +12 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt:
    - shard-bmg:          [SKIP][111] ([Intel XE#2313]) -> [SKIP][112] ([Intel XE#2312]) +14 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][113] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][114] ([Intel XE#3544])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          [SKIP][115] ([Intel XE#4596]) -> [SKIP][116] ([Intel XE#5021] / [Intel XE#7377])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-y.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-bmg:          [SKIP][117] ([Intel XE#3904] / [Intel XE#7342]) -> [SKIP][118] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) +2 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-bmg:          [SKIP][119] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) -> [SKIP][120] ([Intel XE#3904] / [Intel XE#7342]) +1 other test skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-5/igt@kms_rotation_crc@sprite-rotation-90.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-6/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][121] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][122] ([Intel XE#2426] / [Intel XE#5848])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4210
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5408
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6126
  [Intel XE#6266]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6266
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6361
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
  [Intel XE#6747]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6747
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7086]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7086
  [Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7328
  [Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7373
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7400
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7439
  [Intel XE#7467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7467
  [Intel XE#7504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7504
  [Intel XE#7578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7578
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462 -> xe-pw-163758v1

  IGT_8822: 8822
  xe-4768-5954c9da1bd82cdd06a370cbb4f23e8eebdf4462: 5954c9da1bd82cdd06a370cbb4f23e8eebdf4462
  xe-pw-163758v1: 163758v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163758v1/index.html

[-- Attachment #2: Type: text/html, Size: 42673 bytes --]

^ permalink raw reply	[flat|nested] 19+ messages in thread

end of thread, other threads:[~2026-03-24 18:53 UTC | newest]

Thread overview: 19+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-03-24  8:40 [PATCH v25 00/12] AuxCCS handling and render compression modifiers Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 01/12] drm/xe: Rename XE_BO_FLAG_SCANOUT to XE_BO_FLAG_FORCE_WC Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 02/12] drm/xe: Use write-combine mapping when populating DPT Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 03/12] drm/xe/xelpg: Limit AuxCCS ring buffer programming to Alderlake Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 04/12] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 05/12] drm/xe/xelp: Wait for AuxCCS invalidation to complete Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 06/12] drm/xe: Move aux table invalidation to ring ops Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 07/12] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 08/12] drm/xe/display: Move remapped plane loop out of __xe_pin_fb_vma_dpt Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 09/12] drm/xe/display: Change write_dpt_remapped_tiled function signature Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 10/12] drm/xe/display: Respect remapped plane alignment Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 11/12] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
2026-03-24  8:40 ` [PATCH v25 12/12] drm/xe/xelp: Expose AuxCCS frame buffer modifiers on Alderlake-P Tvrtko Ursulin
2026-03-24  9:34 ` ✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers Patchwork
2026-03-24  9:35 ` ✓ CI.KUnit: success " Patchwork
2026-03-24 10:19 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-24 13:31 ` [PATCH v25 00/12] " Rodrigo Vivi
2026-03-24 18:53   ` Tvrtko Ursulin
2026-03-24 18:53 ` ✗ Xe.CI.FULL: failure for " Patchwork

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