* [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI
@ 2026-04-06 14:54 Riana Tauro
2026-04-06 14:54 ` [PATCH v2 1/5] drm/xe/uapi: Add additional error components to XE drm_ras Riana Tauro
` (8 more replies)
0 siblings, 9 replies; 13+ messages in thread
From: Riana Tauro @ 2026-04-06 14:54 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Add support to query error counter for CRI in XE drm_ras.
This patch adds the necessary structures and commands to query error counter
from System controller. It also integrates with the existing XE drm_ras
framework to allow userspace to retrieve error counter value.
Usage:
Query all error counters using ynl
$ sudo ynl --family drm_ras --dump get-error-counter --json \
'{"node-id":0}'
[{'error-id': 1, 'error-name': 'core-compute', 'error-value': 0},
{'error-id': 2, 'error-name': 'soc-internal', 'error-value': 0},
{'error-id': 3, 'error-name': 'device-memory', 'error-value': 0},
{'error-id': 4, 'error-name': 'pcie', 'error-value': 0},
{'error-id': 5, 'error-name': 'fabric', 'error-value': 0}]
Query single error counter using ynl
$ sudo ynl --family drm_ras --do get-error-counter --json \
'{"node-id":1, "error-id":1}'
{'error-id': 1, 'error-name': 'core-compute', 'error-value': 2}
Also add helper function to clear error counter for CRI. This will be
integrated with drm_ras once https://patchwork.freedesktop.org/series/163019/
is merged.
Rev2: add helper for clear counter
separate get error counter for other usecases
move commands to sysctrl layer
Riana Tauro (5):
drm/xe/uapi: Add additional error components to XE drm_ras
drm/xe/xe_ras: Add structures and commands for get and clear counter
drm/xe/xe_ras: Add support to query error counter for CRI
drm/xe/xe_ras: Add helper to clear error counter
drm/xe/ras: Add flag for Xe RAS
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_device_types.h | 2 +
drivers/gpu/drm/xe/xe_drm_ras.c | 22 ++-
drivers/gpu/drm/xe/xe_hw_error.c | 2 +-
drivers/gpu/drm/xe/xe_pci.c | 3 +
drivers/gpu/drm/xe/xe_pci_types.h | 1 +
drivers/gpu/drm/xe/xe_ras.c | 171 +++++++++++++++++
drivers/gpu/drm/xe/xe_ras.h | 18 ++
drivers/gpu/drm/xe/xe_ras_types.h | 176 ++++++++++++++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 15 ++
include/uapi/drm/xe_drm.h | 11 +-
11 files changed, 412 insertions(+), 10 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_ras.c
create mode 100644 drivers/gpu/drm/xe/xe_ras.h
create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h
--
2.47.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2 1/5] drm/xe/uapi: Add additional error components to XE drm_ras
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
@ 2026-04-06 14:54 ` Riana Tauro
2026-04-06 14:54 ` [PATCH v2 2/5] drm/xe/xe_ras: Add structures and commands for get and clear counter Riana Tauro
` (7 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Riana Tauro @ 2026-04-06 14:54 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Add additional Error components supported by XE RAS (Reliability,
Availability and Serviceability).
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Aravind Iddamsetty <aravind.iddamsetty@linux.intel.com>
---
include/uapi/drm/xe_drm.h | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index ae2fda23ce7c..cadc0a906d30 100644
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -2589,6 +2589,12 @@ enum drm_xe_ras_error_component {
DRM_XE_RAS_ERR_COMP_CORE_COMPUTE = 1,
/** @DRM_XE_RAS_ERR_COMP_SOC_INTERNAL: SoC Internal Error */
DRM_XE_RAS_ERR_COMP_SOC_INTERNAL,
+ /** @DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY: Device Memory Error */
+ DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY,
+ /** @DRM_XE_RAS_ERR_COMP_PCIE: PCIe Subsystem Error */
+ DRM_XE_RAS_ERR_COMP_PCIE,
+ /** @DRM_XE_RAS_ERR_COMP_FABRIC: Fabric Subsystem Error */
+ DRM_XE_RAS_ERR_COMP_FABRIC,
/** @DRM_XE_RAS_ERR_COMP_MAX: Max Error */
DRM_XE_RAS_ERR_COMP_MAX /* non-ABI */
};
@@ -2606,7 +2612,10 @@ enum drm_xe_ras_error_component {
*/
#define DRM_XE_RAS_ERROR_COMPONENT_NAMES { \
[DRM_XE_RAS_ERR_COMP_CORE_COMPUTE] = "core-compute", \
- [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = "soc-internal" \
+ [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = "soc-internal", \
+ [DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY] = "device-memory", \
+ [DRM_XE_RAS_ERR_COMP_PCIE] = "pcie", \
+ [DRM_XE_RAS_ERR_COMP_FABRIC] = "fabric", \
}
#if defined(__cplusplus)
--
2.47.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 2/5] drm/xe/xe_ras: Add structures and commands for get and clear counter
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
2026-04-06 14:54 ` [PATCH v2 1/5] drm/xe/uapi: Add additional error components to XE drm_ras Riana Tauro
@ 2026-04-06 14:54 ` Riana Tauro
2026-04-13 9:03 ` Raag Jadav
2026-04-06 14:54 ` [PATCH v2 3/5] drm/xe/xe_ras: Add support to query error counter for CRI Riana Tauro
` (6 subsequent siblings)
8 siblings, 1 reply; 13+ messages in thread
From: Riana Tauro @ 2026-04-06 14:54 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Add request and response structures for get and clear counter command.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add num_headers to queue header
add structures for clear counter
move commands to sysctrl file (Raag)
---
drivers/gpu/drm/xe/xe_ras_types.h | 176 ++++++++++++++++++
drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 15 ++
2 files changed, 191 insertions(+)
create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
new file mode 100644
index 000000000000..ac83a8b75c70
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -0,0 +1,176 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_TYPES_H_
+#define _XE_RAS_TYPES_H_
+
+#include <linux/types.h>
+
+#define XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE 200
+
+/**
+ * struct xe_ras_error_common - Common RAS error class
+ *
+ * This structure contains error severity and component information
+ * across all products
+ */
+struct xe_ras_error_common {
+ /** @severity: Error Severity */
+ u8 severity;
+ /** @component: IP where the error originated */
+ u8 component;
+} __packed;
+
+/**
+ * struct xe_ras_error_unit - Error unit information
+ */
+struct xe_ras_error_unit {
+ /** @tile: Tile identifier */
+ u8 tile;
+ /** @instance: Instance identifier within a component */
+ u32 instance;
+} __packed;
+
+/**
+ * struct xe_ras_error_cause - Error cause information
+ */
+struct xe_ras_error_cause {
+ /** @cause: Cause */
+ u32 cause;
+ /** @reserved: For future use */
+ u8 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_error_product - Error fields that are specific to the product
+ */
+struct xe_ras_error_product {
+ /** @unit: Unit within IP block */
+ struct xe_ras_error_unit unit;
+ /** @error_cause: Cause/checker */
+ struct xe_ras_error_cause error_cause;
+} __packed;
+
+/**
+ * struct xe_ras_error_class - Complete RAS Error Class
+ *
+ * This structure provides the complete error classification by combining
+ * the common error class with the product-specific error class.
+ */
+struct xe_ras_error_class {
+ /** @common: Common error severity and component */
+ struct xe_ras_error_common common;
+ /** @product: Product-specific unit and cause */
+ struct xe_ras_error_product product;
+} __packed;
+
+/**
+ * struct xe_ras_info_queue_header - Info queue header
+ *
+ * This structure provides metadata about large info queue data
+ */
+struct xe_ras_info_queue_header {
+ /** @total_size: Total size of complete info queue data (bytes) */
+ u32 total_size;
+ /** @chunk_offset: Offset of this chunk within total data (bytes) */
+ u32 chunk_offset;
+ /** @chunk_size: Size of data in this chunk (bytes) */
+ u32 chunk_size;
+ /** @sequence_number: Sequence number of this chunk (starts at 0) */
+ u32 sequence_number;
+ /** @flags: Info queue control flags */
+ u32 flags:8;
+ /** @compression_type: Compression algorithm used (0 = none) */
+ u32 compression_type:4;
+ /** @num_headers: Number of detailed counter headers present at the beginning of queue data */
+ u32 num_headers:5;
+ /** @reserved: Reserved for future use */
+ u32 reserved:15;
+ /** @checksum: Checksum of the chunk data */
+ u32 checksum;
+} __packed;
+
+/**
+ * struct xe_ras_info_queue_response - Info queue response
+ *
+ * This structure provides the response for commands with info queue
+ */
+struct xe_ras_info_queue_response {
+ /** @queue_header: Info queue metadata */
+ struct xe_ras_info_queue_header queue_header;
+ /** @queue_data: Info queue data chunk */
+ u8 queue_data[XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE];
+} __packed;
+
+/**
+ * struct xe_ras_get_counter_request - Request for XE_SYSCTRL_CMD_GET_COUNTER
+ *
+ * This structure defines the request format to get error counter value.
+ */
+struct xe_ras_get_counter_request {
+ /** @error_class: RAS error class */
+ struct xe_ras_error_class error_class;
+ /** @reserved: Reserved for future use */
+ u32 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_get_counter_response - Response for XE_SYSCTRL_CMD_GET_COUNTER
+ *
+ * This structure defines the response format to get error counter value.
+ */
+struct xe_ras_get_counter_response {
+ /** @error_class: RAS error class */
+ struct xe_ras_error_class error_class;
+ /** @counter_value: Current counter value */
+ u32 counter_value;
+ /** @timestamp: Timestamp of the counter value */
+ u64 timestamp;
+ /** @threshold_value: Threshold value for the counter */
+ u32 threshold_value;
+ /** @counter_status: Status of the counter */
+ u32 counter_status:8;
+ /** @reserved: Reserved for future use */
+ u32 reserved:1;
+ /** @has_info_queue: Indicates if info queue is present */
+ u32 has_info_queue:1;
+ /** @reserved1: Reserved for future use */
+ u32 reserved1:22;
+ /** @info_queue: Info queue data */
+ struct xe_ras_info_queue_response info_queue;
+} __packed;
+
+/**
+ * struct xe_ras_clear_counter_request - Request for XE_SYSCTRL_CMD_CLEAR_COUNTER
+ *
+ * This structure defines the request format to clear an error counter.
+ */
+struct xe_ras_clear_counter_request {
+ /** @error_class: RAS error class */
+ struct xe_ras_error_class error_class;
+ /** @specific_counter: (1 = Specific counter, 0 = Aggregate counter) */
+ u32 specific_counter:1;
+ /** @reserved: Reserved for future use */
+ u32 reserved:31;
+} __packed;
+
+/**
+ * struct xe_ras_clear_counter_response - Response for XE_SYSCTRL_CMD_CLEAR_COUNTER
+ *
+ * This structure defines the response received on clearing an error counter.
+ */
+struct xe_ras_clear_counter_response {
+ /** @error_class: RAS error class */
+ struct xe_ras_error_class error_class;
+ /** @previous_counter_value: Counter value before clearing */
+ u32 previous_counter_value;
+ /** @clear_timestamp: Timestamp when the counter was cleared */
+ u64 clear_timestamp;
+ /** @status: Status of the clear operation (Success/Failure) */
+ u32 status;
+ /** @reserved: Reserved for future use */
+ u32 reserved[3];
+} __packed;
+#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 89456aec6097..61ec8b18d430 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -10,6 +10,21 @@
#include "abi/xe_sysctrl_abi.h"
+/**
+ * enum xe_sysctrl_mailbox_command_id - Sysctrl Command ID's for GFSP group
+ *
+ * @XE_SYSCTRL_CMD_GET_COUNTER: Get error counter value
+ * @XE_SYSCTRL_CMD_CLEAR_COUNTER: Clear error counter value
+ */
+enum xe_sysctrl_mailbox_command_id {
+ XE_SYSCTRL_CMD_GET_COUNTER = 0x03,
+ XE_SYSCTRL_CMD_CLEAR_COUNTER = 0x04
+};
+
+enum xe_sysctrl_group {
+ XE_SYSCTRL_GROUP_GFSP = 1
+};
+
/**
* struct xe_sysctrl_mailbox_command - System Controller mailbox command
*/
--
2.47.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 3/5] drm/xe/xe_ras: Add support to query error counter for CRI
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
2026-04-06 14:54 ` [PATCH v2 1/5] drm/xe/uapi: Add additional error components to XE drm_ras Riana Tauro
2026-04-06 14:54 ` [PATCH v2 2/5] drm/xe/xe_ras: Add structures and commands for get and clear counter Riana Tauro
@ 2026-04-06 14:54 ` Riana Tauro
2026-04-13 9:19 ` Raag Jadav
2026-04-06 14:54 ` [PATCH v2 4/5] drm/xe/xe_ras: Add helper to clear error counter Riana Tauro
` (5 subsequent siblings)
8 siblings, 1 reply; 13+ messages in thread
From: Riana Tauro @ 2026-04-06 14:54 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Add support to get error counter value for CRI.
When userspace queries a drm_ras error counter, fetch the
latest counter value from system controller.
Integrate this with XE drm_ras.
Usage :
Query all error counter value using ynl
$ sudo ynl --family drm_ras --dump get-error-counter --json \
'{"node-id":0}'
[{'error-id': 1, 'error-name': 'core-compute', 'error-value': 0},
{'error-id': 2, 'error-name': 'soc-internal', 'error-value': 0},
{'error-id': 3, 'error-name': 'device-memory', 'error-value': 0},
{'error-id': 4, 'error-name': 'pcie', 'error-value': 0},
{'error-id': 5, 'error-name': 'fabric', 'error-value': 0}]
Query single error counter value using ynl
$ sudo ynl --family drm_ras --do get-error-counter --json \
'{"node-id":1, "error-id":1}'
{'error-id': 1, 'error-name': 'core-compute', 'error-value': 2}
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: split functions
fix commit message (Raag)
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_drm_ras.c | 22 +++---
drivers/gpu/drm/xe/xe_ras.c | 123 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_ras.h | 16 +++++
4 files changed, 154 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/xe/xe_ras.c
create mode 100644 drivers/gpu/drm/xe/xe_ras.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 110fef511fe2..8fcd676ab41c 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -111,6 +111,7 @@ xe-y += xe_bb.o \
xe_pxp_debugfs.o \
xe_pxp_submit.o \
xe_query.o \
+ xe_ras.o \
xe_range_fence.o \
xe_reg_sr.o \
xe_reg_whitelist.o \
diff --git a/drivers/gpu/drm/xe/xe_drm_ras.c b/drivers/gpu/drm/xe/xe_drm_ras.c
index e07dc23a155e..b334881e034a 100644
--- a/drivers/gpu/drm/xe/xe_drm_ras.c
+++ b/drivers/gpu/drm/xe/xe_drm_ras.c
@@ -11,17 +11,27 @@
#include "xe_device_types.h"
#include "xe_drm_ras.h"
+#include "xe_ras.h"
static const char * const error_components[] = DRM_XE_RAS_ERROR_COMPONENT_NAMES;
static const char * const error_severity[] = DRM_XE_RAS_ERROR_SEVERITY_NAMES;
-static int hw_query_error_counter(struct xe_drm_ras_counter *info,
- u32 error_id, const char **name, u32 *val)
+static int hw_query_error_counter(struct xe_device *xe,
+ const enum drm_xe_ras_error_severity severity, u32 error_id,
+ const char **name, u32 *val)
{
+ struct xe_drm_ras *ras = &xe->ras;
+ struct xe_drm_ras_counter *info = ras->info[severity];
+
if (!info || !info[error_id].name)
return -ENOENT;
*name = info[error_id].name;
+
+ /* Fetch counter from system controller if supported */
+ if (xe->info.has_sysctrl)
+ return xe_ras_get_error_counter(xe, severity, error_id, val);
+
*val = atomic_read(&info[error_id].counter);
return 0;
@@ -31,20 +41,16 @@ static int query_uncorrectable_error_counter(struct drm_ras_node *ep, u32 error_
const char **name, u32 *val)
{
struct xe_device *xe = ep->priv;
- struct xe_drm_ras *ras = &xe->ras;
- struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_UNCORRECTABLE];
- return hw_query_error_counter(info, error_id, name, val);
+ return hw_query_error_counter(xe, DRM_XE_RAS_ERR_SEV_UNCORRECTABLE, error_id, name, val);
}
static int query_correctable_error_counter(struct drm_ras_node *ep, u32 error_id,
const char **name, u32 *val)
{
struct xe_device *xe = ep->priv;
- struct xe_drm_ras *ras = &xe->ras;
- struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_CORRECTABLE];
- return hw_query_error_counter(info, error_id, name, val);
+ return hw_query_error_counter(xe, DRM_XE_RAS_ERR_SEV_CORRECTABLE, error_id, name, val);
}
static struct xe_drm_ras_counter *allocate_and_copy_counters(struct xe_device *xe)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
new file mode 100644
index 000000000000..b5fdad2c801d
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_device_types.h"
+#include "xe_pm.h"
+#include "xe_printk.h"
+#include "xe_ras.h"
+#include "xe_ras_types.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+/* Severity classification of detected errors */
+enum xe_ras_severity {
+ XE_RAS_SEVERITY_NOT_SUPPORTED = 0,
+ XE_RAS_SEVERITY_CORRECTABLE,
+ XE_RAS_SEVERITY_UNCORRECTABLE,
+ XE_RAS_SEVERITY_INFORMATIONAL,
+ XE_RAS_SEVERITY_MAX
+};
+
+/* major IP blocks where errors can originate */
+enum xe_ras_component {
+ XE_RAS_COMPONENT_NOT_SUPPORTED = 0,
+ XE_RAS_COMPONENT_DEVICE_MEMORY,
+ XE_RAS_COMPONENT_CORE_COMPUTE,
+ XE_RAS_COMPONENT_RESERVED,
+ XE_RAS_COMPONENT_PCIE,
+ XE_RAS_COMPONENT_FABRIC,
+ XE_RAS_COMPONENT_SOC_INTERNAL,
+ XE_RAS_COMPONENT_MAX
+};
+
+/* Mapping from drm_xe_ras_error_component to xe_ras_component */
+static const int drm_to_xe_ras_component[] = {
+ [DRM_XE_RAS_ERR_COMP_CORE_COMPUTE] = XE_RAS_COMPONENT_CORE_COMPUTE,
+ [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = XE_RAS_COMPONENT_SOC_INTERNAL,
+ [DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY] = XE_RAS_COMPONENT_DEVICE_MEMORY,
+ [DRM_XE_RAS_ERR_COMP_PCIE] = XE_RAS_COMPONENT_PCIE,
+ [DRM_XE_RAS_ERR_COMP_FABRIC] = XE_RAS_COMPONENT_FABRIC
+};
+static_assert(ARRAY_SIZE(drm_to_xe_ras_component) == DRM_XE_RAS_ERR_COMP_MAX);
+
+/* Mapping from drm_xe_ras_error_severity to xe_ras_severity */
+static const int drm_to_xe_ras_severity[] = {
+ [DRM_XE_RAS_ERR_SEV_CORRECTABLE] = XE_RAS_SEVERITY_CORRECTABLE,
+ [DRM_XE_RAS_ERR_SEV_UNCORRECTABLE] = XE_RAS_SEVERITY_UNCORRECTABLE
+};
+static_assert(ARRAY_SIZE(drm_to_xe_ras_severity) == DRM_XE_RAS_ERR_SEV_MAX);
+
+static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
+ u32 cmd_mask, void *request, size_t request_len,
+ void *response, size_t response_len)
+{
+ struct xe_sysctrl_app_msg_hdr hdr = {0};
+ u32 req_hdr;
+
+ req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |
+ FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask);
+
+ hdr.data = req_hdr;
+ command->header = hdr;
+ command->data_in = request;
+ command->data_in_len = request_len;
+ command->data_out = response;
+ command->data_out_len = response_len;
+}
+
+static int get_error_counter(struct xe_device *xe, struct xe_ras_error_class *error_class,
+ u32 *value)
+{
+ struct xe_ras_get_counter_response response = {0};
+ struct xe_ras_get_counter_request request = {0};
+ struct xe_sysctrl_mailbox_command command = {0};
+ size_t rlen;
+ int ret;
+
+ request.error_class = *error_class;
+
+ prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_COUNTER, &request, sizeof(request),
+ &response, sizeof(response));
+
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
+ return ret;
+ }
+
+ if (rlen != sizeof(response)) {
+ xe_err(xe, "[RAS]: Sysctrl response size mismatch. Expected %zu, got %zu\n",
+ sizeof(response), rlen);
+ return -EINVAL;
+ }
+
+ *value = response.counter_value;
+
+ return 0;
+}
+
+/**
+ * xe_ras_get_error_counter() - Get error counter value
+ * @xe: xe device instance
+ * @severity: Error severity level to be queried
+ * @error_id: Error component to be queried
+ * @value: Counter value
+ *
+ * This function retrieves the value of a specific RAS error counter based on
+ * the provided severity and component.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
+ u32 error_id, u32 *value)
+{
+ struct xe_ras_error_class error_class = {0};
+
+ error_class.common.severity = drm_to_xe_ras_severity[severity];
+ error_class.common.component = drm_to_xe_ras_component[error_id];
+
+ guard(xe_pm_runtime)(xe);
+ return get_error_counter(xe, &error_class, value);
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
new file mode 100644
index 000000000000..e468c414148e
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_H_
+#define _XE_RAS_H_
+
+#include <uapi/drm/xe_drm.h>
+
+struct xe_device;
+
+int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
+ u32 error_id, u32 *value);
+
+#endif
--
2.47.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 4/5] drm/xe/xe_ras: Add helper to clear error counter
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
` (2 preceding siblings ...)
2026-04-06 14:54 ` [PATCH v2 3/5] drm/xe/xe_ras: Add support to query error counter for CRI Riana Tauro
@ 2026-04-06 14:54 ` Riana Tauro
2026-04-13 9:25 ` Raag Jadav
2026-04-06 14:54 ` [PATCH v2 5/5] drm/xe/ras: Add flag for Xe RAS Riana Tauro
` (4 subsequent siblings)
8 siblings, 1 reply; 13+ messages in thread
From: Riana Tauro @ 2026-04-06 14:54 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Add helper function to clear error counter value.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
Note: This will be integrated with drm_ras implementation
once clear-error-counter patch is merged.
https://patchwork.freedesktop.org/series/163019/
---
drivers/gpu/drm/xe/xe_ras.c | 48 +++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_ras.h | 2 ++
2 files changed, 50 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index b5fdad2c801d..56abcb9783a4 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -121,3 +121,51 @@ int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_s
guard(xe_pm_runtime)(xe);
return get_error_counter(xe, &error_class, value);
}
+
+/**
+ * xe_ras_clear_error_counter() - Clear error counter value
+ * @xe: xe device instance
+ * @severity: Error severity level to be cleared
+ * @error_id: Error component to be cleared
+ *
+ * This function clears the value of a specific RAS error counter based on
+ * the provided severity and component.
+ *
+ * Return: 0 on success, negative error code on failure.
+ */
+int xe_ras_clear_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
+ u32 error_id)
+{
+ struct xe_ras_clear_counter_response response = {0};
+ struct xe_ras_clear_counter_request request = {0};
+ struct xe_sysctrl_mailbox_command command = {0};
+ struct xe_ras_error_class *error_class = &request.error_class;
+ size_t rlen;
+ int ret;
+
+ error_class->common.severity = drm_to_xe_ras_severity[severity];
+ error_class->common.component = drm_to_xe_ras_component[error_id];
+
+ prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_CLEAR_COUNTER, &request, sizeof(request),
+ &response, sizeof(response));
+
+ guard(xe_pm_runtime)(xe);
+ ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+ if (ret) {
+ xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
+ return ret;
+ }
+
+ if (rlen != sizeof(response)) {
+ xe_err(xe, "[RAS]: Sysctrl response size mismatch. Expected %zu, got %zu\n",
+ sizeof(response), rlen);
+ return -EINVAL;
+ }
+
+ if (response.status) {
+ xe_err(xe, "[RAS]: Sysctrl Failed to clear counter %u\n", response.status);
+ return -EIO;
+ }
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index e468c414148e..19e0e649d55f 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -12,5 +12,7 @@ struct xe_device;
int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
u32 error_id, u32 *value);
+int xe_ras_clear_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
+ u32 error_id);
#endif
--
2.47.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 5/5] drm/xe/ras: Add flag for Xe RAS
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
` (3 preceding siblings ...)
2026-04-06 14:54 ` [PATCH v2 4/5] drm/xe/xe_ras: Add helper to clear error counter Riana Tauro
@ 2026-04-06 14:54 ` Riana Tauro
2026-04-06 14:54 ` ✗ CI.checkpatch: warning for Add get-error-counter and clear-error-counter support for CRI Patchwork
` (3 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Riana Tauro @ 2026-04-06 14:54 UTC (permalink / raw)
To: intel-xe
Cc: riana.tauro, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, raag.jadav, ravi.kishore.koppuravuri,
mallesh.koujalagi, soham.purkait
Add a flag for RAS. If enabled, XE driver registers with
drm_ras and exposes supported counters.
Currently this is enabled for PVC and CRI.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
drivers/gpu/drm/xe/xe_device_types.h | 2 ++
drivers/gpu/drm/xe/xe_hw_error.c | 2 +-
drivers/gpu/drm/xe/xe_pci.c | 3 +++
drivers/gpu/drm/xe/xe_pci_types.h | 1 +
4 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 150c76b2acaf..bfb23d6c0511 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -191,6 +191,8 @@ struct xe_device {
u8 has_ctx_tlb_inval:1;
/** @info.has_range_tlb_inval: Has range based TLB invalidations */
u8 has_range_tlb_inval:1;
+ /** @info.has_ras: Device supports RAS (Reliability, Availability, Serviceability) */
+ u8 has_ras:1;
/** @info.has_soc_remapper_sysctrl: Has SoC remapper system controller */
u8 has_soc_remapper_sysctrl:1;
/** @info.has_soc_remapper_telem: Has SoC remapper telemetry support */
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index 2a31b430570e..3ab0fceb151f 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -520,7 +520,7 @@ void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl)
static int hw_error_info_init(struct xe_device *xe)
{
- if (xe->info.platform != XE_PVC)
+ if (!xe->info.has_ras)
return 0;
return xe_drm_ras_init(xe);
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 1df3f08e2e1c..d0d9cd1e87b6 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -364,6 +364,7 @@ static const __maybe_unused struct xe_device_desc pvc_desc = {
.vm_max_level = 4,
.vram_flags = XE_VRAM_FLAGS_NEED64K,
.has_mbx_power_limits = false,
+ .has_ras = true,
};
static const struct xe_device_desc mtl_desc = {
@@ -471,6 +472,7 @@ static const struct xe_device_desc cri_desc = {
.require_force_probe = true,
.va_bits = 57,
.vm_max_level = 4,
+ .has_ras = true,
};
static const struct xe_device_desc nvlp_desc = {
@@ -761,6 +763,7 @@ static int xe_info_init_early(struct xe_device *xe,
xe->info.has_page_reclaim_hw_assist = desc->has_page_reclaim_hw_assist;
xe->info.has_pre_prod_wa = desc->has_pre_prod_wa;
xe->info.has_pxp = desc->has_pxp;
+ xe->info.has_ras = desc->has_ras;
xe->info.has_soc_remapper_sysctrl = desc->has_soc_remapper_sysctrl;
xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem;
xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 08386c5eca27..cb7d79f51753 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -54,6 +54,7 @@ struct xe_device_desc {
u8 has_pre_prod_wa:1;
u8 has_page_reclaim_hw_assist:1;
u8 has_pxp:1;
+ u8 has_ras:1;
u8 has_soc_remapper_sysctrl:1;
u8 has_soc_remapper_telem:1;
u8 has_sriov:1;
--
2.47.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* ✗ CI.checkpatch: warning for Add get-error-counter and clear-error-counter support for CRI
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
` (4 preceding siblings ...)
2026-04-06 14:54 ` [PATCH v2 5/5] drm/xe/ras: Add flag for Xe RAS Riana Tauro
@ 2026-04-06 14:54 ` Patchwork
2026-04-06 14:56 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-04-06 14:54 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
== Series Details ==
Series: Add get-error-counter and clear-error-counter support for CRI
URL : https://patchwork.freedesktop.org/series/164393/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 11d773bb3c972993b849b44db60fb73f4828ece5
Author: Riana Tauro <riana.tauro@intel.com>
Date: Mon Apr 6 20:24:44 2026 +0530
drm/xe/ras: Add flag for Xe RAS
Add a flag for RAS. If enabled, XE driver registers with
drm_ras and exposes supported counters.
Currently this is enabled for PVC and CRI.
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
+ /mt/dim checkpatch 7b7217a9e27a82ef10be22ab3a55ad5bbc849688 drm-intel
0627e7e5cc01 drm/xe/uapi: Add additional error components to XE drm_ras
4e5d68e25364 drm/xe/xe_ras: Add structures and commands for get and clear counter
-:12: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#12:
new file mode 100644
-:103: WARNING:LONG_LINE_COMMENT: line length of 102 exceeds 100 columns
#103: FILE: drivers/gpu/drm/xe/xe_ras_types.h:87:
+ /** @num_headers: Number of detailed counter headers present at the beginning of queue data */
total: 0 errors, 2 warnings, 0 checks, 197 lines checked
b32315d55490 drm/xe/xe_ras: Add support to query error counter for CRI
-:103: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#103:
new file mode 100644
-:150: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#150: FILE: drivers/gpu/drm/xe/xe_ras.c:43:
+};
+static_assert(ARRAY_SIZE(drm_to_xe_ras_component) == DRM_XE_RAS_ERR_COMP_MAX);
-:157: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#157: FILE: drivers/gpu/drm/xe/xe_ras.c:50:
+};
+static_assert(ARRAY_SIZE(drm_to_xe_ras_severity) == DRM_XE_RAS_ERR_SEV_MAX);
total: 0 errors, 1 warnings, 2 checks, 197 lines checked
1831db2533e6 drm/xe/xe_ras: Add helper to clear error counter
11d773bb3c97 drm/xe/ras: Add flag for Xe RAS
-:21: WARNING:LONG_LINE_COMMENT: line length of 101 exceeds 100 columns
#21: FILE: drivers/gpu/drm/xe/xe_device_types.h:194:
+ /** @info.has_ras: Device supports RAS (Reliability, Availability, Serviceability) */
total: 0 errors, 1 warnings, 0 checks, 44 lines checked
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ CI.KUnit: success for Add get-error-counter and clear-error-counter support for CRI
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
` (5 preceding siblings ...)
2026-04-06 14:54 ` ✗ CI.checkpatch: warning for Add get-error-counter and clear-error-counter support for CRI Patchwork
@ 2026-04-06 14:56 ` Patchwork
2026-04-06 15:32 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-06 18:50 ` ✗ Xe.CI.FULL: failure " Patchwork
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-04-06 14:56 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
== Series Details ==
Series: Add get-error-counter and clear-error-counter support for CRI
URL : https://patchwork.freedesktop.org/series/164393/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[14:54:57] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:55:02] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:55:33] Starting KUnit Kernel (1/1)...
[14:55:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:55:33] ================== guc_buf (11 subtests) ===================
[14:55:33] [PASSED] test_smallest
[14:55:33] [PASSED] test_largest
[14:55:33] [PASSED] test_granular
[14:55:33] [PASSED] test_unique
[14:55:33] [PASSED] test_overlap
[14:55:33] [PASSED] test_reusable
[14:55:33] [PASSED] test_too_big
[14:55:33] [PASSED] test_flush
[14:55:33] [PASSED] test_lookup
[14:55:33] [PASSED] test_data
[14:55:33] [PASSED] test_class
[14:55:33] ===================== [PASSED] guc_buf =====================
[14:55:33] =================== guc_dbm (7 subtests) ===================
[14:55:33] [PASSED] test_empty
[14:55:33] [PASSED] test_default
[14:55:33] ======================== test_size ========================
[14:55:33] [PASSED] 4
[14:55:33] [PASSED] 8
[14:55:33] [PASSED] 32
[14:55:33] [PASSED] 256
[14:55:33] ==================== [PASSED] test_size ====================
[14:55:33] ======================= test_reuse ========================
[14:55:33] [PASSED] 4
[14:55:33] [PASSED] 8
[14:55:33] [PASSED] 32
[14:55:33] [PASSED] 256
[14:55:33] =================== [PASSED] test_reuse ====================
[14:55:33] =================== test_range_overlap ====================
[14:55:33] [PASSED] 4
[14:55:33] [PASSED] 8
[14:55:33] [PASSED] 32
[14:55:33] [PASSED] 256
[14:55:33] =============== [PASSED] test_range_overlap ================
[14:55:33] =================== test_range_compact ====================
[14:55:33] [PASSED] 4
[14:55:33] [PASSED] 8
[14:55:33] [PASSED] 32
[14:55:33] [PASSED] 256
[14:55:33] =============== [PASSED] test_range_compact ================
[14:55:33] ==================== test_range_spare =====================
[14:55:33] [PASSED] 4
[14:55:33] [PASSED] 8
[14:55:33] [PASSED] 32
[14:55:33] [PASSED] 256
[14:55:33] ================ [PASSED] test_range_spare =================
[14:55:33] ===================== [PASSED] guc_dbm =====================
[14:55:33] =================== guc_idm (6 subtests) ===================
[14:55:33] [PASSED] bad_init
[14:55:33] [PASSED] no_init
[14:55:33] [PASSED] init_fini
[14:55:33] [PASSED] check_used
[14:55:33] [PASSED] check_quota
[14:55:33] [PASSED] check_all
[14:55:33] ===================== [PASSED] guc_idm =====================
[14:55:33] ================== no_relay (3 subtests) ===================
[14:55:33] [PASSED] xe_drops_guc2pf_if_not_ready
[14:55:33] [PASSED] xe_drops_guc2vf_if_not_ready
[14:55:33] [PASSED] xe_rejects_send_if_not_ready
[14:55:33] ==================== [PASSED] no_relay =====================
[14:55:33] ================== pf_relay (14 subtests) ==================
[14:55:33] [PASSED] pf_rejects_guc2pf_too_short
[14:55:33] [PASSED] pf_rejects_guc2pf_too_long
[14:55:33] [PASSED] pf_rejects_guc2pf_no_payload
[14:55:33] [PASSED] pf_fails_no_payload
[14:55:33] [PASSED] pf_fails_bad_origin
[14:55:33] [PASSED] pf_fails_bad_type
[14:55:33] [PASSED] pf_txn_reports_error
[14:55:33] [PASSED] pf_txn_sends_pf2guc
[14:55:33] [PASSED] pf_sends_pf2guc
[14:55:33] [SKIPPED] pf_loopback_nop
[14:55:33] [SKIPPED] pf_loopback_echo
[14:55:33] [SKIPPED] pf_loopback_fail
[14:55:33] [SKIPPED] pf_loopback_busy
[14:55:33] [SKIPPED] pf_loopback_retry
[14:55:33] ==================== [PASSED] pf_relay =====================
[14:55:33] ================== vf_relay (3 subtests) ===================
[14:55:33] [PASSED] vf_rejects_guc2vf_too_short
[14:55:33] [PASSED] vf_rejects_guc2vf_too_long
[14:55:33] [PASSED] vf_rejects_guc2vf_no_payload
[14:55:33] ==================== [PASSED] vf_relay =====================
[14:55:33] ================ pf_gt_config (9 subtests) =================
[14:55:33] [PASSED] fair_contexts_1vf
[14:55:33] [PASSED] fair_doorbells_1vf
[14:55:33] [PASSED] fair_ggtt_1vf
[14:55:33] ====================== fair_vram_1vf ======================
[14:55:33] [PASSED] 3.50 GiB
[14:55:33] [PASSED] 11.5 GiB
[14:55:33] [PASSED] 15.5 GiB
[14:55:33] [PASSED] 31.5 GiB
[14:55:33] [PASSED] 63.5 GiB
[14:55:33] [PASSED] 1.91 GiB
[14:55:33] ================== [PASSED] fair_vram_1vf ==================
[14:55:33] ================ fair_vram_1vf_admin_only =================
[14:55:33] [PASSED] 3.50 GiB
[14:55:33] [PASSED] 11.5 GiB
[14:55:33] [PASSED] 15.5 GiB
[14:55:33] [PASSED] 31.5 GiB
[14:55:33] [PASSED] 63.5 GiB
[14:55:33] [PASSED] 1.91 GiB
[14:55:33] ============ [PASSED] fair_vram_1vf_admin_only =============
[14:55:33] ====================== fair_contexts ======================
[14:55:33] [PASSED] 1 VF
[14:55:33] [PASSED] 2 VFs
[14:55:33] [PASSED] 3 VFs
[14:55:33] [PASSED] 4 VFs
[14:55:33] [PASSED] 5 VFs
[14:55:33] [PASSED] 6 VFs
[14:55:33] [PASSED] 7 VFs
[14:55:33] [PASSED] 8 VFs
[14:55:33] [PASSED] 9 VFs
[14:55:33] [PASSED] 10 VFs
[14:55:33] [PASSED] 11 VFs
[14:55:33] [PASSED] 12 VFs
[14:55:33] [PASSED] 13 VFs
[14:55:33] [PASSED] 14 VFs
[14:55:33] [PASSED] 15 VFs
[14:55:33] [PASSED] 16 VFs
[14:55:33] [PASSED] 17 VFs
[14:55:33] [PASSED] 18 VFs
[14:55:33] [PASSED] 19 VFs
[14:55:33] [PASSED] 20 VFs
[14:55:33] [PASSED] 21 VFs
[14:55:33] [PASSED] 22 VFs
[14:55:33] [PASSED] 23 VFs
[14:55:33] [PASSED] 24 VFs
[14:55:33] [PASSED] 25 VFs
[14:55:33] [PASSED] 26 VFs
[14:55:33] [PASSED] 27 VFs
[14:55:33] [PASSED] 28 VFs
[14:55:33] [PASSED] 29 VFs
[14:55:33] [PASSED] 30 VFs
[14:55:33] [PASSED] 31 VFs
[14:55:33] [PASSED] 32 VFs
[14:55:33] [PASSED] 33 VFs
[14:55:33] [PASSED] 34 VFs
[14:55:33] [PASSED] 35 VFs
[14:55:33] [PASSED] 36 VFs
[14:55:33] [PASSED] 37 VFs
[14:55:33] [PASSED] 38 VFs
[14:55:33] [PASSED] 39 VFs
[14:55:33] [PASSED] 40 VFs
[14:55:33] [PASSED] 41 VFs
[14:55:33] [PASSED] 42 VFs
[14:55:33] [PASSED] 43 VFs
[14:55:33] [PASSED] 44 VFs
[14:55:33] [PASSED] 45 VFs
[14:55:33] [PASSED] 46 VFs
[14:55:33] [PASSED] 47 VFs
[14:55:33] [PASSED] 48 VFs
[14:55:33] [PASSED] 49 VFs
[14:55:33] [PASSED] 50 VFs
[14:55:33] [PASSED] 51 VFs
[14:55:33] [PASSED] 52 VFs
[14:55:33] [PASSED] 53 VFs
[14:55:33] [PASSED] 54 VFs
[14:55:33] [PASSED] 55 VFs
[14:55:33] [PASSED] 56 VFs
[14:55:33] [PASSED] 57 VFs
[14:55:33] [PASSED] 58 VFs
[14:55:33] [PASSED] 59 VFs
[14:55:33] [PASSED] 60 VFs
[14:55:33] [PASSED] 61 VFs
[14:55:33] [PASSED] 62 VFs
[14:55:33] [PASSED] 63 VFs
[14:55:33] ================== [PASSED] fair_contexts ==================
[14:55:34] ===================== fair_doorbells ======================
[14:55:34] [PASSED] 1 VF
[14:55:34] [PASSED] 2 VFs
[14:55:34] [PASSED] 3 VFs
[14:55:34] [PASSED] 4 VFs
[14:55:34] [PASSED] 5 VFs
[14:55:34] [PASSED] 6 VFs
[14:55:34] [PASSED] 7 VFs
[14:55:34] [PASSED] 8 VFs
[14:55:34] [PASSED] 9 VFs
[14:55:34] [PASSED] 10 VFs
[14:55:34] [PASSED] 11 VFs
[14:55:34] [PASSED] 12 VFs
[14:55:34] [PASSED] 13 VFs
[14:55:34] [PASSED] 14 VFs
[14:55:34] [PASSED] 15 VFs
[14:55:34] [PASSED] 16 VFs
[14:55:34] [PASSED] 17 VFs
[14:55:34] [PASSED] 18 VFs
[14:55:34] [PASSED] 19 VFs
[14:55:34] [PASSED] 20 VFs
[14:55:34] [PASSED] 21 VFs
[14:55:34] [PASSED] 22 VFs
[14:55:34] [PASSED] 23 VFs
[14:55:34] [PASSED] 24 VFs
[14:55:34] [PASSED] 25 VFs
[14:55:34] [PASSED] 26 VFs
[14:55:34] [PASSED] 27 VFs
[14:55:34] [PASSED] 28 VFs
[14:55:34] [PASSED] 29 VFs
[14:55:34] [PASSED] 30 VFs
[14:55:34] [PASSED] 31 VFs
[14:55:34] [PASSED] 32 VFs
[14:55:34] [PASSED] 33 VFs
[14:55:34] [PASSED] 34 VFs
[14:55:34] [PASSED] 35 VFs
[14:55:34] [PASSED] 36 VFs
[14:55:34] [PASSED] 37 VFs
[14:55:34] [PASSED] 38 VFs
[14:55:34] [PASSED] 39 VFs
[14:55:34] [PASSED] 40 VFs
[14:55:34] [PASSED] 41 VFs
[14:55:34] [PASSED] 42 VFs
[14:55:34] [PASSED] 43 VFs
[14:55:34] [PASSED] 44 VFs
[14:55:34] [PASSED] 45 VFs
[14:55:34] [PASSED] 46 VFs
[14:55:34] [PASSED] 47 VFs
[14:55:34] [PASSED] 48 VFs
[14:55:34] [PASSED] 49 VFs
[14:55:34] [PASSED] 50 VFs
[14:55:34] [PASSED] 51 VFs
[14:55:34] [PASSED] 52 VFs
[14:55:34] [PASSED] 53 VFs
[14:55:34] [PASSED] 54 VFs
[14:55:34] [PASSED] 55 VFs
[14:55:34] [PASSED] 56 VFs
[14:55:34] [PASSED] 57 VFs
[14:55:34] [PASSED] 58 VFs
[14:55:34] [PASSED] 59 VFs
[14:55:34] [PASSED] 60 VFs
[14:55:34] [PASSED] 61 VFs
[14:55:34] [PASSED] 62 VFs
[14:55:34] [PASSED] 63 VFs
[14:55:34] ================= [PASSED] fair_doorbells ==================
[14:55:34] ======================== fair_ggtt ========================
[14:55:34] [PASSED] 1 VF
[14:55:34] [PASSED] 2 VFs
[14:55:34] [PASSED] 3 VFs
[14:55:34] [PASSED] 4 VFs
[14:55:34] [PASSED] 5 VFs
[14:55:34] [PASSED] 6 VFs
[14:55:34] [PASSED] 7 VFs
[14:55:34] [PASSED] 8 VFs
[14:55:34] [PASSED] 9 VFs
[14:55:34] [PASSED] 10 VFs
[14:55:34] [PASSED] 11 VFs
[14:55:34] [PASSED] 12 VFs
[14:55:34] [PASSED] 13 VFs
[14:55:34] [PASSED] 14 VFs
[14:55:34] [PASSED] 15 VFs
[14:55:34] [PASSED] 16 VFs
[14:55:34] [PASSED] 17 VFs
[14:55:34] [PASSED] 18 VFs
[14:55:34] [PASSED] 19 VFs
[14:55:34] [PASSED] 20 VFs
[14:55:34] [PASSED] 21 VFs
[14:55:34] [PASSED] 22 VFs
[14:55:34] [PASSED] 23 VFs
[14:55:34] [PASSED] 24 VFs
[14:55:34] [PASSED] 25 VFs
[14:55:34] [PASSED] 26 VFs
[14:55:34] [PASSED] 27 VFs
[14:55:34] [PASSED] 28 VFs
[14:55:34] [PASSED] 29 VFs
[14:55:34] [PASSED] 30 VFs
[14:55:34] [PASSED] 31 VFs
[14:55:34] [PASSED] 32 VFs
[14:55:34] [PASSED] 33 VFs
[14:55:34] [PASSED] 34 VFs
[14:55:34] [PASSED] 35 VFs
[14:55:34] [PASSED] 36 VFs
[14:55:34] [PASSED] 37 VFs
[14:55:34] [PASSED] 38 VFs
[14:55:34] [PASSED] 39 VFs
[14:55:34] [PASSED] 40 VFs
[14:55:34] [PASSED] 41 VFs
[14:55:34] [PASSED] 42 VFs
[14:55:34] [PASSED] 43 VFs
[14:55:34] [PASSED] 44 VFs
[14:55:34] [PASSED] 45 VFs
[14:55:34] [PASSED] 46 VFs
[14:55:34] [PASSED] 47 VFs
[14:55:34] [PASSED] 48 VFs
[14:55:34] [PASSED] 49 VFs
[14:55:34] [PASSED] 50 VFs
[14:55:34] [PASSED] 51 VFs
[14:55:34] [PASSED] 52 VFs
[14:55:34] [PASSED] 53 VFs
[14:55:34] [PASSED] 54 VFs
[14:55:34] [PASSED] 55 VFs
[14:55:34] [PASSED] 56 VFs
[14:55:34] [PASSED] 57 VFs
[14:55:34] [PASSED] 58 VFs
[14:55:34] [PASSED] 59 VFs
[14:55:34] [PASSED] 60 VFs
[14:55:34] [PASSED] 61 VFs
[14:55:34] [PASSED] 62 VFs
[14:55:34] [PASSED] 63 VFs
[14:55:34] ==================== [PASSED] fair_ggtt ====================
[14:55:34] ======================== fair_vram ========================
[14:55:34] [PASSED] 1 VF
[14:55:34] [PASSED] 2 VFs
[14:55:34] [PASSED] 3 VFs
[14:55:34] [PASSED] 4 VFs
[14:55:34] [PASSED] 5 VFs
[14:55:34] [PASSED] 6 VFs
[14:55:34] [PASSED] 7 VFs
[14:55:34] [PASSED] 8 VFs
[14:55:34] [PASSED] 9 VFs
[14:55:34] [PASSED] 10 VFs
[14:55:34] [PASSED] 11 VFs
[14:55:34] [PASSED] 12 VFs
[14:55:34] [PASSED] 13 VFs
[14:55:34] [PASSED] 14 VFs
[14:55:34] [PASSED] 15 VFs
[14:55:34] [PASSED] 16 VFs
[14:55:34] [PASSED] 17 VFs
[14:55:34] [PASSED] 18 VFs
[14:55:34] [PASSED] 19 VFs
[14:55:34] [PASSED] 20 VFs
[14:55:34] [PASSED] 21 VFs
[14:55:34] [PASSED] 22 VFs
[14:55:34] [PASSED] 23 VFs
[14:55:34] [PASSED] 24 VFs
[14:55:34] [PASSED] 25 VFs
[14:55:34] [PASSED] 26 VFs
[14:55:34] [PASSED] 27 VFs
[14:55:34] [PASSED] 28 VFs
[14:55:34] [PASSED] 29 VFs
[14:55:34] [PASSED] 30 VFs
[14:55:34] [PASSED] 31 VFs
[14:55:34] [PASSED] 32 VFs
[14:55:34] [PASSED] 33 VFs
[14:55:34] [PASSED] 34 VFs
[14:55:34] [PASSED] 35 VFs
[14:55:34] [PASSED] 36 VFs
[14:55:34] [PASSED] 37 VFs
[14:55:34] [PASSED] 38 VFs
[14:55:34] [PASSED] 39 VFs
[14:55:34] [PASSED] 40 VFs
[14:55:34] [PASSED] 41 VFs
[14:55:34] [PASSED] 42 VFs
[14:55:34] [PASSED] 43 VFs
[14:55:34] [PASSED] 44 VFs
[14:55:34] [PASSED] 45 VFs
[14:55:34] [PASSED] 46 VFs
[14:55:34] [PASSED] 47 VFs
[14:55:34] [PASSED] 48 VFs
[14:55:34] [PASSED] 49 VFs
[14:55:34] [PASSED] 50 VFs
[14:55:34] [PASSED] 51 VFs
[14:55:34] [PASSED] 52 VFs
[14:55:34] [PASSED] 53 VFs
[14:55:34] [PASSED] 54 VFs
[14:55:34] [PASSED] 55 VFs
[14:55:34] [PASSED] 56 VFs
[14:55:34] [PASSED] 57 VFs
[14:55:34] [PASSED] 58 VFs
[14:55:34] [PASSED] 59 VFs
[14:55:34] [PASSED] 60 VFs
[14:55:34] [PASSED] 61 VFs
[14:55:34] [PASSED] 62 VFs
[14:55:34] [PASSED] 63 VFs
[14:55:34] ==================== [PASSED] fair_vram ====================
[14:55:34] ================== [PASSED] pf_gt_config ===================
[14:55:34] ===================== lmtt (1 subtest) =====================
[14:55:34] ======================== test_ops =========================
[14:55:34] [PASSED] 2-level
[14:55:34] [PASSED] multi-level
[14:55:34] ==================== [PASSED] test_ops =====================
[14:55:34] ====================== [PASSED] lmtt =======================
[14:55:34] ================= pf_service (11 subtests) =================
[14:55:34] [PASSED] pf_negotiate_any
[14:55:34] [PASSED] pf_negotiate_base_match
[14:55:34] [PASSED] pf_negotiate_base_newer
[14:55:34] [PASSED] pf_negotiate_base_next
[14:55:34] [SKIPPED] pf_negotiate_base_older
[14:55:34] [PASSED] pf_negotiate_base_prev
[14:55:34] [PASSED] pf_negotiate_latest_match
[14:55:34] [PASSED] pf_negotiate_latest_newer
[14:55:34] [PASSED] pf_negotiate_latest_next
[14:55:34] [SKIPPED] pf_negotiate_latest_older
[14:55:34] [SKIPPED] pf_negotiate_latest_prev
[14:55:34] =================== [PASSED] pf_service ====================
[14:55:34] ================= xe_guc_g2g (2 subtests) ==================
[14:55:34] ============== xe_live_guc_g2g_kunit_default ==============
[14:55:34] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[14:55:34] ============== xe_live_guc_g2g_kunit_allmem ===============
[14:55:34] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[14:55:34] =================== [SKIPPED] xe_guc_g2g ===================
[14:55:34] =================== xe_mocs (2 subtests) ===================
[14:55:34] ================ xe_live_mocs_kernel_kunit ================
[14:55:34] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[14:55:34] ================ xe_live_mocs_reset_kunit =================
[14:55:34] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[14:55:34] ==================== [SKIPPED] xe_mocs =====================
[14:55:34] ================= xe_migrate (2 subtests) ==================
[14:55:34] ================= xe_migrate_sanity_kunit =================
[14:55:34] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[14:55:34] ================== xe_validate_ccs_kunit ==================
[14:55:34] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[14:55:34] =================== [SKIPPED] xe_migrate ===================
[14:55:34] ================== xe_dma_buf (1 subtest) ==================
[14:55:34] ==================== xe_dma_buf_kunit =====================
[14:55:34] ================ [SKIPPED] xe_dma_buf_kunit ================
[14:55:34] =================== [SKIPPED] xe_dma_buf ===================
[14:55:34] ================= xe_bo_shrink (1 subtest) =================
[14:55:34] =================== xe_bo_shrink_kunit ====================
[14:55:34] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[14:55:34] ================== [SKIPPED] xe_bo_shrink ==================
[14:55:34] ==================== xe_bo (2 subtests) ====================
[14:55:34] ================== xe_ccs_migrate_kunit ===================
[14:55:34] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[14:55:34] ==================== xe_bo_evict_kunit ====================
[14:55:34] =============== [SKIPPED] xe_bo_evict_kunit ================
[14:55:34] ===================== [SKIPPED] xe_bo ======================
[14:55:34] ==================== args (13 subtests) ====================
[14:55:34] [PASSED] count_args_test
[14:55:34] [PASSED] call_args_example
[14:55:34] [PASSED] call_args_test
[14:55:34] [PASSED] drop_first_arg_example
[14:55:34] [PASSED] drop_first_arg_test
[14:55:34] [PASSED] first_arg_example
[14:55:34] [PASSED] first_arg_test
[14:55:34] [PASSED] last_arg_example
[14:55:34] [PASSED] last_arg_test
[14:55:34] [PASSED] pick_arg_example
[14:55:34] [PASSED] if_args_example
[14:55:34] [PASSED] if_args_test
[14:55:34] [PASSED] sep_comma_example
[14:55:34] ====================== [PASSED] args =======================
[14:55:34] =================== xe_pci (3 subtests) ====================
[14:55:34] ==================== check_graphics_ip ====================
[14:55:34] [PASSED] 12.00 Xe_LP
[14:55:34] [PASSED] 12.10 Xe_LP+
[14:55:34] [PASSED] 12.55 Xe_HPG
[14:55:34] [PASSED] 12.60 Xe_HPC
[14:55:34] [PASSED] 12.70 Xe_LPG
[14:55:34] [PASSED] 12.71 Xe_LPG
[14:55:34] [PASSED] 12.74 Xe_LPG+
[14:55:34] [PASSED] 20.01 Xe2_HPG
[14:55:34] [PASSED] 20.02 Xe2_HPG
[14:55:34] [PASSED] 20.04 Xe2_LPG
[14:55:34] [PASSED] 30.00 Xe3_LPG
[14:55:34] [PASSED] 30.01 Xe3_LPG
[14:55:34] [PASSED] 30.03 Xe3_LPG
[14:55:34] [PASSED] 30.04 Xe3_LPG
[14:55:34] [PASSED] 30.05 Xe3_LPG
[14:55:34] [PASSED] 35.10 Xe3p_LPG
[14:55:34] [PASSED] 35.11 Xe3p_XPC
[14:55:34] ================ [PASSED] check_graphics_ip ================
[14:55:34] ===================== check_media_ip ======================
[14:55:34] [PASSED] 12.00 Xe_M
[14:55:34] [PASSED] 12.55 Xe_HPM
[14:55:34] [PASSED] 13.00 Xe_LPM+
[14:55:34] [PASSED] 13.01 Xe2_HPM
[14:55:34] [PASSED] 20.00 Xe2_LPM
[14:55:34] [PASSED] 30.00 Xe3_LPM
[14:55:34] [PASSED] 30.02 Xe3_LPM
[14:55:34] [PASSED] 35.00 Xe3p_LPM
[14:55:34] [PASSED] 35.03 Xe3p_HPM
[14:55:34] ================= [PASSED] check_media_ip ==================
[14:55:34] =================== check_platform_desc ===================
[14:55:34] [PASSED] 0x9A60 (TIGERLAKE)
[14:55:34] [PASSED] 0x9A68 (TIGERLAKE)
[14:55:34] [PASSED] 0x9A70 (TIGERLAKE)
[14:55:34] [PASSED] 0x9A40 (TIGERLAKE)
[14:55:34] [PASSED] 0x9A49 (TIGERLAKE)
[14:55:34] [PASSED] 0x9A59 (TIGERLAKE)
[14:55:34] [PASSED] 0x9A78 (TIGERLAKE)
[14:55:34] [PASSED] 0x9AC0 (TIGERLAKE)
[14:55:34] [PASSED] 0x9AC9 (TIGERLAKE)
[14:55:34] [PASSED] 0x9AD9 (TIGERLAKE)
[14:55:34] [PASSED] 0x9AF8 (TIGERLAKE)
[14:55:34] [PASSED] 0x4C80 (ROCKETLAKE)
[14:55:34] [PASSED] 0x4C8A (ROCKETLAKE)
[14:55:34] [PASSED] 0x4C8B (ROCKETLAKE)
[14:55:34] [PASSED] 0x4C8C (ROCKETLAKE)
[14:55:34] [PASSED] 0x4C90 (ROCKETLAKE)
[14:55:34] [PASSED] 0x4C9A (ROCKETLAKE)
[14:55:34] [PASSED] 0x4680 (ALDERLAKE_S)
[14:55:34] [PASSED] 0x4682 (ALDERLAKE_S)
[14:55:34] [PASSED] 0x4688 (ALDERLAKE_S)
[14:55:34] [PASSED] 0x468A (ALDERLAKE_S)
[14:55:34] [PASSED] 0x468B (ALDERLAKE_S)
[14:55:34] [PASSED] 0x4690 (ALDERLAKE_S)
[14:55:34] [PASSED] 0x4692 (ALDERLAKE_S)
[14:55:34] [PASSED] 0x4693 (ALDERLAKE_S)
[14:55:34] [PASSED] 0x46A0 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46A1 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46A2 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46A3 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46A6 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46A8 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46AA (ALDERLAKE_P)
[14:55:34] [PASSED] 0x462A (ALDERLAKE_P)
[14:55:34] [PASSED] 0x4626 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x4628 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46B0 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46B1 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46B2 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46B3 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46C0 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46C1 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46C2 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46C3 (ALDERLAKE_P)
[14:55:34] [PASSED] 0x46D0 (ALDERLAKE_N)
[14:55:34] [PASSED] 0x46D1 (ALDERLAKE_N)
[14:55:34] [PASSED] 0x46D2 (ALDERLAKE_N)
[14:55:34] [PASSED] 0x46D3 (ALDERLAKE_N)
[14:55:34] [PASSED] 0x46D4 (ALDERLAKE_N)
[14:55:34] [PASSED] 0xA721 (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA7A1 (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA7A9 (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA7AC (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA7AD (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA720 (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA7A0 (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA7A8 (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA7AA (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA7AB (ALDERLAKE_P)
[14:55:34] [PASSED] 0xA780 (ALDERLAKE_S)
[14:55:34] [PASSED] 0xA781 (ALDERLAKE_S)
[14:55:34] [PASSED] 0xA782 (ALDERLAKE_S)
[14:55:34] [PASSED] 0xA783 (ALDERLAKE_S)
[14:55:34] [PASSED] 0xA788 (ALDERLAKE_S)
[14:55:34] [PASSED] 0xA789 (ALDERLAKE_S)
[14:55:34] [PASSED] 0xA78A (ALDERLAKE_S)
[14:55:34] [PASSED] 0xA78B (ALDERLAKE_S)
[14:55:34] [PASSED] 0x4905 (DG1)
[14:55:34] [PASSED] 0x4906 (DG1)
[14:55:34] [PASSED] 0x4907 (DG1)
[14:55:34] [PASSED] 0x4908 (DG1)
[14:55:34] [PASSED] 0x4909 (DG1)
[14:55:34] [PASSED] 0x56C0 (DG2)
[14:55:34] [PASSED] 0x56C2 (DG2)
[14:55:34] [PASSED] 0x56C1 (DG2)
[14:55:34] [PASSED] 0x7D51 (METEORLAKE)
[14:55:34] [PASSED] 0x7DD1 (METEORLAKE)
[14:55:34] [PASSED] 0x7D41 (METEORLAKE)
[14:55:34] [PASSED] 0x7D67 (METEORLAKE)
[14:55:34] [PASSED] 0xB640 (METEORLAKE)
[14:55:34] [PASSED] 0x56A0 (DG2)
[14:55:34] [PASSED] 0x56A1 (DG2)
[14:55:34] [PASSED] 0x56A2 (DG2)
[14:55:34] [PASSED] 0x56BE (DG2)
[14:55:34] [PASSED] 0x56BF (DG2)
[14:55:34] [PASSED] 0x5690 (DG2)
[14:55:34] [PASSED] 0x5691 (DG2)
[14:55:34] [PASSED] 0x5692 (DG2)
[14:55:34] [PASSED] 0x56A5 (DG2)
[14:55:34] [PASSED] 0x56A6 (DG2)
[14:55:34] [PASSED] 0x56B0 (DG2)
[14:55:34] [PASSED] 0x56B1 (DG2)
[14:55:34] [PASSED] 0x56BA (DG2)
[14:55:34] [PASSED] 0x56BB (DG2)
[14:55:34] [PASSED] 0x56BC (DG2)
[14:55:34] [PASSED] 0x56BD (DG2)
[14:55:34] [PASSED] 0x5693 (DG2)
[14:55:34] [PASSED] 0x5694 (DG2)
[14:55:34] [PASSED] 0x5695 (DG2)
[14:55:34] [PASSED] 0x56A3 (DG2)
[14:55:34] [PASSED] 0x56A4 (DG2)
[14:55:34] [PASSED] 0x56B2 (DG2)
[14:55:34] [PASSED] 0x56B3 (DG2)
[14:55:34] [PASSED] 0x5696 (DG2)
[14:55:34] [PASSED] 0x5697 (DG2)
[14:55:34] [PASSED] 0xB69 (PVC)
[14:55:34] [PASSED] 0xB6E (PVC)
[14:55:34] [PASSED] 0xBD4 (PVC)
[14:55:34] [PASSED] 0xBD5 (PVC)
[14:55:34] [PASSED] 0xBD6 (PVC)
[14:55:34] [PASSED] 0xBD7 (PVC)
[14:55:34] [PASSED] 0xBD8 (PVC)
[14:55:34] [PASSED] 0xBD9 (PVC)
[14:55:34] [PASSED] 0xBDA (PVC)
[14:55:34] [PASSED] 0xBDB (PVC)
[14:55:34] [PASSED] 0xBE0 (PVC)
[14:55:34] [PASSED] 0xBE1 (PVC)
[14:55:34] [PASSED] 0xBE5 (PVC)
[14:55:34] [PASSED] 0x7D40 (METEORLAKE)
[14:55:34] [PASSED] 0x7D45 (METEORLAKE)
[14:55:34] [PASSED] 0x7D55 (METEORLAKE)
[14:55:34] [PASSED] 0x7D60 (METEORLAKE)
[14:55:34] [PASSED] 0x7DD5 (METEORLAKE)
[14:55:34] [PASSED] 0x6420 (LUNARLAKE)
[14:55:34] [PASSED] 0x64A0 (LUNARLAKE)
[14:55:34] [PASSED] 0x64B0 (LUNARLAKE)
[14:55:34] [PASSED] 0xE202 (BATTLEMAGE)
[14:55:34] [PASSED] 0xE209 (BATTLEMAGE)
[14:55:34] [PASSED] 0xE20B (BATTLEMAGE)
[14:55:34] [PASSED] 0xE20C (BATTLEMAGE)
[14:55:34] [PASSED] 0xE20D (BATTLEMAGE)
[14:55:34] [PASSED] 0xE210 (BATTLEMAGE)
[14:55:34] [PASSED] 0xE211 (BATTLEMAGE)
[14:55:34] [PASSED] 0xE212 (BATTLEMAGE)
[14:55:34] [PASSED] 0xE216 (BATTLEMAGE)
[14:55:34] [PASSED] 0xE220 (BATTLEMAGE)
[14:55:34] [PASSED] 0xE221 (BATTLEMAGE)
[14:55:34] [PASSED] 0xE222 (BATTLEMAGE)
[14:55:34] [PASSED] 0xE223 (BATTLEMAGE)
[14:55:34] [PASSED] 0xB080 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB081 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB082 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB083 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB084 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB085 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB086 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB087 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB08F (PANTHERLAKE)
[14:55:34] [PASSED] 0xB090 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB0A0 (PANTHERLAKE)
[14:55:34] [PASSED] 0xB0B0 (PANTHERLAKE)
[14:55:34] [PASSED] 0xFD80 (PANTHERLAKE)
[14:55:34] [PASSED] 0xFD81 (PANTHERLAKE)
[14:55:34] [PASSED] 0xD740 (NOVALAKE_S)
[14:55:34] [PASSED] 0xD741 (NOVALAKE_S)
[14:55:34] [PASSED] 0xD742 (NOVALAKE_S)
[14:55:34] [PASSED] 0xD743 (NOVALAKE_S)
[14:55:34] [PASSED] 0xD744 (NOVALAKE_S)
[14:55:34] [PASSED] 0xD745 (NOVALAKE_S)
[14:55:34] [PASSED] 0x674C (CRESCENTISLAND)
[14:55:34] [PASSED] 0xD750 (NOVALAKE_P)
[14:55:34] [PASSED] 0xD751 (NOVALAKE_P)
[14:55:34] [PASSED] 0xD752 (NOVALAKE_P)
[14:55:34] [PASSED] 0xD753 (NOVALAKE_P)
[14:55:34] [PASSED] 0xD754 (NOVALAKE_P)
[14:55:34] [PASSED] 0xD755 (NOVALAKE_P)
[14:55:34] [PASSED] 0xD756 (NOVALAKE_P)
[14:55:34] [PASSED] 0xD757 (NOVALAKE_P)
[14:55:34] [PASSED] 0xD75F (NOVALAKE_P)
[14:55:34] =============== [PASSED] check_platform_desc ===============
[14:55:34] ===================== [PASSED] xe_pci ======================
[14:55:34] =================== xe_rtp (2 subtests) ====================
[14:55:34] =============== xe_rtp_process_to_sr_tests ================
[14:55:34] [PASSED] coalesce-same-reg
[14:55:34] [PASSED] no-match-no-add
[14:55:34] [PASSED] match-or
[14:55:34] [PASSED] match-or-xfail
[14:55:34] [PASSED] no-match-no-add-multiple-rules
[14:55:34] [PASSED] two-regs-two-entries
[14:55:34] [PASSED] clr-one-set-other
[14:55:34] [PASSED] set-field
[14:55:34] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[14:55:34] [PASSED] conflict-not-disjoint
[14:55:34] [PASSED] conflict-reg-type
[14:55:34] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[14:55:34] ================== xe_rtp_process_tests ===================
[14:55:34] [PASSED] active1
[14:55:34] [PASSED] active2
[14:55:34] [PASSED] active-inactive
[14:55:34] [PASSED] inactive-active
[14:55:34] [PASSED] inactive-1st_or_active-inactive
[14:55:34] [PASSED] inactive-2nd_or_active-inactive
[14:55:34] [PASSED] inactive-last_or_active-inactive
[14:55:34] [PASSED] inactive-no_or_active-inactive
[14:55:34] ============== [PASSED] xe_rtp_process_tests ===============
[14:55:34] ===================== [PASSED] xe_rtp ======================
[14:55:34] ==================== xe_wa (1 subtest) =====================
[14:55:34] ======================== xe_wa_gt =========================
[14:55:34] [PASSED] TIGERLAKE B0
[14:55:34] [PASSED] DG1 A0
[14:55:34] [PASSED] DG1 B0
[14:55:34] [PASSED] ALDERLAKE_S A0
[14:55:34] [PASSED] ALDERLAKE_S B0
[14:55:34] [PASSED] ALDERLAKE_S C0
[14:55:34] [PASSED] ALDERLAKE_S D0
[14:55:34] [PASSED] ALDERLAKE_P A0
[14:55:34] [PASSED] ALDERLAKE_P B0
[14:55:34] [PASSED] ALDERLAKE_P C0
[14:55:34] [PASSED] ALDERLAKE_S RPLS D0
[14:55:34] [PASSED] ALDERLAKE_P RPLU E0
[14:55:34] [PASSED] DG2 G10 C0
[14:55:34] [PASSED] DG2 G11 B1
[14:55:34] [PASSED] DG2 G12 A1
[14:55:34] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:55:34] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:55:34] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[14:55:34] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[14:55:34] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[14:55:34] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[14:55:34] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[14:55:34] ==================== [PASSED] xe_wa_gt =====================
[14:55:34] ====================== [PASSED] xe_wa ======================
[14:55:34] ============================================================
[14:55:34] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[14:55:34] Elapsed time: 36.276s total, 4.277s configuring, 31.382s building, 0.597s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[14:55:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:55:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:56:00] Starting KUnit Kernel (1/1)...
[14:56:00] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:56:00] ============ drm_test_pick_cmdline (2 subtests) ============
[14:56:00] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[14:56:00] =============== drm_test_pick_cmdline_named ===============
[14:56:00] [PASSED] NTSC
[14:56:00] [PASSED] NTSC-J
[14:56:00] [PASSED] PAL
[14:56:00] [PASSED] PAL-M
[14:56:00] =========== [PASSED] drm_test_pick_cmdline_named ===========
[14:56:00] ============== [PASSED] drm_test_pick_cmdline ==============
[14:56:00] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[14:56:00] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[14:56:00] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[14:56:00] =========== drm_validate_clone_mode (2 subtests) ===========
[14:56:00] ============== drm_test_check_in_clone_mode ===============
[14:56:00] [PASSED] in_clone_mode
[14:56:00] [PASSED] not_in_clone_mode
[14:56:00] ========== [PASSED] drm_test_check_in_clone_mode ===========
[14:56:00] =============== drm_test_check_valid_clones ===============
[14:56:00] [PASSED] not_in_clone_mode
[14:56:00] [PASSED] valid_clone
[14:56:00] [PASSED] invalid_clone
[14:56:00] =========== [PASSED] drm_test_check_valid_clones ===========
[14:56:00] ============= [PASSED] drm_validate_clone_mode =============
[14:56:00] ============= drm_validate_modeset (1 subtest) =============
[14:56:00] [PASSED] drm_test_check_connector_changed_modeset
[14:56:00] ============== [PASSED] drm_validate_modeset ===============
[14:56:00] ====== drm_test_bridge_get_current_state (2 subtests) ======
[14:56:00] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[14:56:00] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[14:56:00] ======== [PASSED] drm_test_bridge_get_current_state ========
[14:56:00] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[14:56:00] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[14:56:00] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[14:56:00] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[14:56:00] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[14:56:00] ============== drm_bridge_alloc (2 subtests) ===============
[14:56:00] [PASSED] drm_test_drm_bridge_alloc_basic
[14:56:00] [PASSED] drm_test_drm_bridge_alloc_get_put
[14:56:00] ================ [PASSED] drm_bridge_alloc =================
[14:56:00] ============= drm_cmdline_parser (40 subtests) =============
[14:56:00] [PASSED] drm_test_cmdline_force_d_only
[14:56:00] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:56:00] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:56:00] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:56:00] [PASSED] drm_test_cmdline_force_e_only
[14:56:00] [PASSED] drm_test_cmdline_res
[14:56:00] [PASSED] drm_test_cmdline_res_vesa
[14:56:00] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:56:00] [PASSED] drm_test_cmdline_res_rblank
[14:56:00] [PASSED] drm_test_cmdline_res_bpp
[14:56:00] [PASSED] drm_test_cmdline_res_refresh
[14:56:00] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:56:00] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:56:00] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:56:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:56:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:56:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:56:00] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:56:00] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:56:00] [PASSED] drm_test_cmdline_res_margins_force_on
[14:56:00] [PASSED] drm_test_cmdline_res_vesa_margins
[14:56:00] [PASSED] drm_test_cmdline_name
[14:56:00] [PASSED] drm_test_cmdline_name_bpp
[14:56:00] [PASSED] drm_test_cmdline_name_option
[14:56:00] [PASSED] drm_test_cmdline_name_bpp_option
[14:56:00] [PASSED] drm_test_cmdline_rotate_0
[14:56:00] [PASSED] drm_test_cmdline_rotate_90
[14:56:00] [PASSED] drm_test_cmdline_rotate_180
[14:56:00] [PASSED] drm_test_cmdline_rotate_270
[14:56:00] [PASSED] drm_test_cmdline_hmirror
[14:56:00] [PASSED] drm_test_cmdline_vmirror
[14:56:00] [PASSED] drm_test_cmdline_margin_options
[14:56:00] [PASSED] drm_test_cmdline_multiple_options
[14:56:00] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:56:00] [PASSED] drm_test_cmdline_extra_and_option
[14:56:00] [PASSED] drm_test_cmdline_freestanding_options
[14:56:00] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:56:00] [PASSED] drm_test_cmdline_panel_orientation
[14:56:00] ================ drm_test_cmdline_invalid =================
[14:56:00] [PASSED] margin_only
[14:56:00] [PASSED] interlace_only
[14:56:00] [PASSED] res_missing_x
[14:56:00] [PASSED] res_missing_y
[14:56:00] [PASSED] res_bad_y
[14:56:00] [PASSED] res_missing_y_bpp
[14:56:00] [PASSED] res_bad_bpp
[14:56:00] [PASSED] res_bad_refresh
[14:56:00] [PASSED] res_bpp_refresh_force_on_off
[14:56:00] [PASSED] res_invalid_mode
[14:56:00] [PASSED] res_bpp_wrong_place_mode
[14:56:00] [PASSED] name_bpp_refresh
[14:56:00] [PASSED] name_refresh
[14:56:00] [PASSED] name_refresh_wrong_mode
[14:56:00] [PASSED] name_refresh_invalid_mode
[14:56:00] [PASSED] rotate_multiple
[14:56:00] [PASSED] rotate_invalid_val
[14:56:00] [PASSED] rotate_truncated
[14:56:00] [PASSED] invalid_option
[14:56:00] [PASSED] invalid_tv_option
[14:56:00] [PASSED] truncated_tv_option
[14:56:00] ============ [PASSED] drm_test_cmdline_invalid =============
[14:56:00] =============== drm_test_cmdline_tv_options ===============
[14:56:00] [PASSED] NTSC
[14:56:00] [PASSED] NTSC_443
[14:56:00] [PASSED] NTSC_J
[14:56:00] [PASSED] PAL
[14:56:00] [PASSED] PAL_M
[14:56:00] [PASSED] PAL_N
[14:56:00] [PASSED] SECAM
[14:56:00] [PASSED] MONO_525
[14:56:00] [PASSED] MONO_625
[14:56:00] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:56:00] =============== [PASSED] drm_cmdline_parser ================
[14:56:00] ========== drmm_connector_hdmi_init (20 subtests) ==========
[14:56:00] [PASSED] drm_test_connector_hdmi_init_valid
[14:56:00] [PASSED] drm_test_connector_hdmi_init_bpc_8
[14:56:00] [PASSED] drm_test_connector_hdmi_init_bpc_10
[14:56:00] [PASSED] drm_test_connector_hdmi_init_bpc_12
[14:56:00] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[14:56:00] [PASSED] drm_test_connector_hdmi_init_bpc_null
[14:56:00] [PASSED] drm_test_connector_hdmi_init_formats_empty
[14:56:00] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[14:56:00] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:56:00] [PASSED] supported_formats=0x9 yuv420_allowed=1
[14:56:00] [PASSED] supported_formats=0x9 yuv420_allowed=0
[14:56:00] [PASSED] supported_formats=0x5 yuv420_allowed=1
[14:56:00] [PASSED] supported_formats=0x5 yuv420_allowed=0
[14:56:00] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:56:00] [PASSED] drm_test_connector_hdmi_init_null_ddc
[14:56:00] [PASSED] drm_test_connector_hdmi_init_null_product
[14:56:00] [PASSED] drm_test_connector_hdmi_init_null_vendor
[14:56:00] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[14:56:00] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[14:56:00] [PASSED] drm_test_connector_hdmi_init_product_valid
[14:56:00] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[14:56:00] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[14:56:00] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[14:56:00] ========= drm_test_connector_hdmi_init_type_valid =========
[14:56:00] [PASSED] HDMI-A
[14:56:00] [PASSED] HDMI-B
[14:56:00] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[14:56:00] ======== drm_test_connector_hdmi_init_type_invalid ========
[14:56:00] [PASSED] Unknown
[14:56:00] [PASSED] VGA
[14:56:00] [PASSED] DVI-I
[14:56:00] [PASSED] DVI-D
[14:56:00] [PASSED] DVI-A
[14:56:00] [PASSED] Composite
[14:56:00] [PASSED] SVIDEO
[14:56:00] [PASSED] LVDS
[14:56:00] [PASSED] Component
[14:56:00] [PASSED] DIN
[14:56:00] [PASSED] DP
[14:56:00] [PASSED] TV
[14:56:00] [PASSED] eDP
[14:56:00] [PASSED] Virtual
[14:56:00] [PASSED] DSI
[14:56:00] [PASSED] DPI
[14:56:00] [PASSED] Writeback
[14:56:00] [PASSED] SPI
[14:56:00] [PASSED] USB
[14:56:00] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[14:56:00] ============ [PASSED] drmm_connector_hdmi_init =============
[14:56:00] ============= drmm_connector_init (3 subtests) =============
[14:56:00] [PASSED] drm_test_drmm_connector_init
[14:56:00] [PASSED] drm_test_drmm_connector_init_null_ddc
[14:56:00] ========= drm_test_drmm_connector_init_type_valid =========
[14:56:00] [PASSED] Unknown
[14:56:00] [PASSED] VGA
[14:56:00] [PASSED] DVI-I
[14:56:00] [PASSED] DVI-D
[14:56:00] [PASSED] DVI-A
[14:56:00] [PASSED] Composite
[14:56:00] [PASSED] SVIDEO
[14:56:00] [PASSED] LVDS
[14:56:00] [PASSED] Component
[14:56:00] [PASSED] DIN
[14:56:00] [PASSED] DP
[14:56:00] [PASSED] HDMI-A
[14:56:00] [PASSED] HDMI-B
[14:56:00] [PASSED] TV
[14:56:00] [PASSED] eDP
[14:56:00] [PASSED] Virtual
[14:56:00] [PASSED] DSI
[14:56:00] [PASSED] DPI
[14:56:00] [PASSED] Writeback
[14:56:00] [PASSED] SPI
[14:56:00] [PASSED] USB
[14:56:00] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[14:56:00] =============== [PASSED] drmm_connector_init ===============
[14:56:00] ========= drm_connector_dynamic_init (6 subtests) ==========
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_init
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_init_properties
[14:56:00] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[14:56:00] [PASSED] Unknown
[14:56:00] [PASSED] VGA
[14:56:00] [PASSED] DVI-I
[14:56:00] [PASSED] DVI-D
[14:56:00] [PASSED] DVI-A
[14:56:00] [PASSED] Composite
[14:56:00] [PASSED] SVIDEO
[14:56:00] [PASSED] LVDS
[14:56:00] [PASSED] Component
[14:56:00] [PASSED] DIN
[14:56:00] [PASSED] DP
[14:56:00] [PASSED] HDMI-A
[14:56:00] [PASSED] HDMI-B
[14:56:00] [PASSED] TV
[14:56:00] [PASSED] eDP
[14:56:00] [PASSED] Virtual
[14:56:00] [PASSED] DSI
[14:56:00] [PASSED] DPI
[14:56:00] [PASSED] Writeback
[14:56:00] [PASSED] SPI
[14:56:00] [PASSED] USB
[14:56:00] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[14:56:00] ======== drm_test_drm_connector_dynamic_init_name =========
[14:56:00] [PASSED] Unknown
[14:56:00] [PASSED] VGA
[14:56:00] [PASSED] DVI-I
[14:56:00] [PASSED] DVI-D
[14:56:00] [PASSED] DVI-A
[14:56:00] [PASSED] Composite
[14:56:00] [PASSED] SVIDEO
[14:56:00] [PASSED] LVDS
[14:56:00] [PASSED] Component
[14:56:00] [PASSED] DIN
[14:56:00] [PASSED] DP
[14:56:00] [PASSED] HDMI-A
[14:56:00] [PASSED] HDMI-B
[14:56:00] [PASSED] TV
[14:56:00] [PASSED] eDP
[14:56:00] [PASSED] Virtual
[14:56:00] [PASSED] DSI
[14:56:00] [PASSED] DPI
[14:56:00] [PASSED] Writeback
[14:56:00] [PASSED] SPI
[14:56:00] [PASSED] USB
[14:56:00] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[14:56:00] =========== [PASSED] drm_connector_dynamic_init ============
[14:56:00] ==== drm_connector_dynamic_register_early (4 subtests) =====
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[14:56:00] ====== [PASSED] drm_connector_dynamic_register_early =======
[14:56:00] ======= drm_connector_dynamic_register (7 subtests) ========
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[14:56:00] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[14:56:00] ========= [PASSED] drm_connector_dynamic_register ==========
[14:56:00] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[14:56:00] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[14:56:00] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[14:56:00] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[14:56:00] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[14:56:00] ========== drm_test_get_tv_mode_from_name_valid ===========
[14:56:00] [PASSED] NTSC
[14:56:00] [PASSED] NTSC-443
[14:56:00] [PASSED] NTSC-J
[14:56:00] [PASSED] PAL
[14:56:00] [PASSED] PAL-M
[14:56:00] [PASSED] PAL-N
[14:56:00] [PASSED] SECAM
[14:56:00] [PASSED] Mono
[14:56:00] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:56:00] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:56:00] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:56:00] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[14:56:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[14:56:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[14:56:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[14:56:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[14:56:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[14:56:00] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[14:56:00] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[14:56:00] [PASSED] VIC 96
[14:56:00] [PASSED] VIC 97
[14:56:00] [PASSED] VIC 101
[14:56:00] [PASSED] VIC 102
[14:56:00] [PASSED] VIC 106
[14:56:00] [PASSED] VIC 107
[14:56:00] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[14:56:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[14:56:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[14:56:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[14:56:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[14:56:00] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[14:56:00] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[14:56:00] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[14:56:00] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[14:56:00] [PASSED] Automatic
[14:56:00] [PASSED] Full
[14:56:00] [PASSED] Limited 16:235
[14:56:00] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[14:56:00] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[14:56:00] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[14:56:00] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[14:56:00] === drm_test_drm_hdmi_connector_get_output_format_name ====
[14:56:00] [PASSED] RGB
[14:56:00] [PASSED] YUV 4:2:0
[14:56:00] [PASSED] YUV 4:2:2
[14:56:00] [PASSED] YUV 4:4:4
[14:56:00] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[14:56:00] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[14:56:00] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[14:56:00] ============= drm_damage_helper (21 subtests) ==============
[14:56:00] [PASSED] drm_test_damage_iter_no_damage
[14:56:00] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:56:00] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:56:00] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:56:00] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:56:00] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:56:00] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:56:00] [PASSED] drm_test_damage_iter_simple_damage
[14:56:00] [PASSED] drm_test_damage_iter_single_damage
[14:56:00] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:56:00] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:56:00] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:56:00] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:56:00] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:56:00] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:56:00] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:56:00] [PASSED] drm_test_damage_iter_damage
[14:56:00] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:56:00] [PASSED] drm_test_damage_iter_damage_one_outside
[14:56:00] [PASSED] drm_test_damage_iter_damage_src_moved
[14:56:00] [PASSED] drm_test_damage_iter_damage_not_visible
[14:56:00] ================ [PASSED] drm_damage_helper ================
[14:56:00] ============== drm_dp_mst_helper (3 subtests) ==============
[14:56:00] ============== drm_test_dp_mst_calc_pbn_mode ==============
[14:56:00] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:56:00] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:56:00] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:56:00] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:56:00] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:56:00] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:56:00] ============== drm_test_dp_mst_calc_pbn_div ===============
[14:56:00] [PASSED] Link rate 2000000 lane count 4
[14:56:00] [PASSED] Link rate 2000000 lane count 2
[14:56:00] [PASSED] Link rate 2000000 lane count 1
[14:56:00] [PASSED] Link rate 1350000 lane count 4
[14:56:00] [PASSED] Link rate 1350000 lane count 2
[14:56:00] [PASSED] Link rate 1350000 lane count 1
[14:56:00] [PASSED] Link rate 1000000 lane count 4
[14:56:00] [PASSED] Link rate 1000000 lane count 2
[14:56:00] [PASSED] Link rate 1000000 lane count 1
[14:56:00] [PASSED] Link rate 810000 lane count 4
[14:56:00] [PASSED] Link rate 810000 lane count 2
[14:56:00] [PASSED] Link rate 810000 lane count 1
[14:56:00] [PASSED] Link rate 540000 lane count 4
[14:56:00] [PASSED] Link rate 540000 lane count 2
[14:56:00] [PASSED] Link rate 540000 lane count 1
[14:56:00] [PASSED] Link rate 270000 lane count 4
[14:56:00] [PASSED] Link rate 270000 lane count 2
[14:56:00] [PASSED] Link rate 270000 lane count 1
[14:56:00] [PASSED] Link rate 162000 lane count 4
[14:56:00] [PASSED] Link rate 162000 lane count 2
[14:56:00] [PASSED] Link rate 162000 lane count 1
[14:56:00] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[14:56:00] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[14:56:00] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:56:00] [PASSED] DP_POWER_UP_PHY with port number
[14:56:00] [PASSED] DP_POWER_DOWN_PHY with port number
[14:56:00] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:56:00] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:56:00] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:56:00] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:56:00] [PASSED] DP_QUERY_PAYLOAD with port number
[14:56:00] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:56:00] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:56:00] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:56:00] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:56:00] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:56:00] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:56:00] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:56:00] [PASSED] DP_REMOTE_I2C_READ with port number
[14:56:00] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:56:00] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:56:00] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:56:00] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:56:00] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:56:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:56:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:56:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:56:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:56:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:56:00] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:56:00] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:56:00] ================ [PASSED] drm_dp_mst_helper ================
[14:56:00] ================== drm_exec (7 subtests) ===================
[14:56:00] [PASSED] sanitycheck
[14:56:00] [PASSED] test_lock
[14:56:00] [PASSED] test_lock_unlock
[14:56:00] [PASSED] test_duplicates
[14:56:00] [PASSED] test_prepare
[14:56:00] [PASSED] test_prepare_array
[14:56:00] [PASSED] test_multiple_loops
[14:56:00] ==================== [PASSED] drm_exec =====================
[14:56:00] =========== drm_format_helper_test (17 subtests) ===========
[14:56:00] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:56:00] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:56:00] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:56:00] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:56:00] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:56:00] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:56:00] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:56:00] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[14:56:00] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:56:00] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:56:00] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:56:00] ============== drm_test_fb_xrgb8888_to_mono ===============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:56:00] ==================== drm_test_fb_swab =====================
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ================ [PASSED] drm_test_fb_swab =================
[14:56:00] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[14:56:00] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[14:56:00] [PASSED] single_pixel_source_buffer
[14:56:00] [PASSED] single_pixel_clip_rectangle
[14:56:00] [PASSED] well_known_colors
[14:56:00] [PASSED] destination_pitch
[14:56:00] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[14:56:00] ================= drm_test_fb_clip_offset =================
[14:56:00] [PASSED] pass through
[14:56:00] [PASSED] horizontal offset
[14:56:00] [PASSED] vertical offset
[14:56:00] [PASSED] horizontal and vertical offset
[14:56:00] [PASSED] horizontal offset (custom pitch)
[14:56:00] [PASSED] vertical offset (custom pitch)
[14:56:00] [PASSED] horizontal and vertical offset (custom pitch)
[14:56:00] ============= [PASSED] drm_test_fb_clip_offset =============
[14:56:00] =================== drm_test_fb_memcpy ====================
[14:56:00] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:56:00] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:56:00] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:56:00] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:56:00] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:56:00] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:56:00] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:56:00] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:56:00] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:56:00] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:56:00] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:56:00] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:56:00] =============== [PASSED] drm_test_fb_memcpy ================
[14:56:00] ============= [PASSED] drm_format_helper_test ==============
[14:56:00] ================= drm_format (18 subtests) =================
[14:56:00] [PASSED] drm_test_format_block_width_invalid
[14:56:00] [PASSED] drm_test_format_block_width_one_plane
[14:56:00] [PASSED] drm_test_format_block_width_two_plane
[14:56:00] [PASSED] drm_test_format_block_width_three_plane
[14:56:00] [PASSED] drm_test_format_block_width_tiled
[14:56:00] [PASSED] drm_test_format_block_height_invalid
[14:56:00] [PASSED] drm_test_format_block_height_one_plane
[14:56:00] [PASSED] drm_test_format_block_height_two_plane
[14:56:00] [PASSED] drm_test_format_block_height_three_plane
[14:56:00] [PASSED] drm_test_format_block_height_tiled
[14:56:00] [PASSED] drm_test_format_min_pitch_invalid
[14:56:00] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:56:00] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:56:00] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:56:00] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:56:00] [PASSED] drm_test_format_min_pitch_two_plane
[14:56:00] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:56:00] [PASSED] drm_test_format_min_pitch_tiled
[14:56:00] =================== [PASSED] drm_format ====================
[14:56:00] ============== drm_framebuffer (10 subtests) ===============
[14:56:00] ========== drm_test_framebuffer_check_src_coords ==========
[14:56:00] [PASSED] Success: source fits into fb
[14:56:00] [PASSED] Fail: overflowing fb with x-axis coordinate
[14:56:00] [PASSED] Fail: overflowing fb with y-axis coordinate
[14:56:00] [PASSED] Fail: overflowing fb with source width
[14:56:00] [PASSED] Fail: overflowing fb with source height
[14:56:00] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[14:56:00] [PASSED] drm_test_framebuffer_cleanup
[14:56:00] =============== drm_test_framebuffer_create ===============
[14:56:00] [PASSED] ABGR8888 normal sizes
[14:56:00] [PASSED] ABGR8888 max sizes
[14:56:00] [PASSED] ABGR8888 pitch greater than min required
[14:56:00] [PASSED] ABGR8888 pitch less than min required
[14:56:00] [PASSED] ABGR8888 Invalid width
[14:56:00] [PASSED] ABGR8888 Invalid buffer handle
[14:56:00] [PASSED] No pixel format
[14:56:00] [PASSED] ABGR8888 Width 0
[14:56:00] [PASSED] ABGR8888 Height 0
[14:56:00] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:56:00] [PASSED] ABGR8888 Large buffer offset
[14:56:00] [PASSED] ABGR8888 Buffer offset for inexistent plane
[14:56:00] [PASSED] ABGR8888 Invalid flag
[14:56:00] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:56:00] [PASSED] ABGR8888 Valid buffer modifier
[14:56:00] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:56:00] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:56:00] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:56:00] [PASSED] NV12 Normal sizes
[14:56:00] [PASSED] NV12 Max sizes
[14:56:00] [PASSED] NV12 Invalid pitch
[14:56:00] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:56:00] [PASSED] NV12 different modifier per-plane
[14:56:00] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:56:00] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:56:00] [PASSED] NV12 Modifier for inexistent plane
[14:56:00] [PASSED] NV12 Handle for inexistent plane
[14:56:00] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:56:00] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:56:00] [PASSED] YVU420 Normal sizes
[14:56:00] [PASSED] YVU420 Max sizes
[14:56:00] [PASSED] YVU420 Invalid pitch
[14:56:00] [PASSED] YVU420 Different pitches
[14:56:00] [PASSED] YVU420 Different buffer offsets/pitches
[14:56:00] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:56:00] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:56:00] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:56:00] [PASSED] YVU420 Valid modifier
[14:56:00] [PASSED] YVU420 Different modifiers per plane
[14:56:00] [PASSED] YVU420 Modifier for inexistent plane
[14:56:00] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[14:56:00] [PASSED] X0L2 Normal sizes
[14:56:00] [PASSED] X0L2 Max sizes
[14:56:00] [PASSED] X0L2 Invalid pitch
[14:56:00] [PASSED] X0L2 Pitch greater than minimum required
[14:56:00] [PASSED] X0L2 Handle for inexistent plane
[14:56:00] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:56:00] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:56:00] [PASSED] X0L2 Valid modifier
[14:56:00] [PASSED] X0L2 Modifier for inexistent plane
[14:56:00] =========== [PASSED] drm_test_framebuffer_create ===========
[14:56:00] [PASSED] drm_test_framebuffer_free
[14:56:00] [PASSED] drm_test_framebuffer_init
[14:56:00] [PASSED] drm_test_framebuffer_init_bad_format
[14:56:00] [PASSED] drm_test_framebuffer_init_dev_mismatch
[14:56:00] [PASSED] drm_test_framebuffer_lookup
[14:56:00] [PASSED] drm_test_framebuffer_lookup_inexistent
[14:56:00] [PASSED] drm_test_framebuffer_modifiers_not_supported
[14:56:00] ================= [PASSED] drm_framebuffer =================
[14:56:00] ================ drm_gem_shmem (8 subtests) ================
[14:56:00] [PASSED] drm_gem_shmem_test_obj_create
[14:56:00] [PASSED] drm_gem_shmem_test_obj_create_private
[14:56:00] [PASSED] drm_gem_shmem_test_pin_pages
[14:56:00] [PASSED] drm_gem_shmem_test_vmap
[14:56:00] [PASSED] drm_gem_shmem_test_get_sg_table
[14:56:00] [PASSED] drm_gem_shmem_test_get_pages_sgt
[14:56:00] [PASSED] drm_gem_shmem_test_madvise
[14:56:00] [PASSED] drm_gem_shmem_test_purge
[14:56:00] ================== [PASSED] drm_gem_shmem ==================
[14:56:00] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[14:56:00] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[14:56:00] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[14:56:00] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[14:56:00] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[14:56:00] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[14:56:00] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[14:56:00] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[14:56:00] [PASSED] Automatic
[14:56:00] [PASSED] Full
[14:56:00] [PASSED] Limited 16:235
[14:56:00] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[14:56:00] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[14:56:00] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[14:56:00] [PASSED] drm_test_check_disable_connector
[14:56:00] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[14:56:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[14:56:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[14:56:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[14:56:00] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[14:56:00] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[14:56:00] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[14:56:00] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[14:56:00] [PASSED] drm_test_check_output_bpc_dvi
[14:56:00] [PASSED] drm_test_check_output_bpc_format_vic_1
[14:56:00] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[14:56:00] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[14:56:00] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[14:56:00] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[14:56:00] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[14:56:00] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[14:56:00] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[14:56:00] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[14:56:00] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[14:56:00] [PASSED] drm_test_check_broadcast_rgb_value
[14:56:00] [PASSED] drm_test_check_bpc_8_value
[14:56:00] [PASSED] drm_test_check_bpc_10_value
[14:56:00] [PASSED] drm_test_check_bpc_12_value
[14:56:00] [PASSED] drm_test_check_format_value
[14:56:00] [PASSED] drm_test_check_tmds_char_value
[14:56:00] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[14:56:00] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[14:56:00] [PASSED] drm_test_check_mode_valid
[14:56:00] [PASSED] drm_test_check_mode_valid_reject
[14:56:00] [PASSED] drm_test_check_mode_valid_reject_rate
[14:56:00] [PASSED] drm_test_check_mode_valid_reject_max_clock
[14:56:00] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[14:56:00] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[14:56:00] [PASSED] drm_test_check_infoframes
[14:56:00] [PASSED] drm_test_check_reject_avi_infoframe
[14:56:00] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[14:56:00] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[14:56:00] [PASSED] drm_test_check_reject_audio_infoframe
[14:56:00] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[14:56:00] ================= drm_managed (2 subtests) =================
[14:56:00] [PASSED] drm_test_managed_release_action
[14:56:00] [PASSED] drm_test_managed_run_action
[14:56:00] =================== [PASSED] drm_managed ===================
[14:56:00] =================== drm_mm (6 subtests) ====================
[14:56:00] [PASSED] drm_test_mm_init
[14:56:00] [PASSED] drm_test_mm_debug
[14:56:00] [PASSED] drm_test_mm_align32
[14:56:00] [PASSED] drm_test_mm_align64
[14:56:00] [PASSED] drm_test_mm_lowest
[14:56:00] [PASSED] drm_test_mm_highest
[14:56:00] ===================== [PASSED] drm_mm ======================
[14:56:00] ============= drm_modes_analog_tv (5 subtests) =============
[14:56:00] [PASSED] drm_test_modes_analog_tv_mono_576i
[14:56:00] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:56:00] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:56:00] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:56:00] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:56:00] =============== [PASSED] drm_modes_analog_tv ===============
[14:56:00] ============== drm_plane_helper (2 subtests) ===============
[14:56:00] =============== drm_test_check_plane_state ================
[14:56:00] [PASSED] clipping_simple
[14:56:00] [PASSED] clipping_rotate_reflect
[14:56:00] [PASSED] positioning_simple
[14:56:00] [PASSED] upscaling
[14:56:00] [PASSED] downscaling
[14:56:00] [PASSED] rounding1
[14:56:00] [PASSED] rounding2
[14:56:00] [PASSED] rounding3
[14:56:00] [PASSED] rounding4
[14:56:00] =========== [PASSED] drm_test_check_plane_state ============
[14:56:00] =========== drm_test_check_invalid_plane_state ============
[14:56:00] [PASSED] positioning_invalid
[14:56:00] [PASSED] upscaling_invalid
[14:56:00] [PASSED] downscaling_invalid
[14:56:00] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:56:00] ================ [PASSED] drm_plane_helper =================
[14:56:00] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[14:56:00] ====== drm_test_connector_helper_tv_get_modes_check =======
[14:56:00] [PASSED] None
[14:56:00] [PASSED] PAL
[14:56:00] [PASSED] NTSC
[14:56:00] [PASSED] Both, NTSC Default
[14:56:00] [PASSED] Both, PAL Default
[14:56:00] [PASSED] Both, NTSC Default, with PAL on command-line
[14:56:00] [PASSED] Both, PAL Default, with NTSC on command-line
[14:56:00] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:56:00] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:56:00] ================== drm_rect (9 subtests) ===================
[14:56:00] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:56:00] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:56:00] [PASSED] drm_test_rect_clip_scaled_clipped
[14:56:00] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:56:00] ================= drm_test_rect_intersect =================
[14:56:00] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:56:00] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:56:00] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:56:00] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:56:00] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:56:00] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:56:00] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:56:00] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:56:00] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:56:00] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:56:00] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:56:00] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:56:00] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:56:00] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:56:00] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:56:00] ============= [PASSED] drm_test_rect_intersect =============
[14:56:00] ================ drm_test_rect_calc_hscale ================
[14:56:00] [PASSED] normal use
[14:56:00] [PASSED] out of max range
[14:56:00] [PASSED] out of min range
[14:56:00] [PASSED] zero dst
[14:56:00] [PASSED] negative src
[14:56:00] [PASSED] negative dst
[14:56:00] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:56:00] ================ drm_test_rect_calc_vscale ================
[14:56:00] [PASSED] normal use
[14:56:00] [PASSED] out of max range
[14:56:00] [PASSED] out of min range
[14:56:00] [PASSED] zero dst
[14:56:00] [PASSED] negative src
[14:56:00] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[14:56:00] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:56:00] ================== drm_test_rect_rotate ===================
[14:56:00] [PASSED] reflect-x
[14:56:00] [PASSED] reflect-y
[14:56:00] [PASSED] rotate-0
[14:56:00] [PASSED] rotate-90
[14:56:00] [PASSED] rotate-180
[14:56:00] [PASSED] rotate-270
[14:56:00] ============== [PASSED] drm_test_rect_rotate ===============
[14:56:00] ================ drm_test_rect_rotate_inv =================
[14:56:00] [PASSED] reflect-x
[14:56:00] [PASSED] reflect-y
[14:56:00] [PASSED] rotate-0
[14:56:00] [PASSED] rotate-90
[14:56:00] [PASSED] rotate-180
[14:56:00] [PASSED] rotate-270
[14:56:00] ============ [PASSED] drm_test_rect_rotate_inv =============
[14:56:00] ==================== [PASSED] drm_rect =====================
[14:56:00] ============ drm_sysfb_modeset_test (1 subtest) ============
[14:56:00] ============ drm_test_sysfb_build_fourcc_list =============
[14:56:00] [PASSED] no native formats
[14:56:00] [PASSED] XRGB8888 as native format
[14:56:00] [PASSED] remove duplicates
[14:56:00] [PASSED] convert alpha formats
[14:56:00] [PASSED] random formats
[14:56:00] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[14:56:00] ============= [PASSED] drm_sysfb_modeset_test ==============
[14:56:00] ================== drm_fixp (2 subtests) ===================
[14:56:00] [PASSED] drm_test_int2fixp
[14:56:00] [PASSED] drm_test_sm2fixp
[14:56:00] ==================== [PASSED] drm_fixp =====================
[14:56:00] ============================================================
[14:56:00] Testing complete. Ran 621 tests: passed: 621
[14:56:00] Elapsed time: 26.531s total, 1.728s configuring, 24.623s building, 0.178s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[14:56:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:56:02] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:56:12] Starting KUnit Kernel (1/1)...
[14:56:12] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:56:12] ================= ttm_device (5 subtests) ==================
[14:56:12] [PASSED] ttm_device_init_basic
[14:56:12] [PASSED] ttm_device_init_multiple
[14:56:12] [PASSED] ttm_device_fini_basic
[14:56:12] [PASSED] ttm_device_init_no_vma_man
[14:56:12] ================== ttm_device_init_pools ==================
[14:56:12] [PASSED] No DMA allocations, no DMA32 required
[14:56:12] [PASSED] DMA allocations, DMA32 required
[14:56:12] [PASSED] No DMA allocations, DMA32 required
[14:56:12] [PASSED] DMA allocations, no DMA32 required
[14:56:12] ============== [PASSED] ttm_device_init_pools ==============
[14:56:12] =================== [PASSED] ttm_device ====================
[14:56:12] ================== ttm_pool (8 subtests) ===================
[14:56:12] ================== ttm_pool_alloc_basic ===================
[14:56:12] [PASSED] One page
[14:56:12] [PASSED] More than one page
[14:56:12] [PASSED] Above the allocation limit
[14:56:12] [PASSED] One page, with coherent DMA mappings enabled
[14:56:12] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:56:12] ============== [PASSED] ttm_pool_alloc_basic ===============
[14:56:12] ============== ttm_pool_alloc_basic_dma_addr ==============
[14:56:12] [PASSED] One page
[14:56:12] [PASSED] More than one page
[14:56:12] [PASSED] Above the allocation limit
[14:56:12] [PASSED] One page, with coherent DMA mappings enabled
[14:56:12] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:56:12] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[14:56:12] [PASSED] ttm_pool_alloc_order_caching_match
[14:56:12] [PASSED] ttm_pool_alloc_caching_mismatch
[14:56:12] [PASSED] ttm_pool_alloc_order_mismatch
[14:56:12] [PASSED] ttm_pool_free_dma_alloc
[14:56:12] [PASSED] ttm_pool_free_no_dma_alloc
[14:56:12] [PASSED] ttm_pool_fini_basic
[14:56:12] ==================== [PASSED] ttm_pool =====================
[14:56:12] ================ ttm_resource (8 subtests) =================
[14:56:12] ================= ttm_resource_init_basic =================
[14:56:12] [PASSED] Init resource in TTM_PL_SYSTEM
[14:56:12] [PASSED] Init resource in TTM_PL_VRAM
[14:56:12] [PASSED] Init resource in a private placement
[14:56:12] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[14:56:12] ============= [PASSED] ttm_resource_init_basic =============
[14:56:12] [PASSED] ttm_resource_init_pinned
[14:56:12] [PASSED] ttm_resource_fini_basic
[14:56:12] [PASSED] ttm_resource_manager_init_basic
[14:56:12] [PASSED] ttm_resource_manager_usage_basic
[14:56:12] [PASSED] ttm_resource_manager_set_used_basic
[14:56:12] [PASSED] ttm_sys_man_alloc_basic
[14:56:12] [PASSED] ttm_sys_man_free_basic
[14:56:12] ================== [PASSED] ttm_resource ===================
[14:56:12] =================== ttm_tt (15 subtests) ===================
[14:56:12] ==================== ttm_tt_init_basic ====================
[14:56:12] [PASSED] Page-aligned size
[14:56:12] [PASSED] Extra pages requested
[14:56:12] ================ [PASSED] ttm_tt_init_basic ================
[14:56:12] [PASSED] ttm_tt_init_misaligned
[14:56:12] [PASSED] ttm_tt_fini_basic
[14:56:12] [PASSED] ttm_tt_fini_sg
[14:56:12] [PASSED] ttm_tt_fini_shmem
[14:56:12] [PASSED] ttm_tt_create_basic
[14:56:12] [PASSED] ttm_tt_create_invalid_bo_type
[14:56:12] [PASSED] ttm_tt_create_ttm_exists
[14:56:12] [PASSED] ttm_tt_create_failed
[14:56:12] [PASSED] ttm_tt_destroy_basic
[14:56:12] [PASSED] ttm_tt_populate_null_ttm
[14:56:12] [PASSED] ttm_tt_populate_populated_ttm
[14:56:12] [PASSED] ttm_tt_unpopulate_basic
[14:56:12] [PASSED] ttm_tt_unpopulate_empty_ttm
[14:56:12] [PASSED] ttm_tt_swapin_basic
[14:56:12] ===================== [PASSED] ttm_tt ======================
[14:56:12] =================== ttm_bo (14 subtests) ===================
[14:56:12] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[14:56:12] [PASSED] Cannot be interrupted and sleeps
[14:56:12] [PASSED] Cannot be interrupted, locks straight away
[14:56:12] [PASSED] Can be interrupted, sleeps
[14:56:12] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[14:56:12] [PASSED] ttm_bo_reserve_locked_no_sleep
[14:56:12] [PASSED] ttm_bo_reserve_no_wait_ticket
[14:56:12] [PASSED] ttm_bo_reserve_double_resv
[14:56:12] [PASSED] ttm_bo_reserve_interrupted
[14:56:12] [PASSED] ttm_bo_reserve_deadlock
[14:56:12] [PASSED] ttm_bo_unreserve_basic
[14:56:12] [PASSED] ttm_bo_unreserve_pinned
[14:56:12] [PASSED] ttm_bo_unreserve_bulk
[14:56:12] [PASSED] ttm_bo_fini_basic
[14:56:12] [PASSED] ttm_bo_fini_shared_resv
[14:56:12] [PASSED] ttm_bo_pin_basic
[14:56:12] [PASSED] ttm_bo_pin_unpin_resource
[14:56:12] [PASSED] ttm_bo_multiple_pin_one_unpin
[14:56:12] ===================== [PASSED] ttm_bo ======================
[14:56:12] ============== ttm_bo_validate (22 subtests) ===============
[14:56:12] ============== ttm_bo_init_reserved_sys_man ===============
[14:56:12] [PASSED] Buffer object for userspace
[14:56:12] [PASSED] Kernel buffer object
[14:56:12] [PASSED] Shared buffer object
[14:56:12] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[14:56:12] ============== ttm_bo_init_reserved_mock_man ==============
[14:56:12] [PASSED] Buffer object for userspace
[14:56:12] [PASSED] Kernel buffer object
[14:56:12] [PASSED] Shared buffer object
[14:56:12] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[14:56:12] [PASSED] ttm_bo_init_reserved_resv
[14:56:12] ================== ttm_bo_validate_basic ==================
[14:56:12] [PASSED] Buffer object for userspace
[14:56:12] [PASSED] Kernel buffer object
[14:56:12] [PASSED] Shared buffer object
[14:56:12] ============== [PASSED] ttm_bo_validate_basic ==============
[14:56:12] [PASSED] ttm_bo_validate_invalid_placement
[14:56:12] ============= ttm_bo_validate_same_placement ==============
[14:56:12] [PASSED] System manager
[14:56:12] [PASSED] VRAM manager
[14:56:12] ========= [PASSED] ttm_bo_validate_same_placement ==========
[14:56:12] [PASSED] ttm_bo_validate_failed_alloc
[14:56:12] [PASSED] ttm_bo_validate_pinned
[14:56:12] [PASSED] ttm_bo_validate_busy_placement
[14:56:12] ================ ttm_bo_validate_multihop =================
[14:56:12] [PASSED] Buffer object for userspace
[14:56:12] [PASSED] Kernel buffer object
[14:56:12] [PASSED] Shared buffer object
[14:56:12] ============ [PASSED] ttm_bo_validate_multihop =============
[14:56:12] ========== ttm_bo_validate_no_placement_signaled ==========
[14:56:12] [PASSED] Buffer object in system domain, no page vector
[14:56:12] [PASSED] Buffer object in system domain with an existing page vector
[14:56:12] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[14:56:12] ======== ttm_bo_validate_no_placement_not_signaled ========
[14:56:12] [PASSED] Buffer object for userspace
[14:56:12] [PASSED] Kernel buffer object
[14:56:12] [PASSED] Shared buffer object
[14:56:12] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[14:56:12] [PASSED] ttm_bo_validate_move_fence_signaled
[14:56:12] ========= ttm_bo_validate_move_fence_not_signaled =========
[14:56:12] [PASSED] Waits for GPU
[14:56:12] [PASSED] Tries to lock straight away
[14:56:12] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[14:56:12] [PASSED] ttm_bo_validate_swapout
[14:56:12] [PASSED] ttm_bo_validate_happy_evict
[14:56:12] [PASSED] ttm_bo_validate_all_pinned_evict
[14:56:12] [PASSED] ttm_bo_validate_allowed_only_evict
[14:56:12] [PASSED] ttm_bo_validate_deleted_evict
[14:56:12] [PASSED] ttm_bo_validate_busy_domain_evict
[14:56:12] [PASSED] ttm_bo_validate_evict_gutting
[14:56:12] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[14:56:12] ================= [PASSED] ttm_bo_validate =================
[14:56:12] ============================================================
[14:56:12] Testing complete. Ran 102 tests: passed: 102
[14:56:12] Elapsed time: 11.381s total, 1.687s configuring, 9.478s building, 0.182s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Xe.CI.BAT: success for Add get-error-counter and clear-error-counter support for CRI
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
` (6 preceding siblings ...)
2026-04-06 14:56 ` ✓ CI.KUnit: success " Patchwork
@ 2026-04-06 15:32 ` Patchwork
2026-04-06 18:50 ` ✗ Xe.CI.FULL: failure " Patchwork
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-04-06 15:32 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 931 bytes --]
== Series Details ==
Series: Add get-error-counter and clear-error-counter support for CRI
URL : https://patchwork.freedesktop.org/series/164393/
State : success
== Summary ==
CI Bug Log - changes from xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf_BAT -> xe-pw-164393v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8847 -> IGT_8849
* Linux: xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf -> xe-pw-164393v1
IGT_8847: 8847
IGT_8849: 8849
xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf: d873f0156bd08a3031097d459e2d3604bfe1b1bf
xe-pw-164393v1: 164393v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/index.html
[-- Attachment #2: Type: text/html, Size: 1493 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✗ Xe.CI.FULL: failure for Add get-error-counter and clear-error-counter support for CRI
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
` (7 preceding siblings ...)
2026-04-06 15:32 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-04-06 18:50 ` Patchwork
8 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-04-06 18:50 UTC (permalink / raw)
To: Riana Tauro; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 35955 bytes --]
== Series Details ==
Series: Add get-error-counter and clear-error-counter support for CRI
URL : https://patchwork.freedesktop.org/series/164393/
State : failure
== Summary ==
CI Bug Log - changes from xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf_FULL -> xe-pw-164393v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-164393v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-164393v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-164393v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@core_hotunplug@unplug-rescan:
- shard-bmg: [PASS][1] -> [DMESG-WARN][2] +4 other tests dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-1/igt@core_hotunplug@unplug-rescan.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-6/igt@core_hotunplug@unplug-rescan.html
* igt@kms_cursor_legacy@short-flip-after-cursor-toggle:
- shard-bmg: NOTRUN -> [DMESG-WARN][3]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-6/igt@kms_cursor_legacy@short-flip-after-cursor-toggle.html
* igt@kms_setmode@basic:
- shard-bmg: [PASS][4] -> [FAIL][5] +2 other tests fail
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-10/igt@kms_setmode@basic.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-6/igt@kms_setmode@basic.html
* igt@xe_exec_system_allocator@fault-threads-benchmark:
- shard-bmg: NOTRUN -> [FAIL][6]
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@xe_exec_system_allocator@fault-threads-benchmark.html
#### Warnings ####
* igt@kms_content_protection@lic-type-0:
- shard-bmg: [FAIL][7] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) -> [INCOMPLETE][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-7/igt@kms_content_protection@lic-type-0.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-6/igt@kms_content_protection@lic-type-0.html
Known issues
------------
Here are the changes found in xe-pw-164393v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2233])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-3/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2370])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2327])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#1124]) +2 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
* igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#7679])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#367] / [Intel XE#7354])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2887]) +4 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#3432]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-10/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2325] / [Intel XE#7358]) +1 other test skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-1/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_hpd@dp-hpd-after-suspend:
- shard-bmg: NOTRUN -> [SKIP][18] ([Intel XE#2252]) +2 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-10/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
* igt@kms_content_protection@atomic-dpms-hdcp14:
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#7642])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-2/igt@kms_content_protection@atomic-dpms-hdcp14.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2320]) +3 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2321] / [Intel XE#7355])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_dsc@dsc-basic:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2244])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#2244])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-2/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#4422] / [Intel XE#7442])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_feature_discovery@psr2:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2374] / [Intel XE#6128])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@kms_feature_discovery@psr2.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#7178] / [Intel XE#7351])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#7178] / [Intel XE#7351])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-abgr161616f-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2311]) +13 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#4141]) +6 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#2313]) +12 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#656])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#7283]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-10/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-modifier.html
* igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5:
- shard-bmg: NOTRUN -> [SKIP][35] ([Intel XE#7130]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@kms_plane@pixel-format-4-tiled-modifier@pipe-b-plane-5.html
* igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#7283])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-2/igt@kms_plane@pixel-format-yf-tiled-ccs-modifier-source-clamping.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#4596] / [Intel XE#5854])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-6/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-1/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#7376] / [Intel XE#870])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc6-dpms:
- shard-lnl: [PASS][40] -> [FAIL][41] ([Intel XE#7340])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-lnl-2/igt@kms_pm_dc@dc6-dpms.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-6/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_dc@deep-pkgc:
- shard-lnl: [PASS][42] -> [FAIL][43] ([Intel XE#2029] / [Intel XE#7395])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-lnl-3/igt@kms_pm_dc@deep-pkgc.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-1/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#1489]) +1 other test skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-1/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr@fbc-pr-primary-page-flip:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#2234] / [Intel XE#2850]) +8 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-10/igt@kms_psr@fbc-pr-primary-page-flip.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#3904] / [Intel XE#7342]) +1 other test skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-3/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#2330] / [Intel XE#5813]) +1 other test skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#1435])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_sharpness_filter@filter-toggle:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#6503])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-10/igt@kms_sharpness_filter@filter-toggle.html
* igt@xe_eudebug@basic-vm-access-userptr:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#7636]) +5 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@xe_eudebug@basic-vm-access-userptr.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind.html
* igt@xe_exec_fault_mode@many-multi-queue-invalid-userptr-fault:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#7136]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@xe_exec_fault_mode@many-multi-queue-invalid-userptr-fault.html
* igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][54] ([Intel XE#6874]) +13 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-userptr-invalidate.html
* igt@xe_exec_multi_queue@two-queues-priority:
- shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#6874]) +1 other test skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-8/igt@xe_exec_multi_queue@two-queues-priority.html
* igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#7138])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-5/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-rebind.html
* igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#7138]) +3 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-3/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-invalidate-race.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_mmio_probe_early:
- shard-bmg: [PASS][58] -> [ABORT][59] ([Intel XE#7578]) +1 other test abort
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-3/igt@xe_fault_injection@inject-fault-probe-function-xe_mmio_probe_early.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_mmio_probe_early.html
* igt@xe_multigpu_svm@mgpu-coherency-fail-basic:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#6964]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@xe_multigpu_svm@mgpu-coherency-fail-basic.html
* igt@xe_oa@oa-tlb-invalidate:
- shard-bmg: NOTRUN -> [SKIP][61] ([Intel XE#2248] / [Intel XE#7325] / [Intel XE#7393])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-3/igt@xe_oa@oa-tlb-invalidate.html
* igt@xe_pat@pat-index-xelp:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#2245] / [Intel XE#7590])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@xa-app-transient-media-on:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#7590]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@xe_pat@xa-app-transient-media-on.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-lnl: NOTRUN -> [SKIP][64] ([Intel XE#4650] / [Intel XE#7347])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-7/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
* igt@xe_pxp@pxp-stale-bo-exec-post-rpm:
- shard-bmg: NOTRUN -> [SKIP][65] ([Intel XE#4733] / [Intel XE#7417])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-8/igt@xe_pxp@pxp-stale-bo-exec-post-rpm.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-lnl: NOTRUN -> [SKIP][66] ([Intel XE#944])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-4/igt@xe_query@multigpu-query-invalid-extension.html
* igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
- shard-bmg: NOTRUN -> [SKIP][67] ([Intel XE#944]) +2 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-1/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
* igt@xe_sriov_flr@flr-twice:
- shard-bmg: NOTRUN -> [FAIL][68] ([Intel XE#6569])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-1/igt@xe_sriov_flr@flr-twice.html
#### Possible fixes ####
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [FAIL][69] ([Intel XE#7445]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-1/igt@intel_hwmon@hwmon-write.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-10/igt@intel_hwmon@hwmon-write.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [FAIL][71] ([Intel XE#301]) -> [PASS][72] +1 other test pass
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt:
- shard-lnl: [INCOMPLETE][73] -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-lnl-1/igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-7/igt@kms_frontbuffer_tracking@psr-rgb565-draw-blt.html
* igt@kms_pm_dc@dc6-psr:
- shard-lnl: [FAIL][75] ([Intel XE#7340]) -> [PASS][76] +1 other test pass
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-lnl-7/igt@kms_pm_dc@dc6-psr.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-lnl-5/igt@kms_pm_dc@dc6-psr.html
* igt@xe_evict@evict-mixed-many-threads-small:
- shard-bmg: [INCOMPLETE][77] ([Intel XE#6321]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-9/igt@xe_evict@evict-mixed-many-threads-small.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-7/igt@xe_evict@evict-mixed-many-threads-small.html
#### Warnings ####
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][79] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][80] ([Intel XE#3544])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][81] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][82] ([Intel XE#2426] / [Intel XE#5848])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@xe_module_load@load:
- shard-bmg: ([SKIP][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [DMESG-FAIL][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [PASS][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108]) ([Intel XE#2457] / [Intel XE#5545] / [Intel XE#6652] / [Intel XE#7405]) -> ([PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128], [PASS][129], [PASS][130], [SKIP][131], [PASS][132], [PASS][133]) ([Intel XE#2457] / [Intel XE#7405])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-5/igt@xe_module_load@load.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-6/igt@xe_module_load@load.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-3/igt@xe_module_load@load.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-7/igt@xe_module_load@load.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-7/igt@xe_module_load@load.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-7/igt@xe_module_load@load.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-10/igt@xe_module_load@load.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-2/igt@xe_module_load@load.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-2/igt@xe_module_load@load.html
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-6/igt@xe_module_load@load.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-10/igt@xe_module_load@load.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-10/igt@xe_module_load@load.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-2/igt@xe_module_load@load.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-5/igt@xe_module_load@load.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-9/igt@xe_module_load@load.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-9/igt@xe_module_load@load.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-1/igt@xe_module_load@load.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-1/igt@xe_module_load@load.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-5/igt@xe_module_load@load.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-5/igt@xe_module_load@load.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-8/igt@xe_module_load@load.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-8/igt@xe_module_load@load.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-8/igt@xe_module_load@load.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-3/igt@xe_module_load@load.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-3/igt@xe_module_load@load.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf/shard-bmg-1/igt@xe_module_load@load.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-8/igt@xe_module_load@load.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@xe_module_load@load.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-7/igt@xe_module_load@load.html
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-3/igt@xe_module_load@load.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-1/igt@xe_module_load@load.html
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-1/igt@xe_module_load@load.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-3/igt@xe_module_load@load.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-7/igt@xe_module_load@load.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@xe_module_load@load.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@xe_module_load@load.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@xe_module_load@load.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-10/igt@xe_module_load@load.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-10/igt@xe_module_load@load.html
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-6/igt@xe_module_load@load.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-3/igt@xe_module_load@load.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@xe_module_load@load.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-9/igt@xe_module_load@load.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@xe_module_load@load.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-2/igt@xe_module_load@load.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@xe_module_load@load.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-8/igt@xe_module_load@load.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-5/igt@xe_module_load@load.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-3/igt@xe_module_load@load.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-1/igt@xe_module_load@load.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/shard-bmg-10/igt@xe_module_load@load.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
[Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6569
[Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7325
[Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7347]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7347
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7393
[Intel XE#7395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7395
[Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
[Intel XE#7445]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7445
[Intel XE#7578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7578
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* IGT: IGT_8847 -> IGT_8849
* Linux: xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf -> xe-pw-164393v1
IGT_8847: 8847
IGT_8849: 8849
xe-4852-d873f0156bd08a3031097d459e2d3604bfe1b1bf: d873f0156bd08a3031097d459e2d3604bfe1b1bf
xe-pw-164393v1: 164393v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164393v1/index.html
[-- Attachment #2: Type: text/html, Size: 39151 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 2/5] drm/xe/xe_ras: Add structures and commands for get and clear counter
2026-04-06 14:54 ` [PATCH v2 2/5] drm/xe/xe_ras: Add structures and commands for get and clear counter Riana Tauro
@ 2026-04-13 9:03 ` Raag Jadav
0 siblings, 0 replies; 13+ messages in thread
From: Raag Jadav @ 2026-04-13 9:03 UTC (permalink / raw)
To: Riana Tauro
Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, ravi.kishore.koppuravuri, mallesh.koujalagi,
soham.purkait
On Mon, Apr 06, 2026 at 08:24:41PM +0530, Riana Tauro wrote:
> Add request and response structures for get and clear counter command.
...
> +/**
> + * struct xe_ras_info_queue_header - Info queue header
> + *
> + * This structure provides metadata about large info queue data
> + */
> +struct xe_ras_info_queue_header {
> + /** @total_size: Total size of complete info queue data (bytes) */
> + u32 total_size;
> + /** @chunk_offset: Offset of this chunk within total data (bytes) */
> + u32 chunk_offset;
> + /** @chunk_size: Size of data in this chunk (bytes) */
> + u32 chunk_size;
> + /** @sequence_number: Sequence number of this chunk (starts at 0) */
> + u32 sequence_number;
> + /** @flags: Info queue control flags */
> + u32 flags:8;
> + /** @compression_type: Compression algorithm used (0 = none) */
> + u32 compression_type:4;
> + /** @num_headers: Number of detailed counter headers present at the beginning of queue data */
> + u32 num_headers:5;
> + /** @reserved: Reserved for future use */
> + u32 reserved:15;
> + /** @checksum: Checksum of the chunk data */
> + u32 checksum;
> +} __packed;
Do we actually use this in the code?
> +
> +/**
> + * struct xe_ras_info_queue_response - Info queue response
> + *
> + * This structure provides the response for commands with info queue
> + */
> +struct xe_ras_info_queue_response {
> + /** @queue_header: Info queue metadata */
> + struct xe_ras_info_queue_header queue_header;
> + /** @queue_data: Info queue data chunk */
> + u8 queue_data[XE_RAS_INFO_QUEUE_MAX_CHUNK_SIZE];
> +} __packed;
Ditto.
> +
> +/**
> + * struct xe_ras_get_counter_request - Request for XE_SYSCTRL_CMD_GET_COUNTER
> + *
> + * This structure defines the request format to get error counter value.
> + */
> +struct xe_ras_get_counter_request {
> + /** @error_class: RAS error class */
> + struct xe_ras_error_class error_class;
> + /** @reserved: Reserved for future use */
> + u32 reserved;
> +} __packed;
> +
> +/**
> + * struct xe_ras_get_counter_response - Response for XE_SYSCTRL_CMD_GET_COUNTER
> + *
> + * This structure defines the response format to get error counter value.
> + */
> +struct xe_ras_get_counter_response {
> + /** @error_class: RAS error class */
> + struct xe_ras_error_class error_class;
> + /** @counter_value: Current counter value */
> + u32 counter_value;
> + /** @timestamp: Timestamp of the counter value */
> + u64 timestamp;
> + /** @threshold_value: Threshold value for the counter */
> + u32 threshold_value;
> + /** @counter_status: Status of the counter */
> + u32 counter_status:8;
Ditto.
> + /** @reserved: Reserved for future use */
> + u32 reserved:1;
> + /** @has_info_queue: Indicates if info queue is present */
> + u32 has_info_queue:1;
Ditto.
> + /** @reserved1: Reserved for future use */
> + u32 reserved1:22;
> + /** @info_queue: Info queue data */
> + struct xe_ras_info_queue_response info_queue;
Hm, so I'm wondering if we can just add reserved padding for now and
introduce the struct when we actually use it in code? Will tidy up things
quite a bit ;)
Also, probably just squash it with next patch where we use the struct.
> +} __packed;
> +
> +/**
> + * struct xe_ras_clear_counter_request - Request for XE_SYSCTRL_CMD_CLEAR_COUNTER
> + *
> + * This structure defines the request format to clear an error counter.
> + */
> +struct xe_ras_clear_counter_request {
> + /** @error_class: RAS error class */
> + struct xe_ras_error_class error_class;
> + /** @specific_counter: (1 = Specific counter, 0 = Aggregate counter) */
> + u32 specific_counter:1;
Same as above.
Raag
> + /** @reserved: Reserved for future use */
> + u32 reserved:31;
> +} __packed;
> +
> +/**
> + * struct xe_ras_clear_counter_response - Response for XE_SYSCTRL_CMD_CLEAR_COUNTER
> + *
> + * This structure defines the response received on clearing an error counter.
> + */
> +struct xe_ras_clear_counter_response {
> + /** @error_class: RAS error class */
> + struct xe_ras_error_class error_class;
> + /** @previous_counter_value: Counter value before clearing */
> + u32 previous_counter_value;
> + /** @clear_timestamp: Timestamp when the counter was cleared */
> + u64 clear_timestamp;
> + /** @status: Status of the clear operation (Success/Failure) */
> + u32 status;
> + /** @reserved: Reserved for future use */
> + u32 reserved[3];
> +} __packed;
> +#endif
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 3/5] drm/xe/xe_ras: Add support to query error counter for CRI
2026-04-06 14:54 ` [PATCH v2 3/5] drm/xe/xe_ras: Add support to query error counter for CRI Riana Tauro
@ 2026-04-13 9:19 ` Raag Jadav
0 siblings, 0 replies; 13+ messages in thread
From: Raag Jadav @ 2026-04-13 9:19 UTC (permalink / raw)
To: Riana Tauro
Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, ravi.kishore.koppuravuri, mallesh.koujalagi,
soham.purkait
On Mon, Apr 06, 2026 at 08:24:42PM +0530, Riana Tauro wrote:
> Add support to get error counter value for CRI.
>
> When userspace queries a drm_ras error counter, fetch the
> latest counter value from system controller.
>
> Integrate this with XE drm_ras.
>
> Usage :
>
> Query all error counter value using ynl
>
> $ sudo ynl --family drm_ras --dump get-error-counter --json \
> '{"node-id":0}'
> [{'error-id': 1, 'error-name': 'core-compute', 'error-value': 0},
> {'error-id': 2, 'error-name': 'soc-internal', 'error-value': 0},
> {'error-id': 3, 'error-name': 'device-memory', 'error-value': 0},
> {'error-id': 4, 'error-name': 'pcie', 'error-value': 0},
> {'error-id': 5, 'error-name': 'fabric', 'error-value': 0}]
>
> Query single error counter value using ynl
>
> $ sudo ynl --family drm_ras --do get-error-counter --json \
> '{"node-id":1, "error-id":1}'
> {'error-id': 1, 'error-name': 'core-compute', 'error-value': 2}
>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: split functions
> fix commit message (Raag)
> ---
> drivers/gpu/drm/xe/Makefile | 1 +
> drivers/gpu/drm/xe/xe_drm_ras.c | 22 +++---
> drivers/gpu/drm/xe/xe_ras.c | 123 ++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_ras.h | 16 +++++
> 4 files changed, 154 insertions(+), 8 deletions(-)
> create mode 100644 drivers/gpu/drm/xe/xe_ras.c
> create mode 100644 drivers/gpu/drm/xe/xe_ras.h
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 110fef511fe2..8fcd676ab41c 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -111,6 +111,7 @@ xe-y += xe_bb.o \
> xe_pxp_debugfs.o \
> xe_pxp_submit.o \
> xe_query.o \
> + xe_ras.o \
> xe_range_fence.o \
> xe_reg_sr.o \
> xe_reg_whitelist.o \
> diff --git a/drivers/gpu/drm/xe/xe_drm_ras.c b/drivers/gpu/drm/xe/xe_drm_ras.c
> index e07dc23a155e..b334881e034a 100644
> --- a/drivers/gpu/drm/xe/xe_drm_ras.c
> +++ b/drivers/gpu/drm/xe/xe_drm_ras.c
> @@ -11,17 +11,27 @@
>
> #include "xe_device_types.h"
> #include "xe_drm_ras.h"
> +#include "xe_ras.h"
>
> static const char * const error_components[] = DRM_XE_RAS_ERROR_COMPONENT_NAMES;
> static const char * const error_severity[] = DRM_XE_RAS_ERROR_SEVERITY_NAMES;
>
> -static int hw_query_error_counter(struct xe_drm_ras_counter *info,
> - u32 error_id, const char **name, u32 *val)
> +static int hw_query_error_counter(struct xe_device *xe,
> + const enum drm_xe_ras_error_severity severity, u32 error_id,
> + const char **name, u32 *val)
> {
> + struct xe_drm_ras *ras = &xe->ras;
> + struct xe_drm_ras_counter *info = ras->info[severity];
> +
> if (!info || !info[error_id].name)
> return -ENOENT;
>
> *name = info[error_id].name;
> +
> + /* Fetch counter from system controller if supported */
> + if (xe->info.has_sysctrl)
> + return xe_ras_get_error_counter(xe, severity, error_id, val);
Hm, this looks like should be a separate patch which hooks CRI pieces
to DRM RAS.
> +
> *val = atomic_read(&info[error_id].counter);
>
> return 0;
> @@ -31,20 +41,16 @@ static int query_uncorrectable_error_counter(struct drm_ras_node *ep, u32 error_
> const char **name, u32 *val)
> {
> struct xe_device *xe = ep->priv;
> - struct xe_drm_ras *ras = &xe->ras;
> - struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_UNCORRECTABLE];
>
> - return hw_query_error_counter(info, error_id, name, val);
> + return hw_query_error_counter(xe, DRM_XE_RAS_ERR_SEV_UNCORRECTABLE, error_id, name, val);
> }
>
> static int query_correctable_error_counter(struct drm_ras_node *ep, u32 error_id,
> const char **name, u32 *val)
> {
> struct xe_device *xe = ep->priv;
> - struct xe_drm_ras *ras = &xe->ras;
> - struct xe_drm_ras_counter *info = ras->info[DRM_XE_RAS_ERR_SEV_CORRECTABLE];
>
> - return hw_query_error_counter(info, error_id, name, val);
> + return hw_query_error_counter(xe, DRM_XE_RAS_ERR_SEV_CORRECTABLE, error_id, name, val);
> }
>
> static struct xe_drm_ras_counter *allocate_and_copy_counters(struct xe_device *xe)
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> new file mode 100644
> index 000000000000..b5fdad2c801d
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -0,0 +1,123 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#include "xe_device_types.h"
> +#include "xe_pm.h"
> +#include "xe_printk.h"
> +#include "xe_ras.h"
> +#include "xe_ras_types.h"
> +#include "xe_sysctrl_mailbox.h"
> +#include "xe_sysctrl_mailbox_types.h"
> +
> +/* Severity classification of detected errors */
> +enum xe_ras_severity {
> + XE_RAS_SEVERITY_NOT_SUPPORTED = 0,
> + XE_RAS_SEVERITY_CORRECTABLE,
> + XE_RAS_SEVERITY_UNCORRECTABLE,
> + XE_RAS_SEVERITY_INFORMATIONAL,
> + XE_RAS_SEVERITY_MAX
> +};
> +
> +/* major IP blocks where errors can originate */
> +enum xe_ras_component {
> + XE_RAS_COMPONENT_NOT_SUPPORTED = 0,
> + XE_RAS_COMPONENT_DEVICE_MEMORY,
> + XE_RAS_COMPONENT_CORE_COMPUTE,
> + XE_RAS_COMPONENT_RESERVED,
> + XE_RAS_COMPONENT_PCIE,
> + XE_RAS_COMPONENT_FABRIC,
> + XE_RAS_COMPONENT_SOC_INTERNAL,
> + XE_RAS_COMPONENT_MAX
> +};
> +
> +/* Mapping from drm_xe_ras_error_component to xe_ras_component */
> +static const int drm_to_xe_ras_component[] = {
> + [DRM_XE_RAS_ERR_COMP_CORE_COMPUTE] = XE_RAS_COMPONENT_CORE_COMPUTE,
> + [DRM_XE_RAS_ERR_COMP_SOC_INTERNAL] = XE_RAS_COMPONENT_SOC_INTERNAL,
> + [DRM_XE_RAS_ERR_COMP_DEVICE_MEMORY] = XE_RAS_COMPONENT_DEVICE_MEMORY,
> + [DRM_XE_RAS_ERR_COMP_PCIE] = XE_RAS_COMPONENT_PCIE,
> + [DRM_XE_RAS_ERR_COMP_FABRIC] = XE_RAS_COMPONENT_FABRIC
> +};
> +static_assert(ARRAY_SIZE(drm_to_xe_ras_component) == DRM_XE_RAS_ERR_COMP_MAX);
Curious, should we also reuse uapi names for logging?
> +/* Mapping from drm_xe_ras_error_severity to xe_ras_severity */
> +static const int drm_to_xe_ras_severity[] = {
> + [DRM_XE_RAS_ERR_SEV_CORRECTABLE] = XE_RAS_SEVERITY_CORRECTABLE,
> + [DRM_XE_RAS_ERR_SEV_UNCORRECTABLE] = XE_RAS_SEVERITY_UNCORRECTABLE
> +};
> +static_assert(ARRAY_SIZE(drm_to_xe_ras_severity) == DRM_XE_RAS_ERR_SEV_MAX);
Ditto.
> +static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
> + u32 cmd_mask, void *request, size_t request_len,
> + void *response, size_t response_len)
> +{
> + struct xe_sysctrl_app_msg_hdr hdr = {0};
> + u32 req_hdr;
> +
> + req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |
> + FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask);
Same comments as earlier patch[1].
[1] https://lore.kernel.org/intel-xe/adY4x7iYSfs04ufg@black.igk.intel.com/
> + hdr.data = req_hdr;
> + command->header = hdr;
> + command->data_in = request;
> + command->data_in_len = request_len;
> + command->data_out = response;
> + command->data_out_len = response_len;
> +}
> +
> +static int get_error_counter(struct xe_device *xe, struct xe_ras_error_class *error_class,
> + u32 *value)
> +{
> + struct xe_ras_get_counter_response response = {0};
> + struct xe_ras_get_counter_request request = {0};
> + struct xe_sysctrl_mailbox_command command = {0};
> + size_t rlen;
> + int ret;
> +
> + request.error_class = *error_class;
> +
> + prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_COUNTER, &request, sizeof(request),
> + &response, sizeof(response));
> +
> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> + if (ret) {
> + xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
This gives the impression of RAS error, but is it really?
> + return ret;
> + }
> +
> + if (rlen != sizeof(response)) {
> + xe_err(xe, "[RAS]: Sysctrl response size mismatch. Expected %zu, got %zu\n",
Ditto.
> + sizeof(response), rlen);
> + return -EINVAL;
Is this propagated back to the user? If yes, is this the correct error
code for the scenario?
Raag
> + }
> +
> + *value = response.counter_value;
> +
> + return 0;
> +}
> +
> +/**
> + * xe_ras_get_error_counter() - Get error counter value
> + * @xe: xe device instance
> + * @severity: Error severity level to be queried
> + * @error_id: Error component to be queried
> + * @value: Counter value
> + *
> + * This function retrieves the value of a specific RAS error counter based on
> + * the provided severity and component.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
> + u32 error_id, u32 *value)
> +{
> + struct xe_ras_error_class error_class = {0};
> +
> + error_class.common.severity = drm_to_xe_ras_severity[severity];
> + error_class.common.component = drm_to_xe_ras_component[error_id];
> +
> + guard(xe_pm_runtime)(xe);
> + return get_error_counter(xe, &error_class, value);
> +}
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> new file mode 100644
> index 000000000000..e468c414148e
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -0,0 +1,16 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _XE_RAS_H_
> +#define _XE_RAS_H_
> +
> +#include <uapi/drm/xe_drm.h>
> +
> +struct xe_device;
> +
> +int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
> + u32 error_id, u32 *value);
> +
> +#endif
> --
> 2.47.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 4/5] drm/xe/xe_ras: Add helper to clear error counter
2026-04-06 14:54 ` [PATCH v2 4/5] drm/xe/xe_ras: Add helper to clear error counter Riana Tauro
@ 2026-04-13 9:25 ` Raag Jadav
0 siblings, 0 replies; 13+ messages in thread
From: Raag Jadav @ 2026-04-13 9:25 UTC (permalink / raw)
To: Riana Tauro
Cc: intel-xe, anshuman.gupta, rodrigo.vivi, aravind.iddamsetty,
badal.nilawar, ravi.kishore.koppuravuri, mallesh.koujalagi,
soham.purkait
On Mon, Apr 06, 2026 at 08:24:43PM +0530, Riana Tauro wrote:
> Add helper function to clear error counter value.
>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> Note: This will be integrated with drm_ras implementation
> once clear-error-counter patch is merged.
> https://patchwork.freedesktop.org/series/163019/
> ---
> drivers/gpu/drm/xe/xe_ras.c | 48 +++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_ras.h | 2 ++
> 2 files changed, 50 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index b5fdad2c801d..56abcb9783a4 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -121,3 +121,51 @@ int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_s
> guard(xe_pm_runtime)(xe);
> return get_error_counter(xe, &error_class, value);
> }
> +
> +/**
> + * xe_ras_clear_error_counter() - Clear error counter value
> + * @xe: xe device instance
> + * @severity: Error severity level to be cleared
> + * @error_id: Error component to be cleared
> + *
> + * This function clears the value of a specific RAS error counter based on
> + * the provided severity and component.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int xe_ras_clear_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
> + u32 error_id)
> +{
> + struct xe_ras_clear_counter_response response = {0};
> + struct xe_ras_clear_counter_request request = {0};
> + struct xe_sysctrl_mailbox_command command = {0};
> + struct xe_ras_error_class *error_class = &request.error_class;
> + size_t rlen;
> + int ret;
> +
> + error_class->common.severity = drm_to_xe_ras_severity[severity];
> + error_class->common.component = drm_to_xe_ras_component[error_id];
> +
> + prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_CLEAR_COUNTER, &request, sizeof(request),
> + &response, sizeof(response));
Nit: Probably worth having a set_error_counter(), we never know when might
need it :D
Raag
> +
> + guard(xe_pm_runtime)(xe);
> + ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> + if (ret) {
> + xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
> + return ret;
> + }
> +
> + if (rlen != sizeof(response)) {
> + xe_err(xe, "[RAS]: Sysctrl response size mismatch. Expected %zu, got %zu\n",
> + sizeof(response), rlen);
> + return -EINVAL;
> + }
> +
> + if (response.status) {
> + xe_err(xe, "[RAS]: Sysctrl Failed to clear counter %u\n", response.status);
> + return -EIO;
> + }
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index e468c414148e..19e0e649d55f 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -12,5 +12,7 @@ struct xe_device;
>
> int xe_ras_get_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
> u32 error_id, u32 *value);
> +int xe_ras_clear_error_counter(struct xe_device *xe, const enum drm_xe_ras_error_severity severity,
> + u32 error_id);
>
> #endif
> --
> 2.47.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2026-04-13 9:25 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-04-06 14:54 [PATCH v2 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
2026-04-06 14:54 ` [PATCH v2 1/5] drm/xe/uapi: Add additional error components to XE drm_ras Riana Tauro
2026-04-06 14:54 ` [PATCH v2 2/5] drm/xe/xe_ras: Add structures and commands for get and clear counter Riana Tauro
2026-04-13 9:03 ` Raag Jadav
2026-04-06 14:54 ` [PATCH v2 3/5] drm/xe/xe_ras: Add support to query error counter for CRI Riana Tauro
2026-04-13 9:19 ` Raag Jadav
2026-04-06 14:54 ` [PATCH v2 4/5] drm/xe/xe_ras: Add helper to clear error counter Riana Tauro
2026-04-13 9:25 ` Raag Jadav
2026-04-06 14:54 ` [PATCH v2 5/5] drm/xe/ras: Add flag for Xe RAS Riana Tauro
2026-04-06 14:54 ` ✗ CI.checkpatch: warning for Add get-error-counter and clear-error-counter support for CRI Patchwork
2026-04-06 14:56 ` ✓ CI.KUnit: success " Patchwork
2026-04-06 15:32 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-06 18:50 ` ✗ Xe.CI.FULL: failure " Patchwork
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