[PATCH v4 00/13] Introduce Xe Uncorrectable Error Handling

[PATCH v4 00/13] Introduce Xe Uncorrectable Error Handling

[Riana Tauro]

This series adds support for XE Uncorrectable Error Handling

The first four patches implement PCI error recovery callbacks for AER events.
On fatal errors, the device is wedged in error_detected and a Secondary
Bus reset (SBR) is requested from PCI core by returning
PCI_ERS_RESULT_NEED_RESET.

On non-fatal errors, the mmio_enabled callback is invoked to query the
error and attempt the required recovery.

This series adds support for handling Uncorrectable core compute,
SoC internal and device memory errors.

Core Compute Errors: Uncorrectable Core-Compute errors are classified
into Global and Local errors.
Global error is an error that affects the entire device requiring
a reset to recover. When an AER is reported and error_detected is invoked
return PCI_ERS_RESULT_NEED_RESET.
A Local error is confined to a specific component or context like a
engine. These errors can be contained and recovered by resetting
only the affected part without distrupting the rest of the device.

SoC Internal errors: Most of the uncorrectable SoC internal errors
are recovered using a SBR apart from CSC firmware and Punit errors.
CSC firmware errors requires a firmware flash to be recovered whereas
Punit error requires cold-reset.

Device memory errors: Most of the uncorrectable memory errors are
recovered using a SBR. However, Double-bit ECC error requires page
offlining for containment. Add helpers to instruct firmware to offline
page. Also add helpers to get pages offlined by firmware on module load.
The page offlining patch will be integrated after the patch
https://patchwork.freedesktop.org/series/161473/ is merged.

Rev2: Add support for SoC internal errors
      fix review comments

Rev3: remove in_recovery flag for disconnect error
      prevent sysctrl flooding
      use minimal logging
      simplify soc structures
      add error_count to GT structures

Rev4: add device memory errors
      add helpers for memory errors
      fix cosmetic review comments

Riana Tauro (13):
  drm/xe/xe_survivability: Decouple survivability info from boot
    survivability
  drm/xe/xe_pci_error: Implement PCI error recovery callbacks
  drm/xe/xe_pci_error: Group all devres to release them on PCIe slot
    reset
  drm/xe: Skip device access during PCI error recovery
  drm/xe/xe_ras: Initialize Uncorrectable AER Registers
  drm/xe/xe_ras: Add basic structures and commands for uncorrectable
    errors
  drm/xe/xe_ras: Add support for uncorrectable core-compute errors
  drm/xe/xe_ras: Handle uncorrectable SoC Internal errors
  drm/xe/xe_ras: Handle uncorrectable device memory errors
  drm/xe/xe_ras: Add support to offline/decline a page
  drm/xe/xe_ras: Add support for page offline list and queue commands
  drm/xe/xe_ras: Query errors from system controller on probe
  drm/xe/xe_pci_error: Process errors in mmio_enabled

 drivers/gpu/drm/xe/Makefile                   |   2 +
 drivers/gpu/drm/xe/xe_device.c                |  26 +-
 drivers/gpu/drm/xe/xe_device.h                |  15 +
 drivers/gpu/drm/xe/xe_device_types.h          |   6 +
 drivers/gpu/drm/xe/xe_gt.c                    |  14 +-
 drivers/gpu/drm/xe/xe_guc_submit.c            |   9 +-
 drivers/gpu/drm/xe/xe_pci.c                   |   3 +
 drivers/gpu/drm/xe/xe_pci_error.c             | 121 +++++
 drivers/gpu/drm/xe/xe_ras.c                   | 489 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h                   |  18 +
 drivers/gpu/drm/xe/xe_ras_types.h             | 339 ++++++++++++
 drivers/gpu/drm/xe/xe_survivability_mode.c    |  13 +-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  19 +
 13 files changed, 1057 insertions(+), 17 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c
 create mode 100644 drivers/gpu/drm/xe/xe_ras.c
 create mode 100644 drivers/gpu/drm/xe/xe_ras.h
 create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h

-- 
2.47.1

[PATCH v4 01/13] drm/xe/xe_survivability: Decouple survivability info from boot survivability

[Riana Tauro]

On CSC runtime firmware errors that requires firmware flash through SPI,
PCODE sets the FDO mode bit in the Capability register.
Currently the survivability_info group is created only for boot
survivability.

Create survivability_info group even for runtime survivability to allow
userspace to check FDO mode sysfs.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: Fix typo (Mallesh)

v3: use tab (Mallesh)
---
 drivers/gpu/drm/xe/xe_survivability_mode.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index db64cac39c94..3110ab5d920b 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -54,7 +54,6 @@
  *	# cat /sys/bus/pci/devices/<device>/survivability_mode
  *	  Boot
  *
- *
  * Any additional debug information if present will be visible under the directory
  * ``survivability_info``::
  *
@@ -98,6 +97,15 @@
  *	# cat /sys/bus/pci/devices/<device>/survivability_mode
  *	  Runtime
  *
+ * On some CSC firmware errors, PCODE sets FDO mode and the only recovery possible is through
+ * firmware flash using SPI driver. Userspace can check if FDO mode is set by checking the below
+ * sysfs entry.
+ *
+ * .. code-block:: shell
+ *
+ *	# cat /sys/bus/pci/devices/<device>/survivability_info/fdo_mode
+ *	  enabled
+ *
  * When such errors occur, userspace is notified with the drm device wedged uevent and runtime
  * survivability mode. User can then initiate a firmware flash using userspace tools like fwupd
  * to restore device to normal operation.
@@ -296,7 +304,8 @@ static int create_survivability_sysfs(struct pci_dev *pdev)
 	if (ret)
 		return ret;
 
-	if (check_boot_failure(xe)) {
+	/* Survivability info is not required if enabled via configfs */
+	if (!xe_configfs_get_survivability_mode(pdev)) {
 		ret = devm_device_add_group(dev, &survivability_info_group);
 		if (ret)
 			return ret;
-- 
2.47.1

[PATCH v4 02/13] drm/xe/xe_pci_error: Implement PCI error recovery callbacks

[Riana Tauro]

Add error_detected, mmio_enabled, slot_reset and resume recovery callbacks
to handle PCIe Advanced Error Reporting (AER) errors.

For fatal errors, the device is wedged and becomes inaccessible. Return
PCI_ERS_RESULT_SLOT_RESET from error_detected to request a Secondary
Bus Reset (SBR).

For non-fatal errors, return PCI_ERS_RESULT_CAN_RECOVER from
error_detected to trigger the mmio_enabled callback. In this callback, the
device is queried to determine the error cause and attempt recovery based
on the error type.

Once the secondary bus reset(SBR) is completed the slot_reset callback
cleanly removes and reprobe the device to restore functionality.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: re-order linux headers
    reword error messages
    do not clear in_recovery after remove
    return PCI_ERS_RESULT_DISCONNECT if probe fails (Michal)
    only wedge device do not send uevent (Raag)
    set recovery flag in error_detected and clear on resume
    add default switch case (Mallesh)

v3: do not set in_recovery for disconnect (Mallesh)
    return if already wedged or in survivability mode

v4: Add comment (Matthew)
    Fix tab (Mallesh)
---
 drivers/gpu/drm/xe/Makefile          |   1 +
 drivers/gpu/drm/xe/xe_device.h       |  15 ++++
 drivers/gpu/drm/xe/xe_device_types.h |   3 +
 drivers/gpu/drm/xe/xe_pci.c          |   3 +
 drivers/gpu/drm/xe/xe_pci_error.c    | 107 +++++++++++++++++++++++++++
 5 files changed, 129 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index e42e582aca5c..69c233d9a488 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -101,6 +101,7 @@ xe-y += xe_bb.o \
 	xe_page_reclaim.o \
 	xe_pat.o \
 	xe_pci.o \
+	xe_pci_error.o \
 	xe_pci_rebar.o \
 	xe_pcode.o \
 	xe_pm.o \
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 555c191f7510..6e18a51e0ade 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -43,6 +43,21 @@ static inline struct xe_device *ttm_to_xe_device(struct ttm_device *ttm)
 	return container_of(ttm, struct xe_device, ttm);
 }
 
+static inline bool xe_device_is_in_recovery(struct xe_device *xe)
+{
+	return atomic_read(&xe->in_recovery);
+}
+
+static inline void xe_device_set_in_recovery(struct xe_device *xe)
+{
+	atomic_set(&xe->in_recovery, 1);
+}
+
+static inline void xe_device_clear_in_recovery(struct xe_device *xe)
+{
+	atomic_set(&xe->in_recovery, 0);
+}
+
 struct xe_device *xe_device_create(struct pci_dev *pdev,
 				   const struct pci_device_id *ent);
 int xe_device_probe_early(struct xe_device *xe);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 150c76b2acaf..c9fe86b670bd 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -494,6 +494,9 @@ struct xe_device {
 		bool inconsistent_reset;
 	} wedged;
 
+	/** @in_recovery: Indicates if device is in recovery */
+	atomic_t in_recovery;
+
 	/** @bo_device: Struct to control async free of BOs */
 	struct xe_bo_dev {
 		/** @bo_device.async_free: Free worker */
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 6e560ef84a97..7ac433742f82 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1324,6 +1324,8 @@ static const struct dev_pm_ops xe_pm_ops = {
 };
 #endif
 
+extern const struct pci_error_handlers xe_pci_error_handlers;
+
 static struct pci_driver xe_pci_driver = {
 	.name = DRIVER_NAME,
 	.id_table = pciidlist,
@@ -1331,6 +1333,7 @@ static struct pci_driver xe_pci_driver = {
 	.remove = xe_pci_remove,
 	.shutdown = xe_pci_shutdown,
 	.sriov_configure = xe_pci_sriov_configure,
+	.err_handler = &xe_pci_error_handlers,
 #ifdef CONFIG_PM_SLEEP
 	.driver.pm = &xe_pm_ops,
 #endif
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
new file mode 100644
index 000000000000..427a8e09408c
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+#include <linux/pci.h>
+
+#include <drm/drm_drv.h>
+
+#include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_pci.h"
+#include "xe_survivability_mode.h"
+#include "xe_uc.h"
+
+static void xe_pci_error_handling(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	struct xe_gt *gt;
+	u8 id;
+
+	/* Return if device is wedged or in survivability mode */
+	if (xe_survivability_mode_is_boot_enabled(xe) || xe_device_wedged(xe))
+		return;
+
+	/*
+	 * Wedge the device to prevent userspace access but don't send the event yet.
+	 * Runtime PM ref is taken by PCI core for the duration of error handling.
+	 */
+	atomic_set(&xe->wedged.flag, 1);
+
+	for_each_gt(gt, xe, id)
+		xe_gt_declare_wedged(gt);
+
+	pci_disable_device(pdev);
+}
+
+static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	dev_err(&pdev->dev, "Xe Pci error recovery: error detected state %d\n", state);
+
+	if (state == pci_channel_io_perm_failure)
+		return PCI_ERS_RESULT_DISCONNECT;
+
+	xe_device_set_in_recovery(xe);
+
+	switch (state) {
+	case pci_channel_io_normal:
+		return PCI_ERS_RESULT_CAN_RECOVER;
+	case pci_channel_io_frozen:
+		xe_pci_error_handling(pdev);
+		return PCI_ERS_RESULT_NEED_RESET;
+	default:
+		dev_err(&pdev->dev, "Unknown state %d\n", state);
+		return PCI_ERS_RESULT_NEED_RESET;
+	}
+}
+
+static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
+{
+	dev_err(&pdev->dev, "Xe Pci error recovery: MMIO enabled\n");
+
+	return PCI_ERS_RESULT_NEED_RESET;
+}
+
+static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
+{
+	const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
+
+	dev_err(&pdev->dev, "Xe Pci error recovery: Slot reset\n");
+
+	pci_restore_state(pdev);
+
+	if (pci_enable_device(pdev)) {
+		dev_err(&pdev->dev,
+			"Cannot re-enable PCI device after reset\n");
+		return PCI_ERS_RESULT_DISCONNECT;
+	}
+
+	/*
+	 * Secondary Bus Reset wipes out all device memory
+	 * requiring XE KMD to perform a device removal and reprobe.
+	 */
+	pdev->driver->remove(pdev);
+
+	if (!pdev->driver->probe(pdev, ent))
+		return PCI_ERS_RESULT_RECOVERED;
+
+	return PCI_ERS_RESULT_DISCONNECT;
+}
+
+static void xe_pci_error_resume(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	dev_info(&pdev->dev, "Xe Pci error recovery: Recovered\n");
+
+	xe_device_clear_in_recovery(xe);
+}
+
+const struct pci_error_handlers xe_pci_error_handlers = {
+	.error_detected	= xe_pci_error_detected,
+	.mmio_enabled	= xe_pci_error_mmio_enabled,
+	.slot_reset	= xe_pci_error_slot_reset,
+	.resume		= xe_pci_error_resume,
+};
-- 
2.47.1

[PATCH v4 03/13] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset

[Riana Tauro]

Add devres grouping to handle device resource cleanup during
PCI error recovery.

Secondary Bus Reset (SBR) is triggered by PCI core when the
error_detected/mmio_enabled callbacks return PCI_ERS_RESULT_NEED_RESET.

Once SBR is complete, the slot_reset callback is triggered. SBR wipes
out all device memory requiring XE KMD to perform a device removal and
reprobe.
Calling xe_pci_remove() alone does not free the devres allocated.
Since there are no exported functions to release all devres, group the
devres allocations and release the entire group during slot reset to
ensure proper cleanup.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/xe_device.c       | 7 +++++++
 drivers/gpu/drm/xe/xe_device_types.h | 3 +++
 drivers/gpu/drm/xe/xe_pci_error.c    | 2 ++
 3 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 4b45b617a039..cbdf7426e09c 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -477,6 +477,7 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
 {
 	struct drm_driver *driver = &regular_driver;
 	struct xe_device *xe;
+	void *devres_id;
 	int err;
 
 #ifdef CONFIG_PCI_IOV
@@ -494,10 +495,16 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
 	if (err)
 		return ERR_PTR(err);
 
+	devres_id = devres_open_group(&pdev->dev, NULL, GFP_KERNEL);
+	if (!devres_id)
+		return ERR_PTR(-ENOMEM);
+
 	xe = devm_drm_dev_alloc(&pdev->dev, driver, struct xe_device, drm);
 	if (IS_ERR(xe))
 		return xe;
 
+	xe->devres_group_id = devres_id;
+
 	err = ttm_device_init(&xe->ttm, &xe_ttm_funcs, xe->drm.dev,
 			      xe->drm.anon_inode->i_mapping,
 			      xe->drm.vma_offset_manager, 0);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index c9fe86b670bd..c89e2d31583c 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -497,6 +497,9 @@ struct xe_device {
 	/** @in_recovery: Indicates if device is in recovery */
 	atomic_t in_recovery;
 
+	/** @devres_group_id: id for devres group */
+	void *devres_group_id;
+
 	/** @bo_device: Struct to control async free of BOs */
 	struct xe_bo_dev {
 		/** @bo_device.async_free: Free worker */
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 427a8e09408c..7d80bc2a6954 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -67,6 +67,7 @@ static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
 static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 {
 	const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
+	struct xe_device *xe = pdev_to_xe_device(pdev);
 
 	dev_err(&pdev->dev, "Xe Pci error recovery: Slot reset\n");
 
@@ -83,6 +84,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 	 * requiring XE KMD to perform a device removal and reprobe.
 	 */
 	pdev->driver->remove(pdev);
+	devres_release_group(&pdev->dev, xe->devres_group_id);
 
 	if (!pdev->driver->probe(pdev, ent))
 		return PCI_ERS_RESULT_RECOVERED;
-- 
2.47.1

[PATCH v4 04/13] drm/xe: Skip device access during PCI error recovery

[Riana Tauro]

When a fatal error occurs and the error_detected callback is
invoked the device is inaccessible. The error_detected callback
wedges the device causing the jobs to timeout.

The timedout handler acquires forcewake to dump devcoredump and
triggers a GT reset. Since the device is inacessible this causes
errors. Skip all mmio accesses and gt reset when the device
is in recovery.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add check in worker (Mallesh)
---
 drivers/gpu/drm/xe/xe_gt.c         | 14 +++++++++++---
 drivers/gpu/drm/xe/xe_guc_submit.c |  9 +++++----
 2 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 8a31c963c372..5ea5524d83af 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -917,6 +917,9 @@ static void gt_reset_worker(struct work_struct *w)
 	if (xe_device_wedged(gt_to_xe(gt)))
 		goto err_pm_put;
 
+	if (xe_device_is_in_recovery(gt_to_xe(gt)))
+		goto err_pm_put;
+
 	/* We only support GT resets with GuC submission */
 	if (!xe_device_uc_enabled(gt_to_xe(gt)))
 		goto err_pm_put;
@@ -977,18 +980,23 @@ static void gt_reset_worker(struct work_struct *w)
 
 void xe_gt_reset_async(struct xe_gt *gt)
 {
-	xe_gt_info(gt, "trying reset from %ps\n", __builtin_return_address(0));
+	struct xe_device *xe = gt_to_xe(gt);
+
+	if (xe_device_is_in_recovery(xe))
+		return;
 
 	/* Don't do a reset while one is already in flight */
 	if (!xe_fault_inject_gt_reset() && xe_uc_reset_prepare(&gt->uc))
 		return;
 
+	xe_gt_info(gt, "trying reset from %ps\n", __builtin_return_address(0));
+
 	xe_gt_info(gt, "reset queued\n");
 
 	/* Pair with put in gt_reset_worker() if work is enqueued */
-	xe_pm_runtime_get_noresume(gt_to_xe(gt));
+	xe_pm_runtime_get_noresume(xe);
 	if (!queue_work(gt->ordered_wq, &gt->reset.worker))
-		xe_pm_runtime_put(gt_to_xe(gt));
+		xe_pm_runtime_put(xe);
 }
 
 void xe_gt_suspend_prepare(struct xe_gt *gt)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 10556156eaad..1f32fb14a5c1 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1522,7 +1522,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 	 * If devcoredump not captured and GuC capture for the job is not ready
 	 * do manual capture first and decide later if we need to use it
 	 */
-	if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
+	if (!xe_device_is_in_recovery(xe) && !exec_queue_killed(q) && !xe->devcoredump.captured &&
 	    !xe_guc_capture_get_matching_and_lock(q)) {
 		/* take force wake before engine register manual capture */
 		CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
@@ -1544,8 +1544,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 	set_exec_queue_banned(q);
 
 	/* Kick job / queue off hardware */
-	if (!wedged && (exec_queue_enabled(primary) ||
-			exec_queue_pending_disable(primary))) {
+	if (!xe_device_is_in_recovery(xe) && !wedged &&
+	    (exec_queue_enabled(primary) || exec_queue_pending_disable(primary))) {
 		int ret;
 
 		if (exec_queue_reset(primary))
@@ -1613,7 +1613,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 
 	trace_xe_sched_job_timedout(job);
 
-	if (!exec_queue_killed(q))
+	/* Do not access device if in recovery */
+	if (!xe_device_is_in_recovery(xe) && !exec_queue_killed(q))
 		xe_devcoredump(q, job,
 			       "Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx",
 			       xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
-- 
2.47.1

[PATCH v4 05/13] drm/xe/xe_ras: Initialize Uncorrectable AER Registers

[Riana Tauro]

Uncorrectable errors from different endpoints in the device are steered to
the USP(Upstream Switch Port) which is a PCI Advanced Error Reporting (AER)
Compliant device. Downgrade all the errors to non-fatal to prevent PCIe
bus driver from triggering a Secondary Bus Reset (SBR). This allows error
detection, containment and recovery in the driver.

The Uncorrectable Error Severity Register has the 'Uncorrectable
Internal Error Severity' set to fatal by default. Set this to
non-fatal and unmask the error.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: clear stale uncorrectable internal status in status register
(Aravind)

v3: Abbrevate TLA's (Raag)
    Add a info message if USP does not support AER
---
 drivers/gpu/drm/xe/Makefile    |  1 +
 drivers/gpu/drm/xe/xe_device.c |  3 ++
 drivers/gpu/drm/xe/xe_ras.c    | 84 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h    | 13 ++++++
 4 files changed, 101 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_ras.c
 create mode 100644 drivers/gpu/drm/xe/xe_ras.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 69c233d9a488..e29a4ae99ac6 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -113,6 +113,7 @@ xe-y += xe_bb.o \
 	xe_pxp_debugfs.o \
 	xe_pxp_submit.o \
 	xe_query.o \
+	xe_ras.o \
 	xe_range_fence.o \
 	xe_reg_sr.o \
 	xe_reg_whitelist.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index cbdf7426e09c..c1c54836ac73 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -62,6 +62,7 @@
 #include "xe_psmi.h"
 #include "xe_pxp.h"
 #include "xe_query.h"
+#include "xe_ras.h"
 #include "xe_shrinker.h"
 #include "xe_soc_remapper.h"
 #include "xe_survivability_mode.h"
@@ -1074,6 +1075,8 @@ int xe_device_probe(struct xe_device *xe)
 
 	xe_vsec_init(xe);
 
+	xe_ras_init(xe);
+
 	err = xe_sriov_init_late(xe);
 	if (err)
 		goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
new file mode 100644
index 000000000000..4f705deaeefa
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_device_types.h"
+#include "xe_ras.h"
+
+#ifdef CONFIG_PCIEAER
+static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
+{
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	struct pci_dev *vsp, *usp;
+	u32 aer_uncorr_mask, aer_uncorr_sev, aer_uncorr_status;
+	u16 aer_cap;
+
+	/*
+	 * Device Hierarchy:
+	 *
+	 * Upstream Switch Port (USP)--> Virtual Switch Port (VSP)--> SGunit (GPU endpoint)
+	 */
+	vsp = pci_upstream_bridge(pdev);
+	if (!vsp)
+		return;
+
+	usp = pci_upstream_bridge(vsp);
+	if (!usp)
+		return;
+
+	aer_cap = usp->aer_cap;
+
+	if (!aer_cap) {
+		dev_info(&usp->dev, "USP doesn't support AER capability\n");
+		return;
+	}
+
+	/*
+	 * Clear any stale Uncorrectable Internal Error Status event in Uncorrectable Error
+	 * Status Register.
+	 */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &aer_uncorr_status);
+	if (aer_uncorr_status & PCI_ERR_UNC_INTN)
+		pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, PCI_ERR_UNC_INTN);
+
+	/*
+	 * All errors are steered to USP which is a PCIe AER Compliant device.
+	 * Downgrade all the errors to non-fatal to prevent PCIe bus driver
+	 * from triggering a Secondary Bus Reset (SBR). This allows error
+	 * detection, containment and recovery in the driver.
+	 *
+	 * The Uncorrectable Error Severity Register has the 'Uncorrectable
+	 * Internal Error Severity' set to fatal by default. Set this to
+	 * non-fatal and unmask the error.
+	 */
+
+	/* Initialize Uncorrectable Error Severity Register */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, &aer_uncorr_sev);
+	aer_uncorr_sev &= ~PCI_ERR_UNC_INTN;
+	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, aer_uncorr_sev);
+
+	/* Initialize Uncorrectable Error Mask Register */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, &aer_uncorr_mask);
+	aer_uncorr_mask &= ~PCI_ERR_UNC_INTN;
+	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, aer_uncorr_mask);
+
+	pci_save_state(usp);
+}
+#endif
+
+/**
+ * xe_ras_init - Initialize Xe RAS
+ * @xe: xe device instance
+ *
+ * Initialize Xe RAS
+ */
+void xe_ras_init(struct xe_device *xe)
+{
+	if (!xe->info.has_sysctrl)
+		return;
+
+#ifdef CONFIG_PCIEAER
+	aer_unmask_and_downgrade_internal_error(xe);
+#endif
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
new file mode 100644
index 000000000000..14cb973603e7
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_H_
+#define _XE_RAS_H_
+
+struct xe_device;
+
+void xe_ras_init(struct xe_device *xe);
+
+#endif
-- 
2.47.1

[PATCH v4 06/13] drm/xe/xe_ras: Add basic structures and commands for uncorrectable errors

[Riana Tauro]

Add the commands and common structures for the get_soc_error
sysctrl command.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: use macro max error details (Mallesh)
    use static_assert
    fix kernel-doc

v3: simplify check (Raag)
    add counter value

v4: use not_supported instead of unknown (Raag)
---
 drivers/gpu/drm/xe/xe_ras.c                   | 57 +++++++++++
 drivers/gpu/drm/xe/xe_ras_types.h             | 96 +++++++++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 13 +++
 3 files changed, 166 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 4f705deaeefa..bf780e953925 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -3,9 +3,66 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include "xe_assert.h"
 #include "xe_device_types.h"
 #include "xe_ras.h"
 
+/* Severity classification of detected errors */
+enum xe_ras_severity {
+	XE_RAS_SEVERITY_NOT_SUPPORTED = 0,
+	XE_RAS_SEVERITY_CORRECTABLE,
+	XE_RAS_SEVERITY_UNCORRECTABLE,
+	XE_RAS_SEVERITY_INFORMATIONAL,
+	XE_RAS_SEVERITY_MAX
+};
+
+/* major IP blocks where errors can originate */
+enum xe_ras_component {
+	XE_RAS_COMPONENT_NOT_SUPPORTED = 0,
+	XE_RAS_COMPONENT_DEVICE_MEMORY,
+	XE_RAS_COMPONENT_CORE_COMPUTE,
+	XE_RAS_COMPONENT_RESERVED,
+	XE_RAS_COMPONENT_PCIE,
+	XE_RAS_COMPONENT_FABRIC,
+	XE_RAS_COMPONENT_SOC_INTERNAL,
+	XE_RAS_COMPONENT_MAX
+};
+
+static const char * const xe_ras_severities[] = {
+	[XE_RAS_SEVERITY_NOT_SUPPORTED]		= "Not Supported",
+	[XE_RAS_SEVERITY_CORRECTABLE]		= "Correctable",
+	[XE_RAS_SEVERITY_UNCORRECTABLE]		= "Uncorrectable",
+	[XE_RAS_SEVERITY_INFORMATIONAL]		= "Informational",
+};
+static_assert(ARRAY_SIZE(xe_ras_severities) == XE_RAS_SEVERITY_MAX);
+
+static const char * const xe_ras_components[] = {
+	[XE_RAS_COMPONENT_NOT_SUPPORTED]	= "Not Supported",
+	[XE_RAS_COMPONENT_DEVICE_MEMORY]	= "Device Memory",
+	[XE_RAS_COMPONENT_CORE_COMPUTE]		= "Core Compute",
+	[XE_RAS_COMPONENT_RESERVED]		= "Reserved",
+	[XE_RAS_COMPONENT_PCIE]			= "PCIe",
+	[XE_RAS_COMPONENT_FABRIC]		= "Fabric",
+	[XE_RAS_COMPONENT_SOC_INTERNAL]		= "SoC Internal",
+};
+static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMPONENT_MAX);
+
+static inline const char *severity_to_str(struct xe_device *xe, u32 severity)
+{
+	if (severity >= XE_RAS_SEVERITY_MAX)
+		severity = XE_RAS_SEVERITY_NOT_SUPPORTED;
+
+	return xe_ras_severities[severity];
+}
+
+static inline const char *comp_to_str(struct xe_device *xe, u32 comp)
+{
+	if (comp >= XE_RAS_COMPONENT_MAX)
+		comp = XE_RAS_COMPONENT_NOT_SUPPORTED;
+
+	return xe_ras_components[comp];
+}
+
 #ifdef CONFIG_PCIEAER
 static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
 {
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
new file mode 100644
index 000000000000..3d0f9e94a404
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_TYPES_H_
+#define _XE_RAS_TYPES_H_
+
+#include <linux/types.h>
+
+#define XE_RAS_NUM_ERROR_ARR		3
+#define XE_RAS_MAX_ERROR_DETAILS	16
+
+/**
+ * struct xe_ras_error_common - Common RAS error class
+ *
+ * This structure contains error severity and component information
+ * across all products
+ */
+struct xe_ras_error_common {
+	/** @severity: Error Severity */
+	u8 severity;
+	/** @component: IP where the error originated */
+	u8 component;
+} __packed;
+
+/**
+ * struct xe_ras_error_unit - Error unit information
+ */
+struct xe_ras_error_unit {
+	/** @tile: Tile identifier */
+	u8 tile;
+	/** @instance: Instance identifier within a component */
+	u32 instance;
+} __packed;
+
+/**
+ * struct xe_ras_error_cause - Error cause information
+ */
+struct xe_ras_error_cause {
+	/** @cause: Cause */
+	u32 cause;
+	/** @reserved: For future use */
+	u8 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_error_product - Error fields that are specific to the product
+ */
+struct xe_ras_error_product {
+	/** @unit: Unit within IP block */
+	struct xe_ras_error_unit unit;
+	/** @error_cause: Cause/checker */
+	struct xe_ras_error_cause error_cause;
+} __packed;
+
+/**
+ * struct xe_ras_error_class - Complete RAS Error Class
+ *
+ * This structure provides the complete error classification by combining
+ * the common error class with the product-specific error class.
+ */
+struct xe_ras_error_class {
+	/** @common: Common error severity and component */
+	struct xe_ras_error_common common;
+	/** @product: Product-specific unit and cause */
+	struct xe_ras_error_product product;
+} __packed;
+
+/**
+ * struct xe_ras_error_array - Details of the error types
+ */
+struct xe_ras_error_array {
+	/** @counter_value: Counter value of the returned error */
+	u32 counter_value;
+	/** @error_class: Error class */
+	struct xe_ras_error_class error_class;
+	/** @timestamp: Timestamp */
+	u64 timestamp;
+	/** @error_details: Error details specific to the class */
+	u32 error_details[XE_RAS_MAX_ERROR_DETAILS];
+} __packed;
+
+/**
+ * struct xe_ras_get_error_response - Response from get soc error command
+ */
+struct xe_ras_get_error_response {
+	/** @num_errors: Number of errors reported in this response */
+	u8 num_errors;
+	/** @additional_errors: Indicates if the errors are pending */
+	u8 additional_errors;
+	/** @error_arr: Array of up to 3 errors */
+	struct xe_ras_error_array error_arr[XE_RAS_NUM_ERROR_ARR];
+} __packed;
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 89456aec6097..00a0f05aab32 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -10,6 +10,19 @@
 
 #include "abi/xe_sysctrl_abi.h"
 
+/**
+ * enum xe_sysctrl_mailbox_command_id - Command ID's for GFSP group
+ *
+ * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Get basic error information
+ */
+enum xe_sysctrl_mailbox_command_id {
+	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01
+};
+
+enum xe_sysctrl_group {
+	XE_SYSCTRL_GROUP_GFSP = 1
+};
+
 /**
  * struct xe_sysctrl_mailbox_command - System Controller mailbox command
  */
-- 
2.47.1

Re: [PATCH v4 06/13] drm/xe/xe_ras: Add basic structures and commands for uncorrectable errors

[Matt Roper]

On Fri, Apr 17, 2026 at 02:28:18PM +0530, Riana Tauro wrote:
> Add the commands and common structures for the get_soc_error
> sysctrl command.
> 
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: use macro max error details (Mallesh)
>     use static_assert
>     fix kernel-doc
> 
> v3: simplify check (Raag)
>     add counter value
> 
> v4: use not_supported instead of unknown (Raag)
> ---
>  drivers/gpu/drm/xe/xe_ras.c                   | 57 +++++++++++
>  drivers/gpu/drm/xe/xe_ras_types.h             | 96 +++++++++++++++++++
>  drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 13 +++
>  3 files changed, 166 insertions(+)
>  create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h
> 
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 4f705deaeefa..bf780e953925 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -3,9 +3,66 @@
>   * Copyright © 2026 Intel Corporation
>   */
>  
> +#include "xe_assert.h"
>  #include "xe_device_types.h"
>  #include "xe_ras.h"
>  
> +/* Severity classification of detected errors */
> +enum xe_ras_severity {
> +	XE_RAS_SEVERITY_NOT_SUPPORTED = 0,
> +	XE_RAS_SEVERITY_CORRECTABLE,
> +	XE_RAS_SEVERITY_UNCORRECTABLE,
> +	XE_RAS_SEVERITY_INFORMATIONAL,
> +	XE_RAS_SEVERITY_MAX
> +};

Drive-by comment:  I notice that there's a fair amount of common changes
between this uncorrectable series and Raag's correctable series, e.g.,
https://lore.kernel.org/all/20260410102744.427150-4-raag.jadav@intel.com/
However it seems that there have been some minor style differences
between the two that would be good to reconcile (e.g., this series
writes out the full XE_RAS_SEVERITY_*, XE_RAS_COMPONENT_*, etc. whereas
Raag's series uses slightly shorter XE_RAS_SEV_*, XE_RAS_COMP_*, etc.
names).  Similar differences exist on some of the functions like
severity_to_string (taking both the device and the severity) here vs
sev_to_string (taking only the serverity) in the other series.

We should probably figure out which form we actually want to go with so
that we don't have last-minute conflicts as we start applying these
series.



Matt

> +
> +/* major IP blocks where errors can originate */
> +enum xe_ras_component {
> +	XE_RAS_COMPONENT_NOT_SUPPORTED = 0,
> +	XE_RAS_COMPONENT_DEVICE_MEMORY,
> +	XE_RAS_COMPONENT_CORE_COMPUTE,
> +	XE_RAS_COMPONENT_RESERVED,
> +	XE_RAS_COMPONENT_PCIE,
> +	XE_RAS_COMPONENT_FABRIC,
> +	XE_RAS_COMPONENT_SOC_INTERNAL,
> +	XE_RAS_COMPONENT_MAX
> +};
> +
> +static const char * const xe_ras_severities[] = {
> +	[XE_RAS_SEVERITY_NOT_SUPPORTED]		= "Not Supported",
> +	[XE_RAS_SEVERITY_CORRECTABLE]		= "Correctable",
> +	[XE_RAS_SEVERITY_UNCORRECTABLE]		= "Uncorrectable",
> +	[XE_RAS_SEVERITY_INFORMATIONAL]		= "Informational",
> +};
> +static_assert(ARRAY_SIZE(xe_ras_severities) == XE_RAS_SEVERITY_MAX);
> +
> +static const char * const xe_ras_components[] = {
> +	[XE_RAS_COMPONENT_NOT_SUPPORTED]	= "Not Supported",
> +	[XE_RAS_COMPONENT_DEVICE_MEMORY]	= "Device Memory",
> +	[XE_RAS_COMPONENT_CORE_COMPUTE]		= "Core Compute",
> +	[XE_RAS_COMPONENT_RESERVED]		= "Reserved",
> +	[XE_RAS_COMPONENT_PCIE]			= "PCIe",
> +	[XE_RAS_COMPONENT_FABRIC]		= "Fabric",
> +	[XE_RAS_COMPONENT_SOC_INTERNAL]		= "SoC Internal",
> +};
> +static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMPONENT_MAX);
> +
> +static inline const char *severity_to_str(struct xe_device *xe, u32 severity)
> +{
> +	if (severity >= XE_RAS_SEVERITY_MAX)
> +		severity = XE_RAS_SEVERITY_NOT_SUPPORTED;
> +
> +	return xe_ras_severities[severity];
> +}
> +
> +static inline const char *comp_to_str(struct xe_device *xe, u32 comp)
> +{
> +	if (comp >= XE_RAS_COMPONENT_MAX)
> +		comp = XE_RAS_COMPONENT_NOT_SUPPORTED;
> +
> +	return xe_ras_components[comp];
> +}
> +
>  #ifdef CONFIG_PCIEAER
>  static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
>  {
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
> new file mode 100644
> index 000000000000..3d0f9e94a404
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -0,0 +1,96 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef _XE_RAS_TYPES_H_
> +#define _XE_RAS_TYPES_H_
> +
> +#include <linux/types.h>
> +
> +#define XE_RAS_NUM_ERROR_ARR		3
> +#define XE_RAS_MAX_ERROR_DETAILS	16
> +
> +/**
> + * struct xe_ras_error_common - Common RAS error class
> + *
> + * This structure contains error severity and component information
> + * across all products
> + */
> +struct xe_ras_error_common {
> +	/** @severity: Error Severity */
> +	u8 severity;
> +	/** @component: IP where the error originated */
> +	u8 component;
> +} __packed;
> +
> +/**
> + * struct xe_ras_error_unit - Error unit information
> + */
> +struct xe_ras_error_unit {
> +	/** @tile: Tile identifier */
> +	u8 tile;
> +	/** @instance: Instance identifier within a component */
> +	u32 instance;
> +} __packed;
> +
> +/**
> + * struct xe_ras_error_cause - Error cause information
> + */
> +struct xe_ras_error_cause {
> +	/** @cause: Cause */
> +	u32 cause;
> +	/** @reserved: For future use */
> +	u8 reserved;
> +} __packed;
> +
> +/**
> + * struct xe_ras_error_product - Error fields that are specific to the product
> + */
> +struct xe_ras_error_product {
> +	/** @unit: Unit within IP block */
> +	struct xe_ras_error_unit unit;
> +	/** @error_cause: Cause/checker */
> +	struct xe_ras_error_cause error_cause;
> +} __packed;
> +
> +/**
> + * struct xe_ras_error_class - Complete RAS Error Class
> + *
> + * This structure provides the complete error classification by combining
> + * the common error class with the product-specific error class.
> + */
> +struct xe_ras_error_class {
> +	/** @common: Common error severity and component */
> +	struct xe_ras_error_common common;
> +	/** @product: Product-specific unit and cause */
> +	struct xe_ras_error_product product;
> +} __packed;
> +
> +/**
> + * struct xe_ras_error_array - Details of the error types
> + */
> +struct xe_ras_error_array {
> +	/** @counter_value: Counter value of the returned error */
> +	u32 counter_value;
> +	/** @error_class: Error class */
> +	struct xe_ras_error_class error_class;
> +	/** @timestamp: Timestamp */
> +	u64 timestamp;
> +	/** @error_details: Error details specific to the class */
> +	u32 error_details[XE_RAS_MAX_ERROR_DETAILS];
> +} __packed;
> +
> +/**
> + * struct xe_ras_get_error_response - Response from get soc error command
> + */
> +struct xe_ras_get_error_response {
> +	/** @num_errors: Number of errors reported in this response */
> +	u8 num_errors;
> +	/** @additional_errors: Indicates if the errors are pending */
> +	u8 additional_errors;
> +	/** @error_arr: Array of up to 3 errors */
> +	struct xe_ras_error_array error_arr[XE_RAS_NUM_ERROR_ARR];
> +} __packed;
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> index 89456aec6097..00a0f05aab32 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -10,6 +10,19 @@
>  
>  #include "abi/xe_sysctrl_abi.h"
>  
> +/**
> + * enum xe_sysctrl_mailbox_command_id - Command ID's for GFSP group
> + *
> + * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Get basic error information
> + */
> +enum xe_sysctrl_mailbox_command_id {
> +	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01
> +};
> +
> +enum xe_sysctrl_group {
> +	XE_SYSCTRL_GROUP_GFSP = 1
> +};
> +
>  /**
>   * struct xe_sysctrl_mailbox_command - System Controller mailbox command
>   */
> -- 
> 2.47.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

RE: [PATCH v4 06/13] drm/xe/xe_ras: Add basic structures and commands for uncorrectable errors

[Jadav, Raag]

> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper@intel.com>
> On Fri, Apr 17, 2026 at 02:28:18PM +0530, Riana Tauro wrote:
> > Add the commands and common structures for the get_soc_error
> > sysctrl command.

...

> > +/* Severity classification of detected errors */
> > +enum xe_ras_severity {
> > +	XE_RAS_SEVERITY_NOT_SUPPORTED = 0,
> > +	XE_RAS_SEVERITY_CORRECTABLE,
> > +	XE_RAS_SEVERITY_UNCORRECTABLE,
> > +	XE_RAS_SEVERITY_INFORMATIONAL,
> > +	XE_RAS_SEVERITY_MAX
> > +};
> 
> Drive-by comment:  I notice that there's a fair amount of common changes
> between this uncorrectable series and Raag's correctable series, e.g.,
> https://lore.kernel.org/all/20260410102744.427150-4-raag.jadav@intel.com/
> However it seems that there have been some minor style differences
> between the two that would be good to reconcile (e.g., this series
> writes out the full XE_RAS_SEVERITY_*, XE_RAS_COMPONENT_*, etc.
> whereas
> Raag's series uses slightly shorter XE_RAS_SEV_*, XE_RAS_COMP_*, etc.
> names).  Similar differences exist on some of the functions like
> severity_to_string (taking both the device and the severity) here vs
> sev_to_string (taking only the serverity) in the other series.
> 
> We should probably figure out which form we actually want to go with so
> that we don't have last-minute conflicts as we start applying these
> series.

The one's in my series are consistent with uapi, but I'm okay with
either one. My only concern is that we don't invent overly long names
that warrant ugly wrapping while using them in the code.

Raag

Re: [PATCH v4 06/13] drm/xe/xe_ras: Add basic structures and commands for uncorrectable errors

[Matt Roper]

On Fri, Apr 17, 2026 at 02:25:28PM -0700, Jadav, Raag wrote:
> 
> 
> > -----Original Message-----
> > From: Roper, Matthew D <matthew.d.roper@intel.com>
> > On Fri, Apr 17, 2026 at 02:28:18PM +0530, Riana Tauro wrote:
> > > Add the commands and common structures for the get_soc_error
> > > sysctrl command.
> 
> ...
> 
> > > +/* Severity classification of detected errors */
> > > +enum xe_ras_severity {
> > > +	XE_RAS_SEVERITY_NOT_SUPPORTED = 0,
> > > +	XE_RAS_SEVERITY_CORRECTABLE,
> > > +	XE_RAS_SEVERITY_UNCORRECTABLE,
> > > +	XE_RAS_SEVERITY_INFORMATIONAL,
> > > +	XE_RAS_SEVERITY_MAX
> > > +};
> > 
> > Drive-by comment:  I notice that there's a fair amount of common changes
> > between this uncorrectable series and Raag's correctable series, e.g.,
> > https://lore.kernel.org/all/20260410102744.427150-4-raag.jadav@intel.com/
> > However it seems that there have been some minor style differences
> > between the two that would be good to reconcile (e.g., this series
> > writes out the full XE_RAS_SEVERITY_*, XE_RAS_COMPONENT_*, etc.
> > whereas
> > Raag's series uses slightly shorter XE_RAS_SEV_*, XE_RAS_COMP_*, etc.
> > names).  Similar differences exist on some of the functions like
> > severity_to_string (taking both the device and the severity) here vs
> > sev_to_string (taking only the serverity) in the other series.
> > 
> > We should probably figure out which form we actually want to go with so
> > that we don't have last-minute conflicts as we start applying these
> > series.
> 
> The one's in my series are consistent with uapi, but I'm okay with
> either one. My only concern is that we don't invent overly long names
> that warrant ugly wrapping while using them in the code.

Yeah, I don't have any strong feelings one way or the other.  But if I
want to apply both your series and Riana's series to the same branch for
tracking or testing, I'm left uncertain which series I should favor on
the conflict resolutions.  It would be good if we could come to a
decision early just so the two series don't drift apart.

Are we expecting one of these series to land before the other, or do
expect both RAS sets to land together?


Matt

> 
> Raag
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH v4 06/13] drm/xe/xe_ras: Add basic structures and commands for uncorrectable errors

[Tauro, Riana]

On 4/18/2026 3:02 AM, Matt Roper wrote:
> On Fri, Apr 17, 2026 at 02:25:28PM -0700, Jadav, Raag wrote:
>>
>>> -----Original Message-----
>>> From: Roper, Matthew D <matthew.d.roper@intel.com>
>>> On Fri, Apr 17, 2026 at 02:28:18PM +0530, Riana Tauro wrote:
>>>> Add the commands and common structures for the get_soc_error
>>>> sysctrl command.
>> ...
>>
>>>> +/* Severity classification of detected errors */
>>>> +enum xe_ras_severity {
>>>> +	XE_RAS_SEVERITY_NOT_SUPPORTED = 0,
>>>> +	XE_RAS_SEVERITY_CORRECTABLE,
>>>> +	XE_RAS_SEVERITY_UNCORRECTABLE,
>>>> +	XE_RAS_SEVERITY_INFORMATIONAL,
>>>> +	XE_RAS_SEVERITY_MAX
>>>> +};
>>> Drive-by comment:  I notice that there's a fair amount of common changes
>>> between this uncorrectable series and Raag's correctable series, e.g.,
>>> https://lore.kernel.org/all/20260410102744.427150-4-raag.jadav@intel.com/
>>> However it seems that there have been some minor style differences
>>> between the two that would be good to reconcile (e.g., this series
>>> writes out the full XE_RAS_SEVERITY_*, XE_RAS_COMPONENT_*, etc.
>>> whereas
>>> Raag's series uses slightly shorter XE_RAS_SEV_*, XE_RAS_COMP_*, etc.
>>> names).  Similar differences exist on some of the functions like
>>> severity_to_string (taking both the device and the severity) here vs
>>> sev_to_string (taking only the serverity) in the other series.
>>>
>>> We should probably figure out which form we actually want to go with so
>>> that we don't have last-minute conflicts as we start applying these
>>> series.
>> The one's in my series are consistent with uapi, but I'm okay with
>> either one. My only concern is that we don't invent overly long names
>> that warrant ugly wrapping while using them in the code.
> Yeah, I don't have any strong feelings one way or the other.  But if I
> want to apply both your series and Riana's series to the same branch for
> tracking or testing, I'm left uncertain which series I should favor on
> the conflict resolutions.  It would be good if we could come to a
> decision early just so the two series don't drift apart.
>
Yeah using the full word here wasn't creating longer names so i 
preferred it over abbrevations.
I will make the patch in-line with Raag's patch in the next rev.

His series has got all RB's so might land before this series.

Riana

>
> Are we expecting one of these series to land before the other, or do
> expect both RAS sets to land together?
>
>
> Matt
>
>> Raag
>>

Re: [PATCH v4 06/13] drm/xe/xe_ras: Add basic structures and commands for uncorrectable errors

[Raag Jadav]

On Mon, Apr 20, 2026 at 11:04:40AM +0530, Tauro, Riana wrote:
> On 4/18/2026 3:02 AM, Matt Roper wrote:
> > On Fri, Apr 17, 2026 at 02:25:28PM -0700, Jadav, Raag wrote:
> > > > -----Original Message-----
> > > > From: Roper, Matthew D <matthew.d.roper@intel.com>
> > > > On Fri, Apr 17, 2026 at 02:28:18PM +0530, Riana Tauro wrote:
> > > > > Add the commands and common structures for the get_soc_error
> > > > > sysctrl command.
> > > ...
> > > 
> > > > > +/* Severity classification of detected errors */
> > > > > +enum xe_ras_severity {
> > > > > +	XE_RAS_SEVERITY_NOT_SUPPORTED = 0,
> > > > > +	XE_RAS_SEVERITY_CORRECTABLE,
> > > > > +	XE_RAS_SEVERITY_UNCORRECTABLE,
> > > > > +	XE_RAS_SEVERITY_INFORMATIONAL,
> > > > > +	XE_RAS_SEVERITY_MAX
> > > > > +};
> > > > Drive-by comment:  I notice that there's a fair amount of common changes
> > > > between this uncorrectable series and Raag's correctable series, e.g.,
> > > > https://lore.kernel.org/all/20260410102744.427150-4-raag.jadav@intel.com/
> > > > However it seems that there have been some minor style differences
> > > > between the two that would be good to reconcile (e.g., this series
> > > > writes out the full XE_RAS_SEVERITY_*, XE_RAS_COMPONENT_*, etc.
> > > > whereas
> > > > Raag's series uses slightly shorter XE_RAS_SEV_*, XE_RAS_COMP_*, etc.
> > > > names).  Similar differences exist on some of the functions like
> > > > severity_to_string (taking both the device and the severity) here vs
> > > > sev_to_string (taking only the serverity) in the other series.
> > > > 
> > > > We should probably figure out which form we actually want to go with so
> > > > that we don't have last-minute conflicts as we start applying these
> > > > series.
> > > The one's in my series are consistent with uapi, but I'm okay with
> > > either one. My only concern is that we don't invent overly long names
> > > that warrant ugly wrapping while using them in the code.
> > Yeah, I don't have any strong feelings one way or the other.  But if I
> > want to apply both your series and Riana's series to the same branch for
> > tracking or testing, I'm left uncertain which series I should favor on
> > the conflict resolutions.  It would be good if we could come to a
> > decision early just so the two series don't drift apart.
> > 
> Yeah using the full word here wasn't creating longer names so i preferred it
> over abbrevations.
> I will make the patch in-line with Raag's patch in the next rev.
> 
> His series has got all RB's so might land before this series.

I don't believe we should land it without your review ;)

Raag

[PATCH v4 07/13] drm/xe/xe_ras: Add support for uncorrectable core-compute errors

[Riana Tauro]

Uncorrectable Core-Compute errors are classified into Global and Local
errors.

Global error is an error that affects the entire device requiring a
reset. This type of error is not isolated. When an AER is reported and
error_detected is invoked return PCI_ERS_RESULT_NEED_RESET.

A Local error is confined to a specific component or context like a
engine. These errors can be contained and recovered by resetting
only the affected part without distrupting the rest of the device.

Upon detection of an Uncorrectable Local Core-Compute error, an AER is
generated and GuC is notified of the error which triggers a engine reset.
Return Recovered from PCI error callbacks for these errors.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add newline and fix log
    add bounds check (Mallesh)
    add ras specific enum (Raag)
    helper for sysctrl prepare command
    process all errors before deciding recovery action

v3: remove TODO from commit message
    remove redundant rlen check
    fix loop
    add check for sysctrl flooding (Raag)
    do not use xe_ras prefix for static functions (Soham)

v4: remove rlen initialization to 0
    remove local variable
    add error message for length mismatch (Raag)
    reset on sysctrl flooding
    fix sysctrl flood condition
---
 drivers/gpu/drm/xe/xe_ras.c       | 133 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h       |   3 +
 drivers/gpu/drm/xe/xe_ras_types.h |  55 ++++++++++++
 3 files changed, 191 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index bf780e953925..0cc7b3a6b13f 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -5,7 +5,16 @@
 
 #include "xe_assert.h"
 #include "xe_device_types.h"
+#include "xe_printk.h"
 #include "xe_ras.h"
+#include "xe_ras_types.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+#define COMPUTE_ERROR_SEVERITY_MASK		GENMASK(26, 25)
+#define GLOBAL_UNCORR_ERROR			2
+/* Modify as needed */
+#define XE_SYSCTRL_ERROR_FLOOD			16
 
 /* Severity classification of detected errors */
 enum xe_ras_severity {
@@ -63,6 +72,130 @@ static inline const char *comp_to_str(struct xe_device *xe, u32 comp)
 	return xe_ras_components[comp];
 }
 
+static enum xe_ras_recovery_action handle_compute_errors(struct xe_device *xe,
+							 struct xe_ras_error_array *arr)
+{
+	struct xe_ras_compute_error *error_info = (struct xe_ras_compute_error *)arr->error_details;
+	struct xe_ras_error_common common = arr->error_class.common;
+	u8 uncorr_type;
+
+	uncorr_type = FIELD_GET(COMPUTE_ERROR_SEVERITY_MASK, error_info->error_log_header);
+
+	xe_err(xe, "[RAS]: %s %s Error detected", severity_to_str(xe, common.severity),
+	       comp_to_str(xe, common.component));
+
+	/* Request a RESET if error is global */
+	if (uncorr_type == GLOBAL_UNCORR_ERROR)
+		return XE_RAS_RECOVERY_ACTION_RESET;
+
+	/* Local errors are recovered using a engine reset by GuC */
+	return XE_RAS_RECOVERY_ACTION_RECOVERED;
+}
+
+static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
+				    u32 cmd_mask, void *request, size_t request_len,
+				    void *response, size_t response_len)
+{
+	struct xe_sysctrl_app_msg_hdr hdr = {0};
+
+	hdr.data = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |
+			   FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask);
+
+	command->header = hdr;
+	command->data_in = request;
+	command->data_in_len = request_len;
+	command->data_out = response;
+	command->data_out_len = response_len;
+}
+
+/**
+ * xe_ras_process_errors() - Process and contain hardware errors
+ * @xe: xe device instance
+ *
+ * Get error details from system controller and return recovery
+ * method. Called only from PCI error handling.
+ *
+ * Returns: recovery action to be taken
+ */
+enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_get_error_response response;
+	enum xe_ras_recovery_action final_action;
+	u32 count = 0;
+	size_t rlen;
+	int ret;
+
+	if (!xe->info.has_sysctrl)
+		return XE_RAS_RECOVERY_ACTION_RESET;
+
+	/* Default action */
+	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
+
+	prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_SOC_ERROR, NULL, 0,
+				&response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "[RAS]: sysctrl: error ret %d\n", ret);
+			goto err;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "[RAS]: sysctrl: response size mismatch. Expected %zu, got %zu\n",
+			       sizeof(response), rlen);
+			goto err;
+		}
+
+		/* Report if number of errors exceeds the maximum errors supported*/
+		if (response.num_errors > XE_RAS_NUM_ERROR_ARR)
+			xe_err(xe, "[RAS]: sysctrl: number of errors received %d out of bound (%d)\n",
+			       response.num_errors, XE_RAS_NUM_ERROR_ARR);
+
+		for (int i = 0; i < response.num_errors && i < XE_RAS_NUM_ERROR_ARR; i++) {
+			struct xe_ras_error_array arr = response.error_arr[i];
+			enum xe_ras_recovery_action action;
+			struct xe_ras_error_class error_class;
+			u8 component;
+
+			error_class = arr.error_class;
+			component = error_class.common.component;
+
+			switch (component) {
+			case XE_RAS_COMPONENT_CORE_COMPUTE:
+				action = handle_compute_errors(xe, &arr);
+				break;
+			default:
+				xe_err(xe, "[RAS]: Unknown error component %u\n", component);
+				action = XE_RAS_RECOVERY_ACTION_RESET;
+				break;
+			}
+
+			/*
+			 * Retain the highest severity action. Process and log all errors
+			 * and then take appropriate recovery action.
+			 */
+			if (action > final_action)
+				final_action = action;
+		}
+
+		/* Treat flooding as an system controller error */
+		if (++count >= XE_SYSCTRL_ERROR_FLOOD) {
+			xe_err(xe, "[RAS]: sysctrl: response flooding\n");
+			return XE_RAS_RECOVERY_ACTION_RESET;
+		}
+
+	} while (response.additional_errors);
+
+	return final_action;
+
+err:
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
 #ifdef CONFIG_PCIEAER
 static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
 {
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index 14cb973603e7..e191ab80080c 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -6,8 +6,11 @@
 #ifndef _XE_RAS_H_
 #define _XE_RAS_H_
 
+#include "xe_ras_types.h"
+
 struct xe_device;
 
 void xe_ras_init(struct xe_device *xe);
+enum xe_ras_recovery_action  xe_ras_process_errors(struct xe_device *xe);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 3d0f9e94a404..8bebe958b8e8 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -11,6 +11,24 @@
 #define XE_RAS_NUM_ERROR_ARR		3
 #define XE_RAS_MAX_ERROR_DETAILS	16
 
+/**
+ * enum xe_ras_recovery_action - RAS recovery actions
+ *
+ * @XE_RAS_RECOVERY_ACTION_RECOVERED: Error recovered
+ * @XE_RAS_RECOVERY_ACTION_RESET: Requires reset
+ * @XE_RAS_RECOVERY_ACTION_DISCONNECT: Requires disconnect
+ * @XE_RAS_RECOVERY_ACTION_MAX: Max action value
+ *
+ * This enum defines the possible recovery actions that can be taken in response
+ * to RAS errors.
+ */
+enum xe_ras_recovery_action {
+	XE_RAS_RECOVERY_ACTION_RECOVERED = 0,
+	XE_RAS_RECOVERY_ACTION_RESET,
+	XE_RAS_RECOVERY_ACTION_DISCONNECT,
+	XE_RAS_RECOVERY_ACTION_MAX
+};
+
 /**
  * struct xe_ras_error_common - Common RAS error class
  *
@@ -93,4 +111,41 @@ struct xe_ras_get_error_response {
 	struct xe_ras_error_array error_arr[XE_RAS_NUM_ERROR_ARR];
 } __packed;
 
+/**
+ * struct xe_ras_compute_error - Error details of Core Compute error
+ */
+struct xe_ras_compute_error {
+	/** @error_log_header: Error Source and type */
+	u32 error_log_header;
+	/** @internal_error_log: Internal Error log */
+	u32 internal_error_log;
+	/** @fabric_log: Fabric Error log */
+	u32 fabric_log;
+	/** @internal_error_addr_log0: Internal Error addr log */
+	u32 internal_error_addr_log0;
+	/** @internal_error_addr_log1: Internal Error addr log */
+	u32 internal_error_addr_log1;
+	/** @packet_log0: Packet log */
+	u32 packet_log0;
+	/** @packet_log1: Packet log */
+	u32 packet_log1;
+	/** @packet_log2: Packet log */
+	u32 packet_log2;
+	/** @packet_log3: Packet log */
+	u32 packet_log3;
+	/** @packet_log4: Packet log */
+	u32 packet_log4;
+	/** @misc_log0: Misc log */
+	u32 misc_log0;
+	/** @misc_log1: Misc log */
+	u32 misc_log1;
+	/** @spare_log0: Spare log */
+	u32 spare_log0;
+	/** @spare_log1: Spare log */
+	u32 spare_log1;
+	/** @spare_log2: Spare log */
+	u32 spare_log2;
+	/** @spare_log3: Spare log */
+	u32 spare_log3;
+} __packed;
 #endif
-- 
2.47.1

[PATCH v4 08/13] drm/xe/xe_ras: Handle uncorrectable SoC Internal errors

[Riana Tauro]

Some critical errors such as CSC firmware and Punit are reported under SoC
internal errors and require special handling.

CSC errors are classified into hardware errors and firmware errors.
Hardware errors can be recovered using a SBR (Secondary Bus Reset) whereas
firmware errors are critical and require a firmware flash. On such errors,
device is wedged and runtime survivability mode will be enabled to notify
userspace that a firmware flash is required.

PUNIT uncorrectable errors can only be recovered through a cold reset.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: simplify soc structures
    return error code for each SoC error (Mallesh)

v3: squash patches (Raag)
---
 drivers/gpu/drm/xe/xe_ras.c       | 49 +++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras_types.h | 51 +++++++++++++++++++++++++++++++
 2 files changed, 100 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 0cc7b3a6b13f..5010cf6211ea 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -8,6 +8,7 @@
 #include "xe_printk.h"
 #include "xe_ras.h"
 #include "xe_ras_types.h"
+#include "xe_survivability_mode.h"
 #include "xe_sysctrl_mailbox.h"
 #include "xe_sysctrl_mailbox_types.h"
 
@@ -92,6 +93,51 @@ static enum xe_ras_recovery_action handle_compute_errors(struct xe_device *xe,
 	return XE_RAS_RECOVERY_ACTION_RECOVERED;
 }
 
+static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *xe,
+							      struct xe_ras_error_array *arr)
+{
+	struct xe_ras_soc_error *error_info = (struct xe_ras_soc_error *)arr->error_details;
+	struct xe_ras_soc_error_source source = error_info->error_source;
+	struct xe_ras_error_common common = arr->error_class.common;
+
+	xe_err(xe, "[RAS]: %s %s Error detected", severity_to_str(xe, common.severity),
+	       comp_to_str(xe, common.component));
+
+	if (source.csc) {
+		struct xe_ras_csc_error *csc_error = (struct xe_ras_csc_error *)error_info->additional_details;
+
+		/*
+		 * CSC uncorrectable errors are classified as hardware errors and firmware errors.
+		 * CSC firmware errors are critical errors that can be recovered only by firmware
+		 * update via SPI driver. PCODE enables FDO mode and sets the bit in the capability
+		 * register. On receiving this error, the driver enables runtime survivability mode
+		 * which notifies userspace that a firmware update is required.
+		 */
+		if (csc_error->hec_uncorr_fw_err_dw0) {
+			xe_err(xe, "[RAS]: CSC %s error detected: 0x%x\n",
+			       severity_to_str(xe, common.severity),
+			       csc_error->hec_uncorr_fw_err_dw0);
+			xe_survivability_mode_runtime_enable(xe);
+			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+		}
+	}
+
+	if (source.soc) {
+		struct xe_ras_ieh_error *ieh_error = (struct xe_ras_ieh_error *)error_info->additional_details;
+
+		if (ieh_error->global_error_status & XE_RAS_IEH_PUNIT_ERROR) {
+			xe_err(xe, "[RAS]: PUNIT %s error detected: 0x%x\n",
+			       severity_to_str(xe, common.severity),
+			       ieh_error->global_error_status);
+			/** TODO: Add PUNIT error handling */
+			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+		}
+	}
+
+	/* For other SOC internal errors, request a reset as recovery mechanism */
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
 static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
 				    u32 cmd_mask, void *request, size_t request_len,
 				    void *response, size_t response_len)
@@ -168,6 +214,9 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 			case XE_RAS_COMPONENT_CORE_COMPUTE:
 				action = handle_compute_errors(xe, &arr);
 				break;
+			case XE_RAS_COMPONENT_SOC_INTERNAL:
+				action = handle_soc_internal_errors(xe, &arr);
+				break;
 			default:
 				xe_err(xe, "[RAS]: Unknown error component %u\n", component);
 				action = XE_RAS_RECOVERY_ACTION_RESET;
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 8bebe958b8e8..4f640124f38f 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -10,6 +10,7 @@
 
 #define XE_RAS_NUM_ERROR_ARR		3
 #define XE_RAS_MAX_ERROR_DETAILS	16
+#define XE_RAS_IEH_PUNIT_ERROR		BIT(1)
 
 /**
  * enum xe_ras_recovery_action - RAS recovery actions
@@ -148,4 +149,54 @@ struct xe_ras_compute_error {
 	/** @spare_log3: Spare log */
 	u32 spare_log3;
 } __packed;
+
+/**
+ * struct xe_ras_soc_error_source - Source of SoC error
+ */
+struct xe_ras_soc_error_source {
+	/** @csc: CSC error */
+	u32 csc:1;
+	/** @soc: SoC error */
+	u32 soc:1;
+	/** @reserved: Reserved for future use */
+	u32 reserved:30;
+} __packed;
+
+/**
+ * struct xe_ras_soc_error - SoC error details
+ */
+struct xe_ras_soc_error {
+	/** @error_source: Error Source */
+	struct xe_ras_soc_error_source error_source;
+	/** @additional_details: Additional details */
+	u32 additional_details[15];
+} __packed;
+
+/**
+ * struct xe_ras_csc_error - CSC error details
+ */
+struct xe_ras_csc_error {
+	/** @hec_uncorr_err_status: CSC error */
+	u32 hec_uncorr_err_status;
+	/** @hec_uncorr_fw_err_dw0: CSC f/w error */
+	u32 hec_uncorr_fw_err_dw0;
+} __packed;
+
+/**
+ * struct xe_ras_ieh_error - SoC IEH (Integrated Error Handler) details
+ */
+struct xe_ras_ieh_error {
+	/** @ieh_instance: IEH instance */
+	u32 ieh_instance:2;
+	/** @reserved: Reserved for future use */
+	u32 reserved:30;
+	/** @global_error_status: Global error status */
+	u32 global_error_status;
+	/** @local_error_status: Local error status */
+	u32 local_error_status;
+	/** @gerr_mask: Global error mask */
+	u32 gerr_mask;
+	/** @additional_info: Additional information */
+	u32 additional_info[10];
+} __packed;
 #endif
-- 
2.47.1

[PATCH v4 09/13] drm/xe/xe_ras: Handle uncorrectable device memory errors

[Riana Tauro]

Add support to handle uncorrectable device memory errors. Double bit ECC
(Error Correcting Code) errors are logged. These will be handled using
Page offlining in a later patch. The other memory error categories require
a Secondary bus reset (SBR) to recover.

Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
Memory offlining patch will be integrated once 
https://patchwork.freedesktop.org/series/161473/ is merged.
---
 drivers/gpu/drm/xe/xe_ras.c       | 23 ++++++++++++
 drivers/gpu/drm/xe/xe_ras_types.h | 61 +++++++++++++++++++++++++++++++
 2 files changed, 84 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 5010cf6211ea..347844b3d2bf 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -138,6 +138,26 @@ static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *
 	return XE_RAS_RECOVERY_ACTION_RESET;
 }
 
+static enum xe_ras_recovery_action handle_memory_errors(struct xe_device *xe,
+							struct xe_ras_error_array *arr)
+{
+	struct xe_ras_memory_error *error_info = (struct xe_ras_memory_error *)arr->error_details;
+	struct xe_ras_error_category category = error_info->category;
+	struct xe_ras_error_common common = arr->error_class.common;
+
+	xe_err(xe, "[RAS]: %s %s Error detected", severity_to_str(xe, common.severity),
+	       comp_to_str(xe, common.component));
+
+	if (category.ecc_error) {
+		xe_err(xe, "[RAS]: Double bit ECC error detected at sw address 0x%llx\n",
+		       (unsigned long long)error_info->sw_address);
+		/* TODO: page offline handling for 2-bit ECC errors and return accordingly */
+	}
+
+	/* Request a RESET for other device memory error categories */
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
 static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
 				    u32 cmd_mask, void *request, size_t request_len,
 				    void *response, size_t response_len)
@@ -217,6 +237,9 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 			case XE_RAS_COMPONENT_SOC_INTERNAL:
 				action = handle_soc_internal_errors(xe, &arr);
 				break;
+			case XE_RAS_COMPONENT_DEVICE_MEMORY:
+				action = handle_memory_errors(xe, &arr);
+				break;
 			default:
 				xe_err(xe, "[RAS]: Unknown error component %u\n", component);
 				action = XE_RAS_RECOVERY_ACTION_RESET;
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 4f640124f38f..020e3f92a057 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -199,4 +199,65 @@ struct xe_ras_ieh_error {
 	/** @additional_info: Additional information */
 	u32 additional_info[10];
 } __packed;
+
+/**
+ * struct xe_ras_hardware_address - Device memory hardware address details
+ *
+ * Hardware physical address structure for device memory error reporting.
+ */
+struct xe_ras_hardware_address {
+	/** @column: Column address */
+	u64 column:6;
+	/** @bank: Bank */
+	u64 bank:2;
+	/** @bank_group: Bank group */
+	u64 bank_group:2;
+	/** @row: Row address */
+	u64 row:16;
+	/** @channel: Memory Channel */
+	u64 channel:8;
+	/** @msu: MSU index */
+	u64 msu:8;
+	/** @reserved: Reserved for future use */
+	u64 reserved:22;
+} __packed;
+
+/**
+ * struct xe_ras_error_category - Device memory error category details
+ */
+struct xe_ras_error_category {
+	/** @pma_error: PMA (Power Management Agent) error */
+	u8 pma_error:1;
+	/** @ecc_error: Double bit ECC error */
+	u8 ecc_error:1;
+	/** @poison_detected: Write poison detected */
+	u8 poison_detected:1;
+	/** @parity_error: Parity error */
+	u8 parity_error:1;
+	/** @phy_error: PHY error */
+	u8 phy_error:1;
+	/** @reserved: Reserved for future use */
+	u8 reserved:3;
+} __packed;
+
+/**
+ * struct xe_ras_memory_error - Device memory error details
+ *
+ * This structure provides detailed information about a device memory error.
+ * Cast from error_details array for device memory errors.
+ */
+struct xe_ras_memory_error {
+	/** @category: Device memory error category */
+	struct xe_ras_error_category category;
+	/** @reserved: Reserved for future use */
+	u8 reserved[7];
+	/** @hw_address: Memory hardware physical address */
+	struct xe_ras_hardware_address hw_address;
+	/** @sw_address: Software address where error occurred */
+	u64 sw_address;
+	/** @log_array: Error syndromes associated with the error */
+	u32 log_array[8];
+	/** @reserved2: Reserved for future use */
+	u32 reserved2[2];
+} __packed;
 #endif
-- 
2.47.1

RE: [PATCH v4 09/13] drm/xe/xe_ras: Handle uncorrectable device memory errors

[Upadhyay, Tejas]

> -----Original Message-----
> From: Tauro, Riana <riana.tauro@intel.com>
> Sent: 17 April 2026 14:28
> To: intel-xe@lists.freedesktop.org
> Cc: Tauro, Riana <riana.tauro@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>;
> aravind.iddamsetty@linux.intel.com; Nilawar, Badal
> <badal.nilawar@intel.com>; Jadav, Raag <raag.jadav@intel.com>;
> Koppuravuri, Ravi Kishore <ravi.kishore.koppuravuri@intel.com>; Koujalagi,
> Mallesh <mallesh.koujalagi@intel.com>; Purkait, Soham
> <soham.purkait@intel.com>; Upadhyay, Tejas <tejas.upadhyay@intel.com>;
> Ghimiray, Himal Prasad <himal.prasad.ghimiray@intel.com>
> Subject: [PATCH v4 09/13] drm/xe/xe_ras: Handle uncorrectable device
> memory errors
> 
> Add support to handle uncorrectable device memory errors. Double bit ECC
> (Error Correcting Code) errors are logged. These will be handled using Page
> offlining in a later patch. The other memory error categories require a
> Secondary bus reset (SBR) to recover.
> 
> Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> Memory offlining patch will be integrated once
> https://patchwork.freedesktop.org/series/161473/ is merged.
> ---
>  drivers/gpu/drm/xe/xe_ras.c       | 23 ++++++++++++
>  drivers/gpu/drm/xe/xe_ras_types.h | 61
> +++++++++++++++++++++++++++++++
>  2 files changed, 84 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c index
> 5010cf6211ea..347844b3d2bf 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -138,6 +138,26 @@ static enum xe_ras_recovery_action
> handle_soc_internal_errors(struct xe_device *
>  	return XE_RAS_RECOVERY_ACTION_RESET;
>  }
> 
> +static enum xe_ras_recovery_action handle_memory_errors(struct xe_device
> *xe,
> +							struct
> xe_ras_error_array *arr)
> +{
> +	struct xe_ras_memory_error *error_info = (struct
> xe_ras_memory_error *)arr->error_details;
> +	struct xe_ras_error_category category = error_info->category;
> +	struct xe_ras_error_common common = arr->error_class.common;
> +
> +	xe_err(xe, "[RAS]: %s %s Error detected", severity_to_str(xe,
> common.severity),
> +	       comp_to_str(xe, common.component));

don't need \n?

> +
> +	if (category.ecc_error) {
> +		xe_err(xe, "[RAS]: Double bit ECC error detected at sw address
> 0x%llx\n",
> +		       (unsigned long long)error_info->sw_address);
> +		/* TODO: page offline handling for 2-bit ECC errors and return
> accordingly */
> +	}
> +
> +	/* Request a RESET for other device memory error categories */
> +	return XE_RAS_RECOVERY_ACTION_RESET;
> +}
> +
>  static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command
> *command,
>  				    u32 cmd_mask, void *request, size_t
> request_len,
>  				    void *response, size_t response_len) @@ -
> 217,6 +237,9 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct
> xe_device *xe)
>  			case XE_RAS_COMPONENT_SOC_INTERNAL:
>  				action = handle_soc_internal_errors(xe, &arr);
>  				break;
> +			case XE_RAS_COMPONENT_DEVICE_MEMORY:
> +				action = handle_memory_errors(xe, &arr);
> +				break;
>  			default:
>  				xe_err(xe, "[RAS]: Unknown error component
> %u\n", component);
>  				action = XE_RAS_RECOVERY_ACTION_RESET;
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h
> b/drivers/gpu/drm/xe/xe_ras_types.h
> index 4f640124f38f..020e3f92a057 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -199,4 +199,65 @@ struct xe_ras_ieh_error {
>  	/** @additional_info: Additional information */
>  	u32 additional_info[10];
>  } __packed;
> +
> +/**
> + * struct xe_ras_hardware_address - Device memory hardware address
> +details
> + *
> + * Hardware physical address structure for device memory error reporting.
> + */
> +struct xe_ras_hardware_address {
> +	/** @column: Column address */
> +	u64 column:6;
> +	/** @bank: Bank */
> +	u64 bank:2;
> +	/** @bank_group: Bank group */
> +	u64 bank_group:2;
> +	/** @row: Row address */
> +	u64 row:16;
> +	/** @channel: Memory Channel */
> +	u64 channel:8;
> +	/** @msu: MSU index */
> +	u64 msu:8;
> +	/** @reserved: Reserved for future use */
> +	u64 reserved:22;
> +} __packed;
> +
> +/**
> + * struct xe_ras_error_category - Device memory error category details
> +*/ struct xe_ras_error_category {
> +	/** @pma_error: PMA (Power Management Agent) error */
> +	u8 pma_error:1;
> +	/** @ecc_error: Double bit ECC error */
> +	u8 ecc_error:1;
> +	/** @poison_detected: Write poison detected */
> +	u8 poison_detected:1;
> +	/** @parity_error: Parity error */
> +	u8 parity_error:1;
> +	/** @phy_error: PHY error */
> +	u8 phy_error:1;
> +	/** @reserved: Reserved for future use */
> +	u8 reserved:3;
> +} __packed;
> +
> +/**
> + * struct xe_ras_memory_error - Device memory error details
> + *
> + * This structure provides detailed information about a device memory error.
> + * Cast from error_details array for device memory errors.
> + */
> +struct xe_ras_memory_error {
> +	/** @category: Device memory error category */
> +	struct xe_ras_error_category category;
> +	/** @reserved: Reserved for future use */
> +	u8 reserved[7];
> +	/** @hw_address: Memory hardware physical address */
> +	struct xe_ras_hardware_address hw_address;
> +	/** @sw_address: Software address where error occurred */

Introduced but not used, can be moved to next patch?

Tejas
> +	u64 sw_address;
> +	/** @log_array: Error syndromes associated with the error */
> +	u32 log_array[8];
> +	/** @reserved2: Reserved for future use */
> +	u32 reserved2[2];
> +} __packed;
>  #endif
> --
> 2.47.1

[PATCH v4 10/13] drm/xe/xe_ras: Add support to offline/decline a page

[Riana Tauro]

Add a helper function that sends commands to system controller
to offline/decline a page based on user policy.

Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_ras.c                   | 51 +++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h                   |  2 +
 drivers/gpu/drm/xe/xe_ras_types.h             | 37 ++++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  4 +-
 4 files changed, 93 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 347844b3d2bf..cd1ac6441b92 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -268,6 +268,57 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 	return XE_RAS_RECOVERY_ACTION_RESET;
 }
 
+/**
+ * xe_ras_page_offline() - Send page offline/decline request to system controller
+ * @xe: xe device instance
+ * @action: Action to be performed (offline/decline)
+ * @page_address: address of the page
+ *
+ * Returns: 0 on success, negative error code on failure
+ */
+int xe_ras_page_offline(struct xe_device *xe, enum xe_ras_page_action action, u64 page_address)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_page_offline_request request = {0};
+	struct xe_ras_page_offline_response response = {0};
+	size_t rlen;
+	int ret;
+
+	if (!xe->info.has_sysctrl)
+		return 0;
+
+	if (action >= XE_RAS_PAGE_ACTION_MAX) {
+		xe_err(xe, "[RAS]: Invalid page offline action %d\n", action);
+		return -EINVAL;
+	}
+
+	request.page_address = page_address;
+	request.action = action;
+
+	prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_PAGE_OFFLINE, &request,
+				sizeof(request), &response, sizeof(response));
+
+	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+	if (ret) {
+		xe_err(xe, "[RAS]: sysctrl: error ret %d\n", ret);
+		return ret;
+	}
+
+	if (rlen != sizeof(response)) {
+		xe_err(xe, "[RAS]: sysctrl: response size mismatch. Expected %zu, got %zu\n",
+		       sizeof(response), rlen);
+		return -EINVAL;
+	}
+
+	if (response.status) {
+		xe_err(xe, "[RAS]: sysctrl: Page offline command failed with status %u\n",
+		       response.status);
+		return -EIO;
+	}
+
+	return 0;
+}
+
 #ifdef CONFIG_PCIEAER
 static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
 {
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index e191ab80080c..ec59258eb3df 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -12,5 +12,7 @@ struct xe_device;
 
 void xe_ras_init(struct xe_device *xe);
 enum xe_ras_recovery_action  xe_ras_process_errors(struct xe_device *xe);
+int xe_ras_page_offline(struct xe_device *xe, enum xe_ras_page_action action,
+			u64 page_address);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 020e3f92a057..d76310866da5 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -30,6 +30,19 @@ enum xe_ras_recovery_action {
 	XE_RAS_RECOVERY_ACTION_MAX
 };
 
+/**
+ * enum xe_ras_page_action - Page offline actions for page offline request
+ *
+ * @XE_RAS_PAGE_ACTION_OFFLINE: Instruct firmware to remove page from queue
+ * @XE_RAS_PAGE_ACTION_DECLINE: Instruct firmware to mark page as not offline
+ * @XE_RAS_PAGE_ACTION_MAX: Max value for validation
+ */
+enum xe_ras_page_action {
+	XE_RAS_PAGE_ACTION_OFFLINE,
+	XE_RAS_PAGE_ACTION_DECLINE,
+	XE_RAS_PAGE_ACTION_MAX
+};
+
 /**
  * struct xe_ras_error_common - Common RAS error class
  *
@@ -260,4 +273,28 @@ struct xe_ras_memory_error {
 	/** @reserved2: Reserved for future use */
 	u32 reserved2[2];
 } __packed;
+
+/**
+ * struct xe_ras_page_offline_request - Request for page offline command
+ *
+ * This structure provides the request format to offline/decline a page
+ */
+struct xe_ras_page_offline_request {
+	/** @page_address: Page address (4KB aligned) */
+	u64 page_address;
+	/** @action: Action to be performed (enum xe_ras_page_action) */
+	u32 action;
+	/** @reserved: Reserved for future use */
+	u32 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_response - Response from page offline command
+ */
+struct xe_ras_page_offline_response {
+	/** @status: Status of the page offline request */
+	u32 status;
+	/** @reserved: Reserved for future use */
+	u32 reserved;
+} __packed;
 #endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 00a0f05aab32..2cafa8a14cc3 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -14,9 +14,11 @@
  * enum xe_sysctrl_mailbox_command_id - Command ID's for GFSP group
  *
  * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Get basic error information
+ * @XE_SYSCTRL_CMD_PAGE_OFFLINE: Instruct firmware to offline/decline a page
  */
 enum xe_sysctrl_mailbox_command_id {
-	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01
+	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
+	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08
 };
 
 enum xe_sysctrl_group {
-- 
2.47.1

RE: [PATCH v4 10/13] drm/xe/xe_ras: Add support to offline/decline a page

[Upadhyay, Tejas]

> -----Original Message-----
> From: Tauro, Riana <riana.tauro@intel.com>
> Sent: 17 April 2026 14:28
> To: intel-xe@lists.freedesktop.org
> Cc: Tauro, Riana <riana.tauro@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>;
> aravind.iddamsetty@linux.intel.com; Nilawar, Badal
> <badal.nilawar@intel.com>; Jadav, Raag <raag.jadav@intel.com>;
> Koppuravuri, Ravi Kishore <ravi.kishore.koppuravuri@intel.com>; Koujalagi,
> Mallesh <mallesh.koujalagi@intel.com>; Purkait, Soham
> <soham.purkait@intel.com>; Upadhyay, Tejas <tejas.upadhyay@intel.com>;
> Ghimiray, Himal Prasad <himal.prasad.ghimiray@intel.com>
> Subject: [PATCH v4 10/13] drm/xe/xe_ras: Add support to offline/decline a
> page
> 
> Add a helper function that sends commands to system controller to
> offline/decline a page based on user policy.
> 
> Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_ras.c                   | 51 +++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ras.h                   |  2 +
>  drivers/gpu/drm/xe/xe_ras_types.h             | 37 ++++++++++++++
>  drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  4 +-
>  4 files changed, 93 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c index
> 347844b3d2bf..cd1ac6441b92 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -268,6 +268,57 @@ enum xe_ras_recovery_action
> xe_ras_process_errors(struct xe_device *xe)
>  	return XE_RAS_RECOVERY_ACTION_RESET;
>  }
> 
> +/**
> + * xe_ras_page_offline() - Send page offline/decline request to system
> +controller
> + * @xe: xe device instance
> + * @action: Action to be performed (offline/decline)
> + * @page_address: address of the page
> + *
> + * Returns: 0 on success, negative error code on failure  */ int
> +xe_ras_page_offline(struct xe_device *xe, enum xe_ras_page_action
> +action, u64 page_address) {

Where is this used?

Tejas
> +	struct xe_sysctrl_mailbox_command command = {0};
> +	struct xe_ras_page_offline_request request = {0};
> +	struct xe_ras_page_offline_response response = {0};
> +	size_t rlen;
> +	int ret;
> +
> +	if (!xe->info.has_sysctrl)
> +		return 0;
> +
> +	if (action >= XE_RAS_PAGE_ACTION_MAX) {
> +		xe_err(xe, "[RAS]: Invalid page offline action %d\n", action);
> +		return -EINVAL;
> +	}
> +
> +	request.page_address = page_address;
> +	request.action = action;
> +
> +	prepare_sysctrl_command(&command,
> XE_SYSCTRL_CMD_PAGE_OFFLINE, &request,
> +				sizeof(request), &response,
> sizeof(response));
> +
> +	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> +	if (ret) {
> +		xe_err(xe, "[RAS]: sysctrl: error ret %d\n", ret);
> +		return ret;
> +	}
> +
> +	if (rlen != sizeof(response)) {
> +		xe_err(xe, "[RAS]: sysctrl: response size mismatch. Expected
> %zu, got %zu\n",
> +		       sizeof(response), rlen);
> +		return -EINVAL;
> +	}
> +
> +	if (response.status) {
> +		xe_err(xe, "[RAS]: sysctrl: Page offline command failed with
> status %u\n",
> +		       response.status);
> +		return -EIO;
> +	}
> +
> +	return 0;
> +}
> +
>  #ifdef CONFIG_PCIEAER
>  static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
> { diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index e191ab80080c..ec59258eb3df 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -12,5 +12,7 @@ struct xe_device;
> 
>  void xe_ras_init(struct xe_device *xe);  enum xe_ras_recovery_action
> xe_ras_process_errors(struct xe_device *xe);
> +int xe_ras_page_offline(struct xe_device *xe, enum xe_ras_page_action
> action,
> +			u64 page_address);
> 
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h
> b/drivers/gpu/drm/xe/xe_ras_types.h
> index 020e3f92a057..d76310866da5 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -30,6 +30,19 @@ enum xe_ras_recovery_action {
>  	XE_RAS_RECOVERY_ACTION_MAX
>  };
> 
> +/**
> + * enum xe_ras_page_action - Page offline actions for page offline
> +request
> + *
> + * @XE_RAS_PAGE_ACTION_OFFLINE: Instruct firmware to remove page
> from
> +queue
> + * @XE_RAS_PAGE_ACTION_DECLINE: Instruct firmware to mark page as not
> +offline
> + * @XE_RAS_PAGE_ACTION_MAX: Max value for validation  */ enum
> +xe_ras_page_action {
> +	XE_RAS_PAGE_ACTION_OFFLINE,
> +	XE_RAS_PAGE_ACTION_DECLINE,
> +	XE_RAS_PAGE_ACTION_MAX
> +};
> +
>  /**
>   * struct xe_ras_error_common - Common RAS error class
>   *
> @@ -260,4 +273,28 @@ struct xe_ras_memory_error {
>  	/** @reserved2: Reserved for future use */
>  	u32 reserved2[2];
>  } __packed;
> +
> +/**
> + * struct xe_ras_page_offline_request - Request for page offline
> +command
> + *
> + * This structure provides the request format to offline/decline a page
> +*/ struct xe_ras_page_offline_request {
> +	/** @page_address: Page address (4KB aligned) */
> +	u64 page_address;
> +	/** @action: Action to be performed (enum xe_ras_page_action) */
> +	u32 action;
> +	/** @reserved: Reserved for future use */
> +	u32 reserved;
> +} __packed;
> +
> +/**
> + * struct xe_ras_page_offline_response - Response from page offline
> +command  */ struct xe_ras_page_offline_response {
> +	/** @status: Status of the page offline request */
> +	u32 status;
> +	/** @reserved: Reserved for future use */
> +	u32 reserved;
> +} __packed;
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> index 00a0f05aab32..2cafa8a14cc3 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -14,9 +14,11 @@
>   * enum xe_sysctrl_mailbox_command_id - Command ID's for GFSP group
>   *
>   * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Get basic error information
> + * @XE_SYSCTRL_CMD_PAGE_OFFLINE: Instruct firmware to offline/decline a
> + page
>   */
>  enum xe_sysctrl_mailbox_command_id {
> -	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01
> +	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
> +	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08
>  };
> 
>  enum xe_sysctrl_group {
> --
> 2.47.1

[PATCH v4 11/13] drm/xe/xe_ras: Add support for page offline list and queue commands

[Riana Tauro]

Add handling for page offline list and queue sysctrl commands. The page
offline list command retrieves pages that are already offlined by the
firmware. The page offline queue command retrieves the pages pending to be
offlined by the firmware.

Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_ras.c                   | 85 +++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras_types.h             | 39 +++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  6 +-
 3 files changed, 129 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index cd1ac6441b92..42ec27c05e9a 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -319,6 +319,87 @@ int xe_ras_page_offline(struct xe_device *xe, enum xe_ras_page_action action, u6
 	return 0;
 }
 
+static void get_queued_pages(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_page_offline_queue response = {0};
+	u32 count = 0;
+	size_t rlen;
+	int ret;
+
+	/* Supported only on platforms with system controller */
+	if (!xe->info.has_sysctrl)
+		return;
+
+	prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE, NULL, 0,
+				&response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "[RAS]: sysctrl: error ret %d\n", ret);
+			return;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "[RAS]: sysctrl: response size mismatch. Expected %zu, got %zu\n",
+			       sizeof(response), rlen);
+			return;
+		}
+
+		/* TODO: Process pages and offline them */
+
+		count += response.pages_returned;
+		if (count > response.total_pages) {
+			xe_err(xe, "[RAS]: sysctrl: Pages returned exceed total pages %u, returned %u\n",
+			       response.total_pages, count);
+			return;
+		}
+	} while (response.additional_data);
+}
+
+static void get_offlined_list(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_page_offline_list response = {0};
+	int ret, count = 0;
+	size_t rlen;
+
+	/* Supported only on platforms with system controller */
+	if (!xe->info.has_sysctrl)
+		return;
+
+	prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_OFFLINE_LIST, NULL, 0,
+				&response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "[RAS]: sysctrl: error ret %d\n", ret);
+			return;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "[RAS]: sysctrl: response size mismatch. Expected %zu, got %zu\n",
+			       sizeof(response), rlen);
+			return;
+		}
+
+		/* TODO: Process pages and offline them */
+
+		count += response.pages_returned;
+		if (count > response.total_pages) {
+			xe_err(xe, "[RAS]: sysctrl: Pages returned exceed total pages %u, returned %u\n",
+			       response.total_pages, count);
+			return;
+		}
+	} while (response.additional_data);
+}
+
 #ifdef CONFIG_PCIEAER
 static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
 {
@@ -394,4 +475,8 @@ void xe_ras_init(struct xe_device *xe)
 #ifdef CONFIG_PCIEAER
 	aer_unmask_and_downgrade_internal_error(xe);
 #endif
+
+	/* Get any pages that need to be offlined from firmware and reserve them */
+	get_offlined_list(xe);
+	get_queued_pages(xe);
 }
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index d76310866da5..1a5de6cd16a1 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -10,6 +10,7 @@
 
 #define XE_RAS_NUM_ERROR_ARR		3
 #define XE_RAS_MAX_ERROR_DETAILS	16
+#define XE_RAS_NUM_PAGES		25
 #define XE_RAS_IEH_PUNIT_ERROR		BIT(1)
 
 /**
@@ -297,4 +298,42 @@ struct xe_ras_page_offline_response {
 	/** @reserved: Reserved for future use */
 	u32 reserved;
 } __packed;
+
+/**
+ * struct xe_ras_page_offline_list - Response from get offline list command
+ *
+ * This structure provides the details of offlined pages from flash.
+ */
+struct xe_ras_page_offline_list {
+	/** @max_entries: Total no of pages that can be stored in flash */
+	u32 max_entries;
+	/** @total_pages: Total number of permanently offlined pages */
+	u32 total_pages;
+	/** @pages_returned: Number of pages returned in this response */
+	u32 pages_returned;
+	/** @page_addresses: Array of permanently offlined page addresses (4KB aligned) */
+	u64 page_addresses[XE_RAS_NUM_PAGES];
+	/** @additional_data: Indicates if more data is available */
+	u8 additional_data;
+	/** @reserved: Reserved for future use */
+	u8 reserved[3];
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_queue - Response from get offline queue command
+ *
+ * This structure provides the details of queued offlined pages from firmware.
+ */
+struct xe_ras_page_offline_queue {
+	/** @total_pages: Total number of queued pages */
+	u32 total_pages;
+	/** @pages_returned: Number of pages returned in this response */
+	u32 pages_returned;
+	/** @page_addresses: Array of offlined page addresses (4KB aligned) */
+	u64 page_addresses[XE_RAS_NUM_PAGES];
+	/** @additional_data: Indicates if more data is available */
+	u8 additional_data;
+	/** @reserved: Reserved for future use */
+	u8 reserved[3];
+} __packed;
 #endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 2cafa8a14cc3..b6139ac0eaca 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -15,10 +15,14 @@
  *
  * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Get basic error information
  * @XE_SYSCTRL_CMD_PAGE_OFFLINE: Instruct firmware to offline/decline a page
+ * @XE_SYSCTRL_CMD_GET_OFFLINE_LIST: Get list of all offlined pages from flash
+ * @XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE: Get list of offlined queued pages from firmware
  */
 enum xe_sysctrl_mailbox_command_id {
 	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
-	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08
+	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08,
+	XE_SYSCTRL_CMD_GET_OFFLINE_LIST		= 0x09,
+	XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE	= 0x0A
 };
 
 enum xe_sysctrl_group {
-- 
2.47.1

RE: [PATCH v4 11/13] drm/xe/xe_ras: Add support for page offline list and queue commands

[Upadhyay, Tejas]

> -----Original Message-----
> From: Tauro, Riana <riana.tauro@intel.com>
> Sent: 17 April 2026 14:28
> To: intel-xe@lists.freedesktop.org
> Cc: Tauro, Riana <riana.tauro@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>;
> aravind.iddamsetty@linux.intel.com; Nilawar, Badal
> <badal.nilawar@intel.com>; Jadav, Raag <raag.jadav@intel.com>;
> Koppuravuri, Ravi Kishore <ravi.kishore.koppuravuri@intel.com>; Koujalagi,
> Mallesh <mallesh.koujalagi@intel.com>; Purkait, Soham
> <soham.purkait@intel.com>; Upadhyay, Tejas <tejas.upadhyay@intel.com>;
> Ghimiray, Himal Prasad <himal.prasad.ghimiray@intel.com>
> Subject: [PATCH v4 11/13] drm/xe/xe_ras: Add support for page offline list
> and queue commands
> 
> Add handling for page offline list and queue sysctrl commands. The page
> offline list command retrieves pages that are already offlined by the firmware.
> The page offline queue command retrieves the pages pending to be offlined by
> the firmware.
> 
> Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_ras.c                   | 85 +++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ras_types.h             | 39 +++++++++
>  drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  6 +-
>  3 files changed, 129 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c index
> cd1ac6441b92..42ec27c05e9a 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -319,6 +319,87 @@ int xe_ras_page_offline(struct xe_device *xe, enum
> xe_ras_page_action action, u6
>  	return 0;
>  }
> 
> +static void get_queued_pages(struct xe_device *xe) {
> +	struct xe_sysctrl_mailbox_command command = {0};
> +	struct xe_ras_page_offline_queue response = {0};
> +	u32 count = 0;
> +	size_t rlen;
> +	int ret;
> +
> +	/* Supported only on platforms with system controller */
> +	if (!xe->info.has_sysctrl)
> +		return;
> +
> +	prepare_sysctrl_command(&command,
> XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE, NULL, 0,
> +				&response, sizeof(response));
> +
> +	do {
> +		memset(&response, 0, sizeof(response));
> +
> +		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> +		if (ret) {
> +			xe_err(xe, "[RAS]: sysctrl: error ret %d\n", ret);
> +			return;
> +		}
> +
> +		if (rlen != sizeof(response)) {
> +			xe_err(xe, "[RAS]: sysctrl: response size mismatch.
> Expected %zu, got %zu\n",
> +			       sizeof(response), rlen);
> +			return;
> +		}
> +
> +		/* TODO: Process pages and offline them */
> +
> +		count += response.pages_returned;
> +		if (count > response.total_pages) {
> +			xe_err(xe, "[RAS]: sysctrl: Pages returned exceed total
> pages %u, returned %u\n",
> +			       response.total_pages, count);
> +			return;
> +		}
> +	} while (response.additional_data);
> +}
> +
> +static void get_offlined_list(struct xe_device *xe) {
> +	struct xe_sysctrl_mailbox_command command = {0};
> +	struct xe_ras_page_offline_list response = {0};
> +	int ret, count = 0;
> +	size_t rlen;
> +
> +	/* Supported only on platforms with system controller */
> +	if (!xe->info.has_sysctrl)
> +		return;
> +
> +	prepare_sysctrl_command(&command,
> XE_SYSCTRL_CMD_GET_OFFLINE_LIST, NULL, 0,
> +				&response, sizeof(response));
> +
> +	do {
> +		memset(&response, 0, sizeof(response));
> +
> +		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> +		if (ret) {
> +			xe_err(xe, "[RAS]: sysctrl: error ret %d\n", ret);
> +			return;
> +		}
> +
> +		if (rlen != sizeof(response)) {
> +			xe_err(xe, "[RAS]: sysctrl: response size mismatch.
> Expected %zu, got %zu\n",
> +			       sizeof(response), rlen);
> +			return;
> +		}
> +
> +		/* TODO: Process pages and offline them */
> +
> +		count += response.pages_returned;
> +		if (count > response.total_pages) {
> +			xe_err(xe, "[RAS]: sysctrl: Pages returned exceed total
> pages %u, returned %u\n",
> +			       response.total_pages, count);
> +			return;
> +		}
> +	} while (response.additional_data);
> +}
> +
>  #ifdef CONFIG_PCIEAER
>  static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
> { @@ -394,4 +475,8 @@ void xe_ras_init(struct xe_device *xe)  #ifdef
> CONFIG_PCIEAER
>  	aer_unmask_and_downgrade_internal_error(xe);
>  #endif
> +
> +	/* Get any pages that need to be offlined from firmware and reserve
> them */

Should be executed only on CRI, right?

Tejas
> +	get_offlined_list(xe);
> +	get_queued_pages(xe);
>  }
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h
> b/drivers/gpu/drm/xe/xe_ras_types.h
> index d76310866da5..1a5de6cd16a1 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -10,6 +10,7 @@
> 
>  #define XE_RAS_NUM_ERROR_ARR		3
>  #define XE_RAS_MAX_ERROR_DETAILS	16
> +#define XE_RAS_NUM_PAGES		25
>  #define XE_RAS_IEH_PUNIT_ERROR		BIT(1)
> 
>  /**
> @@ -297,4 +298,42 @@ struct xe_ras_page_offline_response {
>  	/** @reserved: Reserved for future use */
>  	u32 reserved;
>  } __packed;
> +
> +/**
> + * struct xe_ras_page_offline_list - Response from get offline list
> +command
> + *
> + * This structure provides the details of offlined pages from flash.
> + */
> +struct xe_ras_page_offline_list {
> +	/** @max_entries: Total no of pages that can be stored in flash */
> +	u32 max_entries;
> +	/** @total_pages: Total number of permanently offlined pages */
> +	u32 total_pages;
> +	/** @pages_returned: Number of pages returned in this response */
> +	u32 pages_returned;
> +	/** @page_addresses: Array of permanently offlined page addresses
> (4KB aligned) */
> +	u64 page_addresses[XE_RAS_NUM_PAGES];
> +	/** @additional_data: Indicates if more data is available */
> +	u8 additional_data;
> +	/** @reserved: Reserved for future use */
> +	u8 reserved[3];
> +} __packed;
> +
> +/**
> + * struct xe_ras_page_offline_queue - Response from get offline queue
> +command
> + *
> + * This structure provides the details of queued offlined pages from firmware.
> + */
> +struct xe_ras_page_offline_queue {
> +	/** @total_pages: Total number of queued pages */
> +	u32 total_pages;
> +	/** @pages_returned: Number of pages returned in this response */
> +	u32 pages_returned;
> +	/** @page_addresses: Array of offlined page addresses (4KB aligned)
> */
> +	u64 page_addresses[XE_RAS_NUM_PAGES];
> +	/** @additional_data: Indicates if more data is available */
> +	u8 additional_data;
> +	/** @reserved: Reserved for future use */
> +	u8 reserved[3];
> +} __packed;
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> index 2cafa8a14cc3..b6139ac0eaca 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -15,10 +15,14 @@
>   *
>   * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Get basic error information
>   * @XE_SYSCTRL_CMD_PAGE_OFFLINE: Instruct firmware to offline/decline a
> page
> + * @XE_SYSCTRL_CMD_GET_OFFLINE_LIST: Get list of all offlined pages
> + from flash
> + * @XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE: Get list of offlined queued
> pages
> + from firmware
>   */
>  enum xe_sysctrl_mailbox_command_id {
>  	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
> -	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08
> +	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08,
> +	XE_SYSCTRL_CMD_GET_OFFLINE_LIST		= 0x09,
> +	XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE	= 0x0A
>  };
> 
>  enum xe_sysctrl_group {
> --
> 2.47.1

RE: [PATCH v4 11/13] drm/xe/xe_ras: Add support for page offline list and queue commands

[Upadhyay, Tejas]

> -----Original Message-----
> From: Tauro, Riana <riana.tauro@intel.com>
> Sent: 17 April 2026 14:28
> To: intel-xe@lists.freedesktop.org
> Cc: Tauro, Riana <riana.tauro@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>;
> aravind.iddamsetty@linux.intel.com; Nilawar, Badal
> <badal.nilawar@intel.com>; Jadav, Raag <raag.jadav@intel.com>;
> Koppuravuri, Ravi Kishore <ravi.kishore.koppuravuri@intel.com>; Koujalagi,
> Mallesh <mallesh.koujalagi@intel.com>; Purkait, Soham
> <soham.purkait@intel.com>; Upadhyay, Tejas <tejas.upadhyay@intel.com>;
> Ghimiray, Himal Prasad <himal.prasad.ghimiray@intel.com>
> Subject: [PATCH v4 11/13] drm/xe/xe_ras: Add support for page offline list
> and queue commands
> 
> Add handling for page offline list and queue sysctrl commands. The page
> offline list command retrieves pages that are already offlined by the firmware.
> The page offline queue command retrieves the pages pending to be offlined by
> the firmware.
> 
> Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
> Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_ras.c                   | 85 +++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ras_types.h             | 39 +++++++++
>  drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  6 +-
>  3 files changed, 129 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c index
> cd1ac6441b92..42ec27c05e9a 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -319,6 +319,87 @@ int xe_ras_page_offline(struct xe_device *xe, enum
> xe_ras_page_action action, u6
>  	return 0;
>  }
> 
> +static void get_queued_pages(struct xe_device *xe) {
> +	struct xe_sysctrl_mailbox_command command = {0};
> +	struct xe_ras_page_offline_queue response = {0};
> +	u32 count = 0;
> +	size_t rlen;
> +	int ret;
> +
> +	/* Supported only on platforms with system controller */
> +	if (!xe->info.has_sysctrl)
> +		return;
> +
> +	prepare_sysctrl_command(&command,
> XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE, NULL, 0,
> +				&response, sizeof(response));
> +
> +	do {
> +		memset(&response, 0, sizeof(response));
> +
> +		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> +		if (ret) {
> +			xe_err(xe, "[RAS]: sysctrl: error ret %d\n", ret);
> +			return;
> +		}
> +
> +		if (rlen != sizeof(response)) {
> +			xe_err(xe, "[RAS]: sysctrl: response size mismatch.
> Expected %zu, got %zu\n",
> +			       sizeof(response), rlen);
> +			return;
> +		}
> +
> +		/* TODO: Process pages and offline them */
> +
> +		count += response.pages_returned;
> +		if (count > response.total_pages) {
> +			xe_err(xe, "[RAS]: sysctrl: Pages returned exceed total
> pages %u, returned %u\n",
> +			       response.total_pages, count);
> +			return;
> +		}
> +	} while (response.additional_data);
> +}
> +
> +static void get_offlined_list(struct xe_device *xe) {
> +	struct xe_sysctrl_mailbox_command command = {0};
> +	struct xe_ras_page_offline_list response = {0};
> +	int ret, count = 0;
> +	size_t rlen;
> +
> +	/* Supported only on platforms with system controller */
> +	if (!xe->info.has_sysctrl)
> +		return;
> +
> +	prepare_sysctrl_command(&command,
> XE_SYSCTRL_CMD_GET_OFFLINE_LIST, NULL, 0,
> +				&response, sizeof(response));
> +
> +	do {
> +		memset(&response, 0, sizeof(response));
> +
> +		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> +		if (ret) {
> +			xe_err(xe, "[RAS]: sysctrl: error ret %d\n", ret);
> +			return;
> +		}
> +
> +		if (rlen != sizeof(response)) {
> +			xe_err(xe, "[RAS]: sysctrl: response size mismatch.
> Expected %zu, got %zu\n",
> +			       sizeof(response), rlen);
> +			return;
> +		}
> +
> +		/* TODO: Process pages and offline them */
> +
> +		count += response.pages_returned;
> +		if (count > response.total_pages) {
> +			xe_err(xe, "[RAS]: sysctrl: Pages returned exceed total
> pages %u, returned %u\n",
> +			       response.total_pages, count);
> +			return;
> +		}
> +	} while (response.additional_data);
> +}
> +
>  #ifdef CONFIG_PCIEAER
>  static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
> { @@ -394,4 +475,8 @@ void xe_ras_init(struct xe_device *xe)  #ifdef
> CONFIG_PCIEAER
>  	aer_unmask_and_downgrade_internal_error(xe);
>  #endif
> +
> +	/* Get any pages that need to be offlined from firmware and reserve
> them */
> +	get_offlined_list(xe);
> +	get_queued_pages(xe);
>  }
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h
> b/drivers/gpu/drm/xe/xe_ras_types.h
> index d76310866da5..1a5de6cd16a1 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -10,6 +10,7 @@
> 
>  #define XE_RAS_NUM_ERROR_ARR		3
>  #define XE_RAS_MAX_ERROR_DETAILS	16
> +#define XE_RAS_NUM_PAGES		25
>  #define XE_RAS_IEH_PUNIT_ERROR		BIT(1)
> 
>  /**
> @@ -297,4 +298,42 @@ struct xe_ras_page_offline_response {
>  	/** @reserved: Reserved for future use */
>  	u32 reserved;
>  } __packed;
> +
> +/**
> + * struct xe_ras_page_offline_list - Response from get offline list
> +command
> + *
> + * This structure provides the details of offlined pages from flash.
> + */
> +struct xe_ras_page_offline_list {
> +	/** @max_entries: Total no of pages that can be stored in flash */
> +	u32 max_entries;
> +	/** @total_pages: Total number of permanently offlined pages */
> +	u32 total_pages;
> +	/** @pages_returned: Number of pages returned in this response */
> +	u32 pages_returned;
> +	/** @page_addresses: Array of permanently offlined page addresses
> (4KB aligned) */
> +	u64 page_addresses[XE_RAS_NUM_PAGES];
> +	/** @additional_data: Indicates if more data is available */
> +	u8 additional_data;
> +	/** @reserved: Reserved for future use */
> +	u8 reserved[3];
> +} __packed;
> +
> +/**
> + * struct xe_ras_page_offline_queue - Response from get offline queue
> +command
> + *
> + * This structure provides the details of queued offlined pages from firmware.
> + */
> +struct xe_ras_page_offline_queue {
> +	/** @total_pages: Total number of queued pages */
> +	u32 total_pages;
> +	/** @pages_returned: Number of pages returned in this response */
> +	u32 pages_returned;
> +	/** @page_addresses: Array of offlined page addresses (4KB aligned)

I understand that we will have 4K aligned addresses reported to core offline API right? If yes can you also add double check before passing if its really 4K aligned?

Tejas
> */
> +	u64 page_addresses[XE_RAS_NUM_PAGES];
> +	/** @additional_data: Indicates if more data is available */
> +	u8 additional_data;
> +	/** @reserved: Reserved for future use */
> +	u8 reserved[3];
> +} __packed;
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> index 2cafa8a14cc3..b6139ac0eaca 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -15,10 +15,14 @@
>   *
>   * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Get basic error information
>   * @XE_SYSCTRL_CMD_PAGE_OFFLINE: Instruct firmware to offline/decline a
> page
> + * @XE_SYSCTRL_CMD_GET_OFFLINE_LIST: Get list of all offlined pages
> + from flash
> + * @XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE: Get list of offlined queued
> pages
> + from firmware
>   */
>  enum xe_sysctrl_mailbox_command_id {
>  	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
> -	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08
> +	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08,
> +	XE_SYSCTRL_CMD_GET_OFFLINE_LIST		= 0x09,
> +	XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE	= 0x0A
>  };
> 
>  enum xe_sysctrl_group {
> --
> 2.47.1

[PATCH v4 12/13] drm/xe/xe_ras: Query errors from system controller on probe

[Riana Tauro]

Reorder soc remapper and system controller initialization to
early probe to allow querying errors on module load.

Cc: Anoop Vijay <anoop.c.vijay@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_device.c | 20 ++++++++++----------
 drivers/gpu/drm/xe/xe_ras.c    |  7 +++++++
 2 files changed, 17 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index c1c54836ac73..035c8151605a 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -970,6 +970,16 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		return err;
 
+	err = xe_soc_remapper_init(xe);
+	if (err)
+		return err;
+
+	err = xe_sysctrl_init(xe);
+	if (err)
+		return err;
+
+	xe_ras_init(xe);
+
 	/*
 	 * Now that GT is initialized (TTM in particular),
 	 * we can try to init display, and inherit the initial fb.
@@ -1010,10 +1020,6 @@ int xe_device_probe(struct xe_device *xe)
 
 	xe_nvm_init(xe);
 
-	err = xe_soc_remapper_init(xe);
-	if (err)
-		return err;
-
 	err = xe_heci_gsc_init(xe);
 	if (err)
 		return err;
@@ -1052,10 +1058,6 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		goto err_unregister_display;
 
-	err = xe_sysctrl_init(xe);
-	if (err)
-		goto err_unregister_display;
-
 	err = xe_device_sysfs_init(xe);
 	if (err)
 		goto err_unregister_display;
@@ -1075,8 +1077,6 @@ int xe_device_probe(struct xe_device *xe)
 
 	xe_vsec_init(xe);
 
-	xe_ras_init(xe);
-
 	err = xe_sriov_init_late(xe);
 	if (err)
 		goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 42ec27c05e9a..7598eeb796f0 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -479,4 +479,11 @@ void xe_ras_init(struct xe_device *xe)
 	/* Get any pages that need to be offlined from firmware and reserve them */
 	get_offlined_list(xe);
 	get_queued_pages(xe);
+
+	/*
+	 * On init, process and log any errors detected by firmware before driver init.
+	 * Critical errors are handled in xe_pcode_probe_early(), which enters survivability mode
+	 * if required.
+	 */
+	xe_ras_process_errors(xe);
 }
-- 
2.47.1

[PATCH v4 13/13] drm/xe/xe_pci_error: Process errors in mmio_enabled

[Riana Tauro]

Query system controller when any non fatal error occurs to check
the type of the error, contain and recover.

The system controller is queried in the mmio_enabled callback.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: use ras recovery enum (Raag)

v3: add comment for mapping
    use const (Mallesh)
---
 drivers/gpu/drm/xe/xe_pci_error.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 7d80bc2a6954..b7acf6778603 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -9,6 +9,7 @@
 #include "xe_device.h"
 #include "xe_gt.h"
 #include "xe_pci.h"
+#include "xe_ras.h"
 #include "xe_survivability_mode.h"
 #include "xe_uc.h"
 
@@ -34,6 +35,13 @@ static void xe_pci_error_handling(struct pci_dev *pdev)
 	pci_disable_device(pdev);
 }
 
+/* Mapping of RAS recovery action to PCI error result */
+static const pci_ers_result_t ras_recovery_action_to_pci_result[] = {
+	[XE_RAS_RECOVERY_ACTION_RECOVERED] = PCI_ERS_RESULT_RECOVERED,
+	[XE_RAS_RECOVERY_ACTION_RESET] = PCI_ERS_RESULT_NEED_RESET,
+	[XE_RAS_RECOVERY_ACTION_DISCONNECT] = PCI_ERS_RESULT_DISCONNECT,
+};
+
 static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
 {
 	struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -59,9 +67,13 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
 
 static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
 {
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	enum xe_ras_recovery_action action;
+
 	dev_err(&pdev->dev, "Xe Pci error recovery: MMIO enabled\n");
+	action = xe_ras_process_errors(xe);
 
-	return PCI_ERS_RESULT_NEED_RESET;
+	return ras_recovery_action_to_pci_result[action];
 }
 
 static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
-- 
2.47.1

✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev4)

[Patchwork]

== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev4)
URL   : https://patchwork.freedesktop.org/series/160482/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 45e77385fddebfc0dacfe16aca0ad67c67bf04dd
Author: Riana Tauro <riana.tauro@intel.com>
Date:   Fri Apr 17 14:28:25 2026 +0530

    drm/xe/xe_pci_error: Process errors in mmio_enabled
    
    Query system controller when any non fatal error occurs to check
    the type of the error, contain and recover.
    
    The system controller is queried in the mmio_enabled callback.
    
    Signed-off-by: Riana Tauro <riana.tauro@intel.com>
+ /mt/dim checkpatch 57114c081277a1321173619222eeb13705c20453 drm-intel
451358059101 drm/xe/xe_survivability: Decouple survivability info from boot survivability
ddf47606dc24 drm/xe/xe_pci_error: Implement PCI error recovery callbacks
-:100: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#100: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 159 lines checked
5cd7f42f8440 drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset
c21eb854dd3e drm/xe: Skip device access during PCI error recovery
75a37c162716 drm/xe/xe_ras: Initialize Uncorrectable AER Registers
-:52: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#52: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 119 lines checked
2a60d424ff2b drm/xe/xe_ras: Add basic structures and commands for uncorrectable errors
-:51: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#51: FILE: drivers/gpu/drm/xe/xe_ras.c:37:
+};
+static_assert(ARRAY_SIZE(xe_ras_severities) == XE_RAS_SEVERITY_MAX);

-:62: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#62: FILE: drivers/gpu/drm/xe/xe_ras.c:48:
+};
+static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMPONENT_MAX);

-:84: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#84: 
new file mode 100644

total: 0 errors, 1 warnings, 2 checks, 181 lines checked
0f009bc78969 drm/xe/xe_ras: Add support for uncorrectable core-compute errors
a7824c0606c4 drm/xe/xe_ras: Handle uncorrectable SoC Internal errors
-:46: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#46: FILE: drivers/gpu/drm/xe/xe_ras.c:107:
+		struct xe_ras_csc_error *csc_error = (struct xe_ras_csc_error *)error_info->additional_details;

-:65: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#65: FILE: drivers/gpu/drm/xe/xe_ras.c:126:
+		struct xe_ras_ieh_error *ieh_error = (struct xe_ras_ieh_error *)error_info->additional_details;

total: 0 errors, 2 warnings, 0 checks, 128 lines checked
f981b5a3765d drm/xe/xe_ras: Handle uncorrectable device memory errors
f9f76e27f5ef drm/xe/xe_ras: Add support to offline/decline a page
210e332e6fcc drm/xe/xe_ras: Add support for page offline list and queue commands
a12da58df8a1 drm/xe/xe_ras: Query errors from system controller on probe
45e77385fdde drm/xe/xe_pci_error: Process errors in mmio_enabled

✓ CI.KUnit: success for Introduce Xe Uncorrectable Error Handling (rev4)

[Patchwork]

== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev4)
URL   : https://patchwork.freedesktop.org/series/160482/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:33:42] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:33:47] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:34:18] Starting KUnit Kernel (1/1)...
[13:34:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:34:19] ================== guc_buf (11 subtests) ===================
[13:34:19] [PASSED] test_smallest
[13:34:19] [PASSED] test_largest
[13:34:19] [PASSED] test_granular
[13:34:19] [PASSED] test_unique
[13:34:19] [PASSED] test_overlap
[13:34:19] [PASSED] test_reusable
[13:34:19] [PASSED] test_too_big
[13:34:19] [PASSED] test_flush
[13:34:19] [PASSED] test_lookup
[13:34:19] [PASSED] test_data
[13:34:19] [PASSED] test_class
[13:34:19] ===================== [PASSED] guc_buf =====================
[13:34:19] =================== guc_dbm (7 subtests) ===================
[13:34:19] [PASSED] test_empty
[13:34:19] [PASSED] test_default
[13:34:19] ======================== test_size  ========================
[13:34:19] [PASSED] 4
[13:34:19] [PASSED] 8
[13:34:19] [PASSED] 32
[13:34:19] [PASSED] 256
[13:34:19] ==================== [PASSED] test_size ====================
[13:34:19] ======================= test_reuse  ========================
[13:34:19] [PASSED] 4
[13:34:19] [PASSED] 8
[13:34:19] [PASSED] 32
[13:34:19] [PASSED] 256
[13:34:19] =================== [PASSED] test_reuse ====================
[13:34:19] =================== test_range_overlap  ====================
[13:34:19] [PASSED] 4
[13:34:19] [PASSED] 8
[13:34:19] [PASSED] 32
[13:34:19] [PASSED] 256
[13:34:19] =============== [PASSED] test_range_overlap ================
[13:34:19] =================== test_range_compact  ====================
[13:34:19] [PASSED] 4
[13:34:19] [PASSED] 8
[13:34:19] [PASSED] 32
[13:34:19] [PASSED] 256
[13:34:19] =============== [PASSED] test_range_compact ================
[13:34:19] ==================== test_range_spare  =====================
[13:34:19] [PASSED] 4
[13:34:19] [PASSED] 8
[13:34:19] [PASSED] 32
[13:34:19] [PASSED] 256
[13:34:19] ================ [PASSED] test_range_spare =================
[13:34:19] ===================== [PASSED] guc_dbm =====================
[13:34:19] =================== guc_idm (6 subtests) ===================
[13:34:19] [PASSED] bad_init
[13:34:19] [PASSED] no_init
[13:34:19] [PASSED] init_fini
[13:34:19] [PASSED] check_used
[13:34:19] [PASSED] check_quota
[13:34:19] [PASSED] check_all
[13:34:19] ===================== [PASSED] guc_idm =====================
[13:34:19] ================== no_relay (3 subtests) ===================
[13:34:19] [PASSED] xe_drops_guc2pf_if_not_ready
[13:34:19] [PASSED] xe_drops_guc2vf_if_not_ready
[13:34:19] [PASSED] xe_rejects_send_if_not_ready
[13:34:19] ==================== [PASSED] no_relay =====================
[13:34:19] ================== pf_relay (14 subtests) ==================
[13:34:19] [PASSED] pf_rejects_guc2pf_too_short
[13:34:19] [PASSED] pf_rejects_guc2pf_too_long
[13:34:19] [PASSED] pf_rejects_guc2pf_no_payload
[13:34:19] [PASSED] pf_fails_no_payload
[13:34:19] [PASSED] pf_fails_bad_origin
[13:34:19] [PASSED] pf_fails_bad_type
[13:34:19] [PASSED] pf_txn_reports_error
[13:34:19] [PASSED] pf_txn_sends_pf2guc
[13:34:19] [PASSED] pf_sends_pf2guc
[13:34:19] [SKIPPED] pf_loopback_nop
[13:34:19] [SKIPPED] pf_loopback_echo
[13:34:19] [SKIPPED] pf_loopback_fail
[13:34:19] [SKIPPED] pf_loopback_busy
[13:34:19] [SKIPPED] pf_loopback_retry
[13:34:19] ==================== [PASSED] pf_relay =====================
[13:34:19] ================== vf_relay (3 subtests) ===================
[13:34:19] [PASSED] vf_rejects_guc2vf_too_short
[13:34:19] [PASSED] vf_rejects_guc2vf_too_long
[13:34:19] [PASSED] vf_rejects_guc2vf_no_payload
[13:34:19] ==================== [PASSED] vf_relay =====================
[13:34:19] ================ pf_gt_config (9 subtests) =================
[13:34:19] [PASSED] fair_contexts_1vf
[13:34:19] [PASSED] fair_doorbells_1vf
[13:34:19] [PASSED] fair_ggtt_1vf
[13:34:19] ====================== fair_vram_1vf  ======================
[13:34:19] [PASSED] 3.50 GiB
[13:34:19] [PASSED] 11.5 GiB
[13:34:19] [PASSED] 15.5 GiB
[13:34:19] [PASSED] 31.5 GiB
[13:34:19] [PASSED] 63.5 GiB
[13:34:19] [PASSED] 1.91 GiB
[13:34:19] ================== [PASSED] fair_vram_1vf ==================
[13:34:19] ================ fair_vram_1vf_admin_only  =================
[13:34:19] [PASSED] 3.50 GiB
[13:34:19] [PASSED] 11.5 GiB
[13:34:19] [PASSED] 15.5 GiB
[13:34:19] [PASSED] 31.5 GiB
[13:34:19] [PASSED] 63.5 GiB
[13:34:19] [PASSED] 1.91 GiB
[13:34:19] ============ [PASSED] fair_vram_1vf_admin_only =============
[13:34:19] ====================== fair_contexts  ======================
[13:34:19] [PASSED] 1 VF
[13:34:19] [PASSED] 2 VFs
[13:34:19] [PASSED] 3 VFs
[13:34:19] [PASSED] 4 VFs
[13:34:19] [PASSED] 5 VFs
[13:34:19] [PASSED] 6 VFs
[13:34:19] [PASSED] 7 VFs
[13:34:19] [PASSED] 8 VFs
[13:34:19] [PASSED] 9 VFs
[13:34:19] [PASSED] 10 VFs
[13:34:19] [PASSED] 11 VFs
[13:34:19] [PASSED] 12 VFs
[13:34:19] [PASSED] 13 VFs
[13:34:19] [PASSED] 14 VFs
[13:34:19] [PASSED] 15 VFs
[13:34:19] [PASSED] 16 VFs
[13:34:19] [PASSED] 17 VFs
[13:34:19] [PASSED] 18 VFs
[13:34:19] [PASSED] 19 VFs
[13:34:19] [PASSED] 20 VFs
[13:34:19] [PASSED] 21 VFs
[13:34:19] [PASSED] 22 VFs
[13:34:19] [PASSED] 23 VFs
[13:34:19] [PASSED] 24 VFs
[13:34:19] [PASSED] 25 VFs
[13:34:19] [PASSED] 26 VFs
[13:34:19] [PASSED] 27 VFs
[13:34:19] [PASSED] 28 VFs
[13:34:19] [PASSED] 29 VFs
[13:34:19] [PASSED] 30 VFs
[13:34:19] [PASSED] 31 VFs
[13:34:19] [PASSED] 32 VFs
[13:34:19] [PASSED] 33 VFs
[13:34:19] [PASSED] 34 VFs
[13:34:19] [PASSED] 35 VFs
[13:34:19] [PASSED] 36 VFs
[13:34:19] [PASSED] 37 VFs
[13:34:19] [PASSED] 38 VFs
[13:34:19] [PASSED] 39 VFs
[13:34:19] [PASSED] 40 VFs
[13:34:19] [PASSED] 41 VFs
[13:34:19] [PASSED] 42 VFs
[13:34:19] [PASSED] 43 VFs
[13:34:19] [PASSED] 44 VFs
[13:34:19] [PASSED] 45 VFs
[13:34:19] [PASSED] 46 VFs
[13:34:19] [PASSED] 47 VFs
[13:34:19] [PASSED] 48 VFs
[13:34:19] [PASSED] 49 VFs
[13:34:19] [PASSED] 50 VFs
[13:34:19] [PASSED] 51 VFs
[13:34:19] [PASSED] 52 VFs
[13:34:19] [PASSED] 53 VFs
[13:34:19] [PASSED] 54 VFs
[13:34:19] [PASSED] 55 VFs
[13:34:19] [PASSED] 56 VFs
[13:34:19] [PASSED] 57 VFs
[13:34:19] [PASSED] 58 VFs
[13:34:19] [PASSED] 59 VFs
[13:34:19] [PASSED] 60 VFs
[13:34:19] [PASSED] 61 VFs
[13:34:19] [PASSED] 62 VFs
[13:34:19] [PASSED] 63 VFs
[13:34:19] ================== [PASSED] fair_contexts ==================
[13:34:19] ===================== fair_doorbells  ======================
[13:34:19] [PASSED] 1 VF
[13:34:19] [PASSED] 2 VFs
[13:34:19] [PASSED] 3 VFs
[13:34:19] [PASSED] 4 VFs
[13:34:19] [PASSED] 5 VFs
[13:34:19] [PASSED] 6 VFs
[13:34:19] [PASSED] 7 VFs
[13:34:19] [PASSED] 8 VFs
[13:34:19] [PASSED] 9 VFs
[13:34:19] [PASSED] 10 VFs
[13:34:19] [PASSED] 11 VFs
[13:34:19] [PASSED] 12 VFs
[13:34:19] [PASSED] 13 VFs
[13:34:19] [PASSED] 14 VFs
[13:34:19] [PASSED] 15 VFs
[13:34:19] [PASSED] 16 VFs
[13:34:19] [PASSED] 17 VFs
[13:34:19] [PASSED] 18 VFs
[13:34:19] [PASSED] 19 VFs
[13:34:19] [PASSED] 20 VFs
[13:34:19] [PASSED] 21 VFs
[13:34:19] [PASSED] 22 VFs
[13:34:19] [PASSED] 23 VFs
[13:34:19] [PASSED] 24 VFs
[13:34:19] [PASSED] 25 VFs
[13:34:19] [PASSED] 26 VFs
[13:34:19] [PASSED] 27 VFs
[13:34:19] [PASSED] 28 VFs
[13:34:19] [PASSED] 29 VFs
[13:34:19] [PASSED] 30 VFs
[13:34:19] [PASSED] 31 VFs
[13:34:19] [PASSED] 32 VFs
[13:34:19] [PASSED] 33 VFs
[13:34:19] [PASSED] 34 VFs
[13:34:19] [PASSED] 35 VFs
[13:34:19] [PASSED] 36 VFs
[13:34:19] [PASSED] 37 VFs
[13:34:19] [PASSED] 38 VFs
[13:34:19] [PASSED] 39 VFs
[13:34:19] [PASSED] 40 VFs
[13:34:19] [PASSED] 41 VFs
[13:34:19] [PASSED] 42 VFs
[13:34:19] [PASSED] 43 VFs
[13:34:19] [PASSED] 44 VFs
[13:34:19] [PASSED] 45 VFs
[13:34:19] [PASSED] 46 VFs
[13:34:19] [PASSED] 47 VFs
[13:34:19] [PASSED] 48 VFs
[13:34:19] [PASSED] 49 VFs
[13:34:19] [PASSED] 50 VFs
[13:34:19] [PASSED] 51 VFs
[13:34:19] [PASSED] 52 VFs
[13:34:19] [PASSED] 53 VFs
[13:34:19] [PASSED] 54 VFs
[13:34:19] [PASSED] 55 VFs
[13:34:19] [PASSED] 56 VFs
[13:34:19] [PASSED] 57 VFs
[13:34:19] [PASSED] 58 VFs
[13:34:19] [PASSED] 59 VFs
[13:34:19] [PASSED] 60 VFs
[13:34:19] [PASSED] 61 VFs
[13:34:19] [PASSED] 62 VFs
[13:34:19] [PASSED] 63 VFs
[13:34:19] ================= [PASSED] fair_doorbells ==================
[13:34:19] ======================== fair_ggtt  ========================
[13:34:19] [PASSED] 1 VF
[13:34:19] [PASSED] 2 VFs
[13:34:19] [PASSED] 3 VFs
[13:34:19] [PASSED] 4 VFs
[13:34:19] [PASSED] 5 VFs
[13:34:19] [PASSED] 6 VFs
[13:34:19] [PASSED] 7 VFs
[13:34:19] [PASSED] 8 VFs
[13:34:19] [PASSED] 9 VFs
[13:34:19] [PASSED] 10 VFs
[13:34:19] [PASSED] 11 VFs
[13:34:19] [PASSED] 12 VFs
[13:34:19] [PASSED] 13 VFs
[13:34:19] [PASSED] 14 VFs
[13:34:19] [PASSED] 15 VFs
[13:34:19] [PASSED] 16 VFs
[13:34:19] [PASSED] 17 VFs
[13:34:19] [PASSED] 18 VFs
[13:34:19] [PASSED] 19 VFs
[13:34:19] [PASSED] 20 VFs
[13:34:19] [PASSED] 21 VFs
[13:34:19] [PASSED] 22 VFs
[13:34:19] [PASSED] 23 VFs
[13:34:19] [PASSED] 24 VFs
[13:34:19] [PASSED] 25 VFs
[13:34:19] [PASSED] 26 VFs
[13:34:19] [PASSED] 27 VFs
[13:34:19] [PASSED] 28 VFs
[13:34:19] [PASSED] 29 VFs
[13:34:19] [PASSED] 30 VFs
[13:34:19] [PASSED] 31 VFs
[13:34:19] [PASSED] 32 VFs
[13:34:19] [PASSED] 33 VFs
[13:34:19] [PASSED] 34 VFs
[13:34:19] [PASSED] 35 VFs
[13:34:19] [PASSED] 36 VFs
[13:34:19] [PASSED] 37 VFs
[13:34:19] [PASSED] 38 VFs
[13:34:19] [PASSED] 39 VFs
[13:34:19] [PASSED] 40 VFs
[13:34:19] [PASSED] 41 VFs
[13:34:19] [PASSED] 42 VFs
[13:34:19] [PASSED] 43 VFs
[13:34:19] [PASSED] 44 VFs
[13:34:19] [PASSED] 45 VFs
[13:34:19] [PASSED] 46 VFs
[13:34:19] [PASSED] 47 VFs
[13:34:19] [PASSED] 48 VFs
[13:34:19] [PASSED] 49 VFs
[13:34:19] [PASSED] 50 VFs
[13:34:19] [PASSED] 51 VFs
[13:34:19] [PASSED] 52 VFs
[13:34:19] [PASSED] 53 VFs
[13:34:19] [PASSED] 54 VFs
[13:34:19] [PASSED] 55 VFs
[13:34:19] [PASSED] 56 VFs
[13:34:19] [PASSED] 57 VFs
[13:34:19] [PASSED] 58 VFs
[13:34:19] [PASSED] 59 VFs
[13:34:19] [PASSED] 60 VFs
[13:34:19] [PASSED] 61 VFs
[13:34:19] [PASSED] 62 VFs
[13:34:19] [PASSED] 63 VFs
[13:34:19] ==================== [PASSED] fair_ggtt ====================
[13:34:19] ======================== fair_vram  ========================
[13:34:19] [PASSED] 1 VF
[13:34:19] [PASSED] 2 VFs
[13:34:19] [PASSED] 3 VFs
[13:34:19] [PASSED] 4 VFs
[13:34:19] [PASSED] 5 VFs
[13:34:19] [PASSED] 6 VFs
[13:34:19] [PASSED] 7 VFs
[13:34:19] [PASSED] 8 VFs
[13:34:19] [PASSED] 9 VFs
[13:34:19] [PASSED] 10 VFs
[13:34:19] [PASSED] 11 VFs
[13:34:19] [PASSED] 12 VFs
[13:34:19] [PASSED] 13 VFs
[13:34:19] [PASSED] 14 VFs
[13:34:19] [PASSED] 15 VFs
[13:34:19] [PASSED] 16 VFs
[13:34:19] [PASSED] 17 VFs
[13:34:19] [PASSED] 18 VFs
[13:34:19] [PASSED] 19 VFs
[13:34:19] [PASSED] 20 VFs
[13:34:19] [PASSED] 21 VFs
[13:34:19] [PASSED] 22 VFs
[13:34:19] [PASSED] 23 VFs
[13:34:19] [PASSED] 24 VFs
[13:34:19] [PASSED] 25 VFs
[13:34:19] [PASSED] 26 VFs
[13:34:19] [PASSED] 27 VFs
[13:34:19] [PASSED] 28 VFs
[13:34:19] [PASSED] 29 VFs
[13:34:19] [PASSED] 30 VFs
[13:34:19] [PASSED] 31 VFs
[13:34:19] [PASSED] 32 VFs
[13:34:19] [PASSED] 33 VFs
[13:34:19] [PASSED] 34 VFs
[13:34:19] [PASSED] 35 VFs
[13:34:19] [PASSED] 36 VFs
[13:34:19] [PASSED] 37 VFs
[13:34:19] [PASSED] 38 VFs
[13:34:19] [PASSED] 39 VFs
[13:34:19] [PASSED] 40 VFs
[13:34:19] [PASSED] 41 VFs
[13:34:19] [PASSED] 42 VFs
[13:34:19] [PASSED] 43 VFs
[13:34:19] [PASSED] 44 VFs
[13:34:19] [PASSED] 45 VFs
[13:34:19] [PASSED] 46 VFs
[13:34:19] [PASSED] 47 VFs
[13:34:19] [PASSED] 48 VFs
[13:34:19] [PASSED] 49 VFs
[13:34:19] [PASSED] 50 VFs
[13:34:19] [PASSED] 51 VFs
[13:34:19] [PASSED] 52 VFs
[13:34:19] [PASSED] 53 VFs
[13:34:19] [PASSED] 54 VFs
[13:34:19] [PASSED] 55 VFs
[13:34:19] [PASSED] 56 VFs
[13:34:19] [PASSED] 57 VFs
[13:34:19] [PASSED] 58 VFs
[13:34:19] [PASSED] 59 VFs
[13:34:19] [PASSED] 60 VFs
[13:34:19] [PASSED] 61 VFs
[13:34:19] [PASSED] 62 VFs
[13:34:19] [PASSED] 63 VFs
[13:34:19] ==================== [PASSED] fair_vram ====================
[13:34:19] ================== [PASSED] pf_gt_config ===================
[13:34:19] ===================== lmtt (1 subtest) =====================
[13:34:19] ======================== test_ops  =========================
[13:34:19] [PASSED] 2-level
[13:34:19] [PASSED] multi-level
[13:34:19] ==================== [PASSED] test_ops =====================
[13:34:19] ====================== [PASSED] lmtt =======================
[13:34:19] ================= pf_service (11 subtests) =================
[13:34:19] [PASSED] pf_negotiate_any
[13:34:19] [PASSED] pf_negotiate_base_match
[13:34:19] [PASSED] pf_negotiate_base_newer
[13:34:19] [PASSED] pf_negotiate_base_next
[13:34:19] [SKIPPED] pf_negotiate_base_older
[13:34:19] [PASSED] pf_negotiate_base_prev
[13:34:19] [PASSED] pf_negotiate_latest_match
[13:34:19] [PASSED] pf_negotiate_latest_newer
[13:34:19] [PASSED] pf_negotiate_latest_next
[13:34:19] [SKIPPED] pf_negotiate_latest_older
[13:34:19] [SKIPPED] pf_negotiate_latest_prev
[13:34:19] =================== [PASSED] pf_service ====================
[13:34:19] ================= xe_guc_g2g (2 subtests) ==================
[13:34:19] ============== xe_live_guc_g2g_kunit_default  ==============
[13:34:19] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[13:34:19] ============== xe_live_guc_g2g_kunit_allmem  ===============
[13:34:19] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[13:34:19] =================== [SKIPPED] xe_guc_g2g ===================
[13:34:19] =================== xe_mocs (2 subtests) ===================
[13:34:19] ================ xe_live_mocs_kernel_kunit  ================
[13:34:19] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:34:19] ================ xe_live_mocs_reset_kunit  =================
[13:34:19] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:34:19] ==================== [SKIPPED] xe_mocs =====================
[13:34:19] ================= xe_migrate (2 subtests) ==================
[13:34:19] ================= xe_migrate_sanity_kunit  =================
[13:34:19] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:34:19] ================== xe_validate_ccs_kunit  ==================
[13:34:19] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:34:19] =================== [SKIPPED] xe_migrate ===================
[13:34:19] ================== xe_dma_buf (1 subtest) ==================
[13:34:19] ==================== xe_dma_buf_kunit  =====================
[13:34:19] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:34:19] =================== [SKIPPED] xe_dma_buf ===================
[13:34:19] ================= xe_bo_shrink (1 subtest) =================
[13:34:19] =================== xe_bo_shrink_kunit  ====================
[13:34:19] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:34:19] ================== [SKIPPED] xe_bo_shrink ==================
[13:34:19] ==================== xe_bo (2 subtests) ====================
[13:34:19] ================== xe_ccs_migrate_kunit  ===================
[13:34:19] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:34:19] ==================== xe_bo_evict_kunit  ====================
[13:34:19] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:34:19] ===================== [SKIPPED] xe_bo ======================
[13:34:19] ==================== args (13 subtests) ====================
[13:34:19] [PASSED] count_args_test
[13:34:19] [PASSED] call_args_example
[13:34:19] [PASSED] call_args_test
[13:34:19] [PASSED] drop_first_arg_example
[13:34:19] [PASSED] drop_first_arg_test
[13:34:19] [PASSED] first_arg_example
[13:34:19] [PASSED] first_arg_test
[13:34:19] [PASSED] last_arg_example
[13:34:19] [PASSED] last_arg_test
[13:34:19] [PASSED] pick_arg_example
[13:34:19] [PASSED] if_args_example
[13:34:19] [PASSED] if_args_test
[13:34:19] [PASSED] sep_comma_example
[13:34:19] ====================== [PASSED] args =======================
[13:34:19] =================== xe_pci (3 subtests) ====================
[13:34:19] ==================== check_graphics_ip  ====================
[13:34:19] [PASSED] 12.00 Xe_LP
[13:34:19] [PASSED] 12.10 Xe_LP+
[13:34:19] [PASSED] 12.55 Xe_HPG
[13:34:19] [PASSED] 12.60 Xe_HPC
[13:34:19] [PASSED] 12.70 Xe_LPG
[13:34:19] [PASSED] 12.71 Xe_LPG
[13:34:19] [PASSED] 12.74 Xe_LPG+
[13:34:19] [PASSED] 20.01 Xe2_HPG
[13:34:19] [PASSED] 20.02 Xe2_HPG
[13:34:19] [PASSED] 20.04 Xe2_LPG
[13:34:19] [PASSED] 30.00 Xe3_LPG
[13:34:19] [PASSED] 30.01 Xe3_LPG
[13:34:19] [PASSED] 30.03 Xe3_LPG
[13:34:19] [PASSED] 30.04 Xe3_LPG
[13:34:19] [PASSED] 30.05 Xe3_LPG
[13:34:19] [PASSED] 35.10 Xe3p_LPG
[13:34:19] [PASSED] 35.11 Xe3p_XPC
[13:34:19] ================ [PASSED] check_graphics_ip ================
[13:34:19] ===================== check_media_ip  ======================
[13:34:19] [PASSED] 12.00 Xe_M
[13:34:19] [PASSED] 12.55 Xe_HPM
[13:34:19] [PASSED] 13.00 Xe_LPM+
[13:34:19] [PASSED] 13.01 Xe2_HPM
[13:34:19] [PASSED] 20.00 Xe2_LPM
[13:34:19] [PASSED] 30.00 Xe3_LPM
[13:34:19] [PASSED] 30.02 Xe3_LPM
[13:34:19] [PASSED] 35.00 Xe3p_LPM
[13:34:19] [PASSED] 35.03 Xe3p_HPM
[13:34:19] ================= [PASSED] check_media_ip ==================
[13:34:19] =================== check_platform_desc  ===================
[13:34:19] [PASSED] 0x9A60 (TIGERLAKE)
[13:34:19] [PASSED] 0x9A68 (TIGERLAKE)
[13:34:19] [PASSED] 0x9A70 (TIGERLAKE)
[13:34:19] [PASSED] 0x9A40 (TIGERLAKE)
[13:34:19] [PASSED] 0x9A49 (TIGERLAKE)
[13:34:19] [PASSED] 0x9A59 (TIGERLAKE)
[13:34:19] [PASSED] 0x9A78 (TIGERLAKE)
[13:34:19] [PASSED] 0x9AC0 (TIGERLAKE)
[13:34:19] [PASSED] 0x9AC9 (TIGERLAKE)
[13:34:19] [PASSED] 0x9AD9 (TIGERLAKE)
[13:34:19] [PASSED] 0x9AF8 (TIGERLAKE)
[13:34:19] [PASSED] 0x4C80 (ROCKETLAKE)
[13:34:19] [PASSED] 0x4C8A (ROCKETLAKE)
[13:34:19] [PASSED] 0x4C8B (ROCKETLAKE)
[13:34:19] [PASSED] 0x4C8C (ROCKETLAKE)
[13:34:19] [PASSED] 0x4C90 (ROCKETLAKE)
[13:34:19] [PASSED] 0x4C9A (ROCKETLAKE)
[13:34:19] [PASSED] 0x4680 (ALDERLAKE_S)
[13:34:19] [PASSED] 0x4682 (ALDERLAKE_S)
[13:34:19] [PASSED] 0x4688 (ALDERLAKE_S)
[13:34:19] [PASSED] 0x468A (ALDERLAKE_S)
[13:34:19] [PASSED] 0x468B (ALDERLAKE_S)
[13:34:19] [PASSED] 0x4690 (ALDERLAKE_S)
[13:34:19] [PASSED] 0x4692 (ALDERLAKE_S)
[13:34:19] [PASSED] 0x4693 (ALDERLAKE_S)
[13:34:19] [PASSED] 0x46A0 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46A1 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46A2 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46A3 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46A6 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46A8 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46AA (ALDERLAKE_P)
[13:34:19] [PASSED] 0x462A (ALDERLAKE_P)
[13:34:19] [PASSED] 0x4626 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x4628 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46B0 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46B1 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46B2 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46B3 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46C0 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46C1 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46C2 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46C3 (ALDERLAKE_P)
[13:34:19] [PASSED] 0x46D0 (ALDERLAKE_N)
[13:34:19] [PASSED] 0x46D1 (ALDERLAKE_N)
[13:34:19] [PASSED] 0x46D2 (ALDERLAKE_N)
[13:34:19] [PASSED] 0x46D3 (ALDERLAKE_N)
[13:34:19] [PASSED] 0x46D4 (ALDERLAKE_N)
[13:34:19] [PASSED] 0xA721 (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA7A1 (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA7A9 (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA7AC (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA7AD (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA720 (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA7A0 (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA7A8 (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA7AA (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA7AB (ALDERLAKE_P)
[13:34:19] [PASSED] 0xA780 (ALDERLAKE_S)
[13:34:19] [PASSED] 0xA781 (ALDERLAKE_S)
[13:34:19] [PASSED] 0xA782 (ALDERLAKE_S)
[13:34:19] [PASSED] 0xA783 (ALDERLAKE_S)
[13:34:19] [PASSED] 0xA788 (ALDERLAKE_S)
[13:34:19] [PASSED] 0xA789 (ALDERLAKE_S)
[13:34:19] [PASSED] 0xA78A (ALDERLAKE_S)
[13:34:19] [PASSED] 0xA78B (ALDERLAKE_S)
[13:34:19] [PASSED] 0x4905 (DG1)
[13:34:19] [PASSED] 0x4906 (DG1)
[13:34:19] [PASSED] 0x4907 (DG1)
[13:34:19] [PASSED] 0x4908 (DG1)
[13:34:19] [PASSED] 0x4909 (DG1)
[13:34:19] [PASSED] 0x56C0 (DG2)
[13:34:19] [PASSED] 0x56C2 (DG2)
[13:34:19] [PASSED] 0x56C1 (DG2)
[13:34:19] [PASSED] 0x7D51 (METEORLAKE)
[13:34:19] [PASSED] 0x7DD1 (METEORLAKE)
[13:34:19] [PASSED] 0x7D41 (METEORLAKE)
[13:34:19] [PASSED] 0x7D67 (METEORLAKE)
[13:34:19] [PASSED] 0xB640 (METEORLAKE)
[13:34:19] [PASSED] 0x56A0 (DG2)
[13:34:19] [PASSED] 0x56A1 (DG2)
[13:34:19] [PASSED] 0x56A2 (DG2)
[13:34:19] [PASSED] 0x56BE (DG2)
[13:34:19] [PASSED] 0x56BF (DG2)
[13:34:19] [PASSED] 0x5690 (DG2)
[13:34:19] [PASSED] 0x5691 (DG2)
[13:34:19] [PASSED] 0x5692 (DG2)
[13:34:19] [PASSED] 0x56A5 (DG2)
[13:34:19] [PASSED] 0x56A6 (DG2)
[13:34:19] [PASSED] 0x56B0 (DG2)
[13:34:19] [PASSED] 0x56B1 (DG2)
[13:34:19] [PASSED] 0x56BA (DG2)
[13:34:19] [PASSED] 0x56BB (DG2)
[13:34:19] [PASSED] 0x56BC (DG2)
[13:34:19] [PASSED] 0x56BD (DG2)
[13:34:19] [PASSED] 0x5693 (DG2)
[13:34:19] [PASSED] 0x5694 (DG2)
[13:34:19] [PASSED] 0x5695 (DG2)
[13:34:19] [PASSED] 0x56A3 (DG2)
[13:34:19] [PASSED] 0x56A4 (DG2)
[13:34:19] [PASSED] 0x56B2 (DG2)
[13:34:19] [PASSED] 0x56B3 (DG2)
[13:34:19] [PASSED] 0x5696 (DG2)
[13:34:19] [PASSED] 0x5697 (DG2)
[13:34:19] [PASSED] 0xB69 (PVC)
[13:34:19] [PASSED] 0xB6E (PVC)
[13:34:19] [PASSED] 0xBD4 (PVC)
[13:34:19] [PASSED] 0xBD5 (PVC)
[13:34:19] [PASSED] 0xBD6 (PVC)
[13:34:19] [PASSED] 0xBD7 (PVC)
[13:34:19] [PASSED] 0xBD8 (PVC)
[13:34:19] [PASSED] 0xBD9 (PVC)
[13:34:19] [PASSED] 0xBDA (PVC)
[13:34:19] [PASSED] 0xBDB (PVC)
[13:34:19] [PASSED] 0xBE0 (PVC)
[13:34:19] [PASSED] 0xBE1 (PVC)
[13:34:19] [PASSED] 0xBE5 (PVC)
[13:34:19] [PASSED] 0x7D40 (METEORLAKE)
[13:34:19] [PASSED] 0x7D45 (METEORLAKE)
[13:34:19] [PASSED] 0x7D55 (METEORLAKE)
[13:34:19] [PASSED] 0x7D60 (METEORLAKE)
[13:34:19] [PASSED] 0x7DD5 (METEORLAKE)
[13:34:19] [PASSED] 0x6420 (LUNARLAKE)
[13:34:19] [PASSED] 0x64A0 (LUNARLAKE)
[13:34:19] [PASSED] 0x64B0 (LUNARLAKE)
[13:34:19] [PASSED] 0xE202 (BATTLEMAGE)
[13:34:19] [PASSED] 0xE209 (BATTLEMAGE)
[13:34:19] [PASSED] 0xE20B (BATTLEMAGE)
[13:34:19] [PASSED] 0xE20C (BATTLEMAGE)
[13:34:19] [PASSED] 0xE20D (BATTLEMAGE)
[13:34:19] [PASSED] 0xE210 (BATTLEMAGE)
[13:34:19] [PASSED] 0xE211 (BATTLEMAGE)
[13:34:19] [PASSED] 0xE212 (BATTLEMAGE)
[13:34:19] [PASSED] 0xE216 (BATTLEMAGE)
[13:34:19] [PASSED] 0xE220 (BATTLEMAGE)
[13:34:19] [PASSED] 0xE221 (BATTLEMAGE)
[13:34:19] [PASSED] 0xE222 (BATTLEMAGE)
[13:34:19] [PASSED] 0xE223 (BATTLEMAGE)
[13:34:19] [PASSED] 0xB080 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB081 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB082 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB083 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB084 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB085 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB086 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB087 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB08F (PANTHERLAKE)
[13:34:19] [PASSED] 0xB090 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB0A0 (PANTHERLAKE)
[13:34:19] [PASSED] 0xB0B0 (PANTHERLAKE)
[13:34:19] [PASSED] 0xFD80 (PANTHERLAKE)
[13:34:19] [PASSED] 0xFD81 (PANTHERLAKE)
[13:34:19] [PASSED] 0xD740 (NOVALAKE_S)
[13:34:19] [PASSED] 0xD741 (NOVALAKE_S)
[13:34:19] [PASSED] 0xD742 (NOVALAKE_S)
[13:34:19] [PASSED] 0xD743 (NOVALAKE_S)
[13:34:19] [PASSED] 0xD744 (NOVALAKE_S)
[13:34:19] [PASSED] 0xD745 (NOVALAKE_S)
[13:34:19] [PASSED] 0x674C (CRESCENTISLAND)
[13:34:19] [PASSED] 0xD750 (NOVALAKE_P)
[13:34:19] [PASSED] 0xD751 (NOVALAKE_P)
[13:34:19] [PASSED] 0xD752 (NOVALAKE_P)
[13:34:19] [PASSED] 0xD753 (NOVALAKE_P)
[13:34:19] [PASSED] 0xD754 (NOVALAKE_P)
[13:34:19] [PASSED] 0xD755 (NOVALAKE_P)
[13:34:19] [PASSED] 0xD756 (NOVALAKE_P)
[13:34:19] [PASSED] 0xD757 (NOVALAKE_P)
[13:34:19] [PASSED] 0xD75F (NOVALAKE_P)
[13:34:19] =============== [PASSED] check_platform_desc ===============
[13:34:19] ===================== [PASSED] xe_pci ======================
[13:34:19] =================== xe_rtp (2 subtests) ====================
[13:34:19] =============== xe_rtp_process_to_sr_tests  ================
[13:34:19] [PASSED] coalesce-same-reg
[13:34:19] [PASSED] no-match-no-add
[13:34:19] [PASSED] match-or
[13:34:19] [PASSED] match-or-xfail
[13:34:19] [PASSED] no-match-no-add-multiple-rules
[13:34:19] [PASSED] two-regs-two-entries
[13:34:19] [PASSED] clr-one-set-other
[13:34:19] [PASSED] set-field
[13:34:19] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[13:34:19] [PASSED] conflict-not-disjoint
[13:34:19] [PASSED] conflict-reg-type
[13:34:19] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:34:19] ================== xe_rtp_process_tests  ===================
[13:34:19] [PASSED] active1
[13:34:19] [PASSED] active2
[13:34:19] [PASSED] active-inactive
[13:34:19] [PASSED] inactive-active
[13:34:19] [PASSED] inactive-1st_or_active-inactive
[13:34:19] [PASSED] inactive-2nd_or_active-inactive
[13:34:19] [PASSED] inactive-last_or_active-inactive
[13:34:19] [PASSED] inactive-no_or_active-inactive
[13:34:19] ============== [PASSED] xe_rtp_process_tests ===============
[13:34:19] ===================== [PASSED] xe_rtp ======================
[13:34:19] ==================== xe_wa (1 subtest) =====================
[13:34:19] ======================== xe_wa_gt  =========================
[13:34:19] [PASSED] TIGERLAKE B0
[13:34:19] [PASSED] DG1 A0
[13:34:19] [PASSED] DG1 B0
[13:34:19] [PASSED] ALDERLAKE_S A0
[13:34:19] [PASSED] ALDERLAKE_S B0
[13:34:19] [PASSED] ALDERLAKE_S C0
[13:34:19] [PASSED] ALDERLAKE_S D0
[13:34:19] [PASSED] ALDERLAKE_P A0
[13:34:19] [PASSED] ALDERLAKE_P B0
[13:34:19] [PASSED] ALDERLAKE_P C0
[13:34:19] [PASSED] ALDERLAKE_S RPLS D0
[13:34:19] [PASSED] ALDERLAKE_P RPLU E0
[13:34:19] [PASSED] DG2 G10 C0
[13:34:19] [PASSED] DG2 G11 B1
[13:34:19] [PASSED] DG2 G12 A1
[13:34:19] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:34:19] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:34:19] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[13:34:19] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[13:34:19] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[13:34:19] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[13:34:19] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[13:34:19] ==================== [PASSED] xe_wa_gt =====================
[13:34:19] ====================== [PASSED] xe_wa ======================
[13:34:19] ============================================================
[13:34:19] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[13:34:19] Elapsed time: 36.561s total, 4.248s configuring, 31.696s building, 0.590s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:34:19] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:34:21] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:34:46] Starting KUnit Kernel (1/1)...
[13:34:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:34:46] ============ drm_test_pick_cmdline (2 subtests) ============
[13:34:46] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[13:34:46] =============== drm_test_pick_cmdline_named  ===============
[13:34:46] [PASSED] NTSC
[13:34:46] [PASSED] NTSC-J
[13:34:46] [PASSED] PAL
[13:34:46] [PASSED] PAL-M
[13:34:46] =========== [PASSED] drm_test_pick_cmdline_named ===========
[13:34:46] ============== [PASSED] drm_test_pick_cmdline ==============
[13:34:46] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:34:46] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:34:46] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:34:46] =========== drm_validate_clone_mode (2 subtests) ===========
[13:34:46] ============== drm_test_check_in_clone_mode  ===============
[13:34:46] [PASSED] in_clone_mode
[13:34:46] [PASSED] not_in_clone_mode
[13:34:46] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:34:46] =============== drm_test_check_valid_clones  ===============
[13:34:46] [PASSED] not_in_clone_mode
[13:34:46] [PASSED] valid_clone
[13:34:46] [PASSED] invalid_clone
[13:34:46] =========== [PASSED] drm_test_check_valid_clones ===========
[13:34:46] ============= [PASSED] drm_validate_clone_mode =============
[13:34:46] ============= drm_validate_modeset (1 subtest) =============
[13:34:46] [PASSED] drm_test_check_connector_changed_modeset
[13:34:46] ============== [PASSED] drm_validate_modeset ===============
[13:34:46] ====== drm_test_bridge_get_current_state (2 subtests) ======
[13:34:46] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:34:46] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[13:34:46] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:34:46] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:34:46] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:34:46] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:34:46] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[13:34:46] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:34:46] ============== drm_bridge_alloc (2 subtests) ===============
[13:34:46] [PASSED] drm_test_drm_bridge_alloc_basic
[13:34:46] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:34:46] ================ [PASSED] drm_bridge_alloc =================
[13:34:46] ============= drm_cmdline_parser (40 subtests) =============
[13:34:46] [PASSED] drm_test_cmdline_force_d_only
[13:34:46] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:34:46] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:34:46] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:34:46] [PASSED] drm_test_cmdline_force_e_only
[13:34:46] [PASSED] drm_test_cmdline_res
[13:34:46] [PASSED] drm_test_cmdline_res_vesa
[13:34:46] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:34:46] [PASSED] drm_test_cmdline_res_rblank
[13:34:46] [PASSED] drm_test_cmdline_res_bpp
[13:34:46] [PASSED] drm_test_cmdline_res_refresh
[13:34:46] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:34:46] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:34:46] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:34:46] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:34:46] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:34:46] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:34:46] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:34:46] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:34:46] [PASSED] drm_test_cmdline_res_margins_force_on
[13:34:46] [PASSED] drm_test_cmdline_res_vesa_margins
[13:34:46] [PASSED] drm_test_cmdline_name
[13:34:46] [PASSED] drm_test_cmdline_name_bpp
[13:34:46] [PASSED] drm_test_cmdline_name_option
[13:34:46] [PASSED] drm_test_cmdline_name_bpp_option
[13:34:46] [PASSED] drm_test_cmdline_rotate_0
[13:34:46] [PASSED] drm_test_cmdline_rotate_90
[13:34:46] [PASSED] drm_test_cmdline_rotate_180
[13:34:46] [PASSED] drm_test_cmdline_rotate_270
[13:34:46] [PASSED] drm_test_cmdline_hmirror
[13:34:46] [PASSED] drm_test_cmdline_vmirror
[13:34:46] [PASSED] drm_test_cmdline_margin_options
[13:34:46] [PASSED] drm_test_cmdline_multiple_options
[13:34:46] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:34:46] [PASSED] drm_test_cmdline_extra_and_option
[13:34:46] [PASSED] drm_test_cmdline_freestanding_options
[13:34:46] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:34:46] [PASSED] drm_test_cmdline_panel_orientation
[13:34:46] ================ drm_test_cmdline_invalid  =================
[13:34:46] [PASSED] margin_only
[13:34:46] [PASSED] interlace_only
[13:34:46] [PASSED] res_missing_x
[13:34:46] [PASSED] res_missing_y
[13:34:46] [PASSED] res_bad_y
[13:34:46] [PASSED] res_missing_y_bpp
[13:34:46] [PASSED] res_bad_bpp
[13:34:46] [PASSED] res_bad_refresh
[13:34:46] [PASSED] res_bpp_refresh_force_on_off
[13:34:46] [PASSED] res_invalid_mode
[13:34:46] [PASSED] res_bpp_wrong_place_mode
[13:34:46] [PASSED] name_bpp_refresh
[13:34:46] [PASSED] name_refresh
[13:34:46] [PASSED] name_refresh_wrong_mode
[13:34:46] [PASSED] name_refresh_invalid_mode
[13:34:46] [PASSED] rotate_multiple
[13:34:46] [PASSED] rotate_invalid_val
[13:34:46] [PASSED] rotate_truncated
[13:34:46] [PASSED] invalid_option
[13:34:46] [PASSED] invalid_tv_option
[13:34:46] [PASSED] truncated_tv_option
[13:34:46] ============ [PASSED] drm_test_cmdline_invalid =============
[13:34:46] =============== drm_test_cmdline_tv_options  ===============
[13:34:46] [PASSED] NTSC
[13:34:46] [PASSED] NTSC_443
[13:34:46] [PASSED] NTSC_J
[13:34:46] [PASSED] PAL
[13:34:46] [PASSED] PAL_M
[13:34:46] [PASSED] PAL_N
[13:34:46] [PASSED] SECAM
[13:34:46] [PASSED] MONO_525
[13:34:46] [PASSED] MONO_625
[13:34:46] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:34:46] =============== [PASSED] drm_cmdline_parser ================
[13:34:46] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:34:46] [PASSED] drm_test_connector_hdmi_init_valid
[13:34:46] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:34:46] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:34:46] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:34:46] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:34:46] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:34:46] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:34:46] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:34:46] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[13:34:46] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:34:46] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:34:46] [PASSED] supported_formats=0x5 yuv420_allowed=1
[13:34:46] [PASSED] supported_formats=0x5 yuv420_allowed=0
[13:34:46] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:34:46] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:34:46] [PASSED] drm_test_connector_hdmi_init_null_product
[13:34:46] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:34:46] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:34:46] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:34:46] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:34:46] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:34:46] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:34:46] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:34:46] ========= drm_test_connector_hdmi_init_type_valid  =========
[13:34:46] [PASSED] HDMI-A
[13:34:46] [PASSED] HDMI-B
[13:34:46] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:34:46] ======== drm_test_connector_hdmi_init_type_invalid  ========
[13:34:46] [PASSED] Unknown
[13:34:46] [PASSED] VGA
[13:34:46] [PASSED] DVI-I
[13:34:46] [PASSED] DVI-D
[13:34:46] [PASSED] DVI-A
[13:34:46] [PASSED] Composite
[13:34:46] [PASSED] SVIDEO
[13:34:46] [PASSED] LVDS
[13:34:46] [PASSED] Component
[13:34:46] [PASSED] DIN
[13:34:46] [PASSED] DP
[13:34:46] [PASSED] TV
[13:34:46] [PASSED] eDP
[13:34:46] [PASSED] Virtual
[13:34:46] [PASSED] DSI
[13:34:46] [PASSED] DPI
[13:34:46] [PASSED] Writeback
[13:34:46] [PASSED] SPI
[13:34:46] [PASSED] USB
[13:34:46] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:34:46] ============ [PASSED] drmm_connector_hdmi_init =============
[13:34:46] ============= drmm_connector_init (3 subtests) =============
[13:34:46] [PASSED] drm_test_drmm_connector_init
[13:34:46] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:34:46] ========= drm_test_drmm_connector_init_type_valid  =========
[13:34:46] [PASSED] Unknown
[13:34:46] [PASSED] VGA
[13:34:46] [PASSED] DVI-I
[13:34:46] [PASSED] DVI-D
[13:34:46] [PASSED] DVI-A
[13:34:46] [PASSED] Composite
[13:34:46] [PASSED] SVIDEO
[13:34:46] [PASSED] LVDS
[13:34:46] [PASSED] Component
[13:34:46] [PASSED] DIN
[13:34:46] [PASSED] DP
[13:34:46] [PASSED] HDMI-A
[13:34:46] [PASSED] HDMI-B
[13:34:46] [PASSED] TV
[13:34:46] [PASSED] eDP
[13:34:46] [PASSED] Virtual
[13:34:46] [PASSED] DSI
[13:34:46] [PASSED] DPI
[13:34:46] [PASSED] Writeback
[13:34:46] [PASSED] SPI
[13:34:46] [PASSED] USB
[13:34:46] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:34:46] =============== [PASSED] drmm_connector_init ===============
[13:34:46] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_init
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:34:46] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[13:34:46] [PASSED] Unknown
[13:34:46] [PASSED] VGA
[13:34:46] [PASSED] DVI-I
[13:34:46] [PASSED] DVI-D
[13:34:46] [PASSED] DVI-A
[13:34:46] [PASSED] Composite
[13:34:46] [PASSED] SVIDEO
[13:34:46] [PASSED] LVDS
[13:34:46] [PASSED] Component
[13:34:46] [PASSED] DIN
[13:34:46] [PASSED] DP
[13:34:46] [PASSED] HDMI-A
[13:34:46] [PASSED] HDMI-B
[13:34:46] [PASSED] TV
[13:34:46] [PASSED] eDP
[13:34:46] [PASSED] Virtual
[13:34:46] [PASSED] DSI
[13:34:46] [PASSED] DPI
[13:34:46] [PASSED] Writeback
[13:34:46] [PASSED] SPI
[13:34:46] [PASSED] USB
[13:34:46] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:34:46] ======== drm_test_drm_connector_dynamic_init_name  =========
[13:34:46] [PASSED] Unknown
[13:34:46] [PASSED] VGA
[13:34:46] [PASSED] DVI-I
[13:34:46] [PASSED] DVI-D
[13:34:46] [PASSED] DVI-A
[13:34:46] [PASSED] Composite
[13:34:46] [PASSED] SVIDEO
[13:34:46] [PASSED] LVDS
[13:34:46] [PASSED] Component
[13:34:46] [PASSED] DIN
[13:34:46] [PASSED] DP
[13:34:46] [PASSED] HDMI-A
[13:34:46] [PASSED] HDMI-B
[13:34:46] [PASSED] TV
[13:34:46] [PASSED] eDP
[13:34:46] [PASSED] Virtual
[13:34:46] [PASSED] DSI
[13:34:46] [PASSED] DPI
[13:34:46] [PASSED] Writeback
[13:34:46] [PASSED] SPI
[13:34:46] [PASSED] USB
[13:34:46] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:34:46] =========== [PASSED] drm_connector_dynamic_init ============
[13:34:46] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:34:46] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:34:46] ======= drm_connector_dynamic_register (7 subtests) ========
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:34:46] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:34:46] ========= [PASSED] drm_connector_dynamic_register ==========
[13:34:46] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:34:46] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:34:46] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:34:46] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:34:46] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:34:46] ========== drm_test_get_tv_mode_from_name_valid  ===========
[13:34:46] [PASSED] NTSC
[13:34:46] [PASSED] NTSC-443
[13:34:46] [PASSED] NTSC-J
[13:34:46] [PASSED] PAL
[13:34:46] [PASSED] PAL-M
[13:34:46] [PASSED] PAL-N
[13:34:46] [PASSED] SECAM
[13:34:46] [PASSED] Mono
[13:34:46] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:34:46] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:34:46] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:34:46] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:34:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:34:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:34:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:34:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:34:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:34:46] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:34:46] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[13:34:46] [PASSED] VIC 96
[13:34:46] [PASSED] VIC 97
[13:34:46] [PASSED] VIC 101
[13:34:46] [PASSED] VIC 102
[13:34:46] [PASSED] VIC 106
[13:34:46] [PASSED] VIC 107
[13:34:46] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:34:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:34:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:34:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:34:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:34:46] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:34:46] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:34:46] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:34:46] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[13:34:46] [PASSED] Automatic
[13:34:46] [PASSED] Full
[13:34:46] [PASSED] Limited 16:235
[13:34:46] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:34:46] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:34:46] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:34:46] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:34:46] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[13:34:46] [PASSED] RGB
[13:34:46] [PASSED] YUV 4:2:0
[13:34:46] [PASSED] YUV 4:2:2
[13:34:46] [PASSED] YUV 4:4:4
[13:34:46] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:34:46] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:34:46] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:34:46] ============= drm_damage_helper (21 subtests) ==============
[13:34:46] [PASSED] drm_test_damage_iter_no_damage
[13:34:46] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:34:46] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:34:46] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:34:46] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:34:46] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:34:46] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:34:46] [PASSED] drm_test_damage_iter_simple_damage
[13:34:46] [PASSED] drm_test_damage_iter_single_damage
[13:34:46] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:34:46] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:34:46] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:34:46] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:34:46] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:34:46] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:34:46] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:34:46] [PASSED] drm_test_damage_iter_damage
[13:34:46] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:34:46] [PASSED] drm_test_damage_iter_damage_one_outside
[13:34:46] [PASSED] drm_test_damage_iter_damage_src_moved
[13:34:46] [PASSED] drm_test_damage_iter_damage_not_visible
[13:34:46] ================ [PASSED] drm_damage_helper ================
[13:34:46] ============== drm_dp_mst_helper (3 subtests) ==============
[13:34:46] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[13:34:46] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:34:46] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:34:46] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:34:46] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:34:46] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:34:46] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:34:46] ============== drm_test_dp_mst_calc_pbn_div  ===============
[13:34:46] [PASSED] Link rate 2000000 lane count 4
[13:34:46] [PASSED] Link rate 2000000 lane count 2
[13:34:46] [PASSED] Link rate 2000000 lane count 1
[13:34:46] [PASSED] Link rate 1350000 lane count 4
[13:34:46] [PASSED] Link rate 1350000 lane count 2
[13:34:46] [PASSED] Link rate 1350000 lane count 1
[13:34:46] [PASSED] Link rate 1000000 lane count 4
[13:34:46] [PASSED] Link rate 1000000 lane count 2
[13:34:46] [PASSED] Link rate 1000000 lane count 1
[13:34:46] [PASSED] Link rate 810000 lane count 4
[13:34:46] [PASSED] Link rate 810000 lane count 2
[13:34:46] [PASSED] Link rate 810000 lane count 1
[13:34:46] [PASSED] Link rate 540000 lane count 4
[13:34:46] [PASSED] Link rate 540000 lane count 2
[13:34:46] [PASSED] Link rate 540000 lane count 1
[13:34:46] [PASSED] Link rate 270000 lane count 4
[13:34:46] [PASSED] Link rate 270000 lane count 2
[13:34:46] [PASSED] Link rate 270000 lane count 1
[13:34:46] [PASSED] Link rate 162000 lane count 4
[13:34:46] [PASSED] Link rate 162000 lane count 2
[13:34:46] [PASSED] Link rate 162000 lane count 1
[13:34:46] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:34:46] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[13:34:46] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:34:46] [PASSED] DP_POWER_UP_PHY with port number
[13:34:46] [PASSED] DP_POWER_DOWN_PHY with port number
[13:34:46] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:34:46] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:34:46] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:34:46] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:34:46] [PASSED] DP_QUERY_PAYLOAD with port number
[13:34:46] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:34:46] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:34:46] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:34:46] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:34:46] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:34:46] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:34:46] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:34:46] [PASSED] DP_REMOTE_I2C_READ with port number
[13:34:46] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:34:46] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:34:46] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:34:46] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:34:46] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:34:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:34:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:34:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:34:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:34:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:34:46] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:34:46] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:34:46] ================ [PASSED] drm_dp_mst_helper ================
[13:34:46] ================== drm_exec (7 subtests) ===================
[13:34:46] [PASSED] sanitycheck
[13:34:46] [PASSED] test_lock
[13:34:46] [PASSED] test_lock_unlock
[13:34:46] [PASSED] test_duplicates
[13:34:46] [PASSED] test_prepare
[13:34:46] [PASSED] test_prepare_array
[13:34:46] [PASSED] test_multiple_loops
[13:34:46] ==================== [PASSED] drm_exec =====================
[13:34:46] =========== drm_format_helper_test (17 subtests) ===========
[13:34:46] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:34:46] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:34:46] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:34:46] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:34:46] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:34:46] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:34:46] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:34:46] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:34:46] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:34:46] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:34:46] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:34:46] ============== drm_test_fb_xrgb8888_to_mono  ===============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:34:46] ==================== drm_test_fb_swab  =====================
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ================ [PASSED] drm_test_fb_swab =================
[13:34:46] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:34:46] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[13:34:46] [PASSED] single_pixel_source_buffer
[13:34:46] [PASSED] single_pixel_clip_rectangle
[13:34:46] [PASSED] well_known_colors
[13:34:46] [PASSED] destination_pitch
[13:34:46] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:34:46] ================= drm_test_fb_clip_offset  =================
[13:34:46] [PASSED] pass through
[13:34:46] [PASSED] horizontal offset
[13:34:46] [PASSED] vertical offset
[13:34:46] [PASSED] horizontal and vertical offset
[13:34:46] [PASSED] horizontal offset (custom pitch)
[13:34:46] [PASSED] vertical offset (custom pitch)
[13:34:46] [PASSED] horizontal and vertical offset (custom pitch)
[13:34:46] ============= [PASSED] drm_test_fb_clip_offset =============
[13:34:46] =================== drm_test_fb_memcpy  ====================
[13:34:46] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:34:46] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:34:46] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:34:46] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:34:46] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:34:46] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:34:46] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:34:46] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:34:46] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:34:46] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:34:46] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:34:46] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:34:46] =============== [PASSED] drm_test_fb_memcpy ================
[13:34:46] ============= [PASSED] drm_format_helper_test ==============
[13:34:46] ================= drm_format (18 subtests) =================
[13:34:46] [PASSED] drm_test_format_block_width_invalid
[13:34:46] [PASSED] drm_test_format_block_width_one_plane
[13:34:46] [PASSED] drm_test_format_block_width_two_plane
[13:34:46] [PASSED] drm_test_format_block_width_three_plane
[13:34:46] [PASSED] drm_test_format_block_width_tiled
[13:34:46] [PASSED] drm_test_format_block_height_invalid
[13:34:46] [PASSED] drm_test_format_block_height_one_plane
[13:34:46] [PASSED] drm_test_format_block_height_two_plane
[13:34:46] [PASSED] drm_test_format_block_height_three_plane
[13:34:46] [PASSED] drm_test_format_block_height_tiled
[13:34:46] [PASSED] drm_test_format_min_pitch_invalid
[13:34:46] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:34:46] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:34:46] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:34:46] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:34:46] [PASSED] drm_test_format_min_pitch_two_plane
[13:34:46] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:34:46] [PASSED] drm_test_format_min_pitch_tiled
[13:34:46] =================== [PASSED] drm_format ====================
[13:34:46] ============== drm_framebuffer (10 subtests) ===============
[13:34:46] ========== drm_test_framebuffer_check_src_coords  ==========
[13:34:46] [PASSED] Success: source fits into fb
[13:34:46] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:34:46] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:34:46] [PASSED] Fail: overflowing fb with source width
[13:34:46] [PASSED] Fail: overflowing fb with source height
[13:34:46] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:34:46] [PASSED] drm_test_framebuffer_cleanup
[13:34:46] =============== drm_test_framebuffer_create  ===============
[13:34:46] [PASSED] ABGR8888 normal sizes
[13:34:46] [PASSED] ABGR8888 max sizes
[13:34:46] [PASSED] ABGR8888 pitch greater than min required
[13:34:46] [PASSED] ABGR8888 pitch less than min required
[13:34:46] [PASSED] ABGR8888 Invalid width
[13:34:46] [PASSED] ABGR8888 Invalid buffer handle
[13:34:46] [PASSED] No pixel format
[13:34:46] [PASSED] ABGR8888 Width 0
[13:34:46] [PASSED] ABGR8888 Height 0
[13:34:46] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:34:46] [PASSED] ABGR8888 Large buffer offset
[13:34:46] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:34:46] [PASSED] ABGR8888 Invalid flag
[13:34:46] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:34:46] [PASSED] ABGR8888 Valid buffer modifier
[13:34:46] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:34:46] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:34:46] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:34:46] [PASSED] NV12 Normal sizes
[13:34:46] [PASSED] NV12 Max sizes
[13:34:46] [PASSED] NV12 Invalid pitch
[13:34:46] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:34:46] [PASSED] NV12 different  modifier per-plane
[13:34:46] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:34:46] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:34:46] [PASSED] NV12 Modifier for inexistent plane
[13:34:46] [PASSED] NV12 Handle for inexistent plane
[13:34:46] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:34:46] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:34:46] [PASSED] YVU420 Normal sizes
[13:34:46] [PASSED] YVU420 Max sizes
[13:34:46] [PASSED] YVU420 Invalid pitch
[13:34:46] [PASSED] YVU420 Different pitches
[13:34:46] [PASSED] YVU420 Different buffer offsets/pitches
[13:34:46] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:34:46] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:34:46] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:34:46] [PASSED] YVU420 Valid modifier
[13:34:46] [PASSED] YVU420 Different modifiers per plane
[13:34:46] [PASSED] YVU420 Modifier for inexistent plane
[13:34:46] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:34:46] [PASSED] X0L2 Normal sizes
[13:34:46] [PASSED] X0L2 Max sizes
[13:34:46] [PASSED] X0L2 Invalid pitch
[13:34:46] [PASSED] X0L2 Pitch greater than minimum required
[13:34:46] [PASSED] X0L2 Handle for inexistent plane
[13:34:46] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:34:46] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:34:46] [PASSED] X0L2 Valid modifier
[13:34:46] [PASSED] X0L2 Modifier for inexistent plane
[13:34:46] =========== [PASSED] drm_test_framebuffer_create ===========
[13:34:46] [PASSED] drm_test_framebuffer_free
[13:34:46] [PASSED] drm_test_framebuffer_init
[13:34:46] [PASSED] drm_test_framebuffer_init_bad_format
[13:34:46] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:34:46] [PASSED] drm_test_framebuffer_lookup
[13:34:46] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:34:46] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:34:46] ================= [PASSED] drm_framebuffer =================
[13:34:46] ================ drm_gem_shmem (8 subtests) ================
[13:34:46] [PASSED] drm_gem_shmem_test_obj_create
[13:34:46] [PASSED] drm_gem_shmem_test_obj_create_private
[13:34:46] [PASSED] drm_gem_shmem_test_pin_pages
[13:34:46] [PASSED] drm_gem_shmem_test_vmap
[13:34:46] [PASSED] drm_gem_shmem_test_get_sg_table
[13:34:46] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:34:46] [PASSED] drm_gem_shmem_test_madvise
[13:34:46] [PASSED] drm_gem_shmem_test_purge
[13:34:46] ================== [PASSED] drm_gem_shmem ==================
[13:34:46] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[13:34:46] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:34:46] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:34:46] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:34:46] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:34:46] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:34:46] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:34:46] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[13:34:46] [PASSED] Automatic
[13:34:46] [PASSED] Full
[13:34:46] [PASSED] Limited 16:235
[13:34:46] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:34:46] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:34:46] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:34:46] [PASSED] drm_test_check_disable_connector
[13:34:46] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:34:46] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:34:46] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:34:46] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:34:46] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:34:46] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:34:46] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:34:46] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:34:46] [PASSED] drm_test_check_output_bpc_dvi
[13:34:46] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:34:46] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:34:46] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:34:46] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:34:46] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:34:46] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:34:46] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:34:46] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:34:46] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:34:46] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:34:46] [PASSED] drm_test_check_broadcast_rgb_value
[13:34:46] [PASSED] drm_test_check_bpc_8_value
[13:34:46] [PASSED] drm_test_check_bpc_10_value
[13:34:46] [PASSED] drm_test_check_bpc_12_value
[13:34:46] [PASSED] drm_test_check_format_value
[13:34:46] [PASSED] drm_test_check_tmds_char_value
[13:34:46] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:34:46] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[13:34:46] [PASSED] drm_test_check_mode_valid
[13:34:46] [PASSED] drm_test_check_mode_valid_reject
[13:34:46] [PASSED] drm_test_check_mode_valid_reject_rate
[13:34:46] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:34:46] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:34:46] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[13:34:46] [PASSED] drm_test_check_infoframes
[13:34:46] [PASSED] drm_test_check_reject_avi_infoframe
[13:34:46] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[13:34:46] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[13:34:46] [PASSED] drm_test_check_reject_audio_infoframe
[13:34:46] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[13:34:46] ================= drm_managed (2 subtests) =================
[13:34:46] [PASSED] drm_test_managed_release_action
[13:34:46] [PASSED] drm_test_managed_run_action
[13:34:46] =================== [PASSED] drm_managed ===================
[13:34:46] =================== drm_mm (6 subtests) ====================
[13:34:46] [PASSED] drm_test_mm_init
[13:34:46] [PASSED] drm_test_mm_debug
[13:34:46] [PASSED] drm_test_mm_align32
[13:34:46] [PASSED] drm_test_mm_align64
[13:34:46] [PASSED] drm_test_mm_lowest
[13:34:46] [PASSED] drm_test_mm_highest
[13:34:46] ===================== [PASSED] drm_mm ======================
[13:34:46] ============= drm_modes_analog_tv (5 subtests) =============
[13:34:46] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:34:46] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:34:46] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:34:46] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:34:46] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:34:46] =============== [PASSED] drm_modes_analog_tv ===============
[13:34:46] ============== drm_plane_helper (2 subtests) ===============
[13:34:46] =============== drm_test_check_plane_state  ================
[13:34:46] [PASSED] clipping_simple
[13:34:46] [PASSED] clipping_rotate_reflect
[13:34:46] [PASSED] positioning_simple
[13:34:46] [PASSED] upscaling
[13:34:46] [PASSED] downscaling
[13:34:46] [PASSED] rounding1
[13:34:46] [PASSED] rounding2
[13:34:46] [PASSED] rounding3
[13:34:46] [PASSED] rounding4
[13:34:46] =========== [PASSED] drm_test_check_plane_state ============
[13:34:46] =========== drm_test_check_invalid_plane_state  ============
[13:34:46] [PASSED] positioning_invalid
[13:34:46] [PASSED] upscaling_invalid
[13:34:46] [PASSED] downscaling_invalid
[13:34:46] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:34:46] ================ [PASSED] drm_plane_helper =================
[13:34:46] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:34:46] ====== drm_test_connector_helper_tv_get_modes_check  =======
[13:34:46] [PASSED] None
[13:34:46] [PASSED] PAL
[13:34:46] [PASSED] NTSC
[13:34:46] [PASSED] Both, NTSC Default
[13:34:46] [PASSED] Both, PAL Default
[13:34:46] [PASSED] Both, NTSC Default, with PAL on command-line
[13:34:46] [PASSED] Both, PAL Default, with NTSC on command-line
[13:34:46] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:34:46] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:34:46] ================== drm_rect (9 subtests) ===================
[13:34:46] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:34:46] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:34:46] [PASSED] drm_test_rect_clip_scaled_clipped
[13:34:46] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:34:46] ================= drm_test_rect_intersect  =================
[13:34:46] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:34:46] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:34:46] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:34:46] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:34:46] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:34:46] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:34:46] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:34:46] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:34:46] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:34:46] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:34:46] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:34:46] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:34:46] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:34:46] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:34:46] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:34:46] ============= [PASSED] drm_test_rect_intersect =============
[13:34:46] ================ drm_test_rect_calc_hscale  ================
[13:34:46] [PASSED] normal use
[13:34:46] [PASSED] out of max range
[13:34:46] [PASSED] out of min range
[13:34:46] [PASSED] zero dst
[13:34:46] [PASSED] negative src
[13:34:46] [PASSED] negative dst
[13:34:46] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:34:46] ================ drm_test_rect_calc_vscale  ================
[13:34:46] [PASSED] normal use
[13:34:46] [PASSED] out of max range
[13:34:46] [PASSED] out of min range
[13:34:46] [PASSED] zero dst
[13:34:46] [PASSED] negative src
[13:34:46] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[13:34:46] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:34:46] ================== drm_test_rect_rotate  ===================
[13:34:46] [PASSED] reflect-x
[13:34:46] [PASSED] reflect-y
[13:34:46] [PASSED] rotate-0
[13:34:46] [PASSED] rotate-90
[13:34:46] [PASSED] rotate-180
[13:34:46] [PASSED] rotate-270
[13:34:46] ============== [PASSED] drm_test_rect_rotate ===============
[13:34:46] ================ drm_test_rect_rotate_inv  =================
[13:34:46] [PASSED] reflect-x
[13:34:46] [PASSED] reflect-y
[13:34:46] [PASSED] rotate-0
[13:34:46] [PASSED] rotate-90
[13:34:46] [PASSED] rotate-180
[13:34:46] [PASSED] rotate-270
[13:34:46] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:34:46] ==================== [PASSED] drm_rect =====================
[13:34:46] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:34:46] ============ drm_test_sysfb_build_fourcc_list  =============
[13:34:46] [PASSED] no native formats
[13:34:46] [PASSED] XRGB8888 as native format
[13:34:46] [PASSED] remove duplicates
[13:34:46] [PASSED] convert alpha formats
[13:34:46] [PASSED] random formats
[13:34:46] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:34:46] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:34:46] ================== drm_fixp (2 subtests) ===================
[13:34:46] [PASSED] drm_test_int2fixp
[13:34:46] [PASSED] drm_test_sm2fixp
[13:34:46] ==================== [PASSED] drm_fixp =====================
[13:34:46] ============================================================
[13:34:46] Testing complete. Ran 621 tests: passed: 621
[13:34:46] Elapsed time: 26.558s total, 1.737s configuring, 24.639s building, 0.178s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:34:46] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:34:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:34:57] Starting KUnit Kernel (1/1)...
[13:34:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:34:57] ================= ttm_device (5 subtests) ==================
[13:34:57] [PASSED] ttm_device_init_basic
[13:34:57] [PASSED] ttm_device_init_multiple
[13:34:57] [PASSED] ttm_device_fini_basic
[13:34:57] [PASSED] ttm_device_init_no_vma_man
[13:34:57] ================== ttm_device_init_pools  ==================
[13:34:57] [PASSED] No DMA allocations, no DMA32 required
[13:34:57] [PASSED] DMA allocations, DMA32 required
[13:34:57] [PASSED] No DMA allocations, DMA32 required
[13:34:57] [PASSED] DMA allocations, no DMA32 required
[13:34:57] ============== [PASSED] ttm_device_init_pools ==============
[13:34:57] =================== [PASSED] ttm_device ====================
[13:34:57] ================== ttm_pool (8 subtests) ===================
[13:34:57] ================== ttm_pool_alloc_basic  ===================
[13:34:57] [PASSED] One page
[13:34:57] [PASSED] More than one page
[13:34:57] [PASSED] Above the allocation limit
[13:34:57] [PASSED] One page, with coherent DMA mappings enabled
[13:34:57] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:34:57] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:34:57] ============== ttm_pool_alloc_basic_dma_addr  ==============
[13:34:57] [PASSED] One page
[13:34:57] [PASSED] More than one page
[13:34:57] [PASSED] Above the allocation limit
[13:34:57] [PASSED] One page, with coherent DMA mappings enabled
[13:34:57] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:34:57] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:34:57] [PASSED] ttm_pool_alloc_order_caching_match
[13:34:57] [PASSED] ttm_pool_alloc_caching_mismatch
[13:34:57] [PASSED] ttm_pool_alloc_order_mismatch
[13:34:57] [PASSED] ttm_pool_free_dma_alloc
[13:34:57] [PASSED] ttm_pool_free_no_dma_alloc
[13:34:57] [PASSED] ttm_pool_fini_basic
[13:34:57] ==================== [PASSED] ttm_pool =====================
[13:34:57] ================ ttm_resource (8 subtests) =================
[13:34:57] ================= ttm_resource_init_basic  =================
[13:34:57] [PASSED] Init resource in TTM_PL_SYSTEM
[13:34:57] [PASSED] Init resource in TTM_PL_VRAM
[13:34:57] [PASSED] Init resource in a private placement
[13:34:57] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:34:57] ============= [PASSED] ttm_resource_init_basic =============
[13:34:57] [PASSED] ttm_resource_init_pinned
[13:34:57] [PASSED] ttm_resource_fini_basic
[13:34:57] [PASSED] ttm_resource_manager_init_basic
[13:34:57] [PASSED] ttm_resource_manager_usage_basic
[13:34:57] [PASSED] ttm_resource_manager_set_used_basic
[13:34:57] [PASSED] ttm_sys_man_alloc_basic
[13:34:57] [PASSED] ttm_sys_man_free_basic
[13:34:57] ================== [PASSED] ttm_resource ===================
[13:34:57] =================== ttm_tt (15 subtests) ===================
[13:34:57] ==================== ttm_tt_init_basic  ====================
[13:34:57] [PASSED] Page-aligned size
[13:34:57] [PASSED] Extra pages requested
[13:34:57] ================ [PASSED] ttm_tt_init_basic ================
[13:34:57] [PASSED] ttm_tt_init_misaligned
[13:34:57] [PASSED] ttm_tt_fini_basic
[13:34:57] [PASSED] ttm_tt_fini_sg
[13:34:57] [PASSED] ttm_tt_fini_shmem
[13:34:57] [PASSED] ttm_tt_create_basic
[13:34:57] [PASSED] ttm_tt_create_invalid_bo_type
[13:34:57] [PASSED] ttm_tt_create_ttm_exists
[13:34:57] [PASSED] ttm_tt_create_failed
[13:34:57] [PASSED] ttm_tt_destroy_basic
[13:34:57] [PASSED] ttm_tt_populate_null_ttm
[13:34:57] [PASSED] ttm_tt_populate_populated_ttm
[13:34:57] [PASSED] ttm_tt_unpopulate_basic
[13:34:57] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:34:57] [PASSED] ttm_tt_swapin_basic
[13:34:57] ===================== [PASSED] ttm_tt ======================
[13:34:57] =================== ttm_bo (14 subtests) ===================
[13:34:57] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[13:34:57] [PASSED] Cannot be interrupted and sleeps
[13:34:57] [PASSED] Cannot be interrupted, locks straight away
[13:34:57] [PASSED] Can be interrupted, sleeps
[13:34:57] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:34:57] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:34:57] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:34:57] [PASSED] ttm_bo_reserve_double_resv
[13:34:57] [PASSED] ttm_bo_reserve_interrupted
[13:34:57] [PASSED] ttm_bo_reserve_deadlock
[13:34:57] [PASSED] ttm_bo_unreserve_basic
[13:34:57] [PASSED] ttm_bo_unreserve_pinned
[13:34:57] [PASSED] ttm_bo_unreserve_bulk
[13:34:57] [PASSED] ttm_bo_fini_basic
[13:34:57] [PASSED] ttm_bo_fini_shared_resv
[13:34:57] [PASSED] ttm_bo_pin_basic
[13:34:57] [PASSED] ttm_bo_pin_unpin_resource
[13:34:57] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:34:57] ===================== [PASSED] ttm_bo ======================
[13:34:57] ============== ttm_bo_validate (22 subtests) ===============
[13:34:57] ============== ttm_bo_init_reserved_sys_man  ===============
[13:34:57] [PASSED] Buffer object for userspace
[13:34:57] [PASSED] Kernel buffer object
[13:34:57] [PASSED] Shared buffer object
[13:34:57] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:34:57] ============== ttm_bo_init_reserved_mock_man  ==============
[13:34:57] [PASSED] Buffer object for userspace
[13:34:57] [PASSED] Kernel buffer object
[13:34:57] [PASSED] Shared buffer object
[13:34:57] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:34:57] [PASSED] ttm_bo_init_reserved_resv
[13:34:57] ================== ttm_bo_validate_basic  ==================
[13:34:57] [PASSED] Buffer object for userspace
[13:34:57] [PASSED] Kernel buffer object
[13:34:57] [PASSED] Shared buffer object
[13:34:57] ============== [PASSED] ttm_bo_validate_basic ==============
[13:34:57] [PASSED] ttm_bo_validate_invalid_placement
[13:34:57] ============= ttm_bo_validate_same_placement  ==============
[13:34:57] [PASSED] System manager
[13:34:57] [PASSED] VRAM manager
[13:34:57] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:34:57] [PASSED] ttm_bo_validate_failed_alloc
[13:34:57] [PASSED] ttm_bo_validate_pinned
[13:34:57] [PASSED] ttm_bo_validate_busy_placement
[13:34:57] ================ ttm_bo_validate_multihop  =================
[13:34:57] [PASSED] Buffer object for userspace
[13:34:57] [PASSED] Kernel buffer object
[13:34:57] [PASSED] Shared buffer object
[13:34:57] ============ [PASSED] ttm_bo_validate_multihop =============
[13:34:57] ========== ttm_bo_validate_no_placement_signaled  ==========
[13:34:57] [PASSED] Buffer object in system domain, no page vector
[13:34:57] [PASSED] Buffer object in system domain with an existing page vector
[13:34:57] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:34:57] ======== ttm_bo_validate_no_placement_not_signaled  ========
[13:34:57] [PASSED] Buffer object for userspace
[13:34:57] [PASSED] Kernel buffer object
[13:34:57] [PASSED] Shared buffer object
[13:34:57] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:34:57] [PASSED] ttm_bo_validate_move_fence_signaled
[13:34:57] ========= ttm_bo_validate_move_fence_not_signaled  =========
[13:34:57] [PASSED] Waits for GPU
[13:34:57] [PASSED] Tries to lock straight away
[13:34:57] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:34:57] [PASSED] ttm_bo_validate_swapout
[13:34:57] [PASSED] ttm_bo_validate_happy_evict
[13:34:57] [PASSED] ttm_bo_validate_all_pinned_evict
[13:34:57] [PASSED] ttm_bo_validate_allowed_only_evict
[13:34:57] [PASSED] ttm_bo_validate_deleted_evict
[13:34:57] [PASSED] ttm_bo_validate_busy_domain_evict
[13:34:57] [PASSED] ttm_bo_validate_evict_gutting
[13:34:57] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[13:34:57] ================= [PASSED] ttm_bo_validate =================
[13:34:57] ============================================================
[13:34:57] Testing complete. Ran 102 tests: passed: 102
[13:34:57] Elapsed time: 11.535s total, 1.714s configuring, 9.554s building, 0.228s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introduce Xe Uncorrectable Error Handling (rev4)

[Patchwork]

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== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev4)
URL   : https://patchwork.freedesktop.org/series/160482/
State : success

== Summary ==

CI Bug Log - changes from xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f_BAT -> xe-pw-160482v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 12)
------------------------------

  Missing    (1): bat-ptl-vm 

New tests
---------

  New tests have been introduced between xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f_BAT and xe-pw-160482v4_BAT:

### New IGT tests (1) ###

  * igt@xe_module_load@load:
    - Statuses : 12 pass(s)
    - Exec time: [0.66, 5.30] s

  


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f -> xe-pw-160482v4

  IGT_8863: 5b279a8b71dc1672099205a1a9e8135c7c7fadb5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f: 3b9ca4c40814c96c38986ae2ba6651e43757ca5f
  xe-pw-160482v4: 160482v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/index.html

[-- Attachment #2: Type: text/html, Size: 1795 bytes --]

✗ Xe.CI.FULL: failure for Introduce Xe Uncorrectable Error Handling (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 29521 bytes --]

== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev4)
URL   : https://patchwork.freedesktop.org/series/160482/
State : failure

== Summary ==

CI Bug Log - changes from xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f_FULL -> xe-pw-160482v4_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-160482v4_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-160482v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-160482v4_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-bmg:          [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-5/igt@kms_atomic_transition@plane-all-modeset-transition.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_atomic_transition@plane-all-modeset-transition.html

  
New tests
---------

  New tests have been introduced between xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f_FULL and xe-pw-160482v4_FULL:

### New IGT tests (11) ###

  * igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb2101010:
    - Statuses : 1 pass(s)
    - Exec time: [0.00] s

  * igt@xe_pm@s2idle-vm-bind-prefetch:
    - Statuses : 2 pass(s)
    - Exec time: [1.23, 2.04] s

  * igt@xe_pm@s2idle-vm-bind-unbind-all:
    - Statuses : 2 pass(s)
    - Exec time: [1.31, 1.99] s

  * igt@xe_pm@s2idle-vm-bind-userptr:
    - Statuses : 2 pass(s)
    - Exec time: [0.96, 1.47] s

  * igt@xe_pm@s3-vm-bind-prefetch:
    - Statuses : 1 skip(s)
    - Exec time: [0.15] s

  * igt@xe_pm@s3-vm-bind-unbind-all:
    - Statuses : 1 pass(s) 1 skip(s)
    - Exec time: [0.17, 1.69] s

  * igt@xe_pm@s3-vm-bind-userptr:
    - Statuses : 1 skip(s)
    - Exec time: [0.22] s

  * igt@xe_pm@s4-vm-bind-prefetch:
    - Statuses : 2 pass(s)
    - Exec time: [7.55, 8.03] s

  * igt@xe_pm@s4-vm-bind-unbind-all:
    - Statuses : 2 pass(s)
    - Exec time: [7.49, 8.10] s

  * igt@xe_pm@s4-vm-bind-userptr:
    - Statuses : 2 pass(s)
    - Exec time: [7.32, 7.95] s

  

Known issues
------------

  Here are the changes found in xe-pw-160482v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-write:
    - shard-bmg:          NOTRUN -> [FAIL][3] ([Intel XE#7445])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@intel_hwmon@hwmon-write.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-bmg:          [PASS][4] -> [ABORT][5] ([Intel XE#5545]) +1 other test abort
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#7059] / [Intel XE#7085])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#1124]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_bw@linear-tiling-1-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#367] / [Intel XE#7354])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html

  * igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2887])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html

  * igt@kms_chamelium_color@ctm-red-to-blue:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2325] / [Intel XE#7358]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_chamelium_color@ctm-red-to-blue.html

  * igt@kms_chamelium_hpd@hdmi-hpd:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2252]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_chamelium_hpd@hdmi-hpd.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2390] / [Intel XE#6974])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_cursor_crc@cursor-offscreen-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2320])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_cursor_crc@cursor-offscreen-32x10.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2321] / [Intel XE#7355])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#1508])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_feature_discovery@display-4x:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#1138] / [Intel XE#7344])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@kms_feature_discovery@display-4x.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [PASS][17] -> [FAIL][18] ([Intel XE#301]) +1 other test fail
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#7178] / [Intel XE#7351])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#2311]) +6 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#4141]) +2 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2313]) +8 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#7061] / [Intel XE#7356])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#6911] / [Intel XE#7378])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#7283]) +1 other test skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@kms_plane@pixel-format-yf-tiled-modifier-source-clamping.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2505] / [Intel XE#7447])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#1489]) +1 other test skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html

  * igt@kms_psr@pr-sprite-plane-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#2234] / [Intel XE#2850])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@kms_psr@pr-sprite-plane-onoff.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#1406] / [Intel XE#2414])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#3904] / [Intel XE#7342])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_rotation_crc@bad-tiling.html

  * igt@xe_eudebug@basic-vm-bind-discovery:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#7636])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@xe_eudebug@basic-vm-bind-discovery.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [PASS][33] -> [INCOMPLETE][34] ([Intel XE#6321])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-5/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#7136]) +5 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@xe_exec_fault_mode@once-multi-queue-userptr-invalidate-prefetch.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-dyn-priority-smem:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#6874]) +6 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@xe_exec_multi_queue@many-queues-preempt-mode-dyn-priority-smem.html

  * igt@xe_exec_threads@threads-multi-queue-cm-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#7138]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@xe_exec_threads@threads-multi-queue-cm-rebind.html

  * igt@xe_multigpu_svm@mgpu-concurrent-access-basic:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#6964])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@xe_multigpu_svm@mgpu-concurrent-access-basic.html

  * igt@xe_pxp@display-pxp-fb:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@xe_pxp@display-pxp-fb.html

  
#### Possible fixes ####

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
    - shard-bmg:          [SKIP][40] ([Intel XE#1340]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-3/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-10/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
    - shard-bmg:          [FAIL][42] ([Intel XE#3149]) -> [PASS][43] +1 other test pass
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-3/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-10/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible@bc-dp2-hdmi-a3:
    - shard-bmg:          [FAIL][44] ([Intel XE#7705]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-3/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible@bc-dp2-hdmi-a3.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-10/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible@bc-dp2-hdmi-a3.html

  * igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute:
    - shard-bmg:          [ABORT][46] ([Intel XE#7200]) -> [PASS][47] +1 other test pass
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-2/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@xe_compute_preempt@compute-preempt-many-vram-evict@engine-drm_xe_engine_class_compute.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
    - shard-lnl:          [FAIL][48] ([Intel XE#5625]) -> [PASS][49]
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-lnl-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-lnl-1/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html

  
#### Warnings ####

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
    - shard-bmg:          [TIMEOUT][50] -> [FAIL][51] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-3/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-10/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
    - shard-bmg:          [ABORT][52] ([Intel XE#5545]) -> [SKIP][53] ([Intel XE#4141])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][54] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][55] ([Intel XE#2426] / [Intel XE#5848])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [PASS][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71], [PASS][72], [PASS][73], [PASS][74], [PASS][75], [PASS][76], [PASS][77], [PASS][78], [PASS][79], [SKIP][80], [PASS][81]) ([Intel XE#2457] / [Intel XE#7405]) -> ([PASS][82], [PASS][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [DMESG-WARN][90], [PASS][91], [PASS][92], [DMESG-WARN][93], [PASS][94], [DMESG-WARN][95], [PASS][96], [PASS][97], [SKIP][98], [DMESG-WARN][99], [PASS][100], [PASS][101], [PASS][102], [PASS][103], [PASS][104], [PASS][105], [PASS][106], [PASS][107]) ([Intel XE#2457] / [Intel XE#7405] / [Intel XE#7725])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-8/igt@xe_module_load@load.html
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-9/igt@xe_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-9/igt@xe_module_load@load.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-5/igt@xe_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-5/igt@xe_module_load@load.html
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-2/igt@xe_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-3/igt@xe_module_load@load.html
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-3/igt@xe_module_load@load.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-7/igt@xe_module_load@load.html
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-4/igt@xe_module_load@load.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-8/igt@xe_module_load@load.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-2/igt@xe_module_load@load.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-2/igt@xe_module_load@load.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-5/igt@xe_module_load@load.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-7/igt@xe_module_load@load.html
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-2/igt@xe_module_load@load.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-10/igt@xe_module_load@load.html
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-6/igt@xe_module_load@load.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-10/igt@xe_module_load@load.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-1/igt@xe_module_load@load.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-1/igt@xe_module_load@load.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-10/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-6/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-4/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-5/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-bmg-4/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-10/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-9/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-5/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-9/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-7/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-6/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-5/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-8/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-6/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-6/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-6/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@xe_module_load@load.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-2/igt@xe_module_load@load.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-6/igt@xe_module_load@load.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-4/igt@xe_module_load@load.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-3/igt@xe_module_load@load.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-3/igt@xe_module_load@load.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-1/igt@xe_module_load@load.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-1/igt@xe_module_load@load.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-5/igt@xe_module_load@load.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-10/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-bmg-7/igt@xe_module_load@load.html

  * igt@xe_pat@xa-app-transient-media-off:
    - shard-lnl:          [SKIP][108] ([Intel XE#7590]) -> [SKIP][109] ([Intel XE#7590] / [Intel XE#7772]) +2 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f/shard-lnl-3/igt@xe_pat@xa-app-transient-media-off.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/shard-lnl-4/igt@xe_pat@xa-app-transient-media-off.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7200]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7200
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7344]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7344
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7354
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
  [Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7445]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7445
  [Intel XE#7447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7447
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7705
  [Intel XE#7725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7725
  [Intel XE#7772]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7772


Build changes
-------------

  * Linux: xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f -> xe-pw-160482v4

  IGT_8863: 5b279a8b71dc1672099205a1a9e8135c7c7fadb5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4919-3b9ca4c40814c96c38986ae2ba6651e43757ca5f: 3b9ca4c40814c96c38986ae2ba6651e43757ca5f
  xe-pw-160482v4: 160482v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v4/index.html

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