[PATCH v6 0/8] Introduce Xe PCIe FLR

[PATCH v6 0/8] Introduce Xe PCIe FLR

[Raag Jadav]

Here's my humble attempt at introducing PCIe Function Level Reset (FLR)
support in xe driver. This is ofcourse a half baked implementation and
only limited to re-initializing GT. This needs to be extended for a lot
of components which are expected to be added as a follow up.

Detailed description in commit message and documentation.

PS: All xe_exec_basic tests and clpeak run smoothly after FLR. Give it
a spin and let me know if any regressions.

Trigger it with:

$ echo 1 > /sys/bus/pci/devices/<BDF>/reset

v2: Re-initialize migrate context (Matthew Brost)
    Add kernel doc (Matthew Brost)
    Spell out Function Level Reset (Jani)

v3: Cancel in-flight jobs before FLR

v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)

v5: Re-initialize kernel queues through submission backend (Matthew Brost)
    Prevent PM ref leak for wedged device (Matthew Brost)

v6: Skip uC firmware selection during re-initialization (Daniele)
    Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
    s/flr_done/reinit (Daniele)
    Repurpose system suspend/resume flow for FLR (Daniele)

Raag Jadav (8):
  drm/xe/uc_fw: Allow re-initializing firmware
  drm/xe/guc_submit: Introduce guc_exec_queue_reinit()
  drm/xe/gt: Introduce FLR helpers
  drm/xe/bo_evict: Introduce xe_bo_restore_map()
  drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
  drm/xe/migrate: Introduce xe_migrate_reinit()
  drm/xe/pm: Introduce xe_device_suspend/resume()
  drm/xe/pci: Introduce PCIe FLR

 drivers/gpu/drm/xe/Makefile              |   1 +
 drivers/gpu/drm/xe/xe_bo_evict.c         |  51 ++++++--
 drivers/gpu/drm/xe/xe_bo_evict.h         |   2 +
 drivers/gpu/drm/xe/xe_device.c           | 150 +++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_device.h           |   2 +
 drivers/gpu/drm/xe/xe_device_types.h     |   3 +
 drivers/gpu/drm/xe/xe_exec_queue.c       |  42 ++++++-
 drivers/gpu/drm/xe/xe_exec_queue.h       |   1 +
 drivers/gpu/drm/xe/xe_exec_queue_types.h |   2 +
 drivers/gpu/drm/xe/xe_execlist.c         |   6 +
 drivers/gpu/drm/xe/xe_gpu_scheduler.h    |   5 +
 drivers/gpu/drm/xe/xe_gsc.c              |  14 +++
 drivers/gpu/drm/xe/xe_gsc.h              |   1 +
 drivers/gpu/drm/xe/xe_gt.c               |  48 ++++++++
 drivers/gpu/drm/xe/xe_gt.h               |   2 +
 drivers/gpu/drm/xe/xe_gt_types.h         |   9 ++
 drivers/gpu/drm/xe/xe_guc.c              |  29 +++++
 drivers/gpu/drm/xe/xe_guc.h              |   2 +
 drivers/gpu/drm/xe/xe_guc_submit.c       |  11 ++
 drivers/gpu/drm/xe/xe_huc.c              |  14 +++
 drivers/gpu/drm/xe/xe_huc.h              |   1 +
 drivers/gpu/drm/xe/xe_lrc.c              |  17 +++
 drivers/gpu/drm/xe/xe_lrc.h              |   2 +
 drivers/gpu/drm/xe/xe_migrate.c          |  12 ++
 drivers/gpu/drm/xe/xe_migrate.h          |   1 +
 drivers/gpu/drm/xe/xe_pci.c              |   1 +
 drivers/gpu/drm/xe/xe_pci.h              |   2 +
 drivers/gpu/drm/xe/xe_pci_error.c        | 113 +++++++++++++++++
 drivers/gpu/drm/xe/xe_pm.c               | 103 ++--------------
 drivers/gpu/drm/xe/xe_uc.c               |  39 ++++++
 drivers/gpu/drm/xe/xe_uc.h               |   2 +
 drivers/gpu/drm/xe/xe_uc_fw.c            |  49 ++++++++
 drivers/gpu/drm/xe/xe_uc_fw.h            |   1 +
 33 files changed, 631 insertions(+), 107 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c

-- 
2.43.0

[PATCH v6 1/8] drm/xe/uc_fw: Allow re-initializing firmware

[Raag Jadav]

In preparation of usecases which require re-initializing firmware without
reloading the driver, introduce xe_uc_fw_reinit(). The uC firmware bo
already exists but since it's contents are on VRAM, they are lost on PCIe
FLR. Copy the firmware back to it's bo and mark it as loadable as part of
re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v6: Skip uC firmware selection during re-initialization (Daniele)
---
 drivers/gpu/drm/xe/xe_uc_fw.c | 49 +++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc_fw.h |  1 +
 2 files changed, 50 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index df2aa196f6f9..9bb646ee998b 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -834,6 +834,14 @@ static int uc_fw_copy(struct xe_uc_fw *uc_fw, const void *data, size_t size, u32
 	return err;
 }
 
+static void uc_fw_reinit(struct xe_uc_fw *uc_fw, const void *data)
+{
+	struct xe_device *xe = uc_fw_to_xe(uc_fw);
+
+	xe_map_memcpy_to(xe, &uc_fw->bo->vmap, 0, data, uc_fw->size);
+	xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_LOADABLE);
+}
+
 int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
 {
 	const struct firmware *fw = NULL;
@@ -857,6 +865,47 @@ int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
 }
 ALLOW_ERROR_INJECTION(xe_uc_fw_init, ERRNO); /* See xe_pci_probe() */
 
+/**
+ * xe_uc_fw_reinit() - Re-initialize uC firmware into its bo
+ * @uc_fw: uC firmware
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw)
+{
+	struct xe_device *xe = uc_fw_to_xe(uc_fw);
+	struct xe_uc_fw_version new_fw, old_fw;
+	const struct firmware *fw = NULL;
+	int err;
+
+	/* We shouldn't be here for the firmware which wasn't loaded */
+	xe_assert(xe, xe_uc_fw_is_available(uc_fw));
+
+	old_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+
+	err = firmware_request_nowarn(&fw, uc_fw->path, xe->drm.dev);
+	if (err)
+		goto fail;
+
+	err = parse_headers(uc_fw, fw);
+	if (err)
+		goto fail;
+
+	new_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+	if (new_fw.branch != old_fw.branch || new_fw.major != old_fw.major ||
+	    new_fw.minor != old_fw.minor || new_fw.patch != old_fw.patch ||
+	    new_fw.build != old_fw.build || uc_fw->size != fw->size) {
+		drm_err(&xe->drm, "%s firmware mismatch on %s",
+			xe_uc_fw_type_repr(uc_fw->type), uc_fw->path);
+		return -ENOEXEC;
+	}
+
+	uc_fw_reinit(uc_fw, fw->data);
+fail:
+	uc_fw_release(fw);
+	return err;
+}
+
 static u32 uc_fw_ggtt_offset(struct xe_uc_fw *uc_fw)
 {
 	return xe_bo_ggtt_addr(uc_fw->bo);
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.h b/drivers/gpu/drm/xe/xe_uc_fw.h
index bb281b72a677..9f469bf07d66 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw.h
@@ -15,6 +15,7 @@
 struct drm_printer;
 
 int xe_uc_fw_init(struct xe_uc_fw *uc_fw);
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw);
 size_t xe_uc_fw_copy_rsa(struct xe_uc_fw *uc_fw, void *dst, u32 max_len);
 int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags);
 int xe_uc_fw_check_version_requirements(struct xe_uc_fw *uc_fw);
-- 
2.43.0

[PATCH v6 2/8] drm/xe/guc_submit: Introduce guc_exec_queue_reinit()

[Raag Jadav]

In preparation of usecases which require re-initializing GuC submission
after PCIe FLR, introduce guc_exec_queue_reinit() helper. This will restore
exec queues which might have been killed before PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v5: Re-initialize kernel queues through submission backend (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_exec_queue_types.h |  2 ++
 drivers/gpu/drm/xe/xe_execlist.c         |  6 ++++++
 drivers/gpu/drm/xe/xe_gpu_scheduler.h    |  5 +++++
 drivers/gpu/drm/xe/xe_guc_submit.c       | 11 +++++++++++
 4 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index 2f5ccf294675..f1e45e8f30e7 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -274,6 +274,8 @@ struct xe_exec_queue {
 struct xe_exec_queue_ops {
 	/** @init: Initialize exec queue for submission backend */
 	int (*init)(struct xe_exec_queue *q);
+	/** @reinit: Re-initialize exec queue for submission backend */
+	void (*reinit)(struct xe_exec_queue *q);
 	/** @kill: Kill inflight submissions for backend */
 	void (*kill)(struct xe_exec_queue *q);
 	/** @fini: Undoes the init() for submission backend */
diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
index 755a2bff5d7b..cd5410db6fa2 100644
--- a/drivers/gpu/drm/xe/xe_execlist.c
+++ b/drivers/gpu/drm/xe/xe_execlist.c
@@ -413,6 +413,11 @@ static void execlist_exec_queue_destroy_async(struct work_struct *w)
 	xe_exec_queue_fini(q);
 }
 
+static void execlist_exec_queue_reinit(struct xe_exec_queue *q)
+{
+	/* NIY */
+}
+
 static void execlist_exec_queue_kill(struct xe_exec_queue *q)
 {
 	/* NIY */
@@ -476,6 +481,7 @@ static bool execlist_exec_queue_active(struct xe_exec_queue *q)
 
 static const struct xe_exec_queue_ops execlist_exec_queue_ops = {
 	.init = execlist_exec_queue_init,
+	.reinit = execlist_exec_queue_reinit,
 	.kill = execlist_exec_queue_kill,
 	.fini = execlist_exec_queue_fini,
 	.destroy = execlist_exec_queue_destroy,
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
index 664c2db56af3..1e079ca3891c 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
@@ -51,6 +51,11 @@ static inline void xe_sched_tdr_queue_imm(struct xe_gpu_scheduler *sched)
 	drm_sched_tdr_queue_imm(&sched->base);
 }
 
+static inline void xe_sched_update_timeout(struct xe_gpu_scheduler *sched, long timeout)
+{
+	sched->base.timeout = timeout;
+}
+
 static inline void xe_sched_resubmit_jobs(struct xe_gpu_scheduler *sched)
 {
 	struct drm_sched_job *s_job;
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index b1222b42174c..5c96dd1f6e82 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2053,6 +2053,16 @@ static int guc_exec_queue_init(struct xe_exec_queue *q)
 	return err;
 }
 
+static void guc_exec_queue_reinit(struct xe_exec_queue *q)
+{
+	struct xe_gpu_scheduler *sched = &q->guc->sched;
+	long timeout = (q->vm && xe_vm_in_lr_mode(q->vm)) ? MAX_SCHEDULE_TIMEOUT :
+			msecs_to_jiffies(q->sched_props.job_timeout_ms);
+
+	xe_sched_update_timeout(sched, timeout);
+	atomic_set(&q->guc->state, 0);
+}
+
 static void guc_exec_queue_kill(struct xe_exec_queue *q)
 {
 	trace_xe_exec_queue_kill(q);
@@ -2295,6 +2305,7 @@ static bool guc_exec_queue_active(struct xe_exec_queue *q)
  */
 static const struct xe_exec_queue_ops guc_exec_queue_ops = {
 	.init = guc_exec_queue_init,
+	.reinit = guc_exec_queue_reinit,
 	.kill = guc_exec_queue_kill,
 	.fini = guc_exec_queue_fini,
 	.destroy = guc_exec_queue_destroy,
-- 
2.43.0

[PATCH v6 3/8] drm/xe/gt: Introduce FLR helpers

[Raag Jadav]

In preparation of usecases which require preparing/re-initializing GT and
all its uCs before/after PCIe FLR, introduce flr_prepare/reinit() helpers.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v6: Add IS_DGFX() asserts (Daniele)
    s/flr_done/reinit (Daniele)
---
 drivers/gpu/drm/xe/xe_gsc.c      | 14 ++++++++++++
 drivers/gpu/drm/xe/xe_gsc.h      |  1 +
 drivers/gpu/drm/xe/xe_gt.c       | 38 +++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_gt.h       |  2 ++
 drivers/gpu/drm/xe/xe_gt_types.h |  9 ++++++++
 drivers/gpu/drm/xe/xe_guc.c      | 29 ++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_guc.h      |  2 ++
 drivers/gpu/drm/xe/xe_huc.c      | 14 ++++++++++++
 drivers/gpu/drm/xe/xe_huc.h      |  1 +
 drivers/gpu/drm/xe/xe_uc.c       | 39 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc.h       |  2 ++
 11 files changed, 151 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
index 0d13e357fb43..34b1ea00c5d5 100644
--- a/drivers/gpu/drm/xe/xe_gsc.c
+++ b/drivers/gpu/drm/xe/xe_gsc.c
@@ -552,6 +552,20 @@ void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc)
 		flush_work(&gsc->work);
 }
 
+/**
+ * xe_gsc_reinit() - Re-initialize GSC after FLR
+ * @gsc: The GSC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gsc_reinit(struct xe_gsc *gsc)
+{
+	if (!xe_uc_fw_is_loadable(&gsc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&gsc->fw);
+}
+
 void xe_gsc_stop_prepare(struct xe_gsc *gsc)
 {
 	struct xe_gt *gt = gsc_to_gt(gsc);
diff --git a/drivers/gpu/drm/xe/xe_gsc.h b/drivers/gpu/drm/xe/xe_gsc.h
index b8b8e0810ad9..ce390bffb163 100644
--- a/drivers/gpu/drm/xe/xe_gsc.h
+++ b/drivers/gpu/drm/xe/xe_gsc.h
@@ -15,6 +15,7 @@ struct xe_hw_engine;
 
 int xe_gsc_init(struct xe_gsc *gsc);
 int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);
+int xe_gsc_reinit(struct xe_gsc *gsc);
 void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);
 void xe_gsc_stop_prepare(struct xe_gsc *gsc);
 void xe_gsc_load_start(struct xe_gsc *gsc);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 8a31c963c372..b3efbdd12827 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -168,6 +168,7 @@ static void xe_gt_enable_comp_1wcoh(struct xe_gt *gt)
 	}
 }
 
+static void gt_flr_worker(struct work_struct *w);
 static void gt_reset_worker(struct work_struct *w);
 
 static int emit_job_sync(struct xe_exec_queue *q, struct xe_bb *bb,
@@ -715,6 +716,7 @@ int xe_gt_init(struct xe_gt *gt)
 	int err;
 	int i;
 
+	INIT_WORK(&gt->flr.worker, gt_flr_worker);
 	INIT_WORK(&gt->reset.worker, gt_reset_worker);
 
 	for (i = 0; i < XE_ENGINE_CLASS_MAX; ++i) {
@@ -908,6 +910,42 @@ static int do_gt_restart(struct xe_gt *gt)
 	return 0;
 }
 
+static void gt_flr_worker(struct work_struct *w)
+{
+	struct xe_gt *gt = container_of(w, typeof(*gt), flr.worker);
+
+	xe_assert(gt_to_xe(gt), xe_device_wedged(gt_to_xe(gt)));
+	xe_uc_flr_prepare(&gt->uc);
+}
+
+/**
+ * xe_gt_flr_prepare() - Prepare GT for FLR
+ * @gt: the GT object
+ *
+ * Prepare all GT uCs for FLR.
+ */
+void xe_gt_flr_prepare(struct xe_gt *gt)
+{
+	/*
+	 * We'll be tearing down exec queues which signals all fences and frees the
+	 * jobs but all of that happens asynchronously, so make sure we don't disrupt
+	 * the scheduler while jobs are still in-flight.
+	 */
+	queue_work(gt->ordered_wq, &gt->flr.worker);
+	flush_work(&gt->flr.worker);
+}
+
+/**
+ * xe_gt_reinit() - Re-initialize GT after FLR
+ * @gt: the GT object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gt_reinit(struct xe_gt *gt)
+{
+	return xe_uc_reinit(&gt->uc);
+}
+
 static void gt_reset_worker(struct work_struct *w)
 {
 	struct xe_gt *gt = container_of(w, typeof(*gt), reset.worker);
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index de7e47763411..e1433223aba9 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -45,8 +45,10 @@ static inline bool xe_fault_inject_gt_reset(void)
 }
 
 struct xe_gt *xe_gt_alloc(struct xe_tile *tile);
+void xe_gt_flr_prepare(struct xe_gt *gt);
 int xe_gt_init_early(struct xe_gt *gt);
 int xe_gt_init(struct xe_gt *gt);
+int xe_gt_reinit(struct xe_gt *gt);
 void xe_gt_mmio_init(struct xe_gt *gt);
 void xe_gt_declare_wedged(struct xe_gt *gt);
 int xe_gt_record_default_lrcs(struct xe_gt *gt);
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index 7351aadd238e..c3ef1e488f41 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -192,6 +192,15 @@ struct xe_gt {
 	 */
 	struct xe_reg_sr reg_sr;
 
+	/** @flr: state for FLR */
+	struct {
+		/**
+		 * @flr.worker: worker for FLR to be done async allowing to safely
+		 * flush all code paths
+		 */
+		struct work_struct worker;
+	} flr;
+
 	/** @reset: state for GT resets */
 	struct {
 		/**
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index e762eada21db..1355b68d3fce 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1689,6 +1689,35 @@ void xe_guc_sanitize(struct xe_guc *guc)
 	xe_guc_submit_disable(guc);
 }
 
+/**
+ * xe_guc_flr_prepare() - Prepare GuC for FLR
+ * @guc: The GuC object
+ *
+ * Stop GuC submission and tear down exec queues.
+ */
+void xe_guc_flr_prepare(struct xe_guc *guc)
+{
+	if (!xe_uc_fw_is_loadable(&guc->fw))
+		return;
+
+	xe_guc_submit_stop(guc);
+	xe_guc_submit_pause_abort(guc);
+}
+
+/**
+ * xe_guc_reinit() - Re-initialize GuC after FLR
+ * @guc: The GuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_guc_reinit(struct xe_guc *guc)
+{
+	if (!xe_uc_fw_is_loadable(&guc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&guc->fw);
+}
+
 int xe_guc_reset_prepare(struct xe_guc *guc)
 {
 	return xe_guc_submit_reset_prepare(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 02514914f404..0eea9277439a 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -32,10 +32,12 @@
 struct drm_printer;
 
 void xe_guc_comm_init_early(struct xe_guc *guc);
+void xe_guc_flr_prepare(struct xe_guc *guc);
 int xe_guc_init_noalloc(struct xe_guc *guc);
 int xe_guc_init(struct xe_guc *guc);
 int xe_guc_init_post_hwconfig(struct xe_guc *guc);
 int xe_guc_post_load_init(struct xe_guc *guc);
+int xe_guc_reinit(struct xe_guc *guc);
 int xe_guc_reset(struct xe_guc *guc);
 int xe_guc_upload(struct xe_guc *guc);
 int xe_guc_min_load_for_hwconfig(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
index 57afe21444b1..c73e1acbd091 100644
--- a/drivers/gpu/drm/xe/xe_huc.c
+++ b/drivers/gpu/drm/xe/xe_huc.c
@@ -296,6 +296,20 @@ void xe_huc_sanitize(struct xe_huc *huc)
 	xe_uc_fw_sanitize(&huc->fw);
 }
 
+/**
+ * xe_huc_reinit() - Re-initialize HuC after FLR
+ * @huc: The HuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_huc_reinit(struct xe_huc *huc)
+{
+	if (!xe_uc_fw_is_loadable(&huc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&huc->fw);
+}
+
 void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
 {
 	struct xe_gt *gt = huc_to_gt(huc);
diff --git a/drivers/gpu/drm/xe/xe_huc.h b/drivers/gpu/drm/xe/xe_huc.h
index fa1c45e70443..cb1a770b4a9c 100644
--- a/drivers/gpu/drm/xe/xe_huc.h
+++ b/drivers/gpu/drm/xe/xe_huc.h
@@ -19,6 +19,7 @@ enum xe_huc_auth_types {
 
 int xe_huc_init(struct xe_huc *huc);
 int xe_huc_init_post_hwconfig(struct xe_huc *huc);
+int xe_huc_reinit(struct xe_huc *huc);
 int xe_huc_upload(struct xe_huc *huc);
 int xe_huc_auth(struct xe_huc *huc, enum xe_huc_auth_types type);
 bool xe_huc_is_authenticated(struct xe_huc *huc, enum xe_huc_auth_types type);
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 75091bde0d50..6eca002d385e 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -15,6 +15,7 @@
 #include "xe_guc_pc.h"
 #include "xe_guc_rc.h"
 #include "xe_guc_engine_activity.h"
+#include "xe_guc_submit.h"
 #include "xe_huc.h"
 #include "xe_sriov.h"
 #include "xe_wopcm.h"
@@ -275,6 +276,44 @@ static void uc_reset_wait(struct xe_uc *uc)
 		goto again;
 }
 
+/**
+ * xe_uc_flr_prepare() - Prepare uCs for FLR
+ * @uc: The uC object
+ *
+ * Tear down pending work and stop all uCs.
+ */
+void xe_uc_flr_prepare(struct xe_uc *uc)
+{
+	/* TODO: Sanitize GSC firmware */
+	xe_assert(uc_to_xe(uc), IS_DGFX(uc_to_xe(uc)));
+
+	xe_uc_reset_prepare(uc);
+	xe_guc_flr_prepare(&uc->guc);
+	xe_uc_stop(uc);
+	xe_uc_sanitize(uc);
+}
+
+/**
+ * xe_uc_reinit() - Re-initialize uCs after FLR
+ * @uc: The uC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_reinit(struct xe_uc *uc)
+{
+	int ret;
+
+	ret = xe_guc_reinit(&uc->guc);
+	if (ret)
+		return ret;
+
+	ret = xe_huc_reinit(&uc->huc);
+	if (ret)
+		return ret;
+
+	return xe_gsc_reinit(&uc->gsc);
+}
+
 void xe_uc_suspend_prepare(struct xe_uc *uc)
 {
 	xe_gsc_wait_for_worker_completion(&uc->gsc);
diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
index 255a54a8f876..e06f7937111f 100644
--- a/drivers/gpu/drm/xe/xe_uc.h
+++ b/drivers/gpu/drm/xe/xe_uc.h
@@ -8,10 +8,12 @@
 
 struct xe_uc;
 
+void xe_uc_flr_prepare(struct xe_uc *uc);
 int xe_uc_init_noalloc(struct xe_uc *uc);
 int xe_uc_init(struct xe_uc *uc);
 int xe_uc_init_post_hwconfig(struct xe_uc *uc);
 int xe_uc_load_hw(struct xe_uc *uc);
+int xe_uc_reinit(struct xe_uc *uc);
 int xe_uc_reset_prepare(struct xe_uc *uc);
 void xe_uc_runtime_resume(struct xe_uc *uc);
 void xe_uc_runtime_suspend(struct xe_uc *uc);
-- 
2.43.0

[PATCH v6 4/8] drm/xe/bo_evict: Introduce xe_bo_restore_map()

[Raag Jadav]

PCIe FLR clears all hardware state along with GGTT mappings of all
existing bos. Iterate over early and late kernel bo list and restore
their GGTT mappings in hardware, so that driver can make use of them
during re-initialization after PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_bo_evict.c | 51 +++++++++++++++++++++++++++-----
 drivers/gpu/drm/xe/xe_bo_evict.h |  2 ++
 2 files changed, 45 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
index 7661fca7f278..fa75140c88fe 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.c
+++ b/drivers/gpu/drm/xe/xe_bo_evict.c
@@ -189,14 +189,8 @@ int xe_bo_evict_all(struct xe_device *xe)
 				     xe_bo_evict_pinned);
 }
 
-static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+static int xe_bo_map_ggtt(struct xe_bo *bo)
 {
-	int ret;
-
-	ret = xe_bo_restore_pinned(bo);
-	if (ret)
-		return ret;
-
 	if (bo->flags & XE_BO_FLAG_GGTT) {
 		struct xe_tile *tile;
 		u8 id;
@@ -212,6 +206,41 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
 	return 0;
 }
 
+/**
+ * xe_bo_restore_map() - Restore GGTT mappings of kernel bos
+ * @xe: xe device
+ *
+ * PCIe FLR clears all hardware state along with GGTT mappings of all
+ * existing bos. Iterate over early and late kernel bo list and restore
+ * their GGTT mappings in hardware, so that driver can make use of them
+ * during re-initialization after PCIe FLR.
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_bo_restore_map(struct xe_device *xe)
+{
+	int ret;
+
+	ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
+				    &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
+	if (!ret)
+		ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
+					    &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
+
+	return ret;
+}
+
+static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+{
+	int ret;
+
+	ret = xe_bo_restore_pinned(bo);
+	if (ret)
+		return ret;
+
+	return xe_bo_map_ggtt(bo);
+}
+
 /**
  * xe_bo_restore_early - restore early phase kernel BOs to VRAM
  *
@@ -270,7 +299,13 @@ int xe_bo_restore_late(struct xe_device *xe)
 	return ret;
 }
 
-static void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
+/**
+ * xe_bo_pci_dev_remove_pinned() - Unmap external bos
+ * @xe: xe device
+ *
+ * Drop dma mappings of all external pinned bos.
+ */
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
 {
 	struct xe_tile *tile;
 	unsigned int id;
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
index e8385cb7f5e9..d4f5b87243e7 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.h
+++ b/drivers/gpu/drm/xe/xe_bo_evict.h
@@ -14,7 +14,9 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
 void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
 int xe_bo_restore_early(struct xe_device *xe);
 int xe_bo_restore_late(struct xe_device *xe);
+int xe_bo_restore_map(struct xe_device *xe);
 
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe);
 void xe_bo_pci_dev_remove_all(struct xe_device *xe);
 
 int xe_bo_pinned_init(struct xe_device *xe);
-- 
2.43.0

[PATCH v6 5/8] drm/xe/exec_queue: Introduce xe_exec_queue_reinit()

[Raag Jadav]

In preparation of usecases which require re-initializing exec queue
after PCIe FLR, introduce xe_exec_queue_reinit() helper. All the exec
queue LCRs already exist but the context is lost on PCIe FLR and needs
re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
v6: Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 42 +++++++++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_exec_queue.h |  1 +
 drivers/gpu/drm/xe/xe_lrc.c        | 17 ++++++++++++
 drivers/gpu/drm/xe/xe_lrc.h        |  2 ++
 4 files changed, 58 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 071b8c41df43..bb43522380b4 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -331,9 +331,8 @@ static void __xe_exec_queue_fini(struct xe_exec_queue *q)
 		xe_lrc_put(q->lrc[i]);
 }
 
-static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+static u32 xe_lrc_init_flags(struct xe_exec_queue *q, u32 exec_queue_flags)
 {
-	int i, err;
 	u32 flags = 0;
 
 	/*
@@ -356,6 +355,13 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	if (q->flags & EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX)
 		flags |= XE_LRC_DISABLE_STATE_CACHE_PERF_FIX;
 
+	return flags;
+}
+
+static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+{
+	int i, err;
+
 	err = q->ops->init(q);
 	if (err)
 		return err;
@@ -379,8 +385,8 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 
 			marker = xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
 
-			lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
-					    xe_lrc_ring_size(), q->msix_vec, flags);
+			lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state, xe_lrc_ring_size(),
+					    q->msix_vec, xe_lrc_init_flags(q, exec_queue_flags));
 			if (IS_ERR(lrc)) {
 				err = PTR_ERR(lrc);
 				goto err_lrc;
@@ -402,6 +408,34 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	return err;
 }
 
+/**
+ * xe_exec_queue_reinit() - Re-initialize exec queue
+ * @q: exec queue to re-initialize
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_exec_queue_reinit(struct xe_exec_queue *q)
+{
+	int i, err;
+
+	/* TODO: Re-initialize GSC and PXP queues */
+	xe_assert(gt_to_xe(q->gt), IS_DGFX(gt_to_xe(q->gt)));
+	/* Re-initialization only allowed for kernel queues */
+	xe_assert(gt_to_xe(q->gt), q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+	/* Re-initialize submission backend */
+	q->ops->reinit(q);
+
+	for (i = 0; i < q->width; i++) {
+		err = xe_lrc_reinit(q->lrc[i], q->hwe, q->vm, q->replay_state,
+				    q->msix_vec, xe_lrc_init_flags(q, q->flags));
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
 /**
  * xe_exec_queue_create() - Create an exec queue
  * @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index a82d99bd77bc..445867d4da26 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -34,6 +34,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
 void xe_exec_queue_fini(struct xe_exec_queue *q);
 void xe_exec_queue_destroy(struct kref *ref);
 void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance);
+int xe_exec_queue_reinit(struct xe_exec_queue *q);
 
 static inline struct xe_exec_queue *
 xe_exec_queue_get_unless_zero(struct xe_exec_queue *q)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index c725cde4508d..deb650b99d8a 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1593,6 +1593,23 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct
 	return err;
 }
 
+/**
+ * xe_lrc_reinit() - Re-initialize LRC
+ * @lrc: Pointer to the LRC
+ * @hwe: Hardware Engine
+ * @vm: The VM (address space)
+ * @replay_state: GPU hang replay state
+ * @msix_vec: MSI-X interrupt vector (for platforms that support it)
+ * @init_flags: LRC initialization flags
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_lrc_reinit(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+		  void *replay_state, u16 msix_vec, u32 init_flags)
+{
+	return xe_lrc_ctx_init(lrc, hwe, vm, replay_state, msix_vec, init_flags);
+}
+
 static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
 		       void *replay_state, u32 ring_size, u16 msix_vec, u32 init_flags)
 {
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index e7c975f9e2d9..514355ce3d6a 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -53,6 +53,8 @@ struct xe_lrc_snapshot {
 
 struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
 			     void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);
+int xe_lrc_reinit(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+		  void *replay_state, u16 msix_vec, u32 init_flags);
 void xe_lrc_destroy(struct kref *ref);
 
 /**
-- 
2.43.0

[PATCH v6 6/8] drm/xe/migrate: Introduce xe_migrate_reinit()

[Raag Jadav]

In preparation of usecases which require re-initializing migrate context
after PCIe FLR, introduce xe_migrate_reinit() helper. Migrate exec queue
and pt_bo already exist in migrate structure but since their contents live
on VRAM, they are lost on PCIe FLR and need re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_gt.c      | 10 ++++++++++
 drivers/gpu/drm/xe/xe_migrate.c | 12 ++++++++++++
 drivers/gpu/drm/xe/xe_migrate.h |  1 +
 3 files changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index b3efbdd12827..6d6f5a10fe85 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -943,6 +943,16 @@ void xe_gt_flr_prepare(struct xe_gt *gt)
  */
 int xe_gt_reinit(struct xe_gt *gt)
 {
+	int err;
+
+	if (xe_gt_is_main_type(gt)) {
+		struct xe_tile *tile = gt_to_tile(gt);
+
+		err = xe_migrate_reinit(tile->migrate);
+		if (err)
+			return err;
+	}
+
 	return xe_uc_reinit(&gt->uc);
 }
 
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index a87fbc1e9fb1..8d548a7bd07f 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -454,6 +454,18 @@ static int xe_migrate_lock_prepare_vm(struct xe_tile *tile, struct xe_migrate *m
 	return err;
 }
 
+/**
+ * xe_migrate_reinit() - Re-initialize a migrate context
+ * @m: The migration context
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_migrate_reinit(struct xe_migrate *m)
+{
+	xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
+	return xe_exec_queue_reinit(m->q);
+}
+
 /**
  * xe_migrate_init() - Initialize a migrate context
  * @m: The migration context
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 965c45889c72..49d8c717b957 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -112,6 +112,7 @@ struct xe_migrate_pt_update {
 
 struct xe_migrate *xe_migrate_alloc(struct xe_tile *tile);
 int xe_migrate_init(struct xe_migrate *m);
+int xe_migrate_reinit(struct xe_migrate *m);
 
 struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m,
 				     unsigned long npages,
-- 
2.43.0

[PATCH v6 7/8] drm/xe/pm: Introduce xe_device_suspend/resume()

[Raag Jadav]

PCIe FLR prepare/re-initialization flows pretty much reflect system
suspend/resume flows with a few notable exceptions. Repurpose existing
flows for PCIe FLR with an explicit flag to distinguish between them.

Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v6: Repurpose system suspend/resume flow for FLR (Daniele)
---
 drivers/gpu/drm/xe/xe_device.c | 150 +++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_device.h |   2 +
 drivers/gpu/drm/xe/xe_pm.c     | 103 ++--------------------
 3 files changed, 160 insertions(+), 95 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 4b45b617a039..65f107ba1410 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -39,6 +39,7 @@
 #include "xe_force_wake.h"
 #include "xe_ggtt.h"
 #include "xe_gt.h"
+#include "xe_gt_idle.h"
 #include "xe_gt_mcr.h"
 #include "xe_gt_printk.h"
 #include "xe_gt_sriov_vf.h"
@@ -66,6 +67,7 @@
 #include "xe_soc_remapper.h"
 #include "xe_survivability_mode.h"
 #include "xe_sriov.h"
+#include "xe_sriov_vf_ccs.h"
 #include "xe_svm.h"
 #include "xe_sysctrl.h"
 #include "xe_tile.h"
@@ -1486,3 +1488,151 @@ struct xe_vm *xe_device_asid_to_vm(struct xe_device *xe, u32 asid)
 
 	return vm;
 }
+
+/**
+ * xe_device_suspend() - Common helper for system suspend and FLR prepare
+ * @xe: xe device instance
+ * @flr: indicate FLR prepare
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_device_suspend(struct xe_device *xe, bool flr)
+{
+	struct xe_gt *gt;
+	u8 id;
+	int err;
+
+	err = xe_pxp_pm_suspend(xe->pxp);
+	if (err)
+		return err;
+
+	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
+	for_each_gt(gt, xe, id)
+		xe_gt_suspend_prepare(gt);
+
+	if (flr) {
+		for_each_gt(gt, xe, id)
+			xe_gt_flr_prepare(gt);
+	} else {
+		xe_display_pm_suspend(xe);
+
+		/* FIXME: Super racey... */
+		err = xe_bo_evict_all(xe);
+		if (err)
+			goto err_display;
+
+		for_each_gt(gt, xe, id) {
+			err = xe_gt_suspend(gt);
+			if (err)
+				goto err_display;
+		}
+	}
+
+	xe_irq_suspend(xe);
+
+	if (flr) {
+		/* TODO: Drop all user bos */
+		xe_bo_pci_dev_remove_pinned(xe);
+
+		unmap_mapping_range(xe->drm.anon_inode->i_mapping, 0, 0, 1);
+	} else {
+		xe_display_pm_suspend_late(xe);
+
+		xe_i2c_pm_suspend(xe);
+	}
+
+	return 0;
+
+err_display:
+	xe_display_pm_resume(xe);
+	xe_pxp_pm_resume(xe->pxp);
+	return err;
+}
+
+/**
+ * xe_device_resume() - Common helper for System resume and re-initialization post FLR
+ * @xe: xe device instance
+ * @flr: indicate re-initialization post FLR
+ *
+ * Return: 0 on success
+ */
+int xe_device_resume(struct xe_device *xe, bool flr)
+{
+	struct xe_tile *tile;
+	struct xe_gt *gt;
+	u8 id;
+	int err;
+
+	for_each_gt(gt, xe, id)
+		xe_gt_idle_disable_c6(gt);
+
+	for_each_tile(tile, xe, id)
+		xe_wa_apply_tile_workarounds(tile);
+
+	err = xe_pcode_ready(xe, true);
+	if (err)
+		return err;
+
+	assert_lmem_ready(xe);
+
+	if (flr) {
+		err = xe_bo_restore_map(xe);
+		if (err)
+			return err;
+
+		for_each_gt(gt, xe, id) {
+			err = xe_gt_reinit(gt);
+			if (err)
+				return err;
+		}
+	} else {
+		xe_display_pm_resume_early(xe);
+
+		/*
+		 * This only restores pinned memory which is the memory required for the
+		 * GT(s) to resume.
+		 */
+		err = xe_bo_restore_early(xe);
+		if (err)
+			return err;
+	}
+
+	xe_i2c_pm_resume(xe, true);
+
+	xe_sysctrl_pm_resume(xe);
+
+	xe_irq_resume(xe);
+
+	for_each_gt(gt, xe, id) {
+		err = xe_gt_resume(gt);
+		if (err)
+			break;
+	}
+
+	if (flr) {
+		if (err)
+			return err;
+	} else {
+		/*
+		 * Try to bring up display before bailing from GT resume failure,
+		 * so we don't leave the user clueless with a blank screen.
+		 */
+		xe_display_pm_resume(xe);
+		if (err)
+			return err;
+
+		err = xe_bo_restore_late(xe);
+		if (err)
+			return err;
+
+		if (IS_VF_CCS_READY(xe))
+			xe_sriov_vf_ccs_register_context(xe);
+	}
+
+	xe_pxp_pm_resume(xe->pxp);
+
+	xe_late_bind_fw_load(&xe->late_bind);
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 555c191f7510..d776e620cdf3 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -48,7 +48,9 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
 int xe_device_probe_early(struct xe_device *xe);
 int xe_device_probe(struct xe_device *xe);
 void xe_device_remove(struct xe_device *xe);
+int xe_device_resume(struct xe_device *xe, bool flr);
 void xe_device_shutdown(struct xe_device *xe);
+int xe_device_suspend(struct xe_device *xe, bool flr);
 
 void xe_device_wmb(struct xe_device *xe);
 
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index d4672eb07476..e2097e4524af 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -171,52 +171,18 @@ static void xe_rpm_lockmap_release(const struct xe_device *xe)
  */
 int xe_pm_suspend(struct xe_device *xe)
 {
-	struct xe_gt *gt;
-	u8 id;
 	int err;
 
 	drm_dbg(&xe->drm, "Suspending device\n");
 	xe_pm_block_begin_signalling();
 	trace_xe_pm_suspend(xe, __builtin_return_address(0));
 
-	err = xe_pxp_pm_suspend(xe->pxp);
+	err = xe_device_suspend(xe, false);
 	if (err)
-		goto err;
+		drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
+	else
+		drm_dbg(&xe->drm, "Device suspended\n");
 
-	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
-
-	for_each_gt(gt, xe, id)
-		xe_gt_suspend_prepare(gt);
-
-	xe_display_pm_suspend(xe);
-
-	/* FIXME: Super racey... */
-	err = xe_bo_evict_all(xe);
-	if (err)
-		goto err_display;
-
-	for_each_gt(gt, xe, id) {
-		err = xe_gt_suspend(gt);
-		if (err)
-			goto err_display;
-	}
-
-	xe_irq_suspend(xe);
-
-	xe_display_pm_suspend_late(xe);
-
-	xe_i2c_pm_suspend(xe);
-
-	drm_dbg(&xe->drm, "Device suspended\n");
-	xe_pm_block_end_signalling();
-
-	return 0;
-
-err_display:
-	xe_display_pm_resume(xe);
-	xe_pxp_pm_resume(xe->pxp);
-err:
-	drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
 	xe_pm_block_end_signalling();
 	return err;
 }
@@ -229,71 +195,18 @@ int xe_pm_suspend(struct xe_device *xe)
  */
 int xe_pm_resume(struct xe_device *xe)
 {
-	struct xe_tile *tile;
-	struct xe_gt *gt;
-	u8 id;
 	int err;
 
 	xe_pm_block_begin_signalling();
 	drm_dbg(&xe->drm, "Resuming device\n");
 	trace_xe_pm_resume(xe, __builtin_return_address(0));
 
-	for_each_gt(gt, xe, id)
-		xe_gt_idle_disable_c6(gt);
-
-	for_each_tile(tile, xe, id)
-		xe_wa_apply_tile_workarounds(tile);
-
-	err = xe_pcode_ready(xe, true);
-	if (err)
-		return err;
-
-	xe_display_pm_resume_early(xe);
-
-	/*
-	 * This only restores pinned memory which is the memory required for the
-	 * GT(s) to resume.
-	 */
-	err = xe_bo_restore_early(xe);
-	if (err)
-		goto err;
-
-	xe_i2c_pm_resume(xe, true);
-
-	xe_sysctrl_pm_resume(xe);
-
-	xe_irq_resume(xe);
-
-	for_each_gt(gt, xe, id) {
-		err = xe_gt_resume(gt);
-		if (err)
-			break;
-	}
-
-	/*
-	 * Try to bring up display before bailing from GT resume failure,
-	 * so we don't leave the user clueless with a blank screen.
-	 */
-	xe_display_pm_resume(xe);
-	if (err)
-		goto err;
-
-	err = xe_bo_restore_late(xe);
+	err = xe_device_resume(xe, false);
 	if (err)
-		goto err;
-
-	xe_pxp_pm_resume(xe->pxp);
-
-	if (IS_VF_CCS_READY(xe))
-		xe_sriov_vf_ccs_register_context(xe);
-
-	xe_late_bind_fw_load(&xe->late_bind);
+		drm_dbg(&xe->drm, "Device resume failed %d\n", err);
+	else
+		drm_dbg(&xe->drm, "Device resumed\n");
 
-	drm_dbg(&xe->drm, "Device resumed\n");
-	xe_pm_block_end_signalling();
-	return 0;
-err:
-	drm_dbg(&xe->drm, "Device resume failed %d\n", err);
 	xe_pm_block_end_signalling();
 	return err;
 }
-- 
2.43.0

[PATCH v6 8/8] drm/xe/pci: Introduce PCIe FLR

[Raag Jadav]

With bare minimum pieces in place, we can finally introduce PCIe Function
Level Reset (FLR) support which re-initializes hardware state without the
need for reloading the driver from userspace. All VRAM contents are lost
along with hardware state and driver takes care of recreating the required
kernel bos as part of re-initialization, but user still needs to recreate
user bos and reload context after PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v2: Spell out Function Level Reset (Jani)
v5: Prevent PM ref leak for wedged device (Matthew Brost)
v6: Add PCIe FLR documentation (Daniele)
---
 drivers/gpu/drm/xe/Makefile          |   1 +
 drivers/gpu/drm/xe/xe_device_types.h |   3 +
 drivers/gpu/drm/xe/xe_pci.c          |   1 +
 drivers/gpu/drm/xe/xe_pci.h          |   2 +
 drivers/gpu/drm/xe/xe_pci_error.c    | 113 +++++++++++++++++++++++++++
 5 files changed, 120 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 8e31b14239ec..3fceda259834 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -101,6 +101,7 @@ xe-y += xe_bb.o \
 	xe_page_reclaim.o \
 	xe_pat.o \
 	xe_pci.o \
+	xe_pci_error.o \
 	xe_pci_rebar.o \
 	xe_pcode.o \
 	xe_pm.o \
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 89437de3001a..cbd5682ab833 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -477,6 +477,9 @@ struct xe_device {
 	/** @pxp: Encapsulate Protected Xe Path support */
 	struct xe_pxp *pxp;
 
+	/** @flr_prepared: Prepared for function-reset */
+	bool flr_prepared;
+
 	/** @needs_flr_on_fini: requests function-reset on fini */
 	bool needs_flr_on_fini;
 
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 41435f84aeb2..278c2860a4f6 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1329,6 +1329,7 @@ static struct pci_driver xe_pci_driver = {
 #ifdef CONFIG_PM_SLEEP
 	.driver.pm = &xe_pm_ops,
 #endif
+	.err_handler = &xe_pci_err_handlers,
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_pci.h b/drivers/gpu/drm/xe/xe_pci.h
index 11bcc5fe2c5b..85e85e8508c3 100644
--- a/drivers/gpu/drm/xe/xe_pci.h
+++ b/drivers/gpu/drm/xe/xe_pci.h
@@ -8,6 +8,8 @@
 
 struct pci_dev;
 
+extern const struct pci_error_handlers xe_pci_err_handlers;
+
 int xe_register_pci_driver(void);
 void xe_unregister_pci_driver(void);
 struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev);
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
new file mode 100644
index 000000000000..a53d5873ae83
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_device.h"
+#include "xe_printk.h"
+
+/**
+ * DOC: PCI Error Handling
+ *
+ * Xe driver registers PCI callbacks which are called by PCI core in case of
+ * bus errors or resets.
+ *
+ * Currently only PCI Function Level Reset (FLR) callbacks are supported. Since
+ * most of the Endpoint Function state is lost on PCIe FLR, the flow is pretty
+ * much similar to system suspend/resume flow with a few notable exceptions.
+ *
+ * Prepare phase:
+ * - Temporarily wedge the device to prevent userspace access
+ * - Stop accepting new submissions
+ * - Kill exec queues which signals all fences and frees in-flight jobs
+ * - Skip memory eviction due to untrustworthy VRAM contents
+ * - Remove all memory mappings since VRAM contents will be lost
+ *
+ * Re-initialization phase:
+ * - Recreate kernel bos due to skipped eviction in prepare phase
+ * - Restore kernel queues which were killed in prepare phase
+ * - Reload all uC firmwares
+ * - Bring up GT and unwedge to allow userspace access
+ *
+ * Since VRAM contents are lost, the user is expected to recreate user memory
+ * and reload context.
+ *
+ * TODO: Add PCIe error handling callbacks using similar flow.
+ *
+ * Current implementation is only limited to re-initializing GT.
+ * This needs to be extended for a lot of components listed below.
+ *
+ * - Proper re-initialization of GSC and PXP for integrated platforms
+ * - SRIOV cases which need synchronization between PF and VF
+ * - Re-initialization of all child devices of Xe
+ * - User memory handling and MM corner cases
+ * - Display
+ */
+
+#define XE_FLR_SKIP(xe_, pdev_)		(!IS_DGFX(xe_) || IS_SRIOV_VF(xe_) || pci_num_vf(pdev_) || \
+					 xe_->info.probe_display)
+
+static void xe_pci_reset_prepare(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	if (XE_FLR_SKIP(xe, pdev)) {
+		xe_err(xe, "PCIe FLR not supported\n");
+		return;
+	}
+
+	if (xe_device_wedged(xe)) {
+		xe_err(xe, "PCIe FLR aborted, device in unexpected state\n");
+		return;
+	}
+
+	/* Wedge the device to prevent userspace access but don't send the event yet */
+	atomic_set(&xe->wedged.flag, 1);
+
+	/*
+	 * The hardware could be in corrupted state and access unreliable, but we try to
+	 * update data structures and cleanup any pending work to avoid side effects during
+	 * PCIe FLR. This will be similar to system suspend flow but without eviction.
+	 */
+	if (xe_device_suspend(xe, true)) {
+		xe_err(xe, "Failed to prepare for PCIe FLR\n");
+		return;
+	}
+
+	xe->flr_prepared = true;
+	xe_info(xe, "Prepared for PCIe FLR\n");
+}
+
+static void xe_pci_reset_done(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	if (XE_FLR_SKIP(xe, pdev))
+		return;
+
+	if (!xe_device_wedged(xe) || !xe->flr_prepared)
+		return;
+
+	/* Unprepare early in case we fail */
+	xe->flr_prepared = false;
+
+	/*
+	 * We already have the data structures intact, so try to re-initialize the device.
+	 * This will be similar to system resume flow, except we'll also need to recreate
+	 * kernel bos and restore kernel queues.
+	 */
+	if (xe_device_resume(xe, true)) {
+		xe_err(xe, "Re-initialization failed\n");
+		return;
+	}
+
+	/* Unwedge to allow userspace access */
+	atomic_set(&xe->wedged.flag, 0);
+
+	xe_info(xe, "Re-initialization success\n");
+}
+
+const struct pci_error_handlers xe_pci_err_handlers = {
+	.reset_prepare = xe_pci_reset_prepare,
+	.reset_done = xe_pci_reset_done,
+};
-- 
2.43.0

✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev6)

[Patchwork]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev6)
URL   : https://patchwork.freedesktop.org/series/162055/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 2f368e568876fa97bfa19f469b04c1101a97beb0
Author: Raag Jadav <raag.jadav@intel.com>
Date:   Thu Apr 23 15:30:17 2026 +0530

    drm/xe/pci: Introduce PCIe FLR
    
    With bare minimum pieces in place, we can finally introduce PCIe Function
    Level Reset (FLR) support which re-initializes hardware state without the
    need for reloading the driver from userspace. All VRAM contents are lost
    along with hardware state and driver takes care of recreating the required
    kernel bos as part of re-initialization, but user still needs to recreate
    user bos and reload context after PCIe FLR.
    
    Signed-off-by: Raag Jadav <raag.jadav@intel.com>
    Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
+ /mt/dim checkpatch 95fbbe4877e1543975d0d0f18a7cc0074416be41 drm-intel
f47498c70a1a drm/xe/uc_fw: Allow re-initializing firmware
2ad2176d4b05 drm/xe/guc_submit: Introduce guc_exec_queue_reinit()
f5366cfa6209 drm/xe/gt: Introduce FLR helpers
039a70cac294 drm/xe/bo_evict: Introduce xe_bo_restore_map()
52acedf63a26 drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
0869e34577b6 drm/xe/migrate: Introduce xe_migrate_reinit()
0f2fc0bd4dc9 drm/xe/pm: Introduce xe_device_suspend/resume()
2f368e568876 drm/xe/pci: Introduce PCIe FLR
-:68: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#68: 
new file mode 100644

-:119: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'xe_' - possible side-effects?
#119: FILE: drivers/gpu/drm/xe/xe_pci_error.c:47:
+#define XE_FLR_SKIP(xe_, pdev_)		(!IS_DGFX(xe_) || IS_SRIOV_VF(xe_) || pci_num_vf(pdev_) || \
+					 xe_->info.probe_display)

total: 0 errors, 1 warnings, 1 checks, 144 lines checked

✓ CI.KUnit: success for Introduce Xe PCIe FLR (rev6)

[Patchwork]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev6)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:09:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:09:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:09:58] Starting KUnit Kernel (1/1)...
[10:09:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:09:58] ================== guc_buf (11 subtests) ===================
[10:09:58] [PASSED] test_smallest
[10:09:58] [PASSED] test_largest
[10:09:58] [PASSED] test_granular
[10:09:58] [PASSED] test_unique
[10:09:58] [PASSED] test_overlap
[10:09:58] [PASSED] test_reusable
[10:09:58] [PASSED] test_too_big
[10:09:58] [PASSED] test_flush
[10:09:58] [PASSED] test_lookup
[10:09:58] [PASSED] test_data
[10:09:58] [PASSED] test_class
[10:09:58] ===================== [PASSED] guc_buf =====================
[10:09:58] =================== guc_dbm (7 subtests) ===================
[10:09:58] [PASSED] test_empty
[10:09:58] [PASSED] test_default
[10:09:58] ======================== test_size  ========================
[10:09:58] [PASSED] 4
[10:09:58] [PASSED] 8
[10:09:58] [PASSED] 32
[10:09:58] [PASSED] 256
[10:09:58] ==================== [PASSED] test_size ====================
[10:09:58] ======================= test_reuse  ========================
[10:09:58] [PASSED] 4
[10:09:58] [PASSED] 8
[10:09:58] [PASSED] 32
[10:09:58] [PASSED] 256
[10:09:58] =================== [PASSED] test_reuse ====================
[10:09:58] =================== test_range_overlap  ====================
[10:09:58] [PASSED] 4
[10:09:58] [PASSED] 8
[10:09:58] [PASSED] 32
[10:09:58] [PASSED] 256
[10:09:58] =============== [PASSED] test_range_overlap ================
[10:09:58] =================== test_range_compact  ====================
[10:09:58] [PASSED] 4
[10:09:58] [PASSED] 8
[10:09:58] [PASSED] 32
[10:09:58] [PASSED] 256
[10:09:58] =============== [PASSED] test_range_compact ================
[10:09:58] ==================== test_range_spare  =====================
[10:09:58] [PASSED] 4
[10:09:58] [PASSED] 8
[10:09:58] [PASSED] 32
[10:09:58] [PASSED] 256
[10:09:58] ================ [PASSED] test_range_spare =================
[10:09:58] ===================== [PASSED] guc_dbm =====================
[10:09:58] =================== guc_idm (6 subtests) ===================
[10:09:58] [PASSED] bad_init
[10:09:58] [PASSED] no_init
[10:09:58] [PASSED] init_fini
[10:09:58] [PASSED] check_used
[10:09:58] [PASSED] check_quota
[10:09:58] [PASSED] check_all
[10:09:58] ===================== [PASSED] guc_idm =====================
[10:09:58] ================== no_relay (3 subtests) ===================
[10:09:58] [PASSED] xe_drops_guc2pf_if_not_ready
[10:09:58] [PASSED] xe_drops_guc2vf_if_not_ready
[10:09:58] [PASSED] xe_rejects_send_if_not_ready
[10:09:58] ==================== [PASSED] no_relay =====================
[10:09:58] ================== pf_relay (14 subtests) ==================
[10:09:58] [PASSED] pf_rejects_guc2pf_too_short
[10:09:58] [PASSED] pf_rejects_guc2pf_too_long
[10:09:58] [PASSED] pf_rejects_guc2pf_no_payload
[10:09:58] [PASSED] pf_fails_no_payload
[10:09:58] [PASSED] pf_fails_bad_origin
[10:09:58] [PASSED] pf_fails_bad_type
[10:09:58] [PASSED] pf_txn_reports_error
[10:09:58] [PASSED] pf_txn_sends_pf2guc
[10:09:58] [PASSED] pf_sends_pf2guc
[10:09:58] [SKIPPED] pf_loopback_nop
[10:09:58] [SKIPPED] pf_loopback_echo
[10:09:58] [SKIPPED] pf_loopback_fail
[10:09:58] [SKIPPED] pf_loopback_busy
[10:09:58] [SKIPPED] pf_loopback_retry
[10:09:58] ==================== [PASSED] pf_relay =====================
[10:09:58] ================== vf_relay (3 subtests) ===================
[10:09:58] [PASSED] vf_rejects_guc2vf_too_short
[10:09:58] [PASSED] vf_rejects_guc2vf_too_long
[10:09:58] [PASSED] vf_rejects_guc2vf_no_payload
[10:09:58] ==================== [PASSED] vf_relay =====================
[10:09:58] ================ pf_gt_config (9 subtests) =================
[10:09:58] [PASSED] fair_contexts_1vf
[10:09:58] [PASSED] fair_doorbells_1vf
[10:09:58] [PASSED] fair_ggtt_1vf
[10:09:58] ====================== fair_vram_1vf  ======================
[10:09:58] [PASSED] 3.50 GiB
[10:09:58] [PASSED] 11.5 GiB
[10:09:58] [PASSED] 15.5 GiB
[10:09:58] [PASSED] 31.5 GiB
[10:09:58] [PASSED] 63.5 GiB
[10:09:58] [PASSED] 1.91 GiB
[10:09:58] ================== [PASSED] fair_vram_1vf ==================
[10:09:58] ================ fair_vram_1vf_admin_only  =================
[10:09:58] [PASSED] 3.50 GiB
[10:09:58] [PASSED] 11.5 GiB
[10:09:58] [PASSED] 15.5 GiB
[10:09:58] [PASSED] 31.5 GiB
[10:09:58] [PASSED] 63.5 GiB
[10:09:58] [PASSED] 1.91 GiB
[10:09:58] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:09:58] ====================== fair_contexts  ======================
[10:09:58] [PASSED] 1 VF
[10:09:58] [PASSED] 2 VFs
[10:09:58] [PASSED] 3 VFs
[10:09:58] [PASSED] 4 VFs
[10:09:58] [PASSED] 5 VFs
[10:09:58] [PASSED] 6 VFs
[10:09:58] [PASSED] 7 VFs
[10:09:58] [PASSED] 8 VFs
[10:09:58] [PASSED] 9 VFs
[10:09:58] [PASSED] 10 VFs
[10:09:58] [PASSED] 11 VFs
[10:09:58] [PASSED] 12 VFs
[10:09:58] [PASSED] 13 VFs
[10:09:58] [PASSED] 14 VFs
[10:09:58] [PASSED] 15 VFs
[10:09:58] [PASSED] 16 VFs
[10:09:58] [PASSED] 17 VFs
[10:09:58] [PASSED] 18 VFs
[10:09:58] [PASSED] 19 VFs
[10:09:58] [PASSED] 20 VFs
[10:09:58] [PASSED] 21 VFs
[10:09:58] [PASSED] 22 VFs
[10:09:58] [PASSED] 23 VFs
[10:09:58] [PASSED] 24 VFs
[10:09:58] [PASSED] 25 VFs
[10:09:58] [PASSED] 26 VFs
[10:09:58] [PASSED] 27 VFs
[10:09:58] [PASSED] 28 VFs
[10:09:58] [PASSED] 29 VFs
[10:09:58] [PASSED] 30 VFs
[10:09:58] [PASSED] 31 VFs
[10:09:58] [PASSED] 32 VFs
[10:09:58] [PASSED] 33 VFs
[10:09:58] [PASSED] 34 VFs
[10:09:58] [PASSED] 35 VFs
[10:09:58] [PASSED] 36 VFs
[10:09:58] [PASSED] 37 VFs
[10:09:58] [PASSED] 38 VFs
[10:09:58] [PASSED] 39 VFs
[10:09:58] [PASSED] 40 VFs
[10:09:58] [PASSED] 41 VFs
[10:09:58] [PASSED] 42 VFs
[10:09:58] [PASSED] 43 VFs
[10:09:58] [PASSED] 44 VFs
[10:09:58] [PASSED] 45 VFs
[10:09:58] [PASSED] 46 VFs
[10:09:58] [PASSED] 47 VFs
[10:09:58] [PASSED] 48 VFs
[10:09:58] [PASSED] 49 VFs
[10:09:58] [PASSED] 50 VFs
[10:09:58] [PASSED] 51 VFs
[10:09:58] [PASSED] 52 VFs
[10:09:58] [PASSED] 53 VFs
[10:09:58] [PASSED] 54 VFs
[10:09:58] [PASSED] 55 VFs
[10:09:58] [PASSED] 56 VFs
[10:09:58] [PASSED] 57 VFs
[10:09:58] [PASSED] 58 VFs
[10:09:58] [PASSED] 59 VFs
[10:09:58] [PASSED] 60 VFs
[10:09:58] [PASSED] 61 VFs
[10:09:58] [PASSED] 62 VFs
[10:09:58] [PASSED] 63 VFs
[10:09:58] ================== [PASSED] fair_contexts ==================
[10:09:58] ===================== fair_doorbells  ======================
[10:09:58] [PASSED] 1 VF
[10:09:58] [PASSED] 2 VFs
[10:09:58] [PASSED] 3 VFs
[10:09:58] [PASSED] 4 VFs
[10:09:58] [PASSED] 5 VFs
[10:09:58] [PASSED] 6 VFs
[10:09:58] [PASSED] 7 VFs
[10:09:58] [PASSED] 8 VFs
[10:09:58] [PASSED] 9 VFs
[10:09:58] [PASSED] 10 VFs
[10:09:58] [PASSED] 11 VFs
[10:09:58] [PASSED] 12 VFs
[10:09:58] [PASSED] 13 VFs
[10:09:58] [PASSED] 14 VFs
[10:09:58] [PASSED] 15 VFs
[10:09:58] [PASSED] 16 VFs
[10:09:58] [PASSED] 17 VFs
[10:09:58] [PASSED] 18 VFs
[10:09:58] [PASSED] 19 VFs
[10:09:58] [PASSED] 20 VFs
[10:09:58] [PASSED] 21 VFs
[10:09:58] [PASSED] 22 VFs
[10:09:58] [PASSED] 23 VFs
[10:09:58] [PASSED] 24 VFs
[10:09:58] [PASSED] 25 VFs
[10:09:58] [PASSED] 26 VFs
[10:09:58] [PASSED] 27 VFs
[10:09:58] [PASSED] 28 VFs
[10:09:58] [PASSED] 29 VFs
[10:09:58] [PASSED] 30 VFs
[10:09:58] [PASSED] 31 VFs
[10:09:58] [PASSED] 32 VFs
[10:09:58] [PASSED] 33 VFs
[10:09:58] [PASSED] 34 VFs
[10:09:58] [PASSED] 35 VFs
[10:09:58] [PASSED] 36 VFs
[10:09:58] [PASSED] 37 VFs
[10:09:58] [PASSED] 38 VFs
[10:09:58] [PASSED] 39 VFs
[10:09:58] [PASSED] 40 VFs
[10:09:58] [PASSED] 41 VFs
[10:09:58] [PASSED] 42 VFs
[10:09:58] [PASSED] 43 VFs
[10:09:58] [PASSED] 44 VFs
[10:09:58] [PASSED] 45 VFs
[10:09:58] [PASSED] 46 VFs
[10:09:58] [PASSED] 47 VFs
[10:09:58] [PASSED] 48 VFs
[10:09:58] [PASSED] 49 VFs
[10:09:58] [PASSED] 50 VFs
[10:09:58] [PASSED] 51 VFs
[10:09:58] [PASSED] 52 VFs
[10:09:58] [PASSED] 53 VFs
[10:09:58] [PASSED] 54 VFs
[10:09:58] [PASSED] 55 VFs
[10:09:58] [PASSED] 56 VFs
[10:09:58] [PASSED] 57 VFs
[10:09:58] [PASSED] 58 VFs
[10:09:58] [PASSED] 59 VFs
[10:09:58] [PASSED] 60 VFs
[10:09:58] [PASSED] 61 VFs
[10:09:58] [PASSED] 62 VFs
[10:09:58] [PASSED] 63 VFs
[10:09:58] ================= [PASSED] fair_doorbells ==================
[10:09:58] ======================== fair_ggtt  ========================
[10:09:58] [PASSED] 1 VF
[10:09:58] [PASSED] 2 VFs
[10:09:58] [PASSED] 3 VFs
[10:09:58] [PASSED] 4 VFs
[10:09:58] [PASSED] 5 VFs
[10:09:58] [PASSED] 6 VFs
[10:09:58] [PASSED] 7 VFs
[10:09:58] [PASSED] 8 VFs
[10:09:58] [PASSED] 9 VFs
[10:09:58] [PASSED] 10 VFs
[10:09:58] [PASSED] 11 VFs
[10:09:58] [PASSED] 12 VFs
[10:09:58] [PASSED] 13 VFs
[10:09:58] [PASSED] 14 VFs
[10:09:58] [PASSED] 15 VFs
[10:09:58] [PASSED] 16 VFs
[10:09:58] [PASSED] 17 VFs
[10:09:58] [PASSED] 18 VFs
[10:09:58] [PASSED] 19 VFs
[10:09:58] [PASSED] 20 VFs
[10:09:58] [PASSED] 21 VFs
[10:09:58] [PASSED] 22 VFs
[10:09:58] [PASSED] 23 VFs
[10:09:58] [PASSED] 24 VFs
[10:09:58] [PASSED] 25 VFs
[10:09:58] [PASSED] 26 VFs
[10:09:58] [PASSED] 27 VFs
[10:09:58] [PASSED] 28 VFs
[10:09:58] [PASSED] 29 VFs
[10:09:58] [PASSED] 30 VFs
[10:09:58] [PASSED] 31 VFs
[10:09:58] [PASSED] 32 VFs
[10:09:58] [PASSED] 33 VFs
[10:09:58] [PASSED] 34 VFs
[10:09:58] [PASSED] 35 VFs
[10:09:58] [PASSED] 36 VFs
[10:09:58] [PASSED] 37 VFs
[10:09:58] [PASSED] 38 VFs
[10:09:58] [PASSED] 39 VFs
[10:09:58] [PASSED] 40 VFs
[10:09:58] [PASSED] 41 VFs
[10:09:58] [PASSED] 42 VFs
[10:09:58] [PASSED] 43 VFs
[10:09:58] [PASSED] 44 VFs
[10:09:58] [PASSED] 45 VFs
[10:09:58] [PASSED] 46 VFs
[10:09:58] [PASSED] 47 VFs
[10:09:58] [PASSED] 48 VFs
[10:09:58] [PASSED] 49 VFs
[10:09:58] [PASSED] 50 VFs
[10:09:58] [PASSED] 51 VFs
[10:09:58] [PASSED] 52 VFs
[10:09:58] [PASSED] 53 VFs
[10:09:58] [PASSED] 54 VFs
[10:09:58] [PASSED] 55 VFs
[10:09:58] [PASSED] 56 VFs
[10:09:58] [PASSED] 57 VFs
[10:09:58] [PASSED] 58 VFs
[10:09:58] [PASSED] 59 VFs
[10:09:58] [PASSED] 60 VFs
[10:09:58] [PASSED] 61 VFs
[10:09:58] [PASSED] 62 VFs
[10:09:58] [PASSED] 63 VFs
[10:09:58] ==================== [PASSED] fair_ggtt ====================
[10:09:58] ======================== fair_vram  ========================
[10:09:58] [PASSED] 1 VF
[10:09:58] [PASSED] 2 VFs
[10:09:58] [PASSED] 3 VFs
[10:09:58] [PASSED] 4 VFs
[10:09:58] [PASSED] 5 VFs
[10:09:58] [PASSED] 6 VFs
[10:09:58] [PASSED] 7 VFs
[10:09:58] [PASSED] 8 VFs
[10:09:58] [PASSED] 9 VFs
[10:09:58] [PASSED] 10 VFs
[10:09:58] [PASSED] 11 VFs
[10:09:58] [PASSED] 12 VFs
[10:09:58] [PASSED] 13 VFs
[10:09:58] [PASSED] 14 VFs
[10:09:58] [PASSED] 15 VFs
[10:09:58] [PASSED] 16 VFs
[10:09:58] [PASSED] 17 VFs
[10:09:58] [PASSED] 18 VFs
[10:09:58] [PASSED] 19 VFs
[10:09:58] [PASSED] 20 VFs
[10:09:58] [PASSED] 21 VFs
[10:09:58] [PASSED] 22 VFs
[10:09:58] [PASSED] 23 VFs
[10:09:58] [PASSED] 24 VFs
[10:09:58] [PASSED] 25 VFs
[10:09:58] [PASSED] 26 VFs
[10:09:58] [PASSED] 27 VFs
[10:09:58] [PASSED] 28 VFs
[10:09:58] [PASSED] 29 VFs
[10:09:58] [PASSED] 30 VFs
[10:09:58] [PASSED] 31 VFs
[10:09:58] [PASSED] 32 VFs
[10:09:58] [PASSED] 33 VFs
[10:09:58] [PASSED] 34 VFs
[10:09:58] [PASSED] 35 VFs
[10:09:58] [PASSED] 36 VFs
[10:09:58] [PASSED] 37 VFs
[10:09:58] [PASSED] 38 VFs
[10:09:58] [PASSED] 39 VFs
[10:09:58] [PASSED] 40 VFs
[10:09:58] [PASSED] 41 VFs
[10:09:58] [PASSED] 42 VFs
[10:09:58] [PASSED] 43 VFs
[10:09:58] [PASSED] 44 VFs
[10:09:58] [PASSED] 45 VFs
[10:09:58] [PASSED] 46 VFs
[10:09:58] [PASSED] 47 VFs
[10:09:58] [PASSED] 48 VFs
[10:09:58] [PASSED] 49 VFs
[10:09:58] [PASSED] 50 VFs
[10:09:58] [PASSED] 51 VFs
[10:09:58] [PASSED] 52 VFs
[10:09:58] [PASSED] 53 VFs
[10:09:58] [PASSED] 54 VFs
[10:09:58] [PASSED] 55 VFs
[10:09:58] [PASSED] 56 VFs
[10:09:58] [PASSED] 57 VFs
[10:09:58] [PASSED] 58 VFs
[10:09:58] [PASSED] 59 VFs
[10:09:58] [PASSED] 60 VFs
[10:09:58] [PASSED] 61 VFs
[10:09:58] [PASSED] 62 VFs
[10:09:58] [PASSED] 63 VFs
[10:09:58] ==================== [PASSED] fair_vram ====================
[10:09:58] ================== [PASSED] pf_gt_config ===================
[10:09:58] ===================== lmtt (1 subtest) =====================
[10:09:58] ======================== test_ops  =========================
[10:09:58] [PASSED] 2-level
[10:09:58] [PASSED] multi-level
[10:09:58] ==================== [PASSED] test_ops =====================
[10:09:58] ====================== [PASSED] lmtt =======================
[10:09:58] ================= pf_service (11 subtests) =================
[10:09:58] [PASSED] pf_negotiate_any
[10:09:58] [PASSED] pf_negotiate_base_match
[10:09:58] [PASSED] pf_negotiate_base_newer
[10:09:58] [PASSED] pf_negotiate_base_next
[10:09:58] [SKIPPED] pf_negotiate_base_older
[10:09:58] [PASSED] pf_negotiate_base_prev
[10:09:58] [PASSED] pf_negotiate_latest_match
[10:09:58] [PASSED] pf_negotiate_latest_newer
[10:09:58] [PASSED] pf_negotiate_latest_next
[10:09:58] [SKIPPED] pf_negotiate_latest_older
[10:09:58] [SKIPPED] pf_negotiate_latest_prev
[10:09:58] =================== [PASSED] pf_service ====================
[10:09:58] ================= xe_guc_g2g (2 subtests) ==================
[10:09:58] ============== xe_live_guc_g2g_kunit_default  ==============
[10:09:58] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:09:58] ============== xe_live_guc_g2g_kunit_allmem  ===============
[10:09:58] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:09:58] =================== [SKIPPED] xe_guc_g2g ===================
[10:09:58] =================== xe_mocs (2 subtests) ===================
[10:09:58] ================ xe_live_mocs_kernel_kunit  ================
[10:09:58] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:09:58] ================ xe_live_mocs_reset_kunit  =================
[10:09:58] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:09:58] ==================== [SKIPPED] xe_mocs =====================
[10:09:58] ================= xe_migrate (2 subtests) ==================
[10:09:58] ================= xe_migrate_sanity_kunit  =================
[10:09:58] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:09:58] ================== xe_validate_ccs_kunit  ==================
[10:09:58] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:09:58] =================== [SKIPPED] xe_migrate ===================
[10:09:58] ================== xe_dma_buf (1 subtest) ==================
[10:09:58] ==================== xe_dma_buf_kunit  =====================
[10:09:58] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:09:58] =================== [SKIPPED] xe_dma_buf ===================
[10:09:58] ================= xe_bo_shrink (1 subtest) =================
[10:09:58] =================== xe_bo_shrink_kunit  ====================
[10:09:58] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:09:58] ================== [SKIPPED] xe_bo_shrink ==================
[10:09:58] ==================== xe_bo (2 subtests) ====================
[10:09:58] ================== xe_ccs_migrate_kunit  ===================
[10:09:58] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:09:58] ==================== xe_bo_evict_kunit  ====================
[10:09:58] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:09:58] ===================== [SKIPPED] xe_bo ======================
[10:09:58] ==================== args (13 subtests) ====================
[10:09:58] [PASSED] count_args_test
[10:09:58] [PASSED] call_args_example
[10:09:58] [PASSED] call_args_test
[10:09:58] [PASSED] drop_first_arg_example
[10:09:58] [PASSED] drop_first_arg_test
[10:09:58] [PASSED] first_arg_example
[10:09:58] [PASSED] first_arg_test
[10:09:58] [PASSED] last_arg_example
[10:09:58] [PASSED] last_arg_test
[10:09:58] [PASSED] pick_arg_example
[10:09:58] [PASSED] if_args_example
[10:09:58] [PASSED] if_args_test
[10:09:58] [PASSED] sep_comma_example
[10:09:58] ====================== [PASSED] args =======================
[10:09:58] =================== xe_pci (3 subtests) ====================
[10:09:58] ==================== check_graphics_ip  ====================
[10:09:58] [PASSED] 12.00 Xe_LP
[10:09:58] [PASSED] 12.10 Xe_LP+
[10:09:58] [PASSED] 12.55 Xe_HPG
[10:09:58] [PASSED] 12.60 Xe_HPC
[10:09:58] [PASSED] 12.70 Xe_LPG
[10:09:58] [PASSED] 12.71 Xe_LPG
[10:09:58] [PASSED] 12.74 Xe_LPG+
[10:09:58] [PASSED] 20.01 Xe2_HPG
[10:09:58] [PASSED] 20.02 Xe2_HPG
[10:09:58] [PASSED] 20.04 Xe2_LPG
[10:09:58] [PASSED] 30.00 Xe3_LPG
[10:09:58] [PASSED] 30.01 Xe3_LPG
[10:09:58] [PASSED] 30.03 Xe3_LPG
[10:09:58] [PASSED] 30.04 Xe3_LPG
[10:09:58] [PASSED] 30.05 Xe3_LPG
[10:09:58] [PASSED] 35.10 Xe3p_LPG
[10:09:58] [PASSED] 35.11 Xe3p_XPC
[10:09:58] ================ [PASSED] check_graphics_ip ================
[10:09:58] ===================== check_media_ip  ======================
[10:09:58] [PASSED] 12.00 Xe_M
[10:09:58] [PASSED] 12.55 Xe_HPM
[10:09:58] [PASSED] 13.00 Xe_LPM+
[10:09:58] [PASSED] 13.01 Xe2_HPM
[10:09:58] [PASSED] 20.00 Xe2_LPM
[10:09:58] [PASSED] 30.00 Xe3_LPM
[10:09:58] [PASSED] 30.02 Xe3_LPM
[10:09:58] [PASSED] 35.00 Xe3p_LPM
[10:09:58] [PASSED] 35.03 Xe3p_HPM
[10:09:58] ================= [PASSED] check_media_ip ==================
[10:09:58] =================== check_platform_desc  ===================
[10:09:58] [PASSED] 0x9A60 (TIGERLAKE)
[10:09:58] [PASSED] 0x9A68 (TIGERLAKE)
[10:09:58] [PASSED] 0x9A70 (TIGERLAKE)
[10:09:58] [PASSED] 0x9A40 (TIGERLAKE)
[10:09:58] [PASSED] 0x9A49 (TIGERLAKE)
[10:09:58] [PASSED] 0x9A59 (TIGERLAKE)
[10:09:58] [PASSED] 0x9A78 (TIGERLAKE)
[10:09:58] [PASSED] 0x9AC0 (TIGERLAKE)
[10:09:58] [PASSED] 0x9AC9 (TIGERLAKE)
[10:09:58] [PASSED] 0x9AD9 (TIGERLAKE)
[10:09:58] [PASSED] 0x9AF8 (TIGERLAKE)
[10:09:58] [PASSED] 0x4C80 (ROCKETLAKE)
[10:09:58] [PASSED] 0x4C8A (ROCKETLAKE)
[10:09:58] [PASSED] 0x4C8B (ROCKETLAKE)
[10:09:58] [PASSED] 0x4C8C (ROCKETLAKE)
[10:09:58] [PASSED] 0x4C90 (ROCKETLAKE)
[10:09:58] [PASSED] 0x4C9A (ROCKETLAKE)
[10:09:58] [PASSED] 0x4680 (ALDERLAKE_S)
[10:09:58] [PASSED] 0x4682 (ALDERLAKE_S)
[10:09:58] [PASSED] 0x4688 (ALDERLAKE_S)
[10:09:58] [PASSED] 0x468A (ALDERLAKE_S)
[10:09:58] [PASSED] 0x468B (ALDERLAKE_S)
[10:09:58] [PASSED] 0x4690 (ALDERLAKE_S)
[10:09:58] [PASSED] 0x4692 (ALDERLAKE_S)
[10:09:58] [PASSED] 0x4693 (ALDERLAKE_S)
[10:09:58] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46AA (ALDERLAKE_P)
[10:09:58] [PASSED] 0x462A (ALDERLAKE_P)
[10:09:58] [PASSED] 0x4626 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x4628 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:09:58] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:09:58] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:09:58] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:09:58] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:09:58] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:09:58] [PASSED] 0xA721 (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA720 (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:09:58] [PASSED] 0xA780 (ALDERLAKE_S)
[10:09:58] [PASSED] 0xA781 (ALDERLAKE_S)
[10:09:58] [PASSED] 0xA782 (ALDERLAKE_S)
[10:09:58] [PASSED] 0xA783 (ALDERLAKE_S)
[10:09:58] [PASSED] 0xA788 (ALDERLAKE_S)
[10:09:58] [PASSED] 0xA789 (ALDERLAKE_S)
[10:09:58] [PASSED] 0xA78A (ALDERLAKE_S)
[10:09:58] [PASSED] 0xA78B (ALDERLAKE_S)
[10:09:58] [PASSED] 0x4905 (DG1)
[10:09:58] [PASSED] 0x4906 (DG1)
[10:09:58] [PASSED] 0x4907 (DG1)
[10:09:58] [PASSED] 0x4908 (DG1)
[10:09:58] [PASSED] 0x4909 (DG1)
[10:09:58] [PASSED] 0x56C0 (DG2)
[10:09:58] [PASSED] 0x56C2 (DG2)
[10:09:58] [PASSED] 0x56C1 (DG2)
[10:09:58] [PASSED] 0x7D51 (METEORLAKE)
[10:09:58] [PASSED] 0x7DD1 (METEORLAKE)
[10:09:58] [PASSED] 0x7D41 (METEORLAKE)
[10:09:58] [PASSED] 0x7D67 (METEORLAKE)
[10:09:58] [PASSED] 0xB640 (METEORLAKE)
[10:09:58] [PASSED] 0x56A0 (DG2)
[10:09:58] [PASSED] 0x56A1 (DG2)
[10:09:58] [PASSED] 0x56A2 (DG2)
[10:09:58] [PASSED] 0x56BE (DG2)
[10:09:58] [PASSED] 0x56BF (DG2)
[10:09:58] [PASSED] 0x5690 (DG2)
[10:09:58] [PASSED] 0x5691 (DG2)
[10:09:58] [PASSED] 0x5692 (DG2)
[10:09:58] [PASSED] 0x56A5 (DG2)
[10:09:58] [PASSED] 0x56A6 (DG2)
[10:09:58] [PASSED] 0x56B0 (DG2)
[10:09:58] [PASSED] 0x56B1 (DG2)
[10:09:58] [PASSED] 0x56BA (DG2)
[10:09:58] [PASSED] 0x56BB (DG2)
[10:09:58] [PASSED] 0x56BC (DG2)
[10:09:58] [PASSED] 0x56BD (DG2)
[10:09:58] [PASSED] 0x5693 (DG2)
[10:09:58] [PASSED] 0x5694 (DG2)
[10:09:58] [PASSED] 0x5695 (DG2)
[10:09:58] [PASSED] 0x56A3 (DG2)
[10:09:58] [PASSED] 0x56A4 (DG2)
[10:09:58] [PASSED] 0x56B2 (DG2)
[10:09:58] [PASSED] 0x56B3 (DG2)
[10:09:58] [PASSED] 0x5696 (DG2)
[10:09:58] [PASSED] 0x5697 (DG2)
[10:09:58] [PASSED] 0xB69 (PVC)
[10:09:58] [PASSED] 0xB6E (PVC)
[10:09:58] [PASSED] 0xBD4 (PVC)
[10:09:58] [PASSED] 0xBD5 (PVC)
[10:09:58] [PASSED] 0xBD6 (PVC)
[10:09:58] [PASSED] 0xBD7 (PVC)
[10:09:58] [PASSED] 0xBD8 (PVC)
[10:09:58] [PASSED] 0xBD9 (PVC)
[10:09:58] [PASSED] 0xBDA (PVC)
[10:09:58] [PASSED] 0xBDB (PVC)
[10:09:58] [PASSED] 0xBE0 (PVC)
[10:09:58] [PASSED] 0xBE1 (PVC)
[10:09:58] [PASSED] 0xBE5 (PVC)
[10:09:58] [PASSED] 0x7D40 (METEORLAKE)
[10:09:58] [PASSED] 0x7D45 (METEORLAKE)
[10:09:58] [PASSED] 0x7D55 (METEORLAKE)
[10:09:58] [PASSED] 0x7D60 (METEORLAKE)
[10:09:58] [PASSED] 0x7DD5 (METEORLAKE)
[10:09:58] [PASSED] 0x6420 (LUNARLAKE)
[10:09:58] [PASSED] 0x64A0 (LUNARLAKE)
[10:09:58] [PASSED] 0x64B0 (LUNARLAKE)
[10:09:58] [PASSED] 0xE202 (BATTLEMAGE)
[10:09:58] [PASSED] 0xE209 (BATTLEMAGE)
[10:09:58] [PASSED] 0xE20B (BATTLEMAGE)
[10:09:58] [PASSED] 0xE20C (BATTLEMAGE)
[10:09:58] [PASSED] 0xE20D (BATTLEMAGE)
[10:09:58] [PASSED] 0xE210 (BATTLEMAGE)
[10:09:58] [PASSED] 0xE211 (BATTLEMAGE)
[10:09:58] [PASSED] 0xE212 (BATTLEMAGE)
[10:09:58] [PASSED] 0xE216 (BATTLEMAGE)
[10:09:58] [PASSED] 0xE220 (BATTLEMAGE)
[10:09:58] [PASSED] 0xE221 (BATTLEMAGE)
[10:09:58] [PASSED] 0xE222 (BATTLEMAGE)
[10:09:58] [PASSED] 0xE223 (BATTLEMAGE)
[10:09:58] [PASSED] 0xB080 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB081 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB082 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB083 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB084 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB085 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB086 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB087 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB08F (PANTHERLAKE)
[10:09:58] [PASSED] 0xB090 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:09:58] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:09:58] [PASSED] 0xFD80 (PANTHERLAKE)
[10:09:58] [PASSED] 0xFD81 (PANTHERLAKE)
[10:09:58] [PASSED] 0xD740 (NOVALAKE_S)
[10:09:58] [PASSED] 0xD741 (NOVALAKE_S)
[10:09:58] [PASSED] 0xD742 (NOVALAKE_S)
[10:09:58] [PASSED] 0xD743 (NOVALAKE_S)
[10:09:58] [PASSED] 0xD744 (NOVALAKE_S)
[10:09:58] [PASSED] 0xD745 (NOVALAKE_S)
[10:09:58] [PASSED] 0x674C (CRESCENTISLAND)
[10:09:58] [PASSED] 0xD750 (NOVALAKE_P)
[10:09:58] [PASSED] 0xD751 (NOVALAKE_P)
[10:09:58] [PASSED] 0xD752 (NOVALAKE_P)
[10:09:58] [PASSED] 0xD753 (NOVALAKE_P)
[10:09:58] [PASSED] 0xD754 (NOVALAKE_P)
[10:09:58] [PASSED] 0xD755 (NOVALAKE_P)
[10:09:58] [PASSED] 0xD756 (NOVALAKE_P)
[10:09:58] [PASSED] 0xD757 (NOVALAKE_P)
[10:09:58] [PASSED] 0xD75F (NOVALAKE_P)
[10:09:58] =============== [PASSED] check_platform_desc ===============
[10:09:58] ===================== [PASSED] xe_pci ======================
[10:09:58] =================== xe_rtp (2 subtests) ====================
[10:09:58] =============== xe_rtp_process_to_sr_tests  ================
[10:09:58] [PASSED] coalesce-same-reg
[10:09:58] [PASSED] no-match-no-add
[10:09:58] [PASSED] match-or
[10:09:58] [PASSED] match-or-xfail
[10:09:58] [PASSED] no-match-no-add-multiple-rules
[10:09:58] [PASSED] two-regs-two-entries
[10:09:58] [PASSED] clr-one-set-other
[10:09:58] [PASSED] set-field
[10:09:58] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[10:09:58] [PASSED] conflict-not-disjoint
[10:09:58] [PASSED] conflict-reg-type
[10:09:58] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:09:58] ================== xe_rtp_process_tests  ===================
[10:09:58] [PASSED] active1
[10:09:58] [PASSED] active2
[10:09:58] [PASSED] active-inactive
[10:09:58] [PASSED] inactive-active
[10:09:58] [PASSED] inactive-1st_or_active-inactive
[10:09:58] [PASSED] inactive-2nd_or_active-inactive
[10:09:58] [PASSED] inactive-last_or_active-inactive
[10:09:58] [PASSED] inactive-no_or_active-inactive
[10:09:58] ============== [PASSED] xe_rtp_process_tests ===============
[10:09:58] ===================== [PASSED] xe_rtp ======================
[10:09:58] ==================== xe_wa (1 subtest) =====================
[10:09:58] ======================== xe_wa_gt  =========================
[10:09:58] [PASSED] TIGERLAKE B0
[10:09:58] [PASSED] DG1 A0
[10:09:58] [PASSED] DG1 B0
[10:09:58] [PASSED] ALDERLAKE_S A0
[10:09:58] [PASSED] ALDERLAKE_S B0
[10:09:58] [PASSED] ALDERLAKE_S C0
[10:09:58] [PASSED] ALDERLAKE_S D0
[10:09:58] [PASSED] ALDERLAKE_P A0
[10:09:58] [PASSED] ALDERLAKE_P B0
[10:09:58] [PASSED] ALDERLAKE_P C0
[10:09:58] [PASSED] ALDERLAKE_S RPLS D0
[10:09:58] [PASSED] ALDERLAKE_P RPLU E0
[10:09:58] [PASSED] DG2 G10 C0
[10:09:58] [PASSED] DG2 G11 B1
[10:09:58] [PASSED] DG2 G12 A1
[10:09:58] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:09:58] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:09:58] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:09:58] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:09:58] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:09:58] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:09:58] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:09:58] ==================== [PASSED] xe_wa_gt =====================
[10:09:58] ====================== [PASSED] xe_wa ======================
[10:09:58] ============================================================
[10:09:58] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[10:09:58] Elapsed time: 35.837s total, 4.279s configuring, 30.941s building, 0.602s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:09:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:10:00] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:10:24] Starting KUnit Kernel (1/1)...
[10:10:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:10:24] ============ drm_test_pick_cmdline (2 subtests) ============
[10:10:24] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:10:24] =============== drm_test_pick_cmdline_named  ===============
[10:10:24] [PASSED] NTSC
[10:10:24] [PASSED] NTSC-J
[10:10:24] [PASSED] PAL
[10:10:24] [PASSED] PAL-M
[10:10:24] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:10:24] ============== [PASSED] drm_test_pick_cmdline ==============
[10:10:24] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:10:24] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:10:24] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:10:24] =========== drm_validate_clone_mode (2 subtests) ===========
[10:10:24] ============== drm_test_check_in_clone_mode  ===============
[10:10:24] [PASSED] in_clone_mode
[10:10:24] [PASSED] not_in_clone_mode
[10:10:24] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:10:24] =============== drm_test_check_valid_clones  ===============
[10:10:24] [PASSED] not_in_clone_mode
[10:10:24] [PASSED] valid_clone
[10:10:24] [PASSED] invalid_clone
[10:10:24] =========== [PASSED] drm_test_check_valid_clones ===========
[10:10:24] ============= [PASSED] drm_validate_clone_mode =============
[10:10:24] ============= drm_validate_modeset (1 subtest) =============
[10:10:24] [PASSED] drm_test_check_connector_changed_modeset
[10:10:24] ============== [PASSED] drm_validate_modeset ===============
[10:10:24] ====== drm_test_bridge_get_current_state (2 subtests) ======
[10:10:24] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:10:24] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[10:10:24] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:10:24] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:10:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:10:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:10:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[10:10:24] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:10:24] ============== drm_bridge_alloc (2 subtests) ===============
[10:10:24] [PASSED] drm_test_drm_bridge_alloc_basic
[10:10:24] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:10:24] ================ [PASSED] drm_bridge_alloc =================
[10:10:24] ============= drm_cmdline_parser (40 subtests) =============
[10:10:24] [PASSED] drm_test_cmdline_force_d_only
[10:10:24] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:10:24] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:10:24] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:10:24] [PASSED] drm_test_cmdline_force_e_only
[10:10:24] [PASSED] drm_test_cmdline_res
[10:10:24] [PASSED] drm_test_cmdline_res_vesa
[10:10:24] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:10:24] [PASSED] drm_test_cmdline_res_rblank
[10:10:24] [PASSED] drm_test_cmdline_res_bpp
[10:10:24] [PASSED] drm_test_cmdline_res_refresh
[10:10:24] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:10:24] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:10:24] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:10:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:10:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:10:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:10:24] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:10:24] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:10:24] [PASSED] drm_test_cmdline_res_margins_force_on
[10:10:24] [PASSED] drm_test_cmdline_res_vesa_margins
[10:10:24] [PASSED] drm_test_cmdline_name
[10:10:24] [PASSED] drm_test_cmdline_name_bpp
[10:10:24] [PASSED] drm_test_cmdline_name_option
[10:10:24] [PASSED] drm_test_cmdline_name_bpp_option
[10:10:24] [PASSED] drm_test_cmdline_rotate_0
[10:10:24] [PASSED] drm_test_cmdline_rotate_90
[10:10:24] [PASSED] drm_test_cmdline_rotate_180
[10:10:24] [PASSED] drm_test_cmdline_rotate_270
[10:10:24] [PASSED] drm_test_cmdline_hmirror
[10:10:24] [PASSED] drm_test_cmdline_vmirror
[10:10:24] [PASSED] drm_test_cmdline_margin_options
[10:10:24] [PASSED] drm_test_cmdline_multiple_options
[10:10:24] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:10:24] [PASSED] drm_test_cmdline_extra_and_option
[10:10:24] [PASSED] drm_test_cmdline_freestanding_options
[10:10:24] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:10:24] [PASSED] drm_test_cmdline_panel_orientation
[10:10:24] ================ drm_test_cmdline_invalid  =================
[10:10:24] [PASSED] margin_only
[10:10:24] [PASSED] interlace_only
[10:10:24] [PASSED] res_missing_x
[10:10:24] [PASSED] res_missing_y
[10:10:24] [PASSED] res_bad_y
[10:10:24] [PASSED] res_missing_y_bpp
[10:10:24] [PASSED] res_bad_bpp
[10:10:24] [PASSED] res_bad_refresh
[10:10:24] [PASSED] res_bpp_refresh_force_on_off
[10:10:24] [PASSED] res_invalid_mode
[10:10:24] [PASSED] res_bpp_wrong_place_mode
[10:10:24] [PASSED] name_bpp_refresh
[10:10:24] [PASSED] name_refresh
[10:10:24] [PASSED] name_refresh_wrong_mode
[10:10:24] [PASSED] name_refresh_invalid_mode
[10:10:24] [PASSED] rotate_multiple
[10:10:24] [PASSED] rotate_invalid_val
[10:10:24] [PASSED] rotate_truncated
[10:10:24] [PASSED] invalid_option
[10:10:24] [PASSED] invalid_tv_option
[10:10:24] [PASSED] truncated_tv_option
[10:10:24] ============ [PASSED] drm_test_cmdline_invalid =============
[10:10:24] =============== drm_test_cmdline_tv_options  ===============
[10:10:24] [PASSED] NTSC
[10:10:24] [PASSED] NTSC_443
[10:10:24] [PASSED] NTSC_J
[10:10:24] [PASSED] PAL
[10:10:24] [PASSED] PAL_M
[10:10:24] [PASSED] PAL_N
[10:10:24] [PASSED] SECAM
[10:10:24] [PASSED] MONO_525
[10:10:24] [PASSED] MONO_625
[10:10:24] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:10:24] =============== [PASSED] drm_cmdline_parser ================
[10:10:24] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:10:24] [PASSED] drm_test_connector_hdmi_init_valid
[10:10:24] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:10:24] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:10:24] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:10:24] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:10:24] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:10:24] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:10:24] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:10:24] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[10:10:24] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:10:24] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:10:24] [PASSED] supported_formats=0x5 yuv420_allowed=1
[10:10:24] [PASSED] supported_formats=0x5 yuv420_allowed=0
[10:10:24] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:10:24] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:10:24] [PASSED] drm_test_connector_hdmi_init_null_product
[10:10:24] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:10:24] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:10:24] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:10:24] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:10:24] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:10:24] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:10:24] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:10:24] ========= drm_test_connector_hdmi_init_type_valid  =========
[10:10:24] [PASSED] HDMI-A
[10:10:24] [PASSED] HDMI-B
[10:10:24] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:10:24] ======== drm_test_connector_hdmi_init_type_invalid  ========
[10:10:24] [PASSED] Unknown
[10:10:24] [PASSED] VGA
[10:10:24] [PASSED] DVI-I
[10:10:24] [PASSED] DVI-D
[10:10:24] [PASSED] DVI-A
[10:10:24] [PASSED] Composite
[10:10:24] [PASSED] SVIDEO
[10:10:24] [PASSED] LVDS
[10:10:24] [PASSED] Component
[10:10:24] [PASSED] DIN
[10:10:24] [PASSED] DP
[10:10:24] [PASSED] TV
[10:10:24] [PASSED] eDP
[10:10:24] [PASSED] Virtual
[10:10:24] [PASSED] DSI
[10:10:24] [PASSED] DPI
[10:10:24] [PASSED] Writeback
[10:10:24] [PASSED] SPI
[10:10:24] [PASSED] USB
[10:10:24] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:10:24] ============ [PASSED] drmm_connector_hdmi_init =============
[10:10:24] ============= drmm_connector_init (3 subtests) =============
[10:10:24] [PASSED] drm_test_drmm_connector_init
[10:10:24] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:10:24] ========= drm_test_drmm_connector_init_type_valid  =========
[10:10:24] [PASSED] Unknown
[10:10:24] [PASSED] VGA
[10:10:24] [PASSED] DVI-I
[10:10:24] [PASSED] DVI-D
[10:10:24] [PASSED] DVI-A
[10:10:24] [PASSED] Composite
[10:10:24] [PASSED] SVIDEO
[10:10:24] [PASSED] LVDS
[10:10:24] [PASSED] Component
[10:10:24] [PASSED] DIN
[10:10:24] [PASSED] DP
[10:10:24] [PASSED] HDMI-A
[10:10:24] [PASSED] HDMI-B
[10:10:24] [PASSED] TV
[10:10:24] [PASSED] eDP
[10:10:24] [PASSED] Virtual
[10:10:24] [PASSED] DSI
[10:10:24] [PASSED] DPI
[10:10:24] [PASSED] Writeback
[10:10:24] [PASSED] SPI
[10:10:24] [PASSED] USB
[10:10:24] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:10:24] =============== [PASSED] drmm_connector_init ===============
[10:10:24] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_init
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:10:24] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[10:10:24] [PASSED] Unknown
[10:10:24] [PASSED] VGA
[10:10:24] [PASSED] DVI-I
[10:10:24] [PASSED] DVI-D
[10:10:24] [PASSED] DVI-A
[10:10:24] [PASSED] Composite
[10:10:24] [PASSED] SVIDEO
[10:10:24] [PASSED] LVDS
[10:10:24] [PASSED] Component
[10:10:24] [PASSED] DIN
[10:10:24] [PASSED] DP
[10:10:24] [PASSED] HDMI-A
[10:10:24] [PASSED] HDMI-B
[10:10:24] [PASSED] TV
[10:10:24] [PASSED] eDP
[10:10:24] [PASSED] Virtual
[10:10:24] [PASSED] DSI
[10:10:24] [PASSED] DPI
[10:10:24] [PASSED] Writeback
[10:10:24] [PASSED] SPI
[10:10:24] [PASSED] USB
[10:10:24] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:10:24] ======== drm_test_drm_connector_dynamic_init_name  =========
[10:10:24] [PASSED] Unknown
[10:10:24] [PASSED] VGA
[10:10:24] [PASSED] DVI-I
[10:10:24] [PASSED] DVI-D
[10:10:24] [PASSED] DVI-A
[10:10:24] [PASSED] Composite
[10:10:24] [PASSED] SVIDEO
[10:10:24] [PASSED] LVDS
[10:10:24] [PASSED] Component
[10:10:24] [PASSED] DIN
[10:10:24] [PASSED] DP
[10:10:24] [PASSED] HDMI-A
[10:10:24] [PASSED] HDMI-B
[10:10:24] [PASSED] TV
[10:10:24] [PASSED] eDP
[10:10:24] [PASSED] Virtual
[10:10:24] [PASSED] DSI
[10:10:24] [PASSED] DPI
[10:10:24] [PASSED] Writeback
[10:10:24] [PASSED] SPI
[10:10:24] [PASSED] USB
[10:10:24] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:10:24] =========== [PASSED] drm_connector_dynamic_init ============
[10:10:24] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:10:24] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:10:24] ======= drm_connector_dynamic_register (7 subtests) ========
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:10:24] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:10:24] ========= [PASSED] drm_connector_dynamic_register ==========
[10:10:24] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:10:24] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:10:24] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:10:24] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:10:24] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:10:24] ========== drm_test_get_tv_mode_from_name_valid  ===========
[10:10:24] [PASSED] NTSC
[10:10:24] [PASSED] NTSC-443
[10:10:24] [PASSED] NTSC-J
[10:10:24] [PASSED] PAL
[10:10:24] [PASSED] PAL-M
[10:10:24] [PASSED] PAL-N
[10:10:24] [PASSED] SECAM
[10:10:24] [PASSED] Mono
[10:10:24] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:10:24] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:10:24] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:10:24] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:10:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:10:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:10:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:10:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:10:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:10:24] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:10:24] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[10:10:24] [PASSED] VIC 96
[10:10:24] [PASSED] VIC 97
[10:10:24] [PASSED] VIC 101
[10:10:24] [PASSED] VIC 102
[10:10:24] [PASSED] VIC 106
[10:10:24] [PASSED] VIC 107
[10:10:24] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:10:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:10:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:10:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:10:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:10:24] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:10:24] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:10:24] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:10:24] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[10:10:24] [PASSED] Automatic
[10:10:24] [PASSED] Full
[10:10:24] [PASSED] Limited 16:235
[10:10:24] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:10:24] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:10:24] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:10:24] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:10:24] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[10:10:24] [PASSED] RGB
[10:10:24] [PASSED] YUV 4:2:0
[10:10:24] [PASSED] YUV 4:2:2
[10:10:24] [PASSED] YUV 4:4:4
[10:10:24] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:10:24] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:10:24] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:10:24] ============= drm_damage_helper (21 subtests) ==============
[10:10:24] [PASSED] drm_test_damage_iter_no_damage
[10:10:24] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:10:24] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:10:24] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:10:24] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:10:24] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:10:24] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:10:24] [PASSED] drm_test_damage_iter_simple_damage
[10:10:24] [PASSED] drm_test_damage_iter_single_damage
[10:10:24] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:10:24] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:10:24] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:10:24] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:10:24] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:10:24] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:10:24] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:10:24] [PASSED] drm_test_damage_iter_damage
[10:10:24] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:10:24] [PASSED] drm_test_damage_iter_damage_one_outside
[10:10:24] [PASSED] drm_test_damage_iter_damage_src_moved
[10:10:24] [PASSED] drm_test_damage_iter_damage_not_visible
[10:10:24] ================ [PASSED] drm_damage_helper ================
[10:10:24] ============== drm_dp_mst_helper (3 subtests) ==============
[10:10:24] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[10:10:24] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:10:24] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:10:24] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:10:24] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:10:24] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:10:24] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:10:24] ============== drm_test_dp_mst_calc_pbn_div  ===============
[10:10:24] [PASSED] Link rate 2000000 lane count 4
[10:10:24] [PASSED] Link rate 2000000 lane count 2
[10:10:24] [PASSED] Link rate 2000000 lane count 1
[10:10:24] [PASSED] Link rate 1350000 lane count 4
[10:10:24] [PASSED] Link rate 1350000 lane count 2
[10:10:24] [PASSED] Link rate 1350000 lane count 1
[10:10:24] [PASSED] Link rate 1000000 lane count 4
[10:10:24] [PASSED] Link rate 1000000 lane count 2
[10:10:24] [PASSED] Link rate 1000000 lane count 1
[10:10:24] [PASSED] Link rate 810000 lane count 4
[10:10:24] [PASSED] Link rate 810000 lane count 2
[10:10:24] [PASSED] Link rate 810000 lane count 1
[10:10:24] [PASSED] Link rate 540000 lane count 4
[10:10:24] [PASSED] Link rate 540000 lane count 2
[10:10:24] [PASSED] Link rate 540000 lane count 1
[10:10:24] [PASSED] Link rate 270000 lane count 4
[10:10:24] [PASSED] Link rate 270000 lane count 2
[10:10:24] [PASSED] Link rate 270000 lane count 1
[10:10:24] [PASSED] Link rate 162000 lane count 4
[10:10:24] [PASSED] Link rate 162000 lane count 2
[10:10:24] [PASSED] Link rate 162000 lane count 1
[10:10:24] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:10:24] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[10:10:24] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:10:24] [PASSED] DP_POWER_UP_PHY with port number
[10:10:24] [PASSED] DP_POWER_DOWN_PHY with port number
[10:10:24] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:10:24] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:10:24] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:10:24] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:10:24] [PASSED] DP_QUERY_PAYLOAD with port number
[10:10:24] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:10:24] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:10:24] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:10:24] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:10:24] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:10:24] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:10:24] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:10:24] [PASSED] DP_REMOTE_I2C_READ with port number
[10:10:24] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:10:24] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:10:24] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:10:24] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:10:24] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:10:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:10:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:10:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:10:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:10:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:10:24] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:10:24] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:10:24] ================ [PASSED] drm_dp_mst_helper ================
[10:10:24] ================== drm_exec (7 subtests) ===================
[10:10:24] [PASSED] sanitycheck
[10:10:24] [PASSED] test_lock
[10:10:24] [PASSED] test_lock_unlock
[10:10:24] [PASSED] test_duplicates
[10:10:24] [PASSED] test_prepare
[10:10:24] [PASSED] test_prepare_array
[10:10:24] [PASSED] test_multiple_loops
[10:10:24] ==================== [PASSED] drm_exec =====================
[10:10:24] =========== drm_format_helper_test (17 subtests) ===========
[10:10:24] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:10:24] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:10:24] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:10:24] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:10:24] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:10:24] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:10:24] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:10:24] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:10:24] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:10:24] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:10:24] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:10:24] ============== drm_test_fb_xrgb8888_to_mono  ===============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:10:24] ==================== drm_test_fb_swab  =====================
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ================ [PASSED] drm_test_fb_swab =================
[10:10:24] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:10:24] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[10:10:24] [PASSED] single_pixel_source_buffer
[10:10:24] [PASSED] single_pixel_clip_rectangle
[10:10:24] [PASSED] well_known_colors
[10:10:24] [PASSED] destination_pitch
[10:10:24] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:10:24] ================= drm_test_fb_clip_offset  =================
[10:10:24] [PASSED] pass through
[10:10:24] [PASSED] horizontal offset
[10:10:24] [PASSED] vertical offset
[10:10:24] [PASSED] horizontal and vertical offset
[10:10:24] [PASSED] horizontal offset (custom pitch)
[10:10:24] [PASSED] vertical offset (custom pitch)
[10:10:24] [PASSED] horizontal and vertical offset (custom pitch)
[10:10:24] ============= [PASSED] drm_test_fb_clip_offset =============
[10:10:24] =================== drm_test_fb_memcpy  ====================
[10:10:24] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:10:24] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:10:24] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:10:24] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:10:24] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:10:24] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:10:24] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:10:24] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:10:24] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:10:24] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:10:24] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:10:24] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:10:24] =============== [PASSED] drm_test_fb_memcpy ================
[10:10:24] ============= [PASSED] drm_format_helper_test ==============
[10:10:24] ================= drm_format (18 subtests) =================
[10:10:24] [PASSED] drm_test_format_block_width_invalid
[10:10:24] [PASSED] drm_test_format_block_width_one_plane
[10:10:24] [PASSED] drm_test_format_block_width_two_plane
[10:10:24] [PASSED] drm_test_format_block_width_three_plane
[10:10:24] [PASSED] drm_test_format_block_width_tiled
[10:10:24] [PASSED] drm_test_format_block_height_invalid
[10:10:24] [PASSED] drm_test_format_block_height_one_plane
[10:10:24] [PASSED] drm_test_format_block_height_two_plane
[10:10:24] [PASSED] drm_test_format_block_height_three_plane
[10:10:24] [PASSED] drm_test_format_block_height_tiled
[10:10:24] [PASSED] drm_test_format_min_pitch_invalid
[10:10:24] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:10:24] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:10:24] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:10:24] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:10:24] [PASSED] drm_test_format_min_pitch_two_plane
[10:10:24] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:10:24] [PASSED] drm_test_format_min_pitch_tiled
[10:10:24] =================== [PASSED] drm_format ====================
[10:10:24] ============== drm_framebuffer (10 subtests) ===============
[10:10:24] ========== drm_test_framebuffer_check_src_coords  ==========
[10:10:24] [PASSED] Success: source fits into fb
[10:10:24] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:10:24] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:10:24] [PASSED] Fail: overflowing fb with source width
[10:10:24] [PASSED] Fail: overflowing fb with source height
[10:10:24] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:10:24] [PASSED] drm_test_framebuffer_cleanup
[10:10:24] =============== drm_test_framebuffer_create  ===============
[10:10:24] [PASSED] ABGR8888 normal sizes
[10:10:24] [PASSED] ABGR8888 max sizes
[10:10:24] [PASSED] ABGR8888 pitch greater than min required
[10:10:24] [PASSED] ABGR8888 pitch less than min required
[10:10:24] [PASSED] ABGR8888 Invalid width
[10:10:24] [PASSED] ABGR8888 Invalid buffer handle
[10:10:24] [PASSED] No pixel format
[10:10:24] [PASSED] ABGR8888 Width 0
[10:10:24] [PASSED] ABGR8888 Height 0
[10:10:24] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:10:24] [PASSED] ABGR8888 Large buffer offset
[10:10:24] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:10:24] [PASSED] ABGR8888 Invalid flag
[10:10:24] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:10:24] [PASSED] ABGR8888 Valid buffer modifier
[10:10:24] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:10:24] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:10:24] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:10:24] [PASSED] NV12 Normal sizes
[10:10:24] [PASSED] NV12 Max sizes
[10:10:24] [PASSED] NV12 Invalid pitch
[10:10:24] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:10:24] [PASSED] NV12 different  modifier per-plane
[10:10:24] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:10:24] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:10:24] [PASSED] NV12 Modifier for inexistent plane
[10:10:24] [PASSED] NV12 Handle for inexistent plane
[10:10:24] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:10:24] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:10:24] [PASSED] YVU420 Normal sizes
[10:10:24] [PASSED] YVU420 Max sizes
[10:10:24] [PASSED] YVU420 Invalid pitch
[10:10:24] [PASSED] YVU420 Different pitches
[10:10:24] [PASSED] YVU420 Different buffer offsets/pitches
[10:10:24] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:10:24] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:10:24] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:10:24] [PASSED] YVU420 Valid modifier
[10:10:24] [PASSED] YVU420 Different modifiers per plane
[10:10:24] [PASSED] YVU420 Modifier for inexistent plane
[10:10:24] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:10:24] [PASSED] X0L2 Normal sizes
[10:10:24] [PASSED] X0L2 Max sizes
[10:10:24] [PASSED] X0L2 Invalid pitch
[10:10:24] [PASSED] X0L2 Pitch greater than minimum required
[10:10:24] [PASSED] X0L2 Handle for inexistent plane
[10:10:24] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:10:24] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:10:24] [PASSED] X0L2 Valid modifier
[10:10:24] [PASSED] X0L2 Modifier for inexistent plane
[10:10:24] =========== [PASSED] drm_test_framebuffer_create ===========
[10:10:24] [PASSED] drm_test_framebuffer_free
[10:10:24] [PASSED] drm_test_framebuffer_init
[10:10:24] [PASSED] drm_test_framebuffer_init_bad_format
[10:10:24] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:10:24] [PASSED] drm_test_framebuffer_lookup
[10:10:24] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:10:24] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:10:24] ================= [PASSED] drm_framebuffer =================
[10:10:24] ================ drm_gem_shmem (8 subtests) ================
[10:10:24] [PASSED] drm_gem_shmem_test_obj_create
[10:10:24] [PASSED] drm_gem_shmem_test_obj_create_private
[10:10:24] [PASSED] drm_gem_shmem_test_pin_pages
[10:10:24] [PASSED] drm_gem_shmem_test_vmap
[10:10:24] [PASSED] drm_gem_shmem_test_get_sg_table
[10:10:24] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:10:24] [PASSED] drm_gem_shmem_test_madvise
[10:10:24] [PASSED] drm_gem_shmem_test_purge
[10:10:24] ================== [PASSED] drm_gem_shmem ==================
[10:10:24] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[10:10:24] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:10:24] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:10:24] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:10:24] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:10:24] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:10:24] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:10:24] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[10:10:24] [PASSED] Automatic
[10:10:24] [PASSED] Full
[10:10:24] [PASSED] Limited 16:235
[10:10:24] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:10:24] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:10:24] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:10:24] [PASSED] drm_test_check_disable_connector
[10:10:24] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:10:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:10:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:10:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:10:24] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:10:24] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:10:24] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:10:24] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:10:24] [PASSED] drm_test_check_output_bpc_dvi
[10:10:24] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:10:24] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:10:24] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:10:24] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:10:24] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:10:24] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:10:24] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:10:24] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:10:24] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:10:24] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:10:24] [PASSED] drm_test_check_broadcast_rgb_value
[10:10:24] [PASSED] drm_test_check_bpc_8_value
[10:10:24] [PASSED] drm_test_check_bpc_10_value
[10:10:24] [PASSED] drm_test_check_bpc_12_value
[10:10:24] [PASSED] drm_test_check_format_value
[10:10:24] [PASSED] drm_test_check_tmds_char_value
[10:10:24] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:10:24] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:10:24] [PASSED] drm_test_check_mode_valid
[10:10:24] [PASSED] drm_test_check_mode_valid_reject
[10:10:24] [PASSED] drm_test_check_mode_valid_reject_rate
[10:10:24] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:10:24] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:10:24] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:10:24] [PASSED] drm_test_check_infoframes
[10:10:24] [PASSED] drm_test_check_reject_avi_infoframe
[10:10:24] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:10:24] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:10:24] [PASSED] drm_test_check_reject_audio_infoframe
[10:10:24] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:10:24] ================= drm_managed (2 subtests) =================
[10:10:24] [PASSED] drm_test_managed_release_action
[10:10:24] [PASSED] drm_test_managed_run_action
[10:10:24] =================== [PASSED] drm_managed ===================
[10:10:24] =================== drm_mm (6 subtests) ====================
[10:10:24] [PASSED] drm_test_mm_init
[10:10:24] [PASSED] drm_test_mm_debug
[10:10:24] [PASSED] drm_test_mm_align32
[10:10:24] [PASSED] drm_test_mm_align64
[10:10:24] [PASSED] drm_test_mm_lowest
[10:10:24] [PASSED] drm_test_mm_highest
[10:10:24] ===================== [PASSED] drm_mm ======================
[10:10:24] ============= drm_modes_analog_tv (5 subtests) =============
[10:10:24] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:10:24] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:10:24] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:10:24] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:10:24] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:10:24] =============== [PASSED] drm_modes_analog_tv ===============
[10:10:24] ============== drm_plane_helper (2 subtests) ===============
[10:10:24] =============== drm_test_check_plane_state  ================
[10:10:24] [PASSED] clipping_simple
[10:10:24] [PASSED] clipping_rotate_reflect
[10:10:24] [PASSED] positioning_simple
[10:10:24] [PASSED] upscaling
[10:10:24] [PASSED] downscaling
[10:10:24] [PASSED] rounding1
[10:10:24] [PASSED] rounding2
[10:10:24] [PASSED] rounding3
[10:10:24] [PASSED] rounding4
[10:10:24] =========== [PASSED] drm_test_check_plane_state ============
[10:10:24] =========== drm_test_check_invalid_plane_state  ============
[10:10:24] [PASSED] positioning_invalid
[10:10:24] [PASSED] upscaling_invalid
[10:10:24] [PASSED] downscaling_invalid
[10:10:24] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:10:24] ================ [PASSED] drm_plane_helper =================
[10:10:24] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:10:24] ====== drm_test_connector_helper_tv_get_modes_check  =======
[10:10:24] [PASSED] None
[10:10:24] [PASSED] PAL
[10:10:24] [PASSED] NTSC
[10:10:24] [PASSED] Both, NTSC Default
[10:10:24] [PASSED] Both, PAL Default
[10:10:24] [PASSED] Both, NTSC Default, with PAL on command-line
[10:10:24] [PASSED] Both, PAL Default, with NTSC on command-line
[10:10:24] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:10:24] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:10:24] ================== drm_rect (9 subtests) ===================
[10:10:24] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:10:24] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:10:24] [PASSED] drm_test_rect_clip_scaled_clipped
[10:10:24] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:10:24] ================= drm_test_rect_intersect  =================
[10:10:24] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:10:24] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:10:24] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:10:24] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:10:24] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:10:24] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:10:24] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:10:24] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:10:24] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:10:24] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:10:24] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:10:24] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:10:24] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:10:24] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:10:24] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:10:24] ============= [PASSED] drm_test_rect_intersect =============
[10:10:24] ================ drm_test_rect_calc_hscale  ================
[10:10:24] [PASSED] normal use
[10:10:24] [PASSED] out of max range
[10:10:24] [PASSED] out of min range
[10:10:24] [PASSED] zero dst
[10:10:24] [PASSED] negative src
[10:10:24] [PASSED] negative dst
[10:10:24] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:10:24] ================ drm_test_rect_calc_vscale  ================
[10:10:24] [PASSED] normal use
[10:10:24] [PASSED] out of max range
[10:10:24] [PASSED] out of min range
[10:10:24] [PASSED] zero dst
[10:10:24] [PASSED] negative src
[10:10:24] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[10:10:24] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:10:24] ================== drm_test_rect_rotate  ===================
[10:10:24] [PASSED] reflect-x
[10:10:24] [PASSED] reflect-y
[10:10:24] [PASSED] rotate-0
[10:10:24] [PASSED] rotate-90
[10:10:24] [PASSED] rotate-180
[10:10:24] [PASSED] rotate-270
[10:10:24] ============== [PASSED] drm_test_rect_rotate ===============
[10:10:24] ================ drm_test_rect_rotate_inv  =================
[10:10:24] [PASSED] reflect-x
[10:10:24] [PASSED] reflect-y
[10:10:24] [PASSED] rotate-0
[10:10:24] [PASSED] rotate-90
[10:10:24] [PASSED] rotate-180
[10:10:24] [PASSED] rotate-270
[10:10:24] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:10:24] ==================== [PASSED] drm_rect =====================
[10:10:24] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:10:24] ============ drm_test_sysfb_build_fourcc_list  =============
[10:10:24] [PASSED] no native formats
[10:10:24] [PASSED] XRGB8888 as native format
[10:10:24] [PASSED] remove duplicates
[10:10:24] [PASSED] convert alpha formats
[10:10:24] [PASSED] random formats
[10:10:24] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:10:24] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:10:24] ================== drm_fixp (2 subtests) ===================
[10:10:24] [PASSED] drm_test_int2fixp
[10:10:24] [PASSED] drm_test_sm2fixp
[10:10:24] ==================== [PASSED] drm_fixp =====================
[10:10:24] ============================================================
[10:10:24] Testing complete. Ran 621 tests: passed: 621
[10:10:24] Elapsed time: 25.979s total, 1.695s configuring, 24.115s building, 0.135s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:10:24] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:10:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:10:35] Starting KUnit Kernel (1/1)...
[10:10:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:10:35] ================= ttm_device (5 subtests) ==================
[10:10:35] [PASSED] ttm_device_init_basic
[10:10:35] [PASSED] ttm_device_init_multiple
[10:10:35] [PASSED] ttm_device_fini_basic
[10:10:35] [PASSED] ttm_device_init_no_vma_man
[10:10:35] ================== ttm_device_init_pools  ==================
[10:10:35] [PASSED] No DMA allocations, no DMA32 required
[10:10:35] [PASSED] DMA allocations, DMA32 required
[10:10:35] [PASSED] No DMA allocations, DMA32 required
[10:10:35] [PASSED] DMA allocations, no DMA32 required
[10:10:35] ============== [PASSED] ttm_device_init_pools ==============
[10:10:35] =================== [PASSED] ttm_device ====================
[10:10:35] ================== ttm_pool (8 subtests) ===================
[10:10:35] ================== ttm_pool_alloc_basic  ===================
[10:10:35] [PASSED] One page
[10:10:35] [PASSED] More than one page
[10:10:35] [PASSED] Above the allocation limit
[10:10:35] [PASSED] One page, with coherent DMA mappings enabled
[10:10:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:10:35] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:10:35] ============== ttm_pool_alloc_basic_dma_addr  ==============
[10:10:35] [PASSED] One page
[10:10:35] [PASSED] More than one page
[10:10:35] [PASSED] Above the allocation limit
[10:10:35] [PASSED] One page, with coherent DMA mappings enabled
[10:10:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:10:35] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:10:35] [PASSED] ttm_pool_alloc_order_caching_match
[10:10:35] [PASSED] ttm_pool_alloc_caching_mismatch
[10:10:35] [PASSED] ttm_pool_alloc_order_mismatch
[10:10:35] [PASSED] ttm_pool_free_dma_alloc
[10:10:35] [PASSED] ttm_pool_free_no_dma_alloc
[10:10:35] [PASSED] ttm_pool_fini_basic
[10:10:35] ==================== [PASSED] ttm_pool =====================
[10:10:35] ================ ttm_resource (8 subtests) =================
[10:10:35] ================= ttm_resource_init_basic  =================
[10:10:35] [PASSED] Init resource in TTM_PL_SYSTEM
[10:10:35] [PASSED] Init resource in TTM_PL_VRAM
[10:10:35] [PASSED] Init resource in a private placement
[10:10:35] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:10:35] ============= [PASSED] ttm_resource_init_basic =============
[10:10:35] [PASSED] ttm_resource_init_pinned
[10:10:35] [PASSED] ttm_resource_fini_basic
[10:10:35] [PASSED] ttm_resource_manager_init_basic
[10:10:35] [PASSED] ttm_resource_manager_usage_basic
[10:10:35] [PASSED] ttm_resource_manager_set_used_basic
[10:10:35] [PASSED] ttm_sys_man_alloc_basic
[10:10:35] [PASSED] ttm_sys_man_free_basic
[10:10:35] ================== [PASSED] ttm_resource ===================
[10:10:35] =================== ttm_tt (15 subtests) ===================
[10:10:35] ==================== ttm_tt_init_basic  ====================
[10:10:35] [PASSED] Page-aligned size
[10:10:35] [PASSED] Extra pages requested
[10:10:35] ================ [PASSED] ttm_tt_init_basic ================
[10:10:35] [PASSED] ttm_tt_init_misaligned
[10:10:35] [PASSED] ttm_tt_fini_basic
[10:10:35] [PASSED] ttm_tt_fini_sg
[10:10:35] [PASSED] ttm_tt_fini_shmem
[10:10:35] [PASSED] ttm_tt_create_basic
[10:10:35] [PASSED] ttm_tt_create_invalid_bo_type
[10:10:35] [PASSED] ttm_tt_create_ttm_exists
[10:10:35] [PASSED] ttm_tt_create_failed
[10:10:35] [PASSED] ttm_tt_destroy_basic
[10:10:35] [PASSED] ttm_tt_populate_null_ttm
[10:10:35] [PASSED] ttm_tt_populate_populated_ttm
[10:10:35] [PASSED] ttm_tt_unpopulate_basic
[10:10:35] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:10:35] [PASSED] ttm_tt_swapin_basic
[10:10:35] ===================== [PASSED] ttm_tt ======================
[10:10:35] =================== ttm_bo (14 subtests) ===================
[10:10:35] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[10:10:35] [PASSED] Cannot be interrupted and sleeps
[10:10:35] [PASSED] Cannot be interrupted, locks straight away
[10:10:35] [PASSED] Can be interrupted, sleeps
[10:10:35] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:10:35] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:10:35] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:10:35] [PASSED] ttm_bo_reserve_double_resv
[10:10:35] [PASSED] ttm_bo_reserve_interrupted
[10:10:35] [PASSED] ttm_bo_reserve_deadlock
[10:10:35] [PASSED] ttm_bo_unreserve_basic
[10:10:35] [PASSED] ttm_bo_unreserve_pinned
[10:10:35] [PASSED] ttm_bo_unreserve_bulk
[10:10:35] [PASSED] ttm_bo_fini_basic
[10:10:35] [PASSED] ttm_bo_fini_shared_resv
[10:10:35] [PASSED] ttm_bo_pin_basic
[10:10:35] [PASSED] ttm_bo_pin_unpin_resource
[10:10:35] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:10:35] ===================== [PASSED] ttm_bo ======================
[10:10:35] ============== ttm_bo_validate (22 subtests) ===============
[10:10:35] ============== ttm_bo_init_reserved_sys_man  ===============
[10:10:35] [PASSED] Buffer object for userspace
[10:10:35] [PASSED] Kernel buffer object
[10:10:35] [PASSED] Shared buffer object
[10:10:35] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:10:35] ============== ttm_bo_init_reserved_mock_man  ==============
[10:10:35] [PASSED] Buffer object for userspace
[10:10:35] [PASSED] Kernel buffer object
[10:10:35] [PASSED] Shared buffer object
[10:10:35] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:10:35] [PASSED] ttm_bo_init_reserved_resv
[10:10:35] ================== ttm_bo_validate_basic  ==================
[10:10:35] [PASSED] Buffer object for userspace
[10:10:35] [PASSED] Kernel buffer object
[10:10:35] [PASSED] Shared buffer object
[10:10:35] ============== [PASSED] ttm_bo_validate_basic ==============
[10:10:35] [PASSED] ttm_bo_validate_invalid_placement
[10:10:35] ============= ttm_bo_validate_same_placement  ==============
[10:10:35] [PASSED] System manager
[10:10:35] [PASSED] VRAM manager
[10:10:35] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:10:35] [PASSED] ttm_bo_validate_failed_alloc
[10:10:35] [PASSED] ttm_bo_validate_pinned
[10:10:35] [PASSED] ttm_bo_validate_busy_placement
[10:10:35] ================ ttm_bo_validate_multihop  =================
[10:10:35] [PASSED] Buffer object for userspace
[10:10:35] [PASSED] Kernel buffer object
[10:10:35] [PASSED] Shared buffer object
[10:10:35] ============ [PASSED] ttm_bo_validate_multihop =============
[10:10:35] ========== ttm_bo_validate_no_placement_signaled  ==========
[10:10:35] [PASSED] Buffer object in system domain, no page vector
[10:10:35] [PASSED] Buffer object in system domain with an existing page vector
[10:10:35] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:10:35] ======== ttm_bo_validate_no_placement_not_signaled  ========
[10:10:35] [PASSED] Buffer object for userspace
[10:10:35] [PASSED] Kernel buffer object
[10:10:35] [PASSED] Shared buffer object
[10:10:35] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:10:35] [PASSED] ttm_bo_validate_move_fence_signaled
[10:10:35] ========= ttm_bo_validate_move_fence_not_signaled  =========
[10:10:35] [PASSED] Waits for GPU
[10:10:35] [PASSED] Tries to lock straight away
[10:10:35] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:10:35] [PASSED] ttm_bo_validate_swapout
[10:10:35] [PASSED] ttm_bo_validate_happy_evict
[10:10:35] [PASSED] ttm_bo_validate_all_pinned_evict
[10:10:35] [PASSED] ttm_bo_validate_allowed_only_evict
[10:10:35] [PASSED] ttm_bo_validate_deleted_evict
[10:10:35] [PASSED] ttm_bo_validate_busy_domain_evict
[10:10:35] [PASSED] ttm_bo_validate_evict_gutting
[10:10:35] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[10:10:35] ================= [PASSED] ttm_bo_validate =================
[10:10:35] ============================================================
[10:10:35] Testing complete. Ran 102 tests: passed: 102
[10:10:36] Elapsed time: 11.210s total, 1.650s configuring, 9.344s building, 0.187s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introduce Xe PCIe FLR (rev6)

[Patchwork]

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== Series Details ==

Series: Introduce Xe PCIe FLR (rev6)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

CI Bug Log - changes from xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41_BAT -> xe-pw-162055v6_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41 -> xe-pw-162055v6

  IGT_8870: 1aba4b364b6dbdf7926cc78501e7281d5176b029 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41: 95fbbe4877e1543975d0d0f18a7cc0074416be41
  xe-pw-162055v6: 162055v6

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/index.html

[-- Attachment #2: Type: text/html, Size: 1490 bytes --]

✗ Xe.CI.FULL: failure for Introduce Xe PCIe FLR (rev6)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 34314 bytes --]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev6)
URL   : https://patchwork.freedesktop.org/series/162055/
State : failure

== Summary ==

CI Bug Log - changes from xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41_FULL -> xe-pw-162055v6_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-162055v6_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-162055v6_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-162055v6_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_system_allocator@many-malloc-fork-read-after:
    - shard-bmg:          NOTRUN -> [ABORT][1]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-2/igt@xe_exec_system_allocator@many-malloc-fork-read-after.html

  
#### Warnings ####

  * igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init:
    - shard-bmg:          [ABORT][2] ([Intel XE#7578]) -> [ABORT][3]
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-9/igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init.html
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_uc_fw_init.html

  
Known issues
------------

  Here are the changes found in xe-pw-162055v6_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#2327]) +5 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#610] / [Intel XE#7387])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +6 other tests skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#3432])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2652]) +8 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2887]) +10 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-2/igt@kms_ccs@random-ccs-data-yf-tiled-ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2724] / [Intel XE#7449])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#2325] / [Intel XE#7358])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2252]) +2 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html

  * igt@kms_content_protection@dp-mst-type-0-hdcp14:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#6974])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@kms_content_protection@dp-mst-type-0-hdcp14.html

  * igt@kms_content_protection@mei-interface:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#7642])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_crc@cursor-offscreen-max-size:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2320]) +3 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_cursor_crc@cursor-offscreen-max-size.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#2321] / [Intel XE#7355])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-bmg:          [PASS][17] -> [FAIL][18] ([Intel XE#7809])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#4331] / [Intel XE#7227])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#4422] / [Intel XE#7442])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [PASS][21] -> [FAIL][22] ([Intel XE#301] / [Intel XE#3149])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#2311]) +19 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#4141]) +9 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2313]) +16 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#7061] / [Intel XE#7356])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@kms_frontbuffer_tracking@psr-abgr161616f-draw-mmap-wc.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [PASS][28] -> [SKIP][29] ([Intel XE#1503])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_hdr@invalid-hdr.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#7591])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#7283]) +4 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-modifier-source-clamping.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#5020] / [Intel XE#7348])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-2/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#7376] / [Intel XE#870])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#1489]) +4 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2387] / [Intel XE#7429])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_psr@fbc-psr-primary-render.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#3904] / [Intel XE#7342])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_scaling_modes@scaling-mode-full-aspect:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2413])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_scaling_modes@scaling-mode-full-aspect.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [PASS][41] -> [FAIL][42] ([Intel XE#2142]) +1 other test fail
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-lnl-8/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-lnl-3/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@xe_eudebug@basic-exec-queues:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#7636]) +4 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@xe_eudebug@basic-exec-queues.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][44] ([Intel XE#6321])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_evict@evict-mixed-threads-small-multi-queue:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#7140]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_evict@evict-mixed-threads-small-multi-queue.html

  * igt@xe_exec_basic@multigpu-once-null-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@xe_exec_basic@multigpu-once-null-rebind.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#7136]) +8 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr.html

  * igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#6874]) +24 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@xe_exec_multi_queue@few-execs-preempt-mode-userptr-invalidate.html

  * igt@xe_exec_threads@threads-multi-queue-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#7138]) +6 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@xe_exec_threads@threads-multi-queue-rebind.html

  * igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][50] ([Intel XE#6964]) +3 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch.html

  * igt@xe_page_reclaim@boundary-split:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#7793])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_page_reclaim@boundary-split.html

  * igt@xe_pat@xa-app-transient-media-off:
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#7590])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@xe_pat@xa-app-transient-media-off.html

  * igt@xe_pm@d3cold-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#5694] / [Intel XE#7370])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2284] / [Intel XE#7370])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#4733] / [Intel XE#7417]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_query@multigpu-query-uc-fw-version-guc:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#944])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_query@multigpu-query-uc-fw-version-guc.html

  * igt@xe_survivability@runtime-survivability:
    - shard-bmg:          [PASS][57] -> [DMESG-WARN][58] ([Intel XE#6627] / [Intel XE#7419])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-10/igt@xe_survivability@runtime-survivability.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-5/igt@xe_survivability@runtime-survivability.html

  
#### Possible fixes ####

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-bmg:          [INCOMPLETE][59] ([Intel XE#6819]) -> [PASS][60] +1 other test pass
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-3/igt@kms_atomic_transition@plane-all-modeset-transition.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_flip@2x-flip-vs-panning@bd-dp2-hdmi-a3:
    - shard-bmg:          [ABORT][61] ([Intel XE#5545] / [Intel XE#6652]) -> [PASS][62] +1 other test pass
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-2/igt@kms_flip@2x-flip-vs-panning@bd-dp2-hdmi-a3.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@kms_flip@2x-flip-vs-panning@bd-dp2-hdmi-a3.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-lnl:          [FAIL][63] ([Intel XE#301]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_sequence@queue-idle@pipe-b-dp-2:
    - shard-bmg:          [FAIL][65] -> [PASS][66] +2 other tests pass
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-3/igt@kms_sequence@queue-idle@pipe-b-dp-2.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-2/igt@kms_sequence@queue-idle@pipe-b-dp-2.html

  * igt@kms_vblank@wait-busy:
    - shard-bmg:          [FAIL][67] ([Intel XE#7762]) -> [PASS][68] +1 other test pass
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-3/igt@kms_vblank@wait-busy.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-9/igt@kms_vblank@wait-busy.html

  * igt@xe_fault_injection@inject-fault-probe-function-xe_add_hw_engine_class_defaults:
    - shard-bmg:          [ABORT][69] ([Intel XE#7578]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_add_hw_engine_class_defaults.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_add_hw_engine_class_defaults.html

  
#### Warnings ####

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-lnl:          [FAIL][71] ([Intel XE#301]) -> [FAIL][72] ([Intel XE#301] / [Intel XE#3149])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt:
    - shard-bmg:          [SKIP][73] ([Intel XE#2312]) -> [SKIP][74] ([Intel XE#2311])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-9/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][75] ([Intel XE#3544]) -> [SKIP][76] ([Intel XE#3374] / [Intel XE#3544])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-10/igt@kms_hdr@brightness-with-hdr.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][77], [PASS][78], [PASS][79], [PASS][80], [PASS][81], [PASS][82], [DMESG-WARN][83], [PASS][84], [PASS][85], [PASS][86], [PASS][87], [PASS][88], [PASS][89], [PASS][90], [PASS][91], [PASS][92], [PASS][93], [PASS][94], [PASS][95], [PASS][96], [PASS][97], [PASS][98], [SKIP][99], [PASS][100], [PASS][101], [PASS][102]) ([Intel XE#2457] / [Intel XE#7405] / [Intel XE#7725]) -> ([PASS][103], [SKIP][104], [PASS][105], [PASS][106], [PASS][107], [PASS][108], [PASS][109], [PASS][110], [PASS][111], [PASS][112], [PASS][113], [PASS][114], [PASS][115], [PASS][116], [PASS][117], [PASS][118], [PASS][119], [PASS][120], [PASS][121], [PASS][122], [PASS][123], [PASS][124], [PASS][125], [PASS][126], [PASS][127], [PASS][128]) ([Intel XE#2457] / [Intel XE#7405])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-10/igt@xe_module_load@load.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-1/igt@xe_module_load@load.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-10/igt@xe_module_load@load.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-10/igt@xe_module_load@load.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-8/igt@xe_module_load@load.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-3/igt@xe_module_load@load.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-6/igt@xe_module_load@load.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-1/igt@xe_module_load@load.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-3/igt@xe_module_load@load.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-3/igt@xe_module_load@load.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-5/igt@xe_module_load@load.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-5/igt@xe_module_load@load.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-2/igt@xe_module_load@load.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-7/igt@xe_module_load@load.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-7/igt@xe_module_load@load.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-5/igt@xe_module_load@load.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-8/igt@xe_module_load@load.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-9/igt@xe_module_load@load.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-10/igt@xe_module_load@load.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-2/igt@xe_module_load@load.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-2/igt@xe_module_load@load.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-2/igt@xe_module_load@load.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-2/igt@xe_module_load@load.html
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-9/igt@xe_module_load@load.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-6/igt@xe_module_load@load.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41/shard-bmg-6/igt@xe_module_load@load.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-5/igt@xe_module_load@load.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@xe_module_load@load.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@xe_module_load@load.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-10/igt@xe_module_load@load.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@xe_module_load@load.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@xe_module_load@load.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-5/igt@xe_module_load@load.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-1/igt@xe_module_load@load.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-8/igt@xe_module_load@load.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-8/igt@xe_module_load@load.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-3/igt@xe_module_load@load.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-3/igt@xe_module_load@load.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-7/igt@xe_module_load@load.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-7/igt@xe_module_load@load.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-7/igt@xe_module_load@load.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-9/igt@xe_module_load@load.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-9/igt@xe_module_load@load.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-5/igt@xe_module_load@load.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-5/igt@xe_module_load@load.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-9/igt@xe_module_load@load.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_module_load@load.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_module_load@load.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-6/igt@xe_module_load@load.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-2/igt@xe_module_load@load.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-2/igt@xe_module_load@load.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/shard-bmg-2/igt@xe_module_load@load.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6627]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6627
  [Intel XE#6652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6652
  [Intel XE#6819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6819
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7387
  [Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7419
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7578]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7578
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7591
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7725]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7725
  [Intel XE#7762]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7762
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41 -> xe-pw-162055v6

  IGT_8870: 1aba4b364b6dbdf7926cc78501e7281d5176b029 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-4928-95fbbe4877e1543975d0d0f18a7cc0074416be41: 95fbbe4877e1543975d0d0f18a7cc0074416be41
  xe-pw-162055v6: 162055v6

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v6/index.html

[-- Attachment #2: Type: text/html, Size: 36979 bytes --]

Re: [PATCH v6 8/8] drm/xe/pci: Introduce PCIe FLR

[Daniele Ceraolo Spurio]

<snip>

I haven't gone through the code yet, but I wanted to ask some questions 
regarding the approach first.

> +
> +/**
> + * DOC: PCI Error Handling
> + *
> + * Xe driver registers PCI callbacks which are called by PCI core in case of
> + * bus errors or resets.
> + *
> + * Currently only PCI Function Level Reset (FLR) callbacks are supported. Since
> + * most of the Endpoint Function state is lost on PCIe FLR, the flow is pretty
> + * much similar to system suspend/resume flow with a few notable exceptions.

IMO we need a couple of lines to describe what the impact of FLR is on 
the HW. Something like:

"PCI FLR clears VRAM and resets the state of all the HW units. 
Therefore, the contents of all exec queues and BOs in VRAM are lost and 
the HW needs a full re-init".

> + *
> + * Prepare phase:
> + * - Temporarily wedge the device to prevent userspace access

I'm not convinced that wedging is the correct approach here, because the 
expectation from the apps POV is that wedging is permanent, so they 
won't try again later. Maybe we can have a separate flr_in_progress flag 
and return something like -EBUSY or -EAGAIN when the FLR is in progress?

> + * - Stop accepting new submissions

This is done as part of the above step and it isn't a separate one, right?

> + * - Kill exec queues which signals all fences and frees in-flight jobs
> + * - Skip memory eviction due to untrustworthy VRAM contents

Note that the VRAM contents are not necessarily untrustworthy at this 
points since the FLR hasn't happened yet. However, if the admin is 
triggering an FLR it is likely that something is broken (whether memory, 
GuC, GT or something else), so we shouldn't try to touch the HW anyway.

> + * - Remove all memory mappings since VRAM contents will be lost

Dumb question, but what happens if a userspace app has an object mapped 
and they try to access it from the CPU after this step?

> + *
> + * Re-initialization phase:
> + * - Recreate kernel bos due to skipped eviction in prepare phase
> + * - Restore kernel queues which were killed in prepare phase
> + * - Reload all uC firmwares
> + * - Bring up GT and unwedge to allow userspace access
> + *
> + * Since VRAM contents are lost, the user is expected to recreate user memory
> + * and reload context.

How is the user expected to realize that they need to re-create their 
BOs? A queue can be killed for different reasons and normally that 
doesn't imply that any associated BO is now invalid.

Daniele

> + *
> + * TODO: Add PCIe error handling callbacks using similar flow.
> + *
> + * Current implementation is only limited to re-initializing GT.
> + * This needs to be extended for a lot of components listed below.
> + *
> + * - Proper re-initialization of GSC and PXP for integrated platforms
> + * - SRIOV cases which need synchronization between PF and VF
> + * - Re-initialization of all child devices of Xe
> + * - User memory handling and MM corner cases
> + * - Display
> + */
> +
>

Re: [PATCH v6 8/8] drm/xe/pci: Introduce PCIe FLR

[Raag Jadav]

On Tue, Apr 28, 2026 at 04:28:15PM -0700, Daniele Ceraolo Spurio wrote:
> <snip>
> 
> I haven't gone through the code yet, but I wanted to ask some questions
> regarding the approach first.

Sure.

> > +
> > +/**
> > + * DOC: PCI Error Handling
> > + *
> > + * Xe driver registers PCI callbacks which are called by PCI core in case of
> > + * bus errors or resets.
> > + *
> > + * Currently only PCI Function Level Reset (FLR) callbacks are supported. Since
> > + * most of the Endpoint Function state is lost on PCIe FLR, the flow is pretty
> > + * much similar to system suspend/resume flow with a few notable exceptions.
> 
> IMO we need a couple of lines to describe what the impact of FLR is on the
> HW. Something like:
> 
> "PCI FLR clears VRAM and resets the state of all the HW units. Therefore,
> the contents of all exec queues and BOs in VRAM are lost and the HW needs a
> full re-init".

Makes sense.

> > + *
> > + * Prepare phase:
> > + * - Temporarily wedge the device to prevent userspace access
> 
> I'm not convinced that wedging is the correct approach here, because the
> expectation from the apps POV is that wedging is permanent, so they won't
> try again later. Maybe we can have a separate flr_in_progress flag and
> return something like -EBUSY or -EAGAIN when the FLR is in progress?

This was my initial plan but during implementation I realized that much
of the code paths that need handling based new flag are already handled
by wedged flag. Like IOCTLs, dummy page faulting, GT reset worker, GuC
submission, GuC PC and TLB invalidation corner cases, SRIOV races and so
on. So I decided to reuse it here.

In my understand wedging is permanent only when we choose to send the
uevent and expect device recovery from userspace, which IIUC we're not.
So I hope that's okay?

> > + * - Stop accepting new submissions
> 
> This is done as part of the above step and it isn't a separate one, right?

We explicitly xe_guc_submit_disable() inside flr_prepare() so I thought it
was worth spelling out. Will drop.

> > + * - Kill exec queues which signals all fences and frees in-flight jobs
> > + * - Skip memory eviction due to untrustworthy VRAM contents
> 
> Note that the VRAM contents are not necessarily untrustworthy at this points
> since the FLR hasn't happened yet. However, if the admin is triggering an
> FLR it is likely that something is broken (whether memory, GuC, GT or
> something else), so we shouldn't try to touch the HW anyway.

Yes, that's what I meant here but your phrasing is better. Will update.

> > + * - Remove all memory mappings since VRAM contents will be lost
> 
> Dumb question, but what happens if a userspace app has an object mapped and
> they try to access it from the CPU after this step?

I'm not much familiar with MM parts but from what I understand it'll
cause a fault which should be redirected to dummy page. I've tried to
handle it with commit c020fff70d75 but I'm not sure if that's sufficient.
This is why I've marked MM corner cases as TODO.

> > + *
> > + * Re-initialization phase:
> > + * - Recreate kernel bos due to skipped eviction in prepare phase
> > + * - Restore kernel queues which were killed in prepare phase
> > + * - Reload all uC firmwares
> > + * - Bring up GT and unwedge to allow userspace access
> > + *
> > + * Since VRAM contents are lost, the user is expected to recreate user memory
> > + * and reload context.
> 
> How is the user expected to realize that they need to re-create their BOs? A
> queue can be killed for different reasons and normally that doesn't imply
> that any associated BO is now invalid.

We return -ECANCELED if wedged flag is set and the dummy page data will
read all 0s. This would be the indication to the application that it needs
to recreate user memory and reload context.

Raag

> > + *
> > + * TODO: Add PCIe error handling callbacks using similar flow.
> > + *
> > + * Current implementation is only limited to re-initializing GT.
> > + * This needs to be extended for a lot of components listed below.
> > + *
> > + * - Proper re-initialization of GSC and PXP for integrated platforms
> > + * - SRIOV cases which need synchronization between PF and VF
> > + * - Re-initialization of all child devices of Xe
> > + * - User memory handling and MM corner cases
> > + * - Display
> > + */
> > +
> > 
> 

Re: [PATCH v6 8/8] drm/xe/pci: Introduce PCIe FLR

[Rodrigo Vivi]

On Wed, Apr 29, 2026 at 06:33:55AM +0200, Raag Jadav wrote:
> On Tue, Apr 28, 2026 at 04:28:15PM -0700, Daniele Ceraolo Spurio wrote:
> > <snip>
> > 
> > I haven't gone through the code yet, but I wanted to ask some questions
> > regarding the approach first.
> 
> Sure.
> 
> > > +
> > > +/**
> > > + * DOC: PCI Error Handling
> > > + *
> > > + * Xe driver registers PCI callbacks which are called by PCI core in case of
> > > + * bus errors or resets.
> > > + *
> > > + * Currently only PCI Function Level Reset (FLR) callbacks are supported. Since
> > > + * most of the Endpoint Function state is lost on PCIe FLR, the flow is pretty
> > > + * much similar to system suspend/resume flow with a few notable exceptions.
> > 
> > IMO we need a couple of lines to describe what the impact of FLR is on the
> > HW. Something like:
> > 
> > "PCI FLR clears VRAM and resets the state of all the HW units. Therefore,
> > the contents of all exec queues and BOs in VRAM are lost and the HW needs a
> > full re-init".
> 
> Makes sense.
> 
> > > + *
> > > + * Prepare phase:
> > > + * - Temporarily wedge the device to prevent userspace access
> > 
> > I'm not convinced that wedging is the correct approach here, because the
> > expectation from the apps POV is that wedging is permanent, so they won't
> > try again later. Maybe we can have a separate flr_in_progress flag and
> > return something like -EBUSY or -EAGAIN when the FLR is in progress?
> 
> This was my initial plan but during implementation I realized that much
> of the code paths that need handling based new flag are already handled
> by wedged flag. Like IOCTLs, dummy page faulting, GT reset worker, GuC
> submission, GuC PC and TLB invalidation corner cases, SRIOV races and so
> on. So I decided to reuse it here.
> 
> In my understand wedging is permanent only when we choose to send the
> uevent and expect device recovery from userspace, which IIUC we're not.
> So I hope that's okay?

Right, it should be okay.

But we have 2 different users on top.

Runtime (NEO/Level0-core and Apps):

UMDs will send DEVICE_LOST to application in the case of any kind of reset.
Nothing prevents App to go and try it again. It will just receive error.

Admin (Level0-sysman and XPUManager):

As Raag told, to them it is only permanent if we ask for help through the
wedge uevent hints. Otherwise they should still be able to re-enumerate
the devices whenever needed.

> 
> > > + * - Stop accepting new submissions
> > 
> > This is done as part of the above step and it isn't a separate one, right?
> 
> We explicitly xe_guc_submit_disable() inside flr_prepare() so I thought it
> was worth spelling out. Will drop.
> 
> > > + * - Kill exec queues which signals all fences and frees in-flight jobs
> > > + * - Skip memory eviction due to untrustworthy VRAM contents
> > 
> > Note that the VRAM contents are not necessarily untrustworthy at this points
> > since the FLR hasn't happened yet. However, if the admin is triggering an
> > FLR it is likely that something is broken (whether memory, GuC, GT or
> > something else), so we shouldn't try to touch the HW anyway.
> 
> Yes, that's what I meant here but your phrasing is better. Will update.
> 
> > > + * - Remove all memory mappings since VRAM contents will be lost
> > 
> > Dumb question, but what happens if a userspace app has an object mapped and
> > they try to access it from the CPU after this step?
> 
> I'm not much familiar with MM parts but from what I understand it'll
> cause a fault which should be redirected to dummy page. I've tried to
> handle it with commit c020fff70d75 but I'm not sure if that's sufficient.
> This is why I've marked MM corner cases as TODO.
> 
> > > + *
> > > + * Re-initialization phase:
> > > + * - Recreate kernel bos due to skipped eviction in prepare phase
> > > + * - Restore kernel queues which were killed in prepare phase
> > > + * - Reload all uC firmwares
> > > + * - Bring up GT and unwedge to allow userspace access
> > > + *
> > > + * Since VRAM contents are lost, the user is expected to recreate user memory
> > > + * and reload context.
> > 
> > How is the user expected to realize that they need to re-create their BOs? A
> > queue can be killed for different reasons and normally that doesn't imply
> > that any associated BO is now invalid.
> 
> We return -ECANCELED if wedged flag is set and the dummy page data will
> read all 0s. This would be the indication to the application that it needs
> to recreate user memory and reload context.
> 
> Raag
> 
> > > + *
> > > + * TODO: Add PCIe error handling callbacks using similar flow.
> > > + *
> > > + * Current implementation is only limited to re-initializing GT.
> > > + * This needs to be extended for a lot of components listed below.
> > > + *
> > > + * - Proper re-initialization of GSC and PXP for integrated platforms
> > > + * - SRIOV cases which need synchronization between PF and VF
> > > + * - Re-initialization of all child devices of Xe
> > > + * - User memory handling and MM corner cases
> > > + * - Display
> > > + */
> > > +
> > > 
> > 

Re: [PATCH v6 8/8] drm/xe/pci: Introduce PCIe FLR

[Daniele Ceraolo Spurio]

On 4/29/2026 9:22 AM, Rodrigo Vivi wrote:
> On Wed, Apr 29, 2026 at 06:33:55AM +0200, Raag Jadav wrote:
>> On Tue, Apr 28, 2026 at 04:28:15PM -0700, Daniele Ceraolo Spurio wrote:
>>> <snip>
>>>
>>> I haven't gone through the code yet, but I wanted to ask some questions
>>> regarding the approach first.
>> Sure.
>>
>>>> +
>>>> +/**
>>>> + * DOC: PCI Error Handling
>>>> + *
>>>> + * Xe driver registers PCI callbacks which are called by PCI core in case of
>>>> + * bus errors or resets.
>>>> + *
>>>> + * Currently only PCI Function Level Reset (FLR) callbacks are supported. Since
>>>> + * most of the Endpoint Function state is lost on PCIe FLR, the flow is pretty
>>>> + * much similar to system suspend/resume flow with a few notable exceptions.
>>> IMO we need a couple of lines to describe what the impact of FLR is on the
>>> HW. Something like:
>>>
>>> "PCI FLR clears VRAM and resets the state of all the HW units. Therefore,
>>> the contents of all exec queues and BOs in VRAM are lost and the HW needs a
>>> full re-init".
>> Makes sense.
>>
>>>> + *
>>>> + * Prepare phase:
>>>> + * - Temporarily wedge the device to prevent userspace access
>>> I'm not convinced that wedging is the correct approach here, because the
>>> expectation from the apps POV is that wedging is permanent, so they won't
>>> try again later. Maybe we can have a separate flr_in_progress flag and
>>> return something like -EBUSY or -EAGAIN when the FLR is in progress?
>> This was my initial plan but during implementation I realized that much
>> of the code paths that need handling based new flag are already handled
>> by wedged flag. Like IOCTLs, dummy page faulting, GT reset worker, GuC
>> submission, GuC PC and TLB invalidation corner cases, SRIOV races and so
>> on. So I decided to reuse it here.
>>
>> In my understand wedging is permanent only when we choose to send the
>> uevent and expect device recovery from userspace, which IIUC we're not.
>> So I hope that's okay?
> Right, it should be okay.
>
> But we have 2 different users on top.
>
> Runtime (NEO/Level0-core and Apps):
>
> UMDs will send DEVICE_LOST to application in the case of any kind of reset.
> Nothing prevents App to go and try it again. It will just receive error.
>
> Admin (Level0-sysman and XPUManager):
>
> As Raag told, to them it is only permanent if we ask for help through the
> wedge uevent hints. Otherwise they should still be able to re-enumerate
> the devices whenever needed.

Those are very specific to server use-cases. While that's what we're 
currently implementing FLR for, there might be other use-cases in the 
future that require us to implement this on the client side (there is 
already at least one case where we wedge but we could instead recover 
via driver-triggered FLR), where the apps can be less curated.

I'm a bit lost on how a random app is supposed to tell the difference 
between temporary and permanent wedges if they get a DEVICE_LOST error 
in both cases. Are we expecting all apps to register to the uevent? Or 
are the UMD drivers expected to return a different code if the wedge is 
permanent? Because I don't think that an app should just keep trying 
again non-stop.

>
>>>> + * - Stop accepting new submissions
>>> This is done as part of the above step and it isn't a separate one, right?
>> We explicitly xe_guc_submit_disable() inside flr_prepare() so I thought it
>> was worth spelling out. Will drop.

Maybe instead of dropping it, reword it as "stop all submissions to the 
GuC".

>>
>>>> + * - Kill exec queues which signals all fences and frees in-flight jobs
>>>> + * - Skip memory eviction due to untrustworthy VRAM contents
>>> Note that the VRAM contents are not necessarily untrustworthy at this points
>>> since the FLR hasn't happened yet. However, if the admin is triggering an
>>> FLR it is likely that something is broken (whether memory, GuC, GT or
>>> something else), so we shouldn't try to touch the HW anyway.
>> Yes, that's what I meant here but your phrasing is better. Will update.
>>
>>>> + * - Remove all memory mappings since VRAM contents will be lost
>>> Dumb question, but what happens if a userspace app has an object mapped and
>>> they try to access it from the CPU after this step?
>> I'm not much familiar with MM parts but from what I understand it'll
>> cause a fault which should be redirected to dummy page. I've tried to
>> handle it with commit c020fff70d75 but I'm not sure if that's sufficient.
>> This is why I've marked MM corner cases as TODO.

AFAICS that patch only redirects to dummy page while the wedged flag is 
set. What happens after the FLR is completed and we've removed the 
wedged flag? If we've dropped the mapping to the memory, where is that 
access going to go?

>>
>>>> + *
>>>> + * Re-initialization phase:
>>>> + * - Recreate kernel bos due to skipped eviction in prepare phase
>>>> + * - Restore kernel queues which were killed in prepare phase
>>>> + * - Reload all uC firmwares
>>>> + * - Bring up GT and unwedge to allow userspace access
>>>> + *
>>>> + * Since VRAM contents are lost, the user is expected to recreate user memory
>>>> + * and reload context.
>>> How is the user expected to realize that they need to re-create their BOs? A
>>> queue can be killed for different reasons and normally that doesn't imply
>>> that any associated BO is now invalid.
>> We return -ECANCELED if wedged flag is set and the dummy page data will
>> read all 0s. This would be the indication to the application that it needs
>> to recreate user memory and reload context.

Applications don't usually check their memory to see if it is still 
good. Are we expecting them to start doing this? or are we expecting all 
memory to get thrown out every time an application gets an -ECANCELED error?
In either case I'd like an ack from the UMD teams on this.

Daniele

>>
>> Raag
>>
>>>> + *
>>>> + * TODO: Add PCIe error handling callbacks using similar flow.
>>>> + *
>>>> + * Current implementation is only limited to re-initializing GT.
>>>> + * This needs to be extended for a lot of components listed below.
>>>> + *
>>>> + * - Proper re-initialization of GSC and PXP for integrated platforms
>>>> + * - SRIOV cases which need synchronization between PF and VF
>>>> + * - Re-initialization of all child devices of Xe
>>>> + * - User memory handling and MM corner cases
>>>> + * - Display
>>>> + */
>>>> +
>>>>

Re: [PATCH v6 8/8] drm/xe/pci: Introduce PCIe FLR

[Rodrigo Vivi]

On Wed, Apr 29, 2026 at 10:57:53AM -0700, Daniele Ceraolo Spurio wrote:
> 
> 
> On 4/29/2026 9:22 AM, Rodrigo Vivi wrote:
> > On Wed, Apr 29, 2026 at 06:33:55AM +0200, Raag Jadav wrote:
> > > On Tue, Apr 28, 2026 at 04:28:15PM -0700, Daniele Ceraolo Spurio wrote:
> > > > <snip>
> > > > 
> > > > I haven't gone through the code yet, but I wanted to ask some questions
> > > > regarding the approach first.
> > > Sure.
> > > 
> > > > > +
> > > > > +/**
> > > > > + * DOC: PCI Error Handling
> > > > > + *
> > > > > + * Xe driver registers PCI callbacks which are called by PCI core in case of
> > > > > + * bus errors or resets.
> > > > > + *
> > > > > + * Currently only PCI Function Level Reset (FLR) callbacks are supported. Since
> > > > > + * most of the Endpoint Function state is lost on PCIe FLR, the flow is pretty
> > > > > + * much similar to system suspend/resume flow with a few notable exceptions.
> > > > IMO we need a couple of lines to describe what the impact of FLR is on the
> > > > HW. Something like:
> > > > 
> > > > "PCI FLR clears VRAM and resets the state of all the HW units. Therefore,
> > > > the contents of all exec queues and BOs in VRAM are lost and the HW needs a
> > > > full re-init".
> > > Makes sense.
> > > 
> > > > > + *
> > > > > + * Prepare phase:
> > > > > + * - Temporarily wedge the device to prevent userspace access
> > > > I'm not convinced that wedging is the correct approach here, because the
> > > > expectation from the apps POV is that wedging is permanent, so they won't
> > > > try again later. Maybe we can have a separate flr_in_progress flag and
> > > > return something like -EBUSY or -EAGAIN when the FLR is in progress?
> > > This was my initial plan but during implementation I realized that much
> > > of the code paths that need handling based new flag are already handled
> > > by wedged flag. Like IOCTLs, dummy page faulting, GT reset worker, GuC
> > > submission, GuC PC and TLB invalidation corner cases, SRIOV races and so
> > > on. So I decided to reuse it here.
> > > 
> > > In my understand wedging is permanent only when we choose to send the
> > > uevent and expect device recovery from userspace, which IIUC we're not.
> > > So I hope that's okay?
> > Right, it should be okay.
> > 
> > But we have 2 different users on top.
> > 
> > Runtime (NEO/Level0-core and Apps):
> > 
> > UMDs will send DEVICE_LOST to application in the case of any kind of reset.
> > Nothing prevents App to go and try it again. It will just receive error.
> > 
> > Admin (Level0-sysman and XPUManager):
> > 
> > As Raag told, to them it is only permanent if we ask for help through the
> > wedge uevent hints. Otherwise they should still be able to re-enumerate
> > the devices whenever needed.
> 
> Those are very specific to server use-cases. While that's what we're
> currently implementing FLR for, there might be other use-cases in the future
> that require us to implement this on the client side (there is already at
> least one case where we wedge but we could instead recover via
> driver-triggered FLR), where the apps can be less curated.
> 
> I'm a bit lost on how a random app is supposed to tell the difference
> between temporary and permanent wedges if they get a DEVICE_LOST error in
> both cases. Are we expecting all apps to register to the uevent? Or are the
> UMD drivers expected to return a different code if the wedge is permanent?
> Because I don't think that an app should just keep trying again non-stop.

Thomas had a proposal with watch queue where we could pass UMD some different
error codes in different situations so UMD could perhaps handle different cases
in different ways.

But as of now they have no different ways of handling things. They send
DEVICE_LOST to the application. Application can be reinitialized or not.
Nothing there states that device is lost forever at the same time that
nothing is done to restart the application automatically. It is up to
the user to restart things over when they need/want to.

> 
> > 
> > > > > + * - Stop accepting new submissions
> > > > This is done as part of the above step and it isn't a separate one, right?
> > > We explicitly xe_guc_submit_disable() inside flr_prepare() so I thought it
> > > was worth spelling out. Will drop.
> 
> Maybe instead of dropping it, reword it as "stop all submissions to the
> GuC".
> 
> > > 
> > > > > + * - Kill exec queues which signals all fences and frees in-flight jobs
> > > > > + * - Skip memory eviction due to untrustworthy VRAM contents
> > > > Note that the VRAM contents are not necessarily untrustworthy at this points
> > > > since the FLR hasn't happened yet. However, if the admin is triggering an
> > > > FLR it is likely that something is broken (whether memory, GuC, GT or
> > > > something else), so we shouldn't try to touch the HW anyway.
> > > Yes, that's what I meant here but your phrasing is better. Will update.
> > > 
> > > > > + * - Remove all memory mappings since VRAM contents will be lost
> > > > Dumb question, but what happens if a userspace app has an object mapped and
> > > > they try to access it from the CPU after this step?
> > > I'm not much familiar with MM parts but from what I understand it'll
> > > cause a fault which should be redirected to dummy page. I've tried to
> > > handle it with commit c020fff70d75 but I'm not sure if that's sufficient.
> > > This is why I've marked MM corner cases as TODO.
> 
> AFAICS that patch only redirects to dummy page while the wedged flag is set.
> What happens after the FLR is completed and we've removed the wedged flag?
> If we've dropped the mapping to the memory, where is that access going to
> go?
> 
> > > 
> > > > > + *
> > > > > + * Re-initialization phase:
> > > > > + * - Recreate kernel bos due to skipped eviction in prepare phase
> > > > > + * - Restore kernel queues which were killed in prepare phase
> > > > > + * - Reload all uC firmwares
> > > > > + * - Bring up GT and unwedge to allow userspace access
> > > > > + *
> > > > > + * Since VRAM contents are lost, the user is expected to recreate user memory
> > > > > + * and reload context.
> > > > How is the user expected to realize that they need to re-create their BOs? A
> > > > queue can be killed for different reasons and normally that doesn't imply
> > > > that any associated BO is now invalid.
> > > We return -ECANCELED if wedged flag is set and the dummy page data will
> > > read all 0s. This would be the indication to the application that it needs
> > > to recreate user memory and reload context.
> 
> Applications don't usually check their memory to see if it is still good.
> Are we expecting them to start doing this? or are we expecting all memory to
> get thrown out every time an application gets an -ECANCELED error?
> In either case I'd like an ack from the UMD teams on this.
> 
> Daniele
> 
> > > 
> > > Raag
> > > 
> > > > > + *
> > > > > + * TODO: Add PCIe error handling callbacks using similar flow.
> > > > > + *
> > > > > + * Current implementation is only limited to re-initializing GT.
> > > > > + * This needs to be extended for a lot of components listed below.
> > > > > + *
> > > > > + * - Proper re-initialization of GSC and PXP for integrated platforms
> > > > > + * - SRIOV cases which need synchronization between PF and VF
> > > > > + * - Re-initialization of all child devices of Xe
> > > > > + * - User memory handling and MM corner cases
> > > > > + * - Display
> > > > > + */
> > > > > +
> > > > > 
> 

Re: [PATCH v6 8/8] drm/xe/pci: Introduce PCIe FLR

[Raag Jadav]

On Thu, Apr 30, 2026 at 04:57:46PM -0400, Rodrigo Vivi wrote:
> On Wed, Apr 29, 2026 at 10:57:53AM -0700, Daniele Ceraolo Spurio wrote:
> > On 4/29/2026 9:22 AM, Rodrigo Vivi wrote:
> > > On Wed, Apr 29, 2026 at 06:33:55AM +0200, Raag Jadav wrote:
> > > > On Tue, Apr 28, 2026 at 04:28:15PM -0700, Daniele Ceraolo Spurio wrote:
> > > > > <snip>
> > > > > 
> > > > > I haven't gone through the code yet, but I wanted to ask some questions
> > > > > regarding the approach first.
> > > > Sure.
> > > > 
> > > > > > +
> > > > > > +/**
> > > > > > + * DOC: PCI Error Handling
> > > > > > + *
> > > > > > + * Xe driver registers PCI callbacks which are called by PCI core in case of
> > > > > > + * bus errors or resets.
> > > > > > + *
> > > > > > + * Currently only PCI Function Level Reset (FLR) callbacks are supported. Since
> > > > > > + * most of the Endpoint Function state is lost on PCIe FLR, the flow is pretty
> > > > > > + * much similar to system suspend/resume flow with a few notable exceptions.
> > > > > IMO we need a couple of lines to describe what the impact of FLR is on the
> > > > > HW. Something like:
> > > > > 
> > > > > "PCI FLR clears VRAM and resets the state of all the HW units. Therefore,
> > > > > the contents of all exec queues and BOs in VRAM are lost and the HW needs a
> > > > > full re-init".
> > > > Makes sense.
> > > > 
> > > > > > + *
> > > > > > + * Prepare phase:
> > > > > > + * - Temporarily wedge the device to prevent userspace access
> > > > > I'm not convinced that wedging is the correct approach here, because the
> > > > > expectation from the apps POV is that wedging is permanent, so they won't
> > > > > try again later. Maybe we can have a separate flr_in_progress flag and
> > > > > return something like -EBUSY or -EAGAIN when the FLR is in progress?
> > > > This was my initial plan but during implementation I realized that much
> > > > of the code paths that need handling based new flag are already handled
> > > > by wedged flag. Like IOCTLs, dummy page faulting, GT reset worker, GuC
> > > > submission, GuC PC and TLB invalidation corner cases, SRIOV races and so
> > > > on. So I decided to reuse it here.
> > > > 
> > > > In my understand wedging is permanent only when we choose to send the
> > > > uevent and expect device recovery from userspace, which IIUC we're not.
> > > > So I hope that's okay?
> > > Right, it should be okay.
> > > 
> > > But we have 2 different users on top.
> > > 
> > > Runtime (NEO/Level0-core and Apps):
> > > 
> > > UMDs will send DEVICE_LOST to application in the case of any kind of reset.
> > > Nothing prevents App to go and try it again. It will just receive error.
> > > 
> > > Admin (Level0-sysman and XPUManager):
> > > 
> > > As Raag told, to them it is only permanent if we ask for help through the
> > > wedge uevent hints. Otherwise they should still be able to re-enumerate
> > > the devices whenever needed.
> > 
> > Those are very specific to server use-cases. While that's what we're
> > currently implementing FLR for, there might be other use-cases in the future
> > that require us to implement this on the client side (there is already at
> > least one case where we wedge but we could instead recover via
> > driver-triggered FLR), where the apps can be less curated.
> > 
> > I'm a bit lost on how a random app is supposed to tell the difference
> > between temporary and permanent wedges if they get a DEVICE_LOST error in
> > both cases. Are we expecting all apps to register to the uevent? Or are the
> > UMD drivers expected to return a different code if the wedge is permanent?
> > Because I don't think that an app should just keep trying again non-stop.
> 
> Thomas had a proposal with watch queue where we could pass UMD some different
> error codes in different situations so UMD could perhaps handle different cases
> in different ways.

+1, or we can simply hook this up to WEDGED=none (which IIRC AMD is already
doing).

Raag

> But as of now they have no different ways of handling things. They send
> DEVICE_LOST to the application. Application can be reinitialized or not.
> Nothing there states that device is lost forever at the same time that
> nothing is done to restart the application automatically. It is up to
> the user to restart things over when they need/want to.
> 
> > 
> > > 
> > > > > > + * - Stop accepting new submissions
> > > > > This is done as part of the above step and it isn't a separate one, right?
> > > > We explicitly xe_guc_submit_disable() inside flr_prepare() so I thought it
> > > > was worth spelling out. Will drop.
> > 
> > Maybe instead of dropping it, reword it as "stop all submissions to the
> > GuC".
> > 
> > > > 
> > > > > > + * - Kill exec queues which signals all fences and frees in-flight jobs
> > > > > > + * - Skip memory eviction due to untrustworthy VRAM contents
> > > > > Note that the VRAM contents are not necessarily untrustworthy at this points
> > > > > since the FLR hasn't happened yet. However, if the admin is triggering an
> > > > > FLR it is likely that something is broken (whether memory, GuC, GT or
> > > > > something else), so we shouldn't try to touch the HW anyway.
> > > > Yes, that's what I meant here but your phrasing is better. Will update.
> > > > 
> > > > > > + * - Remove all memory mappings since VRAM contents will be lost
> > > > > Dumb question, but what happens if a userspace app has an object mapped and
> > > > > they try to access it from the CPU after this step?
> > > > I'm not much familiar with MM parts but from what I understand it'll
> > > > cause a fault which should be redirected to dummy page. I've tried to
> > > > handle it with commit c020fff70d75 but I'm not sure if that's sufficient.
> > > > This is why I've marked MM corner cases as TODO.
> > 
> > AFAICS that patch only redirects to dummy page while the wedged flag is set.
> > What happens after the FLR is completed and we've removed the wedged flag?
> > If we've dropped the mapping to the memory, where is that access going to
> > go?
> > 
> > > > 
> > > > > > + *
> > > > > > + * Re-initialization phase:
> > > > > > + * - Recreate kernel bos due to skipped eviction in prepare phase
> > > > > > + * - Restore kernel queues which were killed in prepare phase
> > > > > > + * - Reload all uC firmwares
> > > > > > + * - Bring up GT and unwedge to allow userspace access
> > > > > > + *
> > > > > > + * Since VRAM contents are lost, the user is expected to recreate user memory
> > > > > > + * and reload context.
> > > > > How is the user expected to realize that they need to re-create their BOs? A
> > > > > queue can be killed for different reasons and normally that doesn't imply
> > > > > that any associated BO is now invalid.
> > > > We return -ECANCELED if wedged flag is set and the dummy page data will
> > > > read all 0s. This would be the indication to the application that it needs
> > > > to recreate user memory and reload context.
> > 
> > Applications don't usually check their memory to see if it is still good.
> > Are we expecting them to start doing this? or are we expecting all memory to
> > get thrown out every time an application gets an -ECANCELED error?
> > In either case I'd like an ack from the UMD teams on this.
> > 
> > Daniele
> > 
> > > > 
> > > > Raag
> > > > 
> > > > > > + *
> > > > > > + * TODO: Add PCIe error handling callbacks using similar flow.
> > > > > > + *
> > > > > > + * Current implementation is only limited to re-initializing GT.
> > > > > > + * This needs to be extended for a lot of components listed below.
> > > > > > + *
> > > > > > + * - Proper re-initialization of GSC and PXP for integrated platforms
> > > > > > + * - SRIOV cases which need synchronization between PF and VF
> > > > > > + * - Re-initialization of all child devices of Xe
> > > > > > + * - User memory handling and MM corner cases
> > > > > > + * - Display
> > > > > > + */
> > > > > > +
> > > > > > 
> >