[BUG] xe: Meteor Lake 7d55 eDP PHY A/DPLL state mismatch, flip_done timeout

[BUG] xe: Meteor Lake 7d55 eDP PHY A/DPLL state mismatch, flip_done timeout

[Jakub Bystron]

Hi,

I hit a display-side xe failure on a Lenovo ThinkPad P1 Gen 7 with
Meteor Lake / Core Ultra 7 165H integrated graphics.

Hardware:
Manufacturer: LENOVO
Product:      21KV001UCK
BIOS:         N48ET33W (1.20)
GPU:          Intel Meteor Lake iGPU, PCI ID 8086:7d55

Kernel:
Linux 7.0.9_1, Void Linux

Environment:
Xorg
Internal eDP panel

Kernel command line:
i915.force_probe=!7d55 xe.force_probe=7d55 i915.enable_psr=0 xe.enable_psr=0

The kernel is tainted due to force_probe. i915 is explicitly blocked and xe is used for 8086:7d55.

Symptom:
After some uptime, the internal display pipeline appears to wedge. This looks display/modeset/eDP related, not a Mesa/3D workload issue. PSR was already disabled.

Relevant dmesg excerpt:

[10513.839237] xe 0000:00:02.0: [drm] *ERROR* Failed to bring PHY A to idle.
[10513.844179] xe 0000:00:02.0: [drm] *ERROR* PHY A Read 0c70 failed after 3 retries.
[10513.851165] xe 0000:00:02.0: [drm] *ERROR* PHY A Write 0c70 failed after 3 retries.
[10514.042599] xe 0000:00:02.0: [drm] *ERROR* Timeout waiting for DDI BUF A to get active
[10515.226516] xe 0000:00:02.0: [drm] *ERROR* Timed out waiting for DP idle patterns
[10525.710458] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] flip_done timed out
[10525.890816] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in pixel_rate (expected 154130, found 38971)
[10525.890823] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in dpll_hw_state
[10525.890847] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in hw.pipe_mode.crtc_clock (expected 154130, found 38971)
[10525.890849] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in hw.adjusted_mode.crtc_clock (expected 154130, found 38971)
[10525.890849] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in port_clock (expected 243000, found 61440)
[10525.890853] ------------[ cut here ]------------
[10525.890853] xe 0000:00:02.0: [drm] pipe state doesn't match!
[10525.890854] WARNING: drivers/gpu/drm/i915/display/intel_modeset_verify.c:225 at intel_modeset_verify_crtc+0x325/0x550 [xe], CPU#3: Xorg/1485
[10526.070073] ------------[ cut here ]------------
[10526.070074] xe 0000:00:02.0: [drm] DPLL 0: pll hw state mismatch
[10526.070076] WARNING: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:4945 at verify_single_dpll_state+0x199/0x540 [xe], CPU#3: Xorg/1485
[10536.462596] xe 0000:00:02.0: [drm] *ERROR* flip_done timed out
[10536.462615] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] commit wait timed out
[10546.702509] xe 0000:00:02.0: [drm] *ERROR* flip_done timed out
[10546.702526] xe 0000:00:02.0: [drm] *ERROR* [CONNECTOR:506:eDP-1] commit wait timed out
[10556.942486] xe 0000:00:02.0: [drm] *ERROR* flip_done timed out
[10556.942505] xe 0000:00:02.0: [drm] *ERROR* [PLANE:33:plane 1A] commit wait timed out
[10557.966373] ------------[ cut here ]------------
[10557.966382] xe 0000:00:02.0: [drm] vblank wait timed out on crtc 0
[10557.966388] WARNING: drivers/gpu/drm/drm_vblank.c:1320 at drm_crtc_wait_one_vblank+0x183/0x1f0 [drm], CPU#12: kworker/12:0/17806
[10558.421946] xe 0000:00:02.0: [drm] PHY A failed to change powerdown state

I can reproduce this on this machine with the kernel and command line above. In this configuration, xe is not usable for a normal Xorg desktop session on this Meteor Lake 8086:7d55 system, so I currently have to fall back to i915 for stability.

Regards,
Jakub

[BUG] xe: Meteor Lake 7d55 eDP PHY A/DPLL state mismatch, flip_done timeout

[Jakub Bystron]

Hi,

I hit a display-side xe failure on a Lenovo ThinkPad P1 Gen 7 with
Meteor Lake / Core Ultra 7 165H integrated graphics.

Hardware:
Manufacturer: LENOVO
Product:      21KV001UCK
BIOS:         N48ET33W (1.20)
GPU:          Intel Meteor Lake iGPU, PCI ID 8086:7d55

Kernel:
Linux 7.0.9_1, Void Linux

Environment:
Xorg
Internal eDP panel

Kernel command line:
i915.force_probe=!7d55 xe.force_probe=7d55 i915.enable_psr=0 xe.enable_psr=0

The kernel is tainted due to force_probe. i915 is explicitly blocked and xe is used for 8086:7d55.

Symptom:
After some uptime, the internal display pipeline appears to wedge. This looks display/modeset/eDP related, not a Mesa/3D workload issue. PSR was already disabled.

Relevant dmesg excerpt:

[10513.839237] xe 0000:00:02.0: [drm] *ERROR* Failed to bring PHY A to idle.
[10513.844179] xe 0000:00:02.0: [drm] *ERROR* PHY A Read 0c70 failed after 3 retries.
[10513.851165] xe 0000:00:02.0: [drm] *ERROR* PHY A Write 0c70 failed after 3 retries.
[10514.042599] xe 0000:00:02.0: [drm] *ERROR* Timeout waiting for DDI BUF A to get active
[10515.226516] xe 0000:00:02.0: [drm] *ERROR* Timed out waiting for DP idle patterns
[10525.710458] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] flip_done timed out
[10525.890816] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in pixel_rate (expected 154130, found 38971)
[10525.890823] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in dpll_hw_state
[10525.890847] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in hw.pipe_mode.crtc_clock (expected 154130, found 38971)
[10525.890849] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in hw.adjusted_mode.crtc_clock (expected 154130, found 38971)
[10525.890849] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in port_clock (expected 243000, found 61440)
[10525.890853] ------------[ cut here ]------------
[10525.890853] xe 0000:00:02.0: [drm] pipe state doesn't match!
[10525.890854] WARNING: drivers/gpu/drm/i915/display/intel_modeset_verify.c:225 at intel_modeset_verify_crtc+0x325/0x550 [xe], CPU#3: Xorg/1485
[10526.070073] ------------[ cut here ]------------
[10526.070074] xe 0000:00:02.0: [drm] DPLL 0: pll hw state mismatch
[10526.070076] WARNING: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:4945 at verify_single_dpll_state+0x199/0x540 [xe], CPU#3: Xorg/1485
[10536.462596] xe 0000:00:02.0: [drm] *ERROR* flip_done timed out
[10536.462615] xe 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] commit wait timed out
[10546.702509] xe 0000:00:02.0: [drm] *ERROR* flip_done timed out
[10546.702526] xe 0000:00:02.0: [drm] *ERROR* [CONNECTOR:506:eDP-1] commit wait timed out
[10556.942486] xe 0000:00:02.0: [drm] *ERROR* flip_done timed out
[10556.942505] xe 0000:00:02.0: [drm] *ERROR* [PLANE:33:plane 1A] commit wait timed out
[10557.966373] ------------[ cut here ]------------
[10557.966382] xe 0000:00:02.0: [drm] vblank wait timed out on crtc 0
[10557.966388] WARNING: drivers/gpu/drm/drm_vblank.c:1320 at drm_crtc_wait_one_vblank+0x183/0x1f0 [drm], CPU#12: kworker/12:0/17806
[10558.421946] xe 0000:00:02.0: [drm] PHY A failed to change powerdown state

I can reproduce this on this machine with the kernel and command line above. In this configuration, xe is not usable for a normal Xorg desktop session on this Meteor Lake 8086:7d55 system, so I currently have to fall back to i915 for stability.

Regards,
Jakub

Re: [BUG] xe: Meteor Lake 7d55 eDP PHY A/DPLL state mismatch, flip_done timeout

[Jani Nikula]

On Wed, 20 May 2026, Jakub Bystron <jb@elitecode.cz> wrote:
> I hit a display-side xe failure on a Lenovo ThinkPad P1 Gen 7 with
> Meteor Lake / Core Ultra 7 165H integrated graphics.
>
> Hardware:
> Manufacturer: LENOVO
> Product:      21KV001UCK
> BIOS:         N48ET33W (1.20)
> GPU:          Intel Meteor Lake iGPU, PCI ID 8086:7d55
>
> Kernel:
> Linux 7.0.9_1, Void Linux
>
> Environment:
> Xorg
> Internal eDP panel
>
> Kernel command line:
> i915.force_probe=!7d55 xe.force_probe=7d55 i915.enable_psr=0 xe.enable_psr=0
>
> The kernel is tainted due to force_probe. i915 is explicitly blocked and xe is used for 8086:7d55.

The usual boilerplate response: Use the i915 driver with MTL. When the
issue is specific to the xe + MTL (or older) combo, you're fresh out of
luck.

That said, this is a known display issue, there's at least:

https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/16042
https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/16064
https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/16098


BR,
Jani.


-- 
Jani Nikula, Intel

Re: [BUG] xe: Meteor Lake 7d55 eDP PHY A/DPLL state mismatch, flip_done timeout

[Marco Nenciarini]

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Hi Jakub,

I reproduce the same bug on different hardware with the i915 driver:

  Hardware: Dell Pro Max 16 Premium MA16250, BIOS 1.9.0
  CPU: Core Ultra 7 265H (Arrow Lake-H)
  iGPU: 8086:7d51 (different MTL/ARL stepping from your 7d55)
  Kernel: 7.0.7+deb13-amd64 (Debian)
  Driver: i915 (no force_probe), Wayland (GNOME)
  Hybrid: NVIDIA RTX PRO 1000 Blackwell dGPU, open module 595.71.05

Signature is line-for-line identical to yours on the internal eDP
panel:

  i915 0000:00:02.0: [drm] *ERROR* Failed to bring PHY A to idle.
  i915 0000:00:02.0: [drm] *ERROR* PHY A Read 0c70 failed after 3 retries.
  i915 0000:00:02.0: [drm] *ERROR* PHY A Write 0c70 failed after 3 retries.
  i915 0000:00:02.0: [drm] *ERROR* Timeout waiting for DDI BUF A to get active
  i915 0000:00:02.0: [drm] *ERROR* Timed out waiting for DP idle patterns
  i915 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] flip_done timed out
  i915 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in dpll_hw_state
  i915 0000:00:02.0: [drm] *ERROR* [CRTC:149:pipe A] mismatch in port_clock
                                   (expected 540000, found 61440)
  WARNING ... intel_modeset_verify_crtc+0x325/0x550 [i915]
  WARNING ... verify_single_dpll_state+0x1a2/0x560 [i915]
  i915 0000:00:02.0: [drm] *ERROR* flip_done timed out (x N, every 10 s)
  i915 0000:00:02.0: [drm] PHY A failed to change powerdown state
  WARNING ... intel_disable_transcoder+0x311/0x3c0 [i915]
  i915 0000:00:02.0: [drm] pipe_off wait timed out

Yours fires on xe at the same source line offsets in
intel_modeset_verify_crtc and verify_single_dpll_state. Both drivers
share drivers/gpu/drm/i915/display/, so the bug is in that shared
display IP code rather than in the i915-specific or xe-specific
top-level code.

Deterministic trigger I use:

  DBUS_SESSION_BUS_ADDRESS=unix:path=/run/user/$(id -u)/bus \
    notify-send -u critical "wake test" "trigger"

with the laptop locked or DPMS-off. Fires within 29 minutes of boot
on our setup. No s2idle in the loop. Probably reproduces under xe on
your hardware too with the same approach.

Self-recovery: bounded waits eventually time out (3 retries on PHY
MSGBUS, 10 s on flip_done, 100 ms on pipe_off). intel_disable_transcoder
returns with the WARN, Mutter stops retrying for 60 to 100 s, the
PHY hardware heals itself in that idle window, and the next wake-input
(mouse, keyboard, fingerprint) triggers a fresh modeset that succeeds.
Total 2 to 4 minutes of dead screen per occurrence. Not REISUB-class
on this hardware.

Cross-reference: Aaron Esau (Cc'd) posted a 3-patch series targeting
this on intel-gfx@ on 2026-05-09 [1]. The series received pushback
from Imre, Jani N, and Mika arguing for catching the failure pre-commit
so the atomic_commit can fail cleanly at check time rather than
mid-commit. The series is currently stalled. With Jakub's report,
Aaron's report, and mine, the bug reproduces on at least three
independent setups across i915 and xe, ARL-H and MTL, with and without
an active NVIDIA driver.

On the NVIDIA framing: Aaron's cover letter attributed the MSGBUS
unresponsiveness to the NVIDIA dGPU not participating in S0ix
(NVreg_EnableS0ixPowerManagement). That framing has two cracks. My
reproduction has S0ix participation enabled AND NVIDIA runtime PM
fully disabled (NVreg_DynamicPowerManagement=0x00, dGPU stays in D0
since boot, never enters D3), yet the bug still fires. Jakub's setup
has xe forcing the iGPU and no active NVIDIA driver in dmesg. So
whatever platform-side condition causes the PHY to wedge, the NVIDIA
module parameters are not the lever, and the bug occurs without an
active NVIDIA driver. The fix has to be on the i915/xe side.

Happy to provide a full diagnostic bundle if useful.

[1] https://lore.kernel.org/intel-gfx/20260509162407.510539-1-aaron1esau@gmail.com/

Regards,
Marco

-- 
Marco Nenciarini - mnencia@kcore.it
7C23 B804 3E65 D298 0A21  B6E2 589F 03F0 1BA5 5038

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Re: [BUG] xe: Meteor Lake 7d55 eDP PHY A/DPLL state mismatch, flip_done timeout

[Jani Nikula]

On Thu, 21 May 2026, Marco Nenciarini <mnencia@kcore.it> wrote:
> Cross-reference: Aaron Esau (Cc'd) posted a 3-patch series targeting
> this on intel-gfx@ on 2026-05-09 [1]. The series received pushback
> from Imre, Jani N, and Mika arguing for catching the failure pre-commit
> so the atomic_commit can fail cleanly at check time rather than
> mid-commit. The series is currently stalled. With Jakub's report,
> Aaron's report, and mine, the bug reproduces on at least three
> independent setups across i915 and xe, ARL-H and MTL, with and without
> an active NVIDIA driver.
>
> On the NVIDIA framing: Aaron's cover letter attributed the MSGBUS
> unresponsiveness to the NVIDIA dGPU not participating in S0ix
> (NVreg_EnableS0ixPowerManagement). That framing has two cracks. My
> reproduction has S0ix participation enabled AND NVIDIA runtime PM
> fully disabled (NVreg_DynamicPowerManagement=0x00, dGPU stays in D0
> since boot, never enters D3), yet the bug still fires. Jakub's setup
> has xe forcing the iGPU and no active NVIDIA driver in dmesg. So
> whatever platform-side condition causes the PHY to wedge, the NVIDIA
> module parameters are not the lever, and the bug occurs without an
> active NVIDIA driver. The fix has to be on the i915/xe side.

Looks like Jakub sent the same message twice. I replied to the other one
[1], with references to existing gitlab issues.

I'll reiterate that 1) any combo with an out-of-tree module loaded gets
no priority, 2) MTL/ARL with the xe driver doesn't get much priority,
and 3) the proposed series from Aaron is not viable.

That said, it does look like a regression with MTL/ARL and the i915
driver and without out-of-tree modules loaded, and we're looking into
it.


BR,
Jani.


[1] https://lore.kernel.org/r/fb38414a888f689b96135f65706c2125059e53ca@intel.com

-- 
Jani Nikula, Intel