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From: Raag Jadav <raag.jadav@intel.com>
To: Riana Tauro <riana.tauro@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
	rodrigo.vivi@intel.com, aravind.iddamsetty@linux.intel.com,
	badal.nilawar@intel.com, ravi.kishore.koppuravuri@intel.com,
	mallesh.koujalagi@intel.com, soham.purkait@intel.com
Subject: Re: [PATCH v5 02/14] drm/xe/xe_sysctrl: Make sysctrl flood limit reusable
Date: Fri, 15 May 2026 09:46:16 +0200	[thread overview]
Message-ID: <agbPSExZuoQ2-Oxs@black.igk.intel.com> (raw)
In-Reply-To: <20260511172908.1122252-18-riana.tauro@intel.com>

On Mon, May 11, 2026 at 10:59:09PM +0530, Riana Tauro wrote:
> The sysctrl command flood limit was defined in an event specific header,
> restricting its usage to event handling. Move it to the shared header
> with a generic name so it can be re-used across all files
> using system controller commands.
> 
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_sysctrl_event.c         | 2 +-
>  drivers/gpu/drm/xe/xe_sysctrl_event_types.h   | 2 +-
>  drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 3 +++
>  3 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event.c b/drivers/gpu/drm/xe/xe_sysctrl_event.c
> index b4d17329af6c..faf6ba89ce98 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_event.c
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_event.c
> @@ -16,7 +16,7 @@ static void get_pending_event(struct xe_sysctrl *sc, struct xe_sysctrl_mailbox_c
>  {
>  	struct xe_sysctrl_event_response *response = command->data_out;
>  	struct xe_device *xe = sc_to_xe(sc);
> -	u32 count = XE_SYSCTRL_EVENT_FLOOD;
> +	u32 count = XE_SYSCTRL_FLOOD;
>  	size_t len;
>  	int ret;
>  
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
> index c16c66b9fa7f..d236e22fe9dd 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
> @@ -11,7 +11,7 @@
>  #define XE_SYSCTRL_EVENT_DATA_LEN		59
>  
>  /* Modify as needed */
> -#define XE_SYSCTRL_EVENT_FLOOD			16
> +#define XE_SYSCTRL_FLOOD			16
>  
>  /**
>   * enum xe_sysctrl_event - Events reported by System Controller
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> index 84d7c647e743..0fa786a9e8c8 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -48,6 +48,9 @@ struct xe_sysctrl_mailbox_command {
>  	size_t data_out_len;
>  };
>  
> +/* Modify as needed */
> +#define XE_SYSCTRL_FLOOD			16

Apart from obvious duplication, please consider that the scale is a bit
different for both (additional_errors and event) cases. A single event
can consist upto 16 errors as opposed to additional_errors, which in
itself signifies a single error.

I personally don't see any problem here regardless, but if you want this
to be reused, please make sure we only have a single definition.

Raag

>  #define XE_SYSCTRL_MB_FRAME_SIZE	16
>  #define XE_SYSCTRL_MB_MAX_FRAMES	64
>  #define XE_SYSCTRL_MB_MAX_MESSAGE_SIZE	\
> -- 
> 2.47.1
> 

  parent reply	other threads:[~2026-05-15  7:46 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-11 17:29 [PATCH v5 00/14] Introduce Xe Uncorrectable Error Handling Riana Tauro
2026-05-11 17:29 ` [PATCH v5 01/14] drm/xe/xe_survivability: Decouple survivability info from boot survivability Riana Tauro
2026-05-11 17:29 ` [PATCH v5 02/14] drm/xe/xe_sysctrl: Make sysctrl flood limit reusable Riana Tauro
2026-05-14 12:51   ` Mallesh, Koujalagi
2026-05-15  7:46   ` Raag Jadav [this message]
2026-05-11 17:29 ` [PATCH v5 03/14] drm/xe/xe_pci_error: Implement PCI error recovery callbacks Riana Tauro
2026-05-14 13:15   ` Mallesh, Koujalagi
2026-05-11 17:29 ` [PATCH v5 04/14] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset Riana Tauro
2026-05-11 17:29 ` [PATCH v5 05/14] drm/xe: Skip device access during PCI error recovery Riana Tauro
2026-05-11 17:29 ` [PATCH v5 06/14] drm/xe/xe_ras: Initialize Uncorrectable AER Registers Riana Tauro
2026-05-14 17:40   ` Raag Jadav
2026-05-15  8:30   ` Mallesh, Koujalagi
2026-05-11 17:29 ` [PATCH v5 07/14] drm/xe/xe_ras: Add support for uncorrectable core-compute errors Riana Tauro
2026-05-11 17:29 ` [PATCH v5 08/14] drm/xe/xe_ras: Handle uncorrectable SoC Internal errors Riana Tauro
2026-05-15  8:10   ` Mallesh, Koujalagi
2026-05-11 17:29 ` [PATCH v5 09/14] drm/xe/xe_ras: Add support to query device memory errors Riana Tauro
2026-05-11 17:29 ` [PATCH v5 10/14] drm/xe/xe_ras: Add support to query page offline queue and list Riana Tauro
2026-05-11 17:29 ` [PATCH v5 11/14] drm/xe/xe_ras: Query errors from system controller on probe Riana Tauro
2026-05-11 21:56   ` Umesh Nerlige Ramappa
2026-05-11 17:29 ` [PATCH v5 12/14] drm/xe/xe_pci_error: Process errors in mmio_enabled Riana Tauro
2026-05-11 17:29 ` [RFC PATCH v5 13/14] drm/xe/xe_ras: Add support to offline/decline a page address Riana Tauro
2026-05-11 17:29 ` [RFC PATCH v5 14/14] drm/xe/xe_ras: Process pages from offlined list and queue Riana Tauro
2026-05-12  1:05 ` ✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev5) Patchwork
2026-05-12  1:06 ` ✓ CI.KUnit: success " Patchwork
2026-05-12  2:29 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-12  6:26 ` ✗ Xe.CI.FULL: failure " Patchwork

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